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Ethernet-IP-Core/Design.md
2026-04-13 05:15:43 +00:00

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- VSC8662 MAC interface dual port signals (Port 0 and Port1) RX/TX is connected on MSS SGMII
Bank 5 (ref: [user manual](https://ww1.microchip.com/downloads/aemDocuments/documents/FPGA/ProductDocuments/UserGuides/microchip_polarfire_soc_fpga_icicle_kit_user_guide_vb.pdf) )