abhishek/Ethernet-IP-Core
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working FIFO and TPSRAM without packet flter

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abhishekpythons
2026-04-15 23:54:00 +05:30
parent 77c69687d9
commit e4b91625ea
579 changed files with 1295759 additions and 0 deletions
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designer/top/top_has_violations Normal file
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_timing_constraints_coverage 99.88%
_max_timing_violations_slow_lv_lt met
_max_timing_slow_lv_lt met
_min_timing_violations_slow_lv_lt met
_min_timing_slow_lv_lt met
_max_timing_violations_fast_hv_lt met
_max_timing_fast_hv_lt met
_min_timing_violations_fast_hv_lt met
_min_timing_fast_hv_lt met
_max_timing_violations_slow_lv_ht met
_max_timing_slow_lv_ht met
_min_timing_violations_slow_lv_ht met
_min_timing_slow_lv_ht met
_max_timing_violations_multi_corner met
_max_timing_multi_corner met
_min_timing_violations_multi_corner met
_min_timing_multi_corner met