abhishek/Ethernet-IP-Core
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head tail filter testing done

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abhishekpythons
2026-04-17 18:14:15 +05:30
parent e4b91625ea
commit a8e7c14f45
294 changed files with 209839 additions and 208687 deletions
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18
synthesis/syntmp/top.plg
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@@ -4,11 +4,11 @@
@P: COREJTAGDEBUG_Z5|iUDRCK_inferred_clock - Estimated Period : 74.491
@P: COREJTAGDEBUG_Z5|iUDRCK_inferred_clock - Requested Period : 10.000
@P: COREJTAGDEBUG_Z5|iUDRCK_inferred_clock - Slack : -32.246
@P: PF_CCC_0_0/PF_CCC_0_0/pll_inst_0/OUT0 - Estimated Frequency : 55.0 MHz
@P: PF_CCC_0_0/PF_CCC_0_0/pll_inst_0/OUT0 - Estimated Frequency : 55.1 MHz
@P: PF_CCC_0_0/PF_CCC_0_0/pll_inst_0/OUT0 - Requested Frequency : 80.0 MHz
@P: PF_CCC_0_0/PF_CCC_0_0/pll_inst_0/OUT0 - Estimated Period : 18.171
@P: PF_CCC_0_0/PF_CCC_0_0/pll_inst_0/OUT0 - Estimated Period : 18.138
@P: PF_CCC_0_0/PF_CCC_0_0/pll_inst_0/OUT0 - Requested Period : 12.500
@P: PF_CCC_0_0/PF_CCC_0_0/pll_inst_0/OUT0 - Slack : -5.671
@P: PF_CCC_0_0/PF_CCC_0_0/pll_inst_0/OUT0 - Slack : -5.638
@P: PF_IOD_CDR_C0_0/PF_LANECTRL_0/I_LANECTRL/CLK_OUT_R - Estimated Frequency : 116.7 MHz
@P: PF_IOD_CDR_C0_0/PF_LANECTRL_0/I_LANECTRL/CLK_OUT_R - Requested Frequency : 125.0 MHz
@P: PF_IOD_CDR_C0_0/PF_LANECTRL_0/I_LANECTRL/CLK_OUT_R - Estimated Period : 8.569
@@ -39,11 +39,11 @@
@P: PF_IOD_CDR_CCC_C0_0/PF_CCC_0/pll_inst_0/OUT3 - Estimated Period : NA
@P: PF_IOD_CDR_CCC_C0_0/PF_CCC_0/pll_inst_0/OUT3 - Requested Period : 1.600
@P: PF_IOD_CDR_CCC_C0_0/PF_CCC_0/pll_inst_0/OUT3 - Slack : NA
@P: PF_IOD_CDR_CCC_C0_0/PF_CLK_DIV_0/I_CD/Y_DIV - Estimated Frequency : 230.3 MHz
@P: PF_IOD_CDR_CCC_C0_0/PF_CLK_DIV_0/I_CD/Y_DIV - Estimated Frequency : 225.1 MHz
@P: PF_IOD_CDR_CCC_C0_0/PF_CLK_DIV_0/I_CD/Y_DIV - Requested Frequency : 125.0 MHz
@P: PF_IOD_CDR_CCC_C0_0/PF_CLK_DIV_0/I_CD/Y_DIV - Estimated Period : 4.341
@P: PF_IOD_CDR_CCC_C0_0/PF_CLK_DIV_0/I_CD/Y_DIV - Estimated Period : 4.443
@P: PF_IOD_CDR_CCC_C0_0/PF_CLK_DIV_0/I_CD/Y_DIV - Requested Period : 8.000
@P: PF_IOD_CDR_CCC_C0_0/PF_CLK_DIV_0/I_CD/Y_DIV - Slack : 3.659
@P: PF_IOD_CDR_CCC_C0_0/PF_CLK_DIV_0/I_CD/Y_DIV - Slack : 3.557
@P: PHY_MDC_CLOCK - Estimated Frequency : NA
@P: PHY_MDC_CLOCK - Requested Frequency : 2.9 MHz
@P: PHY_MDC_CLOCK - Estimated Period : NA
@@ -70,9 +70,9 @@
@P: System - Requested Period : 10.000
@P: System - Slack : -27.793
@P: top Part : mpf300tfcg1152-1
@P: top Register bits : 7316
@P: top Register bits : 7208
@P: top DSP Blocks : 0
@P: top I/O primitives : 50
@P: top RAM1K20 : 34
@P: top RAM1K20 : 36
@P: top RAM64x12 : 11
@P: CPU Time : 0h:03m:50s
@P: CPU Time : 0h:03m:58s