7 lines
215 B
XML
7 lines
215 B
XML
<?xml version="1.0" encoding="UTF-8" ?>
|
|
<SynplifyOutput>
|
|
<result>Success</result>
|
|
<design>top</design>
|
|
<target_verilog>E:\AbhishekV\rising\ethernet_tpsram_test\synthesis\top.vm</target_verilog>
|
|
</SynplifyOutput>
|