103 lines
3.6 KiB
Groff
103 lines
3.6 KiB
Groff
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Synplify Pro (R)
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Version V-2023.09M-5 for win64 - Apr 29, 2025
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Copyright (c) 1988 - 2025 Synopsys, Inc.
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This software and the associated documentation are proprietary to Synopsys,
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Inc. This software may only be used in accordance with the terms and conditions
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of a written license agreement with Synopsys, Inc. All other use, reproduction,
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or distribution of this software is strictly prohibited. Licensed Products
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communicate with Synopsys servers for the purpose of providing software
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updates, detecting software piracy and verifying that customers are using
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Licensed Products in conformity with the applicable License Key for such
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Licensed Products. Synopsys will use information gathered in connection with
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this process to deliver software updates and pursue software pirates and
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infringers.
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Inclusivity & Diversity - Visit SolvNetPlus to read the "Synopsys Statement on
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Inclusivity and Diversity" (Refer to article 000036315 at
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https://solvnetplus.synopsys.com)
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Starting: E:\Microchip\Libero_SoC_2025.1\Libero_SoC\Synplify_Pro\bin64\mbin\synbatch.exe
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Install: E:\Microchip\Libero_SoC_2025.1\Libero_SoC\Synplify_Pro
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Hostname: SOFTWARE-PC
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Date: Wed Apr 15 20:20:12 2026
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Version: V-2023.09M-5
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Arguments: -product synplify_base -licensetype synplifypro_actel -batch -log synplify.log top_syn.tcl
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ProductType: synplify_pro
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License checkout: synplifypro_actel
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License: synplifypro_actel node-locked
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Licensed Vendor: actel
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License Option: actel_oem
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Running in Vendor Mode
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add_dut_hierarchy is not supported in current product.
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prepare_readback is not supported in current product.
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auto_infer_blackbox is not supported in current product.
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log file: "E:\AbhishekV\rising\ethernet_tpsram_test\synthesis\top.srr"
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Running: synthesis in foreground
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Running top_syn|synthesis
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Running Flow: compile (Compile) on top_syn|synthesis
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# Wed Apr 15 20:20:13 2026
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Running Flow: compile_flow (Compile Process) on top_syn|synthesis
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# Wed Apr 15 20:20:13 2026
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Running: compiler (Compile Input) on top_syn|synthesis
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# Wed Apr 15 20:20:13 2026
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Copied E:\AbhishekV\rising\ethernet_tpsram_test\synthesis\synwork\top_comp.srs to E:\AbhishekV\rising\ethernet_tpsram_test\synthesis\top.srs
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compiler completed
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# Wed Apr 15 20:23:56 2026
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Return Code: 0
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Run Time:00h:03m:42s
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Running: multi_srs_gen (Multi-srs Generator) on top_syn|synthesis
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# Wed Apr 15 20:23:56 2026
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multi_srs_gen completed
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# Wed Apr 15 20:23:59 2026
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Return Code: 0
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Run Time:00h:00m:03s
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Copied E:\AbhishekV\rising\ethernet_tpsram_test\synthesis\synwork\top_mult.srs to E:\AbhishekV\rising\ethernet_tpsram_test\synthesis\top.srs
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Complete: Compile Process on top_syn|synthesis
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Running: premap (Premap) on top_syn|synthesis
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# Wed Apr 15 20:23:59 2026
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premap completed with warnings
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# Wed Apr 15 20:24:13 2026
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Return Code: 1
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Run Time:00h:00m:14s
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Complete: Compile on top_syn|synthesis
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Running Flow: map (Map) on top_syn|synthesis
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# Wed Apr 15 20:24:13 2026
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License granted for 4 parallel jobs
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Running: fpga_mapper (Map & Optimize) on top_syn|synthesis
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# Wed Apr 15 20:24:13 2026
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Copied E:\AbhishekV\rising\ethernet_tpsram_test\synthesis\synwork\top_m.srm to E:\AbhishekV\rising\ethernet_tpsram_test\synthesis\top.srm
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fpga_mapper completed with warnings
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# Wed Apr 15 20:28:51 2026
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Return Code: 1
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Run Time:00h:04m:38s
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Complete: Map on top_syn|synthesis
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Complete: Logic Synthesis on top_syn|synthesis
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TCL script complete: "top_syn.tcl"
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exit status=0
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exit status=0
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License checkin: synplifypro_actel
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