Files
Ethernet-IP-Core/simulation/modelsim.ini

11 lines
297 B
INI

[Library]
others = $MODEL_TECH/../modelsim.ini
PolarFire = E:/Microchip/Libero_SoC_2025.1/Libero_SoC/Designer/lib/modelsimpro/precompiled/vlog/polarfire
syncad_vhdl_lib = E:\Microchip\Libero_SoC_2025.1\Libero_SoC\Designer/lib/actel/syncad_vhdl_lib
[vcom]
VHDL93 = 1
[vsim]
IterationLimit = 5000