101 lines
4.3 KiB
Plaintext
101 lines
4.3 KiB
Plaintext
INFO: Reading User SDC file E:\AbhishekV\rising\ethernet_tpsram_test\constraint\top_derived_constraints.sdc.
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INFO: Reading User SDC file E:\AbhishekV\rising\ethernet_tpsram_test\constraint\timing_user_constraints.sdc.
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INFO: The option "Abort flow if errors are found in SDC" is turned ON in Project Settings> Design flow page. The Place & Route tool will fail if errors are found in associated SDC files. Please uncheck the option to ignore the errors and continue running the tool.
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No errors or warnings found.
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INFO: The option "Abort flow if errors are found in PDC" is turned ON in Project Settings> Design flow page. The Place & Route tool will fail if errors are found in associated PDC files. Please uncheck the option to ignore the errors and continue running the tool
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***** Place and Route Configurations *****
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Timing-driven : ON
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Power-driven : OFF
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I/O Register Combining : OFF
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Global Pins Demotion : ON
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Driver Replication : OFF
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High-effort : ON
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Repair min-delay : ON
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Incremental : OFF
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Inter-clock optimization : ON
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INFO: Reading User PDC file E:\AbhishekV\rising\ethernet_tpsram_test\constraint\io\io_constraints.pdc. 0 error(s) and 0 warning(s)
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Running Timing based Global Demotion.
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Demoted 0 global pins.
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Timing based Global Demotion completed successfully.
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Running the I/O Bank and Globals Assigner.
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Info: I/O Bank and Globals Assigner identified 18 fixed I/O macros, 32 unfixed I/O macros
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Info: I/O Bank and Globals Assigner identified bank 'Bank4' as being fixed at VCCI:2.50V VCCR:n/a
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Info: I/O Bank and Globals Assigner detected (1) out of (7) I/O Bank(s) with locked I/O technologies.
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I/O Bank and Globals Assigner completed successfully.
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Total time spent in I/O Bank and Globals Assigner: 7 seconds
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Placer V5.0 - 2025.1.0
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Design: top Started: Wed Apr 15 22:53:55 2026
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Initializing High-Effort Timing-Driven Placement ...
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Clustering ...
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Placing ...
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Improving placement ...
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CDC Report:
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Total number of CDC synchronizer driver/sink pairs : 40
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Maximum distance between CDC synchronizer driver & sink: 1 cluster(s)
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Generated the list of CDC synchronizer pairs in cdc_synchronizer.csv.
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End of placement.
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Placer Runtime Summary :
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Clustering (1 pass) : 25 seconds
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Placement : 45 seconds
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Improvement : 442 seconds
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Placer completed successfully.
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Design: top
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Finished: Wed Apr 15 23:03:17 2026
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Total CPU Time: 00:10:25 Total Elapsed Time: 00:09:22
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Total Memory Usage: 1418.0 Mbytes
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o - o - o - o - o - o
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Router
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Design: E:\AbhishekV\rising\ethernet_tpsram_test\designer\top\topStarted: Wed Apr 15 23:03:35 2026
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Router completed successfully.
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Design: E:\AbhishekV\rising\ethernet_tpsram_test\designer\top\top
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Finished: Wed Apr 15 23:04:55 2026
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Total CPU Time: 00:01:31 Total Elapsed Time: 00:01:20
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Total Memory Usage: 5363.5 Mbytes
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o - o - o - o - o - o
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Info: Iteration 1:
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Worst minimum delay slack:
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Total violating paths eligible for improvement: 0
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Total violating paths improved: 0
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Resource Usage
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+---------------------------+-------+--------+------------+
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| Type | Used | Total | Percentage |
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+---------------------------+-------+--------+------------+
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| 4LUT | 18889 | 299544 | 6.31 |
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| DFF | 8665 | 299544 | 2.89 |
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| Logic Element | 19904 | 299544 | 6.64 |
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| I/Os using I/O Registers | 0 | 512 | 0.00 |
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| I/O Register Flip-Flops | 0 | 1536 | 0.00 |
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| -- Input I/O Flip-Flops | 0 | 512 | 0.00 |
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| -- Output I/O Flip-Flops | 0 | 512 | 0.00 |
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| -- Enable I/O Flip-Flops | 0 | 512 | 0.00 |
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+---------------------------+-------+--------+------------+
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I/O Placement
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+--------+-------+------------+
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| Type | Count | Percentage |
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+--------+-------+------------+
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| Locked | 21 | 39.62% |
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| Placed | 32 | 60.38% |
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+--------+-------+------------+
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Completed writing pin report files.
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