1 line
72 KiB
XML
1 line
72 KiB
XML
<?xml version="1.0" encoding="UTF-8" standalone="no" ?><Header xmlns="http://actel.com/sweng/afi"><pdbVersion>1.9</pdbVersion><fileType>1</fileType><mapVersion>0</mapVersion><toolVersion/><toolVersionModified/><tck>0</tck><application>Libero</application><applicationModified/><design>top</design><designPrjDirectory/><inDie>PA5M300TS</inDie><inFamily>PA5M</inFamily><silicon_platform>PA5</silicon_platform><inPackage>fcg1152</inPackage><extDie>MPF300TS</extDie><extFam>PolarFire</extFam><silsig/><chksum>332E</chksum><speedGrade>-1</speedGrade><tempGrade>IND</tempGrade><ios_cfg_path>E:\AbhishekV\rising\ethernet_tpsram_test\designer\top\top_ios.cfg</ios_cfg_path><Device_Info idcode="0f8131cf" idmask="0fffffff" numOfMapCols="7344" numOfMapRows="10144" partition0="8" partition1="8" partition2="8" partition3="10" serialData="" toolInfo="" wordsPerRow="317"/><Device_BSR_Pattern BsrLength="1634">240a492492492492492492492492492492492492492492492492492492492492492492492492492492492492492492492492492492492490000000000000000000000924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924924</Device_BSR_Pattern><Device_BSR_Sample_Mask>0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000</Device_BSR_Sample_Mask><BSR_IO_States xmlns=""><IO_State xmlns="" index="0" input="1" macro_cell="" name="" number="A5" output="2" outputEnable="2"/><IO_State xmlns="" index="1" input="1" macro_cell="" name="" number="B5" output="2" outputEnable="2"/><IO_State xmlns="" index="2" input="1" macro_cell="" name="" number="C4" output="2" outputEnable="2"/><IO_State xmlns="" index="3" input="1" macro_cell="" name="" number="C3" output="2" outputEnable="2"/><IO_State xmlns="" index="4" input="1" macro_cell="" name="" number="A4" output="2" outputEnable="2"/><IO_State xmlns="" index="5" input="1" macro_cell="" name="" number="B4" output="2" outputEnable="2"/><IO_State xmlns="" index="6" input="1" macro_cell="" name="" number="B2" output="2" outputEnable="2"/><IO_State xmlns="" index="7" input="1" macro_cell="" name="" number="C2" output="2" outputEnable="2"/><IO_State xmlns="" index="8" input="1" macro_cell="" name="" number="A3" output="2" outputEnable="2"/><IO_State xmlns="" index="9" input="1" macro_cell="" name="" number="A2" output="2" outputEnable="2"/><IO_State xmlns="" index="10" input="1" macro_cell="" name="" number="B1" output="2" outputEnable="2"/><IO_State xmlns="" index="11" input="1" macro_cell="" name="" number="C1" output="2" outputEnable="2"/><IO_State xmlns="" index="12" input="1" macro_cell="" name="" number="E5" output="2" outputEnable="2"/><IO_State xmlns="" index="13" input="1" macro_cell="" name="" number="D5" output="2" outputEnable="2"/><IO_State xmlns="" index="14" input="1" macro_cell="" name="" number="D4" output="2" outputEnable="2"/><IO_State xmlns="" index="15" input="1" macro_cell="" name="" number="D3" output="2" outputEnable="2"/><IO_State xmlns="" index="16" input="1" macro_cell="" name="" number="E3" output="2" outputEnable="2"/><IO_State xmlns="" index="17" input="1" macro_cell="" name="" number="F3" output="2" outputEnable="2"/><IO_State xmlns="" index="18" input="1" macro_cell="" name="" number="E2" output="2" outputEnable="2"/><IO_State xmlns="" index="19" input="1" macro_cell="" name="" number="F2" output="2" outputEnable="2"/><IO_State xmlns="" index="20" input="1" macro_cell="" name="" number="D1" output="2" outputEnable="2"/><IO_State xmlns="" index="21" input="1" macro_cell="" name="" number="E1" output="2" outputEnable="2"/><IO_State xmlns="" index="22" input="1" macro_cell="" name="" number="F4" output="2" outputEnable="2"/><IO_State xmlns="" index="23" input="1" macro_cell="" name="" number="G4" output="2" outputEnable="2"/><IO_State xmlns="" index="24" input="1" macro_cell="" name="" number="G2" output="2" outputEnable="2"/><IO_State xmlns="" index="25" input="1" macro_cell="" name="" number="G1" output="2" outputEnable="2"/><IO_State xmlns="" index="26" input="1" macro_cell="" name="" number="H4" output="2" outputEnable="2"/><IO_State xmlns="" index="27" input="1" macro_cell="" name="" number="H3" output="2" outputEnable="2"/><IO_State xmlns="" index="28" input="1" macro_cell="" name="" number="J4" output="2" outputEnable="2"/><IO_State xmlns="" index="29" input="1" macro_cell="" name="" number="J3" output="2" outputEnable="2"/><IO_State xmlns="" index="30" input="1" macro_cell="" name="" number="H2" output="2" outputEnable="2"/><IO_State xmlns="" index="31" input="1" macro_cell="" name="" number="H1" output="2" outputEnable="2"/><IO_State xmlns="" index="32" input="1" macro_cell="" name="" number="J1" output="2" outputEnable="2"/><IO_State xmlns="" index="33" input="1" macro_cell="" name="" number="K1" output="2" outputEnable="2"/><IO_State xmlns="" index="34" input="1" macro_cell="" name="" number="K2" output="2" outputEnable="2"/><IO_State xmlns="" index="35" input="1" macro_cell="" name="" number="K3" output="2" outputEnable="2"/><IO_State xmlns="" index="36" input="1" macro_cell="" name="" number="J8" output="2" outputEnable="2"/><IO_State xmlns="" index="37" input="1" macro_cell="" name="" number="K8" output="2" outputEnable="2"/><IO_State xmlns="" index="38" input="1" macro_cell="" name="" number="L8" output="2" outputEnable="2"/><IO_State xmlns="" index="39" input="1" macro_cell="" name="" number="L7" output="2" outputEnable="2"/><IO_State xmlns="" index="40" input="1" macro_cell="" name="" number="J6" output="2" outputEnable="2"/><IO_State xmlns="" index="41" input="1" macro_cell="" name="" number="J5" output="2" outputEnable="2"/><IO_State xmlns="" index="42" input="1" macro_cell="" name="" number="M6" output="2" outputEnable="2"/><IO_State xmlns="" index="43" input="1" macro_cell="" name="" number="M5" output="2" outputEnable="2"/><IO_State xmlns="" index="44" input="1" macro_cell="" name="" number="K7" output="2" outputEnable="2"/><IO_State xmlns="" index="45" input="1" macro_cell="" name="" number="K6" output="2" outputEnable="2"/><IO_State xmlns="" index="46" input="1" macro_cell="" name="" number="K5" output="2" outputEnable="2"/><IO_State xmlns="" index="47" input="1" macro_cell="" name="" number="L5" output="2" outputEnable="2"/><IO_State xmlns="" index="48" input="1" macro_cell="" name="" number="N8" output="2" outputEnable="2"/><IO_State xmlns="" index="49" input="1" macro_cell="" name="" number="M7" output="2" outputEnable="2"/><IO_State xmlns="" index="50" input="1" macro_cell="" name="" number="P9" output="2" outputEnable="2"/><IO_State xmlns="" index="51" input="1" macro_cell="" name="" number="P8" output="2" outputEnable="2"/><IO_State xmlns="" index="52" input="1" macro_cell="" name="" number="P6" output="2" outputEnable="2"/><IO_State xmlns="" index="53" input="1" macro_cell="" name="" number="P5" output="2" outputEnable="2"/><IO_State xmlns="" index="54" input="1" macro_cell="" name="" number="N7" output="2" outputEnable="2"/><IO_State xmlns="" index="55" input="1" macro_cell="" name="" number="N6" output="2" outputEnable="2"/><IO_State xmlns="" index="56" input="1" macro_cell="" name="" number="R5" output="2" outputEnable="2"/><IO_State xmlns="" index="57" input="1" macro_cell="" name="" number="R6" output="2" outputEnable="2"/><IO_State xmlns="" index="58" input="1" macro_cell="" name="" number="R7" output="2" outputEnable="2"/><IO_State xmlns="" index="59" input="1" macro_cell="" name="" number="R8" output="2" outputEnable="2"/><IO_State xmlns="" index="60" input="1" macro_cell="" name="" number="L4" output="2" outputEnable="2"/><IO_State xmlns="" index="61" input="1" macro_cell="" name="" number="M4" output="2" outputEnable="2"/><IO_State xmlns="" index="62" input="1" macro_cell="" name="" number="N4" output="2" outputEnable="2"/><IO_State xmlns="" index="63" input="1" macro_cell="" name="" number="N3" output="2" outputEnable="2"/><IO_State xmlns="" index="64" input="1" macro_cell="" name="" number="L3" output="2" outputEnable="2"/><IO_State xmlns="" index="65" input="1" macro_cell="" name="" number="L2" output="2" outputEnable="2"/><IO_State xmlns="" index="66" input="1" macro_cell="" name="" number="P4" output="2" outputEnable="2"/><IO_State xmlns="" index="67" input="1" macro_cell="" name="" number="P3" output="2" outputEnable="2"/><IO_State xmlns="" index="68" input="1" macro_cell="" name="" number="M2" output="2" outputEnable="2"/><IO_State xmlns="" index="69" input="1" macro_cell="" name="" number="M1" output="2" outputEnable="2"/><IO_State xmlns="" index="70" input="1" macro_cell="" name="" number="N2" output="2" outputEnable="2"/><IO_State xmlns="" index="71" input="1" macro_cell="" name="" number="N1" output="2" outputEnable="2"/><IO_State xmlns="" index="72" input="1" macro_cell="" name="" number="T9" output="2" outputEnable="2"/><IO_State xmlns="" index="73" input="1" macro_cell="" name="" number="T8" output="2" outputEnable="2"/><IO_State xmlns="" index="74" input="1" macro_cell="" name="" number="T7" output="2" outputEnable="2"/><IO_State xmlns="" index="75" input="1" macro_cell="" name="" number="U7" output="2" outputEnable="2"/><IO_State xmlns="" index="76" input="1" macro_cell="" name="" number="T5" output="2" outputEnable="2"/><IO_State xmlns="" index="77" input="1" macro_cell="" name="" number="T4" output="2" outputEnable="2"/><IO_State xmlns="" index="78" input="1" macro_cell="" name="" number="U10" output="2" outputEnable="2"/><IO_State xmlns="" index="79" input="1" macro_cell="" name="" number="U9" output="2" outputEnable="2"/><IO_State xmlns="" index="80" input="1" macro_cell="ADLIB:INBUF_DIFF" name="REFCLK_P" number="U4" output="2" outputEnable="2"/><IO_State xmlns="" index="81" input="1" macro_cell="ADLIB:INBUF_DIFF" name="REFCLK_N" number="U5" output="2" outputEnable="2"/><IO_State xmlns="" index="82" input="1" macro_cell="" name="" number="U6" output="2" outputEnable="2"/><IO_State xmlns="" index="83" input="1" macro_cell="" name="" number="V6" output="2" outputEnable="2"/><IO_State xmlns="" index="84" input="1" macro_cell="" name="" number="R3" output="2" outputEnable="2"/><IO_State xmlns="" index="85" input="1" macro_cell="" name="" number="R2" output="2" outputEnable="2"/><IO_State xmlns="" index="86" input="1" macro_cell="ADLIB:INBUF_DIFF" name="RX_P" number="U2" output="2" outputEnable="2"/><IO_State xmlns="" index="87" input="1" macro_cell="ADLIB:INBUF_DIFF" name="RX_N" number="U1" output="2" outputEnable="2"/><IO_State xmlns="" index="88" input="1" macro_cell="" name="" number="P1" output="2" outputEnable="2"/><IO_State xmlns="" index="89" input="1" macro_cell="" name="" number="R1" output="2" outputEnable="2"/><IO_State xmlns="" index="90" input="1" macro_cell="ADLIB:OUTBUF_DIFF" name="TX_P" number="V1" output="2" outputEnable="2"/><IO_State xmlns="" index="91" input="1" macro_cell="ADLIB:OUTBUF_DIFF" name="TX_N" number="V2" output="2" outputEnable="2"/><IO_State xmlns="" index="92" input="1" macro_cell="" name="" number="T3" output="2" outputEnable="2"/><IO_State xmlns="" index="93" input="1" macro_cell="" name="" number="T2" output="2" outputEnable="2"/><IO_State xmlns="" index="94" input="1" macro_cell="" name="" number="V3" output="2" outputEnable="2"/><IO_State xmlns="" index="95" input="1" macro_cell="" name="" number="V4" output="2" outputEnable="2"/><IO_State xmlns="" index="96" input="1" macro_cell="" name="" number="V14" output="2" outputEnable="2"/><IO_State xmlns="" index="97" input="1" macro_cell="" name="" number="W14" output="2" outputEnable="2"/><IO_State xmlns="" index="98" input="1" macro_cell="ADLIB:OUTBUF" name="coma_mode" number="U12" output="2" outputEnable="2"/><IO_State xmlns="" index="99" input="1" macro_cell="ADLIB:OUTBUF" name="PHY_RST" number="U11" output="2" outputEnable="2"/><IO_State xmlns="" index="100" input="1" macro_cell="" name="" number="V12" output="2" outputEnable="2"/><IO_State xmlns="" index="101" input="1" macro_cell="" name="" number="V11" output="2" outputEnable="2"/><IO_State xmlns="" index="102" input="1" macro_cell="ADLIB:OUTBUF" name="PHY_MDC" number="Y12" output="2" outputEnable="2"/><IO_State xmlns="" index="103" input="1" macro_cell="ADLIB:BIBUF" name="PHY_MDIO" number="Y13" output="2" outputEnable="2"/><IO_State xmlns="" index="104" input="1" macro_cell="" name="" number="V13" output="2" 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number="D6" output="2" outputEnable="2"/><IO_State xmlns="" index="571" input="1" macro_cell="" name="" number="E6" output="2" outputEnable="2"/><IO_State xmlns="" index="572" input="1" macro_cell="" name="" number="B7" output="2" outputEnable="2"/><IO_State xmlns="" index="573" input="1" macro_cell="" name="" number="C7" output="2" outputEnable="2"/><IO_State xmlns="" index="574" input="1" macro_cell="" name="" number="F5" output="2" outputEnable="2"/><IO_State xmlns="" index="575" input="1" macro_cell="" name="" number="G5" output="2" outputEnable="2"/><IO_State xmlns="" index="576" input="1" macro_cell="" name="" number="G6" output="2" outputEnable="2"/><IO_State xmlns="" index="577" input="1" macro_cell="" name="" number="H6" output="2" outputEnable="2"/><IO_State xmlns="" index="578" input="1" macro_cell="" name="" number="F7" output="2" outputEnable="2"/><IO_State xmlns="" index="579" input="1" macro_cell="" name="" number="F8" output="2" outputEnable="2"/><IO_State xmlns="" index="580" input="1" macro_cell="" name="" number="G7" output="2" outputEnable="2"/><IO_State xmlns="" index="581" input="1" macro_cell="" name="" number="H7" output="2" outputEnable="2"/><IO_State xmlns="" index="582" input="1" macro_cell="" name="" number="H8" output="2" outputEnable="2"/><IO_State xmlns="" index="583" input="1" macro_cell="" name="" number="H9" output="2" outputEnable="2"/><IO_State xmlns="" index="584" input="1" macro_cell="" name="" number="F9" output="2" outputEnable="2"/><IO_State xmlns="" index="585" input="1" macro_cell="" name="" number="G9" output="2" outputEnable="2"/><IO_State xmlns="" index="586" input="1" macro_cell="" name="" number="G16" output="2" outputEnable="2"/><IO_State xmlns="" index="587" input="1" macro_cell="" name="" number="G15" output="2" outputEnable="2"/><IO_State xmlns="" index="588" input="1" macro_cell="" name="" number="H11" output="2" outputEnable="2"/><IO_State xmlns="" index="589" input="1" macro_cell="" name="" number="J11" output="2" outputEnable="2"/><IO_State xmlns="" index="590" input="1" macro_cell="" name="" number="G14" output="2" outputEnable="2"/><IO_State xmlns="" index="591" input="1" macro_cell="" name="" number="H14" output="2" outputEnable="2"/><IO_State xmlns="" index="592" input="1" macro_cell="" name="" number="J13" output="2" outputEnable="2"/><IO_State xmlns="" index="593" input="1" macro_cell="" name="" number="J14" output="2" outputEnable="2"/><IO_State xmlns="" index="594" input="1" macro_cell="" name="" number="H12" output="2" outputEnable="2"/><IO_State xmlns="" index="595" input="1" macro_cell="" name="" number="H13" output="2" outputEnable="2"/><IO_State xmlns="" index="596" input="1" macro_cell="" name="" number="J15" output="2" outputEnable="2"/><IO_State xmlns="" index="597" input="1" macro_cell="" name="" number="K15" output="2" outputEnable="2"/><IO_State xmlns="" afsInternal="2" bsrlength="1" index="598" input="4" macro_cell="" name="" number="L13" output="4" outputEnable="4"/><IO_State xmlns="" afsInternal="1" bsrlength="1" index="599" input="4" macro_cell="" name="" number="K13" output="4" outputEnable="4"/><IO_State xmlns="" afsInternal="2" bsrlength="1" index="600" input="4" macro_cell="" name="" number="L12" output="4" outputEnable="4"/><IO_State xmlns="" afsInternal="2" bsrlength="1" index="601" input="4" macro_cell="" name="" number="K12" output="4" outputEnable="4"/><IO_State xmlns="" afsInternal="2" bsrlength="2" index="602" input="4" macro_cell="" name="" number="K10" output="4" outputEnable="4"/><IO_State xmlns="" index="603" input="1" macro_cell="" name="" number="M14" output="2" outputEnable="2"/><IO_State xmlns="" index="604" input="1" macro_cell="" name="" number="L14" output="2" outputEnable="2"/></BSR_IO_States><bitstream_digest>0000000000000000000000000000000000000000000000000000000000000000</bitstream_digest><pgm1vMode>0</pgm1vMode><clusterStart>0</clusterStart><clusterEnd>0</clusterEnd><clusterCustom>0</clusterCustom><verify_fabric>1</verify_fabric><verify_envm0>0</verify_envm0><verify_envm1>0</verify_envm1><verify_security>0</verify_security><need_verify_bitstream>0</need_verify_bitstream><erase_fabric>0</erase_fabric><erase_security>0</erase_security><erase_envm>0</erase_envm><design_version>0</design_version><bitstream_pgmtype>Undef</bitstream_pgmtype><hsm_protocol>0</hsm_protocol><hsm_unique_key_types/><generate_cofc>0</generate_cofc><dump_digest_only>0</dump_digest_only><use_otp_protocol>0</use_otp_protocol><use_ecdh_protocol>0</use_ecdh_protocol><bEnvmFirstPageZeros>0</bEnvmFirstPageZeros><numOfFrames>0</numOfFrames><numOfFramesErase>0</numOfFramesErase><dataSize>0</dataSize><dataEraseSize>0</dataEraseSize><dataVerifySize>0</dataVerifySize><dataUserPufSize>0</dataUserPufSize><dataEnvmSize>0</dataEnvmSize><dataEnvmVerifySize>0</dataEnvmVerifySize><dataSerSize>0</dataSerSize><dataSerVerSize>0</dataSerVerSize><serialClient>0</serialClient><serialClient1>0</serialClient1><numOfSerialDevies>0</numOfSerialDevies><nonSerialClient>0</nonSerialClient><nonSerialClient1>0</nonSerialClient1><dataSerVerStartIndex>0</dataSerVerStartIndex><dataStartIndex>0</dataStartIndex><dataEraseStartIndex>0</dataEraseStartIndex><dataVerifyStartIndex>0</dataVerifyStartIndex><dataEnvmStartIndex>0</dataEnvmStartIndex><dataEnvmVerifyStartIndex>0</dataEnvmVerifyStartIndex><dataUserPufStartIndex>0</dataUserPufStartIndex><numOfComponents>0</numOfComponents><action>PROGRAM</action><g5_auto_update_enabled>0</g5_auto_update_enabled><verify_snvm>0</verify_snvm><program_fabric>true</program_fabric><program_snvm>true</program_snvm><bts_sanitize_snvm>false</bts_sanitize_snvm><security_available>false</security_available><fabric_available>true</fabric_available><snvm_available>true</snvm_available><envm0_available>false</envm0_available><erase_snvm>0</erase_snvm><export_folder>E:\AbhishekV\rising\ethernet_tpsram_test\designer\top</export_folder><file_name>top</file_name><include_bitstream>true</include_bitstream><stp_file>false</stp_file><dat_file>false</dat_file><hex_file>false</hex_file><spi_file>false</spi_file><svf_file>false</svf_file><chain_stp_file>false</chain_stp_file><ppd_file>true</ppd_file><limit_file_size>false</limit_file_size><likenew_action>false</likenew_action><recoverable_action>false</recoverable_action><unrecoverable_action>false</unrecoverable_action><target_programming_solution_for_serialization>FLASHPRO_3_4_5</target_programming_solution_for_serialization><stapl_file_type_for_serialization>SINGLE</stapl_file_type_for_serialization><file_fabric>true</file_fabric><file_snvm>true</file_snvm><file_envm>false</file_envm><master_security>false</master_security><master_fabric>false</master_fabric><master_snvm>false</master_snvm><master_envm>false</master_envm><encrypted_fabric_uek1>false</encrypted_fabric_uek1><encrypted_snvm_uek1>false</encrypted_snvm_uek1><encrypted_envm_uek1>false</encrypted_envm_uek1><encrypted_fabric_uek2>false</encrypted_fabric_uek2><encrypted_snvm_uek2>false</encrypted_snvm_uek2><encrypted_envm_uek2>false</encrypted_envm_uek2><master_backlevel_bypass>false</master_backlevel_bypass><uek1_backlevel_bypass>false</uek1_backlevel_bypass><uek2_backlevel_bypass>false</uek2_backlevel_bypass><sanitize_envm>false</sanitize_envm><sanitize_snvm>false</sanitize_snvm><include_spi_flash>false</include_spi_flash><passkey_plaintext_master>false</passkey_plaintext_master><passkey_plaintext_uek1>false</passkey_plaintext_uek1><passkey_plaintext_uek2>false</passkey_plaintext_uek2><bits_options_default_master>0</bits_options_default_master><bits_options_uek1>0</bits_options_uek1><bits_options_uek2>0</bits_options_uek2><high_water_mark_uek1/><high_water_mark_uek2/><spi_flash_action>PROGRAM_SPI_IMAGE</spi_flash_action><back_level_version/><smk_exists>0</smk_exists><initialize_smk>0</initialize_smk><jtag_locked>0</jtag_locked></Header> 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