Files
Ethernet-IP-Core/designer/top/clocklist.txt

12 lines
1.2 KiB
Plaintext

"PF_CCC_0_0/PF_CCC_0_0/pll_inst_0:OUT0",,"PF_CCC_0_0/PF_CCC_0_0/pll_inst_0:OUT0","PF_CCC_0_0/PF_CCC_0_0/pll_inst_0:OUT0"
"PF_IOD_CDR_C0_0/PF_LANECTRL_0/I_LANECTRL:CDR_CLK",,"PF_IOD_CDR_C0_0/PF_LANECTRL_0/I_LANECTRL:CDR_CLK","PF_IOD_CDR_C0_0/PF_LANECTRL_0/I_LANECTRL:CDR_CLK"
"PF_IOD_CDR_CCC_C0_0/PF_CCC_0/pll_inst_0:OUT0",,"PF_IOD_CDR_CCC_C0_0/PF_CCC_0/pll_inst_0:OUT0","PF_IOD_CDR_CCC_C0_0/PF_CCC_0/pll_inst_0:OUT0"
"PF_IOD_CDR_CCC_C0_0/PF_CCC_0/pll_inst_0:OUT1",,"PF_IOD_CDR_CCC_C0_0/PF_CCC_0/pll_inst_0:OUT1","PF_IOD_CDR_CCC_C0_0/PF_CCC_0/pll_inst_0:OUT1"
"PF_IOD_CDR_CCC_C0_0/PF_CCC_0/pll_inst_0:OUT2",,"PF_IOD_CDR_CCC_C0_0/PF_CCC_0/pll_inst_0:OUT2","PF_IOD_CDR_CCC_C0_0/PF_CCC_0/pll_inst_0:OUT2"
"PF_IOD_CDR_CCC_C0_0/PF_CCC_0/pll_inst_0:OUT3",,"PF_IOD_CDR_CCC_C0_0/PF_CCC_0/pll_inst_0:OUT3","PF_IOD_CDR_CCC_C0_0/PF_CCC_0/pll_inst_0:OUT3"
"PF_IOD_CDR_CCC_C0_0/PF_CLK_DIV_0/I_CD:Y_DIV",,"PF_IOD_CDR_CCC_C0_0/PF_CLK_DIV_0/I_CD:Y_DIV","PF_IOD_CDR_CCC_C0_0/PF_CLK_DIV_0/I_CD:Y_DIV"
"PF_IOD_CDR_CCC_C0_0/PF_COREDELAYCODE_TIP_0/move_lane:Q",,"PF_IOD_CDR_CCC_C0_0/PF_COREDELAYCODE_TIP_0/move_lane:Q","PF_IOD_CDR_CCC_C0_0/PF_COREDELAYCODE_TIP_0/move_lane:Q"
"REFCLK_P",,"REFCLK_P","REFCLK_P"
"REF_CLK_0",,"REF_CLK_0","REF_CLK_0"
"TCK",,"TCK","TCK"