// // Written by Synplify Pro // Product Version "V-2023.09M-5" // Program "Synplify Pro", Mapper "map202309act, Build 395R" // Fri Apr 17 08:35:55 2026 // // Source file index table: // Object locations will have the form : // file 0 "\e:\microchip\libero_soc_2025.1\libero_soc\synplify_pro\lib\generic\acg5.v " // file 1 "\e:\microchip\libero_soc_2025.1\libero_soc\synplify_pro\lib\vlog\hypermods.v " // file 2 "\e:\microchip\libero_soc_2025.1\libero_soc\synplify_pro\lib\vlog\scemi_objects.v " // file 3 "\e:\microchip\libero_soc_2025.1\libero_soc\synplify_pro\lib\vlog\scemi_pipes.svh " // file 4 "\e:\abhishekv\rising\ethernet_tpsram_test\component\syn_comps.v " // file 5 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\corefifo_c0\corefifo_c0_0\rtl\vlog\core\corefifo_graytobinconv.v " // file 6 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\corefifo_c0\corefifo_c0_0\rtl\vlog\core\corefifo_nstagessync.v " // file 7 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\corefifo_c0\corefifo_c0_0\rtl\vlog\core\corefifo_async.v " // file 8 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\corefifo_c0\corefifo_c0_0\rtl\vlog\core\corefifo_sync.v " // file 9 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\corefifo_c0\corefifo_c0_0\rtl\vlog\core\corefifo_fwft.v " // file 10 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\corefifo_c0\corefifo_c0_0\rtl\vlog\core\corefifo_sync_scntr.v " // file 11 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\corefifo_c0\corefifo_c0_0\rtl\vlog\core\corefifo_c0_corefifo_c0_0_lsram_top.v " // file 12 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\corefifo_c0\corefifo_c0_0\rtl\vlog\core\corefifo_c0_corefifo_c0_0_ram_wrapper.v " // file 13 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\corefifo_c0\corefifo_c0_0\rtl\vlog\core\corefifo.v " // file 14 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\corefifo_c0\corefifo_c0.v " // file 15 "\e:\abhishekv\rising\ethernet_tpsram_test\component\actel\directcore\corejtagdebug\4.0.100\core\corejtagdebug_bufd.v " // file 16 "\e:\abhishekv\rising\ethernet_tpsram_test\component\actel\directcore\corejtagdebug\4.0.100\core\corejtagdebug_uj_jtag.v " // file 17 "\e:\abhishekv\rising\ethernet_tpsram_test\component\actel\directcore\corejtagdebug\4.0.100\core\corejtagdebug_ujtag_wrapper.v " // file 18 "\e:\abhishekv\rising\ethernet_tpsram_test\component\actel\directcore\corejtagdebug\4.0.100\core\corejtagdebug.v " // file 19 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\corejtagdebug_c0\corejtagdebug_c0.v " // file 20 "\e:\abhishekv\rising\ethernet_tpsram_test\component\actel\directcore\corespi\5.2.104\rtl\vlog\core\spi_clockmux.v " // file 21 "\e:\abhishekv\rising\ethernet_tpsram_test\component\actel\directcore\corespi\5.2.104\rtl\vlog\core\spi_chanctrl.v " // file 22 "\e:\abhishekv\rising\ethernet_tpsram_test\component\actel\directcore\corespi\5.2.104\rtl\vlog\core\spi_fifo.v " // file 23 "\e:\abhishekv\rising\ethernet_tpsram_test\component\actel\directcore\corespi\5.2.104\rtl\vlog\core\spi_rf.v " // file 24 "\e:\abhishekv\rising\ethernet_tpsram_test\component\actel\directcore\corespi\5.2.104\rtl\vlog\core\spi_control.v " // file 25 "\e:\abhishekv\rising\ethernet_tpsram_test\component\actel\directcore\corespi\5.2.104\rtl\vlog\core\spi.v " // file 26 "\e:\abhishekv\rising\ethernet_tpsram_test\component\actel\directcore\corespi\5.2.104\rtl\vlog\core\corespi.v " // file 27 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\corespi_0\corespi_0.v " // file 28 "\e:\abhishekv\rising\ethernet_tpsram_test\component\actel\directcore\coretse\4.0.124\rtl\vlog\core_evaluation\coretse.v " // file 29 "\e:\abhishekv\rising\ethernet_tpsram_test\component\actel\directcore\coretse\4.0.124\rtl\vlog\core_evaluation\include.v " // file 30 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\coretse_0\coretse_0.v " // file 31 "\e:\abhishekv\rising\ethernet_tpsram_test\component\actel\directcore\coreapb3\4.2.100\rtl\vlog\core\coreapb3_muxptob3.v " // file 32 "\e:\abhishekv\rising\ethernet_tpsram_test\component\actel\directcore\coreapb3\4.2.100\rtl\vlog\core\coreapb3_iaddr_reg.v " // file 33 "\e:\abhishekv\rising\ethernet_tpsram_test\component\actel\directcore\coreapb3\4.2.100\rtl\vlog\core\coreapb3.v " // file 34 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\coreapb3_0\coreapb3_0.v " // file 35 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\coreuartapb_0\coreuartapb_0_0\rtl\vlog\core\clock_gen.v " // file 36 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\coreuartapb_0\coreuartapb_0_0\rtl\vlog\core\rx_async.v " // file 37 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\coreuartapb_0\coreuartapb_0_0\rtl\vlog\core\tx_async.v " // file 38 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\coreuartapb_0\coreuartapb_0_0\rtl\vlog\core\fifo_256x8_g5.v " // file 39 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\coreuartapb_0\coreuartapb_0_0\rtl\vlog\core\coreuart.v " // file 40 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\coreuartapb_0\coreuartapb_0_0\rtl\vlog\core\coreuartapb.v " // file 41 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\coreuartapb_0\coreuartapb_0.v " // file 42 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\core_reset_pf\core_reset_pf_0\core\corereset_pf.v " // file 43 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\core_reset_pf\core_reset_pf.v " // file 44 "\e:\abhishekv\rising\ethernet_tpsram_test\component\microsemi\miv\miv_rv32\3.1.200\pkg\miv_rv32_hart_cfg_pkg.v " // file 45 "\e:\abhishekv\rising\ethernet_tpsram_test\component\microsemi\miv\miv_rv32\3.1.200\pkg\miv_rv32_pkg.v " // file 46 "\e:\abhishekv\rising\ethernet_tpsram_test\component\microsemi\miv\miv_rv32\3.1.200\hart_merged\miv_rv32_hart_merged.v " // file 47 "\e:\abhishekv\rising\ethernet_tpsram_test\component\microsemi\miv\miv_rv32\3.1.200\pkg\miv_rv32_subsys_pkg.v " // file 48 "\e:\abhishekv\rising\ethernet_tpsram_test\component\microsemi\miv\miv_rv32\3.1.200\subsys_merged\miv_rv32_subsys_merged.v " // file 49 "\e:\abhishekv\rising\ethernet_tpsram_test\component\microsemi\miv\miv_rv32\3.1.200\memory\miv_rv32_ram_singleport_lp.v " // file 50 "\e:\abhishekv\rising\ethernet_tpsram_test\component\microsemi\miv\miv_rv32\3.1.200\memory\miv_rv32_ram_singleport_lp_ecc.v " // file 51 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\miv_rv32_c0\miv_rv32_c0_0\rtl\miv_rv32.v " // file 52 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\miv_rv32_c0\miv_rv32_c0.v " // file 53 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\pf_ccc_0\pf_ccc_0_0\pf_ccc_0_pf_ccc_0_0_pf_ccc.v " // file 54 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\pf_ccc_0\pf_ccc_0.v " // file 55 "\e:\abhishekv\rising\ethernet_tpsram_test\component\actel\directcore\corecdr4_cntl_tip\2.0.100\rtl\vlog\core\corecdr4_cntl_tip.v " // file 56 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\pf_iod_cdr_c0\pf_iod_cdr_lanectrl_overlay_0\pf_iod_cdr_c0_pf_iod_cdr_lanectrl_overlay_0_pf_iod.v " // file 57 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\pf_iod_cdr_c0\pf_iod_cdr_rx_n_0\pf_iod_cdr_c0_pf_iod_cdr_rx_n_0_pf_iod.v " // file 58 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\pf_iod_cdr_c0\pf_iod_cdr_rx_p_0\pf_iod_cdr_c0_pf_iod_cdr_rx_p_0_pf_iod.v " // file 59 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\pf_iod_cdr_c0\pf_iod_cdr_tx_0\pf_iod_cdr_c0_pf_iod_cdr_tx_0_pf_iod.v " // file 60 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\pf_iod_cdr_c0\pf_lanectrl_0\pf_lanectrl_pause_sync.v " // file 61 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\pf_iod_cdr_c0\pf_lanectrl_0\pf_iod_cdr_c0_pf_lanectrl_0_pf_lanectrl.v " // file 62 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\pf_iod_cdr_c0\pf_iod_cdr_c0.v " // file 63 "\e:\abhishekv\rising\ethernet_tpsram_test\component\actel\directcore\coredelaycode_tip\2.1.100\rtl\vlog\core\coredelaycode_tip.v " // file 64 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\pf_iod_cdr_ccc_c0\pf_ccc_0\pf_iod_cdr_ccc_c0_pf_ccc_0_pf_ccc.v " // file 65 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\pf_iod_cdr_ccc_c0\pf_clk_div_0\pf_iod_cdr_ccc_c0_pf_clk_div_0_pf_clk_div.v " // file 66 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\pf_iod_cdr_ccc_c0\pf_lanectrl_core_reader_0\pf_lanectrl_pause_sync.v " // file 67 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\pf_iod_cdr_ccc_c0\pf_lanectrl_core_reader_0\pf_iod_cdr_ccc_c0_pf_lanectrl_core_reader_0_pf_lanectrl.v " // file 68 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\pf_iod_cdr_ccc_c0\pf_iod_cdr_ccc_c0.v " // file 69 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\pf_tpsram_c0\pf_tpsram_c0_0\pf_tpsram_c0_pf_tpsram_c0_0_pf_tpsram.v " // file 70 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\pf_tpsram_c0\pf_tpsram_c0.v " // file 71 "\e:\abhishekv\rising\ethernet_tpsram_test\hdl\ssdetect.v " // file 72 "\e:\abhishekv\rising\ethernet_tpsram_test\hdl\fifo_to_tpsram_bridge.v " // file 73 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\pf_init_monitor_0\pf_init_monitor_0_0\pf_init_monitor_0_pf_init_monitor_0_0_pf_init_monitor.v " // file 74 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\pf_init_monitor_0\pf_init_monitor_0.v " // file 75 "\e:\abhishekv\rising\ethernet_tpsram_test\component\work\top\top.v " // file 76 "\e:\microchip\libero_soc_2025.1\libero_soc\synplify_pro\lib\nlconst.dat " // file 77 "\e:\abhishekv\rising\ethernet_tpsram_test\designer\top\synthesis.fdc " // file 78 "\e:/abhishekv/rising/ethernet_tpsram_test/designer/top/synthesis.fdc " `timescale 100 ps/100 ps module Core_reset_pf_Core_reset_pf_0_CORERESET_PF ( un1_PLL_POWERDOWN_B_i_1z, pf_init_monitor_0_0_FABRIC_POR_N, PF_CCC_0_0_PLL_LOCK_0, RESET_N_c, pf_init_monitor_0_0_BANK_6_VDDI_STATUS, pf_init_monitor_0_0_DEVICE_INIT_DONE, dff, PF_CCC_0_0_OUT0_FABCLK_0 ) ; output un1_PLL_POWERDOWN_B_i_1z ; input pf_init_monitor_0_0_FABRIC_POR_N ; input PF_CCC_0_0_PLL_LOCK_0 ; input RESET_N_c ; input pf_init_monitor_0_0_BANK_6_VDDI_STATUS ; input pf_init_monitor_0_0_DEVICE_INIT_DONE ; output dff ; input PF_CCC_0_0_OUT0_FABCLK_0 ; wire un1_PLL_POWERDOWN_B_i_1z ; wire pf_init_monitor_0_0_FABRIC_POR_N ; wire PF_CCC_0_0_PLL_LOCK_0 ; wire RESET_N_c ; wire pf_init_monitor_0_0_BANK_6_VDDI_STATUS ; wire pf_init_monitor_0_0_DEVICE_INIT_DONE ; wire dff ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire [0:0] dff_8_Z; wire [0:0] dff_7_Z; wire [0:0] dff_6_Z; wire [0:0] dff_5_Z; wire [0:0] dff_4_Z; wire [0:0] dff_3_Z; wire [0:0] dff_2_Z; wire [0:0] dff_1_Z; wire [0:0] dff_0_Z; wire [0:0] dff_14_Z; wire [0:0] dff_13_Z; wire [0:0] dff_12_Z; wire [0:0] dff_11_Z; wire [0:0] dff_10_Z; wire [0:0] dff_9_Z; wire VCC ; wire un1_INTERNAL_RST_i ; wire GND ; // @42:58 SLE \dff_8[0] ( .Q(dff_8_Z[0]), .ADn(VCC), .ALn(un1_INTERNAL_RST_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dff_7_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @42:58 SLE \dff_7[0] ( .Q(dff_7_Z[0]), .ADn(VCC), .ALn(un1_INTERNAL_RST_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dff_6_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @42:58 SLE \dff_6[0] ( .Q(dff_6_Z[0]), .ADn(VCC), .ALn(un1_INTERNAL_RST_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dff_5_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @42:58 SLE \dff_5[0] ( .Q(dff_5_Z[0]), .ADn(VCC), .ALn(un1_INTERNAL_RST_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dff_4_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @42:58 SLE \dff_4[0] ( .Q(dff_4_Z[0]), .ADn(VCC), .ALn(un1_INTERNAL_RST_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dff_3_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @42:58 SLE \dff_3[0] ( .Q(dff_3_Z[0]), .ADn(VCC), .ALn(un1_INTERNAL_RST_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dff_2_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @42:58 SLE \dff_2[0] ( .Q(dff_2_Z[0]), .ADn(VCC), .ALn(un1_INTERNAL_RST_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dff_1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @42:58 SLE \dff_1[0] ( .Q(dff_1_Z[0]), .ADn(VCC), .ALn(un1_INTERNAL_RST_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dff_0_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @42:58 SLE \dff_0[0] ( .Q(dff_0_Z[0]), .ADn(VCC), .ALn(un1_INTERNAL_RST_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @42:58 SLE \dff_15[0] ( .Q(dff), .ADn(VCC), .ALn(un1_INTERNAL_RST_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dff_14_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @42:58 SLE \dff_14[0] ( .Q(dff_14_Z[0]), .ADn(VCC), .ALn(un1_INTERNAL_RST_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dff_13_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @42:58 SLE \dff_13[0] ( .Q(dff_13_Z[0]), .ADn(VCC), .ALn(un1_INTERNAL_RST_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dff_12_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @42:58 SLE \dff_12[0] ( .Q(dff_12_Z[0]), .ADn(VCC), .ALn(un1_INTERNAL_RST_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dff_11_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @42:58 SLE \dff_11[0] ( .Q(dff_11_Z[0]), .ADn(VCC), .ALn(un1_INTERNAL_RST_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dff_10_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @42:58 SLE \dff_10[0] ( .Q(dff_10_Z[0]), .ADn(VCC), .ALn(un1_INTERNAL_RST_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dff_9_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @42:58 SLE \dff_9[0] ( .Q(dff_9_Z[0]), .ADn(VCC), .ALn(un1_INTERNAL_RST_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dff_8_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @42:53 CFG4 un1_D ( .A(pf_init_monitor_0_0_DEVICE_INIT_DONE), .B(pf_init_monitor_0_0_BANK_6_VDDI_STATUS), .C(RESET_N_c), .D(PF_CCC_0_0_PLL_LOCK_0), .Y(un1_INTERNAL_RST_i) ); defparam un1_D.INIT=16'h8000; // @53:39 CFG2 un1_PLL_POWERDOWN_B_i ( .A(pf_init_monitor_0_0_BANK_6_VDDI_STATUS), .B(pf_init_monitor_0_0_FABRIC_POR_N), .Y(un1_PLL_POWERDOWN_B_i_1z) ); defparam un1_PLL_POWERDOWN_B_i.INIT=4'h8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* Core_reset_pf_Core_reset_pf_0_CORERESET_PF */ module Core_reset_pf ( PF_CCC_0_0_OUT0_FABCLK_0, dff, pf_init_monitor_0_0_DEVICE_INIT_DONE, pf_init_monitor_0_0_BANK_6_VDDI_STATUS, RESET_N_c, PF_CCC_0_0_PLL_LOCK_0, pf_init_monitor_0_0_FABRIC_POR_N, un1_PLL_POWERDOWN_B_i ) ; input PF_CCC_0_0_OUT0_FABCLK_0 ; output dff ; input pf_init_monitor_0_0_DEVICE_INIT_DONE ; input pf_init_monitor_0_0_BANK_6_VDDI_STATUS ; input RESET_N_c ; input PF_CCC_0_0_PLL_LOCK_0 ; input pf_init_monitor_0_0_FABRIC_POR_N ; output un1_PLL_POWERDOWN_B_i ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire dff ; wire pf_init_monitor_0_0_DEVICE_INIT_DONE ; wire pf_init_monitor_0_0_BANK_6_VDDI_STATUS ; wire RESET_N_c ; wire PF_CCC_0_0_PLL_LOCK_0 ; wire pf_init_monitor_0_0_FABRIC_POR_N ; wire un1_PLL_POWERDOWN_B_i ; wire GND ; wire VCC ; // @43:81 Core_reset_pf_Core_reset_pf_0_CORERESET_PF Core_reset_pf_0 ( .un1_PLL_POWERDOWN_B_i_1z(un1_PLL_POWERDOWN_B_i), .pf_init_monitor_0_0_FABRIC_POR_N(pf_init_monitor_0_0_FABRIC_POR_N), .PF_CCC_0_0_PLL_LOCK_0(PF_CCC_0_0_PLL_LOCK_0), .RESET_N_c(RESET_N_c), .pf_init_monitor_0_0_BANK_6_VDDI_STATUS(pf_init_monitor_0_0_BANK_6_VDDI_STATUS), .pf_init_monitor_0_0_DEVICE_INIT_DONE(pf_init_monitor_0_0_DEVICE_INIT_DONE), .dff(dff), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* Core_reset_pf */ (* PSEL_SL16="5'b10000" , PSEL_SL15="5'b01111" , PSEL_SL14="5'b01110" , PSEL_SL13="5'b01101" , PSEL_SL12="5'b01100" , PSEL_SL11="5'b01011" , PSEL_SL10="5'b01010" , PSEL_SL9="5'b01001" , PSEL_SL8="5'b01000" , PSEL_SL7="5'b00111" , PSEL_SL6="5'b00110" , PSEL_SL5="5'b00101" , PSEL_SL4="5'b00100" , PSEL_SL3="5'b00011" , PSEL_SL2="5'b00010" , PSEL_SL1="5'b00001" , PSEL_SL0="5'b00000" *)module COREAPB3_MUXPTOB3 ( PRDATA_0_iv_0, CoreAPB3_0_0_APBmslave2_PRDATA, CoreAPB3_0_0_APBmslave1_PRDATA, apb_pslverr_net, un1_Ii0O1, Oi0O1, CoreAPB3_0_0_APBmslave0_PWRITE, iPRDATA_0_sqmuxa_1z, CoreAPB3_0_0_APBmslave0_PSELx, iPRDATA28_1z, CoreAPB3_0_0_APBmslave2_PSELx, CoreAPB3_0_0_APBmslave1_PSELx ) ; output [7:0] PRDATA_0_iv_0 ; input [7:0] CoreAPB3_0_0_APBmslave2_PRDATA ; input [7:0] CoreAPB3_0_0_APBmslave1_PRDATA ; output apb_pslverr_net ; input un1_Ii0O1 ; input Oi0O1 ; input CoreAPB3_0_0_APBmslave0_PWRITE ; output iPRDATA_0_sqmuxa_1z ; input CoreAPB3_0_0_APBmslave0_PSELx ; output iPRDATA28_1z ; input CoreAPB3_0_0_APBmslave2_PSELx ; input CoreAPB3_0_0_APBmslave1_PSELx ; wire apb_pslverr_net ; wire un1_Ii0O1 ; wire Oi0O1 ; wire CoreAPB3_0_0_APBmslave0_PWRITE ; wire iPRDATA_0_sqmuxa_1z ; wire CoreAPB3_0_0_APBmslave0_PSELx ; wire iPRDATA28_1z ; wire CoreAPB3_0_0_APBmslave2_PSELx ; wire CoreAPB3_0_0_APBmslave1_PSELx ; wire iPRDATA27_Z ; wire GND ; wire VCC ; // @31:95 CFG2 iPRDATA27 ( .A(CoreAPB3_0_0_APBmslave1_PSELx), .B(CoreAPB3_0_0_APBmslave2_PSELx), .Y(iPRDATA27_Z) ); defparam iPRDATA27.INIT=4'h2; // @31:96 CFG2 iPRDATA28 ( .A(CoreAPB3_0_0_APBmslave1_PSELx), .B(CoreAPB3_0_0_APBmslave2_PSELx), .Y(iPRDATA28_1z) ); defparam iPRDATA28.INIT=4'h4; // @31:91 CFG3 iPRDATA_0_sqmuxa ( .A(CoreAPB3_0_0_APBmslave1_PSELx), .B(CoreAPB3_0_0_APBmslave2_PSELx), .C(CoreAPB3_0_0_APBmslave0_PSELx), .Y(iPRDATA_0_sqmuxa_1z) ); defparam iPRDATA_0_sqmuxa.INIT=8'h10; // @31:89 CFG4 \PRDATA_0_iv_0_cZ[3] ( .A(iPRDATA27_Z), .B(CoreAPB3_0_0_APBmslave1_PRDATA[3]), .C(CoreAPB3_0_0_APBmslave2_PRDATA[3]), .D(iPRDATA28_1z), .Y(PRDATA_0_iv_0[3]) ); defparam \PRDATA_0_iv_0_cZ[3] .INIT=16'hF888; // @31:89 CFG4 \PRDATA_0_iv_0_cZ[1] ( .A(iPRDATA27_Z), .B(CoreAPB3_0_0_APBmslave1_PRDATA[1]), .C(CoreAPB3_0_0_APBmslave2_PRDATA[1]), .D(iPRDATA28_1z), .Y(PRDATA_0_iv_0[1]) ); defparam \PRDATA_0_iv_0_cZ[1] .INIT=16'hF888; // @31:89 CFG4 \PRDATA_0_iv_0_cZ[0] ( .A(iPRDATA27_Z), .B(CoreAPB3_0_0_APBmslave1_PRDATA[0]), .C(CoreAPB3_0_0_APBmslave2_PRDATA[0]), .D(iPRDATA28_1z), .Y(PRDATA_0_iv_0[0]) ); defparam \PRDATA_0_iv_0_cZ[0] .INIT=16'hF888; // @31:89 CFG4 \PRDATA_0_iv_0_cZ[4] ( .A(iPRDATA27_Z), .B(CoreAPB3_0_0_APBmslave1_PRDATA[4]), .C(CoreAPB3_0_0_APBmslave2_PRDATA[4]), .D(iPRDATA28_1z), .Y(PRDATA_0_iv_0[4]) ); defparam \PRDATA_0_iv_0_cZ[4] .INIT=16'hF888; // @31:89 CFG4 \PRDATA_0_iv_0_cZ[2] ( .A(iPRDATA27_Z), .B(CoreAPB3_0_0_APBmslave1_PRDATA[2]), .C(CoreAPB3_0_0_APBmslave2_PRDATA[2]), .D(iPRDATA28_1z), .Y(PRDATA_0_iv_0[2]) ); defparam \PRDATA_0_iv_0_cZ[2] .INIT=16'hF888; // @31:89 CFG4 \PRDATA_0_iv_0_cZ[6] ( .A(iPRDATA27_Z), .B(CoreAPB3_0_0_APBmslave1_PRDATA[6]), .C(CoreAPB3_0_0_APBmslave2_PRDATA[6]), .D(iPRDATA28_1z), .Y(PRDATA_0_iv_0[6]) ); defparam \PRDATA_0_iv_0_cZ[6] .INIT=16'hF888; // @31:89 CFG4 \PRDATA_0_iv_0_cZ[5] ( .A(iPRDATA27_Z), .B(CoreAPB3_0_0_APBmslave1_PRDATA[5]), .C(CoreAPB3_0_0_APBmslave2_PRDATA[5]), .D(iPRDATA28_1z), .Y(PRDATA_0_iv_0[5]) ); defparam \PRDATA_0_iv_0_cZ[5] .INIT=16'hF888; // @31:89 CFG4 \PRDATA_0_iv_0_cZ[7] ( .A(iPRDATA27_Z), .B(CoreAPB3_0_0_APBmslave1_PRDATA[7]), .C(CoreAPB3_0_0_APBmslave2_PRDATA[7]), .D(iPRDATA28_1z), .Y(PRDATA_0_iv_0[7]) ); defparam \PRDATA_0_iv_0_cZ[7] .INIT=16'hF888; // @31:91 CFG4 iPRDATA_0_sqmuxa_RNI3FK6K ( .A(iPRDATA_0_sqmuxa_1z), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .C(Oi0O1), .D(un1_Ii0O1), .Y(apb_pslverr_net) ); defparam iPRDATA_0_sqmuxa_RNI3FK6K.INIT=16'h0200; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* COREAPB3_MUXPTOB3 */ module CoreAPB3_Z1 ( CoreAPB3_0_0_APBmslave1_PRDATA, CoreAPB3_0_0_APBmslave2_PRDATA, PRDATA_0_iv_0, CoreAPB3_0_0_APBmslave0_PADDR, iPRDATA28, iPRDATA_0_sqmuxa, CoreAPB3_0_0_APBmslave0_PWRITE, Oi0O1, un1_Ii0O1, apb_pslverr_net, CoreAPB3_0_0_APBmslave0_PSELx, CoreAPB3_0_0_APBmslave1_PSELx, CoreAPB3_0_0_APBmslave2_PSELx, MIV_RV32_C0_0_APB_INITIATOR_PSELx ) ; input [7:0] CoreAPB3_0_0_APBmslave1_PRDATA ; input [7:0] CoreAPB3_0_0_APBmslave2_PRDATA ; output [7:0] PRDATA_0_iv_0 ; input [27:24] CoreAPB3_0_0_APBmslave0_PADDR ; output iPRDATA28 ; output iPRDATA_0_sqmuxa ; input CoreAPB3_0_0_APBmslave0_PWRITE ; input Oi0O1 ; input un1_Ii0O1 ; output apb_pslverr_net ; output CoreAPB3_0_0_APBmslave0_PSELx ; output CoreAPB3_0_0_APBmslave1_PSELx ; output CoreAPB3_0_0_APBmslave2_PSELx ; input MIV_RV32_C0_0_APB_INITIATOR_PSELx ; wire iPRDATA28 ; wire iPRDATA_0_sqmuxa ; wire CoreAPB3_0_0_APBmslave0_PWRITE ; wire Oi0O1 ; wire un1_Ii0O1 ; wire apb_pslverr_net ; wire CoreAPB3_0_0_APBmslave0_PSELx ; wire CoreAPB3_0_0_APBmslave1_PSELx ; wire CoreAPB3_0_0_APBmslave2_PSELx ; wire MIV_RV32_C0_0_APB_INITIATOR_PSELx ; wire iPSELS_raw_2_adflt_Z ; wire GND ; wire VCC ; // @33:267 CFG2 iPSELS_raw_2_adflt ( .A(CoreAPB3_0_0_APBmslave0_PADDR[26]), .B(CoreAPB3_0_0_APBmslave0_PADDR[27]), .Y(iPSELS_raw_2_adflt_Z) ); defparam iPSELS_raw_2_adflt.INIT=4'h1; // @33:265 CFG4 \iPSELS[2] ( .A(iPSELS_raw_2_adflt_Z), .B(MIV_RV32_C0_0_APB_INITIATOR_PSELx), .C(CoreAPB3_0_0_APBmslave0_PADDR[25]), .D(CoreAPB3_0_0_APBmslave0_PADDR[24]), .Y(CoreAPB3_0_0_APBmslave2_PSELx) ); defparam \iPSELS[2] .INIT=16'h0080; // @33:265 CFG4 \iPSELS[1] ( .A(iPSELS_raw_2_adflt_Z), .B(MIV_RV32_C0_0_APB_INITIATOR_PSELx), .C(CoreAPB3_0_0_APBmslave0_PADDR[25]), .D(CoreAPB3_0_0_APBmslave0_PADDR[24]), .Y(CoreAPB3_0_0_APBmslave1_PSELx) ); defparam \iPSELS[1] .INIT=16'h0800; // @33:265 CFG4 \iPSELS[0] ( .A(iPSELS_raw_2_adflt_Z), .B(MIV_RV32_C0_0_APB_INITIATOR_PSELx), .C(CoreAPB3_0_0_APBmslave0_PADDR[25]), .D(CoreAPB3_0_0_APBmslave0_PADDR[24]), .Y(CoreAPB3_0_0_APBmslave0_PSELx) ); defparam \iPSELS[0] .INIT=16'h0008; // @33:443 COREAPB3_MUXPTOB3 u_mux_p_to_b3 ( .PRDATA_0_iv_0(PRDATA_0_iv_0[7:0]), .CoreAPB3_0_0_APBmslave2_PRDATA(CoreAPB3_0_0_APBmslave2_PRDATA[7:0]), .CoreAPB3_0_0_APBmslave1_PRDATA(CoreAPB3_0_0_APBmslave1_PRDATA[7:0]), .apb_pslverr_net(apb_pslverr_net), .un1_Ii0O1(un1_Ii0O1), .Oi0O1(Oi0O1), .CoreAPB3_0_0_APBmslave0_PWRITE(CoreAPB3_0_0_APBmslave0_PWRITE), .iPRDATA_0_sqmuxa_1z(iPRDATA_0_sqmuxa), .CoreAPB3_0_0_APBmslave0_PSELx(CoreAPB3_0_0_APBmslave0_PSELx), .iPRDATA28_1z(iPRDATA28), .CoreAPB3_0_0_APBmslave2_PSELx(CoreAPB3_0_0_APBmslave2_PSELx), .CoreAPB3_0_0_APBmslave1_PSELx(CoreAPB3_0_0_APBmslave1_PSELx) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CoreAPB3_Z1 */ module CoreAPB3_0 ( CoreAPB3_0_0_APBmslave0_PADDR, PRDATA_0_iv_0, CoreAPB3_0_0_APBmslave2_PRDATA, CoreAPB3_0_0_APBmslave1_PRDATA, MIV_RV32_C0_0_APB_INITIATOR_PSELx, CoreAPB3_0_0_APBmslave2_PSELx, CoreAPB3_0_0_APBmslave1_PSELx, CoreAPB3_0_0_APBmslave0_PSELx, apb_pslverr_net, un1_Ii0O1, Oi0O1, CoreAPB3_0_0_APBmslave0_PWRITE, iPRDATA_0_sqmuxa, iPRDATA28 ) ; input [27:24] CoreAPB3_0_0_APBmslave0_PADDR ; output [7:0] PRDATA_0_iv_0 ; input [7:0] CoreAPB3_0_0_APBmslave2_PRDATA ; input [7:0] CoreAPB3_0_0_APBmslave1_PRDATA ; input MIV_RV32_C0_0_APB_INITIATOR_PSELx ; output CoreAPB3_0_0_APBmslave2_PSELx ; output CoreAPB3_0_0_APBmslave1_PSELx ; output CoreAPB3_0_0_APBmslave0_PSELx ; output apb_pslverr_net ; input un1_Ii0O1 ; input Oi0O1 ; input CoreAPB3_0_0_APBmslave0_PWRITE ; output iPRDATA_0_sqmuxa ; output iPRDATA28 ; wire MIV_RV32_C0_0_APB_INITIATOR_PSELx ; wire CoreAPB3_0_0_APBmslave2_PSELx ; wire CoreAPB3_0_0_APBmslave1_PSELx ; wire CoreAPB3_0_0_APBmslave0_PSELx ; wire apb_pslverr_net ; wire un1_Ii0O1 ; wire Oi0O1 ; wire CoreAPB3_0_0_APBmslave0_PWRITE ; wire iPRDATA_0_sqmuxa ; wire iPRDATA28 ; wire GND ; wire VCC ; // @34:258 CoreAPB3_Z1 CoreAPB3_0_0 ( .CoreAPB3_0_0_APBmslave1_PRDATA(CoreAPB3_0_0_APBmslave1_PRDATA[7:0]), .CoreAPB3_0_0_APBmslave2_PRDATA(CoreAPB3_0_0_APBmslave2_PRDATA[7:0]), .PRDATA_0_iv_0(PRDATA_0_iv_0[7:0]), .CoreAPB3_0_0_APBmslave0_PADDR(CoreAPB3_0_0_APBmslave0_PADDR[27:24]), .iPRDATA28(iPRDATA28), .iPRDATA_0_sqmuxa(iPRDATA_0_sqmuxa), .CoreAPB3_0_0_APBmslave0_PWRITE(CoreAPB3_0_0_APBmslave0_PWRITE), .Oi0O1(Oi0O1), .un1_Ii0O1(un1_Ii0O1), .apb_pslverr_net(apb_pslverr_net), .CoreAPB3_0_0_APBmslave0_PSELx(CoreAPB3_0_0_APBmslave0_PSELx), .CoreAPB3_0_0_APBmslave1_PSELx(CoreAPB3_0_0_APBmslave1_PSELx), .CoreAPB3_0_0_APBmslave2_PSELx(CoreAPB3_0_0_APBmslave2_PSELx), .MIV_RV32_C0_0_APB_INITIATOR_PSELx(MIV_RV32_C0_0_APB_INITIATOR_PSELx) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CoreAPB3_0 */ module COREFIFO_C0_COREFIFO_C0_0_corefifo_sync_scntr_Z3 ( O0Il1_0, fifo_MEMRADDR, fifo_MEMWADDR, middle_valid, fifo_valid, N_976_i, EMPTY1, un1_re_set6_i_0_tz, full_r_RNI0A2M6_Y, PF_CCC_0_0_OUT0_FABCLK_0, AND2_2_Y ) ; input O0Il1_0 ; output [9:0] fifo_MEMRADDR ; output [9:0] fifo_MEMWADDR ; input middle_valid ; input fifo_valid ; input N_976_i ; output EMPTY1 ; input un1_re_set6_i_0_tz ; output full_r_RNI0A2M6_Y ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input AND2_2_Y ; wire O0Il1_0 ; wire middle_valid ; wire fifo_valid ; wire N_976_i ; wire EMPTY1 ; wire un1_re_set6_i_0_tz ; wire full_r_RNI0A2M6_Y ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire AND2_2_Y ; wire [9:0] memwaddr_r_s; wire [9:0] memraddr_r_s; wire [10:0] sc_r_Z; wire [10:0] sc_r_4; wire [10:0] sc_r_fwft_Z; wire [10:0] sc_r_fwft_5; wire [0:0] sc_r_fwft_RNIK67EH_Y; wire [1:1] sc_r_fwft_RNI94C6S_Y; wire [2:2] sc_r_fwft_RNIV2HU61_Y; wire [3:3] sc_r_fwft_RNIM2MMH1_Y; wire [4:4] sc_r_fwft_RNIE3RES1_Y; wire [5:5] sc_r_fwft_RNI750772_Y; wire [6:6] sc_r_fwft_RNI185VH2_Y; wire [7:7] sc_r_fwft_RNISBANS2_Y; wire [8:8] sc_r_fwft_RNIOGFF73_Y; wire [10:10] sc_r_fwft_RNO_FCO; wire [10:10] sc_r_fwft_RNO_Y; wire [9:9] sc_r_fwft_RNILMK7I3_Y; wire [0:0] sc_r_RNI6T75L_Y; wire [1:1] sc_r_RNIDHDK31_Y; wire [2:2] sc_r_RNIL6J3I1_Y; wire [3:3] sc_r_RNIUSOI02_Y; wire [4:4] sc_r_RNI8KU1F2_Y; wire [5:5] sc_r_RNIJC4HT2_Y; wire [6:6] sc_r_RNIV5A0C3_Y; wire [7:7] sc_r_RNIC0GFQ3_Y; wire [8:8] sc_r_RNIQRLU84_Y; wire [10:10] sc_r_RNO_FCO; wire [10:10] sc_r_RNO_Y; wire [9:9] sc_r_RNI9ORDN4_Y; wire [8:8] memraddr_r_RNIT8GH5_S; wire [8:8] memraddr_r_RNIT8GH5_Y; wire [8:0] memraddr_r_cry; wire [0:0] memraddr_r_RNI2EOKB_Y; wire [1:1] memraddr_r_RNI8K0OH_Y; wire [2:2] memraddr_r_RNIFR8RN_Y; wire [3:3] memraddr_r_RNIN3HUT_Y; wire [4:4] memraddr_r_RNI0DP141_Y; wire [5:5] memraddr_r_RNIAN15A1_Y; wire [6:6] memraddr_r_RNIL2A8G1_Y; wire [7:7] memraddr_r_RNI1FIBM1_Y; wire [9:9] memraddr_r_RNO_FCO; wire [9:9] memraddr_r_RNO_Y; wire [8:8] memraddr_r_RNIESQES1_Y; wire [8:8] memwaddr_r_RNIFC6I61_S; wire [8:8] memwaddr_r_RNIFC6I61_Y; wire [8:0] memwaddr_r_cry; wire [0:0] memwaddr_r_RNIB2QVG2_Y; wire [1:1] memwaddr_r_RNI8PDDR3_Y; wire [2:2] memwaddr_r_RNI6H1R55_Y; wire [3:3] memwaddr_r_RNI5AL8G6_Y; wire [4:4] memwaddr_r_RNI549MQ7_Y; wire [5:5] memwaddr_r_RNI6VS359_Y; wire [6:6] memwaddr_r_RNI8RGHFA_Y; wire [7:7] memwaddr_r_RNIBO4VPB_Y; wire [9:9] memwaddr_r_RNO_FCO; wire [9:9] memwaddr_r_RNO_Y; wire [8:8] memwaddr_r_RNIFMOC4D_Y; wire un1_sc_r_fwft_cry_10_Z ; wire empty_r_fwft_4 ; wire VCC ; wire GND ; wire empty_r_RNO ; wire N_78_i ; wire empty_r_fwft_Z ; wire un2_we_i_1_Z ; wire full_r ; wire un1_sresetn_4_i_0_Z ; wire sc_r_fwft_cmb_cry_0_cy ; wire full_r_RNI0A2M6_S ; wire sc_r_fwft_cmb_cry_0 ; wire sc_r_fwft_cmb_cry_1 ; wire sc_r_fwft_cmb_cry_2 ; wire sc_r_fwft_cmb_cry_3 ; wire sc_r_fwft_cmb_cry_4 ; wire sc_r_fwft_cmb_cry_5 ; wire sc_r_fwft_cmb_cry_6 ; wire sc_r_fwft_cmb_cry_7 ; wire sc_r_fwft_cmb_cry_8 ; wire sc_r_fwft_cmb_cry_9 ; wire sc_r_cmb_cry_0_cy ; wire full_r_RNI0A2M6_0_S ; wire full_r_RNI0A2M6_0_Y ; wire sc_r_cmb_cry_0 ; wire sc_r_cmb_cry_1 ; wire sc_r_cmb_cry_2 ; wire sc_r_cmb_cry_3 ; wire sc_r_cmb_cry_4 ; wire sc_r_cmb_cry_5 ; wire sc_r_cmb_cry_6 ; wire sc_r_cmb_cry_7 ; wire sc_r_cmb_cry_8 ; wire sc_r_cmb_cry_9 ; wire memraddr_r_cry_cy ; wire memraddr_r_0_sqmuxa_0_83_a2_i_5 ; wire memraddr_r_0_sqmuxa_0_83_a2_i_6 ; wire memwaddr_r_cry_cy ; wire memwaddr_r_0_sqmuxa_0_69_a2_i_5 ; wire memwaddr_r_0_sqmuxa_0_69_a2_i_6 ; wire un1_sc_r_fwft_cry_0_Z ; wire un1_sc_r_fwft_cry_0_S ; wire un1_sc_r_fwft_cry_0_Y ; wire un1_sc_r_fwft_cry_1_Z ; wire un1_sc_r_fwft_cry_1_S ; wire un1_sc_r_fwft_cry_1_Y ; wire un1_sc_r_fwft_cry_2_Z ; wire un1_sc_r_fwft_cry_2_S ; wire un1_sc_r_fwft_cry_2_Y ; wire un1_sc_r_fwft_cry_3_Z ; wire un1_sc_r_fwft_cry_3_S ; wire un1_sc_r_fwft_cry_3_Y ; wire un1_sc_r_fwft_cry_4_Z ; wire un1_sc_r_fwft_cry_4_S ; wire un1_sc_r_fwft_cry_4_Y ; wire un1_sc_r_fwft_cry_5_Z ; wire un1_sc_r_fwft_cry_5_S ; wire un1_sc_r_fwft_cry_5_Y ; wire un1_sc_r_fwft_cry_6_Z ; wire un1_sc_r_fwft_cry_6_S ; wire un1_sc_r_fwft_cry_6_Y ; wire un1_sc_r_fwft_cry_7_Z ; wire un1_sc_r_fwft_cry_7_S ; wire un1_sc_r_fwft_cry_7_Y ; wire un1_sc_r_fwft_cry_8_Z ; wire un1_sc_r_fwft_cry_8_S ; wire un1_sc_r_fwft_cry_8_Y ; wire un1_sc_r_fwft_cry_9_Z ; wire un1_sc_r_fwft_cry_9_S ; wire un1_sc_r_fwft_cry_9_Y ; wire un1_sc_r_fwft_cry_10_S ; wire un1_sc_r_fwft_cry_10_Y ; wire emptyi_0_44_a2_7 ; wire emptyi_0_44_a2_6 ; wire emptyi_0_44_a2_5 ; wire un5_almostfulli_assertlto9_i_a2_6 ; wire un5_almostfulli_assertlto9_i_a2_5 ; wire N_68 ; wire N_979 ; wire N_1302 ; wire N_7 ; wire N_6 ; CFG1 empty_r_fwft_RNO ( .A(un1_sc_r_fwft_cry_10_Z), .Y(empty_r_fwft_4) ); defparam empty_r_fwft_RNO.INIT=2'h1; // @10:620 SLE \memwaddr_r[9] ( .Q(fifo_MEMWADDR[9]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(memwaddr_r_s[9]), .EN(full_r_RNI0A2M6_Y), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:620 SLE \memwaddr_r[8] ( .Q(fifo_MEMWADDR[8]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(memwaddr_r_s[8]), .EN(full_r_RNI0A2M6_Y), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:620 SLE \memwaddr_r[7] ( .Q(fifo_MEMWADDR[7]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(memwaddr_r_s[7]), .EN(full_r_RNI0A2M6_Y), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:620 SLE \memwaddr_r[6] ( .Q(fifo_MEMWADDR[6]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(memwaddr_r_s[6]), .EN(full_r_RNI0A2M6_Y), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:620 SLE \memwaddr_r[5] ( .Q(fifo_MEMWADDR[5]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(memwaddr_r_s[5]), .EN(full_r_RNI0A2M6_Y), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:620 SLE \memwaddr_r[4] ( .Q(fifo_MEMWADDR[4]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(memwaddr_r_s[4]), .EN(full_r_RNI0A2M6_Y), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:620 SLE \memwaddr_r[3] ( .Q(fifo_MEMWADDR[3]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(memwaddr_r_s[3]), .EN(full_r_RNI0A2M6_Y), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:620 SLE \memwaddr_r[2] ( .Q(fifo_MEMWADDR[2]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(memwaddr_r_s[2]), .EN(full_r_RNI0A2M6_Y), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:620 SLE \memwaddr_r[1] ( .Q(fifo_MEMWADDR[1]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(memwaddr_r_s[1]), .EN(full_r_RNI0A2M6_Y), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:620 SLE \memwaddr_r[0] ( .Q(fifo_MEMWADDR[0]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(memwaddr_r_s[0]), .EN(full_r_RNI0A2M6_Y), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:636 SLE \memraddr_r[9] ( .Q(fifo_MEMRADDR[9]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(memraddr_r_s[9]), .EN(un1_re_set6_i_0_tz), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:636 SLE \memraddr_r[8] ( .Q(fifo_MEMRADDR[8]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(memraddr_r_s[8]), .EN(un1_re_set6_i_0_tz), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:636 SLE \memraddr_r[7] ( .Q(fifo_MEMRADDR[7]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(memraddr_r_s[7]), .EN(un1_re_set6_i_0_tz), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:636 SLE \memraddr_r[6] ( .Q(fifo_MEMRADDR[6]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(memraddr_r_s[6]), .EN(un1_re_set6_i_0_tz), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:636 SLE \memraddr_r[5] ( .Q(fifo_MEMRADDR[5]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(memraddr_r_s[5]), .EN(un1_re_set6_i_0_tz), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:636 SLE \memraddr_r[4] ( .Q(fifo_MEMRADDR[4]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(memraddr_r_s[4]), .EN(un1_re_set6_i_0_tz), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:636 SLE \memraddr_r[3] ( .Q(fifo_MEMRADDR[3]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(memraddr_r_s[3]), .EN(un1_re_set6_i_0_tz), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:636 SLE \memraddr_r[2] ( .Q(fifo_MEMRADDR[2]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(memraddr_r_s[2]), .EN(un1_re_set6_i_0_tz), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:636 SLE \memraddr_r[1] ( .Q(fifo_MEMRADDR[1]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(memraddr_r_s[1]), .EN(un1_re_set6_i_0_tz), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:636 SLE \memraddr_r[0] ( .Q(fifo_MEMRADDR[0]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(memraddr_r_s[0]), .EN(un1_re_set6_i_0_tz), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:320 SLE \genblk3.empty_r ( .Q(EMPTY1), .ADn(GND), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(empty_r_RNO), .EN(N_78_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:485 SLE empty_r_fwft ( .Q(empty_r_fwft_Z), .ADn(GND), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(empty_r_fwft_4), .EN(un2_we_i_1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:579 SLE \genblk8.full_r ( .Q(full_r), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(full_r_RNI0A2M6_Y), .EN(un1_sresetn_4_i_0_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:353 SLE \sc_r[2] ( .Q(sc_r_Z[2]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sc_r_4[2]), .EN(N_78_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:353 SLE \sc_r[1] ( .Q(sc_r_Z[1]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sc_r_4[1]), .EN(N_78_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:353 SLE \sc_r[0] ( .Q(sc_r_Z[0]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sc_r_4[0]), .EN(N_78_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:384 SLE \sc_r_fwft[6] ( .Q(sc_r_fwft_Z[6]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sc_r_fwft_5[6]), .EN(un2_we_i_1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:384 SLE \sc_r_fwft[5] ( .Q(sc_r_fwft_Z[5]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sc_r_fwft_5[5]), .EN(un2_we_i_1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:384 SLE \sc_r_fwft[4] ( .Q(sc_r_fwft_Z[4]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sc_r_fwft_5[4]), .EN(un2_we_i_1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:384 SLE \sc_r_fwft[3] ( .Q(sc_r_fwft_Z[3]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sc_r_fwft_5[3]), .EN(un2_we_i_1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:384 SLE \sc_r_fwft[2] ( .Q(sc_r_fwft_Z[2]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sc_r_fwft_5[2]), .EN(un2_we_i_1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:384 SLE \sc_r_fwft[1] ( .Q(sc_r_fwft_Z[1]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sc_r_fwft_5[1]), .EN(un2_we_i_1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:384 SLE \sc_r_fwft[0] ( .Q(sc_r_fwft_Z[0]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sc_r_fwft_5[0]), .EN(un2_we_i_1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:353 SLE \sc_r[10] ( .Q(sc_r_Z[10]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sc_r_4[10]), .EN(N_78_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:353 SLE \sc_r[9] ( .Q(sc_r_Z[9]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sc_r_4[9]), .EN(N_78_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:353 SLE \sc_r[8] ( .Q(sc_r_Z[8]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sc_r_4[8]), .EN(N_78_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:353 SLE \sc_r[7] ( .Q(sc_r_Z[7]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sc_r_4[7]), .EN(N_78_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:353 SLE \sc_r[6] ( .Q(sc_r_Z[6]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sc_r_4[6]), .EN(N_78_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:353 SLE \sc_r[5] ( .Q(sc_r_Z[5]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sc_r_4[5]), .EN(N_78_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:353 SLE \sc_r[4] ( .Q(sc_r_Z[4]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sc_r_4[4]), .EN(N_78_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:353 SLE \sc_r[3] ( .Q(sc_r_Z[3]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sc_r_4[3]), .EN(N_78_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:384 SLE \sc_r_fwft[10] ( .Q(sc_r_fwft_Z[10]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sc_r_fwft_5[10]), .EN(un2_we_i_1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:384 SLE \sc_r_fwft[9] ( .Q(sc_r_fwft_Z[9]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sc_r_fwft_5[9]), .EN(un2_we_i_1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:384 SLE \sc_r_fwft[8] ( .Q(sc_r_fwft_Z[8]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sc_r_fwft_5[8]), .EN(un2_we_i_1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:384 SLE \sc_r_fwft[7] ( .Q(sc_r_fwft_Z[7]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sc_r_fwft_5[7]), .EN(un2_we_i_1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @10:222 ARI1 \genblk8.full_r_RNI0A2M6 ( .FCO(sc_r_fwft_cmb_cry_0_cy), .S(full_r_RNI0A2M6_S), .Y(full_r_RNI0A2M6_Y), .B(full_r), .C(O0Il1_0), .D(GND), .A(VCC), .FCI(VCC) ); defparam \genblk8.full_r_RNI0A2M6 .INIT=20'h41100; // @10:222 ARI1 \sc_r_fwft_RNIK67EH[0] ( .FCO(sc_r_fwft_cmb_cry_0), .S(sc_r_fwft_5[0]), .Y(sc_r_fwft_RNIK67EH_Y[0]), .B(N_976_i), .C(GND), .D(GND), .A(sc_r_fwft_Z[0]), .FCI(sc_r_fwft_cmb_cry_0_cy) ); defparam \sc_r_fwft_RNIK67EH[0] .INIT=20'h555AA; // @10:222 ARI1 \sc_r_fwft_RNI94C6S[1] ( .FCO(sc_r_fwft_cmb_cry_1), .S(sc_r_fwft_5[1]), .Y(sc_r_fwft_RNI94C6S_Y[1]), .B(N_976_i), .C(GND), .D(GND), .A(sc_r_fwft_Z[1]), .FCI(sc_r_fwft_cmb_cry_0) ); defparam \sc_r_fwft_RNI94C6S[1] .INIT=20'h555AA; // @10:222 ARI1 \sc_r_fwft_RNIV2HU61[2] ( .FCO(sc_r_fwft_cmb_cry_2), .S(sc_r_fwft_5[2]), .Y(sc_r_fwft_RNIV2HU61_Y[2]), .B(N_976_i), .C(GND), .D(GND), .A(sc_r_fwft_Z[2]), .FCI(sc_r_fwft_cmb_cry_1) ); defparam \sc_r_fwft_RNIV2HU61[2] .INIT=20'h555AA; // @10:222 ARI1 \sc_r_fwft_RNIM2MMH1[3] ( .FCO(sc_r_fwft_cmb_cry_3), .S(sc_r_fwft_5[3]), .Y(sc_r_fwft_RNIM2MMH1_Y[3]), .B(N_976_i), .C(GND), .D(GND), .A(sc_r_fwft_Z[3]), .FCI(sc_r_fwft_cmb_cry_2) ); defparam \sc_r_fwft_RNIM2MMH1[3] .INIT=20'h555AA; // @10:222 ARI1 \sc_r_fwft_RNIE3RES1[4] ( .FCO(sc_r_fwft_cmb_cry_4), .S(sc_r_fwft_5[4]), .Y(sc_r_fwft_RNIE3RES1_Y[4]), .B(N_976_i), .C(GND), .D(GND), .A(sc_r_fwft_Z[4]), .FCI(sc_r_fwft_cmb_cry_3) ); defparam \sc_r_fwft_RNIE3RES1[4] .INIT=20'h555AA; // @10:222 ARI1 \sc_r_fwft_RNI750772[5] ( .FCO(sc_r_fwft_cmb_cry_5), .S(sc_r_fwft_5[5]), .Y(sc_r_fwft_RNI750772_Y[5]), .B(N_976_i), .C(GND), .D(GND), .A(sc_r_fwft_Z[5]), .FCI(sc_r_fwft_cmb_cry_4) ); defparam \sc_r_fwft_RNI750772[5] .INIT=20'h555AA; // @10:222 ARI1 \sc_r_fwft_RNI185VH2[6] ( .FCO(sc_r_fwft_cmb_cry_6), .S(sc_r_fwft_5[6]), .Y(sc_r_fwft_RNI185VH2_Y[6]), .B(N_976_i), .C(GND), .D(GND), .A(sc_r_fwft_Z[6]), .FCI(sc_r_fwft_cmb_cry_5) ); defparam \sc_r_fwft_RNI185VH2[6] .INIT=20'h555AA; // @10:222 ARI1 \sc_r_fwft_RNISBANS2[7] ( .FCO(sc_r_fwft_cmb_cry_7), .S(sc_r_fwft_5[7]), .Y(sc_r_fwft_RNISBANS2_Y[7]), .B(N_976_i), .C(GND), .D(GND), .A(sc_r_fwft_Z[7]), .FCI(sc_r_fwft_cmb_cry_6) ); defparam \sc_r_fwft_RNISBANS2[7] .INIT=20'h555AA; // @10:222 ARI1 \sc_r_fwft_RNIOGFF73[8] ( .FCO(sc_r_fwft_cmb_cry_8), .S(sc_r_fwft_5[8]), .Y(sc_r_fwft_RNIOGFF73_Y[8]), .B(N_976_i), .C(GND), .D(GND), .A(sc_r_fwft_Z[8]), .FCI(sc_r_fwft_cmb_cry_7) ); defparam \sc_r_fwft_RNIOGFF73[8] .INIT=20'h555AA; // @10:222 ARI1 \sc_r_fwft_RNO[10] ( .FCO(sc_r_fwft_RNO_FCO[10]), .S(sc_r_fwft_5[10]), .Y(sc_r_fwft_RNO_Y[10]), .B(sc_r_fwft_Z[10]), .C(N_976_i), .D(GND), .A(VCC), .FCI(sc_r_fwft_cmb_cry_9) ); defparam \sc_r_fwft_RNO[10] .INIT=20'h46600; // @10:222 ARI1 \sc_r_fwft_RNILMK7I3[9] ( .FCO(sc_r_fwft_cmb_cry_9), .S(sc_r_fwft_5[9]), .Y(sc_r_fwft_RNILMK7I3_Y[9]), .B(N_976_i), .C(GND), .D(GND), .A(sc_r_fwft_Z[9]), .FCI(sc_r_fwft_cmb_cry_8) ); defparam \sc_r_fwft_RNILMK7I3[9] .INIT=20'h555AA; // @10:222 ARI1 \genblk8.full_r_RNI0A2M6_0 ( .FCO(sc_r_cmb_cry_0_cy), .S(full_r_RNI0A2M6_0_S), .Y(full_r_RNI0A2M6_0_Y), .B(full_r), .C(O0Il1_0), .D(GND), .A(VCC), .FCI(VCC) ); defparam \genblk8.full_r_RNI0A2M6_0 .INIT=20'h41100; // @10:222 ARI1 \sc_r_RNI6T75L[0] ( .FCO(sc_r_cmb_cry_0), .S(sc_r_4[0]), .Y(sc_r_RNI6T75L_Y[0]), .B(EMPTY1), .C(fifo_valid), .D(middle_valid), .A(sc_r_Z[0]), .FCI(sc_r_cmb_cry_0_cy) ); defparam \sc_r_RNI6T75L[0] .INIT=20'h5EA15; // @10:222 ARI1 \sc_r_RNIDHDK31[1] ( .FCO(sc_r_cmb_cry_1), .S(sc_r_4[1]), .Y(sc_r_RNIDHDK31_Y[1]), .B(EMPTY1), .C(fifo_valid), .D(middle_valid), .A(sc_r_Z[1]), .FCI(sc_r_cmb_cry_0) ); defparam \sc_r_RNIDHDK31[1] .INIT=20'h5EA15; // @10:222 ARI1 \sc_r_RNIL6J3I1[2] ( .FCO(sc_r_cmb_cry_2), .S(sc_r_4[2]), .Y(sc_r_RNIL6J3I1_Y[2]), .B(EMPTY1), .C(fifo_valid), .D(middle_valid), .A(sc_r_Z[2]), .FCI(sc_r_cmb_cry_1) ); defparam \sc_r_RNIL6J3I1[2] .INIT=20'h5EA15; // @10:222 ARI1 \sc_r_RNIUSOI02[3] ( .FCO(sc_r_cmb_cry_3), .S(sc_r_4[3]), .Y(sc_r_RNIUSOI02_Y[3]), .B(EMPTY1), .C(fifo_valid), .D(middle_valid), .A(sc_r_Z[3]), .FCI(sc_r_cmb_cry_2) ); defparam \sc_r_RNIUSOI02[3] .INIT=20'h5EA15; // @10:222 ARI1 \sc_r_RNI8KU1F2[4] ( .FCO(sc_r_cmb_cry_4), .S(sc_r_4[4]), .Y(sc_r_RNI8KU1F2_Y[4]), .B(EMPTY1), .C(fifo_valid), .D(middle_valid), .A(sc_r_Z[4]), .FCI(sc_r_cmb_cry_3) ); defparam \sc_r_RNI8KU1F2[4] .INIT=20'h5EA15; // @10:222 ARI1 \sc_r_RNIJC4HT2[5] ( .FCO(sc_r_cmb_cry_5), .S(sc_r_4[5]), .Y(sc_r_RNIJC4HT2_Y[5]), .B(EMPTY1), .C(fifo_valid), .D(middle_valid), .A(sc_r_Z[5]), .FCI(sc_r_cmb_cry_4) ); defparam \sc_r_RNIJC4HT2[5] .INIT=20'h5EA15; // @10:222 ARI1 \sc_r_RNIV5A0C3[6] ( .FCO(sc_r_cmb_cry_6), .S(sc_r_4[6]), .Y(sc_r_RNIV5A0C3_Y[6]), .B(EMPTY1), .C(fifo_valid), .D(middle_valid), .A(sc_r_Z[6]), .FCI(sc_r_cmb_cry_5) ); defparam \sc_r_RNIV5A0C3[6] .INIT=20'h5EA15; // @10:222 ARI1 \sc_r_RNIC0GFQ3[7] ( .FCO(sc_r_cmb_cry_7), .S(sc_r_4[7]), .Y(sc_r_RNIC0GFQ3_Y[7]), .B(EMPTY1), .C(fifo_valid), .D(middle_valid), .A(sc_r_Z[7]), .FCI(sc_r_cmb_cry_6) ); defparam \sc_r_RNIC0GFQ3[7] .INIT=20'h5EA15; // @10:222 ARI1 \sc_r_RNIQRLU84[8] ( .FCO(sc_r_cmb_cry_8), .S(sc_r_4[8]), .Y(sc_r_RNIQRLU84_Y[8]), .B(EMPTY1), .C(fifo_valid), .D(middle_valid), .A(sc_r_Z[8]), .FCI(sc_r_cmb_cry_7) ); defparam \sc_r_RNIQRLU84[8] .INIT=20'h5EA15; // @10:222 ARI1 \sc_r_RNO[10] ( .FCO(sc_r_RNO_FCO[10]), .S(sc_r_4[10]), .Y(sc_r_RNO_Y[10]), .B(sc_r_Z[10]), .C(un1_re_set6_i_0_tz), .D(GND), .A(VCC), .FCI(sc_r_cmb_cry_9) ); defparam \sc_r_RNO[10] .INIT=20'h46600; // @10:222 ARI1 \sc_r_RNI9ORDN4[9] ( .FCO(sc_r_cmb_cry_9), .S(sc_r_4[9]), .Y(sc_r_RNI9ORDN4_Y[9]), .B(EMPTY1), .C(fifo_valid), .D(middle_valid), .A(sc_r_Z[9]), .FCI(sc_r_cmb_cry_8) ); defparam \sc_r_RNI9ORDN4[9] .INIT=20'h5EA15; // @13:603 ARI1 \memraddr_r_RNIT8GH5[8] ( .FCO(memraddr_r_cry_cy), .S(memraddr_r_RNIT8GH5_S[8]), .Y(memraddr_r_RNIT8GH5_Y[8]), .B(fifo_MEMRADDR[8]), .C(fifo_MEMRADDR[9]), .D(memraddr_r_0_sqmuxa_0_83_a2_i_5), .A(memraddr_r_0_sqmuxa_0_83_a2_i_6), .FCI(VCC) ); defparam \memraddr_r_RNIT8GH5[8] .INIT=20'h4FFF7; // @13:603 ARI1 \memraddr_r_RNI2EOKB[0] ( .FCO(memraddr_r_cry[0]), .S(memraddr_r_s[0]), .Y(memraddr_r_RNI2EOKB_Y[0]), .B(fifo_MEMRADDR[0]), .C(memraddr_r_RNIT8GH5_Y[8]), .D(GND), .A(VCC), .FCI(memraddr_r_cry_cy) ); defparam \memraddr_r_RNI2EOKB[0] .INIT=20'h48800; // @13:603 ARI1 \memraddr_r_RNI8K0OH[1] ( .FCO(memraddr_r_cry[1]), .S(memraddr_r_s[1]), .Y(memraddr_r_RNI8K0OH_Y[1]), .B(fifo_MEMRADDR[1]), .C(memraddr_r_RNIT8GH5_Y[8]), .D(GND), .A(VCC), .FCI(memraddr_r_cry[0]) ); defparam \memraddr_r_RNI8K0OH[1] .INIT=20'h48800; // @13:603 ARI1 \memraddr_r_RNIFR8RN[2] ( .FCO(memraddr_r_cry[2]), .S(memraddr_r_s[2]), .Y(memraddr_r_RNIFR8RN_Y[2]), .B(fifo_MEMRADDR[2]), .C(memraddr_r_RNIT8GH5_Y[8]), .D(GND), .A(VCC), .FCI(memraddr_r_cry[1]) ); defparam \memraddr_r_RNIFR8RN[2] .INIT=20'h48800; // @13:603 ARI1 \memraddr_r_RNIN3HUT[3] ( .FCO(memraddr_r_cry[3]), .S(memraddr_r_s[3]), .Y(memraddr_r_RNIN3HUT_Y[3]), .B(fifo_MEMRADDR[3]), .C(memraddr_r_RNIT8GH5_Y[8]), .D(GND), .A(VCC), .FCI(memraddr_r_cry[2]) ); defparam \memraddr_r_RNIN3HUT[3] .INIT=20'h48800; // @13:603 ARI1 \memraddr_r_RNI0DP141[4] ( .FCO(memraddr_r_cry[4]), .S(memraddr_r_s[4]), .Y(memraddr_r_RNI0DP141_Y[4]), .B(fifo_MEMRADDR[4]), .C(memraddr_r_RNIT8GH5_Y[8]), .D(GND), .A(VCC), .FCI(memraddr_r_cry[3]) ); defparam \memraddr_r_RNI0DP141[4] .INIT=20'h48800; // @13:603 ARI1 \memraddr_r_RNIAN15A1[5] ( .FCO(memraddr_r_cry[5]), .S(memraddr_r_s[5]), .Y(memraddr_r_RNIAN15A1_Y[5]), .B(fifo_MEMRADDR[5]), .C(memraddr_r_RNIT8GH5_Y[8]), .D(GND), .A(VCC), .FCI(memraddr_r_cry[4]) ); defparam \memraddr_r_RNIAN15A1[5] .INIT=20'h48800; // @13:603 ARI1 \memraddr_r_RNIL2A8G1[6] ( .FCO(memraddr_r_cry[6]), .S(memraddr_r_s[6]), .Y(memraddr_r_RNIL2A8G1_Y[6]), .B(fifo_MEMRADDR[6]), .C(memraddr_r_RNIT8GH5_Y[8]), .D(GND), .A(VCC), .FCI(memraddr_r_cry[5]) ); defparam \memraddr_r_RNIL2A8G1[6] .INIT=20'h48800; // @13:603 ARI1 \memraddr_r_RNI1FIBM1[7] ( .FCO(memraddr_r_cry[7]), .S(memraddr_r_s[7]), .Y(memraddr_r_RNI1FIBM1_Y[7]), .B(fifo_MEMRADDR[7]), .C(memraddr_r_RNIT8GH5_Y[8]), .D(GND), .A(VCC), .FCI(memraddr_r_cry[6]) ); defparam \memraddr_r_RNI1FIBM1[7] .INIT=20'h48800; // @13:603 ARI1 \memraddr_r_RNO[9] ( .FCO(memraddr_r_RNO_FCO[9]), .S(memraddr_r_s[9]), .Y(memraddr_r_RNO_Y[9]), .B(fifo_MEMRADDR[9]), .C(memraddr_r_RNIT8GH5_Y[8]), .D(GND), .A(VCC), .FCI(memraddr_r_cry[8]) ); defparam \memraddr_r_RNO[9] .INIT=20'h48800; // @13:603 ARI1 \memraddr_r_RNIESQES1[8] ( .FCO(memraddr_r_cry[8]), .S(memraddr_r_s[8]), .Y(memraddr_r_RNIESQES1_Y[8]), .B(fifo_MEMRADDR[8]), .C(memraddr_r_RNIT8GH5_Y[8]), .D(GND), .A(VCC), .FCI(memraddr_r_cry[7]) ); defparam \memraddr_r_RNIESQES1[8] .INIT=20'h48800; // @13:603 ARI1 \memwaddr_r_RNIFC6I61[8] ( .FCO(memwaddr_r_cry_cy), .S(memwaddr_r_RNIFC6I61_S[8]), .Y(memwaddr_r_RNIFC6I61_Y[8]), .B(fifo_MEMWADDR[8]), .C(fifo_MEMWADDR[9]), .D(memwaddr_r_0_sqmuxa_0_69_a2_i_5), .A(memwaddr_r_0_sqmuxa_0_69_a2_i_6), .FCI(VCC) ); defparam \memwaddr_r_RNIFC6I61[8] .INIT=20'h4FFF7; // @13:603 ARI1 \memwaddr_r_RNIB2QVG2[0] ( .FCO(memwaddr_r_cry[0]), .S(memwaddr_r_s[0]), .Y(memwaddr_r_RNIB2QVG2_Y[0]), .B(fifo_MEMWADDR[0]), .C(memwaddr_r_RNIFC6I61_Y[8]), .D(GND), .A(VCC), .FCI(memwaddr_r_cry_cy) ); defparam \memwaddr_r_RNIB2QVG2[0] .INIT=20'h48800; // @13:603 ARI1 \memwaddr_r_RNI8PDDR3[1] ( .FCO(memwaddr_r_cry[1]), .S(memwaddr_r_s[1]), .Y(memwaddr_r_RNI8PDDR3_Y[1]), .B(fifo_MEMWADDR[1]), .C(memwaddr_r_RNIFC6I61_Y[8]), .D(GND), .A(VCC), .FCI(memwaddr_r_cry[0]) ); defparam \memwaddr_r_RNI8PDDR3[1] .INIT=20'h48800; // @13:603 ARI1 \memwaddr_r_RNI6H1R55[2] ( .FCO(memwaddr_r_cry[2]), .S(memwaddr_r_s[2]), .Y(memwaddr_r_RNI6H1R55_Y[2]), .B(fifo_MEMWADDR[2]), .C(memwaddr_r_RNIFC6I61_Y[8]), .D(GND), .A(VCC), .FCI(memwaddr_r_cry[1]) ); defparam \memwaddr_r_RNI6H1R55[2] .INIT=20'h48800; // @13:603 ARI1 \memwaddr_r_RNI5AL8G6[3] ( .FCO(memwaddr_r_cry[3]), .S(memwaddr_r_s[3]), .Y(memwaddr_r_RNI5AL8G6_Y[3]), .B(fifo_MEMWADDR[3]), .C(memwaddr_r_RNIFC6I61_Y[8]), .D(GND), .A(VCC), .FCI(memwaddr_r_cry[2]) ); defparam \memwaddr_r_RNI5AL8G6[3] .INIT=20'h48800; // @13:603 ARI1 \memwaddr_r_RNI549MQ7[4] ( .FCO(memwaddr_r_cry[4]), .S(memwaddr_r_s[4]), .Y(memwaddr_r_RNI549MQ7_Y[4]), .B(fifo_MEMWADDR[4]), .C(memwaddr_r_RNIFC6I61_Y[8]), .D(GND), .A(VCC), .FCI(memwaddr_r_cry[3]) ); defparam \memwaddr_r_RNI549MQ7[4] .INIT=20'h48800; // @13:603 ARI1 \memwaddr_r_RNI6VS359[5] ( .FCO(memwaddr_r_cry[5]), .S(memwaddr_r_s[5]), .Y(memwaddr_r_RNI6VS359_Y[5]), .B(fifo_MEMWADDR[5]), .C(memwaddr_r_RNIFC6I61_Y[8]), .D(GND), .A(VCC), .FCI(memwaddr_r_cry[4]) ); defparam \memwaddr_r_RNI6VS359[5] .INIT=20'h48800; // @13:603 ARI1 \memwaddr_r_RNI8RGHFA[6] ( .FCO(memwaddr_r_cry[6]), .S(memwaddr_r_s[6]), .Y(memwaddr_r_RNI8RGHFA_Y[6]), .B(fifo_MEMWADDR[6]), .C(memwaddr_r_RNIFC6I61_Y[8]), .D(GND), .A(VCC), .FCI(memwaddr_r_cry[5]) ); defparam \memwaddr_r_RNI8RGHFA[6] .INIT=20'h48800; // @13:603 ARI1 \memwaddr_r_RNIBO4VPB[7] ( .FCO(memwaddr_r_cry[7]), .S(memwaddr_r_s[7]), .Y(memwaddr_r_RNIBO4VPB_Y[7]), .B(fifo_MEMWADDR[7]), .C(memwaddr_r_RNIFC6I61_Y[8]), .D(GND), .A(VCC), .FCI(memwaddr_r_cry[6]) ); defparam \memwaddr_r_RNIBO4VPB[7] .INIT=20'h48800; // @13:603 ARI1 \memwaddr_r_RNO[9] ( .FCO(memwaddr_r_RNO_FCO[9]), .S(memwaddr_r_s[9]), .Y(memwaddr_r_RNO_Y[9]), .B(fifo_MEMWADDR[9]), .C(memwaddr_r_RNIFC6I61_Y[8]), .D(GND), .A(VCC), .FCI(memwaddr_r_cry[8]) ); defparam \memwaddr_r_RNO[9] .INIT=20'h48800; // @13:603 ARI1 \memwaddr_r_RNIFMOC4D[8] ( .FCO(memwaddr_r_cry[8]), .S(memwaddr_r_s[8]), .Y(memwaddr_r_RNIFMOC4D_Y[8]), .B(fifo_MEMWADDR[8]), .C(memwaddr_r_RNIFC6I61_Y[8]), .D(GND), .A(VCC), .FCI(memwaddr_r_cry[7]) ); defparam \memwaddr_r_RNIFMOC4D[8] .INIT=20'h48800; // @10:447 ARI1 un1_sc_r_fwft_cry_0 ( .FCO(un1_sc_r_fwft_cry_0_Z), .S(un1_sc_r_fwft_cry_0_S), .Y(un1_sc_r_fwft_cry_0_Y), .B(sc_r_fwft_Z[0]), .C(GND), .D(GND), .A(VCC), .FCI(GND) ); defparam un1_sc_r_fwft_cry_0.INIT=20'h65500; // @10:447 ARI1 un1_sc_r_fwft_cry_1 ( .FCO(un1_sc_r_fwft_cry_1_Z), .S(un1_sc_r_fwft_cry_1_S), .Y(un1_sc_r_fwft_cry_1_Y), .B(sc_r_fwft_Z[1]), .C(GND), .D(GND), .A(VCC), .FCI(un1_sc_r_fwft_cry_0_Z) ); defparam un1_sc_r_fwft_cry_1.INIT=20'h65500; // @10:447 ARI1 un1_sc_r_fwft_cry_2 ( .FCO(un1_sc_r_fwft_cry_2_Z), .S(un1_sc_r_fwft_cry_2_S), .Y(un1_sc_r_fwft_cry_2_Y), .B(sc_r_fwft_Z[2]), .C(GND), .D(GND), .A(VCC), .FCI(un1_sc_r_fwft_cry_1_Z) ); defparam un1_sc_r_fwft_cry_2.INIT=20'h65500; // @10:447 ARI1 un1_sc_r_fwft_cry_3 ( .FCO(un1_sc_r_fwft_cry_3_Z), .S(un1_sc_r_fwft_cry_3_S), .Y(un1_sc_r_fwft_cry_3_Y), .B(sc_r_fwft_Z[3]), .C(GND), .D(GND), .A(VCC), .FCI(un1_sc_r_fwft_cry_2_Z) ); defparam un1_sc_r_fwft_cry_3.INIT=20'h65500; // @10:447 ARI1 un1_sc_r_fwft_cry_4 ( .FCO(un1_sc_r_fwft_cry_4_Z), .S(un1_sc_r_fwft_cry_4_S), .Y(un1_sc_r_fwft_cry_4_Y), .B(sc_r_fwft_Z[4]), .C(GND), .D(GND), .A(VCC), .FCI(un1_sc_r_fwft_cry_3_Z) ); defparam un1_sc_r_fwft_cry_4.INIT=20'h65500; // @10:447 ARI1 un1_sc_r_fwft_cry_5 ( .FCO(un1_sc_r_fwft_cry_5_Z), .S(un1_sc_r_fwft_cry_5_S), .Y(un1_sc_r_fwft_cry_5_Y), .B(sc_r_fwft_Z[5]), .C(GND), .D(GND), .A(VCC), .FCI(un1_sc_r_fwft_cry_4_Z) ); defparam un1_sc_r_fwft_cry_5.INIT=20'h65500; // @10:447 ARI1 un1_sc_r_fwft_cry_6 ( .FCO(un1_sc_r_fwft_cry_6_Z), .S(un1_sc_r_fwft_cry_6_S), .Y(un1_sc_r_fwft_cry_6_Y), .B(sc_r_fwft_Z[6]), .C(GND), .D(GND), .A(VCC), .FCI(un1_sc_r_fwft_cry_5_Z) ); defparam un1_sc_r_fwft_cry_6.INIT=20'h65500; // @10:447 ARI1 un1_sc_r_fwft_cry_7 ( .FCO(un1_sc_r_fwft_cry_7_Z), .S(un1_sc_r_fwft_cry_7_S), .Y(un1_sc_r_fwft_cry_7_Y), .B(sc_r_fwft_Z[7]), .C(GND), .D(GND), .A(VCC), .FCI(un1_sc_r_fwft_cry_6_Z) ); defparam un1_sc_r_fwft_cry_7.INIT=20'h65500; // @10:447 ARI1 un1_sc_r_fwft_cry_8 ( .FCO(un1_sc_r_fwft_cry_8_Z), .S(un1_sc_r_fwft_cry_8_S), .Y(un1_sc_r_fwft_cry_8_Y), .B(sc_r_fwft_Z[8]), .C(GND), .D(GND), .A(VCC), .FCI(un1_sc_r_fwft_cry_7_Z) ); defparam un1_sc_r_fwft_cry_8.INIT=20'h65500; // @10:447 ARI1 un1_sc_r_fwft_cry_9 ( .FCO(un1_sc_r_fwft_cry_9_Z), .S(un1_sc_r_fwft_cry_9_S), .Y(un1_sc_r_fwft_cry_9_Y), .B(sc_r_fwft_Z[9]), .C(GND), .D(GND), .A(VCC), .FCI(un1_sc_r_fwft_cry_8_Z) ); defparam un1_sc_r_fwft_cry_9.INIT=20'h65500; // @10:447 ARI1 un1_sc_r_fwft_cry_10 ( .FCO(un1_sc_r_fwft_cry_10_Z), .S(un1_sc_r_fwft_cry_10_S), .Y(un1_sc_r_fwft_cry_10_Y), .B(sc_r_fwft_Z[10]), .C(GND), .D(GND), .A(VCC), .FCI(un1_sc_r_fwft_cry_9_Z) ); defparam un1_sc_r_fwft_cry_10.INIT=20'h65500; // @10:364 CFG3 \genblk3.sc_r6_i_x2 ( .A(full_r), .B(O0Il1_0), .C(un1_re_set6_i_0_tz), .Y(N_78_i) ); defparam \genblk3.sc_r6_i_x2 .INIT=8'hE1; // @10:390 CFG3 un2_we_i_1 ( .A(full_r), .B(O0Il1_0), .C(N_976_i), .Y(un2_we_i_1_Z) ); defparam un2_we_i_1.INIT=8'hE1; // @10:320 CFG4 \genblk3.empty_r_RNO_2 ( .A(sc_r_Z[4]), .B(sc_r_Z[3]), .C(sc_r_Z[2]), .D(sc_r_Z[1]), .Y(emptyi_0_44_a2_7) ); defparam \genblk3.empty_r_RNO_2 .INIT=16'h0001; // @10:320 CFG4 \genblk3.empty_r_RNO_1 ( .A(sc_r_Z[10]), .B(sc_r_Z[9]), .C(sc_r_Z[8]), .D(sc_r_Z[0]), .Y(emptyi_0_44_a2_6) ); defparam \genblk3.empty_r_RNO_1 .INIT=16'h0100; // @10:320 CFG3 \genblk3.empty_r_RNO_0 ( .A(sc_r_Z[7]), .B(sc_r_Z[6]), .C(sc_r_Z[5]), .Y(emptyi_0_44_a2_5) ); defparam \genblk3.empty_r_RNO_0 .INIT=8'h01; // @13:603 CFG4 \memwaddr_r_RNIQBLDF[0] ( .A(fifo_MEMWADDR[3]), .B(fifo_MEMWADDR[2]), .C(fifo_MEMWADDR[1]), .D(fifo_MEMWADDR[0]), .Y(memwaddr_r_0_sqmuxa_0_69_a2_i_6) ); defparam \memwaddr_r_RNIQBLDF[0] .INIT=16'h7FFF; // @13:603 CFG4 \memwaddr_r_RNIASLDF[4] ( .A(fifo_MEMWADDR[7]), .B(fifo_MEMWADDR[6]), .C(fifo_MEMWADDR[5]), .D(fifo_MEMWADDR[4]), .Y(memwaddr_r_0_sqmuxa_0_69_a2_i_5) ); defparam \memwaddr_r_RNIASLDF[4] .INIT=16'h7FFF; // @13:603 CFG4 \memraddr_r_RNI6NV62[0] ( .A(fifo_MEMRADDR[3]), .B(fifo_MEMRADDR[2]), .C(fifo_MEMRADDR[1]), .D(fifo_MEMRADDR[0]), .Y(memraddr_r_0_sqmuxa_0_83_a2_i_6) ); defparam \memraddr_r_RNI6NV62[0] .INIT=16'h7FFF; // @13:603 CFG4 \memraddr_r_RNIM7072[4] ( .A(fifo_MEMRADDR[7]), .B(fifo_MEMRADDR[6]), .C(fifo_MEMRADDR[5]), .D(fifo_MEMRADDR[4]), .Y(memraddr_r_0_sqmuxa_0_83_a2_i_5) ); defparam \memraddr_r_RNIM7072[4] .INIT=16'h7FFF; // @10:453 CFG4 \genblk6.un5_almostfulli_assertlto9_i_a2_6 ( .A(sc_r_fwft_Z[7]), .B(sc_r_fwft_Z[6]), .C(sc_r_fwft_Z[5]), .D(sc_r_fwft_Z[4]), .Y(un5_almostfulli_assertlto9_i_a2_6) ); defparam \genblk6.un5_almostfulli_assertlto9_i_a2_6 .INIT=16'h8000; // @10:453 CFG4 \genblk6.un5_almostfulli_assertlto9_i_a2_5 ( .A(sc_r_fwft_Z[3]), .B(sc_r_fwft_Z[2]), .C(sc_r_fwft_Z[1]), .D(sc_r_fwft_Z[0]), .Y(un5_almostfulli_assertlto9_i_a2_5) ); defparam \genblk6.un5_almostfulli_assertlto9_i_a2_5 .INIT=16'h8000; // @10:453 CFG4 \genblk6.un5_almostfulli_assertlto9_i_a2 ( .A(sc_r_fwft_Z[9]), .B(sc_r_fwft_Z[8]), .C(un5_almostfulli_assertlto9_i_a2_6), .D(un5_almostfulli_assertlto9_i_a2_5), .Y(N_68) ); defparam \genblk6.un5_almostfulli_assertlto9_i_a2 .INIT=16'h8000; // @10:581 CFG2 un1_sresetn_4_i_o2 ( .A(N_976_i), .B(empty_r_fwft_Z), .Y(N_979) ); defparam un1_sresetn_4_i_o2.INIT=4'hD; // @10:320 CFG4 \genblk3.empty_r_RNO ( .A(emptyi_0_44_a2_5), .B(emptyi_0_44_a2_6), .C(emptyi_0_44_a2_7), .D(un1_re_set6_i_0_tz), .Y(empty_r_RNO) ); defparam \genblk3.empty_r_RNO .INIT=16'h8000; // @10:581 CFG4 un1_sresetn_4_i_0 ( .A(sc_r_fwft_Z[10]), .B(N_68), .C(N_979), .D(full_r_RNI0A2M6_Y), .Y(un1_sresetn_4_i_0_Z) ); defparam un1_sresetn_4_i_0.INIT=16'hE00F; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* COREFIFO_C0_COREFIFO_C0_0_corefifo_sync_scntr_Z3 */ module COREFIFO_C0_COREFIFO_C0_0_corefifo_fwft_Z4 ( int_MEMRD_fwft_1, int_MEMRD_fwft_1_i_m2_2, int_MEMRD_fwft_1_i_m2_1, int_MEMRD_fwft_1_i_m2_0, int_MEMRD_fwft_1_i_m2_6, COREFIFO_C0_0_Q, EMPTY1, N_976_i, un1_re_set6_i_0_tz, fifo_valid_1z, middle_valid_1z, PF_CCC_0_0_OUT0_FABCLK_0, AND2_2_Y, COREFIFO_C0_0_EMPTY ) ; input [31:3] int_MEMRD_fwft_1 ; input int_MEMRD_fwft_1_i_m2_2 ; input int_MEMRD_fwft_1_i_m2_1 ; input int_MEMRD_fwft_1_i_m2_0 ; input int_MEMRD_fwft_1_i_m2_6 ; output [31:0] COREFIFO_C0_0_Q ; input EMPTY1 ; input N_976_i ; input un1_re_set6_i_0_tz ; output fifo_valid_1z ; output middle_valid_1z ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input AND2_2_Y ; output COREFIFO_C0_0_EMPTY ; wire int_MEMRD_fwft_1_i_m2_2 ; wire int_MEMRD_fwft_1_i_m2_1 ; wire int_MEMRD_fwft_1_i_m2_0 ; wire int_MEMRD_fwft_1_i_m2_6 ; wire EMPTY1 ; wire N_976_i ; wire un1_re_set6_i_0_tz ; wire fifo_valid_1z ; wire middle_valid_1z ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire AND2_2_Y ; wire COREFIFO_C0_0_EMPTY ; wire [31:3] dout_4_Z; wire [6:0] dout_4_i_m2_Z; wire [31:0] middle_dout_Z; wire GND ; wire update_dout_i_0_Z ; wire un4_update_dout_Z ; wire VCC ; wire dout_valid_Z ; wire update_dout_Z ; wire N_970_i ; wire un4_update_dout_1_0_Z ; wire un4_fifo_rd_en_0_Z ; wire N_70 ; wire N_69 ; // @9:198 SLE empty ( .Q(COREFIFO_C0_0_EMPTY), .ADn(GND), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(update_dout_i_0_Z), .EN(un4_update_dout_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE dout_valid ( .Q(dout_valid_Z), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(update_dout_Z), .EN(un4_update_dout_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE middle_valid ( .Q(middle_valid_1z), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_970_i), .EN(un4_update_dout_1_0_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE fifo_valid ( .Q(fifo_valid_1z), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un1_re_set6_i_0_tz), .EN(un4_fifo_rd_en_0_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \dout[4] ( .Q(COREFIFO_C0_0_Q[4]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dout_4_Z[4]), .EN(update_dout_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \dout[3] ( .Q(COREFIFO_C0_0_Q[3]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dout_4_Z[3]), .EN(update_dout_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \dout[2] ( .Q(COREFIFO_C0_0_Q[2]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dout_4_i_m2_Z[2]), .EN(update_dout_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \dout[1] ( .Q(COREFIFO_C0_0_Q[1]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dout_4_i_m2_Z[1]), .EN(update_dout_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \dout[0] ( .Q(COREFIFO_C0_0_Q[0]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dout_4_i_m2_Z[0]), .EN(update_dout_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \dout[19] ( .Q(COREFIFO_C0_0_Q[19]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dout_4_Z[19]), .EN(update_dout_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \dout[18] ( .Q(COREFIFO_C0_0_Q[18]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dout_4_Z[18]), .EN(update_dout_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \dout[17] ( .Q(COREFIFO_C0_0_Q[17]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dout_4_Z[17]), .EN(update_dout_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \dout[16] ( .Q(COREFIFO_C0_0_Q[16]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dout_4_Z[16]), .EN(update_dout_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \dout[15] ( .Q(COREFIFO_C0_0_Q[15]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dout_4_Z[15]), .EN(update_dout_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \dout[14] ( .Q(COREFIFO_C0_0_Q[14]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dout_4_Z[14]), .EN(update_dout_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \dout[13] ( .Q(COREFIFO_C0_0_Q[13]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dout_4_Z[13]), .EN(update_dout_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \dout[12] ( .Q(COREFIFO_C0_0_Q[12]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dout_4_Z[12]), .EN(update_dout_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \dout[11] ( .Q(COREFIFO_C0_0_Q[11]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dout_4_Z[11]), .EN(update_dout_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \dout[10] ( .Q(COREFIFO_C0_0_Q[10]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dout_4_Z[10]), .EN(update_dout_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \dout[9] ( .Q(COREFIFO_C0_0_Q[9]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dout_4_Z[9]), .EN(update_dout_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \dout[8] ( .Q(COREFIFO_C0_0_Q[8]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dout_4_Z[8]), .EN(update_dout_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \dout[7] ( .Q(COREFIFO_C0_0_Q[7]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dout_4_Z[7]), .EN(update_dout_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \dout[6] ( .Q(COREFIFO_C0_0_Q[6]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dout_4_i_m2_Z[6]), .EN(update_dout_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \dout[5] ( .Q(COREFIFO_C0_0_Q[5]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dout_4_Z[5]), .EN(update_dout_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \middle_dout[2] ( .Q(middle_dout_Z[2]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_MEMRD_fwft_1_i_m2_2), .EN(N_970_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \middle_dout[1] ( .Q(middle_dout_Z[1]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_MEMRD_fwft_1_i_m2_1), .EN(N_970_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \middle_dout[0] ( .Q(middle_dout_Z[0]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_MEMRD_fwft_1_i_m2_0), .EN(N_970_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \dout[31] ( .Q(COREFIFO_C0_0_Q[31]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dout_4_Z[31]), .EN(update_dout_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \dout[30] ( .Q(COREFIFO_C0_0_Q[30]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dout_4_Z[30]), .EN(update_dout_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \dout[29] ( .Q(COREFIFO_C0_0_Q[29]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dout_4_Z[29]), .EN(update_dout_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \dout[28] ( .Q(COREFIFO_C0_0_Q[28]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dout_4_Z[28]), .EN(update_dout_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \dout[27] ( .Q(COREFIFO_C0_0_Q[27]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dout_4_Z[27]), .EN(update_dout_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \dout[26] ( .Q(COREFIFO_C0_0_Q[26]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dout_4_Z[26]), .EN(update_dout_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \dout[25] ( .Q(COREFIFO_C0_0_Q[25]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dout_4_Z[25]), .EN(update_dout_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \dout[24] ( .Q(COREFIFO_C0_0_Q[24]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dout_4_Z[24]), .EN(update_dout_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \dout[23] ( .Q(COREFIFO_C0_0_Q[23]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dout_4_Z[23]), .EN(update_dout_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \dout[22] ( .Q(COREFIFO_C0_0_Q[22]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dout_4_Z[22]), .EN(update_dout_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \dout[21] ( .Q(COREFIFO_C0_0_Q[21]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dout_4_Z[21]), .EN(update_dout_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \dout[20] ( .Q(COREFIFO_C0_0_Q[20]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dout_4_Z[20]), .EN(update_dout_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \middle_dout[17] ( .Q(middle_dout_Z[17]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_MEMRD_fwft_1[17]), .EN(N_970_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \middle_dout[16] ( .Q(middle_dout_Z[16]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_MEMRD_fwft_1[16]), .EN(N_970_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \middle_dout[15] ( .Q(middle_dout_Z[15]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_MEMRD_fwft_1[15]), .EN(N_970_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \middle_dout[14] ( .Q(middle_dout_Z[14]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_MEMRD_fwft_1[14]), .EN(N_970_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \middle_dout[13] ( .Q(middle_dout_Z[13]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_MEMRD_fwft_1[13]), .EN(N_970_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \middle_dout[12] ( .Q(middle_dout_Z[12]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_MEMRD_fwft_1[12]), .EN(N_970_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \middle_dout[11] ( .Q(middle_dout_Z[11]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_MEMRD_fwft_1[11]), .EN(N_970_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \middle_dout[10] ( .Q(middle_dout_Z[10]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_MEMRD_fwft_1[10]), .EN(N_970_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \middle_dout[9] ( .Q(middle_dout_Z[9]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_MEMRD_fwft_1[9]), .EN(N_970_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \middle_dout[8] ( .Q(middle_dout_Z[8]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_MEMRD_fwft_1[8]), .EN(N_970_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \middle_dout[7] ( .Q(middle_dout_Z[7]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_MEMRD_fwft_1[7]), .EN(N_970_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \middle_dout[6] ( .Q(middle_dout_Z[6]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_MEMRD_fwft_1_i_m2_6), .EN(N_970_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \middle_dout[5] ( .Q(middle_dout_Z[5]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_MEMRD_fwft_1[5]), .EN(N_970_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \middle_dout[4] ( .Q(middle_dout_Z[4]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_MEMRD_fwft_1[4]), .EN(N_970_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \middle_dout[3] ( .Q(middle_dout_Z[3]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_MEMRD_fwft_1[3]), .EN(N_970_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \middle_dout[31] ( .Q(middle_dout_Z[31]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_MEMRD_fwft_1[31]), .EN(N_970_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \middle_dout[30] ( .Q(middle_dout_Z[30]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_MEMRD_fwft_1[30]), .EN(N_970_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \middle_dout[29] ( .Q(middle_dout_Z[29]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_MEMRD_fwft_1[29]), .EN(N_970_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \middle_dout[28] ( .Q(middle_dout_Z[28]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_MEMRD_fwft_1[28]), .EN(N_970_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \middle_dout[27] ( .Q(middle_dout_Z[27]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_MEMRD_fwft_1[27]), .EN(N_970_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \middle_dout[26] ( .Q(middle_dout_Z[26]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_MEMRD_fwft_1[26]), .EN(N_970_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \middle_dout[25] ( .Q(middle_dout_Z[25]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_MEMRD_fwft_1[25]), .EN(N_970_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \middle_dout[24] ( .Q(middle_dout_Z[24]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_MEMRD_fwft_1[24]), .EN(N_970_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \middle_dout[23] ( .Q(middle_dout_Z[23]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_MEMRD_fwft_1[23]), .EN(N_970_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \middle_dout[22] ( .Q(middle_dout_Z[22]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_MEMRD_fwft_1[22]), .EN(N_970_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \middle_dout[21] ( .Q(middle_dout_Z[21]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_MEMRD_fwft_1[21]), .EN(N_970_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \middle_dout[20] ( .Q(middle_dout_Z[20]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_MEMRD_fwft_1[20]), .EN(N_970_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \middle_dout[19] ( .Q(middle_dout_Z[19]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_MEMRD_fwft_1[19]), .EN(N_970_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:272 SLE \middle_dout[18] ( .Q(middle_dout_Z[18]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_MEMRD_fwft_1[18]), .EN(N_970_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @9:180 CFG4 update_dout_i_0 ( .A(dout_valid_Z), .B(fifo_valid_1z), .C(middle_valid_1z), .D(N_976_i), .Y(update_dout_i_0_Z) ); defparam update_dout_i_0.INIT=16'h03AB; // @9:112 CFG3 un4_update_dout_1_0 ( .A(fifo_valid_1z), .B(middle_valid_1z), .C(update_dout_Z), .Y(un4_update_dout_1_0_Z) ); defparam un4_update_dout_1_0.INIT=8'hF2; // @9:80 CFG4 un4_fifo_rd_en_0 ( .A(EMPTY1), .B(fifo_valid_1z), .C(middle_valid_1z), .D(update_dout_Z), .Y(un4_fifo_rd_en_0_Z) ); defparam un4_fifo_rd_en_0.INIT=16'hFF1D; // @9:272 CFG3 fifo_valid_RNI196FC ( .A(fifo_valid_1z), .B(middle_valid_1z), .C(update_dout_Z), .Y(N_970_i) ); defparam fifo_valid_RNI196FC.INIT=8'h82; // @9:112 CFG2 un4_update_dout ( .A(update_dout_Z), .B(N_976_i), .Y(un4_update_dout_Z) ); defparam un4_update_dout.INIT=4'hE; // @9:273 CFG3 \dout_4_i_m2[6] ( .A(middle_dout_Z[6]), .B(middle_valid_1z), .C(int_MEMRD_fwft_1_i_m2_6), .Y(dout_4_i_m2_Z[6]) ); defparam \dout_4_i_m2[6] .INIT=8'hB8; // @9:273 CFG3 \dout_4_i_m2[2] ( .A(middle_dout_Z[2]), .B(middle_valid_1z), .C(int_MEMRD_fwft_1_i_m2_2), .Y(dout_4_i_m2_Z[2]) ); defparam \dout_4_i_m2[2] .INIT=8'hB8; // @9:273 CFG3 \dout_4_i_m2[1] ( .A(middle_dout_Z[1]), .B(middle_valid_1z), .C(int_MEMRD_fwft_1_i_m2_1), .Y(dout_4_i_m2_Z[1]) ); defparam \dout_4_i_m2[1] .INIT=8'hB8; // @9:273 CFG3 \dout_4_i_m2[0] ( .A(middle_dout_Z[0]), .B(middle_valid_1z), .C(int_MEMRD_fwft_1_i_m2_0), .Y(dout_4_i_m2_Z[0]) ); defparam \dout_4_i_m2[0] .INIT=8'hB8; // @9:273 CFG3 \dout_4[8] ( .A(middle_dout_Z[8]), .B(middle_valid_1z), .C(int_MEMRD_fwft_1[8]), .Y(dout_4_Z[8]) ); defparam \dout_4[8] .INIT=8'hB8; // @9:273 CFG3 \dout_4[7] ( .A(middle_dout_Z[7]), .B(middle_valid_1z), .C(int_MEMRD_fwft_1[7]), .Y(dout_4_Z[7]) ); defparam \dout_4[7] .INIT=8'hB8; // @9:273 CFG3 \dout_4[5] ( .A(middle_dout_Z[5]), .B(middle_valid_1z), .C(int_MEMRD_fwft_1[5]), .Y(dout_4_Z[5]) ); defparam \dout_4[5] .INIT=8'hB8; // @9:273 CFG3 \dout_4[4] ( .A(middle_dout_Z[4]), .B(middle_valid_1z), .C(int_MEMRD_fwft_1[4]), .Y(dout_4_Z[4]) ); defparam \dout_4[4] .INIT=8'hB8; // @9:273 CFG3 \dout_4[3] ( .A(middle_dout_Z[3]), .B(middle_valid_1z), .C(int_MEMRD_fwft_1[3]), .Y(dout_4_Z[3]) ); defparam \dout_4[3] .INIT=8'hB8; // @9:273 CFG3 \dout_4[9] ( .A(middle_dout_Z[9]), .B(middle_valid_1z), .C(int_MEMRD_fwft_1[9]), .Y(dout_4_Z[9]) ); defparam \dout_4[9] .INIT=8'hB8; // @9:273 CFG3 \dout_4[10] ( .A(middle_dout_Z[10]), .B(middle_valid_1z), .C(int_MEMRD_fwft_1[10]), .Y(dout_4_Z[10]) ); defparam \dout_4[10] .INIT=8'hB8; // @9:273 CFG3 \dout_4[11] ( .A(middle_dout_Z[11]), .B(middle_valid_1z), .C(int_MEMRD_fwft_1[11]), .Y(dout_4_Z[11]) ); defparam \dout_4[11] .INIT=8'hB8; // @9:273 CFG3 \dout_4[12] ( .A(middle_dout_Z[12]), .B(middle_valid_1z), .C(int_MEMRD_fwft_1[12]), .Y(dout_4_Z[12]) ); defparam \dout_4[12] .INIT=8'hB8; // @9:273 CFG3 \dout_4[13] ( .A(middle_dout_Z[13]), .B(middle_valid_1z), .C(int_MEMRD_fwft_1[13]), .Y(dout_4_Z[13]) ); defparam \dout_4[13] .INIT=8'hB8; // @9:273 CFG3 \dout_4[14] ( .A(middle_dout_Z[14]), .B(middle_valid_1z), .C(int_MEMRD_fwft_1[14]), .Y(dout_4_Z[14]) ); defparam \dout_4[14] .INIT=8'hB8; // @9:273 CFG3 \dout_4[15] ( .A(middle_dout_Z[15]), .B(middle_valid_1z), .C(int_MEMRD_fwft_1[15]), .Y(dout_4_Z[15]) ); defparam \dout_4[15] .INIT=8'hB8; // @9:273 CFG3 \dout_4[16] ( .A(middle_dout_Z[16]), .B(middle_valid_1z), .C(int_MEMRD_fwft_1[16]), .Y(dout_4_Z[16]) ); defparam \dout_4[16] .INIT=8'hB8; // @9:273 CFG3 \dout_4[17] ( .A(middle_dout_Z[17]), .B(middle_valid_1z), .C(int_MEMRD_fwft_1[17]), .Y(dout_4_Z[17]) ); defparam \dout_4[17] .INIT=8'hB8; // @9:273 CFG3 \dout_4[18] ( .A(middle_dout_Z[18]), .B(middle_valid_1z), .C(int_MEMRD_fwft_1[18]), .Y(dout_4_Z[18]) ); defparam \dout_4[18] .INIT=8'hB8; // @9:273 CFG3 \dout_4[19] ( .A(middle_dout_Z[19]), .B(middle_valid_1z), .C(int_MEMRD_fwft_1[19]), .Y(dout_4_Z[19]) ); defparam \dout_4[19] .INIT=8'hB8; // @9:273 CFG3 \dout_4[20] ( .A(middle_dout_Z[20]), .B(middle_valid_1z), .C(int_MEMRD_fwft_1[20]), .Y(dout_4_Z[20]) ); defparam \dout_4[20] .INIT=8'hB8; // @9:273 CFG3 \dout_4[21] ( .A(middle_dout_Z[21]), .B(middle_valid_1z), .C(int_MEMRD_fwft_1[21]), .Y(dout_4_Z[21]) ); defparam \dout_4[21] .INIT=8'hB8; // @9:273 CFG3 \dout_4[22] ( .A(middle_dout_Z[22]), .B(middle_valid_1z), .C(int_MEMRD_fwft_1[22]), .Y(dout_4_Z[22]) ); defparam \dout_4[22] .INIT=8'hB8; // @9:273 CFG3 \dout_4[23] ( .A(middle_dout_Z[23]), .B(middle_valid_1z), .C(int_MEMRD_fwft_1[23]), .Y(dout_4_Z[23]) ); defparam \dout_4[23] .INIT=8'hB8; // @9:273 CFG3 \dout_4[24] ( .A(middle_dout_Z[24]), .B(middle_valid_1z), .C(int_MEMRD_fwft_1[24]), .Y(dout_4_Z[24]) ); defparam \dout_4[24] .INIT=8'hB8; // @9:273 CFG3 \dout_4[25] ( .A(middle_dout_Z[25]), .B(middle_valid_1z), .C(int_MEMRD_fwft_1[25]), .Y(dout_4_Z[25]) ); defparam \dout_4[25] .INIT=8'hB8; // @9:273 CFG3 \dout_4[26] ( .A(middle_dout_Z[26]), .B(middle_valid_1z), .C(int_MEMRD_fwft_1[26]), .Y(dout_4_Z[26]) ); defparam \dout_4[26] .INIT=8'hB8; // @9:273 CFG3 \dout_4[27] ( .A(middle_dout_Z[27]), .B(middle_valid_1z), .C(int_MEMRD_fwft_1[27]), .Y(dout_4_Z[27]) ); defparam \dout_4[27] .INIT=8'hB8; // @9:273 CFG3 \dout_4[28] ( .A(middle_dout_Z[28]), .B(middle_valid_1z), .C(int_MEMRD_fwft_1[28]), .Y(dout_4_Z[28]) ); defparam \dout_4[28] .INIT=8'hB8; // @9:273 CFG3 \dout_4[29] ( .A(middle_dout_Z[29]), .B(middle_valid_1z), .C(int_MEMRD_fwft_1[29]), .Y(dout_4_Z[29]) ); defparam \dout_4[29] .INIT=8'hB8; // @9:273 CFG3 \dout_4[30] ( .A(middle_dout_Z[30]), .B(middle_valid_1z), .C(int_MEMRD_fwft_1[30]), .Y(dout_4_Z[30]) ); defparam \dout_4[30] .INIT=8'hB8; // @9:273 CFG3 \dout_4[31] ( .A(middle_dout_Z[31]), .B(middle_valid_1z), .C(int_MEMRD_fwft_1[31]), .Y(dout_4_Z[31]) ); defparam \dout_4[31] .INIT=8'hB8; // @9:180 CFG4 update_dout ( .A(dout_valid_Z), .B(fifo_valid_1z), .C(middle_valid_1z), .D(N_976_i), .Y(update_dout_Z) ); defparam update_dout.INIT=16'hFC54; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* COREFIFO_C0_COREFIFO_C0_0_corefifo_fwft_Z4 */ module COREFIFO_C0_COREFIFO_C0_0_LSRAM_top ( CORETSE_0_MRXDAT, RDATA_int, fifo_MEMWADDR, fifo_MEMRADDR, full_r_RNI0A2M6_Y, un1_re_set6_i_0_tz, PF_CCC_0_0_OUT0_FABCLK_0 ) ; input [31:0] CORETSE_0_MRXDAT ; output [31:0] RDATA_int ; input [9:0] fifo_MEMWADDR ; input [9:0] fifo_MEMRADDR ; input full_r_RNI0A2M6_Y ; input un1_re_set6_i_0_tz ; input PF_CCC_0_0_OUT0_FABCLK_0 ; wire full_r_RNI0A2M6_Y ; wire un1_re_set6_i_0_tz ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire [19:8] COREFIFO_C0_COREFIFO_C0_0_LSRAM_top_R0C0_A_DOUT; wire [19:0] COREFIFO_C0_COREFIFO_C0_0_LSRAM_top_R0C0_B_DOUT; wire [19:8] COREFIFO_C0_COREFIFO_C0_0_LSRAM_top_R0C1_A_DOUT; wire [19:0] COREFIFO_C0_COREFIFO_C0_0_LSRAM_top_R0C1_B_DOUT; wire GND ; wire VCC ; wire COREFIFO_C0_COREFIFO_C0_0_LSRAM_top_R0C0_SB_CORRECT ; wire COREFIFO_C0_COREFIFO_C0_0_LSRAM_top_R0C0_DB_DETECT ; wire Z_ACCESS_BUSY_0__0_ ; wire COREFIFO_C0_COREFIFO_C0_0_LSRAM_top_R0C1_SB_CORRECT ; wire COREFIFO_C0_COREFIFO_C0_0_LSRAM_top_R0C1_DB_DETECT ; wire Z_ACCESS_BUSY_0__1_ ; // @11:57 RAM1K20 COREFIFO_C0_COREFIFO_C0_0_LSRAM_top_R0C0 ( .A_ADDR({fifo_MEMRADDR[9:0], GND, GND, GND, GND}), .A_BLK_EN({VCC, VCC, VCC}), .A_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .A_DIN({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND}), .A_DOUT({COREFIFO_C0_COREFIFO_C0_0_LSRAM_top_R0C0_A_DOUT[19:18], RDATA_int[15:8], COREFIFO_C0_COREFIFO_C0_0_LSRAM_top_R0C0_A_DOUT[9:8], RDATA_int[7:0]}), .A_WEN({GND, GND}), .A_REN(un1_re_set6_i_0_tz), .A_WIDTH({VCC, GND, GND}), .A_WMODE({GND, GND}), .A_BYPASS(VCC), .A_DOUT_EN(VCC), .A_DOUT_SRST_N(VCC), .A_DOUT_ARST_N(VCC), .B_ADDR({fifo_MEMWADDR[9:0], GND, GND, GND, GND}), .B_BLK_EN({full_r_RNI0A2M6_Y, VCC, VCC}), .B_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .B_DIN({GND, GND, CORETSE_0_MRXDAT[15:8], GND, GND, CORETSE_0_MRXDAT[7:0]}), .B_DOUT(COREFIFO_C0_COREFIFO_C0_0_LSRAM_top_R0C0_B_DOUT[19:0]), .B_WEN({VCC, VCC}), .B_REN(VCC), .B_WIDTH({VCC, GND, GND}), .B_WMODE({GND, GND}), .B_BYPASS(VCC), .B_DOUT_EN(VCC), .B_DOUT_SRST_N(VCC), .B_DOUT_ARST_N(GND), .ECC_EN(GND), .ECC_BYPASS(GND), .SB_CORRECT(COREFIFO_C0_COREFIFO_C0_0_LSRAM_top_R0C0_SB_CORRECT), .DB_DETECT(COREFIFO_C0_COREFIFO_C0_0_LSRAM_top_R0C0_DB_DETECT), .BUSY_FB(GND), .ACCESS_BUSY(Z_ACCESS_BUSY_0__0_) ); defparam COREFIFO_C0_COREFIFO_C0_0_LSRAM_top_R0C0.RAMINDEX="core%1024-1024%32-32%SPEED%0%0%TWO-PORT%ECC_EN-0"; // @11:30 RAM1K20 COREFIFO_C0_COREFIFO_C0_0_LSRAM_top_R0C1 ( .A_ADDR({fifo_MEMRADDR[9:0], GND, GND, GND, GND}), .A_BLK_EN({VCC, VCC, VCC}), .A_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .A_DIN({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND}), .A_DOUT({COREFIFO_C0_COREFIFO_C0_0_LSRAM_top_R0C1_A_DOUT[19:18], RDATA_int[31:24], COREFIFO_C0_COREFIFO_C0_0_LSRAM_top_R0C1_A_DOUT[9:8], RDATA_int[23:16]}), .A_WEN({GND, GND}), .A_REN(un1_re_set6_i_0_tz), .A_WIDTH({VCC, GND, GND}), .A_WMODE({GND, GND}), .A_BYPASS(VCC), .A_DOUT_EN(VCC), .A_DOUT_SRST_N(VCC), .A_DOUT_ARST_N(VCC), .B_ADDR({fifo_MEMWADDR[9:0], GND, GND, GND, GND}), .B_BLK_EN({full_r_RNI0A2M6_Y, VCC, VCC}), .B_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .B_DIN({GND, GND, CORETSE_0_MRXDAT[31:24], GND, GND, CORETSE_0_MRXDAT[23:16]}), .B_DOUT(COREFIFO_C0_COREFIFO_C0_0_LSRAM_top_R0C1_B_DOUT[19:0]), .B_WEN({VCC, VCC}), .B_REN(VCC), .B_WIDTH({VCC, GND, GND}), .B_WMODE({GND, GND}), .B_BYPASS(VCC), .B_DOUT_EN(VCC), .B_DOUT_SRST_N(VCC), .B_DOUT_ARST_N(GND), .ECC_EN(GND), .ECC_BYPASS(GND), .SB_CORRECT(COREFIFO_C0_COREFIFO_C0_0_LSRAM_top_R0C1_SB_CORRECT), .DB_DETECT(COREFIFO_C0_COREFIFO_C0_0_LSRAM_top_R0C1_DB_DETECT), .BUSY_FB(GND), .ACCESS_BUSY(Z_ACCESS_BUSY_0__1_) ); defparam COREFIFO_C0_COREFIFO_C0_0_LSRAM_top_R0C1.RAMINDEX="core%1024-1024%32-32%SPEED%0%1%TWO-PORT%ECC_EN-0"; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* COREFIFO_C0_COREFIFO_C0_0_LSRAM_top */ module COREFIFO_C0_COREFIFO_C0_0_ram_wrapper_32s_32s_10_10_1s_1s_2s_0s_0s ( fifo_MEMRADDR, fifo_MEMWADDR, RDATA_int, CORETSE_0_MRXDAT, PF_CCC_0_0_OUT0_FABCLK_0, un1_re_set6_i_0_tz, full_r_RNI0A2M6_Y ) ; input [9:0] fifo_MEMRADDR ; input [9:0] fifo_MEMWADDR ; output [31:0] RDATA_int ; input [31:0] CORETSE_0_MRXDAT ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input un1_re_set6_i_0_tz ; input full_r_RNI0A2M6_Y ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire un1_re_set6_i_0_tz ; wire full_r_RNI0A2M6_Y ; wire GND ; wire VCC ; // @12:53 COREFIFO_C0_COREFIFO_C0_0_LSRAM_top L3_syncnonpipe ( .CORETSE_0_MRXDAT(CORETSE_0_MRXDAT[31:0]), .RDATA_int(RDATA_int[31:0]), .fifo_MEMWADDR(fifo_MEMWADDR[9:0]), .fifo_MEMRADDR(fifo_MEMRADDR[9:0]), .full_r_RNI0A2M6_Y(full_r_RNI0A2M6_Y), .un1_re_set6_i_0_tz(un1_re_set6_i_0_tz), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* COREFIFO_C0_COREFIFO_C0_0_ram_wrapper_32s_32s_10_10_1s_1s_2s_0s_0s */ module COREFIFO_C0_COREFIFO_C0_0_COREFIFO_Z2 ( CORETSE_0_MRXDAT, COREFIFO_C0_0_Q, O0Il1_0, COREFIFO_C0_0_EMPTY, N_976_i, PF_CCC_0_0_OUT0_FABCLK_0, AND2_2_Y ) ; input [31:0] CORETSE_0_MRXDAT ; output [31:0] COREFIFO_C0_0_Q ; input O0Il1_0 ; output COREFIFO_C0_0_EMPTY ; input N_976_i ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input AND2_2_Y ; wire O0Il1_0 ; wire COREFIFO_C0_0_EMPTY ; wire N_976_i ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire AND2_2_Y ; wire [31:0] RDATA_r_Z; wire [31:0] RDATA_int; wire [6:0] int_MEMRD_fwft_1_i_m2_Z; wire [31:3] int_MEMRD_fwft_1_Z; wire [9:0] fifo_MEMRADDR; wire [9:0] fifo_MEMWADDR; wire RE_d1_Z ; wire VCC ; wire GND ; wire REN_d1_Z ; wire un1_re_set6_i_0_tz ; wire re_set_Z ; wire N_968_i ; wire N_969_i ; wire EMPTY1 ; wire fifo_valid ; wire middle_valid ; wire full_r_RNI0A2M6_Y ; wire N_14980 ; // @13:1100 SLE RE_d1 ( .Q(RE_d1_Z), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_976_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @13:1100 SLE REN_d1 ( .Q(REN_d1_Z), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un1_re_set6_i_0_tz), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @13:1030 SLE re_set ( .Q(re_set_Z), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(REN_d1_Z), .EN(N_968_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @13:1045 SLE \RDATA_r[6] ( .Q(RDATA_r_Z[6]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(RDATA_int[6]), .EN(N_969_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @13:1045 SLE \RDATA_r[5] ( .Q(RDATA_r_Z[5]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(RDATA_int[5]), .EN(N_969_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @13:1045 SLE \RDATA_r[4] ( .Q(RDATA_r_Z[4]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(RDATA_int[4]), .EN(N_969_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @13:1045 SLE \RDATA_r[3] ( .Q(RDATA_r_Z[3]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(RDATA_int[3]), .EN(N_969_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @13:1045 SLE \RDATA_r[2] ( .Q(RDATA_r_Z[2]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(RDATA_int[2]), .EN(N_969_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @13:1045 SLE \RDATA_r[1] ( .Q(RDATA_r_Z[1]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(RDATA_int[1]), .EN(N_969_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @13:1045 SLE \RDATA_r[0] ( .Q(RDATA_r_Z[0]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(RDATA_int[0]), .EN(N_969_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @13:1045 SLE \RDATA_r[21] ( .Q(RDATA_r_Z[21]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(RDATA_int[21]), .EN(N_969_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @13:1045 SLE \RDATA_r[20] ( .Q(RDATA_r_Z[20]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(RDATA_int[20]), .EN(N_969_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @13:1045 SLE \RDATA_r[19] ( .Q(RDATA_r_Z[19]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(RDATA_int[19]), .EN(N_969_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @13:1045 SLE \RDATA_r[18] ( .Q(RDATA_r_Z[18]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(RDATA_int[18]), .EN(N_969_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @13:1045 SLE \RDATA_r[17] ( .Q(RDATA_r_Z[17]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(RDATA_int[17]), .EN(N_969_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @13:1045 SLE \RDATA_r[16] ( .Q(RDATA_r_Z[16]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(RDATA_int[16]), .EN(N_969_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @13:1045 SLE \RDATA_r[15] ( .Q(RDATA_r_Z[15]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(RDATA_int[15]), .EN(N_969_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @13:1045 SLE \RDATA_r[14] ( .Q(RDATA_r_Z[14]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(RDATA_int[14]), .EN(N_969_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @13:1045 SLE \RDATA_r[13] ( .Q(RDATA_r_Z[13]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(RDATA_int[13]), .EN(N_969_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @13:1045 SLE \RDATA_r[12] ( .Q(RDATA_r_Z[12]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(RDATA_int[12]), .EN(N_969_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @13:1045 SLE \RDATA_r[11] ( .Q(RDATA_r_Z[11]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(RDATA_int[11]), .EN(N_969_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @13:1045 SLE \RDATA_r[10] ( .Q(RDATA_r_Z[10]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(RDATA_int[10]), .EN(N_969_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @13:1045 SLE \RDATA_r[9] ( .Q(RDATA_r_Z[9]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(RDATA_int[9]), .EN(N_969_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @13:1045 SLE \RDATA_r[8] ( .Q(RDATA_r_Z[8]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(RDATA_int[8]), .EN(N_969_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @13:1045 SLE \RDATA_r[7] ( .Q(RDATA_r_Z[7]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(RDATA_int[7]), .EN(N_969_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @13:1045 SLE \RDATA_r[31] ( .Q(RDATA_r_Z[31]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(RDATA_int[31]), .EN(N_969_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @13:1045 SLE \RDATA_r[30] ( .Q(RDATA_r_Z[30]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(RDATA_int[30]), .EN(N_969_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @13:1045 SLE \RDATA_r[29] ( .Q(RDATA_r_Z[29]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(RDATA_int[29]), .EN(N_969_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @13:1045 SLE \RDATA_r[28] ( .Q(RDATA_r_Z[28]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(RDATA_int[28]), .EN(N_969_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @13:1045 SLE \RDATA_r[27] ( .Q(RDATA_r_Z[27]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(RDATA_int[27]), .EN(N_969_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @13:1045 SLE \RDATA_r[26] ( .Q(RDATA_r_Z[26]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(RDATA_int[26]), .EN(N_969_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @13:1045 SLE \RDATA_r[25] ( .Q(RDATA_r_Z[25]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(RDATA_int[25]), .EN(N_969_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @13:1045 SLE \RDATA_r[24] ( .Q(RDATA_r_Z[24]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(RDATA_int[24]), .EN(N_969_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @13:1045 SLE \RDATA_r[23] ( .Q(RDATA_r_Z[23]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(RDATA_int[23]), .EN(N_969_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @13:1045 SLE \RDATA_r[22] ( .Q(RDATA_r_Z[22]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(RDATA_int[22]), .EN(N_969_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @13:1050 CFG3 RDATA_r4_i_o2 ( .A(EMPTY1), .B(fifo_valid), .C(middle_valid), .Y(un1_re_set6_i_0_tz) ); defparam RDATA_r4_i_o2.INIT=8'h15; // @13:1129 CFG4 \int_MEMRD_fwft_1_i_m2[6] ( .A(re_set_Z), .B(RDATA_r_Z[6]), .C(RDATA_int[6]), .D(RE_d1_Z), .Y(int_MEMRD_fwft_1_i_m2_Z[6]) ); defparam \int_MEMRD_fwft_1_i_m2[6] .INIT=16'hF0D8; // @13:1129 CFG4 \int_MEMRD_fwft_1_i_m2[2] ( .A(re_set_Z), .B(RDATA_r_Z[2]), .C(RDATA_int[2]), .D(RE_d1_Z), .Y(int_MEMRD_fwft_1_i_m2_Z[2]) ); defparam \int_MEMRD_fwft_1_i_m2[2] .INIT=16'hF0D8; // @13:1129 CFG4 \int_MEMRD_fwft_1_i_m2[1] ( .A(re_set_Z), .B(RDATA_r_Z[1]), .C(RDATA_int[1]), .D(RE_d1_Z), .Y(int_MEMRD_fwft_1_i_m2_Z[1]) ); defparam \int_MEMRD_fwft_1_i_m2[1] .INIT=16'hF0D8; // @13:1129 CFG4 \int_MEMRD_fwft_1_i_m2[0] ( .A(re_set_Z), .B(RDATA_r_Z[0]), .C(RDATA_int[0]), .D(RE_d1_Z), .Y(int_MEMRD_fwft_1_i_m2_Z[0]) ); defparam \int_MEMRD_fwft_1_i_m2[0] .INIT=16'hF0D8; // @13:1129 CFG4 \int_MEMRD_fwft_1[8] ( .A(re_set_Z), .B(RDATA_r_Z[8]), .C(RDATA_int[8]), .D(RE_d1_Z), .Y(int_MEMRD_fwft_1_Z[8]) ); defparam \int_MEMRD_fwft_1[8] .INIT=16'hF0D8; // @13:1129 CFG4 \int_MEMRD_fwft_1[7] ( .A(re_set_Z), .B(RDATA_r_Z[7]), .C(RDATA_int[7]), .D(RE_d1_Z), .Y(int_MEMRD_fwft_1_Z[7]) ); defparam \int_MEMRD_fwft_1[7] .INIT=16'hF0D8; // @13:1129 CFG4 \int_MEMRD_fwft_1[5] ( .A(re_set_Z), .B(RDATA_r_Z[5]), .C(RDATA_int[5]), .D(RE_d1_Z), .Y(int_MEMRD_fwft_1_Z[5]) ); defparam \int_MEMRD_fwft_1[5] .INIT=16'hF0D8; // @13:1129 CFG4 \int_MEMRD_fwft_1[4] ( .A(re_set_Z), .B(RDATA_r_Z[4]), .C(RDATA_int[4]), .D(RE_d1_Z), .Y(int_MEMRD_fwft_1_Z[4]) ); defparam \int_MEMRD_fwft_1[4] .INIT=16'hF0D8; // @13:1129 CFG4 \int_MEMRD_fwft_1[3] ( .A(re_set_Z), .B(RDATA_r_Z[3]), .C(RDATA_int[3]), .D(RE_d1_Z), .Y(int_MEMRD_fwft_1_Z[3]) ); defparam \int_MEMRD_fwft_1[3] .INIT=16'hF0D8; // @13:1129 CFG4 \int_MEMRD_fwft_1[9] ( .A(re_set_Z), .B(RDATA_r_Z[9]), .C(RDATA_int[9]), .D(RE_d1_Z), .Y(int_MEMRD_fwft_1_Z[9]) ); defparam \int_MEMRD_fwft_1[9] .INIT=16'hF0D8; // @13:1129 CFG4 \int_MEMRD_fwft_1[10] ( .A(re_set_Z), .B(RDATA_r_Z[10]), .C(RDATA_int[10]), .D(RE_d1_Z), .Y(int_MEMRD_fwft_1_Z[10]) ); defparam \int_MEMRD_fwft_1[10] .INIT=16'hF0D8; // @13:1129 CFG4 \int_MEMRD_fwft_1[11] ( .A(re_set_Z), .B(RDATA_r_Z[11]), .C(RDATA_int[11]), .D(RE_d1_Z), .Y(int_MEMRD_fwft_1_Z[11]) ); defparam \int_MEMRD_fwft_1[11] .INIT=16'hF0D8; // @13:1129 CFG4 \int_MEMRD_fwft_1[12] ( .A(re_set_Z), .B(RDATA_r_Z[12]), .C(RDATA_int[12]), .D(RE_d1_Z), .Y(int_MEMRD_fwft_1_Z[12]) ); defparam \int_MEMRD_fwft_1[12] .INIT=16'hF0D8; // @13:1129 CFG4 \int_MEMRD_fwft_1[13] ( .A(re_set_Z), .B(RDATA_r_Z[13]), .C(RDATA_int[13]), .D(RE_d1_Z), .Y(int_MEMRD_fwft_1_Z[13]) ); defparam \int_MEMRD_fwft_1[13] .INIT=16'hF0D8; // @13:1129 CFG4 \int_MEMRD_fwft_1[14] ( .A(re_set_Z), .B(RDATA_r_Z[14]), .C(RDATA_int[14]), .D(RE_d1_Z), .Y(int_MEMRD_fwft_1_Z[14]) ); defparam \int_MEMRD_fwft_1[14] .INIT=16'hF0D8; // @13:1129 CFG4 \int_MEMRD_fwft_1[15] ( .A(re_set_Z), .B(RDATA_r_Z[15]), .C(RDATA_int[15]), .D(RE_d1_Z), .Y(int_MEMRD_fwft_1_Z[15]) ); defparam \int_MEMRD_fwft_1[15] .INIT=16'hF0D8; // @13:1129 CFG4 \int_MEMRD_fwft_1[16] ( .A(re_set_Z), .B(RDATA_r_Z[16]), .C(RDATA_int[16]), .D(RE_d1_Z), .Y(int_MEMRD_fwft_1_Z[16]) ); defparam \int_MEMRD_fwft_1[16] .INIT=16'hF0D8; // @13:1129 CFG4 \int_MEMRD_fwft_1[17] ( .A(re_set_Z), .B(RDATA_r_Z[17]), .C(RDATA_int[17]), .D(RE_d1_Z), .Y(int_MEMRD_fwft_1_Z[17]) ); defparam \int_MEMRD_fwft_1[17] .INIT=16'hF0D8; // @13:1129 CFG4 \int_MEMRD_fwft_1[18] ( .A(re_set_Z), .B(RDATA_r_Z[18]), .C(RDATA_int[18]), .D(RE_d1_Z), .Y(int_MEMRD_fwft_1_Z[18]) ); defparam \int_MEMRD_fwft_1[18] .INIT=16'hF0D8; // @13:1129 CFG4 \int_MEMRD_fwft_1[19] ( .A(re_set_Z), .B(RDATA_r_Z[19]), .C(RDATA_int[19]), .D(RE_d1_Z), .Y(int_MEMRD_fwft_1_Z[19]) ); defparam \int_MEMRD_fwft_1[19] .INIT=16'hF0D8; // @13:1129 CFG4 \int_MEMRD_fwft_1[20] ( .A(re_set_Z), .B(RDATA_r_Z[20]), .C(RDATA_int[20]), .D(RE_d1_Z), .Y(int_MEMRD_fwft_1_Z[20]) ); defparam \int_MEMRD_fwft_1[20] .INIT=16'hF0D8; // @13:1129 CFG4 \int_MEMRD_fwft_1[21] ( .A(re_set_Z), .B(RDATA_r_Z[21]), .C(RDATA_int[21]), .D(RE_d1_Z), .Y(int_MEMRD_fwft_1_Z[21]) ); defparam \int_MEMRD_fwft_1[21] .INIT=16'hF0D8; // @13:1129 CFG4 \int_MEMRD_fwft_1[22] ( .A(re_set_Z), .B(RDATA_r_Z[22]), .C(RDATA_int[22]), .D(RE_d1_Z), .Y(int_MEMRD_fwft_1_Z[22]) ); defparam \int_MEMRD_fwft_1[22] .INIT=16'hF0D8; // @13:1129 CFG4 \int_MEMRD_fwft_1[23] ( .A(re_set_Z), .B(RDATA_r_Z[23]), .C(RDATA_int[23]), .D(RE_d1_Z), .Y(int_MEMRD_fwft_1_Z[23]) ); defparam \int_MEMRD_fwft_1[23] .INIT=16'hF0D8; // @13:1129 CFG4 \int_MEMRD_fwft_1[24] ( .A(re_set_Z), .B(RDATA_r_Z[24]), .C(RDATA_int[24]), .D(RE_d1_Z), .Y(int_MEMRD_fwft_1_Z[24]) ); defparam \int_MEMRD_fwft_1[24] .INIT=16'hF0D8; // @13:1129 CFG4 \int_MEMRD_fwft_1[25] ( .A(re_set_Z), .B(RDATA_r_Z[25]), .C(RDATA_int[25]), .D(RE_d1_Z), .Y(int_MEMRD_fwft_1_Z[25]) ); defparam \int_MEMRD_fwft_1[25] .INIT=16'hF0D8; // @13:1129 CFG4 \int_MEMRD_fwft_1[26] ( .A(re_set_Z), .B(RDATA_r_Z[26]), .C(RDATA_int[26]), .D(RE_d1_Z), .Y(int_MEMRD_fwft_1_Z[26]) ); defparam \int_MEMRD_fwft_1[26] .INIT=16'hF0D8; // @13:1129 CFG4 \int_MEMRD_fwft_1[27] ( .A(re_set_Z), .B(RDATA_r_Z[27]), .C(RDATA_int[27]), .D(RE_d1_Z), .Y(int_MEMRD_fwft_1_Z[27]) ); defparam \int_MEMRD_fwft_1[27] .INIT=16'hF0D8; // @13:1129 CFG4 \int_MEMRD_fwft_1[28] ( .A(re_set_Z), .B(RDATA_r_Z[28]), .C(RDATA_int[28]), .D(RE_d1_Z), .Y(int_MEMRD_fwft_1_Z[28]) ); defparam \int_MEMRD_fwft_1[28] .INIT=16'hF0D8; // @13:1129 CFG4 \int_MEMRD_fwft_1[29] ( .A(re_set_Z), .B(RDATA_r_Z[29]), .C(RDATA_int[29]), .D(RE_d1_Z), .Y(int_MEMRD_fwft_1_Z[29]) ); defparam \int_MEMRD_fwft_1[29] .INIT=16'hF0D8; // @13:1129 CFG4 \int_MEMRD_fwft_1[30] ( .A(re_set_Z), .B(RDATA_r_Z[30]), .C(RDATA_int[30]), .D(RE_d1_Z), .Y(int_MEMRD_fwft_1_Z[30]) ); defparam \int_MEMRD_fwft_1[30] .INIT=16'hF0D8; // @13:1129 CFG4 \int_MEMRD_fwft_1[31] ( .A(re_set_Z), .B(RDATA_r_Z[31]), .C(RDATA_int[31]), .D(RE_d1_Z), .Y(int_MEMRD_fwft_1_Z[31]) ); defparam \int_MEMRD_fwft_1[31] .INIT=16'hF0D8; // @13:1045 CFG2 REN_d1_RNI2T40D ( .A(un1_re_set6_i_0_tz), .B(REN_d1_Z), .Y(N_969_i) ); defparam REN_d1_RNI2T40D.INIT=4'h4; // @13:1030 CFG2 re_set_RNO ( .A(un1_re_set6_i_0_tz), .B(REN_d1_Z), .Y(N_968_i) ); defparam re_set_RNO.INIT=4'h6; // @13:603 COREFIFO_C0_COREFIFO_C0_0_corefifo_sync_scntr_Z3 \genblk16.fifo_corefifo_sync_scntr ( .O0Il1_0(O0Il1_0), .fifo_MEMRADDR(fifo_MEMRADDR[9:0]), .fifo_MEMWADDR(fifo_MEMWADDR[9:0]), .middle_valid(middle_valid), .fifo_valid(fifo_valid), .N_976_i(N_976_i), .EMPTY1(EMPTY1), .un1_re_set6_i_0_tz(un1_re_set6_i_0_tz), .full_r_RNI0A2M6_Y(full_r_RNI0A2M6_Y), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .AND2_2_Y(AND2_2_Y) ); // @13:974 COREFIFO_C0_COREFIFO_C0_0_corefifo_fwft_Z4 \genblk17.u_corefifo_fwft ( .int_MEMRD_fwft_1({int_MEMRD_fwft_1_Z[31:7], N_14980, int_MEMRD_fwft_1_Z[5:3]}), .int_MEMRD_fwft_1_i_m2_2(int_MEMRD_fwft_1_i_m2_Z[2]), .int_MEMRD_fwft_1_i_m2_1(int_MEMRD_fwft_1_i_m2_Z[1]), .int_MEMRD_fwft_1_i_m2_0(int_MEMRD_fwft_1_i_m2_Z[0]), .int_MEMRD_fwft_1_i_m2_6(int_MEMRD_fwft_1_i_m2_Z[6]), .COREFIFO_C0_0_Q(COREFIFO_C0_0_Q[31:0]), .EMPTY1(EMPTY1), .N_976_i(N_976_i), .un1_re_set6_i_0_tz(un1_re_set6_i_0_tz), .fifo_valid_1z(fifo_valid), .middle_valid_1z(middle_valid), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .AND2_2_Y(AND2_2_Y), .COREFIFO_C0_0_EMPTY(COREFIFO_C0_0_EMPTY) ); // @13:1220 COREFIFO_C0_COREFIFO_C0_0_ram_wrapper_32s_32s_10_10_1s_1s_2s_0s_0s \genblk22.UI_ram_wrapper_1 ( .fifo_MEMRADDR(fifo_MEMRADDR[9:0]), .fifo_MEMWADDR(fifo_MEMWADDR[9:0]), .RDATA_int(RDATA_int[31:0]), .CORETSE_0_MRXDAT(CORETSE_0_MRXDAT[31:0]), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .un1_re_set6_i_0_tz(un1_re_set6_i_0_tz), .full_r_RNI0A2M6_Y(full_r_RNI0A2M6_Y) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* COREFIFO_C0_COREFIFO_C0_0_COREFIFO_Z2 */ module COREFIFO_C0 ( O0Il1_0, COREFIFO_C0_0_Q, CORETSE_0_MRXDAT, AND2_2_Y, PF_CCC_0_0_OUT0_FABCLK_0, N_976_i, COREFIFO_C0_0_EMPTY ) ; input O0Il1_0 ; output [31:0] COREFIFO_C0_0_Q ; input [31:0] CORETSE_0_MRXDAT ; input AND2_2_Y ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input N_976_i ; output COREFIFO_C0_0_EMPTY ; wire O0Il1_0 ; wire AND2_2_Y ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire N_976_i ; wire COREFIFO_C0_0_EMPTY ; wire GND ; wire VCC ; // @14:143 COREFIFO_C0_COREFIFO_C0_0_COREFIFO_Z2 COREFIFO_C0_0 ( .CORETSE_0_MRXDAT(CORETSE_0_MRXDAT[31:0]), .COREFIFO_C0_0_Q(COREFIFO_C0_0_Q[31:0]), .O0Il1_0(O0Il1_0), .COREFIFO_C0_0_EMPTY(COREFIFO_C0_0_EMPTY), .N_976_i(N_976_i), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .AND2_2_Y(AND2_2_Y) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* COREFIFO_C0 */ module spi_rf_32s_16s_0 ( CoreAPB3_0_0_APBmslave2_PRDATA_7, CoreAPB3_0_0_APBmslave2_PRDATA_6, CoreAPB3_0_0_APBmslave2_PRDATA_5, CoreAPB3_0_0_APBmslave2_PRDATA_1, CoreAPB3_0_0_APBmslave2_PRDATA_0, rx_fifo_data_out_7, rx_fifo_data_out_6, rx_fifo_data_out_5, rx_fifo_data_out_1, rx_fifo_data_out_0, rdata, fifo_mem_q_0, paddr_0, CoreAPB3_0_0_APBmslave0_PADDR_1, CoreAPB3_0_0_APBmslave0_PADDR_3, CoreAPB3_0_0_APBmslave0_PADDR_0, PADDR_1z_0, cfg_cmdsize, CoreAPB3_0_0_APBmslave0_PWDATA, clk_div_val, wrdata_0, un1_PADDR, un4_busy, active_1, rx_pktend, full_out, rx_fifo_write, rx_cmdsize, SYNC3_stxp_dataerr, SYNC2_stxp_dataerr, tx_fifo_write, rx_done, rx_fifo_read, tx_done, SPISS_c, master_ssel_out, PWRITE_m_1z, tx_fifo_write_sig14, CoreAPB3_0_0_APBmslave0_PWRITE, prdata_1, rx_fifo_empty, tx_fifo_full, un1_PADDR_2_1z, cfg_enable, SPIMODE, cfg_frameurun, clr_rxfifo_1z, PF_CCC_0_0_OUT0_FABCLK_0, dff, clr_txfifo_1z ) ; output CoreAPB3_0_0_APBmslave2_PRDATA_7 ; output CoreAPB3_0_0_APBmslave2_PRDATA_6 ; output CoreAPB3_0_0_APBmslave2_PRDATA_5 ; output CoreAPB3_0_0_APBmslave2_PRDATA_1 ; output CoreAPB3_0_0_APBmslave2_PRDATA_0 ; input rx_fifo_data_out_7 ; input rx_fifo_data_out_6 ; input rx_fifo_data_out_5 ; input rx_fifo_data_out_1 ; input rx_fifo_data_out_0 ; output [4:2] rdata ; input fifo_mem_q_0 ; input paddr_0 ; input CoreAPB3_0_0_APBmslave0_PADDR_1 ; input CoreAPB3_0_0_APBmslave0_PADDR_3 ; input CoreAPB3_0_0_APBmslave0_PADDR_0 ; input PADDR_1z_0 ; output [2:0] cfg_cmdsize ; input [7:1] CoreAPB3_0_0_APBmslave0_PWDATA ; output [7:0] clk_div_val ; input wrdata_0 ; input un1_PADDR ; input un4_busy ; input active_1 ; input rx_pktend ; input full_out ; input rx_fifo_write ; input rx_cmdsize ; input SYNC3_stxp_dataerr ; input SYNC2_stxp_dataerr ; input tx_fifo_write ; input rx_done ; input rx_fifo_read ; input tx_done ; output SPISS_c ; input master_ssel_out ; output PWRITE_m_1z ; input tx_fifo_write_sig14 ; input CoreAPB3_0_0_APBmslave0_PWRITE ; input prdata_1 ; input rx_fifo_empty ; input tx_fifo_full ; output un1_PADDR_2_1z ; output cfg_enable ; output SPIMODE ; output cfg_frameurun ; output clr_rxfifo_1z ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input dff ; output clr_txfifo_1z ; wire CoreAPB3_0_0_APBmslave2_PRDATA_7 ; wire CoreAPB3_0_0_APBmslave2_PRDATA_6 ; wire CoreAPB3_0_0_APBmslave2_PRDATA_5 ; wire CoreAPB3_0_0_APBmslave2_PRDATA_1 ; wire CoreAPB3_0_0_APBmslave2_PRDATA_0 ; wire rx_fifo_data_out_7 ; wire rx_fifo_data_out_6 ; wire rx_fifo_data_out_5 ; wire rx_fifo_data_out_1 ; wire rx_fifo_data_out_0 ; wire fifo_mem_q_0 ; wire paddr_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_1 ; wire CoreAPB3_0_0_APBmslave0_PADDR_3 ; wire CoreAPB3_0_0_APBmslave0_PADDR_0 ; wire PADDR_1z_0 ; wire wrdata_0 ; wire un1_PADDR ; wire un4_busy ; wire active_1 ; wire rx_pktend ; wire full_out ; wire rx_fifo_write ; wire rx_cmdsize ; wire SYNC3_stxp_dataerr ; wire SYNC2_stxp_dataerr ; wire tx_fifo_write ; wire rx_done ; wire rx_fifo_read ; wire tx_done ; wire SPISS_c ; wire master_ssel_out ; wire PWRITE_m_1z ; wire tx_fifo_write_sig14 ; wire CoreAPB3_0_0_APBmslave0_PWRITE ; wire prdata_1 ; wire rx_fifo_empty ; wire tx_fifo_full ; wire un1_PADDR_2_1z ; wire cfg_enable ; wire SPIMODE ; wire cfg_frameurun ; wire clr_rxfifo_1z ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire dff ; wire clr_txfifo_1z ; wire [7:0] int_raw_Z; wire [7:7] int_raw_51_Z; wire [6:6] int_raw_48_Z; wire [5:5] int_raw_45_Z; wire [4:4] int_raw_42_Z; wire [3:3] int_raw_39_Z; wire [2:2] int_raw_36_Z; wire [1:1] int_raw_33_Z; wire [0:0] int_raw_30; wire [7:0] cfg_ssel_Z; wire [7:2] control1_Z; wire [7:4] control2_Z; wire [1:0] sticky_Z; wire [1:1] sticky_13_iv_i_Z; wire [0:0] sticky_10_iv_i_Z; wire [1:1] status_byte_Z; wire [3:2] int_raw_27_Z; wire [7:0] rdata_Z; wire VCC ; wire clr_txfifo_5_Z ; wire GND ; wire clr_rxfifo_5_Z ; wire un1_cfg_ssel_1_sqmuxa_1_i ; wire un1_cfg_ssel_1_sqmuxa_i ; wire un1_cfg_ssel_1_sqmuxa_2_i ; wire control2_1_sqmuxa_Z ; wire rdata_sn_N_20_mux ; wire N_126_2 ; wire N_126 ; wire N_125_1 ; wire N_127_1 ; wire N_132_1 ; wire N_129_1 ; wire N_131_1 ; wire N_130_1 ; wire clr_txfifo_3_sqmuxa_1_Z ; wire rdata_sn_N_12 ; wire N_81 ; wire N_91 ; wire N_82 ; wire N_80 ; wire N_83 ; wire clr_txfifo_3_sqmuxa_2_Z ; wire int_raw_1_sqmuxa_0 ; wire un1_cfg_ssel_1_sqmuxa_2_1_Z ; wire rdata_sn_N_18_mux ; wire un1_cfg_ssel_1_sqmuxa_1_2_Z ; wire rdata_sn_N_19_mux ; wire int_raw_1_sqmuxa_Z ; wire N_101 ; wire N_102 ; wire N_100 ; wire N_103 ; wire N_104 ; wire N_84 ; wire N_105 ; wire N_98 ; wire N_78 ; wire N_125_2 ; wire N_127_2 ; wire N_132_2 ; wire N_129_2 ; wire N_131_2 ; wire N_130_2 ; wire N_117_2 ; wire N_117_1 ; wire N_119 ; wire N_120 ; wire N_118 ; wire N_121 ; wire N_122 ; wire N_116 ; wire N_85 ; wire N_123 ; wire control113_Z ; // @23:134 SLE clr_txfifo ( .Q(clr_txfifo_1z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(clr_txfifo_5_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE clr_rxfifo ( .Q(clr_rxfifo_1z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(clr_rxfifo_5_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \CLK_DIV[0] ( .Q(clk_div_val[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(un1_cfg_ssel_1_sqmuxa_1_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \int_raw[7] ( .Q(int_raw_Z[7]), .ADn(GND), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_raw_51_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \int_raw[6] ( .Q(int_raw_Z[6]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_raw_48_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \int_raw[5] ( .Q(int_raw_Z[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_raw_45_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \int_raw[4] ( .Q(int_raw_Z[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_raw_42_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \int_raw[3] ( .Q(int_raw_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_raw_39_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \int_raw[2] ( .Q(int_raw_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_raw_36_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \int_raw[1] ( .Q(int_raw_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_raw_33_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \int_raw[0] ( .Q(int_raw_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(int_raw_30[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \CLK_DIV[7] ( .Q(clk_div_val[7]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .EN(un1_cfg_ssel_1_sqmuxa_1_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \CLK_DIV[6] ( .Q(clk_div_val[6]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(un1_cfg_ssel_1_sqmuxa_1_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \CLK_DIV[5] ( .Q(clk_div_val[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(un1_cfg_ssel_1_sqmuxa_1_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \CLK_DIV[4] ( .Q(clk_div_val[4]), .ADn(GND), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(un1_cfg_ssel_1_sqmuxa_1_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \CLK_DIV[3] ( .Q(clk_div_val[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(un1_cfg_ssel_1_sqmuxa_1_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \CLK_DIV[2] ( .Q(clk_div_val[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(un1_cfg_ssel_1_sqmuxa_1_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \CLK_DIV[1] ( .Q(clk_div_val[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(un1_cfg_ssel_1_sqmuxa_1_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \cfg_ssel[5] ( .Q(cfg_ssel_Z[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(un1_cfg_ssel_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \cfg_ssel[4] ( .Q(cfg_ssel_Z[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(un1_cfg_ssel_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \cfg_ssel[3] ( .Q(cfg_ssel_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(un1_cfg_ssel_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \cfg_ssel[2] ( .Q(cfg_ssel_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(un1_cfg_ssel_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \cfg_ssel[1] ( .Q(cfg_ssel_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(un1_cfg_ssel_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \cfg_ssel[0] ( .Q(cfg_ssel_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(un1_cfg_ssel_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \control1[7] ( .Q(control1_Z[7]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .EN(un1_cfg_ssel_1_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \control1[6] ( .Q(cfg_frameurun), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(un1_cfg_ssel_1_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \control1[5] ( .Q(control1_Z[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(un1_cfg_ssel_1_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \control1[4] ( .Q(control1_Z[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(un1_cfg_ssel_1_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \control1[3] ( .Q(control1_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(un1_cfg_ssel_1_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \control1[2] ( .Q(control1_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(un1_cfg_ssel_1_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \control1[1] ( .Q(SPIMODE), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(un1_cfg_ssel_1_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \control1[0] ( .Q(cfg_enable), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(un1_cfg_ssel_1_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \control2[4] ( .Q(control2_Z[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(control2_1_sqmuxa_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \control2[3] ( .Q(cfg_cmdsize[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(control2_1_sqmuxa_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \control2[2] ( .Q(cfg_cmdsize[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(control2_1_sqmuxa_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \control2[1] ( .Q(cfg_cmdsize[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(control2_1_sqmuxa_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \sticky[1] ( .Q(sticky_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sticky_13_iv_i_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \sticky[0] ( .Q(sticky_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sticky_10_iv_i_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \cfg_ssel[7] ( .Q(cfg_ssel_Z[7]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .EN(un1_cfg_ssel_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \cfg_ssel[6] ( .Q(cfg_ssel_Z[6]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(un1_cfg_ssel_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \control2[7] ( .Q(control2_Z[7]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .EN(control2_1_sqmuxa_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \control2[6] ( .Q(control2_Z[6]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(control2_1_sqmuxa_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:134 SLE \control2[5] ( .Q(control2_Z[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(control2_1_sqmuxa_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @23:220 CFG3 \rdata_5[1] ( .A(rdata_sn_N_20_mux), .B(cfg_cmdsize[1]), .C(N_126_2), .Y(N_126) ); defparam \rdata_5[1] .INIT=8'hF8; // @23:220 CFG2 \rdata_5_1[0] ( .A(rdata_sn_N_20_mux), .B(cfg_cmdsize[0]), .Y(N_125_1) ); defparam \rdata_5_1[0] .INIT=4'h8; // @23:220 CFG2 \rdata_5_1[2] ( .A(rdata_sn_N_20_mux), .B(cfg_cmdsize[2]), .Y(N_127_1) ); defparam \rdata_5_1[2] .INIT=4'h8; // @23:220 CFG2 \rdata_5_1[7] ( .A(rdata_sn_N_20_mux), .B(control2_Z[7]), .Y(N_132_1) ); defparam \rdata_5_1[7] .INIT=4'h8; // @23:220 CFG2 \rdata_5_1[4] ( .A(rdata_sn_N_20_mux), .B(control2_Z[4]), .Y(N_129_1) ); defparam \rdata_5_1[4] .INIT=4'h8; // @23:220 CFG2 \rdata_5_1[6] ( .A(rdata_sn_N_20_mux), .B(control2_Z[6]), .Y(N_131_1) ); defparam \rdata_5_1[6] .INIT=4'h8; // @23:220 CFG2 \rdata_5_1[5] ( .A(rdata_sn_N_20_mux), .B(control2_Z[5]), .Y(N_130_1) ); defparam \rdata_5_1[5] .INIT=4'h8; // @23:175 CFG2 clr_txfifo_3_sqmuxa_1 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_1), .B(PADDR_1z_0), .Y(clr_txfifo_3_sqmuxa_1_Z) ); defparam clr_txfifo_3_sqmuxa_1.INIT=4'h8; // @25:120 CFG2 un1_PADDR_2 ( .A(PADDR_1z_0), .B(CoreAPB3_0_0_APBmslave0_PADDR_3), .Y(un1_PADDR_2_1z) ); defparam un1_PADDR_2.INIT=4'h1; // @23:123 CFG2 \status_byte[1] ( .A(sticky_Z[0]), .B(sticky_Z[1]), .Y(status_byte_Z[1]) ); defparam \status_byte[1] .INIT=4'h8; // @23:174 CFG3 rdata_sn_m11 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_3), .B(PADDR_1z_0), .C(CoreAPB3_0_0_APBmslave0_PADDR_0), .Y(rdata_sn_N_12) ); defparam rdata_sn_m11.INIT=8'h47; // @23:220 CFG3 \rdata_0[3] ( .A(CoreAPB3_0_0_APBmslave0_PADDR_3), .B(control1_Z[3]), .C(tx_fifo_full), .Y(N_81) ); defparam \rdata_0[3] .INIT=8'hE4; // @23:220 CFG3 \rdata_1[3] ( .A(CoreAPB3_0_0_APBmslave0_PADDR_1), .B(cfg_ssel_Z[3]), .C(clk_div_val[3]), .Y(N_91) ); defparam \rdata_1[3] .INIT=8'hE4; // @23:220 CFG3 \rdata_0[4] ( .A(control1_Z[4]), .B(int_raw_Z[2]), .C(CoreAPB3_0_0_APBmslave0_PADDR_3), .Y(N_82) ); defparam \rdata_0[4] .INIT=8'hCA; // @23:220 CFG3 \rdata_0[2] ( .A(CoreAPB3_0_0_APBmslave0_PADDR_3), .B(control1_Z[2]), .C(rx_fifo_empty), .Y(N_80) ); defparam \rdata_0[2] .INIT=8'hE4; // @23:220 CFG3 \rdata_0[5] ( .A(control1_Z[5]), .B(int_raw_Z[3]), .C(CoreAPB3_0_0_APBmslave0_PADDR_3), .Y(N_83) ); defparam \rdata_0[5] .INIT=8'hCA; // @23:175 CFG3 clr_txfifo_3_sqmuxa_2 ( .A(paddr_0), .B(CoreAPB3_0_0_APBmslave0_PADDR_3), .C(CoreAPB3_0_0_APBmslave0_PADDR_0), .Y(clr_txfifo_3_sqmuxa_2_Z) ); defparam clr_txfifo_3_sqmuxa_2.INIT=8'h10; // @23:241 CFG3 int_raw_1_sqmuxa_0_0 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_3), .B(PADDR_1z_0), .C(CoreAPB3_0_0_APBmslave0_PADDR_1), .Y(int_raw_1_sqmuxa_0) ); defparam int_raw_1_sqmuxa_0_0.INIT=8'h01; // @23:136 CFG3 un1_cfg_ssel_1_sqmuxa_2_1 ( .A(paddr_0), .B(PADDR_1z_0), .C(CoreAPB3_0_0_APBmslave0_PADDR_0), .Y(un1_cfg_ssel_1_sqmuxa_2_1_Z) ); defparam un1_cfg_ssel_1_sqmuxa_2_1.INIT=8'hFE; // @23:231 CFG4 rdata_sn_m10 ( .A(paddr_0), .B(CoreAPB3_0_0_APBmslave0_PADDR_3), .C(PADDR_1z_0), .D(CoreAPB3_0_0_APBmslave0_PADDR_0), .Y(rdata_sn_N_18_mux) ); defparam rdata_sn_m10.INIT=16'h0400; // @24:67 CFG3 PWRITE_m ( .A(prdata_1), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .C(tx_fifo_write_sig14), .Y(PWRITE_m_1z) ); defparam PWRITE_m.INIT=8'h80; // @25:138 CFG4 \SPISS[0] ( .A(master_ssel_out), .B(cfg_ssel_Z[0]), .C(cfg_enable), .D(SPIMODE), .Y(SPISS_c) ); defparam \SPISS[0] .INIT=16'hBFFF; // @23:136 CFG3 un1_cfg_ssel_1_sqmuxa_1_2 ( .A(paddr_0), .B(CoreAPB3_0_0_APBmslave0_PADDR_3), .C(CoreAPB3_0_0_APBmslave0_PADDR_0), .Y(un1_cfg_ssel_1_sqmuxa_1_2_Z) ); defparam un1_cfg_ssel_1_sqmuxa_1_2.INIT=8'hBF; // @23:174 CFG3 rdata_sn_m13 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_1), .B(rdata_sn_N_12), .C(paddr_0), .Y(rdata_sn_N_19_mux) ); defparam rdata_sn_m13.INIT=8'h04; // @23:158 CFG3 \int_raw_27[3] ( .A(int_raw_1_sqmuxa_Z), .B(int_raw_Z[3]), .C(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .Y(int_raw_27_Z[3]) ); defparam \int_raw_27[3] .INIT=8'h4C; // @23:220 CFG3 \rdata_2[3] ( .A(control1_Z[5]), .B(int_raw_Z[3]), .C(CoreAPB3_0_0_APBmslave0_PADDR_0), .Y(N_101) ); defparam \rdata_2[3] .INIT=8'hC8; // @23:220 CFG3 \rdata_2[4] ( .A(control2_Z[4]), .B(CoreAPB3_0_0_APBmslave0_PADDR_0), .C(int_raw_Z[4]), .Y(N_102) ); defparam \rdata_2[4] .INIT=8'hE0; // @23:220 CFG3 \rdata_2[2] ( .A(control1_Z[4]), .B(int_raw_Z[2]), .C(CoreAPB3_0_0_APBmslave0_PADDR_0), .Y(N_100) ); defparam \rdata_2[2] .INIT=8'hC8; // @23:158 CFG3 \int_raw_27[2] ( .A(int_raw_1_sqmuxa_Z), .B(int_raw_Z[2]), .C(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .Y(int_raw_27_Z[2]) ); defparam \int_raw_27[2] .INIT=8'h4C; // @23:220 CFG3 \rdata_2[5] ( .A(control2_Z[5]), .B(CoreAPB3_0_0_APBmslave0_PADDR_0), .C(int_raw_Z[5]), .Y(N_103) ); defparam \rdata_2[5] .INIT=8'hE0; // @23:220 CFG3 \rdata_2[6] ( .A(control2_Z[6]), .B(CoreAPB3_0_0_APBmslave0_PADDR_0), .C(int_raw_Z[6]), .Y(N_104) ); defparam \rdata_2[6] .INIT=8'hE0; // @23:220 CFG4 \rdata_0[6] ( .A(cfg_frameurun), .B(master_ssel_out), .C(SPIMODE), .D(CoreAPB3_0_0_APBmslave0_PADDR_3), .Y(N_84) ); defparam \rdata_0[6] .INIT=16'hCFAA; // @23:220 CFG3 \rdata_2[7] ( .A(control2_Z[7]), .B(CoreAPB3_0_0_APBmslave0_PADDR_0), .C(int_raw_Z[7]), .Y(N_105) ); defparam \rdata_2[7] .INIT=8'hE0; // @23:220 CFG3 \rdata_2[0] ( .A(control1_Z[3]), .B(CoreAPB3_0_0_APBmslave0_PADDR_0), .C(int_raw_Z[0]), .Y(N_98) ); defparam \rdata_2[0] .INIT=8'hE0; // @23:220 CFG4 \rdata_0[0] ( .A(CoreAPB3_0_0_APBmslave0_PADDR_3), .B(fifo_mem_q_0), .C(rx_fifo_empty), .D(cfg_enable), .Y(N_78) ); defparam \rdata_0[0] .INIT=16'h5D08; // @23:241 CFG4 control2_1_sqmuxa_0 ( .A(paddr_0), .B(CoreAPB3_0_0_APBmslave0_PADDR_3), .C(CoreAPB3_0_0_APBmslave0_PADDR_0), .D(clr_txfifo_3_sqmuxa_1_Z), .Y(rdata_sn_N_20_mux) ); defparam control2_1_sqmuxa_0.INIT=16'h0100; // @23:190 CFG4 \int_raw_30_f0[0] ( .A(tx_done), .B(int_raw_1_sqmuxa_Z), .C(int_raw_Z[0]), .D(wrdata_0), .Y(int_raw_30[0]) ); defparam \int_raw_30_f0[0] .INIT=16'hBAFA; // @23:134 CFG3 \sticky_13_iv_i[1] ( .A(rx_fifo_read), .B(sticky_Z[1]), .C(rx_done), .Y(sticky_13_iv_i_Z[1]) ); defparam \sticky_13_iv_i[1] .INIT=8'h54; // @23:134 CFG3 \sticky_10_iv_i[0] ( .A(sticky_Z[0]), .B(tx_done), .C(tx_fifo_write), .Y(sticky_10_iv_i_Z[0]) ); defparam \sticky_10_iv_i[0] .INIT=8'h0E; // @23:193 CFG3 \int_raw_39[3] ( .A(SYNC2_stxp_dataerr), .B(int_raw_27_Z[3]), .C(SYNC3_stxp_dataerr), .Y(int_raw_39_Z[3]) ); defparam \int_raw_39[3] .INIT=8'hCE; // @23:194 CFG4 \int_raw_42[4] ( .A(rx_cmdsize), .B(int_raw_Z[4]), .C(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .D(int_raw_1_sqmuxa_Z), .Y(int_raw_42_Z[4]) ); defparam \int_raw_42[4] .INIT=16'hAEEE; // @23:192 CFG3 \int_raw_36[2] ( .A(rx_fifo_write), .B(int_raw_27_Z[2]), .C(full_out), .Y(int_raw_36_Z[2]) ); defparam \int_raw_36[2] .INIT=8'hEC; // @23:195 CFG4 \int_raw_45[5] ( .A(rx_pktend), .B(int_raw_Z[5]), .C(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .D(int_raw_1_sqmuxa_Z), .Y(int_raw_45_Z[5]) ); defparam \int_raw_45[5] .INIT=16'hAEEE; // @23:196 CFG4 \int_raw_48[6] ( .A(rx_fifo_empty), .B(int_raw_Z[6]), .C(int_raw_1_sqmuxa_Z), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .Y(int_raw_48_Z[6]) ); defparam \int_raw_48[6] .INIT=16'h5DDD; // @23:191 CFG4 \int_raw_33[1] ( .A(rx_done), .B(int_raw_Z[1]), .C(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .D(int_raw_1_sqmuxa_Z), .Y(int_raw_33_Z[1]) ); defparam \int_raw_33[1] .INIT=16'hAEEE; // @23:197 CFG4 \int_raw_51[7] ( .A(tx_fifo_full), .B(int_raw_Z[7]), .C(int_raw_1_sqmuxa_Z), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .Y(int_raw_51_Z[7]) ); defparam \int_raw_51[7] .INIT=16'h5DDD; // @23:220 CFG4 \rdata_5_2[0] ( .A(cfg_ssel_Z[0]), .B(clk_div_val[0]), .C(rdata_sn_N_18_mux), .D(CoreAPB3_0_0_APBmslave0_PADDR_1), .Y(N_125_2) ); defparam \rdata_5_2[0] .INIT=16'hC0A0; // @23:220 CFG4 \rdata_5_2[2] ( .A(CoreAPB3_0_0_APBmslave0_PADDR_1), .B(rdata_sn_N_18_mux), .C(cfg_ssel_Z[2]), .D(clk_div_val[2]), .Y(N_127_2) ); defparam \rdata_5_2[2] .INIT=16'hC840; // @23:220 CFG4 \rdata_5_2[7] ( .A(CoreAPB3_0_0_APBmslave0_PADDR_1), .B(rdata_sn_N_18_mux), .C(cfg_ssel_Z[7]), .D(clk_div_val[7]), .Y(N_132_2) ); defparam \rdata_5_2[7] .INIT=16'hC840; // @23:220 CFG4 \rdata_5_2[4] ( .A(CoreAPB3_0_0_APBmslave0_PADDR_1), .B(rdata_sn_N_18_mux), .C(cfg_ssel_Z[4]), .D(clk_div_val[4]), .Y(N_129_2) ); defparam \rdata_5_2[4] .INIT=16'hC840; // @23:220 CFG4 \rdata_5_2[6] ( .A(CoreAPB3_0_0_APBmslave0_PADDR_1), .B(rdata_sn_N_18_mux), .C(cfg_ssel_Z[6]), .D(clk_div_val[6]), .Y(N_131_2) ); defparam \rdata_5_2[6] .INIT=16'hC840; // @23:220 CFG4 \rdata_5_2[5] ( .A(CoreAPB3_0_0_APBmslave0_PADDR_1), .B(rdata_sn_N_18_mux), .C(cfg_ssel_Z[5]), .D(clk_div_val[5]), .Y(N_130_2) ); defparam \rdata_5_2[5] .INIT=16'hC840; // @23:220 CFG3 \rdata_4_2[1] ( .A(CoreAPB3_0_0_APBmslave0_PADDR_0), .B(int_raw_Z[1]), .C(PADDR_1z_0), .Y(N_117_2) ); defparam \rdata_4_2[1] .INIT=8'h80; // @23:220 CFG4 \rdata_4_1[1] ( .A(CoreAPB3_0_0_APBmslave0_PADDR_3), .B(PADDR_1z_0), .C(status_byte_Z[1]), .D(SPIMODE), .Y(N_117_1) ); defparam \rdata_4_1[1] .INIT=16'h3120; // @23:220 CFG4 \rdata_5_2[1] ( .A(CoreAPB3_0_0_APBmslave0_PADDR_1), .B(rdata_sn_N_18_mux), .C(cfg_ssel_Z[1]), .D(clk_div_val[1]), .Y(N_126_2) ); defparam \rdata_5_2[1] .INIT=16'hC840; // @23:220 CFG3 \rdata_4[3] ( .A(N_101), .B(PADDR_1z_0), .C(N_81), .Y(N_119) ); defparam \rdata_4[3] .INIT=8'hB8; // @23:220 CFG3 \rdata_4[4] ( .A(PADDR_1z_0), .B(N_102), .C(N_82), .Y(N_120) ); defparam \rdata_4[4] .INIT=8'hD8; // @23:220 CFG3 \rdata_4[2] ( .A(N_100), .B(PADDR_1z_0), .C(N_80), .Y(N_118) ); defparam \rdata_4[2] .INIT=8'hB8; // @23:220 CFG3 \rdata_4[5] ( .A(PADDR_1z_0), .B(N_103), .C(N_83), .Y(N_121) ); defparam \rdata_4[5] .INIT=8'hD8; // @23:220 CFG3 \rdata_4[6] ( .A(PADDR_1z_0), .B(N_104), .C(N_84), .Y(N_122) ); defparam \rdata_4[6] .INIT=8'hD8; // @23:220 CFG3 \rdata_4[0] ( .A(PADDR_1z_0), .B(N_98), .C(N_78), .Y(N_116) ); defparam \rdata_4[0] .INIT=8'hD8; // @23:220 CFG4 \rdata_0[7] ( .A(CoreAPB3_0_0_APBmslave0_PADDR_3), .B(active_1), .C(control1_Z[7]), .D(un4_busy), .Y(N_85) ); defparam \rdata_0[7] .INIT=16'hFAD8; // @23:220 CFG4 \rdata_cZ[3] ( .A(N_91), .B(N_119), .C(rdata_sn_N_18_mux), .D(rdata_sn_N_19_mux), .Y(rdata[3]) ); defparam \rdata_cZ[3] .INIT=16'hCCA0; // @23:220 CFG3 \rdata_4[7] ( .A(PADDR_1z_0), .B(N_105), .C(N_85), .Y(N_123) ); defparam \rdata_4[7] .INIT=8'hD8; // @23:220 CFG4 \rdata[7] ( .A(N_132_2), .B(N_132_1), .C(N_123), .D(rdata_sn_N_19_mux), .Y(rdata_Z[7]) ); defparam \rdata[7] .INIT=16'hF0EE; // @23:220 CFG4 \rdata[6] ( .A(N_131_2), .B(N_131_1), .C(N_122), .D(rdata_sn_N_19_mux), .Y(rdata_Z[6]) ); defparam \rdata[6] .INIT=16'hF0EE; // @23:220 CFG4 \rdata_cZ[4] ( .A(N_129_2), .B(N_129_1), .C(N_120), .D(rdata_sn_N_19_mux), .Y(rdata[4]) ); defparam \rdata_cZ[4] .INIT=16'hF0EE; // @23:220 CFG4 \rdata_cZ[2] ( .A(N_127_2), .B(N_127_1), .C(N_118), .D(rdata_sn_N_19_mux), .Y(rdata[2]) ); defparam \rdata_cZ[2] .INIT=16'hF0EE; // @23:220 CFG4 \rdata[5] ( .A(N_130_2), .B(N_130_1), .C(N_121), .D(rdata_sn_N_19_mux), .Y(rdata_Z[5]) ); defparam \rdata[5] .INIT=16'hF0EE; // @23:220 CFG4 \rdata[1] ( .A(N_117_2), .B(N_117_1), .C(N_126), .D(rdata_sn_N_19_mux), .Y(rdata_Z[1]) ); defparam \rdata[1] .INIT=16'hEEF0; // @23:220 CFG4 \rdata[0] ( .A(N_125_2), .B(rdata_sn_N_19_mux), .C(N_125_1), .D(N_116), .Y(rdata_Z[0]) ); defparam \rdata[0] .INIT=16'hFE32; // @23:158 CFG2 control113 ( .A(prdata_1), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .Y(control113_Z) ); defparam control113.INIT=4'h8; // @23:241 CFG4 int_raw_1_sqmuxa ( .A(paddr_0), .B(CoreAPB3_0_0_APBmslave0_PADDR_0), .C(int_raw_1_sqmuxa_0), .D(control113_Z), .Y(int_raw_1_sqmuxa_Z) ); defparam int_raw_1_sqmuxa.INIT=16'h4000; // @23:241 CFG2 control2_1_sqmuxa ( .A(control113_Z), .B(rdata_sn_N_20_mux), .Y(control2_1_sqmuxa_Z) ); defparam control2_1_sqmuxa.INIT=4'h8; // @25:120 CFG4 \PRDDATA[7] ( .A(un1_PADDR), .B(prdata_1), .C(rx_fifo_data_out_7), .D(rdata_Z[7]), .Y(CoreAPB3_0_0_APBmslave2_PRDATA_7) ); defparam \PRDDATA[7] .INIT=16'hE4A0; // @25:120 CFG4 \PRDDATA[6] ( .A(un1_PADDR), .B(prdata_1), .C(rx_fifo_data_out_6), .D(rdata_Z[6]), .Y(CoreAPB3_0_0_APBmslave2_PRDATA_6) ); defparam \PRDDATA[6] .INIT=16'hE4A0; // @23:136 CFG4 clr_rxfifo_5 ( .A(clr_txfifo_3_sqmuxa_2_Z), .B(wrdata_0), .C(control113_Z), .D(clr_txfifo_3_sqmuxa_1_Z), .Y(clr_rxfifo_5_Z) ); defparam clr_rxfifo_5.INIT=16'h8000; // @23:136 CFG4 clr_txfifo_5 ( .A(clr_txfifo_3_sqmuxa_2_Z), .B(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .C(control113_Z), .D(clr_txfifo_3_sqmuxa_1_Z), .Y(clr_txfifo_5_Z) ); defparam clr_txfifo_5.INIT=16'h8000; // @25:120 CFG4 \PRDDATA[5] ( .A(un1_PADDR), .B(prdata_1), .C(rx_fifo_data_out_5), .D(rdata_Z[5]), .Y(CoreAPB3_0_0_APBmslave2_PRDATA_5) ); defparam \PRDDATA[5] .INIT=16'hE4A0; // @25:120 CFG4 \PRDDATA[1] ( .A(un1_PADDR), .B(prdata_1), .C(rx_fifo_data_out_1), .D(rdata_Z[1]), .Y(CoreAPB3_0_0_APBmslave2_PRDATA_1) ); defparam \PRDDATA[1] .INIT=16'hE4A0; // @25:120 CFG4 \PRDDATA[0] ( .A(un1_PADDR), .B(prdata_1), .C(rx_fifo_data_out_0), .D(rdata_Z[0]), .Y(CoreAPB3_0_0_APBmslave2_PRDATA_0) ); defparam \PRDDATA[0] .INIT=16'hE4A0; // @23:134 CFG4 un1_cfg_ssel_1_sqmuxa_1_2_RNI580NA ( .A(un1_cfg_ssel_1_sqmuxa_1_2_Z), .B(control113_Z), .C(PADDR_1z_0), .D(CoreAPB3_0_0_APBmslave0_PADDR_1), .Y(un1_cfg_ssel_1_sqmuxa_1_i) ); defparam un1_cfg_ssel_1_sqmuxa_1_2_RNI580NA.INIT=16'h0400; // @23:134 CFG4 un1_cfg_ssel_1_sqmuxa_1_2_RNI580NA_0 ( .A(un1_cfg_ssel_1_sqmuxa_1_2_Z), .B(control113_Z), .C(PADDR_1z_0), .D(CoreAPB3_0_0_APBmslave0_PADDR_1), .Y(un1_cfg_ssel_1_sqmuxa_i) ); defparam un1_cfg_ssel_1_sqmuxa_1_2_RNI580NA_0.INIT=16'h0004; // @23:134 CFG4 un1_cfg_ssel_1_sqmuxa_2_1_RNI6B1NA ( .A(un1_cfg_ssel_1_sqmuxa_2_1_Z), .B(control113_Z), .C(CoreAPB3_0_0_APBmslave0_PADDR_3), .D(CoreAPB3_0_0_APBmslave0_PADDR_1), .Y(un1_cfg_ssel_1_sqmuxa_2_i) ); defparam un1_cfg_ssel_1_sqmuxa_2_1_RNI6B1NA.INIT=16'h0004; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* spi_rf_32s_16s_0 */ module spi_control_16s ( CoreAPB3_0_0_APBmslave2_PRDATA_2, CoreAPB3_0_0_APBmslave2_PRDATA_0, rdata_2, rdata_0, rx_fifo_data_out_2, rx_fifo_data_out_0, CoreAPB3_0_0_APBmslave0_PADDR_0, CoreAPB3_0_0_APBmslave0_PADDR_1, CoreAPB3_0_0_APBmslave0_PADDR_3, paddr_0, PADDR_1z_0, apb_penable_net, CoreAPB3_0_0_APBmslave2_PSELx, un3_apb_int_sel, rx_fifo_read_1z, un1_PADDR_2, un1_PADDR_1z, un1_PADDR_3, tx_fifo_write, tx_fifo_write_sig14_1z, prdata_1, tx_fifo_write_sig_0_sqmuxa_i_1, tx_fifo_write_sig14_i_2, tx_fifo_write_sig14_i_1, rx_fifo_read_0_1z, rx_fifo_read_1_1z, CoreAPB3_0_0_APBmslave0_PWRITE ) ; output CoreAPB3_0_0_APBmslave2_PRDATA_2 ; output CoreAPB3_0_0_APBmslave2_PRDATA_0 ; input rdata_2 ; input rdata_0 ; input rx_fifo_data_out_2 ; input rx_fifo_data_out_0 ; input CoreAPB3_0_0_APBmslave0_PADDR_0 ; input CoreAPB3_0_0_APBmslave0_PADDR_1 ; input CoreAPB3_0_0_APBmslave0_PADDR_3 ; input paddr_0 ; input PADDR_1z_0 ; input apb_penable_net ; input CoreAPB3_0_0_APBmslave2_PSELx ; input un3_apb_int_sel ; output rx_fifo_read_1z ; input un1_PADDR_2 ; output un1_PADDR_1z ; input un1_PADDR_3 ; output tx_fifo_write ; output tx_fifo_write_sig14_1z ; output prdata_1 ; output tx_fifo_write_sig_0_sqmuxa_i_1 ; output tx_fifo_write_sig14_i_2 ; output tx_fifo_write_sig14_i_1 ; output rx_fifo_read_0_1z ; output rx_fifo_read_1_1z ; input CoreAPB3_0_0_APBmslave0_PWRITE ; wire CoreAPB3_0_0_APBmslave2_PRDATA_2 ; wire CoreAPB3_0_0_APBmslave2_PRDATA_0 ; wire rdata_2 ; wire rdata_0 ; wire rx_fifo_data_out_2 ; wire rx_fifo_data_out_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_1 ; wire CoreAPB3_0_0_APBmslave0_PADDR_3 ; wire paddr_0 ; wire PADDR_1z_0 ; wire apb_penable_net ; wire CoreAPB3_0_0_APBmslave2_PSELx ; wire un3_apb_int_sel ; wire rx_fifo_read_1z ; wire un1_PADDR_2 ; wire un1_PADDR_1z ; wire un1_PADDR_3 ; wire tx_fifo_write ; wire tx_fifo_write_sig14_1z ; wire prdata_1 ; wire tx_fifo_write_sig_0_sqmuxa_i_1 ; wire tx_fifo_write_sig14_i_2 ; wire tx_fifo_write_sig14_i_1 ; wire rx_fifo_read_0_1z ; wire rx_fifo_read_1_1z ; wire CoreAPB3_0_0_APBmslave0_PWRITE ; wire tx_fifo_write_sig_0_sqmuxa_1_0_Z ; wire tx_fifo_write_sig_0_sqmuxa_Z ; wire GND ; wire VCC ; // @24:70 CFG2 tx_fifo_write_sig_0_sqmuxa_1_1 ( .A(CoreAPB3_0_0_APBmslave0_PWRITE), .B(PADDR_1z_0), .Y(tx_fifo_write_sig_0_sqmuxa_1_0_Z) ); defparam tx_fifo_write_sig_0_sqmuxa_1_1.INIT=4'h2; // @24:67 CFG2 rx_fifo_read_1 ( .A(CoreAPB3_0_0_APBmslave0_PWRITE), .B(CoreAPB3_0_0_APBmslave0_PADDR_0), .Y(rx_fifo_read_1_1z) ); defparam rx_fifo_read_1.INIT=4'h1; // @24:67 CFG2 rx_fifo_read_0 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_1), .B(paddr_0), .Y(rx_fifo_read_0_1z) ); defparam rx_fifo_read_0.INIT=4'h2; // @24:84 CFG2 tx_fifo_write_sig14_1 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_1), .B(CoreAPB3_0_0_APBmslave0_PADDR_3), .Y(tx_fifo_write_sig14_i_1) ); defparam tx_fifo_write_sig14_1.INIT=4'h8; // @24:84 CFG2 tx_fifo_write_sig14_2 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_0), .B(PADDR_1z_0), .Y(tx_fifo_write_sig14_i_2) ); defparam tx_fifo_write_sig14_2.INIT=4'h1; // @24:70 CFG2 tx_fifo_write_sig_0_sqmuxa_1_0 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_1), .B(CoreAPB3_0_0_APBmslave0_PADDR_0), .Y(tx_fifo_write_sig_0_sqmuxa_i_1) ); defparam tx_fifo_write_sig_0_sqmuxa_1_0.INIT=4'h8; // @24:70 CFG4 tx_fifo_write_sig_0_sqmuxa ( .A(paddr_0), .B(CoreAPB3_0_0_APBmslave0_PADDR_3), .C(tx_fifo_write_sig_0_sqmuxa_1_0_Z), .D(tx_fifo_write_sig_0_sqmuxa_i_1), .Y(tx_fifo_write_sig_0_sqmuxa_Z) ); defparam tx_fifo_write_sig_0_sqmuxa.INIT=16'h1000; // @24:67 CFG4 tx_fifo_write_iv ( .A(tx_fifo_write_sig_0_sqmuxa_Z), .B(prdata_1), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .D(tx_fifo_write_sig14_1z), .Y(tx_fifo_write) ); defparam tx_fifo_write_iv.INIT=16'hC888; // @25:120 CFG2 un1_PADDR ( .A(un1_PADDR_3), .B(paddr_0), .Y(un1_PADDR_1z) ); defparam un1_PADDR.INIT=4'h2; // @24:84 CFG3 tx_fifo_write_sig14 ( .A(tx_fifo_write_sig14_i_2), .B(paddr_0), .C(tx_fifo_write_sig14_i_1), .Y(tx_fifo_write_sig14_1z) ); defparam tx_fifo_write_sig14.INIT=8'h20; // @24:67 CFG4 rx_fifo_read ( .A(rx_fifo_read_1_1z), .B(un1_PADDR_2), .C(rx_fifo_read_0_1z), .D(prdata_1), .Y(rx_fifo_read_1z) ); defparam rx_fifo_read.INIT=16'h8000; // @24:67 CFG3 tx_fifo_write_sig18 ( .A(un3_apb_int_sel), .B(CoreAPB3_0_0_APBmslave2_PSELx), .C(apb_penable_net), .Y(prdata_1) ); defparam tx_fifo_write_sig18.INIT=8'h40; // @25:120 CFG4 \PRDDATA[4] ( .A(un1_PADDR_1z), .B(prdata_1), .C(rx_fifo_data_out_2), .D(rdata_2), .Y(CoreAPB3_0_0_APBmslave2_PRDATA_2) ); defparam \PRDDATA[4] .INIT=16'hE4A0; // @25:120 CFG4 \PRDDATA[2] ( .A(un1_PADDR_1z), .B(prdata_1), .C(rx_fifo_data_out_0), .D(rdata_0), .Y(CoreAPB3_0_0_APBmslave2_PRDATA_0) ); defparam \PRDDATA[2] .INIT=16'hE4A0; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* spi_control_16s */ module spi_fifo_16s_32s_5_1 ( tx_fifo_data_out, CoreAPB3_0_0_APBmslave0_PWDATA, wrdata_0, tx_fifo_read, tx_fifo_write, tx_fifo_last_out, PWRITE_m, tx_fifo_full, PF_CCC_0_0_OUT0_FABCLK_0, dff, clr_txfifo, tx_fifo_empty_i, tx_fifo_empty ) ; output [15:0] tx_fifo_data_out ; input [15:1] CoreAPB3_0_0_APBmslave0_PWDATA ; input wrdata_0 ; input tx_fifo_read ; input tx_fifo_write ; output tx_fifo_last_out ; input PWRITE_m ; output tx_fifo_full ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input dff ; input clr_txfifo ; output tx_fifo_empty_i ; output tx_fifo_empty ; wire wrdata_0 ; wire tx_fifo_read ; wire tx_fifo_write ; wire tx_fifo_last_out ; wire PWRITE_m ; wire tx_fifo_full ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire dff ; wire clr_txfifo ; wire tx_fifo_empty_i ; wire tx_fifo_empty ; wire [4:0] rd_pointer_q_Z; wire [4:0] rd_pointer_q_3_Z; wire [5:0] counter_q_Z; wire [5:1] counter_d; wire [4:0] wr_pointer_q_Z; wire [4:0] wr_pointer_q_3_Z; wire [16:16] fifo_mem_q; wire [11:5] fifo_mem_q_fifo_mem_q_0_1_R_DATA; wire [31:31] un34_fifo_mem_d; wire [31:31] un1_data_out_dx; wire N_18_i ; wire GND ; wire empty_out_2 ; wire VCC ; wire full_out_2 ; wire counter_d_cry_0_0_Y_0 ; wire counter_d_cry_0 ; wire counter_d_cry_0_0_S_0 ; wire counter_d_0_sqmuxa_1_Z ; wire counter_d_0_sqmuxa_Z ; wire counter_d_cry_1 ; wire counter_d_cry_1_0_Y_0 ; wire counter_d_cry_2 ; wire counter_d_cry_2_0_Y_0 ; wire counter_d_cry_3 ; wire counter_d_cry_3_0_Y_0 ; wire counter_d_s_5_FCO_0 ; wire counter_d_s_5_Y_0 ; wire counter_d_cry_4 ; wire counter_d_cry_4_0_Y_0 ; wire fifo_mem_d_0__0_sqmuxa ; wire rd_pointer_d_1_sqmuxa_1_Z ; wire CO2 ; wire wr_pointer_d_1_sqmuxa_2_Z ; wire un1_wr_pointer_d_1_sqmuxa_Z ; wire un34_fifo_mem_d_31_0_Z ; wire un1_data_out_dx_31_1_Z ; wire un1_rd_pointer_d_1_sqmuxa_Z ; wire CO0 ; wire CO0_0 ; wire CO2_0 ; wire m4_e_2 ; wire N_7 ; wire N_6 ; wire NC0 ; wire NC1 ; CFG1 empty_out_RNICU0A6 ( .A(tx_fifo_empty), .Y(tx_fifo_empty_i) ); defparam empty_out_RNICU0A6.INIT=2'h1; CFG1 counter_d_s_5_RNO ( .A(clr_txfifo), .Y(N_18_i) ); defparam counter_d_s_5_RNO.INIT=2'h1; // @22:111 SLE empty_out ( .Q(tx_fifo_empty), .ADn(GND), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(empty_out_2), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @22:111 SLE full_out ( .Q(tx_fifo_full), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(full_out_2), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @22:111 SLE \rd_pointer_q[1] ( .Q(rd_pointer_q_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rd_pointer_q_3_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @22:111 SLE \rd_pointer_q[0] ( .Q(rd_pointer_q_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rd_pointer_q_3_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @22:111 SLE \counter_q[5] ( .Q(counter_q_Z[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(counter_d[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @22:111 SLE \counter_q[4] ( .Q(counter_q_Z[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(counter_d[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @22:111 SLE \counter_q[3] ( .Q(counter_q_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(counter_d[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @22:111 SLE \counter_q[2] ( .Q(counter_q_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(counter_d[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @22:111 SLE \counter_q[1] ( .Q(counter_q_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(counter_d[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @22:111 SLE \counter_q[0] ( .Q(counter_q_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(counter_d_cry_0_0_Y_0), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @22:111 SLE \wr_pointer_q[4] ( .Q(wr_pointer_q_Z[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wr_pointer_q_3_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @22:111 SLE \wr_pointer_q[3] ( .Q(wr_pointer_q_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wr_pointer_q_3_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @22:111 SLE \wr_pointer_q[2] ( .Q(wr_pointer_q_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wr_pointer_q_3_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @22:111 SLE \wr_pointer_q[1] ( .Q(wr_pointer_q_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wr_pointer_q_3_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @22:111 SLE \wr_pointer_q[0] ( .Q(wr_pointer_q_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wr_pointer_q_3_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @22:111 SLE \rd_pointer_q[4] ( .Q(rd_pointer_q_Z[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rd_pointer_q_3_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @22:111 SLE \rd_pointer_q[3] ( .Q(rd_pointer_q_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rd_pointer_q_3_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @22:111 SLE \rd_pointer_q[2] ( .Q(rd_pointer_q_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rd_pointer_q_3_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @22:176 ARI1 counter_d_cry_0_0 ( .FCO(counter_d_cry_0), .S(counter_d_cry_0_0_S_0), .Y(counter_d_cry_0_0_Y_0), .B(clr_txfifo), .C(counter_d_0_sqmuxa_1_Z), .D(counter_d_0_sqmuxa_Z), .A(counter_q_Z[0]), .FCI(GND) ); defparam counter_d_cry_0_0.INIT=20'h50154; // @22:176 ARI1 counter_d_cry_1_0 ( .FCO(counter_d_cry_1), .S(counter_d[1]), .Y(counter_d_cry_1_0_Y_0), .B(counter_q_Z[1]), .C(clr_txfifo), .D(GND), .A(counter_d_0_sqmuxa_Z), .FCI(counter_d_cry_0) ); defparam counter_d_cry_1_0.INIT=20'h51122; // @22:176 ARI1 counter_d_cry_2_0 ( .FCO(counter_d_cry_2), .S(counter_d[2]), .Y(counter_d_cry_2_0_Y_0), .B(counter_q_Z[2]), .C(clr_txfifo), .D(GND), .A(counter_d_0_sqmuxa_Z), .FCI(counter_d_cry_1) ); defparam counter_d_cry_2_0.INIT=20'h51122; // @22:176 ARI1 counter_d_cry_3_0 ( .FCO(counter_d_cry_3), .S(counter_d[3]), .Y(counter_d_cry_3_0_Y_0), .B(counter_q_Z[3]), .C(clr_txfifo), .D(GND), .A(counter_d_0_sqmuxa_Z), .FCI(counter_d_cry_2) ); defparam counter_d_cry_3_0.INIT=20'h51122; // @22:176 ARI1 counter_d_s_5 ( .FCO(counter_d_s_5_FCO_0), .S(counter_d[5]), .Y(counter_d_s_5_Y_0), .B(N_18_i), .C(counter_q_Z[5]), .D(counter_d_0_sqmuxa_Z), .A(VCC), .FCI(counter_d_cry_4) ); defparam counter_d_s_5.INIT=20'h42800; // @22:176 ARI1 counter_d_cry_4_0 ( .FCO(counter_d_cry_4), .S(counter_d[4]), .Y(counter_d_cry_4_0_Y_0), .B(counter_q_Z[4]), .C(clr_txfifo), .D(GND), .A(counter_d_0_sqmuxa_Z), .FCI(counter_d_cry_3) ); defparam counter_d_cry_4_0.INIT=20'h51122; // @22:101 RAM64x12 fifo_mem_q_fifo_mem_q_0_0 ( .BUSY_FB(GND), .W_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .W_ADDR({GND, wr_pointer_q_Z[4:0]}), .W_EN(fifo_mem_d_0__0_sqmuxa), .W_DATA({CoreAPB3_0_0_APBmslave0_PWDATA[10:1], wrdata_0, PWRITE_m}), .BLK_EN(VCC), .R_CLK(VCC), .R_ADDR({GND, rd_pointer_q_Z[4:0]}), .R_DATA({tx_fifo_data_out[10:0], fifo_mem_q[16]}), .R_ADDR_BYPASS(VCC), .R_ADDR_EN(VCC), .R_ADDR_SL_N(VCC), .R_ADDR_SD(GND), .R_ADDR_AL_N(VCC), .R_ADDR_AD_N(VCC), .R_DATA_BYPASS(VCC), .R_DATA_EN(VCC), .R_DATA_SL_N(VCC), .R_DATA_SD(GND), .R_DATA_AL_N(VCC), .R_DATA_AD_N(VCC), .ACCESS_BUSY(NC0) ); defparam fifo_mem_q_fifo_mem_q_0_0.RAMINDEX="fifo_mem_q[15:0],fifo_mem_q[16]%32%17%SPEED%0%0%MICRO_RAM"; // @22:101 RAM64x12 fifo_mem_q_fifo_mem_q_0_1 ( .BUSY_FB(GND), .W_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .W_ADDR({GND, wr_pointer_q_Z[4:0]}), .W_EN(fifo_mem_d_0__0_sqmuxa), .W_DATA({GND, GND, GND, GND, GND, GND, GND, CoreAPB3_0_0_APBmslave0_PWDATA[15:11]}), .BLK_EN(VCC), .R_CLK(VCC), .R_ADDR({GND, rd_pointer_q_Z[4:0]}), .R_DATA({fifo_mem_q_fifo_mem_q_0_1_R_DATA[11:5], tx_fifo_data_out[15:11]}), .R_ADDR_BYPASS(VCC), .R_ADDR_EN(VCC), .R_ADDR_SL_N(VCC), .R_ADDR_SD(GND), .R_ADDR_AL_N(VCC), .R_ADDR_AD_N(VCC), .R_DATA_BYPASS(VCC), .R_DATA_EN(VCC), .R_DATA_SL_N(VCC), .R_DATA_SD(GND), .R_DATA_AL_N(VCC), .R_DATA_AD_N(VCC), .ACCESS_BUSY(NC1) ); defparam fifo_mem_q_fifo_mem_q_0_1.RAMINDEX="fifo_mem_q[15:0],fifo_mem_q[16]%32%17%SPEED%0%1%MICRO_RAM"; // @22:200 CFG4 \un1_rd_pointer_q_1.CO2 ( .A(rd_pointer_q_Z[2]), .B(rd_pointer_d_1_sqmuxa_1_Z), .C(rd_pointer_q_Z[0]), .D(rd_pointer_q_Z[1]), .Y(CO2) ); defparam \un1_rd_pointer_q_1.CO2 .INIT=16'h8000; // @22:113 CFG4 \wr_pointer_q_3[1] ( .A(wr_pointer_q_Z[0]), .B(wr_pointer_q_Z[1]), .C(wr_pointer_d_1_sqmuxa_2_Z), .D(un1_wr_pointer_d_1_sqmuxa_Z), .Y(wr_pointer_q_3_Z[1]) ); defparam \wr_pointer_q_3[1] .INIT=16'h6C00; // @22:149 CFG2 un34_fifo_mem_d_31_0 ( .A(wr_pointer_q_Z[1]), .B(wr_pointer_q_Z[2]), .Y(un34_fifo_mem_d_31_0_Z) ); defparam un34_fifo_mem_d_31_0.INIT=4'h8; // @22:155 CFG2 un1_data_out_dx_31_1 ( .A(rd_pointer_q_Z[3]), .B(rd_pointer_q_Z[4]), .Y(un1_data_out_dx_31_1_Z) ); defparam un1_data_out_dx_31_1.INIT=4'h8; // @22:165 CFG2 \data_out_d[16] ( .A(fifo_mem_q[16]), .B(tx_fifo_empty), .Y(tx_fifo_last_out) ); defparam \data_out_d[16] .INIT=4'h2; // @22:149 CFG4 un34_fifo_mem_d_31 ( .A(wr_pointer_q_Z[4]), .B(wr_pointer_q_Z[3]), .C(wr_pointer_q_Z[0]), .D(un34_fifo_mem_d_31_0_Z), .Y(un34_fifo_mem_d[31]) ); defparam un34_fifo_mem_d_31.INIT=16'h8000; // @22:155 CFG4 un1_data_out_dx_31 ( .A(rd_pointer_q_Z[0]), .B(un1_data_out_dx_31_1_Z), .C(rd_pointer_q_Z[2]), .D(rd_pointer_q_Z[1]), .Y(un1_data_out_dx[31]) ); defparam un1_data_out_dx_31.INIT=16'h8000; // @22:147 CFG2 \fifo_mem_d[0]_0_sqmuxa ( .A(tx_fifo_write), .B(tx_fifo_full), .Y(fifo_mem_d_0__0_sqmuxa) ); defparam \fifo_mem_d[0]_0_sqmuxa .INIT=4'h2; // @22:191 CFG3 counter_d_0_sqmuxa ( .A(tx_fifo_empty), .B(tx_fifo_read), .C(tx_fifo_write), .Y(counter_d_0_sqmuxa_Z) ); defparam counter_d_0_sqmuxa.INIT=8'h04; // @22:191 CFG4 rd_pointer_d_1_sqmuxa_1 ( .A(un1_data_out_dx[31]), .B(tx_fifo_read), .C(tx_fifo_empty), .D(clr_txfifo), .Y(rd_pointer_d_1_sqmuxa_1_Z) ); defparam rd_pointer_d_1_sqmuxa_1.INIT=16'h0004; // @22:205 CFG4 counter_d_0_sqmuxa_1 ( .A(clr_txfifo), .B(tx_fifo_full), .C(tx_fifo_write), .D(tx_fifo_read), .Y(counter_d_0_sqmuxa_1_Z) ); defparam counter_d_0_sqmuxa_1.INIT=16'h0010; // @22:207 CFG4 wr_pointer_d_1_sqmuxa_2 ( .A(un34_fifo_mem_d[31]), .B(tx_fifo_write), .C(tx_fifo_full), .D(clr_txfifo), .Y(wr_pointer_d_1_sqmuxa_2_Z) ); defparam wr_pointer_d_1_sqmuxa_2.INIT=16'h0004; // @22:113 CFG4 un1_rd_pointer_d_1_sqmuxa ( .A(tx_fifo_read), .B(rd_pointer_d_1_sqmuxa_1_Z), .C(tx_fifo_empty), .D(clr_txfifo), .Y(un1_rd_pointer_d_1_sqmuxa_Z) ); defparam un1_rd_pointer_d_1_sqmuxa.INIT=16'hCCFD; // @22:200 CFG2 \un1_rd_pointer_q_1.CO0 ( .A(rd_pointer_d_1_sqmuxa_1_Z), .B(rd_pointer_q_Z[0]), .Y(CO0) ); defparam \un1_rd_pointer_q_1.CO0 .INIT=4'h8; // @22:113 CFG4 un1_wr_pointer_d_1_sqmuxa ( .A(un34_fifo_mem_d[31]), .B(tx_fifo_write), .C(tx_fifo_full), .D(clr_txfifo), .Y(un1_wr_pointer_d_1_sqmuxa_Z) ); defparam un1_wr_pointer_d_1_sqmuxa.INIT=16'h00F7; // @22:216 CFG2 \un1_wr_pointer_q_1.CO0 ( .A(wr_pointer_d_1_sqmuxa_2_Z), .B(wr_pointer_q_Z[0]), .Y(CO0_0) ); defparam \un1_wr_pointer_q_1.CO0 .INIT=4'h8; // @22:113 CFG3 \rd_pointer_q_3[0] ( .A(rd_pointer_q_Z[0]), .B(rd_pointer_d_1_sqmuxa_1_Z), .C(un1_rd_pointer_d_1_sqmuxa_Z), .Y(rd_pointer_q_3_Z[0]) ); defparam \rd_pointer_q_3[0] .INIT=8'h60; // @22:113 CFG3 \wr_pointer_q_3[0] ( .A(wr_pointer_q_Z[0]), .B(wr_pointer_d_1_sqmuxa_2_Z), .C(un1_wr_pointer_d_1_sqmuxa_Z), .Y(wr_pointer_q_3_Z[0]) ); defparam \wr_pointer_q_3[0] .INIT=8'h60; // @22:113 CFG3 \rd_pointer_q_3[1] ( .A(CO0), .B(un1_rd_pointer_d_1_sqmuxa_Z), .C(rd_pointer_q_Z[1]), .Y(rd_pointer_q_3_Z[1]) ); defparam \rd_pointer_q_3[1] .INIT=8'h48; // @22:216 CFG4 \un1_wr_pointer_q_1.CO2 ( .A(wr_pointer_q_Z[2]), .B(wr_pointer_q_Z[1]), .C(wr_pointer_q_Z[0]), .D(wr_pointer_d_1_sqmuxa_2_Z), .Y(CO2_0) ); defparam \un1_wr_pointer_q_1.CO2 .INIT=16'h8000; // @22:113 CFG4 \rd_pointer_q_3[2] ( .A(CO0), .B(un1_rd_pointer_d_1_sqmuxa_Z), .C(rd_pointer_q_Z[2]), .D(rd_pointer_q_Z[1]), .Y(rd_pointer_q_3_Z[2]) ); defparam \rd_pointer_q_3[2] .INIT=16'h48C0; // @22:113 CFG4 \wr_pointer_q_3[2] ( .A(wr_pointer_q_Z[1]), .B(wr_pointer_q_Z[2]), .C(CO0_0), .D(un1_wr_pointer_d_1_sqmuxa_Z), .Y(wr_pointer_q_3_Z[2]) ); defparam \wr_pointer_q_3[2] .INIT=16'h6C00; // @22:113 CFG3 \rd_pointer_q_3[3] ( .A(CO2), .B(un1_rd_pointer_d_1_sqmuxa_Z), .C(rd_pointer_q_Z[3]), .Y(rd_pointer_q_3_Z[3]) ); defparam \rd_pointer_q_3[3] .INIT=8'h48; // @26:130 CFG3 counter_d_cry_0_0_RNI1GLK5 ( .A(counter_d_cry_0_0_Y_0), .B(counter_d[1]), .C(counter_d[4]), .Y(m4_e_2) ); defparam counter_d_cry_0_0_RNI1GLK5.INIT=8'h01; // @22:113 CFG3 \wr_pointer_q_3[3] ( .A(CO2_0), .B(wr_pointer_q_Z[3]), .C(un1_wr_pointer_d_1_sqmuxa_Z), .Y(wr_pointer_q_3_Z[3]) ); defparam \wr_pointer_q_3[3] .INIT=8'h60; // @22:113 CFG4 \rd_pointer_q_3[4] ( .A(CO2), .B(un1_rd_pointer_d_1_sqmuxa_Z), .C(rd_pointer_q_Z[4]), .D(rd_pointer_q_Z[3]), .Y(rd_pointer_q_3_Z[4]) ); defparam \rd_pointer_q_3[4] .INIT=16'h48C0; // @22:113 CFG4 \wr_pointer_q_3[4] ( .A(wr_pointer_q_Z[3]), .B(wr_pointer_q_Z[4]), .C(CO2_0), .D(un1_wr_pointer_d_1_sqmuxa_Z), .Y(wr_pointer_q_3_Z[4]) ); defparam \wr_pointer_q_3[4] .INIT=16'h6C00; // @26:130 CFG4 empty_out_RNO ( .A(counter_d[3]), .B(counter_d[5]), .C(m4_e_2), .D(counter_d[2]), .Y(empty_out_2) ); defparam empty_out_RNO.INIT=16'h0010; // @26:130 CFG4 full_out_RNO ( .A(counter_d[3]), .B(counter_d[5]), .C(m4_e_2), .D(counter_d[2]), .Y(full_out_2) ); defparam full_out_RNO.INIT=16'h0040; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* spi_fifo_16s_32s_5_1 */ module spi_fifo_16s_32s_5_0 ( rx_fifo_data_out, rx_fifo_data_in, fifo_mem_q_0, rx_fifo_read, rx_fifo_write, rx_fifo_first_in, full_out_1z, PF_CCC_0_0_OUT0_FABCLK_0, dff, rx_fifo_empty, clr_rxfifo ) ; output [15:0] rx_fifo_data_out ; input [15:0] rx_fifo_data_in ; output fifo_mem_q_0 ; input rx_fifo_read ; input rx_fifo_write ; input rx_fifo_first_in ; output full_out_1z ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input dff ; output rx_fifo_empty ; input clr_rxfifo ; wire fifo_mem_q_0 ; wire rx_fifo_read ; wire rx_fifo_write ; wire rx_fifo_first_in ; wire full_out_1z ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire dff ; wire rx_fifo_empty ; wire clr_rxfifo ; wire [4:0] rd_pointer_q_Z; wire [4:0] rd_pointer_q_3_Z; wire [5:0] counter_q_Z; wire [5:1] counter_d; wire [4:0] wr_pointer_q_Z; wire [4:0] wr_pointer_q_3_Z; wire [11:5] fifo_mem_q_fifo_mem_q_0_1_R_DATA_0; wire [31:31] un1_data_out_dx; wire N_18_i ; wire GND ; wire empty_out_2 ; wire VCC ; wire full_out_2 ; wire counter_d_cry_0_0_Y ; wire counter_d_cry_0 ; wire counter_d_cry_0_0_S ; wire counter_d_0_sqmuxa_1_Z ; wire counter_d_0_sqmuxa_0 ; wire counter_d_cry_1 ; wire counter_d_cry_1_0_Y ; wire counter_d_cry_2 ; wire counter_d_cry_2_0_Y ; wire counter_d_cry_3 ; wire counter_d_cry_3_0_Y ; wire counter_d_s_5_FCO ; wire counter_d_s_5_Y ; wire counter_d_cry_4 ; wire counter_d_cry_4_0_Y ; wire fifo_mem_d_0__0_sqmuxa ; wire wr_pointer_d_1_sqmuxa_2_Z ; wire CO2 ; wire un1_data_out_dx_31_0_Z ; wire un34_fifo_mem_d_31_2_Z ; wire counter_d_0_sqmuxa_1_0_Z ; wire rd_pointer_d_1_sqmuxa_1_Z ; wire un1_wr_pointer_d_1_sqmuxa_0 ; wire CO0 ; wire un1_rd_pointer_d_1_sqmuxa_0 ; wire CO1 ; wire CO2_0 ; wire m4_e_2 ; wire N_7 ; wire N_6 ; wire NC0 ; wire NC1 ; CFG1 counter_d_s_5_RNO ( .A(clr_rxfifo), .Y(N_18_i) ); defparam counter_d_s_5_RNO.INIT=2'h1; // @22:111 SLE empty_out ( .Q(rx_fifo_empty), .ADn(GND), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(empty_out_2), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @22:111 SLE full_out ( .Q(full_out_1z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(full_out_2), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @22:111 SLE \rd_pointer_q[0] ( .Q(rd_pointer_q_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rd_pointer_q_3_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @22:111 SLE \counter_q[5] ( .Q(counter_q_Z[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(counter_d[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @22:111 SLE \counter_q[4] ( .Q(counter_q_Z[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(counter_d[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @22:111 SLE \counter_q[3] ( .Q(counter_q_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(counter_d[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @22:111 SLE \counter_q[2] ( .Q(counter_q_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(counter_d[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @22:111 SLE \counter_q[1] ( .Q(counter_q_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(counter_d[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @22:111 SLE \counter_q[0] ( .Q(counter_q_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(counter_d_cry_0_0_Y), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @22:111 SLE \wr_pointer_q[4] ( .Q(wr_pointer_q_Z[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wr_pointer_q_3_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @22:111 SLE \wr_pointer_q[3] ( .Q(wr_pointer_q_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wr_pointer_q_3_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @22:111 SLE \wr_pointer_q[2] ( .Q(wr_pointer_q_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wr_pointer_q_3_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @22:111 SLE \wr_pointer_q[1] ( .Q(wr_pointer_q_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wr_pointer_q_3_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @22:111 SLE \wr_pointer_q[0] ( .Q(wr_pointer_q_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wr_pointer_q_3_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @22:111 SLE \rd_pointer_q[4] ( .Q(rd_pointer_q_Z[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rd_pointer_q_3_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @22:111 SLE \rd_pointer_q[3] ( .Q(rd_pointer_q_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rd_pointer_q_3_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @22:111 SLE \rd_pointer_q[2] ( .Q(rd_pointer_q_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rd_pointer_q_3_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @22:111 SLE \rd_pointer_q[1] ( .Q(rd_pointer_q_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rd_pointer_q_3_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @22:176 ARI1 counter_d_cry_0_0 ( .FCO(counter_d_cry_0), .S(counter_d_cry_0_0_S), .Y(counter_d_cry_0_0_Y), .B(clr_rxfifo), .C(counter_d_0_sqmuxa_1_Z), .D(counter_d_0_sqmuxa_0), .A(counter_q_Z[0]), .FCI(GND) ); defparam counter_d_cry_0_0.INIT=20'h50154; // @22:176 ARI1 counter_d_cry_1_0 ( .FCO(counter_d_cry_1), .S(counter_d[1]), .Y(counter_d_cry_1_0_Y), .B(counter_q_Z[1]), .C(clr_rxfifo), .D(GND), .A(counter_d_0_sqmuxa_0), .FCI(counter_d_cry_0) ); defparam counter_d_cry_1_0.INIT=20'h51122; // @22:176 ARI1 counter_d_cry_2_0 ( .FCO(counter_d_cry_2), .S(counter_d[2]), .Y(counter_d_cry_2_0_Y), .B(counter_q_Z[2]), .C(clr_rxfifo), .D(GND), .A(counter_d_0_sqmuxa_0), .FCI(counter_d_cry_1) ); defparam counter_d_cry_2_0.INIT=20'h51122; // @22:176 ARI1 counter_d_cry_3_0 ( .FCO(counter_d_cry_3), .S(counter_d[3]), .Y(counter_d_cry_3_0_Y), .B(counter_q_Z[3]), .C(clr_rxfifo), .D(GND), .A(counter_d_0_sqmuxa_0), .FCI(counter_d_cry_2) ); defparam counter_d_cry_3_0.INIT=20'h51122; // @22:176 ARI1 counter_d_s_5 ( .FCO(counter_d_s_5_FCO), .S(counter_d[5]), .Y(counter_d_s_5_Y), .B(N_18_i), .C(counter_q_Z[5]), .D(counter_d_0_sqmuxa_0), .A(VCC), .FCI(counter_d_cry_4) ); defparam counter_d_s_5.INIT=20'h42800; // @22:176 ARI1 counter_d_cry_4_0 ( .FCO(counter_d_cry_4), .S(counter_d[4]), .Y(counter_d_cry_4_0_Y), .B(counter_q_Z[4]), .C(clr_rxfifo), .D(GND), .A(counter_d_0_sqmuxa_0), .FCI(counter_d_cry_3) ); defparam counter_d_cry_4_0.INIT=20'h51122; // @22:101 RAM64x12 fifo_mem_q_fifo_mem_q_0_0 ( .BUSY_FB(GND), .W_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .W_ADDR({GND, wr_pointer_q_Z[4:0]}), .W_EN(fifo_mem_d_0__0_sqmuxa), .W_DATA({rx_fifo_data_in[10:0], rx_fifo_first_in}), .BLK_EN(VCC), .R_CLK(VCC), .R_ADDR({GND, rd_pointer_q_Z[4:0]}), .R_DATA({rx_fifo_data_out[10:0], fifo_mem_q_0}), .R_ADDR_BYPASS(VCC), .R_ADDR_EN(VCC), .R_ADDR_SL_N(VCC), .R_ADDR_SD(GND), .R_ADDR_AL_N(VCC), .R_ADDR_AD_N(VCC), .R_DATA_BYPASS(VCC), .R_DATA_EN(VCC), .R_DATA_SL_N(VCC), .R_DATA_SD(GND), .R_DATA_AL_N(VCC), .R_DATA_AD_N(VCC), .ACCESS_BUSY(NC0) ); defparam fifo_mem_q_fifo_mem_q_0_0.RAMINDEX="fifo_mem_q[15:0],fifo_mem_q[16]%32%17%SPEED%0%0%MICRO_RAM"; // @22:101 RAM64x12 fifo_mem_q_fifo_mem_q_0_1 ( .BUSY_FB(GND), .W_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .W_ADDR({GND, wr_pointer_q_Z[4:0]}), .W_EN(fifo_mem_d_0__0_sqmuxa), .W_DATA({GND, GND, GND, GND, GND, GND, GND, rx_fifo_data_in[15:11]}), .BLK_EN(VCC), .R_CLK(VCC), .R_ADDR({GND, rd_pointer_q_Z[4:0]}), .R_DATA({fifo_mem_q_fifo_mem_q_0_1_R_DATA_0[11:5], rx_fifo_data_out[15:11]}), .R_ADDR_BYPASS(VCC), .R_ADDR_EN(VCC), .R_ADDR_SL_N(VCC), .R_ADDR_SD(GND), .R_ADDR_AL_N(VCC), .R_ADDR_AD_N(VCC), .R_DATA_BYPASS(VCC), .R_DATA_EN(VCC), .R_DATA_SL_N(VCC), .R_DATA_SD(GND), .R_DATA_AL_N(VCC), .R_DATA_AD_N(VCC), .ACCESS_BUSY(NC1) ); defparam fifo_mem_q_fifo_mem_q_0_1.RAMINDEX="fifo_mem_q[15:0],fifo_mem_q[16]%32%17%SPEED%0%1%MICRO_RAM"; // @22:216 CFG4 \un1_wr_pointer_q_1.CO2 ( .A(wr_pointer_q_Z[2]), .B(wr_pointer_d_1_sqmuxa_2_Z), .C(wr_pointer_q_Z[0]), .D(wr_pointer_q_Z[1]), .Y(CO2) ); defparam \un1_wr_pointer_q_1.CO2 .INIT=16'h8000; // @22:155 CFG2 un1_data_out_dx_31_0 ( .A(rd_pointer_q_Z[1]), .B(rd_pointer_q_Z[3]), .Y(un1_data_out_dx_31_0_Z) ); defparam un1_data_out_dx_31_0.INIT=4'h8; // @22:147 CFG2 \fifo_mem_d[0]_0_sqmuxa ( .A(rx_fifo_write), .B(full_out_1z), .Y(fifo_mem_d_0__0_sqmuxa) ); defparam \fifo_mem_d[0]_0_sqmuxa .INIT=4'h2; // @22:149 CFG3 un34_fifo_mem_d_31_2 ( .A(wr_pointer_q_Z[2]), .B(wr_pointer_q_Z[1]), .C(wr_pointer_q_Z[0]), .Y(un34_fifo_mem_d_31_2_Z) ); defparam un34_fifo_mem_d_31_2.INIT=8'h80; // @22:205 CFG3 counter_d_0_sqmuxa_1_0 ( .A(clr_rxfifo), .B(full_out_1z), .C(rx_fifo_write), .Y(counter_d_0_sqmuxa_1_0_Z) ); defparam counter_d_0_sqmuxa_1_0.INIT=8'h10; // @22:155 CFG4 un1_data_out_dx_31 ( .A(rd_pointer_q_Z[0]), .B(un1_data_out_dx_31_0_Z), .C(rd_pointer_q_Z[4]), .D(rd_pointer_q_Z[2]), .Y(un1_data_out_dx[31]) ); defparam un1_data_out_dx_31.INIT=16'h8000; // @22:207 CFG4 wr_pointer_d_1_sqmuxa_2 ( .A(wr_pointer_q_Z[3]), .B(wr_pointer_q_Z[4]), .C(un34_fifo_mem_d_31_2_Z), .D(counter_d_0_sqmuxa_1_0_Z), .Y(wr_pointer_d_1_sqmuxa_2_Z) ); defparam wr_pointer_d_1_sqmuxa_2.INIT=16'h7F00; // @22:191 CFG4 rd_pointer_d_1_sqmuxa_1 ( .A(un1_data_out_dx[31]), .B(rx_fifo_read), .C(rx_fifo_empty), .D(clr_rxfifo), .Y(rd_pointer_d_1_sqmuxa_1_Z) ); defparam rd_pointer_d_1_sqmuxa_1.INIT=16'h0004; // @22:191 CFG3 counter_d_0_sqmuxa ( .A(rx_fifo_read), .B(rx_fifo_empty), .C(rx_fifo_write), .Y(counter_d_0_sqmuxa_0) ); defparam counter_d_0_sqmuxa.INIT=8'h02; // @22:205 CFG2 counter_d_0_sqmuxa_1 ( .A(rx_fifo_read), .B(counter_d_0_sqmuxa_1_0_Z), .Y(counter_d_0_sqmuxa_1_Z) ); defparam counter_d_0_sqmuxa_1.INIT=4'h4; // @22:113 CFG4 un1_wr_pointer_d_1_sqmuxa ( .A(clr_rxfifo), .B(wr_pointer_d_1_sqmuxa_2_Z), .C(full_out_1z), .D(rx_fifo_write), .Y(un1_wr_pointer_d_1_sqmuxa_0) ); defparam un1_wr_pointer_d_1_sqmuxa.INIT=16'hDCDD; // @22:216 CFG2 \un1_wr_pointer_q_1.CO0 ( .A(wr_pointer_d_1_sqmuxa_2_Z), .B(wr_pointer_q_Z[0]), .Y(CO0) ); defparam \un1_wr_pointer_q_1.CO0 .INIT=4'h8; // @22:113 CFG3 \wr_pointer_q_3[0] ( .A(wr_pointer_q_Z[0]), .B(wr_pointer_d_1_sqmuxa_2_Z), .C(un1_wr_pointer_d_1_sqmuxa_0), .Y(wr_pointer_q_3_Z[0]) ); defparam \wr_pointer_q_3[0] .INIT=8'h60; // @22:113 CFG4 un1_rd_pointer_d_1_sqmuxa ( .A(rx_fifo_read), .B(rd_pointer_d_1_sqmuxa_1_Z), .C(rx_fifo_empty), .D(clr_rxfifo), .Y(un1_rd_pointer_d_1_sqmuxa_0) ); defparam un1_rd_pointer_d_1_sqmuxa.INIT=16'hCCFD; // @22:200 CFG3 \un1_rd_pointer_q_1.CO1 ( .A(rd_pointer_q_Z[1]), .B(rd_pointer_q_Z[0]), .C(rd_pointer_d_1_sqmuxa_1_Z), .Y(CO1) ); defparam \un1_rd_pointer_q_1.CO1 .INIT=8'h80; // @22:113 CFG3 \rd_pointer_q_3[0] ( .A(rd_pointer_q_Z[0]), .B(rd_pointer_d_1_sqmuxa_1_Z), .C(un1_rd_pointer_d_1_sqmuxa_0), .Y(rd_pointer_q_3_Z[0]) ); defparam \rd_pointer_q_3[0] .INIT=8'h60; // @22:113 CFG3 \wr_pointer_q_3[1] ( .A(wr_pointer_q_Z[1]), .B(CO0), .C(un1_wr_pointer_d_1_sqmuxa_0), .Y(wr_pointer_q_3_Z[1]) ); defparam \wr_pointer_q_3[1] .INIT=8'h60; // @22:200 CFG4 \un1_rd_pointer_q_1.CO2 ( .A(rd_pointer_q_Z[2]), .B(rd_pointer_q_Z[1]), .C(rd_pointer_q_Z[0]), .D(rd_pointer_d_1_sqmuxa_1_Z), .Y(CO2_0) ); defparam \un1_rd_pointer_q_1.CO2 .INIT=16'h8000; // @22:113 CFG4 \rd_pointer_q_3[1] ( .A(rd_pointer_q_Z[1]), .B(rd_pointer_q_Z[0]), .C(rd_pointer_d_1_sqmuxa_1_Z), .D(un1_rd_pointer_d_1_sqmuxa_0), .Y(rd_pointer_q_3_Z[1]) ); defparam \rd_pointer_q_3[1] .INIT=16'h6A00; // @22:113 CFG4 \wr_pointer_q_3[2] ( .A(wr_pointer_q_Z[2]), .B(wr_pointer_q_Z[1]), .C(CO0), .D(un1_wr_pointer_d_1_sqmuxa_0), .Y(wr_pointer_q_3_Z[2]) ); defparam \wr_pointer_q_3[2] .INIT=16'h6A00; // @22:113 CFG3 \rd_pointer_q_3[2] ( .A(CO1), .B(un1_rd_pointer_d_1_sqmuxa_0), .C(rd_pointer_q_Z[2]), .Y(rd_pointer_q_3_Z[2]) ); defparam \rd_pointer_q_3[2] .INIT=8'h48; // @22:113 CFG3 \wr_pointer_q_3[3] ( .A(wr_pointer_q_Z[3]), .B(CO2), .C(un1_wr_pointer_d_1_sqmuxa_0), .Y(wr_pointer_q_3_Z[3]) ); defparam \wr_pointer_q_3[3] .INIT=8'h60; // @26:130 CFG3 counter_d_cry_0_0_RNIRNTO ( .A(counter_d_cry_0_0_Y), .B(counter_d[1]), .C(counter_d[4]), .Y(m4_e_2) ); defparam counter_d_cry_0_0_RNIRNTO.INIT=8'h01; // @22:113 CFG4 \rd_pointer_q_3[3] ( .A(CO1), .B(un1_rd_pointer_d_1_sqmuxa_0), .C(rd_pointer_q_Z[3]), .D(rd_pointer_q_Z[2]), .Y(rd_pointer_q_3_Z[3]) ); defparam \rd_pointer_q_3[3] .INIT=16'h48C0; // @22:113 CFG4 \wr_pointer_q_3[4] ( .A(wr_pointer_q_Z[4]), .B(wr_pointer_q_Z[3]), .C(CO2), .D(un1_wr_pointer_d_1_sqmuxa_0), .Y(wr_pointer_q_3_Z[4]) ); defparam \wr_pointer_q_3[4] .INIT=16'h6A00; // @22:113 CFG4 \rd_pointer_q_3[4] ( .A(CO2_0), .B(un1_rd_pointer_d_1_sqmuxa_0), .C(rd_pointer_q_Z[4]), .D(rd_pointer_q_Z[3]), .Y(rd_pointer_q_3_Z[4]) ); defparam \rd_pointer_q_3[4] .INIT=16'h48C0; // @26:130 CFG4 empty_out_RNO ( .A(counter_d[3]), .B(counter_d[5]), .C(m4_e_2), .D(counter_d[2]), .Y(empty_out_2) ); defparam empty_out_RNO.INIT=16'h0010; // @26:130 CFG4 full_out_RNO ( .A(counter_d[3]), .B(counter_d[5]), .C(m4_e_2), .D(counter_d[2]), .Y(full_out_2) ); defparam full_out_RNO.INIT=16'h0040; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* spi_fifo_16s_32s_5_0 */ module spi_clockmux ( clock_rx_mux1, SPIMODE, SPISCLKO_c ) ; output clock_rx_mux1 ; input SPIMODE ; input SPISCLKO_c ; wire clock_rx_mux1 ; wire SPIMODE ; wire SPISCLKO_c ; wire GND ; wire VCC ; // @20:33 CFG2 clkout ( .A(SPISCLKO_c), .B(SPIMODE), .Y(clock_rx_mux1) ); defparam clkout.INIT=4'h8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* spi_clockmux */ module spi_chanctrl_Z6 ( CoreAPB3_0_0_APBmslave2_PRDATA_0, rdata_0, rx_fifo_data_out_0, cfg_cmdsize, CoreAPB3_0_0_APBmslave0_PADDR, tx_fifo_data_out, rx_fifo_data_in, clk_div_val, prdata_1, un1_PADDR, tx_fifo_read, cfg_frameurun, tx_done, un1_PADDR_3_1z, un1_PADDR_2, active_1_1z, un4_busy, tx_fifo_empty, SPISDO_c, SPIMODE, tx_fifo_last_out, rx_fifo_first_in, SPISCLKO_c, master_ssel_out, rx_pktend, rx_fifo_write, rx_cmdsize_1z, rx_done, SYNC2_stxp_dataerr_1z, SYNC3_stxp_dataerr_1z, tx_fifo_empty_i, cfg_enable, SPISDI_c, PF_CCC_0_0_OUT0_FABCLK_0, dff ) ; output CoreAPB3_0_0_APBmslave2_PRDATA_0 ; input rdata_0 ; input rx_fifo_data_out_0 ; input [2:0] cfg_cmdsize ; input [3:2] CoreAPB3_0_0_APBmslave0_PADDR ; input [15:0] tx_fifo_data_out ; output [15:0] rx_fifo_data_in ; input [7:0] clk_div_val ; input prdata_1 ; input un1_PADDR ; output tx_fifo_read ; input cfg_frameurun ; output tx_done ; output un1_PADDR_3_1z ; input un1_PADDR_2 ; output active_1_1z ; output un4_busy ; input tx_fifo_empty ; output SPISDO_c ; input SPIMODE ; input tx_fifo_last_out ; output rx_fifo_first_in ; output SPISCLKO_c ; output master_ssel_out ; output rx_pktend ; output rx_fifo_write ; output rx_cmdsize_1z ; output rx_done ; output SYNC2_stxp_dataerr_1z ; output SYNC3_stxp_dataerr_1z ; input tx_fifo_empty_i ; input cfg_enable ; input SPISDI_c ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input dff ; wire CoreAPB3_0_0_APBmslave2_PRDATA_0 ; wire rdata_0 ; wire rx_fifo_data_out_0 ; wire prdata_1 ; wire un1_PADDR ; wire tx_fifo_read ; wire cfg_frameurun ; wire tx_done ; wire un1_PADDR_3_1z ; wire un1_PADDR_2 ; wire active_1_1z ; wire un4_busy ; wire tx_fifo_empty ; wire SPISDO_c ; wire SPIMODE ; wire tx_fifo_last_out ; wire rx_fifo_first_in ; wire SPISCLKO_c ; wire master_ssel_out ; wire rx_pktend ; wire rx_fifo_write ; wire rx_cmdsize_1z ; wire rx_done ; wire SYNC2_stxp_dataerr_1z ; wire SYNC3_stxp_dataerr_1z ; wire tx_fifo_empty_i ; wire cfg_enable ; wire SPISDI_c ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire dff ; wire [7:0] spi_clk_count_Z; wire [7:7] spi_clk_count_s_Z; wire [6:0] spi_clk_count_s; wire [5:0] mtx_state_Z; wire [5:0] mtx_state_ns; wire [4:0] mtx_bitsel_Z; wire [4:0] mtx_bitsel_10_Z; wire [7:0] clk_div_val_reg_Z; wire [15:0] stxs_datareg_Z; wire [15:0] stxs_datareg_10; wire [2:1] msrxp_frames_Z; wire [2:0] msrxp_frames_4_Z; wire [9:9] msrxs_shiftreg_Z; wire [15:1] msrxs_datain_5; wire [2:0] mtx_datahold_Z; wire [15:0] txfifo_datadelay_Z; wire [3:0] stxs_bitsel_Z; wire [3:0] stxs_bitsel_6; wire [4:0] stxs_bitcnt_Z; wire [6:0] spi_clk_count_cry_Z; wire [6:0] spi_clk_count_cry_Y; wire [7:7] spi_clk_count_s_FCO; wire [7:7] spi_clk_count_s_Y; wire [5:5] mtx_state_ns_0_a3_2_Z; wire [5:5] mtx_state_ns_0_a3_1_Z; wire [3:3] mtx_state_ns_i_a3_2_Z; wire [3:3] mtx_state_ns_i_0_Z; wire [3:3] mtx_state_ns_i_a3_3_Z; wire [15:1] stxs_datareg_10_iv_0_Z; wire un1_spi_clk_count18_2_Z ; wire N_106_i ; wire VCC ; wire GND ; wire mtx_firstrx_Z ; wire mtx_first_Z ; wire mtx_re_q2_Z ; wire mtx_re_q1_Z ; wire mtx_re_Z ; wire data_rx_q2_Z ; wire data_rx_q1_Z ; wire clock_rx_q3_Z ; wire clock_rx_q2_Z ; wire clock_rx_q1_Z ; wire clock_rx_mux1 ; wire msrx_async_reset_ok_Z ; wire txfifo_davailable_Z ; wire SYNC3_stxp_strobetx_Z ; wire SYNC2_stxp_strobetx_Z ; wire SYNC1_stxp_strobetx_Z ; wire SYNC1_stxp_dataerr_Z ; wire stxs_strobetx_Z ; wire stxs_dataerr_Z ; wire SYNC1_stxs_txready_Z ; wire SYNC1_msrxp_pktsel_Z ; wire msrxs_pktsel_Z ; wire rx_alldone_3 ; wire SYNC3_msrxp_strobe_Z ; wire SYNC2_msrxp_strobe_Z ; wire SYNC1_msrxp_strobe_Z ; wire msrxs_strobe_Z ; wire SYNC3_msrxp_pktsel_Z ; wire SYNC2_msrxp_pktsel_Z ; wire ssel_rx_q2_Z ; wire ssel_rx_q1_Z ; wire mtx_re_4 ; wire mtx_fiforead_Z ; wire mtx_lastframe_1_sqmuxa_1_Z ; wire rx_cmdsize_4_Z ; wire msrxp_alldone_4_Z ; wire resetn_rx_d2_Z ; wire un1_resetn_rx_i ; wire resetn_rx_d1_Z ; wire msrxp_alldone_0_sqmuxa_Z ; wire mtx_midbit_Z ; wire mtx_midbit_3 ; wire mtx_lastbit_Z ; wire mtx_lastbit_3 ; wire msrxp_pktend8_Z ; wire stx_async_reset_ok_Z ; wire stx_async_reset_ok_2_Z ; wire mtx_first_3_m ; wire mtx_alldone_Z ; wire mtx_oen_0_sqmuxa_Z ; wire mtx_spi_data_out_Z ; wire mtx_spi_data_out_2 ; wire spi_clk_tick_Z ; wire spi_clk_tick_4_Z ; wire N_307_i ; wire N_305_i ; wire N_303_i ; wire N_301_i ; wire un1_resetn_tx_i ; wire stxs_dataerr_5 ; wire clock_rx_fe_Z ; wire stxs_txzeros_Z ; wire stxs_txzeros_4 ; wire mtx_consecutive_Z ; wire mtx_consecutive_0_sqmuxa_Z ; wire un1_spi_clk_count18_5_Z ; wire stxs_strobetx_5 ; wire mtx_busy_Z ; wire un1_mtx_busy_1_sqmuxa_Z ; wire un1_spi_clk_count18_7_Z ; wire mtx_rxbusy_Z ; wire un1_mtx_busy_1_sqmuxa_1_Z ; wire mtx_first_8 ; wire un1_mtx_alldone_2_sqmuxa_1_i ; wire mtx_pktsel_Z ; wire mtx_pktsel_7 ; wire un1_mtx_alldone_2_sqmuxa_i ; wire stxs_lastbit_Z ; wire stxs_lastbit_3_Z ; wire stxs_midbit_Z ; wire stxs_midbit_3_Z ; wire stxs_txready_at_ssel_Z ; wire resetn_rx_s_Z ; wire stxs_state_Z ; wire stxs_bitsel_0_sqmuxa_Z ; wire stxs_direct_Z ; wire stxs_state_1_sqmuxa_Z ; wire stxp_lastframe_Z ; wire stxp_lastframe_5_Z ; wire un1_txfifo_read_i ; wire stxs_pktsel_Z ; wire stxs_pktsel_0_sqmuxa_Z ; wire msrxs_first_2_Z ; wire stxs_first_Z ; wire stxs_first_3 ; wire mtx_lastframe_Z ; wire un1_spi_clk_count18_3_Z ; wire N_489_i ; wire un1_msrxs_datain_1_sqmuxa_1_i ; wire mtx_holdsel_Z ; wire mtx_state_1_sqmuxa_Z ; wire un1_mtx_busy_0_sqmuxa_i ; wire stxs_checkorun_Z ; wire stxs_checkorun_5 ; wire clk_div_val_reg_1_sqmuxa_i_Z ; wire stxs_datareg_1_sqmuxa_2_i_Z ; wire msrxp_frames_2_sqmuxa_i_Z ; wire CO0 ; wire msrxs_datain_1_sqmuxa_i ; wire spi_di_mux_Z ; wire un1_spi_clk_count18_4_Z ; wire stxs_bitcnt_n1_Z ; wire N_56_i ; wire stxs_bitcnt_n4_Z ; wire stxs_bitcnt_n3_Z ; wire stxs_bitcnt_n2_Z ; wire spi_clk_count_s_4130_FCO ; wire spi_clk_count_s_4130_S ; wire spi_clk_count_s_4130_Y ; wire spi_clk_count_1_sqmuxa_Z ; wire mtx_spi_data_out_2_9_1_0_co1 ; wire mtx_spi_data_out_2_9_1_wmux_0_S ; wire N_364 ; wire mtx_spi_data_out_2_9_1_0_y0 ; wire mtx_spi_data_out_2_9_1_0_co0 ; wire mtx_spi_data_out_2_9_1_0_wmux_S ; wire mtx_spi_data_out_2_11_1_0_co1 ; wire mtx_spi_data_out_2_11_1_wmux_0_S ; wire N_366 ; wire mtx_spi_data_out_2_11_1_0_y0 ; wire mtx_spi_data_out_2_11_1_0_co0 ; wire mtx_spi_data_out_2_11_1_0_wmux_S ; wire mtx_spi_data_out_2_13_2_wmux_3_FCO ; wire mtx_spi_data_out_2_13_2_wmux_3_S ; wire N_368 ; wire mtx_spi_data_out_2_13_2_0_y1 ; wire mtx_spi_data_out_2_13_2_0_y3 ; wire mtx_spi_data_out_2_13_2_co1_0 ; wire mtx_spi_data_out_2_13_2_wmux_2_S ; wire mtx_spi_data_out_2_13_2_y0_0 ; wire mtx_spi_data_out_2_13_2_co0_0 ; wire mtx_spi_data_out_2_13_2_wmux_1_S ; wire mtx_spi_data_out_2_13_2_0_co1 ; wire mtx_spi_data_out_2_13_2_wmux_0_S ; wire mtx_spi_data_out_2_13_2_0_y0 ; wire mtx_spi_data_out_2_13_2_0_co0 ; wire mtx_spi_data_out_2_13_2_0_wmux_S ; wire un1_mtx_busy_0_sqmuxa_4_Z ; wire CO2 ; wire mtx_busy_1_sqmuxa_Z ; wire un1_spi_clk_count18_7_0 ; wire mtx_bitsel_1_sqmuxa_Z ; wire un1_stxs_bitsel_1_i ; wire stxs_datareg_1_sqmuxa_1_Z ; wire stxs_datareg4_1_Z ; wire stxs_midbit_2_Z ; wire mtx_state62_Z ; wire CO1 ; wire clock_rx_re_Z ; wire SPISDO_c_2 ; wire un1_stxs_strobetx17_1_Z ; wire mtx_datahold_0_sqmuxa_0_Z ; wire msrxs_strobe_1_sqmuxa_0_Z ; wire stxs_datareg_0_sqmuxa ; wire stxs_lastbit_3_1_Z ; wire N_205_i_0 ; wire stxs_state6_Z ; wire stxs_datareg4_3_Z ; wire mtx_bitsel_0_sqmuxa_Z ; wire N_322_3 ; wire un1_cfg_enable_Z ; wire clk_div_val_reg6 ; wire N_319_3 ; wire spi_data_out_sn_N_3 ; wire mtx_bitsel7_Z ; wire mtx_bitsel_1_sqmuxa_2_Z ; wire SYNC2_msrxp_pktsel_RNIB5HSE_Z ; wire clock_rx_re_slave_Z ; wire msrxs_first6_Z ; wire spi_ssel_mux_Z ; wire N_367 ; wire N_312 ; wire un1_spi_clk_count18_10_0_Z ; wire stxs_datareg4_1_0_Z ; wire spi_clk_nextd4_NE_3_Z ; wire spi_clk_nextd4_NE_2_Z ; wire spi_clk_nextd4_NE_1_Z ; wire spi_clk_nextd4_NE_0_Z ; wire N_315 ; wire N_316 ; wire mtx_alldone_2_sqmuxa_Z ; wire spi_clk_next_1_sqmuxa ; wire stxs_bitcnt_c2_Z ; wire mtx_bitsel_0_sqmuxa_2_Z ; wire stxs_checkorun_1_sqmuxa_Z ; wire rx_cmdsize_2_1 ; wire stxs_checkorun_0_sqmuxa_Z ; wire rx_cmdsize_4_1_0 ; wire un1_stxs_bitcnt_1_i ; wire stxs_strobetx8_Z ; wire un1_stxs_strobetx17_Z ; wire rx_cmdsize_2_2 ; wire spi_clk_nextd5 ; wire N_322 ; wire mtx_bitsel_2_sqmuxa_Z ; wire un1_stxs_datareg_3_sqmuxa_Z ; wire CO2_0 ; wire mtx_bitsel_1_sqmuxa_3_Z ; wire mtx_datahold_0_sqmuxa_1_Z ; wire mtx_fiforead_2_sqmuxa_Z ; wire un1_spi_clk_count18_10_Z ; wire CO1_0 ; wire CO3 ; wire N_7451 ; wire N_41 ; wire N_40 ; wire N_39 ; wire N_38 ; wire N_37 ; wire N_36 ; wire N_7 ; wire N_6 ; CFG1 un1_spi_clk_count18_2_RNIK0CU6 ( .A(un1_spi_clk_count18_2_Z), .Y(N_106_i) ); defparam un1_spi_clk_count18_2_RNIK0CU6.INIT=2'h1; // @21:286 SLE \spi_clk_count[7] ( .Q(spi_clk_count_Z[7]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(spi_clk_count_s_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:286 SLE \spi_clk_count[6] ( .Q(spi_clk_count_Z[6]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(spi_clk_count_s[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:286 SLE \spi_clk_count[5] ( .Q(spi_clk_count_Z[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(spi_clk_count_s[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:286 SLE \spi_clk_count[4] ( .Q(spi_clk_count_Z[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(spi_clk_count_s[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:286 SLE \spi_clk_count[3] ( .Q(spi_clk_count_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(spi_clk_count_s[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:286 SLE \spi_clk_count[2] ( .Q(spi_clk_count_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(spi_clk_count_s[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:286 SLE \spi_clk_count[1] ( .Q(spi_clk_count_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(spi_clk_count_s[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:286 SLE \spi_clk_count[0] ( .Q(spi_clk_count_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(spi_clk_count_s[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:630 SLE mtx_firstrx ( .Q(mtx_firstrx_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtx_first_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:358 SLE mtx_re_q2 ( .Q(mtx_re_q2_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtx_re_q1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:358 SLE mtx_re_q1 ( .Q(mtx_re_q1_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtx_re_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1098 SLE data_rx_q2 ( .Q(data_rx_q2_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_rx_q1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1098 SLE data_rx_q1 ( .Q(data_rx_q1_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(SPISDI_c), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1098 SLE clock_rx_q3 ( .Q(clock_rx_q3_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(clock_rx_q2_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1098 SLE clock_rx_q2 ( .Q(clock_rx_q2_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(clock_rx_q1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1098 SLE clock_rx_q1 ( .Q(clock_rx_q1_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(clock_rx_mux1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1053 SLE msrx_async_reset_ok ( .Q(msrx_async_reset_ok_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cfg_enable), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1014 SLE txfifo_davailable ( .Q(txfifo_davailable_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(tx_fifo_empty_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:980 SLE SYNC3_stxp_strobetx ( .Q(SYNC3_stxp_strobetx_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(SYNC2_stxp_strobetx_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:980 SLE SYNC3_stxp_dataerr ( .Q(SYNC3_stxp_dataerr_1z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(SYNC2_stxp_dataerr_1z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:980 SLE SYNC2_stxp_strobetx ( .Q(SYNC2_stxp_strobetx_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(SYNC1_stxp_strobetx_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:980 SLE SYNC2_stxp_dataerr ( .Q(SYNC2_stxp_dataerr_1z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(SYNC1_stxp_dataerr_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:980 SLE SYNC1_stxp_strobetx ( .Q(SYNC1_stxp_strobetx_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stxs_strobetx_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:980 SLE SYNC1_stxp_dataerr ( .Q(SYNC1_stxp_dataerr_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stxs_dataerr_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:733 SLE SYNC1_stxs_txready ( .Q(SYNC1_stxs_txready_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(txfifo_davailable_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1172 SLE SYNC1_msrxp_pktsel ( .Q(SYNC1_msrxp_pktsel_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxs_pktsel_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1194 SLE rx_alldone ( .Q(rx_done), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rx_alldone_3), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1172 SLE SYNC3_msrxp_strobe ( .Q(SYNC3_msrxp_strobe_Z), .ADn(GND), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(SYNC2_msrxp_strobe_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1172 SLE SYNC2_msrxp_strobe ( .Q(SYNC2_msrxp_strobe_Z), .ADn(GND), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(SYNC1_msrxp_strobe_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1172 SLE SYNC1_msrxp_strobe ( .Q(SYNC1_msrxp_strobe_Z), .ADn(GND), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxs_strobe_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1172 SLE SYNC3_msrxp_pktsel ( .Q(SYNC3_msrxp_pktsel_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(SYNC2_msrxp_pktsel_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1172 SLE SYNC2_msrxp_pktsel ( .Q(SYNC2_msrxp_pktsel_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(SYNC1_msrxp_pktsel_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1098 SLE ssel_rx_q2 ( .Q(ssel_rx_q2_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ssel_rx_q1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1098 SLE ssel_rx_q1 ( .Q(ssel_rx_q1_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:416 SLE mtx_re ( .Q(mtx_re_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtx_re_4), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:416 SLE mtx_fiforead ( .Q(mtx_fiforead_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtx_lastframe_1_sqmuxa_1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1238 SLE rx_cmdsize ( .Q(rx_cmdsize_1z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rx_cmdsize_4_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1194 SLE msrxp_alldone ( .Q(rx_alldone_3), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxp_alldone_4_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:791 SLE resetn_rx_d2 ( .Q(resetn_rx_d2_Z), .ADn(VCC), .ALn(un1_resetn_rx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(resetn_rx_d1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:791 SLE resetn_rx_d1 ( .Q(resetn_rx_d1_Z), .ADn(VCC), .ALn(un1_resetn_rx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1194 SLE msrxp_strobe ( .Q(rx_fifo_write), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxp_alldone_0_sqmuxa_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:630 SLE mtx_midbit ( .Q(mtx_midbit_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtx_midbit_3), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:630 SLE mtx_lastbit ( .Q(mtx_lastbit_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtx_lastbit_3), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1194 SLE msrxp_pktend ( .Q(rx_pktend), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxp_pktend8_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1053 SLE stx_async_reset_ok ( .Q(stx_async_reset_ok_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stx_async_reset_ok_2_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:630 SLE spi_ssel_pos ( .Q(master_ssel_out), .ADn(GND), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtx_first_3_m), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:416 SLE mtx_alldone ( .Q(mtx_alldone_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtx_oen_0_sqmuxa_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:630 SLE mtx_spi_data_out ( .Q(mtx_spi_data_out_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtx_spi_data_out_2), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:286 SLE spi_clk_tick ( .Q(spi_clk_tick_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(spi_clk_tick_4_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:630 SLE spi_clk_out ( .Q(SPISCLKO_c), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtx_state_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:416 SLE \mtx_state[5] ( .Q(mtx_state_Z[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtx_state_ns[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:416 SLE \mtx_state[4] ( .Q(mtx_state_Z[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_307_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:416 SLE \mtx_state[3] ( .Q(mtx_state_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_305_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:416 SLE \mtx_state[2] ( .Q(mtx_state_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_303_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:416 SLE \mtx_state[1] ( .Q(mtx_state_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_301_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:416 SLE \mtx_state[0] ( .Q(mtx_state_Z[0]), .ADn(GND), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtx_state_ns[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:823 SLE stxs_dataerr ( .Q(stxs_dataerr_Z), .ADn(VCC), .ALn(un1_resetn_tx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stxs_dataerr_5), .EN(clock_rx_fe_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:823 SLE stxs_txzeros ( .Q(stxs_txzeros_Z), .ADn(VCC), .ALn(un1_resetn_tx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stxs_txzeros_4), .EN(clock_rx_fe_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:416 SLE mtx_consecutive ( .Q(mtx_consecutive_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtx_consecutive_0_sqmuxa_Z), .EN(un1_spi_clk_count18_5_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:823 SLE stxs_strobetx ( .Q(stxs_strobetx_Z), .ADn(VCC), .ALn(un1_resetn_tx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stxs_strobetx_5), .EN(clock_rx_fe_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:416 SLE mtx_busy ( .Q(mtx_busy_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un1_mtx_busy_1_sqmuxa_Z), .EN(un1_spi_clk_count18_7_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:416 SLE mtx_rxbusy ( .Q(mtx_rxbusy_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un1_mtx_busy_1_sqmuxa_Z), .EN(un1_mtx_busy_1_sqmuxa_1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:416 SLE mtx_first ( .Q(mtx_first_Z), .ADn(GND), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtx_first_8), .EN(un1_mtx_alldone_2_sqmuxa_1_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:416 SLE mtx_pktsel ( .Q(mtx_pktsel_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtx_pktsel_7), .EN(un1_mtx_alldone_2_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:823 SLE stxs_lastbit ( .Q(stxs_lastbit_Z), .ADn(VCC), .ALn(un1_resetn_tx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stxs_lastbit_3_Z), .EN(clock_rx_fe_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:823 SLE stxs_midbit ( .Q(stxs_midbit_Z), .ADn(VCC), .ALn(un1_resetn_tx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stxs_midbit_3_Z), .EN(clock_rx_fe_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:807 SLE stxs_txready_at_ssel ( .Q(stxs_txready_at_ssel_Z), .ADn(VCC), .ALn(un1_resetn_rx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(txfifo_davailable_Z), .EN(resetn_rx_s_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:823 SLE stxs_state ( .Q(stxs_state_Z), .ADn(VCC), .ALn(un1_resetn_tx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(stxs_bitsel_0_sqmuxa_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:823 SLE stxs_direct ( .Q(stxs_direct_Z), .ADn(GND), .ALn(un1_resetn_tx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stxs_state_1_sqmuxa_Z), .EN(clock_rx_fe_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1014 SLE stxp_lastframe ( .Q(stxp_lastframe_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stxp_lastframe_5_Z), .EN(un1_txfifo_read_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:823 SLE stxs_pktsel ( .Q(stxs_pktsel_Z), .ADn(VCC), .ALn(un1_resetn_tx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(stxs_pktsel_0_sqmuxa_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1130 SLE msrxs_first ( .Q(rx_fifo_first_in), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxs_first_2_Z), .EN(un1_spi_clk_count18_2_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:823 SLE stxs_first ( .Q(stxs_first_Z), .ADn(VCC), .ALn(un1_resetn_tx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stxs_first_3), .EN(clock_rx_fe_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:416 SLE mtx_lastframe ( .Q(mtx_lastframe_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(tx_fifo_last_out), .EN(un1_spi_clk_count18_3_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1130 SLE msrxs_strobe ( .Q(msrxs_strobe_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_489_i), .EN(un1_msrxs_datain_1_sqmuxa_1_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:416 SLE mtx_holdsel ( .Q(mtx_holdsel_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtx_state_1_sqmuxa_Z), .EN(un1_mtx_busy_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:823 SLE stxs_checkorun ( .Q(stxs_checkorun_Z), .ADn(VCC), .ALn(un1_resetn_tx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stxs_checkorun_5), .EN(clock_rx_fe_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:416 SLE \mtx_bitsel[4] ( .Q(mtx_bitsel_Z[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtx_bitsel_10_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:416 SLE \mtx_bitsel[3] ( .Q(mtx_bitsel_Z[3]), .ADn(GND), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtx_bitsel_10_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:416 SLE \mtx_bitsel[2] ( .Q(mtx_bitsel_Z[2]), .ADn(GND), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtx_bitsel_10_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:416 SLE \mtx_bitsel[1] ( .Q(mtx_bitsel_Z[1]), .ADn(GND), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtx_bitsel_10_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:416 SLE \mtx_bitsel[0] ( .Q(mtx_bitsel_Z[0]), .ADn(GND), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtx_bitsel_10_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:323 SLE \clk_div_val_reg[7] ( .Q(clk_div_val_reg_Z[7]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(clk_div_val[7]), .EN(clk_div_val_reg_1_sqmuxa_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:323 SLE \clk_div_val_reg[6] ( .Q(clk_div_val_reg_Z[6]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(clk_div_val[6]), .EN(clk_div_val_reg_1_sqmuxa_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:323 SLE \clk_div_val_reg[5] ( .Q(clk_div_val_reg_Z[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(clk_div_val[5]), .EN(clk_div_val_reg_1_sqmuxa_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:323 SLE \clk_div_val_reg[4] ( .Q(clk_div_val_reg_Z[4]), .ADn(GND), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(clk_div_val[4]), .EN(clk_div_val_reg_1_sqmuxa_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:323 SLE \clk_div_val_reg[3] ( .Q(clk_div_val_reg_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(clk_div_val[3]), .EN(clk_div_val_reg_1_sqmuxa_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:323 SLE \clk_div_val_reg[2] ( .Q(clk_div_val_reg_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(clk_div_val[2]), .EN(clk_div_val_reg_1_sqmuxa_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:323 SLE \clk_div_val_reg[1] ( .Q(clk_div_val_reg_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(clk_div_val[1]), .EN(clk_div_val_reg_1_sqmuxa_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:323 SLE \clk_div_val_reg[0] ( .Q(clk_div_val_reg_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(clk_div_val[0]), .EN(clk_div_val_reg_1_sqmuxa_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:823 SLE \stxs_datareg[10] ( .Q(stxs_datareg_Z[10]), .ADn(VCC), .ALn(un1_resetn_tx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stxs_datareg_10[10]), .EN(stxs_datareg_1_sqmuxa_2_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:823 SLE \stxs_datareg[9] ( .Q(stxs_datareg_Z[9]), .ADn(VCC), .ALn(un1_resetn_tx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stxs_datareg_10[9]), .EN(stxs_datareg_1_sqmuxa_2_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:823 SLE \stxs_datareg[8] ( .Q(stxs_datareg_Z[8]), .ADn(VCC), .ALn(un1_resetn_tx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stxs_datareg_10[8]), .EN(stxs_datareg_1_sqmuxa_2_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:823 SLE \stxs_datareg[7] ( .Q(stxs_datareg_Z[7]), .ADn(VCC), .ALn(un1_resetn_tx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stxs_datareg_10[7]), .EN(stxs_datareg_1_sqmuxa_2_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:823 SLE \stxs_datareg[6] ( .Q(stxs_datareg_Z[6]), .ADn(VCC), .ALn(un1_resetn_tx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stxs_datareg_10[6]), .EN(stxs_datareg_1_sqmuxa_2_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:823 SLE \stxs_datareg[5] ( .Q(stxs_datareg_Z[5]), .ADn(VCC), .ALn(un1_resetn_tx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stxs_datareg_10[5]), .EN(stxs_datareg_1_sqmuxa_2_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:823 SLE \stxs_datareg[4] ( .Q(stxs_datareg_Z[4]), .ADn(VCC), .ALn(un1_resetn_tx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stxs_datareg_10[4]), .EN(stxs_datareg_1_sqmuxa_2_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:823 SLE \stxs_datareg[3] ( .Q(stxs_datareg_Z[3]), .ADn(VCC), .ALn(un1_resetn_tx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stxs_datareg_10[3]), .EN(stxs_datareg_1_sqmuxa_2_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:823 SLE \stxs_datareg[2] ( .Q(stxs_datareg_Z[2]), .ADn(VCC), .ALn(un1_resetn_tx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stxs_datareg_10[2]), .EN(stxs_datareg_1_sqmuxa_2_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:823 SLE \stxs_datareg[1] ( .Q(stxs_datareg_Z[1]), .ADn(VCC), .ALn(un1_resetn_tx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stxs_datareg_10[1]), .EN(stxs_datareg_1_sqmuxa_2_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:823 SLE \stxs_datareg[0] ( .Q(stxs_datareg_Z[0]), .ADn(VCC), .ALn(un1_resetn_tx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stxs_datareg_10[0]), .EN(stxs_datareg_1_sqmuxa_2_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1238 SLE \msrxp_frames[2] ( .Q(msrxp_frames_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxp_frames_4_Z[2]), .EN(msrxp_frames_2_sqmuxa_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1238 SLE \msrxp_frames[1] ( .Q(msrxp_frames_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxp_frames_4_Z[1]), .EN(msrxp_frames_2_sqmuxa_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1238 SLE \msrxp_frames[0] ( .Q(CO0), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxp_frames_4_Z[0]), .EN(msrxp_frames_2_sqmuxa_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1130 SLE \msrxs_shiftreg[9] ( .Q(msrxs_shiftreg_Z[9]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxs_datain_5[9]), .EN(msrxs_datain_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_106_i) ); // @21:1130 SLE \msrxs_shiftreg[8] ( .Q(msrxs_datain_5[9]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxs_datain_5[8]), .EN(msrxs_datain_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_106_i) ); // @21:1130 SLE \msrxs_shiftreg[7] ( .Q(msrxs_datain_5[8]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxs_datain_5[7]), .EN(msrxs_datain_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_106_i) ); // @21:1130 SLE \msrxs_shiftreg[6] ( .Q(msrxs_datain_5[7]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxs_datain_5[6]), .EN(msrxs_datain_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_106_i) ); // @21:1130 SLE \msrxs_shiftreg[5] ( .Q(msrxs_datain_5[6]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxs_datain_5[5]), .EN(msrxs_datain_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_106_i) ); // @21:1130 SLE \msrxs_shiftreg[4] ( .Q(msrxs_datain_5[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxs_datain_5[4]), .EN(msrxs_datain_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_106_i) ); // @21:1130 SLE \msrxs_shiftreg[3] ( .Q(msrxs_datain_5[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxs_datain_5[3]), .EN(msrxs_datain_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_106_i) ); // @21:1130 SLE \msrxs_shiftreg[2] ( .Q(msrxs_datain_5[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxs_datain_5[2]), .EN(msrxs_datain_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_106_i) ); // @21:1130 SLE \msrxs_shiftreg[1] ( .Q(msrxs_datain_5[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxs_datain_5[1]), .EN(msrxs_datain_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_106_i) ); // @21:1130 SLE \msrxs_shiftreg[0] ( .Q(msrxs_datain_5[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(spi_di_mux_Z), .EN(msrxs_datain_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_106_i) ); // @21:823 SLE \stxs_datareg[15] ( .Q(stxs_datareg_Z[15]), .ADn(VCC), .ALn(un1_resetn_tx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stxs_datareg_10[15]), .EN(stxs_datareg_1_sqmuxa_2_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:823 SLE \stxs_datareg[14] ( .Q(stxs_datareg_Z[14]), .ADn(VCC), .ALn(un1_resetn_tx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stxs_datareg_10[14]), .EN(stxs_datareg_1_sqmuxa_2_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:823 SLE \stxs_datareg[13] ( .Q(stxs_datareg_Z[13]), .ADn(VCC), .ALn(un1_resetn_tx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stxs_datareg_10[13]), .EN(stxs_datareg_1_sqmuxa_2_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:823 SLE \stxs_datareg[12] ( .Q(stxs_datareg_Z[12]), .ADn(VCC), .ALn(un1_resetn_tx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stxs_datareg_10[12]), .EN(stxs_datareg_1_sqmuxa_2_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:823 SLE \stxs_datareg[11] ( .Q(stxs_datareg_Z[11]), .ADn(VCC), .ALn(un1_resetn_tx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stxs_datareg_10[11]), .EN(stxs_datareg_1_sqmuxa_2_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:416 SLE \mtx_datahold[2] ( .Q(mtx_datahold_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(tx_fifo_data_out[2]), .EN(un1_spi_clk_count18_4_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:416 SLE \mtx_datahold[1] ( .Q(mtx_datahold_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(tx_fifo_data_out[1]), .EN(un1_spi_clk_count18_4_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:416 SLE \mtx_datahold[0] ( .Q(mtx_datahold_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(tx_fifo_data_out[0]), .EN(un1_spi_clk_count18_4_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1130 SLE \msrxs_shiftreg[14] ( .Q(msrxs_datain_5[15]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxs_datain_5[14]), .EN(msrxs_datain_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_106_i) ); // @21:1130 SLE \msrxs_shiftreg[13] ( .Q(msrxs_datain_5[14]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxs_datain_5[13]), .EN(msrxs_datain_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_106_i) ); // @21:1130 SLE \msrxs_shiftreg[12] ( .Q(msrxs_datain_5[13]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxs_datain_5[12]), .EN(msrxs_datain_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_106_i) ); // @21:1130 SLE \msrxs_shiftreg[11] ( .Q(msrxs_datain_5[12]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxs_datain_5[11]), .EN(msrxs_datain_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_106_i) ); // @21:1130 SLE \msrxs_shiftreg[10] ( .Q(msrxs_datain_5[11]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxs_shiftreg_Z[9]), .EN(msrxs_datain_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_106_i) ); // @21:1130 SLE \msrxs_datain[13] ( .Q(rx_fifo_data_in[13]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxs_datain_5[13]), .EN(un1_spi_clk_count18_2_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1130 SLE \msrxs_datain[12] ( .Q(rx_fifo_data_in[12]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxs_datain_5[12]), .EN(un1_spi_clk_count18_2_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1130 SLE \msrxs_datain[11] ( .Q(rx_fifo_data_in[11]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxs_datain_5[11]), .EN(un1_spi_clk_count18_2_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1130 SLE \msrxs_datain[10] ( .Q(rx_fifo_data_in[10]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxs_shiftreg_Z[9]), .EN(un1_spi_clk_count18_2_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1130 SLE \msrxs_datain[9] ( .Q(rx_fifo_data_in[9]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxs_datain_5[9]), .EN(un1_spi_clk_count18_2_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1130 SLE \msrxs_datain[8] ( .Q(rx_fifo_data_in[8]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxs_datain_5[8]), .EN(un1_spi_clk_count18_2_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1130 SLE \msrxs_datain[7] ( .Q(rx_fifo_data_in[7]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxs_datain_5[7]), .EN(un1_spi_clk_count18_2_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1130 SLE \msrxs_datain[6] ( .Q(rx_fifo_data_in[6]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxs_datain_5[6]), .EN(un1_spi_clk_count18_2_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1130 SLE \msrxs_datain[5] ( .Q(rx_fifo_data_in[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxs_datain_5[5]), .EN(un1_spi_clk_count18_2_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1130 SLE \msrxs_datain[4] ( .Q(rx_fifo_data_in[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxs_datain_5[4]), .EN(un1_spi_clk_count18_2_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1130 SLE \msrxs_datain[3] ( .Q(rx_fifo_data_in[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxs_datain_5[3]), .EN(un1_spi_clk_count18_2_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1130 SLE \msrxs_datain[2] ( .Q(rx_fifo_data_in[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxs_datain_5[2]), .EN(un1_spi_clk_count18_2_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1130 SLE \msrxs_datain[1] ( .Q(rx_fifo_data_in[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxs_datain_5[1]), .EN(un1_spi_clk_count18_2_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1130 SLE \msrxs_datain[0] ( .Q(rx_fifo_data_in[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(spi_di_mux_Z), .EN(un1_spi_clk_count18_2_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1014 SLE \txfifo_datadelay[8] ( .Q(txfifo_datadelay_Z[8]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(tx_fifo_data_out[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1014 SLE \txfifo_datadelay[7] ( .Q(txfifo_datadelay_Z[7]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(tx_fifo_data_out[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1014 SLE \txfifo_datadelay[6] ( .Q(txfifo_datadelay_Z[6]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(tx_fifo_data_out[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1014 SLE \txfifo_datadelay[5] ( .Q(txfifo_datadelay_Z[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(tx_fifo_data_out[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1014 SLE \txfifo_datadelay[4] ( .Q(txfifo_datadelay_Z[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(tx_fifo_data_out[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1014 SLE \txfifo_datadelay[3] ( .Q(txfifo_datadelay_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(tx_fifo_data_out[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1014 SLE \txfifo_datadelay[2] ( .Q(txfifo_datadelay_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(tx_fifo_data_out[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1014 SLE \txfifo_datadelay[1] ( .Q(txfifo_datadelay_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(tx_fifo_data_out[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1014 SLE \txfifo_datadelay[0] ( .Q(txfifo_datadelay_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(tx_fifo_data_out[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:823 SLE \stxs_bitsel[3] ( .Q(stxs_bitsel_Z[3]), .ADn(VCC), .ALn(un1_resetn_tx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stxs_bitsel_6[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:823 SLE \stxs_bitsel[2] ( .Q(stxs_bitsel_Z[2]), .ADn(VCC), .ALn(un1_resetn_tx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stxs_bitsel_6[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:823 SLE \stxs_bitsel[1] ( .Q(stxs_bitsel_Z[1]), .ADn(VCC), .ALn(un1_resetn_tx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stxs_bitsel_6[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:823 SLE \stxs_bitsel[0] ( .Q(stxs_bitsel_Z[0]), .ADn(VCC), .ALn(un1_resetn_tx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stxs_bitsel_6[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1130 SLE \msrxs_datain[15] ( .Q(rx_fifo_data_in[15]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxs_datain_5[15]), .EN(un1_spi_clk_count18_2_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1130 SLE \msrxs_datain[14] ( .Q(rx_fifo_data_in[14]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(msrxs_datain_5[14]), .EN(un1_spi_clk_count18_2_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1014 SLE \txfifo_datadelay[15] ( .Q(txfifo_datadelay_Z[15]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(tx_fifo_data_out[15]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1014 SLE \txfifo_datadelay[14] ( .Q(txfifo_datadelay_Z[14]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(tx_fifo_data_out[14]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1014 SLE \txfifo_datadelay[13] ( .Q(txfifo_datadelay_Z[13]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(tx_fifo_data_out[13]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1014 SLE \txfifo_datadelay[12] ( .Q(txfifo_datadelay_Z[12]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(tx_fifo_data_out[12]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1014 SLE \txfifo_datadelay[11] ( .Q(txfifo_datadelay_Z[11]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(tx_fifo_data_out[11]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1014 SLE \txfifo_datadelay[10] ( .Q(txfifo_datadelay_Z[10]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(tx_fifo_data_out[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:1014 SLE \txfifo_datadelay[9] ( .Q(txfifo_datadelay_Z[9]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(tx_fifo_data_out[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:823 SLE \stxs_bitcnt[1] ( .Q(stxs_bitcnt_Z[1]), .ADn(VCC), .ALn(un1_resetn_tx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stxs_bitcnt_n1_Z), .EN(clock_rx_fe_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:823 SLE \stxs_bitcnt[0] ( .Q(stxs_bitcnt_Z[0]), .ADn(VCC), .ALn(un1_resetn_tx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_56_i), .EN(clock_rx_fe_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:823 SLE \stxs_bitcnt[4] ( .Q(stxs_bitcnt_Z[4]), .ADn(VCC), .ALn(un1_resetn_tx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stxs_bitcnt_n4_Z), .EN(clock_rx_fe_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:823 SLE \stxs_bitcnt[3] ( .Q(stxs_bitcnt_Z[3]), .ADn(VCC), .ALn(un1_resetn_tx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stxs_bitcnt_n3_Z), .EN(clock_rx_fe_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:823 SLE \stxs_bitcnt[2] ( .Q(stxs_bitcnt_Z[2]), .ADn(VCC), .ALn(un1_resetn_tx_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stxs_bitcnt_n2_Z), .EN(clock_rx_fe_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @21:286 ARI1 spi_clk_count_s_4130 ( .FCO(spi_clk_count_s_4130_FCO), .S(spi_clk_count_s_4130_S), .Y(spi_clk_count_s_4130_Y), .B(spi_clk_count_1_sqmuxa_Z), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam spi_clk_count_s_4130.INIT=20'h4AA00; // @21:286 ARI1 \spi_clk_count_cry[0] ( .FCO(spi_clk_count_cry_Z[0]), .S(spi_clk_count_s[0]), .Y(spi_clk_count_cry_Y[0]), .B(spi_clk_count_1_sqmuxa_Z), .C(spi_clk_count_Z[0]), .D(GND), .A(VCC), .FCI(spi_clk_count_s_4130_FCO) ); defparam \spi_clk_count_cry[0] .INIT=20'h48800; // @21:286 ARI1 \spi_clk_count_cry[1] ( .FCO(spi_clk_count_cry_Z[1]), .S(spi_clk_count_s[1]), .Y(spi_clk_count_cry_Y[1]), .B(spi_clk_count_1_sqmuxa_Z), .C(spi_clk_count_Z[1]), .D(GND), .A(VCC), .FCI(spi_clk_count_cry_Z[0]) ); defparam \spi_clk_count_cry[1] .INIT=20'h48800; // @21:286 ARI1 \spi_clk_count_cry[2] ( .FCO(spi_clk_count_cry_Z[2]), .S(spi_clk_count_s[2]), .Y(spi_clk_count_cry_Y[2]), .B(spi_clk_count_1_sqmuxa_Z), .C(spi_clk_count_Z[2]), .D(GND), .A(VCC), .FCI(spi_clk_count_cry_Z[1]) ); defparam \spi_clk_count_cry[2] .INIT=20'h48800; // @21:286 ARI1 \spi_clk_count_cry[3] ( .FCO(spi_clk_count_cry_Z[3]), .S(spi_clk_count_s[3]), .Y(spi_clk_count_cry_Y[3]), .B(spi_clk_count_1_sqmuxa_Z), .C(spi_clk_count_Z[3]), .D(GND), .A(VCC), .FCI(spi_clk_count_cry_Z[2]) ); defparam \spi_clk_count_cry[3] .INIT=20'h48800; // @21:286 ARI1 \spi_clk_count_cry[4] ( .FCO(spi_clk_count_cry_Z[4]), .S(spi_clk_count_s[4]), .Y(spi_clk_count_cry_Y[4]), .B(spi_clk_count_1_sqmuxa_Z), .C(spi_clk_count_Z[4]), .D(GND), .A(VCC), .FCI(spi_clk_count_cry_Z[3]) ); defparam \spi_clk_count_cry[4] .INIT=20'h48800; // @21:286 ARI1 \spi_clk_count_cry[5] ( .FCO(spi_clk_count_cry_Z[5]), .S(spi_clk_count_s[5]), .Y(spi_clk_count_cry_Y[5]), .B(spi_clk_count_1_sqmuxa_Z), .C(spi_clk_count_Z[5]), .D(GND), .A(VCC), .FCI(spi_clk_count_cry_Z[4]) ); defparam \spi_clk_count_cry[5] .INIT=20'h48800; // @21:286 ARI1 \spi_clk_count_s[7] ( .FCO(spi_clk_count_s_FCO[7]), .S(spi_clk_count_s_Z[7]), .Y(spi_clk_count_s_Y[7]), .B(spi_clk_count_1_sqmuxa_Z), .C(spi_clk_count_Z[7]), .D(GND), .A(VCC), .FCI(spi_clk_count_cry_Z[6]) ); defparam \spi_clk_count_s[7] .INIT=20'h48800; // @21:286 ARI1 \spi_clk_count_cry[6] ( .FCO(spi_clk_count_cry_Z[6]), .S(spi_clk_count_s[6]), .Y(spi_clk_count_cry_Y[6]), .B(spi_clk_count_1_sqmuxa_Z), .C(spi_clk_count_Z[6]), .D(GND), .A(VCC), .FCI(spi_clk_count_cry_Z[5]) ); defparam \spi_clk_count_cry[6] .INIT=20'h48800; // @21:704 ARI1 mtx_spi_data_out_2_9_1_wmux_0 ( .FCO(mtx_spi_data_out_2_9_1_0_co1), .S(mtx_spi_data_out_2_9_1_wmux_0_S), .Y(N_364), .B(mtx_bitsel_Z[2]), .C(tx_fifo_data_out[4]), .D(tx_fifo_data_out[5]), .A(mtx_spi_data_out_2_9_1_0_y0), .FCI(mtx_spi_data_out_2_9_1_0_co0) ); defparam mtx_spi_data_out_2_9_1_wmux_0.INIT=20'h0F588; // @21:704 ARI1 mtx_spi_data_out_2_9_1_0_wmux ( .FCO(mtx_spi_data_out_2_9_1_0_co0), .S(mtx_spi_data_out_2_9_1_0_wmux_S), .Y(mtx_spi_data_out_2_9_1_0_y0), .B(mtx_bitsel_Z[2]), .C(mtx_datahold_Z[0]), .D(mtx_datahold_Z[1]), .A(mtx_bitsel_Z[0]), .FCI(VCC) ); defparam mtx_spi_data_out_2_9_1_0_wmux.INIT=20'h0FA44; // @21:704 ARI1 mtx_spi_data_out_2_11_1_wmux_0 ( .FCO(mtx_spi_data_out_2_11_1_0_co1), .S(mtx_spi_data_out_2_11_1_wmux_0_S), .Y(N_366), .B(mtx_bitsel_Z[0]), .C(tx_fifo_data_out[9]), .D(tx_fifo_data_out[13]), .A(mtx_spi_data_out_2_11_1_0_y0), .FCI(mtx_spi_data_out_2_11_1_0_co0) ); defparam mtx_spi_data_out_2_11_1_wmux_0.INIT=20'h0F588; // @21:704 ARI1 mtx_spi_data_out_2_11_1_0_wmux ( .FCO(mtx_spi_data_out_2_11_1_0_co0), .S(mtx_spi_data_out_2_11_1_0_wmux_S), .Y(mtx_spi_data_out_2_11_1_0_y0), .B(mtx_bitsel_Z[0]), .C(tx_fifo_data_out[8]), .D(tx_fifo_data_out[12]), .A(mtx_bitsel_Z[2]), .FCI(VCC) ); defparam mtx_spi_data_out_2_11_1_0_wmux.INIT=20'h0FA44; ARI1 mtx_spi_data_out_2_13_2_wmux_3 ( .FCO(mtx_spi_data_out_2_13_2_wmux_3_FCO), .S(mtx_spi_data_out_2_13_2_wmux_3_S), .Y(N_368), .B(mtx_spi_data_out_2_13_2_0_y1), .C(mtx_bitsel_Z[0]), .D(VCC), .A(mtx_spi_data_out_2_13_2_0_y3), .FCI(mtx_spi_data_out_2_13_2_co1_0) ); defparam mtx_spi_data_out_2_13_2_wmux_3.INIT=20'h0EC2C; ARI1 mtx_spi_data_out_2_13_2_wmux_2 ( .FCO(mtx_spi_data_out_2_13_2_co1_0), .S(mtx_spi_data_out_2_13_2_wmux_2_S), .Y(mtx_spi_data_out_2_13_2_0_y3), .B(mtx_bitsel_Z[2]), .C(tx_fifo_data_out[7]), .D(tx_fifo_data_out[15]), .A(mtx_spi_data_out_2_13_2_y0_0), .FCI(mtx_spi_data_out_2_13_2_co0_0) ); defparam mtx_spi_data_out_2_13_2_wmux_2.INIT=20'h0F588; ARI1 mtx_spi_data_out_2_13_2_wmux_1 ( .FCO(mtx_spi_data_out_2_13_2_co0_0), .S(mtx_spi_data_out_2_13_2_wmux_1_S), .Y(mtx_spi_data_out_2_13_2_y0_0), .B(mtx_bitsel_Z[2]), .C(tx_fifo_data_out[3]), .D(tx_fifo_data_out[11]), .A(mtx_bitsel_Z[3]), .FCI(mtx_spi_data_out_2_13_2_0_co1) ); defparam mtx_spi_data_out_2_13_2_wmux_1.INIT=20'h0FA44; ARI1 mtx_spi_data_out_2_13_2_wmux_0 ( .FCO(mtx_spi_data_out_2_13_2_0_co1), .S(mtx_spi_data_out_2_13_2_wmux_0_S), .Y(mtx_spi_data_out_2_13_2_0_y1), .B(mtx_bitsel_Z[2]), .C(tx_fifo_data_out[6]), .D(tx_fifo_data_out[14]), .A(mtx_spi_data_out_2_13_2_0_y0), .FCI(mtx_spi_data_out_2_13_2_0_co0) ); defparam mtx_spi_data_out_2_13_2_wmux_0.INIT=20'h0F588; ARI1 mtx_spi_data_out_2_13_2_0_wmux ( .FCO(mtx_spi_data_out_2_13_2_0_co0), .S(mtx_spi_data_out_2_13_2_0_wmux_S), .Y(mtx_spi_data_out_2_13_2_0_y0), .B(mtx_bitsel_Z[2]), .C(mtx_datahold_Z[2]), .D(tx_fifo_data_out[10]), .A(mtx_bitsel_Z[3]), .FCI(VCC) ); defparam mtx_spi_data_out_2_13_2_0_wmux.INIT=20'h0FA44; // @21:555 CFG4 \un1_mtx_bitsel_1.CO2 ( .A(mtx_bitsel_Z[0]), .B(mtx_bitsel_Z[1]), .C(un1_mtx_busy_0_sqmuxa_4_Z), .D(mtx_bitsel_Z[2]), .Y(CO2) ); defparam \un1_mtx_bitsel_1.CO2 .INIT=16'h0F0E; // @21:418 CFG3 un1_mtx_busy_1_sqmuxa_1_0 ( .A(dff), .B(mtx_busy_1_sqmuxa_Z), .C(mtx_state_Z[2]), .Y(un1_spi_clk_count18_7_0) ); defparam un1_mtx_busy_1_sqmuxa_1_0.INIT=8'hD5; // @21:1085 CFG3 mtx_bitsel_1_sqmuxa ( .A(mtx_busy_1_sqmuxa_Z), .B(mtx_lastbit_3), .C(mtx_state_Z[4]), .Y(mtx_bitsel_1_sqmuxa_Z) ); defparam mtx_bitsel_1_sqmuxa.INIT=8'h80; // @21:418 CFG4 un1_spi_clk_count18_3 ( .A(mtx_state_Z[3]), .B(dff), .C(mtx_busy_1_sqmuxa_Z), .D(mtx_midbit_3), .Y(un1_spi_clk_count18_3_Z) ); defparam un1_spi_clk_count18_3.INIT=16'hB333; // @21:1085 CFG4 mtx_busy_1_sqmuxa ( .A(spi_clk_tick_Z), .B(cfg_enable), .C(dff), .D(SPIMODE), .Y(mtx_busy_1_sqmuxa_Z) ); defparam mtx_busy_1_sqmuxa.INIT=16'h8000; // @21:916 CFG4 un1_stxs_bitsel_1 ( .A(stxs_bitsel_Z[2]), .B(stxs_bitsel_Z[0]), .C(stxs_bitsel_Z[3]), .D(stxs_bitsel_Z[1]), .Y(un1_stxs_bitsel_1_i) ); defparam un1_stxs_bitsel_1.INIT=16'h0001; // @21:916 CFG4 stxs_datareg_1_sqmuxa_1 ( .A(clock_rx_fe_Z), .B(un1_stxs_bitsel_1_i), .C(stxs_direct_Z), .D(stxs_state_Z), .Y(stxs_datareg_1_sqmuxa_1_Z) ); defparam stxs_datareg_1_sqmuxa_1.INIT=16'h0200; // @21:886 CFG4 stxs_midbit_2 ( .A(stxs_bitcnt_Z[2]), .B(stxs_bitcnt_Z[3]), .C(stxs_bitcnt_Z[0]), .D(stxs_datareg4_1_Z), .Y(stxs_midbit_2_Z) ); defparam stxs_midbit_2.INIT=16'h1000; // @21:286 CFG3 mtx_state62 ( .A(SPIMODE), .B(cfg_enable), .C(spi_clk_tick_Z), .Y(mtx_state62_Z) ); defparam mtx_state62.INIT=8'h80; // @21:882 CFG4 \un1_stxs_bitsel_3_1.CO1 ( .A(stxs_bitsel_Z[1]), .B(stxs_bitsel_Z[0]), .C(stxs_state_Z), .D(clock_rx_fe_Z), .Y(CO1) ); defparam \un1_stxs_bitsel_3_1.CO1 .INIT=16'hE000; // @21:1132 CFG4 un1_spi_clk_count18_2 ( .A(mtx_lastbit_Z), .B(stxs_lastbit_Z), .C(dff), .D(clock_rx_re_Z), .Y(un1_spi_clk_count18_2_Z) ); defparam un1_spi_clk_count18_2.INIT=16'hEF0F; // @21:1038 CFG3 spi_data_out_u ( .A(SPISDO_c_2), .B(mtx_spi_data_out_Z), .C(SPIMODE), .Y(SPISDO_c) ); defparam spi_data_out_u.INIT=8'hEA; // @21:848 CFG3 \stxs_bitsel_6_f0[0] ( .A(stxs_pktsel_0_sqmuxa_Z), .B(stxs_bitsel_Z[0]), .C(un1_stxs_strobetx17_1_Z), .Y(stxs_bitsel_6[0]) ); defparam \stxs_bitsel_6_f0[0] .INIT=8'h4B; // @21:1085 CFG2 mtx_datahold_0_sqmuxa_0 ( .A(mtx_bitsel_Z[2]), .B(mtx_bitsel_Z[1]), .Y(mtx_datahold_0_sqmuxa_0_Z) ); defparam mtx_datahold_0_sqmuxa_0.INIT=4'h4; // @21:1148 CFG2 msrxs_strobe_1_sqmuxa_0 ( .A(mtx_midbit_Z), .B(stxs_midbit_Z), .Y(msrxs_strobe_1_sqmuxa_0_Z) ); defparam msrxs_strobe_1_sqmuxa_0.INIT=4'h1; // @21:1085 CFG2 stxs_bitsel_0_sqmuxa_0 ( .A(clock_rx_fe_Z), .B(stxs_state_Z), .Y(stxs_datareg_0_sqmuxa) ); defparam stxs_bitsel_0_sqmuxa_0.INIT=4'h2; // @21:844 CFG2 stxs_datareg4_1 ( .A(stxs_bitcnt_Z[1]), .B(stxs_bitcnt_Z[4]), .Y(stxs_datareg4_1_Z) ); defparam stxs_datareg4_1.INIT=4'h1; // @21:469 CFG2 mtx_bitsel7_0_0 ( .A(SPIMODE), .B(tx_fifo_empty), .Y(un4_busy) ); defparam mtx_bitsel7_0_0.INIT=4'h2; // @21:853 CFG2 stxs_lastbit_3_1 ( .A(stxs_bitsel_Z[1]), .B(stxs_bitsel_Z[2]), .Y(stxs_lastbit_3_1_Z) ); defparam stxs_lastbit_3_1.INIT=4'h1; // @21:916 CFG2 stxs_datareg_1_sqmuxa_1_2 ( .A(un1_stxs_bitsel_1_i), .B(stxs_state_Z), .Y(N_205_i_0) ); defparam stxs_datareg_1_sqmuxa_1_2.INIT=4'h4; // @21:1063 CFG2 stx_async_reset_ok_2 ( .A(SPIMODE), .B(cfg_enable), .Y(stx_async_reset_ok_2_Z) ); defparam stx_async_reset_ok_2.INIT=4'h4; // @21:865 CFG2 stxs_state_1_sqmuxa ( .A(stxs_state6_Z), .B(stxs_state_Z), .Y(stxs_state_1_sqmuxa_Z) ); defparam stxs_state_1_sqmuxa.INIT=4'h1; // @21:844 CFG2 stxs_datareg4_3 ( .A(stxs_bitcnt_Z[2]), .B(stxs_bitcnt_Z[3]), .Y(stxs_datareg4_3_Z) ); defparam stxs_datareg4_3.INIT=4'h1; // @21:418 CFG2 mtx_first_RNO ( .A(mtx_bitsel_0_sqmuxa_Z), .B(mtx_holdsel_Z), .Y(mtx_first_8) ); defparam mtx_first_RNO.INIT=4'h2; // @21:704 CFG2 txfifo_dhold_dec_0_2 ( .A(mtx_bitsel_Z[2]), .B(mtx_bitsel_Z[3]), .Y(N_322_3) ); defparam txfifo_dhold_dec_0_2.INIT=4'h1; // @21:297 CFG2 un1_cfg_enable ( .A(SPIMODE), .B(cfg_enable), .Y(un1_cfg_enable_Z) ); defparam un1_cfg_enable.INIT=4'h8; // @21:416 CFG2 \mtx_state_ns_i_a3_1[2] ( .A(mtx_state_Z[0]), .B(mtx_state_Z[1]), .Y(clk_div_val_reg6) ); defparam \mtx_state_ns_i_a3_1[2] .INIT=4'h1; // @21:1085 CFG2 mtx_datahold_0_sqmuxa_3 ( .A(mtx_bitsel_Z[3]), .B(mtx_bitsel_Z[4]), .Y(N_319_3) ); defparam mtx_datahold_0_sqmuxa_3.INIT=4'h1; // @21:823 CFG2 spi_data_out_u_2_0_RNO ( .A(SPIMODE), .B(stxs_txzeros_Z), .Y(spi_data_out_sn_N_3) ); defparam spi_data_out_u_2_0_RNO.INIT=4'h1; // @21:1085 CFG2 mtx_oen_0_sqmuxa ( .A(mtx_bitsel_1_sqmuxa_Z), .B(mtx_lastframe_Z), .Y(mtx_oen_0_sqmuxa_Z) ); defparam mtx_oen_0_sqmuxa.INIT=4'h8; // @21:848 CFG2 un1_stxs_strobetx17_1 ( .A(clock_rx_fe_Z), .B(stxs_state_Z), .Y(un1_stxs_strobetx17_1_Z) ); defparam un1_stxs_strobetx17_1.INIT=4'h7; // @21:1085 CFG2 mtx_bitsel_1_sqmuxa_2 ( .A(mtx_bitsel_0_sqmuxa_Z), .B(mtx_bitsel7_Z), .Y(mtx_bitsel_1_sqmuxa_2_Z) ); defparam mtx_bitsel_1_sqmuxa_2.INIT=4'h2; // @21:1214 CFG2 msrxp_pktend8 ( .A(SYNC2_msrxp_pktsel_Z), .B(SYNC3_msrxp_pktsel_Z), .Y(msrxp_pktend8_Z) ); defparam msrxp_pktend8.INIT=4'h4; // @21:1240 CFG2 \msrxp_frames_4[0] ( .A(SYNC2_msrxp_pktsel_RNIB5HSE_Z), .B(CO0), .Y(msrxp_frames_4_Z[0]) ); defparam \msrxp_frames_4[0] .INIT=4'h1; // @21:266 CFG2 clock_rx_re_slave ( .A(clock_rx_q2_Z), .B(clock_rx_q3_Z), .Y(clock_rx_re_slave_Z) ); defparam clock_rx_re_slave.INIT=4'h2; // @21:268 CFG2 clock_rx_fe ( .A(clock_rx_q2_Z), .B(clock_rx_q3_Z), .Y(clock_rx_fe_Z) ); defparam clock_rx_fe.INIT=4'h4; // @21:1148 CFG2 msrxs_first6 ( .A(mtx_lastbit_Z), .B(stxs_lastbit_Z), .Y(msrxs_first6_Z) ); defparam msrxs_first6.INIT=4'hE; // @21:805 CFG2 resetn_rx_s ( .A(resetn_rx_d1_Z), .B(resetn_rx_d2_Z), .Y(resetn_rx_s_Z) ); defparam resetn_rx_s.INIT=4'h6; // @21:1163 CFG2 msrxs_pktsel ( .A(mtx_pktsel_Z), .B(stxs_pktsel_Z), .Y(msrxs_pktsel_Z) ); defparam msrxs_pktsel.INIT=4'hE; // @21:262 CFG3 spi_ssel_mux ( .A(master_ssel_out), .B(ssel_rx_q2_Z), .C(SPIMODE), .Y(spi_ssel_mux_Z) ); defparam spi_ssel_mux.INIT=8'hAC; // @21:704 CFG3 mtx_spi_data_out_2_12 ( .A(N_366), .B(mtx_bitsel_Z[3]), .C(N_364), .Y(N_367) ); defparam mtx_spi_data_out_2_12.INIT=8'hB8; // @21:416 CFG3 \mtx_state_ns_i_m3[2] ( .A(spi_clk_tick_Z), .B(mtx_bitsel7_Z), .C(mtx_state_Z[2]), .Y(N_312) ); defparam \mtx_state_ns_i_m3[2] .INIT=8'hD8; // @21:264 CFG3 spi_di_mux ( .A(SPISDI_c), .B(data_rx_q2_Z), .C(SPIMODE), .Y(spi_di_mux_Z) ); defparam spi_di_mux.INIT=8'hAC; // @21:418 CFG3 un1_spi_clk_count18_10_0 ( .A(dff), .B(mtx_bitsel7_Z), .C(mtx_bitsel_0_sqmuxa_Z), .Y(un1_spi_clk_count18_10_0_Z) ); defparam un1_spi_clk_count18_10_0.INIT=8'hD5; // @21:416 CFG4 \mtx_state_ns_0_a3_2[5] ( .A(mtx_lastframe_Z), .B(mtx_consecutive_Z), .C(mtx_bitsel_Z[0]), .D(mtx_bitsel_Z[1]), .Y(mtx_state_ns_0_a3_2_Z[5]) ); defparam \mtx_state_ns_0_a3_2[5] .INIT=16'h000B; // @21:416 CFG3 \mtx_state_ns_0_a3_1[5] ( .A(mtx_bitsel_Z[4]), .B(mtx_state_Z[4]), .C(spi_clk_tick_Z), .Y(mtx_state_ns_0_a3_1_Z[5]) ); defparam \mtx_state_ns_0_a3_1[5] .INIT=8'h40; // @21:416 CFG4 \mtx_state_ns_i_a3_2[3] ( .A(mtx_consecutive_Z), .B(mtx_lastframe_Z), .C(mtx_bitsel_Z[1]), .D(mtx_bitsel_Z[2]), .Y(mtx_state_ns_i_a3_2_Z[3]) ); defparam \mtx_state_ns_i_a3_2[3] .INIT=16'h000D; // @21:844 CFG3 stxs_datareg4_1_0 ( .A(stxs_bitcnt_Z[0]), .B(SYNC1_stxs_txready_Z), .C(txfifo_davailable_Z), .Y(stxs_datareg4_1_0_Z) ); defparam stxs_datareg4_1_0.INIT=8'h10; // @21:276 CFG4 spi_clk_nextd4_NE_3 ( .A(clk_div_val_reg_Z[3]), .B(clk_div_val_reg_Z[2]), .C(spi_clk_count_Z[3]), .D(spi_clk_count_Z[2]), .Y(spi_clk_nextd4_NE_3_Z) ); defparam spi_clk_nextd4_NE_3.INIT=16'h7BDE; // @21:276 CFG4 spi_clk_nextd4_NE_2 ( .A(clk_div_val_reg_Z[1]), .B(clk_div_val_reg_Z[0]), .C(spi_clk_count_Z[1]), .D(spi_clk_count_Z[0]), .Y(spi_clk_nextd4_NE_2_Z) ); defparam spi_clk_nextd4_NE_2.INIT=16'h7BDE; // @21:276 CFG4 spi_clk_nextd4_NE_1 ( .A(clk_div_val_reg_Z[7]), .B(clk_div_val_reg_Z[6]), .C(spi_clk_count_Z[7]), .D(spi_clk_count_Z[6]), .Y(spi_clk_nextd4_NE_1_Z) ); defparam spi_clk_nextd4_NE_1.INIT=16'h7BDE; // @21:276 CFG4 spi_clk_nextd4_NE_0 ( .A(clk_div_val_reg_Z[5]), .B(clk_div_val_reg_Z[4]), .C(spi_clk_count_Z[5]), .D(spi_clk_count_Z[4]), .Y(spi_clk_nextd4_NE_0_Z) ); defparam spi_clk_nextd4_NE_0.INIT=16'h7BDE; // @21:1043 CFG3 active_1 ( .A(mtx_busy_Z), .B(stxs_state_Z), .C(mtx_rxbusy_Z), .Y(active_1_1z) ); defparam active_1.INIT=8'hFE; // @25:120 CFG3 un1_PADDR_3 ( .A(CoreAPB3_0_0_APBmslave0_PADDR[3]), .B(un1_PADDR_2), .C(CoreAPB3_0_0_APBmslave0_PADDR[2]), .Y(un1_PADDR_3_1z) ); defparam un1_PADDR_3.INIT=8'h08; // @21:632 CFG3 spi_ssel_pos_RNO ( .A(clk_div_val_reg6), .B(mtx_holdsel_Z), .C(dff), .Y(mtx_first_3_m) ); defparam spi_ssel_pos_RNO.INIT=8'h10; // @21:416 CFG3 \mtx_state_ns_0_a3_0[0] ( .A(spi_clk_tick_Z), .B(mtx_bitsel7_Z), .C(mtx_state_Z[1]), .Y(N_315) ); defparam \mtx_state_ns_0_a3_0[0] .INIT=8'h20; // @21:416 CFG4 \mtx_state_ns_i_a3[1] ( .A(spi_clk_tick_Z), .B(mtx_bitsel7_Z), .C(mtx_state_Z[5]), .D(mtx_state_Z[0]), .Y(N_316) ); defparam \mtx_state_ns_i_a3[1] .INIT=16'h080A; // @21:447 CFG3 mtx_alldone_2_sqmuxa ( .A(dff), .B(un1_cfg_enable_Z), .C(spi_clk_tick_Z), .Y(mtx_alldone_2_sqmuxa_Z) ); defparam mtx_alldone_2_sqmuxa.INIT=8'h08; // @21:1208 CFG3 msrxp_alldone_0_sqmuxa ( .A(SYNC2_msrxp_strobe_Z), .B(dff), .C(SYNC3_msrxp_strobe_Z), .Y(msrxp_alldone_0_sqmuxa_Z) ); defparam msrxp_alldone_0_sqmuxa.INIT=8'h08; // @21:297 CFG2 spi_clk_count_1_sqmuxa_0 ( .A(un1_cfg_enable_Z), .B(dff), .Y(spi_clk_next_1_sqmuxa) ); defparam spi_clk_count_1_sqmuxa_0.INIT=4'h8; // @21:469 CFG3 mtx_bitsel7 ( .A(cfg_enable), .B(un4_busy), .C(msrx_async_reset_ok_Z), .Y(mtx_bitsel7_Z) ); defparam mtx_bitsel7.INIT=8'h80; // @21:1085 CFG2 stxs_bitsel_0_sqmuxa ( .A(stxs_datareg_0_sqmuxa), .B(stxs_state6_Z), .Y(stxs_bitsel_0_sqmuxa_Z) ); defparam stxs_bitsel_0_sqmuxa.INIT=4'h8; // @21:823 CFG3 stxs_bitcnt_n1 ( .A(stxs_bitcnt_Z[1]), .B(stxs_bitcnt_Z[0]), .C(N_205_i_0), .Y(stxs_bitcnt_n1_Z) ); defparam stxs_bitcnt_n1.INIT=8'h60; // @21:716 CFG3 tx_alldone ( .A(rx_alldone_3), .B(SPIMODE), .C(mtx_alldone_Z), .Y(tx_done) ); defparam tx_alldone.INIT=8'hF2; // @21:823 CFG3 stxs_bitcnt_c2 ( .A(stxs_bitcnt_Z[2]), .B(stxs_bitcnt_Z[1]), .C(stxs_bitcnt_Z[0]), .Y(stxs_bitcnt_c2_Z) ); defparam stxs_bitcnt_c2.INIT=8'h80; // @21:1016 CFG3 stxp_lastframe_5 ( .A(dff), .B(tx_fifo_last_out), .C(SPIMODE), .Y(stxp_lastframe_5_Z) ); defparam stxp_lastframe_5.INIT=8'h08; // @21:612 CFG3 mtx_state_1_sqmuxa ( .A(mtx_lastframe_Z), .B(mtx_bitsel_1_sqmuxa_Z), .C(mtx_consecutive_Z), .Y(mtx_state_1_sqmuxa_Z) ); defparam mtx_state_1_sqmuxa.INIT=8'h04; // @21:1085 CFG3 mtx_bitsel_0_sqmuxa_2 ( .A(mtx_lastframe_Z), .B(mtx_bitsel_1_sqmuxa_Z), .C(mtx_consecutive_Z), .Y(mtx_bitsel_0_sqmuxa_2_Z) ); defparam mtx_bitsel_0_sqmuxa_2.INIT=8'h40; // @21:853 CFG3 stxs_txzeros_4_f0 ( .A(stxs_txzeros_Z), .B(stxs_state_Z), .C(stxs_checkorun_1_sqmuxa_Z), .Y(stxs_txzeros_4) ); defparam stxs_txzeros_4_f0.INIT=8'hC8; // @21:853 CFG3 stxs_first_3_f0 ( .A(stxs_first_Z), .B(stxs_state_Z), .C(un1_stxs_bitsel_1_i), .Y(stxs_first_3) ); defparam stxs_first_3_f0.INIT=8'h3B; // @21:865 CFG3 stxs_state6 ( .A(SPIMODE), .B(msrx_async_reset_ok_Z), .C(cfg_enable), .Y(stxs_state6_Z) ); defparam stxs_state6.INIT=8'h40; // @25:292 CFG3 rx_cmdsize_4_1_RNO ( .A(cfg_cmdsize[1]), .B(msrxp_frames_Z[1]), .C(CO0), .Y(rx_cmdsize_2_1) ); defparam rx_cmdsize_4_1_RNO.INIT=8'h96; // @21:1240 CFG3 \msrxp_frames_4[1] ( .A(SYNC2_msrxp_pktsel_RNIB5HSE_Z), .B(msrxp_frames_Z[1]), .C(CO0), .Y(msrxp_frames_4_Z[1]) ); defparam \msrxp_frames_4[1] .INIT=8'h14; // @21:1068 CFG3 un1_resetn_tx ( .A(dff), .B(stx_async_reset_ok_Z), .C(ssel_rx_q2_Z), .Y(un1_resetn_tx_i) ); defparam un1_resetn_tx.INIT=8'h2A; // @21:1150 CFG3 msrxs_first_2 ( .A(stxs_first_Z), .B(SPIMODE), .C(mtx_firstrx_Z), .Y(msrxs_first_2_Z) ); defparam msrxs_first_2.INIT=8'hF2; // @21:323 CFG2 clk_div_val_reg_1_sqmuxa_i ( .A(clk_div_val_reg6), .B(dff), .Y(clk_div_val_reg_1_sqmuxa_i_Z) ); defparam clk_div_val_reg_1_sqmuxa_i.INIT=4'h7; // @25:292 CFG2 SYNC2_msrxp_pktsel_RNIB5HSE ( .A(dff), .B(SYNC2_msrxp_pktsel_Z), .Y(SYNC2_msrxp_pktsel_RNIB5HSE_Z) ); defparam SYNC2_msrxp_pktsel_RNIB5HSE.INIT=4'h7; // @21:853 CFG4 stxs_checkorun_5_u ( .A(stxs_state_Z), .B(stxs_checkorun_0_sqmuxa_Z), .C(cfg_frameurun), .D(stxs_checkorun_Z), .Y(stxs_checkorun_5) ); defparam stxs_checkorun_5_u.INIT=16'hAF8D; // @21:1035 CFG4 txfifo_read ( .A(SYNC3_stxp_strobetx_Z), .B(mtx_fiforead_Z), .C(SPIMODE), .D(SYNC2_stxp_strobetx_Z), .Y(tx_fifo_read) ); defparam txfifo_read.INIT=16'hC5C0; // @21:853 CFG4 stxs_dataerr_5_u ( .A(stxs_dataerr_Z), .B(stxs_checkorun_Z), .C(stxs_checkorun_1_sqmuxa_Z), .D(stxs_state_Z), .Y(stxs_dataerr_5) ); defparam stxs_dataerr_5_u.INIT=16'hCA00; // @21:853 CFG4 stxs_pktsel_0_sqmuxa ( .A(clock_rx_fe_Z), .B(stxs_state_Z), .C(un1_stxs_bitsel_1_i), .D(stxs_state6_Z), .Y(stxs_pktsel_0_sqmuxa_Z) ); defparam stxs_pktsel_0_sqmuxa.INIT=16'hA280; // @21:267 CFG4 clock_rx_re ( .A(mtx_re_q2_Z), .B(mtx_re_q1_Z), .C(clock_rx_re_slave_Z), .D(SPIMODE), .Y(clock_rx_re_Z) ); defparam clock_rx_re.INIT=16'h44F0; // @21:1038 CFG4 spi_data_out_u_2_0 ( .A(txfifo_datadelay_Z[15]), .B(stxs_direct_Z), .C(stxs_datareg_Z[15]), .D(spi_data_out_sn_N_3), .Y(SPISDO_c_2) ); defparam spi_data_out_u_2_0.INIT=16'hB800; // @21:416 CFG4 \mtx_state_ns_i_0[3] ( .A(mtx_state_Z[2]), .B(mtx_state_Z[3]), .C(mtx_state_Z[4]), .D(spi_clk_tick_Z), .Y(mtx_state_ns_i_0_Z[3]) ); defparam \mtx_state_ns_i_0[3] .INIT=16'h0533; // @21:1240 CFG4 rx_cmdsize_4_1 ( .A(cfg_cmdsize[0]), .B(CO0), .C(rx_fifo_write), .D(rx_cmdsize_2_1), .Y(rx_cmdsize_4_1_0) ); defparam rx_cmdsize_4_1.INIT=16'h0060; // @21:416 CFG4 \mtx_state_ns_i_a3_3[3] ( .A(spi_clk_tick_Z), .B(N_319_3), .C(mtx_state_Z[2]), .D(mtx_bitsel_Z[0]), .Y(mtx_state_ns_i_a3_3_Z[3]) ); defparam \mtx_state_ns_i_a3_3[3] .INIT=16'h0008; // @21:902 CFG4 un1_stxs_bitcnt_1 ( .A(stxs_bitcnt_Z[0]), .B(stxs_datareg4_3_Z), .C(stxs_bitcnt_Z[4]), .D(stxs_bitcnt_Z[1]), .Y(un1_stxs_bitcnt_1_i) ); defparam un1_stxs_bitcnt_1.INIT=16'h0400; // @21:704 CFG4 txfifo_dhold_dec_0 ( .A(mtx_bitsel_Z[4]), .B(mtx_bitsel_Z[1]), .C(mtx_bitsel_Z[0]), .D(N_322_3), .Y(mtx_lastbit_3) ); defparam txfifo_dhold_dec_0.INIT=16'h0100; // @21:416 CFG4 \mtx_state_ns_0[0] ( .A(un1_cfg_enable_Z), .B(N_315), .C(mtx_state_Z[0]), .D(spi_clk_tick_Z), .Y(mtx_state_ns[0]) ); defparam \mtx_state_ns_0[0] .INIT=16'hDDFD; // @21:704 CFG4 txfifo_dhold_dec_2 ( .A(mtx_bitsel_Z[4]), .B(mtx_bitsel_Z[1]), .C(mtx_bitsel_Z[0]), .D(N_322_3), .Y(mtx_midbit_3) ); defparam txfifo_dhold_dec_2.INIT=16'h0400; // @21:853 CFG4 stxs_lastbit_3 ( .A(stxs_bitsel_Z[3]), .B(stxs_bitsel_Z[0]), .C(stxs_state_Z), .D(stxs_lastbit_3_1_Z), .Y(stxs_lastbit_3_Z) ); defparam stxs_lastbit_3.INIT=16'h4000; // @21:890 CFG4 stxs_strobetx8 ( .A(stxs_dataerr_Z), .B(txfifo_davailable_Z), .C(stxs_txready_at_ssel_Z), .D(stxs_first_Z), .Y(stxs_strobetx8_Z) ); defparam stxs_strobetx8.INIT=16'h5044; // @21:823 CFG4 stxs_bitcnt_n2 ( .A(stxs_bitcnt_Z[2]), .B(stxs_bitcnt_Z[1]), .C(stxs_bitcnt_Z[0]), .D(N_205_i_0), .Y(stxs_bitcnt_n2_Z) ); defparam stxs_bitcnt_n2.INIT=16'h6A00; // @21:853 CFG4 stxs_strobetx_5_iv ( .A(un1_stxs_bitcnt_1_i), .B(stxs_checkorun_0_sqmuxa_Z), .C(stxs_strobetx_Z), .D(stxs_state_Z), .Y(stxs_strobetx_5) ); defparam stxs_strobetx_5_iv.INIT=16'hEC00; // @21:704 CFG3 mtx_spi_data_out_2_u ( .A(N_368), .B(mtx_bitsel_Z[1]), .C(N_367), .Y(mtx_spi_data_out_2) ); defparam mtx_spi_data_out_2_u.INIT=8'hB8; // @21:418 CFG4 mtx_pktsel_7_f0 ( .A(mtx_holdsel_Z), .B(mtx_bitsel7_Z), .C(spi_clk_next_1_sqmuxa), .D(mtx_bitsel_0_sqmuxa_Z), .Y(mtx_pktsel_7) ); defparam mtx_pktsel_7_f0.INIT=16'hE0A0; // @21:1196 CFG3 msrxp_alldone_4 ( .A(stxp_lastframe_Z), .B(mtx_lastframe_Z), .C(msrxp_alldone_0_sqmuxa_Z), .Y(msrxp_alldone_4_Z) ); defparam msrxp_alldone_4.INIT=8'hE0; // @21:848 CFG4 un1_stxs_strobetx17 ( .A(clock_rx_fe_Z), .B(un1_stxs_bitsel_1_i), .C(stxs_direct_Z), .D(stxs_state_Z), .Y(un1_stxs_strobetx17_Z) ); defparam un1_stxs_strobetx17.INIT=16'h7555; // @25:292 CFG4 rx_cmdsize_4_RNO ( .A(cfg_cmdsize[2]), .B(msrxp_frames_Z[2]), .C(msrxp_frames_Z[1]), .D(CO0), .Y(rx_cmdsize_2_2) ); defparam rx_cmdsize_4_RNO.INIT=16'h9666; // @21:1240 CFG4 \msrxp_frames_4[2] ( .A(msrxp_frames_Z[1]), .B(msrxp_frames_Z[2]), .C(SYNC2_msrxp_pktsel_RNIB5HSE_Z), .D(CO0), .Y(msrxp_frames_4_Z[2]) ); defparam \msrxp_frames_4[2] .INIT=16'h060C; // @21:1014 CFG4 stxp_lastframe_RNO ( .A(SYNC3_stxp_strobetx_Z), .B(SYNC2_stxp_strobetx_Z), .C(SPIMODE), .D(dff), .Y(un1_txfifo_read_i) ); defparam stxp_lastframe_RNO.INIT=16'hF4FF; // @21:1130 CFG2 msrxs_strobe_RNO ( .A(dff), .B(msrxs_first6_Z), .Y(N_489_i) ); defparam msrxs_strobe_RNO.INIT=4'h8; // @21:1238 CFG3 msrxp_frames_2_sqmuxa_i ( .A(dff), .B(SYNC2_msrxp_pktsel_Z), .C(rx_fifo_write), .Y(msrxp_frames_2_sqmuxa_i_Z) ); defparam msrxp_frames_2_sqmuxa_i.INIT=8'hF7; // @21:1067 CFG3 un1_resetn_rx ( .A(dff), .B(spi_ssel_mux_Z), .C(msrx_async_reset_ok_Z), .Y(un1_resetn_rx_i) ); defparam un1_resetn_rx.INIT=8'h2A; // @21:416 CFG4 \mtx_state_RNO[4] ( .A(mtx_state_Z[3]), .B(mtx_state_Z[4]), .C(spi_clk_tick_Z), .D(un1_cfg_enable_Z), .Y(N_307_i) ); defparam \mtx_state_RNO[4] .INIT=16'hAC00; // @21:848 CFG4 \stxs_datareg_10_iv_0[12] ( .A(stxs_datareg_0_sqmuxa), .B(stxs_datareg_1_sqmuxa_1_Z), .C(txfifo_datadelay_Z[11]), .D(stxs_datareg_Z[11]), .Y(stxs_datareg_10_iv_0_Z[12]) ); defparam \stxs_datareg_10_iv_0[12] .INIT=16'hECA0; // @21:848 CFG4 \stxs_datareg_10_iv_0[9] ( .A(stxs_datareg_0_sqmuxa), .B(stxs_datareg_1_sqmuxa_1_Z), .C(txfifo_datadelay_Z[8]), .D(stxs_datareg_Z[8]), .Y(stxs_datareg_10_iv_0_Z[9]) ); defparam \stxs_datareg_10_iv_0[9] .INIT=16'hECA0; // @21:848 CFG4 \stxs_datareg_10_iv_0[10] ( .A(stxs_datareg_0_sqmuxa), .B(stxs_datareg_1_sqmuxa_1_Z), .C(txfifo_datadelay_Z[9]), .D(stxs_datareg_Z[9]), .Y(stxs_datareg_10_iv_0_Z[10]) ); defparam \stxs_datareg_10_iv_0[10] .INIT=16'hECA0; // @21:848 CFG4 \stxs_datareg_10_iv_0[15] ( .A(stxs_datareg_0_sqmuxa), .B(stxs_datareg_1_sqmuxa_1_Z), .C(txfifo_datadelay_Z[14]), .D(stxs_datareg_Z[14]), .Y(stxs_datareg_10_iv_0_Z[15]) ); defparam \stxs_datareg_10_iv_0[15] .INIT=16'hECA0; // @21:848 CFG4 \stxs_datareg_10_iv_0[11] ( .A(stxs_datareg_0_sqmuxa), .B(stxs_datareg_1_sqmuxa_1_Z), .C(txfifo_datadelay_Z[10]), .D(stxs_datareg_Z[10]), .Y(stxs_datareg_10_iv_0_Z[11]) ); defparam \stxs_datareg_10_iv_0[11] .INIT=16'hECA0; // @21:848 CFG4 \stxs_datareg_10_iv_0[7] ( .A(stxs_datareg_0_sqmuxa), .B(stxs_datareg_1_sqmuxa_1_Z), .C(txfifo_datadelay_Z[6]), .D(stxs_datareg_Z[6]), .Y(stxs_datareg_10_iv_0_Z[7]) ); defparam \stxs_datareg_10_iv_0[7] .INIT=16'hECA0; // @21:848 CFG4 \stxs_datareg_10_iv_0[14] ( .A(stxs_datareg_0_sqmuxa), .B(stxs_datareg_1_sqmuxa_1_Z), .C(txfifo_datadelay_Z[13]), .D(stxs_datareg_Z[13]), .Y(stxs_datareg_10_iv_0_Z[14]) ); defparam \stxs_datareg_10_iv_0[14] .INIT=16'hECA0; // @21:848 CFG4 \stxs_datareg_10_iv_0[1] ( .A(stxs_datareg_0_sqmuxa), .B(stxs_datareg_1_sqmuxa_1_Z), .C(txfifo_datadelay_Z[0]), .D(stxs_datareg_Z[0]), .Y(stxs_datareg_10_iv_0_Z[1]) ); defparam \stxs_datareg_10_iv_0[1] .INIT=16'hECA0; // @21:848 CFG4 \stxs_datareg_10_iv_0[3] ( .A(stxs_datareg_0_sqmuxa), .B(stxs_datareg_1_sqmuxa_1_Z), .C(txfifo_datadelay_Z[2]), .D(stxs_datareg_Z[2]), .Y(stxs_datareg_10_iv_0_Z[3]) ); defparam \stxs_datareg_10_iv_0[3] .INIT=16'hECA0; // @21:848 CFG4 \stxs_datareg_10_iv_0[2] ( .A(stxs_datareg_0_sqmuxa), .B(stxs_datareg_1_sqmuxa_1_Z), .C(txfifo_datadelay_Z[1]), .D(stxs_datareg_Z[1]), .Y(stxs_datareg_10_iv_0_Z[2]) ); defparam \stxs_datareg_10_iv_0[2] .INIT=16'hECA0; // @21:848 CFG4 \stxs_datareg_10_iv_0[4] ( .A(stxs_datareg_0_sqmuxa), .B(stxs_datareg_1_sqmuxa_1_Z), .C(txfifo_datadelay_Z[3]), .D(stxs_datareg_Z[3]), .Y(stxs_datareg_10_iv_0_Z[4]) ); defparam \stxs_datareg_10_iv_0[4] .INIT=16'hECA0; // @21:848 CFG4 \stxs_datareg_10_iv_0[13] ( .A(stxs_datareg_0_sqmuxa), .B(stxs_datareg_1_sqmuxa_1_Z), .C(txfifo_datadelay_Z[12]), .D(stxs_datareg_Z[12]), .Y(stxs_datareg_10_iv_0_Z[13]) ); defparam \stxs_datareg_10_iv_0[13] .INIT=16'hECA0; // @21:848 CFG4 \stxs_datareg_10_iv_0[8] ( .A(stxs_datareg_0_sqmuxa), .B(stxs_datareg_1_sqmuxa_1_Z), .C(txfifo_datadelay_Z[7]), .D(stxs_datareg_Z[7]), .Y(stxs_datareg_10_iv_0_Z[8]) ); defparam \stxs_datareg_10_iv_0[8] .INIT=16'hECA0; // @21:848 CFG4 \stxs_datareg_10_iv_0[5] ( .A(stxs_datareg_0_sqmuxa), .B(stxs_datareg_1_sqmuxa_1_Z), .C(txfifo_datadelay_Z[4]), .D(stxs_datareg_Z[4]), .Y(stxs_datareg_10_iv_0_Z[5]) ); defparam \stxs_datareg_10_iv_0[5] .INIT=16'hECA0; // @21:848 CFG4 \stxs_datareg_10_iv_0[6] ( .A(stxs_datareg_0_sqmuxa), .B(stxs_datareg_1_sqmuxa_1_Z), .C(txfifo_datadelay_Z[5]), .D(stxs_datareg_Z[5]), .Y(stxs_datareg_10_iv_0_Z[6]) ); defparam \stxs_datareg_10_iv_0[6] .INIT=16'hECA0; // @21:276 CFG4 spi_clk_nextd4_NE ( .A(spi_clk_nextd4_NE_3_Z), .B(spi_clk_nextd4_NE_2_Z), .C(spi_clk_nextd4_NE_1_Z), .D(spi_clk_nextd4_NE_0_Z), .Y(spi_clk_nextd5) ); defparam spi_clk_nextd4_NE.INIT=16'hFFFE; // @21:416 CFG4 \mtx_state_ns_0_a3[5] ( .A(N_322_3), .B(un1_cfg_enable_Z), .C(mtx_state_ns_0_a3_1_Z[5]), .D(mtx_state_ns_0_a3_2_Z[5]), .Y(N_322) ); defparam \mtx_state_ns_0_a3[5] .INIT=16'h8000; // @21:853 CFG2 stxs_midbit_3 ( .A(stxs_midbit_2_Z), .B(stxs_state_Z), .Y(stxs_midbit_3_Z) ); defparam stxs_midbit_3.INIT=4'h8; // @21:890 CFG2 stxs_checkorun_1_sqmuxa ( .A(stxs_midbit_2_Z), .B(stxs_strobetx8_Z), .Y(stxs_checkorun_1_sqmuxa_Z) ); defparam stxs_checkorun_1_sqmuxa.INIT=4'h2; // @21:890 CFG2 stxs_checkorun_0_sqmuxa ( .A(stxs_midbit_2_Z), .B(stxs_strobetx8_Z), .Y(stxs_checkorun_0_sqmuxa_Z) ); defparam stxs_checkorun_0_sqmuxa.INIT=4'h8; // @21:823 CFG4 stxs_bitcnt_n4 ( .A(stxs_bitcnt_c2_Z), .B(N_205_i_0), .C(stxs_bitcnt_Z[4]), .D(stxs_bitcnt_Z[3]), .Y(stxs_bitcnt_n4_Z) ); defparam stxs_bitcnt_n4.INIT=16'h48C0; // @21:823 CFG3 stxs_bitcnt_n3 ( .A(stxs_bitcnt_c2_Z), .B(N_205_i_0), .C(stxs_bitcnt_Z[3]), .Y(stxs_bitcnt_n3_Z) ); defparam stxs_bitcnt_n3.INIT=8'h48; // @21:418 CFG2 un1_mtx_busy_1_sqmuxa ( .A(mtx_busy_1_sqmuxa_Z), .B(mtx_state_Z[2]), .Y(un1_mtx_busy_1_sqmuxa_Z) ); defparam un1_mtx_busy_1_sqmuxa.INIT=4'h8; // @21:1085 CFG2 mtx_bitsel_0_sqmuxa ( .A(mtx_busy_1_sqmuxa_Z), .B(clk_div_val_reg6), .Y(mtx_bitsel_0_sqmuxa_Z) ); defparam mtx_bitsel_0_sqmuxa.INIT=4'h2; // @21:1085 CFG2 mtx_bitsel_2_sqmuxa ( .A(mtx_busy_1_sqmuxa_Z), .B(mtx_state_Z[4]), .Y(mtx_bitsel_2_sqmuxa_Z) ); defparam mtx_bitsel_2_sqmuxa.INIT=4'h8; // @21:848 CFG3 un1_stxs_datareg_3_sqmuxa ( .A(stxs_state_Z), .B(un1_stxs_bitsel_1_i), .C(un1_stxs_strobetx17_Z), .Y(un1_stxs_datareg_3_sqmuxa_Z) ); defparam un1_stxs_datareg_3_sqmuxa.INIT=8'hF8; // @21:848 CFG4 \stxs_bitsel_RNO[1] ( .A(stxs_bitsel_Z[1]), .B(stxs_bitsel_Z[0]), .C(un1_stxs_strobetx17_1_Z), .D(stxs_pktsel_0_sqmuxa_Z), .Y(stxs_bitsel_6[1]) ); defparam \stxs_bitsel_RNO[1] .INIT=16'hFFA9; // @21:882 CFG3 \un1_stxs_bitsel_3_1.CO2 ( .A(stxs_bitsel_Z[2]), .B(CO1), .C(un1_stxs_strobetx17_1_Z), .Y(CO2_0) ); defparam \un1_stxs_bitsel_3_1.CO2 .INIT=8'hCE; // @21:416 CFG4 \mtx_state_RNO[1] ( .A(un1_cfg_enable_Z), .B(N_316), .C(mtx_state_Z[1]), .D(spi_clk_tick_Z), .Y(N_301_i) ); defparam \mtx_state_RNO[1] .INIT=16'h2220; // @21:1130 CFG2 clock_rx_re_RNIS69MA ( .A(clock_rx_re_Z), .B(dff), .Y(msrxs_datain_1_sqmuxa_i) ); defparam clock_rx_re_RNIS69MA.INIT=4'hB; // @21:823 CFG4 \stxs_bitcnt_RNO[0] ( .A(stxs_state6_Z), .B(N_205_i_0), .C(stxs_bitcnt_Z[0]), .D(stxs_state_Z), .Y(N_56_i) ); defparam \stxs_bitcnt_RNO[0] .INIT=16'h0C2E; // @21:418 CFG4 mtx_re_4_4 ( .A(mtx_state_Z[5]), .B(mtx_state_Z[3]), .C(mtx_state_Z[4]), .D(mtx_busy_1_sqmuxa_Z), .Y(mtx_re_4) ); defparam mtx_re_4_4.INIT=16'h0400; // @21:1240 CFG4 rx_cmdsize_4 ( .A(SYNC2_msrxp_pktsel_Z), .B(rx_cmdsize_2_2), .C(dff), .D(rx_cmdsize_4_1_0), .Y(rx_cmdsize_4_Z) ); defparam rx_cmdsize_4.INIT=16'h2000; // @21:297 CFG2 spi_clk_count_1_sqmuxa ( .A(spi_clk_next_1_sqmuxa), .B(spi_clk_nextd5), .Y(spi_clk_count_1_sqmuxa_Z) ); defparam spi_clk_count_1_sqmuxa.INIT=4'h8; // @21:288 CFG2 spi_clk_tick_4 ( .A(spi_clk_next_1_sqmuxa), .B(spi_clk_nextd5), .Y(spi_clk_tick_4_Z) ); defparam spi_clk_tick_4.INIT=4'h2; // @21:416 CFG4 \mtx_state_ns_0[5] ( .A(un1_cfg_enable_Z), .B(N_322), .C(mtx_state_Z[5]), .D(spi_clk_tick_Z), .Y(mtx_state_ns[5]) ); defparam \mtx_state_ns_0[5] .INIT=16'hCCEC; // @21:1085 CFG3 mtx_bitsel_1_sqmuxa_3 ( .A(mtx_busy_1_sqmuxa_Z), .B(mtx_state_Z[4]), .C(clk_div_val_reg6), .Y(mtx_bitsel_1_sqmuxa_3_Z) ); defparam mtx_bitsel_1_sqmuxa_3.INIT=8'h20; // @21:1085 CFG3 mtx_datahold_0_sqmuxa_1 ( .A(mtx_busy_1_sqmuxa_Z), .B(mtx_state_Z[3]), .C(mtx_bitsel_Z[0]), .Y(mtx_datahold_0_sqmuxa_1_Z) ); defparam mtx_datahold_0_sqmuxa_1.INIT=8'h80; // @21:1085 CFG3 mtx_lastframe_1_sqmuxa_1 ( .A(mtx_midbit_3), .B(mtx_state_Z[3]), .C(mtx_busy_1_sqmuxa_Z), .Y(mtx_lastframe_1_sqmuxa_1_Z) ); defparam mtx_lastframe_1_sqmuxa_1.INIT=8'h80; // @21:848 CFG4 \stxs_bitsel_RNO[2] ( .A(CO1), .B(stxs_bitsel_Z[2]), .C(stxs_pktsel_0_sqmuxa_Z), .D(un1_stxs_strobetx17_1_Z), .Y(stxs_bitsel_6[2]) ); defparam \stxs_bitsel_RNO[2] .INIT=16'hF6F9; // @21:848 CFG2 \stxs_datareg_RNO[0] ( .A(un1_stxs_datareg_3_sqmuxa_Z), .B(tx_fifo_data_out[0]), .Y(stxs_datareg_10[0]) ); defparam \stxs_datareg_RNO[0] .INIT=4'h8; // @21:416 CFG4 \mtx_state_RNO[2] ( .A(un1_cfg_enable_Z), .B(N_312), .C(spi_clk_tick_Z), .D(clk_div_val_reg6), .Y(N_303_i) ); defparam \mtx_state_RNO[2] .INIT=16'h0888; // @21:416 CFG3 mtx_holdsel_RNO ( .A(mtx_state_Z[4]), .B(mtx_state62_Z), .C(dff), .Y(un1_mtx_busy_0_sqmuxa_i) ); defparam mtx_holdsel_RNO.INIT=8'h8F; // @21:1130 CFG4 msrxs_strobe_RNO_0 ( .A(msrxs_first6_Z), .B(msrxs_strobe_1_sqmuxa_0_Z), .C(clock_rx_re_Z), .D(dff), .Y(un1_msrxs_datain_1_sqmuxa_1_i) ); defparam msrxs_strobe_RNO_0.INIT=16'hB0FF; // @21:848 CFG3 \stxs_datareg_10_iv[10] ( .A(un1_stxs_datareg_3_sqmuxa_Z), .B(tx_fifo_data_out[10]), .C(stxs_datareg_10_iv_0_Z[10]), .Y(stxs_datareg_10[10]) ); defparam \stxs_datareg_10_iv[10] .INIT=8'hF8; // @21:848 CFG3 \stxs_datareg_10_iv[13] ( .A(un1_stxs_datareg_3_sqmuxa_Z), .B(tx_fifo_data_out[13]), .C(stxs_datareg_10_iv_0_Z[13]), .Y(stxs_datareg_10[13]) ); defparam \stxs_datareg_10_iv[13] .INIT=8'hF8; // @21:848 CFG3 \stxs_datareg_10_iv[14] ( .A(un1_stxs_datareg_3_sqmuxa_Z), .B(tx_fifo_data_out[14]), .C(stxs_datareg_10_iv_0_Z[14]), .Y(stxs_datareg_10[14]) ); defparam \stxs_datareg_10_iv[14] .INIT=8'hF8; // @21:848 CFG3 \stxs_datareg_10_iv[15] ( .A(un1_stxs_datareg_3_sqmuxa_Z), .B(tx_fifo_data_out[15]), .C(stxs_datareg_10_iv_0_Z[15]), .Y(stxs_datareg_10[15]) ); defparam \stxs_datareg_10_iv[15] .INIT=8'hF8; // @21:848 CFG3 \stxs_datareg_10_iv[9] ( .A(un1_stxs_datareg_3_sqmuxa_Z), .B(tx_fifo_data_out[9]), .C(stxs_datareg_10_iv_0_Z[9]), .Y(stxs_datareg_10[9]) ); defparam \stxs_datareg_10_iv[9] .INIT=8'hF8; // @21:848 CFG3 \stxs_datareg_10_iv[11] ( .A(un1_stxs_datareg_3_sqmuxa_Z), .B(tx_fifo_data_out[11]), .C(stxs_datareg_10_iv_0_Z[11]), .Y(stxs_datareg_10[11]) ); defparam \stxs_datareg_10_iv[11] .INIT=8'hF8; // @21:848 CFG3 \stxs_datareg_10_iv[12] ( .A(un1_stxs_datareg_3_sqmuxa_Z), .B(tx_fifo_data_out[12]), .C(stxs_datareg_10_iv_0_Z[12]), .Y(stxs_datareg_10[12]) ); defparam \stxs_datareg_10_iv[12] .INIT=8'hF8; // @21:848 CFG3 \stxs_datareg_10_iv[6] ( .A(un1_stxs_datareg_3_sqmuxa_Z), .B(tx_fifo_data_out[6]), .C(stxs_datareg_10_iv_0_Z[6]), .Y(stxs_datareg_10[6]) ); defparam \stxs_datareg_10_iv[6] .INIT=8'hF8; // @21:848 CFG3 \stxs_datareg_10_iv[7] ( .A(un1_stxs_datareg_3_sqmuxa_Z), .B(tx_fifo_data_out[7]), .C(stxs_datareg_10_iv_0_Z[7]), .Y(stxs_datareg_10[7]) ); defparam \stxs_datareg_10_iv[7] .INIT=8'hF8; // @21:848 CFG3 \stxs_datareg_10_iv[8] ( .A(un1_stxs_datareg_3_sqmuxa_Z), .B(tx_fifo_data_out[8]), .C(stxs_datareg_10_iv_0_Z[8]), .Y(stxs_datareg_10[8]) ); defparam \stxs_datareg_10_iv[8] .INIT=8'hF8; // @21:848 CFG3 \stxs_datareg_10_iv[2] ( .A(un1_stxs_datareg_3_sqmuxa_Z), .B(tx_fifo_data_out[2]), .C(stxs_datareg_10_iv_0_Z[2]), .Y(stxs_datareg_10[2]) ); defparam \stxs_datareg_10_iv[2] .INIT=8'hF8; // @21:848 CFG3 \stxs_datareg_10_iv[3] ( .A(un1_stxs_datareg_3_sqmuxa_Z), .B(tx_fifo_data_out[3]), .C(stxs_datareg_10_iv_0_Z[3]), .Y(stxs_datareg_10[3]) ); defparam \stxs_datareg_10_iv[3] .INIT=8'hF8; // @21:848 CFG3 \stxs_datareg_10_iv[4] ( .A(un1_stxs_datareg_3_sqmuxa_Z), .B(tx_fifo_data_out[4]), .C(stxs_datareg_10_iv_0_Z[4]), .Y(stxs_datareg_10[4]) ); defparam \stxs_datareg_10_iv[4] .INIT=8'hF8; // @21:848 CFG3 \stxs_datareg_10_iv[5] ( .A(un1_stxs_datareg_3_sqmuxa_Z), .B(tx_fifo_data_out[5]), .C(stxs_datareg_10_iv_0_Z[5]), .Y(stxs_datareg_10[5]) ); defparam \stxs_datareg_10_iv[5] .INIT=8'hF8; // @21:612 CFG4 mtx_fiforead_2_sqmuxa ( .A(N_319_3), .B(mtx_datahold_0_sqmuxa_1_Z), .C(mtx_bitsel_Z[1]), .D(mtx_bitsel_Z[2]), .Y(mtx_fiforead_2_sqmuxa_Z) ); defparam mtx_fiforead_2_sqmuxa.INIT=16'h0008; // @21:848 CFG3 \stxs_datareg_10_iv[1] ( .A(un1_stxs_datareg_3_sqmuxa_Z), .B(tx_fifo_data_out[1]), .C(stxs_datareg_10_iv_0_Z[1]), .Y(stxs_datareg_10[1]) ); defparam \stxs_datareg_10_iv[1] .INIT=8'hF8; // @21:418 CFG4 un1_mtx_busy_1_sqmuxa_1 ( .A(un1_spi_clk_count18_7_0), .B(mtx_bitsel_1_sqmuxa_2_Z), .C(mtx_busy_Z), .D(mtx_state_Z[0]), .Y(un1_mtx_busy_1_sqmuxa_1_Z) ); defparam un1_mtx_busy_1_sqmuxa_1.INIT=16'hAEAA; // @21:418 CFG3 un1_spi_clk_count18_7 ( .A(un1_spi_clk_count18_7_0), .B(mtx_bitsel_1_sqmuxa_2_Z), .C(mtx_state_Z[0]), .Y(un1_spi_clk_count18_7_Z) ); defparam un1_spi_clk_count18_7.INIT=8'hEA; // @21:848 CFG4 \stxs_bitsel_RNO[3] ( .A(CO2_0), .B(stxs_pktsel_0_sqmuxa_Z), .C(stxs_bitsel_Z[3]), .D(un1_stxs_strobetx17_1_Z), .Y(stxs_bitsel_6[3]) ); defparam \stxs_bitsel_RNO[3] .INIT=16'hDEED; // @21:416 CFG4 \mtx_state_RNO[3] ( .A(mtx_state_ns_i_0_Z[3]), .B(mtx_state_ns_i_a3_2_Z[3]), .C(un1_cfg_enable_Z), .D(mtx_state_ns_i_a3_3_Z[3]), .Y(N_305_i) ); defparam \mtx_state_RNO[3] .INIT=16'h1050; // @21:823 CFG4 stxs_datareg_1_sqmuxa_2_i ( .A(stxs_datareg4_1_Z), .B(stxs_datareg4_3_Z), .C(stxs_datareg4_1_0_Z), .D(un1_stxs_strobetx17_Z), .Y(stxs_datareg_1_sqmuxa_2_i_Z) ); defparam stxs_datareg_1_sqmuxa_2_i.INIT=16'h80FF; // @21:1085 CFG3 mtx_consecutive_0_sqmuxa ( .A(tx_fifo_empty), .B(mtx_lastframe_Z), .C(mtx_fiforead_2_sqmuxa_Z), .Y(mtx_consecutive_0_sqmuxa_Z) ); defparam mtx_consecutive_0_sqmuxa.INIT=8'h10; // @21:418 CFG4 un1_mtx_busy_0_sqmuxa_4 ( .A(mtx_bitsel_1_sqmuxa_3_Z), .B(mtx_bitsel_1_sqmuxa_2_Z), .C(mtx_state62_Z), .D(dff), .Y(un1_mtx_busy_0_sqmuxa_4_Z) ); defparam un1_mtx_busy_0_sqmuxa_4.INIT=16'hEFEE; // @21:418 CFG4 un1_spi_clk_count18_4 ( .A(N_319_3), .B(mtx_datahold_0_sqmuxa_1_Z), .C(mtx_datahold_0_sqmuxa_0_Z), .D(dff), .Y(un1_spi_clk_count18_4_Z) ); defparam un1_spi_clk_count18_4.INIT=16'h80FF; // @21:416 CFG4 mtx_pktsel_RNO ( .A(mtx_alldone_2_sqmuxa_Z), .B(mtx_busy_1_sqmuxa_Z), .C(mtx_state_Z[5]), .D(clk_div_val_reg6), .Y(un1_mtx_alldone_2_sqmuxa_i) ); defparam mtx_pktsel_RNO.INIT=16'h5155; // @21:418 CFG3 un1_spi_clk_count18_5 ( .A(mtx_bitsel_0_sqmuxa_2_Z), .B(dff), .C(mtx_fiforead_2_sqmuxa_Z), .Y(un1_spi_clk_count18_5_Z) ); defparam un1_spi_clk_count18_5.INIT=8'hFB; // @21:416 CFG4 mtx_first_RNO_0 ( .A(mtx_bitsel_2_sqmuxa_Z), .B(mtx_bitsel_1_sqmuxa_3_Z), .C(mtx_alldone_2_sqmuxa_Z), .D(mtx_lastbit_3), .Y(un1_mtx_alldone_2_sqmuxa_1_i) ); defparam mtx_first_RNO_0.INIT=16'h0301; // @21:418 CFG4 un1_spi_clk_count18_10 ( .A(mtx_lastbit_3), .B(un1_spi_clk_count18_10_0_Z), .C(mtx_bitsel_0_sqmuxa_2_Z), .D(un1_mtx_busy_0_sqmuxa_4_Z), .Y(un1_spi_clk_count18_10_Z) ); defparam un1_spi_clk_count18_10.INIT=16'hFCFE; // @21:555 CFG3 \un1_mtx_bitsel_1.CO1 ( .A(mtx_bitsel_Z[0]), .B(un1_mtx_busy_0_sqmuxa_4_Z), .C(mtx_bitsel_Z[1]), .Y(CO1_0) ); defparam \un1_mtx_bitsel_1.CO1 .INIT=8'h32; // @21:418 CFG3 \mtx_bitsel_10[0] ( .A(un1_mtx_busy_0_sqmuxa_4_Z), .B(un1_spi_clk_count18_10_Z), .C(mtx_bitsel_Z[0]), .Y(mtx_bitsel_10_Z[0]) ); defparam \mtx_bitsel_10[0] .INIT=8'hED; // @21:418 CFG4 \mtx_bitsel_10[1] ( .A(un1_mtx_busy_0_sqmuxa_4_Z), .B(un1_spi_clk_count18_10_Z), .C(mtx_bitsel_Z[1]), .D(mtx_bitsel_Z[0]), .Y(mtx_bitsel_10_Z[1]) ); defparam \mtx_bitsel_10[1] .INIT=16'hFCED; // @21:555 CFG3 \un1_mtx_bitsel_1.CO3 ( .A(CO2), .B(mtx_bitsel_Z[3]), .C(un1_mtx_busy_0_sqmuxa_4_Z), .Y(CO3) ); defparam \un1_mtx_bitsel_1.CO3 .INIT=8'hAE; // @21:418 CFG4 \mtx_bitsel_10[2] ( .A(un1_mtx_busy_0_sqmuxa_4_Z), .B(mtx_bitsel_Z[2]), .C(un1_spi_clk_count18_10_Z), .D(CO1_0), .Y(mtx_bitsel_10_Z[2]) ); defparam \mtx_bitsel_10[2] .INIT=16'hF6F9; // @25:120 CFG4 \PRDDATA[3] ( .A(un1_PADDR), .B(prdata_1), .C(rx_fifo_data_out_0), .D(rdata_0), .Y(CoreAPB3_0_0_APBmslave2_PRDATA_0) ); defparam \PRDDATA[3] .INIT=16'hE4A0; // @21:418 CFG4 \mtx_bitsel_10[3] ( .A(un1_mtx_busy_0_sqmuxa_4_Z), .B(mtx_bitsel_Z[3]), .C(un1_spi_clk_count18_10_Z), .D(CO2), .Y(mtx_bitsel_10_Z[3]) ); defparam \mtx_bitsel_10[3] .INIT=16'hF6F9; // @21:418 CFG4 \mtx_bitsel_10[4] ( .A(un1_mtx_busy_0_sqmuxa_4_Z), .B(mtx_bitsel_Z[4]), .C(un1_spi_clk_count18_10_Z), .D(CO3), .Y(mtx_bitsel_10_Z[4]) ); defparam \mtx_bitsel_10[4] .INIT=16'h0609; // @21:1085 spi_clockmux UCLKMUX1 ( .clock_rx_mux1(clock_rx_mux1), .SPIMODE(SPIMODE), .SPISCLKO_c(SPISCLKO_c) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* spi_chanctrl_Z6 */ module spi_32s_16s_32s_16s_0_0_1_0s ( CoreAPB3_0_0_APBmslave2_PRDATA, rx_fifo_data_out, CoreAPB3_0_0_APBmslave0_PWDATA, wrdata_0, PADDR_0, CoreAPB3_0_0_APBmslave0_PADDR_1, CoreAPB3_0_0_APBmslave0_PADDR_3, CoreAPB3_0_0_APBmslave0_PADDR_0, paddr_1z_0, SPISDI_c, SPISCLKO_c, SPISDO_c, rx_fifo_read_1, rx_fifo_read_0, tx_fifo_write_sig14_i_1, tx_fifo_write_sig14_i_2, tx_fifo_write_sig_0_sqmuxa_i_1, un1_PADDR_3, un3_apb_int_sel, CoreAPB3_0_0_APBmslave2_PSELx, apb_penable_net, dff, PF_CCC_0_0_OUT0_FABCLK_0, un1_PADDR_2, CoreAPB3_0_0_APBmslave0_PWRITE, SPISS_c, un1_PADDR ) ; output [7:0] CoreAPB3_0_0_APBmslave2_PRDATA ; output [15:8] rx_fifo_data_out ; input [15:1] CoreAPB3_0_0_APBmslave0_PWDATA ; input wrdata_0 ; input PADDR_0 ; input CoreAPB3_0_0_APBmslave0_PADDR_1 ; input CoreAPB3_0_0_APBmslave0_PADDR_3 ; input CoreAPB3_0_0_APBmslave0_PADDR_0 ; input paddr_1z_0 ; input SPISDI_c ; output SPISCLKO_c ; output SPISDO_c ; output rx_fifo_read_1 ; output rx_fifo_read_0 ; output tx_fifo_write_sig14_i_1 ; output tx_fifo_write_sig14_i_2 ; output tx_fifo_write_sig_0_sqmuxa_i_1 ; output un1_PADDR_3 ; input un3_apb_int_sel ; input CoreAPB3_0_0_APBmslave2_PSELx ; input apb_penable_net ; input dff ; input PF_CCC_0_0_OUT0_FABCLK_0 ; output un1_PADDR_2 ; input CoreAPB3_0_0_APBmslave0_PWRITE ; output SPISS_c ; output un1_PADDR ; wire wrdata_0 ; wire PADDR_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_1 ; wire CoreAPB3_0_0_APBmslave0_PADDR_3 ; wire CoreAPB3_0_0_APBmslave0_PADDR_0 ; wire paddr_1z_0 ; wire SPISDI_c ; wire SPISCLKO_c ; wire SPISDO_c ; wire rx_fifo_read_1 ; wire rx_fifo_read_0 ; wire tx_fifo_write_sig14_i_1 ; wire tx_fifo_write_sig14_i_2 ; wire tx_fifo_write_sig_0_sqmuxa_i_1 ; wire un1_PADDR_3 ; wire un3_apb_int_sel ; wire CoreAPB3_0_0_APBmslave2_PSELx ; wire apb_penable_net ; wire dff ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire un1_PADDR_2 ; wire CoreAPB3_0_0_APBmslave0_PWRITE ; wire SPISS_c ; wire un1_PADDR ; wire [7:0] rx_fifo_data_out_Z; wire [4:2] rdata; wire [16:16] fifo_mem_q; wire [2:0] cfg_cmdsize; wire [7:0] clk_div_val; wire [15:0] tx_fifo_data_out; wire [15:0] rx_fifo_data_in; wire un4_busy ; wire active_1 ; wire rx_pktend ; wire full_out ; wire rx_fifo_write ; wire rx_cmdsize ; wire SYNC3_stxp_dataerr ; wire SYNC2_stxp_dataerr ; wire tx_fifo_write ; wire rx_done ; wire rx_fifo_read ; wire tx_done ; wire master_ssel_out ; wire PWRITE_m ; wire tx_fifo_write_sig14 ; wire prdata_1 ; wire rx_fifo_empty ; wire tx_fifo_full ; wire cfg_enable ; wire SPIMODE ; wire cfg_frameurun ; wire clr_rxfifo ; wire clr_txfifo ; wire tx_fifo_read ; wire tx_fifo_last_out ; wire tx_fifo_empty_i ; wire tx_fifo_empty ; wire rx_fifo_first_in ; wire GND ; wire VCC ; // @25:166 spi_rf_32s_16s_0 URF ( .CoreAPB3_0_0_APBmslave2_PRDATA_7(CoreAPB3_0_0_APBmslave2_PRDATA[7]), .CoreAPB3_0_0_APBmslave2_PRDATA_6(CoreAPB3_0_0_APBmslave2_PRDATA[6]), .CoreAPB3_0_0_APBmslave2_PRDATA_5(CoreAPB3_0_0_APBmslave2_PRDATA[5]), .CoreAPB3_0_0_APBmslave2_PRDATA_1(CoreAPB3_0_0_APBmslave2_PRDATA[1]), .CoreAPB3_0_0_APBmslave2_PRDATA_0(CoreAPB3_0_0_APBmslave2_PRDATA[0]), .rx_fifo_data_out_7(rx_fifo_data_out_Z[7]), .rx_fifo_data_out_6(rx_fifo_data_out_Z[6]), .rx_fifo_data_out_5(rx_fifo_data_out_Z[5]), .rx_fifo_data_out_1(rx_fifo_data_out_Z[1]), .rx_fifo_data_out_0(rx_fifo_data_out_Z[0]), .rdata(rdata[4:2]), .fifo_mem_q_0(fifo_mem_q[16]), .paddr_0(paddr_1z_0), .CoreAPB3_0_0_APBmslave0_PADDR_1(CoreAPB3_0_0_APBmslave0_PADDR_1), .CoreAPB3_0_0_APBmslave0_PADDR_3(CoreAPB3_0_0_APBmslave0_PADDR_3), .CoreAPB3_0_0_APBmslave0_PADDR_0(CoreAPB3_0_0_APBmslave0_PADDR_0), .PADDR_1z_0(PADDR_0), .cfg_cmdsize(cfg_cmdsize[2:0]), .CoreAPB3_0_0_APBmslave0_PWDATA(CoreAPB3_0_0_APBmslave0_PWDATA[7:1]), .clk_div_val(clk_div_val[7:0]), .wrdata_0(wrdata_0), .un1_PADDR(un1_PADDR), .un4_busy(un4_busy), .active_1(active_1), .rx_pktend(rx_pktend), .full_out(full_out), .rx_fifo_write(rx_fifo_write), .rx_cmdsize(rx_cmdsize), .SYNC3_stxp_dataerr(SYNC3_stxp_dataerr), .SYNC2_stxp_dataerr(SYNC2_stxp_dataerr), .tx_fifo_write(tx_fifo_write), .rx_done(rx_done), .rx_fifo_read(rx_fifo_read), .tx_done(tx_done), .SPISS_c(SPISS_c), .master_ssel_out(master_ssel_out), .PWRITE_m_1z(PWRITE_m), .tx_fifo_write_sig14(tx_fifo_write_sig14), .CoreAPB3_0_0_APBmslave0_PWRITE(CoreAPB3_0_0_APBmslave0_PWRITE), .prdata_1(prdata_1), .rx_fifo_empty(rx_fifo_empty), .tx_fifo_full(tx_fifo_full), .un1_PADDR_2_1z(un1_PADDR_2), .cfg_enable(cfg_enable), .SPIMODE(SPIMODE), .cfg_frameurun(cfg_frameurun), .clr_rxfifo_1z(clr_rxfifo), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .dff(dff), .clr_txfifo_1z(clr_txfifo) ); // @25:214 spi_control_16s UCON ( .CoreAPB3_0_0_APBmslave2_PRDATA_2(CoreAPB3_0_0_APBmslave2_PRDATA[4]), .CoreAPB3_0_0_APBmslave2_PRDATA_0(CoreAPB3_0_0_APBmslave2_PRDATA[2]), .rdata_2(rdata[4]), .rdata_0(rdata[2]), .rx_fifo_data_out_2(rx_fifo_data_out_Z[4]), .rx_fifo_data_out_0(rx_fifo_data_out_Z[2]), .CoreAPB3_0_0_APBmslave0_PADDR_0(CoreAPB3_0_0_APBmslave0_PADDR_0), .CoreAPB3_0_0_APBmslave0_PADDR_1(CoreAPB3_0_0_APBmslave0_PADDR_1), .CoreAPB3_0_0_APBmslave0_PADDR_3(CoreAPB3_0_0_APBmslave0_PADDR_3), .paddr_0(paddr_1z_0), .PADDR_1z_0(PADDR_0), .apb_penable_net(apb_penable_net), .CoreAPB3_0_0_APBmslave2_PSELx(CoreAPB3_0_0_APBmslave2_PSELx), .un3_apb_int_sel(un3_apb_int_sel), .rx_fifo_read_1z(rx_fifo_read), .un1_PADDR_2(un1_PADDR_2), .un1_PADDR_1z(un1_PADDR), .un1_PADDR_3(un1_PADDR_3), .tx_fifo_write(tx_fifo_write), .tx_fifo_write_sig14_1z(tx_fifo_write_sig14), .prdata_1(prdata_1), .tx_fifo_write_sig_0_sqmuxa_i_1(tx_fifo_write_sig_0_sqmuxa_i_1), .tx_fifo_write_sig14_i_2(tx_fifo_write_sig14_i_2), .tx_fifo_write_sig14_i_1(tx_fifo_write_sig14_i_1), .rx_fifo_read_0_1z(rx_fifo_read_0), .rx_fifo_read_1_1z(rx_fifo_read_1), .CoreAPB3_0_0_APBmslave0_PWRITE(CoreAPB3_0_0_APBmslave0_PWRITE) ); // @25:236 spi_fifo_16s_32s_5_1 UTXF ( .tx_fifo_data_out(tx_fifo_data_out[15:0]), .CoreAPB3_0_0_APBmslave0_PWDATA(CoreAPB3_0_0_APBmslave0_PWDATA[15:1]), .wrdata_0(wrdata_0), .tx_fifo_read(tx_fifo_read), .tx_fifo_write(tx_fifo_write), .tx_fifo_last_out(tx_fifo_last_out), .PWRITE_m(PWRITE_m), .tx_fifo_full(tx_fifo_full), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .dff(dff), .clr_txfifo(clr_txfifo), .tx_fifo_empty_i(tx_fifo_empty_i), .tx_fifo_empty(tx_fifo_empty) ); // @25:262 spi_fifo_16s_32s_5_0 URXF ( .rx_fifo_data_out({rx_fifo_data_out[15:8], rx_fifo_data_out_Z[7:0]}), .rx_fifo_data_in(rx_fifo_data_in[15:0]), .fifo_mem_q_0(fifo_mem_q[16]), .rx_fifo_read(rx_fifo_read), .rx_fifo_write(rx_fifo_write), .rx_fifo_first_in(rx_fifo_first_in), .full_out_1z(full_out), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .dff(dff), .rx_fifo_empty(rx_fifo_empty), .clr_rxfifo(clr_rxfifo) ); // @25:292 spi_chanctrl_Z6 UCC ( .CoreAPB3_0_0_APBmslave2_PRDATA_0(CoreAPB3_0_0_APBmslave2_PRDATA[3]), .rdata_0(rdata[3]), .rx_fifo_data_out_0(rx_fifo_data_out_Z[3]), .cfg_cmdsize(cfg_cmdsize[2:0]), .CoreAPB3_0_0_APBmslave0_PADDR({CoreAPB3_0_0_APBmslave0_PADDR_1, CoreAPB3_0_0_APBmslave0_PADDR_0}), .tx_fifo_data_out(tx_fifo_data_out[15:0]), .rx_fifo_data_in(rx_fifo_data_in[15:0]), .clk_div_val(clk_div_val[7:0]), .prdata_1(prdata_1), .un1_PADDR(un1_PADDR), .tx_fifo_read(tx_fifo_read), .cfg_frameurun(cfg_frameurun), .tx_done(tx_done), .un1_PADDR_3_1z(un1_PADDR_3), .un1_PADDR_2(un1_PADDR_2), .active_1_1z(active_1), .un4_busy(un4_busy), .tx_fifo_empty(tx_fifo_empty), .SPISDO_c(SPISDO_c), .SPIMODE(SPIMODE), .tx_fifo_last_out(tx_fifo_last_out), .rx_fifo_first_in(rx_fifo_first_in), .SPISCLKO_c(SPISCLKO_c), .master_ssel_out(master_ssel_out), .rx_pktend(rx_pktend), .rx_fifo_write(rx_fifo_write), .rx_cmdsize_1z(rx_cmdsize), .rx_done(rx_done), .SYNC2_stxp_dataerr_1z(SYNC2_stxp_dataerr), .SYNC3_stxp_dataerr_1z(SYNC3_stxp_dataerr), .tx_fifo_empty_i(tx_fifo_empty_i), .cfg_enable(cfg_enable), .SPISDI_c(SPISDI_c), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .dff(dff) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* spi_32s_16s_32s_16s_0_0_1_0s */ module CORESPI_Z7 ( paddr_0, CoreAPB3_0_0_APBmslave0_PADDR_1, CoreAPB3_0_0_APBmslave0_PADDR_3, CoreAPB3_0_0_APBmslave0_PADDR_0, PADDR_1z_0, wrdata_0, CoreAPB3_0_0_APBmslave0_PWDATA, rx_fifo_data_out, CoreAPB3_0_0_APBmslave2_PRDATA, un1_PADDR, SPISS_c, CoreAPB3_0_0_APBmslave0_PWRITE, un1_PADDR_2, PF_CCC_0_0_OUT0_FABCLK_0, dff, apb_penable_net, CoreAPB3_0_0_APBmslave2_PSELx, un3_apb_int_sel, un1_PADDR_3, tx_fifo_write_sig_0_sqmuxa_i_1, tx_fifo_write_sig14_i_2, tx_fifo_write_sig14_i_1, rx_fifo_read_0, rx_fifo_read_1, SPISDO_c, SPISCLKO_c, SPISDI_c ) ; input paddr_0 ; input CoreAPB3_0_0_APBmslave0_PADDR_1 ; input CoreAPB3_0_0_APBmslave0_PADDR_3 ; input CoreAPB3_0_0_APBmslave0_PADDR_0 ; input PADDR_1z_0 ; input wrdata_0 ; input [15:1] CoreAPB3_0_0_APBmslave0_PWDATA ; output [15:8] rx_fifo_data_out ; output [7:0] CoreAPB3_0_0_APBmslave2_PRDATA ; output un1_PADDR ; output SPISS_c ; input CoreAPB3_0_0_APBmslave0_PWRITE ; output un1_PADDR_2 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input dff ; input apb_penable_net ; input CoreAPB3_0_0_APBmslave2_PSELx ; input un3_apb_int_sel ; output un1_PADDR_3 ; output tx_fifo_write_sig_0_sqmuxa_i_1 ; output tx_fifo_write_sig14_i_2 ; output tx_fifo_write_sig14_i_1 ; output rx_fifo_read_0 ; output rx_fifo_read_1 ; output SPISDO_c ; output SPISCLKO_c ; input SPISDI_c ; wire paddr_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_1 ; wire CoreAPB3_0_0_APBmslave0_PADDR_3 ; wire CoreAPB3_0_0_APBmslave0_PADDR_0 ; wire PADDR_1z_0 ; wire wrdata_0 ; wire un1_PADDR ; wire SPISS_c ; wire CoreAPB3_0_0_APBmslave0_PWRITE ; wire un1_PADDR_2 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire dff ; wire apb_penable_net ; wire CoreAPB3_0_0_APBmslave2_PSELx ; wire un3_apb_int_sel ; wire un1_PADDR_3 ; wire tx_fifo_write_sig_0_sqmuxa_i_1 ; wire tx_fifo_write_sig14_i_2 ; wire tx_fifo_write_sig14_i_1 ; wire rx_fifo_read_0 ; wire rx_fifo_read_1 ; wire SPISDO_c ; wire SPISCLKO_c ; wire SPISDI_c ; wire GND ; wire VCC ; // @26:130 spi_32s_16s_32s_16s_0_0_1_0s USPI ( .CoreAPB3_0_0_APBmslave2_PRDATA(CoreAPB3_0_0_APBmslave2_PRDATA[7:0]), .rx_fifo_data_out(rx_fifo_data_out[15:8]), .CoreAPB3_0_0_APBmslave0_PWDATA(CoreAPB3_0_0_APBmslave0_PWDATA[15:1]), .wrdata_0(wrdata_0), .PADDR_0(PADDR_1z_0), .CoreAPB3_0_0_APBmslave0_PADDR_1(CoreAPB3_0_0_APBmslave0_PADDR_1), .CoreAPB3_0_0_APBmslave0_PADDR_3(CoreAPB3_0_0_APBmslave0_PADDR_3), .CoreAPB3_0_0_APBmslave0_PADDR_0(CoreAPB3_0_0_APBmslave0_PADDR_0), .paddr_1z_0(paddr_0), .SPISDI_c(SPISDI_c), .SPISCLKO_c(SPISCLKO_c), .SPISDO_c(SPISDO_c), .rx_fifo_read_1(rx_fifo_read_1), .rx_fifo_read_0(rx_fifo_read_0), .tx_fifo_write_sig14_i_1(tx_fifo_write_sig14_i_1), .tx_fifo_write_sig14_i_2(tx_fifo_write_sig14_i_2), .tx_fifo_write_sig_0_sqmuxa_i_1(tx_fifo_write_sig_0_sqmuxa_i_1), .un1_PADDR_3(un1_PADDR_3), .un3_apb_int_sel(un3_apb_int_sel), .CoreAPB3_0_0_APBmslave2_PSELx(CoreAPB3_0_0_APBmslave2_PSELx), .apb_penable_net(apb_penable_net), .dff(dff), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .un1_PADDR_2(un1_PADDR_2), .CoreAPB3_0_0_APBmslave0_PWRITE(CoreAPB3_0_0_APBmslave0_PWRITE), .SPISS_c(SPISS_c), .un1_PADDR(un1_PADDR) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CORESPI_Z7 */ module CORESPI_0 ( CoreAPB3_0_0_APBmslave2_PRDATA, rx_fifo_data_out, CoreAPB3_0_0_APBmslave0_PWDATA, wrdata_0, PADDR_0, CoreAPB3_0_0_APBmslave0_PADDR_1, CoreAPB3_0_0_APBmslave0_PADDR_3, CoreAPB3_0_0_APBmslave0_PADDR_0, paddr_1z_0, SPISDI_c, SPISCLKO_c, SPISDO_c, rx_fifo_read_1, rx_fifo_read_0, tx_fifo_write_sig14_i_1, tx_fifo_write_sig14_i_2, tx_fifo_write_sig_0_sqmuxa_i_1, un1_PADDR_3, un3_apb_int_sel, CoreAPB3_0_0_APBmslave2_PSELx, apb_penable_net, dff, PF_CCC_0_0_OUT0_FABCLK_0, un1_PADDR_2, CoreAPB3_0_0_APBmslave0_PWRITE, SPISS_c, un1_PADDR ) ; output [7:0] CoreAPB3_0_0_APBmslave2_PRDATA ; output [15:8] rx_fifo_data_out ; input [15:1] CoreAPB3_0_0_APBmslave0_PWDATA ; input wrdata_0 ; input PADDR_0 ; input CoreAPB3_0_0_APBmslave0_PADDR_1 ; input CoreAPB3_0_0_APBmslave0_PADDR_3 ; input CoreAPB3_0_0_APBmslave0_PADDR_0 ; input paddr_1z_0 ; input SPISDI_c ; output SPISCLKO_c ; output SPISDO_c ; output rx_fifo_read_1 ; output rx_fifo_read_0 ; output tx_fifo_write_sig14_i_1 ; output tx_fifo_write_sig14_i_2 ; output tx_fifo_write_sig_0_sqmuxa_i_1 ; output un1_PADDR_3 ; input un3_apb_int_sel ; input CoreAPB3_0_0_APBmslave2_PSELx ; input apb_penable_net ; input dff ; input PF_CCC_0_0_OUT0_FABCLK_0 ; output un1_PADDR_2 ; input CoreAPB3_0_0_APBmslave0_PWRITE ; output SPISS_c ; output un1_PADDR ; wire wrdata_0 ; wire PADDR_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_1 ; wire CoreAPB3_0_0_APBmslave0_PADDR_3 ; wire CoreAPB3_0_0_APBmslave0_PADDR_0 ; wire paddr_1z_0 ; wire SPISDI_c ; wire SPISCLKO_c ; wire SPISDO_c ; wire rx_fifo_read_1 ; wire rx_fifo_read_0 ; wire tx_fifo_write_sig14_i_1 ; wire tx_fifo_write_sig14_i_2 ; wire tx_fifo_write_sig_0_sqmuxa_i_1 ; wire un1_PADDR_3 ; wire un3_apb_int_sel ; wire CoreAPB3_0_0_APBmslave2_PSELx ; wire apb_penable_net ; wire dff ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire un1_PADDR_2 ; wire CoreAPB3_0_0_APBmslave0_PWRITE ; wire SPISS_c ; wire un1_PADDR ; wire GND ; wire VCC ; // @27:161 CORESPI_Z7 CORESPI_0_0 ( .paddr_0(paddr_1z_0), .CoreAPB3_0_0_APBmslave0_PADDR_1(CoreAPB3_0_0_APBmslave0_PADDR_1), .CoreAPB3_0_0_APBmslave0_PADDR_3(CoreAPB3_0_0_APBmslave0_PADDR_3), .CoreAPB3_0_0_APBmslave0_PADDR_0(CoreAPB3_0_0_APBmslave0_PADDR_0), .PADDR_1z_0(PADDR_0), .wrdata_0(wrdata_0), .CoreAPB3_0_0_APBmslave0_PWDATA(CoreAPB3_0_0_APBmslave0_PWDATA[15:1]), .rx_fifo_data_out(rx_fifo_data_out[15:8]), .CoreAPB3_0_0_APBmslave2_PRDATA(CoreAPB3_0_0_APBmslave2_PRDATA[7:0]), .un1_PADDR(un1_PADDR), .SPISS_c(SPISS_c), .CoreAPB3_0_0_APBmslave0_PWRITE(CoreAPB3_0_0_APBmslave0_PWRITE), .un1_PADDR_2(un1_PADDR_2), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .dff(dff), .apb_penable_net(apb_penable_net), .CoreAPB3_0_0_APBmslave2_PSELx(CoreAPB3_0_0_APBmslave2_PSELx), .un3_apb_int_sel(un3_apb_int_sel), .un1_PADDR_3(un1_PADDR_3), .tx_fifo_write_sig_0_sqmuxa_i_1(tx_fifo_write_sig_0_sqmuxa_i_1), .tx_fifo_write_sig14_i_2(tx_fifo_write_sig14_i_2), .tx_fifo_write_sig14_i_1(tx_fifo_write_sig14_i_1), .rx_fifo_read_0(rx_fifo_read_0), .rx_fifo_read_1(rx_fifo_read_1), .SPISDO_c(SPISDO_c), .SPISCLKO_c(SPISCLKO_c), .SPISDI_c(SPISDI_c) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CORESPI_0 */ module CTSE_SELF_DESTRUCT_26s_1s_125000000s_25000000s_2500000s_4s_14400s_18446744072277895850_27s_14s_Z12 ( l_i_i, AND2_2_Y, PF_IOD_CDR_CCC_C0_0_TX_CLK_G ) ; output l_i_i ; input AND2_2_Y ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire l_i_i ; wire AND2_2_Y ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire [31:0] iI1Io; wire [26:0] Il1Io; wire [26:0] Il1Io_lm; wire [26:8] il1Io_1; wire [23:6] il1Io; wire [13:0] Ol1Io; wire [0:0] Ol1Io_3_Z; wire [27:27] Ol1Io10_a_4_Z; wire [25:1] Il1Io_cry; wire [26:1] Il1Io_s; wire [25:1] Il1Io_cry_Y; wire [26:26] Il1Io_s_FCO; wire [26:26] Il1Io_s_Y; wire GND_or ; wire O01Io_RNIMTGD1 ; wire GND_or_i ; wire VCC ; wire GND ; wire O11Io ; wire Il1Ioe ; wire ol1Io ; wire i01Io ; wire o01Io ; wire un2_l01Io_i ; wire Ol1Io10_a_4 ; wire un1_Ol1Io_1_s_13_S ; wire Ol1Io10_NE ; wire un1_Ol1Io_1_cry_12_S ; wire un1_Ol1Io_1_cry_11_S ; wire un1_Ol1Io_1_cry_10_S ; wire un1_Ol1Io_1_cry_9_S ; wire un1_Ol1Io_1_cry_8_S ; wire un1_Ol1Io_1_cry_7_S ; wire un1_Ol1Io_1_cry_6_S ; wire un1_Ol1Io_1_cry_5_S ; wire un1_Ol1Io_1_cry_4_S ; wire un1_Ol1Io_1_cry_3_S ; wire un1_Ol1Io_1_cry_2_S ; wire un1_Ol1Io_1_cry_1_S ; wire Ol1Io10_a_4_cry_0 ; wire Ol1Io10_a_4_cry_0_S ; wire Ol1Io10_a_4_cry_0_Y ; wire Ol1Io10_a_4_cry_1 ; wire Ol1Io10_1 ; wire Ol1Io10_a_4_cry_1_Y ; wire Ol1Io10_a_4_cry_2 ; wire Ol1Io10_2 ; wire Ol1Io10_a_4_cry_2_Y ; wire Ol1Io10_a_4_cry_3 ; wire Ol1Io10_3 ; wire Ol1Io10_a_4_cry_3_Y ; wire Ol1Io10_a_4_cry_4 ; wire Ol1Io10_4 ; wire Ol1Io10_a_4_cry_4_Y ; wire Ol1Io10_a_4_cry_5 ; wire Ol1Io10_5 ; wire Ol1Io10_a_4_cry_5_Y ; wire Ol1Io10_a_4_cry_6 ; wire Ol1Io10_6 ; wire Ol1Io10_a_4_cry_6_Y ; wire Ol1Io10_a_4_cry_7 ; wire Ol1Io10_7 ; wire Ol1Io10_a_4_cry_7_Y ; wire Ol1Io10_a_4_cry_8 ; wire Ol1Io10_8 ; wire Ol1Io10_a_4_cry_8_Y ; wire Ol1Io10_a_4_cry_9 ; wire Ol1Io10_9 ; wire Ol1Io10_a_4_cry_9_Y ; wire Ol1Io10_a_4_cry_10 ; wire Ol1Io10_10 ; wire Ol1Io10_a_4_cry_10_Y ; wire Ol1Io10_a_4_cry_11 ; wire Ol1Io10_11 ; wire Ol1Io10_a_4_cry_11_Y ; wire Ol1Io10_a_4_cry_12 ; wire Ol1Io10_12 ; wire Ol1Io10_a_4_cry_12_Y ; wire Ol1Io10_a_4_cry_13 ; wire Ol1Io10_13 ; wire Ol1Io10_a_4_cry_13_Y ; wire Ol1Io10_a_4_cry_14 ; wire Ol1Io10_14 ; wire Ol1Io10_a_4_cry_14_Y ; wire Ol1Io10_a_4_cry_15 ; wire Ol1Io10_15 ; wire Ol1Io10_a_4_cry_15_Y ; wire Ol1Io10_a_4_cry_16 ; wire Ol1Io10_16 ; wire Ol1Io10_a_4_cry_16_Y ; wire Ol1Io10_a_4_cry_17 ; wire Ol1Io10_17 ; wire Ol1Io10_a_4_cry_17_Y ; wire Ol1Io10_a_4_cry_18 ; wire Ol1Io10_18 ; wire Ol1Io10_a_4_cry_18_Y ; wire Ol1Io10_a_4_cry_19 ; wire Ol1Io10_19 ; wire Ol1Io10_a_4_cry_19_Y ; wire Ol1Io10_a_4_cry_20 ; wire Ol1Io10_20 ; wire Ol1Io10_a_4_cry_20_Y ; wire Ol1Io10_a_4_cry_21 ; wire Ol1Io10_21 ; wire Ol1Io10_a_4_cry_21_Y ; wire Ol1Io10_a_4_cry_22 ; wire Ol1Io10_22 ; wire Ol1Io10_a_4_cry_22_Y ; wire Ol1Io10_a_4_cry_23 ; wire Ol1Io10_23 ; wire Ol1Io10_a_4_cry_23_Y ; wire Ol1Io10_a_4_cry_24 ; wire Ol1Io10_24 ; wire Ol1Io10_a_4_cry_24_Y ; wire Ol1Io10_a_4_cry_25 ; wire Ol1Io10_25 ; wire Ol1Io10_a_4_cry_25_Y ; wire Ol1Io10_26 ; wire Ol1Io10_a_4_cry_26_Y ; wire Il1Io_s_4173_FCO ; wire Il1Io_s_4173_S ; wire Il1Io_s_4173_Y ; wire un1_Ol1Io_1_s_1_4174_FCO ; wire un1_Ol1Io_1_s_1_4174_S ; wire un1_Ol1Io_1_s_1_4174_Y ; wire un1_Ol1Io_1_cry_1_Z ; wire un1_Ol1Io_1_cry_1_Y ; wire un1_Ol1Io_1_cry_2_Z ; wire un1_Ol1Io_1_cry_2_Y ; wire un1_Ol1Io_1_cry_3_Z ; wire un1_Ol1Io_1_cry_3_Y ; wire un1_Ol1Io_1_cry_4_Z ; wire un1_Ol1Io_1_cry_4_Y ; wire un1_Ol1Io_1_cry_5_Z ; wire un1_Ol1Io_1_cry_5_Y ; wire un1_Ol1Io_1_cry_6_Z ; wire un1_Ol1Io_1_cry_6_Y ; wire un1_Ol1Io_1_cry_7_Z ; wire un1_Ol1Io_1_cry_7_Y ; wire un1_Ol1Io_1_cry_8_Z ; wire un1_Ol1Io_1_cry_8_Y ; wire un1_Ol1Io_1_cry_9_Z ; wire un1_Ol1Io_1_cry_9_Y ; wire un1_Ol1Io_1_cry_10_Z ; wire un1_Ol1Io_1_cry_10_Y ; wire un1_Ol1Io_1_cry_11_Z ; wire un1_Ol1Io_1_cry_11_Y ; wire un1_Ol1Io_1_s_13_FCO ; wire un1_Ol1Io_1_s_13_Y ; wire un1_Ol1Io_1_cry_12_Z ; wire un1_Ol1Io_1_cry_12_Y ; wire Ol1Io10_NE_20 ; wire Ol1Io10_NE_19 ; wire Ol1Io10_NE_18 ; wire Ol1Io10_NE_17 ; wire Ol1Io10_NE_16 ; wire Ol1Io10_NE_15 ; wire Ol1Io6_9 ; wire Ol1Io6_8 ; wire Ol1Io6_7 ; wire un2_l01Io_23_Z ; wire un2_l01Io_22_Z ; wire un2_l01Io_21_Z ; wire un2_l01Io_20_Z ; wire un2_l01Io_19_Z ; wire un2_l01Io_18_Z ; wire un2_l01Io_17_Z ; wire un2_l01Io_16_Z ; wire Ol1Io10_NE_14 ; wire Ol1Io6_10 ; wire Ol1Io10_NE_25 ; wire un2_l01Io_29_Z ; wire un2_l01Io_28_Z ; CFG1 \genblk1.O01Io_RNIMTGD1 ( .A(GND_or), .Y(O01Io_RNIMTGD1) ); defparam \genblk1.O01Io_RNIMTGD1 .INIT=2'h2; CFG1 \genblk1.O01Io_RNIMTGD1_0 ( .A(GND_or), .Y(GND_or_i) ); defparam \genblk1.O01Io_RNIMTGD1_0 .INIT=2'h1; // @28:543803 SLE \genblk1.iI1Io[30] ( .Q(iI1Io[30]), .ADn(VCC), .ALn(VCC), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(VCC), .EN(O01Io_RNIMTGD1), .LAT(GND), .SD(GND), .SLn(GND_or_i) ); // @28:543803 SLE \genblk1.iI1Io[28] ( .Q(iI1Io[28]), .ADn(VCC), .ALn(VCC), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(VCC), .EN(O01Io_RNIMTGD1), .LAT(GND), .SD(GND), .SLn(GND_or_i) ); // @28:543803 SLE \genblk1.iI1Io[26] ( .Q(iI1Io[26]), .ADn(VCC), .ALn(VCC), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(VCC), .EN(O01Io_RNIMTGD1), .LAT(GND), .SD(GND), .SLn(GND_or_i) ); // @28:543803 SLE \genblk1.iI1Io[24] ( .Q(iI1Io[24]), .ADn(VCC), .ALn(VCC), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(VCC), .EN(O01Io_RNIMTGD1), .LAT(GND), .SD(GND), .SLn(GND_or_i) ); // @28:543803 SLE \genblk1.iI1Io[22] ( .Q(iI1Io[22]), .ADn(VCC), .ALn(VCC), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(VCC), .EN(O01Io_RNIMTGD1), .LAT(GND), .SD(GND), .SLn(GND_or_i) ); // @28:543803 SLE \genblk1.iI1Io[20] ( .Q(iI1Io[20]), .ADn(VCC), .ALn(VCC), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(VCC), .EN(O01Io_RNIMTGD1), .LAT(GND), .SD(GND), .SLn(GND_or_i) ); // @28:543803 SLE \genblk1.iI1Io[18] ( .Q(iI1Io[18]), .ADn(VCC), .ALn(VCC), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(VCC), .EN(O01Io_RNIMTGD1), .LAT(GND), .SD(GND), .SLn(GND_or_i) ); // @28:543803 SLE \genblk1.iI1Io[16] ( .Q(iI1Io[16]), .ADn(VCC), .ALn(VCC), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(VCC), .EN(O01Io_RNIMTGD1), .LAT(GND), .SD(GND), .SLn(GND_or_i) ); // @28:543803 SLE \genblk1.iI1Io[14] ( .Q(iI1Io[14]), .ADn(VCC), .ALn(VCC), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(VCC), .EN(O01Io_RNIMTGD1), .LAT(GND), .SD(GND), .SLn(GND_or_i) ); // @28:543803 SLE \genblk1.iI1Io[12] ( .Q(iI1Io[12]), .ADn(VCC), .ALn(VCC), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(VCC), .EN(O01Io_RNIMTGD1), .LAT(GND), .SD(GND), .SLn(GND_or_i) ); // @28:543803 SLE \genblk1.iI1Io[10] ( .Q(iI1Io[10]), .ADn(VCC), .ALn(VCC), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(VCC), .EN(O01Io_RNIMTGD1), .LAT(GND), .SD(GND), .SLn(GND_or_i) ); // @28:543803 SLE \genblk1.iI1Io[8] ( .Q(iI1Io[8]), .ADn(VCC), .ALn(VCC), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(VCC), .EN(O01Io_RNIMTGD1), .LAT(GND), .SD(GND), .SLn(GND_or_i) ); // @28:543803 SLE \genblk1.iI1Io[6] ( .Q(iI1Io[6]), .ADn(VCC), .ALn(VCC), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(VCC), .EN(O01Io_RNIMTGD1), .LAT(GND), .SD(GND), .SLn(GND_or_i) ); // @28:543803 SLE \genblk1.iI1Io[4] ( .Q(iI1Io[4]), .ADn(VCC), .ALn(VCC), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(VCC), .EN(O01Io_RNIMTGD1), .LAT(GND), .SD(GND), .SLn(GND_or_i) ); // @28:543803 SLE \genblk1.iI1Io[2] ( .Q(iI1Io[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(VCC), .EN(O01Io_RNIMTGD1), .LAT(GND), .SD(GND), .SLn(GND_or_i) ); // @28:543803 SLE \genblk1.iI1Io[0] ( .Q(iI1Io[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(VCC), .EN(O01Io_RNIMTGD1), .LAT(GND), .SD(GND), .SLn(GND_or_i) ); // @28:543626 SLE \genblk1.Il1Io[26] ( .Q(Il1Io[26]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il1Io_lm[26]), .EN(Il1Ioe), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Il1Io[25] ( .Q(Il1Io[25]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il1Io_lm[25]), .EN(Il1Ioe), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Il1Io[24] ( .Q(Il1Io[24]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il1Io_lm[24]), .EN(Il1Ioe), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Il1Io[23] ( .Q(Il1Io[23]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il1Io_lm[23]), .EN(Il1Ioe), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Il1Io[22] ( .Q(Il1Io[22]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il1Io_lm[22]), .EN(Il1Ioe), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Il1Io[21] ( .Q(Il1Io[21]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il1Io_lm[21]), .EN(Il1Ioe), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Il1Io[20] ( .Q(Il1Io[20]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il1Io_lm[20]), .EN(Il1Ioe), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Il1Io[19] ( .Q(Il1Io[19]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il1Io_lm[19]), .EN(Il1Ioe), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Il1Io[18] ( .Q(Il1Io[18]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il1Io_lm[18]), .EN(Il1Ioe), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Il1Io[17] ( .Q(Il1Io[17]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il1Io_lm[17]), .EN(Il1Ioe), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Il1Io[16] ( .Q(Il1Io[16]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il1Io_lm[16]), .EN(Il1Ioe), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Il1Io[15] ( .Q(Il1Io[15]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il1Io_lm[15]), .EN(Il1Ioe), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Il1Io[14] ( .Q(Il1Io[14]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il1Io_lm[14]), .EN(Il1Ioe), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Il1Io[13] ( .Q(Il1Io[13]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il1Io_lm[13]), .EN(Il1Ioe), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Il1Io[12] ( .Q(Il1Io[12]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il1Io_lm[12]), .EN(Il1Ioe), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Il1Io[11] ( .Q(Il1Io[11]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il1Io_lm[11]), .EN(Il1Ioe), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Il1Io[10] ( .Q(Il1Io[10]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il1Io_lm[10]), .EN(Il1Ioe), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Il1Io[9] ( .Q(Il1Io[9]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il1Io_lm[9]), .EN(Il1Ioe), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Il1Io[8] ( .Q(Il1Io[8]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il1Io_lm[8]), .EN(Il1Ioe), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Il1Io[7] ( .Q(Il1Io[7]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il1Io_lm[7]), .EN(Il1Ioe), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Il1Io[6] ( .Q(Il1Io[6]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il1Io_lm[6]), .EN(Il1Ioe), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Il1Io[5] ( .Q(Il1Io[5]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il1Io_lm[5]), .EN(Il1Ioe), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Il1Io[4] ( .Q(Il1Io[4]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il1Io_lm[4]), .EN(Il1Ioe), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Il1Io[3] ( .Q(Il1Io[3]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il1Io_lm[3]), .EN(Il1Ioe), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Il1Io[2] ( .Q(Il1Io[2]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il1Io_lm[2]), .EN(Il1Ioe), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Il1Io[1] ( .Q(Il1Io[1]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il1Io_lm[1]), .EN(Il1Ioe), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Il1Io[0] ( .Q(Il1Io[0]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il1Io_lm[0]), .EN(Il1Ioe), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543803 SLE \genblk1.iI1Io[31] ( .Q(iI1Io[31]), .ADn(VCC), .ALn(VCC), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iI1Io[31]), .EN(VCC), .LAT(GND), .SD(VCC), .SLn(GND_or_i) ); // @28:543803 SLE \genblk1.iI1Io[29] ( .Q(iI1Io[29]), .ADn(VCC), .ALn(VCC), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iI1Io[29]), .EN(VCC), .LAT(GND), .SD(VCC), .SLn(GND_or_i) ); // @28:543803 SLE \genblk1.iI1Io[27] ( .Q(iI1Io[27]), .ADn(VCC), .ALn(VCC), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iI1Io[27]), .EN(VCC), .LAT(GND), .SD(VCC), .SLn(GND_or_i) ); // @28:543803 SLE \genblk1.iI1Io[25] ( .Q(iI1Io[25]), .ADn(VCC), .ALn(VCC), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iI1Io[25]), .EN(VCC), .LAT(GND), .SD(VCC), .SLn(GND_or_i) ); // @28:543803 SLE \genblk1.iI1Io[23] ( .Q(iI1Io[23]), .ADn(VCC), .ALn(VCC), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iI1Io[23]), .EN(VCC), .LAT(GND), .SD(VCC), .SLn(GND_or_i) ); // @28:543803 SLE \genblk1.iI1Io[21] ( .Q(iI1Io[21]), .ADn(VCC), .ALn(VCC), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iI1Io[21]), .EN(VCC), .LAT(GND), .SD(VCC), .SLn(GND_or_i) ); // @28:543803 SLE \genblk1.iI1Io[19] ( .Q(iI1Io[19]), .ADn(VCC), .ALn(VCC), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iI1Io[19]), .EN(VCC), .LAT(GND), .SD(VCC), .SLn(GND_or_i) ); // @28:543803 SLE \genblk1.iI1Io[17] ( .Q(iI1Io[17]), .ADn(VCC), .ALn(VCC), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iI1Io[17]), .EN(VCC), .LAT(GND), .SD(VCC), .SLn(GND_or_i) ); // @28:543803 SLE \genblk1.iI1Io[15] ( .Q(iI1Io[15]), .ADn(VCC), .ALn(VCC), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iI1Io[15]), .EN(VCC), .LAT(GND), .SD(VCC), .SLn(GND_or_i) ); // @28:543803 SLE \genblk1.iI1Io[13] ( .Q(iI1Io[13]), .ADn(VCC), .ALn(VCC), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iI1Io[13]), .EN(VCC), .LAT(GND), .SD(VCC), .SLn(GND_or_i) ); // @28:543803 SLE \genblk1.iI1Io[11] ( .Q(iI1Io[11]), .ADn(VCC), .ALn(VCC), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iI1Io[11]), .EN(VCC), .LAT(GND), .SD(VCC), .SLn(GND_or_i) ); // @28:543803 SLE \genblk1.iI1Io[9] ( .Q(iI1Io[9]), .ADn(VCC), .ALn(VCC), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iI1Io[9]), .EN(VCC), .LAT(GND), .SD(VCC), .SLn(GND_or_i) ); // @28:543803 SLE \genblk1.iI1Io[7] ( .Q(iI1Io[7]), .ADn(VCC), .ALn(VCC), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iI1Io[7]), .EN(VCC), .LAT(GND), .SD(VCC), .SLn(GND_or_i) ); // @28:543803 SLE \genblk1.iI1Io[5] ( .Q(iI1Io[5]), .ADn(VCC), .ALn(VCC), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iI1Io[5]), .EN(VCC), .LAT(GND), .SD(VCC), .SLn(GND_or_i) ); // @28:543803 SLE \genblk1.iI1Io[3] ( .Q(iI1Io[3]), .ADn(VCC), .ALn(VCC), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iI1Io[3]), .EN(VCC), .LAT(GND), .SD(VCC), .SLn(GND_or_i) ); // @28:543803 SLE \genblk1.iI1Io[1] ( .Q(iI1Io[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iI1Io[1]), .EN(VCC), .LAT(GND), .SD(VCC), .SLn(GND_or_i) ); // @28:543572 SLE \genblk1.o11Io.ol1Io ( .Q(ol1Io), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(GND), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543382 SLE \genblk1.i01Io ( .Q(i01Io), .ADn(VCC), .ALn(o01Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(VCC), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543382 SLE \genblk1.O11Io ( .Q(O11Io), .ADn(VCC), .ALn(o01Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i01Io), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543722 SLE \genblk1.O01Io ( .Q(GND_or), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(VCC), .EN(un2_l01Io_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543572 SLE \genblk1.o11Io.il1Io_1[13] ( .Q(il1Io_1[13]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(GND), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543572 SLE \genblk1.o11Io.il1Io_1[12] ( .Q(il1Io_1[12]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(GND), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543572 SLE \genblk1.o11Io.il1Io_1[11] ( .Q(il1Io_1[11]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(GND), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543572 SLE \genblk1.o11Io.il1Io_1[10] ( .Q(il1Io_1[10]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(GND), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543572 SLE \genblk1.o11Io.il1Io_1[9] ( .Q(il1Io_1[9]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(GND), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543572 SLE \genblk1.o11Io.il1Io_1[8] ( .Q(il1Io_1[8]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(GND), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543572 SLE \genblk1.o11Io.il1Io_1[7] ( .Q(Ol1Io10_a_4), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(GND), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543572 SLE \genblk1.o11Io.il1Io[6] ( .Q(il1Io[23]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(GND), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543572 SLE \genblk1.o11Io.il1Io[5] ( .Q(il1Io[15]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(GND), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543572 SLE \genblk1.o11Io.il1Io[4] ( .Q(il1Io[14]), .ADn(GND), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(VCC), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543572 SLE \genblk1.o11Io.il1Io[3] ( .Q(il1Io[13]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(GND), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543572 SLE \genblk1.o11Io.il1Io[2] ( .Q(il1Io[8]), .ADn(GND), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(VCC), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543572 SLE \genblk1.o11Io.il1Io[1] ( .Q(il1Io[7]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(GND), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543572 SLE \genblk1.o11Io.il1Io[0] ( .Q(il1Io[6]), .ADn(GND), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(VCC), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543572 SLE \genblk1.o11Io.il1Io_1[26] ( .Q(il1Io_1[26]), .ADn(GND), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(VCC), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543572 SLE \genblk1.o11Io.il1Io_1[25] ( .Q(il1Io_1[25]), .ADn(GND), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(VCC), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543572 SLE \genblk1.o11Io.il1Io_1[24] ( .Q(il1Io_1[24]), .ADn(GND), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(VCC), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543572 SLE \genblk1.o11Io.il1Io_1[23] ( .Q(il1Io_1[23]), .ADn(GND), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(VCC), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543572 SLE \genblk1.o11Io.il1Io_1[22] ( .Q(il1Io_1[22]), .ADn(GND), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(VCC), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543572 SLE \genblk1.o11Io.il1Io_1[21] ( .Q(il1Io_1[21]), .ADn(GND), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(VCC), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543572 SLE \genblk1.o11Io.il1Io_1[20] ( .Q(il1Io_1[20]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(GND), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543572 SLE \genblk1.o11Io.il1Io_1[19] ( .Q(il1Io_1[19]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(GND), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543572 SLE \genblk1.o11Io.il1Io_1[18] ( .Q(il1Io_1[18]), .ADn(GND), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(VCC), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543572 SLE \genblk1.o11Io.il1Io_1[17] ( .Q(il1Io_1[17]), .ADn(GND), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(VCC), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543572 SLE \genblk1.o11Io.il1Io_1[16] ( .Q(il1Io_1[16]), .ADn(GND), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(VCC), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543572 SLE \genblk1.o11Io.il1Io_1[15] ( .Q(il1Io_1[15]), .ADn(GND), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(VCC), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543572 SLE \genblk1.o11Io.il1Io_1[14] ( .Q(il1Io_1[14]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(GND), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Ol1Io[13] ( .Q(Ol1Io[13]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un1_Ol1Io_1_s_13_S), .EN(Ol1Io10_NE), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Ol1Io[12] ( .Q(Ol1Io[12]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un1_Ol1Io_1_cry_12_S), .EN(Ol1Io10_NE), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Ol1Io[11] ( .Q(Ol1Io[11]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un1_Ol1Io_1_cry_11_S), .EN(Ol1Io10_NE), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Ol1Io[10] ( .Q(Ol1Io[10]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un1_Ol1Io_1_cry_10_S), .EN(Ol1Io10_NE), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Ol1Io[9] ( .Q(Ol1Io[9]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un1_Ol1Io_1_cry_9_S), .EN(Ol1Io10_NE), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Ol1Io[8] ( .Q(Ol1Io[8]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un1_Ol1Io_1_cry_8_S), .EN(Ol1Io10_NE), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Ol1Io[7] ( .Q(Ol1Io[7]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un1_Ol1Io_1_cry_7_S), .EN(Ol1Io10_NE), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Ol1Io[6] ( .Q(Ol1Io[6]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un1_Ol1Io_1_cry_6_S), .EN(Ol1Io10_NE), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Ol1Io[5] ( .Q(Ol1Io[5]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un1_Ol1Io_1_cry_5_S), .EN(Ol1Io10_NE), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Ol1Io[4] ( .Q(Ol1Io[4]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un1_Ol1Io_1_cry_4_S), .EN(Ol1Io10_NE), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Ol1Io[3] ( .Q(Ol1Io[3]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un1_Ol1Io_1_cry_3_S), .EN(Ol1Io10_NE), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Ol1Io[2] ( .Q(Ol1Io[2]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un1_Ol1Io_1_cry_2_S), .EN(Ol1Io10_NE), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Ol1Io[1] ( .Q(Ol1Io[1]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un1_Ol1Io_1_cry_1_S), .EN(Ol1Io10_NE), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543626 SLE \genblk1.Ol1Io[0] ( .Q(Ol1Io[0]), .ADn(VCC), .ALn(O11Io), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Ol1Io_3_Z[0]), .EN(Ol1Io10_NE), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:543657 ARI1 \genblk1.Ol1Io10_a_4_cry_0 ( .FCO(Ol1Io10_a_4_cry_0), .S(Ol1Io10_a_4_cry_0_S), .Y(Ol1Io10_a_4_cry_0_Y), .B(Il1Io[0]), .C(GND), .D(GND), .A(Ol1Io10_a_4), .FCI(GND) ); defparam \genblk1.Ol1Io10_a_4_cry_0 .INIT=20'h5AA55; // @28:543657 ARI1 \genblk1.Ol1Io10_a_4_cry_1 ( .FCO(Ol1Io10_a_4_cry_1), .S(Ol1Io10_1), .Y(Ol1Io10_a_4_cry_1_Y), .B(Il1Io[1]), .C(GND), .D(GND), .A(il1Io_1[8]), .FCI(Ol1Io10_a_4_cry_0) ); defparam \genblk1.Ol1Io10_a_4_cry_1 .INIT=20'h5AA55; // @28:543657 ARI1 \genblk1.Ol1Io10_a_4_cry_2 ( .FCO(Ol1Io10_a_4_cry_2), .S(Ol1Io10_2), .Y(Ol1Io10_a_4_cry_2_Y), .B(Il1Io[2]), .C(GND), .D(GND), .A(il1Io_1[9]), .FCI(Ol1Io10_a_4_cry_1) ); defparam \genblk1.Ol1Io10_a_4_cry_2 .INIT=20'h5AA55; // @28:543657 ARI1 \genblk1.Ol1Io10_a_4_cry_3 ( .FCO(Ol1Io10_a_4_cry_3), .S(Ol1Io10_3), .Y(Ol1Io10_a_4_cry_3_Y), .B(Il1Io[3]), .C(GND), .D(GND), .A(il1Io_1[10]), .FCI(Ol1Io10_a_4_cry_2) ); defparam \genblk1.Ol1Io10_a_4_cry_3 .INIT=20'h5AA55; // @28:543657 ARI1 \genblk1.Ol1Io10_a_4_cry_4 ( .FCO(Ol1Io10_a_4_cry_4), .S(Ol1Io10_4), .Y(Ol1Io10_a_4_cry_4_Y), .B(Il1Io[4]), .C(GND), .D(GND), .A(il1Io_1[11]), .FCI(Ol1Io10_a_4_cry_3) ); defparam \genblk1.Ol1Io10_a_4_cry_4 .INIT=20'h5AA55; // @28:543657 ARI1 \genblk1.Ol1Io10_a_4_cry_5 ( .FCO(Ol1Io10_a_4_cry_5), .S(Ol1Io10_5), .Y(Ol1Io10_a_4_cry_5_Y), .B(Il1Io[5]), .C(GND), .D(GND), .A(il1Io_1[12]), .FCI(Ol1Io10_a_4_cry_4) ); defparam \genblk1.Ol1Io10_a_4_cry_5 .INIT=20'h5AA55; // @28:543657 ARI1 \genblk1.Ol1Io10_a_4_cry_6 ( .FCO(Ol1Io10_a_4_cry_6), .S(Ol1Io10_6), .Y(Ol1Io10_a_4_cry_6_Y), .B(Il1Io[6]), .C(GND), .D(GND), .A(il1Io[6]), .FCI(Ol1Io10_a_4_cry_5) ); defparam \genblk1.Ol1Io10_a_4_cry_6 .INIT=20'h5AA55; // @28:543657 ARI1 \genblk1.Ol1Io10_a_4_cry_7 ( .FCO(Ol1Io10_a_4_cry_7), .S(Ol1Io10_7), .Y(Ol1Io10_a_4_cry_7_Y), .B(Il1Io[7]), .C(GND), .D(GND), .A(il1Io[7]), .FCI(Ol1Io10_a_4_cry_6) ); defparam \genblk1.Ol1Io10_a_4_cry_7 .INIT=20'h5AA55; // @28:543657 ARI1 \genblk1.Ol1Io10_a_4_cry_8 ( .FCO(Ol1Io10_a_4_cry_8), .S(Ol1Io10_8), .Y(Ol1Io10_a_4_cry_8_Y), .B(Il1Io[8]), .C(GND), .D(GND), .A(il1Io[8]), .FCI(Ol1Io10_a_4_cry_7) ); defparam \genblk1.Ol1Io10_a_4_cry_8 .INIT=20'h5AA55; // @28:543657 ARI1 \genblk1.Ol1Io10_a_4_cry_9 ( .FCO(Ol1Io10_a_4_cry_9), .S(Ol1Io10_9), .Y(Ol1Io10_a_4_cry_9_Y), .B(Il1Io[9]), .C(GND), .D(GND), .A(il1Io_1[13]), .FCI(Ol1Io10_a_4_cry_8) ); defparam \genblk1.Ol1Io10_a_4_cry_9 .INIT=20'h5AA55; // @28:543657 ARI1 \genblk1.Ol1Io10_a_4_cry_10 ( .FCO(Ol1Io10_a_4_cry_10), .S(Ol1Io10_10), .Y(Ol1Io10_a_4_cry_10_Y), .B(Il1Io[10]), .C(GND), .D(GND), .A(il1Io_1[14]), .FCI(Ol1Io10_a_4_cry_9) ); defparam \genblk1.Ol1Io10_a_4_cry_10 .INIT=20'h5AA55; // @28:543657 ARI1 \genblk1.Ol1Io10_a_4_cry_11 ( .FCO(Ol1Io10_a_4_cry_11), .S(Ol1Io10_11), .Y(Ol1Io10_a_4_cry_11_Y), .B(Il1Io[11]), .C(GND), .D(GND), .A(il1Io_1[15]), .FCI(Ol1Io10_a_4_cry_10) ); defparam \genblk1.Ol1Io10_a_4_cry_11 .INIT=20'h5AA55; // @28:543657 ARI1 \genblk1.Ol1Io10_a_4_cry_12 ( .FCO(Ol1Io10_a_4_cry_12), .S(Ol1Io10_12), .Y(Ol1Io10_a_4_cry_12_Y), .B(Il1Io[12]), .C(GND), .D(GND), .A(il1Io_1[16]), .FCI(Ol1Io10_a_4_cry_11) ); defparam \genblk1.Ol1Io10_a_4_cry_12 .INIT=20'h5AA55; // @28:543657 ARI1 \genblk1.Ol1Io10_a_4_cry_13 ( .FCO(Ol1Io10_a_4_cry_13), .S(Ol1Io10_13), .Y(Ol1Io10_a_4_cry_13_Y), .B(Il1Io[13]), .C(GND), .D(GND), .A(il1Io[13]), .FCI(Ol1Io10_a_4_cry_12) ); defparam \genblk1.Ol1Io10_a_4_cry_13 .INIT=20'h5AA55; // @28:543657 ARI1 \genblk1.Ol1Io10_a_4_cry_14 ( .FCO(Ol1Io10_a_4_cry_14), .S(Ol1Io10_14), .Y(Ol1Io10_a_4_cry_14_Y), .B(Il1Io[14]), .C(GND), .D(GND), .A(il1Io[14]), .FCI(Ol1Io10_a_4_cry_13) ); defparam \genblk1.Ol1Io10_a_4_cry_14 .INIT=20'h5AA55; // @28:543657 ARI1 \genblk1.Ol1Io10_a_4_cry_15 ( .FCO(Ol1Io10_a_4_cry_15), .S(Ol1Io10_15), .Y(Ol1Io10_a_4_cry_15_Y), .B(Il1Io[15]), .C(GND), .D(GND), .A(il1Io[15]), .FCI(Ol1Io10_a_4_cry_14) ); defparam \genblk1.Ol1Io10_a_4_cry_15 .INIT=20'h5AA55; // @28:543657 ARI1 \genblk1.Ol1Io10_a_4_cry_16 ( .FCO(Ol1Io10_a_4_cry_16), .S(Ol1Io10_16), .Y(Ol1Io10_a_4_cry_16_Y), .B(Il1Io[16]), .C(GND), .D(GND), .A(il1Io_1[17]), .FCI(Ol1Io10_a_4_cry_15) ); defparam \genblk1.Ol1Io10_a_4_cry_16 .INIT=20'h5AA55; // @28:543657 ARI1 \genblk1.Ol1Io10_a_4_cry_17 ( .FCO(Ol1Io10_a_4_cry_17), .S(Ol1Io10_17), .Y(Ol1Io10_a_4_cry_17_Y), .B(Il1Io[17]), .C(GND), .D(GND), .A(il1Io_1[18]), .FCI(Ol1Io10_a_4_cry_16) ); defparam \genblk1.Ol1Io10_a_4_cry_17 .INIT=20'h5AA55; // @28:543657 ARI1 \genblk1.Ol1Io10_a_4_cry_18 ( .FCO(Ol1Io10_a_4_cry_18), .S(Ol1Io10_18), .Y(Ol1Io10_a_4_cry_18_Y), .B(Il1Io[18]), .C(GND), .D(GND), .A(il1Io_1[19]), .FCI(Ol1Io10_a_4_cry_17) ); defparam \genblk1.Ol1Io10_a_4_cry_18 .INIT=20'h5AA55; // @28:543657 ARI1 \genblk1.Ol1Io10_a_4_cry_19 ( .FCO(Ol1Io10_a_4_cry_19), .S(Ol1Io10_19), .Y(Ol1Io10_a_4_cry_19_Y), .B(Il1Io[19]), .C(GND), .D(GND), .A(il1Io_1[20]), .FCI(Ol1Io10_a_4_cry_18) ); defparam \genblk1.Ol1Io10_a_4_cry_19 .INIT=20'h5AA55; // @28:543657 ARI1 \genblk1.Ol1Io10_a_4_cry_20 ( .FCO(Ol1Io10_a_4_cry_20), .S(Ol1Io10_20), .Y(Ol1Io10_a_4_cry_20_Y), .B(Il1Io[20]), .C(GND), .D(GND), .A(il1Io_1[21]), .FCI(Ol1Io10_a_4_cry_19) ); defparam \genblk1.Ol1Io10_a_4_cry_20 .INIT=20'h5AA55; // @28:543657 ARI1 \genblk1.Ol1Io10_a_4_cry_21 ( .FCO(Ol1Io10_a_4_cry_21), .S(Ol1Io10_21), .Y(Ol1Io10_a_4_cry_21_Y), .B(Il1Io[21]), .C(GND), .D(GND), .A(il1Io_1[22]), .FCI(Ol1Io10_a_4_cry_20) ); defparam \genblk1.Ol1Io10_a_4_cry_21 .INIT=20'h5AA55; // @28:543657 ARI1 \genblk1.Ol1Io10_a_4_cry_22 ( .FCO(Ol1Io10_a_4_cry_22), .S(Ol1Io10_22), .Y(Ol1Io10_a_4_cry_22_Y), .B(Il1Io[22]), .C(GND), .D(GND), .A(il1Io_1[23]), .FCI(Ol1Io10_a_4_cry_21) ); defparam \genblk1.Ol1Io10_a_4_cry_22 .INIT=20'h5AA55; // @28:543657 ARI1 \genblk1.Ol1Io10_a_4_cry_23 ( .FCO(Ol1Io10_a_4_cry_23), .S(Ol1Io10_23), .Y(Ol1Io10_a_4_cry_23_Y), .B(Il1Io[23]), .C(GND), .D(GND), .A(il1Io[23]), .FCI(Ol1Io10_a_4_cry_22) ); defparam \genblk1.Ol1Io10_a_4_cry_23 .INIT=20'h5AA55; // @28:543657 ARI1 \genblk1.Ol1Io10_a_4_cry_24 ( .FCO(Ol1Io10_a_4_cry_24), .S(Ol1Io10_24), .Y(Ol1Io10_a_4_cry_24_Y), .B(Il1Io[24]), .C(GND), .D(GND), .A(il1Io_1[24]), .FCI(Ol1Io10_a_4_cry_23) ); defparam \genblk1.Ol1Io10_a_4_cry_24 .INIT=20'h5AA55; // @28:543657 ARI1 \genblk1.Ol1Io10_a_4_cry_25 ( .FCO(Ol1Io10_a_4_cry_25), .S(Ol1Io10_25), .Y(Ol1Io10_a_4_cry_25_Y), .B(Il1Io[25]), .C(GND), .D(GND), .A(il1Io_1[25]), .FCI(Ol1Io10_a_4_cry_24) ); defparam \genblk1.Ol1Io10_a_4_cry_25 .INIT=20'h5AA55; // @28:543657 ARI1 \genblk1.Ol1Io10_a_4_cry_26 ( .FCO(Ol1Io10_a_4_Z[27]), .S(Ol1Io10_26), .Y(Ol1Io10_a_4_cry_26_Y), .B(Il1Io[26]), .C(GND), .D(GND), .A(il1Io_1[26]), .FCI(Ol1Io10_a_4_cry_25) ); defparam \genblk1.Ol1Io10_a_4_cry_26 .INIT=20'h5AA55; // @28:543626 ARI1 \genblk1.Il1Io_s_4173 ( .FCO(Il1Io_s_4173_FCO), .S(Il1Io_s_4173_S), .Y(Il1Io_s_4173_Y), .B(Il1Io[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam \genblk1.Il1Io_s_4173 .INIT=20'h4AA00; // @28:543626 ARI1 \genblk1.Il1Io_cry[1] ( .FCO(Il1Io_cry[1]), .S(Il1Io_s[1]), .Y(Il1Io_cry_Y[1]), .B(Il1Io[1]), .C(GND), .D(GND), .A(VCC), .FCI(Il1Io_s_4173_FCO) ); defparam \genblk1.Il1Io_cry[1] .INIT=20'h4AA00; // @28:543626 ARI1 \genblk1.Il1Io_cry[2] ( .FCO(Il1Io_cry[2]), .S(Il1Io_s[2]), .Y(Il1Io_cry_Y[2]), .B(Il1Io[2]), .C(GND), .D(GND), .A(VCC), .FCI(Il1Io_cry[1]) ); defparam \genblk1.Il1Io_cry[2] .INIT=20'h4AA00; // @28:543626 ARI1 \genblk1.Il1Io_cry[3] ( .FCO(Il1Io_cry[3]), .S(Il1Io_s[3]), .Y(Il1Io_cry_Y[3]), .B(Il1Io[3]), .C(GND), .D(GND), .A(VCC), .FCI(Il1Io_cry[2]) ); defparam \genblk1.Il1Io_cry[3] .INIT=20'h4AA00; // @28:543626 ARI1 \genblk1.Il1Io_cry[4] ( .FCO(Il1Io_cry[4]), .S(Il1Io_s[4]), .Y(Il1Io_cry_Y[4]), .B(Il1Io[4]), .C(GND), .D(GND), .A(VCC), .FCI(Il1Io_cry[3]) ); defparam \genblk1.Il1Io_cry[4] .INIT=20'h4AA00; // @28:543626 ARI1 \genblk1.Il1Io_cry[5] ( .FCO(Il1Io_cry[5]), .S(Il1Io_s[5]), .Y(Il1Io_cry_Y[5]), .B(Il1Io[5]), .C(GND), .D(GND), .A(VCC), .FCI(Il1Io_cry[4]) ); defparam \genblk1.Il1Io_cry[5] .INIT=20'h4AA00; // @28:543626 ARI1 \genblk1.Il1Io_cry[6] ( .FCO(Il1Io_cry[6]), .S(Il1Io_s[6]), .Y(Il1Io_cry_Y[6]), .B(Il1Io[6]), .C(GND), .D(GND), .A(VCC), .FCI(Il1Io_cry[5]) ); defparam \genblk1.Il1Io_cry[6] .INIT=20'h4AA00; // @28:543626 ARI1 \genblk1.Il1Io_cry[7] ( .FCO(Il1Io_cry[7]), .S(Il1Io_s[7]), .Y(Il1Io_cry_Y[7]), .B(Il1Io[7]), .C(GND), .D(GND), .A(VCC), .FCI(Il1Io_cry[6]) ); defparam \genblk1.Il1Io_cry[7] .INIT=20'h4AA00; // @28:543626 ARI1 \genblk1.Il1Io_cry[8] ( .FCO(Il1Io_cry[8]), .S(Il1Io_s[8]), .Y(Il1Io_cry_Y[8]), .B(Il1Io[8]), .C(GND), .D(GND), .A(VCC), .FCI(Il1Io_cry[7]) ); defparam \genblk1.Il1Io_cry[8] .INIT=20'h4AA00; // @28:543626 ARI1 \genblk1.Il1Io_cry[9] ( .FCO(Il1Io_cry[9]), .S(Il1Io_s[9]), .Y(Il1Io_cry_Y[9]), .B(Il1Io[9]), .C(GND), .D(GND), .A(VCC), .FCI(Il1Io_cry[8]) ); defparam \genblk1.Il1Io_cry[9] .INIT=20'h4AA00; // @28:543626 ARI1 \genblk1.Il1Io_cry[10] ( .FCO(Il1Io_cry[10]), .S(Il1Io_s[10]), .Y(Il1Io_cry_Y[10]), .B(Il1Io[10]), .C(GND), .D(GND), .A(VCC), .FCI(Il1Io_cry[9]) ); defparam \genblk1.Il1Io_cry[10] .INIT=20'h4AA00; // @28:543626 ARI1 \genblk1.Il1Io_cry[11] ( .FCO(Il1Io_cry[11]), .S(Il1Io_s[11]), .Y(Il1Io_cry_Y[11]), .B(Il1Io[11]), .C(GND), .D(GND), .A(VCC), .FCI(Il1Io_cry[10]) ); defparam \genblk1.Il1Io_cry[11] .INIT=20'h4AA00; // @28:543626 ARI1 \genblk1.Il1Io_cry[12] ( .FCO(Il1Io_cry[12]), .S(Il1Io_s[12]), .Y(Il1Io_cry_Y[12]), .B(Il1Io[12]), .C(GND), .D(GND), .A(VCC), .FCI(Il1Io_cry[11]) ); defparam \genblk1.Il1Io_cry[12] .INIT=20'h4AA00; // @28:543626 ARI1 \genblk1.Il1Io_cry[13] ( .FCO(Il1Io_cry[13]), .S(Il1Io_s[13]), .Y(Il1Io_cry_Y[13]), .B(Il1Io[13]), .C(GND), .D(GND), .A(VCC), .FCI(Il1Io_cry[12]) ); defparam \genblk1.Il1Io_cry[13] .INIT=20'h4AA00; // @28:543626 ARI1 \genblk1.Il1Io_cry[14] ( .FCO(Il1Io_cry[14]), .S(Il1Io_s[14]), .Y(Il1Io_cry_Y[14]), .B(Il1Io[14]), .C(GND), .D(GND), .A(VCC), .FCI(Il1Io_cry[13]) ); defparam \genblk1.Il1Io_cry[14] .INIT=20'h4AA00; // @28:543626 ARI1 \genblk1.Il1Io_cry[15] ( .FCO(Il1Io_cry[15]), .S(Il1Io_s[15]), .Y(Il1Io_cry_Y[15]), .B(Il1Io[15]), .C(GND), .D(GND), .A(VCC), .FCI(Il1Io_cry[14]) ); defparam \genblk1.Il1Io_cry[15] .INIT=20'h4AA00; // @28:543626 ARI1 \genblk1.Il1Io_cry[16] ( .FCO(Il1Io_cry[16]), .S(Il1Io_s[16]), .Y(Il1Io_cry_Y[16]), .B(Il1Io[16]), .C(GND), .D(GND), .A(VCC), .FCI(Il1Io_cry[15]) ); defparam \genblk1.Il1Io_cry[16] .INIT=20'h4AA00; // @28:543626 ARI1 \genblk1.Il1Io_cry[17] ( .FCO(Il1Io_cry[17]), .S(Il1Io_s[17]), .Y(Il1Io_cry_Y[17]), .B(Il1Io[17]), .C(GND), .D(GND), .A(VCC), .FCI(Il1Io_cry[16]) ); defparam \genblk1.Il1Io_cry[17] .INIT=20'h4AA00; // @28:543626 ARI1 \genblk1.Il1Io_cry[18] ( .FCO(Il1Io_cry[18]), .S(Il1Io_s[18]), .Y(Il1Io_cry_Y[18]), .B(Il1Io[18]), .C(GND), .D(GND), .A(VCC), .FCI(Il1Io_cry[17]) ); defparam \genblk1.Il1Io_cry[18] .INIT=20'h4AA00; // @28:543626 ARI1 \genblk1.Il1Io_cry[19] ( .FCO(Il1Io_cry[19]), .S(Il1Io_s[19]), .Y(Il1Io_cry_Y[19]), .B(Il1Io[19]), .C(GND), .D(GND), .A(VCC), .FCI(Il1Io_cry[18]) ); defparam \genblk1.Il1Io_cry[19] .INIT=20'h4AA00; // @28:543626 ARI1 \genblk1.Il1Io_cry[20] ( .FCO(Il1Io_cry[20]), .S(Il1Io_s[20]), .Y(Il1Io_cry_Y[20]), .B(Il1Io[20]), .C(GND), .D(GND), .A(VCC), .FCI(Il1Io_cry[19]) ); defparam \genblk1.Il1Io_cry[20] .INIT=20'h4AA00; // @28:543626 ARI1 \genblk1.Il1Io_cry[21] ( .FCO(Il1Io_cry[21]), .S(Il1Io_s[21]), .Y(Il1Io_cry_Y[21]), .B(Il1Io[21]), .C(GND), .D(GND), .A(VCC), .FCI(Il1Io_cry[20]) ); defparam \genblk1.Il1Io_cry[21] .INIT=20'h4AA00; // @28:543626 ARI1 \genblk1.Il1Io_cry[22] ( .FCO(Il1Io_cry[22]), .S(Il1Io_s[22]), .Y(Il1Io_cry_Y[22]), .B(Il1Io[22]), .C(GND), .D(GND), .A(VCC), .FCI(Il1Io_cry[21]) ); defparam \genblk1.Il1Io_cry[22] .INIT=20'h4AA00; // @28:543626 ARI1 \genblk1.Il1Io_cry[23] ( .FCO(Il1Io_cry[23]), .S(Il1Io_s[23]), .Y(Il1Io_cry_Y[23]), .B(Il1Io[23]), .C(GND), .D(GND), .A(VCC), .FCI(Il1Io_cry[22]) ); defparam \genblk1.Il1Io_cry[23] .INIT=20'h4AA00; // @28:543626 ARI1 \genblk1.Il1Io_cry[24] ( .FCO(Il1Io_cry[24]), .S(Il1Io_s[24]), .Y(Il1Io_cry_Y[24]), .B(Il1Io[24]), .C(GND), .D(GND), .A(VCC), .FCI(Il1Io_cry[23]) ); defparam \genblk1.Il1Io_cry[24] .INIT=20'h4AA00; // @28:543626 ARI1 \genblk1.Il1Io_s[26] ( .FCO(Il1Io_s_FCO[26]), .S(Il1Io_s[26]), .Y(Il1Io_s_Y[26]), .B(Il1Io[26]), .C(GND), .D(GND), .A(VCC), .FCI(Il1Io_cry[25]) ); defparam \genblk1.Il1Io_s[26] .INIT=20'h4AA00; // @28:543626 ARI1 \genblk1.Il1Io_cry[25] ( .FCO(Il1Io_cry[25]), .S(Il1Io_s[25]), .Y(Il1Io_cry_Y[25]), .B(Il1Io[25]), .C(GND), .D(GND), .A(VCC), .FCI(Il1Io_cry[24]) ); defparam \genblk1.Il1Io_cry[25] .INIT=20'h4AA00; // @28:543684 ARI1 un1_Ol1Io_1_s_1_4174 ( .FCO(un1_Ol1Io_1_s_1_4174_FCO), .S(un1_Ol1Io_1_s_1_4174_S), .Y(un1_Ol1Io_1_s_1_4174_Y), .B(Ol1Io[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam un1_Ol1Io_1_s_1_4174.INIT=20'h4AA00; // @28:543684 ARI1 un1_Ol1Io_1_cry_1 ( .FCO(un1_Ol1Io_1_cry_1_Z), .S(un1_Ol1Io_1_cry_1_S), .Y(un1_Ol1Io_1_cry_1_Y), .B(Ol1Io[1]), .C(GND), .D(GND), .A(VCC), .FCI(un1_Ol1Io_1_s_1_4174_FCO) ); defparam un1_Ol1Io_1_cry_1.INIT=20'h4AA00; // @28:543684 ARI1 un1_Ol1Io_1_cry_2 ( .FCO(un1_Ol1Io_1_cry_2_Z), .S(un1_Ol1Io_1_cry_2_S), .Y(un1_Ol1Io_1_cry_2_Y), .B(Ol1Io[2]), .C(GND), .D(GND), .A(VCC), .FCI(un1_Ol1Io_1_cry_1_Z) ); defparam un1_Ol1Io_1_cry_2.INIT=20'h4AA00; // @28:543684 ARI1 un1_Ol1Io_1_cry_3 ( .FCO(un1_Ol1Io_1_cry_3_Z), .S(un1_Ol1Io_1_cry_3_S), .Y(un1_Ol1Io_1_cry_3_Y), .B(Ol1Io[3]), .C(GND), .D(GND), .A(VCC), .FCI(un1_Ol1Io_1_cry_2_Z) ); defparam un1_Ol1Io_1_cry_3.INIT=20'h4AA00; // @28:543684 ARI1 un1_Ol1Io_1_cry_4 ( .FCO(un1_Ol1Io_1_cry_4_Z), .S(un1_Ol1Io_1_cry_4_S), .Y(un1_Ol1Io_1_cry_4_Y), .B(Ol1Io[4]), .C(GND), .D(GND), .A(VCC), .FCI(un1_Ol1Io_1_cry_3_Z) ); defparam un1_Ol1Io_1_cry_4.INIT=20'h4AA00; // @28:543684 ARI1 un1_Ol1Io_1_cry_5 ( .FCO(un1_Ol1Io_1_cry_5_Z), .S(un1_Ol1Io_1_cry_5_S), .Y(un1_Ol1Io_1_cry_5_Y), .B(Ol1Io[5]), .C(GND), .D(GND), .A(VCC), .FCI(un1_Ol1Io_1_cry_4_Z) ); defparam un1_Ol1Io_1_cry_5.INIT=20'h4AA00; // @28:543684 ARI1 un1_Ol1Io_1_cry_6 ( .FCO(un1_Ol1Io_1_cry_6_Z), .S(un1_Ol1Io_1_cry_6_S), .Y(un1_Ol1Io_1_cry_6_Y), .B(Ol1Io[6]), .C(GND), .D(GND), .A(VCC), .FCI(un1_Ol1Io_1_cry_5_Z) ); defparam un1_Ol1Io_1_cry_6.INIT=20'h4AA00; // @28:543684 ARI1 un1_Ol1Io_1_cry_7 ( .FCO(un1_Ol1Io_1_cry_7_Z), .S(un1_Ol1Io_1_cry_7_S), .Y(un1_Ol1Io_1_cry_7_Y), .B(Ol1Io[7]), .C(GND), .D(GND), .A(VCC), .FCI(un1_Ol1Io_1_cry_6_Z) ); defparam un1_Ol1Io_1_cry_7.INIT=20'h4AA00; // @28:543684 ARI1 un1_Ol1Io_1_cry_8 ( .FCO(un1_Ol1Io_1_cry_8_Z), .S(un1_Ol1Io_1_cry_8_S), .Y(un1_Ol1Io_1_cry_8_Y), .B(Ol1Io[8]), .C(GND), .D(GND), .A(VCC), .FCI(un1_Ol1Io_1_cry_7_Z) ); defparam un1_Ol1Io_1_cry_8.INIT=20'h4AA00; // @28:543684 ARI1 un1_Ol1Io_1_cry_9 ( .FCO(un1_Ol1Io_1_cry_9_Z), .S(un1_Ol1Io_1_cry_9_S), .Y(un1_Ol1Io_1_cry_9_Y), .B(Ol1Io[9]), .C(GND), .D(GND), .A(VCC), .FCI(un1_Ol1Io_1_cry_8_Z) ); defparam un1_Ol1Io_1_cry_9.INIT=20'h4AA00; // @28:543684 ARI1 un1_Ol1Io_1_cry_10 ( .FCO(un1_Ol1Io_1_cry_10_Z), .S(un1_Ol1Io_1_cry_10_S), .Y(un1_Ol1Io_1_cry_10_Y), .B(Ol1Io[10]), .C(GND), .D(GND), .A(VCC), .FCI(un1_Ol1Io_1_cry_9_Z) ); defparam un1_Ol1Io_1_cry_10.INIT=20'h4AA00; // @28:543684 ARI1 un1_Ol1Io_1_cry_11 ( .FCO(un1_Ol1Io_1_cry_11_Z), .S(un1_Ol1Io_1_cry_11_S), .Y(un1_Ol1Io_1_cry_11_Y), .B(Ol1Io[11]), .C(GND), .D(GND), .A(VCC), .FCI(un1_Ol1Io_1_cry_10_Z) ); defparam un1_Ol1Io_1_cry_11.INIT=20'h4AA00; // @28:543684 ARI1 un1_Ol1Io_1_s_13 ( .FCO(un1_Ol1Io_1_s_13_FCO), .S(un1_Ol1Io_1_s_13_S), .Y(un1_Ol1Io_1_s_13_Y), .B(Ol1Io[13]), .C(GND), .D(GND), .A(VCC), .FCI(un1_Ol1Io_1_cry_12_Z) ); defparam un1_Ol1Io_1_s_13.INIT=20'h4AA00; // @28:543684 ARI1 un1_Ol1Io_1_cry_12 ( .FCO(un1_Ol1Io_1_cry_12_Z), .S(un1_Ol1Io_1_cry_12_S), .Y(un1_Ol1Io_1_cry_12_Y), .B(Ol1Io[12]), .C(GND), .D(GND), .A(VCC), .FCI(un1_Ol1Io_1_cry_11_Z) ); defparam un1_Ol1Io_1_cry_12.INIT=20'h4AA00; // @28:543626 CFG3 \genblk1.Il1Io_lm_0[0] ( .A(Ol1Io10_NE), .B(Il1Io[0]), .C(ol1Io), .Y(Il1Io_lm[0]) ); defparam \genblk1.Il1Io_lm_0[0] .INIT=8'h01; // @28:372 CFG4 \genblk1.Ol1Io10_a_4_cry_23_RNI27LRM ( .A(Ol1Io10_23), .B(Ol1Io10_24), .C(Ol1Io10_25), .D(Ol1Io10_26), .Y(Ol1Io10_NE_20) ); defparam \genblk1.Ol1Io10_a_4_cry_23_RNI27LRM .INIT=16'hFFFE; // @28:372 CFG4 \genblk1.Ol1Io10_a_4_cry_19_RNIR5LRM ( .A(Ol1Io10_19), .B(Ol1Io10_20), .C(Ol1Io10_21), .D(Ol1Io10_22), .Y(Ol1Io10_NE_19) ); defparam \genblk1.Ol1Io10_a_4_cry_19_RNIR5LRM .INIT=16'hFFFE; // @28:372 CFG4 \genblk1.Ol1Io10_a_4_cry_15_RNI63LRM ( .A(Ol1Io10_15), .B(Ol1Io10_16), .C(Ol1Io10_17), .D(Ol1Io10_18), .Y(Ol1Io10_NE_18) ); defparam \genblk1.Ol1Io10_a_4_cry_15_RNI63LRM .INIT=16'hFFFE; // @28:372 CFG4 \genblk1.Ol1Io10_a_4_cry_11_RNIM2LRM ( .A(Ol1Io10_11), .B(Ol1Io10_12), .C(Ol1Io10_13), .D(Ol1Io10_14), .Y(Ol1Io10_NE_17) ); defparam \genblk1.Ol1Io10_a_4_cry_11_RNIM2LRM .INIT=16'hFFFE; // @28:372 CFG4 \genblk1.Ol1Io10_a_4_cry_10_RNIHL8GT ( .A(Ol1Io10_7), .B(Ol1Io10_8), .C(Ol1Io10_9), .D(Ol1Io10_10), .Y(Ol1Io10_NE_16) ); defparam \genblk1.Ol1Io10_a_4_cry_10_RNIHL8GT .INIT=16'hFFFE; // @28:372 CFG4 \genblk1.Ol1Io10_a_4_cry_3_RNIQG4NV ( .A(Ol1Io10_3), .B(Ol1Io10_4), .C(Ol1Io10_5), .D(Ol1Io10_6), .Y(Ol1Io10_NE_15) ); defparam \genblk1.Ol1Io10_a_4_cry_3_RNIQG4NV .INIT=16'hFFFE; // @28:542900 CFG4 \genblk1.Ol1Io6_9 ( .A(Ol1Io[10]), .B(Ol1Io[8]), .C(Ol1Io[7]), .D(Ol1Io[1]), .Y(Ol1Io6_9) ); defparam \genblk1.Ol1Io6_9 .INIT=16'h0001; // @28:542900 CFG4 \genblk1.Ol1Io6_8 ( .A(Ol1Io[13]), .B(Ol1Io[12]), .C(Ol1Io[11]), .D(Ol1Io[6]), .Y(Ol1Io6_8) ); defparam \genblk1.Ol1Io6_8 .INIT=16'h8000; // @28:542900 CFG4 \genblk1.Ol1Io6_7 ( .A(Ol1Io[5]), .B(Ol1Io[4]), .C(Ol1Io[3]), .D(Ol1Io[2]), .Y(Ol1Io6_7) ); defparam \genblk1.Ol1Io6_7 .INIT=16'h0001; // @28:542917 CFG4 un2_l01Io_23 ( .A(iI1Io[31]), .B(iI1Io[29]), .C(iI1Io[27]), .D(iI1Io[25]), .Y(un2_l01Io_23_Z) ); defparam un2_l01Io_23.INIT=16'h8000; // @28:542917 CFG4 un2_l01Io_22 ( .A(iI1Io[23]), .B(iI1Io[21]), .C(iI1Io[19]), .D(iI1Io[17]), .Y(un2_l01Io_22_Z) ); defparam un2_l01Io_22.INIT=16'h8000; // @28:542917 CFG4 un2_l01Io_21 ( .A(iI1Io[15]), .B(iI1Io[13]), .C(iI1Io[11]), .D(iI1Io[9]), .Y(un2_l01Io_21_Z) ); defparam un2_l01Io_21.INIT=16'h8000; // @28:542917 CFG4 un2_l01Io_20 ( .A(iI1Io[7]), .B(iI1Io[5]), .C(iI1Io[3]), .D(iI1Io[1]), .Y(un2_l01Io_20_Z) ); defparam un2_l01Io_20.INIT=16'h8000; // @28:542917 CFG4 un2_l01Io_19 ( .A(iI1Io[30]), .B(iI1Io[28]), .C(iI1Io[26]), .D(iI1Io[24]), .Y(un2_l01Io_19_Z) ); defparam un2_l01Io_19.INIT=16'h0001; // @28:542917 CFG4 un2_l01Io_18 ( .A(iI1Io[22]), .B(iI1Io[20]), .C(iI1Io[18]), .D(iI1Io[16]), .Y(un2_l01Io_18_Z) ); defparam un2_l01Io_18.INIT=16'h0001; // @28:542917 CFG4 un2_l01Io_17 ( .A(iI1Io[14]), .B(iI1Io[12]), .C(iI1Io[10]), .D(iI1Io[8]), .Y(un2_l01Io_17_Z) ); defparam un2_l01Io_17.INIT=16'h0001; // @28:542917 CFG4 un2_l01Io_16 ( .A(iI1Io[6]), .B(iI1Io[4]), .C(iI1Io[2]), .D(iI1Io[0]), .Y(un2_l01Io_16_Z) ); defparam un2_l01Io_16.INIT=16'h0001; // @28:372 CFG4 \genblk1.Ol1Io10_a_4_cry_26_RNI3M8GT ( .A(Ol1Io10_1), .B(Ol1Io10_2), .C(Ol1Io10_a_4_cry_0_Y), .D(Ol1Io10_a_4_Z[27]), .Y(Ol1Io10_NE_14) ); defparam \genblk1.Ol1Io10_a_4_cry_26_RNI3M8GT .INIT=16'hFEFF; // @28:542900 CFG3 \genblk1.Ol1Io6_10 ( .A(Ol1Io[0]), .B(Ol1Io[9]), .C(Ol1Io6_7), .Y(Ol1Io6_10) ); defparam \genblk1.Ol1Io6_10 .INIT=8'h10; // @28:372 CFG4 \genblk1.Ol1Io10_a_4_cry_10_RNI818323 ( .A(Ol1Io10_NE_16), .B(Ol1Io10_NE_17), .C(Ol1Io10_NE_18), .D(Ol1Io10_NE_19), .Y(Ol1Io10_NE_25) ); defparam \genblk1.Ol1Io10_a_4_cry_10_RNI818323 .INIT=16'hFFFE; // @28:542917 CFG4 un2_l01Io_29 ( .A(un2_l01Io_23_Z), .B(un2_l01Io_22_Z), .C(un2_l01Io_21_Z), .D(un2_l01Io_20_Z), .Y(un2_l01Io_29_Z) ); defparam un2_l01Io_29.INIT=16'h8000; // @28:542917 CFG4 un2_l01Io_28 ( .A(un2_l01Io_19_Z), .B(un2_l01Io_18_Z), .C(un2_l01Io_17_Z), .D(un2_l01Io_16_Z), .Y(un2_l01Io_28_Z) ); defparam un2_l01Io_28.INIT=16'h8000; // @28:543664 CFG4 \Ol1Io_3[0] ( .A(Ol1Io6_9), .B(Ol1Io6_10), .C(Ol1Io[0]), .D(Ol1Io6_8), .Y(Ol1Io_3_Z[0]) ); defparam \Ol1Io_3[0] .INIT=16'h070F; // @28:372 CFG4 \genblk1.Ol1Io10_a_4_cry_23_RNI7FA6M5 ( .A(Ol1Io10_NE_14), .B(Ol1Io10_NE_15), .C(Ol1Io10_NE_20), .D(Ol1Io10_NE_25), .Y(Ol1Io10_NE) ); defparam \genblk1.Ol1Io10_a_4_cry_23_RNI7FA6M5 .INIT=16'h0001; // @28:542934 CFG3 o01Io_1 ( .A(un2_l01Io_29_Z), .B(un2_l01Io_28_Z), .C(AND2_2_Y), .Y(o01Io) ); defparam o01Io_1.INIT=8'hF8; // @28:424844 CFG4 \genblk1.Ol1Io6_10_RNIT2V2H ( .A(Ol1Io6_10), .B(Ol1Io6_9), .C(Ol1Io6_8), .D(AND2_2_Y), .Y(l_i_i) ); defparam \genblk1.Ol1Io6_10_RNIT2V2H .INIT=16'h7F00; // @28:543722 CFG2 \genblk1.O01Io_RNO ( .A(un2_l01Io_28_Z), .B(un2_l01Io_29_Z), .Y(un2_l01Io_i) ); defparam \genblk1.O01Io_RNO .INIT=4'h7; // @28:372 CFG4 \genblk1.Ol1Io6_10_RNIEPCN26 ( .A(Ol1Io6_8), .B(Ol1Io6_9), .C(Ol1Io6_10), .D(Ol1Io10_NE), .Y(Il1Ioe) ); defparam \genblk1.Ol1Io6_10_RNIEPCN26 .INIT=16'h7FFF; // @28:543626 CFG3 \genblk1.Il1Io_lm_0[26] ( .A(Ol1Io10_NE), .B(ol1Io), .C(Il1Io_s[26]), .Y(Il1Io_lm[26]) ); defparam \genblk1.Il1Io_lm_0[26] .INIT=8'h10; // @28:543626 CFG3 \genblk1.Il1Io_lm_0[25] ( .A(Ol1Io10_NE), .B(ol1Io), .C(Il1Io_s[25]), .Y(Il1Io_lm[25]) ); defparam \genblk1.Il1Io_lm_0[25] .INIT=8'h10; // @28:543626 CFG3 \genblk1.Il1Io_lm_0[24] ( .A(Ol1Io10_NE), .B(ol1Io), .C(Il1Io_s[24]), .Y(Il1Io_lm[24]) ); defparam \genblk1.Il1Io_lm_0[24] .INIT=8'h10; // @28:543626 CFG3 \genblk1.Il1Io_lm_0[23] ( .A(Ol1Io10_NE), .B(ol1Io), .C(Il1Io_s[23]), .Y(Il1Io_lm[23]) ); defparam \genblk1.Il1Io_lm_0[23] .INIT=8'h10; // @28:543626 CFG3 \genblk1.Il1Io_lm_0[22] ( .A(Ol1Io10_NE), .B(ol1Io), .C(Il1Io_s[22]), .Y(Il1Io_lm[22]) ); defparam \genblk1.Il1Io_lm_0[22] .INIT=8'h10; // @28:543626 CFG3 \genblk1.Il1Io_lm_0[21] ( .A(Ol1Io10_NE), .B(ol1Io), .C(Il1Io_s[21]), .Y(Il1Io_lm[21]) ); defparam \genblk1.Il1Io_lm_0[21] .INIT=8'h10; // @28:543626 CFG3 \genblk1.Il1Io_lm_0[20] ( .A(Ol1Io10_NE), .B(ol1Io), .C(Il1Io_s[20]), .Y(Il1Io_lm[20]) ); defparam \genblk1.Il1Io_lm_0[20] .INIT=8'h10; // @28:543626 CFG3 \genblk1.Il1Io_lm_0[19] ( .A(Ol1Io10_NE), .B(ol1Io), .C(Il1Io_s[19]), .Y(Il1Io_lm[19]) ); defparam \genblk1.Il1Io_lm_0[19] .INIT=8'h10; // @28:543626 CFG3 \genblk1.Il1Io_lm_0[18] ( .A(Ol1Io10_NE), .B(ol1Io), .C(Il1Io_s[18]), .Y(Il1Io_lm[18]) ); defparam \genblk1.Il1Io_lm_0[18] .INIT=8'h10; // @28:543626 CFG3 \genblk1.Il1Io_lm_0[17] ( .A(Ol1Io10_NE), .B(ol1Io), .C(Il1Io_s[17]), .Y(Il1Io_lm[17]) ); defparam \genblk1.Il1Io_lm_0[17] .INIT=8'h10; // @28:543626 CFG3 \genblk1.Il1Io_lm_0[16] ( .A(Ol1Io10_NE), .B(ol1Io), .C(Il1Io_s[16]), .Y(Il1Io_lm[16]) ); defparam \genblk1.Il1Io_lm_0[16] .INIT=8'h10; // @28:543626 CFG3 \genblk1.Il1Io_lm_0[15] ( .A(Ol1Io10_NE), .B(ol1Io), .C(Il1Io_s[15]), .Y(Il1Io_lm[15]) ); defparam \genblk1.Il1Io_lm_0[15] .INIT=8'h10; // @28:543626 CFG3 \genblk1.Il1Io_lm_0[14] ( .A(Ol1Io10_NE), .B(ol1Io), .C(Il1Io_s[14]), .Y(Il1Io_lm[14]) ); defparam \genblk1.Il1Io_lm_0[14] .INIT=8'h10; // @28:543626 CFG3 \genblk1.Il1Io_lm_0[13] ( .A(Ol1Io10_NE), .B(ol1Io), .C(Il1Io_s[13]), .Y(Il1Io_lm[13]) ); defparam \genblk1.Il1Io_lm_0[13] .INIT=8'h10; // @28:543626 CFG3 \genblk1.Il1Io_lm_0[12] ( .A(Ol1Io10_NE), .B(ol1Io), .C(Il1Io_s[12]), .Y(Il1Io_lm[12]) ); defparam \genblk1.Il1Io_lm_0[12] .INIT=8'h10; // @28:543626 CFG3 \genblk1.Il1Io_lm_0[11] ( .A(Ol1Io10_NE), .B(ol1Io), .C(Il1Io_s[11]), .Y(Il1Io_lm[11]) ); defparam \genblk1.Il1Io_lm_0[11] .INIT=8'h10; // @28:543626 CFG3 \genblk1.Il1Io_lm_0[10] ( .A(Ol1Io10_NE), .B(ol1Io), .C(Il1Io_s[10]), .Y(Il1Io_lm[10]) ); defparam \genblk1.Il1Io_lm_0[10] .INIT=8'h10; // @28:543626 CFG3 \genblk1.Il1Io_lm_0[9] ( .A(Ol1Io10_NE), .B(ol1Io), .C(Il1Io_s[9]), .Y(Il1Io_lm[9]) ); defparam \genblk1.Il1Io_lm_0[9] .INIT=8'h10; // @28:543626 CFG3 \genblk1.Il1Io_lm_0[8] ( .A(Ol1Io10_NE), .B(ol1Io), .C(Il1Io_s[8]), .Y(Il1Io_lm[8]) ); defparam \genblk1.Il1Io_lm_0[8] .INIT=8'h10; // @28:543626 CFG3 \genblk1.Il1Io_lm_0[7] ( .A(Ol1Io10_NE), .B(ol1Io), .C(Il1Io_s[7]), .Y(Il1Io_lm[7]) ); defparam \genblk1.Il1Io_lm_0[7] .INIT=8'h10; // @28:543626 CFG3 \genblk1.Il1Io_lm_0[6] ( .A(Ol1Io10_NE), .B(ol1Io), .C(Il1Io_s[6]), .Y(Il1Io_lm[6]) ); defparam \genblk1.Il1Io_lm_0[6] .INIT=8'h10; // @28:543626 CFG3 \genblk1.Il1Io_lm_0[5] ( .A(Ol1Io10_NE), .B(ol1Io), .C(Il1Io_s[5]), .Y(Il1Io_lm[5]) ); defparam \genblk1.Il1Io_lm_0[5] .INIT=8'h10; // @28:543626 CFG3 \genblk1.Il1Io_lm_0[4] ( .A(Ol1Io10_NE), .B(ol1Io), .C(Il1Io_s[4]), .Y(Il1Io_lm[4]) ); defparam \genblk1.Il1Io_lm_0[4] .INIT=8'h10; // @28:543626 CFG3 \genblk1.Il1Io_lm_0[3] ( .A(Ol1Io10_NE), .B(ol1Io), .C(Il1Io_s[3]), .Y(Il1Io_lm[3]) ); defparam \genblk1.Il1Io_lm_0[3] .INIT=8'h10; // @28:543626 CFG3 \genblk1.Il1Io_lm_0[2] ( .A(Ol1Io10_NE), .B(ol1Io), .C(Il1Io_s[2]), .Y(Il1Io_lm[2]) ); defparam \genblk1.Il1Io_lm_0[2] .INIT=8'h10; // @28:543626 CFG3 \genblk1.Il1Io_lm_0[1] ( .A(Ol1Io10_NE), .B(ol1Io), .C(Il1Io_s[1]), .Y(Il1Io_lm[1]) ); defparam \genblk1.Il1Io_lm_0[1] .INIT=8'h10; //@28:542871 GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_SELF_DESTRUCT_26s_1s_125000000s_25000000s_2500000s_4s_14400s_18446744072277895850_27s_14s_Z12 */ module CTSE_DECODER ( io0O1_m_3, io0O1_m_6, io0O1_m_7, io0O1_m_8, io0O1_m_15, io0O1_m_2, io0O1_m_5, io0O1_m_4, io0O1_m_9, io0O1_m_1, io0O1_m_0, OO1O1_19, OO1O1_3, OO1O1_6, OO1O1_7, OO1O1_8, OO1O1_2, OO1O1_5, OO1O1_4, OO1O1_1, OO1O1_0, OOOI1_10_d0, OOOI1_6, OOOI1_0, OOOI1_25_6, OOOI1_25_1, OOOI1_25_0, OOOI1_26, un9_Ol0O1, OOOI1_18_6, OOOI1_18_2, OOOI1_18_7, OOOI1_18_0, OOOI1_19_6, OOOI1_19_7, OOOI1_19_8, OOOI1_19_0, OOOI1_19_1, OOOI1_20_0, OOOI1_20_1, OOOI1_20_10, OOOI1_20_4, OOOI1_27_0, OOOI1_27_5, OOOI1_27_2, OOOI1_27_1, OOOI1_28, io0O1, OOOI1_17_1, OOOI1_17_0, OOOI1_17_7, OOOI1_16_8, OOOI1_16_1, OOOI1_16_0, OOOI1_16_7, OOOI1_22_2, OOOI1_22_3, OOOI1_22_7, OOOI1_22_0, OOOI1_23_3, OOOI1_23_7, OOOI1_23_0, OOOI1_29_0, OOOI1_30_0, OOOI1_15_7, OOOI1_15_0, OOOI1_21_0, OOOI1_21_1, OOOI1_21_6, OOOI1_14_0, OOOI1_13_0, OOOI1_11_0, OOOI1_10_0, OOOI1_10_2, OOOI1_10_5, OOOI1_10_6, OOOI1_9_1, OOOI1_9_0, OOOI1_9_2, OOOI1_9_5, OOOI1_12_0, Oi1O1_4_0, Oi1O1_3_0, Oi1O1_3_6, Oi1O1_3_15, Oi1O1_3_19, Oi1O1_3_20, Oi1O1_3_7, Oi1O1_3_8, Oi1O1_3_12, Oi1O1_3_14, Oi1O1_3_16, Oi1O1_3_21, Oi1O1_3_22, Oi1O1_3_13, Oi1O1_3_9, Oi1O1_3_11, Oi1O1_3_18, Oi1O1_3_17, OOOI1_7_0, OOOI1_8_0, o0Io1, Oolo1, un128_OOOI1_4, un128_OOOI1_0, lIl11_5, lIl11_4, lIl11_0, oloI1_0, oIOI1_4, oIOI1_36, oIOI1_5, oIOI1_37, oIOI1_0, oIOI1_32, oIoI1_1z_4, oIoI1_1z_5, oIoI1_1z_0, i11I1_0, O11I1_4, O11I1_0, Io1I1_0, un105_OOOI1_4, un105_OOOI1_0, o01I1_4, o01I1_0, un149_OOOI1_0, il1I1_0, Oi1O1_2_0, Oi1O1_2_6, Oi1O1_2_15, Oi1O1_2_19, Oi1O1_2_20, Oi1O1_2_7, Oi1O1_2_8, Oi1O1_2_12, Oi1O1_2_14, Oi1O1_2_16, Oi1O1_2_21, Oi1O1_2_22, Oi1O1_2_13, Oi1O1_2_9, Oi1O1_2_11, Oi1O1_2_18, Oi1O1_1_0, Oi1O1_1_6, Oi1O1_1_15, Oi1O1_1_19, Oi1O1_1_20, Oi1O1_1_7, Oi1O1_1_8, Oi1O1_1_12, Oi1O1_1_14, Oi1O1_1_16, Oi1O1_1_21, Oi1O1_1_22, Oi1O1_1_13, Oi1O1_1_9, Oi1O1_1_11, Oi1O1_1_18, CoreAPB3_0_0_APBmslave0_PADDR, paddr_0, N_280, N_402, N_404, N_159, N_829, un18_OilI1_0_a2, IoOl1, un80_OilI1_0_a2, I0Ol1, ilOl1, I0o11, O0i11, O1Ol1, oli11, O0Ol1, o1Ol1_1z, ioOl1_1z, CoreAPB3_0_0_APBmslave0_PSELx, CoreAPB3_0_0_APBmslave0_PENABLE, Il1O1, un1_Ii0O1, CoreAPB3_0_0_APBmslave0_PWRITE_s0, CoreAPB3_0_0_APBmslave0_PWRITE, iPRDATA_0_sqmuxa, un1_o01O1_0_1z, Oi0O1, un1_lO1O1_1z, un1_ooiO1, liO019_i_1 ) ; output io0O1_m_3 ; output io0O1_m_6 ; output io0O1_m_7 ; output io0O1_m_8 ; output io0O1_m_15 ; output io0O1_m_2 ; output io0O1_m_5 ; output io0O1_m_4 ; output io0O1_m_9 ; output io0O1_m_1 ; output io0O1_m_0 ; input OO1O1_19 ; input OO1O1_3 ; input OO1O1_6 ; input OO1O1_7 ; input OO1O1_8 ; input OO1O1_2 ; input OO1O1_5 ; input OO1O1_4 ; input OO1O1_1 ; input OO1O1_0 ; input OOOI1_10_d0 ; input OOOI1_6 ; input OOOI1_0 ; input OOOI1_25_6 ; input OOOI1_25_1 ; input OOOI1_25_0 ; input [4:0] OOOI1_26 ; output [14:10] un9_Ol0O1 ; input OOOI1_18_6 ; input OOOI1_18_2 ; input OOOI1_18_7 ; input OOOI1_18_0 ; input OOOI1_19_6 ; input OOOI1_19_7 ; input OOOI1_19_8 ; input OOOI1_19_0 ; input OOOI1_19_1 ; input OOOI1_20_0 ; input OOOI1_20_1 ; input OOOI1_20_10 ; input OOOI1_20_4 ; input OOOI1_27_0 ; input OOOI1_27_5 ; input OOOI1_27_2 ; input OOOI1_27_1 ; input [4:2] OOOI1_28 ; output [31:16] io0O1 ; input OOOI1_17_1 ; input OOOI1_17_0 ; input OOOI1_17_7 ; input OOOI1_16_8 ; input OOOI1_16_1 ; input OOOI1_16_0 ; input OOOI1_16_7 ; input OOOI1_22_2 ; input OOOI1_22_3 ; input OOOI1_22_7 ; input OOOI1_22_0 ; input OOOI1_23_3 ; input OOOI1_23_7 ; input OOOI1_23_0 ; input OOOI1_29_0 ; input OOOI1_30_0 ; input OOOI1_15_7 ; input OOOI1_15_0 ; input OOOI1_21_0 ; input OOOI1_21_1 ; input OOOI1_21_6 ; input OOOI1_14_0 ; input OOOI1_13_0 ; input OOOI1_11_0 ; input OOOI1_10_0 ; input OOOI1_10_2 ; input OOOI1_10_5 ; input OOOI1_10_6 ; input OOOI1_9_1 ; input OOOI1_9_0 ; input OOOI1_9_2 ; input OOOI1_9_5 ; input OOOI1_12_0 ; input Oi1O1_4_0 ; input Oi1O1_3_0 ; input Oi1O1_3_6 ; input Oi1O1_3_15 ; input Oi1O1_3_19 ; input Oi1O1_3_20 ; input Oi1O1_3_7 ; input Oi1O1_3_8 ; input Oi1O1_3_12 ; input Oi1O1_3_14 ; input Oi1O1_3_16 ; input Oi1O1_3_21 ; input Oi1O1_3_22 ; input Oi1O1_3_13 ; input Oi1O1_3_9 ; input Oi1O1_3_11 ; input Oi1O1_3_18 ; input Oi1O1_3_17 ; input OOOI1_7_0 ; input OOOI1_8_0 ; input [3:2] o0Io1 ; input [23:22] Oolo1 ; input un128_OOOI1_4 ; input un128_OOOI1_0 ; input lIl11_5 ; input lIl11_4 ; input lIl11_0 ; input oloI1_0 ; input oIOI1_4 ; input oIOI1_36 ; input oIOI1_5 ; input oIOI1_37 ; input oIOI1_0 ; input oIOI1_32 ; input oIoI1_1z_4 ; input oIoI1_1z_5 ; input oIoI1_1z_0 ; input i11I1_0 ; input O11I1_4 ; input O11I1_0 ; input Io1I1_0 ; input un105_OOOI1_4 ; input un105_OOOI1_0 ; input o01I1_4 ; input o01I1_0 ; input un149_OOOI1_0 ; input il1I1_0 ; input Oi1O1_2_0 ; input Oi1O1_2_6 ; input Oi1O1_2_15 ; input Oi1O1_2_19 ; input Oi1O1_2_20 ; input Oi1O1_2_7 ; input Oi1O1_2_8 ; input Oi1O1_2_12 ; input Oi1O1_2_14 ; input Oi1O1_2_16 ; input Oi1O1_2_21 ; input Oi1O1_2_22 ; input Oi1O1_2_13 ; input Oi1O1_2_9 ; input Oi1O1_2_11 ; input Oi1O1_2_18 ; input Oi1O1_1_0 ; input Oi1O1_1_6 ; input Oi1O1_1_15 ; input Oi1O1_1_19 ; input Oi1O1_1_20 ; input Oi1O1_1_7 ; input Oi1O1_1_8 ; input Oi1O1_1_12 ; input Oi1O1_1_14 ; input Oi1O1_1_16 ; input Oi1O1_1_21 ; input Oi1O1_1_22 ; input Oi1O1_1_13 ; input Oi1O1_1_9 ; input Oi1O1_1_11 ; input Oi1O1_1_18 ; input [9:7] CoreAPB3_0_0_APBmslave0_PADDR ; input paddr_0 ; input N_280 ; input N_402 ; input N_404 ; input N_159 ; input N_829 ; input un18_OilI1_0_a2 ; input IoOl1 ; input un80_OilI1_0_a2 ; input I0Ol1 ; input ilOl1 ; input I0o11 ; input O0i11 ; input O1Ol1 ; input oli11 ; input O0Ol1 ; input o1Ol1_1z ; input ioOl1_1z ; input CoreAPB3_0_0_APBmslave0_PSELx ; input CoreAPB3_0_0_APBmslave0_PENABLE ; input Il1O1 ; input un1_Ii0O1 ; output CoreAPB3_0_0_APBmslave0_PWRITE_s0 ; input CoreAPB3_0_0_APBmslave0_PWRITE ; input iPRDATA_0_sqmuxa ; output un1_o01O1_0_1z ; output Oi0O1 ; output un1_lO1O1_1z ; output un1_ooiO1 ; input liO019_i_1 ; wire io0O1_m_3 ; wire io0O1_m_6 ; wire io0O1_m_7 ; wire io0O1_m_8 ; wire io0O1_m_15 ; wire io0O1_m_2 ; wire io0O1_m_5 ; wire io0O1_m_4 ; wire io0O1_m_9 ; wire io0O1_m_1 ; wire io0O1_m_0 ; wire OO1O1_19 ; wire OO1O1_3 ; wire OO1O1_6 ; wire OO1O1_7 ; wire OO1O1_8 ; wire OO1O1_2 ; wire OO1O1_5 ; wire OO1O1_4 ; wire OO1O1_1 ; wire OO1O1_0 ; wire OOOI1_10_d0 ; wire OOOI1_6 ; wire OOOI1_0 ; wire OOOI1_25_6 ; wire OOOI1_25_1 ; wire OOOI1_25_0 ; wire OOOI1_18_6 ; wire OOOI1_18_2 ; wire OOOI1_18_7 ; wire OOOI1_18_0 ; wire OOOI1_19_6 ; wire OOOI1_19_7 ; wire OOOI1_19_8 ; wire OOOI1_19_0 ; wire OOOI1_19_1 ; wire OOOI1_20_0 ; wire OOOI1_20_1 ; wire OOOI1_20_10 ; wire OOOI1_20_4 ; wire OOOI1_27_0 ; wire OOOI1_27_5 ; wire OOOI1_27_2 ; wire OOOI1_27_1 ; wire OOOI1_17_1 ; wire OOOI1_17_0 ; wire OOOI1_17_7 ; wire OOOI1_16_8 ; wire OOOI1_16_1 ; wire OOOI1_16_0 ; wire OOOI1_16_7 ; wire OOOI1_22_2 ; wire OOOI1_22_3 ; wire OOOI1_22_7 ; wire OOOI1_22_0 ; wire OOOI1_23_3 ; wire OOOI1_23_7 ; wire OOOI1_23_0 ; wire OOOI1_29_0 ; wire OOOI1_30_0 ; wire OOOI1_15_7 ; wire OOOI1_15_0 ; wire OOOI1_21_0 ; wire OOOI1_21_1 ; wire OOOI1_21_6 ; wire OOOI1_14_0 ; wire OOOI1_13_0 ; wire OOOI1_11_0 ; wire OOOI1_10_0 ; wire OOOI1_10_2 ; wire OOOI1_10_5 ; wire OOOI1_10_6 ; wire OOOI1_9_1 ; wire OOOI1_9_0 ; wire OOOI1_9_2 ; wire OOOI1_9_5 ; wire OOOI1_12_0 ; wire Oi1O1_4_0 ; wire Oi1O1_3_0 ; wire Oi1O1_3_6 ; wire Oi1O1_3_15 ; wire Oi1O1_3_19 ; wire Oi1O1_3_20 ; wire Oi1O1_3_7 ; wire Oi1O1_3_8 ; wire Oi1O1_3_12 ; wire Oi1O1_3_14 ; wire Oi1O1_3_16 ; wire Oi1O1_3_21 ; wire Oi1O1_3_22 ; wire Oi1O1_3_13 ; wire Oi1O1_3_9 ; wire Oi1O1_3_11 ; wire Oi1O1_3_18 ; wire Oi1O1_3_17 ; wire OOOI1_7_0 ; wire OOOI1_8_0 ; wire un128_OOOI1_4 ; wire un128_OOOI1_0 ; wire lIl11_5 ; wire lIl11_4 ; wire lIl11_0 ; wire oloI1_0 ; wire oIOI1_4 ; wire oIOI1_36 ; wire oIOI1_5 ; wire oIOI1_37 ; wire oIOI1_0 ; wire oIOI1_32 ; wire oIoI1_1z_4 ; wire oIoI1_1z_5 ; wire oIoI1_1z_0 ; wire i11I1_0 ; wire O11I1_4 ; wire O11I1_0 ; wire Io1I1_0 ; wire un105_OOOI1_4 ; wire un105_OOOI1_0 ; wire o01I1_4 ; wire o01I1_0 ; wire un149_OOOI1_0 ; wire il1I1_0 ; wire Oi1O1_2_0 ; wire Oi1O1_2_6 ; wire Oi1O1_2_15 ; wire Oi1O1_2_19 ; wire Oi1O1_2_20 ; wire Oi1O1_2_7 ; wire Oi1O1_2_8 ; wire Oi1O1_2_12 ; wire Oi1O1_2_14 ; wire Oi1O1_2_16 ; wire Oi1O1_2_21 ; wire Oi1O1_2_22 ; wire Oi1O1_2_13 ; wire Oi1O1_2_9 ; wire Oi1O1_2_11 ; wire Oi1O1_2_18 ; wire Oi1O1_1_0 ; wire Oi1O1_1_6 ; wire Oi1O1_1_15 ; wire Oi1O1_1_19 ; wire Oi1O1_1_20 ; wire Oi1O1_1_7 ; wire Oi1O1_1_8 ; wire Oi1O1_1_12 ; wire Oi1O1_1_14 ; wire Oi1O1_1_16 ; wire Oi1O1_1_21 ; wire Oi1O1_1_22 ; wire Oi1O1_1_13 ; wire Oi1O1_1_9 ; wire Oi1O1_1_11 ; wire Oi1O1_1_18 ; wire paddr_0 ; wire N_280 ; wire N_402 ; wire N_404 ; wire N_159 ; wire N_829 ; wire un18_OilI1_0_a2 ; wire IoOl1 ; wire un80_OilI1_0_a2 ; wire I0Ol1 ; wire ilOl1 ; wire I0o11 ; wire O0i11 ; wire O1Ol1 ; wire oli11 ; wire O0Ol1 ; wire o1Ol1_1z ; wire ioOl1_1z ; wire CoreAPB3_0_0_APBmslave0_PSELx ; wire CoreAPB3_0_0_APBmslave0_PENABLE ; wire Il1O1 ; wire un1_Ii0O1 ; wire CoreAPB3_0_0_APBmslave0_PWRITE_s0 ; wire CoreAPB3_0_0_APBmslave0_PWRITE ; wire iPRDATA_0_sqmuxa ; wire un1_o01O1_0_1z ; wire Oi0O1 ; wire un1_lO1O1_1z ; wire un1_ooiO1 ; wire liO019_i_1 ; wire [31:9] un5_Ol0O1_Z; wire [29:24] Ol0O1_1_Z; wire [29:24] Ol0O1_4_Z; wire [29:24] Ol0O1_3_Z; wire [29:24] Ol0O1_5_Z; wire [29:24] Ol0O1_6_Z; wire [28:28] Ol0O1_8_Z; wire [26:0] un9_Ol0O1_Z; wire CO1 ; wire GND ; wire VCC ; // @28:454840 CFG3 Il0O1 ( .A(liO019_i_1), .B(un1_ooiO1), .C(un1_lO1O1_1z), .Y(Oi0O1) ); defparam Il0O1.INIT=8'hDC; // @28:454690 CFG2 \un5_o01O1_1.BNC1 ( .A(paddr_0), .B(CoreAPB3_0_0_APBmslave0_PADDR[7]), .Y(CO1) ); defparam \un5_o01O1_1.BNC1 .INIT=4'h8; // @28:454690 CFG4 un1_o01O1_0 ( .A(CoreAPB3_0_0_APBmslave0_PADDR[9]), .B(CoreAPB3_0_0_APBmslave0_PADDR[8]), .C(CoreAPB3_0_0_APBmslave0_PADDR[7]), .D(paddr_0), .Y(un1_o01O1_0_1z) ); defparam un1_o01O1_0.INIT=16'h1555; CFG2 \un5_o01O1_1.CoreAPB3_0_0_APBmslave0_PWRITE_s0 ( .A(iPRDATA_0_sqmuxa), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .Y(CoreAPB3_0_0_APBmslave0_PWRITE_s0) ); defparam \un5_o01O1_1.CoreAPB3_0_0_APBmslave0_PWRITE_s0 .INIT=4'h2; // @28:454673 CFG4 un1_lO1O1 ( .A(CoreAPB3_0_0_APBmslave0_PADDR[9]), .B(CoreAPB3_0_0_APBmslave0_PADDR[8]), .C(CO1), .D(un1_Ii0O1), .Y(un1_lO1O1_1z) ); defparam un1_lO1O1.INIT=16'h4000; // @28:454690 CFG4 un1_o01O1 ( .A(Il1O1), .B(un1_o01O1_0_1z), .C(CoreAPB3_0_0_APBmslave0_PENABLE), .D(CoreAPB3_0_0_APBmslave0_PSELx), .Y(un1_ooiO1) ); defparam un1_o01O1.INIT=16'h8000; // @28:454774 CFG4 \un5_Ol0O1[9] ( .A(Oi1O1_1_0), .B(Oi1O1_2_0), .C(un1_lO1O1_1z), .D(Oi1O1_3_0), .Y(un5_Ol0O1_Z[9]) ); defparam \un5_Ol0O1[9] .INIT=16'hF0E0; // @28:454774 CFG4 \un5_Ol0O1[15] ( .A(Oi1O1_1_6), .B(Oi1O1_2_6), .C(un1_lO1O1_1z), .D(Oi1O1_3_6), .Y(un5_Ol0O1_Z[15]) ); defparam \un5_Ol0O1[15] .INIT=16'hF0E0; // @28:454774 CFG4 \un5_Ol0O1[24] ( .A(Oi1O1_1_15), .B(Oi1O1_2_15), .C(un1_lO1O1_1z), .D(Oi1O1_3_15), .Y(un5_Ol0O1_Z[24]) ); defparam \un5_Ol0O1[24] .INIT=16'hF0E0; // @28:454774 CFG4 \un5_Ol0O1[28] ( .A(Oi1O1_1_19), .B(Oi1O1_2_19), .C(un1_lO1O1_1z), .D(Oi1O1_3_19), .Y(un5_Ol0O1_Z[28]) ); defparam \un5_Ol0O1[28] .INIT=16'hF0E0; // @28:454774 CFG4 \un5_Ol0O1[29] ( .A(Oi1O1_1_20), .B(Oi1O1_2_20), .C(un1_lO1O1_1z), .D(Oi1O1_3_20), .Y(un5_Ol0O1_Z[29]) ); defparam \un5_Ol0O1[29] .INIT=16'hF0E0; // @28:454774 CFG4 \un5_Ol0O1[16] ( .A(Oi1O1_1_7), .B(Oi1O1_2_7), .C(un1_lO1O1_1z), .D(Oi1O1_3_7), .Y(un5_Ol0O1_Z[16]) ); defparam \un5_Ol0O1[16] .INIT=16'hF0E0; // @28:454774 CFG4 \un5_Ol0O1[17] ( .A(Oi1O1_1_8), .B(Oi1O1_2_8), .C(un1_lO1O1_1z), .D(Oi1O1_3_8), .Y(un5_Ol0O1_Z[17]) ); defparam \un5_Ol0O1[17] .INIT=16'hF0E0; // @28:454774 CFG4 \un5_Ol0O1[21] ( .A(Oi1O1_1_12), .B(Oi1O1_2_12), .C(un1_lO1O1_1z), .D(Oi1O1_3_12), .Y(un5_Ol0O1_Z[21]) ); defparam \un5_Ol0O1[21] .INIT=16'hF0E0; // @28:454774 CFG4 \un5_Ol0O1[23] ( .A(Oi1O1_1_14), .B(Oi1O1_2_14), .C(un1_lO1O1_1z), .D(Oi1O1_3_14), .Y(un5_Ol0O1_Z[23]) ); defparam \un5_Ol0O1[23] .INIT=16'hF0E0; // @28:454774 CFG4 \un5_Ol0O1[25] ( .A(Oi1O1_1_16), .B(Oi1O1_2_16), .C(un1_lO1O1_1z), .D(Oi1O1_3_16), .Y(un5_Ol0O1_Z[25]) ); defparam \un5_Ol0O1[25] .INIT=16'hF0E0; // @28:454774 CFG4 \un5_Ol0O1[30] ( .A(Oi1O1_1_21), .B(Oi1O1_2_21), .C(un1_lO1O1_1z), .D(Oi1O1_3_21), .Y(un5_Ol0O1_Z[30]) ); defparam \un5_Ol0O1[30] .INIT=16'hF0E0; // @28:454774 CFG4 \un5_Ol0O1[31] ( .A(Oi1O1_1_22), .B(Oi1O1_2_22), .C(un1_lO1O1_1z), .D(Oi1O1_3_22), .Y(un5_Ol0O1_Z[31]) ); defparam \un5_Ol0O1[31] .INIT=16'hF0E0; // @28:454774 CFG4 \un5_Ol0O1[22] ( .A(Oi1O1_1_13), .B(Oi1O1_2_13), .C(Oi1O1_3_13), .D(un1_lO1O1_1z), .Y(un5_Ol0O1_Z[22]) ); defparam \un5_Ol0O1[22] .INIT=16'hFE00; // @28:454774 CFG4 \un5_Ol0O1[18] ( .A(Oi1O1_1_9), .B(Oi1O1_2_9), .C(Oi1O1_3_9), .D(un1_lO1O1_1z), .Y(un5_Ol0O1_Z[18]) ); defparam \un5_Ol0O1[18] .INIT=16'hFE00; // @28:454774 CFG4 \un5_Ol0O1[20] ( .A(Oi1O1_1_11), .B(Oi1O1_2_11), .C(Oi1O1_3_11), .D(un1_lO1O1_1z), .Y(un5_Ol0O1_Z[20]) ); defparam \un5_Ol0O1[20] .INIT=16'hFE00; // @28:454774 CFG4 \un5_Ol0O1[27] ( .A(Oi1O1_1_18), .B(Oi1O1_2_18), .C(Oi1O1_3_18), .D(un1_lO1O1_1z), .Y(un5_Ol0O1_Z[27]) ); defparam \un5_Ol0O1[27] .INIT=16'hFE00; // @28:454762 CFG4 \Ol0O1_1[28] ( .A(ioOl1_1z), .B(un5_Ol0O1_Z[28]), .C(o01I1_4), .D(un105_OOOI1_4), .Y(Ol0O1_1_Z[28]) ); defparam \Ol0O1_1[28] .INIT=16'hFFEC; // @28:454762 CFG4 \Ol0O1_1[29] ( .A(o1Ol1_1z), .B(un5_Ol0O1_Z[29]), .C(il1I1_0), .D(un149_OOOI1_0), .Y(Ol0O1_1_Z[29]) ); defparam \Ol0O1_1[29] .INIT=16'hFFEC; // @28:454762 CFG4 \Ol0O1_1[24] ( .A(ioOl1_1z), .B(un5_Ol0O1_Z[24]), .C(o01I1_0), .D(un105_OOOI1_0), .Y(Ol0O1_1_Z[24]) ); defparam \Ol0O1_1[24] .INIT=16'hFFEC; // @28:454762 CFG4 \Ol0O1_4[28] ( .A(O0Ol1), .B(oli11), .C(O11I1_4), .D(oIOI1_4), .Y(Ol0O1_4_Z[28]) ); defparam \Ol0O1_4[28] .INIT=16'hECA0; // @28:454762 CFG4 \Ol0O1_3[28] ( .A(O1Ol1), .B(O0i11), .C(oIoI1_1z_4), .D(oIOI1_36), .Y(Ol0O1_3_Z[28]) ); defparam \Ol0O1_3[28] .INIT=16'hECA0; // @28:454762 CFG4 \Ol0O1_4[29] ( .A(I0o11), .B(oli11), .C(lIl11_5), .D(oIOI1_5), .Y(Ol0O1_4_Z[29]) ); defparam \Ol0O1_4[29] .INIT=16'hECA0; // @28:454762 CFG4 \Ol0O1_3[29] ( .A(O1Ol1), .B(O0i11), .C(oIoI1_1z_5), .D(oIOI1_37), .Y(Ol0O1_3_Z[29]) ); defparam \Ol0O1_3[29] .INIT=16'hECA0; // @28:454762 CFG4 \Ol0O1_5[24] ( .A(ilOl1), .B(oli11), .C(Io1I1_0), .D(oIOI1_0), .Y(Ol0O1_5_Z[24]) ); defparam \Ol0O1_5[24] .INIT=16'hECA0; // @28:454762 CFG4 \Ol0O1_4[24] ( .A(O11I1_0), .B(i11I1_0), .C(O0Ol1), .D(I0Ol1), .Y(Ol0O1_4_Z[24]) ); defparam \Ol0O1_4[24] .INIT=16'hECA0; // @28:454762 CFG4 \Ol0O1_3[24] ( .A(O1Ol1), .B(O0i11), .C(oIoI1_1z_0), .D(oIOI1_32), .Y(Ol0O1_3_Z[24]) ); defparam \Ol0O1_3[24] .INIT=16'hECA0; // @28:454762 CFG4 \Ol0O1_5[28] ( .A(lIl11_4), .B(Ol0O1_1_Z[28]), .C(I0o11), .D(un128_OOOI1_4), .Y(Ol0O1_5_Z[28]) ); defparam \Ol0O1_5[28] .INIT=16'hFFEC; // @28:454762 CFG3 \Ol0O1_6[29] ( .A(un80_OilI1_0_a2), .B(Oolo1[23]), .C(Ol0O1_4_Z[29]), .Y(Ol0O1_6_Z[29]) ); defparam \Ol0O1_6[29] .INIT=8'hF8; // @28:454762 CFG4 \Ol0O1_5[29] ( .A(IoOl1), .B(Ol0O1_3_Z[29]), .C(oloI1_0), .D(Ol0O1_1_Z[29]), .Y(Ol0O1_5_Z[29]) ); defparam \Ol0O1_5[29] .INIT=16'hFFEC; // @28:454762 CFG4 \Ol0O1_6[24] ( .A(lIl11_0), .B(Ol0O1_1_Z[24]), .C(I0o11), .D(un128_OOOI1_0), .Y(Ol0O1_6_Z[24]) ); defparam \Ol0O1_6[24] .INIT=16'hFFEC; // @28:454762 CFG4 \Ol0O1_8[28] ( .A(Ol0O1_4_Z[28]), .B(un18_OilI1_0_a2), .C(o0Io1[3]), .D(Ol0O1_3_Z[28]), .Y(Ol0O1_8_Z[28]) ); defparam \Ol0O1_8[28] .INIT=16'hFFEA; // @28:454762 CFG4 \Ol0O1[24] ( .A(Ol0O1_3_Z[24]), .B(Ol0O1_4_Z[24]), .C(Ol0O1_5_Z[24]), .D(Ol0O1_6_Z[24]), .Y(io0O1[24]) ); defparam \Ol0O1[24] .INIT=16'hFFFE; // @28:454762 CFG4 \Ol0O1[28] ( .A(Oolo1[22]), .B(Ol0O1_5_Z[28]), .C(un80_OilI1_0_a2), .D(Ol0O1_8_Z[28]), .Y(io0O1[28]) ); defparam \Ol0O1[28] .INIT=16'hFFEC; // @28:454762 CFG4 \Ol0O1[29] ( .A(un18_OilI1_0_a2), .B(Ol0O1_6_Z[29]), .C(o0Io1[2]), .D(Ol0O1_5_Z[29]), .Y(io0O1[29]) ); defparam \Ol0O1[29] .INIT=16'hFFEC; // @28:454786 CFG4 \un9_Ol0O1[26] ( .A(OOOI1_9_1), .B(OOOI1_8_0), .C(un1_ooiO1), .D(OOOI1_7_0), .Y(un9_Ol0O1_Z[26]) ); defparam \un9_Ol0O1[26] .INIT=16'hF0E0; // @28:454762 CFG4 \Ol0O1[25] ( .A(un5_Ol0O1_Z[25]), .B(un1_ooiO1), .C(OOOI1_9_0), .D(OOOI1_10_0), .Y(io0O1[25]) ); defparam \Ol0O1[25] .INIT=16'hEEEA; // @28:454762 CFG4 \Ol0O1[26] ( .A(Oi1O1_3_17), .B(Oi1O1_4_0), .C(un9_Ol0O1_Z[26]), .D(un1_lO1O1_1z), .Y(io0O1[26]) ); defparam \Ol0O1[26] .INIT=16'hFEF0; // @28:454762 CFG4 \Ol0O1[27] ( .A(un5_Ol0O1_Z[27]), .B(un1_ooiO1), .C(OOOI1_9_2), .D(OOOI1_10_2), .Y(io0O1[27]) ); defparam \Ol0O1[27] .INIT=16'hEEEA; // @28:454762 CFG4 \Ol0O1[21] ( .A(un1_ooiO1), .B(un5_Ol0O1_Z[21]), .C(OOOI1_15_7), .D(OOOI1_16_8), .Y(io0O1[21]) ); defparam \Ol0O1[21] .INIT=16'hEEEC; // @28:454762 CFG4 \Ol0O1[23] ( .A(un5_Ol0O1_Z[23]), .B(un1_ooiO1), .C(OOOI1_12_0), .D(N_829), .Y(io0O1[23]) ); defparam \Ol0O1[23] .INIT=16'hEEEA; // @28:454762 CFG4 \Ol0O1[30] ( .A(un5_Ol0O1_Z[30]), .B(un1_ooiO1), .C(OOOI1_9_5), .D(OOOI1_10_5), .Y(io0O1[30]) ); defparam \Ol0O1[30] .INIT=16'hEEEA; // @28:454762 CFG4 \Ol0O1[31] ( .A(un1_ooiO1), .B(un5_Ol0O1_Z[31]), .C(OOOI1_10_6), .D(OOOI1_11_0), .Y(io0O1[31]) ); defparam \Ol0O1[31] .INIT=16'hEEEC; // @28:454762 CFG4 \Ol0O1[22] ( .A(un1_ooiO1), .B(un5_Ol0O1_Z[22]), .C(OOOI1_13_0), .D(OOOI1_14_0), .Y(io0O1[22]) ); defparam \Ol0O1[22] .INIT=16'hEEEC; // @28:454786 CFG4 \un9_Ol0O1[3] ( .A(OOOI1_27_0), .B(un1_ooiO1), .C(OOOI1_28[3]), .D(OOOI1_26[3]), .Y(un9_Ol0O1_Z[3]) ); defparam \un9_Ol0O1[3] .INIT=16'hCCC8; // @28:454786 CFG4 \un9_Ol0O1[6] ( .A(OOOI1_21_0), .B(OOOI1_25_6), .C(un1_ooiO1), .D(OOOI1_20_0), .Y(un9_Ol0O1_Z[6]) ); defparam \un9_Ol0O1[6] .INIT=16'hF0E0; // @28:454786 CFG4 \un9_Ol0O1[7] ( .A(OOOI1_22_2), .B(OOOI1_21_1), .C(un1_ooiO1), .D(OOOI1_20_1), .Y(un9_Ol0O1_Z[7]) ); defparam \un9_Ol0O1[7] .INIT=16'hF0E0; // @28:454786 CFG4 \un9_Ol0O1[8] ( .A(OOOI1_23_3), .B(un1_ooiO1), .C(OOOI1_27_5), .D(OOOI1_22_3), .Y(un9_Ol0O1_Z[8]) ); defparam \un9_Ol0O1[8] .INIT=16'hCCC8; // @28:454786 CFG4 \un9_Ol0O1_cZ[12] ( .A(OOOI1_22_7), .B(OOOI1_23_7), .C(un1_ooiO1), .D(OOOI1_21_6), .Y(un9_Ol0O1[12]) ); defparam \un9_Ol0O1_cZ[12] .INIT=16'hF0E0; // @28:454786 CFG4 \un9_Ol0O1_cZ[14] ( .A(OOOI1_16_1), .B(un1_ooiO1), .C(OOOI1_17_1), .D(OOOI1_15_0), .Y(un9_Ol0O1[14]) ); defparam \un9_Ol0O1_cZ[14] .INIT=16'hCCC8; // @28:454762 CFG4 \Ol0O1[16] ( .A(un5_Ol0O1_Z[16]), .B(un1_ooiO1), .C(OOOI1_19_6), .D(OOOI1_20_10), .Y(io0O1[16]) ); defparam \Ol0O1[16] .INIT=16'hEEEA; // @28:454762 CFG4 \Ol0O1[17] ( .A(un1_ooiO1), .B(un5_Ol0O1_Z[17]), .C(OOOI1_18_6), .D(OOOI1_19_7), .Y(io0O1[17]) ); defparam \Ol0O1[17] .INIT=16'hEEEC; // @28:454786 CFG4 \un9_Ol0O1[2] ( .A(OOOI1_30_0), .B(un1_ooiO1), .C(OOOI1_29_0), .D(OOOI1_28[2]), .Y(un9_Ol0O1_Z[2]) ); defparam \un9_Ol0O1[2] .INIT=16'hCCC8; // @28:454786 CFG4 \un9_Ol0O1[5] ( .A(OOOI1_23_0), .B(un1_ooiO1), .C(OOOI1_27_2), .D(OOOI1_22_0), .Y(un9_Ol0O1_Z[5]) ); defparam \un9_Ol0O1[5] .INIT=16'hCCC8; // @28:454786 CFG4 \un9_Ol0O1_cZ[13] ( .A(OOOI1_17_0), .B(un1_ooiO1), .C(OOOI1_18_2), .D(OOOI1_16_0), .Y(un9_Ol0O1[13]) ); defparam \un9_Ol0O1_cZ[13] .INIT=16'hCCC8; // @28:454762 CFG4 \Ol0O1[18] ( .A(un1_ooiO1), .B(un5_Ol0O1_Z[18]), .C(OOOI1_18_7), .D(OOOI1_19_8), .Y(io0O1[18]) ); defparam \Ol0O1[18] .INIT=16'hEEEC; // @28:454762 CFG4 \Ol0O1[19] ( .A(un1_lO1O1_1z), .B(OOOI1_10_d0), .C(OO1O1_19), .D(un1_ooiO1), .Y(io0O1[19]) ); defparam \Ol0O1[19] .INIT=16'hECA0; // @28:454762 CFG4 \Ol0O1[20] ( .A(un1_ooiO1), .B(un5_Ol0O1_Z[20]), .C(OOOI1_16_7), .D(OOOI1_17_7), .Y(io0O1[20]) ); defparam \Ol0O1[20] .INIT=16'hEEEC; // @28:454786 CFG4 \un9_Ol0O1[4] ( .A(OOOI1_28[4]), .B(OOOI1_27_1), .C(un1_ooiO1), .D(OOOI1_26[4]), .Y(un9_Ol0O1_Z[4]) ); defparam \un9_Ol0O1[4] .INIT=16'hF0E0; // @31:89 CFG4 \un9_Ol0O1_RNIB5FGI[3] ( .A(un1_lO1O1_1z), .B(un9_Ol0O1_Z[3]), .C(OO1O1_3), .D(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .Y(io0O1_m_3) ); defparam \un9_Ol0O1_RNIB5FGI[3] .INIT=16'hEC00; // @31:89 CFG4 \un9_Ol0O1_RNIHBFGI[6] ( .A(un1_lO1O1_1z), .B(un9_Ol0O1_Z[6]), .C(OO1O1_6), .D(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .Y(io0O1_m_6) ); defparam \un9_Ol0O1_RNIHBFGI[6] .INIT=16'hEC00; // @31:89 CFG4 \un9_Ol0O1_RNIJDFGI[7] ( .A(un1_lO1O1_1z), .B(un9_Ol0O1_Z[7]), .C(OO1O1_7), .D(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .Y(io0O1_m_7) ); defparam \un9_Ol0O1_RNIJDFGI[7] .INIT=16'hEC00; // @31:89 CFG4 \un9_Ol0O1_RNILFFGI[8] ( .A(un1_lO1O1_1z), .B(un9_Ol0O1_Z[8]), .C(OO1O1_8), .D(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .Y(io0O1_m_8) ); defparam \un9_Ol0O1_RNILFFGI[8] .INIT=16'hEC00; // @31:89 CFG4 \un5_Ol0O1_RNI1G1DG[15] ( .A(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .B(un1_ooiO1), .C(OOOI1_6), .D(un5_Ol0O1_Z[15]), .Y(io0O1_m_15) ); defparam \un5_Ol0O1_RNI1G1DG[15] .INIT=16'hAA80; // @31:89 CFG4 \un9_Ol0O1_RNI93FGI[2] ( .A(un1_lO1O1_1z), .B(un9_Ol0O1_Z[2]), .C(OO1O1_2), .D(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .Y(io0O1_m_2) ); defparam \un9_Ol0O1_RNI93FGI[2] .INIT=16'hEC00; // @31:89 CFG4 \un9_Ol0O1_RNIF9FGI[5] ( .A(un1_lO1O1_1z), .B(un9_Ol0O1_Z[5]), .C(OO1O1_5), .D(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .Y(io0O1_m_5) ); defparam \un9_Ol0O1_RNIF9FGI[5] .INIT=16'hEC00; // @28:454786 CFG4 \un9_Ol0O1_cZ[10] ( .A(OOOI1_20_4), .B(N_159), .C(un1_ooiO1), .D(OOOI1_19_0), .Y(un9_Ol0O1[10]) ); defparam \un9_Ol0O1_cZ[10] .INIT=16'hF0B0; // @28:454786 CFG4 \un9_Ol0O1_cZ[11] ( .A(OOOI1_19_1), .B(N_404), .C(un1_ooiO1), .D(OOOI1_18_0), .Y(un9_Ol0O1[11]) ); defparam \un9_Ol0O1_cZ[11] .INIT=16'hF0B0; // @31:89 CFG4 \un9_Ol0O1_RNID7FGI[4] ( .A(un1_lO1O1_1z), .B(un9_Ol0O1_Z[4]), .C(OO1O1_4), .D(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .Y(io0O1_m_4) ); defparam \un9_Ol0O1_RNID7FGI[4] .INIT=16'hEC00; // @28:454786 CFG4 \un9_Ol0O1[1] ( .A(OOOI1_26[1]), .B(un1_ooiO1), .C(N_402), .D(OOOI1_25_1), .Y(un9_Ol0O1_Z[1]) ); defparam \un9_Ol0O1[1] .INIT=16'hCC8C; // @28:454786 CFG4 \un9_Ol0O1[0] ( .A(OOOI1_26[0]), .B(un1_ooiO1), .C(N_280), .D(OOOI1_25_0), .Y(un9_Ol0O1_Z[0]) ); defparam \un9_Ol0O1[0] .INIT=16'hCC8C; // @31:89 CFG4 \un5_Ol0O1_RNI78M4E[9] ( .A(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .B(un1_ooiO1), .C(OOOI1_0), .D(un5_Ol0O1_Z[9]), .Y(io0O1_m_9) ); defparam \un5_Ol0O1_RNI78M4E[9] .INIT=16'hAA80; // @31:89 CFG4 \un9_Ol0O1_RNI71FGI[1] ( .A(un1_lO1O1_1z), .B(un9_Ol0O1_Z[1]), .C(OO1O1_1), .D(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .Y(io0O1_m_1) ); defparam \un9_Ol0O1_RNI71FGI[1] .INIT=16'hEC00; // @31:89 CFG4 \un9_Ol0O1_RNI5VEGI[0] ( .A(un1_lO1O1_1z), .B(un9_Ol0O1_Z[0]), .C(OO1O1_0), .D(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .Y(io0O1_m_0) ); defparam \un9_Ol0O1_RNI5VEGI[0] .INIT=16'hEC00; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_DECODER */ module CTSE_TSM_SYSREG_26s_1s_0s ( io0O1_m, un9_Ol0O1, OO1O1_3, OO1O1_6, OO1O1_8, OO1O1_7, OO1O1_4, OO1O1_2, OO1O1_5, OO1O1_1, OO1O1_19, OO1O1_0, Oi1O1_3_18, Oi1O1_3_19, Oi1O1_3_20, Oi1O1_3_15, Oi1O1_3_17, Oi1O1_3_9, Oi1O1_3_16, Oi1O1_3_11, Oi1O1_3_14, Oi1O1_3_6, Oi1O1_3_12, Oi1O1_3_0, Oi1O1_3_8, Oi1O1_3_22, Oi1O1_3_21, Oi1O1_3_13, Oi1O1_3_7, Oi1O1_4_0, Oi1O1_1_18, Oi1O1_1_19, Oi1O1_1_20, Oi1O1_1_15, Oi1O1_1_9, Oi1O1_1_16, Oi1O1_1_11, Oi1O1_1_14, Oi1O1_1_6, Oi1O1_1_12, Oi1O1_1_0, Oi1O1_1_8, Oi1O1_1_22, Oi1O1_1_21, Oi1O1_1_13, Oi1O1_1_7, Oi1O1_2_18, Oi1O1_2_19, Oi1O1_2_20, Oi1O1_2_15, Oi1O1_2_9, Oi1O1_2_16, Oi1O1_2_11, Oi1O1_2_14, Oi1O1_2_6, Oi1O1_2_12, Oi1O1_2_0, Oi1O1_2_8, Oi1O1_2_22, Oi1O1_2_21, Oi1O1_2_13, Oi1O1_2_7, CoreAPB3_0_0_APBmslave0_PADDR_0, CoreAPB3_0_0_APBmslave0_PADDR_1, CoreAPB3_0_0_APBmslave0_PADDR_3, PADDR_0, paddr_1z_0, I1OI1, l0OI1, O1OI1, i0OI1, CoreAPB3_0_0_APBmslave0_PWDATA, o0OI1, wrdata_0, CoreAPB3_0_0_APBmslave0_PWRITE_s0, CoreAPB3_0_0_APBmslave0_PWRITE, un1_lO1O1, un5_O1iIo_3, o1Ol1_2, un1_IIOO1_1_2, liO0110_i_1, tx_fifo_write_sig14_i_2, un1_IIOO1_3_1, un1_IIOO1_2_1, N_1214, un5_l1iIo_2, N_82_2, un5_l0iIo_2_1z, un5_l0iIo_1_1z, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; output [14:10] io0O1_m ; input [14:10] un9_Ol0O1 ; output OO1O1_3 ; output OO1O1_6 ; output OO1O1_8 ; output OO1O1_7 ; output OO1O1_4 ; output OO1O1_2 ; output OO1O1_5 ; output OO1O1_1 ; output OO1O1_19 ; output OO1O1_0 ; output Oi1O1_3_18 ; output Oi1O1_3_19 ; output Oi1O1_3_20 ; output Oi1O1_3_15 ; output Oi1O1_3_17 ; output Oi1O1_3_9 ; output Oi1O1_3_16 ; output Oi1O1_3_11 ; output Oi1O1_3_14 ; output Oi1O1_3_6 ; output Oi1O1_3_12 ; output Oi1O1_3_0 ; output Oi1O1_3_8 ; output Oi1O1_3_22 ; output Oi1O1_3_21 ; output Oi1O1_3_13 ; output Oi1O1_3_7 ; output Oi1O1_4_0 ; output Oi1O1_1_18 ; output Oi1O1_1_19 ; output Oi1O1_1_20 ; output Oi1O1_1_15 ; output Oi1O1_1_9 ; output Oi1O1_1_16 ; output Oi1O1_1_11 ; output Oi1O1_1_14 ; output Oi1O1_1_6 ; output Oi1O1_1_12 ; output Oi1O1_1_0 ; output Oi1O1_1_8 ; output Oi1O1_1_22 ; output Oi1O1_1_21 ; output Oi1O1_1_13 ; output Oi1O1_1_7 ; output Oi1O1_2_18 ; output Oi1O1_2_19 ; output Oi1O1_2_20 ; output Oi1O1_2_15 ; output Oi1O1_2_9 ; output Oi1O1_2_16 ; output Oi1O1_2_11 ; output Oi1O1_2_14 ; output Oi1O1_2_6 ; output Oi1O1_2_12 ; output Oi1O1_2_0 ; output Oi1O1_2_8 ; output Oi1O1_2_22 ; output Oi1O1_2_21 ; output Oi1O1_2_13 ; output Oi1O1_2_7 ; input CoreAPB3_0_0_APBmslave0_PADDR_0 ; input CoreAPB3_0_0_APBmslave0_PADDR_1 ; input CoreAPB3_0_0_APBmslave0_PADDR_3 ; input PADDR_0 ; input paddr_1z_0 ; output [31:0] I1OI1 ; output [5:0] l0OI1 ; output [31:0] O1OI1 ; output [31:0] i0OI1 ; input [31:1] CoreAPB3_0_0_APBmslave0_PWDATA ; output [31:0] o0OI1 ; input wrdata_0 ; input CoreAPB3_0_0_APBmslave0_PWRITE_s0 ; input CoreAPB3_0_0_APBmslave0_PWRITE ; input un1_lO1O1 ; input un5_O1iIo_3 ; input o1Ol1_2 ; input un1_IIOO1_1_2 ; input liO0110_i_1 ; input tx_fifo_write_sig14_i_2 ; input un1_IIOO1_3_1 ; input un1_IIOO1_2_1 ; output N_1214 ; output un5_l1iIo_2 ; output N_82_2 ; output un5_l0iIo_2_1z ; output un5_l0iIo_1_1z ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire OO1O1_3 ; wire OO1O1_6 ; wire OO1O1_8 ; wire OO1O1_7 ; wire OO1O1_4 ; wire OO1O1_2 ; wire OO1O1_5 ; wire OO1O1_1 ; wire OO1O1_19 ; wire OO1O1_0 ; wire Oi1O1_3_18 ; wire Oi1O1_3_19 ; wire Oi1O1_3_20 ; wire Oi1O1_3_15 ; wire Oi1O1_3_17 ; wire Oi1O1_3_9 ; wire Oi1O1_3_16 ; wire Oi1O1_3_11 ; wire Oi1O1_3_14 ; wire Oi1O1_3_6 ; wire Oi1O1_3_12 ; wire Oi1O1_3_0 ; wire Oi1O1_3_8 ; wire Oi1O1_3_22 ; wire Oi1O1_3_21 ; wire Oi1O1_3_13 ; wire Oi1O1_3_7 ; wire Oi1O1_4_0 ; wire Oi1O1_1_18 ; wire Oi1O1_1_19 ; wire Oi1O1_1_20 ; wire Oi1O1_1_15 ; wire Oi1O1_1_9 ; wire Oi1O1_1_16 ; wire Oi1O1_1_11 ; wire Oi1O1_1_14 ; wire Oi1O1_1_6 ; wire Oi1O1_1_12 ; wire Oi1O1_1_0 ; wire Oi1O1_1_8 ; wire Oi1O1_1_22 ; wire Oi1O1_1_21 ; wire Oi1O1_1_13 ; wire Oi1O1_1_7 ; wire Oi1O1_2_18 ; wire Oi1O1_2_19 ; wire Oi1O1_2_20 ; wire Oi1O1_2_15 ; wire Oi1O1_2_9 ; wire Oi1O1_2_16 ; wire Oi1O1_2_11 ; wire Oi1O1_2_14 ; wire Oi1O1_2_6 ; wire Oi1O1_2_12 ; wire Oi1O1_2_0 ; wire Oi1O1_2_8 ; wire Oi1O1_2_22 ; wire Oi1O1_2_21 ; wire Oi1O1_2_13 ; wire Oi1O1_2_7 ; wire CoreAPB3_0_0_APBmslave0_PADDR_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_1 ; wire CoreAPB3_0_0_APBmslave0_PADDR_3 ; wire PADDR_0 ; wire paddr_1z_0 ; wire wrdata_0 ; wire CoreAPB3_0_0_APBmslave0_PWRITE_s0 ; wire CoreAPB3_0_0_APBmslave0_PWRITE ; wire un1_lO1O1 ; wire un5_O1iIo_3 ; wire o1Ol1_2 ; wire un1_IIOO1_1_2 ; wire liO0110_i_1 ; wire tx_fifo_write_sig14_i_2 ; wire un1_IIOO1_3_1 ; wire un1_IIOO1_2_1 ; wire N_1214 ; wire un5_l1iIo_2 ; wire N_82_2 ; wire un5_l0iIo_2_1z ; wire un5_l0iIo_1_1z ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [31:0] i1OI1_Z; wire [31:0] iO1O1; wire [31:0] OI1O1; wire [19:6] un24_Oi1O1; wire [26:26] un31_Oi1O1; wire [26:0] Oi1O1_2_Z; wire [19:0] Oi1O1_1_Z; wire [31:0] Oi1O1_0_Z; wire [5:0] Oi1O1_3_Z; wire [14:10] OO1O1; wire VCC ; wire o0iIo_Z ; wire GND ; wire l1iIo_Z ; wire i0iIo_Z ; wire O1iIo_Z ; wire I1iIo_Z ; wire iOiIo_Z ; wire l0iIo_Z ; wire OIiIo_Z ; wire un5_o0iIo_Z ; wire un5_i0iIo_Z ; wire un5_l1iIo_Z ; wire un5_OIiIo ; wire un5_I1iIo_Z ; wire un5_iOiIo ; wire un5_O1iIo_Z ; wire un5_l0iIo_Z ; // @28:548774 SLE \o0OI1_Z[4] ( .Q(o0OI1[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(o0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \o0OI1_Z[3] ( .Q(o0OI1[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(o0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \o0OI1_Z[2] ( .Q(o0OI1[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(o0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \o0OI1_Z[1] ( .Q(o0OI1[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(o0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \o0OI1_Z[0] ( .Q(o0OI1[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(o0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \o0OI1_Z[19] ( .Q(o0OI1[19]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[19]), .EN(o0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \o0OI1_Z[18] ( .Q(o0OI1[18]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[18]), .EN(o0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \o0OI1_Z[17] ( .Q(o0OI1[17]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[17]), .EN(o0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \o0OI1_Z[16] ( .Q(o0OI1[16]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[16]), .EN(o0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \o0OI1_Z[15] ( .Q(o0OI1[15]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[15]), .EN(o0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \o0OI1_Z[14] ( .Q(o0OI1[14]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[14]), .EN(o0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \o0OI1_Z[13] ( .Q(o0OI1[13]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[13]), .EN(o0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \o0OI1_Z[12] ( .Q(o0OI1[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .EN(o0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \o0OI1_Z[11] ( .Q(o0OI1[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .EN(o0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \o0OI1_Z[10] ( .Q(o0OI1[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .EN(o0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \o0OI1_Z[9] ( .Q(o0OI1[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .EN(o0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \o0OI1_Z[8] ( .Q(o0OI1[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .EN(o0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \o0OI1_Z[7] ( .Q(o0OI1[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .EN(o0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \o0OI1_Z[6] ( .Q(o0OI1[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(o0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \o0OI1_Z[5] ( .Q(o0OI1[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(o0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i1OI1[2] ( .Q(i1OI1_Z[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(l1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i1OI1[1] ( .Q(i1OI1_Z[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(l1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i1OI1[0] ( .Q(i1OI1_Z[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(l1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \o0OI1_Z[31] ( .Q(o0OI1[31]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[31]), .EN(o0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \o0OI1_Z[30] ( .Q(o0OI1[30]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[30]), .EN(o0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \o0OI1_Z[29] ( .Q(o0OI1[29]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[29]), .EN(o0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \o0OI1_Z[28] ( .Q(o0OI1[28]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[28]), .EN(o0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \o0OI1_Z[27] ( .Q(o0OI1[27]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[27]), .EN(o0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \o0OI1_Z[26] ( .Q(o0OI1[26]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[26]), .EN(o0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \o0OI1_Z[25] ( .Q(o0OI1[25]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[25]), .EN(o0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \o0OI1_Z[24] ( .Q(o0OI1[24]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[24]), .EN(o0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \o0OI1_Z[23] ( .Q(o0OI1[23]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[23]), .EN(o0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \o0OI1_Z[22] ( .Q(o0OI1[22]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[22]), .EN(o0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \o0OI1_Z[21] ( .Q(o0OI1[21]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[21]), .EN(o0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \o0OI1_Z[20] ( .Q(o0OI1[20]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[20]), .EN(o0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i1OI1[17] ( .Q(i1OI1_Z[17]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[17]), .EN(l1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i1OI1[16] ( .Q(i1OI1_Z[16]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[16]), .EN(l1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i1OI1[15] ( .Q(i1OI1_Z[15]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[15]), .EN(l1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i1OI1[14] ( .Q(i1OI1_Z[14]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[14]), .EN(l1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i1OI1[13] ( .Q(i1OI1_Z[13]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[13]), .EN(l1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i1OI1[12] ( .Q(i1OI1_Z[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .EN(l1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i1OI1[11] ( .Q(i1OI1_Z[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .EN(l1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i1OI1[10] ( .Q(i1OI1_Z[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .EN(l1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i1OI1[9] ( .Q(i1OI1_Z[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .EN(l1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i1OI1[8] ( .Q(i1OI1_Z[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .EN(l1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i1OI1[7] ( .Q(i1OI1_Z[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .EN(l1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i1OI1[6] ( .Q(i1OI1_Z[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(l1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i1OI1[5] ( .Q(i1OI1_Z[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(l1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i1OI1[4] ( .Q(i1OI1_Z[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(l1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i1OI1[3] ( .Q(i1OI1_Z[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(l1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i0OI1_Z[0] ( .Q(i0OI1[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(i0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i1OI1[31] ( .Q(i1OI1_Z[31]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[31]), .EN(l1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i1OI1[30] ( .Q(i1OI1_Z[30]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[30]), .EN(l1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i1OI1[29] ( .Q(i1OI1_Z[29]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[29]), .EN(l1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i1OI1[28] ( .Q(i1OI1_Z[28]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[28]), .EN(l1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i1OI1[27] ( .Q(i1OI1_Z[27]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[27]), .EN(l1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i1OI1[26] ( .Q(i1OI1_Z[26]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[26]), .EN(l1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i1OI1[25] ( .Q(i1OI1_Z[25]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[25]), .EN(l1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i1OI1[24] ( .Q(i1OI1_Z[24]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[24]), .EN(l1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i1OI1[23] ( .Q(i1OI1_Z[23]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[23]), .EN(l1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i1OI1[22] ( .Q(i1OI1_Z[22]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[22]), .EN(l1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i1OI1[21] ( .Q(i1OI1_Z[21]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[21]), .EN(l1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i1OI1[20] ( .Q(i1OI1_Z[20]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[20]), .EN(l1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i1OI1[19] ( .Q(i1OI1_Z[19]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[19]), .EN(l1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i1OI1[18] ( .Q(i1OI1_Z[18]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[18]), .EN(l1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i0OI1_Z[15] ( .Q(i0OI1[15]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[15]), .EN(i0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i0OI1_Z[14] ( .Q(i0OI1[14]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[14]), .EN(i0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i0OI1_Z[13] ( .Q(i0OI1[13]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[13]), .EN(i0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i0OI1_Z[12] ( .Q(i0OI1[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .EN(i0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i0OI1_Z[11] ( .Q(i0OI1[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .EN(i0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i0OI1_Z[10] ( .Q(i0OI1[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .EN(i0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i0OI1_Z[9] ( .Q(i0OI1[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .EN(i0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i0OI1_Z[8] ( .Q(i0OI1[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .EN(i0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i0OI1_Z[7] ( .Q(i0OI1[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .EN(i0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i0OI1_Z[6] ( .Q(i0OI1[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(i0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i0OI1_Z[5] ( .Q(i0OI1[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(i0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i0OI1_Z[4] ( .Q(i0OI1[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(i0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i0OI1_Z[3] ( .Q(i0OI1[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(i0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i0OI1_Z[2] ( .Q(i0OI1[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(i0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i0OI1_Z[1] ( .Q(i0OI1[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(i0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i0OI1_Z[30] ( .Q(i0OI1[30]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[30]), .EN(i0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i0OI1_Z[29] ( .Q(i0OI1[29]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[29]), .EN(i0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i0OI1_Z[28] ( .Q(i0OI1[28]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[28]), .EN(i0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i0OI1_Z[27] ( .Q(i0OI1[27]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[27]), .EN(i0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i0OI1_Z[26] ( .Q(i0OI1[26]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[26]), .EN(i0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i0OI1_Z[25] ( .Q(i0OI1[25]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[25]), .EN(i0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i0OI1_Z[24] ( .Q(i0OI1[24]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[24]), .EN(i0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i0OI1_Z[23] ( .Q(i0OI1[23]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[23]), .EN(i0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i0OI1_Z[22] ( .Q(i0OI1[22]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[22]), .EN(i0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i0OI1_Z[21] ( .Q(i0OI1[21]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[21]), .EN(i0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i0OI1_Z[20] ( .Q(i0OI1[20]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[20]), .EN(i0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i0OI1_Z[19] ( .Q(i0OI1[19]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[19]), .EN(i0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i0OI1_Z[18] ( .Q(i0OI1[18]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[18]), .EN(i0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i0OI1_Z[17] ( .Q(i0OI1[17]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[17]), .EN(i0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i0OI1_Z[16] ( .Q(i0OI1[16]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[16]), .EN(i0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \O1OI1_Z[13] ( .Q(O1OI1[13]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[13]), .EN(O1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \O1OI1_Z[12] ( .Q(O1OI1[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .EN(O1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \O1OI1_Z[11] ( .Q(O1OI1[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .EN(O1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \O1OI1_Z[10] ( .Q(O1OI1[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .EN(O1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \O1OI1_Z[9] ( .Q(O1OI1[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .EN(O1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \O1OI1_Z[8] ( .Q(O1OI1[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .EN(O1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \O1OI1_Z[7] ( .Q(O1OI1[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .EN(O1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \O1OI1_Z[6] ( .Q(O1OI1[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(O1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \O1OI1_Z[5] ( .Q(O1OI1[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(O1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \O1OI1_Z[4] ( .Q(O1OI1[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(O1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \O1OI1_Z[3] ( .Q(O1OI1[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(O1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \O1OI1_Z[2] ( .Q(O1OI1[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(O1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \O1OI1_Z[1] ( .Q(O1OI1[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(O1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \O1OI1_Z[0] ( .Q(O1OI1[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(O1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \i0OI1_Z[31] ( .Q(i0OI1[31]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[31]), .EN(i0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \O1OI1_Z[28] ( .Q(O1OI1[28]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[28]), .EN(O1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \O1OI1_Z[27] ( .Q(O1OI1[27]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[27]), .EN(O1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \O1OI1_Z[26] ( .Q(O1OI1[26]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[26]), .EN(O1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \O1OI1_Z[25] ( .Q(O1OI1[25]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[25]), .EN(O1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \O1OI1_Z[24] ( .Q(O1OI1[24]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[24]), .EN(O1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \O1OI1_Z[23] ( .Q(O1OI1[23]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[23]), .EN(O1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \O1OI1_Z[22] ( .Q(O1OI1[22]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[22]), .EN(O1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \O1OI1_Z[21] ( .Q(O1OI1[21]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[21]), .EN(O1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \O1OI1_Z[20] ( .Q(O1OI1[20]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[20]), .EN(O1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \O1OI1_Z[19] ( .Q(O1OI1[19]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[19]), .EN(O1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \O1OI1_Z[18] ( .Q(O1OI1[18]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[18]), .EN(O1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \O1OI1_Z[17] ( .Q(O1OI1[17]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[17]), .EN(O1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \O1OI1_Z[16] ( .Q(O1OI1[16]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[16]), .EN(O1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \O1OI1_Z[15] ( .Q(O1OI1[15]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[15]), .EN(O1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \O1OI1_Z[14] ( .Q(O1OI1[14]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[14]), .EN(O1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \I1OI1_Z[11] ( .Q(I1OI1[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .EN(I1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \I1OI1_Z[10] ( .Q(I1OI1[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .EN(I1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \I1OI1_Z[9] ( .Q(I1OI1[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .EN(I1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \I1OI1_Z[8] ( .Q(I1OI1[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .EN(I1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \I1OI1_Z[7] ( .Q(I1OI1[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .EN(I1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \I1OI1_Z[6] ( .Q(I1OI1[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(I1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \I1OI1_Z[5] ( .Q(I1OI1[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(I1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \I1OI1_Z[4] ( .Q(I1OI1[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(I1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \I1OI1_Z[3] ( .Q(I1OI1[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(I1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \I1OI1_Z[2] ( .Q(I1OI1[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(I1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \I1OI1_Z[1] ( .Q(I1OI1[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(I1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \I1OI1_Z[0] ( .Q(I1OI1[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(I1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \O1OI1_Z[31] ( .Q(O1OI1[31]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[31]), .EN(O1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \O1OI1_Z[30] ( .Q(O1OI1[30]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[30]), .EN(O1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \O1OI1_Z[29] ( .Q(O1OI1[29]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[29]), .EN(O1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \I1OI1_Z[26] ( .Q(I1OI1[26]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[26]), .EN(I1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \I1OI1_Z[25] ( .Q(I1OI1[25]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[25]), .EN(I1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \I1OI1_Z[24] ( .Q(I1OI1[24]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[24]), .EN(I1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \I1OI1_Z[23] ( .Q(I1OI1[23]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[23]), .EN(I1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \I1OI1_Z[22] ( .Q(I1OI1[22]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[22]), .EN(I1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \I1OI1_Z[21] ( .Q(I1OI1[21]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[21]), .EN(I1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \I1OI1_Z[20] ( .Q(I1OI1[20]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[20]), .EN(I1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \I1OI1_Z[19] ( .Q(I1OI1[19]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[19]), .EN(I1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \I1OI1_Z[18] ( .Q(I1OI1[18]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[18]), .EN(I1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \I1OI1_Z[17] ( .Q(I1OI1[17]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[17]), .EN(I1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \I1OI1_Z[16] ( .Q(I1OI1[16]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[16]), .EN(I1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \I1OI1_Z[15] ( .Q(I1OI1[15]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[15]), .EN(I1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \I1OI1_Z[14] ( .Q(I1OI1[14]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[14]), .EN(I1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \I1OI1_Z[13] ( .Q(I1OI1[13]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[13]), .EN(I1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \I1OI1_Z[12] ( .Q(I1OI1[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .EN(I1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.iO1O1[3] ( .Q(iO1O1[3]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(iOiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.iO1O1[2] ( .Q(iO1O1[2]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(iOiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.iO1O1[1] ( .Q(iO1O1[1]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(iOiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.iO1O1[0] ( .Q(iO1O1[0]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(iOiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \l0OI1_Z[5] ( .Q(l0OI1[5]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(l0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \l0OI1_Z[4] ( .Q(l0OI1[4]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(l0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \l0OI1_Z[3] ( .Q(l0OI1[3]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(l0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \l0OI1_Z[2] ( .Q(l0OI1[2]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(l0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \l0OI1_Z[1] ( .Q(l0OI1[1]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(l0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \l0OI1_Z[0] ( .Q(l0OI1[0]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(l0iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \I1OI1_Z[31] ( .Q(I1OI1[31]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[31]), .EN(I1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \I1OI1_Z[30] ( .Q(I1OI1[30]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[30]), .EN(I1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \I1OI1_Z[29] ( .Q(I1OI1[29]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[29]), .EN(I1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \I1OI1_Z[28] ( .Q(I1OI1[28]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[28]), .EN(I1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548774 SLE \I1OI1_Z[27] ( .Q(I1OI1[27]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[27]), .EN(I1iIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.iO1O1[18] ( .Q(iO1O1[18]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[18]), .EN(iOiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.iO1O1[17] ( .Q(iO1O1[17]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[17]), .EN(iOiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.iO1O1[16] ( .Q(iO1O1[16]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[16]), .EN(iOiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.iO1O1[15] ( .Q(iO1O1[15]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[15]), .EN(iOiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.iO1O1[14] ( .Q(iO1O1[14]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[14]), .EN(iOiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.iO1O1[13] ( .Q(iO1O1[13]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[13]), .EN(iOiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.iO1O1[12] ( .Q(iO1O1[12]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .EN(iOiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.iO1O1[11] ( .Q(iO1O1[11]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .EN(iOiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.iO1O1[10] ( .Q(iO1O1[10]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .EN(iOiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.iO1O1[9] ( .Q(iO1O1[9]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .EN(iOiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.iO1O1[8] ( .Q(iO1O1[8]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .EN(iOiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.iO1O1[7] ( .Q(iO1O1[7]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .EN(iOiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.iO1O1[6] ( .Q(iO1O1[6]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(iOiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.iO1O1[5] ( .Q(iO1O1[5]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(iOiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.iO1O1[4] ( .Q(iO1O1[4]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(iOiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.OI1O1[1] ( .Q(OI1O1[1]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(OIiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.OI1O1[0] ( .Q(OI1O1[0]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(OIiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.iO1O1[31] ( .Q(iO1O1[31]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[31]), .EN(iOiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.iO1O1[30] ( .Q(iO1O1[30]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[30]), .EN(iOiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.iO1O1[29] ( .Q(iO1O1[29]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[29]), .EN(iOiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.iO1O1[28] ( .Q(iO1O1[28]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[28]), .EN(iOiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.iO1O1[27] ( .Q(iO1O1[27]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[27]), .EN(iOiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.iO1O1[26] ( .Q(iO1O1[26]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[26]), .EN(iOiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.iO1O1[25] ( .Q(iO1O1[25]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[25]), .EN(iOiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.iO1O1[24] ( .Q(iO1O1[24]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[24]), .EN(iOiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.iO1O1[23] ( .Q(iO1O1[23]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[23]), .EN(iOiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.iO1O1[22] ( .Q(iO1O1[22]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[22]), .EN(iOiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.iO1O1[21] ( .Q(iO1O1[21]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[21]), .EN(iOiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.iO1O1[20] ( .Q(iO1O1[20]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[20]), .EN(iOiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.iO1O1[19] ( .Q(iO1O1[19]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[19]), .EN(iOiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.OI1O1[16] ( .Q(OI1O1[16]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[16]), .EN(OIiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.OI1O1[15] ( .Q(OI1O1[15]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[15]), .EN(OIiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.OI1O1[14] ( .Q(OI1O1[14]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[14]), .EN(OIiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.OI1O1[13] ( .Q(OI1O1[13]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[13]), .EN(OIiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.OI1O1[12] ( .Q(OI1O1[12]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .EN(OIiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.OI1O1[11] ( .Q(OI1O1[11]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .EN(OIiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.OI1O1[10] ( .Q(OI1O1[10]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .EN(OIiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.OI1O1[9] ( .Q(OI1O1[9]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .EN(OIiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.OI1O1[8] ( .Q(OI1O1[8]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .EN(OIiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.OI1O1[7] ( .Q(OI1O1[7]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .EN(OIiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.OI1O1[6] ( .Q(OI1O1[6]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(OIiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.OI1O1[5] ( .Q(OI1O1[5]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(OIiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.OI1O1[4] ( .Q(OI1O1[4]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(OIiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.OI1O1[3] ( .Q(OI1O1[3]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(OIiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.OI1O1[2] ( .Q(OI1O1[2]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(OIiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.OI1O1[31] ( .Q(OI1O1[31]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[31]), .EN(OIiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.OI1O1[30] ( .Q(OI1O1[30]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[30]), .EN(OIiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.OI1O1[29] ( .Q(OI1O1[29]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[29]), .EN(OIiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.OI1O1[28] ( .Q(OI1O1[28]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[28]), .EN(OIiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.OI1O1[27] ( .Q(OI1O1[27]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[27]), .EN(OIiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.OI1O1[26] ( .Q(OI1O1[26]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[26]), .EN(OIiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.OI1O1[25] ( .Q(OI1O1[25]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[25]), .EN(OIiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.OI1O1[24] ( .Q(OI1O1[24]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[24]), .EN(OIiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.OI1O1[23] ( .Q(OI1O1[23]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[23]), .EN(OIiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.OI1O1[22] ( .Q(OI1O1[22]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[22]), .EN(OIiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.OI1O1[21] ( .Q(OI1O1[21]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[21]), .EN(OIiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.OI1O1[20] ( .Q(OI1O1[20]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[20]), .EN(OIiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.OI1O1[19] ( .Q(OI1O1[19]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[19]), .EN(OIiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.OI1O1[18] ( .Q(OI1O1[18]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[18]), .EN(OIiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548724 SLE \genblk4.OI1O1[17] ( .Q(OI1O1[17]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[17]), .EN(OIiIo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:548088 CFG2 un5_l0iIo_1 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_0), .B(paddr_1z_0), .Y(un5_l0iIo_1_1z) ); defparam un5_l0iIo_1.INIT=4'h4; // @28:548088 CFG2 un5_l0iIo_2 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_1), .B(PADDR_0), .Y(un5_l0iIo_2_1z) ); defparam un5_l0iIo_2.INIT=4'h1; // @28:548295 CFG2 \genblk2.un5_OIiIo_1 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_0), .B(CoreAPB3_0_0_APBmslave0_PADDR_3), .Y(N_82_2) ); defparam \genblk2.un5_OIiIo_1 .INIT=4'h8; // @28:548295 CFG2 \genblk2.un5_OIiIo_2 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_1), .B(paddr_1z_0), .Y(un5_l1iIo_2) ); defparam \genblk2.un5_OIiIo_2 .INIT=4'h4; // @28:548168 CFG2 un5_I1iIo_1 ( .A(PADDR_0), .B(paddr_1z_0), .Y(N_1214) ); defparam un5_I1iIo_1.INIT=4'h8; // @28:548108 CFG3 un5_o0iIo ( .A(un5_l0iIo_2_1z), .B(CoreAPB3_0_0_APBmslave0_PADDR_3), .C(un1_IIOO1_2_1), .Y(un5_o0iIo_Z) ); defparam un5_o0iIo.INIT=8'h20; // @28:548128 CFG3 un5_i0iIo ( .A(CoreAPB3_0_0_APBmslave0_PADDR_3), .B(un1_IIOO1_3_1), .C(tx_fifo_write_sig14_i_2), .Y(un5_i0iIo_Z) ); defparam un5_i0iIo.INIT=8'h40; // @28:548188 CFG3 un5_l1iIo ( .A(CoreAPB3_0_0_APBmslave0_PADDR_3), .B(un5_l1iIo_2), .C(liO0110_i_1), .Y(un5_l1iIo_Z) ); defparam un5_l1iIo.INIT=8'h40; // @28:548295 CFG3 \genblk2.un5_OIiIo ( .A(un5_l1iIo_2), .B(PADDR_0), .C(N_82_2), .Y(un5_OIiIo) ); defparam \genblk2.un5_OIiIo .INIT=8'h20; // @28:548168 CFG3 un5_I1iIo ( .A(N_1214), .B(un1_IIOO1_1_2), .C(CoreAPB3_0_0_APBmslave0_PADDR_3), .Y(un5_I1iIo_Z) ); defparam un5_I1iIo.INIT=8'h08; // @28:548275 CFG3 \genblk2.un5_iOiIo ( .A(PADDR_0), .B(o1Ol1_2), .C(un1_IIOO1_1_2), .Y(un5_iOiIo) ); defparam \genblk2.un5_iOiIo .INIT=8'h40; // @28:548148 CFG2 un5_O1iIo ( .A(un5_O1iIo_3), .B(CoreAPB3_0_0_APBmslave0_PADDR_3), .Y(un5_O1iIo_Z) ); defparam un5_O1iIo.INIT=4'h2; // @28:548088 CFG3 un5_l0iIo ( .A(un5_l0iIo_2_1z), .B(CoreAPB3_0_0_APBmslave0_PADDR_3), .C(un5_l0iIo_1_1z), .Y(un5_l0iIo_Z) ); defparam un5_l0iIo.INIT=8'h20; // @28:548428 CFG2 \genblk3.un24_Oi1O1[12] ( .A(un5_O1iIo_Z), .B(O1OI1[12]), .Y(un24_Oi1O1[12]) ); defparam \genblk3.un24_Oi1O1[12] .INIT=4'h8; // @28:548428 CFG2 \genblk3.un24_Oi1O1[8] ( .A(un5_O1iIo_Z), .B(O1OI1[8]), .Y(un24_Oi1O1[8]) ); defparam \genblk3.un24_Oi1O1[8] .INIT=4'h8; // @28:548428 CFG2 \genblk3.un24_Oi1O1[6] ( .A(un5_O1iIo_Z), .B(O1OI1[6]), .Y(un24_Oi1O1[6]) ); defparam \genblk3.un24_Oi1O1[6] .INIT=4'h8; // @28:548428 CFG2 \genblk3.un24_Oi1O1[11] ( .A(un5_O1iIo_Z), .B(O1OI1[11]), .Y(un24_Oi1O1[11]) ); defparam \genblk3.un24_Oi1O1[11] .INIT=4'h8; // @28:548428 CFG2 \genblk3.un24_Oi1O1[10] ( .A(un5_O1iIo_Z), .B(O1OI1[10]), .Y(un24_Oi1O1[10]) ); defparam \genblk3.un24_Oi1O1[10] .INIT=4'h8; // @28:548428 CFG2 \genblk3.un24_Oi1O1[13] ( .A(un5_O1iIo_Z), .B(O1OI1[13]), .Y(un24_Oi1O1[13]) ); defparam \genblk3.un24_Oi1O1[13] .INIT=4'h8; // @28:548428 CFG2 \genblk3.un24_Oi1O1[14] ( .A(un5_O1iIo_Z), .B(O1OI1[14]), .Y(un24_Oi1O1[14]) ); defparam \genblk3.un24_Oi1O1[14] .INIT=4'h8; // @28:548428 CFG2 \genblk3.un24_Oi1O1[19] ( .A(un5_O1iIo_Z), .B(O1OI1[19]), .Y(un24_Oi1O1[19]) ); defparam \genblk3.un24_Oi1O1[19] .INIT=4'h8; // @28:548428 CFG2 \genblk3.un24_Oi1O1[7] ( .A(un5_O1iIo_Z), .B(O1OI1[7]), .Y(un24_Oi1O1[7]) ); defparam \genblk3.un24_Oi1O1[7] .INIT=4'h8; // @28:548448 CFG2 \genblk3.un31_Oi1O1[26] ( .A(un5_I1iIo_Z), .B(I1OI1[26]), .Y(un31_Oi1O1[26]) ); defparam \genblk3.un31_Oi1O1[26] .INIT=4'h8; // @28:548362 CFG4 \Oi1O1_2[8] ( .A(iO1O1[8]), .B(I1OI1[8]), .C(un5_I1iIo_Z), .D(un5_iOiIo), .Y(Oi1O1_2_Z[8]) ); defparam \Oi1O1_2[8] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_1[8] ( .A(i1OI1_Z[8]), .B(i0OI1[8]), .C(un5_l1iIo_Z), .D(un5_i0iIo_Z), .Y(Oi1O1_1_Z[8]) ); defparam \Oi1O1_1[8] .INIT=16'hECA0; // @28:548362 CFG4 \Oi1O1_0[8] ( .A(o0OI1[8]), .B(OI1O1[8]), .C(un5_OIiIo), .D(un5_o0iIo_Z), .Y(Oi1O1_0_Z[8]) ); defparam \Oi1O1_0[8] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_3[2] ( .A(un5_i0iIo_Z), .B(un5_O1iIo_Z), .C(i0OI1[2]), .D(O1OI1[2]), .Y(Oi1O1_3_Z[2]) ); defparam \Oi1O1_3[2] .INIT=16'hECA0; // @28:548362 CFG4 \Oi1O1_2[2] ( .A(iO1O1[2]), .B(I1OI1[2]), .C(un5_I1iIo_Z), .D(un5_iOiIo), .Y(Oi1O1_2_Z[2]) ); defparam \Oi1O1_2[2] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_1[2] ( .A(i1OI1_Z[2]), .B(o0OI1[2]), .C(un5_o0iIo_Z), .D(un5_l1iIo_Z), .Y(Oi1O1_1_Z[2]) ); defparam \Oi1O1_1[2] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_0[2] ( .A(l0OI1[2]), .B(OI1O1[2]), .C(un5_OIiIo), .D(un5_l0iIo_Z), .Y(Oi1O1_0_Z[2]) ); defparam \Oi1O1_0[2] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_2[27] ( .A(iO1O1[27]), .B(i0OI1[27]), .C(un5_iOiIo), .D(un5_i0iIo_Z), .Y(Oi1O1_2_18) ); defparam \Oi1O1_2[27] .INIT=16'hECA0; // @28:548362 CFG4 \Oi1O1_1[27] ( .A(un5_I1iIo_Z), .B(un5_l1iIo_Z), .C(i1OI1_Z[27]), .D(I1OI1[27]), .Y(Oi1O1_1_18) ); defparam \Oi1O1_1[27] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_0[27] ( .A(o0OI1[27]), .B(OI1O1[27]), .C(un5_OIiIo), .D(un5_o0iIo_Z), .Y(Oi1O1_0_Z[27]) ); defparam \Oi1O1_0[27] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_2[10] ( .A(iO1O1[10]), .B(I1OI1[10]), .C(un5_I1iIo_Z), .D(un5_iOiIo), .Y(Oi1O1_2_Z[10]) ); defparam \Oi1O1_2[10] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_1[10] ( .A(i1OI1_Z[10]), .B(i0OI1[10]), .C(un5_l1iIo_Z), .D(un5_i0iIo_Z), .Y(Oi1O1_1_Z[10]) ); defparam \Oi1O1_1[10] .INIT=16'hECA0; // @28:548362 CFG4 \Oi1O1_0[10] ( .A(o0OI1[10]), .B(OI1O1[10]), .C(un5_OIiIo), .D(un5_o0iIo_Z), .Y(Oi1O1_0_Z[10]) ); defparam \Oi1O1_0[10] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_2[13] ( .A(iO1O1[13]), .B(I1OI1[13]), .C(un5_I1iIo_Z), .D(un5_iOiIo), .Y(Oi1O1_2_Z[13]) ); defparam \Oi1O1_2[13] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_1[13] ( .A(i1OI1_Z[13]), .B(i0OI1[13]), .C(un5_l1iIo_Z), .D(un5_i0iIo_Z), .Y(Oi1O1_1_Z[13]) ); defparam \Oi1O1_1[13] .INIT=16'hECA0; // @28:548362 CFG4 \Oi1O1_0[13] ( .A(o0OI1[13]), .B(OI1O1[13]), .C(un5_OIiIo), .D(un5_o0iIo_Z), .Y(Oi1O1_0_Z[13]) ); defparam \Oi1O1_0[13] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_2[28] ( .A(iO1O1[28]), .B(I1OI1[28]), .C(un5_I1iIo_Z), .D(un5_iOiIo), .Y(Oi1O1_2_19) ); defparam \Oi1O1_2[28] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_1[28] ( .A(i1OI1_Z[28]), .B(i0OI1[28]), .C(un5_l1iIo_Z), .D(un5_i0iIo_Z), .Y(Oi1O1_1_19) ); defparam \Oi1O1_1[28] .INIT=16'hECA0; // @28:548362 CFG4 \Oi1O1_0[28] ( .A(o0OI1[28]), .B(OI1O1[28]), .C(un5_OIiIo), .D(un5_o0iIo_Z), .Y(Oi1O1_0_Z[28]) ); defparam \Oi1O1_0[28] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_2[29] ( .A(iO1O1[29]), .B(I1OI1[29]), .C(un5_I1iIo_Z), .D(un5_iOiIo), .Y(Oi1O1_2_20) ); defparam \Oi1O1_2[29] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_1[29] ( .A(i1OI1_Z[29]), .B(i0OI1[29]), .C(un5_l1iIo_Z), .D(un5_i0iIo_Z), .Y(Oi1O1_1_20) ); defparam \Oi1O1_1[29] .INIT=16'hECA0; // @28:548362 CFG4 \Oi1O1_0[29] ( .A(o0OI1[29]), .B(OI1O1[29]), .C(un5_OIiIo), .D(un5_o0iIo_Z), .Y(Oi1O1_0_Z[29]) ); defparam \Oi1O1_0[29] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_2[12] ( .A(iO1O1[12]), .B(I1OI1[12]), .C(un5_I1iIo_Z), .D(un5_iOiIo), .Y(Oi1O1_2_Z[12]) ); defparam \Oi1O1_2[12] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_1[12] ( .A(i1OI1_Z[12]), .B(i0OI1[12]), .C(un5_l1iIo_Z), .D(un5_i0iIo_Z), .Y(Oi1O1_1_Z[12]) ); defparam \Oi1O1_1[12] .INIT=16'hECA0; // @28:548362 CFG4 \Oi1O1_0[12] ( .A(o0OI1[12]), .B(OI1O1[12]), .C(un5_OIiIo), .D(un5_o0iIo_Z), .Y(Oi1O1_0_Z[12]) ); defparam \Oi1O1_0[12] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_2[24] ( .A(iO1O1[24]), .B(I1OI1[24]), .C(un5_I1iIo_Z), .D(un5_iOiIo), .Y(Oi1O1_2_15) ); defparam \Oi1O1_2[24] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_1[24] ( .A(i1OI1_Z[24]), .B(i0OI1[24]), .C(un5_l1iIo_Z), .D(un5_i0iIo_Z), .Y(Oi1O1_1_15) ); defparam \Oi1O1_1[24] .INIT=16'hECA0; // @28:548362 CFG4 \Oi1O1_0[24] ( .A(o0OI1[24]), .B(OI1O1[24]), .C(un5_OIiIo), .D(un5_o0iIo_Z), .Y(Oi1O1_0_Z[24]) ); defparam \Oi1O1_0[24] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_2[11] ( .A(un5_I1iIo_Z), .B(un5_i0iIo_Z), .C(i0OI1[11]), .D(I1OI1[11]), .Y(Oi1O1_2_Z[11]) ); defparam \Oi1O1_2[11] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_1[11] ( .A(i1OI1_Z[11]), .B(iO1O1[11]), .C(un5_l1iIo_Z), .D(un5_iOiIo), .Y(Oi1O1_1_Z[11]) ); defparam \Oi1O1_1[11] .INIT=16'hECA0; // @28:548362 CFG4 \Oi1O1_0[11] ( .A(o0OI1[11]), .B(OI1O1[11]), .C(un5_OIiIo), .D(un5_o0iIo_Z), .Y(Oi1O1_0_Z[11]) ); defparam \Oi1O1_0[11] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_2[26] ( .A(iO1O1[26]), .B(i0OI1[26]), .C(un5_iOiIo), .D(un5_i0iIo_Z), .Y(Oi1O1_2_Z[26]) ); defparam \Oi1O1_2[26] .INIT=16'hECA0; // @28:548362 CFG4 \Oi1O1_0[26] ( .A(o0OI1[26]), .B(OI1O1[26]), .C(un5_OIiIo), .D(un5_o0iIo_Z), .Y(Oi1O1_0_Z[26]) ); defparam \Oi1O1_0[26] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_2[18] ( .A(iO1O1[18]), .B(i0OI1[18]), .C(un5_iOiIo), .D(un5_i0iIo_Z), .Y(Oi1O1_2_9) ); defparam \Oi1O1_2[18] .INIT=16'hECA0; // @28:548362 CFG4 \Oi1O1_1[18] ( .A(un5_I1iIo_Z), .B(un5_l1iIo_Z), .C(i1OI1_Z[18]), .D(I1OI1[18]), .Y(Oi1O1_1_9) ); defparam \Oi1O1_1[18] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_0[18] ( .A(o0OI1[18]), .B(OI1O1[18]), .C(un5_OIiIo), .D(un5_o0iIo_Z), .Y(Oi1O1_0_Z[18]) ); defparam \Oi1O1_0[18] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_3[1] ( .A(I1OI1[1]), .B(O1OI1[1]), .C(un5_O1iIo_Z), .D(un5_I1iIo_Z), .Y(Oi1O1_3_Z[1]) ); defparam \Oi1O1_3[1] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_2[1] ( .A(iO1O1[1]), .B(i0OI1[1]), .C(un5_iOiIo), .D(un5_i0iIo_Z), .Y(Oi1O1_2_Z[1]) ); defparam \Oi1O1_2[1] .INIT=16'hECA0; // @28:548362 CFG4 \Oi1O1_1[1] ( .A(i1OI1_Z[1]), .B(o0OI1[1]), .C(un5_o0iIo_Z), .D(un5_l1iIo_Z), .Y(Oi1O1_1_Z[1]) ); defparam \Oi1O1_1[1] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_0[1] ( .A(l0OI1[1]), .B(OI1O1[1]), .C(un5_OIiIo), .D(un5_l0iIo_Z), .Y(Oi1O1_0_Z[1]) ); defparam \Oi1O1_0[1] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_2[25] ( .A(iO1O1[25]), .B(I1OI1[25]), .C(un5_I1iIo_Z), .D(un5_iOiIo), .Y(Oi1O1_2_16) ); defparam \Oi1O1_2[25] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_1[25] ( .A(i1OI1_Z[25]), .B(i0OI1[25]), .C(un5_l1iIo_Z), .D(un5_i0iIo_Z), .Y(Oi1O1_1_16) ); defparam \Oi1O1_1[25] .INIT=16'hECA0; // @28:548362 CFG4 \Oi1O1_0[25] ( .A(o0OI1[25]), .B(OI1O1[25]), .C(un5_OIiIo), .D(un5_o0iIo_Z), .Y(Oi1O1_0_Z[25]) ); defparam \Oi1O1_0[25] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_3[0] ( .A(un5_i0iIo_Z), .B(un5_O1iIo_Z), .C(i0OI1[0]), .D(O1OI1[0]), .Y(Oi1O1_3_Z[0]) ); defparam \Oi1O1_3[0] .INIT=16'hECA0; // @28:548362 CFG4 \Oi1O1_2[0] ( .A(iO1O1[0]), .B(I1OI1[0]), .C(un5_I1iIo_Z), .D(un5_iOiIo), .Y(Oi1O1_2_Z[0]) ); defparam \Oi1O1_2[0] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_1[0] ( .A(i1OI1_Z[0]), .B(o0OI1[0]), .C(un5_o0iIo_Z), .D(un5_l1iIo_Z), .Y(Oi1O1_1_Z[0]) ); defparam \Oi1O1_1[0] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_0[0] ( .A(l0OI1[0]), .B(OI1O1[0]), .C(un5_OIiIo), .D(un5_l0iIo_Z), .Y(Oi1O1_0_Z[0]) ); defparam \Oi1O1_0[0] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_2[20] ( .A(iO1O1[20]), .B(i0OI1[20]), .C(un5_iOiIo), .D(un5_i0iIo_Z), .Y(Oi1O1_2_11) ); defparam \Oi1O1_2[20] .INIT=16'hECA0; // @28:548362 CFG4 \Oi1O1_1[20] ( .A(un5_I1iIo_Z), .B(un5_l1iIo_Z), .C(i1OI1_Z[20]), .D(I1OI1[20]), .Y(Oi1O1_1_11) ); defparam \Oi1O1_1[20] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_0[20] ( .A(o0OI1[20]), .B(OI1O1[20]), .C(un5_OIiIo), .D(un5_o0iIo_Z), .Y(Oi1O1_0_Z[20]) ); defparam \Oi1O1_0[20] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_2[23] ( .A(iO1O1[23]), .B(I1OI1[23]), .C(un5_I1iIo_Z), .D(un5_iOiIo), .Y(Oi1O1_2_14) ); defparam \Oi1O1_2[23] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_1[23] ( .A(i1OI1_Z[23]), .B(i0OI1[23]), .C(un5_l1iIo_Z), .D(un5_i0iIo_Z), .Y(Oi1O1_1_14) ); defparam \Oi1O1_1[23] .INIT=16'hECA0; // @28:548362 CFG4 \Oi1O1_0[23] ( .A(o0OI1[23]), .B(OI1O1[23]), .C(un5_OIiIo), .D(un5_o0iIo_Z), .Y(Oi1O1_0_Z[23]) ); defparam \Oi1O1_0[23] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_3[3] ( .A(I1OI1[3]), .B(O1OI1[3]), .C(un5_O1iIo_Z), .D(un5_I1iIo_Z), .Y(Oi1O1_3_Z[3]) ); defparam \Oi1O1_3[3] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_2[3] ( .A(iO1O1[3]), .B(i0OI1[3]), .C(un5_iOiIo), .D(un5_i0iIo_Z), .Y(Oi1O1_2_Z[3]) ); defparam \Oi1O1_2[3] .INIT=16'hECA0; // @28:548362 CFG4 \Oi1O1_1[3] ( .A(i1OI1_Z[3]), .B(o0OI1[3]), .C(un5_o0iIo_Z), .D(un5_l1iIo_Z), .Y(Oi1O1_1_Z[3]) ); defparam \Oi1O1_1[3] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_0[3] ( .A(l0OI1[3]), .B(OI1O1[3]), .C(un5_OIiIo), .D(un5_l0iIo_Z), .Y(Oi1O1_0_Z[3]) ); defparam \Oi1O1_0[3] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_2[15] ( .A(iO1O1[15]), .B(I1OI1[15]), .C(un5_I1iIo_Z), .D(un5_iOiIo), .Y(Oi1O1_2_6) ); defparam \Oi1O1_2[15] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_1[15] ( .A(i1OI1_Z[15]), .B(i0OI1[15]), .C(un5_l1iIo_Z), .D(un5_i0iIo_Z), .Y(Oi1O1_1_6) ); defparam \Oi1O1_1[15] .INIT=16'hECA0; // @28:548362 CFG4 \Oi1O1_0[15] ( .A(o0OI1[15]), .B(OI1O1[15]), .C(un5_OIiIo), .D(un5_o0iIo_Z), .Y(Oi1O1_0_Z[15]) ); defparam \Oi1O1_0[15] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_2[21] ( .A(iO1O1[21]), .B(I1OI1[21]), .C(un5_I1iIo_Z), .D(un5_iOiIo), .Y(Oi1O1_2_12) ); defparam \Oi1O1_2[21] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_1[21] ( .A(i1OI1_Z[21]), .B(i0OI1[21]), .C(un5_l1iIo_Z), .D(un5_i0iIo_Z), .Y(Oi1O1_1_12) ); defparam \Oi1O1_1[21] .INIT=16'hECA0; // @28:548362 CFG4 \Oi1O1_0[21] ( .A(o0OI1[21]), .B(OI1O1[21]), .C(un5_OIiIo), .D(un5_o0iIo_Z), .Y(Oi1O1_0_Z[21]) ); defparam \Oi1O1_0[21] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_3[4] ( .A(un5_i0iIo_Z), .B(un5_O1iIo_Z), .C(i0OI1[4]), .D(O1OI1[4]), .Y(Oi1O1_3_Z[4]) ); defparam \Oi1O1_3[4] .INIT=16'hECA0; // @28:548362 CFG4 \Oi1O1_2[4] ( .A(iO1O1[4]), .B(I1OI1[4]), .C(un5_I1iIo_Z), .D(un5_iOiIo), .Y(Oi1O1_2_Z[4]) ); defparam \Oi1O1_2[4] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_1[4] ( .A(i1OI1_Z[4]), .B(o0OI1[4]), .C(un5_o0iIo_Z), .D(un5_l1iIo_Z), .Y(Oi1O1_1_Z[4]) ); defparam \Oi1O1_1[4] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_0[4] ( .A(l0OI1[4]), .B(OI1O1[4]), .C(un5_OIiIo), .D(un5_l0iIo_Z), .Y(Oi1O1_0_Z[4]) ); defparam \Oi1O1_0[4] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_3[5] ( .A(un5_i0iIo_Z), .B(un5_O1iIo_Z), .C(i0OI1[5]), .D(O1OI1[5]), .Y(Oi1O1_3_Z[5]) ); defparam \Oi1O1_3[5] .INIT=16'hECA0; // @28:548362 CFG4 \Oi1O1_2[5] ( .A(iO1O1[5]), .B(I1OI1[5]), .C(un5_I1iIo_Z), .D(un5_iOiIo), .Y(Oi1O1_2_Z[5]) ); defparam \Oi1O1_2[5] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_1[5] ( .A(i1OI1_Z[5]), .B(o0OI1[5]), .C(un5_o0iIo_Z), .D(un5_l1iIo_Z), .Y(Oi1O1_1_Z[5]) ); defparam \Oi1O1_1[5] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_0[5] ( .A(l0OI1[5]), .B(OI1O1[5]), .C(un5_OIiIo), .D(un5_l0iIo_Z), .Y(Oi1O1_0_Z[5]) ); defparam \Oi1O1_0[5] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_2[7] ( .A(iO1O1[7]), .B(I1OI1[7]), .C(un5_I1iIo_Z), .D(un5_iOiIo), .Y(Oi1O1_2_Z[7]) ); defparam \Oi1O1_2[7] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_1[7] ( .A(i1OI1_Z[7]), .B(i0OI1[7]), .C(un5_l1iIo_Z), .D(un5_i0iIo_Z), .Y(Oi1O1_1_Z[7]) ); defparam \Oi1O1_1[7] .INIT=16'hECA0; // @28:548362 CFG4 \Oi1O1_0[7] ( .A(o0OI1[7]), .B(OI1O1[7]), .C(un5_OIiIo), .D(un5_o0iIo_Z), .Y(Oi1O1_0_Z[7]) ); defparam \Oi1O1_0[7] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_2[14] ( .A(iO1O1[14]), .B(I1OI1[14]), .C(un5_I1iIo_Z), .D(un5_iOiIo), .Y(Oi1O1_2_Z[14]) ); defparam \Oi1O1_2[14] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_1[14] ( .A(i1OI1_Z[14]), .B(i0OI1[14]), .C(un5_l1iIo_Z), .D(un5_i0iIo_Z), .Y(Oi1O1_1_Z[14]) ); defparam \Oi1O1_1[14] .INIT=16'hECA0; // @28:548362 CFG4 \Oi1O1_0[14] ( .A(o0OI1[14]), .B(OI1O1[14]), .C(un5_OIiIo), .D(un5_o0iIo_Z), .Y(Oi1O1_0_Z[14]) ); defparam \Oi1O1_0[14] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_2[9] ( .A(iO1O1[9]), .B(I1OI1[9]), .C(un5_I1iIo_Z), .D(un5_iOiIo), .Y(Oi1O1_2_0) ); defparam \Oi1O1_2[9] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_1[9] ( .A(i1OI1_Z[9]), .B(i0OI1[9]), .C(un5_l1iIo_Z), .D(un5_i0iIo_Z), .Y(Oi1O1_1_0) ); defparam \Oi1O1_1[9] .INIT=16'hECA0; // @28:548362 CFG4 \Oi1O1_0[9] ( .A(o0OI1[9]), .B(OI1O1[9]), .C(un5_OIiIo), .D(un5_o0iIo_Z), .Y(Oi1O1_0_Z[9]) ); defparam \Oi1O1_0[9] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_2[17] ( .A(iO1O1[17]), .B(I1OI1[17]), .C(un5_I1iIo_Z), .D(un5_iOiIo), .Y(Oi1O1_2_8) ); defparam \Oi1O1_2[17] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_1[17] ( .A(i1OI1_Z[17]), .B(i0OI1[17]), .C(un5_l1iIo_Z), .D(un5_i0iIo_Z), .Y(Oi1O1_1_8) ); defparam \Oi1O1_1[17] .INIT=16'hECA0; // @28:548362 CFG4 \Oi1O1_0[17] ( .A(o0OI1[17]), .B(OI1O1[17]), .C(un5_OIiIo), .D(un5_o0iIo_Z), .Y(Oi1O1_0_Z[17]) ); defparam \Oi1O1_0[17] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_2[19] ( .A(iO1O1[19]), .B(I1OI1[19]), .C(un5_I1iIo_Z), .D(un5_iOiIo), .Y(Oi1O1_2_Z[19]) ); defparam \Oi1O1_2[19] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_1[19] ( .A(i1OI1_Z[19]), .B(i0OI1[19]), .C(un5_l1iIo_Z), .D(un5_i0iIo_Z), .Y(Oi1O1_1_Z[19]) ); defparam \Oi1O1_1[19] .INIT=16'hECA0; // @28:548362 CFG4 \Oi1O1_0[19] ( .A(o0OI1[19]), .B(OI1O1[19]), .C(un5_OIiIo), .D(un5_o0iIo_Z), .Y(Oi1O1_0_Z[19]) ); defparam \Oi1O1_0[19] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_2[31] ( .A(iO1O1[31]), .B(I1OI1[31]), .C(un5_I1iIo_Z), .D(un5_iOiIo), .Y(Oi1O1_2_22) ); defparam \Oi1O1_2[31] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_1[31] ( .A(i1OI1_Z[31]), .B(i0OI1[31]), .C(un5_l1iIo_Z), .D(un5_i0iIo_Z), .Y(Oi1O1_1_22) ); defparam \Oi1O1_1[31] .INIT=16'hECA0; // @28:548362 CFG4 \Oi1O1_0[31] ( .A(o0OI1[31]), .B(OI1O1[31]), .C(un5_OIiIo), .D(un5_o0iIo_Z), .Y(Oi1O1_0_Z[31]) ); defparam \Oi1O1_0[31] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_2[30] ( .A(iO1O1[30]), .B(I1OI1[30]), .C(un5_I1iIo_Z), .D(un5_iOiIo), .Y(Oi1O1_2_21) ); defparam \Oi1O1_2[30] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_1[30] ( .A(i1OI1_Z[30]), .B(i0OI1[30]), .C(un5_l1iIo_Z), .D(un5_i0iIo_Z), .Y(Oi1O1_1_21) ); defparam \Oi1O1_1[30] .INIT=16'hECA0; // @28:548362 CFG4 \Oi1O1_0[30] ( .A(o0OI1[30]), .B(OI1O1[30]), .C(un5_OIiIo), .D(un5_o0iIo_Z), .Y(Oi1O1_0_Z[30]) ); defparam \Oi1O1_0[30] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_2[22] ( .A(iO1O1[22]), .B(i0OI1[22]), .C(un5_iOiIo), .D(un5_i0iIo_Z), .Y(Oi1O1_2_13) ); defparam \Oi1O1_2[22] .INIT=16'hECA0; // @28:548362 CFG4 \Oi1O1_1[22] ( .A(un5_I1iIo_Z), .B(un5_l1iIo_Z), .C(i1OI1_Z[22]), .D(I1OI1[22]), .Y(Oi1O1_1_13) ); defparam \Oi1O1_1[22] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_0[22] ( .A(o0OI1[22]), .B(OI1O1[22]), .C(un5_OIiIo), .D(un5_o0iIo_Z), .Y(Oi1O1_0_Z[22]) ); defparam \Oi1O1_0[22] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_2[16] ( .A(iO1O1[16]), .B(I1OI1[16]), .C(un5_I1iIo_Z), .D(un5_iOiIo), .Y(Oi1O1_2_7) ); defparam \Oi1O1_2[16] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_1[16] ( .A(i1OI1_Z[16]), .B(i0OI1[16]), .C(un5_l1iIo_Z), .D(un5_i0iIo_Z), .Y(Oi1O1_1_7) ); defparam \Oi1O1_1[16] .INIT=16'hECA0; // @28:548362 CFG4 \Oi1O1_0[16] ( .A(o0OI1[16]), .B(OI1O1[16]), .C(un5_OIiIo), .D(un5_o0iIo_Z), .Y(Oi1O1_0_Z[16]) ); defparam \Oi1O1_0[16] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_2[6] ( .A(iO1O1[6]), .B(I1OI1[6]), .C(un5_I1iIo_Z), .D(un5_iOiIo), .Y(Oi1O1_2_Z[6]) ); defparam \Oi1O1_2[6] .INIT=16'hEAC0; // @28:548362 CFG4 \Oi1O1_1[6] ( .A(i1OI1_Z[6]), .B(i0OI1[6]), .C(un5_l1iIo_Z), .D(un5_i0iIo_Z), .Y(Oi1O1_1_Z[6]) ); defparam \Oi1O1_1[6] .INIT=16'hECA0; // @28:548362 CFG4 \Oi1O1_0[6] ( .A(o0OI1[6]), .B(OI1O1[6]), .C(un5_OIiIo), .D(un5_o0iIo_Z), .Y(Oi1O1_0_Z[6]) ); defparam \Oi1O1_0[6] .INIT=16'hEAC0; // @28:548362 CFG3 \Oi1O1_3[27] ( .A(O1OI1[27]), .B(Oi1O1_0_Z[27]), .C(un5_O1iIo_Z), .Y(Oi1O1_3_18) ); defparam \Oi1O1_3[27] .INIT=8'hEC; // @28:548362 CFG3 \Oi1O1_3[28] ( .A(O1OI1[28]), .B(Oi1O1_0_Z[28]), .C(un5_O1iIo_Z), .Y(Oi1O1_3_19) ); defparam \Oi1O1_3[28] .INIT=8'hEC; // @28:548362 CFG3 \Oi1O1_3[29] ( .A(O1OI1[29]), .B(Oi1O1_0_Z[29]), .C(un5_O1iIo_Z), .Y(Oi1O1_3_20) ); defparam \Oi1O1_3[29] .INIT=8'hEC; // @28:548362 CFG3 \Oi1O1_3[24] ( .A(O1OI1[24]), .B(Oi1O1_0_Z[24]), .C(un5_O1iIo_Z), .Y(Oi1O1_3_15) ); defparam \Oi1O1_3[24] .INIT=8'hEC; // @28:548362 CFG4 \Oi1O1_4[26] ( .A(i1OI1_Z[26]), .B(un5_l1iIo_Z), .C(un31_Oi1O1[26]), .D(Oi1O1_2_Z[26]), .Y(Oi1O1_4_0) ); defparam \Oi1O1_4[26] .INIT=16'hFFF8; // @28:548362 CFG3 \Oi1O1_3[26] ( .A(O1OI1[26]), .B(Oi1O1_0_Z[26]), .C(un5_O1iIo_Z), .Y(Oi1O1_3_17) ); defparam \Oi1O1_3[26] .INIT=8'hEC; // @28:548362 CFG3 \Oi1O1_3[18] ( .A(O1OI1[18]), .B(Oi1O1_0_Z[18]), .C(un5_O1iIo_Z), .Y(Oi1O1_3_9) ); defparam \Oi1O1_3[18] .INIT=8'hEC; // @28:548362 CFG3 \Oi1O1_3[25] ( .A(O1OI1[25]), .B(Oi1O1_0_Z[25]), .C(un5_O1iIo_Z), .Y(Oi1O1_3_16) ); defparam \Oi1O1_3[25] .INIT=8'hEC; // @28:548362 CFG3 \Oi1O1_3[20] ( .A(O1OI1[20]), .B(Oi1O1_0_Z[20]), .C(un5_O1iIo_Z), .Y(Oi1O1_3_11) ); defparam \Oi1O1_3[20] .INIT=8'hEC; // @28:548362 CFG3 \Oi1O1_3[23] ( .A(O1OI1[23]), .B(Oi1O1_0_Z[23]), .C(un5_O1iIo_Z), .Y(Oi1O1_3_14) ); defparam \Oi1O1_3[23] .INIT=8'hEC; // @28:548362 CFG3 \Oi1O1_3[15] ( .A(O1OI1[15]), .B(Oi1O1_0_Z[15]), .C(un5_O1iIo_Z), .Y(Oi1O1_3_6) ); defparam \Oi1O1_3[15] .INIT=8'hEC; // @28:548362 CFG3 \Oi1O1_3[21] ( .A(O1OI1[21]), .B(Oi1O1_0_Z[21]), .C(un5_O1iIo_Z), .Y(Oi1O1_3_12) ); defparam \Oi1O1_3[21] .INIT=8'hEC; // @28:548362 CFG3 \Oi1O1_3[9] ( .A(O1OI1[9]), .B(Oi1O1_0_Z[9]), .C(un5_O1iIo_Z), .Y(Oi1O1_3_0) ); defparam \Oi1O1_3[9] .INIT=8'hEC; // @28:548362 CFG3 \Oi1O1_3[17] ( .A(O1OI1[17]), .B(Oi1O1_0_Z[17]), .C(un5_O1iIo_Z), .Y(Oi1O1_3_8) ); defparam \Oi1O1_3[17] .INIT=8'hEC; // @28:548362 CFG3 \Oi1O1_3[31] ( .A(O1OI1[31]), .B(Oi1O1_0_Z[31]), .C(un5_O1iIo_Z), .Y(Oi1O1_3_22) ); defparam \Oi1O1_3[31] .INIT=8'hEC; // @28:548362 CFG3 \Oi1O1_3[30] ( .A(O1OI1[30]), .B(Oi1O1_0_Z[30]), .C(un5_O1iIo_Z), .Y(Oi1O1_3_21) ); defparam \Oi1O1_3[30] .INIT=8'hEC; // @28:548362 CFG3 \Oi1O1_3[22] ( .A(O1OI1[22]), .B(Oi1O1_0_Z[22]), .C(un5_O1iIo_Z), .Y(Oi1O1_3_13) ); defparam \Oi1O1_3[22] .INIT=8'hEC; // @28:548362 CFG3 \Oi1O1_3[16] ( .A(O1OI1[16]), .B(Oi1O1_0_Z[16]), .C(un5_O1iIo_Z), .Y(Oi1O1_3_7) ); defparam \Oi1O1_3[16] .INIT=8'hEC; // @28:548362 CFG4 \Oi1O1[10] ( .A(Oi1O1_0_Z[10]), .B(Oi1O1_2_Z[10]), .C(Oi1O1_1_Z[10]), .D(un24_Oi1O1[10]), .Y(OO1O1[10]) ); defparam \Oi1O1[10] .INIT=16'hFFFE; // @28:548362 CFG4 \Oi1O1[11] ( .A(Oi1O1_0_Z[11]), .B(Oi1O1_2_Z[11]), .C(Oi1O1_1_Z[11]), .D(un24_Oi1O1[11]), .Y(OO1O1[11]) ); defparam \Oi1O1[11] .INIT=16'hFFFE; // @28:548362 CFG4 \Oi1O1[3] ( .A(Oi1O1_0_Z[3]), .B(Oi1O1_1_Z[3]), .C(Oi1O1_2_Z[3]), .D(Oi1O1_3_Z[3]), .Y(OO1O1_3) ); defparam \Oi1O1[3] .INIT=16'hFFFE; // @28:548362 CFG4 \Oi1O1[6] ( .A(Oi1O1_0_Z[6]), .B(Oi1O1_2_Z[6]), .C(Oi1O1_1_Z[6]), .D(un24_Oi1O1[6]), .Y(OO1O1_6) ); defparam \Oi1O1[6] .INIT=16'hFFFE; // @28:548362 CFG4 \Oi1O1[8] ( .A(Oi1O1_0_Z[8]), .B(Oi1O1_2_Z[8]), .C(Oi1O1_1_Z[8]), .D(un24_Oi1O1[8]), .Y(OO1O1_8) ); defparam \Oi1O1[8] .INIT=16'hFFFE; // @28:548362 CFG4 \Oi1O1[12] ( .A(Oi1O1_0_Z[12]), .B(Oi1O1_2_Z[12]), .C(Oi1O1_1_Z[12]), .D(un24_Oi1O1[12]), .Y(OO1O1[12]) ); defparam \Oi1O1[12] .INIT=16'hFFFE; // @28:548362 CFG4 \Oi1O1[7] ( .A(Oi1O1_0_Z[7]), .B(Oi1O1_2_Z[7]), .C(Oi1O1_1_Z[7]), .D(un24_Oi1O1[7]), .Y(OO1O1_7) ); defparam \Oi1O1[7] .INIT=16'hFFFE; // @28:548362 CFG4 \Oi1O1[14] ( .A(Oi1O1_0_Z[14]), .B(Oi1O1_2_Z[14]), .C(Oi1O1_1_Z[14]), .D(un24_Oi1O1[14]), .Y(OO1O1[14]) ); defparam \Oi1O1[14] .INIT=16'hFFFE; // @28:548362 CFG4 \Oi1O1[4] ( .A(Oi1O1_0_Z[4]), .B(Oi1O1_1_Z[4]), .C(Oi1O1_2_Z[4]), .D(Oi1O1_3_Z[4]), .Y(OO1O1_4) ); defparam \Oi1O1[4] .INIT=16'hFFFE; // @28:548362 CFG4 \Oi1O1[2] ( .A(Oi1O1_0_Z[2]), .B(Oi1O1_1_Z[2]), .C(Oi1O1_2_Z[2]), .D(Oi1O1_3_Z[2]), .Y(OO1O1_2) ); defparam \Oi1O1[2] .INIT=16'hFFFE; // @28:548362 CFG4 \Oi1O1[5] ( .A(Oi1O1_0_Z[5]), .B(Oi1O1_1_Z[5]), .C(Oi1O1_2_Z[5]), .D(Oi1O1_3_Z[5]), .Y(OO1O1_5) ); defparam \Oi1O1[5] .INIT=16'hFFFE; // @28:548362 CFG4 \Oi1O1[13] ( .A(Oi1O1_0_Z[13]), .B(Oi1O1_2_Z[13]), .C(Oi1O1_1_Z[13]), .D(un24_Oi1O1[13]), .Y(OO1O1[13]) ); defparam \Oi1O1[13] .INIT=16'hFFFE; // @28:548362 CFG4 \Oi1O1[1] ( .A(Oi1O1_0_Z[1]), .B(Oi1O1_1_Z[1]), .C(Oi1O1_2_Z[1]), .D(Oi1O1_3_Z[1]), .Y(OO1O1_1) ); defparam \Oi1O1[1] .INIT=16'hFFFE; // @28:548362 CFG4 \Oi1O1[19] ( .A(Oi1O1_0_Z[19]), .B(Oi1O1_2_Z[19]), .C(Oi1O1_1_Z[19]), .D(un24_Oi1O1[19]), .Y(OO1O1_19) ); defparam \Oi1O1[19] .INIT=16'hFFFE; // @28:548362 CFG4 \Oi1O1[0] ( .A(Oi1O1_0_Z[0]), .B(Oi1O1_1_Z[0]), .C(Oi1O1_2_Z[0]), .D(Oi1O1_3_Z[0]), .Y(OO1O1_0) ); defparam \Oi1O1[0] .INIT=16'hFFFE; // @28:548146 CFG3 O1iIo ( .A(un1_lO1O1), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .C(un5_O1iIo_Z), .Y(O1iIo_Z) ); defparam O1iIo.INIT=8'h80; // @28:548166 CFG3 I1iIo ( .A(un1_lO1O1), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .C(un5_I1iIo_Z), .Y(I1iIo_Z) ); defparam I1iIo.INIT=8'h80; // @28:548086 CFG3 l0iIo ( .A(un1_lO1O1), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .C(un5_l0iIo_Z), .Y(l0iIo_Z) ); defparam l0iIo.INIT=8'h80; // @28:548186 CFG3 l1iIo ( .A(un1_lO1O1), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .C(un5_l1iIo_Z), .Y(l1iIo_Z) ); defparam l1iIo.INIT=8'h80; // @28:548106 CFG3 o0iIo ( .A(un1_lO1O1), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .C(un5_o0iIo_Z), .Y(o0iIo_Z) ); defparam o0iIo.INIT=8'h80; // @28:548126 CFG3 i0iIo ( .A(un1_lO1O1), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .C(un5_i0iIo_Z), .Y(i0iIo_Z) ); defparam i0iIo.INIT=8'h80; // @28:548293 CFG3 OIiIo ( .A(un1_lO1O1), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .C(un5_OIiIo), .Y(OIiIo_Z) ); defparam OIiIo.INIT=8'h80; // @28:548273 CFG3 iOiIo ( .A(un1_lO1O1), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .C(un5_iOiIo), .Y(iOiIo_Z) ); defparam iOiIo.INIT=8'h80; // @31:89 CFG4 \Oi1O1_RNIB7I4J[12] ( .A(un1_lO1O1), .B(un9_Ol0O1[12]), .C(OO1O1[12]), .D(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .Y(io0O1_m[12]) ); defparam \Oi1O1_RNIB7I4J[12] .INIT=16'hEC00; // @31:89 CFG4 \Oi1O1_RNIFBI4J[14] ( .A(un1_lO1O1), .B(un9_Ol0O1[14]), .C(OO1O1[14]), .D(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .Y(io0O1_m[14]) ); defparam \Oi1O1_RNIFBI4J[14] .INIT=16'hEC00; // @31:89 CFG4 \Oi1O1_RNID9I4J[13] ( .A(un1_lO1O1), .B(un9_Ol0O1[13]), .C(OO1O1[13]), .D(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .Y(io0O1_m[13]) ); defparam \Oi1O1_RNID9I4J[13] .INIT=16'hEC00; // @31:89 CFG4 \Oi1O1_RNI73I4J[10] ( .A(un1_lO1O1), .B(un9_Ol0O1[10]), .C(OO1O1[10]), .D(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .Y(io0O1_m[10]) ); defparam \Oi1O1_RNI73I4J[10] .INIT=16'hEC00; // @31:89 CFG4 \Oi1O1_RNI95I4J[11] ( .A(un1_lO1O1), .B(un9_Ol0O1[11]), .C(OO1O1[11]), .D(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .Y(io0O1_m[11]) ); defparam \Oi1O1_RNI95I4J[11] .INIT=16'hEC00; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_TSM_SYSREG_26s_1s_0s */ module CTSE_MAPBE_HST_CNV_26s_0s_1s_0s_16s ( wrdata_0, o0OI1, CoreAPB3_0_0_APBmslave0_PWDATA, i0OI1, O1OI1, l0OI1, I1OI1, CoreAPB3_0_0_APBmslave0_PADDR_5, CoreAPB3_0_0_APBmslave0_PADDR_3, CoreAPB3_0_0_APBmslave0_PADDR_7, CoreAPB3_0_0_APBmslave0_PADDR_6, CoreAPB3_0_0_APBmslave0_PADDR_0, CoreAPB3_0_0_APBmslave0_PADDR_1, io0O1_m, il1I1_0, un149_OOOI1_0, o01I1_4, o01I1_0, un105_OOOI1_4, un105_OOOI1_0, Io1I1_0, O11I1_4, O11I1_0, i11I1_0, oIoI1_4, oIoI1_5, oIoI1_0, oIOI1_1z_4, oIOI1_1z_36, oIOI1_1z_5, oIOI1_1z_37, oIOI1_1z_0, oIOI1_1z_32, oloI1_0, lIl11_5, lIl11_4, lIl11_0, un128_OOOI1_4, un128_OOOI1_0, Oolo1, o0Io1, OOOI1_8_0, OOOI1_7_0, OOOI1_12_0, OOOI1_9_1, OOOI1_9_0, OOOI1_9_2, OOOI1_9_5, OOOI1_10_0, OOOI1_10_2, OOOI1_10_5, OOOI1_10_6, OOOI1_11_0, OOOI1_13_0, OOOI1_14_0, OOOI1_21_0, OOOI1_21_1, OOOI1_21_6, OOOI1_15_7, OOOI1_15_0, OOOI1_30_0, OOOI1_29_0, OOOI1_23_3, OOOI1_23_7, OOOI1_23_0, OOOI1_22_2, OOOI1_22_3, OOOI1_22_7, OOOI1_22_0, OOOI1_16_8, OOOI1_16_1, OOOI1_16_0, OOOI1_16_7, OOOI1_17_1, OOOI1_17_0, OOOI1_17_7, io0O1, OOOI1_28, OOOI1_27_0, OOOI1_27_5, OOOI1_27_2, OOOI1_27_1, OOOI1_20_0, OOOI1_20_1, OOOI1_20_10, OOOI1_20_4, OOOI1_19_6, OOOI1_19_7, OOOI1_19_8, OOOI1_19_0, OOOI1_19_1, OOOI1_18_6, OOOI1_18_2, OOOI1_18_7, OOOI1_18_0, OOOI1_26, OOOI1_25_6, OOOI1_25_1, OOOI1_25_0, OOOI1_10_d0, OOOI1_6, OOOI1_0, paddr_0, PADDR_1z_0, un5_l0iIo_1, un5_l0iIo_2, N_82_2, un5_l1iIo_2, N_1214, un1_IIOO1_2_1, un1_IIOO1_3_1, tx_fifo_write_sig14_i_2, liO0110_i_1, un1_IIOO1_1_2, o1Ol1_2, un5_O1iIo_3, liO019_i_1, un1_ooiO1, Oi0O1, un1_o01O1_0, iPRDATA_0_sqmuxa, CoreAPB3_0_0_APBmslave0_PWRITE_s0, ioOl1, o1Ol1, O0Ol1, oli11, O1Ol1_1z, O0i11, I0o11, ilOl1, I0Ol1, un80_OilI1_0_a2, IoOl1_1z, un18_OilI1_0_a2, N_829, N_159, N_404, N_402, N_280, un1_Ii0O1, CoreAPB3_0_0_APBmslave0_PSELx, CoreAPB3_0_0_APBmslave0_PENABLE, OiO01, IiO01, CoreAPB3_0_0_APBmslave0_PWRITE, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input wrdata_0 ; output [31:0] o0OI1 ; input [31:1] CoreAPB3_0_0_APBmslave0_PWDATA ; output [31:0] i0OI1 ; output [31:0] O1OI1 ; output [5:0] l0OI1 ; output [31:0] I1OI1 ; input CoreAPB3_0_0_APBmslave0_PADDR_5 ; input CoreAPB3_0_0_APBmslave0_PADDR_3 ; input CoreAPB3_0_0_APBmslave0_PADDR_7 ; input CoreAPB3_0_0_APBmslave0_PADDR_6 ; input CoreAPB3_0_0_APBmslave0_PADDR_0 ; input CoreAPB3_0_0_APBmslave0_PADDR_1 ; output [15:0] io0O1_m ; input il1I1_0 ; input un149_OOOI1_0 ; input o01I1_4 ; input o01I1_0 ; input un105_OOOI1_4 ; input un105_OOOI1_0 ; input Io1I1_0 ; input O11I1_4 ; input O11I1_0 ; input i11I1_0 ; input oIoI1_4 ; input oIoI1_5 ; input oIoI1_0 ; input oIOI1_1z_4 ; input oIOI1_1z_36 ; input oIOI1_1z_5 ; input oIOI1_1z_37 ; input oIOI1_1z_0 ; input oIOI1_1z_32 ; input oloI1_0 ; input lIl11_5 ; input lIl11_4 ; input lIl11_0 ; input un128_OOOI1_4 ; input un128_OOOI1_0 ; input [23:22] Oolo1 ; input [3:2] o0Io1 ; input OOOI1_8_0 ; input OOOI1_7_0 ; input OOOI1_12_0 ; input OOOI1_9_1 ; input OOOI1_9_0 ; input OOOI1_9_2 ; input OOOI1_9_5 ; input OOOI1_10_0 ; input OOOI1_10_2 ; input OOOI1_10_5 ; input OOOI1_10_6 ; input OOOI1_11_0 ; input OOOI1_13_0 ; input OOOI1_14_0 ; input OOOI1_21_0 ; input OOOI1_21_1 ; input OOOI1_21_6 ; input OOOI1_15_7 ; input OOOI1_15_0 ; input OOOI1_30_0 ; input OOOI1_29_0 ; input OOOI1_23_3 ; input OOOI1_23_7 ; input OOOI1_23_0 ; input OOOI1_22_2 ; input OOOI1_22_3 ; input OOOI1_22_7 ; input OOOI1_22_0 ; input OOOI1_16_8 ; input OOOI1_16_1 ; input OOOI1_16_0 ; input OOOI1_16_7 ; input OOOI1_17_1 ; input OOOI1_17_0 ; input OOOI1_17_7 ; output [31:16] io0O1 ; input [4:2] OOOI1_28 ; input OOOI1_27_0 ; input OOOI1_27_5 ; input OOOI1_27_2 ; input OOOI1_27_1 ; input OOOI1_20_0 ; input OOOI1_20_1 ; input OOOI1_20_10 ; input OOOI1_20_4 ; input OOOI1_19_6 ; input OOOI1_19_7 ; input OOOI1_19_8 ; input OOOI1_19_0 ; input OOOI1_19_1 ; input OOOI1_18_6 ; input OOOI1_18_2 ; input OOOI1_18_7 ; input OOOI1_18_0 ; input [4:0] OOOI1_26 ; input OOOI1_25_6 ; input OOOI1_25_1 ; input OOOI1_25_0 ; input OOOI1_10_d0 ; input OOOI1_6 ; input OOOI1_0 ; input paddr_0 ; input PADDR_1z_0 ; output un5_l0iIo_1 ; output un5_l0iIo_2 ; output N_82_2 ; output un5_l1iIo_2 ; output N_1214 ; input un1_IIOO1_2_1 ; input un1_IIOO1_3_1 ; input tx_fifo_write_sig14_i_2 ; input liO0110_i_1 ; input un1_IIOO1_1_2 ; input o1Ol1_2 ; input un5_O1iIo_3 ; input liO019_i_1 ; output un1_ooiO1 ; output Oi0O1 ; output un1_o01O1_0 ; input iPRDATA_0_sqmuxa ; output CoreAPB3_0_0_APBmslave0_PWRITE_s0 ; input ioOl1 ; input o1Ol1 ; input O0Ol1 ; input oli11 ; input O1Ol1_1z ; input O0i11 ; input I0o11 ; input ilOl1 ; input I0Ol1 ; input un80_OilI1_0_a2 ; input IoOl1_1z ; input un18_OilI1_0_a2 ; input N_829 ; input N_159 ; input N_404 ; input N_402 ; input N_280 ; output un1_Ii0O1 ; input CoreAPB3_0_0_APBmslave0_PSELx ; input CoreAPB3_0_0_APBmslave0_PENABLE ; input OiO01 ; input IiO01 ; input CoreAPB3_0_0_APBmslave0_PWRITE ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire wrdata_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_5 ; wire CoreAPB3_0_0_APBmslave0_PADDR_3 ; wire CoreAPB3_0_0_APBmslave0_PADDR_7 ; wire CoreAPB3_0_0_APBmslave0_PADDR_6 ; wire CoreAPB3_0_0_APBmslave0_PADDR_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_1 ; wire il1I1_0 ; wire un149_OOOI1_0 ; wire o01I1_4 ; wire o01I1_0 ; wire un105_OOOI1_4 ; wire un105_OOOI1_0 ; wire Io1I1_0 ; wire O11I1_4 ; wire O11I1_0 ; wire i11I1_0 ; wire oIoI1_4 ; wire oIoI1_5 ; wire oIoI1_0 ; wire oIOI1_1z_4 ; wire oIOI1_1z_36 ; wire oIOI1_1z_5 ; wire oIOI1_1z_37 ; wire oIOI1_1z_0 ; wire oIOI1_1z_32 ; wire oloI1_0 ; wire lIl11_5 ; wire lIl11_4 ; wire lIl11_0 ; wire un128_OOOI1_4 ; wire un128_OOOI1_0 ; wire OOOI1_8_0 ; wire OOOI1_7_0 ; wire OOOI1_12_0 ; wire OOOI1_9_1 ; wire OOOI1_9_0 ; wire OOOI1_9_2 ; wire OOOI1_9_5 ; wire OOOI1_10_0 ; wire OOOI1_10_2 ; wire OOOI1_10_5 ; wire OOOI1_10_6 ; wire OOOI1_11_0 ; wire OOOI1_13_0 ; wire OOOI1_14_0 ; wire OOOI1_21_0 ; wire OOOI1_21_1 ; wire OOOI1_21_6 ; wire OOOI1_15_7 ; wire OOOI1_15_0 ; wire OOOI1_30_0 ; wire OOOI1_29_0 ; wire OOOI1_23_3 ; wire OOOI1_23_7 ; wire OOOI1_23_0 ; wire OOOI1_22_2 ; wire OOOI1_22_3 ; wire OOOI1_22_7 ; wire OOOI1_22_0 ; wire OOOI1_16_8 ; wire OOOI1_16_1 ; wire OOOI1_16_0 ; wire OOOI1_16_7 ; wire OOOI1_17_1 ; wire OOOI1_17_0 ; wire OOOI1_17_7 ; wire OOOI1_27_0 ; wire OOOI1_27_5 ; wire OOOI1_27_2 ; wire OOOI1_27_1 ; wire OOOI1_20_0 ; wire OOOI1_20_1 ; wire OOOI1_20_10 ; wire OOOI1_20_4 ; wire OOOI1_19_6 ; wire OOOI1_19_7 ; wire OOOI1_19_8 ; wire OOOI1_19_0 ; wire OOOI1_19_1 ; wire OOOI1_18_6 ; wire OOOI1_18_2 ; wire OOOI1_18_7 ; wire OOOI1_18_0 ; wire OOOI1_25_6 ; wire OOOI1_25_1 ; wire OOOI1_25_0 ; wire OOOI1_10_d0 ; wire OOOI1_6 ; wire OOOI1_0 ; wire paddr_0 ; wire PADDR_1z_0 ; wire un5_l0iIo_1 ; wire un5_l0iIo_2 ; wire N_82_2 ; wire un5_l1iIo_2 ; wire N_1214 ; wire un1_IIOO1_2_1 ; wire un1_IIOO1_3_1 ; wire tx_fifo_write_sig14_i_2 ; wire liO0110_i_1 ; wire un1_IIOO1_1_2 ; wire o1Ol1_2 ; wire un5_O1iIo_3 ; wire liO019_i_1 ; wire un1_ooiO1 ; wire Oi0O1 ; wire un1_o01O1_0 ; wire iPRDATA_0_sqmuxa ; wire CoreAPB3_0_0_APBmslave0_PWRITE_s0 ; wire ioOl1 ; wire o1Ol1 ; wire O0Ol1 ; wire oli11 ; wire O1Ol1_1z ; wire O0i11 ; wire I0o11 ; wire ilOl1 ; wire I0Ol1 ; wire un80_OilI1_0_a2 ; wire IoOl1_1z ; wire un18_OilI1_0_a2 ; wire N_829 ; wire N_159 ; wire N_404 ; wire N_402 ; wire N_280 ; wire un1_Ii0O1 ; wire CoreAPB3_0_0_APBmslave0_PSELx ; wire CoreAPB3_0_0_APBmslave0_PENABLE ; wire OiO01 ; wire IiO01 ; wire CoreAPB3_0_0_APBmslave0_PWRITE ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [19:0] OO1O1; wire [14:10] un9_Ol0O1; wire [26:26] Oi1O1_4; wire [31:9] Oi1O1_3; wire [31:9] Oi1O1_2; wire [31:9] Oi1O1_1; wire Il1O1_Z ; wire GND ; wire Il1O1_3_Z ; wire VCC ; wire Il1O1_3_5_Z ; wire Il1O1_3_1_Z ; wire N_14981 ; wire un1_lO1O1 ; // @28:429358 SLE Il1O1 ( .Q(Il1O1_Z), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Il1O1_3_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:429368 CFG4 Il1O1_3_5 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_5), .B(CoreAPB3_0_0_APBmslave0_PADDR_3), .C(PADDR_1z_0), .D(CoreAPB3_0_0_APBmslave0_PWRITE), .Y(Il1O1_3_5_Z) ); defparam Il1O1_3_5.INIT=16'hFFFE; // @28:429368 CFG3 Il1O1_3_1 ( .A(IiO01), .B(CoreAPB3_0_0_APBmslave0_PADDR_7), .C(OiO01), .Y(Il1O1_3_1_Z) ); defparam Il1O1_3_1.INIT=8'hFE; // @28:429368 CFG4 Il1O1_3 ( .A(Il1O1_3_1_Z), .B(CoreAPB3_0_0_APBmslave0_PADDR_6), .C(paddr_0), .D(Il1O1_3_5_Z), .Y(Il1O1_3_Z) ); defparam Il1O1_3.INIT=16'hFFBF; // @28:429446 CFG3 \I01O1.un1_Ii0O1 ( .A(Il1O1_Z), .B(CoreAPB3_0_0_APBmslave0_PENABLE), .C(CoreAPB3_0_0_APBmslave0_PSELx), .Y(un1_Ii0O1) ); defparam \I01O1.un1_Ii0O1 .INIT=8'h80; // @28:429582 CTSE_DECODER l01O1 ( .io0O1_m_3(io0O1_m[3]), .io0O1_m_6(io0O1_m[6]), .io0O1_m_7(io0O1_m[7]), .io0O1_m_8(io0O1_m[8]), .io0O1_m_15(io0O1_m[15]), .io0O1_m_2(io0O1_m[2]), .io0O1_m_5(io0O1_m[5]), .io0O1_m_4(io0O1_m[4]), .io0O1_m_9(io0O1_m[9]), .io0O1_m_1(io0O1_m[1]), .io0O1_m_0(io0O1_m[0]), .OO1O1_19(OO1O1[19]), .OO1O1_3(OO1O1[3]), .OO1O1_6(OO1O1[6]), .OO1O1_7(OO1O1[7]), .OO1O1_8(OO1O1[8]), .OO1O1_2(OO1O1[2]), .OO1O1_5(OO1O1[5]), .OO1O1_4(OO1O1[4]), .OO1O1_1(OO1O1[1]), .OO1O1_0(OO1O1[0]), .OOOI1_10_d0(OOOI1_10_d0), .OOOI1_6(OOOI1_6), .OOOI1_0(OOOI1_0), .OOOI1_25_6(OOOI1_25_6), .OOOI1_25_1(OOOI1_25_1), .OOOI1_25_0(OOOI1_25_0), .OOOI1_26({OOOI1_26[4:3], N_14981, OOOI1_26[1:0]}), .un9_Ol0O1(un9_Ol0O1[14:10]), .OOOI1_18_6(OOOI1_18_6), .OOOI1_18_2(OOOI1_18_2), .OOOI1_18_7(OOOI1_18_7), .OOOI1_18_0(OOOI1_18_0), .OOOI1_19_6(OOOI1_19_6), .OOOI1_19_7(OOOI1_19_7), .OOOI1_19_8(OOOI1_19_8), .OOOI1_19_0(OOOI1_19_0), .OOOI1_19_1(OOOI1_19_1), .OOOI1_20_0(OOOI1_20_0), .OOOI1_20_1(OOOI1_20_1), .OOOI1_20_10(OOOI1_20_10), .OOOI1_20_4(OOOI1_20_4), .OOOI1_27_0(OOOI1_27_0), .OOOI1_27_5(OOOI1_27_5), .OOOI1_27_2(OOOI1_27_2), .OOOI1_27_1(OOOI1_27_1), .OOOI1_28(OOOI1_28[4:2]), .io0O1(io0O1[31:16]), .OOOI1_17_1(OOOI1_17_1), .OOOI1_17_0(OOOI1_17_0), .OOOI1_17_7(OOOI1_17_7), .OOOI1_16_8(OOOI1_16_8), .OOOI1_16_1(OOOI1_16_1), .OOOI1_16_0(OOOI1_16_0), .OOOI1_16_7(OOOI1_16_7), .OOOI1_22_2(OOOI1_22_2), .OOOI1_22_3(OOOI1_22_3), .OOOI1_22_7(OOOI1_22_7), .OOOI1_22_0(OOOI1_22_0), .OOOI1_23_3(OOOI1_23_3), .OOOI1_23_7(OOOI1_23_7), .OOOI1_23_0(OOOI1_23_0), .OOOI1_29_0(OOOI1_29_0), .OOOI1_30_0(OOOI1_30_0), .OOOI1_15_7(OOOI1_15_7), .OOOI1_15_0(OOOI1_15_0), .OOOI1_21_0(OOOI1_21_0), .OOOI1_21_1(OOOI1_21_1), .OOOI1_21_6(OOOI1_21_6), .OOOI1_14_0(OOOI1_14_0), .OOOI1_13_0(OOOI1_13_0), .OOOI1_11_0(OOOI1_11_0), .OOOI1_10_0(OOOI1_10_0), .OOOI1_10_2(OOOI1_10_2), .OOOI1_10_5(OOOI1_10_5), .OOOI1_10_6(OOOI1_10_6), .OOOI1_9_1(OOOI1_9_1), .OOOI1_9_0(OOOI1_9_0), .OOOI1_9_2(OOOI1_9_2), .OOOI1_9_5(OOOI1_9_5), .OOOI1_12_0(OOOI1_12_0), .Oi1O1_4_0(Oi1O1_4[26]), .Oi1O1_3_0(Oi1O1_3[9]), .Oi1O1_3_6(Oi1O1_3[15]), .Oi1O1_3_15(Oi1O1_3[24]), .Oi1O1_3_19(Oi1O1_3[28]), .Oi1O1_3_20(Oi1O1_3[29]), .Oi1O1_3_7(Oi1O1_3[16]), .Oi1O1_3_8(Oi1O1_3[17]), .Oi1O1_3_12(Oi1O1_3[21]), .Oi1O1_3_14(Oi1O1_3[23]), .Oi1O1_3_16(Oi1O1_3[25]), .Oi1O1_3_21(Oi1O1_3[30]), .Oi1O1_3_22(Oi1O1_3[31]), .Oi1O1_3_13(Oi1O1_3[22]), .Oi1O1_3_9(Oi1O1_3[18]), .Oi1O1_3_11(Oi1O1_3[20]), .Oi1O1_3_18(Oi1O1_3[27]), .Oi1O1_3_17(Oi1O1_3[26]), .OOOI1_7_0(OOOI1_7_0), .OOOI1_8_0(OOOI1_8_0), .o0Io1(o0Io1[3:2]), .Oolo1(Oolo1[23:22]), .un128_OOOI1_4(un128_OOOI1_4), .un128_OOOI1_0(un128_OOOI1_0), .lIl11_5(lIl11_5), .lIl11_4(lIl11_4), .lIl11_0(lIl11_0), .oloI1_0(oloI1_0), .oIOI1_4(oIOI1_1z_4), .oIOI1_36(oIOI1_1z_36), .oIOI1_5(oIOI1_1z_5), .oIOI1_37(oIOI1_1z_37), .oIOI1_0(oIOI1_1z_0), .oIOI1_32(oIOI1_1z_32), .oIoI1_1z_4(oIoI1_4), .oIoI1_1z_5(oIoI1_5), .oIoI1_1z_0(oIoI1_0), .i11I1_0(i11I1_0), .O11I1_4(O11I1_4), .O11I1_0(O11I1_0), .Io1I1_0(Io1I1_0), .un105_OOOI1_4(un105_OOOI1_4), .un105_OOOI1_0(un105_OOOI1_0), .o01I1_4(o01I1_4), .o01I1_0(o01I1_0), .un149_OOOI1_0(un149_OOOI1_0), .il1I1_0(il1I1_0), .Oi1O1_2_0(Oi1O1_2[9]), .Oi1O1_2_6(Oi1O1_2[15]), .Oi1O1_2_15(Oi1O1_2[24]), .Oi1O1_2_19(Oi1O1_2[28]), .Oi1O1_2_20(Oi1O1_2[29]), .Oi1O1_2_7(Oi1O1_2[16]), .Oi1O1_2_8(Oi1O1_2[17]), .Oi1O1_2_12(Oi1O1_2[21]), .Oi1O1_2_14(Oi1O1_2[23]), .Oi1O1_2_16(Oi1O1_2[25]), .Oi1O1_2_21(Oi1O1_2[30]), .Oi1O1_2_22(Oi1O1_2[31]), .Oi1O1_2_13(Oi1O1_2[22]), .Oi1O1_2_9(Oi1O1_2[18]), .Oi1O1_2_11(Oi1O1_2[20]), .Oi1O1_2_18(Oi1O1_2[27]), .Oi1O1_1_0(Oi1O1_1[9]), .Oi1O1_1_6(Oi1O1_1[15]), .Oi1O1_1_15(Oi1O1_1[24]), .Oi1O1_1_19(Oi1O1_1[28]), .Oi1O1_1_20(Oi1O1_1[29]), .Oi1O1_1_7(Oi1O1_1[16]), .Oi1O1_1_8(Oi1O1_1[17]), .Oi1O1_1_12(Oi1O1_1[21]), .Oi1O1_1_14(Oi1O1_1[23]), .Oi1O1_1_16(Oi1O1_1[25]), .Oi1O1_1_21(Oi1O1_1[30]), .Oi1O1_1_22(Oi1O1_1[31]), .Oi1O1_1_13(Oi1O1_1[22]), .Oi1O1_1_9(Oi1O1_1[18]), .Oi1O1_1_11(Oi1O1_1[20]), .Oi1O1_1_18(Oi1O1_1[27]), .CoreAPB3_0_0_APBmslave0_PADDR({CoreAPB3_0_0_APBmslave0_PADDR_7, CoreAPB3_0_0_APBmslave0_PADDR_6, CoreAPB3_0_0_APBmslave0_PADDR_5}), .paddr_0(paddr_0), .N_280(N_280), .N_402(N_402), .N_404(N_404), .N_159(N_159), .N_829(N_829), .un18_OilI1_0_a2(un18_OilI1_0_a2), .IoOl1(IoOl1_1z), .un80_OilI1_0_a2(un80_OilI1_0_a2), .I0Ol1(I0Ol1), .ilOl1(ilOl1), .I0o11(I0o11), .O0i11(O0i11), .O1Ol1(O1Ol1_1z), .oli11(oli11), .O0Ol1(O0Ol1), .o1Ol1_1z(o1Ol1), .ioOl1_1z(ioOl1), .CoreAPB3_0_0_APBmslave0_PSELx(CoreAPB3_0_0_APBmslave0_PSELx), .CoreAPB3_0_0_APBmslave0_PENABLE(CoreAPB3_0_0_APBmslave0_PENABLE), .Il1O1(Il1O1_Z), .un1_Ii0O1(un1_Ii0O1), .CoreAPB3_0_0_APBmslave0_PWRITE_s0(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .CoreAPB3_0_0_APBmslave0_PWRITE(CoreAPB3_0_0_APBmslave0_PWRITE), .iPRDATA_0_sqmuxa(iPRDATA_0_sqmuxa), .un1_o01O1_0_1z(un1_o01O1_0), .Oi0O1(Oi0O1), .un1_lO1O1_1z(un1_lO1O1), .un1_ooiO1(un1_ooiO1), .liO019_i_1(liO019_i_1) ); // @28:429749 CTSE_TSM_SYSREG_26s_1s_0s I11O1 ( .io0O1_m(io0O1_m[14:10]), .un9_Ol0O1(un9_Ol0O1[14:10]), .OO1O1_3(OO1O1[3]), .OO1O1_6(OO1O1[6]), .OO1O1_8(OO1O1[8]), .OO1O1_7(OO1O1[7]), .OO1O1_4(OO1O1[4]), .OO1O1_2(OO1O1[2]), .OO1O1_5(OO1O1[5]), .OO1O1_1(OO1O1[1]), .OO1O1_19(OO1O1[19]), .OO1O1_0(OO1O1[0]), .Oi1O1_3_18(Oi1O1_3[27]), .Oi1O1_3_19(Oi1O1_3[28]), .Oi1O1_3_20(Oi1O1_3[29]), .Oi1O1_3_15(Oi1O1_3[24]), .Oi1O1_3_17(Oi1O1_3[26]), .Oi1O1_3_9(Oi1O1_3[18]), .Oi1O1_3_16(Oi1O1_3[25]), .Oi1O1_3_11(Oi1O1_3[20]), .Oi1O1_3_14(Oi1O1_3[23]), .Oi1O1_3_6(Oi1O1_3[15]), .Oi1O1_3_12(Oi1O1_3[21]), .Oi1O1_3_0(Oi1O1_3[9]), .Oi1O1_3_8(Oi1O1_3[17]), .Oi1O1_3_22(Oi1O1_3[31]), .Oi1O1_3_21(Oi1O1_3[30]), .Oi1O1_3_13(Oi1O1_3[22]), .Oi1O1_3_7(Oi1O1_3[16]), .Oi1O1_4_0(Oi1O1_4[26]), .Oi1O1_1_18(Oi1O1_1[27]), .Oi1O1_1_19(Oi1O1_1[28]), .Oi1O1_1_20(Oi1O1_1[29]), .Oi1O1_1_15(Oi1O1_1[24]), .Oi1O1_1_9(Oi1O1_1[18]), .Oi1O1_1_16(Oi1O1_1[25]), .Oi1O1_1_11(Oi1O1_1[20]), .Oi1O1_1_14(Oi1O1_1[23]), .Oi1O1_1_6(Oi1O1_1[15]), .Oi1O1_1_12(Oi1O1_1[21]), .Oi1O1_1_0(Oi1O1_1[9]), .Oi1O1_1_8(Oi1O1_1[17]), .Oi1O1_1_22(Oi1O1_1[31]), .Oi1O1_1_21(Oi1O1_1[30]), .Oi1O1_1_13(Oi1O1_1[22]), .Oi1O1_1_7(Oi1O1_1[16]), .Oi1O1_2_18(Oi1O1_2[27]), .Oi1O1_2_19(Oi1O1_2[28]), .Oi1O1_2_20(Oi1O1_2[29]), .Oi1O1_2_15(Oi1O1_2[24]), .Oi1O1_2_9(Oi1O1_2[18]), .Oi1O1_2_16(Oi1O1_2[25]), .Oi1O1_2_11(Oi1O1_2[20]), .Oi1O1_2_14(Oi1O1_2[23]), .Oi1O1_2_6(Oi1O1_2[15]), .Oi1O1_2_12(Oi1O1_2[21]), .Oi1O1_2_0(Oi1O1_2[9]), .Oi1O1_2_8(Oi1O1_2[17]), .Oi1O1_2_22(Oi1O1_2[31]), .Oi1O1_2_21(Oi1O1_2[30]), .Oi1O1_2_13(Oi1O1_2[22]), .Oi1O1_2_7(Oi1O1_2[16]), .CoreAPB3_0_0_APBmslave0_PADDR_0(CoreAPB3_0_0_APBmslave0_PADDR_0), .CoreAPB3_0_0_APBmslave0_PADDR_1(CoreAPB3_0_0_APBmslave0_PADDR_1), .CoreAPB3_0_0_APBmslave0_PADDR_3(CoreAPB3_0_0_APBmslave0_PADDR_3), .PADDR_0(PADDR_1z_0), .paddr_1z_0(paddr_0), .I1OI1(I1OI1[31:0]), .l0OI1(l0OI1[5:0]), .O1OI1(O1OI1[31:0]), .i0OI1(i0OI1[31:0]), .CoreAPB3_0_0_APBmslave0_PWDATA(CoreAPB3_0_0_APBmslave0_PWDATA[31:1]), .o0OI1(o0OI1[31:0]), .wrdata_0(wrdata_0), .CoreAPB3_0_0_APBmslave0_PWRITE_s0(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .CoreAPB3_0_0_APBmslave0_PWRITE(CoreAPB3_0_0_APBmslave0_PWRITE), .un1_lO1O1(un1_lO1O1), .un5_O1iIo_3(un5_O1iIo_3), .o1Ol1_2(o1Ol1_2), .un1_IIOO1_1_2(un1_IIOO1_1_2), .liO0110_i_1(liO0110_i_1), .tx_fifo_write_sig14_i_2(tx_fifo_write_sig14_i_2), .un1_IIOO1_3_1(un1_IIOO1_3_1), .un1_IIOO1_2_1(un1_IIOO1_2_1), .N_1214(N_1214), .un5_l1iIo_2(un5_l1iIo_2), .N_82_2(N_82_2), .un5_l0iIo_2_1z(un5_l0iIo_2), .un5_l0iIo_1_1z(un5_l0iIo_1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_MAPBE_HST_CNV_26s_0s_1s_0s_16s */ module CTSE_AMCXTFIF_FAB_26s_11s_32s_2s_0_0_1s ( oIoI1, CORETSE_0_MRXBYTEVALID, IIoI1, o00i0, l00i0, ll1I1, lo0I1, CORETSE_0_MRXEOF, lIoI1, Il1I1_1z, OI1I1_1z, oo0I1_1z, i10I1, IOoI1, PF_CCC_0_0_OUT0_FABCLK_0, I0oI1_i, O00i0_i ) ; input [39:0] oIoI1 ; input [1:0] CORETSE_0_MRXBYTEVALID ; input [12:0] IIoI1 ; output [39:0] o00i0 ; output [10:0] l00i0 ; output [11:0] ll1I1 ; output [11:0] lo0I1 ; input CORETSE_0_MRXEOF ; input lIoI1 ; output Il1I1_1z ; output OI1I1_1z ; output oo0I1_1z ; input i10I1 ; input IOoI1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input I0oI1_i ; output O00i0_i ; wire CORETSE_0_MRXEOF ; wire lIoI1 ; wire Il1I1_1z ; wire OI1I1_1z ; wire oo0I1_1z ; wire i10I1 ; wire IOoI1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire I0oI1_i ; wire O00i0_i ; wire [11:0] O01l1_Z; wire [39:0] lOII1_2; wire [10:0] IOII1_2_Z; wire [34:32] lOII1_2_Z; wire I11l1_Z ; wire I11l1_i ; wire O00i0 ; wire i11l1_Z ; wire VCC ; wire GND ; wire O11l1_Z ; wire l01l1_Z ; wire Oo1l1_Z ; wire un6_IOII1_Z ; wire lOol1_Z ; wire IOol1_Z ; wire lo0I15_Z ; wire I01l112_Z ; wire N_7394 ; wire N_7393 ; wire N_7392 ; wire N_795 ; wire N_792 ; wire N_74 ; wire N_73 ; wire N_72 ; wire N_71 ; wire N_70 ; wire N_69 ; wire N_68 ; wire N_67 ; wire N_66 ; wire N_65 ; wire N_64 ; wire N_63 ; wire N_62 ; wire N_61 ; wire N_60 ; wire N_59 ; wire N_58 ; wire N_57 ; wire N_56 ; wire N_55 ; wire N_54 ; wire N_53 ; wire N_52 ; wire N_51 ; wire N_50 ; wire N_49 ; wire N_48 ; wire N_47 ; wire N_46 ; wire N_45 ; wire N_44 ; wire N_43 ; wire N_42 ; wire N_41 ; wire N_40 ; wire N_39 ; wire N_38 ; wire N_37 ; wire N_89 ; wire N_88 ; wire N_87 ; wire N_86 ; wire N_85 ; wire N_84 ; wire N_83 ; wire N_82 ; wire N_81 ; wire N_80 ; wire N_79 ; wire N_78 ; wire N_77 ; wire N_76 ; wire N_75 ; wire N_74_0 ; wire N_73_0 ; wire N_72_0 ; wire N_71_0 ; wire N_70_0 ; wire N_69_0 ; wire N_68_0 ; wire N_67_0 ; wire N_66_0 ; wire N_65_0 ; wire N_64_0 ; wire N_63_0 ; wire N_62_0 ; wire N_61_0 ; wire N_60_0 ; wire N_59_0 ; wire N_58_0 ; wire N_57_0 ; wire N_56_0 ; wire N_55_0 ; wire N_54_0 ; CFG1 l01l1_RNO ( .A(I11l1_Z), .Y(I11l1_i) ); defparam l01l1_RNO.INIT=2'h1; CFG1 OOII1_RNI45S85 ( .A(O00i0), .Y(O00i0_i) ); defparam OOII1_RNI45S85.INIT=2'h1; // @28:448930 SLE i11l1 ( .Q(i11l1_Z), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOoI1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:448802 SLE O11l1 ( .Q(O11l1_Z), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(i10I1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:448718 (* cdc_synchronizer=1 *) SLE oo0I1 ( .Q(oo0I1_1z), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(l01l1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:449153 SLE OI1I1 ( .Q(OI1I1_1z), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Oo1l1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447818 SLE OOII1 ( .Q(O00i0), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un6_IOII1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:449058 SLE Il1I1 ( .Q(Il1I1_1z), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOol1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:449026 SLE lOol1 ( .Q(lOol1_Z), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOol1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:448962 SLE Oo1l1 ( .Q(Oo1l1_Z), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(i11l1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:448834 SLE I11l1 ( .Q(I11l1_Z), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O11l1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:448671 SLE l01l1 ( .Q(l01l1_Z), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(I11l1_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:448994 SLE IOol1 ( .Q(IOol1_Z), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIoI1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:448628 SLE \lo0I1_Z[0] ( .Q(lo0I1[0]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O01l1_Z[0]), .EN(lo0I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:448572 SLE \O01l1[3] ( .Q(O01l1_Z[3]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ll1I1[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:448572 SLE \O01l1[2] ( .Q(O01l1_Z[2]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ll1I1[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:448572 SLE \O01l1[1] ( .Q(O01l1_Z[1]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ll1I1[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:448572 SLE \O01l1[0] ( .Q(O01l1_Z[0]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ll1I1[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:448628 SLE \lo0I1_Z[11] ( .Q(lo0I1[11]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O01l1_Z[11]), .EN(lo0I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:448628 SLE \lo0I1_Z[10] ( .Q(lo0I1[10]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O01l1_Z[10]), .EN(lo0I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:448628 SLE \lo0I1_Z[9] ( .Q(lo0I1[9]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O01l1_Z[9]), .EN(lo0I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:448628 SLE \lo0I1_Z[8] ( .Q(lo0I1[8]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O01l1_Z[8]), .EN(lo0I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:448628 SLE \lo0I1_Z[7] ( .Q(lo0I1[7]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O01l1_Z[7]), .EN(lo0I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:448628 SLE \lo0I1_Z[6] ( .Q(lo0I1[6]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O01l1_Z[6]), .EN(lo0I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:448628 SLE \lo0I1_Z[5] ( .Q(lo0I1[5]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O01l1_Z[5]), .EN(lo0I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:448628 SLE \lo0I1_Z[4] ( .Q(lo0I1[4]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O01l1_Z[4]), .EN(lo0I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:448628 SLE \lo0I1_Z[3] ( .Q(lo0I1[3]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O01l1_Z[3]), .EN(lo0I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:448628 SLE \lo0I1_Z[2] ( .Q(lo0I1[2]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O01l1_Z[2]), .EN(lo0I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:448628 SLE \lo0I1_Z[1] ( .Q(lo0I1[1]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O01l1_Z[1]), .EN(lo0I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:448572 SLE \O01l1[11] ( .Q(O01l1_Z[11]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ll1I1[11]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:448572 SLE \O01l1[10] ( .Q(O01l1_Z[10]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ll1I1[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:448572 SLE \O01l1[9] ( .Q(O01l1_Z[9]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ll1I1[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:448572 SLE \O01l1[8] ( .Q(O01l1_Z[8]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ll1I1[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:448572 SLE \O01l1[7] ( .Q(O01l1_Z[7]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ll1I1[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:448572 SLE \O01l1[6] ( .Q(O01l1_Z[6]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ll1I1[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:448572 SLE \O01l1[5] ( .Q(O01l1_Z[5]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ll1I1[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:448572 SLE \O01l1[4] ( .Q(O01l1_Z[4]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ll1I1[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447978 SLE \I01l1[11] ( .Q(ll1I1[11]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IIoI1[11]), .EN(I01l112_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447978 SLE \I01l1[10] ( .Q(ll1I1[10]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IIoI1[10]), .EN(I01l112_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447978 SLE \I01l1[9] ( .Q(ll1I1[9]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IIoI1[9]), .EN(I01l112_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447978 SLE \I01l1[8] ( .Q(ll1I1[8]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IIoI1[8]), .EN(I01l112_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447978 SLE \I01l1[7] ( .Q(ll1I1[7]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IIoI1[7]), .EN(I01l112_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447978 SLE \I01l1[6] ( .Q(ll1I1[6]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IIoI1[6]), .EN(I01l112_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447978 SLE \I01l1[5] ( .Q(ll1I1[5]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IIoI1[5]), .EN(I01l112_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447978 SLE \I01l1[4] ( .Q(ll1I1[4]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IIoI1[4]), .EN(I01l112_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447978 SLE \I01l1[3] ( .Q(ll1I1[3]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IIoI1[3]), .EN(I01l112_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447978 SLE \I01l1[2] ( .Q(ll1I1[2]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IIoI1[2]), .EN(I01l112_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447978 SLE \I01l1[1] ( .Q(ll1I1[1]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IIoI1[1]), .EN(I01l112_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447978 SLE \I01l1[0] ( .Q(ll1I1[0]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IIoI1[0]), .EN(I01l112_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[0] ( .Q(o00i0[0]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447621 SLE \IOII1[10] ( .Q(l00i0[10]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOII1_2_Z[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447621 SLE \IOII1[9] ( .Q(l00i0[9]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOII1_2_Z[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447621 SLE \IOII1[8] ( .Q(l00i0[8]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOII1_2_Z[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447621 SLE \IOII1[7] ( .Q(l00i0[7]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOII1_2_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447621 SLE \IOII1[6] ( .Q(l00i0[6]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOII1_2_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447621 SLE \IOII1[5] ( .Q(l00i0[5]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOII1_2_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447621 SLE \IOII1[4] ( .Q(l00i0[4]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOII1_2_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447621 SLE \IOII1[3] ( .Q(l00i0[3]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOII1_2_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447621 SLE \IOII1[2] ( .Q(l00i0[2]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOII1_2_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447621 SLE \IOII1[1] ( .Q(l00i0[1]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOII1_2_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447621 SLE \IOII1[0] ( .Q(l00i0[0]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOII1_2_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[15] ( .Q(o00i0[15]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[15]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[14] ( .Q(o00i0[14]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[14]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[13] ( .Q(o00i0[13]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[13]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[12] ( .Q(o00i0[12]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[12]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[11] ( .Q(o00i0[11]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[11]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[10] ( .Q(o00i0[10]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[9] ( .Q(o00i0[9]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[8] ( .Q(o00i0[8]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[7] ( .Q(o00i0[7]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[6] ( .Q(o00i0[6]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[5] ( .Q(o00i0[5]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[4] ( .Q(o00i0[4]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[3] ( .Q(o00i0[3]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[2] ( .Q(o00i0[2]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[1] ( .Q(o00i0[1]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[30] ( .Q(o00i0[30]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[30]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[29] ( .Q(o00i0[29]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[29]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[28] ( .Q(o00i0[28]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[28]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[27] ( .Q(o00i0[27]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[27]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[26] ( .Q(o00i0[26]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[26]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[25] ( .Q(o00i0[25]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[25]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[24] ( .Q(o00i0[24]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[24]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[23] ( .Q(o00i0[23]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[23]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[22] ( .Q(o00i0[22]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[22]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[21] ( .Q(o00i0[21]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[21]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[20] ( .Q(o00i0[20]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[20]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[19] ( .Q(o00i0[19]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[19]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[18] ( .Q(o00i0[18]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[18]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[17] ( .Q(o00i0[17]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[17]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[16] ( .Q(o00i0[16]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[16]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[39] ( .Q(o00i0[39]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[39]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[38] ( .Q(o00i0[38]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[38]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[37] ( .Q(o00i0[37]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[37]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[36] ( .Q(o00i0[36]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[36]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[35] ( .Q(o00i0[35]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[35]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[34] ( .Q(o00i0[34]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2_Z[34]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[33] ( .Q(o00i0[33]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2_Z[33]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[32] ( .Q(o00i0[32]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2_Z[32]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:447706 SLE \lOII1[31] ( .Q(o00i0[31]), .ADn(VCC), .ALn(I0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOII1_2[31]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:448654 CFG2 lo0I15 ( .A(I11l1_Z), .B(l01l1_Z), .Y(lo0I15_Z) ); defparam lo0I15.INIT=4'h1; // @28:447651 CFG3 un6_IOII1 ( .A(Il1I1_1z), .B(lOol1_Z), .C(IIoI1[12]), .Y(un6_IOII1_Z) ); defparam un6_IOII1.INIT=8'hFB; // @28:448003 CFG3 I01l112 ( .A(Il1I1_1z), .B(lOol1_Z), .C(IIoI1[12]), .Y(I01l112_Z) ); defparam I01l112.INIT=8'h40; // @28:447790 CFG2 \un12_lOII1[13] ( .A(un6_IOII1_Z), .B(oIoI1[13]), .Y(lOII1_2[13]) ); defparam \un12_lOII1[13] .INIT=4'h4; // @28:447790 CFG2 \un12_lOII1[14] ( .A(un6_IOII1_Z), .B(oIoI1[14]), .Y(lOII1_2[14]) ); defparam \un12_lOII1[14] .INIT=4'h4; // @28:447790 CFG2 \un12_lOII1[15] ( .A(un6_IOII1_Z), .B(oIoI1[15]), .Y(lOII1_2[15]) ); defparam \un12_lOII1[15] .INIT=4'h4; // @28:447790 CFG2 \un12_lOII1[16] ( .A(un6_IOII1_Z), .B(oIoI1[16]), .Y(lOII1_2[16]) ); defparam \un12_lOII1[16] .INIT=4'h4; // @28:447790 CFG2 \un12_lOII1[21] ( .A(un6_IOII1_Z), .B(oIoI1[21]), .Y(lOII1_2[21]) ); defparam \un12_lOII1[21] .INIT=4'h4; // @28:447790 CFG2 \un12_lOII1[30] ( .A(un6_IOII1_Z), .B(oIoI1[30]), .Y(lOII1_2[30]) ); defparam \un12_lOII1[30] .INIT=4'h4; // @28:447790 CFG2 \un12_lOII1[37] ( .A(un6_IOII1_Z), .B(oIoI1[37]), .Y(lOII1_2[37]) ); defparam \un12_lOII1[37] .INIT=4'h4; // @28:447790 CFG2 \un12_lOII1[39] ( .A(un6_IOII1_Z), .B(oIoI1[39]), .Y(lOII1_2[39]) ); defparam \un12_lOII1[39] .INIT=4'h4; // @28:447790 CFG2 \un12_lOII1[31] ( .A(un6_IOII1_Z), .B(oIoI1[31]), .Y(lOII1_2[31]) ); defparam \un12_lOII1[31] .INIT=4'h4; // @28:447790 CFG2 \un12_lOII1[29] ( .A(un6_IOII1_Z), .B(oIoI1[29]), .Y(lOII1_2[29]) ); defparam \un12_lOII1[29] .INIT=4'h4; // @28:447790 CFG2 \un12_lOII1[28] ( .A(un6_IOII1_Z), .B(oIoI1[28]), .Y(lOII1_2[28]) ); defparam \un12_lOII1[28] .INIT=4'h4; // @28:447790 CFG2 \un12_lOII1[25] ( .A(un6_IOII1_Z), .B(oIoI1[25]), .Y(lOII1_2[25]) ); defparam \un12_lOII1[25] .INIT=4'h4; // @28:447790 CFG2 \un12_lOII1[24] ( .A(un6_IOII1_Z), .B(oIoI1[24]), .Y(lOII1_2[24]) ); defparam \un12_lOII1[24] .INIT=4'h4; // @28:447790 CFG2 \un12_lOII1[23] ( .A(un6_IOII1_Z), .B(oIoI1[23]), .Y(lOII1_2[23]) ); defparam \un12_lOII1[23] .INIT=4'h4; // @28:447790 CFG2 \un12_lOII1[17] ( .A(un6_IOII1_Z), .B(oIoI1[17]), .Y(lOII1_2[17]) ); defparam \un12_lOII1[17] .INIT=4'h4; // @28:447790 CFG2 \un12_lOII1[12] ( .A(un6_IOII1_Z), .B(oIoI1[12]), .Y(lOII1_2[12]) ); defparam \un12_lOII1[12] .INIT=4'h4; // @28:447790 CFG2 \un12_lOII1[11] ( .A(un6_IOII1_Z), .B(oIoI1[11]), .Y(lOII1_2[11]) ); defparam \un12_lOII1[11] .INIT=4'h4; // @28:447790 CFG2 \un12_lOII1[7] ( .A(un6_IOII1_Z), .B(oIoI1[7]), .Y(lOII1_2[7]) ); defparam \un12_lOII1[7] .INIT=4'h4; // @28:447790 CFG2 \un12_lOII1[1] ( .A(un6_IOII1_Z), .B(oIoI1[1]), .Y(lOII1_2[1]) ); defparam \un12_lOII1[1] .INIT=4'h4; // @28:447790 CFG2 \un12_lOII1[2] ( .A(un6_IOII1_Z), .B(oIoI1[2]), .Y(lOII1_2[2]) ); defparam \un12_lOII1[2] .INIT=4'h4; // @28:447790 CFG2 \un12_lOII1[3] ( .A(un6_IOII1_Z), .B(oIoI1[3]), .Y(lOII1_2[3]) ); defparam \un12_lOII1[3] .INIT=4'h4; // @28:447790 CFG2 \un12_lOII1[4] ( .A(un6_IOII1_Z), .B(oIoI1[4]), .Y(lOII1_2[4]) ); defparam \un12_lOII1[4] .INIT=4'h4; // @28:447790 CFG2 \un12_lOII1[22] ( .A(un6_IOII1_Z), .B(oIoI1[22]), .Y(lOII1_2[22]) ); defparam \un12_lOII1[22] .INIT=4'h4; // @28:447790 CFG2 \un12_lOII1[38] ( .A(un6_IOII1_Z), .B(oIoI1[38]), .Y(lOII1_2[38]) ); defparam \un12_lOII1[38] .INIT=4'h4; // @28:447790 CFG2 \un12_lOII1[0] ( .A(un6_IOII1_Z), .B(oIoI1[0]), .Y(lOII1_2[0]) ); defparam \un12_lOII1[0] .INIT=4'h4; // @28:447790 CFG2 \un12_lOII1[18] ( .A(un6_IOII1_Z), .B(oIoI1[18]), .Y(lOII1_2[18]) ); defparam \un12_lOII1[18] .INIT=4'h4; // @28:447790 CFG2 \un12_lOII1[6] ( .A(un6_IOII1_Z), .B(oIoI1[6]), .Y(lOII1_2[6]) ); defparam \un12_lOII1[6] .INIT=4'h4; // @28:447790 CFG2 \un12_lOII1[5] ( .A(un6_IOII1_Z), .B(oIoI1[5]), .Y(lOII1_2[5]) ); defparam \un12_lOII1[5] .INIT=4'h4; // @28:447790 CFG2 \un12_lOII1[10] ( .A(un6_IOII1_Z), .B(oIoI1[10]), .Y(lOII1_2[10]) ); defparam \un12_lOII1[10] .INIT=4'h4; // @28:447790 CFG2 \un12_lOII1[26] ( .A(un6_IOII1_Z), .B(oIoI1[26]), .Y(lOII1_2[26]) ); defparam \un12_lOII1[26] .INIT=4'h4; // @28:447790 CFG2 \un12_lOII1[35] ( .A(un6_IOII1_Z), .B(oIoI1[35]), .Y(lOII1_2[35]) ); defparam \un12_lOII1[35] .INIT=4'h4; // @28:447790 CFG2 \un12_lOII1[19] ( .A(un6_IOII1_Z), .B(oIoI1[19]), .Y(lOII1_2[19]) ); defparam \un12_lOII1[19] .INIT=4'h4; // @28:447790 CFG2 \un12_lOII1[8] ( .A(un6_IOII1_Z), .B(oIoI1[8]), .Y(lOII1_2[8]) ); defparam \un12_lOII1[8] .INIT=4'h4; // @28:447790 CFG2 \un12_lOII1[9] ( .A(un6_IOII1_Z), .B(oIoI1[9]), .Y(lOII1_2[9]) ); defparam \un12_lOII1[9] .INIT=4'h4; // @28:447790 CFG2 \un12_lOII1[20] ( .A(un6_IOII1_Z), .B(oIoI1[20]), .Y(lOII1_2[20]) ); defparam \un12_lOII1[20] .INIT=4'h4; // @28:447790 CFG2 \un12_lOII1[36] ( .A(un6_IOII1_Z), .B(oIoI1[36]), .Y(lOII1_2[36]) ); defparam \un12_lOII1[36] .INIT=4'h4; // @28:447790 CFG2 \un12_lOII1[27] ( .A(un6_IOII1_Z), .B(oIoI1[27]), .Y(lOII1_2[27]) ); defparam \un12_lOII1[27] .INIT=4'h4; // @28:447646 CFG3 \IOII1_2[0] ( .A(ll1I1[0]), .B(un6_IOII1_Z), .C(IIoI1[0]), .Y(IOII1_2_Z[0]) ); defparam \IOII1_2[0] .INIT=8'hB8; // @28:447646 CFG3 \IOII1_2[1] ( .A(ll1I1[1]), .B(un6_IOII1_Z), .C(IIoI1[1]), .Y(IOII1_2_Z[1]) ); defparam \IOII1_2[1] .INIT=8'hB8; // @28:447646 CFG3 \IOII1_2[3] ( .A(ll1I1[3]), .B(un6_IOII1_Z), .C(IIoI1[3]), .Y(IOII1_2_Z[3]) ); defparam \IOII1_2[3] .INIT=8'hB8; // @28:447646 CFG3 \IOII1_2[6] ( .A(ll1I1[6]), .B(un6_IOII1_Z), .C(IIoI1[6]), .Y(IOII1_2_Z[6]) ); defparam \IOII1_2[6] .INIT=8'hB8; // @28:447646 CFG3 \IOII1_2[9] ( .A(ll1I1[9]), .B(un6_IOII1_Z), .C(IIoI1[9]), .Y(IOII1_2_Z[9]) ); defparam \IOII1_2[9] .INIT=8'hB8; // @28:447646 CFG3 \IOII1_2[10] ( .A(ll1I1[10]), .B(un6_IOII1_Z), .C(IIoI1[10]), .Y(IOII1_2_Z[10]) ); defparam \IOII1_2[10] .INIT=8'hB8; // @28:447745 CFG3 \lOII1_2[33] ( .A(un6_IOII1_Z), .B(CORETSE_0_MRXBYTEVALID[1]), .C(oIoI1[33]), .Y(lOII1_2_Z[33]) ); defparam \lOII1_2[33] .INIT=8'hD8; // @28:447646 CFG3 \IOII1_2[5] ( .A(ll1I1[5]), .B(un6_IOII1_Z), .C(IIoI1[5]), .Y(IOII1_2_Z[5]) ); defparam \IOII1_2[5] .INIT=8'hB8; // @28:447745 CFG3 \lOII1_2[32] ( .A(un6_IOII1_Z), .B(CORETSE_0_MRXBYTEVALID[0]), .C(oIoI1[32]), .Y(lOII1_2_Z[32]) ); defparam \lOII1_2[32] .INIT=8'hD8; // @28:447646 CFG3 \IOII1_2[4] ( .A(ll1I1[4]), .B(un6_IOII1_Z), .C(IIoI1[4]), .Y(IOII1_2_Z[4]) ); defparam \IOII1_2[4] .INIT=8'hB8; // @28:447745 CFG3 \lOII1_2[34] ( .A(un6_IOII1_Z), .B(CORETSE_0_MRXEOF), .C(oIoI1[34]), .Y(lOII1_2_Z[34]) ); defparam \lOII1_2[34] .INIT=8'hD8; // @28:447646 CFG3 \IOII1_2[7] ( .A(ll1I1[7]), .B(un6_IOII1_Z), .C(IIoI1[7]), .Y(IOII1_2_Z[7]) ); defparam \IOII1_2[7] .INIT=8'hB8; // @28:447646 CFG3 \IOII1_2[8] ( .A(ll1I1[8]), .B(un6_IOII1_Z), .C(IIoI1[8]), .Y(IOII1_2_Z[8]) ); defparam \IOII1_2[8] .INIT=8'hB8; // @28:447646 CFG3 \IOII1_2[2] ( .A(ll1I1[2]), .B(un6_IOII1_Z), .C(IIoI1[2]), .Y(IOII1_2_Z[2]) ); defparam \IOII1_2[2] .INIT=8'hB8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_AMCXTFIF_FAB_26s_11s_32s_2s_0_0_1s */ module CTSE_AMCXTFIF_SYS_26s_11s_32s_2s_0s_0_0_1s ( iIoI1, I10i0, IioO1, O10i0, il1I1, lo0I1, lIol1_0, IOiO1_1z, lioO1, oioO1, iioO1_1z, oOiO1, ol1I1_1z, OOiO1_1z, lOiO1_1z, iIiO1, IIiO1_1z, oo0I1, OloI1, lOoI1, oool1_1z, i10I1_1z, oIiO1, PF_IOD_CDR_CCC_C0_0_TX_CLK_G, l0oI1_i ) ; input [12:0] iIoI1 ; input [39:0] I10i0 ; output [7:0] IioO1 ; output [10:0] O10i0 ; output [39:0] il1I1 ; input [11:0] lo0I1 ; output lIol1_0 ; output IOiO1_1z ; output lioO1 ; output oioO1 ; output iioO1_1z ; output oOiO1 ; output ol1I1_1z ; output OOiO1_1z ; output lOiO1_1z ; input iIiO1 ; input IIiO1_1z ; input oo0I1 ; input OloI1 ; input lOoI1 ; output oool1_1z ; output i10I1_1z ; input oIiO1 ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; input l0oI1_i ; wire lIol1_0 ; wire IOiO1_1z ; wire lioO1 ; wire oioO1 ; wire iioO1_1z ; wire oOiO1 ; wire ol1I1_1z ; wire OOiO1_1z ; wire lOiO1_1z ; wire iIiO1 ; wire IIiO1_1z ; wire oo0I1 ; wire OloI1 ; wire lOoI1 ; wire oool1_1z ; wire i10I1_1z ; wire oIiO1 ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire l0oI1_i ; wire [5:2] lIol1_Z; wire [5:0] lIol1_8; wire [13:0] l1ol1_Z; wire [13:0] IOIl1; wire [1:0] I1ol1_Z; wire [13:0] I0ol1_Z; wire [13:2] i0ol1; wire [13:2] o0ol1_Z; wire [34:0] i1ol1; wire [11:0] olol1_Z; wire [39:0] il1I1_4; wire [0:0] un2_IIil1_Z; wire [13:13] l0ol1_Z; wire [13:2] l0ol1_4_Z; wire [13:0] IOIl10; wire [0:0] I0ol1_RNIU95DU_Y; wire [1:1] I0ol1_RNIMQLP61_Y; wire [2:2] I0ol1_RNIGD66F1_Y; wire [3:3] I0ol1_RNIC2NIN1_Y; wire [4:4] I0ol1_RNIAP7VV1_Y; wire [5:5] I0ol1_RNIAIOB82_Y; wire [6:6] I0ol1_RNICD9OG2_Y; wire [7:7] I0ol1_RNIGAQ4P2_Y; wire [8:8] I0ol1_RNIM9BH13_Y; wire [9:9] I0ol1_RNIUAST93_Y; wire [10:10] I0ol1_RNIMMUQM3_Y; wire [11:11] I0ol1_RNIG41O34_Y; wire [12:12] I0ol1_RNICK3LG4_Y; wire [2:2] un1_I0ol1_3_a_1; wire [13:2] ilol10; wire [13:2] ilol11; wire [7:0] IioO1_3_1_0_co1; wire [7:0] IioO1_3_1_0_wmux_0_S; wire [7:0] IioO1_3_1_0_y0; wire [7:0] IioO1_3_1_0_co0; wire [7:0] IioO1_3_1_0_wmux_S; wire [13:2] ilol1; wire [3:0] lIol1_8_0_0_Z; wire [0:0] lIol1_8_0_a3_3_2_Z; wire [0:0] lIol1_8_0_1_Z; wire Iiol1_Z ; wire Iiol1_i ; wire oiol1_Z ; wire VCC ; wire GND ; wire Ilol1_Z ; wire I1oI1 ; wire iOil1_Z ; wire oOil1_Z ; wire lOil1_Z ; wire Oool1_Z ; wire iool1_Z ; wire IOil1_Z ; wire l01l1_Z ; wire OOil1_Z ; wire iiol1_Z ; wire iIol1_Z ; wire oIol1_Z ; wire Oiol1_Z ; wire o1ol1_Z ; wire N_315_i ; wire liol1_Z ; wire un1_liol17_1_Z ; wire llol1 ; wire llol15 ; wire l1ol15_Z ; wire un1_I0ol1_3_0_m_cry_2_0_Y ; wire I1ol15 ; wire olol15_Z ; wire un1_I0ol1_3_cry_0_cy ; wire un12_IOIl1_RNI8RK0M_S ; wire un12_IOIl1_RNI8RK0M_Y ; wire un3_IOIl1_0 ; wire un12_IOIl1_Z ; wire un1_I0ol1_3_cry_0 ; wire un1_I0ol1_3_cry_1 ; wire un1_I0ol1_3_cry_2 ; wire un1_I0ol1_3_cry_3 ; wire un1_I0ol1_3_cry_4 ; wire un1_I0ol1_3_cry_5 ; wire un1_I0ol1_3_cry_6 ; wire un1_I0ol1_3_cry_7 ; wire un1_I0ol1_3_cry_8 ; wire un1_I0ol1_3_cry_9 ; wire un1_I0ol1_3_cry_10 ; wire un1_I0ol1_3_cry_11 ; wire un1_I0ol1_3_0_m_s_13_RNO_FCO ; wire un1_I0ol1_3_0_m_s_13_RNO_Y ; wire un1_I0ol1_3_cry_12 ; wire un1_I0ol1_3_0_m_cry_2 ; wire un1_I0ol1_3_0_m_cry_2_0_S ; wire un2_IOIl1_i ; wire un1_I0ol1_3_0_m_cry_3_Z ; wire un1_I0ol1_3_0_m_cry_3_Y ; wire ilol1_1_axb_3 ; wire un1_I0ol1_3_0_m_cry_4_Z ; wire un1_I0ol1_3_0_m_cry_4_Y ; wire ilol1_1_axb_4 ; wire un1_I0ol1_3_0_m_cry_5_Z ; wire un1_I0ol1_3_0_m_cry_5_Y ; wire ilol1_1_axb_5 ; wire un1_I0ol1_3_0_m_cry_6_Z ; wire un1_I0ol1_3_0_m_cry_6_Y ; wire ilol1_1_axb_6 ; wire un1_I0ol1_3_0_m_cry_7_Z ; wire un1_I0ol1_3_0_m_cry_7_Y ; wire ilol1_1_axb_7 ; wire un1_I0ol1_3_0_m_cry_8_Z ; wire un1_I0ol1_3_0_m_cry_8_Y ; wire ilol1_1_axb_8 ; wire un1_I0ol1_3_0_m_cry_9_Z ; wire un1_I0ol1_3_0_m_cry_9_Y ; wire ilol1_1_axb_9 ; wire un1_I0ol1_3_0_m_cry_10_Z ; wire un1_I0ol1_3_0_m_cry_10_Y ; wire ilol1_1_axb_10 ; wire un1_I0ol1_3_0_m_cry_11_Z ; wire un1_I0ol1_3_0_m_cry_11_Y ; wire ilol1_1_axb_11 ; wire un1_I0ol1_3_0_m_s_13_FCO ; wire un1_I0ol1_3_0_m_s_13_Y ; wire ilol1_1_axb_13 ; wire un1_I0ol1_3_0_m_cry_12_Z ; wire un1_I0ol1_3_0_m_cry_12_Y ; wire ilol1_1_axb_12 ; wire ilol1_0_cry_0_Z ; wire ilol1_0_cry_0_S ; wire ilol1_0_cry_0_Y ; wire ilol1_0_cry_1_Z ; wire ilol1_0_cry_1_S ; wire ilol1_0_cry_1_Y ; wire ilol1_0_cry_2_Z ; wire ilol1_0_cry_2_Y ; wire ilol1_0_cry_3_Z ; wire ilol1_0_cry_3_Y ; wire ilol1_0_cry_4_Z ; wire ilol1_0_cry_4_Y ; wire ilol1_0_cry_5_Z ; wire ilol1_0_cry_5_Y ; wire ilol1_0_cry_6_Z ; wire ilol1_0_cry_6_Y ; wire ilol1_0_cry_7_Z ; wire ilol1_0_cry_7_Y ; wire ilol1_0_cry_8_Z ; wire ilol1_0_cry_8_Y ; wire ilol1_0_cry_9_Z ; wire ilol1_0_cry_9_Y ; wire ilol1_0_cry_10_Z ; wire ilol1_0_cry_10_Y ; wire ilol1_0_cry_11_Z ; wire ilol1_0_cry_11_Y ; wire ilol1_0_s_13_FCO ; wire ilol1_0_s_13_Y ; wire ilol1_0_cry_12_Z ; wire ilol1_0_cry_12_Y ; wire ilol1_1_cry_0 ; wire ilol1_1_cry_0_0_S ; wire ilol1_1_cry_0_0_Y ; wire ilol1_1_cry_1 ; wire ilol1_1_cry_1_0_S ; wire ilol1_1_cry_1_0_Y ; wire ilol1_1_cry_2_Z ; wire ilol1_1_cry_2_Y ; wire ilol1_1_cry_3_Z ; wire ilol1_1_cry_3_Y ; wire ilol1_1_cry_4_Z ; wire ilol1_1_cry_4_Y ; wire ilol1_1_cry_5_Z ; wire ilol1_1_cry_5_Y ; wire ilol1_1_cry_6_Z ; wire ilol1_1_cry_6_Y ; wire ilol1_1_cry_7_Z ; wire ilol1_1_cry_7_Y ; wire ilol1_1_cry_8_Z ; wire ilol1_1_cry_8_Y ; wire ilol1_1_cry_9_Z ; wire ilol1_1_cry_9_Y ; wire ilol1_1_cry_10_Z ; wire ilol1_1_cry_10_Y ; wire ilol1_1_cry_11_Z ; wire ilol1_1_cry_11_Y ; wire ilol1_1_s_13_FCO ; wire ilol1_1_s_13_Y ; wire ilol1_1_cry_12_Z ; wire ilol1_1_cry_12_Y ; wire un7_iIol1_cry_0_Z ; wire un7_iIol1_cry_0_S ; wire un7_iIol1_cry_0_Y ; wire un7_iIol1_cry_1_Z ; wire un7_iIol1_cry_1_S ; wire un7_iIol1_cry_1_Y ; wire un7_iIol1_cry_2_Z ; wire un7_iIol1_cry_2_S ; wire un7_iIol1_cry_2_Y ; wire un7_iIol1_cry_3_Z ; wire un7_iIol1_cry_3_S ; wire un7_iIol1_cry_3_Y ; wire un7_iIol1_cry_4_Z ; wire un7_iIol1_cry_4_S ; wire un7_iIol1_cry_4_Y ; wire un7_iIol1_cry_5_Z ; wire un7_iIol1_cry_5_S ; wire un7_iIol1_cry_5_Y ; wire un7_iIol1_cry_6_Z ; wire un7_iIol1_cry_6_S ; wire un7_iIol1_cry_6_Y ; wire un7_iIol1_cry_7_Z ; wire un7_iIol1_cry_7_S ; wire un7_iIol1_cry_7_Y ; wire un7_iIol1_cry_8_Z ; wire un7_iIol1_cry_8_S ; wire un7_iIol1_cry_8_Y ; wire un7_iIol1_cry_9_Z ; wire un7_iIol1_cry_9_S ; wire un7_iIol1_cry_9_Y ; wire un7_iIol1_cry_10_Z ; wire un7_iIol1_cry_10_S ; wire un7_iIol1_cry_10_Y ; wire Oiol1_1_Z ; wire un2_o1ol1_0 ; wire un1_oIiO1_i ; wire OIil1_Z ; wire lIol117_Z ; wire N_342 ; wire N_321 ; wire lIol17_Z ; wire N_322 ; wire N_339 ; wire N_326 ; wire l0ol19_Z ; wire N_336 ; wire N_332 ; wire N_7450 ; wire N_7449 ; wire N_7448 ; wire N_7447 ; wire N_7446 ; wire N_7445 ; wire N_7444 ; wire N_7443 ; wire N_7442 ; wire N_7441 ; wire N_7440 ; wire N_7439 ; wire N_7438 ; wire N_7437 ; wire N_7436 ; wire N_767 ; wire N_766 ; CFG1 liol1_RNO ( .A(Iiol1_Z), .Y(Iiol1_i) ); defparam liol1_RNO.INIT=2'h1; // @28:450593 SLE oiol1 ( .Q(oiol1_Z), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oIiO1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450074 SLE Ilol1 ( .Q(Ilol1_Z), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I1oI1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452769 SLE iOil1 ( .Q(iOil1_Z), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oOil1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452737 SLE oOil1 ( .Q(oOil1_Z), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lOil1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452450 SLE i10I1 ( .Q(i10I1_1z), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Oool1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:453100 SLE oool1 ( .Q(oool1_1z), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iool1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452705 SLE lOil1 ( .Q(lOil1_Z), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOil1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452641 (* cdc_synchronizer=1 *) SLE Oool1 ( .Q(Oool1_Z), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l01l1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:453068 SLE iool1 ( .Q(iool1_Z), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lOoI1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452673 SLE IOil1 ( .Q(IOil1_Z), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OloI1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452609 (* cdc_synchronizer=1 *) SLE l01l1 ( .Q(l01l1_Z), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oo0I1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450665 SLE OOil1 ( .Q(OOil1_Z), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IIiO1_1z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450629 SLE iiol1 ( .Q(iiol1_Z), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIiO1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450038 SLE Olol1 ( .Q(I1oI1), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIol1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451952 SLE lOiO1 ( .Q(lOiO1_1z), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lIol1_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450554 SLE oIol1 ( .Q(oIol1_Z), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OOiO1_1z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451991 SLE Iiol1 ( .Q(Iiol1_Z), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Oiol1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452801 SLE ol1I1 ( .Q(ol1I1_1z), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iOil1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[39] ( .Q(oOiO1), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[39]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450274 SLE \lIol1[5] ( .Q(lIol1_Z[5]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lIol1_8[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450274 SLE \lIol1[4] ( .Q(lIol1_Z[4]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lIol1_8[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450274 SLE \lIol1[3] ( .Q(lIol1_Z[3]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lIol1_8[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450274 SLE \lIol1[2] ( .Q(lIol1_Z[2]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lIol1_8[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450274 SLE \lIol1[1] ( .Q(OOiO1_1z), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_315_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450274 SLE \lIol1[0] ( .Q(lIol1_0), .ADn(GND), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lIol1_8[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452027 SLE liol1 ( .Q(liol1_Z), .ADn(GND), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Iiol1_i), .EN(un1_liol17_1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450196 SLE \genblk1.llol1 ( .Q(llol1), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Ilol1_Z), .EN(llol15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451119 SLE \l1ol1[4] ( .Q(l1ol1_Z[4]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOIl1[4]), .EN(l1ol15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451119 SLE \l1ol1[3] ( .Q(l1ol1_Z[3]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOIl1[3]), .EN(l1ol15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451119 SLE \l1ol1[2] ( .Q(l1ol1_Z[2]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un1_I0ol1_3_0_m_cry_2_0_Y), .EN(l1ol15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451119 SLE \l1ol1[1] ( .Q(l1ol1_Z[1]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOIl1[1]), .EN(l1ol15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451119 SLE \l1ol1[0] ( .Q(l1ol1_Z[0]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOIl1[0]), .EN(l1ol15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450971 SLE \I1ol1[1] ( .Q(I1ol1_Z[1]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0ol1_Z[1]), .EN(I1ol15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450971 SLE \I1ol1[0] ( .Q(I1ol1_Z[0]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0ol1_Z[0]), .EN(I1ol15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450821 SLE \I0ol1[5] ( .Q(I0ol1_Z[5]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOIl1[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450821 SLE \I0ol1[4] ( .Q(I0ol1_Z[4]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOIl1[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450821 SLE \I0ol1[3] ( .Q(I0ol1_Z[3]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOIl1[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450821 SLE \I0ol1[2] ( .Q(I0ol1_Z[2]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un1_I0ol1_3_0_m_cry_2_0_Y), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450821 SLE \I0ol1[1] ( .Q(I0ol1_Z[1]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOIl1[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450821 SLE \I0ol1[0] ( .Q(I0ol1_Z[0]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOIl1[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451119 SLE \l1ol1[13] ( .Q(l1ol1_Z[13]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOIl1[13]), .EN(l1ol15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451119 SLE \l1ol1[12] ( .Q(l1ol1_Z[12]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOIl1[12]), .EN(l1ol15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451119 SLE \l1ol1[11] ( .Q(l1ol1_Z[11]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOIl1[11]), .EN(l1ol15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451119 SLE \l1ol1[10] ( .Q(l1ol1_Z[10]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOIl1[10]), .EN(l1ol15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451119 SLE \l1ol1[9] ( .Q(l1ol1_Z[9]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOIl1[9]), .EN(l1ol15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451119 SLE \l1ol1[8] ( .Q(l1ol1_Z[8]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOIl1[8]), .EN(l1ol15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451119 SLE \l1ol1[7] ( .Q(l1ol1_Z[7]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOIl1[7]), .EN(l1ol15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451119 SLE \l1ol1[6] ( .Q(l1ol1_Z[6]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOIl1[6]), .EN(l1ol15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451119 SLE \l1ol1[5] ( .Q(l1ol1_Z[5]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOIl1[5]), .EN(l1ol15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451688 SLE \genblk3.i0ol1[8] ( .Q(i0ol1[8]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o0ol1_Z[8]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451688 SLE \genblk3.i0ol1[7] ( .Q(i0ol1[7]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o0ol1_Z[7]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451688 SLE \genblk3.i0ol1[6] ( .Q(i0ol1[6]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o0ol1_Z[6]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451688 SLE \genblk3.i0ol1[5] ( .Q(i0ol1[5]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o0ol1_Z[5]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451688 SLE \genblk3.i0ol1[4] ( .Q(i0ol1[4]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o0ol1_Z[4]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451688 SLE \genblk3.i0ol1[3] ( .Q(i0ol1[3]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o0ol1_Z[3]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451688 SLE \genblk3.i0ol1[2] ( .Q(i0ol1[2]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o0ol1_Z[2]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450821 SLE \I0ol1[13] ( .Q(I0ol1_Z[13]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOIl1[13]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450821 SLE \I0ol1[12] ( .Q(I0ol1_Z[12]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOIl1[12]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450821 SLE \I0ol1[11] ( .Q(I0ol1_Z[11]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOIl1[11]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450821 SLE \I0ol1[10] ( .Q(I0ol1_Z[10]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOIl1[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450821 SLE \I0ol1[9] ( .Q(I0ol1_Z[9]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOIl1[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450821 SLE \I0ol1[8] ( .Q(I0ol1_Z[8]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOIl1[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450821 SLE \I0ol1[7] ( .Q(I0ol1_Z[7]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOIl1[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450821 SLE \I0ol1[6] ( .Q(I0ol1_Z[6]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOIl1[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[9] ( .Q(i1ol1[9]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[9]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[8] ( .Q(i1ol1[8]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[8]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[7] ( .Q(i1ol1[7]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[7]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[6] ( .Q(i1ol1[6]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[6]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[5] ( .Q(i1ol1[5]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[5]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[4] ( .Q(i1ol1[4]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[4]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[3] ( .Q(i1ol1[3]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[3]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[2] ( .Q(i1ol1[2]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[2]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[1] ( .Q(i1ol1[1]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[1]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[0] ( .Q(i1ol1[0]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[0]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451688 SLE \genblk3.i0ol1[13] ( .Q(i0ol1[13]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o0ol1_Z[13]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451688 SLE \genblk3.i0ol1[12] ( .Q(i0ol1[12]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o0ol1_Z[12]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451688 SLE \genblk3.i0ol1[11] ( .Q(i0ol1[11]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o0ol1_Z[11]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451688 SLE \genblk3.i0ol1[10] ( .Q(i0ol1[10]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o0ol1_Z[10]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451688 SLE \genblk3.i0ol1[9] ( .Q(i0ol1[9]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o0ol1_Z[9]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[24] ( .Q(i1ol1[24]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[24]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[23] ( .Q(i1ol1[23]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[23]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[22] ( .Q(i1ol1[22]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[22]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[21] ( .Q(i1ol1[21]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[21]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[20] ( .Q(i1ol1[20]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[20]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[19] ( .Q(i1ol1[19]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[19]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[18] ( .Q(i1ol1[18]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[18]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[17] ( .Q(i1ol1[17]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[17]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[16] ( .Q(i1ol1[16]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[16]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[15] ( .Q(i1ol1[15]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[15]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[14] ( .Q(i1ol1[14]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[14]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[13] ( .Q(i1ol1[13]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[13]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[12] ( .Q(i1ol1[12]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[12]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[11] ( .Q(i1ol1[11]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[11]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[10] ( .Q(i1ol1[10]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[10]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452506 SLE \olol1[1] ( .Q(olol1_Z[1]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lo0I1[1]), .EN(olol15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452506 SLE \olol1[0] ( .Q(olol1_Z[0]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lo0I1[0]), .EN(olol15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[37] ( .Q(iioO1_1z), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[37]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[36] ( .Q(oioO1), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[36]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[35] ( .Q(lioO1), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[35]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[34] ( .Q(i1ol1[34]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[34]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[33] ( .Q(i1ol1[33]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[33]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[32] ( .Q(i1ol1[32]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[32]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[31] ( .Q(i1ol1[31]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[31]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[30] ( .Q(i1ol1[30]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[30]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[29] ( .Q(i1ol1[29]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[29]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[28] ( .Q(i1ol1[28]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[28]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[27] ( .Q(i1ol1[27]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[27]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[26] ( .Q(i1ol1[26]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[26]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:451639 SLE \genblk3.i1ol1[25] ( .Q(i1ol1[25]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I10i0[25]), .EN(o1ol1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452506 SLE \olol1[11] ( .Q(olol1_Z[11]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lo0I1[11]), .EN(olol15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452506 SLE \olol1[10] ( .Q(olol1_Z[10]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lo0I1[10]), .EN(olol15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452506 SLE \olol1[9] ( .Q(olol1_Z[9]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lo0I1[9]), .EN(olol15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452506 SLE \olol1[8] ( .Q(olol1_Z[8]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lo0I1[8]), .EN(olol15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452506 SLE \olol1[7] ( .Q(olol1_Z[7]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lo0I1[7]), .EN(olol15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452506 SLE \olol1[6] ( .Q(olol1_Z[6]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lo0I1[6]), .EN(olol15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452506 SLE \olol1[5] ( .Q(olol1_Z[5]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lo0I1[5]), .EN(olol15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452506 SLE \olol1[4] ( .Q(olol1_Z[4]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lo0I1[4]), .EN(olol15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452506 SLE \olol1[3] ( .Q(olol1_Z[3]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lo0I1[3]), .EN(olol15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452506 SLE \olol1[2] ( .Q(olol1_Z[2]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lo0I1[2]), .EN(olol15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[11] ( .Q(il1I1[11]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[11]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[10] ( .Q(il1I1[10]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[10]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[9] ( .Q(il1I1[9]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[9]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[8] ( .Q(il1I1[8]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[8]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[7] ( .Q(il1I1[7]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[7]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[6] ( .Q(il1I1[6]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[6]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[5] ( .Q(il1I1[5]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[5]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[4] ( .Q(il1I1[4]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[4]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[3] ( .Q(il1I1[3]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[3]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[2] ( .Q(il1I1[2]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[2]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[1] ( .Q(il1I1[1]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[1]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[0] ( .Q(il1I1[0]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[0]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[26] ( .Q(il1I1[26]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[26]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[25] ( .Q(il1I1[25]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[25]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[24] ( .Q(il1I1[24]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[24]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[23] ( .Q(il1I1[23]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[23]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[22] ( .Q(il1I1[22]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[22]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[21] ( .Q(il1I1[21]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[21]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[20] ( .Q(il1I1[20]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[20]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[19] ( .Q(il1I1[19]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[19]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[18] ( .Q(il1I1[18]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[18]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[17] ( .Q(il1I1[17]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[17]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[16] ( .Q(il1I1[16]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[16]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[15] ( .Q(il1I1[15]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[15]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[14] ( .Q(il1I1[14]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[14]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[13] ( .Q(il1I1[13]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[13]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[12] ( .Q(il1I1[12]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[12]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[39] ( .Q(il1I1[39]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[39]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[38] ( .Q(il1I1[38]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[38]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[37] ( .Q(il1I1[37]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[37]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[36] ( .Q(il1I1[36]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[36]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[35] ( .Q(il1I1[35]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[35]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[34] ( .Q(il1I1[34]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[34]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[33] ( .Q(il1I1[33]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[33]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[32] ( .Q(il1I1[32]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[32]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[31] ( .Q(il1I1[31]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[31]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[30] ( .Q(il1I1[30]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[30]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[29] ( .Q(il1I1[29]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[29]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[28] ( .Q(il1I1[28]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[28]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:452963 SLE \genblk6.il1I1[27] ( .Q(il1I1[27]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il1I1_4[27]), .EN(un2_IIil1_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450862 SLE \l0ol1[13] ( .Q(l0ol1_Z[13]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l0ol1_4_Z[13]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450862 SLE \l0ol1[12] ( .Q(O10i0[10]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l0ol1_4_Z[12]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450862 SLE \l0ol1[11] ( .Q(O10i0[9]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l0ol1_4_Z[11]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450862 SLE \l0ol1[10] ( .Q(O10i0[8]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l0ol1_4_Z[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450862 SLE \l0ol1[9] ( .Q(O10i0[7]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l0ol1_4_Z[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450862 SLE \l0ol1[8] ( .Q(O10i0[6]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l0ol1_4_Z[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450862 SLE \l0ol1[7] ( .Q(O10i0[5]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l0ol1_4_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450862 SLE \l0ol1[6] ( .Q(O10i0[4]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l0ol1_4_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450862 SLE \l0ol1[5] ( .Q(O10i0[3]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l0ol1_4_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450862 SLE \l0ol1[4] ( .Q(O10i0[2]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l0ol1_4_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450862 SLE \l0ol1[3] ( .Q(O10i0[1]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l0ol1_4_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450862 SLE \l0ol1[2] ( .Q(O10i0[0]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l0ol1_4_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450941 SLE \o0ol1[10] ( .Q(o0ol1_Z[10]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O10i0[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450941 SLE \o0ol1[9] ( .Q(o0ol1_Z[9]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O10i0[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450941 SLE \o0ol1[8] ( .Q(o0ol1_Z[8]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O10i0[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450941 SLE \o0ol1[7] ( .Q(o0ol1_Z[7]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O10i0[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450941 SLE \o0ol1[6] ( .Q(o0ol1_Z[6]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O10i0[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450941 SLE \o0ol1[5] ( .Q(o0ol1_Z[5]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O10i0[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450941 SLE \o0ol1[4] ( .Q(o0ol1_Z[4]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O10i0[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450941 SLE \o0ol1[3] ( .Q(o0ol1_Z[3]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O10i0[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450941 SLE \o0ol1[2] ( .Q(o0ol1_Z[2]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O10i0[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450941 SLE \o0ol1[13] ( .Q(o0ol1_Z[13]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l0ol1_Z[13]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450941 SLE \o0ol1[12] ( .Q(o0ol1_Z[12]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O10i0[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:450941 SLE \o0ol1[11] ( .Q(o0ol1_Z[11]), .ADn(VCC), .ALn(l0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O10i0[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:434881 ARI1 un12_IOIl1_RNI8RK0M ( .FCO(un1_I0ol1_3_cry_0_cy), .S(un12_IOIl1_RNI8RK0M_S), .Y(un12_IOIl1_RNI8RK0M_Y), .B(lIol1_Z[4]), .C(un3_IOIl1_0), .D(un12_IOIl1_Z), .A(I1oI1), .FCI(VCC) ); defparam un12_IOIl1_RNI8RK0M.INIT=20'h45400; // @28:434881 ARI1 \I0ol1_RNIU95DU[0] ( .FCO(un1_I0ol1_3_cry_0), .S(IOIl10[0]), .Y(I0ol1_RNIU95DU_Y[0]), .B(lIol1_Z[4]), .C(l1ol1_Z[0]), .D(I0ol1_Z[0]), .A(VCC), .FCI(un1_I0ol1_3_cry_0_cy) ); defparam \I0ol1_RNIU95DU[0] .INIT=20'h4D800; // @28:434881 ARI1 \I0ol1_RNIMQLP61[1] ( .FCO(un1_I0ol1_3_cry_1), .S(IOIl10[1]), .Y(I0ol1_RNIMQLP61_Y[1]), .B(I0ol1_Z[1]), .C(l1ol1_Z[1]), .D(lIol1_Z[4]), .A(VCC), .FCI(un1_I0ol1_3_cry_0) ); defparam \I0ol1_RNIMQLP61[1] .INIT=20'h4CA00; // @28:434881 ARI1 \I0ol1_RNIGD66F1[2] ( .FCO(un1_I0ol1_3_cry_2), .S(IOIl10[2]), .Y(I0ol1_RNIGD66F1_Y[2]), .B(I0ol1_Z[2]), .C(l1ol1_Z[2]), .D(lIol1_Z[4]), .A(VCC), .FCI(un1_I0ol1_3_cry_1) ); defparam \I0ol1_RNIGD66F1[2] .INIT=20'h4CA00; // @28:434881 ARI1 \I0ol1_RNIC2NIN1[3] ( .FCO(un1_I0ol1_3_cry_3), .S(IOIl10[3]), .Y(I0ol1_RNIC2NIN1_Y[3]), .B(I0ol1_Z[3]), .C(l1ol1_Z[3]), .D(lIol1_Z[4]), .A(VCC), .FCI(un1_I0ol1_3_cry_2) ); defparam \I0ol1_RNIC2NIN1[3] .INIT=20'h4CA00; // @28:434881 ARI1 \I0ol1_RNIAP7VV1[4] ( .FCO(un1_I0ol1_3_cry_4), .S(IOIl10[4]), .Y(I0ol1_RNIAP7VV1_Y[4]), .B(I0ol1_Z[4]), .C(l1ol1_Z[4]), .D(lIol1_Z[4]), .A(VCC), .FCI(un1_I0ol1_3_cry_3) ); defparam \I0ol1_RNIAP7VV1[4] .INIT=20'h4CA00; // @28:434881 ARI1 \I0ol1_RNIAIOB82[5] ( .FCO(un1_I0ol1_3_cry_5), .S(IOIl10[5]), .Y(I0ol1_RNIAIOB82_Y[5]), .B(I0ol1_Z[5]), .C(l1ol1_Z[5]), .D(lIol1_Z[4]), .A(VCC), .FCI(un1_I0ol1_3_cry_4) ); defparam \I0ol1_RNIAIOB82[5] .INIT=20'h4CA00; // @28:434881 ARI1 \I0ol1_RNICD9OG2[6] ( .FCO(un1_I0ol1_3_cry_6), .S(IOIl10[6]), .Y(I0ol1_RNICD9OG2_Y[6]), .B(I0ol1_Z[6]), .C(l1ol1_Z[6]), .D(lIol1_Z[4]), .A(VCC), .FCI(un1_I0ol1_3_cry_5) ); defparam \I0ol1_RNICD9OG2[6] .INIT=20'h4CA00; // @28:434881 ARI1 \I0ol1_RNIGAQ4P2[7] ( .FCO(un1_I0ol1_3_cry_7), .S(IOIl10[7]), .Y(I0ol1_RNIGAQ4P2_Y[7]), .B(I0ol1_Z[7]), .C(l1ol1_Z[7]), .D(lIol1_Z[4]), .A(VCC), .FCI(un1_I0ol1_3_cry_6) ); defparam \I0ol1_RNIGAQ4P2[7] .INIT=20'h4CA00; // @28:434881 ARI1 \I0ol1_RNIM9BH13[8] ( .FCO(un1_I0ol1_3_cry_8), .S(IOIl10[8]), .Y(I0ol1_RNIM9BH13_Y[8]), .B(I0ol1_Z[8]), .C(l1ol1_Z[8]), .D(lIol1_Z[4]), .A(VCC), .FCI(un1_I0ol1_3_cry_7) ); defparam \I0ol1_RNIM9BH13[8] .INIT=20'h4CA00; // @28:434881 ARI1 \I0ol1_RNIUAST93[9] ( .FCO(un1_I0ol1_3_cry_9), .S(IOIl10[9]), .Y(I0ol1_RNIUAST93_Y[9]), .B(I0ol1_Z[9]), .C(l1ol1_Z[9]), .D(lIol1_Z[4]), .A(VCC), .FCI(un1_I0ol1_3_cry_8) ); defparam \I0ol1_RNIUAST93[9] .INIT=20'h4CA00; // @28:434881 ARI1 \I0ol1_RNIMMUQM3[10] ( .FCO(un1_I0ol1_3_cry_10), .S(IOIl10[10]), .Y(I0ol1_RNIMMUQM3_Y[10]), .B(I0ol1_Z[10]), .C(l1ol1_Z[10]), .D(lIol1_Z[4]), .A(VCC), .FCI(un1_I0ol1_3_cry_9) ); defparam \I0ol1_RNIMMUQM3[10] .INIT=20'h4CA00; // @28:434881 ARI1 \I0ol1_RNIG41O34[11] ( .FCO(un1_I0ol1_3_cry_11), .S(IOIl10[11]), .Y(I0ol1_RNIG41O34_Y[11]), .B(I0ol1_Z[11]), .C(l1ol1_Z[11]), .D(lIol1_Z[4]), .A(VCC), .FCI(un1_I0ol1_3_cry_10) ); defparam \I0ol1_RNIG41O34[11] .INIT=20'h4CA00; // @28:434881 ARI1 un1_I0ol1_3_0_m_s_13_RNO ( .FCO(un1_I0ol1_3_0_m_s_13_RNO_FCO), .S(IOIl10[13]), .Y(un1_I0ol1_3_0_m_s_13_RNO_Y), .B(I0ol1_Z[13]), .C(l1ol1_Z[13]), .D(lIol1_Z[4]), .A(VCC), .FCI(un1_I0ol1_3_cry_12) ); defparam un1_I0ol1_3_0_m_s_13_RNO.INIT=20'h4CA00; // @28:434881 ARI1 \I0ol1_RNICK3LG4[12] ( .FCO(un1_I0ol1_3_cry_12), .S(IOIl10[12]), .Y(I0ol1_RNICK3LG4_Y[12]), .B(I0ol1_Z[12]), .C(l1ol1_Z[12]), .D(lIol1_Z[4]), .A(VCC), .FCI(un1_I0ol1_3_cry_11) ); defparam \I0ol1_RNICK3LG4[12] .INIT=20'h4CA00; // @28:450756 ARI1 un1_I0ol1_3_0_m_cry_2_0 ( .FCO(un1_I0ol1_3_0_m_cry_2), .S(un1_I0ol1_3_0_m_cry_2_0_S), .Y(un1_I0ol1_3_0_m_cry_2_0_Y), .B(un2_IOIl1_i), .C(IOIl10[2]), .D(lIol1_Z[4]), .A(un1_I0ol1_3_a_1[2]), .FCI(GND) ); defparam un1_I0ol1_3_0_m_cry_2_0.INIT=20'h5E44E; // @28:450756 ARI1 un1_I0ol1_3_0_m_cry_3 ( .FCO(un1_I0ol1_3_0_m_cry_3_Z), .S(IOIl1[3]), .Y(un1_I0ol1_3_0_m_cry_3_Y), .B(IOIl10[3]), .C(ilol1_1_axb_3), .D(un2_IOIl1_i), .A(VCC), .FCI(un1_I0ol1_3_0_m_cry_2) ); defparam un1_I0ol1_3_0_m_cry_3.INIT=20'h4CA00; // @28:450756 ARI1 un1_I0ol1_3_0_m_cry_4 ( .FCO(un1_I0ol1_3_0_m_cry_4_Z), .S(IOIl1[4]), .Y(un1_I0ol1_3_0_m_cry_4_Y), .B(IOIl10[4]), .C(ilol1_1_axb_4), .D(un2_IOIl1_i), .A(VCC), .FCI(un1_I0ol1_3_0_m_cry_3_Z) ); defparam un1_I0ol1_3_0_m_cry_4.INIT=20'h4CA00; // @28:450756 ARI1 un1_I0ol1_3_0_m_cry_5 ( .FCO(un1_I0ol1_3_0_m_cry_5_Z), .S(IOIl1[5]), .Y(un1_I0ol1_3_0_m_cry_5_Y), .B(IOIl10[5]), .C(ilol1_1_axb_5), .D(un2_IOIl1_i), .A(VCC), .FCI(un1_I0ol1_3_0_m_cry_4_Z) ); defparam un1_I0ol1_3_0_m_cry_5.INIT=20'h4CA00; // @28:450756 ARI1 un1_I0ol1_3_0_m_cry_6 ( .FCO(un1_I0ol1_3_0_m_cry_6_Z), .S(IOIl1[6]), .Y(un1_I0ol1_3_0_m_cry_6_Y), .B(IOIl10[6]), .C(ilol1_1_axb_6), .D(un2_IOIl1_i), .A(VCC), .FCI(un1_I0ol1_3_0_m_cry_5_Z) ); defparam un1_I0ol1_3_0_m_cry_6.INIT=20'h4CA00; // @28:450756 ARI1 un1_I0ol1_3_0_m_cry_7 ( .FCO(un1_I0ol1_3_0_m_cry_7_Z), .S(IOIl1[7]), .Y(un1_I0ol1_3_0_m_cry_7_Y), .B(IOIl10[7]), .C(ilol1_1_axb_7), .D(un2_IOIl1_i), .A(VCC), .FCI(un1_I0ol1_3_0_m_cry_6_Z) ); defparam un1_I0ol1_3_0_m_cry_7.INIT=20'h4CA00; // @28:450756 ARI1 un1_I0ol1_3_0_m_cry_8 ( .FCO(un1_I0ol1_3_0_m_cry_8_Z), .S(IOIl1[8]), .Y(un1_I0ol1_3_0_m_cry_8_Y), .B(IOIl10[8]), .C(ilol1_1_axb_8), .D(un2_IOIl1_i), .A(VCC), .FCI(un1_I0ol1_3_0_m_cry_7_Z) ); defparam un1_I0ol1_3_0_m_cry_8.INIT=20'h4CA00; // @28:450756 ARI1 un1_I0ol1_3_0_m_cry_9 ( .FCO(un1_I0ol1_3_0_m_cry_9_Z), .S(IOIl1[9]), .Y(un1_I0ol1_3_0_m_cry_9_Y), .B(IOIl10[9]), .C(ilol1_1_axb_9), .D(un2_IOIl1_i), .A(VCC), .FCI(un1_I0ol1_3_0_m_cry_8_Z) ); defparam un1_I0ol1_3_0_m_cry_9.INIT=20'h4CA00; // @28:450756 ARI1 un1_I0ol1_3_0_m_cry_10 ( .FCO(un1_I0ol1_3_0_m_cry_10_Z), .S(IOIl1[10]), .Y(un1_I0ol1_3_0_m_cry_10_Y), .B(IOIl10[10]), .C(ilol1_1_axb_10), .D(un2_IOIl1_i), .A(VCC), .FCI(un1_I0ol1_3_0_m_cry_9_Z) ); defparam un1_I0ol1_3_0_m_cry_10.INIT=20'h4CA00; // @28:450756 ARI1 un1_I0ol1_3_0_m_cry_11 ( .FCO(un1_I0ol1_3_0_m_cry_11_Z), .S(IOIl1[11]), .Y(un1_I0ol1_3_0_m_cry_11_Y), .B(IOIl10[11]), .C(ilol1_1_axb_11), .D(un2_IOIl1_i), .A(VCC), .FCI(un1_I0ol1_3_0_m_cry_10_Z) ); defparam un1_I0ol1_3_0_m_cry_11.INIT=20'h4CA00; // @28:450756 ARI1 un1_I0ol1_3_0_m_s_13 ( .FCO(un1_I0ol1_3_0_m_s_13_FCO), .S(IOIl1[13]), .Y(un1_I0ol1_3_0_m_s_13_Y), .B(IOIl10[13]), .C(ilol1_1_axb_13), .D(un2_IOIl1_i), .A(VCC), .FCI(un1_I0ol1_3_0_m_cry_12_Z) ); defparam un1_I0ol1_3_0_m_s_13.INIT=20'h4CA00; // @28:450756 ARI1 un1_I0ol1_3_0_m_cry_12 ( .FCO(un1_I0ol1_3_0_m_cry_12_Z), .S(IOIl1[12]), .Y(un1_I0ol1_3_0_m_cry_12_Y), .B(IOIl10[12]), .C(ilol1_1_axb_12), .D(un2_IOIl1_i), .A(VCC), .FCI(un1_I0ol1_3_0_m_cry_11_Z) ); defparam un1_I0ol1_3_0_m_cry_12.INIT=20'h4CA00; // @28:450858 ARI1 ilol1_0_cry_0 ( .FCO(ilol1_0_cry_0_Z), .S(ilol1_0_cry_0_S), .Y(ilol1_0_cry_0_Y), .B(I0ol1_Z[0]), .C(l1ol1_Z[0]), .D(lIol1_Z[4]), .A(un12_IOIl1_RNI8RK0M_Y), .FCI(VCC) ); defparam ilol1_0_cry_0.INIT=20'h535CA; // @28:450858 ARI1 ilol1_0_cry_1 ( .FCO(ilol1_0_cry_1_Z), .S(ilol1_0_cry_1_S), .Y(ilol1_0_cry_1_Y), .B(I0ol1_Z[1]), .C(l1ol1_Z[1]), .D(lIol1_Z[4]), .A(VCC), .FCI(ilol1_0_cry_0_Z) ); defparam ilol1_0_cry_1.INIT=20'h4CA00; // @28:450858 ARI1 ilol1_0_cry_2 ( .FCO(ilol1_0_cry_2_Z), .S(ilol10[2]), .Y(ilol1_0_cry_2_Y), .B(I0ol1_Z[2]), .C(l1ol1_Z[2]), .D(lIol1_Z[4]), .A(VCC), .FCI(ilol1_0_cry_1_Z) ); defparam ilol1_0_cry_2.INIT=20'h4CA00; // @28:450858 ARI1 ilol1_0_cry_3 ( .FCO(ilol1_0_cry_3_Z), .S(ilol10[3]), .Y(ilol1_0_cry_3_Y), .B(I0ol1_Z[3]), .C(l1ol1_Z[3]), .D(lIol1_Z[4]), .A(VCC), .FCI(ilol1_0_cry_2_Z) ); defparam ilol1_0_cry_3.INIT=20'h4CA00; // @28:450858 ARI1 ilol1_0_cry_4 ( .FCO(ilol1_0_cry_4_Z), .S(ilol10[4]), .Y(ilol1_0_cry_4_Y), .B(I0ol1_Z[4]), .C(l1ol1_Z[4]), .D(lIol1_Z[4]), .A(VCC), .FCI(ilol1_0_cry_3_Z) ); defparam ilol1_0_cry_4.INIT=20'h4CA00; // @28:450858 ARI1 ilol1_0_cry_5 ( .FCO(ilol1_0_cry_5_Z), .S(ilol10[5]), .Y(ilol1_0_cry_5_Y), .B(I0ol1_Z[5]), .C(l1ol1_Z[5]), .D(lIol1_Z[4]), .A(VCC), .FCI(ilol1_0_cry_4_Z) ); defparam ilol1_0_cry_5.INIT=20'h4CA00; // @28:450858 ARI1 ilol1_0_cry_6 ( .FCO(ilol1_0_cry_6_Z), .S(ilol10[6]), .Y(ilol1_0_cry_6_Y), .B(I0ol1_Z[6]), .C(l1ol1_Z[6]), .D(lIol1_Z[4]), .A(VCC), .FCI(ilol1_0_cry_5_Z) ); defparam ilol1_0_cry_6.INIT=20'h4CA00; // @28:450858 ARI1 ilol1_0_cry_7 ( .FCO(ilol1_0_cry_7_Z), .S(ilol10[7]), .Y(ilol1_0_cry_7_Y), .B(I0ol1_Z[7]), .C(l1ol1_Z[7]), .D(lIol1_Z[4]), .A(VCC), .FCI(ilol1_0_cry_6_Z) ); defparam ilol1_0_cry_7.INIT=20'h4CA00; // @28:450858 ARI1 ilol1_0_cry_8 ( .FCO(ilol1_0_cry_8_Z), .S(ilol10[8]), .Y(ilol1_0_cry_8_Y), .B(I0ol1_Z[8]), .C(l1ol1_Z[8]), .D(lIol1_Z[4]), .A(VCC), .FCI(ilol1_0_cry_7_Z) ); defparam ilol1_0_cry_8.INIT=20'h4CA00; // @28:450858 ARI1 ilol1_0_cry_9 ( .FCO(ilol1_0_cry_9_Z), .S(ilol10[9]), .Y(ilol1_0_cry_9_Y), .B(I0ol1_Z[9]), .C(l1ol1_Z[9]), .D(lIol1_Z[4]), .A(VCC), .FCI(ilol1_0_cry_8_Z) ); defparam ilol1_0_cry_9.INIT=20'h4CA00; // @28:450858 ARI1 ilol1_0_cry_10 ( .FCO(ilol1_0_cry_10_Z), .S(ilol10[10]), .Y(ilol1_0_cry_10_Y), .B(I0ol1_Z[10]), .C(l1ol1_Z[10]), .D(lIol1_Z[4]), .A(VCC), .FCI(ilol1_0_cry_9_Z) ); defparam ilol1_0_cry_10.INIT=20'h4CA00; // @28:450858 ARI1 ilol1_0_cry_11 ( .FCO(ilol1_0_cry_11_Z), .S(ilol10[11]), .Y(ilol1_0_cry_11_Y), .B(I0ol1_Z[11]), .C(l1ol1_Z[11]), .D(lIol1_Z[4]), .A(VCC), .FCI(ilol1_0_cry_10_Z) ); defparam ilol1_0_cry_11.INIT=20'h4CA00; // @28:450858 ARI1 ilol1_0_s_13 ( .FCO(ilol1_0_s_13_FCO), .S(ilol10[13]), .Y(ilol1_0_s_13_Y), .B(I0ol1_Z[13]), .C(l1ol1_Z[13]), .D(lIol1_Z[4]), .A(VCC), .FCI(ilol1_0_cry_12_Z) ); defparam ilol1_0_s_13.INIT=20'h4CA00; // @28:450858 ARI1 ilol1_0_cry_12 ( .FCO(ilol1_0_cry_12_Z), .S(ilol10[12]), .Y(ilol1_0_cry_12_Y), .B(I0ol1_Z[12]), .C(l1ol1_Z[12]), .D(lIol1_Z[4]), .A(VCC), .FCI(ilol1_0_cry_11_Z) ); defparam ilol1_0_cry_12.INIT=20'h4CA00; // @28:450858 ARI1 ilol1_1_cry_0_0 ( .FCO(ilol1_1_cry_0), .S(ilol1_1_cry_0_0_S), .Y(ilol1_1_cry_0_0_Y), .B(l1ol1_Z[0]), .C(GND), .D(GND), .A(lIol1_Z[4]), .FCI(GND) ); defparam ilol1_1_cry_0_0.INIT=20'h555FF; // @28:450858 ARI1 ilol1_1_cry_1_0 ( .FCO(ilol1_1_cry_1), .S(ilol1_1_cry_1_0_S), .Y(ilol1_1_cry_1_0_Y), .B(l1ol1_Z[1]), .C(GND), .D(GND), .A(lIol1_Z[4]), .FCI(ilol1_1_cry_0) ); defparam ilol1_1_cry_1_0.INIT=20'h5AA00; // @28:450858 ARI1 ilol1_1_cry_2 ( .FCO(ilol1_1_cry_2_Z), .S(ilol11[2]), .Y(ilol1_1_cry_2_Y), .B(l1ol1_Z[2]), .C(lIol1_Z[4]), .D(GND), .A(i0ol1[2]), .FCI(ilol1_1_cry_1) ); defparam ilol1_1_cry_2.INIT=20'h588BB; // @28:450858 ARI1 ilol1_1_cry_3 ( .FCO(ilol1_1_cry_3_Z), .S(ilol11[3]), .Y(ilol1_1_cry_3_Y), .B(i0ol1[3]), .C(l1ol1_Z[3]), .D(lIol1_Z[4]), .A(VCC), .FCI(ilol1_1_cry_2_Z) ); defparam ilol1_1_cry_3.INIT=20'h4CA00; // @28:450858 ARI1 ilol1_1_cry_4 ( .FCO(ilol1_1_cry_4_Z), .S(ilol11[4]), .Y(ilol1_1_cry_4_Y), .B(i0ol1[4]), .C(l1ol1_Z[4]), .D(lIol1_Z[4]), .A(VCC), .FCI(ilol1_1_cry_3_Z) ); defparam ilol1_1_cry_4.INIT=20'h4CA00; // @28:450858 ARI1 ilol1_1_cry_5 ( .FCO(ilol1_1_cry_5_Z), .S(ilol11[5]), .Y(ilol1_1_cry_5_Y), .B(i0ol1[5]), .C(l1ol1_Z[5]), .D(lIol1_Z[4]), .A(VCC), .FCI(ilol1_1_cry_4_Z) ); defparam ilol1_1_cry_5.INIT=20'h4CA00; // @28:450858 ARI1 ilol1_1_cry_6 ( .FCO(ilol1_1_cry_6_Z), .S(ilol11[6]), .Y(ilol1_1_cry_6_Y), .B(i0ol1[6]), .C(l1ol1_Z[6]), .D(lIol1_Z[4]), .A(VCC), .FCI(ilol1_1_cry_5_Z) ); defparam ilol1_1_cry_6.INIT=20'h4CA00; // @28:450858 ARI1 ilol1_1_cry_7 ( .FCO(ilol1_1_cry_7_Z), .S(ilol11[7]), .Y(ilol1_1_cry_7_Y), .B(i0ol1[7]), .C(l1ol1_Z[7]), .D(lIol1_Z[4]), .A(VCC), .FCI(ilol1_1_cry_6_Z) ); defparam ilol1_1_cry_7.INIT=20'h4CA00; // @28:450858 ARI1 ilol1_1_cry_8 ( .FCO(ilol1_1_cry_8_Z), .S(ilol11[8]), .Y(ilol1_1_cry_8_Y), .B(i0ol1[8]), .C(l1ol1_Z[8]), .D(lIol1_Z[4]), .A(VCC), .FCI(ilol1_1_cry_7_Z) ); defparam ilol1_1_cry_8.INIT=20'h4CA00; // @28:450858 ARI1 ilol1_1_cry_9 ( .FCO(ilol1_1_cry_9_Z), .S(ilol11[9]), .Y(ilol1_1_cry_9_Y), .B(i0ol1[9]), .C(l1ol1_Z[9]), .D(lIol1_Z[4]), .A(VCC), .FCI(ilol1_1_cry_8_Z) ); defparam ilol1_1_cry_9.INIT=20'h4CA00; // @28:450858 ARI1 ilol1_1_cry_10 ( .FCO(ilol1_1_cry_10_Z), .S(ilol11[10]), .Y(ilol1_1_cry_10_Y), .B(i0ol1[10]), .C(l1ol1_Z[10]), .D(lIol1_Z[4]), .A(VCC), .FCI(ilol1_1_cry_9_Z) ); defparam ilol1_1_cry_10.INIT=20'h4CA00; // @28:450858 ARI1 ilol1_1_cry_11 ( .FCO(ilol1_1_cry_11_Z), .S(ilol11[11]), .Y(ilol1_1_cry_11_Y), .B(i0ol1[11]), .C(l1ol1_Z[11]), .D(lIol1_Z[4]), .A(VCC), .FCI(ilol1_1_cry_10_Z) ); defparam ilol1_1_cry_11.INIT=20'h4CA00; // @28:450858 ARI1 ilol1_1_s_13 ( .FCO(ilol1_1_s_13_FCO), .S(ilol11[13]), .Y(ilol1_1_s_13_Y), .B(i0ol1[13]), .C(l1ol1_Z[13]), .D(lIol1_Z[4]), .A(VCC), .FCI(ilol1_1_cry_12_Z) ); defparam ilol1_1_s_13.INIT=20'h4CA00; // @28:450858 ARI1 ilol1_1_cry_12 ( .FCO(ilol1_1_cry_12_Z), .S(ilol11[12]), .Y(ilol1_1_cry_12_Y), .B(i0ol1[12]), .C(l1ol1_Z[12]), .D(lIol1_Z[4]), .A(VCC), .FCI(ilol1_1_cry_11_Z) ); defparam ilol1_1_cry_12.INIT=20'h4CA00; // @28:449966 ARI1 un7_iIol1_cry_0 ( .FCO(un7_iIol1_cry_0_Z), .S(un7_iIol1_cry_0_S), .Y(un7_iIol1_cry_0_Y), .B(ilol10[2]), .C(ilol11[2]), .D(un2_IOIl1_i), .A(olol1_Z[0]), .FCI(GND) ); defparam un7_iIol1_cry_0.INIT=20'h5CA35; // @28:449966 ARI1 un7_iIol1_cry_1 ( .FCO(un7_iIol1_cry_1_Z), .S(un7_iIol1_cry_1_S), .Y(un7_iIol1_cry_1_Y), .B(un2_IOIl1_i), .C(ilol11[3]), .D(ilol10[3]), .A(olol1_Z[1]), .FCI(un7_iIol1_cry_0_Z) ); defparam un7_iIol1_cry_1.INIT=20'h5D827; // @28:449966 ARI1 un7_iIol1_cry_2 ( .FCO(un7_iIol1_cry_2_Z), .S(un7_iIol1_cry_2_S), .Y(un7_iIol1_cry_2_Y), .B(un2_IOIl1_i), .C(ilol11[4]), .D(ilol10[4]), .A(olol1_Z[2]), .FCI(un7_iIol1_cry_1_Z) ); defparam un7_iIol1_cry_2.INIT=20'h5D827; // @28:449966 ARI1 un7_iIol1_cry_3 ( .FCO(un7_iIol1_cry_3_Z), .S(un7_iIol1_cry_3_S), .Y(un7_iIol1_cry_3_Y), .B(un2_IOIl1_i), .C(ilol11[5]), .D(ilol10[5]), .A(olol1_Z[3]), .FCI(un7_iIol1_cry_2_Z) ); defparam un7_iIol1_cry_3.INIT=20'h5D827; // @28:449966 ARI1 un7_iIol1_cry_4 ( .FCO(un7_iIol1_cry_4_Z), .S(un7_iIol1_cry_4_S), .Y(un7_iIol1_cry_4_Y), .B(un2_IOIl1_i), .C(ilol11[6]), .D(ilol10[6]), .A(olol1_Z[4]), .FCI(un7_iIol1_cry_3_Z) ); defparam un7_iIol1_cry_4.INIT=20'h5D827; // @28:449966 ARI1 un7_iIol1_cry_5 ( .FCO(un7_iIol1_cry_5_Z), .S(un7_iIol1_cry_5_S), .Y(un7_iIol1_cry_5_Y), .B(un2_IOIl1_i), .C(ilol11[7]), .D(ilol10[7]), .A(olol1_Z[5]), .FCI(un7_iIol1_cry_4_Z) ); defparam un7_iIol1_cry_5.INIT=20'h5D827; // @28:449966 ARI1 un7_iIol1_cry_6 ( .FCO(un7_iIol1_cry_6_Z), .S(un7_iIol1_cry_6_S), .Y(un7_iIol1_cry_6_Y), .B(un2_IOIl1_i), .C(ilol11[8]), .D(ilol10[8]), .A(olol1_Z[6]), .FCI(un7_iIol1_cry_5_Z) ); defparam un7_iIol1_cry_6.INIT=20'h5D827; // @28:449966 ARI1 un7_iIol1_cry_7 ( .FCO(un7_iIol1_cry_7_Z), .S(un7_iIol1_cry_7_S), .Y(un7_iIol1_cry_7_Y), .B(un2_IOIl1_i), .C(ilol11[9]), .D(ilol10[9]), .A(olol1_Z[7]), .FCI(un7_iIol1_cry_6_Z) ); defparam un7_iIol1_cry_7.INIT=20'h5D827; // @28:449966 ARI1 un7_iIol1_cry_8 ( .FCO(un7_iIol1_cry_8_Z), .S(un7_iIol1_cry_8_S), .Y(un7_iIol1_cry_8_Y), .B(un2_IOIl1_i), .C(ilol11[10]), .D(ilol10[10]), .A(olol1_Z[8]), .FCI(un7_iIol1_cry_7_Z) ); defparam un7_iIol1_cry_8.INIT=20'h5D827; // @28:449966 ARI1 un7_iIol1_cry_9 ( .FCO(un7_iIol1_cry_9_Z), .S(un7_iIol1_cry_9_S), .Y(un7_iIol1_cry_9_Y), .B(un2_IOIl1_i), .C(ilol11[11]), .D(ilol10[11]), .A(olol1_Z[9]), .FCI(un7_iIol1_cry_8_Z) ); defparam un7_iIol1_cry_9.INIT=20'h5D827; // @28:449966 ARI1 un7_iIol1_cry_10 ( .FCO(un7_iIol1_cry_10_Z), .S(un7_iIol1_cry_10_S), .Y(un7_iIol1_cry_10_Y), .B(un2_IOIl1_i), .C(ilol11[12]), .D(ilol10[12]), .A(olol1_Z[10]), .FCI(un7_iIol1_cry_9_Z) ); defparam un7_iIol1_cry_10.INIT=20'h5D827; // @28:452231 ARI1 \IioO1_3_1_0_wmux_0[5] ( .FCO(IioO1_3_1_0_co1[5]), .S(IioO1_3_1_0_wmux_0_S[5]), .Y(IioO1[5]), .B(I1ol1_Z[0]), .C(i1ol1[13]), .D(i1ol1[29]), .A(IioO1_3_1_0_y0[5]), .FCI(IioO1_3_1_0_co0[5]) ); defparam \IioO1_3_1_0_wmux_0[5] .INIT=20'h0F588; // @28:452231 ARI1 \IioO1_3_1_0_wmux[5] ( .FCO(IioO1_3_1_0_co0[5]), .S(IioO1_3_1_0_wmux_S[5]), .Y(IioO1_3_1_0_y0[5]), .B(I1ol1_Z[0]), .C(i1ol1[5]), .D(i1ol1[21]), .A(I1ol1_Z[1]), .FCI(VCC) ); defparam \IioO1_3_1_0_wmux[5] .INIT=20'h0FA44; // @28:452231 ARI1 \IioO1_3_1_0_wmux_0[6] ( .FCO(IioO1_3_1_0_co1[6]), .S(IioO1_3_1_0_wmux_0_S[6]), .Y(IioO1[6]), .B(I1ol1_Z[0]), .C(i1ol1[14]), .D(i1ol1[30]), .A(IioO1_3_1_0_y0[6]), .FCI(IioO1_3_1_0_co0[6]) ); defparam \IioO1_3_1_0_wmux_0[6] .INIT=20'h0F588; // @28:452231 ARI1 \IioO1_3_1_0_wmux[6] ( .FCO(IioO1_3_1_0_co0[6]), .S(IioO1_3_1_0_wmux_S[6]), .Y(IioO1_3_1_0_y0[6]), .B(I1ol1_Z[0]), .C(i1ol1[6]), .D(i1ol1[22]), .A(I1ol1_Z[1]), .FCI(VCC) ); defparam \IioO1_3_1_0_wmux[6] .INIT=20'h0FA44; // @28:452231 ARI1 \IioO1_3_1_0_wmux_0[2] ( .FCO(IioO1_3_1_0_co1[2]), .S(IioO1_3_1_0_wmux_0_S[2]), .Y(IioO1[2]), .B(I1ol1_Z[0]), .C(i1ol1[10]), .D(i1ol1[26]), .A(IioO1_3_1_0_y0[2]), .FCI(IioO1_3_1_0_co0[2]) ); defparam \IioO1_3_1_0_wmux_0[2] .INIT=20'h0F588; // @28:452231 ARI1 \IioO1_3_1_0_wmux[2] ( .FCO(IioO1_3_1_0_co0[2]), .S(IioO1_3_1_0_wmux_S[2]), .Y(IioO1_3_1_0_y0[2]), .B(I1ol1_Z[0]), .C(i1ol1[2]), .D(i1ol1[18]), .A(I1ol1_Z[1]), .FCI(VCC) ); defparam \IioO1_3_1_0_wmux[2] .INIT=20'h0FA44; // @28:452231 ARI1 \IioO1_3_1_0_wmux_0[7] ( .FCO(IioO1_3_1_0_co1[7]), .S(IioO1_3_1_0_wmux_0_S[7]), .Y(IioO1[7]), .B(I1ol1_Z[0]), .C(i1ol1[15]), .D(i1ol1[31]), .A(IioO1_3_1_0_y0[7]), .FCI(IioO1_3_1_0_co0[7]) ); defparam \IioO1_3_1_0_wmux_0[7] .INIT=20'h0F588; // @28:452231 ARI1 \IioO1_3_1_0_wmux[7] ( .FCO(IioO1_3_1_0_co0[7]), .S(IioO1_3_1_0_wmux_S[7]), .Y(IioO1_3_1_0_y0[7]), .B(I1ol1_Z[0]), .C(i1ol1[7]), .D(i1ol1[23]), .A(I1ol1_Z[1]), .FCI(VCC) ); defparam \IioO1_3_1_0_wmux[7] .INIT=20'h0FA44; // @28:452231 ARI1 \IioO1_3_1_0_wmux_0[4] ( .FCO(IioO1_3_1_0_co1[4]), .S(IioO1_3_1_0_wmux_0_S[4]), .Y(IioO1[4]), .B(I1ol1_Z[0]), .C(i1ol1[12]), .D(i1ol1[28]), .A(IioO1_3_1_0_y0[4]), .FCI(IioO1_3_1_0_co0[4]) ); defparam \IioO1_3_1_0_wmux_0[4] .INIT=20'h0F588; // @28:452231 ARI1 \IioO1_3_1_0_wmux[4] ( .FCO(IioO1_3_1_0_co0[4]), .S(IioO1_3_1_0_wmux_S[4]), .Y(IioO1_3_1_0_y0[4]), .B(I1ol1_Z[0]), .C(i1ol1[4]), .D(i1ol1[20]), .A(I1ol1_Z[1]), .FCI(VCC) ); defparam \IioO1_3_1_0_wmux[4] .INIT=20'h0FA44; // @28:452231 ARI1 \IioO1_3_1_0_wmux_0[3] ( .FCO(IioO1_3_1_0_co1[3]), .S(IioO1_3_1_0_wmux_0_S[3]), .Y(IioO1[3]), .B(I1ol1_Z[0]), .C(i1ol1[11]), .D(i1ol1[27]), .A(IioO1_3_1_0_y0[3]), .FCI(IioO1_3_1_0_co0[3]) ); defparam \IioO1_3_1_0_wmux_0[3] .INIT=20'h0F588; // @28:452231 ARI1 \IioO1_3_1_0_wmux[3] ( .FCO(IioO1_3_1_0_co0[3]), .S(IioO1_3_1_0_wmux_S[3]), .Y(IioO1_3_1_0_y0[3]), .B(I1ol1_Z[0]), .C(i1ol1[3]), .D(i1ol1[19]), .A(I1ol1_Z[1]), .FCI(VCC) ); defparam \IioO1_3_1_0_wmux[3] .INIT=20'h0FA44; // @28:452231 ARI1 \IioO1_3_1_0_wmux_0[1] ( .FCO(IioO1_3_1_0_co1[1]), .S(IioO1_3_1_0_wmux_0_S[1]), .Y(IioO1[1]), .B(I1ol1_Z[0]), .C(i1ol1[9]), .D(i1ol1[25]), .A(IioO1_3_1_0_y0[1]), .FCI(IioO1_3_1_0_co0[1]) ); defparam \IioO1_3_1_0_wmux_0[1] .INIT=20'h0F588; // @28:452231 ARI1 \IioO1_3_1_0_wmux[1] ( .FCO(IioO1_3_1_0_co0[1]), .S(IioO1_3_1_0_wmux_S[1]), .Y(IioO1_3_1_0_y0[1]), .B(I1ol1_Z[0]), .C(i1ol1[1]), .D(i1ol1[17]), .A(I1ol1_Z[1]), .FCI(VCC) ); defparam \IioO1_3_1_0_wmux[1] .INIT=20'h0FA44; // @28:452231 ARI1 \IioO1_3_1_0_wmux_0[0] ( .FCO(IioO1_3_1_0_co1[0]), .S(IioO1_3_1_0_wmux_0_S[0]), .Y(IioO1[0]), .B(I1ol1_Z[0]), .C(i1ol1[8]), .D(i1ol1[24]), .A(IioO1_3_1_0_y0[0]), .FCI(IioO1_3_1_0_co0[0]) ); defparam \IioO1_3_1_0_wmux_0[0] .INIT=20'h0F588; // @28:452231 ARI1 \IioO1_3_1_0_wmux[0] ( .FCO(IioO1_3_1_0_co0[0]), .S(IioO1_3_1_0_wmux_S[0]), .Y(IioO1_3_1_0_y0[0]), .B(I1ol1_Z[0]), .C(i1ol1[0]), .D(i1ol1[16]), .A(I1ol1_Z[1]), .FCI(VCC) ); defparam \IioO1_3_1_0_wmux[0] .INIT=20'h0FA44; // @28:451895 CFG4 Oiol1 ( .A(i1ol1[34]), .B(liol1_Z), .C(Oiol1_1_Z), .D(Iiol1_Z), .Y(Oiol1_Z) ); defparam Oiol1.INIT=16'hCC80; // @28:451895 CFG4 Oiol1_1 ( .A(i1ol1[33]), .B(i1ol1[32]), .C(I1ol1_Z[1]), .D(I1ol1_Z[0]), .Y(Oiol1_1_Z) ); defparam Oiol1_1.INIT=16'h1248; // @28:450999 CFG2 un1_IIiO1_1_0 ( .A(lIol1_Z[3]), .B(lIol1_Z[5]), .Y(un3_IOIl1_0) ); defparam un1_IIiO1_1_0.INIT=4'hE; // @28:451168 CFG2 \genblk1.un2_o1ol1_0 ( .A(I1ol1_Z[0]), .B(IIiO1_1z), .Y(un2_o1ol1_0) ); defparam \genblk1.un2_o1ol1_0 .INIT=4'h8; // @28:450411 CFG2 un1_oIiO1 ( .A(oIiO1), .B(oiol1_Z), .Y(un1_oIiO1_i) ); defparam un1_oIiO1.INIT=4'h2; // @28:452836 CFG2 OIil1 ( .A(lOil1_Z), .B(oOil1_Z), .Y(OIil1_Z) ); defparam OIil1.INIT=4'h2; // @28:452973 CFG2 \genblk6.il1I1_4[12] ( .A(I10i0[12]), .B(iIoI1[12]), .Y(il1I1_4[12]) ); defparam \genblk6.il1I1_4[12] .INIT=4'h2; // @28:452973 CFG2 \genblk6.il1I1_4[13] ( .A(I10i0[13]), .B(iIoI1[12]), .Y(il1I1_4[13]) ); defparam \genblk6.il1I1_4[13] .INIT=4'h2; // @28:452973 CFG2 \genblk6.il1I1_4[14] ( .A(I10i0[14]), .B(iIoI1[12]), .Y(il1I1_4[14]) ); defparam \genblk6.il1I1_4[14] .INIT=4'h2; // @28:452973 CFG2 \genblk6.il1I1_4[15] ( .A(I10i0[15]), .B(iIoI1[12]), .Y(il1I1_4[15]) ); defparam \genblk6.il1I1_4[15] .INIT=4'h2; // @28:452973 CFG2 \genblk6.il1I1_4[16] ( .A(I10i0[16]), .B(iIoI1[12]), .Y(il1I1_4[16]) ); defparam \genblk6.il1I1_4[16] .INIT=4'h2; // @28:452973 CFG2 \genblk6.il1I1_4[17] ( .A(I10i0[17]), .B(iIoI1[12]), .Y(il1I1_4[17]) ); defparam \genblk6.il1I1_4[17] .INIT=4'h2; // @28:452973 CFG2 \genblk6.il1I1_4[18] ( .A(I10i0[18]), .B(iIoI1[12]), .Y(il1I1_4[18]) ); defparam \genblk6.il1I1_4[18] .INIT=4'h2; // @28:452973 CFG2 \genblk6.il1I1_4[19] ( .A(I10i0[19]), .B(iIoI1[12]), .Y(il1I1_4[19]) ); defparam \genblk6.il1I1_4[19] .INIT=4'h2; // @28:452973 CFG2 \genblk6.il1I1_4[20] ( .A(I10i0[20]), .B(iIoI1[12]), .Y(il1I1_4[20]) ); defparam \genblk6.il1I1_4[20] .INIT=4'h2; // @28:452973 CFG2 \genblk6.il1I1_4[21] ( .A(I10i0[21]), .B(iIoI1[12]), .Y(il1I1_4[21]) ); defparam \genblk6.il1I1_4[21] .INIT=4'h2; // @28:452973 CFG2 \genblk6.il1I1_4[22] ( .A(I10i0[22]), .B(iIoI1[12]), .Y(il1I1_4[22]) ); defparam \genblk6.il1I1_4[22] .INIT=4'h2; // @28:452973 CFG2 \genblk6.il1I1_4[23] ( .A(I10i0[23]), .B(iIoI1[12]), .Y(il1I1_4[23]) ); defparam \genblk6.il1I1_4[23] .INIT=4'h2; // @28:452973 CFG2 \genblk6.il1I1_4[24] ( .A(I10i0[24]), .B(iIoI1[12]), .Y(il1I1_4[24]) ); defparam \genblk6.il1I1_4[24] .INIT=4'h2; // @28:452973 CFG2 \genblk6.il1I1_4[25] ( .A(I10i0[25]), .B(iIoI1[12]), .Y(il1I1_4[25]) ); defparam \genblk6.il1I1_4[25] .INIT=4'h2; // @28:452973 CFG2 \genblk6.il1I1_4[26] ( .A(I10i0[26]), .B(iIoI1[12]), .Y(il1I1_4[26]) ); defparam \genblk6.il1I1_4[26] .INIT=4'h2; // @28:452973 CFG2 \genblk6.il1I1_4[27] ( .A(I10i0[27]), .B(iIoI1[12]), .Y(il1I1_4[27]) ); defparam \genblk6.il1I1_4[27] .INIT=4'h2; // @28:452973 CFG2 \genblk6.il1I1_4[28] ( .A(I10i0[28]), .B(iIoI1[12]), .Y(il1I1_4[28]) ); defparam \genblk6.il1I1_4[28] .INIT=4'h2; // @28:452973 CFG2 \genblk6.il1I1_4[29] ( .A(I10i0[29]), .B(iIoI1[12]), .Y(il1I1_4[29]) ); defparam \genblk6.il1I1_4[29] .INIT=4'h2; // @28:452973 CFG2 \genblk6.il1I1_4[30] ( .A(I10i0[30]), .B(iIoI1[12]), .Y(il1I1_4[30]) ); defparam \genblk6.il1I1_4[30] .INIT=4'h2; // @28:452973 CFG2 \genblk6.il1I1_4[31] ( .A(I10i0[31]), .B(iIoI1[12]), .Y(il1I1_4[31]) ); defparam \genblk6.il1I1_4[31] .INIT=4'h2; // @28:452973 CFG2 \genblk6.il1I1_4[32] ( .A(I10i0[32]), .B(iIoI1[12]), .Y(il1I1_4[32]) ); defparam \genblk6.il1I1_4[32] .INIT=4'h2; // @28:452973 CFG2 \genblk6.il1I1_4[33] ( .A(I10i0[33]), .B(iIoI1[12]), .Y(il1I1_4[33]) ); defparam \genblk6.il1I1_4[33] .INIT=4'h2; // @28:452973 CFG2 \genblk6.il1I1_4[34] ( .A(I10i0[34]), .B(iIoI1[12]), .Y(il1I1_4[34]) ); defparam \genblk6.il1I1_4[34] .INIT=4'h2; // @28:452973 CFG2 \genblk6.il1I1_4[35] ( .A(I10i0[35]), .B(iIoI1[12]), .Y(il1I1_4[35]) ); defparam \genblk6.il1I1_4[35] .INIT=4'h2; // @28:452973 CFG2 \genblk6.il1I1_4[36] ( .A(I10i0[36]), .B(iIoI1[12]), .Y(il1I1_4[36]) ); defparam \genblk6.il1I1_4[36] .INIT=4'h2; // @28:452973 CFG2 \genblk6.il1I1_4[37] ( .A(I10i0[37]), .B(iIoI1[12]), .Y(il1I1_4[37]) ); defparam \genblk6.il1I1_4[37] .INIT=4'h2; // @28:452973 CFG2 \genblk6.il1I1_4[38] ( .A(I10i0[38]), .B(iIoI1[12]), .Y(il1I1_4[38]) ); defparam \genblk6.il1I1_4[38] .INIT=4'h2; // @28:452973 CFG2 \genblk6.il1I1_4[39] ( .A(I10i0[39]), .B(iIoI1[12]), .Y(il1I1_4[39]) ); defparam \genblk6.il1I1_4[39] .INIT=4'h2; // @28:451144 CFG2 l1ol15 ( .A(OOiO1_1z), .B(oIol1_Z), .Y(l1ol15_Z) ); defparam l1ol15.INIT=4'h2; // @28:451947 CFG2 IOiO1 ( .A(Oiol1_Z), .B(lOiO1_1z), .Y(IOiO1_1z) ); defparam IOiO1.INIT=4'h2; // @28:452054 CFG2 un1_liol17_1 ( .A(lIol1_Z[2]), .B(Iiol1_Z), .Y(un1_liol17_1_Z) ); defparam un1_liol17_1.INIT=4'hE; // @28:450303 CFG2 \lIol1_8_0_a2[0] ( .A(lIol117_Z), .B(lIol1_Z[2]), .Y(N_342) ); defparam \lIol1_8_0_a2[0] .INIT=4'h4; // @28:450303 CFG2 \lIol1_8_0_o3[4] ( .A(IIiO1_1z), .B(OOil1_Z), .Y(N_321) ); defparam \lIol1_8_0_o3[4] .INIT=4'hE; // @28:450313 CFG2 lIol17 ( .A(I1oI1), .B(oool1_1z), .Y(lIol17_Z) ); defparam lIol17.INIT=4'h8; // @28:452531 CFG2 olol15 ( .A(Oool1_Z), .B(i10I1_1z), .Y(olol15_Z) ); defparam olol15.INIT=4'h2; // @28:450340 CFG2 lIol117 ( .A(iIiO1), .B(iiol1_Z), .Y(lIol117_Z) ); defparam lIol117.INIT=4'h2; // @28:434881 CFG3 un1_I0ol1_3_0_m_cry_4_RNO ( .A(i0ol1[4]), .B(l1ol1_Z[4]), .C(lIol1_Z[4]), .Y(ilol1_1_axb_4) ); defparam un1_I0ol1_3_0_m_cry_4_RNO.INIT=8'hCA; // @28:434881 CFG3 un1_I0ol1_3_0_m_cry_5_RNO ( .A(i0ol1[5]), .B(l1ol1_Z[5]), .C(lIol1_Z[4]), .Y(ilol1_1_axb_5) ); defparam un1_I0ol1_3_0_m_cry_5_RNO.INIT=8'hCA; // @28:434881 CFG3 un1_I0ol1_3_0_m_cry_6_RNO ( .A(i0ol1[6]), .B(l1ol1_Z[6]), .C(lIol1_Z[4]), .Y(ilol1_1_axb_6) ); defparam un1_I0ol1_3_0_m_cry_6_RNO.INIT=8'hCA; // @28:434881 CFG3 un1_I0ol1_3_0_m_cry_7_RNO ( .A(i0ol1[7]), .B(l1ol1_Z[7]), .C(lIol1_Z[4]), .Y(ilol1_1_axb_7) ); defparam un1_I0ol1_3_0_m_cry_7_RNO.INIT=8'hCA; // @28:434881 CFG3 un1_I0ol1_3_0_m_cry_10_RNO ( .A(i0ol1[10]), .B(l1ol1_Z[10]), .C(lIol1_Z[4]), .Y(ilol1_1_axb_10) ); defparam un1_I0ol1_3_0_m_cry_10_RNO.INIT=8'hCA; // @28:434881 CFG3 un1_I0ol1_3_0_m_cry_12_RNO ( .A(i0ol1[12]), .B(l1ol1_Z[12]), .C(lIol1_Z[4]), .Y(ilol1_1_axb_12) ); defparam un1_I0ol1_3_0_m_cry_12_RNO.INIT=8'hCA; // @28:434881 CFG3 un1_I0ol1_3_0_m_s_13_RNO_0 ( .A(i0ol1[13]), .B(l1ol1_Z[13]), .C(lIol1_Z[4]), .Y(ilol1_1_axb_13) ); defparam un1_I0ol1_3_0_m_s_13_RNO_0.INIT=8'hCA; // @28:434881 CFG3 un1_I0ol1_3_0_m_cry_11_RNO ( .A(i0ol1[11]), .B(l1ol1_Z[11]), .C(lIol1_Z[4]), .Y(ilol1_1_axb_11) ); defparam un1_I0ol1_3_0_m_cry_11_RNO.INIT=8'hCA; // @28:434881 CFG3 un1_I0ol1_3_0_m_cry_9_RNO ( .A(i0ol1[9]), .B(l1ol1_Z[9]), .C(lIol1_Z[4]), .Y(ilol1_1_axb_9) ); defparam un1_I0ol1_3_0_m_cry_9_RNO.INIT=8'hCA; // @28:434881 CFG3 un1_I0ol1_3_0_m_cry_8_RNO ( .A(i0ol1[8]), .B(l1ol1_Z[8]), .C(lIol1_Z[4]), .Y(ilol1_1_axb_8) ); defparam un1_I0ol1_3_0_m_cry_8_RNO.INIT=8'hCA; // @28:434881 CFG3 un1_I0ol1_3_0_m_cry_3_RNO ( .A(i0ol1[3]), .B(l1ol1_Z[3]), .C(lIol1_Z[4]), .Y(ilol1_1_axb_3) ); defparam un1_I0ol1_3_0_m_cry_3_RNO.INIT=8'hCA; // @28:434881 CFG3 un1_I0ol1_3_0_m_cry_2_0_RNO ( .A(i0ol1[2]), .B(l1ol1_Z[2]), .C(lIol1_Z[4]), .Y(un1_I0ol1_3_a_1[2]) ); defparam un1_I0ol1_3_0_m_cry_2_0_RNO.INIT=8'hCA; // @28:450858 CFG3 \ilol1_m[2] ( .A(ilol10[2]), .B(un2_IOIl1_i), .C(ilol11[2]), .Y(ilol1[2]) ); defparam \ilol1_m[2] .INIT=8'hE2; // @28:450858 CFG3 \ilol1_m[3] ( .A(ilol10[3]), .B(un2_IOIl1_i), .C(ilol11[3]), .Y(ilol1[3]) ); defparam \ilol1_m[3] .INIT=8'hE2; // @28:450858 CFG3 \ilol1_m[4] ( .A(ilol10[4]), .B(un2_IOIl1_i), .C(ilol11[4]), .Y(ilol1[4]) ); defparam \ilol1_m[4] .INIT=8'hE2; // @28:450858 CFG3 \ilol1_m[5] ( .A(ilol10[5]), .B(un2_IOIl1_i), .C(ilol11[5]), .Y(ilol1[5]) ); defparam \ilol1_m[5] .INIT=8'hE2; // @28:450858 CFG3 \ilol1_m[6] ( .A(ilol10[6]), .B(un2_IOIl1_i), .C(ilol11[6]), .Y(ilol1[6]) ); defparam \ilol1_m[6] .INIT=8'hE2; // @28:450858 CFG3 \ilol1_m[7] ( .A(ilol10[7]), .B(un2_IOIl1_i), .C(ilol11[7]), .Y(ilol1[7]) ); defparam \ilol1_m[7] .INIT=8'hE2; // @28:450858 CFG3 \ilol1_m[8] ( .A(ilol10[8]), .B(un2_IOIl1_i), .C(ilol11[8]), .Y(ilol1[8]) ); defparam \ilol1_m[8] .INIT=8'hE2; // @28:450858 CFG3 \ilol1_m[9] ( .A(ilol10[9]), .B(un2_IOIl1_i), .C(ilol11[9]), .Y(ilol1[9]) ); defparam \ilol1_m[9] .INIT=8'hE2; // @28:450858 CFG3 \ilol1_m[10] ( .A(ilol10[10]), .B(un2_IOIl1_i), .C(ilol11[10]), .Y(ilol1[10]) ); defparam \ilol1_m[10] .INIT=8'hE2; // @28:450858 CFG3 \ilol1_m[11] ( .A(ilol10[11]), .B(un2_IOIl1_i), .C(ilol11[11]), .Y(ilol1[11]) ); defparam \ilol1_m[11] .INIT=8'hE2; // @28:450858 CFG3 \ilol1_m[12] ( .A(ilol10[12]), .B(un2_IOIl1_i), .C(ilol11[12]), .Y(ilol1[12]) ); defparam \ilol1_m[12] .INIT=8'hE2; // @28:450858 CFG3 \ilol1_m[13] ( .A(ilol10[13]), .B(un2_IOIl1_i), .C(ilol11[13]), .Y(ilol1[13]) ); defparam \ilol1_m[13] .INIT=8'hE2; // @28:450303 CFG3 \lIol1_8_i_m3[1] ( .A(OOiO1_1z), .B(lIol117_Z), .C(lIol1_0), .Y(N_322) ); defparam \lIol1_8_i_m3[1] .INIT=8'h8D; // @28:450303 CFG4 \lIol1_8_0_0[3] ( .A(OOiO1_1z), .B(lIol117_Z), .C(lIol1_Z[2]), .D(llol1), .Y(lIol1_8_0_0_Z[3]) ); defparam \lIol1_8_0_0[3] .INIT=16'h88F8; // @28:450303 CFG3 \lIol1_8_0_a3_0[5] ( .A(un1_oIiO1_i), .B(N_342), .C(llol1), .Y(N_339) ); defparam \lIol1_8_0_a3_0[5] .INIT=8'h80; // @28:450303 CFG4 \lIol1_8_0_a3[0] ( .A(lIol1_Z[5]), .B(lIol1_0), .C(llol1), .D(Oiol1_Z), .Y(N_326) ); defparam \lIol1_8_0_a3[0] .INIT=16'h2202; // @28:450999 CFG2 un1_IIiO1_1 ( .A(un3_IOIl1_0), .B(IIiO1_1z), .Y(I1ol15) ); defparam un1_IIiO1_1.INIT=4'hE; // @28:450888 CFG2 l0ol19 ( .A(OIil1_Z), .B(iIoI1[12]), .Y(l0ol19_Z) ); defparam l0ol19.INIT=4'h2; // @28:450303 CFG2 \lIol1_8_0_a3[4] ( .A(lIol1_Z[4]), .B(N_321), .Y(N_336) ); defparam \lIol1_8_0_a3[4] .INIT=4'h8; // @28:450794 CFG3 un12_IOIl1 ( .A(lIol1_Z[2]), .B(IIiO1_1z), .C(OOiO1_1z), .Y(un12_IOIl1_Z) ); defparam un12_IOIl1.INIT=8'hC8; // @28:450756 CFG4 \un1_I0ol1_3_0_m[1] ( .A(IOIl10[1]), .B(un2_IOIl1_i), .C(l1ol1_Z[1]), .D(lIol1_Z[4]), .Y(IOIl1[1]) ); defparam \un1_I0ol1_3_0_m[1] .INIT=16'hE222; // @28:450756 CFG4 \un1_I0ol1_3_0_m[0] ( .A(IOIl10[0]), .B(un2_IOIl1_i), .C(l1ol1_Z[0]), .D(lIol1_Z[4]), .Y(IOIl1[0]) ); defparam \un1_I0ol1_3_0_m[0] .INIT=16'hE222; // @28:440535 CFG4 \un2_IIil1[0] ( .A(ol1I1_1z), .B(iIoI1[12]), .C(OIil1_Z), .D(iOil1_Z), .Y(un2_IIil1_Z[0]) ); defparam \un2_IIil1[0] .INIT=16'hD1C0; // @28:450303 CFG4 \lIol1_8_0_0[0] ( .A(lIol1_0), .B(lIol17_Z), .C(N_321), .D(lIol1_Z[4]), .Y(lIol1_8_0_0_Z[0]) ); defparam \lIol1_8_0_0[0] .INIT=16'h2722; // @28:450303 CFG4 \lIol1_8_0_a3_3_2[0] ( .A(un1_oIiO1_i), .B(N_342), .C(lIol1_0), .D(llol1), .Y(lIol1_8_0_a3_3_2_Z[0]) ); defparam \lIol1_8_0_a3_3_2[0] .INIT=16'h0400; // @28:450303 CFG3 \lIol1_8_0[3] ( .A(lIol1_8_0_0_Z[3]), .B(Oiol1_Z), .C(lIol1_Z[3]), .Y(lIol1_8[3]) ); defparam \lIol1_8_0[3] .INIT=8'hBA; // @28:450303 CFG4 \lIol1_8_0_a3_0[2] ( .A(llol1), .B(un1_oIiO1_i), .C(N_342), .D(Oiol1_Z), .Y(N_332) ); defparam \lIol1_8_0_a3_0[2] .INIT=16'h0020; // @28:451168 CFG4 \genblk1.un1_o1ol1 ( .A(OOiO1_1z), .B(I1ol1_Z[1]), .C(un3_IOIl1_0), .D(un2_o1ol1_0), .Y(llol15) ); defparam \genblk1.un1_o1ol1 .INIT=16'hFEFA; // @28:452973 CFG3 \genblk6.il1I1_4[0] ( .A(ilol1[2]), .B(iIoI1[12]), .C(I10i0[0]), .Y(il1I1_4[0]) ); defparam \genblk6.il1I1_4[0] .INIT=8'hB8; // @28:452973 CFG3 \genblk6.il1I1_4[1] ( .A(ilol1[3]), .B(iIoI1[12]), .C(I10i0[1]), .Y(il1I1_4[1]) ); defparam \genblk6.il1I1_4[1] .INIT=8'hB8; // @28:452973 CFG3 \genblk6.il1I1_4[2] ( .A(ilol1[4]), .B(iIoI1[12]), .C(I10i0[2]), .Y(il1I1_4[2]) ); defparam \genblk6.il1I1_4[2] .INIT=8'hB8; // @28:452973 CFG3 \genblk6.il1I1_4[3] ( .A(ilol1[5]), .B(iIoI1[12]), .C(I10i0[3]), .Y(il1I1_4[3]) ); defparam \genblk6.il1I1_4[3] .INIT=8'hB8; // @28:452973 CFG3 \genblk6.il1I1_4[4] ( .A(ilol1[6]), .B(iIoI1[12]), .C(I10i0[4]), .Y(il1I1_4[4]) ); defparam \genblk6.il1I1_4[4] .INIT=8'hB8; // @28:452973 CFG3 \genblk6.il1I1_4[7] ( .A(ilol1[9]), .B(iIoI1[12]), .C(I10i0[7]), .Y(il1I1_4[7]) ); defparam \genblk6.il1I1_4[7] .INIT=8'hB8; // @28:452973 CFG3 \genblk6.il1I1_4[8] ( .A(ilol1[10]), .B(iIoI1[12]), .C(I10i0[8]), .Y(il1I1_4[8]) ); defparam \genblk6.il1I1_4[8] .INIT=8'hB8; // @28:452973 CFG3 \genblk6.il1I1_4[9] ( .A(ilol1[11]), .B(iIoI1[12]), .C(I10i0[9]), .Y(il1I1_4[9]) ); defparam \genblk6.il1I1_4[9] .INIT=8'hB8; // @28:452973 CFG3 \genblk6.il1I1_4[10] ( .A(ilol1[12]), .B(iIoI1[12]), .C(I10i0[10]), .Y(il1I1_4[10]) ); defparam \genblk6.il1I1_4[10] .INIT=8'hB8; // @28:452973 CFG3 \genblk6.il1I1_4[11] ( .A(ilol1[13]), .B(iIoI1[12]), .C(I10i0[11]), .Y(il1I1_4[11]) ); defparam \genblk6.il1I1_4[11] .INIT=8'hB8; // @28:450872 CFG3 \l0ol1_4[2] ( .A(iIoI1[0]), .B(l0ol19_Z), .C(ilol1[2]), .Y(l0ol1_4_Z[2]) ); defparam \l0ol1_4[2] .INIT=8'hB8; // @28:450872 CFG3 \l0ol1_4[3] ( .A(iIoI1[1]), .B(l0ol19_Z), .C(ilol1[3]), .Y(l0ol1_4_Z[3]) ); defparam \l0ol1_4[3] .INIT=8'hB8; // @28:450872 CFG3 \l0ol1_4[4] ( .A(iIoI1[2]), .B(l0ol19_Z), .C(ilol1[4]), .Y(l0ol1_4_Z[4]) ); defparam \l0ol1_4[4] .INIT=8'hB8; // @28:450872 CFG3 \l0ol1_4[5] ( .A(iIoI1[3]), .B(l0ol19_Z), .C(ilol1[5]), .Y(l0ol1_4_Z[5]) ); defparam \l0ol1_4[5] .INIT=8'hB8; // @28:450872 CFG3 \l0ol1_4[6] ( .A(iIoI1[4]), .B(l0ol19_Z), .C(ilol1[6]), .Y(l0ol1_4_Z[6]) ); defparam \l0ol1_4[6] .INIT=8'hB8; // @28:450872 CFG3 \l0ol1_4[9] ( .A(iIoI1[7]), .B(l0ol19_Z), .C(ilol1[9]), .Y(l0ol1_4_Z[9]) ); defparam \l0ol1_4[9] .INIT=8'hB8; // @28:450872 CFG3 \l0ol1_4[10] ( .A(iIoI1[8]), .B(l0ol19_Z), .C(ilol1[10]), .Y(l0ol1_4_Z[10]) ); defparam \l0ol1_4[10] .INIT=8'hB8; // @28:450872 CFG3 \l0ol1_4[11] ( .A(iIoI1[9]), .B(l0ol19_Z), .C(ilol1[11]), .Y(l0ol1_4_Z[11]) ); defparam \l0ol1_4[11] .INIT=8'hB8; // @28:450872 CFG3 \l0ol1_4[12] ( .A(iIoI1[10]), .B(l0ol19_Z), .C(ilol1[12]), .Y(l0ol1_4_Z[12]) ); defparam \l0ol1_4[12] .INIT=8'hB8; // @28:450872 CFG3 \l0ol1_4[13] ( .A(iIoI1[11]), .B(l0ol19_Z), .C(ilol1[13]), .Y(l0ol1_4_Z[13]) ); defparam \l0ol1_4[13] .INIT=8'hB8; // @28:452973 CFG3 \genblk6.il1I1_4[5] ( .A(ilol1[7]), .B(iIoI1[12]), .C(I10i0[5]), .Y(il1I1_4[5]) ); defparam \genblk6.il1I1_4[5] .INIT=8'hB8; // @28:452973 CFG3 \genblk6.il1I1_4[6] ( .A(ilol1[8]), .B(iIoI1[12]), .C(I10i0[6]), .Y(il1I1_4[6]) ); defparam \genblk6.il1I1_4[6] .INIT=8'hB8; // @28:450872 CFG3 \l0ol1_4[7] ( .A(iIoI1[5]), .B(l0ol19_Z), .C(ilol1[7]), .Y(l0ol1_4_Z[7]) ); defparam \l0ol1_4[7] .INIT=8'hB8; // @28:450872 CFG3 \l0ol1_4[8] ( .A(iIoI1[6]), .B(l0ol19_Z), .C(ilol1[8]), .Y(l0ol1_4_Z[8]) ); defparam \l0ol1_4[8] .INIT=8'hB8; // @28:450766 CFG3 un2_IOIl1 ( .A(un3_IOIl1_0), .B(Oiol1_Z), .C(lIol1_Z[2]), .Y(un2_IOIl1_i) ); defparam un2_IOIl1.INIT=8'hC8; // @28:450303 CFG4 \lIol1_8_0[4] ( .A(lIol117_Z), .B(N_336), .C(lIol1_Z[2]), .D(llol1), .Y(lIol1_8[4]) ); defparam \lIol1_8_0[4] .INIT=16'hECCC; // @28:450303 CFG4 \lIol1_8_0[5] ( .A(llol1), .B(lIol1_Z[5]), .C(Oiol1_Z), .D(N_339), .Y(lIol1_8[5]) ); defparam \lIol1_8_0[5] .INIT=16'hFF08; // @28:450303 CFG4 \lIol1_8_0_1[0] ( .A(lIol1_8_0_0_Z[0]), .B(Oiol1_Z), .C(lIol1_Z[3]), .D(lIol1_0), .Y(lIol1_8_0_1_Z[0]) ); defparam \lIol1_8_0_1[0] .INIT=16'hAAEA; // @28:450303 CFG4 \lIol1_8_0[2] ( .A(IIiO1_1z), .B(OOiO1_1z), .C(lIol117_Z), .D(N_332), .Y(lIol1_8[2]) ); defparam \lIol1_8_0[2] .INIT=16'hFF08; // @28:451164 CFG2 o1ol1 ( .A(llol15), .B(Ilol1_Z), .Y(o1ol1_Z) ); defparam o1ol1.INIT=4'h8; // @28:450274 CFG4 \lIol1_RNO[1] ( .A(IIiO1_1z), .B(OOiO1_1z), .C(lIol17_Z), .D(N_322), .Y(N_315_i) ); defparam \lIol1_RNO[1] .INIT=16'h0074; // @28:449948 CFG3 iIol1 ( .A(ilol1[13]), .B(un7_iIol1_cry_10_Z), .C(olol1_Z[11]), .Y(iIol1_Z) ); defparam iIol1.INIT=8'h96; // @28:450303 CFG4 \lIol1_8_0[0] ( .A(lIol1_8_0_a3_3_2_Z[0]), .B(Oiol1_Z), .C(lIol1_8_0_1_Z[0]), .D(N_326), .Y(lIol1_8[0]) ); defparam \lIol1_8_0[0] .INIT=16'hFFF8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_AMCXTFIF_SYS_26s_11s_32s_2s_0s_0_0_1s */ module CTSE_AMCXRFIF_FAB_26s_12s_32s_2s_0_1s ( oo0i0, iloI1, oi0I1, CORETSE_0_MRXDAT, CORETSE_0_MRXBYTEVALID, io0i0, Ii0I1, o01I1, un2_O1Il1_0, O0Il1_0, CORETSE_0_MRXEOF, Oi0I1_1z, o0Il1_1z, oOoI1, lI1I1, OO1I1, ii0I1_1z, O0oI1, li0I1_1z, PF_CCC_0_0_OUT0_FABCLK_0, o0oI1_i ) ; output [11:0] oo0i0 ; input [13:0] iloI1 ; input [12:0] oi0I1 ; output [31:0] CORETSE_0_MRXDAT ; output [1:0] CORETSE_0_MRXBYTEVALID ; input [34:0] io0i0 ; output [12:0] Ii0I1 ; output [34:0] o01I1 ; output un2_O1Il1_0 ; output O0Il1_0 ; output CORETSE_0_MRXEOF ; output Oi0I1_1z ; output o0Il1_1z ; input oOoI1 ; output lI1I1 ; input OO1I1 ; input ii0I1_1z ; input O0oI1 ; output li0I1_1z ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input o0oI1_i ; wire un2_O1Il1_0 ; wire O0Il1_0 ; wire CORETSE_0_MRXEOF ; wire Oi0I1_1z ; wire o0Il1_1z ; wire oOoI1 ; wire lI1I1 ; wire OO1I1 ; wire ii0I1_1z ; wire O0oI1 ; wire li0I1_1z ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire o0oI1_i ; wire [0:0] iIIl1_Z; wire [0:0] OlIl1_Z; wire [3:1] O0Il1; wire [8:8] o01I1_4_i_m2_Z; wire [34:0] o01I1_4_Z; wire [12:0] oOIl1_Z; wire [34:0] olIl1; wire [34:0] olIl1_8; wire [34:0] llIl1; wire [34:0] ilIl1_11; wire [12:0] OOIl1; wire [12:0] IOIl1; wire [0:0] oOIl1_RNIM6IP4_Y; wire [1:1] oOIl1_RNI4GMB6_Y; wire [2:2] oOIl1_RNIJQQT7_Y; wire [3:3] oOIl1_RNI36VF9_Y; wire [4:4] oOIl1_RNIKI32B_Y; wire [5:5] oOIl1_RNI608KC_Y; wire [6:6] oOIl1_RNIPEC6E_Y; wire [7:7] oOIl1_RNIDUGOF_Y; wire [8:8] oOIl1_RNI2FLAH_Y; wire [9:9] oOIl1_RNIO0QSI_Y; wire [10:10] oOIl1_RNIMC6JM_Y; wire [12:12] oOIl1_RNIL7VVT_FCO; wire [12:12] oOIl1_RNIL7VVT_Y; wire [11:11] oOIl1_RNILPI9Q_Y; wire [5:0] un4_oiOl1_0_data_tmp; wire iiOl1_Z ; wire iiOl1_i ; wire lIIl1_Z ; wire lIIl1_i ; wire l0Il1_Z ; wire VCC ; wire I0Il1_Z ; wire GND ; wire OIIl1_Z ; wire IIIl1_Z ; wire oIIl1_Z ; wire un4_oiOl1_0_I_39_RNI9UD73_Y ; wire l01I1_Z ; wire N_50_i ; wire N_92 ; wire un1_ilIl118_i ; wire N_965_i ; wire N_966_i ; wire Ii0I16_Z ; wire N_967_i ; wire un1_ilIl118 ; wire OOIl15 ; wire IOIl1_cry_0_cy ; wire un4_oiOl1_0_I_39_RNI9UD73_S ; wire un4_oiOl1_0_I_39_FCO ; wire IOIl1_cry_0 ; wire IOIl1_cry_1 ; wire IOIl1_cry_2 ; wire IOIl1_cry_3 ; wire IOIl1_cry_4 ; wire IOIl1_cry_5 ; wire IOIl1_cry_6 ; wire IOIl1_cry_7 ; wire IOIl1_cry_8 ; wire IOIl1_cry_9 ; wire IOIl1_cry_10 ; wire IOIl1_cry_11 ; wire un1_IOIl1_cry_0_Z ; wire un1_IOIl1_cry_0_S ; wire un1_IOIl1_cry_0_Y ; wire un1_IOIl1_cry_1_Z ; wire un1_IOIl1_cry_1_S ; wire un1_IOIl1_cry_1_Y ; wire un1_IOIl1_cry_2_Z ; wire un1_IOIl1_cry_2_S ; wire un1_IOIl1_cry_2_Y ; wire un1_IOIl1_cry_3_Z ; wire un1_IOIl1_cry_3_S ; wire un1_IOIl1_cry_3_Y ; wire un1_IOIl1_cry_4_Z ; wire un1_IOIl1_cry_4_S ; wire un1_IOIl1_cry_4_Y ; wire un1_IOIl1_cry_5_Z ; wire un1_IOIl1_cry_5_S ; wire un1_IOIl1_cry_5_Y ; wire un1_IOIl1_cry_6_Z ; wire un1_IOIl1_cry_6_S ; wire un1_IOIl1_cry_6_Y ; wire un1_IOIl1_cry_7_Z ; wire un1_IOIl1_cry_7_S ; wire un1_IOIl1_cry_7_Y ; wire un1_IOIl1_cry_8_Z ; wire un1_IOIl1_cry_8_S ; wire un1_IOIl1_cry_8_Y ; wire un1_IOIl1_cry_9_Z ; wire un1_IOIl1_cry_9_S ; wire un1_IOIl1_cry_9_Y ; wire un1_IOIl1_s_11_FCO ; wire un1_IOIl1_s_11_S ; wire un1_IOIl1_s_11_Y ; wire un1_IOIl1_cry_10_Z ; wire un1_IOIl1_cry_10_S ; wire un1_IOIl1_cry_10_Y ; wire un4_oiOl1_0_I_1_S ; wire un4_oiOl1_0_I_1_Y ; wire un4_oiOl1_0_I_27_S ; wire un4_oiOl1_0_I_27_Y ; wire un4_oiOl1_0_I_15_S ; wire un4_oiOl1_0_I_15_Y ; wire un4_oiOl1_0_I_21_S ; wire un4_oiOl1_0_I_21_Y ; wire un4_oiOl1_0_I_33_S ; wire un4_oiOl1_0_I_33_Y ; wire un4_oiOl1_0_I_9_S ; wire un4_oiOl1_0_I_9_Y ; wire un4_oiOl1_0_I_39_S ; wire un4_oiOl1_0_I_39_Y ; wire un2_i0Il1_Z ; wire N_1805 ; wire N_1804 ; wire N_1803 ; wire N_1802 ; wire N_1801 ; wire N_1800 ; wire N_1799 ; wire N_1798 ; wire N_1797 ; wire N_1796 ; wire N_1795 ; wire N_1794 ; wire N_1793 ; wire N_1792 ; wire N_1791 ; wire N_1790 ; wire N_1789 ; wire N_1788 ; wire N_1787 ; wire N_1786 ; wire N_1785 ; wire N_1784 ; wire N_1783 ; wire N_1782 ; wire N_1781 ; wire N_1780 ; wire N_1779 ; wire N_1778 ; wire N_1777 ; wire N_1776 ; wire N_1775 ; wire N_1774 ; wire N_1773 ; wire N_1772 ; wire N_1771 ; wire N_1770 ; wire N_796 ; wire N_791 ; wire N_762 ; wire N_744 ; wire N_743 ; wire N_742 ; wire N_741 ; wire N_740 ; wire N_739 ; wire N_738 ; wire N_737 ; wire N_736 ; wire N_735 ; wire N_734 ; wire N_733 ; wire N_732 ; wire N_731 ; wire N_730 ; wire N_729 ; wire N_717 ; wire N_8 ; wire N_6 ; wire N_3 ; wire N_2 ; wire N_1 ; CFG1 \genblk1.O0Il1_RNO[2] ( .A(iiOl1_Z), .Y(iiOl1_i) ); defparam \genblk1.O0Il1_RNO[2] .INIT=2'h1; CFG1 li0I1_RNO ( .A(lIIl1_Z), .Y(lIIl1_i) ); defparam li0I1_RNO.INIT=2'h1; // @28:442166 SLE l0Il1 ( .Q(l0Il1_Z), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(I0Il1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442102 SLE OIIl1 ( .Q(OIIl1_Z), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IIIl1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442038 SLE lIIl1 ( .Q(lIIl1_Z), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(oIIl1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441778 SLE li0I1 ( .Q(li0I1_1z), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIIl1_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442134 SLE I0Il1 ( .Q(I0Il1_Z), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O0oI1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442070 SLE IIIl1 ( .Q(IIIl1_Z), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ii0I1_1z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442006 SLE oIIl1 ( .Q(oIIl1_Z), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(OO1I1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441701 SLE \lI1I1[0] ( .Q(lI1I1), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(iIIl1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441701 SLE \iIIl1[0] ( .Q(iIIl1_Z[0]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(OlIl1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441701 SLE \OlIl1[0] ( .Q(OlIl1_Z[0]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(oOoI1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:440714 SLE iiOl1 ( .Q(iiOl1_Z), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un4_oiOl1_0_I_39_RNI9UD73_Y), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442230 SLE l01I1 ( .Q(l01I1_Z), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(o0Il1_1z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442198 SLE o0Il1 ( .Q(o0Il1_1z), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(l0Il1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441868 SLE Oi0I1 ( .Q(Oi0I1_1z), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(OIIl1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.O0Il1[3] ( .Q(O0Il1[3]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_50_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.O0Il1[2] ( .Q(O0Il1[2]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O0Il1[3]), .EN(iiOl1_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.O0Il1[1] ( .Q(O0Il1[1]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_92), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.O0Il1[0] ( .Q(O0Il1_0), .ADn(GND), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un1_ilIl118_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442278 SLE \o01I1_1[8] ( .Q(o01I1[8]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(o01I1_4_i_m2_Z[8]), .EN(un2_O1Il1_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442278 SLE \o01I1_1[7] ( .Q(o01I1[7]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(o01I1_4_Z[7]), .EN(un2_O1Il1_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442278 SLE \o01I1_1[6] ( .Q(o01I1[6]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(o01I1_4_Z[6]), .EN(un2_O1Il1_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442278 SLE \o01I1_1[5] ( .Q(o01I1[5]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(o01I1_4_Z[5]), .EN(un2_O1Il1_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442278 SLE \o01I1_1[4] ( .Q(o01I1[4]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(o01I1_4_Z[4]), .EN(un2_O1Il1_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442278 SLE \o01I1_1[3] ( .Q(o01I1[3]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(o01I1_4_Z[3]), .EN(un2_O1Il1_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442278 SLE \o01I1_1[2] ( .Q(o01I1[2]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(o01I1_4_Z[2]), .EN(un2_O1Il1_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442278 SLE \o01I1_1[1] ( .Q(o01I1[1]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(o01I1_4_Z[1]), .EN(un2_O1Il1_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442278 SLE \o01I1_1[0] ( .Q(o01I1[0]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(o01I1_4_Z[0]), .EN(un2_O1Il1_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442278 SLE \o01I1_1[23] ( .Q(o01I1[23]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(o01I1_4_Z[23]), .EN(un2_O1Il1_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442278 SLE \o01I1_1[22] ( .Q(o01I1[22]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(o01I1_4_Z[22]), .EN(un2_O1Il1_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442278 SLE \o01I1_1[21] ( .Q(o01I1[21]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(o01I1_4_Z[21]), .EN(un2_O1Il1_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442278 SLE \o01I1_1[20] ( .Q(o01I1[20]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(o01I1_4_Z[20]), .EN(un2_O1Il1_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442278 SLE \o01I1_1[19] ( .Q(o01I1[19]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(o01I1_4_Z[19]), .EN(un2_O1Il1_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442278 SLE \o01I1_1[18] ( .Q(o01I1[18]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(o01I1_4_Z[18]), .EN(un2_O1Il1_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442278 SLE \o01I1_1[17] ( .Q(o01I1[17]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(o01I1_4_Z[17]), .EN(un2_O1Il1_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442278 SLE \o01I1_1[16] ( .Q(o01I1[16]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(o01I1_4_Z[16]), .EN(un2_O1Il1_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442278 SLE \o01I1_1[15] ( .Q(o01I1[15]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_965_i), .EN(un2_O1Il1_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442278 SLE \o01I1_1[14] ( .Q(o01I1[14]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_966_i), .EN(un2_O1Il1_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442278 SLE \o01I1_1[13] ( .Q(o01I1[13]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(o01I1_4_Z[13]), .EN(un2_O1Il1_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442278 SLE \o01I1_1[12] ( .Q(o01I1[12]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(o01I1_4_Z[12]), .EN(un2_O1Il1_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442278 SLE \o01I1_1[11] ( .Q(o01I1[11]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(o01I1_4_Z[11]), .EN(un2_O1Il1_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442278 SLE \o01I1_1[10] ( .Q(o01I1[10]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(o01I1_4_Z[10]), .EN(un2_O1Il1_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442278 SLE \o01I1_1[9] ( .Q(o01I1[9]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(o01I1_4_Z[9]), .EN(un2_O1Il1_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441825 SLE \Ii0I1_Z[2] ( .Q(Ii0I1[2]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(oOIl1_Z[2]), .EN(Ii0I16_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441825 SLE \Ii0I1_Z[1] ( .Q(Ii0I1[1]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(oOIl1_Z[1]), .EN(Ii0I16_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441825 SLE \Ii0I1_Z[0] ( .Q(Ii0I1[0]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(oOIl1_Z[0]), .EN(Ii0I16_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442278 SLE \o01I1_1[34] ( .Q(o01I1[34]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(o01I1_4_Z[34]), .EN(un2_O1Il1_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442278 SLE \o01I1_1[33] ( .Q(o01I1[33]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(o01I1_4_Z[33]), .EN(un2_O1Il1_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442278 SLE \o01I1_1[32] ( .Q(o01I1[32]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(o01I1_4_Z[32]), .EN(un2_O1Il1_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442278 SLE \o01I1_1[31] ( .Q(o01I1[31]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(o01I1_4_Z[31]), .EN(un2_O1Il1_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442278 SLE \o01I1_1[30] ( .Q(o01I1[30]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(o01I1_4_Z[30]), .EN(un2_O1Il1_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442278 SLE \o01I1_1[29] ( .Q(o01I1[29]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(o01I1_4_Z[29]), .EN(un2_O1Il1_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442278 SLE \o01I1_1[28] ( .Q(o01I1[28]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(o01I1_4_Z[28]), .EN(un2_O1Il1_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442278 SLE \o01I1_1[27] ( .Q(o01I1[27]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(o01I1_4_Z[27]), .EN(un2_O1Il1_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442278 SLE \o01I1_1[26] ( .Q(o01I1[26]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(o01I1_4_Z[26]), .EN(un2_O1Il1_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442278 SLE \o01I1_1[25] ( .Q(o01I1[25]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(o01I1_4_Z[25]), .EN(un2_O1Il1_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442278 SLE \o01I1_1[24] ( .Q(o01I1[24]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(o01I1_4_Z[24]), .EN(un2_O1Il1_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.olIl1[4] ( .Q(olIl1[4]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olIl1_8[4]), .EN(N_967_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.olIl1[3] ( .Q(olIl1[3]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olIl1_8[3]), .EN(N_967_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.olIl1[2] ( .Q(olIl1[2]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olIl1_8[2]), .EN(N_967_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.olIl1[1] ( .Q(olIl1[1]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olIl1_8[1]), .EN(N_967_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.olIl1[0] ( .Q(olIl1[0]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olIl1_8[0]), .EN(N_967_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441825 SLE \Ii0I1_Z[12] ( .Q(Ii0I1[12]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(oOIl1_Z[12]), .EN(Ii0I16_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441825 SLE \Ii0I1_Z[11] ( .Q(Ii0I1[11]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(oOIl1_Z[11]), .EN(Ii0I16_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441825 SLE \Ii0I1_Z[10] ( .Q(Ii0I1[10]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(oOIl1_Z[10]), .EN(Ii0I16_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441825 SLE \Ii0I1_Z[9] ( .Q(Ii0I1[9]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(oOIl1_Z[9]), .EN(Ii0I16_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441825 SLE \Ii0I1_Z[8] ( .Q(Ii0I1[8]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(oOIl1_Z[8]), .EN(Ii0I16_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441825 SLE \Ii0I1_Z[7] ( .Q(Ii0I1[7]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(oOIl1_Z[7]), .EN(Ii0I16_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441825 SLE \Ii0I1_Z[6] ( .Q(Ii0I1[6]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(oOIl1_Z[6]), .EN(Ii0I16_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441825 SLE \Ii0I1_Z[5] ( .Q(Ii0I1[5]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(oOIl1_Z[5]), .EN(Ii0I16_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441825 SLE \Ii0I1_Z[4] ( .Q(Ii0I1[4]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(oOIl1_Z[4]), .EN(Ii0I16_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441825 SLE \Ii0I1_Z[3] ( .Q(Ii0I1[3]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(oOIl1_Z[3]), .EN(Ii0I16_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.olIl1[19] ( .Q(olIl1[19]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olIl1_8[19]), .EN(N_967_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.olIl1[18] ( .Q(olIl1[18]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olIl1_8[18]), .EN(N_967_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.olIl1[17] ( .Q(olIl1[17]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olIl1_8[17]), .EN(N_967_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.olIl1[16] ( .Q(olIl1[16]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olIl1_8[16]), .EN(N_967_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.olIl1[15] ( .Q(olIl1[15]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olIl1_8[15]), .EN(N_967_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.olIl1[14] ( .Q(olIl1[14]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olIl1_8[14]), .EN(N_967_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.olIl1[13] ( .Q(olIl1[13]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olIl1_8[13]), .EN(N_967_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.olIl1[12] ( .Q(olIl1[12]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olIl1_8[12]), .EN(N_967_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.olIl1[11] ( .Q(olIl1[11]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olIl1_8[11]), .EN(N_967_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.olIl1[10] ( .Q(olIl1[10]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olIl1_8[10]), .EN(N_967_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.olIl1[9] ( .Q(olIl1[9]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olIl1_8[9]), .EN(N_967_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.olIl1[8] ( .Q(olIl1[8]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olIl1_8[8]), .EN(N_967_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.olIl1[7] ( .Q(olIl1[7]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olIl1_8[7]), .EN(N_967_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.olIl1[6] ( .Q(olIl1[6]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olIl1_8[6]), .EN(N_967_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.olIl1[5] ( .Q(olIl1[5]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olIl1_8[5]), .EN(N_967_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.olIl1[34] ( .Q(olIl1[34]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olIl1_8[34]), .EN(N_967_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.olIl1[33] ( .Q(olIl1[33]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olIl1_8[33]), .EN(N_967_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.olIl1[32] ( .Q(olIl1[32]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olIl1_8[32]), .EN(N_967_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.olIl1[31] ( .Q(olIl1[31]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olIl1_8[31]), .EN(N_967_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.olIl1[30] ( .Q(olIl1[30]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olIl1_8[30]), .EN(N_967_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.olIl1[29] ( .Q(olIl1[29]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olIl1_8[29]), .EN(N_967_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.olIl1[28] ( .Q(olIl1[28]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olIl1_8[28]), .EN(N_967_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.olIl1[27] ( .Q(olIl1[27]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olIl1_8[27]), .EN(N_967_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.olIl1[26] ( .Q(olIl1[26]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olIl1_8[26]), .EN(N_967_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.olIl1[25] ( .Q(olIl1[25]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olIl1_8[25]), .EN(N_967_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.olIl1[24] ( .Q(olIl1[24]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olIl1_8[24]), .EN(N_967_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.olIl1[23] ( .Q(olIl1[23]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olIl1_8[23]), .EN(N_967_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.olIl1[22] ( .Q(olIl1[22]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olIl1_8[22]), .EN(N_967_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.olIl1[21] ( .Q(olIl1[21]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olIl1_8[21]), .EN(N_967_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.olIl1[20] ( .Q(olIl1[20]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olIl1_8[20]), .EN(N_967_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.llIl1[13] ( .Q(llIl1[13]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(io0i0[13]), .EN(N_50_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.llIl1[12] ( .Q(llIl1[12]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(io0i0[12]), .EN(N_50_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.llIl1[11] ( .Q(llIl1[11]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(io0i0[11]), .EN(N_50_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.llIl1[10] ( .Q(llIl1[10]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(io0i0[10]), .EN(N_50_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.llIl1[9] ( .Q(llIl1[9]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(io0i0[9]), .EN(N_50_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.llIl1[8] ( .Q(llIl1[8]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(io0i0[8]), .EN(N_50_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.llIl1[7] ( .Q(llIl1[7]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(io0i0[7]), .EN(N_50_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.llIl1[6] ( .Q(llIl1[6]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(io0i0[6]), .EN(N_50_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.llIl1[5] ( .Q(llIl1[5]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(io0i0[5]), .EN(N_50_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.llIl1[4] ( .Q(llIl1[4]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(io0i0[4]), .EN(N_50_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.llIl1[3] ( .Q(llIl1[3]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(io0i0[3]), .EN(N_50_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.llIl1[2] ( .Q(llIl1[2]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(io0i0[2]), .EN(N_50_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.llIl1[1] ( .Q(llIl1[1]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(io0i0[1]), .EN(N_50_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.llIl1[0] ( .Q(llIl1[0]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(io0i0[0]), .EN(N_50_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.llIl1[28] ( .Q(llIl1[28]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(io0i0[28]), .EN(N_50_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.llIl1[27] ( .Q(llIl1[27]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(io0i0[27]), .EN(N_50_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.llIl1[26] ( .Q(llIl1[26]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(io0i0[26]), .EN(N_50_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.llIl1[25] ( .Q(llIl1[25]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(io0i0[25]), .EN(N_50_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.llIl1[24] ( .Q(llIl1[24]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(io0i0[24]), .EN(N_50_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.llIl1[23] ( .Q(llIl1[23]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(io0i0[23]), .EN(N_50_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.llIl1[22] ( .Q(llIl1[22]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(io0i0[22]), .EN(N_50_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.llIl1[21] ( .Q(llIl1[21]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(io0i0[21]), .EN(N_50_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.llIl1[20] ( .Q(llIl1[20]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(io0i0[20]), .EN(N_50_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.llIl1[19] ( .Q(llIl1[19]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(io0i0[19]), .EN(N_50_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.llIl1[18] ( .Q(llIl1[18]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(io0i0[18]), .EN(N_50_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.llIl1[17] ( .Q(llIl1[17]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(io0i0[17]), .EN(N_50_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.llIl1[16] ( .Q(llIl1[16]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(io0i0[16]), .EN(N_50_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.llIl1[15] ( .Q(llIl1[15]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(io0i0[15]), .EN(N_50_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.llIl1[14] ( .Q(llIl1[14]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(io0i0[14]), .EN(N_50_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.ilIl1[7] ( .Q(CORETSE_0_MRXDAT[7]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilIl1_11[7]), .EN(un1_ilIl118), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.ilIl1[6] ( .Q(CORETSE_0_MRXDAT[6]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilIl1_11[6]), .EN(un1_ilIl118), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.ilIl1[5] ( .Q(CORETSE_0_MRXDAT[5]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilIl1_11[5]), .EN(un1_ilIl118), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.ilIl1[4] ( .Q(CORETSE_0_MRXDAT[4]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilIl1_11[4]), .EN(un1_ilIl118), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.ilIl1[3] ( .Q(CORETSE_0_MRXDAT[3]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilIl1_11[3]), .EN(un1_ilIl118), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.ilIl1[2] ( .Q(CORETSE_0_MRXDAT[2]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilIl1_11[2]), .EN(un1_ilIl118), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.ilIl1[1] ( .Q(CORETSE_0_MRXDAT[1]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilIl1_11[1]), .EN(un1_ilIl118), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.ilIl1[0] ( .Q(CORETSE_0_MRXDAT[0]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilIl1_11[0]), .EN(un1_ilIl118), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.llIl1[34] ( .Q(llIl1[34]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(io0i0[34]), .EN(N_50_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.llIl1[33] ( .Q(llIl1[33]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(io0i0[33]), .EN(N_50_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.llIl1[32] ( .Q(llIl1[32]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(io0i0[32]), .EN(N_50_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.llIl1[31] ( .Q(llIl1[31]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(io0i0[31]), .EN(N_50_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.llIl1[30] ( .Q(llIl1[30]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(io0i0[30]), .EN(N_50_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.llIl1[29] ( .Q(llIl1[29]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(io0i0[29]), .EN(N_50_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.ilIl1[22] ( .Q(CORETSE_0_MRXDAT[22]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilIl1_11[22]), .EN(un1_ilIl118), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.ilIl1[21] ( .Q(CORETSE_0_MRXDAT[21]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilIl1_11[21]), .EN(un1_ilIl118), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.ilIl1[20] ( .Q(CORETSE_0_MRXDAT[20]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilIl1_11[20]), .EN(un1_ilIl118), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.ilIl1[19] ( .Q(CORETSE_0_MRXDAT[19]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilIl1_11[19]), .EN(un1_ilIl118), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.ilIl1[18] ( .Q(CORETSE_0_MRXDAT[18]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilIl1_11[18]), .EN(un1_ilIl118), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.ilIl1[17] ( .Q(CORETSE_0_MRXDAT[17]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilIl1_11[17]), .EN(un1_ilIl118), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.ilIl1[16] ( .Q(CORETSE_0_MRXDAT[16]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilIl1_11[16]), .EN(un1_ilIl118), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.ilIl1[15] ( .Q(CORETSE_0_MRXDAT[15]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilIl1_11[15]), .EN(un1_ilIl118), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.ilIl1[14] ( .Q(CORETSE_0_MRXDAT[14]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilIl1_11[14]), .EN(un1_ilIl118), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.ilIl1[13] ( .Q(CORETSE_0_MRXDAT[13]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilIl1_11[13]), .EN(un1_ilIl118), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.ilIl1[12] ( .Q(CORETSE_0_MRXDAT[12]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilIl1_11[12]), .EN(un1_ilIl118), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.ilIl1[11] ( .Q(CORETSE_0_MRXDAT[11]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilIl1_11[11]), .EN(un1_ilIl118), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.ilIl1[10] ( .Q(CORETSE_0_MRXDAT[10]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilIl1_11[10]), .EN(un1_ilIl118), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.ilIl1[9] ( .Q(CORETSE_0_MRXDAT[9]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilIl1_11[9]), .EN(un1_ilIl118), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.ilIl1[8] ( .Q(CORETSE_0_MRXDAT[8]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilIl1_11[8]), .EN(un1_ilIl118), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.ilIl1[34] ( .Q(CORETSE_0_MRXEOF), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilIl1_11[34]), .EN(un1_ilIl118), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.ilIl1[33] ( .Q(CORETSE_0_MRXBYTEVALID[1]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilIl1_11[33]), .EN(un1_ilIl118), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.ilIl1[32] ( .Q(CORETSE_0_MRXBYTEVALID[0]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilIl1_11[32]), .EN(un1_ilIl118), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.ilIl1[31] ( .Q(CORETSE_0_MRXDAT[31]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilIl1_11[31]), .EN(un1_ilIl118), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.ilIl1[30] ( .Q(CORETSE_0_MRXDAT[30]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilIl1_11[30]), .EN(un1_ilIl118), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.ilIl1[29] ( .Q(CORETSE_0_MRXDAT[29]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilIl1_11[29]), .EN(un1_ilIl118), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.ilIl1[28] ( .Q(CORETSE_0_MRXDAT[28]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilIl1_11[28]), .EN(un1_ilIl118), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.ilIl1[27] ( .Q(CORETSE_0_MRXDAT[27]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilIl1_11[27]), .EN(un1_ilIl118), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.ilIl1[26] ( .Q(CORETSE_0_MRXDAT[26]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilIl1_11[26]), .EN(un1_ilIl118), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.ilIl1[25] ( .Q(CORETSE_0_MRXDAT[25]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilIl1_11[25]), .EN(un1_ilIl118), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.ilIl1[24] ( .Q(CORETSE_0_MRXDAT[24]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilIl1_11[24]), .EN(un1_ilIl118), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441204 SLE \genblk1.ilIl1[23] ( .Q(CORETSE_0_MRXDAT[23]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilIl1_11[23]), .EN(un1_ilIl118), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441967 SLE \genblk2.OOIl1[10] ( .Q(OOIl1[10]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(oi0I1[10]), .EN(OOIl15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441967 SLE \genblk2.OOIl1[9] ( .Q(OOIl1[9]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(oi0I1[9]), .EN(OOIl15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441967 SLE \genblk2.OOIl1[8] ( .Q(OOIl1[8]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(oi0I1[8]), .EN(OOIl15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441967 SLE \genblk2.OOIl1[7] ( .Q(OOIl1[7]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(oi0I1[7]), .EN(OOIl15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441967 SLE \genblk2.OOIl1[6] ( .Q(OOIl1[6]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(oi0I1[6]), .EN(OOIl15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441967 SLE \genblk2.OOIl1[5] ( .Q(OOIl1[5]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(oi0I1[5]), .EN(OOIl15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441967 SLE \genblk2.OOIl1[4] ( .Q(OOIl1[4]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(oi0I1[4]), .EN(OOIl15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441967 SLE \genblk2.OOIl1[3] ( .Q(OOIl1[3]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(oi0I1[3]), .EN(OOIl15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441967 SLE \genblk2.OOIl1[2] ( .Q(OOIl1[2]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(oi0I1[2]), .EN(OOIl15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441967 SLE \genblk2.OOIl1[1] ( .Q(OOIl1[1]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(oi0I1[1]), .EN(OOIl15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441967 SLE \genblk2.OOIl1[0] ( .Q(OOIl1[0]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(oi0I1[0]), .EN(OOIl15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441967 SLE \genblk2.OOIl1[12] ( .Q(OOIl1[12]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(oi0I1[12]), .EN(OOIl15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:441967 SLE \genblk2.OOIl1[11] ( .Q(OOIl1[11]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(oi0I1[11]), .EN(OOIl15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:440684 SLE \oOIl1[8] ( .Q(oOIl1_Z[8]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOIl1[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:440684 SLE \oOIl1[7] ( .Q(oOIl1_Z[7]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOIl1[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:440684 SLE \oOIl1[6] ( .Q(oOIl1_Z[6]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOIl1[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:440684 SLE \oOIl1[5] ( .Q(oOIl1_Z[5]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOIl1[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:440684 SLE \oOIl1[4] ( .Q(oOIl1_Z[4]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOIl1[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:440684 SLE \oOIl1[3] ( .Q(oOIl1_Z[3]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOIl1[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:440684 SLE \oOIl1[2] ( .Q(oOIl1_Z[2]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOIl1[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:440684 SLE \oOIl1[1] ( .Q(oOIl1_Z[1]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOIl1[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:440684 SLE \oOIl1[0] ( .Q(oOIl1_Z[0]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOIl1[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:440684 SLE \oOIl1[12] ( .Q(oOIl1_Z[12]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOIl1[12]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:440684 SLE \oOIl1[11] ( .Q(oOIl1_Z[11]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOIl1[11]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:440684 SLE \oOIl1[10] ( .Q(oOIl1_Z[10]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOIl1[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:440684 SLE \oOIl1[9] ( .Q(oOIl1_Z[9]), .ADn(VCC), .ALn(o0oI1_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOIl1[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:440621 ARI1 un4_oiOl1_0_I_39_RNI9UD73 ( .FCO(IOIl1_cry_0_cy), .S(un4_oiOl1_0_I_39_RNI9UD73_S), .Y(un4_oiOl1_0_I_39_RNI9UD73_Y), .B(O0Il1[3]), .C(un4_oiOl1_0_I_39_FCO), .D(lI1I1), .A(VCC), .FCI(VCC) ); defparam un4_oiOl1_0_I_39_RNI9UD73.INIT=20'h44000; // @28:440621 ARI1 \oOIl1_RNIM6IP4[0] ( .FCO(IOIl1_cry_0), .S(IOIl1[0]), .Y(oOIl1_RNIM6IP4_Y[0]), .B(oOIl1_Z[0]), .C(GND), .D(GND), .A(VCC), .FCI(IOIl1_cry_0_cy) ); defparam \oOIl1_RNIM6IP4[0] .INIT=20'h4AA00; // @28:440621 ARI1 \oOIl1_RNI4GMB6[1] ( .FCO(IOIl1_cry_1), .S(IOIl1[1]), .Y(oOIl1_RNI4GMB6_Y[1]), .B(oOIl1_Z[1]), .C(GND), .D(GND), .A(VCC), .FCI(IOIl1_cry_0) ); defparam \oOIl1_RNI4GMB6[1] .INIT=20'h4AA00; // @28:440621 ARI1 \oOIl1_RNIJQQT7[2] ( .FCO(IOIl1_cry_2), .S(IOIl1[2]), .Y(oOIl1_RNIJQQT7_Y[2]), .B(oOIl1_Z[2]), .C(GND), .D(GND), .A(VCC), .FCI(IOIl1_cry_1) ); defparam \oOIl1_RNIJQQT7[2] .INIT=20'h4AA00; // @28:440621 ARI1 \oOIl1_RNI36VF9[3] ( .FCO(IOIl1_cry_3), .S(IOIl1[3]), .Y(oOIl1_RNI36VF9_Y[3]), .B(oOIl1_Z[3]), .C(GND), .D(GND), .A(VCC), .FCI(IOIl1_cry_2) ); defparam \oOIl1_RNI36VF9[3] .INIT=20'h4AA00; // @28:440621 ARI1 \oOIl1_RNIKI32B[4] ( .FCO(IOIl1_cry_4), .S(IOIl1[4]), .Y(oOIl1_RNIKI32B_Y[4]), .B(oOIl1_Z[4]), .C(GND), .D(GND), .A(VCC), .FCI(IOIl1_cry_3) ); defparam \oOIl1_RNIKI32B[4] .INIT=20'h4AA00; // @28:440621 ARI1 \oOIl1_RNI608KC[5] ( .FCO(IOIl1_cry_5), .S(IOIl1[5]), .Y(oOIl1_RNI608KC_Y[5]), .B(oOIl1_Z[5]), .C(GND), .D(GND), .A(VCC), .FCI(IOIl1_cry_4) ); defparam \oOIl1_RNI608KC[5] .INIT=20'h4AA00; // @28:440621 ARI1 \oOIl1_RNIPEC6E[6] ( .FCO(IOIl1_cry_6), .S(IOIl1[6]), .Y(oOIl1_RNIPEC6E_Y[6]), .B(oOIl1_Z[6]), .C(GND), .D(GND), .A(VCC), .FCI(IOIl1_cry_5) ); defparam \oOIl1_RNIPEC6E[6] .INIT=20'h4AA00; // @28:440621 ARI1 \oOIl1_RNIDUGOF[7] ( .FCO(IOIl1_cry_7), .S(IOIl1[7]), .Y(oOIl1_RNIDUGOF_Y[7]), .B(oOIl1_Z[7]), .C(GND), .D(GND), .A(VCC), .FCI(IOIl1_cry_6) ); defparam \oOIl1_RNIDUGOF[7] .INIT=20'h4AA00; // @28:440621 ARI1 \oOIl1_RNI2FLAH[8] ( .FCO(IOIl1_cry_8), .S(IOIl1[8]), .Y(oOIl1_RNI2FLAH_Y[8]), .B(oOIl1_Z[8]), .C(GND), .D(GND), .A(VCC), .FCI(IOIl1_cry_7) ); defparam \oOIl1_RNI2FLAH[8] .INIT=20'h4AA00; // @28:440621 ARI1 \oOIl1_RNIO0QSI[9] ( .FCO(IOIl1_cry_9), .S(IOIl1[9]), .Y(oOIl1_RNIO0QSI_Y[9]), .B(oOIl1_Z[9]), .C(GND), .D(GND), .A(VCC), .FCI(IOIl1_cry_8) ); defparam \oOIl1_RNIO0QSI[9] .INIT=20'h4AA00; // @28:440621 ARI1 \oOIl1_RNIMC6JM[10] ( .FCO(IOIl1_cry_10), .S(IOIl1[10]), .Y(oOIl1_RNIMC6JM_Y[10]), .B(oOIl1_Z[10]), .C(GND), .D(GND), .A(VCC), .FCI(IOIl1_cry_9) ); defparam \oOIl1_RNIMC6JM[10] .INIT=20'h4AA00; // @28:440621 ARI1 \oOIl1_RNIL7VVT[12] ( .FCO(oOIl1_RNIL7VVT_FCO[12]), .S(IOIl1[12]), .Y(oOIl1_RNIL7VVT_Y[12]), .B(oOIl1_Z[12]), .C(GND), .D(GND), .A(VCC), .FCI(IOIl1_cry_11) ); defparam \oOIl1_RNIL7VVT[12] .INIT=20'h4AA00; // @28:440621 ARI1 \oOIl1_RNILPI9Q[11] ( .FCO(IOIl1_cry_11), .S(IOIl1[11]), .Y(oOIl1_RNILPI9Q_Y[11]), .B(oOIl1_Z[11]), .C(GND), .D(GND), .A(VCC), .FCI(IOIl1_cry_10) ); defparam \oOIl1_RNILPI9Q[11] .INIT=20'h4AA00; // @28:440553 ARI1 un1_IOIl1_cry_0 ( .FCO(un1_IOIl1_cry_0_Z), .S(un1_IOIl1_cry_0_S), .Y(un1_IOIl1_cry_0_Y), .B(IOIl1[0]), .C(GND), .D(GND), .A(VCC), .FCI(GND) ); defparam un1_IOIl1_cry_0.INIT=20'h65500; // @28:440553 ARI1 un1_IOIl1_cry_1 ( .FCO(un1_IOIl1_cry_1_Z), .S(un1_IOIl1_cry_1_S), .Y(un1_IOIl1_cry_1_Y), .B(IOIl1[1]), .C(GND), .D(GND), .A(VCC), .FCI(un1_IOIl1_cry_0_Z) ); defparam un1_IOIl1_cry_1.INIT=20'h65500; // @28:440553 ARI1 un1_IOIl1_cry_2 ( .FCO(un1_IOIl1_cry_2_Z), .S(un1_IOIl1_cry_2_S), .Y(un1_IOIl1_cry_2_Y), .B(IOIl1[2]), .C(GND), .D(GND), .A(VCC), .FCI(un1_IOIl1_cry_1_Z) ); defparam un1_IOIl1_cry_2.INIT=20'h65500; // @28:440553 ARI1 un1_IOIl1_cry_3 ( .FCO(un1_IOIl1_cry_3_Z), .S(un1_IOIl1_cry_3_S), .Y(un1_IOIl1_cry_3_Y), .B(IOIl1[3]), .C(GND), .D(GND), .A(VCC), .FCI(un1_IOIl1_cry_2_Z) ); defparam un1_IOIl1_cry_3.INIT=20'h65500; // @28:440553 ARI1 un1_IOIl1_cry_4 ( .FCO(un1_IOIl1_cry_4_Z), .S(un1_IOIl1_cry_4_S), .Y(un1_IOIl1_cry_4_Y), .B(IOIl1[4]), .C(GND), .D(GND), .A(VCC), .FCI(un1_IOIl1_cry_3_Z) ); defparam un1_IOIl1_cry_4.INIT=20'h65500; // @28:440553 ARI1 un1_IOIl1_cry_5 ( .FCO(un1_IOIl1_cry_5_Z), .S(un1_IOIl1_cry_5_S), .Y(un1_IOIl1_cry_5_Y), .B(IOIl1[5]), .C(GND), .D(GND), .A(VCC), .FCI(un1_IOIl1_cry_4_Z) ); defparam un1_IOIl1_cry_5.INIT=20'h65500; // @28:440553 ARI1 un1_IOIl1_cry_6 ( .FCO(un1_IOIl1_cry_6_Z), .S(un1_IOIl1_cry_6_S), .Y(un1_IOIl1_cry_6_Y), .B(IOIl1[6]), .C(GND), .D(GND), .A(VCC), .FCI(un1_IOIl1_cry_5_Z) ); defparam un1_IOIl1_cry_6.INIT=20'h65500; // @28:440553 ARI1 un1_IOIl1_cry_7 ( .FCO(un1_IOIl1_cry_7_Z), .S(un1_IOIl1_cry_7_S), .Y(un1_IOIl1_cry_7_Y), .B(IOIl1[7]), .C(GND), .D(GND), .A(VCC), .FCI(un1_IOIl1_cry_6_Z) ); defparam un1_IOIl1_cry_7.INIT=20'h65500; // @28:440553 ARI1 un1_IOIl1_cry_8 ( .FCO(un1_IOIl1_cry_8_Z), .S(un1_IOIl1_cry_8_S), .Y(un1_IOIl1_cry_8_Y), .B(IOIl1[8]), .C(GND), .D(GND), .A(VCC), .FCI(un1_IOIl1_cry_7_Z) ); defparam un1_IOIl1_cry_8.INIT=20'h65500; // @28:440553 ARI1 un1_IOIl1_cry_9 ( .FCO(un1_IOIl1_cry_9_Z), .S(un1_IOIl1_cry_9_S), .Y(un1_IOIl1_cry_9_Y), .B(IOIl1[9]), .C(GND), .D(GND), .A(VCC), .FCI(un1_IOIl1_cry_8_Z) ); defparam un1_IOIl1_cry_9.INIT=20'h65500; // @28:440553 ARI1 un1_IOIl1_s_11 ( .FCO(un1_IOIl1_s_11_FCO), .S(un1_IOIl1_s_11_S), .Y(un1_IOIl1_s_11_Y), .B(IOIl1[11]), .C(GND), .D(GND), .A(VCC), .FCI(un1_IOIl1_cry_10_Z) ); defparam un1_IOIl1_s_11.INIT=20'h45500; // @28:440553 ARI1 un1_IOIl1_cry_10 ( .FCO(un1_IOIl1_cry_10_Z), .S(un1_IOIl1_cry_10_S), .Y(un1_IOIl1_cry_10_Y), .B(IOIl1[10]), .C(GND), .D(GND), .A(VCC), .FCI(un1_IOIl1_cry_9_Z) ); defparam un1_IOIl1_cry_10.INIT=20'h65500; // @28:440621 ARI1 un4_oiOl1_0_I_1 ( .FCO(un4_oiOl1_0_data_tmp[0]), .S(un4_oiOl1_0_I_1_S), .Y(un4_oiOl1_0_I_1_Y), .B(OOIl1[0]), .C(OOIl1[1]), .D(oOIl1_Z[0]), .A(oOIl1_Z[1]), .FCI(GND) ); defparam un4_oiOl1_0_I_1.INIT=20'h68421; // @28:440621 ARI1 un4_oiOl1_0_I_27 ( .FCO(un4_oiOl1_0_data_tmp[1]), .S(un4_oiOl1_0_I_27_S), .Y(un4_oiOl1_0_I_27_Y), .B(OOIl1[2]), .C(OOIl1[3]), .D(oOIl1_Z[2]), .A(oOIl1_Z[3]), .FCI(un4_oiOl1_0_data_tmp[0]) ); defparam un4_oiOl1_0_I_27.INIT=20'h68421; // @28:440621 ARI1 un4_oiOl1_0_I_15 ( .FCO(un4_oiOl1_0_data_tmp[2]), .S(un4_oiOl1_0_I_15_S), .Y(un4_oiOl1_0_I_15_Y), .B(OOIl1[4]), .C(OOIl1[5]), .D(oOIl1_Z[4]), .A(oOIl1_Z[5]), .FCI(un4_oiOl1_0_data_tmp[1]) ); defparam un4_oiOl1_0_I_15.INIT=20'h68421; // @28:440621 ARI1 un4_oiOl1_0_I_21 ( .FCO(un4_oiOl1_0_data_tmp[3]), .S(un4_oiOl1_0_I_21_S), .Y(un4_oiOl1_0_I_21_Y), .B(OOIl1[6]), .C(OOIl1[7]), .D(oOIl1_Z[6]), .A(oOIl1_Z[7]), .FCI(un4_oiOl1_0_data_tmp[2]) ); defparam un4_oiOl1_0_I_21.INIT=20'h68421; // @28:440621 ARI1 un4_oiOl1_0_I_33 ( .FCO(un4_oiOl1_0_data_tmp[4]), .S(un4_oiOl1_0_I_33_S), .Y(un4_oiOl1_0_I_33_Y), .B(OOIl1[8]), .C(OOIl1[9]), .D(oOIl1_Z[8]), .A(oOIl1_Z[9]), .FCI(un4_oiOl1_0_data_tmp[3]) ); defparam un4_oiOl1_0_I_33.INIT=20'h68421; // @28:440621 ARI1 un4_oiOl1_0_I_9 ( .FCO(un4_oiOl1_0_data_tmp[5]), .S(un4_oiOl1_0_I_9_S), .Y(un4_oiOl1_0_I_9_Y), .B(OOIl1[10]), .C(OOIl1[11]), .D(oOIl1_Z[10]), .A(oOIl1_Z[11]), .FCI(un4_oiOl1_0_data_tmp[4]) ); defparam un4_oiOl1_0_I_9.INIT=20'h68421; // @28:440621 ARI1 un4_oiOl1_0_I_39 ( .FCO(un4_oiOl1_0_I_39_FCO), .S(un4_oiOl1_0_I_39_S), .Y(un4_oiOl1_0_I_39_Y), .B(OOIl1[12]), .C(oOIl1_Z[12]), .D(GND), .A(VCC), .FCI(un4_oiOl1_0_data_tmp[5]) ); defparam un4_oiOl1_0_I_39.INIT=20'h69900; // @28:441204 CFG3 \genblk1.O0Il1_ns_i_i[0] ( .A(iiOl1_Z), .B(O0Il1[1]), .C(O0Il1_0), .Y(un1_ilIl118_i) ); defparam \genblk1.O0Il1_ns_i_i[0] .INIT=8'h54; // @28:442288 CFG2 \o01I1_4[23] ( .A(io0i0[23]), .B(o0Il1_1z), .Y(o01I1_4_Z[23]) ); defparam \o01I1_4[23] .INIT=4'h8; // @28:442288 CFG2 \o01I1_4[24] ( .A(io0i0[24]), .B(o0Il1_1z), .Y(o01I1_4_Z[24]) ); defparam \o01I1_4[24] .INIT=4'h8; // @28:442288 CFG2 \o01I1_4[25] ( .A(io0i0[25]), .B(o0Il1_1z), .Y(o01I1_4_Z[25]) ); defparam \o01I1_4[25] .INIT=4'h8; // @28:442288 CFG2 \o01I1_4[29] ( .A(io0i0[29]), .B(o0Il1_1z), .Y(o01I1_4_Z[29]) ); defparam \o01I1_4[29] .INIT=4'h8; // @28:442288 CFG2 \o01I1_4[30] ( .A(io0i0[30]), .B(o0Il1_1z), .Y(o01I1_4_Z[30]) ); defparam \o01I1_4[30] .INIT=4'h8; // @28:442288 CFG2 \o01I1_4[31] ( .A(io0i0[31]), .B(o0Il1_1z), .Y(o01I1_4_Z[31]) ); defparam \o01I1_4[31] .INIT=4'h8; // @28:442288 CFG2 \o01I1_4[32] ( .A(io0i0[32]), .B(o0Il1_1z), .Y(o01I1_4_Z[32]) ); defparam \o01I1_4[32] .INIT=4'h8; // @28:442288 CFG2 \o01I1_4[33] ( .A(io0i0[33]), .B(o0Il1_1z), .Y(o01I1_4_Z[33]) ); defparam \o01I1_4[33] .INIT=4'h8; // @28:442288 CFG2 \o01I1_4[34] ( .A(io0i0[34]), .B(o0Il1_1z), .Y(o01I1_4_Z[34]) ); defparam \o01I1_4[34] .INIT=4'h8; // @28:442288 CFG2 \o01I1_4[16] ( .A(io0i0[16]), .B(o0Il1_1z), .Y(o01I1_4_Z[16]) ); defparam \o01I1_4[16] .INIT=4'h8; // @28:442288 CFG2 \o01I1_4[26] ( .A(io0i0[26]), .B(o0Il1_1z), .Y(o01I1_4_Z[26]) ); defparam \o01I1_4[26] .INIT=4'h8; // @28:442288 CFG2 \o01I1_4[27] ( .A(io0i0[27]), .B(o0Il1_1z), .Y(o01I1_4_Z[27]) ); defparam \o01I1_4[27] .INIT=4'h8; // @28:442288 CFG2 \o01I1_4[28] ( .A(io0i0[28]), .B(o0Il1_1z), .Y(o01I1_4_Z[28]) ); defparam \o01I1_4[28] .INIT=4'h8; // @28:442288 CFG2 \o01I1_4[13] ( .A(io0i0[13]), .B(o0Il1_1z), .Y(o01I1_4_Z[13]) ); defparam \o01I1_4[13] .INIT=4'h8; // @28:442288 CFG2 \o01I1_4[17] ( .A(io0i0[17]), .B(o0Il1_1z), .Y(o01I1_4_Z[17]) ); defparam \o01I1_4[17] .INIT=4'h8; // @28:442288 CFG2 \o01I1_4[18] ( .A(io0i0[18]), .B(o0Il1_1z), .Y(o01I1_4_Z[18]) ); defparam \o01I1_4[18] .INIT=4'h8; // @28:442288 CFG2 \o01I1_4[19] ( .A(io0i0[19]), .B(o0Il1_1z), .Y(o01I1_4_Z[19]) ); defparam \o01I1_4[19] .INIT=4'h8; // @28:442288 CFG2 \o01I1_4[20] ( .A(io0i0[20]), .B(o0Il1_1z), .Y(o01I1_4_Z[20]) ); defparam \o01I1_4[20] .INIT=4'h8; // @28:442288 CFG2 \o01I1_4[21] ( .A(io0i0[21]), .B(o0Il1_1z), .Y(o01I1_4_Z[21]) ); defparam \o01I1_4[21] .INIT=4'h8; // @28:442288 CFG2 \o01I1_4[22] ( .A(io0i0[22]), .B(o0Il1_1z), .Y(o01I1_4_Z[22]) ); defparam \o01I1_4[22] .INIT=4'h8; // @28:441992 CFG2 \genblk2.OOIl15 ( .A(OIIl1_Z), .B(Oi0I1_1z), .Y(OOIl15) ); defparam \genblk2.OOIl15 .INIT=4'h2; // @28:441851 CFG2 Ii0I16 ( .A(lIIl1_Z), .B(li0I1_1z), .Y(Ii0I16_Z) ); defparam Ii0I16.INIT=4'h1; // @28:441300 CFG3 \genblk1.olIl1_8[8] ( .A(llIl1[8]), .B(O0Il1[3]), .C(io0i0[8]), .Y(olIl1_8[8]) ); defparam \genblk1.olIl1_8[8] .INIT=8'hB8; // @28:441300 CFG3 \genblk1.olIl1_8[14] ( .A(llIl1[14]), .B(O0Il1[3]), .C(io0i0[14]), .Y(olIl1_8[14]) ); defparam \genblk1.olIl1_8[14] .INIT=8'hB8; // @28:441300 CFG3 \genblk1.olIl1_8[15] ( .A(llIl1[15]), .B(O0Il1[3]), .C(io0i0[15]), .Y(olIl1_8[15]) ); defparam \genblk1.olIl1_8[15] .INIT=8'hB8; // @28:442288 CFG3 \o01I1_4_i_m2[8] ( .A(o0Il1_1z), .B(IOIl1[8]), .C(io0i0[8]), .Y(o01I1_4_i_m2_Z[8]) ); defparam \o01I1_4_i_m2[8] .INIT=8'hE4; // @28:442288 CFG3 \o01I1_4[0] ( .A(o0Il1_1z), .B(IOIl1[0]), .C(io0i0[0]), .Y(o01I1_4_Z[0]) ); defparam \o01I1_4[0] .INIT=8'hE4; // @28:442288 CFG3 \o01I1_4[1] ( .A(o0Il1_1z), .B(IOIl1[1]), .C(io0i0[1]), .Y(o01I1_4_Z[1]) ); defparam \o01I1_4[1] .INIT=8'hE4; // @28:442288 CFG3 \o01I1_4[2] ( .A(o0Il1_1z), .B(IOIl1[2]), .C(io0i0[2]), .Y(o01I1_4_Z[2]) ); defparam \o01I1_4[2] .INIT=8'hE4; // @28:442288 CFG3 \o01I1_4[3] ( .A(o0Il1_1z), .B(IOIl1[3]), .C(io0i0[3]), .Y(o01I1_4_Z[3]) ); defparam \o01I1_4[3] .INIT=8'hE4; // @28:442288 CFG3 \o01I1_4[4] ( .A(o0Il1_1z), .B(IOIl1[4]), .C(io0i0[4]), .Y(o01I1_4_Z[4]) ); defparam \o01I1_4[4] .INIT=8'hE4; // @28:442288 CFG3 \o01I1_4[5] ( .A(o0Il1_1z), .B(IOIl1[5]), .C(io0i0[5]), .Y(o01I1_4_Z[5]) ); defparam \o01I1_4[5] .INIT=8'hE4; // @28:442288 CFG3 \o01I1_4[7] ( .A(o0Il1_1z), .B(IOIl1[7]), .C(io0i0[7]), .Y(o01I1_4_Z[7]) ); defparam \o01I1_4[7] .INIT=8'hE4; // @28:442288 CFG3 \o01I1_4[9] ( .A(o0Il1_1z), .B(IOIl1[9]), .C(io0i0[9]), .Y(o01I1_4_Z[9]) ); defparam \o01I1_4[9] .INIT=8'hE4; // @28:442288 CFG3 \o01I1_4[10] ( .A(o0Il1_1z), .B(IOIl1[10]), .C(io0i0[10]), .Y(o01I1_4_Z[10]) ); defparam \o01I1_4[10] .INIT=8'hE4; // @28:442288 CFG3 \o01I1_4[11] ( .A(o0Il1_1z), .B(IOIl1[11]), .C(io0i0[11]), .Y(o01I1_4_Z[11]) ); defparam \o01I1_4[11] .INIT=8'hE4; // @28:442288 CFG3 \o01I1_4[12] ( .A(o0Il1_1z), .B(IOIl1[12]), .C(io0i0[12]), .Y(o01I1_4_Z[12]) ); defparam \o01I1_4[12] .INIT=8'hE4; // @28:441300 CFG3 \genblk1.olIl1_8[6] ( .A(llIl1[6]), .B(O0Il1[3]), .C(io0i0[6]), .Y(olIl1_8[6]) ); defparam \genblk1.olIl1_8[6] .INIT=8'hB8; // @28:441300 CFG3 \genblk1.olIl1_8[13] ( .A(llIl1[13]), .B(O0Il1[3]), .C(io0i0[13]), .Y(olIl1_8[13]) ); defparam \genblk1.olIl1_8[13] .INIT=8'hB8; // @28:441300 CFG3 \genblk1.olIl1_8[17] ( .A(llIl1[17]), .B(O0Il1[3]), .C(io0i0[17]), .Y(olIl1_8[17]) ); defparam \genblk1.olIl1_8[17] .INIT=8'hB8; // @28:441300 CFG3 \genblk1.olIl1_8[18] ( .A(llIl1[18]), .B(O0Il1[3]), .C(io0i0[18]), .Y(olIl1_8[18]) ); defparam \genblk1.olIl1_8[18] .INIT=8'hB8; // @28:441300 CFG3 \genblk1.olIl1_8[19] ( .A(llIl1[19]), .B(O0Il1[3]), .C(io0i0[19]), .Y(olIl1_8[19]) ); defparam \genblk1.olIl1_8[19] .INIT=8'hB8; // @28:441300 CFG3 \genblk1.olIl1_8[20] ( .A(llIl1[20]), .B(O0Il1[3]), .C(io0i0[20]), .Y(olIl1_8[20]) ); defparam \genblk1.olIl1_8[20] .INIT=8'hB8; // @28:441300 CFG3 \genblk1.olIl1_8[21] ( .A(llIl1[21]), .B(O0Il1[3]), .C(io0i0[21]), .Y(olIl1_8[21]) ); defparam \genblk1.olIl1_8[21] .INIT=8'hB8; // @28:441300 CFG3 \genblk1.olIl1_8[22] ( .A(llIl1[22]), .B(O0Il1[3]), .C(io0i0[22]), .Y(olIl1_8[22]) ); defparam \genblk1.olIl1_8[22] .INIT=8'hB8; // @28:441300 CFG3 \genblk1.olIl1_8[23] ( .A(llIl1[23]), .B(O0Il1[3]), .C(io0i0[23]), .Y(olIl1_8[23]) ); defparam \genblk1.olIl1_8[23] .INIT=8'hB8; // @28:441300 CFG3 \genblk1.olIl1_8[24] ( .A(llIl1[24]), .B(O0Il1[3]), .C(io0i0[24]), .Y(olIl1_8[24]) ); defparam \genblk1.olIl1_8[24] .INIT=8'hB8; // @28:441300 CFG3 \genblk1.olIl1_8[25] ( .A(llIl1[25]), .B(O0Il1[3]), .C(io0i0[25]), .Y(olIl1_8[25]) ); defparam \genblk1.olIl1_8[25] .INIT=8'hB8; // @28:441300 CFG3 \genblk1.olIl1_8[29] ( .A(llIl1[29]), .B(O0Il1[3]), .C(io0i0[29]), .Y(olIl1_8[29]) ); defparam \genblk1.olIl1_8[29] .INIT=8'hB8; // @28:441300 CFG3 \genblk1.olIl1_8[30] ( .A(llIl1[30]), .B(O0Il1[3]), .C(io0i0[30]), .Y(olIl1_8[30]) ); defparam \genblk1.olIl1_8[30] .INIT=8'hB8; // @28:441300 CFG3 \genblk1.olIl1_8[31] ( .A(llIl1[31]), .B(O0Il1[3]), .C(io0i0[31]), .Y(olIl1_8[31]) ); defparam \genblk1.olIl1_8[31] .INIT=8'hB8; // @28:441300 CFG3 \genblk1.olIl1_8[32] ( .A(llIl1[32]), .B(O0Il1[3]), .C(io0i0[32]), .Y(olIl1_8[32]) ); defparam \genblk1.olIl1_8[32] .INIT=8'hB8; // @28:441300 CFG3 \genblk1.olIl1_8[33] ( .A(llIl1[33]), .B(O0Il1[3]), .C(io0i0[33]), .Y(olIl1_8[33]) ); defparam \genblk1.olIl1_8[33] .INIT=8'hB8; // @28:441300 CFG3 \genblk1.olIl1_8[34] ( .A(llIl1[34]), .B(O0Il1[3]), .C(io0i0[34]), .Y(olIl1_8[34]) ); defparam \genblk1.olIl1_8[34] .INIT=8'hB8; // @28:442288 CFG3 \o01I1_4[6] ( .A(o0Il1_1z), .B(IOIl1[6]), .C(io0i0[6]), .Y(o01I1_4_Z[6]) ); defparam \o01I1_4[6] .INIT=8'hE4; // @28:441300 CFG3 \genblk1.olIl1_8[28] ( .A(llIl1[28]), .B(O0Il1[3]), .C(io0i0[28]), .Y(olIl1_8[28]) ); defparam \genblk1.olIl1_8[28] .INIT=8'hB8; // @28:441300 CFG3 \genblk1.olIl1_8[27] ( .A(llIl1[27]), .B(O0Il1[3]), .C(io0i0[27]), .Y(olIl1_8[27]) ); defparam \genblk1.olIl1_8[27] .INIT=8'hB8; // @28:441300 CFG3 \genblk1.olIl1_8[26] ( .A(llIl1[26]), .B(O0Il1[3]), .C(io0i0[26]), .Y(olIl1_8[26]) ); defparam \genblk1.olIl1_8[26] .INIT=8'hB8; // @28:441300 CFG3 \genblk1.olIl1_8[16] ( .A(llIl1[16]), .B(O0Il1[3]), .C(io0i0[16]), .Y(olIl1_8[16]) ); defparam \genblk1.olIl1_8[16] .INIT=8'hB8; // @28:441300 CFG3 \genblk1.olIl1_8[12] ( .A(llIl1[12]), .B(O0Il1[3]), .C(io0i0[12]), .Y(olIl1_8[12]) ); defparam \genblk1.olIl1_8[12] .INIT=8'hB8; // @28:441300 CFG3 \genblk1.olIl1_8[11] ( .A(llIl1[11]), .B(O0Il1[3]), .C(io0i0[11]), .Y(olIl1_8[11]) ); defparam \genblk1.olIl1_8[11] .INIT=8'hB8; // @28:441300 CFG3 \genblk1.olIl1_8[9] ( .A(llIl1[9]), .B(O0Il1[3]), .C(io0i0[9]), .Y(olIl1_8[9]) ); defparam \genblk1.olIl1_8[9] .INIT=8'hB8; // @28:441300 CFG3 \genblk1.olIl1_8[7] ( .A(llIl1[7]), .B(O0Il1[3]), .C(io0i0[7]), .Y(olIl1_8[7]) ); defparam \genblk1.olIl1_8[7] .INIT=8'hB8; // @28:441300 CFG3 \genblk1.olIl1_8[5] ( .A(llIl1[5]), .B(O0Il1[3]), .C(io0i0[5]), .Y(olIl1_8[5]) ); defparam \genblk1.olIl1_8[5] .INIT=8'hB8; // @28:441300 CFG3 \genblk1.olIl1_8[4] ( .A(llIl1[4]), .B(O0Il1[3]), .C(io0i0[4]), .Y(olIl1_8[4]) ); defparam \genblk1.olIl1_8[4] .INIT=8'hB8; // @28:441300 CFG3 \genblk1.olIl1_8[3] ( .A(llIl1[3]), .B(O0Il1[3]), .C(io0i0[3]), .Y(olIl1_8[3]) ); defparam \genblk1.olIl1_8[3] .INIT=8'hB8; // @28:441300 CFG3 \genblk1.olIl1_8[2] ( .A(llIl1[2]), .B(O0Il1[3]), .C(io0i0[2]), .Y(olIl1_8[2]) ); defparam \genblk1.olIl1_8[2] .INIT=8'hB8; // @28:441300 CFG3 \genblk1.olIl1_8[1] ( .A(llIl1[1]), .B(O0Il1[3]), .C(io0i0[1]), .Y(olIl1_8[1]) ); defparam \genblk1.olIl1_8[1] .INIT=8'hB8; // @28:441300 CFG3 \genblk1.olIl1_8[0] ( .A(llIl1[0]), .B(O0Il1[3]), .C(io0i0[0]), .Y(olIl1_8[0]) ); defparam \genblk1.olIl1_8[0] .INIT=8'hB8; // @28:441300 CFG3 \genblk1.olIl1_8[10] ( .A(llIl1[10]), .B(O0Il1[3]), .C(io0i0[10]), .Y(olIl1_8[10]) ); defparam \genblk1.olIl1_8[10] .INIT=8'hB8; // @28:440575 CFG3 un2_i0Il1 ( .A(o0Il1_1z), .B(iloI1[13]), .C(l0Il1_Z), .Y(un2_i0Il1_Z) ); defparam un2_i0Il1.INIT=8'h10; // @28:441204 CFG3 \genblk1.O0Il1_ns_i[0] ( .A(iiOl1_Z), .B(O0Il1[1]), .C(O0Il1_0), .Y(un1_ilIl118) ); defparam \genblk1.O0Il1_ns_i[0] .INIT=8'hAB; // @28:441204 CFG2 iiOl1_RNI2H6B6 ( .A(O0Il1[3]), .B(iiOl1_Z), .Y(N_50_i) ); defparam iiOl1_RNI2H6B6.INIT=4'h8; // @28:442278 CFG2 \o01I1_1_RNO[15] ( .A(io0i0[15]), .B(o0Il1_1z), .Y(N_965_i) ); defparam \o01I1_1_RNO[15] .INIT=4'h8; // @28:442278 CFG2 \o01I1_1_RNO[14] ( .A(io0i0[14]), .B(o0Il1_1z), .Y(N_966_i) ); defparam \o01I1_1_RNO[14] .INIT=4'h8; // @28:446109 CFG4 \un2_O1Il1[0] ( .A(l0Il1_Z), .B(o0Il1_1z), .C(l01I1_Z), .D(iloI1[13]), .Y(un2_O1Il1_0) ); defparam \un2_O1Il1[0] .INIT=16'h220C; // @28:441300 CFG4 \genblk1.ilIl1_11[8] ( .A(olIl1[8]), .B(O0Il1[1]), .C(O0Il1_0), .D(io0i0[8]), .Y(ilIl1_11[8]) ); defparam \genblk1.ilIl1_11[8] .INIT=16'hFE02; // @28:441300 CFG4 \genblk1.ilIl1_11[14] ( .A(olIl1[14]), .B(O0Il1[1]), .C(O0Il1_0), .D(io0i0[14]), .Y(ilIl1_11[14]) ); defparam \genblk1.ilIl1_11[14] .INIT=16'hFE02; // @28:441300 CFG4 \genblk1.ilIl1_11[15] ( .A(olIl1[15]), .B(O0Il1[1]), .C(O0Il1_0), .D(io0i0[15]), .Y(ilIl1_11[15]) ); defparam \genblk1.ilIl1_11[15] .INIT=16'hFE02; // @28:441300 CFG4 \genblk1.ilIl1_11[0] ( .A(olIl1[0]), .B(O0Il1[1]), .C(O0Il1_0), .D(io0i0[0]), .Y(ilIl1_11[0]) ); defparam \genblk1.ilIl1_11[0] .INIT=16'hFE02; // @28:441300 CFG4 \genblk1.ilIl1_11[1] ( .A(olIl1[1]), .B(O0Il1[1]), .C(O0Il1_0), .D(io0i0[1]), .Y(ilIl1_11[1]) ); defparam \genblk1.ilIl1_11[1] .INIT=16'hFE02; // @28:441300 CFG4 \genblk1.ilIl1_11[2] ( .A(olIl1[2]), .B(O0Il1[1]), .C(O0Il1_0), .D(io0i0[2]), .Y(ilIl1_11[2]) ); defparam \genblk1.ilIl1_11[2] .INIT=16'hFE02; // @28:441300 CFG4 \genblk1.ilIl1_11[3] ( .A(olIl1[3]), .B(O0Il1[1]), .C(O0Il1_0), .D(io0i0[3]), .Y(ilIl1_11[3]) ); defparam \genblk1.ilIl1_11[3] .INIT=16'hFE02; // @28:441300 CFG4 \genblk1.ilIl1_11[4] ( .A(olIl1[4]), .B(O0Il1[1]), .C(O0Il1_0), .D(io0i0[4]), .Y(ilIl1_11[4]) ); defparam \genblk1.ilIl1_11[4] .INIT=16'hFE02; // @28:441300 CFG4 \genblk1.ilIl1_11[5] ( .A(olIl1[5]), .B(O0Il1[1]), .C(O0Il1_0), .D(io0i0[5]), .Y(ilIl1_11[5]) ); defparam \genblk1.ilIl1_11[5] .INIT=16'hFE02; // @28:441300 CFG4 \genblk1.ilIl1_11[7] ( .A(olIl1[7]), .B(O0Il1[1]), .C(O0Il1_0), .D(io0i0[7]), .Y(ilIl1_11[7]) ); defparam \genblk1.ilIl1_11[7] .INIT=16'hFE02; // @28:441300 CFG4 \genblk1.ilIl1_11[9] ( .A(olIl1[9]), .B(O0Il1[1]), .C(O0Il1_0), .D(io0i0[9]), .Y(ilIl1_11[9]) ); defparam \genblk1.ilIl1_11[9] .INIT=16'hFE02; // @28:441300 CFG4 \genblk1.ilIl1_11[10] ( .A(olIl1[10]), .B(O0Il1[1]), .C(O0Il1_0), .D(io0i0[10]), .Y(ilIl1_11[10]) ); defparam \genblk1.ilIl1_11[10] .INIT=16'hFE02; // @28:441300 CFG4 \genblk1.ilIl1_11[11] ( .A(olIl1[11]), .B(O0Il1[1]), .C(O0Il1_0), .D(io0i0[11]), .Y(ilIl1_11[11]) ); defparam \genblk1.ilIl1_11[11] .INIT=16'hFE02; // @28:441300 CFG4 \genblk1.ilIl1_11[12] ( .A(olIl1[12]), .B(O0Il1[1]), .C(O0Il1_0), .D(io0i0[12]), .Y(ilIl1_11[12]) ); defparam \genblk1.ilIl1_11[12] .INIT=16'hFE02; // @28:441300 CFG4 \genblk1.ilIl1_11[16] ( .A(olIl1[16]), .B(O0Il1[1]), .C(O0Il1_0), .D(io0i0[16]), .Y(ilIl1_11[16]) ); defparam \genblk1.ilIl1_11[16] .INIT=16'hFE02; // @28:441300 CFG4 \genblk1.ilIl1_11[26] ( .A(olIl1[26]), .B(O0Il1[1]), .C(O0Il1_0), .D(io0i0[26]), .Y(ilIl1_11[26]) ); defparam \genblk1.ilIl1_11[26] .INIT=16'hFE02; // @28:441300 CFG4 \genblk1.ilIl1_11[27] ( .A(olIl1[27]), .B(O0Il1[1]), .C(O0Il1_0), .D(io0i0[27]), .Y(ilIl1_11[27]) ); defparam \genblk1.ilIl1_11[27] .INIT=16'hFE02; // @28:441300 CFG4 \genblk1.ilIl1_11[28] ( .A(olIl1[28]), .B(O0Il1[1]), .C(O0Il1_0), .D(io0i0[28]), .Y(ilIl1_11[28]) ); defparam \genblk1.ilIl1_11[28] .INIT=16'hFE02; // @28:441300 CFG4 \genblk1.ilIl1_11[34] ( .A(olIl1[34]), .B(O0Il1[1]), .C(O0Il1_0), .D(io0i0[34]), .Y(ilIl1_11[34]) ); defparam \genblk1.ilIl1_11[34] .INIT=16'hFE02; // @28:441300 CFG4 \genblk1.ilIl1_11[33] ( .A(olIl1[33]), .B(O0Il1[1]), .C(O0Il1_0), .D(io0i0[33]), .Y(ilIl1_11[33]) ); defparam \genblk1.ilIl1_11[33] .INIT=16'hFE02; // @28:441300 CFG4 \genblk1.ilIl1_11[32] ( .A(olIl1[32]), .B(O0Il1[1]), .C(O0Il1_0), .D(io0i0[32]), .Y(ilIl1_11[32]) ); defparam \genblk1.ilIl1_11[32] .INIT=16'hFE02; // @28:441300 CFG4 \genblk1.ilIl1_11[31] ( .A(olIl1[31]), .B(O0Il1[1]), .C(O0Il1_0), .D(io0i0[31]), .Y(ilIl1_11[31]) ); defparam \genblk1.ilIl1_11[31] .INIT=16'hFE02; // @28:441300 CFG4 \genblk1.ilIl1_11[30] ( .A(olIl1[30]), .B(O0Il1[1]), .C(O0Il1_0), .D(io0i0[30]), .Y(ilIl1_11[30]) ); defparam \genblk1.ilIl1_11[30] .INIT=16'hFE02; // @28:441300 CFG4 \genblk1.ilIl1_11[29] ( .A(olIl1[29]), .B(O0Il1[1]), .C(O0Il1_0), .D(io0i0[29]), .Y(ilIl1_11[29]) ); defparam \genblk1.ilIl1_11[29] .INIT=16'hFE02; // @28:441300 CFG4 \genblk1.ilIl1_11[25] ( .A(olIl1[25]), .B(O0Il1[1]), .C(O0Il1_0), .D(io0i0[25]), .Y(ilIl1_11[25]) ); defparam \genblk1.ilIl1_11[25] .INIT=16'hFE02; // @28:441300 CFG4 \genblk1.ilIl1_11[24] ( .A(olIl1[24]), .B(O0Il1[1]), .C(O0Il1_0), .D(io0i0[24]), .Y(ilIl1_11[24]) ); defparam \genblk1.ilIl1_11[24] .INIT=16'hFE02; // @28:441300 CFG4 \genblk1.ilIl1_11[23] ( .A(olIl1[23]), .B(O0Il1[1]), .C(O0Il1_0), .D(io0i0[23]), .Y(ilIl1_11[23]) ); defparam \genblk1.ilIl1_11[23] .INIT=16'hFE02; // @28:441300 CFG4 \genblk1.ilIl1_11[22] ( .A(olIl1[22]), .B(O0Il1[1]), .C(O0Il1_0), .D(io0i0[22]), .Y(ilIl1_11[22]) ); defparam \genblk1.ilIl1_11[22] .INIT=16'hFE02; // @28:441300 CFG4 \genblk1.ilIl1_11[21] ( .A(olIl1[21]), .B(O0Il1[1]), .C(O0Il1_0), .D(io0i0[21]), .Y(ilIl1_11[21]) ); defparam \genblk1.ilIl1_11[21] .INIT=16'hFE02; // @28:441300 CFG4 \genblk1.ilIl1_11[20] ( .A(olIl1[20]), .B(O0Il1[1]), .C(O0Il1_0), .D(io0i0[20]), .Y(ilIl1_11[20]) ); defparam \genblk1.ilIl1_11[20] .INIT=16'hFE02; // @28:441300 CFG4 \genblk1.ilIl1_11[19] ( .A(olIl1[19]), .B(O0Il1[1]), .C(O0Il1_0), .D(io0i0[19]), .Y(ilIl1_11[19]) ); defparam \genblk1.ilIl1_11[19] .INIT=16'hFE02; // @28:441300 CFG4 \genblk1.ilIl1_11[18] ( .A(olIl1[18]), .B(O0Il1[1]), .C(O0Il1_0), .D(io0i0[18]), .Y(ilIl1_11[18]) ); defparam \genblk1.ilIl1_11[18] .INIT=16'hFE02; // @28:441300 CFG4 \genblk1.ilIl1_11[17] ( .A(olIl1[17]), .B(O0Il1[1]), .C(O0Il1_0), .D(io0i0[17]), .Y(ilIl1_11[17]) ); defparam \genblk1.ilIl1_11[17] .INIT=16'hFE02; // @28:441300 CFG4 \genblk1.ilIl1_11[13] ( .A(olIl1[13]), .B(O0Il1[1]), .C(O0Il1_0), .D(io0i0[13]), .Y(ilIl1_11[13]) ); defparam \genblk1.ilIl1_11[13] .INIT=16'hFE02; // @28:441300 CFG4 \genblk1.ilIl1_11[6] ( .A(olIl1[6]), .B(O0Il1[1]), .C(O0Il1_0), .D(io0i0[6]), .Y(ilIl1_11[6]) ); defparam \genblk1.ilIl1_11[6] .INIT=16'hFE02; // @28:441204 CFG4 \genblk1.O0Il1_ns_i_i_m2[1] ( .A(iiOl1_Z), .B(O0Il1[2]), .C(O0Il1_0), .D(O0Il1[1]), .Y(N_92) ); defparam \genblk1.O0Il1_ns_i_i_m2[1] .INIT=16'hEEE4; // @28:441204 CFG4 \genblk1.O0Il1_RNI2FI59[2] ( .A(iiOl1_Z), .B(O0Il1[2]), .C(O0Il1_0), .D(O0Il1[1]), .Y(N_967_i) ); defparam \genblk1.O0Il1_RNI2FI59[2] .INIT=16'h000B; // @28:440535 CFG3 \un1_iloI1_2[2] ( .A(iloI1[2]), .B(un2_i0Il1_Z), .C(un1_IOIl1_cry_2_S), .Y(oo0i0[2]) ); defparam \un1_iloI1_2[2] .INIT=8'hB8; // @28:440535 CFG3 \un1_iloI1_2[3] ( .A(iloI1[3]), .B(un2_i0Il1_Z), .C(un1_IOIl1_cry_3_S), .Y(oo0i0[3]) ); defparam \un1_iloI1_2[3] .INIT=8'hB8; // @28:440535 CFG3 \un1_iloI1_2[4] ( .A(iloI1[4]), .B(un2_i0Il1_Z), .C(un1_IOIl1_cry_4_S), .Y(oo0i0[4]) ); defparam \un1_iloI1_2[4] .INIT=8'hB8; // @28:440535 CFG3 \un1_iloI1_2[7] ( .A(iloI1[7]), .B(un2_i0Il1_Z), .C(un1_IOIl1_cry_7_S), .Y(oo0i0[7]) ); defparam \un1_iloI1_2[7] .INIT=8'hB8; // @28:440535 CFG3 \un1_iloI1_2[8] ( .A(iloI1[8]), .B(un2_i0Il1_Z), .C(un1_IOIl1_cry_8_S), .Y(oo0i0[8]) ); defparam \un1_iloI1_2[8] .INIT=8'hB8; // @28:440535 CFG3 \un1_iloI1_2[9] ( .A(iloI1[9]), .B(un2_i0Il1_Z), .C(un1_IOIl1_cry_9_S), .Y(oo0i0[9]) ); defparam \un1_iloI1_2[9] .INIT=8'hB8; // @28:440535 CFG3 \un1_iloI1_2[10] ( .A(iloI1[10]), .B(un2_i0Il1_Z), .C(un1_IOIl1_cry_10_S), .Y(oo0i0[10]) ); defparam \un1_iloI1_2[10] .INIT=8'hB8; // @28:440535 CFG3 \un1_iloI1_2[11] ( .A(iloI1[11]), .B(un2_i0Il1_Z), .C(un1_IOIl1_s_11_S), .Y(oo0i0[11]) ); defparam \un1_iloI1_2[11] .INIT=8'hB8; // @28:440535 CFG3 \un1_iloI1_2[5] ( .A(iloI1[5]), .B(un2_i0Il1_Z), .C(un1_IOIl1_cry_5_S), .Y(oo0i0[5]) ); defparam \un1_iloI1_2[5] .INIT=8'hB8; // @28:440535 CFG3 \un1_iloI1_2[0] ( .A(iloI1[0]), .B(un2_i0Il1_Z), .C(IOIl1[0]), .Y(oo0i0[0]) ); defparam \un1_iloI1_2[0] .INIT=8'h8B; // @28:440535 CFG3 \un1_iloI1_2[1] ( .A(iloI1[1]), .B(un2_i0Il1_Z), .C(un1_IOIl1_cry_1_S), .Y(oo0i0[1]) ); defparam \un1_iloI1_2[1] .INIT=8'hB8; // @28:440535 CFG3 \un1_iloI1_2[6] ( .A(iloI1[6]), .B(un2_i0Il1_Z), .C(un1_IOIl1_cry_6_S), .Y(oo0i0[6]) ); defparam \un1_iloI1_2[6] .INIT=8'hB8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_AMCXRFIF_FAB_26s_12s_32s_2s_0_1s */ module CTSE_AMCXRFIF_SYS_26s_0s_12s_32s_2s_0_0_0_1s ( oloI1, lo1I1, oo1I1, IloI1, o0iO1, IioI1_0, Io1I1_1z, Io0i0, Oo0i0, oi0I1, Ii0I1, IO1I1_2z, lO1I1_1z, I01I1, lliO1, O0OI1, I1iO1, i1iO1_1z, o1iO1, io1I1, OioI1, Ol1I1_1z, oI1I1_1z, iliO1, oO1I1_1z, OO1I1_2z, O01I1_1z, O0iO1_1z, oliO1, l0iO1, Oi1I1, Oi0I1_1z, iO1I1_3z, li0I1, iOoI1, lloI1, ii0I1_1z, PF_IOD_CDR_C0_0_RX_CLK_R, oilI1_i, o10i0_i ) ; input [35:0] oloI1 ; input [17:0] lo1I1 ; input [17:0] oo1I1 ; input [13:0] IloI1 ; input [32:6] o0iO1 ; input IioI1_0 ; input [11:0] Io1I1_1z ; output [35:0] Io0i0 ; output [11:0] Oo0i0 ; output [12:0] oi0I1 ; input [12:0] Ii0I1 ; output [12:0] IO1I1_2z ; output [12:0] lO1I1_1z ; output [12:0] I01I1 ; input [7:0] lliO1 ; input O0OI1 ; input I1iO1 ; input i1iO1_1z ; input o1iO1 ; input io1I1 ; input OioI1 ; output Ol1I1_1z ; output oI1I1_1z ; input iliO1 ; output oO1I1_1z ; output OO1I1_2z ; output O01I1_1z ; input O0iO1_1z ; input oliO1 ; input l0iO1 ; input Oi1I1 ; input Oi0I1_1z ; input iO1I1_3z ; input li0I1 ; input iOoI1 ; input lloI1 ; output ii0I1_1z ; input PF_IOD_CDR_C0_0_RX_CLK_R ; input oilI1_i ; output o10i0_i ; wire IioI1_0 ; wire O0OI1 ; wire I1iO1 ; wire i1iO1_1z ; wire o1iO1 ; wire io1I1 ; wire OioI1 ; wire Ol1I1_1z ; wire oI1I1_1z ; wire iliO1 ; wire oO1I1_1z ; wire OO1I1_2z ; wire O01I1_1z ; wire O0iO1_1z ; wire oliO1 ; wire l0iO1 ; wire Oi1I1 ; wire Oi0I1_1z ; wire iO1I1_3z ; wire li0I1 ; wire iOoI1 ; wire lloI1 ; wire ii0I1_1z ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire oilI1_i ; wire o10i0_i ; wire [13:0] l0ll1_Z; wire [13:13] l0ll1_s_Z; wire [12:0] l0ll1_s; wire [7:0] O10l1_0_Z; wire [7:0] oO0l1; wire [0:0] Oi0l1_Z; wire [0:0] io0l1_Z; wire [0:0] oo0l1_Z; wire [0:0] II0l1_Z; wire [0:0] OI0l1_Z; wire [0:0] iO0l1_Z; wire [0:0] Io0l1_Z; wire [0:0] Oo0l1_Z; wire [0:0] i10l1_Z; wire [7:0] o10l1; wire [7:0] l10l1_2_Z; wire [7:0] I10l1_1_Z; wire [7:0] IO0l1_1_Z; wire [7:0] OO0l1_0_Z; wire [7:0] lO0l1_2_Z; wire [0:0] Ol0l1_Z; wire [0:0] iI0l1_Z; wire [0:0] oI0l1_Z; wire [35:32] lIII1_Z; wire [34:34] lIII1_16; wire [35:35] lIII1_6_Z; wire [31:0] lIII1; wire [15:8] lIII1_44; wire [23:16] lIII1_53; wire [14:0] IoIl1; wire [14:0] i1Il1_Z; wire [33:32] lIII1_26_Z; wire [1:0] OoIl1_Z; wire [12:0] iOll1_Z; wire [12:0] iiIl1_Z; wire [7:0] lIII1_35; wire [31:24] lIII1_62; wire [11:0] II1l1_Z; wire [14:2] un1_OoIl1_21; wire [2:2] OoIl1_RNIFUTTT_Y; wire [3:3] OoIl1_RNILF2K51_Y; wire [4:4] OoIl1_RNIS17AD1_Y; wire [5:5] OoIl1_RNI4LB0L1_Y; wire [6:6] OoIl1_RNID9GMS1_Y; wire [7:7] OoIl1_RNINUKC42_Y; wire [8:8] OoIl1_RNI2LP2C2_Y; wire [9:9] OoIl1_RNIECUOJ2_Y; wire [10:10] OoIl1_RNI2KGJP2_Y; wire [11:11] OoIl1_RNINS2EV2_Y; wire [12:12] OoIl1_RNID6L853_Y; wire [14:14] i1Il1_RNO_0_FCO; wire [14:14] i1Il1_RNO_0_Y; wire [13:13] OoIl1_RNI4H73B3_Y; wire [0:0] OoIl1_RNINAN5K1_S; wire [0:0] OoIl1_RNINAN5K1_Y; wire [14:1] un1_OoIl1_20; wire [1:1] OoIl1_RNI58L3I2_Y; wire [2:2] OoIl1_RNIK6J1G3_Y; wire [3:3] OoIl1_RNIQNNNN3_Y; wire [4:4] OoIl1_RNI1ASDV3_Y; wire [5:5] OoIl1_RNI9T0474_Y; wire [6:6] OoIl1_RNIIH5QE4_Y; wire [7:7] OoIl1_RNIS6AGM4_Y; wire [8:8] OoIl1_RNI7TE6U4_Y; wire [9:9] OoIl1_RNIJKJS55_Y; wire [10:10] OoIl1_RNI7S5NB5_Y; wire [11:11] OoIl1_RNIS4OHH5_Y; wire [12:12] OoIl1_RNIIEACN5_Y; wire [14:14] i1Il1_RNO_1_FCO; wire [14:14] i1Il1_RNO_1_Y; wire [13:13] OoIl1_RNI9PS6T5_Y; wire [5:0] un3_OOll1_0_data_tmp; wire [12:0] l0ll1_cry_Z; wire [12:0] l0ll1_cry_Y; wire [13:13] l0ll1_s_FCO; wire [13:13] l0ll1_s_Y; wire [1:1] i1Il1_1_0_Z; wire [1:0] un1_OoIl1_1_0; wire [0:0] i1Il1_1_Z; wire [17:0] un3_o1ll1_Z; wire [7:0] IO1l1_2_Z; wire [7:0] IO1l1_Z; wire [14:2] i1Il1_m0_Z; wire [14:2] i1Il1_m1; wire o10i0 ; wire IIll1_Z ; wire IIll1_i ; wire oIll1_Z ; wire oIll1_i ; wire VCC ; wire l0ll1e ; wire GND ; wire i1ll1_Z ; wire Illl1_Z ; wire iIll1_Z ; wire lIll1_Z ; wire OIll1_Z ; wire lOll1_Z ; wire O1ll1_Z ; wire o0ll1_Z ; wire loIl1_Z ; wire Ioll1_Z ; wire Ooll1_Z ; wire Olll1_Z ; wire llll1_Z ; wire oOll1_Z ; wire i0ll1_Z ; wire lI1l1_Z ; wire OiIl1_Z ; wire ooIl1_Z ; wire IOll1_Z ; wire OOll1_Z ; wire oill1_Z ; wire Oill1_Z ; wire Ii0l1 ; wire Il0l1 ; wire lI0l1 ; wire lo0l1 ; wire un1_lIII110_1_i ; wire oiIl1_Z ; wire oiIl18 ; wire un1_oiIl18_Z ; wire un1_lIII110_4_Z ; wire I0ll1_Z ; wire oI1I18_Z ; wire un1_oI1I18_Z ; wire un1_oI1I18_1_Z ; wire un1_Ol1I18_Z ; wire ioIl1_Z ; wire ioIl18_i_Z ; wire un1_ioIl18_1_Z ; wire un1_lIII110 ; wire un1_lIII110_0 ; wire IoIl15 ; wire IO1I15_Z ; wire iOll15_Z ; wire oi0I15_Z ; wire l1ll1_Z ; wire un1_lIII110_1 ; wire un1_lIII110_2 ; wire un1_OoIl1_3_cry_0_cy ; wire loIl1_RNIAEP7M_S ; wire loIl1_RNIAEP7M_Y ; wire un4_i1Il1 ; wire un1_OoIl1_3_cry_0 ; wire un1_OoIl1_3_cry_1 ; wire un1_OoIl1_3_cry_2 ; wire un1_OoIl1_3_cry_3 ; wire un1_OoIl1_3_cry_4 ; wire un1_OoIl1_3_cry_5 ; wire un1_OoIl1_3_cry_6 ; wire un1_OoIl1_3_cry_7 ; wire un1_OoIl1_3_cry_8 ; wire un1_OoIl1_3_cry_9 ; wire un1_OoIl1_3_cry_10 ; wire un1_OoIl1_3_cry_11 ; wire un1_OoIl1_cry_0 ; wire un10_i1Il1_i ; wire un1_OoIl1_cry_1 ; wire un1_OoIl1_cry_2 ; wire un1_OoIl1_cry_3 ; wire un1_OoIl1_cry_4 ; wire un1_OoIl1_cry_5 ; wire un1_OoIl1_cry_6 ; wire un1_OoIl1_cry_7 ; wire un1_OoIl1_cry_8 ; wire un1_OoIl1_cry_9 ; wire un1_OoIl1_cry_10 ; wire un1_OoIl1_cry_11 ; wire un1_OoIl1_cry_12 ; wire un1_OoIl1_cry_13 ; wire un8_l1ll1_cry_0_Z ; wire un8_l1ll1_cry_0_S ; wire un8_l1ll1_cry_0_Y ; wire un8_l1ll1_cry_1_Z ; wire un8_l1ll1_cry_1_S ; wire un8_l1ll1_cry_1_Y ; wire un8_l1ll1_cry_2_Z ; wire un8_l1ll1_cry_2_S ; wire un8_l1ll1_cry_2_Y ; wire un8_l1ll1_cry_3_Z ; wire un8_l1ll1_cry_3_S ; wire un8_l1ll1_cry_3_Y ; wire un8_l1ll1_cry_4_Z ; wire un8_l1ll1_cry_4_S ; wire un8_l1ll1_cry_4_Y ; wire un8_l1ll1_cry_5_Z ; wire un8_l1ll1_cry_5_S ; wire un8_l1ll1_cry_5_Y ; wire un8_l1ll1_cry_6_Z ; wire un8_l1ll1_cry_6_S ; wire un8_l1ll1_cry_6_Y ; wire un8_l1ll1_cry_7_Z ; wire un8_l1ll1_cry_7_S ; wire un8_l1ll1_cry_7_Y ; wire un8_l1ll1_cry_8_Z ; wire un8_l1ll1_cry_8_S ; wire un8_l1ll1_cry_8_Y ; wire un8_l1ll1_cry_9_Z ; wire un8_l1ll1_cry_9_S ; wire un8_l1ll1_cry_9_Y ; wire un8_l1ll1_cry_10_Z ; wire un8_l1ll1_cry_10_S ; wire un8_l1ll1_cry_10_Y ; wire un8_l1ll1_cry_11_Z ; wire un8_l1ll1_cry_11_S ; wire un8_l1ll1_cry_11_Y ; wire OOll1_RNO_4_S ; wire OOll1_RNO_4_Y ; wire OOll1_RNO_3_S ; wire OOll1_RNO_3_Y ; wire OOll1_RNO_2_S ; wire OOll1_RNO_2_Y ; wire OOll1_RNO_1_S ; wire OOll1_RNO_1_Y ; wire OOll1_RNO_0_S ; wire OOll1_RNO_0_Y ; wire OOll1_RNO_S ; wire OOll1_RNO_Y ; wire l0ll1_s_4129_FCO ; wire l0ll1_s_4129_S ; wire l0ll1_s_4129_Y ; wire un1_i1Il1_Z ; wire i1Il1_m0s2_Z ; wire i1Il1 ; wire l1ll1_0_Z ; wire l1ll1_1_Z ; wire un5_l1ll1_0_Z ; wire lO1l1_u_1_0 ; wire lO1l1 ; wire un1_l0ll1_3_Z ; wire un1_l0ll1_9_Z ; wire un1_l0ll1_7_Z ; wire un9_o1ll1_7_Z ; wire un9_o1ll1_6_Z ; wire un9_o1ll1_5_Z ; wire un10_l1ll1_8_Z ; wire un10_l1ll1_7_Z ; wire un10_l1ll1_6_Z ; wire un1_Oill1_Z ; wire I1ll1_Z ; wire un1_liOI1_4_i ; wire lIII110_Z ; wire un1_IloI1_1_Z ; wire un1_i1Il1_RNO_0_Z ; wire oO1l1_2 ; wire un1_o1ll1_7_Z ; wire un1_o1ll1_6_Z ; wire un1_o1ll1_5_Z ; wire un1_o1ll1_4_Z ; wire un1_o1ll1_3_Z ; wire un1_o1ll1_2_Z ; wire un1_o1ll1_1_Z ; wire un1_o1ll1_0_Z ; wire un1_l0ll1_11_Z ; wire un1_l0ll1_10_Z ; wire un16_m6_0_a3_0 ; wire oO1l1 ; wire un1_o1ll1_12_Z ; wire un1_o1ll1_8_Z ; wire un1_oI1I1_1_Z ; wire un1_o1ll1_14_Z ; wire un1_o1ll1_16_Z ; wire un1_o1ll1_15_Z ; wire o1ll1_Z ; wire un3_l1ll1_Z ; wire N_794 ; wire N_793 ; wire N_790 ; wire N_787 ; wire N_786 ; wire N_785 ; wire N_784 ; wire N_783 ; wire N_782 ; wire N_781 ; wire N_780 ; wire N_779 ; wire N_778 ; wire N_777 ; wire N_776 ; wire N_775 ; wire N_774 ; wire N_773 ; wire N_772 ; wire N_771 ; wire N_761 ; wire N_760 ; wire N_759 ; wire N_758 ; wire N_757 ; wire N_756 ; wire N_755 ; wire N_754 ; wire N_753 ; wire N_752 ; wire N_751 ; wire N_750 ; wire N_749 ; wire N_748 ; wire N_747 ; wire N_746 ; CFG1 OIII1_RNIIOAQ5 ( .A(o10i0), .Y(o10i0_i) ); defparam OIII1_RNIIOAQ5.INIT=2'h1; CFG1 ii0I1_RNO ( .A(IIll1_Z), .Y(IIll1_i) ); defparam ii0I1_RNO.INIT=2'h1; CFG1 oO1I1_RNO ( .A(oIll1_Z), .Y(oIll1_i) ); defparam oO1I1_RNO.INIT=2'h1; // @28:445799 SLE \l0ll1[13] ( .Q(l0ll1_Z[13]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(l0ll1_s_Z[13]), .EN(l0ll1e), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445799 SLE \l0ll1[12] ( .Q(l0ll1_Z[12]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(l0ll1_s[12]), .EN(l0ll1e), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445799 SLE \l0ll1[11] ( .Q(l0ll1_Z[11]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(l0ll1_s[11]), .EN(l0ll1e), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445799 SLE \l0ll1[10] ( .Q(l0ll1_Z[10]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(l0ll1_s[10]), .EN(l0ll1e), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445799 SLE \l0ll1[9] ( .Q(l0ll1_Z[9]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(l0ll1_s[9]), .EN(l0ll1e), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445799 SLE \l0ll1[8] ( .Q(l0ll1_Z[8]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(l0ll1_s[8]), .EN(l0ll1e), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445799 SLE \l0ll1[7] ( .Q(l0ll1_Z[7]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(l0ll1_s[7]), .EN(l0ll1e), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445799 SLE \l0ll1[6] ( .Q(l0ll1_Z[6]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(l0ll1_s[6]), .EN(l0ll1e), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445799 SLE \l0ll1[5] ( .Q(l0ll1_Z[5]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(l0ll1_s[5]), .EN(l0ll1e), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445799 SLE \l0ll1[4] ( .Q(l0ll1_Z[4]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(l0ll1_s[4]), .EN(l0ll1e), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445799 SLE \l0ll1[3] ( .Q(l0ll1_Z[3]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(l0ll1_s[3]), .EN(l0ll1e), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445799 SLE \l0ll1[2] ( .Q(l0ll1_Z[2]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(l0ll1_s[2]), .EN(l0ll1e), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445799 SLE \l0ll1[1] ( .Q(l0ll1_Z[1]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(l0ll1_s[1]), .EN(l0ll1e), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445799 SLE \l0ll1[0] ( .Q(l0ll1_Z[0]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(l0ll1_s[0]), .EN(l0ll1e), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445963 SLE ii0I1 ( .Q(ii0I1_1z), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IIll1_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446687 SLE i1ll1 ( .Q(i1ll1_Z), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lloI1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446623 SLE Illl1 ( .Q(Illl1_Z), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iOoI1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446559 SLE iIll1 ( .Q(iIll1_Z), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(li0I1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446495 SLE lIll1 ( .Q(lIll1_Z), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iO1I1_3z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446431 SLE OIll1 ( .Q(OIll1_Z), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Oi0I1_1z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446367 SLE lOll1 ( .Q(lOll1_Z), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Oi1I1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445701 SLE O1ll1 ( .Q(O1ll1_Z), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(l0iO1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445629 SLE o0ll1 ( .Q(o0ll1_Z), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oliO1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445272 SLE loIl1 ( .Q(loIl1_Z), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O0iO1_1z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446783 SLE O01I1 ( .Q(O01I1_1z), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Ioll1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446751 SLE Ioll1 ( .Q(Ioll1_Z), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Ooll1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446189 SLE OO1I1 ( .Q(OO1I1_2z), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Olll1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446719 SLE Ooll1 ( .Q(Ooll1_Z), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1ll1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446655 SLE llll1 ( .Q(llll1_Z), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Illl1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446591 SLE Olll1 ( .Q(Olll1_Z), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIll1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446527 SLE oIll1 ( .Q(oIll1_Z), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIll1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446463 SLE IIll1 ( .Q(IIll1_Z), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIll1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446399 SLE oOll1 ( .Q(oOll1_Z), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lOll1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445665 SLE i0ll1 ( .Q(i0ll1_Z), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(o0ll1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446056 SLE oO1I1 ( .Q(oO1I1_1z), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oIll1_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE OIII1 ( .Q(o10i0), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lI1l1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444747 SLE OiIl1 ( .Q(OiIl1_Z), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ooIl1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444938 SLE IOll1 ( .Q(IOll1_Z), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OOll1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445585 SLE oill1 ( .Q(oill1_Z), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Oill1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443775 SLE \O10l1_0[0] ( .Q(O10l1_0_Z[0]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oO0l1[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443999 SLE \Ii0l1[0] ( .Q(Ii0l1), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Oi0l1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443999 SLE \Oi0l1[0] ( .Q(Oi0l1_Z[0]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(io0l1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443999 SLE \io0l1[0] ( .Q(io0l1_Z[0]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oo0l1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443999 SLE \oo0l1[0] ( .Q(oo0l1_Z[0]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Il0l1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444719 SLE \lI0l1[0] ( .Q(lI0l1), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(II0l1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444719 SLE \II0l1[0] ( .Q(II0l1_Z[0]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OI0l1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444719 SLE \OI0l1[0] ( .Q(OI0l1_Z[0]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iO0l1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444719 SLE \iO0l1[0] ( .Q(iO0l1_Z[0]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ooIl1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444867 SLE \lo0l1[0] ( .Q(lo0l1), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Io0l1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444867 SLE \Io0l1[0] ( .Q(Io0l1_Z[0]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Oo0l1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444867 SLE \Oo0l1[0] ( .Q(Oo0l1_Z[0]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i10l1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444867 SLE \i10l1[0] ( .Q(i10l1_Z[0]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lI0l1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443775 SLE \o10l1_3[3] ( .Q(o10l1[3]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(l10l1_2_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443775 SLE \l10l1_2[3] ( .Q(l10l1_2_Z[3]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I10l1_1_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443775 SLE \I10l1_1[3] ( .Q(I10l1_1_Z[3]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O10l1_0_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443775 SLE \O10l1_0[3] ( .Q(O10l1_0_Z[3]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oO0l1[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443775 SLE \o10l1_3[2] ( .Q(o10l1[2]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(l10l1_2_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443775 SLE \l10l1_2[2] ( .Q(l10l1_2_Z[2]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I10l1_1_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443775 SLE \I10l1_1[2] ( .Q(I10l1_1_Z[2]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O10l1_0_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443775 SLE \O10l1_0[2] ( .Q(O10l1_0_Z[2]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oO0l1[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443775 SLE \o10l1_3[1] ( .Q(o10l1[1]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(l10l1_2_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443775 SLE \l10l1_2[1] ( .Q(l10l1_2_Z[1]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I10l1_1_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443775 SLE \I10l1_1[1] ( .Q(I10l1_1_Z[1]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O10l1_0_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443775 SLE \O10l1_0[1] ( .Q(O10l1_0_Z[1]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oO0l1[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443775 SLE \o10l1_3[0] ( .Q(o10l1[0]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(l10l1_2_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443775 SLE \l10l1_2[0] ( .Q(l10l1_2_Z[0]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I10l1_1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443775 SLE \I10l1_1[0] ( .Q(I10l1_1_Z[0]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O10l1_0_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443775 SLE \l10l1_2[7] ( .Q(l10l1_2_Z[7]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I10l1_1_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443775 SLE \I10l1_1[7] ( .Q(I10l1_1_Z[7]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O10l1_0_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443775 SLE \O10l1_0[7] ( .Q(O10l1_0_Z[7]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oO0l1[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443775 SLE \o10l1_3[6] ( .Q(o10l1[6]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(l10l1_2_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443775 SLE \l10l1_2[6] ( .Q(l10l1_2_Z[6]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I10l1_1_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443775 SLE \I10l1_1[6] ( .Q(I10l1_1_Z[6]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O10l1_0_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443775 SLE \O10l1_0[6] ( .Q(O10l1_0_Z[6]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oO0l1[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443775 SLE \o10l1_3[5] ( .Q(o10l1[5]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(l10l1_2_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443775 SLE \l10l1_2[5] ( .Q(l10l1_2_Z[5]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I10l1_1_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443775 SLE \I10l1_1[5] ( .Q(I10l1_1_Z[5]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O10l1_0_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443775 SLE \O10l1_0[5] ( .Q(O10l1_0_Z[5]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oO0l1[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443775 SLE \o10l1_3[4] ( .Q(o10l1[4]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(l10l1_2_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443775 SLE \l10l1_2[4] ( .Q(l10l1_2_Z[4]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I10l1_1_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443775 SLE \I10l1_1[4] ( .Q(I10l1_1_Z[4]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O10l1_0_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443775 SLE \O10l1_0[4] ( .Q(O10l1_0_Z[4]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oO0l1[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443663 SLE \IO0l1_1[2] ( .Q(IO0l1_1_Z[2]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO0l1_0_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443663 SLE \OO0l1_0[2] ( .Q(OO0l1_0_Z[2]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lliO1[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443663 SLE \oO0l1_3[1] ( .Q(oO0l1[1]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lO0l1_2_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443663 SLE \lO0l1_2[1] ( .Q(lO0l1_2_Z[1]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IO0l1_1_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443663 SLE \IO0l1_1[1] ( .Q(IO0l1_1_Z[1]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO0l1_0_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443663 SLE \OO0l1_0[1] ( .Q(OO0l1_0_Z[1]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lliO1[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443663 SLE \oO0l1_3[0] ( .Q(oO0l1[0]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lO0l1_2_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443663 SLE \lO0l1_2[0] ( .Q(lO0l1_2_Z[0]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IO0l1_1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443663 SLE \IO0l1_1[0] ( .Q(IO0l1_1_Z[0]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO0l1_0_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443663 SLE \OO0l1_0[0] ( .Q(OO0l1_0_Z[0]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lliO1[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443887 SLE \Il0l1[0] ( .Q(Il0l1), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Ol0l1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443887 SLE \Ol0l1[0] ( .Q(Ol0l1_Z[0]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iI0l1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443887 SLE \iI0l1[0] ( .Q(iI0l1_Z[0]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oI0l1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443887 SLE \oI0l1[0] ( .Q(oI0l1_Z[0]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iliO1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443775 SLE \o10l1_3[7] ( .Q(o10l1[7]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(l10l1_2_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443663 SLE \OO0l1_0[6] ( .Q(OO0l1_0_Z[6]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lliO1[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443663 SLE \oO0l1_3[5] ( .Q(oO0l1[5]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lO0l1_2_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443663 SLE \lO0l1_2[5] ( .Q(lO0l1_2_Z[5]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IO0l1_1_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443663 SLE \IO0l1_1[5] ( .Q(IO0l1_1_Z[5]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO0l1_0_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443663 SLE \OO0l1_0[5] ( .Q(OO0l1_0_Z[5]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lliO1[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443663 SLE \oO0l1_3[4] ( .Q(oO0l1[4]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lO0l1_2_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443663 SLE \lO0l1_2[4] ( .Q(lO0l1_2_Z[4]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IO0l1_1_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443663 SLE \IO0l1_1[4] ( .Q(IO0l1_1_Z[4]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO0l1_0_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443663 SLE \OO0l1_0[4] ( .Q(OO0l1_0_Z[4]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lliO1[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443663 SLE \oO0l1_3[3] ( .Q(oO0l1[3]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lO0l1_2_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443663 SLE \lO0l1_2[3] ( .Q(lO0l1_2_Z[3]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IO0l1_1_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443663 SLE \IO0l1_1[3] ( .Q(IO0l1_1_Z[3]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO0l1_0_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443663 SLE \OO0l1_0[3] ( .Q(OO0l1_0_Z[3]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lliO1[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443663 SLE \oO0l1_3[2] ( .Q(oO0l1[2]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lO0l1_2_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443663 SLE \lO0l1_2[2] ( .Q(lO0l1_2_Z[2]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IO0l1_1_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443663 SLE \oO0l1_3[7] ( .Q(oO0l1[7]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lO0l1_2_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443663 SLE \lO0l1_2[7] ( .Q(lO0l1_2_Z[7]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IO0l1_1_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443663 SLE \IO0l1_1[7] ( .Q(IO0l1_1_Z[7]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO0l1_0_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443663 SLE \OO0l1_0[7] ( .Q(OO0l1_0_Z[7]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lliO1[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443663 SLE \oO0l1_3[6] ( .Q(oO0l1[6]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lO0l1_2_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443663 SLE \lO0l1_2[6] ( .Q(lO0l1_2_Z[6]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IO0l1_1_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443663 SLE \IO0l1_1[6] ( .Q(IO0l1_1_Z[6]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO0l1_0_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444187 SLE \lIII1[34] ( .Q(lIII1_Z[34]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_16[34]), .EN(un1_lIII110_1_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445453 SLE oiIl1 ( .Q(oiIl1_Z), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oiIl18), .EN(un1_oiIl18_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444088 SLE \lIII1[35] ( .Q(lIII1_Z[35]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_6_Z[35]), .EN(un1_lIII110_4_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446310 SLE I0ll1 ( .Q(I0ll1_Z), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oI1I18_Z), .EN(un1_oI1I18_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446245 SLE oI1I1 ( .Q(oI1I1_1z), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(llll1_Z), .EN(un1_oI1I18_1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444974 SLE Ol1I1 ( .Q(Ol1I1_1z), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OOll1_Z), .EN(un1_Ol1I18_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444560 SLE ioIl1 ( .Q(ioIl1_Z), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioIl18_i_Z), .EN(un1_ioIl18_1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444431 SLE \iI1l1[1].lIII1[13] ( .Q(lIII1[13]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_44[13]), .EN(un1_lIII110), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444431 SLE \iI1l1[1].lIII1[12] ( .Q(lIII1[12]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_44[12]), .EN(un1_lIII110), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444431 SLE \iI1l1[1].lIII1[11] ( .Q(lIII1[11]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_44[11]), .EN(un1_lIII110), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444431 SLE \iI1l1[1].lIII1[10] ( .Q(lIII1[10]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_44[10]), .EN(un1_lIII110), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444431 SLE \iI1l1[1].lIII1[9] ( .Q(lIII1[9]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_44[9]), .EN(un1_lIII110), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444431 SLE \iI1l1[1].lIII1[8] ( .Q(lIII1[8]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_44[8]), .EN(un1_lIII110), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444431 SLE \iI1l1[2].lIII1[23] ( .Q(lIII1[23]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_53[23]), .EN(un1_lIII110_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444431 SLE \iI1l1[2].lIII1[22] ( .Q(lIII1[22]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_53[22]), .EN(un1_lIII110_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444431 SLE \iI1l1[2].lIII1[21] ( .Q(lIII1[21]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_53[21]), .EN(un1_lIII110_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444431 SLE \iI1l1[2].lIII1[20] ( .Q(lIII1[20]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_53[20]), .EN(un1_lIII110_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444431 SLE \iI1l1[2].lIII1[19] ( .Q(lIII1[19]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_53[19]), .EN(un1_lIII110_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444431 SLE \iI1l1[2].lIII1[18] ( .Q(lIII1[18]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_53[18]), .EN(un1_lIII110_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444431 SLE \iI1l1[2].lIII1[17] ( .Q(lIII1[17]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_53[17]), .EN(un1_lIII110_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444431 SLE \iI1l1[2].lIII1[16] ( .Q(lIII1[16]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_53[16]), .EN(un1_lIII110_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445412 SLE \genblk3.IoIl1[10] ( .Q(IoIl1[10]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[10]), .EN(IoIl15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445412 SLE \genblk3.IoIl1[9] ( .Q(IoIl1[9]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[9]), .EN(IoIl15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445412 SLE \genblk3.IoIl1[8] ( .Q(IoIl1[8]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[8]), .EN(IoIl15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445412 SLE \genblk3.IoIl1[7] ( .Q(IoIl1[7]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[7]), .EN(IoIl15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445412 SLE \genblk3.IoIl1[6] ( .Q(IoIl1[6]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[6]), .EN(IoIl15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445412 SLE \genblk3.IoIl1[5] ( .Q(IoIl1[5]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[5]), .EN(IoIl15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445412 SLE \genblk3.IoIl1[4] ( .Q(IoIl1[4]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[4]), .EN(IoIl15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445412 SLE \genblk3.IoIl1[3] ( .Q(IoIl1[3]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[3]), .EN(IoIl15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445412 SLE \genblk3.IoIl1[2] ( .Q(IoIl1[2]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[2]), .EN(IoIl15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445412 SLE \genblk3.IoIl1[1] ( .Q(IoIl1[1]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[1]), .EN(IoIl15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445412 SLE \genblk3.IoIl1[0] ( .Q(IoIl1[0]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[0]), .EN(IoIl15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444282 SLE \lIII1[33] ( .Q(lIII1_Z[33]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_26_Z[33]), .EN(un1_lIII110_1_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444282 SLE \lIII1[32] ( .Q(lIII1_Z[32]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_26_Z[32]), .EN(un1_lIII110_1_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444431 SLE \iI1l1[1].lIII1[15] ( .Q(lIII1[15]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_44[15]), .EN(un1_lIII110), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444431 SLE \iI1l1[1].lIII1[14] ( .Q(lIII1[14]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_44[14]), .EN(un1_lIII110), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445208 SLE \OoIl1[10] ( .Q(I01I1[8]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445208 SLE \OoIl1[9] ( .Q(I01I1[7]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445208 SLE \OoIl1[8] ( .Q(I01I1[6]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445208 SLE \OoIl1[7] ( .Q(I01I1[5]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445208 SLE \OoIl1[6] ( .Q(I01I1[4]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445208 SLE \OoIl1[5] ( .Q(I01I1[3]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445208 SLE \OoIl1[4] ( .Q(I01I1[2]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445208 SLE \OoIl1[3] ( .Q(I01I1[1]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445208 SLE \OoIl1[2] ( .Q(I01I1[0]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445208 SLE \OoIl1[1] ( .Q(OoIl1_Z[1]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445208 SLE \OoIl1[0] ( .Q(OoIl1_Z[0]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445412 SLE \genblk3.IoIl1[14] ( .Q(IoIl1[14]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[14]), .EN(IoIl15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445412 SLE \genblk3.IoIl1[13] ( .Q(IoIl1[13]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[13]), .EN(IoIl15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445412 SLE \genblk3.IoIl1[12] ( .Q(IoIl1[12]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[12]), .EN(IoIl15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445412 SLE \genblk3.IoIl1[11] ( .Q(IoIl1[11]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[11]), .EN(IoIl15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445208 SLE \OoIl1[14] ( .Q(I01I1[12]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[14]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445208 SLE \OoIl1[13] ( .Q(I01I1[11]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[13]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445208 SLE \OoIl1[12] ( .Q(I01I1[10]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[12]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445208 SLE \OoIl1[11] ( .Q(I01I1[9]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[11]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446149 SLE \lO1I1[9] ( .Q(lO1I1_1z[9]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iOll1_Z[9]), .EN(IO1I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446149 SLE \lO1I1[8] ( .Q(lO1I1_1z[8]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iOll1_Z[8]), .EN(IO1I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446149 SLE \lO1I1[7] ( .Q(lO1I1_1z[7]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iOll1_Z[7]), .EN(IO1I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446149 SLE \lO1I1[6] ( .Q(lO1I1_1z[6]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iOll1_Z[6]), .EN(IO1I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446149 SLE \lO1I1[5] ( .Q(lO1I1_1z[5]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iOll1_Z[5]), .EN(IO1I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446149 SLE \lO1I1[4] ( .Q(lO1I1_1z[4]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iOll1_Z[4]), .EN(IO1I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446149 SLE \lO1I1[3] ( .Q(lO1I1_1z[3]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iOll1_Z[3]), .EN(IO1I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446149 SLE \lO1I1[2] ( .Q(lO1I1_1z[2]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iOll1_Z[2]), .EN(IO1I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446149 SLE \lO1I1[1] ( .Q(lO1I1_1z[1]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iOll1_Z[1]), .EN(IO1I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446149 SLE \lO1I1[0] ( .Q(lO1I1_1z[0]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iOll1_Z[0]), .EN(IO1I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445323 SLE \iOll1[11] ( .Q(iOll1_Z[11]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Ii0I1[11]), .EN(iOll15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445323 SLE \iOll1[10] ( .Q(iOll1_Z[10]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Ii0I1[10]), .EN(iOll15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445323 SLE \iOll1[9] ( .Q(iOll1_Z[9]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Ii0I1[9]), .EN(iOll15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445323 SLE \iOll1[8] ( .Q(iOll1_Z[8]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Ii0I1[8]), .EN(iOll15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445323 SLE \iOll1[7] ( .Q(iOll1_Z[7]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Ii0I1[7]), .EN(iOll15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445323 SLE \iOll1[6] ( .Q(iOll1_Z[6]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Ii0I1[6]), .EN(iOll15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445323 SLE \iOll1[5] ( .Q(iOll1_Z[5]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Ii0I1[5]), .EN(iOll15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445323 SLE \iOll1[4] ( .Q(iOll1_Z[4]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Ii0I1[4]), .EN(iOll15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445323 SLE \iOll1[3] ( .Q(iOll1_Z[3]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Ii0I1[3]), .EN(iOll15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445323 SLE \iOll1[2] ( .Q(iOll1_Z[2]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Ii0I1[2]), .EN(iOll15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445323 SLE \iOll1[1] ( .Q(iOll1_Z[1]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Ii0I1[1]), .EN(iOll15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445323 SLE \iOll1[0] ( .Q(iOll1_Z[0]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Ii0I1[0]), .EN(iOll15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446149 SLE \lO1I1[12] ( .Q(lO1I1_1z[12]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iOll1_Z[12]), .EN(IO1I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446149 SLE \lO1I1[11] ( .Q(lO1I1_1z[11]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iOll1_Z[11]), .EN(IO1I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446149 SLE \lO1I1[10] ( .Q(lO1I1_1z[10]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iOll1_Z[10]), .EN(IO1I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446016 SLE \oi0I1_Z[0] ( .Q(oi0I1[0]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iiIl1_Z[0]), .EN(oi0I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446109 SLE \IO1I1[12] ( .Q(IO1I1_2z[12]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iiIl1_Z[12]), .EN(IO1I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446109 SLE \IO1I1[11] ( .Q(IO1I1_2z[11]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iiIl1_Z[11]), .EN(IO1I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446109 SLE \IO1I1[10] ( .Q(IO1I1_2z[10]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iiIl1_Z[10]), .EN(IO1I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446109 SLE \IO1I1[9] ( .Q(IO1I1_2z[9]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iiIl1_Z[9]), .EN(IO1I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446109 SLE \IO1I1[8] ( .Q(IO1I1_2z[8]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iiIl1_Z[8]), .EN(IO1I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446109 SLE \IO1I1[7] ( .Q(IO1I1_2z[7]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iiIl1_Z[7]), .EN(IO1I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446109 SLE \IO1I1[6] ( .Q(IO1I1_2z[6]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iiIl1_Z[6]), .EN(IO1I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446109 SLE \IO1I1[5] ( .Q(IO1I1_2z[5]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iiIl1_Z[5]), .EN(IO1I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446109 SLE \IO1I1[4] ( .Q(IO1I1_2z[4]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iiIl1_Z[4]), .EN(IO1I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446109 SLE \IO1I1[3] ( .Q(IO1I1_2z[3]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iiIl1_Z[3]), .EN(IO1I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446109 SLE \IO1I1[2] ( .Q(IO1I1_2z[2]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iiIl1_Z[2]), .EN(IO1I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446109 SLE \IO1I1[1] ( .Q(IO1I1_2z[1]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iiIl1_Z[1]), .EN(IO1I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446109 SLE \IO1I1[0] ( .Q(IO1I1_2z[0]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iiIl1_Z[0]), .EN(IO1I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445323 SLE \iOll1[12] ( .Q(iOll1_Z[12]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Ii0I1[12]), .EN(iOll15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445918 SLE \iiIl1[2] ( .Q(iiIl1_Z[2]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[4]), .EN(l1ll1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445918 SLE \iiIl1[1] ( .Q(iiIl1_Z[1]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[3]), .EN(l1ll1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445918 SLE \iiIl1[0] ( .Q(iiIl1_Z[0]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[2]), .EN(l1ll1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446016 SLE \oi0I1_Z[12] ( .Q(oi0I1[12]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iiIl1_Z[12]), .EN(oi0I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446016 SLE \oi0I1_Z[11] ( .Q(oi0I1[11]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iiIl1_Z[11]), .EN(oi0I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446016 SLE \oi0I1_Z[10] ( .Q(oi0I1[10]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iiIl1_Z[10]), .EN(oi0I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446016 SLE \oi0I1_Z[9] ( .Q(oi0I1[9]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iiIl1_Z[9]), .EN(oi0I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446016 SLE \oi0I1_Z[8] ( .Q(oi0I1[8]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iiIl1_Z[8]), .EN(oi0I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446016 SLE \oi0I1_Z[7] ( .Q(oi0I1[7]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iiIl1_Z[7]), .EN(oi0I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446016 SLE \oi0I1_Z[6] ( .Q(oi0I1[6]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iiIl1_Z[6]), .EN(oi0I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446016 SLE \oi0I1_Z[5] ( .Q(oi0I1[5]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iiIl1_Z[5]), .EN(oi0I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446016 SLE \oi0I1_Z[4] ( .Q(oi0I1[4]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iiIl1_Z[4]), .EN(oi0I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446016 SLE \oi0I1_Z[3] ( .Q(oi0I1[3]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iiIl1_Z[3]), .EN(oi0I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446016 SLE \oi0I1_Z[2] ( .Q(oi0I1[2]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iiIl1_Z[2]), .EN(oi0I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:446016 SLE \oi0I1_Z[1] ( .Q(oi0I1[1]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iiIl1_Z[1]), .EN(oi0I15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444431 SLE \iI1l1[0].lIII1[4] ( .Q(lIII1[4]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_35[4]), .EN(un1_lIII110_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444431 SLE \iI1l1[0].lIII1[3] ( .Q(lIII1[3]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_35[3]), .EN(un1_lIII110_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444431 SLE \iI1l1[0].lIII1[2] ( .Q(lIII1[2]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_35[2]), .EN(un1_lIII110_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444431 SLE \iI1l1[0].lIII1[1] ( .Q(lIII1[1]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_35[1]), .EN(un1_lIII110_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444431 SLE \iI1l1[0].lIII1[0] ( .Q(lIII1[0]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_35[0]), .EN(un1_lIII110_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445918 SLE \iiIl1[12] ( .Q(iiIl1_Z[12]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[14]), .EN(l1ll1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445918 SLE \iiIl1[11] ( .Q(iiIl1_Z[11]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[13]), .EN(l1ll1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445918 SLE \iiIl1[10] ( .Q(iiIl1_Z[10]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[12]), .EN(l1ll1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445918 SLE \iiIl1[9] ( .Q(iiIl1_Z[9]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[11]), .EN(l1ll1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445918 SLE \iiIl1[8] ( .Q(iiIl1_Z[8]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[10]), .EN(l1ll1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445918 SLE \iiIl1[7] ( .Q(iiIl1_Z[7]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[9]), .EN(l1ll1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445918 SLE \iiIl1[6] ( .Q(iiIl1_Z[6]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[8]), .EN(l1ll1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445918 SLE \iiIl1[5] ( .Q(iiIl1_Z[5]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[7]), .EN(l1ll1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445918 SLE \iiIl1[4] ( .Q(iiIl1_Z[4]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[6]), .EN(l1ll1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:445918 SLE \iiIl1[3] ( .Q(iiIl1_Z[3]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Il1_Z[5]), .EN(l1ll1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444431 SLE \iI1l1[3].lIII1[31] ( .Q(lIII1[31]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_62[31]), .EN(un1_lIII110_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444431 SLE \iI1l1[3].lIII1[30] ( .Q(lIII1[30]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_62[30]), .EN(un1_lIII110_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444431 SLE \iI1l1[3].lIII1[29] ( .Q(lIII1[29]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_62[29]), .EN(un1_lIII110_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444431 SLE \iI1l1[3].lIII1[28] ( .Q(lIII1[28]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_62[28]), .EN(un1_lIII110_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444431 SLE \iI1l1[3].lIII1[27] ( .Q(lIII1[27]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_62[27]), .EN(un1_lIII110_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444431 SLE \iI1l1[3].lIII1[26] ( .Q(lIII1[26]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_62[26]), .EN(un1_lIII110_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444431 SLE \iI1l1[3].lIII1[25] ( .Q(lIII1[25]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_62[25]), .EN(un1_lIII110_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444431 SLE \iI1l1[3].lIII1[24] ( .Q(lIII1[24]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_62[24]), .EN(un1_lIII110_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444431 SLE \iI1l1[0].lIII1[7] ( .Q(lIII1[7]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_35[7]), .EN(un1_lIII110_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444431 SLE \iI1l1[0].lIII1[6] ( .Q(lIII1[6]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_35[6]), .EN(un1_lIII110_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:444431 SLE \iI1l1[0].lIII1[5] ( .Q(lIII1[5]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_35[5]), .EN(un1_lIII110_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \IIII1[1] ( .Q(Oo0i0[1]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(II1l1_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \IIII1[0] ( .Q(Oo0i0[0]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(II1l1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \oioI1[4] ( .Q(Io0i0[4]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \oioI1[3] ( .Q(Io0i0[3]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \oioI1[2] ( .Q(Io0i0[2]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \oioI1[1] ( .Q(Io0i0[1]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \oioI1[0] ( .Q(Io0i0[0]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \IIII1[11] ( .Q(Oo0i0[11]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(II1l1_Z[11]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \IIII1[10] ( .Q(Oo0i0[10]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(II1l1_Z[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \IIII1[9] ( .Q(Oo0i0[9]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(II1l1_Z[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \IIII1[8] ( .Q(Oo0i0[8]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(II1l1_Z[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \IIII1[7] ( .Q(Oo0i0[7]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(II1l1_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \IIII1[6] ( .Q(Oo0i0[6]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(II1l1_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \IIII1[5] ( .Q(Oo0i0[5]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(II1l1_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \IIII1[4] ( .Q(Oo0i0[4]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(II1l1_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \IIII1[3] ( .Q(Oo0i0[3]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(II1l1_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \IIII1[2] ( .Q(Oo0i0[2]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(II1l1_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \oioI1[19] ( .Q(Io0i0[19]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1[19]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \oioI1[18] ( .Q(Io0i0[18]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1[18]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \oioI1[17] ( .Q(Io0i0[17]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1[17]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \oioI1[16] ( .Q(Io0i0[16]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1[16]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \oioI1[15] ( .Q(Io0i0[15]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1[15]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \oioI1[14] ( .Q(Io0i0[14]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1[14]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \oioI1[13] ( .Q(Io0i0[13]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1[13]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \oioI1[12] ( .Q(Io0i0[12]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1[12]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \oioI1[11] ( .Q(Io0i0[11]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1[11]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \oioI1[10] ( .Q(Io0i0[10]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \oioI1[9] ( .Q(Io0i0[9]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \oioI1[8] ( .Q(Io0i0[8]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \oioI1[7] ( .Q(Io0i0[7]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \oioI1[6] ( .Q(Io0i0[6]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \oioI1[5] ( .Q(Io0i0[5]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \oioI1[34] ( .Q(Io0i0[34]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_Z[34]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \oioI1[33] ( .Q(Io0i0[33]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_Z[33]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \oioI1[32] ( .Q(Io0i0[32]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_Z[32]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \oioI1[31] ( .Q(Io0i0[31]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1[31]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \oioI1[30] ( .Q(Io0i0[30]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1[30]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \oioI1[29] ( .Q(Io0i0[29]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1[29]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \oioI1[28] ( .Q(Io0i0[28]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1[28]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \oioI1[27] ( .Q(Io0i0[27]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1[27]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \oioI1[26] ( .Q(Io0i0[26]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1[26]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \oioI1[25] ( .Q(Io0i0[25]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1[25]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \oioI1[24] ( .Q(Io0i0[24]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1[24]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \oioI1[23] ( .Q(Io0i0[23]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1[23]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \oioI1[22] ( .Q(Io0i0[22]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1[22]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \oioI1[21] ( .Q(Io0i0[21]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1[21]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \oioI1[20] ( .Q(Io0i0[20]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1[20]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:443527 SLE \oioI1[35] ( .Q(Io0i0[35]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIII1_Z[35]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:442937 ARI1 loIl1_RNIAEP7M ( .FCO(un1_OoIl1_3_cry_0_cy), .S(loIl1_RNIAEP7M_S), .Y(loIl1_RNIAEP7M_Y), .B(OOll1_Z), .C(OiIl1_Z), .D(un4_i1Il1), .A(loIl1_Z), .FCI(VCC) ); defparam loIl1_RNIAEP7M.INIT=20'h44000; // @28:442937 ARI1 \OoIl1_RNIFUTTT[2] ( .FCO(un1_OoIl1_3_cry_0), .S(un1_OoIl1_21[2]), .Y(OoIl1_RNIFUTTT_Y[2]), .B(I01I1[0]), .C(GND), .D(GND), .A(VCC), .FCI(un1_OoIl1_3_cry_0_cy) ); defparam \OoIl1_RNIFUTTT[2] .INIT=20'h4AA00; // @28:442937 ARI1 \OoIl1_RNILF2K51[3] ( .FCO(un1_OoIl1_3_cry_1), .S(un1_OoIl1_21[3]), .Y(OoIl1_RNILF2K51_Y[3]), .B(I01I1[1]), .C(GND), .D(GND), .A(VCC), .FCI(un1_OoIl1_3_cry_0) ); defparam \OoIl1_RNILF2K51[3] .INIT=20'h4AA00; // @28:442937 ARI1 \OoIl1_RNIS17AD1[4] ( .FCO(un1_OoIl1_3_cry_2), .S(un1_OoIl1_21[4]), .Y(OoIl1_RNIS17AD1_Y[4]), .B(I01I1[2]), .C(GND), .D(GND), .A(VCC), .FCI(un1_OoIl1_3_cry_1) ); defparam \OoIl1_RNIS17AD1[4] .INIT=20'h4AA00; // @28:442937 ARI1 \OoIl1_RNI4LB0L1[5] ( .FCO(un1_OoIl1_3_cry_3), .S(un1_OoIl1_21[5]), .Y(OoIl1_RNI4LB0L1_Y[5]), .B(I01I1[3]), .C(GND), .D(GND), .A(VCC), .FCI(un1_OoIl1_3_cry_2) ); defparam \OoIl1_RNI4LB0L1[5] .INIT=20'h4AA00; // @28:442937 ARI1 \OoIl1_RNID9GMS1[6] ( .FCO(un1_OoIl1_3_cry_4), .S(un1_OoIl1_21[6]), .Y(OoIl1_RNID9GMS1_Y[6]), .B(I01I1[4]), .C(GND), .D(GND), .A(VCC), .FCI(un1_OoIl1_3_cry_3) ); defparam \OoIl1_RNID9GMS1[6] .INIT=20'h4AA00; // @28:442937 ARI1 \OoIl1_RNINUKC42[7] ( .FCO(un1_OoIl1_3_cry_5), .S(un1_OoIl1_21[7]), .Y(OoIl1_RNINUKC42_Y[7]), .B(I01I1[5]), .C(GND), .D(GND), .A(VCC), .FCI(un1_OoIl1_3_cry_4) ); defparam \OoIl1_RNINUKC42[7] .INIT=20'h4AA00; // @28:442937 ARI1 \OoIl1_RNI2LP2C2[8] ( .FCO(un1_OoIl1_3_cry_6), .S(un1_OoIl1_21[8]), .Y(OoIl1_RNI2LP2C2_Y[8]), .B(I01I1[6]), .C(GND), .D(GND), .A(VCC), .FCI(un1_OoIl1_3_cry_5) ); defparam \OoIl1_RNI2LP2C2[8] .INIT=20'h4AA00; // @28:442937 ARI1 \OoIl1_RNIECUOJ2[9] ( .FCO(un1_OoIl1_3_cry_7), .S(un1_OoIl1_21[9]), .Y(OoIl1_RNIECUOJ2_Y[9]), .B(I01I1[7]), .C(GND), .D(GND), .A(VCC), .FCI(un1_OoIl1_3_cry_6) ); defparam \OoIl1_RNIECUOJ2[9] .INIT=20'h4AA00; // @28:442937 ARI1 \OoIl1_RNI2KGJP2[10] ( .FCO(un1_OoIl1_3_cry_8), .S(un1_OoIl1_21[10]), .Y(OoIl1_RNI2KGJP2_Y[10]), .B(I01I1[8]), .C(GND), .D(GND), .A(VCC), .FCI(un1_OoIl1_3_cry_7) ); defparam \OoIl1_RNI2KGJP2[10] .INIT=20'h4AA00; // @28:442937 ARI1 \OoIl1_RNINS2EV2[11] ( .FCO(un1_OoIl1_3_cry_9), .S(un1_OoIl1_21[11]), .Y(OoIl1_RNINS2EV2_Y[11]), .B(I01I1[9]), .C(GND), .D(GND), .A(VCC), .FCI(un1_OoIl1_3_cry_8) ); defparam \OoIl1_RNINS2EV2[11] .INIT=20'h4AA00; // @28:442937 ARI1 \OoIl1_RNID6L853[12] ( .FCO(un1_OoIl1_3_cry_10), .S(un1_OoIl1_21[12]), .Y(OoIl1_RNID6L853_Y[12]), .B(I01I1[10]), .C(GND), .D(GND), .A(VCC), .FCI(un1_OoIl1_3_cry_9) ); defparam \OoIl1_RNID6L853[12] .INIT=20'h4AA00; // @28:442937 ARI1 \i1Il1_RNO_0[14] ( .FCO(i1Il1_RNO_0_FCO[14]), .S(un1_OoIl1_21[14]), .Y(i1Il1_RNO_0_Y[14]), .B(I01I1[12]), .C(GND), .D(GND), .A(VCC), .FCI(un1_OoIl1_3_cry_11) ); defparam \i1Il1_RNO_0[14] .INIT=20'h4AA00; // @28:442937 ARI1 \OoIl1_RNI4H73B3[13] ( .FCO(un1_OoIl1_3_cry_11), .S(un1_OoIl1_21[13]), .Y(OoIl1_RNI4H73B3_Y[13]), .B(I01I1[11]), .C(GND), .D(GND), .A(VCC), .FCI(un1_OoIl1_3_cry_10) ); defparam \OoIl1_RNI4H73B3[13] .INIT=20'h4AA00; // @28:445147 ARI1 \OoIl1_RNINAN5K1[0] ( .FCO(un1_OoIl1_cry_0), .S(OoIl1_RNINAN5K1_S[0]), .Y(OoIl1_RNINAN5K1_Y[0]), .B(OoIl1_Z[0]), .C(loIl1_RNIAEP7M_Y), .D(GND), .A(un10_i1Il1_i), .FCI(GND) ); defparam \OoIl1_RNINAN5K1[0] .INIT=20'h59933; // @28:445147 ARI1 \OoIl1_RNI58L3I2[1] ( .FCO(un1_OoIl1_cry_1), .S(un1_OoIl1_20[1]), .Y(OoIl1_RNI58L3I2_Y[1]), .B(OoIl1_Z[1]), .C(GND), .D(GND), .A(un10_i1Il1_i), .FCI(un1_OoIl1_cry_0) ); defparam \OoIl1_RNI58L3I2[1] .INIT=20'h5AA00; // @28:445147 ARI1 \OoIl1_RNIK6J1G3[2] ( .FCO(un1_OoIl1_cry_2), .S(un1_OoIl1_20[2]), .Y(OoIl1_RNIK6J1G3_Y[2]), .B(I01I1[0]), .C(GND), .D(GND), .A(loIl1_RNIAEP7M_Y), .FCI(un1_OoIl1_cry_1) ); defparam \OoIl1_RNIK6J1G3[2] .INIT=20'h555AA; // @28:445147 ARI1 \OoIl1_RNIQNNNN3[3] ( .FCO(un1_OoIl1_cry_3), .S(un1_OoIl1_20[3]), .Y(OoIl1_RNIQNNNN3_Y[3]), .B(I01I1[1]), .C(GND), .D(GND), .A(VCC), .FCI(un1_OoIl1_cry_2) ); defparam \OoIl1_RNIQNNNN3[3] .INIT=20'h4AA00; // @28:445147 ARI1 \OoIl1_RNI1ASDV3[4] ( .FCO(un1_OoIl1_cry_4), .S(un1_OoIl1_20[4]), .Y(OoIl1_RNI1ASDV3_Y[4]), .B(I01I1[2]), .C(GND), .D(GND), .A(VCC), .FCI(un1_OoIl1_cry_3) ); defparam \OoIl1_RNI1ASDV3[4] .INIT=20'h4AA00; // @28:445147 ARI1 \OoIl1_RNI9T0474[5] ( .FCO(un1_OoIl1_cry_5), .S(un1_OoIl1_20[5]), .Y(OoIl1_RNI9T0474_Y[5]), .B(I01I1[3]), .C(GND), .D(GND), .A(VCC), .FCI(un1_OoIl1_cry_4) ); defparam \OoIl1_RNI9T0474[5] .INIT=20'h4AA00; // @28:445147 ARI1 \OoIl1_RNIIH5QE4[6] ( .FCO(un1_OoIl1_cry_6), .S(un1_OoIl1_20[6]), .Y(OoIl1_RNIIH5QE4_Y[6]), .B(I01I1[4]), .C(GND), .D(GND), .A(VCC), .FCI(un1_OoIl1_cry_5) ); defparam \OoIl1_RNIIH5QE4[6] .INIT=20'h4AA00; // @28:445147 ARI1 \OoIl1_RNIS6AGM4[7] ( .FCO(un1_OoIl1_cry_7), .S(un1_OoIl1_20[7]), .Y(OoIl1_RNIS6AGM4_Y[7]), .B(I01I1[5]), .C(GND), .D(GND), .A(VCC), .FCI(un1_OoIl1_cry_6) ); defparam \OoIl1_RNIS6AGM4[7] .INIT=20'h4AA00; // @28:445147 ARI1 \OoIl1_RNI7TE6U4[8] ( .FCO(un1_OoIl1_cry_8), .S(un1_OoIl1_20[8]), .Y(OoIl1_RNI7TE6U4_Y[8]), .B(I01I1[6]), .C(GND), .D(GND), .A(VCC), .FCI(un1_OoIl1_cry_7) ); defparam \OoIl1_RNI7TE6U4[8] .INIT=20'h4AA00; // @28:445147 ARI1 \OoIl1_RNIJKJS55[9] ( .FCO(un1_OoIl1_cry_9), .S(un1_OoIl1_20[9]), .Y(OoIl1_RNIJKJS55_Y[9]), .B(I01I1[7]), .C(GND), .D(GND), .A(VCC), .FCI(un1_OoIl1_cry_8) ); defparam \OoIl1_RNIJKJS55[9] .INIT=20'h4AA00; // @28:445147 ARI1 \OoIl1_RNI7S5NB5[10] ( .FCO(un1_OoIl1_cry_10), .S(un1_OoIl1_20[10]), .Y(OoIl1_RNI7S5NB5_Y[10]), .B(I01I1[8]), .C(GND), .D(GND), .A(VCC), .FCI(un1_OoIl1_cry_9) ); defparam \OoIl1_RNI7S5NB5[10] .INIT=20'h4AA00; // @28:445147 ARI1 \OoIl1_RNIS4OHH5[11] ( .FCO(un1_OoIl1_cry_11), .S(un1_OoIl1_20[11]), .Y(OoIl1_RNIS4OHH5_Y[11]), .B(I01I1[9]), .C(GND), .D(GND), .A(VCC), .FCI(un1_OoIl1_cry_10) ); defparam \OoIl1_RNIS4OHH5[11] .INIT=20'h4AA00; // @28:445147 ARI1 \OoIl1_RNIIEACN5[12] ( .FCO(un1_OoIl1_cry_12), .S(un1_OoIl1_20[12]), .Y(OoIl1_RNIIEACN5_Y[12]), .B(I01I1[10]), .C(GND), .D(GND), .A(VCC), .FCI(un1_OoIl1_cry_11) ); defparam \OoIl1_RNIIEACN5[12] .INIT=20'h4AA00; // @28:445147 ARI1 \i1Il1_RNO_1[14] ( .FCO(i1Il1_RNO_1_FCO[14]), .S(un1_OoIl1_20[14]), .Y(i1Il1_RNO_1_Y[14]), .B(I01I1[12]), .C(GND), .D(GND), .A(VCC), .FCI(un1_OoIl1_cry_13) ); defparam \i1Il1_RNO_1[14] .INIT=20'h4AA00; // @28:445147 ARI1 \OoIl1_RNI9PS6T5[13] ( .FCO(un1_OoIl1_cry_13), .S(un1_OoIl1_20[13]), .Y(OoIl1_RNI9PS6T5_Y[13]), .B(I01I1[11]), .C(GND), .D(GND), .A(VCC), .FCI(un1_OoIl1_cry_12) ); defparam \OoIl1_RNI9PS6T5[13] .INIT=20'h4AA00; // @28:445880 ARI1 un8_l1ll1_cry_0 ( .FCO(un8_l1ll1_cry_0_Z), .S(un8_l1ll1_cry_0_S), .Y(un8_l1ll1_cry_0_Y), .B(l0ll1_Z[2]), .C(GND), .D(GND), .A(Io1I1_1z[0]), .FCI(GND) ); defparam un8_l1ll1_cry_0.INIT=20'h5AA55; // @28:445880 ARI1 un8_l1ll1_cry_1 ( .FCO(un8_l1ll1_cry_1_Z), .S(un8_l1ll1_cry_1_S), .Y(un8_l1ll1_cry_1_Y), .B(l0ll1_Z[3]), .C(GND), .D(GND), .A(Io1I1_1z[1]), .FCI(un8_l1ll1_cry_0_Z) ); defparam un8_l1ll1_cry_1.INIT=20'h5AA55; // @28:445880 ARI1 un8_l1ll1_cry_2 ( .FCO(un8_l1ll1_cry_2_Z), .S(un8_l1ll1_cry_2_S), .Y(un8_l1ll1_cry_2_Y), .B(l0ll1_Z[4]), .C(GND), .D(GND), .A(Io1I1_1z[2]), .FCI(un8_l1ll1_cry_1_Z) ); defparam un8_l1ll1_cry_2.INIT=20'h5AA55; // @28:445880 ARI1 un8_l1ll1_cry_3 ( .FCO(un8_l1ll1_cry_3_Z), .S(un8_l1ll1_cry_3_S), .Y(un8_l1ll1_cry_3_Y), .B(l0ll1_Z[5]), .C(GND), .D(GND), .A(Io1I1_1z[3]), .FCI(un8_l1ll1_cry_2_Z) ); defparam un8_l1ll1_cry_3.INIT=20'h5AA55; // @28:445880 ARI1 un8_l1ll1_cry_4 ( .FCO(un8_l1ll1_cry_4_Z), .S(un8_l1ll1_cry_4_S), .Y(un8_l1ll1_cry_4_Y), .B(l0ll1_Z[6]), .C(GND), .D(GND), .A(Io1I1_1z[4]), .FCI(un8_l1ll1_cry_3_Z) ); defparam un8_l1ll1_cry_4.INIT=20'h5AA55; // @28:445880 ARI1 un8_l1ll1_cry_5 ( .FCO(un8_l1ll1_cry_5_Z), .S(un8_l1ll1_cry_5_S), .Y(un8_l1ll1_cry_5_Y), .B(l0ll1_Z[7]), .C(GND), .D(GND), .A(Io1I1_1z[5]), .FCI(un8_l1ll1_cry_4_Z) ); defparam un8_l1ll1_cry_5.INIT=20'h5AA55; // @28:445880 ARI1 un8_l1ll1_cry_6 ( .FCO(un8_l1ll1_cry_6_Z), .S(un8_l1ll1_cry_6_S), .Y(un8_l1ll1_cry_6_Y), .B(l0ll1_Z[8]), .C(GND), .D(GND), .A(Io1I1_1z[6]), .FCI(un8_l1ll1_cry_5_Z) ); defparam un8_l1ll1_cry_6.INIT=20'h5AA55; // @28:445880 ARI1 un8_l1ll1_cry_7 ( .FCO(un8_l1ll1_cry_7_Z), .S(un8_l1ll1_cry_7_S), .Y(un8_l1ll1_cry_7_Y), .B(l0ll1_Z[9]), .C(GND), .D(GND), .A(Io1I1_1z[7]), .FCI(un8_l1ll1_cry_6_Z) ); defparam un8_l1ll1_cry_7.INIT=20'h5AA55; // @28:445880 ARI1 un8_l1ll1_cry_8 ( .FCO(un8_l1ll1_cry_8_Z), .S(un8_l1ll1_cry_8_S), .Y(un8_l1ll1_cry_8_Y), .B(l0ll1_Z[10]), .C(GND), .D(GND), .A(Io1I1_1z[8]), .FCI(un8_l1ll1_cry_7_Z) ); defparam un8_l1ll1_cry_8.INIT=20'h5AA55; // @28:445880 ARI1 un8_l1ll1_cry_9 ( .FCO(un8_l1ll1_cry_9_Z), .S(un8_l1ll1_cry_9_S), .Y(un8_l1ll1_cry_9_Y), .B(l0ll1_Z[11]), .C(GND), .D(GND), .A(Io1I1_1z[9]), .FCI(un8_l1ll1_cry_8_Z) ); defparam un8_l1ll1_cry_9.INIT=20'h5AA55; // @28:445880 ARI1 un8_l1ll1_cry_10 ( .FCO(un8_l1ll1_cry_10_Z), .S(un8_l1ll1_cry_10_S), .Y(un8_l1ll1_cry_10_Y), .B(l0ll1_Z[12]), .C(GND), .D(GND), .A(Io1I1_1z[10]), .FCI(un8_l1ll1_cry_9_Z) ); defparam un8_l1ll1_cry_10.INIT=20'h5AA55; // @28:445880 ARI1 un8_l1ll1_cry_11 ( .FCO(un8_l1ll1_cry_11_Z), .S(un8_l1ll1_cry_11_S), .Y(un8_l1ll1_cry_11_Y), .B(l0ll1_Z[13]), .C(GND), .D(GND), .A(Io1I1_1z[11]), .FCI(un8_l1ll1_cry_10_Z) ); defparam un8_l1ll1_cry_11.INIT=20'h5AA55; // @28:452420 ARI1 OOll1_RNO_4 ( .FCO(un3_OOll1_0_data_tmp[0]), .S(OOll1_RNO_4_S), .Y(OOll1_RNO_4_Y), .B(iOll1_Z[0]), .C(iOll1_Z[1]), .D(I01I1[0]), .A(I01I1[1]), .FCI(GND) ); defparam OOll1_RNO_4.INIT=20'h68421; // @28:452420 ARI1 OOll1_RNO_3 ( .FCO(un3_OOll1_0_data_tmp[1]), .S(OOll1_RNO_3_S), .Y(OOll1_RNO_3_Y), .B(iOll1_Z[2]), .C(iOll1_Z[3]), .D(I01I1[2]), .A(I01I1[3]), .FCI(un3_OOll1_0_data_tmp[0]) ); defparam OOll1_RNO_3.INIT=20'h68421; // @28:452420 ARI1 OOll1_RNO_2 ( .FCO(un3_OOll1_0_data_tmp[2]), .S(OOll1_RNO_2_S), .Y(OOll1_RNO_2_Y), .B(iOll1_Z[4]), .C(iOll1_Z[5]), .D(I01I1[4]), .A(I01I1[5]), .FCI(un3_OOll1_0_data_tmp[1]) ); defparam OOll1_RNO_2.INIT=20'h68421; // @28:452420 ARI1 OOll1_RNO_1 ( .FCO(un3_OOll1_0_data_tmp[3]), .S(OOll1_RNO_1_S), .Y(OOll1_RNO_1_Y), .B(iOll1_Z[6]), .C(iOll1_Z[7]), .D(I01I1[6]), .A(I01I1[7]), .FCI(un3_OOll1_0_data_tmp[2]) ); defparam OOll1_RNO_1.INIT=20'h68421; // @28:452420 ARI1 OOll1_RNO_0 ( .FCO(un3_OOll1_0_data_tmp[4]), .S(OOll1_RNO_0_S), .Y(OOll1_RNO_0_Y), .B(iOll1_Z[8]), .C(iOll1_Z[9]), .D(I01I1[8]), .A(I01I1[9]), .FCI(un3_OOll1_0_data_tmp[3]) ); defparam OOll1_RNO_0.INIT=20'h68421; // @28:452420 ARI1 OOll1_RNO ( .FCO(un3_OOll1_0_data_tmp[5]), .S(OOll1_RNO_S), .Y(OOll1_RNO_Y), .B(iOll1_Z[10]), .C(iOll1_Z[11]), .D(I01I1[10]), .A(I01I1[11]), .FCI(un3_OOll1_0_data_tmp[4]) ); defparam OOll1_RNO.INIT=20'h68421; // @28:445799 ARI1 l0ll1_s_4129 ( .FCO(l0ll1_s_4129_FCO), .S(l0ll1_s_4129_S), .Y(l0ll1_s_4129_Y), .B(I0ll1_Z), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam l0ll1_s_4129.INIT=20'h4AA00; // @28:445799 ARI1 \l0ll1_cry[0] ( .FCO(l0ll1_cry_Z[0]), .S(l0ll1_s[0]), .Y(l0ll1_cry_Y[0]), .B(I0ll1_Z), .C(l0ll1_Z[0]), .D(GND), .A(VCC), .FCI(l0ll1_s_4129_FCO) ); defparam \l0ll1_cry[0] .INIT=20'h48800; // @28:445799 ARI1 \l0ll1_cry[1] ( .FCO(l0ll1_cry_Z[1]), .S(l0ll1_s[1]), .Y(l0ll1_cry_Y[1]), .B(I0ll1_Z), .C(l0ll1_Z[1]), .D(GND), .A(VCC), .FCI(l0ll1_cry_Z[0]) ); defparam \l0ll1_cry[1] .INIT=20'h48800; // @28:445799 ARI1 \l0ll1_cry[2] ( .FCO(l0ll1_cry_Z[2]), .S(l0ll1_s[2]), .Y(l0ll1_cry_Y[2]), .B(I0ll1_Z), .C(l0ll1_Z[2]), .D(GND), .A(VCC), .FCI(l0ll1_cry_Z[1]) ); defparam \l0ll1_cry[2] .INIT=20'h48800; // @28:445799 ARI1 \l0ll1_cry[3] ( .FCO(l0ll1_cry_Z[3]), .S(l0ll1_s[3]), .Y(l0ll1_cry_Y[3]), .B(I0ll1_Z), .C(l0ll1_Z[3]), .D(GND), .A(VCC), .FCI(l0ll1_cry_Z[2]) ); defparam \l0ll1_cry[3] .INIT=20'h48800; // @28:445799 ARI1 \l0ll1_cry[4] ( .FCO(l0ll1_cry_Z[4]), .S(l0ll1_s[4]), .Y(l0ll1_cry_Y[4]), .B(I0ll1_Z), .C(l0ll1_Z[4]), .D(GND), .A(VCC), .FCI(l0ll1_cry_Z[3]) ); defparam \l0ll1_cry[4] .INIT=20'h48800; // @28:445799 ARI1 \l0ll1_cry[5] ( .FCO(l0ll1_cry_Z[5]), .S(l0ll1_s[5]), .Y(l0ll1_cry_Y[5]), .B(I0ll1_Z), .C(l0ll1_Z[5]), .D(GND), .A(VCC), .FCI(l0ll1_cry_Z[4]) ); defparam \l0ll1_cry[5] .INIT=20'h48800; // @28:445799 ARI1 \l0ll1_cry[6] ( .FCO(l0ll1_cry_Z[6]), .S(l0ll1_s[6]), .Y(l0ll1_cry_Y[6]), .B(I0ll1_Z), .C(l0ll1_Z[6]), .D(GND), .A(VCC), .FCI(l0ll1_cry_Z[5]) ); defparam \l0ll1_cry[6] .INIT=20'h48800; // @28:445799 ARI1 \l0ll1_cry[7] ( .FCO(l0ll1_cry_Z[7]), .S(l0ll1_s[7]), .Y(l0ll1_cry_Y[7]), .B(I0ll1_Z), .C(l0ll1_Z[7]), .D(GND), .A(VCC), .FCI(l0ll1_cry_Z[6]) ); defparam \l0ll1_cry[7] .INIT=20'h48800; // @28:445799 ARI1 \l0ll1_cry[8] ( .FCO(l0ll1_cry_Z[8]), .S(l0ll1_s[8]), .Y(l0ll1_cry_Y[8]), .B(I0ll1_Z), .C(l0ll1_Z[8]), .D(GND), .A(VCC), .FCI(l0ll1_cry_Z[7]) ); defparam \l0ll1_cry[8] .INIT=20'h48800; // @28:445799 ARI1 \l0ll1_cry[9] ( .FCO(l0ll1_cry_Z[9]), .S(l0ll1_s[9]), .Y(l0ll1_cry_Y[9]), .B(I0ll1_Z), .C(l0ll1_Z[9]), .D(GND), .A(VCC), .FCI(l0ll1_cry_Z[8]) ); defparam \l0ll1_cry[9] .INIT=20'h48800; // @28:445799 ARI1 \l0ll1_cry[10] ( .FCO(l0ll1_cry_Z[10]), .S(l0ll1_s[10]), .Y(l0ll1_cry_Y[10]), .B(I0ll1_Z), .C(l0ll1_Z[10]), .D(GND), .A(VCC), .FCI(l0ll1_cry_Z[9]) ); defparam \l0ll1_cry[10] .INIT=20'h48800; // @28:445799 ARI1 \l0ll1_cry[11] ( .FCO(l0ll1_cry_Z[11]), .S(l0ll1_s[11]), .Y(l0ll1_cry_Y[11]), .B(I0ll1_Z), .C(l0ll1_Z[11]), .D(GND), .A(VCC), .FCI(l0ll1_cry_Z[10]) ); defparam \l0ll1_cry[11] .INIT=20'h48800; // @28:445799 ARI1 \l0ll1_s[13] ( .FCO(l0ll1_s_FCO[13]), .S(l0ll1_s_Z[13]), .Y(l0ll1_s_Y[13]), .B(I0ll1_Z), .C(l0ll1_Z[13]), .D(GND), .A(VCC), .FCI(l0ll1_cry_Z[12]) ); defparam \l0ll1_s[13] .INIT=20'h48800; // @28:445799 ARI1 \l0ll1_cry[12] ( .FCO(l0ll1_cry_Z[12]), .S(l0ll1_s[12]), .Y(l0ll1_cry_Y[12]), .B(I0ll1_Z), .C(l0ll1_Z[12]), .D(GND), .A(VCC), .FCI(l0ll1_cry_Z[11]) ); defparam \l0ll1_cry[12] .INIT=20'h48800; // @28:445147 CFG4 \i1Il1[1] ( .A(un1_i1Il1_Z), .B(i1Il1_m0s2_Z), .C(un1_OoIl1_20[1]), .D(i1Il1_1_0_Z[1]), .Y(i1Il1_Z[1]) ); defparam \i1Il1[1] .INIT=16'hDC32; // @28:445147 CFG4 \i1Il1_1_0[1] ( .A(IoIl1[1]), .B(i1Il1), .C(i1Il1_m0s2_Z), .D(un1_OoIl1_1_0[1]), .Y(i1Il1_1_0_Z[1]) ); defparam \i1Il1_1_0[1] .INIT=16'h202F; // @28:445861 CFG4 l1ll1 ( .A(l1ll1_0_Z), .B(un8_l1ll1_cry_11_Z), .C(l1ll1_1_Z), .D(i1Il1_Z[1]), .Y(l1ll1_Z) ); defparam l1ll1.INIT=16'hABAA; // @28:445861 CFG2 l1ll1_1 ( .A(i1Il1_Z[0]), .B(un5_l1ll1_0_Z), .Y(l1ll1_1_Z) ); defparam l1ll1_1.INIT=4'h7; // @28:443361 CFG3 lO1l1_u ( .A(OioI1), .B(lO1l1_u_1_0), .C(ooIl1_Z), .Y(lO1l1) ); defparam lO1l1_u.INIT=8'h70; // @28:443361 CFG3 lO1l1_u_1_1 ( .A(lI0l1), .B(IioI1_0), .C(lo0l1), .Y(lO1l1_u_1_0) ); defparam lO1l1_u_1_1.INIT=8'h47; // @28:445147 CFG4 \i1Il1[0] ( .A(IoIl1[0]), .B(i1Il1), .C(i1Il1_m0s2_Z), .D(i1Il1_1_Z[0]), .Y(i1Il1_Z[0]) ); defparam \i1Il1[0] .INIT=16'hFF20; // @28:445845 CFG2 un1_l0ll1_3 ( .A(l0ll1_Z[4]), .B(l0ll1_Z[5]), .Y(un1_l0ll1_3_Z) ); defparam un1_l0ll1_3.INIT=4'h8; // @28:445147 CFG2 \i1Il1_1_RNO[0] ( .A(un10_i1Il1_i), .B(OoIl1_Z[0]), .Y(un1_OoIl1_1_0[0]) ); defparam \i1Il1_1_RNO[0] .INIT=4'h8; // @28:445147 CFG2 \i1Il1_1_0_RNO[1] ( .A(un10_i1Il1_i), .B(OoIl1_Z[1]), .Y(un1_OoIl1_1_0[1]) ); defparam \i1Il1_1_0_RNO[1] .INIT=4'h8; // @28:446272 CFG2 oI1I18 ( .A(iliO1), .B(llll1_Z), .Y(oI1I18_Z) ); defparam oI1I18.INIT=4'h8; // @28:445437 CFG2 \genblk3.IoIl15 ( .A(iliO1), .B(oiIl1_Z), .Y(IoIl15) ); defparam \genblk3.IoIl15 .INIT=4'h2; // @28:446041 CFG2 oi0I15 ( .A(IIll1_Z), .B(ii0I1_1z), .Y(oi0I15_Z) ); defparam oi0I15.INIT=4'h1; // @28:445348 CFG2 iOll15 ( .A(Olll1_Z), .B(OO1I1_2z), .Y(iOll15_Z) ); defparam iOll15.INIT=4'h2; // @28:446134 CFG2 IO1I15 ( .A(oIll1_Z), .B(oO1I1_1z), .Y(IO1I15_Z) ); defparam IO1I15.INIT=4'h1; // @28:445845 CFG4 un1_l0ll1_9 ( .A(l0ll1_Z[13]), .B(l0ll1_Z[12]), .C(l0ll1_Z[7]), .D(l0ll1_Z[6]), .Y(un1_l0ll1_9_Z) ); defparam un1_l0ll1_9.INIT=16'h8000; // @28:445845 CFG4 un1_l0ll1_7 ( .A(l0ll1_Z[1]), .B(l0ll1_Z[0]), .C(l0ll1_Z[11]), .D(l0ll1_Z[10]), .Y(un1_l0ll1_7_Z) ); defparam un1_l0ll1_7.INIT=16'h8000; // @28:445768 CFG4 un9_o1ll1_7 ( .A(o0iO1[11]), .B(o0iO1[10]), .C(o0iO1[9]), .D(o0iO1[7]), .Y(un9_o1ll1_7_Z) ); defparam un9_o1ll1_7.INIT=16'h0001; // @28:445768 CFG4 un9_o1ll1_6 ( .A(o0iO1[15]), .B(o0iO1[14]), .C(o0iO1[12]), .D(o0iO1[8]), .Y(un9_o1ll1_6_Z) ); defparam un9_o1ll1_6.INIT=16'h0001; // @28:445768 CFG3 un9_o1ll1_5 ( .A(o0iO1[6]), .B(io1I1), .C(o0iO1[13]), .Y(un9_o1ll1_5_Z) ); defparam un9_o1ll1_5.INIT=8'h04; // @28:445899 CFG4 un10_l1ll1_8 ( .A(Io1I1_1z[3]), .B(Io1I1_1z[2]), .C(Io1I1_1z[1]), .D(Io1I1_1z[0]), .Y(un10_l1ll1_8_Z) ); defparam un10_l1ll1_8.INIT=16'h8000; // @28:445899 CFG4 un10_l1ll1_7 ( .A(Io1I1_1z[7]), .B(Io1I1_1z[6]), .C(Io1I1_1z[5]), .D(Io1I1_1z[4]), .Y(un10_l1ll1_7_Z) ); defparam un10_l1ll1_7.INIT=16'h8000; // @28:445899 CFG4 un10_l1ll1_6 ( .A(Io1I1_1z[11]), .B(Io1I1_1z[10]), .C(Io1I1_1z[9]), .D(Io1I1_1z[8]), .Y(un10_l1ll1_6_Z) ); defparam un10_l1ll1_6.INIT=16'h8000; // @28:445572 CFG4 un1_Oill1 ( .A(o1iO1), .B(l0iO1), .C(i1iO1_1z), .D(I1iO1), .Y(un1_Oill1_Z) ); defparam un1_Oill1.INIT=16'h0004; // @28:446272 CFG2 un1_oI1I18 ( .A(oI1I18_Z), .B(O0iO1_1z), .Y(un1_oI1I18_Z) ); defparam un1_oI1I18.INIT=4'hE; // @28:445617 CFG4 I1ll1 ( .A(O1ll1_Z), .B(l0iO1), .C(i0ll1_Z), .D(o0ll1_Z), .Y(I1ll1_Z) ); defparam I1ll1.INIT=16'hA0EC; // @28:444271 CFG3 \lIII1_16_iv[34] ( .A(un1_liOI1_4_i), .B(oloI1[34]), .C(lIII110_Z), .Y(lIII1_16[34]) ); defparam \lIII1_16_iv[34] .INIT=8'hC5; // @28:444121 CFG3 lIII110 ( .A(IloI1[13]), .B(Ooll1_Z), .C(Ioll1_Z), .Y(lIII110_Z) ); defparam lIII110.INIT=8'h04; // @28:444899 CFG3 OOll1 ( .A(un3_OOll1_0_data_tmp[5]), .B(iOll1_Z[12]), .C(I01I1[12]), .Y(OOll1_Z) ); defparam OOll1.INIT=8'h14; // @28:443472 CFG3 un1_IloI1_1 ( .A(O01I1_1z), .B(Ioll1_Z), .C(IloI1[13]), .Y(un1_IloI1_1_Z) ); defparam un1_IloI1_1.INIT=8'h04; // @28:445748 CFG3 \un3_o1ll1[13] ( .A(lo1I1[13]), .B(o0iO1[29]), .C(oo1I1[13]), .Y(un3_o1ll1_Z[13]) ); defparam \un3_o1ll1[13] .INIT=8'h09; // @28:445748 CFG3 \un3_o1ll1[6] ( .A(lo1I1[6]), .B(o0iO1[22]), .C(oo1I1[6]), .Y(un3_o1ll1_Z[6]) ); defparam \un3_o1ll1[6] .INIT=8'h09; // @28:445748 CFG3 \un3_o1ll1[11] ( .A(lo1I1[11]), .B(o0iO1[27]), .C(oo1I1[11]), .Y(un3_o1ll1_Z[11]) ); defparam \un3_o1ll1[11] .INIT=8'h09; // @28:445748 CFG3 \un3_o1ll1[10] ( .A(lo1I1[10]), .B(o0iO1[26]), .C(oo1I1[10]), .Y(un3_o1ll1_Z[10]) ); defparam \un3_o1ll1[10] .INIT=8'h09; // @28:445748 CFG3 \un3_o1ll1[3] ( .A(lo1I1[3]), .B(o0iO1[19]), .C(oo1I1[3]), .Y(un3_o1ll1_Z[3]) ); defparam \un3_o1ll1[3] .INIT=8'h09; // @28:445748 CFG3 \un3_o1ll1[1] ( .A(lo1I1[1]), .B(o0iO1[17]), .C(oo1I1[1]), .Y(un3_o1ll1_Z[1]) ); defparam \un3_o1ll1[1] .INIT=8'h09; // @28:445748 CFG3 \un3_o1ll1[0] ( .A(lo1I1[0]), .B(o0iO1[16]), .C(oo1I1[0]), .Y(un3_o1ll1_Z[0]) ); defparam \un3_o1ll1[0] .INIT=8'h09; // @28:442937 CFG4 un1_i1Il1_RNO_0 ( .A(IioI1_0), .B(OioI1), .C(lo0l1), .D(lI0l1), .Y(un1_i1Il1_RNO_0_Z) ); defparam un1_i1Il1_RNO_0.INIT=16'h048C; // @28:445147 CFG4 \genblk1.i1Il1 ( .A(O01I1_1z), .B(IloI1[13]), .C(Ioll1_Z), .D(Ooll1_Z), .Y(i1Il1) ); defparam \genblk1.i1Il1 .INIT=16'h4C40; // @28:443341 CFG4 \IO1l1_2[5] ( .A(IioI1_0), .B(OioI1), .C(o10l1[5]), .D(oO0l1[5]), .Y(IO1l1_2_Z[5]) ); defparam \IO1l1_2[5] .INIT=16'hC840; // @28:443341 CFG4 \IO1l1_2[6] ( .A(IioI1_0), .B(OioI1), .C(o10l1[6]), .D(oO0l1[6]), .Y(IO1l1_2_Z[6]) ); defparam \IO1l1_2[6] .INIT=16'hC840; // @28:443341 CFG4 \IO1l1_2[4] ( .A(IioI1_0), .B(OioI1), .C(o10l1[4]), .D(oO0l1[4]), .Y(IO1l1_2_Z[4]) ); defparam \IO1l1_2[4] .INIT=16'hC840; // @28:443341 CFG4 \IO1l1_2[3] ( .A(IioI1_0), .B(OioI1), .C(o10l1[3]), .D(oO0l1[3]), .Y(IO1l1_2_Z[3]) ); defparam \IO1l1_2[3] .INIT=16'hC840; // @28:443341 CFG4 \IO1l1_2[2] ( .A(IioI1_0), .B(OioI1), .C(o10l1[2]), .D(oO0l1[2]), .Y(IO1l1_2_Z[2]) ); defparam \IO1l1_2[2] .INIT=16'hC840; // @28:443341 CFG4 \IO1l1_2[7] ( .A(IioI1_0), .B(OioI1), .C(o10l1[7]), .D(oO0l1[7]), .Y(IO1l1_2_Z[7]) ); defparam \IO1l1_2[7] .INIT=16'hC840; // @28:443389 CFG4 oO1l1_u_2_0 ( .A(Il0l1), .B(Ii0l1), .C(OioI1), .D(IioI1_0), .Y(oO1l1_2) ); defparam oO1l1_u_2_0.INIT=16'hA0C0; // @28:443341 CFG4 \IO1l1_2[1] ( .A(IioI1_0), .B(OioI1), .C(o10l1[1]), .D(oO0l1[1]), .Y(IO1l1_2_Z[1]) ); defparam \IO1l1_2[1] .INIT=16'hC840; // @28:443341 CFG4 \IO1l1_2[0] ( .A(IioI1_0), .B(OioI1), .C(o10l1[0]), .D(oO0l1[0]), .Y(IO1l1_2_Z[0]) ); defparam \IO1l1_2[0] .INIT=16'hC840; // @28:445748 CFG4 un1_o1ll1_7 ( .A(o0iO1[21]), .B(un3_o1ll1_Z[10]), .C(oo1I1[5]), .D(lo1I1[5]), .Y(un1_o1ll1_7_Z) ); defparam un1_o1ll1_7.INIT=16'hCECD; // @28:445748 CFG4 un1_o1ll1_6 ( .A(o0iO1[18]), .B(un3_o1ll1_Z[13]), .C(oo1I1[2]), .D(lo1I1[2]), .Y(un1_o1ll1_6_Z) ); defparam un1_o1ll1_6.INIT=16'hCECD; // @28:445748 CFG4 un1_o1ll1_5 ( .A(o0iO1[28]), .B(un3_o1ll1_Z[3]), .C(oo1I1[12]), .D(lo1I1[12]), .Y(un1_o1ll1_5_Z) ); defparam un1_o1ll1_5.INIT=16'hCECD; // @28:445748 CFG4 un1_o1ll1_4 ( .A(o0iO1[25]), .B(un3_o1ll1_Z[11]), .C(oo1I1[9]), .D(lo1I1[9]), .Y(un1_o1ll1_4_Z) ); defparam un1_o1ll1_4.INIT=16'hCECD; // @28:445748 CFG4 un1_o1ll1_3 ( .A(o0iO1[24]), .B(un3_o1ll1_Z[6]), .C(oo1I1[8]), .D(lo1I1[8]), .Y(un1_o1ll1_3_Z) ); defparam un1_o1ll1_3.INIT=16'hCECD; // @28:445748 CFG4 un1_o1ll1_2 ( .A(o0iO1[31]), .B(un3_o1ll1_Z[0]), .C(oo1I1[15]), .D(lo1I1[15]), .Y(un1_o1ll1_2_Z) ); defparam un1_o1ll1_2.INIT=16'hCECD; // @28:445748 CFG4 un1_o1ll1_1 ( .A(o0iO1[32]), .B(un3_o1ll1_Z[1]), .C(oo1I1[16]), .D(lo1I1[16]), .Y(un1_o1ll1_1_Z) ); defparam un1_o1ll1_1.INIT=16'hCECD; // @28:445748 CFG4 un1_o1ll1_0 ( .A(o0iO1[23]), .B(O0OI1), .C(oo1I1[7]), .D(lo1I1[7]), .Y(un1_o1ll1_0_Z) ); defparam un1_o1ll1_0.INIT=16'hCECD; // @28:445845 CFG4 un1_l0ll1_11 ( .A(l0ll1_Z[2]), .B(l0ll1_Z[3]), .C(un1_l0ll1_9_Z), .D(un1_l0ll1_3_Z), .Y(un1_l0ll1_11_Z) ); defparam un1_l0ll1_11.INIT=16'h8000; // @28:445845 CFG3 un1_l0ll1_10 ( .A(l0ll1_Z[8]), .B(un1_l0ll1_7_Z), .C(l0ll1_Z[9]), .Y(un1_l0ll1_10_Z) ); defparam un1_l0ll1_10.INIT=8'h80; // @28:444625 CFG4 ooIl1 ( .A(oliO1), .B(ioIl1_Z), .C(OOll1_Z), .D(iliO1), .Y(ooIl1_Z) ); defparam ooIl1.INIT=16'h0A08; // @28:446272 CFG4 un1_oI1I18_1 ( .A(O0iO1_1z), .B(llll1_Z), .C(oI1I18_Z), .D(I0ll1_Z), .Y(un1_oI1I18_1_Z) ); defparam un1_oI1I18_1.INIT=16'hF2F3; // @28:445572 CFG3 Oill1 ( .A(O1ll1_Z), .B(un1_Oill1_Z), .C(oill1_Z), .Y(Oill1_Z) ); defparam Oill1.INIT=8'hDC; // @28:445001 CFG2 un1_Ol1I18 ( .A(OOll1_Z), .B(oOll1_Z), .Y(un1_Ol1I18_Z) ); defparam un1_Ol1I18.INIT=4'hE; // @28:442937 CFG4 un1_i1Il1_RNO ( .A(oliO1), .B(ioIl1_Z), .C(un1_i1Il1_RNO_0_Z), .D(iliO1), .Y(un16_m6_0_a3_0) ); defparam un1_i1Il1_RNO.INIT=16'h0A08; // @28:445147 CFG2 i1Il1_m0s2 ( .A(i1Il1), .B(oiIl1_Z), .Y(i1Il1_m0s2_Z) ); defparam i1Il1_m0s2.INIT=4'hE; // @28:442937 CFG2 \genblk1.un4_i1Il1 ( .A(i1Il1), .B(oiIl1_Z), .Y(un4_i1Il1) ); defparam \genblk1.un4_i1Il1 .INIT=4'h1; // @28:443341 CFG3 \IO1l1[5] ( .A(lliO1[5]), .B(OioI1), .C(IO1l1_2_Z[5]), .Y(IO1l1_Z[5]) ); defparam \IO1l1[5] .INIT=8'hF2; // @28:443341 CFG3 \IO1l1[6] ( .A(lliO1[6]), .B(OioI1), .C(IO1l1_2_Z[6]), .Y(IO1l1_Z[6]) ); defparam \IO1l1[6] .INIT=8'hF2; // @28:443341 CFG3 \IO1l1[4] ( .A(lliO1[4]), .B(OioI1), .C(IO1l1_2_Z[4]), .Y(IO1l1_Z[4]) ); defparam \IO1l1[4] .INIT=8'hF2; // @28:443341 CFG3 \IO1l1[3] ( .A(lliO1[3]), .B(OioI1), .C(IO1l1_2_Z[3]), .Y(IO1l1_Z[3]) ); defparam \IO1l1[3] .INIT=8'hF2; // @28:443341 CFG3 \IO1l1[2] ( .A(lliO1[2]), .B(OioI1), .C(IO1l1_2_Z[2]), .Y(IO1l1_Z[2]) ); defparam \IO1l1[2] .INIT=8'hF2; // @28:443341 CFG3 \IO1l1[7] ( .A(lliO1[7]), .B(OioI1), .C(IO1l1_2_Z[7]), .Y(IO1l1_Z[7]) ); defparam \IO1l1[7] .INIT=8'hF2; // @28:443389 CFG3 oO1l1_u ( .A(oO1l1_2), .B(iliO1), .C(OioI1), .Y(oO1l1) ); defparam oO1l1_u.INIT=8'hAE; // @28:443341 CFG3 \IO1l1[1] ( .A(lliO1[1]), .B(OioI1), .C(IO1l1_2_Z[1]), .Y(IO1l1_Z[1]) ); defparam \IO1l1[1] .INIT=8'hF2; // @28:443341 CFG3 \IO1l1[0] ( .A(lliO1[0]), .B(OioI1), .C(IO1l1_2_Z[0]), .Y(IO1l1_Z[0]) ); defparam \IO1l1[0] .INIT=8'hF2; // @28:445748 CFG4 un1_o1ll1_12 ( .A(o0iO1[20]), .B(un1_o1ll1_7_Z), .C(oo1I1[4]), .D(lo1I1[4]), .Y(un1_o1ll1_12_Z) ); defparam un1_o1ll1_12.INIT=16'hCECD; // @28:445748 CFG4 un1_o1ll1_8 ( .A(un1_o1ll1_0_Z), .B(o0iO1[30]), .C(oo1I1[14]), .D(lo1I1[14]), .Y(un1_o1ll1_8_Z) ); defparam un1_o1ll1_8.INIT=16'hAEAB; // @28:443509 CFG3 lI1l1 ( .A(un1_IloI1_1_Z), .B(OOll1_Z), .C(OiIl1_Z), .Y(lI1l1_Z) ); defparam lI1l1.INIT=8'hEF; // @28:445487 CFG3 un1_oI1I1_1 ( .A(ooIl1_Z), .B(oI1I1_1z), .C(OiIl1_Z), .Y(un1_oI1I1_1_Z) ); defparam un1_oI1I1_1.INIT=8'h20; // @28:445147 CFG3 \i1Il1_m0[14] ( .A(IloI1[12]), .B(IoIl1[14]), .C(i1Il1), .Y(i1Il1_m0_Z[14]) ); defparam \i1Il1_m0[14] .INIT=8'hAC; // @28:445147 CFG3 \i1Il1_m0[13] ( .A(IloI1[11]), .B(IoIl1[13]), .C(i1Il1), .Y(i1Il1_m0_Z[13]) ); defparam \i1Il1_m0[13] .INIT=8'hAC; // @28:445147 CFG3 \i1Il1_m0[12] ( .A(IloI1[10]), .B(IoIl1[12]), .C(i1Il1), .Y(i1Il1_m0_Z[12]) ); defparam \i1Il1_m0[12] .INIT=8'hAC; // @28:445147 CFG3 \i1Il1_m0[11] ( .A(IloI1[9]), .B(IoIl1[11]), .C(i1Il1), .Y(i1Il1_m0_Z[11]) ); defparam \i1Il1_m0[11] .INIT=8'hAC; // @28:445147 CFG3 \i1Il1_m0[10] ( .A(IloI1[8]), .B(IoIl1[10]), .C(i1Il1), .Y(i1Il1_m0_Z[10]) ); defparam \i1Il1_m0[10] .INIT=8'hAC; // @28:445147 CFG3 \i1Il1_m0[9] ( .A(IloI1[7]), .B(IoIl1[9]), .C(i1Il1), .Y(i1Il1_m0_Z[9]) ); defparam \i1Il1_m0[9] .INIT=8'hAC; // @28:445147 CFG3 \i1Il1_m0[8] ( .A(IloI1[6]), .B(IoIl1[8]), .C(i1Il1), .Y(i1Il1_m0_Z[8]) ); defparam \i1Il1_m0[8] .INIT=8'hAC; // @28:445147 CFG3 \i1Il1_m0[7] ( .A(IloI1[5]), .B(IoIl1[7]), .C(i1Il1), .Y(i1Il1_m0_Z[7]) ); defparam \i1Il1_m0[7] .INIT=8'hAC; // @28:445147 CFG3 \i1Il1_m0[6] ( .A(IloI1[4]), .B(IoIl1[6]), .C(i1Il1), .Y(i1Il1_m0_Z[6]) ); defparam \i1Il1_m0[6] .INIT=8'hAC; // @28:445147 CFG3 \i1Il1_m0[5] ( .A(IloI1[3]), .B(IoIl1[5]), .C(i1Il1), .Y(i1Il1_m0_Z[5]) ); defparam \i1Il1_m0[5] .INIT=8'hAC; // @28:445147 CFG3 \i1Il1_m0[4] ( .A(IloI1[2]), .B(IoIl1[4]), .C(i1Il1), .Y(i1Il1_m0_Z[4]) ); defparam \i1Il1_m0[4] .INIT=8'hAC; // @28:445147 CFG3 \i1Il1_m0[3] ( .A(IloI1[1]), .B(IoIl1[3]), .C(i1Il1), .Y(i1Il1_m0_Z[3]) ); defparam \i1Il1_m0[3] .INIT=8'hAC; // @28:445147 CFG3 \i1Il1_m0[2] ( .A(IloI1[0]), .B(IoIl1[2]), .C(i1Il1), .Y(i1Il1_m0_Z[2]) ); defparam \i1Il1_m0[2] .INIT=8'hAC; // @28:443432 CFG3 \II1l1[0] ( .A(IloI1[0]), .B(I01I1[0]), .C(un1_IloI1_1_Z), .Y(II1l1_Z[0]) ); defparam \II1l1[0] .INIT=8'hAC; // @28:443432 CFG3 \II1l1[1] ( .A(IloI1[1]), .B(I01I1[1]), .C(un1_IloI1_1_Z), .Y(II1l1_Z[1]) ); defparam \II1l1[1] .INIT=8'hAC; // @28:443432 CFG3 \II1l1[2] ( .A(IloI1[2]), .B(I01I1[2]), .C(un1_IloI1_1_Z), .Y(II1l1_Z[2]) ); defparam \II1l1[2] .INIT=8'hAC; // @28:443432 CFG3 \II1l1[5] ( .A(IloI1[5]), .B(I01I1[5]), .C(un1_IloI1_1_Z), .Y(II1l1_Z[5]) ); defparam \II1l1[5] .INIT=8'hAC; // @28:443432 CFG3 \II1l1[6] ( .A(IloI1[6]), .B(I01I1[6]), .C(un1_IloI1_1_Z), .Y(II1l1_Z[6]) ); defparam \II1l1[6] .INIT=8'hAC; // @28:443432 CFG3 \II1l1[7] ( .A(IloI1[7]), .B(I01I1[7]), .C(un1_IloI1_1_Z), .Y(II1l1_Z[7]) ); defparam \II1l1[7] .INIT=8'hAC; // @28:443432 CFG3 \II1l1[9] ( .A(IloI1[9]), .B(I01I1[9]), .C(un1_IloI1_1_Z), .Y(II1l1_Z[9]) ); defparam \II1l1[9] .INIT=8'hAC; // @28:443432 CFG3 \II1l1[8] ( .A(IloI1[8]), .B(I01I1[8]), .C(un1_IloI1_1_Z), .Y(II1l1_Z[8]) ); defparam \II1l1[8] .INIT=8'hAC; // @28:443432 CFG3 \II1l1[10] ( .A(IloI1[10]), .B(I01I1[10]), .C(un1_IloI1_1_Z), .Y(II1l1_Z[10]) ); defparam \II1l1[10] .INIT=8'hAC; // @28:443432 CFG3 \II1l1[11] ( .A(IloI1[11]), .B(I01I1[11]), .C(un1_IloI1_1_Z), .Y(II1l1_Z[11]) ); defparam \II1l1[11] .INIT=8'hAC; // @28:443432 CFG3 \II1l1[4] ( .A(IloI1[4]), .B(I01I1[4]), .C(un1_IloI1_1_Z), .Y(II1l1_Z[4]) ); defparam \II1l1[4] .INIT=8'hAC; // @28:443432 CFG3 \II1l1[3] ( .A(IloI1[3]), .B(I01I1[3]), .C(un1_IloI1_1_Z), .Y(II1l1_Z[3]) ); defparam \II1l1[3] .INIT=8'hAC; // @28:444344 CFG2 un1_liOI1_4 ( .A(ooIl1_Z), .B(iliO1), .Y(un1_liOI1_4_i) ); defparam un1_liOI1_4.INIT=4'h8; // @28:445880 CFG4 un5_l1ll1_0 ( .A(un10_l1ll1_8_Z), .B(un10_l1ll1_7_Z), .C(un10_l1ll1_6_Z), .D(IOll1_Z), .Y(un5_l1ll1_0_Z) ); defparam un5_l1ll1_0.INIT=16'h007F; // @28:445748 CFG4 un1_o1ll1_14 ( .A(un1_o1ll1_6_Z), .B(un1_o1ll1_5_Z), .C(un1_o1ll1_4_Z), .D(un1_o1ll1_3_Z), .Y(un1_o1ll1_14_Z) ); defparam un1_o1ll1_14.INIT=16'hFFFE; // @28:444587 CFG4 un1_ioIl18_1 ( .A(iliO1), .B(OOll1_Z), .C(oliO1), .D(O0iO1_1z), .Y(un1_ioIl18_1_Z) ); defparam un1_ioIl18_1.INIT=16'hFAEA; // @28:445748 CFG3 \un3_o1ll1[17] ( .A(oo1I1[17]), .B(lo1I1[17]), .C(Oill1_Z), .Y(un3_o1ll1_Z[17]) ); defparam \un3_o1ll1[17] .INIT=8'h41; // @28:444560 CFG3 ioIl18_i ( .A(OOll1_Z), .B(oliO1), .C(O0iO1_1z), .Y(ioIl18_i_Z) ); defparam ioIl18_i.INIT=8'h37; // @28:444539 CFG3 \iI1l1[0].lIII1_35[0] ( .A(lIII110_Z), .B(oloI1[0]), .C(IO1l1_Z[0]), .Y(lIII1_35[0]) ); defparam \iI1l1[0].lIII1_35[0] .INIT=8'hD8; // @28:444539 CFG3 \iI1l1[0].lIII1_35[1] ( .A(lIII110_Z), .B(oloI1[1]), .C(IO1l1_Z[1]), .Y(lIII1_35[1]) ); defparam \iI1l1[0].lIII1_35[1] .INIT=8'hD8; // @28:444539 CFG4 \iI1l1[1].lIII1_44[8] ( .A(oloI1[8]), .B(Ooll1_Z), .C(Ioll1_Z), .D(IO1l1_Z[0]), .Y(lIII1_44[8]) ); defparam \iI1l1[1].lIII1_44[8] .INIT=16'hFB08; // @28:444539 CFG4 \iI1l1[1].lIII1_44[9] ( .A(oloI1[9]), .B(Ooll1_Z), .C(Ioll1_Z), .D(IO1l1_Z[1]), .Y(lIII1_44[9]) ); defparam \iI1l1[1].lIII1_44[9] .INIT=16'hFB08; // @28:444539 CFG4 \iI1l1[1].lIII1_44[10] ( .A(oloI1[10]), .B(Ooll1_Z), .C(Ioll1_Z), .D(IO1l1_Z[2]), .Y(lIII1_44[10]) ); defparam \iI1l1[1].lIII1_44[10] .INIT=16'hFB08; // @28:444539 CFG4 \iI1l1[1].lIII1_44[12] ( .A(oloI1[12]), .B(Ooll1_Z), .C(Ioll1_Z), .D(IO1l1_Z[4]), .Y(lIII1_44[12]) ); defparam \iI1l1[1].lIII1_44[12] .INIT=16'hFB08; // @28:444539 CFG4 \iI1l1[2].lIII1_53[16] ( .A(oloI1[16]), .B(Ooll1_Z), .C(Ioll1_Z), .D(IO1l1_Z[0]), .Y(lIII1_53[16]) ); defparam \iI1l1[2].lIII1_53[16] .INIT=16'hFB08; // @28:444539 CFG4 \iI1l1[2].lIII1_53[17] ( .A(oloI1[17]), .B(Ooll1_Z), .C(Ioll1_Z), .D(IO1l1_Z[1]), .Y(lIII1_53[17]) ); defparam \iI1l1[2].lIII1_53[17] .INIT=16'hFB08; // @28:444539 CFG4 \iI1l1[2].lIII1_53[18] ( .A(oloI1[18]), .B(Ooll1_Z), .C(Ioll1_Z), .D(IO1l1_Z[2]), .Y(lIII1_53[18]) ); defparam \iI1l1[2].lIII1_53[18] .INIT=16'hFB08; // @28:444539 CFG4 \iI1l1[3].lIII1_62[24] ( .A(oloI1[24]), .B(Ooll1_Z), .C(Ioll1_Z), .D(IO1l1_Z[0]), .Y(lIII1_62[24]) ); defparam \iI1l1[3].lIII1_62[24] .INIT=16'hFB08; // @28:444539 CFG4 \iI1l1[3].lIII1_62[25] ( .A(oloI1[25]), .B(Ooll1_Z), .C(Ioll1_Z), .D(IO1l1_Z[1]), .Y(lIII1_62[25]) ); defparam \iI1l1[3].lIII1_62[25] .INIT=16'hFB08; // @28:444539 CFG4 \iI1l1[3].lIII1_62[28] ( .A(oloI1[28]), .B(Ooll1_Z), .C(Ioll1_Z), .D(IO1l1_Z[4]), .Y(lIII1_62[28]) ); defparam \iI1l1[3].lIII1_62[28] .INIT=16'hFB08; // @28:444539 CFG3 \iI1l1[0].lIII1_35[5] ( .A(lIII110_Z), .B(oloI1[5]), .C(IO1l1_Z[5]), .Y(lIII1_35[5]) ); defparam \iI1l1[0].lIII1_35[5] .INIT=8'hD8; // @28:444539 CFG3 \iI1l1[0].lIII1_35[6] ( .A(lIII110_Z), .B(oloI1[6]), .C(IO1l1_Z[6]), .Y(lIII1_35[6]) ); defparam \iI1l1[0].lIII1_35[6] .INIT=8'hD8; // @28:444539 CFG3 \iI1l1[0].lIII1_35[7] ( .A(lIII110_Z), .B(oloI1[7]), .C(IO1l1_Z[7]), .Y(lIII1_35[7]) ); defparam \iI1l1[0].lIII1_35[7] .INIT=8'hD8; // @28:444539 CFG4 \iI1l1[1].lIII1_44[13] ( .A(oloI1[13]), .B(Ooll1_Z), .C(Ioll1_Z), .D(IO1l1_Z[5]), .Y(lIII1_44[13]) ); defparam \iI1l1[1].lIII1_44[13] .INIT=16'hFB08; // @28:444539 CFG4 \iI1l1[1].lIII1_44[14] ( .A(oloI1[14]), .B(Ooll1_Z), .C(Ioll1_Z), .D(IO1l1_Z[6]), .Y(lIII1_44[14]) ); defparam \iI1l1[1].lIII1_44[14] .INIT=16'hFB08; // @28:444539 CFG4 \iI1l1[1].lIII1_44[15] ( .A(oloI1[15]), .B(Ooll1_Z), .C(Ioll1_Z), .D(IO1l1_Z[7]), .Y(lIII1_44[15]) ); defparam \iI1l1[1].lIII1_44[15] .INIT=16'hFB08; // @28:444539 CFG4 \iI1l1[2].lIII1_53[21] ( .A(oloI1[21]), .B(Ooll1_Z), .C(Ioll1_Z), .D(IO1l1_Z[5]), .Y(lIII1_53[21]) ); defparam \iI1l1[2].lIII1_53[21] .INIT=16'hFB08; // @28:444539 CFG4 \iI1l1[2].lIII1_53[22] ( .A(oloI1[22]), .B(Ooll1_Z), .C(Ioll1_Z), .D(IO1l1_Z[6]), .Y(lIII1_53[22]) ); defparam \iI1l1[2].lIII1_53[22] .INIT=16'hFB08; // @28:444539 CFG4 \iI1l1[2].lIII1_53[23] ( .A(oloI1[23]), .B(Ooll1_Z), .C(Ioll1_Z), .D(IO1l1_Z[7]), .Y(lIII1_53[23]) ); defparam \iI1l1[2].lIII1_53[23] .INIT=16'hFB08; // @28:444539 CFG4 \iI1l1[3].lIII1_62[29] ( .A(oloI1[29]), .B(Ooll1_Z), .C(Ioll1_Z), .D(IO1l1_Z[5]), .Y(lIII1_62[29]) ); defparam \iI1l1[3].lIII1_62[29] .INIT=16'hFB08; // @28:444539 CFG4 \iI1l1[3].lIII1_62[30] ( .A(oloI1[30]), .B(Ooll1_Z), .C(Ioll1_Z), .D(IO1l1_Z[6]), .Y(lIII1_62[30]) ); defparam \iI1l1[3].lIII1_62[30] .INIT=16'hFB08; // @28:444539 CFG4 \iI1l1[3].lIII1_62[31] ( .A(oloI1[31]), .B(Ooll1_Z), .C(Ioll1_Z), .D(IO1l1_Z[7]), .Y(lIII1_62[31]) ); defparam \iI1l1[3].lIII1_62[31] .INIT=16'hFB08; // @28:444539 CFG4 \iI1l1[2].lIII1_53[19] ( .A(oloI1[19]), .B(Ooll1_Z), .C(Ioll1_Z), .D(IO1l1_Z[3]), .Y(lIII1_53[19]) ); defparam \iI1l1[2].lIII1_53[19] .INIT=16'hFB08; // @28:444539 CFG3 \iI1l1[0].lIII1_35[3] ( .A(lIII110_Z), .B(oloI1[3]), .C(IO1l1_Z[3]), .Y(lIII1_35[3]) ); defparam \iI1l1[0].lIII1_35[3] .INIT=8'hD8; // @28:444539 CFG3 \iI1l1[0].lIII1_35[2] ( .A(lIII110_Z), .B(oloI1[2]), .C(IO1l1_Z[2]), .Y(lIII1_35[2]) ); defparam \iI1l1[0].lIII1_35[2] .INIT=8'hD8; // @28:444539 CFG4 \iI1l1[3].lIII1_62[26] ( .A(oloI1[26]), .B(Ooll1_Z), .C(Ioll1_Z), .D(IO1l1_Z[2]), .Y(lIII1_62[26]) ); defparam \iI1l1[3].lIII1_62[26] .INIT=16'hFB08; // @28:444176 CFG3 \lIII1_6[35] ( .A(oloI1[35]), .B(oO1l1), .C(lIII110_Z), .Y(lIII1_6_Z[35]) ); defparam \lIII1_6[35] .INIT=8'hAC; // @28:444539 CFG4 \iI1l1[2].lIII1_53[20] ( .A(oloI1[20]), .B(Ooll1_Z), .C(Ioll1_Z), .D(IO1l1_Z[4]), .Y(lIII1_53[20]) ); defparam \iI1l1[2].lIII1_53[20] .INIT=16'hFB08; // @28:444539 CFG3 \iI1l1[0].lIII1_35[4] ( .A(lIII110_Z), .B(oloI1[4]), .C(IO1l1_Z[4]), .Y(lIII1_35[4]) ); defparam \iI1l1[0].lIII1_35[4] .INIT=8'hD8; // @28:444539 CFG4 \iI1l1[3].lIII1_62[27] ( .A(oloI1[27]), .B(Ooll1_Z), .C(Ioll1_Z), .D(IO1l1_Z[3]), .Y(lIII1_62[27]) ); defparam \iI1l1[3].lIII1_62[27] .INIT=16'hFB08; // @28:444539 CFG4 \iI1l1[1].lIII1_44[11] ( .A(oloI1[11]), .B(Ooll1_Z), .C(Ioll1_Z), .D(IO1l1_Z[3]), .Y(lIII1_44[11]) ); defparam \iI1l1[1].lIII1_44[11] .INIT=16'hFB08; // @28:445748 CFG4 un1_o1ll1_16 ( .A(un9_o1ll1_5_Z), .B(un1_o1ll1_14_Z), .C(un9_o1ll1_7_Z), .D(un9_o1ll1_6_Z), .Y(un1_o1ll1_16_Z) ); defparam un1_o1ll1_16.INIT=16'hECCC; // @28:445748 CFG4 un1_o1ll1_15 ( .A(un1_o1ll1_1_Z), .B(un1_o1ll1_2_Z), .C(un1_o1ll1_12_Z), .D(un1_o1ll1_8_Z), .Y(un1_o1ll1_15_Z) ); defparam un1_o1ll1_15.INIT=16'hFFFE; // @28:435289 CFG4 un1_l0ll1_10_RNIJJE6D ( .A(un1_l0ll1_10_Z), .B(I0ll1_Z), .C(ooIl1_Z), .D(un1_l0ll1_11_Z), .Y(l0ll1e) ); defparam un1_l0ll1_10_RNIJJE6D.INIT=16'h73F3; // @28:444187 CFG4 un1_liOI1_4_RNIG18PA ( .A(O0iO1_1z), .B(lIII110_Z), .C(ooIl1_Z), .D(un1_liOI1_4_i), .Y(un1_lIII110_1_i) ); defparam un1_liOI1_4_RNIG18PA.INIT=16'hFFEC; // @28:445147 CFG4 loIl1_RNIAEP7M_0 ( .A(OiIl1_Z), .B(loIl1_Z), .C(un4_i1Il1), .D(OOll1_Z), .Y(un10_i1Il1_i) ); defparam loIl1_RNIAEP7M_0.INIT=16'hFF7F; // @28:445147 CFG4 un1_i1Il1 ( .A(un16_m6_0_a3_0), .B(oO1l1), .C(un4_i1Il1), .D(OOll1_Z), .Y(un1_i1Il1_Z) ); defparam un1_i1Il1.INIT=16'hF0D0; // @28:445740 CFG4 o1ll1 ( .A(I1ll1_Z), .B(un1_o1ll1_16_Z), .C(un1_o1ll1_15_Z), .D(un3_o1ll1_Z[17]), .Y(o1ll1_Z) ); defparam o1ll1.INIT=16'hAAA8; // @28:445147 CFG3 \i1Il1_RNO[14] ( .A(un1_i1Il1_Z), .B(un1_OoIl1_21[14]), .C(un1_OoIl1_20[14]), .Y(i1Il1_m1[14]) ); defparam \i1Il1_RNO[14] .INIT=8'hD8; // @28:445147 CFG3 \i1Il1_RNO[13] ( .A(un1_i1Il1_Z), .B(un1_OoIl1_21[13]), .C(un1_OoIl1_20[13]), .Y(i1Il1_m1[13]) ); defparam \i1Il1_RNO[13] .INIT=8'hD8; // @28:445147 CFG3 \i1Il1_RNO[12] ( .A(un1_i1Il1_Z), .B(un1_OoIl1_21[12]), .C(un1_OoIl1_20[12]), .Y(i1Il1_m1[12]) ); defparam \i1Il1_RNO[12] .INIT=8'hD8; // @28:445147 CFG3 \i1Il1_RNO[11] ( .A(un1_i1Il1_Z), .B(un1_OoIl1_21[11]), .C(un1_OoIl1_20[11]), .Y(i1Il1_m1[11]) ); defparam \i1Il1_RNO[11] .INIT=8'hD8; // @28:445147 CFG3 \i1Il1_RNO[10] ( .A(un1_i1Il1_Z), .B(un1_OoIl1_21[10]), .C(un1_OoIl1_20[10]), .Y(i1Il1_m1[10]) ); defparam \i1Il1_RNO[10] .INIT=8'hD8; // @28:445147 CFG3 \i1Il1_RNO[9] ( .A(un1_i1Il1_Z), .B(un1_OoIl1_21[9]), .C(un1_OoIl1_20[9]), .Y(i1Il1_m1[9]) ); defparam \i1Il1_RNO[9] .INIT=8'hD8; // @28:445147 CFG3 \i1Il1_RNO[8] ( .A(un1_i1Il1_Z), .B(un1_OoIl1_21[8]), .C(un1_OoIl1_20[8]), .Y(i1Il1_m1[8]) ); defparam \i1Il1_RNO[8] .INIT=8'hD8; // @28:445147 CFG3 \i1Il1_RNO[7] ( .A(un1_i1Il1_Z), .B(un1_OoIl1_21[7]), .C(un1_OoIl1_20[7]), .Y(i1Il1_m1[7]) ); defparam \i1Il1_RNO[7] .INIT=8'hD8; // @28:445147 CFG3 \i1Il1_RNO[6] ( .A(un1_i1Il1_Z), .B(un1_OoIl1_21[6]), .C(un1_OoIl1_20[6]), .Y(i1Il1_m1[6]) ); defparam \i1Il1_RNO[6] .INIT=8'hD8; // @28:445147 CFG3 \i1Il1_RNO[5] ( .A(un1_i1Il1_Z), .B(un1_OoIl1_21[5]), .C(un1_OoIl1_20[5]), .Y(i1Il1_m1[5]) ); defparam \i1Il1_RNO[5] .INIT=8'hD8; // @28:445147 CFG3 \i1Il1_RNO[4] ( .A(un1_i1Il1_Z), .B(un1_OoIl1_21[4]), .C(un1_OoIl1_20[4]), .Y(i1Il1_m1[4]) ); defparam \i1Il1_RNO[4] .INIT=8'hD8; // @28:445147 CFG3 \i1Il1_RNO[3] ( .A(un1_i1Il1_Z), .B(un1_OoIl1_21[3]), .C(un1_OoIl1_20[3]), .Y(i1Il1_m1[3]) ); defparam \i1Il1_RNO[3] .INIT=8'hD8; // @28:445147 CFG3 \i1Il1_RNO[2] ( .A(un1_i1Il1_Z), .B(un1_OoIl1_21[2]), .C(un1_OoIl1_20[2]), .Y(i1Il1_m1[2]) ); defparam \i1Il1_RNO[2] .INIT=8'hD8; // @28:445872 CFG3 un3_l1ll1 ( .A(I1ll1_Z), .B(o1ll1_Z), .C(IOll1_Z), .Y(un3_l1ll1_Z) ); defparam un3_l1ll1.INIT=8'h02; // @28:445147 CFG4 \i1Il1_1[0] ( .A(un1_i1Il1_Z), .B(i1Il1_m0s2_Z), .C(OoIl1_RNINAN5K1_Y[0]), .D(un1_OoIl1_1_0[0]), .Y(i1Il1_1_Z[0]) ); defparam \i1Il1_1[0] .INIT=16'h3210; // @28:445861 CFG4 l1ll1_0 ( .A(IloI1[13]), .B(O01I1_1z), .C(Ioll1_Z), .D(un3_l1ll1_Z), .Y(l1ll1_0_Z) ); defparam l1ll1_0.INIT=16'hFF20; // @28:445483 CFG4 un6_o1ll1 ( .A(OOll1_Z), .B(un1_oI1I1_1_Z), .C(OiIl1_Z), .D(o1ll1_Z), .Y(oiIl18) ); defparam un6_o1ll1.INIT=16'hFFEC; // @28:445147 CFG3 \i1Il1[14] ( .A(i1Il1_m1[14]), .B(i1Il1_m0_Z[14]), .C(i1Il1_m0s2_Z), .Y(i1Il1_Z[14]) ); defparam \i1Il1[14] .INIT=8'hCA; // @28:445147 CFG3 \i1Il1[13] ( .A(i1Il1_m1[13]), .B(i1Il1_m0_Z[13]), .C(i1Il1_m0s2_Z), .Y(i1Il1_Z[13]) ); defparam \i1Il1[13] .INIT=8'hCA; // @28:445147 CFG3 \i1Il1[12] ( .A(i1Il1_m1[12]), .B(i1Il1_m0_Z[12]), .C(i1Il1_m0s2_Z), .Y(i1Il1_Z[12]) ); defparam \i1Il1[12] .INIT=8'hCA; // @28:445147 CFG3 \i1Il1[11] ( .A(i1Il1_m1[11]), .B(i1Il1_m0_Z[11]), .C(i1Il1_m0s2_Z), .Y(i1Il1_Z[11]) ); defparam \i1Il1[11] .INIT=8'hCA; // @28:445147 CFG3 \i1Il1[10] ( .A(i1Il1_m1[10]), .B(i1Il1_m0_Z[10]), .C(i1Il1_m0s2_Z), .Y(i1Il1_Z[10]) ); defparam \i1Il1[10] .INIT=8'hCA; // @28:445147 CFG3 \i1Il1[9] ( .A(i1Il1_m1[9]), .B(i1Il1_m0_Z[9]), .C(i1Il1_m0s2_Z), .Y(i1Il1_Z[9]) ); defparam \i1Il1[9] .INIT=8'hCA; // @28:445147 CFG3 \i1Il1[8] ( .A(i1Il1_m1[8]), .B(i1Il1_m0_Z[8]), .C(i1Il1_m0s2_Z), .Y(i1Il1_Z[8]) ); defparam \i1Il1[8] .INIT=8'hCA; // @28:445147 CFG3 \i1Il1[7] ( .A(i1Il1_m1[7]), .B(i1Il1_m0_Z[7]), .C(i1Il1_m0s2_Z), .Y(i1Il1_Z[7]) ); defparam \i1Il1[7] .INIT=8'hCA; // @28:445147 CFG3 \i1Il1[6] ( .A(i1Il1_m1[6]), .B(i1Il1_m0_Z[6]), .C(i1Il1_m0s2_Z), .Y(i1Il1_Z[6]) ); defparam \i1Il1[6] .INIT=8'hCA; // @28:445147 CFG3 \i1Il1[5] ( .A(i1Il1_m1[5]), .B(i1Il1_m0_Z[5]), .C(i1Il1_m0s2_Z), .Y(i1Il1_Z[5]) ); defparam \i1Il1[5] .INIT=8'hCA; // @28:445147 CFG3 \i1Il1[4] ( .A(i1Il1_m1[4]), .B(i1Il1_m0_Z[4]), .C(i1Il1_m0s2_Z), .Y(i1Il1_Z[4]) ); defparam \i1Il1[4] .INIT=8'hCA; // @28:445147 CFG3 \i1Il1[3] ( .A(i1Il1_m1[3]), .B(i1Il1_m0_Z[3]), .C(i1Il1_m0s2_Z), .Y(i1Il1_Z[3]) ); defparam \i1Il1[3] .INIT=8'hCA; // @28:445147 CFG3 \i1Il1[2] ( .A(i1Il1_m1[2]), .B(i1Il1_m0_Z[2]), .C(i1Il1_m0s2_Z), .Y(i1Il1_Z[2]) ); defparam \i1Il1[2] .INIT=8'hCA; // @28:445480 CFG3 un1_oiIl18 ( .A(oiIl18), .B(iliO1), .C(OOll1_Z), .Y(un1_oiIl18_Z) ); defparam un1_oiIl18.INIT=8'hAE; // @28:444292 CFG4 \lIII1_26[33] ( .A(oloI1[33]), .B(lIII110_Z), .C(un1_liOI1_4_i), .D(i1Il1_Z[1]), .Y(lIII1_26_Z[33]) ); defparam \lIII1_26[33] .INIT=16'h888B; // @28:444292 CFG4 \lIII1_26[32] ( .A(oloI1[32]), .B(lIII110_Z), .C(un1_liOI1_4_i), .D(i1Il1_Z[0]), .Y(lIII1_26_Z[32]) ); defparam \lIII1_26[32] .INIT=16'h888B; // @28:444121 CFG4 \iI1l1[0].un1_lIII110 ( .A(lIII110_Z), .B(ooIl1_Z), .C(i1Il1_Z[0]), .D(i1Il1_Z[1]), .Y(un1_lIII110_1) ); defparam \iI1l1[0].un1_lIII110 .INIT=16'hAAAE; // @28:444121 CFG4 un1_lIII110_4 ( .A(lIII110_Z), .B(lO1l1), .C(i1Il1_Z[0]), .D(i1Il1_Z[1]), .Y(un1_lIII110_4_Z) ); defparam un1_lIII110_4.INIT=16'hAAAE; // @28:444121 CFG4 \iI1l1[1].un1_lIII110 ( .A(lIII110_Z), .B(ooIl1_Z), .C(i1Il1_Z[0]), .D(i1Il1_Z[1]), .Y(un1_lIII110) ); defparam \iI1l1[1].un1_lIII110 .INIT=16'hAAEA; // @28:444121 CFG4 \iI1l1[3].un1_lIII110 ( .A(lIII110_Z), .B(ooIl1_Z), .C(i1Il1_Z[0]), .D(i1Il1_Z[1]), .Y(un1_lIII110_2) ); defparam \iI1l1[3].un1_lIII110 .INIT=16'hEAAA; // @28:444121 CFG4 \iI1l1[2].un1_lIII110 ( .A(lIII110_Z), .B(ooIl1_Z), .C(i1Il1_Z[0]), .D(i1Il1_Z[1]), .Y(un1_lIII110_0) ); defparam \iI1l1[2].un1_lIII110 .INIT=16'hAEAA; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_AMCXRFIF_SYS_26s_0s_12s_32s_2s_0_0_0_1s */ module CTSE_AMCXTFIF_WTM_26s_12s_1s_0_0 ( O11I1_1z, I11I1, i01I1, lO1I1, IO1I1, o0il1, iOiO1_1z, o11I1, IliO1, l11I1, iiOI1_1z, oO1I1, OIoI1, Iiil1_1z, iO1I1_1z, PF_IOD_CDR_CCC_C0_0_TX_CLK_G, i0oI1_i ) ; input [12:0] O11I1_1z ; input [12:0] I11I1 ; input [15:0] i01I1 ; input [12:0] lO1I1 ; input [12:0] IO1I1 ; output [2:0] o0il1 ; output iOiO1_1z ; input o11I1 ; input IliO1 ; input l11I1 ; output iiOI1_1z ; input oO1I1 ; input OIoI1 ; output Iiil1_1z ; output iO1I1_1z ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; input i0oI1_i ; wire iOiO1_1z ; wire o11I1 ; wire IliO1 ; wire l11I1 ; wire iiOI1_1z ; wire oO1I1 ; wire OIoI1 ; wire Iiil1_1z ; wire iO1I1_1z ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire i0oI1_i ; wire [15:0] i0il1_Z; wire [15:0] i0il1_s; wire [12:0] ioil1_Z; wire [12:0] ooil1_Z; wire [5:3] o0il1_Z; wire [4:0] o0il1_8; wire [12:0] Oi1l1_Z; wire [11:0] io1l1_Z; wire [6:0] O1il1_Z; wire [14:0] i0il1_cry; wire [0:0] i0il1_RNI84QVH1_Y; wire [1:1] i0il1_RNIBOU0E2_Y; wire [2:2] i0il1_RNIGE32A3_Y; wire [3:3] i0il1_RNIN68364_Y; wire [4:4] i0il1_RNI01D425_Y; wire [5:5] i0il1_RNIBTH5U5_Y; wire [6:6] i0il1_RNIORM6Q6_Y; wire [7:7] i0il1_RNI7SR7M7_Y; wire [8:8] i0il1_RNIOU09I8_Y; wire [9:9] i0il1_RNIB36AE9_Y; wire [10:10] i0il1_RNIES9Q4A_Y; wire [11:11] i0il1_RNIJNDARA_Y; wire [12:12] i0il1_RNIQKHQHB_Y; wire [13:13] i0il1_RNI3KLA8C_Y; wire [15:15] i0il1_RNO_FCO; wire [15:15] i0il1_RNO_Y; wire [14:14] i0il1_RNIELPQUC_Y; wire [1:1] o0il1_8_0_1_Z; wire GND ; wire i0il1e ; wire VCC ; wire Ooil1_Z ; wire i1il1_Z ; wire loil1_Z ; wire Oiil1_Z ; wire Ioil1_Z ; wire l1il1_Z ; wire l1il1_2 ; wire I1il1_Z ; wire I1il1_2 ; wire iiOI1_2_Z ; wire N_108_i ; wire N_104_i ; wire un2_Oi1l1_cry_5_S ; wire un2_Oi1l1_cry_4_S ; wire un2_Oi1l1_cry_3_S ; wire un2_Oi1l1_cry_2_S ; wire un2_Oi1l1_cry_1_S ; wire un2_Oi1l1_axb_0_i ; wire un2_io1l1_cry_7_S ; wire un2_io1l1_cry_6_S ; wire un2_io1l1_cry_5_S ; wire un2_io1l1_cry_4_S ; wire un2_io1l1_cry_3_S ; wire un2_io1l1_cry_2_S ; wire un2_io1l1_cry_1_S ; wire un2_io1l1_axb_0_i ; wire un2_Oi1l1_cry_11_Z ; wire un2_Oi1l1_cry_11_S ; wire un2_Oi1l1_cry_10_S ; wire un2_Oi1l1_cry_9_S ; wire un2_Oi1l1_cry_8_S ; wire un2_Oi1l1_cry_7_S ; wire un2_Oi1l1_cry_6_S ; wire ooil15_Z ; wire un2_io1l1_s_11_S ; wire un2_io1l1_cry_10_S ; wire un2_io1l1_cry_9_S ; wire un2_io1l1_cry_8_S ; wire un1_O1il1_4_s_6_S ; wire N_4_i ; wire un1_O1il1_4_cry_5_S ; wire un1_O1il1_4_cry_4_S ; wire un1_O1il1_4_cry_3_S ; wire un1_O1il1_4_cry_2_S ; wire un1_O1il1_4_cry_1_0_S ; wire un1_O1il1_4_cry_0_Y ; wire i0il1_cry_cy ; wire un1_i0il1_RNI7ILUL_S ; wire un1_i0il1_RNI7ILUL_Y ; wire un1_i0il1_i ; wire un1_O1il1_4_cry_0_Z ; wire un1_O1il1_4_cry_0_S ; wire O1il112 ; wire un1_O1il1_4_cry_1 ; wire un1_O1il1_4_cry_1_0_Y ; wire un1_O1il1_4_cry_2_Z ; wire un1_O1il1_4_cry_2_Y ; wire un1_O1il1_4_cry_3_Z ; wire un1_O1il1_4_cry_3_Y ; wire un1_O1il1_4_cry_4_Z ; wire un1_O1il1_4_cry_4_Y ; wire un1_O1il1_4_s_6_FCO ; wire un1_O1il1_4_s_6_Y ; wire un1_O1il1_4_cry_5_Z ; wire un1_O1il1_4_cry_5_Y ; wire un2_io1l1_cry_0_Z ; wire un2_io1l1_cry_0_S ; wire un2_io1l1_cry_0_Y ; wire un2_io1l1_cry_1_Z ; wire un2_io1l1_cry_1_Y ; wire un2_io1l1_cry_2_Z ; wire un2_io1l1_cry_2_Y ; wire un2_io1l1_cry_3_Z ; wire un2_io1l1_cry_3_Y ; wire un2_io1l1_cry_4_Z ; wire un2_io1l1_cry_4_Y ; wire un2_io1l1_cry_5_Z ; wire un2_io1l1_cry_5_Y ; wire un2_io1l1_cry_6_Z ; wire un2_io1l1_cry_6_Y ; wire un2_io1l1_cry_7_Z ; wire un2_io1l1_cry_7_Y ; wire un2_io1l1_cry_8_Z ; wire un2_io1l1_cry_8_Y ; wire un2_io1l1_cry_9_Z ; wire un2_io1l1_cry_9_Y ; wire un2_io1l1_s_11_FCO ; wire un2_io1l1_s_11_Y ; wire un2_io1l1_cry_10_Z ; wire un2_io1l1_cry_10_Y ; wire un2_Oi1l1_cry_0_Z ; wire un2_Oi1l1_cry_0_S ; wire un2_Oi1l1_cry_0_Y ; wire un2_Oi1l1_cry_1_Z ; wire un2_Oi1l1_cry_1_Y ; wire un2_Oi1l1_cry_2_Z ; wire un2_Oi1l1_cry_2_Y ; wire un2_Oi1l1_cry_3_Z ; wire un2_Oi1l1_cry_3_Y ; wire un2_Oi1l1_cry_4_Z ; wire un2_Oi1l1_cry_4_Y ; wire un2_Oi1l1_cry_5_Z ; wire un2_Oi1l1_cry_5_Y ; wire un2_Oi1l1_cry_6_Z ; wire un2_Oi1l1_cry_6_Y ; wire un2_Oi1l1_cry_7_Z ; wire un2_Oi1l1_cry_7_Y ; wire un2_Oi1l1_cry_8_Z ; wire un2_Oi1l1_cry_8_Y ; wire un2_Oi1l1_cry_9_Z ; wire un2_Oi1l1_cry_9_Y ; wire un2_Oi1l1_cry_10_Z ; wire un2_Oi1l1_cry_10_Y ; wire un2_Oi1l1_cry_11_Y ; wire l1il1_2_cry_0_Z ; wire l1il1_2_cry_0_S ; wire l1il1_2_cry_0_Y ; wire I1il1_2_0 ; wire l1il1_2_cry_1_Z ; wire l1il1_2_cry_1_S ; wire l1il1_2_cry_1_Y ; wire I1il1_2_1 ; wire l1il1_2_cry_2_Z ; wire l1il1_2_cry_2_S ; wire l1il1_2_cry_2_Y ; wire I1il1_2_2 ; wire l1il1_2_cry_3_Z ; wire l1il1_2_cry_3_S ; wire l1il1_2_cry_3_Y ; wire I1il1_2_3 ; wire l1il1_2_cry_4_Z ; wire l1il1_2_cry_4_S ; wire l1il1_2_cry_4_Y ; wire I1il1_2_4 ; wire l1il1_2_cry_5_Z ; wire l1il1_2_cry_5_S ; wire l1il1_2_cry_5_Y ; wire I1il1_2_5 ; wire l1il1_2_cry_6_Z ; wire l1il1_2_cry_6_S ; wire l1il1_2_cry_6_Y ; wire I1il1_2_6 ; wire l1il1_2_cry_7_Z ; wire l1il1_2_cry_7_S ; wire l1il1_2_cry_7_Y ; wire I1il1_2_7 ; wire l1il1_2_cry_8_Z ; wire l1il1_2_cry_8_S ; wire l1il1_2_cry_8_Y ; wire I1il1_2_8 ; wire l1il1_2_cry_9_Z ; wire l1il1_2_cry_9_S ; wire l1il1_2_cry_9_Y ; wire I1il1_2_9 ; wire l1il1_2_cry_10_Z ; wire l1il1_2_cry_10_S ; wire l1il1_2_cry_10_Y ; wire I1il1_2_10 ; wire l1il1_2_cry_11_Z ; wire l1il1_2_cry_11_S ; wire l1il1_2_cry_11_Y ; wire I1il1_2_11 ; wire l1il1_2_cry_12_S ; wire l1il1_2_cry_12_Y ; wire un2_o1il1_i ; wire I1il1_2_cry_0_Z ; wire I1il1_2_cry_0_S ; wire I1il1_2_cry_0_Y ; wire I1il1_2_cry_1_Z ; wire I1il1_2_cry_1_S ; wire I1il1_2_cry_1_Y ; wire I1il1_2_cry_2_Z ; wire I1il1_2_cry_2_S ; wire I1il1_2_cry_2_Y ; wire I1il1_2_cry_3_Z ; wire I1il1_2_cry_3_S ; wire I1il1_2_cry_3_Y ; wire I1il1_2_cry_4_Z ; wire I1il1_2_cry_4_S ; wire I1il1_2_cry_4_Y ; wire I1il1_2_cry_5_Z ; wire I1il1_2_cry_5_S ; wire I1il1_2_cry_5_Y ; wire I1il1_2_cry_6_Z ; wire I1il1_2_cry_6_S ; wire I1il1_2_cry_6_Y ; wire I1il1_2_cry_7_Z ; wire I1il1_2_cry_7_S ; wire I1il1_2_cry_7_Y ; wire I1il1_2_cry_8_Z ; wire I1il1_2_cry_8_S ; wire I1il1_2_cry_8_Y ; wire I1il1_2_cry_9_Z ; wire I1il1_2_cry_9_S ; wire I1il1_2_cry_9_Y ; wire I1il1_2_cry_10_Z ; wire I1il1_2_cry_10_S ; wire I1il1_2_cry_10_Y ; wire I1il1_2_cry_11_Z ; wire I1il1_2_cry_11_S ; wire I1il1_2_cry_11_Y ; wire I1il1_2_cry_12_S ; wire I1il1_2_cry_12_Y ; wire N_116_1 ; wire N_123 ; wire un1_O1il1_1_4_Z ; wire un1_O1il1_2_4_Z ; wire un1_i0il1_11_Z ; wire un1_i0il1_10_Z ; wire un1_i0il1_9_Z ; wire un1_i0il1_8_Z ; wire un1_O1il1_2_Z ; wire un1_O1il1_1_Z ; // @28:453701 SLE \i0il1[15] ( .Q(i0il1_Z[15]), .ADn(GND), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0il1_s[15]), .EN(i0il1e), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:453701 SLE \i0il1[14] ( .Q(i0il1_Z[14]), .ADn(GND), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0il1_s[14]), .EN(i0il1e), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:453701 SLE \i0il1[13] ( .Q(i0il1_Z[13]), .ADn(GND), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0il1_s[13]), .EN(i0il1e), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:453701 SLE \i0il1[12] ( .Q(i0il1_Z[12]), .ADn(GND), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0il1_s[12]), .EN(i0il1e), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:453701 SLE \i0il1[11] ( .Q(i0il1_Z[11]), .ADn(GND), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0il1_s[11]), .EN(i0il1e), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:453701 SLE \i0il1[10] ( .Q(i0il1_Z[10]), .ADn(GND), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0il1_s[10]), .EN(i0il1e), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:453701 SLE \i0il1[9] ( .Q(i0il1_Z[9]), .ADn(GND), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0il1_s[9]), .EN(i0il1e), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:453701 SLE \i0il1[8] ( .Q(i0il1_Z[8]), .ADn(GND), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0il1_s[8]), .EN(i0il1e), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:453701 SLE \i0il1[7] ( .Q(i0il1_Z[7]), .ADn(GND), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0il1_s[7]), .EN(i0il1e), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:453701 SLE \i0il1[6] ( .Q(i0il1_Z[6]), .ADn(GND), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0il1_s[6]), .EN(i0il1e), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:453701 SLE \i0il1[5] ( .Q(i0il1_Z[5]), .ADn(GND), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0il1_s[5]), .EN(i0il1e), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:453701 SLE \i0il1[4] ( .Q(i0il1_Z[4]), .ADn(GND), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0il1_s[4]), .EN(i0il1e), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:453701 SLE \i0il1[3] ( .Q(i0il1_Z[3]), .ADn(GND), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0il1_s[3]), .EN(i0il1e), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:453701 SLE \i0il1[2] ( .Q(i0il1_Z[2]), .ADn(GND), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0il1_s[2]), .EN(i0il1e), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:453701 SLE \i0il1[1] ( .Q(i0il1_Z[1]), .ADn(GND), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0il1_s[1]), .EN(i0il1e), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:453701 SLE \i0il1[0] ( .Q(i0il1_Z[0]), .ADn(GND), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0il1_s[0]), .EN(i0il1e), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454184 SLE Ooil1 ( .Q(Ooil1_Z), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ioil1_Z[12]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454145 SLE i1il1 ( .Q(i1il1_Z), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ooil1_Z[12]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454287 SLE iO1I1 ( .Q(iO1I1_1z), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(loil1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454433 SLE Iiil1 ( .Q(Iiil1_1z), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Oiil1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454255 SLE loil1 ( .Q(loil1_Z), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Ioil1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454401 SLE Oiil1 ( .Q(Oiil1_Z), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OIoI1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454223 SLE Ioil1 ( .Q(Ioil1_Z), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oO1I1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:453985 SLE l1il1 ( .Q(l1il1_Z), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l1il1_2), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:453945 SLE I1il1 ( .Q(I1il1_Z), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I1il1_2), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:453648 SLE iiOI1 ( .Q(iiOI1_1z), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iiOI1_2_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:453441 SLE \o0il1[5] ( .Q(o0il1_Z[5]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_108_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:453441 SLE \o0il1[4] ( .Q(o0il1_Z[4]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o0il1_8[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:453441 SLE \o0il1[3] ( .Q(o0il1_Z[3]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o0il1_8[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:453441 SLE \o0il1_Z[2] ( .Q(o0il1[2]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_104_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:453441 SLE \o0il1_Z[1] ( .Q(o0il1[1]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o0il1_8[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:453441 SLE \o0il1_Z[0] ( .Q(o0il1[0]), .ADn(GND), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o0il1_8[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454079 SLE \Oi1l1[5] ( .Q(Oi1l1_Z[5]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un2_Oi1l1_cry_5_S), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454079 SLE \Oi1l1[4] ( .Q(Oi1l1_Z[4]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un2_Oi1l1_cry_4_S), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454079 SLE \Oi1l1[3] ( .Q(Oi1l1_Z[3]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un2_Oi1l1_cry_3_S), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454079 SLE \Oi1l1[2] ( .Q(Oi1l1_Z[2]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un2_Oi1l1_cry_2_S), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454079 SLE \Oi1l1[1] ( .Q(Oi1l1_Z[1]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un2_Oi1l1_cry_1_S), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454079 SLE \Oi1l1[0] ( .Q(Oi1l1_Z[0]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un2_Oi1l1_axb_0_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454025 SLE \io1l1[7] ( .Q(io1l1_Z[7]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un2_io1l1_cry_7_S), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454025 SLE \io1l1[6] ( .Q(io1l1_Z[6]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un2_io1l1_cry_6_S), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454025 SLE \io1l1[5] ( .Q(io1l1_Z[5]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un2_io1l1_cry_5_S), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454025 SLE \io1l1[4] ( .Q(io1l1_Z[4]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un2_io1l1_cry_4_S), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454025 SLE \io1l1[3] ( .Q(io1l1_Z[3]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un2_io1l1_cry_3_S), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454025 SLE \io1l1[2] ( .Q(io1l1_Z[2]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un2_io1l1_cry_2_S), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454025 SLE \io1l1[1] ( .Q(io1l1_Z[1]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un2_io1l1_cry_1_S), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454025 SLE \io1l1[0] ( .Q(io1l1_Z[0]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un2_io1l1_axb_0_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454079 SLE \Oi1l1[12] ( .Q(Oi1l1_Z[12]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un2_Oi1l1_cry_11_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454079 SLE \Oi1l1[11] ( .Q(Oi1l1_Z[11]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un2_Oi1l1_cry_11_S), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454079 SLE \Oi1l1[10] ( .Q(Oi1l1_Z[10]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un2_Oi1l1_cry_10_S), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454079 SLE \Oi1l1[9] ( .Q(Oi1l1_Z[9]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un2_Oi1l1_cry_9_S), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454079 SLE \Oi1l1[8] ( .Q(Oi1l1_Z[8]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un2_Oi1l1_cry_8_S), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454079 SLE \Oi1l1[7] ( .Q(Oi1l1_Z[7]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un2_Oi1l1_cry_7_S), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454079 SLE \Oi1l1[6] ( .Q(Oi1l1_Z[6]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un2_Oi1l1_cry_6_S), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454362 SLE \ioil1[10] ( .Q(ioil1_Z[10]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lO1I1[10]), .EN(ooil15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454362 SLE \ioil1[9] ( .Q(ioil1_Z[9]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lO1I1[9]), .EN(ooil15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454362 SLE \ioil1[8] ( .Q(ioil1_Z[8]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lO1I1[8]), .EN(ooil15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454362 SLE \ioil1[7] ( .Q(ioil1_Z[7]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lO1I1[7]), .EN(ooil15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454362 SLE \ioil1[6] ( .Q(ioil1_Z[6]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lO1I1[6]), .EN(ooil15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454362 SLE \ioil1[5] ( .Q(ioil1_Z[5]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lO1I1[5]), .EN(ooil15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454362 SLE \ioil1[4] ( .Q(ioil1_Z[4]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lO1I1[4]), .EN(ooil15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454362 SLE \ioil1[3] ( .Q(ioil1_Z[3]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lO1I1[3]), .EN(ooil15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454362 SLE \ioil1[2] ( .Q(ioil1_Z[2]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lO1I1[2]), .EN(ooil15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454362 SLE \ioil1[1] ( .Q(ioil1_Z[1]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lO1I1[1]), .EN(ooil15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454362 SLE \ioil1[0] ( .Q(ioil1_Z[0]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lO1I1[0]), .EN(ooil15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454025 SLE \io1l1[11] ( .Q(io1l1_Z[11]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un2_io1l1_s_11_S), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454025 SLE \io1l1[10] ( .Q(io1l1_Z[10]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un2_io1l1_cry_10_S), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454025 SLE \io1l1[9] ( .Q(io1l1_Z[9]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un2_io1l1_cry_9_S), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454025 SLE \io1l1[8] ( .Q(io1l1_Z[8]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un2_io1l1_cry_8_S), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454323 SLE \ooil1[12] ( .Q(ooil1_Z[12]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IO1I1[12]), .EN(ooil15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454323 SLE \ooil1[11] ( .Q(ooil1_Z[11]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IO1I1[11]), .EN(ooil15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454323 SLE \ooil1[10] ( .Q(ooil1_Z[10]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IO1I1[10]), .EN(ooil15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454323 SLE \ooil1[9] ( .Q(ooil1_Z[9]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IO1I1[9]), .EN(ooil15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454323 SLE \ooil1[8] ( .Q(ooil1_Z[8]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IO1I1[8]), .EN(ooil15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454323 SLE \ooil1[7] ( .Q(ooil1_Z[7]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IO1I1[7]), .EN(ooil15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454323 SLE \ooil1[6] ( .Q(ooil1_Z[6]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IO1I1[6]), .EN(ooil15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454323 SLE \ooil1[5] ( .Q(ooil1_Z[5]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IO1I1[5]), .EN(ooil15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454323 SLE \ooil1[4] ( .Q(ooil1_Z[4]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IO1I1[4]), .EN(ooil15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454323 SLE \ooil1[3] ( .Q(ooil1_Z[3]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IO1I1[3]), .EN(ooil15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454323 SLE \ooil1[2] ( .Q(ooil1_Z[2]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IO1I1[2]), .EN(ooil15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454323 SLE \ooil1[1] ( .Q(ooil1_Z[1]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IO1I1[1]), .EN(ooil15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454323 SLE \ooil1[0] ( .Q(ooil1_Z[0]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IO1I1[0]), .EN(ooil15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454362 SLE \ioil1[12] ( .Q(ioil1_Z[12]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lO1I1[12]), .EN(ooil15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:454362 SLE \ioil1[11] ( .Q(ioil1_Z[11]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lO1I1[11]), .EN(ooil15_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:453826 SLE \O1il1[6] ( .Q(O1il1_Z[6]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un1_O1il1_4_s_6_S), .EN(VCC), .LAT(GND), .SD(GND), .SLn(N_4_i) ); // @28:453826 SLE \O1il1[5] ( .Q(O1il1_Z[5]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un1_O1il1_4_cry_5_S), .EN(VCC), .LAT(GND), .SD(GND), .SLn(N_4_i) ); // @28:453826 SLE \O1il1[4] ( .Q(O1il1_Z[4]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un1_O1il1_4_cry_4_S), .EN(VCC), .LAT(GND), .SD(GND), .SLn(N_4_i) ); // @28:453826 SLE \O1il1[3] ( .Q(O1il1_Z[3]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un1_O1il1_4_cry_3_S), .EN(VCC), .LAT(GND), .SD(GND), .SLn(N_4_i) ); // @28:453826 SLE \O1il1[2] ( .Q(O1il1_Z[2]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un1_O1il1_4_cry_2_S), .EN(VCC), .LAT(GND), .SD(GND), .SLn(N_4_i) ); // @28:453826 SLE \O1il1[1] ( .Q(O1il1_Z[1]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un1_O1il1_4_cry_1_0_S), .EN(VCC), .LAT(GND), .SD(GND), .SLn(N_4_i) ); // @28:453826 SLE \O1il1[0] ( .Q(O1il1_Z[0]), .ADn(VCC), .ALn(i0oI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un1_O1il1_4_cry_0_Y), .EN(VCC), .LAT(GND), .SD(GND), .SLn(N_4_i) ); // @28:453731 ARI1 un1_i0il1_RNI7ILUL ( .FCO(i0il1_cry_cy), .S(un1_i0il1_RNI7ILUL_S), .Y(un1_i0il1_RNI7ILUL_Y), .B(un1_i0il1_i), .C(o0il1_Z[3]), .D(o0il1[2]), .A(o0il1[1]), .FCI(VCC) ); defparam un1_i0il1_RNI7ILUL.INIT=20'h44447; // @28:453731 ARI1 \i0il1_RNI84QVH1[0] ( .FCO(i0il1_cry[0]), .S(i0il1_s[0]), .Y(i0il1_RNI84QVH1_Y[0]), .B(un1_i0il1_RNI7ILUL_Y), .C(i0il1_Z[0]), .D(i01I1[0]), .A(VCC), .FCI(i0il1_cry_cy) ); defparam \i0il1_RNI84QVH1[0] .INIT=20'h61B00; // @28:453731 ARI1 \i0il1_RNIBOU0E2[1] ( .FCO(i0il1_cry[1]), .S(i0il1_s[1]), .Y(i0il1_RNIBOU0E2_Y[1]), .B(un1_i0il1_RNI7ILUL_Y), .C(i0il1_Z[1]), .D(i01I1[1]), .A(VCC), .FCI(i0il1_cry[0]) ); defparam \i0il1_RNIBOU0E2[1] .INIT=20'h61B00; // @28:453731 ARI1 \i0il1_RNIGE32A3[2] ( .FCO(i0il1_cry[2]), .S(i0il1_s[2]), .Y(i0il1_RNIGE32A3_Y[2]), .B(un1_i0il1_RNI7ILUL_Y), .C(i0il1_Z[2]), .D(i01I1[2]), .A(VCC), .FCI(i0il1_cry[1]) ); defparam \i0il1_RNIGE32A3[2] .INIT=20'h61B00; // @28:453731 ARI1 \i0il1_RNIN68364[3] ( .FCO(i0il1_cry[3]), .S(i0il1_s[3]), .Y(i0il1_RNIN68364_Y[3]), .B(un1_i0il1_RNI7ILUL_Y), .C(i0il1_Z[3]), .D(i01I1[3]), .A(VCC), .FCI(i0il1_cry[2]) ); defparam \i0il1_RNIN68364[3] .INIT=20'h61B00; // @28:453731 ARI1 \i0il1_RNI01D425[4] ( .FCO(i0il1_cry[4]), .S(i0il1_s[4]), .Y(i0il1_RNI01D425_Y[4]), .B(un1_i0il1_RNI7ILUL_Y), .C(i0il1_Z[4]), .D(i01I1[4]), .A(VCC), .FCI(i0il1_cry[3]) ); defparam \i0il1_RNI01D425[4] .INIT=20'h61B00; // @28:453731 ARI1 \i0il1_RNIBTH5U5[5] ( .FCO(i0il1_cry[5]), .S(i0il1_s[5]), .Y(i0il1_RNIBTH5U5_Y[5]), .B(un1_i0il1_RNI7ILUL_Y), .C(i0il1_Z[5]), .D(i01I1[5]), .A(VCC), .FCI(i0il1_cry[4]) ); defparam \i0il1_RNIBTH5U5[5] .INIT=20'h61B00; // @28:453731 ARI1 \i0il1_RNIORM6Q6[6] ( .FCO(i0il1_cry[6]), .S(i0il1_s[6]), .Y(i0il1_RNIORM6Q6_Y[6]), .B(un1_i0il1_RNI7ILUL_Y), .C(i0il1_Z[6]), .D(i01I1[6]), .A(VCC), .FCI(i0il1_cry[5]) ); defparam \i0il1_RNIORM6Q6[6] .INIT=20'h61B00; // @28:453731 ARI1 \i0il1_RNI7SR7M7[7] ( .FCO(i0il1_cry[7]), .S(i0il1_s[7]), .Y(i0il1_RNI7SR7M7_Y[7]), .B(un1_i0il1_RNI7ILUL_Y), .C(i0il1_Z[7]), .D(i01I1[7]), .A(VCC), .FCI(i0il1_cry[6]) ); defparam \i0il1_RNI7SR7M7[7] .INIT=20'h61B00; // @28:453731 ARI1 \i0il1_RNIOU09I8[8] ( .FCO(i0il1_cry[8]), .S(i0il1_s[8]), .Y(i0il1_RNIOU09I8_Y[8]), .B(un1_i0il1_RNI7ILUL_Y), .C(i0il1_Z[8]), .D(i01I1[8]), .A(VCC), .FCI(i0il1_cry[7]) ); defparam \i0il1_RNIOU09I8[8] .INIT=20'h61B00; // @28:453731 ARI1 \i0il1_RNIB36AE9[9] ( .FCO(i0il1_cry[9]), .S(i0il1_s[9]), .Y(i0il1_RNIB36AE9_Y[9]), .B(un1_i0il1_RNI7ILUL_Y), .C(i0il1_Z[9]), .D(i01I1[9]), .A(VCC), .FCI(i0il1_cry[8]) ); defparam \i0il1_RNIB36AE9[9] .INIT=20'h61B00; // @28:453731 ARI1 \i0il1_RNIES9Q4A[10] ( .FCO(i0il1_cry[10]), .S(i0il1_s[10]), .Y(i0il1_RNIES9Q4A_Y[10]), .B(un1_i0il1_RNI7ILUL_Y), .C(i0il1_Z[10]), .D(i01I1[10]), .A(VCC), .FCI(i0il1_cry[9]) ); defparam \i0il1_RNIES9Q4A[10] .INIT=20'h61B00; // @28:453731 ARI1 \i0il1_RNIJNDARA[11] ( .FCO(i0il1_cry[11]), .S(i0il1_s[11]), .Y(i0il1_RNIJNDARA_Y[11]), .B(un1_i0il1_RNI7ILUL_Y), .C(i0il1_Z[11]), .D(i01I1[11]), .A(VCC), .FCI(i0il1_cry[10]) ); defparam \i0il1_RNIJNDARA[11] .INIT=20'h61B00; // @28:453731 ARI1 \i0il1_RNIQKHQHB[12] ( .FCO(i0il1_cry[12]), .S(i0il1_s[12]), .Y(i0il1_RNIQKHQHB_Y[12]), .B(un1_i0il1_RNI7ILUL_Y), .C(i0il1_Z[12]), .D(i01I1[12]), .A(VCC), .FCI(i0il1_cry[11]) ); defparam \i0il1_RNIQKHQHB[12] .INIT=20'h61B00; // @28:453731 ARI1 \i0il1_RNI3KLA8C[13] ( .FCO(i0il1_cry[13]), .S(i0il1_s[13]), .Y(i0il1_RNI3KLA8C_Y[13]), .B(un1_i0il1_RNI7ILUL_Y), .C(i0il1_Z[13]), .D(i01I1[13]), .A(VCC), .FCI(i0il1_cry[12]) ); defparam \i0il1_RNI3KLA8C[13] .INIT=20'h61B00; // @28:453731 ARI1 \i0il1_RNO[15] ( .FCO(i0il1_RNO_FCO[15]), .S(i0il1_s[15]), .Y(i0il1_RNO_Y[15]), .B(un1_i0il1_RNI7ILUL_Y), .C(i0il1_Z[15]), .D(i01I1[15]), .A(VCC), .FCI(i0il1_cry[14]) ); defparam \i0il1_RNO[15] .INIT=20'h41B00; // @28:453731 ARI1 \i0il1_RNIELPQUC[14] ( .FCO(i0il1_cry[14]), .S(i0il1_s[14]), .Y(i0il1_RNIELPQUC_Y[14]), .B(un1_i0il1_RNI7ILUL_Y), .C(i0il1_Z[14]), .D(i01I1[14]), .A(VCC), .FCI(i0il1_cry[13]) ); defparam \i0il1_RNIELPQUC[14] .INIT=20'h61B00; // @28:453836 ARI1 un1_O1il1_4_cry_0 ( .FCO(un1_O1il1_4_cry_0_Z), .S(un1_O1il1_4_cry_0_S), .Y(un1_O1il1_4_cry_0_Y), .B(O1il112), .C(l11I1), .D(GND), .A(O1il1_Z[0]), .FCI(GND) ); defparam un1_O1il1_4_cry_0.INIT=20'h5DD22; // @28:453836 ARI1 un1_O1il1_4_cry_1_0 ( .FCO(un1_O1il1_4_cry_1), .S(un1_O1il1_4_cry_1_0_S), .Y(un1_O1il1_4_cry_1_0_Y), .B(l11I1), .C(O1il112), .D(GND), .A(O1il1_Z[1]), .FCI(un1_O1il1_4_cry_0_Z) ); defparam un1_O1il1_4_cry_1_0.INIT=20'h57788; // @28:453836 ARI1 un1_O1il1_4_cry_2 ( .FCO(un1_O1il1_4_cry_2_Z), .S(un1_O1il1_4_cry_2_S), .Y(un1_O1il1_4_cry_2_Y), .B(O1il1_Z[2]), .C(GND), .D(GND), .A(VCC), .FCI(un1_O1il1_4_cry_1) ); defparam un1_O1il1_4_cry_2.INIT=20'h4AA00; // @28:453836 ARI1 un1_O1il1_4_cry_3 ( .FCO(un1_O1il1_4_cry_3_Z), .S(un1_O1il1_4_cry_3_S), .Y(un1_O1il1_4_cry_3_Y), .B(O1il1_Z[3]), .C(GND), .D(GND), .A(VCC), .FCI(un1_O1il1_4_cry_2_Z) ); defparam un1_O1il1_4_cry_3.INIT=20'h4AA00; // @28:453836 ARI1 un1_O1il1_4_cry_4 ( .FCO(un1_O1il1_4_cry_4_Z), .S(un1_O1il1_4_cry_4_S), .Y(un1_O1il1_4_cry_4_Y), .B(O1il1_Z[4]), .C(GND), .D(GND), .A(VCC), .FCI(un1_O1il1_4_cry_3_Z) ); defparam un1_O1il1_4_cry_4.INIT=20'h4AA00; // @28:453836 ARI1 un1_O1il1_4_s_6 ( .FCO(un1_O1il1_4_s_6_FCO), .S(un1_O1il1_4_s_6_S), .Y(un1_O1il1_4_s_6_Y), .B(O1il1_Z[6]), .C(GND), .D(GND), .A(VCC), .FCI(un1_O1il1_4_cry_5_Z) ); defparam un1_O1il1_4_s_6.INIT=20'h4AA00; // @28:453836 ARI1 un1_O1il1_4_cry_5 ( .FCO(un1_O1il1_4_cry_5_Z), .S(un1_O1il1_4_cry_5_S), .Y(un1_O1il1_4_cry_5_Y), .B(O1il1_Z[5]), .C(GND), .D(GND), .A(VCC), .FCI(un1_O1il1_4_cry_4_Z) ); defparam un1_O1il1_4_cry_5.INIT=20'h4AA00; // @28:454056 ARI1 un2_io1l1_cry_0 ( .FCO(un2_io1l1_cry_0_Z), .S(un2_io1l1_cry_0_S), .Y(un2_io1l1_cry_0_Y), .B(ioil1_Z[0]), .C(GND), .D(GND), .A(ooil1_Z[0]), .FCI(VCC) ); defparam un2_io1l1_cry_0.INIT=20'h5AA55; // @28:454056 ARI1 un2_io1l1_cry_1 ( .FCO(un2_io1l1_cry_1_Z), .S(un2_io1l1_cry_1_S), .Y(un2_io1l1_cry_1_Y), .B(ioil1_Z[1]), .C(GND), .D(GND), .A(ooil1_Z[1]), .FCI(un2_io1l1_cry_0_Z) ); defparam un2_io1l1_cry_1.INIT=20'h5AA55; // @28:454056 ARI1 un2_io1l1_cry_2 ( .FCO(un2_io1l1_cry_2_Z), .S(un2_io1l1_cry_2_S), .Y(un2_io1l1_cry_2_Y), .B(ioil1_Z[2]), .C(GND), .D(GND), .A(ooil1_Z[2]), .FCI(un2_io1l1_cry_1_Z) ); defparam un2_io1l1_cry_2.INIT=20'h5AA55; // @28:454056 ARI1 un2_io1l1_cry_3 ( .FCO(un2_io1l1_cry_3_Z), .S(un2_io1l1_cry_3_S), .Y(un2_io1l1_cry_3_Y), .B(ioil1_Z[3]), .C(GND), .D(GND), .A(ooil1_Z[3]), .FCI(un2_io1l1_cry_2_Z) ); defparam un2_io1l1_cry_3.INIT=20'h5AA55; // @28:454056 ARI1 un2_io1l1_cry_4 ( .FCO(un2_io1l1_cry_4_Z), .S(un2_io1l1_cry_4_S), .Y(un2_io1l1_cry_4_Y), .B(ioil1_Z[4]), .C(GND), .D(GND), .A(ooil1_Z[4]), .FCI(un2_io1l1_cry_3_Z) ); defparam un2_io1l1_cry_4.INIT=20'h5AA55; // @28:454056 ARI1 un2_io1l1_cry_5 ( .FCO(un2_io1l1_cry_5_Z), .S(un2_io1l1_cry_5_S), .Y(un2_io1l1_cry_5_Y), .B(ioil1_Z[5]), .C(GND), .D(GND), .A(ooil1_Z[5]), .FCI(un2_io1l1_cry_4_Z) ); defparam un2_io1l1_cry_5.INIT=20'h5AA55; // @28:454056 ARI1 un2_io1l1_cry_6 ( .FCO(un2_io1l1_cry_6_Z), .S(un2_io1l1_cry_6_S), .Y(un2_io1l1_cry_6_Y), .B(ioil1_Z[6]), .C(GND), .D(GND), .A(ooil1_Z[6]), .FCI(un2_io1l1_cry_5_Z) ); defparam un2_io1l1_cry_6.INIT=20'h5AA55; // @28:454056 ARI1 un2_io1l1_cry_7 ( .FCO(un2_io1l1_cry_7_Z), .S(un2_io1l1_cry_7_S), .Y(un2_io1l1_cry_7_Y), .B(ioil1_Z[7]), .C(GND), .D(GND), .A(ooil1_Z[7]), .FCI(un2_io1l1_cry_6_Z) ); defparam un2_io1l1_cry_7.INIT=20'h5AA55; // @28:454056 ARI1 un2_io1l1_cry_8 ( .FCO(un2_io1l1_cry_8_Z), .S(un2_io1l1_cry_8_S), .Y(un2_io1l1_cry_8_Y), .B(ioil1_Z[8]), .C(GND), .D(GND), .A(ooil1_Z[8]), .FCI(un2_io1l1_cry_7_Z) ); defparam un2_io1l1_cry_8.INIT=20'h5AA55; // @28:454056 ARI1 un2_io1l1_cry_9 ( .FCO(un2_io1l1_cry_9_Z), .S(un2_io1l1_cry_9_S), .Y(un2_io1l1_cry_9_Y), .B(ioil1_Z[9]), .C(GND), .D(GND), .A(ooil1_Z[9]), .FCI(un2_io1l1_cry_8_Z) ); defparam un2_io1l1_cry_9.INIT=20'h5AA55; // @28:454056 ARI1 un2_io1l1_s_11 ( .FCO(un2_io1l1_s_11_FCO), .S(un2_io1l1_s_11_S), .Y(un2_io1l1_s_11_Y), .B(ioil1_Z[11]), .C(ooil1_Z[11]), .D(GND), .A(VCC), .FCI(un2_io1l1_cry_10_Z) ); defparam un2_io1l1_s_11.INIT=20'h49900; // @28:454056 ARI1 un2_io1l1_cry_10 ( .FCO(un2_io1l1_cry_10_Z), .S(un2_io1l1_cry_10_S), .Y(un2_io1l1_cry_10_Y), .B(ioil1_Z[10]), .C(GND), .D(GND), .A(ooil1_Z[10]), .FCI(un2_io1l1_cry_9_Z) ); defparam un2_io1l1_cry_10.INIT=20'h5AA55; // @28:454111 ARI1 un2_Oi1l1_cry_0 ( .FCO(un2_Oi1l1_cry_0_Z), .S(un2_Oi1l1_cry_0_S), .Y(un2_Oi1l1_cry_0_Y), .B(ioil1_Z[0]), .C(GND), .D(GND), .A(ooil1_Z[0]), .FCI(VCC) ); defparam un2_Oi1l1_cry_0.INIT=20'h5AA55; // @28:454111 ARI1 un2_Oi1l1_cry_1 ( .FCO(un2_Oi1l1_cry_1_Z), .S(un2_Oi1l1_cry_1_S), .Y(un2_Oi1l1_cry_1_Y), .B(ioil1_Z[1]), .C(GND), .D(GND), .A(ooil1_Z[1]), .FCI(un2_Oi1l1_cry_0_Z) ); defparam un2_Oi1l1_cry_1.INIT=20'h5AA55; // @28:454111 ARI1 un2_Oi1l1_cry_2 ( .FCO(un2_Oi1l1_cry_2_Z), .S(un2_Oi1l1_cry_2_S), .Y(un2_Oi1l1_cry_2_Y), .B(ioil1_Z[2]), .C(GND), .D(GND), .A(ooil1_Z[2]), .FCI(un2_Oi1l1_cry_1_Z) ); defparam un2_Oi1l1_cry_2.INIT=20'h5AA55; // @28:454111 ARI1 un2_Oi1l1_cry_3 ( .FCO(un2_Oi1l1_cry_3_Z), .S(un2_Oi1l1_cry_3_S), .Y(un2_Oi1l1_cry_3_Y), .B(ioil1_Z[3]), .C(GND), .D(GND), .A(ooil1_Z[3]), .FCI(un2_Oi1l1_cry_2_Z) ); defparam un2_Oi1l1_cry_3.INIT=20'h5AA55; // @28:454111 ARI1 un2_Oi1l1_cry_4 ( .FCO(un2_Oi1l1_cry_4_Z), .S(un2_Oi1l1_cry_4_S), .Y(un2_Oi1l1_cry_4_Y), .B(ioil1_Z[4]), .C(GND), .D(GND), .A(ooil1_Z[4]), .FCI(un2_Oi1l1_cry_3_Z) ); defparam un2_Oi1l1_cry_4.INIT=20'h5AA55; // @28:454111 ARI1 un2_Oi1l1_cry_5 ( .FCO(un2_Oi1l1_cry_5_Z), .S(un2_Oi1l1_cry_5_S), .Y(un2_Oi1l1_cry_5_Y), .B(ioil1_Z[5]), .C(GND), .D(GND), .A(ooil1_Z[5]), .FCI(un2_Oi1l1_cry_4_Z) ); defparam un2_Oi1l1_cry_5.INIT=20'h5AA55; // @28:454111 ARI1 un2_Oi1l1_cry_6 ( .FCO(un2_Oi1l1_cry_6_Z), .S(un2_Oi1l1_cry_6_S), .Y(un2_Oi1l1_cry_6_Y), .B(ioil1_Z[6]), .C(GND), .D(GND), .A(ooil1_Z[6]), .FCI(un2_Oi1l1_cry_5_Z) ); defparam un2_Oi1l1_cry_6.INIT=20'h5AA55; // @28:454111 ARI1 un2_Oi1l1_cry_7 ( .FCO(un2_Oi1l1_cry_7_Z), .S(un2_Oi1l1_cry_7_S), .Y(un2_Oi1l1_cry_7_Y), .B(ioil1_Z[7]), .C(GND), .D(GND), .A(ooil1_Z[7]), .FCI(un2_Oi1l1_cry_6_Z) ); defparam un2_Oi1l1_cry_7.INIT=20'h5AA55; // @28:454111 ARI1 un2_Oi1l1_cry_8 ( .FCO(un2_Oi1l1_cry_8_Z), .S(un2_Oi1l1_cry_8_S), .Y(un2_Oi1l1_cry_8_Y), .B(ioil1_Z[8]), .C(GND), .D(GND), .A(ooil1_Z[8]), .FCI(un2_Oi1l1_cry_7_Z) ); defparam un2_Oi1l1_cry_8.INIT=20'h5AA55; // @28:454111 ARI1 un2_Oi1l1_cry_9 ( .FCO(un2_Oi1l1_cry_9_Z), .S(un2_Oi1l1_cry_9_S), .Y(un2_Oi1l1_cry_9_Y), .B(ioil1_Z[9]), .C(GND), .D(GND), .A(ooil1_Z[9]), .FCI(un2_Oi1l1_cry_8_Z) ); defparam un2_Oi1l1_cry_9.INIT=20'h5AA55; // @28:454111 ARI1 un2_Oi1l1_cry_10 ( .FCO(un2_Oi1l1_cry_10_Z), .S(un2_Oi1l1_cry_10_S), .Y(un2_Oi1l1_cry_10_Y), .B(ioil1_Z[10]), .C(GND), .D(GND), .A(ooil1_Z[10]), .FCI(un2_Oi1l1_cry_9_Z) ); defparam un2_Oi1l1_cry_10.INIT=20'h5AA55; // @28:454111 ARI1 un2_Oi1l1_cry_11 ( .FCO(un2_Oi1l1_cry_11_Z), .S(un2_Oi1l1_cry_11_S), .Y(un2_Oi1l1_cry_11_Y), .B(ioil1_Z[11]), .C(GND), .D(GND), .A(ooil1_Z[11]), .FCI(un2_Oi1l1_cry_10_Z) ); defparam un2_Oi1l1_cry_11.INIT=20'h5AA55; // @28:454019 ARI1 l1il1_2_cry_0 ( .FCO(l1il1_2_cry_0_Z), .S(l1il1_2_cry_0_S), .Y(l1il1_2_cry_0_Y), .B(I11I1[0]), .C(GND), .D(GND), .A(I1il1_2_0), .FCI(GND) ); defparam l1il1_2_cry_0.INIT=20'h5AA55; // @28:454019 ARI1 l1il1_2_cry_1 ( .FCO(l1il1_2_cry_1_Z), .S(l1il1_2_cry_1_S), .Y(l1il1_2_cry_1_Y), .B(I11I1[1]), .C(GND), .D(GND), .A(I1il1_2_1), .FCI(l1il1_2_cry_0_Z) ); defparam l1il1_2_cry_1.INIT=20'h5AA55; // @28:454019 ARI1 l1il1_2_cry_2 ( .FCO(l1il1_2_cry_2_Z), .S(l1il1_2_cry_2_S), .Y(l1il1_2_cry_2_Y), .B(I11I1[2]), .C(GND), .D(GND), .A(I1il1_2_2), .FCI(l1il1_2_cry_1_Z) ); defparam l1il1_2_cry_2.INIT=20'h5AA55; // @28:454019 ARI1 l1il1_2_cry_3 ( .FCO(l1il1_2_cry_3_Z), .S(l1il1_2_cry_3_S), .Y(l1il1_2_cry_3_Y), .B(I11I1[3]), .C(GND), .D(GND), .A(I1il1_2_3), .FCI(l1il1_2_cry_2_Z) ); defparam l1il1_2_cry_3.INIT=20'h5AA55; // @28:454019 ARI1 l1il1_2_cry_4 ( .FCO(l1il1_2_cry_4_Z), .S(l1il1_2_cry_4_S), .Y(l1il1_2_cry_4_Y), .B(I11I1[4]), .C(GND), .D(GND), .A(I1il1_2_4), .FCI(l1il1_2_cry_3_Z) ); defparam l1il1_2_cry_4.INIT=20'h5AA55; // @28:454019 ARI1 l1il1_2_cry_5 ( .FCO(l1il1_2_cry_5_Z), .S(l1il1_2_cry_5_S), .Y(l1il1_2_cry_5_Y), .B(I11I1[5]), .C(GND), .D(GND), .A(I1il1_2_5), .FCI(l1il1_2_cry_4_Z) ); defparam l1il1_2_cry_5.INIT=20'h5AA55; // @28:454019 ARI1 l1il1_2_cry_6 ( .FCO(l1il1_2_cry_6_Z), .S(l1il1_2_cry_6_S), .Y(l1il1_2_cry_6_Y), .B(I11I1[6]), .C(GND), .D(GND), .A(I1il1_2_6), .FCI(l1il1_2_cry_5_Z) ); defparam l1il1_2_cry_6.INIT=20'h5AA55; // @28:454019 ARI1 l1il1_2_cry_7 ( .FCO(l1il1_2_cry_7_Z), .S(l1il1_2_cry_7_S), .Y(l1il1_2_cry_7_Y), .B(I11I1[7]), .C(GND), .D(GND), .A(I1il1_2_7), .FCI(l1il1_2_cry_6_Z) ); defparam l1il1_2_cry_7.INIT=20'h5AA55; // @28:454019 ARI1 l1il1_2_cry_8 ( .FCO(l1il1_2_cry_8_Z), .S(l1il1_2_cry_8_S), .Y(l1il1_2_cry_8_Y), .B(I11I1[8]), .C(GND), .D(GND), .A(I1il1_2_8), .FCI(l1il1_2_cry_7_Z) ); defparam l1il1_2_cry_8.INIT=20'h5AA55; // @28:454019 ARI1 l1il1_2_cry_9 ( .FCO(l1il1_2_cry_9_Z), .S(l1il1_2_cry_9_S), .Y(l1il1_2_cry_9_Y), .B(I11I1[9]), .C(GND), .D(GND), .A(I1il1_2_9), .FCI(l1il1_2_cry_8_Z) ); defparam l1il1_2_cry_9.INIT=20'h5AA55; // @28:454019 ARI1 l1il1_2_cry_10 ( .FCO(l1il1_2_cry_10_Z), .S(l1il1_2_cry_10_S), .Y(l1il1_2_cry_10_Y), .B(I11I1[10]), .C(GND), .D(GND), .A(I1il1_2_10), .FCI(l1il1_2_cry_9_Z) ); defparam l1il1_2_cry_10.INIT=20'h5AA55; // @28:454019 ARI1 l1il1_2_cry_11 ( .FCO(l1il1_2_cry_11_Z), .S(l1il1_2_cry_11_S), .Y(l1il1_2_cry_11_Y), .B(I11I1[11]), .C(GND), .D(GND), .A(I1il1_2_11), .FCI(l1il1_2_cry_10_Z) ); defparam l1il1_2_cry_11.INIT=20'h5AA55; // @28:454019 ARI1 l1il1_2_cry_12 ( .FCO(l1il1_2), .S(l1il1_2_cry_12_S), .Y(l1il1_2_cry_12_Y), .B(Oi1l1_Z[12]), .C(un2_o1il1_i), .D(I11I1[12]), .A(Iiil1_1z), .FCI(l1il1_2_cry_11_Z) ); defparam l1il1_2_cry_12.INIT=20'h5870F; // @28:453979 ARI1 I1il1_2_cry_0 ( .FCO(I1il1_2_cry_0_Z), .S(I1il1_2_cry_0_S), .Y(I1il1_2_cry_0_Y), .B(O11I1_1z[0]), .C(GND), .D(GND), .A(I1il1_2_0), .FCI(GND) ); defparam I1il1_2_cry_0.INIT=20'h5AA55; // @28:453979 ARI1 I1il1_2_cry_1 ( .FCO(I1il1_2_cry_1_Z), .S(I1il1_2_cry_1_S), .Y(I1il1_2_cry_1_Y), .B(O11I1_1z[1]), .C(GND), .D(GND), .A(I1il1_2_1), .FCI(I1il1_2_cry_0_Z) ); defparam I1il1_2_cry_1.INIT=20'h5AA55; // @28:453979 ARI1 I1il1_2_cry_2 ( .FCO(I1il1_2_cry_2_Z), .S(I1il1_2_cry_2_S), .Y(I1il1_2_cry_2_Y), .B(O11I1_1z[2]), .C(GND), .D(GND), .A(I1il1_2_2), .FCI(I1il1_2_cry_1_Z) ); defparam I1il1_2_cry_2.INIT=20'h5AA55; // @28:453979 ARI1 I1il1_2_cry_3 ( .FCO(I1il1_2_cry_3_Z), .S(I1il1_2_cry_3_S), .Y(I1il1_2_cry_3_Y), .B(O11I1_1z[3]), .C(GND), .D(GND), .A(I1il1_2_3), .FCI(I1il1_2_cry_2_Z) ); defparam I1il1_2_cry_3.INIT=20'h5AA55; // @28:453979 ARI1 I1il1_2_cry_4 ( .FCO(I1il1_2_cry_4_Z), .S(I1il1_2_cry_4_S), .Y(I1il1_2_cry_4_Y), .B(O11I1_1z[4]), .C(GND), .D(GND), .A(I1il1_2_4), .FCI(I1il1_2_cry_3_Z) ); defparam I1il1_2_cry_4.INIT=20'h5AA55; // @28:453979 ARI1 I1il1_2_cry_5 ( .FCO(I1il1_2_cry_5_Z), .S(I1il1_2_cry_5_S), .Y(I1il1_2_cry_5_Y), .B(O11I1_1z[5]), .C(GND), .D(GND), .A(I1il1_2_5), .FCI(I1il1_2_cry_4_Z) ); defparam I1il1_2_cry_5.INIT=20'h5AA55; // @28:453979 ARI1 I1il1_2_cry_6 ( .FCO(I1il1_2_cry_6_Z), .S(I1il1_2_cry_6_S), .Y(I1il1_2_cry_6_Y), .B(O11I1_1z[6]), .C(GND), .D(GND), .A(I1il1_2_6), .FCI(I1il1_2_cry_5_Z) ); defparam I1il1_2_cry_6.INIT=20'h5AA55; // @28:453979 ARI1 I1il1_2_cry_7 ( .FCO(I1il1_2_cry_7_Z), .S(I1il1_2_cry_7_S), .Y(I1il1_2_cry_7_Y), .B(O11I1_1z[7]), .C(GND), .D(GND), .A(I1il1_2_7), .FCI(I1il1_2_cry_6_Z) ); defparam I1il1_2_cry_7.INIT=20'h5AA55; // @28:453979 ARI1 I1il1_2_cry_8 ( .FCO(I1il1_2_cry_8_Z), .S(I1il1_2_cry_8_S), .Y(I1il1_2_cry_8_Y), .B(O11I1_1z[8]), .C(GND), .D(GND), .A(I1il1_2_8), .FCI(I1il1_2_cry_7_Z) ); defparam I1il1_2_cry_8.INIT=20'h5AA55; // @28:453979 ARI1 I1il1_2_cry_9 ( .FCO(I1il1_2_cry_9_Z), .S(I1il1_2_cry_9_S), .Y(I1il1_2_cry_9_Y), .B(O11I1_1z[9]), .C(GND), .D(GND), .A(I1il1_2_9), .FCI(I1il1_2_cry_8_Z) ); defparam I1il1_2_cry_9.INIT=20'h5AA55; // @28:453979 ARI1 I1il1_2_cry_10 ( .FCO(I1il1_2_cry_10_Z), .S(I1il1_2_cry_10_S), .Y(I1il1_2_cry_10_Y), .B(O11I1_1z[10]), .C(GND), .D(GND), .A(I1il1_2_10), .FCI(I1il1_2_cry_9_Z) ); defparam I1il1_2_cry_10.INIT=20'h5AA55; // @28:453979 ARI1 I1il1_2_cry_11 ( .FCO(I1il1_2_cry_11_Z), .S(I1il1_2_cry_11_S), .Y(I1il1_2_cry_11_Y), .B(O11I1_1z[11]), .C(GND), .D(GND), .A(I1il1_2_11), .FCI(I1il1_2_cry_10_Z) ); defparam I1il1_2_cry_11.INIT=20'h5AA55; // @28:453979 ARI1 I1il1_2_cry_12 ( .FCO(I1il1_2), .S(I1il1_2_cry_12_S), .Y(I1il1_2_cry_12_Y), .B(Oi1l1_Z[12]), .C(un2_o1il1_i), .D(O11I1_1z[12]), .A(Iiil1_1z), .FCI(I1il1_2_cry_11_Z) ); defparam I1il1_2_cry_12.INIT=20'h5870F; // @28:453470 CFG4 \o0il1_8_0[1] ( .A(I1il1_Z), .B(o0il1_Z[3]), .C(o0il1[0]), .D(o0il1_8_0_1_Z[1]), .Y(o0il1_8[1]) ); defparam \o0il1_8_0[1] .INIT=16'h20FF; // @28:453470 CFG4 \o0il1_8_0_1[1] ( .A(o0il1[1]), .B(N_116_1), .C(N_123), .D(un1_i0il1_i), .Y(o0il1_8_0_1_Z[1]) ); defparam \o0il1_8_0_1[1] .INIT=16'h5F13; // @28:454056 CFG2 un2_io1l1_axb_0_i_0 ( .A(ioil1_Z[0]), .B(ooil1_Z[0]), .Y(un2_io1l1_axb_0_i) ); defparam un2_io1l1_axb_0_i_0.INIT=4'h6; // @28:454111 CFG2 un2_Oi1l1_axb_0_i_0 ( .A(ioil1_Z[0]), .B(ooil1_Z[0]), .Y(un2_Oi1l1_axb_0_i) ); defparam un2_Oi1l1_axb_0_i_0.INIT=4'h6; // @28:453884 CFG3 un2_o0il1_i ( .A(o0il1_Z[3]), .B(o0il1[2]), .C(o0il1[1]), .Y(N_4_i) ); defparam un2_o0il1_i.INIT=8'hFE; // @28:453470 CFG2 \o0il1_8_0_a3_1_1[1] ( .A(o0il1_Z[3]), .B(l1il1_Z), .Y(N_116_1) ); defparam \o0il1_8_0_a3_1_1[1] .INIT=4'h8; // @28:453470 CFG2 \o0il1_8_i_a2[2] ( .A(IliO1), .B(o11I1), .Y(N_123) ); defparam \o0il1_8_i_a2[2] .INIT=4'h2; // @28:453930 CFG2 un2_o1il1 ( .A(Ooil1_Z), .B(i1il1_Z), .Y(un2_o1il1_i) ); defparam un2_o1il1.INIT=4'h6; // @28:454348 CFG2 ooil15 ( .A(loil1_Z), .B(iO1I1_1z), .Y(ooil15_Z) ); defparam ooil15.INIT=4'h2; // @28:453783 CFG4 un1_O1il1_1_4 ( .A(O1il1_Z[4]), .B(O1il1_Z[3]), .C(O1il1_Z[2]), .D(O1il1_Z[0]), .Y(un1_O1il1_1_4_Z) ); defparam un1_O1il1_1_4.INIT=16'h8000; // @28:453770 CFG4 un1_O1il1_2_4 ( .A(O1il1_Z[5]), .B(O1il1_Z[4]), .C(O1il1_Z[3]), .D(O1il1_Z[2]), .Y(un1_O1il1_2_4_Z) ); defparam un1_O1il1_2_4.INIT=16'h8000; // @28:453548 CFG4 un1_i0il1_11 ( .A(i0il1_Z[11]), .B(i0il1_Z[10]), .C(i0il1_Z[9]), .D(i0il1_Z[8]), .Y(un1_i0il1_11_Z) ); defparam un1_i0il1_11.INIT=16'hFFFE; // @28:453548 CFG4 un1_i0il1_10 ( .A(i0il1_Z[15]), .B(i0il1_Z[14]), .C(i0il1_Z[13]), .D(i0il1_Z[12]), .Y(un1_i0il1_10_Z) ); defparam un1_i0il1_10.INIT=16'hFFFE; // @28:453548 CFG4 un1_i0il1_9 ( .A(i0il1_Z[3]), .B(i0il1_Z[2]), .C(i0il1_Z[1]), .D(i0il1_Z[0]), .Y(un1_i0il1_9_Z) ); defparam un1_i0il1_9.INIT=16'hFFFE; // @28:453548 CFG4 un1_i0il1_8 ( .A(i0il1_Z[7]), .B(i0il1_Z[6]), .C(i0il1_Z[5]), .D(i0il1_Z[4]), .Y(un1_i0il1_8_Z) ); defparam un1_i0il1_8.INIT=16'hFFFE; // @28:453884 CFG3 un2_o0il1 ( .A(o0il1_Z[3]), .B(o0il1[2]), .C(o0il1[1]), .Y(O1il112) ); defparam un2_o0il1.INIT=8'hFE; // @28:453610 CFG3 iOiO1 ( .A(o11I1), .B(o0il1_Z[4]), .C(o0il1[1]), .Y(iOiO1_1z) ); defparam iOiO1.INIT=8'h54; // @28:453470 CFG4 \o0il1_8_0[0] ( .A(IliO1), .B(o0il1[0]), .C(o0il1_Z[5]), .D(I1il1_Z), .Y(o0il1_8[0]) ); defparam \o0il1_8_0[0] .INIT=16'hA0EC; // @28:453924 CFG4 \o1il1_1[0] ( .A(Iiil1_1z), .B(un2_o1il1_i), .C(io1l1_Z[0]), .D(Oi1l1_Z[0]), .Y(I1il1_2_0) ); defparam \o1il1_1[0] .INIT=16'hA820; // @28:453924 CFG4 \o1il1_1[1] ( .A(Iiil1_1z), .B(un2_o1il1_i), .C(io1l1_Z[1]), .D(Oi1l1_Z[1]), .Y(I1il1_2_1) ); defparam \o1il1_1[1] .INIT=16'hA820; // @28:453924 CFG4 \o1il1_1[2] ( .A(Iiil1_1z), .B(un2_o1il1_i), .C(io1l1_Z[2]), .D(Oi1l1_Z[2]), .Y(I1il1_2_2) ); defparam \o1il1_1[2] .INIT=16'hA820; // @28:453924 CFG4 \o1il1_1[3] ( .A(Iiil1_1z), .B(un2_o1il1_i), .C(io1l1_Z[3]), .D(Oi1l1_Z[3]), .Y(I1il1_2_3) ); defparam \o1il1_1[3] .INIT=16'hA820; // @28:453924 CFG4 \o1il1_1[4] ( .A(Iiil1_1z), .B(un2_o1il1_i), .C(io1l1_Z[4]), .D(Oi1l1_Z[4]), .Y(I1il1_2_4) ); defparam \o1il1_1[4] .INIT=16'hA820; // @28:453924 CFG4 \o1il1_1[5] ( .A(Iiil1_1z), .B(un2_o1il1_i), .C(io1l1_Z[5]), .D(Oi1l1_Z[5]), .Y(I1il1_2_5) ); defparam \o1il1_1[5] .INIT=16'hA820; // @28:453924 CFG4 \o1il1_1[6] ( .A(Iiil1_1z), .B(un2_o1il1_i), .C(io1l1_Z[6]), .D(Oi1l1_Z[6]), .Y(I1il1_2_6) ); defparam \o1il1_1[6] .INIT=16'hA820; // @28:453924 CFG4 \o1il1_1[7] ( .A(Iiil1_1z), .B(un2_o1il1_i), .C(io1l1_Z[7]), .D(Oi1l1_Z[7]), .Y(I1il1_2_7) ); defparam \o1il1_1[7] .INIT=16'hA820; // @28:453924 CFG4 \o1il1_1[8] ( .A(Iiil1_1z), .B(un2_o1il1_i), .C(io1l1_Z[8]), .D(Oi1l1_Z[8]), .Y(I1il1_2_8) ); defparam \o1il1_1[8] .INIT=16'hA820; // @28:453924 CFG4 \o1il1_1[9] ( .A(Iiil1_1z), .B(un2_o1il1_i), .C(io1l1_Z[9]), .D(Oi1l1_Z[9]), .Y(I1il1_2_9) ); defparam \o1il1_1[9] .INIT=16'hA820; // @28:453924 CFG4 \o1il1_1[10] ( .A(Iiil1_1z), .B(un2_o1il1_i), .C(io1l1_Z[10]), .D(Oi1l1_Z[10]), .Y(I1il1_2_10) ); defparam \o1il1_1[10] .INIT=16'hA820; // @28:453924 CFG4 \o1il1_1[11] ( .A(Iiil1_1z), .B(un2_o1il1_i), .C(io1l1_Z[11]), .D(Oi1l1_Z[11]), .Y(I1il1_2_11) ); defparam \o1il1_1[11] .INIT=16'hA820; // @28:453770 CFG4 un1_O1il1_2 ( .A(O1il1_Z[0]), .B(un1_O1il1_2_4_Z), .C(O1il1_Z[6]), .D(O1il1_Z[1]), .Y(un1_O1il1_2_Z) ); defparam un1_O1il1_2.INIT=16'h4000; // @28:453783 CFG4 un1_O1il1_1 ( .A(O1il1_Z[1]), .B(un1_O1il1_1_4_Z), .C(O1il1_Z[6]), .D(O1il1_Z[5]), .Y(un1_O1il1_1_Z) ); defparam un1_O1il1_1.INIT=16'h8000; // @28:453681 CFG4 iiOI1_2 ( .A(iiOI1_1z), .B(o11I1), .C(o0il1[1]), .D(o0il1_Z[4]), .Y(iiOI1_2_Z) ); defparam iiOI1_2.INIT=16'hC0C8; // @28:453470 CFG4 \o0il1_8_0[4] ( .A(o0il1_Z[4]), .B(l1il1_Z), .C(N_123), .D(o0il1_Z[3]), .Y(o0il1_8[4]) ); defparam \o0il1_8_0[4] .INIT=16'hB3A0; // @28:453470 CFG4 \o0il1_8_0[3] ( .A(IliO1), .B(o0il1[2]), .C(N_116_1), .D(un1_i0il1_i), .Y(o0il1_8[3]) ); defparam \o0il1_8_0[3] .INIT=16'hF888; // @28:453548 CFG4 un1_i0il1 ( .A(un1_i0il1_11_Z), .B(un1_i0il1_10_Z), .C(un1_i0il1_9_Z), .D(un1_i0il1_8_Z), .Y(un1_i0il1_i) ); defparam un1_i0il1.INIT=16'hFFFE; // @28:453441 CFG4 \o0il1_RNO[5] ( .A(o0il1_Z[4]), .B(o0il1_Z[5]), .C(N_123), .D(IliO1), .Y(N_108_i) ); defparam \o0il1_RNO[5] .INIT=16'h0A0E; // @28:453441 CFG4 \o0il1_RNO[2] ( .A(o0il1[1]), .B(N_123), .C(IliO1), .D(o0il1[2]), .Y(N_104_i) ); defparam \o0il1_RNO[2] .INIT=16'h2322; // @28:435553 CFG4 un1_O1il1_1_RNIRG5AQ ( .A(l11I1), .B(un1_O1il1_2_Z), .C(un1_O1il1_1_Z), .D(un1_i0il1_RNI7ILUL_Y), .Y(i0il1e) ); defparam un1_O1il1_1_RNIRG5AQ.INIT=16'hFFD8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_AMCXTFIF_WTM_26s_12s_1s_0_0 */ module CTSE_AMCXFIF_HST_Z8 ( un12_OOOI1_0, un12_OOOI1_10, un1_OOOI1_0, o0il1_0, un128_OOOI1_0, un128_OOOI1_4, un114_OOOI1_0, un114_OOOI1_1, un114_OOOI1_21, I01I1, un73_OOOI1_8, un73_OOOI1_1, un73_OOOI1_0, un73_OOOI1_3, un59_OOOI1_0, ll1I1_0, un137_OOOI1, o01I1_0, o01I1_3, o01I1_4, o01I1_5, un149_OOOI1_0, un105_OOOI1_0, un105_OOOI1_4, il1I1_0, il1I1_4, CoreAPB3_0_0_APBmslave0_PADDR_3, CoreAPB3_0_0_APBmslave0_PADDR_5, CoreAPB3_0_0_APBmslave0_PADDR_0, CoreAPB3_0_0_APBmslave0_PADDR_1, CoreAPB3_0_0_APBmslave2_PRDATA_m, rx_fifo_data_out, PADDR_0, paddr_1z_0, IloI1, oloI1_1, oloI1, iloI1_1z, Oo1I1, i11I1, IIoI1, CoreAPB3_0_0_APBmslave0_PWDATA, oIoI1, iIoI1_1z, Io1I1, i01I1_1z, I11I1_1z, O11I1, oo1I1_1z, lo1I1, wrdata_0, Iiil1, l1Ol1_1z, tx_fifo_write_sig14_i_1, ilOl1_1z, O0Ol1_1z, i0Ol1_1z, un1_IIOO1_1_2, o0Ol1_2z, N_1214, IoOl1_1z, l0Ol1_1z, I0Ol1_2z, liO0110_i_1, olOl1_1z, un1_IIOO1_3_1, un4_I1o11_4_RNI4IU79, tx_fifo_write_sig14_i_2, O1Ol1_1z, un5_l1iIo_2, N_82_2, OoOl1_1z, un5_l0iIo_1, ooOl1_2z, o1Ol1_2z, ioOl1_2z, un1_o01O1_0, un1_Ii0O1, un1_ooiO1, un4_Ooo11_1, iPRDATA28, un1_PADDR, o1Ol1_3_0_1z, ioOl1_3_0_1z, liO019_i_1, un5_O1iIo_3, tx_fifo_write_sig_0_sqmuxa_i_1, CoreAPB3_0_0_APBmslave0_PWRITE, lOi11_4, un4_I1o11_4, o1Ol1_2_1z, o11I1_1z, io1I1_1z, Oi1I1_1z, ii1I1, oi1I1, OOoI1, Ii1I1_1z, li1I1, oOoI1_1z, lOoI1_1z, iOoI1_1z, OIoI1_1z, IOoI1_2z, O0oI1_1z, lloI1_1z, OloI1_1z, lIoI1_1z, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i, l11I1_1z ) ; output un12_OOOI1_0 ; output un12_OOOI1_10 ; output un1_OOOI1_0 ; input o0il1_0 ; output un128_OOOI1_0 ; output un128_OOOI1_4 ; output un114_OOOI1_0 ; output un114_OOOI1_1 ; output un114_OOOI1_21 ; input [11:10] I01I1 ; output un73_OOOI1_8 ; output un73_OOOI1_1 ; output un73_OOOI1_0 ; output un73_OOOI1_3 ; output un59_OOOI1_0 ; input ll1I1_0 ; output [20:18] un137_OOOI1 ; input o01I1_0 ; input o01I1_3 ; input o01I1_4 ; input o01I1_5 ; output un149_OOOI1_0 ; output un105_OOOI1_0 ; output un105_OOOI1_4 ; input il1I1_0 ; input il1I1_4 ; input CoreAPB3_0_0_APBmslave0_PADDR_3 ; input CoreAPB3_0_0_APBmslave0_PADDR_5 ; input CoreAPB3_0_0_APBmslave0_PADDR_0 ; input CoreAPB3_0_0_APBmslave0_PADDR_1 ; output [15:8] CoreAPB3_0_0_APBmslave2_PRDATA_m ; input [15:8] rx_fifo_data_out ; input PADDR_0 ; input paddr_1z_0 ; output [13:0] IloI1 ; output [39:36] oloI1_1 ; output [35:0] oloI1 ; output [13:0] iloI1_1z ; output [11:0] Oo1I1 ; output [11:0] i11I1 ; output [12:0] IIoI1 ; input [31:1] CoreAPB3_0_0_APBmslave0_PWDATA ; output [39:0] oIoI1 ; output [12:0] iIoI1_1z ; output [11:0] Io1I1 ; output [15:0] i01I1_1z ; output [12:0] I11I1_1z ; output [12:0] O11I1 ; output [17:0] oo1I1_1z ; output [17:0] lo1I1 ; input wrdata_0 ; input Iiil1 ; output l1Ol1_1z ; input tx_fifo_write_sig14_i_1 ; output ilOl1_1z ; output O0Ol1_1z ; output i0Ol1_1z ; input un1_IIOO1_1_2 ; output o0Ol1_2z ; input N_1214 ; output IoOl1_1z ; output l0Ol1_1z ; output I0Ol1_2z ; input liO0110_i_1 ; output olOl1_1z ; input un1_IIOO1_3_1 ; input un4_I1o11_4_RNI4IU79 ; input tx_fifo_write_sig14_i_2 ; output O1Ol1_1z ; input un5_l1iIo_2 ; input N_82_2 ; output OoOl1_1z ; input un5_l0iIo_1 ; output ooOl1_2z ; output o1Ol1_2z ; output ioOl1_2z ; input un1_o01O1_0 ; input un1_Ii0O1 ; input un1_ooiO1 ; input un4_Ooo11_1 ; input iPRDATA28 ; input un1_PADDR ; output o1Ol1_3_0_1z ; output ioOl1_3_0_1z ; input liO019_i_1 ; output un5_O1iIo_3 ; input tx_fifo_write_sig_0_sqmuxa_i_1 ; input CoreAPB3_0_0_APBmslave0_PWRITE ; input lOi11_4 ; input un4_I1o11_4 ; output o1Ol1_2_1z ; output o11I1_1z ; output io1I1_1z ; output Oi1I1_1z ; output ii1I1 ; output oi1I1 ; output OOoI1 ; output Ii1I1_1z ; output li1I1 ; output oOoI1_1z ; output lOoI1_1z ; output iOoI1_1z ; output OIoI1_1z ; output IOoI1_2z ; output O0oI1_1z ; output lloI1_1z ; output OloI1_1z ; output lIoI1_1z ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; output l11I1_1z ; wire un12_OOOI1_0 ; wire un12_OOOI1_10 ; wire un1_OOOI1_0 ; wire o0il1_0 ; wire un128_OOOI1_0 ; wire un128_OOOI1_4 ; wire un114_OOOI1_0 ; wire un114_OOOI1_1 ; wire un114_OOOI1_21 ; wire un73_OOOI1_8 ; wire un73_OOOI1_1 ; wire un73_OOOI1_0 ; wire un73_OOOI1_3 ; wire un59_OOOI1_0 ; wire ll1I1_0 ; wire o01I1_0 ; wire o01I1_3 ; wire o01I1_4 ; wire o01I1_5 ; wire un149_OOOI1_0 ; wire un105_OOOI1_0 ; wire un105_OOOI1_4 ; wire il1I1_0 ; wire il1I1_4 ; wire CoreAPB3_0_0_APBmslave0_PADDR_3 ; wire CoreAPB3_0_0_APBmslave0_PADDR_5 ; wire CoreAPB3_0_0_APBmslave0_PADDR_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_1 ; wire PADDR_0 ; wire paddr_1z_0 ; wire wrdata_0 ; wire Iiil1 ; wire l1Ol1_1z ; wire tx_fifo_write_sig14_i_1 ; wire ilOl1_1z ; wire O0Ol1_1z ; wire i0Ol1_1z ; wire un1_IIOO1_1_2 ; wire o0Ol1_2z ; wire N_1214 ; wire IoOl1_1z ; wire l0Ol1_1z ; wire I0Ol1_2z ; wire liO0110_i_1 ; wire olOl1_1z ; wire un1_IIOO1_3_1 ; wire un4_I1o11_4_RNI4IU79 ; wire tx_fifo_write_sig14_i_2 ; wire O1Ol1_1z ; wire un5_l1iIo_2 ; wire N_82_2 ; wire OoOl1_1z ; wire un5_l0iIo_1 ; wire ooOl1_2z ; wire o1Ol1_2z ; wire ioOl1_2z ; wire un1_o01O1_0 ; wire un1_Ii0O1 ; wire un1_ooiO1 ; wire un4_Ooo11_1 ; wire iPRDATA28 ; wire un1_PADDR ; wire o1Ol1_3_0_1z ; wire ioOl1_3_0_1z ; wire liO019_i_1 ; wire un5_O1iIo_3 ; wire tx_fifo_write_sig_0_sqmuxa_i_1 ; wire CoreAPB3_0_0_APBmslave0_PWRITE ; wire lOi11_4 ; wire un4_I1o11_4 ; wire o1Ol1_2_1z ; wire o11I1_1z ; wire io1I1_1z ; wire Oi1I1_1z ; wire ii1I1 ; wire oi1I1 ; wire OOoI1 ; wire Ii1I1_1z ; wire li1I1 ; wire oOoI1_1z ; wire lOoI1_1z ; wire iOoI1_1z ; wire OIoI1_1z ; wire IOoI1_2z ; wire O0oI1_1z ; wire lloI1_1z ; wire OloI1_1z ; wire lIoI1_1z ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire l11I1_1z ; wire GND ; wire oOOl1_Z ; wire VCC ; wire iOOl1_Z ; wire lIOl1_Z ; wire oIOl1_Z ; wire oooI1_Z ; wire lOOl1_Z ; wire oiiI1_Z ; wire OOOl1_Z ; wire iiiI1_Z ; wire OIOl1_Z ; wire IOOl1_Z ; wire iIOl1_Z ; wire oooI1_1_1_Z ; wire ioOl1_3_0_1_Z ; wire o1Ol1_3_0_1_Z ; wire oooI1_1_Z ; wire OIOl1_1_1472_Z ; wire IoOl1_1_1475_Z ; // @28:438619 SLE l11I1 ( .Q(l11I1_1z), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[19]), .EN(oOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438726 SLE lIoI1 ( .Q(lIoI1_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[31]), .EN(iOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439031 SLE OloI1 ( .Q(OloI1_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[31]), .EN(lIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439166 SLE lloI1 ( .Q(lloI1_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[31]), .EN(oIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439473 SLE O0oI1 ( .Q(O0oI1_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[31]), .EN(oooI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438539 SLE \lo1I1_Z[1] ( .Q(lo1I1[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(lOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438539 SLE \lo1I1_Z[0] ( .Q(lo1I1[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(lOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438133 SLE IOoI1 ( .Q(IOoI1_2z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .EN(oiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438133 SLE OIoI1 ( .Q(OIoI1_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .EN(oiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438133 SLE iOoI1 ( .Q(iOoI1_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .EN(oiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438133 SLE lOoI1 ( .Q(lOoI1_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .EN(oiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438133 SLE oOoI1 ( .Q(oOoI1_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .EN(oiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438133 SLE IOiI1 ( .Q(li1I1), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(oiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438133 SLE OOiI1 ( .Q(Ii1I1_1z), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(oiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438133 SLE iOiI1 ( .Q(OOoI1), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(oiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438133 SLE lOiI1 ( .Q(oi1I1), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(oiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438133 SLE oOiI1 ( .Q(ii1I1), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(oiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438619 SLE Oi1I1 ( .Q(Oi1I1_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[20]), .EN(oOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438619 SLE io1I1 ( .Q(io1I1_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[18]), .EN(oOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438619 SLE o11I1 ( .Q(o11I1_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[22]), .EN(oOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438539 SLE \lo1I1_Z[16] ( .Q(lo1I1[16]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[16]), .EN(lOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438539 SLE \lo1I1_Z[15] ( .Q(lo1I1[15]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[15]), .EN(lOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438539 SLE \lo1I1_Z[14] ( .Q(lo1I1[14]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[14]), .EN(lOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438539 SLE \lo1I1_Z[13] ( .Q(lo1I1[13]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[13]), .EN(lOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438539 SLE \lo1I1_Z[12] ( .Q(lo1I1[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .EN(lOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438539 SLE \lo1I1_Z[11] ( .Q(lo1I1[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .EN(lOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438539 SLE \lo1I1_Z[10] ( .Q(lo1I1[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .EN(lOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438539 SLE \lo1I1_Z[9] ( .Q(lo1I1[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .EN(lOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438539 SLE \lo1I1_Z[8] ( .Q(lo1I1[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .EN(lOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438539 SLE \lo1I1_Z[7] ( .Q(lo1I1[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .EN(lOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438539 SLE \lo1I1_Z[6] ( .Q(lo1I1[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(lOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438539 SLE \lo1I1_Z[5] ( .Q(lo1I1[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(lOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438539 SLE \lo1I1_Z[4] ( .Q(lo1I1[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(lOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438539 SLE \lo1I1_Z[3] ( .Q(lo1I1[3]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(lOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438539 SLE \lo1I1_Z[2] ( .Q(lo1I1[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(lOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438619 SLE \oo1I1[13] ( .Q(oo1I1_1z[13]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[13]), .EN(oOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438619 SLE \oo1I1[12] ( .Q(oo1I1_1z[12]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .EN(oOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438619 SLE \oo1I1[11] ( .Q(oo1I1_1z[11]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .EN(oOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438619 SLE \oo1I1[10] ( .Q(oo1I1_1z[10]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .EN(oOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438619 SLE \oo1I1[9] ( .Q(oo1I1_1z[9]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .EN(oOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438619 SLE \oo1I1[8] ( .Q(oo1I1_1z[8]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .EN(oOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438619 SLE \oo1I1[7] ( .Q(oo1I1_1z[7]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .EN(oOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438619 SLE \oo1I1[6] ( .Q(oo1I1_1z[6]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(oOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438619 SLE \oo1I1[5] ( .Q(oo1I1_1z[5]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(oOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438619 SLE \oo1I1[4] ( .Q(oo1I1_1z[4]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(oOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438619 SLE \oo1I1[3] ( .Q(oo1I1_1z[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(oOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438619 SLE \oo1I1[2] ( .Q(oo1I1_1z[2]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(oOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438619 SLE \oo1I1[1] ( .Q(oo1I1_1z[1]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(oOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438619 SLE \oo1I1[0] ( .Q(oo1I1_1z[0]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(oOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438539 SLE \lo1I1_Z[17] ( .Q(lo1I1[17]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[17]), .EN(lOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438619 SLE \oo1I1[17] ( .Q(oo1I1_1z[17]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[17]), .EN(oOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438619 SLE \oo1I1[16] ( .Q(oo1I1_1z[16]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[16]), .EN(oOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438619 SLE \oo1I1[15] ( .Q(oo1I1_1z[15]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[15]), .EN(oOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438619 SLE \oo1I1[14] ( .Q(oo1I1_1z[14]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[14]), .EN(oOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438353 SLE \O11I1_Z[5] ( .Q(O11I1[5]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[21]), .EN(OOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438353 SLE \O11I1_Z[4] ( .Q(O11I1[4]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[20]), .EN(OOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438353 SLE \O11I1_Z[3] ( .Q(O11I1[3]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[19]), .EN(OOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438353 SLE \O11I1_Z[2] ( .Q(O11I1[2]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[18]), .EN(OOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438353 SLE \O11I1_Z[1] ( .Q(O11I1[1]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[17]), .EN(OOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438353 SLE \O11I1_Z[0] ( .Q(O11I1[0]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[16]), .EN(OOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438353 SLE \I11I1[7] ( .Q(I11I1_1z[7]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .EN(OOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438353 SLE \I11I1[6] ( .Q(I11I1_1z[6]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(OOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438353 SLE \I11I1[5] ( .Q(I11I1_1z[5]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(OOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438353 SLE \I11I1[4] ( .Q(I11I1_1z[4]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(OOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438353 SLE \I11I1[3] ( .Q(I11I1_1z[3]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(OOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438353 SLE \I11I1[2] ( .Q(I11I1_1z[2]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(OOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438353 SLE \I11I1[1] ( .Q(I11I1_1z[1]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(OOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438353 SLE \I11I1[0] ( .Q(I11I1_1z[0]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(OOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438353 SLE \O11I1_Z[12] ( .Q(O11I1[12]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[28]), .EN(OOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438353 SLE \O11I1_Z[11] ( .Q(O11I1[11]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[27]), .EN(OOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438353 SLE \O11I1_Z[10] ( .Q(O11I1[10]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[26]), .EN(OOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438353 SLE \O11I1_Z[9] ( .Q(O11I1[9]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[25]), .EN(OOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438353 SLE \O11I1_Z[8] ( .Q(O11I1[8]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[24]), .EN(OOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438353 SLE \O11I1_Z[7] ( .Q(O11I1[7]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[23]), .EN(OOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438353 SLE \O11I1_Z[6] ( .Q(O11I1[6]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[22]), .EN(OOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438258 SLE \i01I1[9] ( .Q(i01I1_1z[9]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .EN(iiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438258 SLE \i01I1[8] ( .Q(i01I1_1z[8]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .EN(iiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438258 SLE \i01I1[7] ( .Q(i01I1_1z[7]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .EN(iiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438258 SLE \i01I1[6] ( .Q(i01I1_1z[6]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(iiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438258 SLE \i01I1[5] ( .Q(i01I1_1z[5]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(iiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438258 SLE \i01I1[4] ( .Q(i01I1_1z[4]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(iiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438258 SLE \i01I1[3] ( .Q(i01I1_1z[3]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(iiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438258 SLE \i01I1[2] ( .Q(i01I1_1z[2]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(iiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438258 SLE \i01I1[1] ( .Q(i01I1_1z[1]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(iiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438258 SLE \i01I1[0] ( .Q(i01I1_1z[0]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(iiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438353 SLE \I11I1[12] ( .Q(I11I1_1z[12]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .EN(OOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438353 SLE \I11I1[11] ( .Q(I11I1_1z[11]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .EN(OOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438353 SLE \I11I1[10] ( .Q(I11I1_1z[10]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .EN(OOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438353 SLE \I11I1[9] ( .Q(I11I1_1z[9]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .EN(OOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438353 SLE \I11I1[8] ( .Q(I11I1_1z[8]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .EN(OOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438258 SLE \Io1I1_Z[8] ( .Q(Io1I1[8]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[24]), .EN(iiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438258 SLE \Io1I1_Z[7] ( .Q(Io1I1[7]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[23]), .EN(iiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438258 SLE \Io1I1_Z[6] ( .Q(Io1I1[6]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[22]), .EN(iiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438258 SLE \Io1I1_Z[5] ( .Q(Io1I1[5]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[21]), .EN(iiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438258 SLE \Io1I1_Z[4] ( .Q(Io1I1[4]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[20]), .EN(iiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438258 SLE \Io1I1_Z[3] ( .Q(Io1I1[3]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[19]), .EN(iiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438258 SLE \Io1I1_Z[2] ( .Q(Io1I1[2]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[18]), .EN(iiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438258 SLE \Io1I1_Z[1] ( .Q(Io1I1[1]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[17]), .EN(iiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438258 SLE \Io1I1_Z[0] ( .Q(Io1I1[0]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[16]), .EN(iiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438258 SLE \i01I1[15] ( .Q(i01I1_1z[15]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[15]), .EN(iiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438258 SLE \i01I1[14] ( .Q(i01I1_1z[14]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[14]), .EN(iiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438258 SLE \i01I1[13] ( .Q(i01I1_1z[13]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[13]), .EN(iiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438258 SLE \i01I1[12] ( .Q(i01I1_1z[12]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .EN(iiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438258 SLE \i01I1[11] ( .Q(i01I1_1z[11]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .EN(iiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438258 SLE \i01I1[10] ( .Q(i01I1_1z[10]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .EN(iiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439031 SLE \iIoI1[11] ( .Q(iIoI1_1z[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .EN(lIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439031 SLE \iIoI1[10] ( .Q(iIoI1_1z[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .EN(lIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439031 SLE \iIoI1[9] ( .Q(iIoI1_1z[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .EN(lIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439031 SLE \iIoI1[8] ( .Q(iIoI1_1z[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .EN(lIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439031 SLE \iIoI1[7] ( .Q(iIoI1_1z[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .EN(lIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439031 SLE \iIoI1[6] ( .Q(iIoI1_1z[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(lIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439031 SLE \iIoI1[5] ( .Q(iIoI1_1z[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(lIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439031 SLE \iIoI1[4] ( .Q(iIoI1_1z[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(lIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439031 SLE \iIoI1[3] ( .Q(iIoI1_1z[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(lIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439031 SLE \iIoI1[2] ( .Q(iIoI1_1z[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(lIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439031 SLE \iIoI1[1] ( .Q(iIoI1_1z[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(lIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439031 SLE \iIoI1[0] ( .Q(iIoI1_1z[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(lIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438258 SLE \Io1I1_Z[11] ( .Q(Io1I1[11]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[27]), .EN(iiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438258 SLE \Io1I1_Z[10] ( .Q(Io1I1[10]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[26]), .EN(iiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438258 SLE \Io1I1_Z[9] ( .Q(Io1I1[9]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[25]), .EN(iiiI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438848 SLE \oIoI1_1[13] ( .Q(oIoI1[13]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[13]), .EN(OIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438848 SLE \oIoI1_1[12] ( .Q(oIoI1[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .EN(OIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438848 SLE \oIoI1_1[11] ( .Q(oIoI1[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .EN(OIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438848 SLE \oIoI1_1[10] ( .Q(oIoI1[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .EN(OIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438848 SLE \oIoI1_1[9] ( .Q(oIoI1[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .EN(OIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438848 SLE \oIoI1_1[8] ( .Q(oIoI1[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .EN(OIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438848 SLE \oIoI1_1[7] ( .Q(oIoI1[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .EN(OIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438848 SLE \oIoI1_1[6] ( .Q(oIoI1[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(OIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438848 SLE \oIoI1_1[5] ( .Q(oIoI1[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(OIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438848 SLE \oIoI1_1[4] ( .Q(oIoI1[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(OIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438848 SLE \oIoI1_1[3] ( .Q(oIoI1[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(OIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438848 SLE \oIoI1_1[2] ( .Q(oIoI1[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(OIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438848 SLE \oIoI1_1[1] ( .Q(oIoI1[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(OIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438848 SLE \oIoI1_1[0] ( .Q(oIoI1[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(OIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439031 SLE \iIoI1[12] ( .Q(iIoI1_1z[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .EN(lIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438848 SLE \oIoI1_1[28] ( .Q(oIoI1[28]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[28]), .EN(OIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438848 SLE \oIoI1_1[27] ( .Q(oIoI1[27]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[27]), .EN(OIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438848 SLE \oIoI1_1[26] ( .Q(oIoI1[26]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[26]), .EN(OIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438848 SLE \oIoI1_1[25] ( .Q(oIoI1[25]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[25]), .EN(OIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438848 SLE \oIoI1_1[24] ( .Q(oIoI1[24]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[24]), .EN(OIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438848 SLE \oIoI1_1[23] ( .Q(oIoI1[23]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[23]), .EN(OIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438848 SLE \oIoI1_1[22] ( .Q(oIoI1[22]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[22]), .EN(OIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438848 SLE \oIoI1_1[21] ( .Q(oIoI1[21]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[21]), .EN(OIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438848 SLE \oIoI1_1[20] ( .Q(oIoI1[20]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[20]), .EN(OIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438848 SLE \oIoI1_1[19] ( .Q(oIoI1[19]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[19]), .EN(OIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438848 SLE \oIoI1_1[18] ( .Q(oIoI1[18]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[18]), .EN(OIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438848 SLE \oIoI1_1[17] ( .Q(oIoI1[17]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[17]), .EN(OIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438848 SLE \oIoI1_1[16] ( .Q(oIoI1[16]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[16]), .EN(OIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438848 SLE \oIoI1_1[15] ( .Q(oIoI1[15]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[15]), .EN(OIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438848 SLE \oIoI1_1[14] ( .Q(oIoI1[14]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[14]), .EN(OIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438726 SLE \IIoI1_Z[3] ( .Q(IIoI1[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(iOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438726 SLE \IIoI1_Z[2] ( .Q(IIoI1[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(iOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438726 SLE \IIoI1_Z[1] ( .Q(IIoI1[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(iOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438726 SLE \IIoI1_Z[0] ( .Q(IIoI1[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(iOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438726 SLE \oIoI1_1[39] ( .Q(oIoI1[39]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[23]), .EN(iOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438726 SLE \oIoI1_1[38] ( .Q(oIoI1[38]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[22]), .EN(iOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438726 SLE \oIoI1_1[37] ( .Q(oIoI1[37]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[21]), .EN(iOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438726 SLE \oIoI1_1[36] ( .Q(oIoI1[36]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[20]), .EN(iOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438726 SLE \oIoI1_1[35] ( .Q(oIoI1[35]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[19]), .EN(iOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438726 SLE \oIoI1_1[34] ( .Q(oIoI1[34]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[18]), .EN(iOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438726 SLE \oIoI1_1[33] ( .Q(oIoI1[33]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[17]), .EN(iOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438726 SLE \oIoI1_1[32] ( .Q(oIoI1[32]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[16]), .EN(iOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438848 SLE \oIoI1_1[31] ( .Q(oIoI1[31]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[31]), .EN(OIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438848 SLE \oIoI1_1[30] ( .Q(oIoI1[30]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[30]), .EN(OIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438848 SLE \oIoI1_1[29] ( .Q(oIoI1[29]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[29]), .EN(OIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438726 SLE \IIoI1_Z[12] ( .Q(IIoI1[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .EN(iOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438726 SLE \IIoI1_Z[11] ( .Q(IIoI1[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .EN(iOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438726 SLE \IIoI1_Z[10] ( .Q(IIoI1[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .EN(iOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438726 SLE \IIoI1_Z[9] ( .Q(IIoI1[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .EN(iOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438726 SLE \IIoI1_Z[8] ( .Q(IIoI1[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .EN(iOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438726 SLE \IIoI1_Z[7] ( .Q(IIoI1[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .EN(iOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438726 SLE \IIoI1_Z[6] ( .Q(IIoI1[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(iOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438726 SLE \IIoI1_Z[5] ( .Q(IIoI1[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(iOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438726 SLE \IIoI1_Z[4] ( .Q(IIoI1[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(iOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438446 SLE \Oo1I1_Z[2] ( .Q(Oo1I1[2]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(IOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438446 SLE \Oo1I1_Z[1] ( .Q(Oo1I1[1]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(IOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438446 SLE \Oo1I1_Z[0] ( .Q(Oo1I1[0]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(IOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438446 SLE \i11I1_Z[11] ( .Q(i11I1[11]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[27]), .EN(IOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438446 SLE \i11I1_Z[10] ( .Q(i11I1[10]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[26]), .EN(IOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438446 SLE \i11I1_Z[9] ( .Q(i11I1[9]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[25]), .EN(IOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438446 SLE \i11I1_Z[8] ( .Q(i11I1[8]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[24]), .EN(IOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438446 SLE \i11I1_Z[7] ( .Q(i11I1[7]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[23]), .EN(IOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438446 SLE \i11I1_Z[6] ( .Q(i11I1[6]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[22]), .EN(IOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438446 SLE \i11I1_Z[5] ( .Q(i11I1[5]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[21]), .EN(IOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438446 SLE \i11I1_Z[4] ( .Q(i11I1[4]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[20]), .EN(IOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438446 SLE \i11I1_Z[3] ( .Q(i11I1[3]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[19]), .EN(IOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438446 SLE \i11I1_Z[2] ( .Q(i11I1[2]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[18]), .EN(IOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438446 SLE \i11I1_Z[1] ( .Q(i11I1[1]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[17]), .EN(IOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438446 SLE \i11I1_Z[0] ( .Q(i11I1[0]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[16]), .EN(IOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439473 SLE \iloI1[5] ( .Q(iloI1_1z[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(oooI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439473 SLE \iloI1[4] ( .Q(iloI1_1z[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(oooI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439473 SLE \iloI1[3] ( .Q(iloI1_1z[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(oooI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439473 SLE \iloI1[2] ( .Q(iloI1_1z[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(oooI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439473 SLE \iloI1[1] ( .Q(iloI1_1z[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(oooI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439473 SLE \iloI1[0] ( .Q(iloI1_1z[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(oooI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438446 SLE \Oo1I1_Z[11] ( .Q(Oo1I1[11]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .EN(IOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438446 SLE \Oo1I1_Z[10] ( .Q(Oo1I1[10]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .EN(IOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438446 SLE \Oo1I1_Z[9] ( .Q(Oo1I1[9]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .EN(IOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438446 SLE \Oo1I1_Z[8] ( .Q(Oo1I1[8]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .EN(IOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438446 SLE \Oo1I1_Z[7] ( .Q(Oo1I1[7]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .EN(IOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438446 SLE \Oo1I1_Z[6] ( .Q(Oo1I1[6]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(IOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438446 SLE \Oo1I1_Z[5] ( .Q(Oo1I1[5]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(IOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438446 SLE \Oo1I1_Z[4] ( .Q(Oo1I1[4]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(IOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:438446 SLE \Oo1I1_Z[3] ( .Q(Oo1I1[3]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(IOOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439290 SLE \oloI1_1[6] ( .Q(oloI1[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(iIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439290 SLE \oloI1_1[5] ( .Q(oloI1[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(iIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439290 SLE \oloI1_1[4] ( .Q(oloI1[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(iIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439290 SLE \oloI1_1[3] ( .Q(oloI1[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(iIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439290 SLE \oloI1_1[2] ( .Q(oloI1[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(iIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439290 SLE \oloI1_1[1] ( .Q(oloI1[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(iIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439290 SLE \oloI1_1[0] ( .Q(oloI1[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(iIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439473 SLE \iloI1[13] ( .Q(iloI1_1z[13]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[13]), .EN(oooI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439473 SLE \iloI1[12] ( .Q(iloI1_1z[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .EN(oooI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439473 SLE \iloI1[11] ( .Q(iloI1_1z[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .EN(oooI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439473 SLE \iloI1[10] ( .Q(iloI1_1z[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .EN(oooI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439473 SLE \iloI1[9] ( .Q(iloI1_1z[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .EN(oooI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439473 SLE \iloI1[8] ( .Q(iloI1_1z[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .EN(oooI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439473 SLE \iloI1[7] ( .Q(iloI1_1z[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .EN(oooI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439473 SLE \iloI1[6] ( .Q(iloI1_1z[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(oooI1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439290 SLE \oloI1_1[21] ( .Q(oloI1[21]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[21]), .EN(iIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439290 SLE \oloI1_1[20] ( .Q(oloI1[20]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[20]), .EN(iIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439290 SLE \oloI1_1[19] ( .Q(oloI1[19]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[19]), .EN(iIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439290 SLE \oloI1_1[18] ( .Q(oloI1[18]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[18]), .EN(iIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439290 SLE \oloI1_1[17] ( .Q(oloI1[17]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[17]), .EN(iIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439290 SLE \oloI1_1[16] ( .Q(oloI1[16]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[16]), .EN(iIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439290 SLE \oloI1_1[15] ( .Q(oloI1[15]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[15]), .EN(iIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439290 SLE \oloI1_1[14] ( .Q(oloI1[14]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[14]), .EN(iIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439290 SLE \oloI1_1[13] ( .Q(oloI1[13]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[13]), .EN(iIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439290 SLE \oloI1_1[12] ( .Q(oloI1[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .EN(iIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439290 SLE \oloI1_1[11] ( .Q(oloI1[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .EN(iIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439290 SLE \oloI1_1[10] ( .Q(oloI1[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .EN(iIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439290 SLE \oloI1_1[9] ( .Q(oloI1[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .EN(iIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439290 SLE \oloI1_1[8] ( .Q(oloI1[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .EN(iIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439290 SLE \oloI1_1[7] ( .Q(oloI1[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .EN(iIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439166 SLE \oloI1_1_Z[36] ( .Q(oloI1_1[36]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[20]), .EN(oIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439166 SLE \oloI1_1[35] ( .Q(oloI1[35]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[19]), .EN(oIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439166 SLE \oloI1_1[34] ( .Q(oloI1[34]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[18]), .EN(oIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439166 SLE \oloI1_1[33] ( .Q(oloI1[33]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[17]), .EN(oIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439166 SLE \oloI1_1[32] ( .Q(oloI1[32]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[16]), .EN(oIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439290 SLE \oloI1_1[31] ( .Q(oloI1[31]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[31]), .EN(iIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439290 SLE \oloI1_1[30] ( .Q(oloI1[30]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[30]), .EN(iIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439290 SLE \oloI1_1[29] ( .Q(oloI1[29]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[29]), .EN(iIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439290 SLE \oloI1_1[28] ( .Q(oloI1[28]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[28]), .EN(iIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439290 SLE \oloI1_1[27] ( .Q(oloI1[27]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[27]), .EN(iIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439290 SLE \oloI1_1[26] ( .Q(oloI1[26]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[26]), .EN(iIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439290 SLE \oloI1_1[25] ( .Q(oloI1[25]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[25]), .EN(iIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439290 SLE \oloI1_1[24] ( .Q(oloI1[24]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[24]), .EN(iIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439290 SLE \oloI1_1[23] ( .Q(oloI1[23]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[23]), .EN(iIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439290 SLE \oloI1_1[22] ( .Q(oloI1[22]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[22]), .EN(iIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439166 SLE \IloI1_Z[11] ( .Q(IloI1[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .EN(oIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439166 SLE \IloI1_Z[10] ( .Q(IloI1[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .EN(oIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439166 SLE \IloI1_Z[9] ( .Q(IloI1[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .EN(oIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439166 SLE \IloI1_Z[8] ( .Q(IloI1[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .EN(oIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439166 SLE \IloI1_Z[7] ( .Q(IloI1[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .EN(oIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439166 SLE \IloI1_Z[6] ( .Q(IloI1[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(oIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439166 SLE \IloI1_Z[5] ( .Q(IloI1[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(oIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439166 SLE \IloI1_Z[4] ( .Q(IloI1[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(oIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439166 SLE \IloI1_Z[3] ( .Q(IloI1[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(oIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439166 SLE \IloI1_Z[2] ( .Q(IloI1[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(oIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439166 SLE \IloI1_Z[1] ( .Q(IloI1[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(oIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439166 SLE \IloI1_Z[0] ( .Q(IloI1[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(oIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439166 SLE \oloI1_1_Z[39] ( .Q(oloI1_1[39]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[23]), .EN(oIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439166 SLE \oloI1_1_Z[38] ( .Q(oloI1_1[38]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[22]), .EN(oIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439166 SLE \oloI1_1_Z[37] ( .Q(oloI1_1[37]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[21]), .EN(oIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439166 SLE \IloI1_Z[13] ( .Q(IloI1[13]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[13]), .EN(oIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439166 SLE \IloI1_Z[12] ( .Q(IloI1[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .EN(oIOl1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:439112 CFG2 o1Ol1_2 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_3), .B(paddr_1z_0), .Y(o1Ol1_2_1z) ); defparam o1Ol1_2.INIT=4'h8; // @28:439461 CFG3 oooI1_1_1 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_5), .B(CoreAPB3_0_0_APBmslave0_PADDR_0), .C(un4_I1o11_4), .Y(oooI1_1_1_Z) ); defparam oooI1_1_1.INIT=8'h10; // @28:439552 CFG3 ioOl1_3_0_1 ( .A(lOi11_4), .B(paddr_1z_0), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .Y(ioOl1_3_0_1_Z) ); defparam ioOl1_3_0_1.INIT=8'h08; // @28:439112 CFG3 o1Ol1_3_0_1 ( .A(PADDR_0), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .C(lOi11_4), .Y(o1Ol1_3_0_1_Z) ); defparam o1Ol1_3_0_1.INIT=8'h10; // @28:438246 CFG3 un3_iiiI1_1_0 ( .A(PADDR_0), .B(tx_fifo_write_sig_0_sqmuxa_i_1), .C(paddr_1z_0), .Y(un5_O1iIo_3) ); defparam un3_iiiI1_1_0.INIT=8'h40; // @28:439552 CFG3 ioOl1_3_0 ( .A(ioOl1_3_0_1_Z), .B(liO019_i_1), .C(tx_fifo_write_sig_0_sqmuxa_i_1), .Y(ioOl1_3_0_1z) ); defparam ioOl1_3_0.INIT=8'h80; // @28:439112 CFG3 o1Ol1_3_0 ( .A(tx_fifo_write_sig_0_sqmuxa_i_1), .B(o1Ol1_3_0_1_Z), .C(o1Ol1_2_1z), .Y(o1Ol1_3_0_1z) ); defparam o1Ol1_3_0.INIT=8'h80; // @31:89 CFG3 \CoreAPB3_0_0_APBmslave2_PRDATA_m_cZ[8] ( .A(rx_fifo_data_out[8]), .B(un1_PADDR), .C(iPRDATA28), .Y(CoreAPB3_0_0_APBmslave2_PRDATA_m[8]) ); defparam \CoreAPB3_0_0_APBmslave2_PRDATA_m_cZ[8] .INIT=8'h80; // @31:89 CFG3 \CoreAPB3_0_0_APBmslave2_PRDATA_m_cZ[9] ( .A(rx_fifo_data_out[9]), .B(un1_PADDR), .C(iPRDATA28), .Y(CoreAPB3_0_0_APBmslave2_PRDATA_m[9]) ); defparam \CoreAPB3_0_0_APBmslave2_PRDATA_m_cZ[9] .INIT=8'h80; // @31:89 CFG3 \CoreAPB3_0_0_APBmslave2_PRDATA_m_cZ[10] ( .A(rx_fifo_data_out[10]), .B(un1_PADDR), .C(iPRDATA28), .Y(CoreAPB3_0_0_APBmslave2_PRDATA_m[10]) ); defparam \CoreAPB3_0_0_APBmslave2_PRDATA_m_cZ[10] .INIT=8'h80; // @31:89 CFG3 \CoreAPB3_0_0_APBmslave2_PRDATA_m_cZ[11] ( .A(rx_fifo_data_out[11]), .B(un1_PADDR), .C(iPRDATA28), .Y(CoreAPB3_0_0_APBmslave2_PRDATA_m[11]) ); defparam \CoreAPB3_0_0_APBmslave2_PRDATA_m_cZ[11] .INIT=8'h80; // @31:89 CFG3 \CoreAPB3_0_0_APBmslave2_PRDATA_m_cZ[12] ( .A(rx_fifo_data_out[12]), .B(un1_PADDR), .C(iPRDATA28), .Y(CoreAPB3_0_0_APBmslave2_PRDATA_m[12]) ); defparam \CoreAPB3_0_0_APBmslave2_PRDATA_m_cZ[12] .INIT=8'h80; // @31:89 CFG3 \CoreAPB3_0_0_APBmslave2_PRDATA_m_cZ[15] ( .A(rx_fifo_data_out[15]), .B(un1_PADDR), .C(iPRDATA28), .Y(CoreAPB3_0_0_APBmslave2_PRDATA_m[15]) ); defparam \CoreAPB3_0_0_APBmslave2_PRDATA_m_cZ[15] .INIT=8'h80; // @31:89 CFG3 \CoreAPB3_0_0_APBmslave2_PRDATA_m_cZ[14] ( .A(rx_fifo_data_out[14]), .B(un1_PADDR), .C(iPRDATA28), .Y(CoreAPB3_0_0_APBmslave2_PRDATA_m[14]) ); defparam \CoreAPB3_0_0_APBmslave2_PRDATA_m_cZ[14] .INIT=8'h80; // @31:89 CFG3 \CoreAPB3_0_0_APBmslave2_PRDATA_m_cZ[13] ( .A(rx_fifo_data_out[13]), .B(un1_PADDR), .C(iPRDATA28), .Y(CoreAPB3_0_0_APBmslave2_PRDATA_m[13]) ); defparam \CoreAPB3_0_0_APBmslave2_PRDATA_m_cZ[13] .INIT=8'h80; // @28:439461 CFG4 oooI1_1 ( .A(un4_Ooo11_1), .B(o1Ol1_2_1z), .C(un1_ooiO1), .D(oooI1_1_1_Z), .Y(oooI1_1_Z) ); defparam oooI1_1.INIT=16'h8000; CFG4 OIOl1_1_1472 ( .A(PADDR_0), .B(CoreAPB3_0_0_APBmslave0_PADDR_5), .C(un1_ooiO1), .D(un4_I1o11_4), .Y(OIOl1_1_1472_Z) ); defparam OIOl1_1_1472.INIT=16'h1000; CFG4 IoOl1_1_1475 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_5), .B(CoreAPB3_0_0_APBmslave0_PADDR_1), .C(un4_I1o11_4), .D(un1_ooiO1), .Y(IoOl1_1_1475_Z) ); defparam IoOl1_1_1475.INIT=16'h1000; // @28:439552 CFG3 ioOl1 ( .A(un1_Ii0O1), .B(un1_o01O1_0), .C(ioOl1_3_0_1z), .Y(ioOl1_2z) ); defparam ioOl1.INIT=8'h80; // @28:439112 CFG3 o1Ol1 ( .A(un1_Ii0O1), .B(un1_o01O1_0), .C(o1Ol1_3_0_1z), .Y(o1Ol1_2z) ); defparam o1Ol1.INIT=8'h80; // @28:439836 CFG4 \un105_OOOI1[24] ( .A(il1I1_0), .B(un1_o01O1_0), .C(o1Ol1_3_0_1z), .D(un1_Ii0O1), .Y(un105_OOOI1_0) ); defparam \un105_OOOI1[24] .INIT=16'h8000; // @28:439836 CFG4 \un105_OOOI1[28] ( .A(il1I1_4), .B(un1_o01O1_0), .C(o1Ol1_3_0_1z), .D(un1_Ii0O1), .Y(un105_OOOI1_4) ); defparam \un105_OOOI1[28] .INIT=16'h8000; // @28:439945 CFG4 \un149_OOOI1[29] ( .A(o01I1_0), .B(un1_o01O1_0), .C(ioOl1_3_0_1z), .D(un1_Ii0O1), .Y(un149_OOOI1_0) ); defparam \un149_OOOI1[29] .INIT=16'h8000; // @28:439538 CFG2 ooOl1 ( .A(oooI1_1_Z), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .Y(ooOl1_2z) ); defparam ooOl1.INIT=4'h2; // @28:439461 CFG2 oooI1 ( .A(oooI1_1_Z), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .Y(oooI1_Z) ); defparam oooI1.INIT=4'h8; // @28:439902 CFG3 \un137_OOOI1_cZ[18] ( .A(oooI1_1_Z), .B(o01I1_3), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .Y(un137_OOOI1[18]) ); defparam \un137_OOOI1_cZ[18] .INIT=8'h08; // @28:439264 CFG4 OoOl1 ( .A(liO019_i_1), .B(IoOl1_1_1475_Z), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .D(un5_l0iIo_1), .Y(OoOl1_1z) ); defparam OoOl1.INIT=16'h0800; // @28:439154 CFG4 oIOl1 ( .A(liO019_i_1), .B(IoOl1_1_1475_Z), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .D(un5_l0iIo_1), .Y(oIOl1_Z) ); defparam oIOl1.INIT=16'h8000; // @28:438902 CFG4 O1Ol1 ( .A(N_82_2), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .C(OIOl1_1_1472_Z), .D(un5_l1iIo_2), .Y(O1Ol1_1z) ); defparam O1Ol1.INIT=16'h2000; // @28:438836 CFG4 OIOl1 ( .A(N_82_2), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .C(OIOl1_1_1472_Z), .D(un5_l1iIo_2), .Y(OIOl1_Z) ); defparam OIOl1.INIT=16'h8000; // @28:438232 CFG4 olOl1 ( .A(tx_fifo_write_sig14_i_2), .B(un4_I1o11_4_RNI4IU79), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .D(un1_IIOO1_3_1), .Y(olOl1_1z) ); defparam olOl1.INIT=16'h0800; // @28:438434 CFG4 IOOl1 ( .A(liO0110_i_1), .B(un4_I1o11_4_RNI4IU79), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .D(un5_l1iIo_2), .Y(IOOl1_Z) ); defparam IOOl1.INIT=16'h8000; // @28:438513 CFG4 I0Ol1 ( .A(liO0110_i_1), .B(un4_I1o11_4_RNI4IU79), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .D(un5_l1iIo_2), .Y(I0Ol1_2z) ); defparam I0Ol1.INIT=16'h0800; // @28:438121 CFG4 oiiI1 ( .A(tx_fifo_write_sig14_i_2), .B(un4_I1o11_4_RNI4IU79), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .D(un1_IIOO1_3_1), .Y(oiiI1_Z) ); defparam oiiI1.INIT=16'h8000; // @28:438593 CFG4 l0Ol1 ( .A(un5_l0iIo_1), .B(un4_I1o11_4_RNI4IU79), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .D(un4_Ooo11_1), .Y(l0Ol1_1z) ); defparam l0Ol1.INIT=16'h0800; // @28:438527 CFG4 lOOl1 ( .A(un5_l0iIo_1), .B(un4_I1o11_4_RNI4IU79), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .D(un4_Ooo11_1), .Y(lOOl1_Z) ); defparam lOOl1.INIT=16'h8000; // @28:439278 CFG4 iIOl1 ( .A(liO0110_i_1), .B(IoOl1_1_1475_Z), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .D(o1Ol1_2_1z), .Y(iIOl1_Z) ); defparam iIOl1.INIT=16'h8000; // @28:439902 CFG3 \un137_OOOI1_cZ[19] ( .A(oooI1_1_Z), .B(o01I1_4), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .Y(un137_OOOI1[19]) ); defparam \un137_OOOI1_cZ[19] .INIT=8'h08; // @28:439344 CFG4 IoOl1 ( .A(liO0110_i_1), .B(IoOl1_1_1475_Z), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .D(o1Ol1_2_1z), .Y(IoOl1_1z) ); defparam IoOl1.INIT=16'h0800; // @28:439902 CFG3 \un137_OOOI1_cZ[20] ( .A(oooI1_1_Z), .B(o01I1_5), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .Y(un137_OOOI1[20]) ); defparam \un137_OOOI1_cZ[20] .INIT=8'h08; // @28:438607 CFG4 oOOl1 ( .A(tx_fifo_write_sig_0_sqmuxa_i_1), .B(un4_I1o11_4_RNI4IU79), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .D(N_1214), .Y(oOOl1_Z) ); defparam oOOl1.INIT=16'h8000; // @28:438700 CFG4 o0Ol1 ( .A(tx_fifo_write_sig_0_sqmuxa_i_1), .B(un4_I1o11_4_RNI4IU79), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .D(N_1214), .Y(o0Ol1_2z) ); defparam o0Ol1.INIT=16'h0800; // @28:438822 CFG4 i0Ol1 ( .A(un1_IIOO1_1_2), .B(OIOl1_1_1472_Z), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .D(o1Ol1_2_1z), .Y(i0Ol1_1z) ); defparam i0Ol1.INIT=16'h0800; // @28:438420 CFG4 O0Ol1 ( .A(un1_IIOO1_1_2), .B(un4_I1o11_4_RNI4IU79), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .D(N_1214), .Y(O0Ol1_1z) ); defparam O0Ol1.INIT=16'h0800; // @28:438714 CFG4 iOOl1 ( .A(un1_IIOO1_1_2), .B(OIOl1_1_1472_Z), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .D(o1Ol1_2_1z), .Y(iOOl1_Z) ); defparam iOOl1.INIT=16'h8000; // @28:438341 CFG4 OOOl1 ( .A(un1_IIOO1_1_2), .B(un4_I1o11_4_RNI4IU79), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .D(N_1214), .Y(OOOl1_Z) ); defparam OOOl1.INIT=16'h8000; // @28:438327 CFG3 ilOl1 ( .A(un5_O1iIo_3), .B(un4_I1o11_4_RNI4IU79), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .Y(ilOl1_1z) ); defparam ilOl1.INIT=8'h08; // @28:438246 CFG3 iiiI1 ( .A(un5_O1iIo_3), .B(un4_I1o11_4_RNI4IU79), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .Y(iiiI1_Z) ); defparam iiiI1.INIT=8'h80; // @28:439098 CFG4 l1Ol1 ( .A(tx_fifo_write_sig14_i_1), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .C(OIOl1_1_1472_Z), .D(un5_l0iIo_1), .Y(l1Ol1_1z) ); defparam l1Ol1.INIT=16'h2000; // @28:439019 CFG4 lIOl1 ( .A(tx_fifo_write_sig14_i_1), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .C(OIOl1_1_1472_Z), .D(un5_l0iIo_1), .Y(lIOl1_Z) ); defparam lIOl1.INIT=16'h8000; // @28:439775 CFG2 \un73_OOOI1[13] ( .A(O1Ol1_1z), .B(oIoI1[13]), .Y(un73_OOOI1_8) ); defparam \un73_OOOI1[13] .INIT=4'h8; // @28:439775 CFG2 \un73_OOOI1[6] ( .A(O1Ol1_1z), .B(oIoI1[6]), .Y(un73_OOOI1_1) ); defparam \un73_OOOI1[6] .INIT=4'h8; // @28:439775 CFG2 \un73_OOOI1[5] ( .A(O1Ol1_1z), .B(oIoI1[5]), .Y(un73_OOOI1_0) ); defparam \un73_OOOI1[5] .INIT=4'h8; // @28:439654 CFG4 \un12_OOOI1[4] ( .A(i01I1_1z[4]), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .C(un5_O1iIo_3), .D(un4_I1o11_4_RNI4IU79), .Y(un12_OOOI1_0) ); defparam \un12_OOOI1[4] .INIT=16'h2000; // @28:439743 CFG2 \un59_OOOI1[11] ( .A(i0Ol1_1z), .B(ll1I1_0), .Y(un59_OOOI1_0) ); defparam \un59_OOOI1[11] .INIT=4'h8; // @28:439775 CFG2 \un73_OOOI1[8] ( .A(O1Ol1_1z), .B(oIoI1[8]), .Y(un73_OOOI1_3) ); defparam \un73_OOOI1[8] .INIT=4'h8; // @28:439852 CFG2 \un114_OOOI1[10] ( .A(OoOl1_1z), .B(I01I1[10]), .Y(un114_OOOI1_0) ); defparam \un114_OOOI1[10] .INIT=4'h8; // @28:439852 CFG2 \un114_OOOI1[11] ( .A(OoOl1_1z), .B(I01I1[11]), .Y(un114_OOOI1_1) ); defparam \un114_OOOI1[11] .INIT=4'h8; // @28:439852 CFG2 \un114_OOOI1[31] ( .A(OoOl1_1z), .B(lloI1_1z), .Y(un114_OOOI1_21) ); defparam \un114_OOOI1[31] .INIT=4'h8; // @28:439886 CFG2 \un128_OOOI1[24] ( .A(IoOl1_1z), .B(oloI1[24]), .Y(un128_OOOI1_0) ); defparam \un128_OOOI1[24] .INIT=4'h8; // @28:439886 CFG2 \un128_OOOI1[28] ( .A(IoOl1_1z), .B(oloI1[28]), .Y(un128_OOOI1_4) ); defparam \un128_OOOI1[28] .INIT=4'h8; // @28:439603 CFG3 \un1_OOOI1[16] ( .A(o0il1_0), .B(Iiil1), .C(olOl1_1z), .Y(un1_OOOI1_0) ); defparam \un1_OOOI1[16] .INIT=8'hD0; // @28:439654 CFG4 \un12_OOOI1[14] ( .A(i01I1_1z[14]), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .C(un5_O1iIo_3), .D(un4_I1o11_4_RNI4IU79), .Y(un12_OOOI1_10) ); defparam \un12_OOOI1[14] .INIT=16'h2000; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_AMCXFIF_HST_Z8 */ module CTSE_AMCXFIF_CLKRST_26s_1s ( Ii1I1, oi1I1, OOoI1, li1I1, ii1I1_1z, lIli0_i, PF_CCC_0_0_OUT0_FABCLK_0, oIli0_i, PF_IOD_CDR_CCC_C0_0_TX_CLK_G, iIli0_i, PF_IOD_CDR_C0_0_RX_CLK_R, Olli0_i, I0oI1_i, i0oI1_i_1z, oilI1_i, o0oI1_i, l0oI1_i ) ; input Ii1I1 ; input oi1I1 ; input OOoI1 ; input li1I1 ; input ii1I1_1z ; input lIli0_i ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input oIli0_i ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; input iIli0_i ; input PF_IOD_CDR_C0_0_RX_CLK_R ; input Olli0_i ; output I0oI1_i ; output i0oI1_i_1z ; output oilI1_i ; output o0oI1_i ; output l0oI1_i ; wire Ii1I1 ; wire oi1I1 ; wire OOoI1 ; wire li1I1 ; wire ii1I1_1z ; wire lIli0_i ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire oIli0_i ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire iIli0_i ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire Olli0_i ; wire I0oI1_i ; wire i0oI1_i_1z ; wire oilI1_i ; wire o0oI1_i ; wire l0oI1_i ; wire l0oI1 ; wire o0oI1 ; wire oilI1 ; wire i0oI1 ; wire I0oI1 ; wire GND ; wire i0iI1_Z ; wire VCC ; wire l0iI1_Z ; wire wtrst_1_Z ; wire frrst_1_Z ; wire ftrst_1_Z ; CFG1 o0iI1_RNIR03K5 ( .A(l0oI1), .Y(l0oI1_i) ); defparam o0iI1_RNIR03K5.INIT=2'h1; CFG1 O0iI1_RNIRVUD1 ( .A(o0oI1), .Y(o0oI1_i) ); defparam O0iI1_RNIRVUD1.INIT=2'h1; CFG1 O1iI1_RNIS22F1 ( .A(oilI1), .Y(oilI1_i) ); defparam O1iI1_RNIS22F1.INIT=2'h1; CFG1 I0iI1_RNIL7QK2 ( .A(i0oI1), .Y(i0oI1_i_1z) ); defparam I0iI1_RNIL7QK2.INIT=2'h1; CFG1 iliI1_RNIHUNS ( .A(I0oI1), .Y(I0oI1_i) ); defparam iliI1_RNIHUNS.INIT=2'h1; // @28:437064 SLE O1iI1 ( .Q(oilI1), .ADn(GND), .ALn(Olli0_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i0iI1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:437004 SLE o0iI1 ( .Q(l0oI1), .ADn(GND), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l0iI1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:436944 SLE I0iI1 ( .Q(i0oI1), .ADn(GND), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(wtrst_1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:436884 SLE O0iI1 ( .Q(o0oI1), .ADn(GND), .ALn(oIli0_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(frrst_1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:436824 SLE iliI1 ( .Q(I0oI1), .ADn(GND), .ALn(lIli0_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ftrst_1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:437034 SLE i0iI1 ( .Q(i0iI1_Z), .ADn(GND), .ALn(Olli0_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ii1I1_1z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:436974 SLE l0iI1 ( .Q(l0iI1_Z), .ADn(GND), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(li1I1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:436914 SLE wtrst_1 ( .Q(wtrst_1_Z), .ADn(GND), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OOoI1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:436854 SLE frrst_1 ( .Q(frrst_1_Z), .ADn(GND), .ALn(oIli0_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(oi1I1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:436794 SLE ftrst_1 ( .Q(ftrst_1_Z), .ADn(GND), .ALn(lIli0_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ii1I1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_AMCXFIF_CLKRST_26s_1s */ module CTSE_SIB_SYNC_2FLP_1s_26s_1s_8 ( IoOI1, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i, PF_IOD_CDR_C0_0_RX_CLK_R, oilI1_i, OioI1 ) ; input IoOI1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; input PF_IOD_CDR_C0_0_RX_CLK_R ; input oilI1_i ; output OioI1 ; wire IoOI1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire oilI1_i ; wire OioI1 ; wire [0:0] ii1Io; wire [0:0] IOoIo; wire VCC ; wire GND ; // @28:545090 (* cdc_synchronizer=1 *) SLE \IIoIo.OOoIo[0] ( .Q(OioI1), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ii1Io[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545090 (* cdc_synchronizer=1 *) SLE \IIoIo.ii1Io[0] ( .Q(ii1Io[0]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IOoIo[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545058 (* cdc_synchronizer=1 *) SLE \IIoIo.IOoIo[0] ( .Q(IOoIo[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IoOI1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_SIB_SYNC_2FLP_1s_26s_1s_8 */ module CTSE_SIB_SYNC_2FLP_1s_26s_1s_8_0 ( ooIO1_0, IioI1_0, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i, PF_IOD_CDR_C0_0_RX_CLK_R, oilI1_i ) ; input ooIO1_0 ; output IioI1_0 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; input PF_IOD_CDR_C0_0_RX_CLK_R ; input oilI1_i ; wire ooIO1_0 ; wire IioI1_0 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire oilI1_i ; wire [0:0] ii1Io; wire [0:0] IOoIo; wire VCC ; wire GND ; // @28:545090 (* cdc_synchronizer=1 *) SLE \IIoIo.OOoIo[0] ( .Q(IioI1_0), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ii1Io[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545090 (* cdc_synchronizer=1 *) SLE \IIoIo.ii1Io[0] ( .Q(ii1Io[0]), .ADn(VCC), .ALn(oilI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IOoIo[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545058 (* cdc_synchronizer=1 *) SLE \IIoIo.IOoIo[0] ( .Q(IOoIo[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ooIO1_0), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_SIB_SYNC_2FLP_1s_26s_1s_8_0 */ module OiOI1_26s_11s_12s_32s_2s_0s ( ooIO1_0, wrdata_0, CoreAPB3_0_0_APBmslave0_PWDATA, i11I1, Oo1I1, iloI1, oloI1_1, paddr_0, PADDR_1z_0, rx_fifo_data_out, CoreAPB3_0_0_APBmslave2_PRDATA_m, CoreAPB3_0_0_APBmslave0_PADDR_3, CoreAPB3_0_0_APBmslave0_PADDR_5, CoreAPB3_0_0_APBmslave0_PADDR_0, CoreAPB3_0_0_APBmslave0_PADDR_1, un105_OOOI1_0, un105_OOOI1_4, un149_OOOI1_0, un137_OOOI1, un59_OOOI1_0, un73_OOOI1_8, un73_OOOI1_1, un73_OOOI1_0, un73_OOOI1_3, un114_OOOI1_0, un114_OOOI1_1, un114_OOOI1_21, un128_OOOI1_0, un128_OOOI1_4, un1_OOOI1_0, un12_OOOI1_0, un12_OOOI1_10, o0il1, i01I1, I11I1_1z, O11I1_1z, lliO1, I01I1_1z, Oo0i0, Io0i0, Io1I1_1z, o0iO1_1z, oo1I1_1z, lo1I1, oloI1, O0Il1_2z_0, un2_O1Il1_0, o01I1_1z, io0i0_1z, CORETSE_0_MRXDAT, oo0i0_1z, lIol1_0, il1I1, O10i0, IioO1_1z, I10i0, iIoI1_1z, ll1I1, l00i0, o00i0, oIoI1_1z, IoOI1, Olli0_i, iIli0_i, oIli0_i, lIli0_i, hstrst_i, li1I1, Ii1I1, OOoI1, oi1I1, ii1I1_1z, o1Ol1_2, un4_I1o11_4, lOi11_4, CoreAPB3_0_0_APBmslave0_PWRITE, tx_fifo_write_sig_0_sqmuxa_i_1, un5_O1iIo_3, liO019_i_1, ioOl1_3_0, o1Ol1_3_0, un1_PADDR, iPRDATA28, un4_Ooo11_1, un1_ooiO1, un1_Ii0O1, un1_o01O1_0, ioOl1, o1Ol1, ooOl1, un5_l0iIo_1, OoOl1_1z, N_82_2, un5_l1iIo_2, O1Ol1_1z, tx_fifo_write_sig14_i_2, un4_I1o11_4_RNI4IU79, un1_IIOO1_3_1, olOl1, liO0110_i_1, I0Ol1, l0Ol1, IoOl1_1z, N_1214, o0Ol1, un1_IIOO1_1_2, i0Ol1_1z, O0Ol1_1z, ilOl1, tx_fifo_write_sig14_i_1, l1Ol1, OIoI1, iiOI1, l11I1, IliO1, o11I1, iOiO1, o10i0_i, PF_IOD_CDR_C0_0_RX_CLK_R, iOoI1_1z, Oi1I1_1z, l0iO1, oliO1, O0iO1, O01I1, iliO1_1z, oI1I1_2z, Ol1I1, io1I1, o1iO1, i1iO1, I1iO1_1z, O0OI1, o0oI1_i, lI1I1_1z, oOoI1_1z, o0Il1_1z, PF_IOD_CDR_CCC_C0_0_TX_CLK_G, oIiO1, oool1_2z, lOoI1, OloI1_1z, IIiO1, iIiO1_1z, lOiO1, OOiO1_1z, ol1I1_1z, oOiO1_2z, iioO1, oioO1, lioO1, IOiO1_1z, O00i0_i, PF_CCC_0_0_OUT0_FABCLK_0, IOoI1_2z, OI1I1_3z, Il1I1_1z, lIoI1 ) ; input ooIO1_0 ; input wrdata_0 ; input [31:1] CoreAPB3_0_0_APBmslave0_PWDATA ; output [11:0] i11I1 ; output [11:0] Oo1I1 ; output [13:0] iloI1 ; output [39:36] oloI1_1 ; input paddr_0 ; input PADDR_1z_0 ; input [15:8] rx_fifo_data_out ; output [15:8] CoreAPB3_0_0_APBmslave2_PRDATA_m ; input CoreAPB3_0_0_APBmslave0_PADDR_3 ; input CoreAPB3_0_0_APBmslave0_PADDR_5 ; input CoreAPB3_0_0_APBmslave0_PADDR_0 ; input CoreAPB3_0_0_APBmslave0_PADDR_1 ; output un105_OOOI1_0 ; output un105_OOOI1_4 ; output un149_OOOI1_0 ; output [20:18] un137_OOOI1 ; output un59_OOOI1_0 ; output un73_OOOI1_8 ; output un73_OOOI1_1 ; output un73_OOOI1_0 ; output un73_OOOI1_3 ; output un114_OOOI1_0 ; output un114_OOOI1_1 ; output un114_OOOI1_21 ; output un128_OOOI1_0 ; output un128_OOOI1_4 ; output un1_OOOI1_0 ; output un12_OOOI1_0 ; output un12_OOOI1_10 ; output [2:0] o0il1 ; output [15:0] i01I1 ; output [12:0] I11I1_1z ; output [12:0] O11I1_1z ; input [7:0] lliO1 ; output [12:0] I01I1_1z ; output [11:0] Oo0i0 ; output [35:0] Io0i0 ; output [11:0] Io1I1_1z ; input [32:6] o0iO1_1z ; output [17:0] oo1I1_1z ; output [17:0] lo1I1 ; output [35:0] oloI1 ; output O0Il1_2z_0 ; output un2_O1Il1_0 ; output [31:0] o01I1_1z ; input [34:0] io0i0_1z ; output [31:0] CORETSE_0_MRXDAT ; output [11:0] oo0i0_1z ; output lIol1_0 ; output [39:0] il1I1 ; output [10:0] O10i0 ; output [7:0] IioO1_1z ; input [39:0] I10i0 ; output [12:0] iIoI1_1z ; output [10:0] ll1I1 ; output [10:0] l00i0 ; output [39:0] o00i0 ; output [39:0] oIoI1_1z ; input IoOI1 ; input Olli0_i ; input iIli0_i ; input oIli0_i ; input lIli0_i ; input hstrst_i ; output li1I1 ; output Ii1I1 ; output OOoI1 ; output oi1I1 ; output ii1I1_1z ; output o1Ol1_2 ; input un4_I1o11_4 ; input lOi11_4 ; input CoreAPB3_0_0_APBmslave0_PWRITE ; input tx_fifo_write_sig_0_sqmuxa_i_1 ; output un5_O1iIo_3 ; input liO019_i_1 ; output ioOl1_3_0 ; output o1Ol1_3_0 ; input un1_PADDR ; input iPRDATA28 ; input un4_Ooo11_1 ; input un1_ooiO1 ; input un1_Ii0O1 ; input un1_o01O1_0 ; output ioOl1 ; output o1Ol1 ; output ooOl1 ; input un5_l0iIo_1 ; output OoOl1_1z ; input N_82_2 ; input un5_l1iIo_2 ; output O1Ol1_1z ; input tx_fifo_write_sig14_i_2 ; input un4_I1o11_4_RNI4IU79 ; input un1_IIOO1_3_1 ; output olOl1 ; input liO0110_i_1 ; output I0Ol1 ; output l0Ol1 ; output IoOl1_1z ; input N_1214 ; output o0Ol1 ; input un1_IIOO1_1_2 ; output i0Ol1_1z ; output O0Ol1_1z ; output ilOl1 ; input tx_fifo_write_sig14_i_1 ; output l1Ol1 ; output OIoI1 ; output iiOI1 ; output l11I1 ; input IliO1 ; output o11I1 ; output iOiO1 ; output o10i0_i ; input PF_IOD_CDR_C0_0_RX_CLK_R ; output iOoI1_1z ; output Oi1I1_1z ; input l0iO1 ; input oliO1 ; input O0iO1 ; output O01I1 ; input iliO1_1z ; output oI1I1_2z ; output Ol1I1 ; output io1I1 ; input o1iO1 ; input i1iO1 ; input I1iO1_1z ; input O0OI1 ; output o0oI1_i ; output lI1I1_1z ; output oOoI1_1z ; output o0Il1_1z ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; input oIiO1 ; output oool1_2z ; output lOoI1 ; output OloI1_1z ; input IIiO1 ; input iIiO1_1z ; output lOiO1 ; output OOiO1_1z ; output ol1I1_1z ; output oOiO1_2z ; output iioO1 ; output oioO1 ; output lioO1 ; output IOiO1_1z ; output O00i0_i ; input PF_CCC_0_0_OUT0_FABCLK_0 ; output IOoI1_2z ; output OI1I1_3z ; output Il1I1_1z ; output lIoI1 ; wire ooIO1_0 ; wire wrdata_0 ; wire paddr_0 ; wire PADDR_1z_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_3 ; wire CoreAPB3_0_0_APBmslave0_PADDR_5 ; wire CoreAPB3_0_0_APBmslave0_PADDR_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_1 ; wire un105_OOOI1_0 ; wire un105_OOOI1_4 ; wire un149_OOOI1_0 ; wire un59_OOOI1_0 ; wire un73_OOOI1_8 ; wire un73_OOOI1_1 ; wire un73_OOOI1_0 ; wire un73_OOOI1_3 ; wire un114_OOOI1_0 ; wire un114_OOOI1_1 ; wire un114_OOOI1_21 ; wire un128_OOOI1_0 ; wire un128_OOOI1_4 ; wire un1_OOOI1_0 ; wire un12_OOOI1_0 ; wire un12_OOOI1_10 ; wire O0Il1_2z_0 ; wire un2_O1Il1_0 ; wire lIol1_0 ; wire IoOI1 ; wire Olli0_i ; wire iIli0_i ; wire oIli0_i ; wire lIli0_i ; wire hstrst_i ; wire li1I1 ; wire Ii1I1 ; wire OOoI1 ; wire oi1I1 ; wire ii1I1_1z ; wire o1Ol1_2 ; wire un4_I1o11_4 ; wire lOi11_4 ; wire CoreAPB3_0_0_APBmslave0_PWRITE ; wire tx_fifo_write_sig_0_sqmuxa_i_1 ; wire un5_O1iIo_3 ; wire liO019_i_1 ; wire ioOl1_3_0 ; wire o1Ol1_3_0 ; wire un1_PADDR ; wire iPRDATA28 ; wire un4_Ooo11_1 ; wire un1_ooiO1 ; wire un1_Ii0O1 ; wire un1_o01O1_0 ; wire ioOl1 ; wire o1Ol1 ; wire ooOl1 ; wire un5_l0iIo_1 ; wire OoOl1_1z ; wire N_82_2 ; wire un5_l1iIo_2 ; wire O1Ol1_1z ; wire tx_fifo_write_sig14_i_2 ; wire un4_I1o11_4_RNI4IU79 ; wire un1_IIOO1_3_1 ; wire olOl1 ; wire liO0110_i_1 ; wire I0Ol1 ; wire l0Ol1 ; wire IoOl1_1z ; wire N_1214 ; wire o0Ol1 ; wire un1_IIOO1_1_2 ; wire i0Ol1_1z ; wire O0Ol1_1z ; wire ilOl1 ; wire tx_fifo_write_sig14_i_1 ; wire l1Ol1 ; wire OIoI1 ; wire iiOI1 ; wire l11I1 ; wire IliO1 ; wire o11I1 ; wire iOiO1 ; wire o10i0_i ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire iOoI1_1z ; wire Oi1I1_1z ; wire l0iO1 ; wire oliO1 ; wire O0iO1 ; wire O01I1 ; wire iliO1_1z ; wire oI1I1_2z ; wire Ol1I1 ; wire io1I1 ; wire o1iO1 ; wire i1iO1 ; wire I1iO1_1z ; wire O0OI1 ; wire o0oI1_i ; wire lI1I1_1z ; wire oOoI1_1z ; wire o0Il1_1z ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire oIiO1 ; wire oool1_2z ; wire lOoI1 ; wire OloI1_1z ; wire IIiO1 ; wire iIiO1_1z ; wire lOiO1 ; wire OOiO1_1z ; wire ol1I1_1z ; wire oOiO1_2z ; wire iioO1 ; wire oioO1 ; wire lioO1 ; wire IOiO1_1z ; wire O00i0_i ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire IOoI1_2z ; wire OI1I1_3z ; wire Il1I1_1z ; wire lIoI1 ; wire [13:5] oIoI1; wire [1:0] CORETSE_0_MRXBYTEVALID; wire [12:0] IIoI1; wire [11:11] ll1I1_Z; wire [11:0] lo0I1; wire [12:0] oi0I1; wire [12:0] Ii0I1; wire [34:29] o01I1; wire [13:0] IloI1; wire [1:1] IioI1; wire [12:0] IO1I1; wire [12:0] lO1I1; wire [11:10] I01I1; wire CORETSE_0_MRXEOF ; wire oo0I1 ; wire i10I1 ; wire I0oI1_i ; wire NN_1 ; wire NN_2 ; wire l0oI1_i ; wire N_14983 ; wire Oi0I1 ; wire OO1I1 ; wire ii0I1 ; wire O0oI1 ; wire li0I1 ; wire NN_3 ; wire NN_4 ; wire OioI1 ; wire oO1I1 ; wire iO1I1 ; wire lloI1 ; wire oilI1_i ; wire NN_5 ; wire NN_6 ; wire Iiil1 ; wire i0oI1_i ; wire GND ; wire VCC ; // @28:434653 CTSE_AMCXTFIF_FAB_26s_11s_32s_2s_0_0_1s CTSE_AMCXTFIF_FAB_1 ( .oIoI1({oIoI1_1z[39:14], oIoI1[13], oIoI1_1z[12:9], oIoI1[8], oIoI1_1z[7], oIoI1[6:5], oIoI1_1z[4:0]}), .CORETSE_0_MRXBYTEVALID(CORETSE_0_MRXBYTEVALID[1:0]), .IIoI1(IIoI1[12:0]), .o00i0(o00i0[39:0]), .l00i0(l00i0[10:0]), .ll1I1({ll1I1_Z[11], ll1I1[10:0]}), .lo0I1(lo0I1[11:0]), .CORETSE_0_MRXEOF(CORETSE_0_MRXEOF), .lIoI1(lIoI1), .Il1I1_1z(Il1I1_1z), .OI1I1_1z(OI1I1_3z), .oo0I1_1z(oo0I1), .i10I1(i10I1), .IOoI1(IOoI1_2z), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .I0oI1_i(I0oI1_i), .O00i0_i(O00i0_i) ); // @28:434881 CTSE_AMCXTFIF_SYS_26s_11s_32s_2s_0s_0_0_1s CTSE_AMCXTFIF_SYS_1 ( .iIoI1(iIoI1_1z[12:0]), .I10i0(I10i0[39:0]), .IioO1(IioO1_1z[7:0]), .O10i0(O10i0[10:0]), .il1I1({il1I1[39:29], NN_2, il1I1[27:25], NN_1, il1I1[23:0]}), .lo0I1(lo0I1[11:0]), .lIol1_0(lIol1_0), .IOiO1_1z(IOiO1_1z), .lioO1(lioO1), .oioO1(oioO1), .iioO1_1z(iioO1), .oOiO1(oOiO1_2z), .ol1I1_1z(ol1I1_1z), .OOiO1_1z(OOiO1_1z), .lOiO1_1z(lOiO1), .iIiO1(iIiO1_1z), .IIiO1_1z(IIiO1), .oo0I1(oo0I1), .OloI1(OloI1_1z), .lOoI1(lOoI1), .oool1_1z(oool1_2z), .i10I1_1z(i10I1), .oIiO1(oIiO1), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .l0oI1_i(l0oI1_i) ); // @28:435103 CTSE_AMCXRFIF_FAB_26s_12s_32s_2s_0_1s CTSE_AMCXRFIF_FAB_1 ( .oo0i0(oo0i0_1z[11:0]), .iloI1({iloI1[13], N_14983, iloI1[11:0]}), .oi0I1(oi0I1[12:0]), .CORETSE_0_MRXDAT(CORETSE_0_MRXDAT[31:0]), .CORETSE_0_MRXBYTEVALID(CORETSE_0_MRXBYTEVALID[1:0]), .io0i0(io0i0_1z[34:0]), .Ii0I1(Ii0I1[12:0]), .o01I1({o01I1[34:32], o01I1_1z[31:30], o01I1[29], o01I1_1z[28:0]}), .un2_O1Il1_0(un2_O1Il1_0), .O0Il1_0(O0Il1_2z_0), .CORETSE_0_MRXEOF(CORETSE_0_MRXEOF), .Oi0I1_1z(Oi0I1), .o0Il1_1z(o0Il1_1z), .oOoI1(oOoI1_1z), .lI1I1(lI1I1_1z), .OO1I1(OO1I1), .ii0I1_1z(ii0I1), .O0oI1(O0oI1), .li0I1_1z(li0I1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .o0oI1_i(o0oI1_i) ); // @28:435289 CTSE_AMCXRFIF_SYS_26s_0s_12s_32s_2s_0_0_0_1s CTSE_AMCXRFIF_SYS_1 ( .oloI1({oloI1[35:29], NN_4, oloI1[27:25], NN_3, oloI1[23:0]}), .lo1I1(lo1I1[17:0]), .oo1I1(oo1I1_1z[17:0]), .IloI1(IloI1[13:0]), .o0iO1(o0iO1_1z[32:6]), .IioI1_0(IioI1[1]), .Io1I1_1z(Io1I1_1z[11:0]), .Io0i0(Io0i0[35:0]), .Oo0i0(Oo0i0[11:0]), .oi0I1(oi0I1[12:0]), .Ii0I1(Ii0I1[12:0]), .IO1I1_2z(IO1I1[12:0]), .lO1I1_1z(lO1I1[12:0]), .I01I1({I01I1_1z[12], I01I1[11:10], I01I1_1z[9:0]}), .lliO1(lliO1[7:0]), .O0OI1(O0OI1), .I1iO1(I1iO1_1z), .i1iO1_1z(i1iO1), .o1iO1(o1iO1), .io1I1(io1I1), .OioI1(OioI1), .Ol1I1_1z(Ol1I1), .oI1I1_1z(oI1I1_2z), .iliO1(iliO1_1z), .oO1I1_1z(oO1I1), .OO1I1_2z(OO1I1), .O01I1_1z(O01I1), .O0iO1_1z(O0iO1), .oliO1(oliO1), .l0iO1(l0iO1), .Oi1I1(Oi1I1_1z), .Oi0I1_1z(Oi0I1), .iO1I1_3z(iO1I1), .li0I1(li0I1), .iOoI1(iOoI1_1z), .lloI1(lloI1), .ii0I1_1z(ii0I1), .PF_IOD_CDR_C0_0_RX_CLK_R(PF_IOD_CDR_C0_0_RX_CLK_R), .oilI1_i(oilI1_i), .o10i0_i(o10i0_i) ); // @28:435553 CTSE_AMCXTFIF_WTM_26s_12s_1s_0_0 CTSE_AMCXTFIF_WTM_1 ( .O11I1_1z(O11I1_1z[12:0]), .I11I1(I11I1_1z[12:0]), .i01I1({i01I1[15], NN_6, i01I1[13:5], NN_5, i01I1[3:0]}), .lO1I1(lO1I1[12:0]), .IO1I1(IO1I1[12:0]), .o0il1(o0il1[2:0]), .iOiO1_1z(iOiO1), .o11I1(o11I1), .IliO1(IliO1), .l11I1(l11I1), .iiOI1_1z(iiOI1), .oO1I1(oO1I1), .OIoI1(OIoI1), .Iiil1_1z(Iiil1), .iO1I1_1z(iO1I1), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .i0oI1_i(i0oI1_i) ); // @28:435697 CTSE_AMCXFIF_HST_Z8 CTSE_AMCXFIF_HST_1 ( .un12_OOOI1_0(un12_OOOI1_0), .un12_OOOI1_10(un12_OOOI1_10), .un1_OOOI1_0(un1_OOOI1_0), .o0il1_0(o0il1[0]), .un128_OOOI1_0(un128_OOOI1_0), .un128_OOOI1_4(un128_OOOI1_4), .un114_OOOI1_0(un114_OOOI1_0), .un114_OOOI1_1(un114_OOOI1_1), .un114_OOOI1_21(un114_OOOI1_21), .I01I1(I01I1[11:10]), .un73_OOOI1_8(un73_OOOI1_8), .un73_OOOI1_1(un73_OOOI1_1), .un73_OOOI1_0(un73_OOOI1_0), .un73_OOOI1_3(un73_OOOI1_3), .un59_OOOI1_0(un59_OOOI1_0), .ll1I1_0(ll1I1_Z[11]), .un137_OOOI1(un137_OOOI1[20:18]), .o01I1_0(o01I1[29]), .o01I1_3(o01I1[32]), .o01I1_4(o01I1[33]), .o01I1_5(o01I1[34]), .un149_OOOI1_0(un149_OOOI1_0), .un105_OOOI1_0(un105_OOOI1_0), .un105_OOOI1_4(un105_OOOI1_4), .il1I1_0(NN_1), .il1I1_4(NN_2), .CoreAPB3_0_0_APBmslave0_PADDR_3(CoreAPB3_0_0_APBmslave0_PADDR_3), .CoreAPB3_0_0_APBmslave0_PADDR_5(CoreAPB3_0_0_APBmslave0_PADDR_5), .CoreAPB3_0_0_APBmslave0_PADDR_0(CoreAPB3_0_0_APBmslave0_PADDR_0), .CoreAPB3_0_0_APBmslave0_PADDR_1(CoreAPB3_0_0_APBmslave0_PADDR_1), .CoreAPB3_0_0_APBmslave2_PRDATA_m(CoreAPB3_0_0_APBmslave2_PRDATA_m[15:8]), .rx_fifo_data_out(rx_fifo_data_out[15:8]), .PADDR_0(PADDR_1z_0), .paddr_1z_0(paddr_0), .IloI1(IloI1[13:0]), .oloI1_1(oloI1_1[39:36]), .oloI1({oloI1[35:29], NN_4, oloI1[27:25], NN_3, oloI1[23:0]}), .iloI1_1z(iloI1[13:0]), .Oo1I1(Oo1I1[11:0]), .i11I1(i11I1[11:0]), .IIoI1(IIoI1[12:0]), .CoreAPB3_0_0_APBmslave0_PWDATA(CoreAPB3_0_0_APBmslave0_PWDATA[31:1]), .oIoI1({oIoI1_1z[39:14], oIoI1[13], oIoI1_1z[12:9], oIoI1[8], oIoI1_1z[7], oIoI1[6:5], oIoI1_1z[4:0]}), .iIoI1_1z(iIoI1_1z[12:0]), .Io1I1(Io1I1_1z[11:0]), .i01I1_1z({i01I1[15], NN_6, i01I1[13:5], NN_5, i01I1[3:0]}), .I11I1_1z(I11I1_1z[12:0]), .O11I1(O11I1_1z[12:0]), .oo1I1_1z(oo1I1_1z[17:0]), .lo1I1(lo1I1[17:0]), .wrdata_0(wrdata_0), .Iiil1(Iiil1), .l1Ol1_1z(l1Ol1), .tx_fifo_write_sig14_i_1(tx_fifo_write_sig14_i_1), .ilOl1_1z(ilOl1), .O0Ol1_1z(O0Ol1_1z), .i0Ol1_1z(i0Ol1_1z), .un1_IIOO1_1_2(un1_IIOO1_1_2), .o0Ol1_2z(o0Ol1), .N_1214(N_1214), .IoOl1_1z(IoOl1_1z), .l0Ol1_1z(l0Ol1), .I0Ol1_2z(I0Ol1), .liO0110_i_1(liO0110_i_1), .olOl1_1z(olOl1), .un1_IIOO1_3_1(un1_IIOO1_3_1), .un4_I1o11_4_RNI4IU79(un4_I1o11_4_RNI4IU79), .tx_fifo_write_sig14_i_2(tx_fifo_write_sig14_i_2), .O1Ol1_1z(O1Ol1_1z), .un5_l1iIo_2(un5_l1iIo_2), .N_82_2(N_82_2), .OoOl1_1z(OoOl1_1z), .un5_l0iIo_1(un5_l0iIo_1), .ooOl1_2z(ooOl1), .o1Ol1_2z(o1Ol1), .ioOl1_2z(ioOl1), .un1_o01O1_0(un1_o01O1_0), .un1_Ii0O1(un1_Ii0O1), .un1_ooiO1(un1_ooiO1), .un4_Ooo11_1(un4_Ooo11_1), .iPRDATA28(iPRDATA28), .un1_PADDR(un1_PADDR), .o1Ol1_3_0_1z(o1Ol1_3_0), .ioOl1_3_0_1z(ioOl1_3_0), .liO019_i_1(liO019_i_1), .un5_O1iIo_3(un5_O1iIo_3), .tx_fifo_write_sig_0_sqmuxa_i_1(tx_fifo_write_sig_0_sqmuxa_i_1), .CoreAPB3_0_0_APBmslave0_PWRITE(CoreAPB3_0_0_APBmslave0_PWRITE), .lOi11_4(lOi11_4), .un4_I1o11_4(un4_I1o11_4), .o1Ol1_2_1z(o1Ol1_2), .o11I1_1z(o11I1), .io1I1_1z(io1I1), .Oi1I1_1z(Oi1I1_1z), .ii1I1(ii1I1_1z), .oi1I1(oi1I1), .OOoI1(OOoI1), .Ii1I1_1z(Ii1I1), .li1I1(li1I1), .oOoI1_1z(oOoI1_1z), .lOoI1_1z(lOoI1), .iOoI1_1z(iOoI1_1z), .OIoI1_1z(OIoI1), .IOoI1_2z(IOoI1_2z), .O0oI1_1z(O0oI1), .lloI1_1z(lloI1), .OloI1_1z(OloI1_1z), .lIoI1_1z(lIoI1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i), .l11I1_1z(l11I1) ); // @28:436039 CTSE_AMCXFIF_CLKRST_26s_1s CTSE_AMCXFIF_CLKRST_1 ( .Ii1I1(Ii1I1), .oi1I1(oi1I1), .OOoI1(OOoI1), .li1I1(li1I1), .ii1I1_1z(ii1I1_1z), .lIli0_i(lIli0_i), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .oIli0_i(oIli0_i), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .iIli0_i(iIli0_i), .PF_IOD_CDR_C0_0_RX_CLK_R(PF_IOD_CDR_C0_0_RX_CLK_R), .Olli0_i(Olli0_i), .I0oI1_i(I0oI1_i), .i0oI1_i_1z(i0oI1_i), .oilI1_i(oilI1_i), .o0oI1_i(o0oI1_i), .l0oI1_i(l0oI1_i) ); // @28:436351 CTSE_SIB_SYNC_2FLP_1s_26s_1s_8 OIiI1 ( .IoOI1(IoOI1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i), .PF_IOD_CDR_C0_0_RX_CLK_R(PF_IOD_CDR_C0_0_RX_CLK_R), .oilI1_i(oilI1_i), .OioI1(OioI1) ); // @28:436469 CTSE_SIB_SYNC_2FLP_1s_26s_1s_8_0 lIiI1 ( .ooIO1_0(ooIO1_0), .IioI1_0(IioI1[1]), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i), .PF_IOD_CDR_C0_0_RX_CLK_R(PF_IOD_CDR_C0_0_RX_CLK_R), .oilI1_i(oilI1_i) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* OiOI1_26s_11s_12s_32s_2s_0s */ module CTSE_PEMGT_1s_26s ( OlII1, o1l11, i1l11, Ool11, iol11, lol11, Iol11, ll011, Oil11, Iil11, ioIO1, OI011, OiIO1, IiIO1, mdc, loII1, i1I11, OoI11, ol011, il011, IoI11, loI11 ) ; input OlII1 ; input [2:0] o1l11 ; input i1l11 ; input Ool11 ; input [15:0] iol11 ; input [4:0] lol11 ; input [4:0] Iol11 ; input ll011 ; input Oil11 ; input Iil11 ; input ioIO1 ; input OI011 ; output OiIO1 ; output IiIO1 ; output mdc ; output loII1 ; output i1I11 ; output [15:0] OoI11 ; output [4:0] ol011 ; output il011 ; output IoI11 ; output loI11 ; wire OlII1 ; wire i1l11 ; wire Ool11 ; wire ll011 ; wire Oil11 ; wire Iil11 ; wire ioIO1 ; wire OI011 ; wire OiIO1 ; wire IiIO1 ; wire mdc ; wire loII1 ; wire i1I11 ; wire il011 ; wire IoI11 ; wire loI11 ; wire [5:1] O1Oo1_Z; wire [7:0] ooOo1_Z; wire [4:0] IIIo1_Z; wire [3:0] OIIo1; wire [3:0] lIIo1; wire [5:0] i0Oo1_Z; wire [7:0] loOo1_Z; wire [5:3] loOo1; wire [4:0] un61_I0i11_i_0; wire [31:0] l0i11_Z; wire [31:0] l0i11_ns; wire [0:0] un1_l1Oo1_Z; wire [6:6] un34_loOo1_Z; wire [1:1] un6_loOo1_Z; wire [5:5] loOo1_0_RNO_Z; wire [3:3] loOo1_0_a2_0_0_Z; wire [4:2] un61_I0i11_1_un33_i_a2_3; wire [4:1] un61_I0i11_1_un33_i_a2_4; wire [4:1] un61_I0i11_1_un33_i_a2_5; wire [1:0] un61_I0i11_1_un33_i_a2_6; wire [0:0] un61_I0i11_1_un33_i_a2_7; wire [0:0] un61_I0i11_1_un33_i_a2_8; wire [0:0] un61_I0i11_1_un33_i_a2_9; wire [5:5] loOo1_0_a2_3_0_Z; wire [3:3] un61_I0i11_1_un33_i_a2_1_0; wire [22:22] l0i11_ns_0_a2_0_2_Z; wire [22:22] l0i11_ns_0_a2_0_10_0_Z; wire [22:22] l0i11_ns_0_a2_0_12_Z; wire [22:22] l0i11_ns_0_a2_0_13_Z; wire [22:22] l0i11_ns_0_a2_0_14_Z; wire [22:22] l0i11_ns_0_a2_0_15_Z; wire [22:22] l0i11_ns_0_a2_0_17_Z; wire [22:22] l0i11_ns_0_a2_0_20_Z; wire [22:22] l0i11_ns_0_a2_0_21_Z; wire [5:5] i0Oo1_0_Z; wire [3:3] loOo1_0_1_Z; wire [5:3] loOo1_0_2_Z; wire [5:5] loOo1_0_0_Z; wire [7:0] loOo1_0_Z; wire [6:1] loOo1_2_Z; wire [7:2] loOo1_1_Z; wire [3:0] lIIo1_0_0_Z; wire [4:4] lIIo1_i_0_Z; wire [6:6] un61_I0i11_1_l0i11_ns_0_a2_0_0; wire [2:2] ooOo1_i; wire [0:0] OIIo1_0_1_Z; wire [0:0] loOo1_1_0_Z; wire un3_o1i11_0_a2_Z ; wire un1_llOo1_Z ; wire IlIo1_Z ; wire OlIo1_Z ; wire O0Oo1_Z ; wire loi11_Z ; wire lii11_Z ; wire I1i11_Z ; wire ioi11_Z ; wire OOOo1_Z ; wire oOOo1_Z ; wire OIOo1_Z ; wire lIOo1_Z ; wire olOo1_Z ; wire ilOo1_Z ; wire N_1418_i ; wire o0Oo1_Z ; wire iIIo1_Z ; wire OiOo1_Z ; wire VCC ; wire GND ; wire O1i11_Z ; wire Oii11_Z ; wire oii11_Z ; wire IOOo1_Z ; wire liOo1_Z ; wire IiOo1_Z ; wire oiOo1_Z ; wire iOIo1_Z ; wire ilIo1_Z ; wire Iii11_Z ; wire iii11_Z ; wire lOOo1_Z ; wire O1i11_2_Z ; wire I0Oo1_Z ; wire iOOo1_Z ; wire IIOo1_Z ; wire oIIo1_Z ; wire oiOo1_2_Z ; wire Ioi11_Z ; wire ooi11_Z ; wire l1i11_Z ; wire OoI116_Z ; wire llIo1_Z ; wire lOIo1_Z ; wire llOo1_Z ; wire N_1 ; wire N_2 ; wire N_3 ; wire N_4 ; wire N_5 ; wire N_6 ; wire N_7 ; wire N_8 ; wire N_9 ; wire N_10 ; wire N_11 ; wire N_12 ; wire N_13 ; wire N_14 ; wire N_15 ; wire N_16 ; wire N_17 ; wire N_18 ; wire N_19 ; wire N_20 ; wire N_21 ; wire N_22 ; wire N_23 ; wire N_24 ; wire N_25 ; wire N_26 ; wire N_27 ; wire N_28 ; wire N_29 ; wire N_30 ; wire N_31 ; wire N_32 ; wire mdc_0 ; wire OlIo1_0 ; wire un1_O1Oo1_i ; wire llIo18_Z ; wire OOIo1_Z ; wire oIOo1_Z ; wire llIo1_2 ; wire ioOo1_Z ; wire IiOo1_2_Z ; wire N_42 ; wire un3_loOo1 ; wire un8_loOo1 ; wire N_63 ; wire N_1350 ; wire N_45 ; wire N_85_1 ; wire un9_l1Oo1_4_Z ; wire N_50 ; wire N_40 ; wire un10_i0Oo1_Z ; wire N_47 ; wire OOIo1_1_Z ; wire un18_i0Oo1_Z ; wire N_128 ; wire N_89 ; wire N_80 ; wire N_87 ; wire N_136 ; wire OlOo1_Z ; wire un1_l1i11_Z ; wire N_1241 ; wire N_1285 ; wire N_1279 ; wire N_1287 ; wire N_1277 ; wire N_1289 ; wire N_1293 ; wire N_1281 ; wire N_1291 ; wire N_1251 ; wire N_1247 ; wire N_1278 ; wire N_1244 ; wire N_1243 ; wire N_1256 ; wire N_1238 ; wire N_1219 ; wire N_1090 ; wire N_1082 ; wire N_1276 ; wire N_1084 ; wire N_1083_1 ; wire N_1083 ; wire N_1276_18 ; wire N_1087 ; wire un61_I0i11_1_CO1 ; wire N_1081 ; wire N_48 ; wire N_43 ; wire N_129 ; wire N_76 ; wire N_58_i ; wire N_121 ; wire N_116 ; wire N_67 ; wire un25_i0Oo1_c2 ; wire un25_i0Oo1_c3 ; wire un25_i0Oo1_c4 ; wire un25_i0Oo1_c5 ; wire IlOo1_0_Z ; wire un3_o1i11_0_a2_3_Z ; wire i1I11_2_Z ; wire un1_O1Oo1_3_Z ; wire OOIo1_2_0_Z ; wire un5_llOo1_1_Z ; wire un5_llOo1_2_Z ; wire un29_loOo1_i_a2_0_Z ; wire N_1351_i ; wire N_1349_i ; wire ioOo1_1_Z ; wire N_1349_i_1 ; wire OI011_i ; CFG1 IoI11_RNO ( .A(ooOo1_Z[2]), .Y(ooOo1_i[2]) ); defparam IoI11_RNO.INIT=2'h1; CFG1 OI011_RNIAHQS3 ( .A(OI011), .Y(OI011_i) ); defparam OI011_RNIAHQS3.INIT=2'h1; // @28:484107 SLE Iii11 ( .Q(Iii11_Z), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(Oii11_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:486160 SLE ilIo1 ( .Q(ilIo1_Z), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(ioIO1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:486096 SLE iIIo1 ( .Q(iIIo1_Z), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(iOIo1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:485892 SLE OiIO1_Z ( .Q(OiIO1), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(oiOo1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:485790 SLE liOo1 ( .Q(liOo1_Z), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(IiOo1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:484267 SLE IOOo1 ( .Q(IOOo1_Z), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(Iil11), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:484171 SLE oii11 ( .Q(oii11_Z), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(Oil11), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:484075 SLE Oii11 ( .Q(Oii11_Z), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(ll011), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:484043 SLE I1i11 ( .Q(I1i11_Z), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(O1i11_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:483976 SLE IlIo1 ( .Q(IlIo1_Z), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(OlIo1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:485854 SLE oiOo1 ( .Q(oiOo1_Z), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(oiOo1_2_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:485612 SLE il011_Z ( .Q(il011), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(oIIo1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:484008 SLE O1i11 ( .Q(O1i11_Z), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(O1i11_2_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:484235 SLE OOOo1 ( .Q(OOOo1_Z), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(iii11_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:484139 SLE lii11 ( .Q(lii11_Z), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(Iii11_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:485822 SLE IiIO1_Z ( .Q(IiIO1), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(liOo1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:484299 SLE lOOo1 ( .Q(lOOo1_Z), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(IOOo1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:484203 SLE iii11 ( .Q(iii11_Z), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(oii11_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:484730 SLE olOo1 ( .Q(olOo1_Z), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(llOo1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:484481 SLE loI11_Z ( .Q(loI11), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(l1i11_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:484431 SLE ioi11 ( .Q(ioi11_Z), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(ooi11_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:484383 SLE loi11 ( .Q(loi11_Z), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(Ioi11_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:483865 SLE \l0i11[8] ( .Q(l0i11_Z[8]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(l0i11_ns[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:483865 SLE \l0i11[7] ( .Q(l0i11_Z[7]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(l0i11_ns[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:483865 SLE \l0i11[6] ( .Q(l0i11_Z[6]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(l0i11_ns[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:483865 SLE \l0i11[5] ( .Q(l0i11_Z[5]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(l0i11_ns[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:483865 SLE \l0i11[4] ( .Q(l0i11_Z[4]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(l0i11_ns[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:483865 SLE \l0i11[3] ( .Q(l0i11_Z[3]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(l0i11_ns[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:483865 SLE \l0i11[2] ( .Q(l0i11_Z[2]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(l0i11_ns[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:483865 SLE \l0i11[1] ( .Q(l0i11_Z[1]), .ADn(GND), .ALn(OI011_i), .CLK(OlII1), .D(l0i11_ns[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:483865 SLE \l0i11[0] ( .Q(l0i11_Z[0]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(l0i11_ns[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:483865 SLE \l0i11[23] ( .Q(l0i11_Z[23]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(l0i11_ns[23]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:483865 SLE \l0i11[22] ( .Q(l0i11_Z[22]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(l0i11_ns[22]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:483865 SLE \l0i11[21] ( .Q(l0i11_Z[21]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(l0i11_ns[21]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:483865 SLE \l0i11[20] ( .Q(l0i11_Z[20]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(l0i11_ns[20]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:483865 SLE \l0i11[19] ( .Q(l0i11_Z[19]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(l0i11_ns[19]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:483865 SLE \l0i11[18] ( .Q(l0i11_Z[18]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(l0i11_ns[18]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:483865 SLE \l0i11[17] ( .Q(l0i11_Z[17]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(l0i11_ns[17]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:483865 SLE \l0i11[16] ( .Q(l0i11_Z[16]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(l0i11_ns[16]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:483865 SLE \l0i11[15] ( .Q(l0i11_Z[15]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(l0i11_ns[15]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:483865 SLE \l0i11[14] ( .Q(l0i11_Z[14]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(l0i11_ns[14]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:483865 SLE \l0i11[13] ( .Q(l0i11_Z[13]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(l0i11_ns[13]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:483865 SLE \l0i11[12] ( .Q(l0i11_Z[12]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(l0i11_ns[12]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:483865 SLE \l0i11[11] ( .Q(l0i11_Z[11]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(l0i11_ns[11]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:483865 SLE \l0i11[10] ( .Q(l0i11_Z[10]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(l0i11_ns[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:483865 SLE \l0i11[9] ( .Q(l0i11_Z[9]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(l0i11_ns[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:483865 SLE \l0i11[31] ( .Q(l0i11_Z[31]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(l0i11_ns[31]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:483865 SLE \l0i11[30] ( .Q(l0i11_Z[30]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(l0i11_ns[30]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:483865 SLE \l0i11[29] ( .Q(l0i11_Z[29]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(l0i11_ns[29]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:483865 SLE \l0i11[28] ( .Q(l0i11_Z[28]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(l0i11_ns[28]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:483865 SLE \l0i11[27] ( .Q(l0i11_Z[27]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(l0i11_ns[27]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:483865 SLE \l0i11[26] ( .Q(l0i11_Z[26]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(l0i11_ns[26]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:483865 SLE \l0i11[25] ( .Q(l0i11_Z[25]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(l0i11_ns[25]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:483865 SLE \l0i11[24] ( .Q(l0i11_Z[24]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(l0i11_ns[24]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:484513 SLE iOOo1 ( .Q(iOOo1_Z), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(loi11_Z), .EN(loII1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:484585 SLE IIOo1 ( .Q(IIOo1_Z), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(ioi11_Z), .EN(loII1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:486060 SLE iOIo1 ( .Q(iOIo1_Z), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(lOIo1_Z), .EN(loII1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:484900 SLE o0Oo1 ( .Q(o0Oo1_Z), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(oIOo1_Z), .EN(un1_llOo1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:484762 SLE ilOo1 ( .Q(ilOo1_Z), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(olOo1_Z), .EN(loII1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:485710 SLE OiOo1 ( .Q(OiOo1_Z), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(ioOo1_Z), .EN(loII1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:485746 SLE IiOo1 ( .Q(IiOo1_Z), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(IiOo1_2_Z), .EN(loII1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:486239 SLE llIo1 ( .Q(llIo1_Z), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(llIo1_2), .EN(loII1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:483920 SLE OlIo1 ( .Q(OlIo1_Z), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(OlIo1_0), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:483920 SLE mdc_Z ( .Q(mdc), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(mdc_0), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:484331 SLE oOOo1 ( .Q(oOOo1_Z), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(lOOo1_Z), .EN(loII1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:484549 SLE OIOo1 ( .Q(OIOo1_Z), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(iOOo1_Z), .EN(loII1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:484621 SLE lIOo1 ( .Q(lIOo1_Z), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(IIOo1_Z), .EN(loII1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:484798 SLE O0Oo1 ( .Q(O0Oo1_Z), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(ilOo1_Z), .EN(loII1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:484834 SLE I0Oo1 ( .Q(I0Oo1_Z), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(O0Oo1_Z), .EN(loII1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:486375 SLE IoI11_Z ( .Q(IoI11), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(ooOo1_i[2]), .EN(un3_o1i11_0_a2_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:485988 SLE lOIo1 ( .Q(lOIo1_Z), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(OOIo1_Z), .EN(loII1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:486192 SLE \OoI11_Z[2] ( .Q(OoI11[2]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(OoI11[1]), .EN(OoI116_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:486192 SLE \OoI11_Z[1] ( .Q(OoI11[1]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(OoI11[0]), .EN(OoI116_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:486192 SLE \OoI11_Z[0] ( .Q(OoI11[0]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(ilIo1_Z), .EN(OoI116_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:485008 SLE \O1Oo1[1] ( .Q(O1Oo1_Z[1]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(i0Oo1_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:485008 SLE \O1Oo1[0] ( .Q(N_1418_i), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(i0Oo1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:486192 SLE \OoI11_Z[15] ( .Q(OoI11[15]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(OoI11[14]), .EN(OoI116_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:486192 SLE \OoI11_Z[14] ( .Q(OoI11[14]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(OoI11[13]), .EN(OoI116_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:486192 SLE \OoI11_Z[13] ( .Q(OoI11[13]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(OoI11[12]), .EN(OoI116_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:486192 SLE \OoI11_Z[12] ( .Q(OoI11[12]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(OoI11[11]), .EN(OoI116_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:486192 SLE \OoI11_Z[11] ( .Q(OoI11[11]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(OoI11[10]), .EN(OoI116_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:486192 SLE \OoI11_Z[10] ( .Q(OoI11[10]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(OoI11[9]), .EN(OoI116_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:486192 SLE \OoI11_Z[9] ( .Q(OoI11[9]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(OoI11[8]), .EN(OoI116_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:486192 SLE \OoI11_Z[8] ( .Q(OoI11[8]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(OoI11[7]), .EN(OoI116_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:486192 SLE \OoI11_Z[7] ( .Q(OoI11[7]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(OoI11[6]), .EN(OoI116_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:486192 SLE \OoI11_Z[6] ( .Q(OoI11[6]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(OoI11[5]), .EN(OoI116_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:486192 SLE \OoI11_Z[5] ( .Q(OoI11[5]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(OoI11[4]), .EN(OoI116_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:486192 SLE \OoI11_Z[4] ( .Q(OoI11[4]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(OoI11[3]), .EN(OoI116_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:486192 SLE \OoI11_Z[3] ( .Q(OoI11[3]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(OoI11[2]), .EN(OoI116_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:485447 SLE \IIIo1[2] ( .Q(IIIo1_Z[2]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(OIIo1[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:485447 SLE \IIIo1[1] ( .Q(IIIo1_Z[1]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(OIIo1[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:485447 SLE \IIIo1[0] ( .Q(IIIo1_Z[0]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(OIIo1[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:485274 SLE \ooOo1[7] ( .Q(ooOo1_Z[7]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(loOo1_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:485274 SLE \ooOo1[6] ( .Q(ooOo1_Z[6]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(loOo1_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:485274 SLE \ooOo1[5] ( .Q(ooOo1_Z[5]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(loOo1[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:485274 SLE \ooOo1[4] ( .Q(ooOo1_Z[4]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(loOo1_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:485274 SLE \ooOo1[3] ( .Q(ooOo1_Z[3]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(loOo1[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:485274 SLE \ooOo1[2] ( .Q(ooOo1_Z[2]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(loOo1_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:485274 SLE \ooOo1[1] ( .Q(ooOo1_Z[1]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(loOo1_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:485274 SLE \ooOo1[0] ( .Q(ooOo1_Z[0]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(loOo1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:485008 SLE \O1Oo1[5] ( .Q(O1Oo1_Z[5]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(i0Oo1_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:485008 SLE \O1Oo1[4] ( .Q(O1Oo1_Z[4]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(i0Oo1_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:485008 SLE \O1Oo1[3] ( .Q(O1Oo1_Z[3]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(i0Oo1_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:485008 SLE \O1Oo1[2] ( .Q(O1Oo1_Z[2]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(i0Oo1_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:485557 SLE \ol011_Z[4] ( .Q(ol011[4]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(N_1351_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:485557 SLE \ol011_Z[3] ( .Q(ol011[3]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(lIIo1[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:485557 SLE \ol011_Z[2] ( .Q(ol011[2]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(lIIo1[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:485557 SLE \ol011_Z[1] ( .Q(ol011[1]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(lIIo1[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:485557 SLE \ol011_Z[0] ( .Q(ol011[0]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(lIIo1[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:485447 SLE \IIIo1[4] ( .Q(IIIo1_Z[4]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(N_1349_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:485447 SLE \IIIo1[3] ( .Q(IIIo1_Z[3]), .ADn(VCC), .ALn(OI011_i), .CLK(OlII1), .D(OIIo1[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0_a2[18] ( .A(un61_I0i11_i_0[4]), .B(N_1276), .C(N_1279), .D(N_1285), .Y(l0i11_ns[18]) ); defparam \un61_I0i11_1.l0i11_ns_0_a2[18] .INIT=16'h2000; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0_a2[19] ( .A(N_1276), .B(un61_I0i11_i_0[4]), .C(N_1277), .D(N_1279), .Y(l0i11_ns[19]) ); defparam \un61_I0i11_1.l0i11_ns_0_a2[19] .INIT=16'h4000; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0_a2[26] ( .A(un61_I0i11_i_0[4]), .B(N_1276), .C(N_1279), .D(N_1291), .Y(l0i11_ns[26]) ); defparam \un61_I0i11_1.l0i11_ns_0_a2[26] .INIT=16'h2000; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0_a2[27] ( .A(un61_I0i11_i_0[4]), .B(N_1276), .C(N_1279), .D(N_1281), .Y(l0i11_ns[27]) ); defparam \un61_I0i11_1.l0i11_ns_0_a2[27] .INIT=16'h2000; // @28:485165 CFG4 un8_loOo1_0_a2 ( .A(O1Oo1_Z[3]), .B(N_40), .C(o0Oo1_Z), .D(O1Oo1_Z[4]), .Y(un8_loOo1) ); defparam un8_loOo1_0_a2.INIT=16'h1000; // @28:485498 CFG4 \lIIo1_0_a2_2[1] ( .A(N_43), .B(N_40), .C(O1Oo1_Z[3]), .D(O1Oo1_Z[4]), .Y(N_116) ); defparam \lIIo1_0_a2_2[1] .INIT=16'h0010; // @28:485498 CFG4 \lIIo1_0_o2[0] ( .A(IIIo1_Z[0]), .B(O1Oo1_Z[3]), .C(O1Oo1_Z[4]), .D(N_40), .Y(N_45) ); defparam \lIIo1_0_o2[0] .INIT=16'hFFF7; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0_a2_0_0_0[6] ( .A(un61_I0i11_i_0[1]), .B(un61_I0i11_i_0[0]), .C(un61_I0i11_i_0[2]), .D(un61_I0i11_i_0[3]), .Y(un61_I0i11_1_l0i11_ns_0_a2_0_0[6]) ); defparam \un61_I0i11_1.l0i11_ns_0_a2_0_0_0[6] .INIT=16'h0020; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0_a2[9] ( .A(o1l11[2]), .B(l0i11_Z[0]), .C(o1l11[1]), .D(o1l11[0]), .Y(N_1251) ); defparam \un61_I0i11_1.l0i11_ns_0_a2[9] .INIT=16'h0080; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0_a2[13] ( .A(o1l11[2]), .B(l0i11_Z[0]), .C(o1l11[1]), .D(o1l11[0]), .Y(N_1256) ); defparam \un61_I0i11_1.l0i11_ns_0_a2[13] .INIT=16'h8000; // @28:484705 CFG4 IlOo1_0 ( .A(IIOo1_Z), .B(iOOo1_Z), .C(lIOo1_Z), .D(OIOo1_Z), .Y(IlOo1_0_Z) ); defparam IlOo1_0.INIT=16'h0ACE; // @28:485147 CFG4 un3_loOo1_0_o2_0 ( .A(IlIo1_Z), .B(OlIo1_Z), .C(olOo1_Z), .D(un9_l1Oo1_4_Z), .Y(N_40) ); defparam un3_loOo1_0_o2_0.INIT=16'hBFFF; // @28:485447 CFG4 \IIIo1_RNO[4] ( .A(N_43), .B(IIIo1_Z[4]), .C(N_48), .D(N_1349_i_1), .Y(N_1349_i) ); defparam \IIIo1_RNO[4] .INIT=16'h40EF; // @28:485447 CFG4 \IIIo1_RNO_0[4] ( .A(IIIo1_Z[3]), .B(N_43), .C(Iol11[4]), .D(IIIo1_Z[4]), .Y(N_1349_i_1) ); defparam \IIIo1_RNO_0[4] .INIT=16'h0E1D; // @28:485145 CFG4 \loOo1[0] ( .A(loOo1_1_0_Z[0]), .B(N_1350), .C(ioIO1), .D(loOo1_0_Z[0]), .Y(loOo1_Z[0]) ); defparam \loOo1[0] .INIT=16'hFF75; // @28:485145 CFG4 \loOo1_1_0[0] ( .A(iol11[8]), .B(iol11[0]), .C(un8_loOo1), .D(un3_loOo1), .Y(loOo1_1_0_Z[0]) ); defparam \loOo1_1_0[0] .INIT=16'h135F; // @28:485325 CFG4 \OIIo1_0[0] ( .A(N_43), .B(IIIo1_Z[0]), .C(N_42), .D(OIIo1_0_1_Z[0]), .Y(OIIo1[0]) ); defparam \OIIo1_0[0] .INIT=16'h41EF; // @28:485325 CFG4 \OIIo1_0_1[0] ( .A(Iol11[0]), .B(IIIo1_Z[1]), .C(N_129), .D(N_43), .Y(OIIo1_0_1_Z[0]) ); defparam \OIIo1_0_1[0] .INIT=16'h557F; // @28:485647 CFG4 ioOo1 ( .A(O1Oo1_Z[5]), .B(olOo1_Z), .C(ioOo1_1_Z), .D(un10_i0Oo1_Z), .Y(ioOo1_Z) ); defparam ioOo1.INIT=16'hCC08; // @28:485647 CFG4 ioOo1_1 ( .A(O1Oo1_Z[4]), .B(o0Oo1_Z), .C(OOIo1_1_Z), .D(O1Oo1_Z[3]), .Y(ioOo1_1_Z) ); defparam ioOo1_1.INIT=16'h3222; // @28:483865 CFG2 \l0i11_ns_0_a2_0_2[22] ( .A(l0i11_Z[14]), .B(l0i11_Z[16]), .Y(l0i11_ns_0_a2_0_2_Z[22]) ); defparam \l0i11_ns_0_a2_0_2[22] .INIT=4'h1; // @28:485145 CFG2 \loOo1_0_a2_3_0[5] ( .A(O1Oo1_Z[4]), .B(o0Oo1_Z), .Y(loOo1_0_a2_3_0_Z[5]) ); defparam \loOo1_0_a2_3_0[5] .INIT=4'h2; // @28:484992 CFG2 un25_i0Oo1_ac0_1 ( .A(N_1418_i), .B(O1Oo1_Z[1]), .Y(un25_i0Oo1_c2) ); defparam un25_i0Oo1_ac0_1.INIT=4'h8; // @28:485325 CFG2 \OIIo1_i_o4[4] ( .A(oOOo1_Z), .B(Ool11), .Y(N_43) ); defparam \OIIo1_i_o4[4] .INIT=4'h7; // @28:484038 CFG2 O1i11_2 ( .A(O0Oo1_Z), .B(I0Oo1_Z), .Y(O1i11_2_Z) ); defparam O1i11_2.INIT=4'h4; // @28:483865 CFG2 \un61_I0i11_1.un33_i_a2_0[1] ( .A(l0i11_Z[23]), .B(l0i11_Z[22]), .Y(N_1087) ); defparam \un61_I0i11_1.un33_i_a2_0[1] .INIT=4'h1; // @28:483865 CFG2 \un61_I0i11_1.l0i11_ns_0_a2_1[4] ( .A(un61_I0i11_i_0[2]), .B(un61_I0i11_i_0[0]), .Y(N_1278) ); defparam \un61_I0i11_1.l0i11_ns_0_a2_1[4] .INIT=4'h2; // @28:483920 CFG2 \un61_I0i11_1.mdc_0 ( .A(mdc), .B(l0i11_Z[0]), .Y(mdc_0) ); defparam \un61_I0i11_1.mdc_0 .INIT=4'h6; // @28:483865 CFG2 \un61_I0i11_1.l0i11_ns_0_a2_1[1] ( .A(un61_I0i11_i_0[3]), .B(un61_I0i11_i_0[0]), .Y(N_1277) ); defparam \un61_I0i11_1.l0i11_ns_0_a2_1[1] .INIT=4'h4; // @28:483865 CFG2 \un61_I0i11_1.l0i11_ns_0_a2_1[2] ( .A(un61_I0i11_i_0[2]), .B(un61_I0i11_i_0[1]), .Y(N_1279) ); defparam \un61_I0i11_1.l0i11_ns_0_a2_1[2] .INIT=4'h4; // @28:483865 CFG2 \un61_I0i11_1.l0i11_ns_0_a2_1[9] ( .A(un61_I0i11_i_0[3]), .B(un61_I0i11_i_0[0]), .Y(N_1281) ); defparam \un61_I0i11_1.l0i11_ns_0_a2_1[9] .INIT=4'h8; // @28:483865 CFG2 \un61_I0i11_1.l0i11_ns_0_a2_1[0] ( .A(un61_I0i11_i_0[3]), .B(un61_I0i11_i_0[0]), .Y(N_1285) ); defparam \un61_I0i11_1.l0i11_ns_0_a2_1[0] .INIT=4'h1; // @28:483865 CFG2 \un61_I0i11_1.l0i11_ns_0_a2_3[2] ( .A(l0i11_Z[0]), .B(o1l11[1]), .Y(N_1287) ); defparam \un61_I0i11_1.l0i11_ns_0_a2_3[2] .INIT=4'h8; // @28:483865 CFG2 \un61_I0i11_1.l0i11_ns_0_a2_0[8] ( .A(un61_I0i11_i_0[3]), .B(un61_I0i11_i_0[0]), .Y(N_1291) ); defparam \un61_I0i11_1.l0i11_ns_0_a2_0[8] .INIT=4'h2; // @28:483920 CFG2 \un61_I0i11_1.OlIo1_0 ( .A(l0i11_Z[0]), .B(OlIo1_Z), .Y(OlIo1_0) ); defparam \un61_I0i11_1.OlIo1_0 .INIT=4'h6; // @28:485608 CFG2 oIIo1 ( .A(iOIo1_Z), .B(iIIo1_Z), .Y(oIIo1_Z) ); defparam oIIo1.INIT=4'h2; // @28:484675 CFG2 oIOo1 ( .A(iOOo1_Z), .B(OIOo1_Z), .Y(oIOo1_Z) ); defparam oIOo1.INIT=4'h2; // @28:484955 CFG2 un10_i0Oo1 ( .A(un1_O1Oo1_i), .B(i1l11), .Y(un10_i0Oo1_Z) ); defparam un10_i0Oo1.INIT=4'h4; // @28:485941 CFG2 OOIo1_1 ( .A(O1Oo1_Z[1]), .B(O1Oo1_Z[2]), .Y(OOIo1_1_Z) ); defparam OOIo1_1.INIT=4'h8; // @28:483915 CFG2 loII1_cZ ( .A(OlIo1_Z), .B(IlIo1_Z), .Y(loII1) ); defparam loII1_cZ.INIT=4'h2; // @28:485081 CFG2 un9_l1Oo1_3 ( .A(O1Oo1_Z[3]), .B(O1Oo1_Z[4]), .Y(N_85_1) ); defparam un9_l1Oo1_3.INIT=4'h1; // @28:485883 CFG2 oiOo1_2 ( .A(ooOo1_Z[7]), .B(OiOo1_Z), .Y(oiOo1_2_Z) ); defparam oiOo1_2.INIT=4'hB; // @28:483865 CFG4 \l0i11_ns_0_a2_0_15[22] ( .A(l0i11_Z[31]), .B(l0i11_Z[29]), .C(l0i11_Z[27]), .D(l0i11_Z[7]), .Y(l0i11_ns_0_a2_0_15_Z[22]) ); defparam \l0i11_ns_0_a2_0_15[22] .INIT=16'h0001; // @28:483865 CFG4 \l0i11_ns_0_a2_0_14[22] ( .A(l0i11_Z[24]), .B(l0i11_Z[23]), .C(l0i11_Z[20]), .D(l0i11_Z[17]), .Y(l0i11_ns_0_a2_0_14_Z[22]) ); defparam \l0i11_ns_0_a2_0_14[22] .INIT=16'h0001; // @28:483865 CFG4 \l0i11_ns_0_a2_0_13[22] ( .A(l0i11_Z[15]), .B(l0i11_Z[18]), .C(l0i11_Z[13]), .D(l0i11_Z[3]), .Y(l0i11_ns_0_a2_0_13_Z[22]) ); defparam \l0i11_ns_0_a2_0_13[22] .INIT=16'h0001; // @28:483865 CFG4 \l0i11_ns_0_a2_0_12[22] ( .A(l0i11_Z[28]), .B(l0i11_Z[26]), .C(l0i11_Z[22]), .D(l0i11_Z[30]), .Y(l0i11_ns_0_a2_0_12_Z[22]) ); defparam \l0i11_ns_0_a2_0_12[22] .INIT=16'h0001; // @28:483865 CFG3 \l0i11_ns_0_a2_0_10_0[22] ( .A(l0i11_Z[1]), .B(l0i11_Z[19]), .C(l0i11_Z[2]), .Y(l0i11_ns_0_a2_0_10_0_Z[22]) ); defparam \l0i11_ns_0_a2_0_10_0[22] .INIT=8'h01; // @28:483865 CFG4 \un61_I0i11_1.un33_i_a2_1_1[3] ( .A(l0i11_Z[24]), .B(l0i11_Z[8]), .C(l0i11_Z[13]), .D(l0i11_Z[25]), .Y(un61_I0i11_1_un33_i_a2_1_0[3]) ); defparam \un61_I0i11_1.un33_i_a2_1_1[3] .INIT=16'h0001; // @28:483865 CFG4 \un61_I0i11_1.un33_i_a2_4[2] ( .A(l0i11_Z[6]), .B(l0i11_Z[20]), .C(l0i11_Z[7]), .D(l0i11_Z[5]), .Y(un61_I0i11_1_un33_i_a2_4[2]) ); defparam \un61_I0i11_1.un33_i_a2_4[2] .INIT=16'h0001; // @28:483865 CFG4 \un61_I0i11_1.un33_i_a2_3_0[2] ( .A(l0i11_Z[12]), .B(l0i11_Z[4]), .C(l0i11_Z[21]), .D(l0i11_Z[13]), .Y(un61_I0i11_1_un33_i_a2_3[2]) ); defparam \un61_I0i11_1.un33_i_a2_3_0[2] .INIT=16'h0001; // @28:483865 CFG4 \un61_I0i11_1.un33_i_a2_9[0] ( .A(l0i11_Z[31]), .B(l0i11_Z[29]), .C(l0i11_Z[25]), .D(l0i11_Z[13]), .Y(un61_I0i11_1_un33_i_a2_9[0]) ); defparam \un61_I0i11_1.un33_i_a2_9[0] .INIT=16'h0001; // @28:483865 CFG4 \un61_I0i11_1.un33_i_a2_8[0] ( .A(l0i11_Z[27]), .B(l0i11_Z[17]), .C(l0i11_Z[7]), .D(l0i11_Z[19]), .Y(un61_I0i11_1_un33_i_a2_8[0]) ); defparam \un61_I0i11_1.un33_i_a2_8[0] .INIT=16'h0001; // @28:483865 CFG4 \un61_I0i11_1.un33_i_a2_7[0] ( .A(l0i11_Z[11]), .B(l0i11_Z[23]), .C(l0i11_Z[21]), .D(l0i11_Z[3]), .Y(un61_I0i11_1_un33_i_a2_7[0]) ); defparam \un61_I0i11_1.un33_i_a2_7[0] .INIT=16'h0001; // @28:483865 CFG4 \un61_I0i11_1.un33_i_a2_6[0] ( .A(l0i11_Z[9]), .B(l0i11_Z[1]), .C(l0i11_Z[15]), .D(l0i11_Z[5]), .Y(un61_I0i11_1_un33_i_a2_6[0]) ); defparam \un61_I0i11_1.un33_i_a2_6[0] .INIT=16'h0001; // @28:483865 CFG4 \un61_I0i11_1.un33_i_a2_5[1] ( .A(l0i11_Z[11]), .B(l0i11_Z[3]), .C(l0i11_Z[19]), .D(l0i11_Z[7]), .Y(un61_I0i11_1_un33_i_a2_5[1]) ); defparam \un61_I0i11_1.un33_i_a2_5[1] .INIT=16'h0001; // @28:483865 CFG4 \un61_I0i11_1.un33_i_a2_4[1] ( .A(l0i11_Z[10]), .B(l0i11_Z[2]), .C(l0i11_Z[18]), .D(l0i11_Z[6]), .Y(un61_I0i11_1_un33_i_a2_4[1]) ); defparam \un61_I0i11_1.un33_i_a2_4[1] .INIT=16'h0001; // @28:483865 CFG4 \un61_I0i11_1.un33_i_a2_4[4] ( .A(l0i11_Z[30]), .B(l0i11_Z[17]), .C(l0i11_Z[31]), .D(l0i11_Z[19]), .Y(un61_I0i11_1_un33_i_a2_4[4]) ); defparam \un61_I0i11_1.un33_i_a2_4[4] .INIT=16'h0001; // @28:483865 CFG4 \un61_I0i11_1.un33_i_a2_3[4] ( .A(l0i11_Z[20]), .B(l0i11_Z[18]), .C(l0i11_Z[16]), .D(l0i11_Z[24]), .Y(un61_I0i11_1_un33_i_a2_3[4]) ); defparam \un61_I0i11_1.un33_i_a2_3[4] .INIT=16'h0001; // @28:484725 CFG2 un5_llOo1_2 ( .A(loII1), .B(OOIo1_1_Z), .Y(un5_llOo1_2_Z) ); defparam un5_llOo1_2.INIT=4'h8; // @28:484725 CFG4 un5_llOo1_1 ( .A(O1Oo1_Z[4]), .B(O1Oo1_Z[3]), .C(O1Oo1_Z[5]), .D(N_1418_i), .Y(un5_llOo1_1_Z) ); defparam un5_llOo1_1.INIT=16'h8000; // @28:485941 CFG4 OOIo1_2_0 ( .A(N_1418_i), .B(O1Oo1_Z[5]), .C(olOo1_Z), .D(o0Oo1_Z), .Y(OOIo1_2_0_Z) ); defparam OOIo1_2_0.INIT=16'h0040; // @28:486274 CFG4 un1_O1Oo1_3 ( .A(O1Oo1_Z[5]), .B(N_1418_i), .C(O1Oo1_Z[2]), .D(O1Oo1_Z[1]), .Y(un1_O1Oo1_3_Z) ); defparam un1_O1Oo1_3.INIT=16'hFFFE; // @28:484660 CFG3 i1I11_2 ( .A(I1i11_Z), .B(I0Oo1_Z), .C(ioi11_Z), .Y(i1I11_2_Z) ); defparam i1I11_2.INIT=8'hFE; // @28:486344 CFG4 un3_o1i11_0_a2_3 ( .A(lol11[4]), .B(lol11[2]), .C(lol11[0]), .D(iOIo1_Z), .Y(un3_o1i11_0_a2_3_Z) ); defparam un3_o1i11_0_a2_3.INIT=16'h1000; // @28:483865 CFG4 \un33_i_a2_2[1] ( .A(l0i11_Z[14]), .B(l0i11_Z[30]), .C(l0i11_Z[15]), .D(l0i11_Z[31]), .Y(N_1090) ); defparam \un33_i_a2_2[1] .INIT=16'h0001; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0_a2_0_18[22] ( .A(l0i11_Z[10]), .B(l0i11_Z[12]), .C(l0i11_Z[11]), .D(l0i11_Z[9]), .Y(N_1276_18) ); defparam \un61_I0i11_1.l0i11_ns_0_a2_0_18[22] .INIT=16'h0001; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0_a2[6] ( .A(o1l11[2]), .B(l0i11_Z[0]), .C(o1l11[1]), .D(o1l11[0]), .Y(N_1247) ); defparam \un61_I0i11_1.l0i11_ns_0_a2[6] .INIT=16'h0800; // @28:484467 CFG3 un1_l1i11 ( .A(lOOo1_Z), .B(loI11), .C(oOOo1_Z), .Y(un1_l1i11_Z) ); defparam un1_l1i11.INIT=8'h02; // @28:484691 CFG3 OlOo1 ( .A(O0Oo1_Z), .B(oOOo1_Z), .C(ilOo1_Z), .Y(OlOo1_Z) ); defparam OlOo1.INIT=8'h04; // @28:485081 CFG4 un9_l1Oo1_4 ( .A(O1Oo1_Z[5]), .B(N_1418_i), .C(O1Oo1_Z[2]), .D(O1Oo1_Z[1]), .Y(un9_l1Oo1_4_Z) ); defparam un9_l1Oo1_4.INIT=16'h0002; // @28:485145 CFG2 \loOo1_0_a2_0_0[3] ( .A(loII1), .B(ooOo1_Z[2]), .Y(loOo1_0_a2_0_0_Z[3]) ); defparam \loOo1_0_a2_0_0[3] .INIT=4'h8; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0_a2[4] ( .A(o1l11[2]), .B(l0i11_Z[0]), .C(o1l11[1]), .D(o1l11[0]), .Y(N_1244) ); defparam \un61_I0i11_1.l0i11_ns_0_a2[4] .INIT=16'h0008; // @28:484992 CFG2 un25_i0Oo1_ac0_3 ( .A(un25_i0Oo1_c2), .B(O1Oo1_Z[2]), .Y(un25_i0Oo1_c3) ); defparam un25_i0Oo1_ac0_3.INIT=4'h8; // @28:485325 CFG3 \OIIo1_0_a2_0[1] ( .A(IIIo1_Z[3]), .B(IIIo1_Z[2]), .C(IIIo1_Z[4]), .Y(N_129) ); defparam \OIIo1_0_a2_0[1] .INIT=8'h80; // @28:483865 CFG4 \un61_I0i11_1.un33_i_a2_1[3] ( .A(l0i11_Z[28]), .B(l0i11_Z[26]), .C(l0i11_Z[29]), .D(l0i11_Z[27]), .Y(N_1083_1) ); defparam \un61_I0i11_1.un33_i_a2_1[3] .INIT=16'h0001; // @28:483865 CFG3 \un61_I0i11_1.l0i11_ns_0_a2[1] ( .A(o1l11[2]), .B(l0i11_Z[0]), .C(o1l11[1]), .Y(N_1238) ); defparam \un61_I0i11_1.l0i11_ns_0_a2[1] .INIT=8'h04; // @28:483865 CFG3 \un61_I0i11_1.l0i11_ns_0_a2_2[1] ( .A(l0i11_Z[0]), .B(un61_I0i11_i_0[1]), .C(un61_I0i11_i_0[4]), .Y(N_1289) ); defparam \un61_I0i11_1.l0i11_ns_0_a2_2[1] .INIT=8'h01; // @28:485145 CFG2 \loOo1_0_a2_7[5] ( .A(loII1), .B(ooOo1_Z[4]), .Y(N_128) ); defparam \loOo1_0_a2_7[5] .INIT=4'h8; // @28:485241 CFG3 un29_loOo1_i_o4 ( .A(o0Oo1_Z), .B(O1Oo1_Z[4]), .C(O1Oo1_Z[3]), .Y(N_47) ); defparam un29_loOo1_i_o4.INIT=8'hB8; // @28:486269 CFG3 llIo1_2_f0 ( .A(llIo18_Z), .B(llIo1_Z), .C(un1_O1Oo1_i), .Y(llIo1_2) ); defparam llIo1_2_f0.INIT=8'hE0; // @28:485260 CFG2 \un34_loOo1[6] ( .A(loII1), .B(ooOo1_Z[6]), .Y(un34_loOo1_Z[6]) ); defparam \un34_loOo1[6] .INIT=4'h4; // @28:486219 CFG2 OoI116 ( .A(loII1), .B(llIo1_Z), .Y(OoI116_Z) ); defparam OoI116.INIT=4'h8; // @28:483865 CFG4 \l0i11_ns_0_a2_0_17[22] ( .A(l0i11_Z[4]), .B(l0i11_Z[8]), .C(l0i11_ns_0_a2_0_12_Z[22]), .D(l0i11_ns_0_a2_0_2_Z[22]), .Y(l0i11_ns_0_a2_0_17_Z[22]) ); defparam \l0i11_ns_0_a2_0_17[22] .INIT=16'h1000; // @28:483865 CFG3 \un61_I0i11_1.un33_i_a2_5[2] ( .A(l0i11_Z[28]), .B(l0i11_Z[29]), .C(un61_I0i11_1_un33_i_a2_3[2]), .Y(un61_I0i11_1_un33_i_a2_5[2]) ); defparam \un61_I0i11_1.un33_i_a2_5[2] .INIT=8'h10; // @28:483865 CFG3 \un61_I0i11_1.un33_i_a2_6[1] ( .A(l0i11_Z[26]), .B(l0i11_Z[27]), .C(un61_I0i11_1_un33_i_a2_4[1]), .Y(un61_I0i11_1_un33_i_a2_6[1]) ); defparam \un61_I0i11_1.un33_i_a2_6[1] .INIT=8'h10; // @28:483865 CFG3 \un61_I0i11_1.un33_i_a2_5[4] ( .A(l0i11_Z[21]), .B(un61_I0i11_1_un33_i_a2_3[4]), .C(l0i11_Z[25]), .Y(un61_I0i11_1_un33_i_a2_5[4]) ); defparam \un61_I0i11_1.un33_i_a2_5[4] .INIT=8'h04; // @28:485241 CFG2 un29_loOo1_i_a2_0 ( .A(un9_l1Oo1_4_Z), .B(olOo1_Z), .Y(un29_loOo1_i_a2_0_Z) ); defparam un29_loOo1_i_a2_0.INIT=4'h8; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0_a2_0[3] ( .A(l0i11_Z[0]), .B(un61_I0i11_i_0[4]), .C(N_1277), .D(N_1279), .Y(N_1243) ); defparam \un61_I0i11_1.l0i11_ns_0_a2_0[3] .INIT=16'h1000; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0_a2_0[2] ( .A(un61_I0i11_i_0[4]), .B(l0i11_Z[0]), .C(N_1279), .D(N_1285), .Y(N_1241) ); defparam \un61_I0i11_1.l0i11_ns_0_a2_0[2] .INIT=16'h1000; // @28:485941 CFG4 OOIo1 ( .A(O1Oo1_Z[4]), .B(O1Oo1_Z[3]), .C(OOIo1_2_0_Z), .D(OOIo1_1_Z), .Y(OOIo1_Z) ); defparam OOIo1.INIT=16'h8000; // @28:486274 CFG3 un1_O1Oo1 ( .A(O1Oo1_Z[3]), .B(un1_O1Oo1_3_Z), .C(O1Oo1_Z[4]), .Y(un1_O1Oo1_i) ); defparam un1_O1Oo1.INIT=8'hFE; // @28:484467 CFG4 l1i11 ( .A(I1i11_Z), .B(un1_l1i11_Z), .C(loI11), .D(ioi11_Z), .Y(l1i11_Z) ); defparam l1i11.INIT=16'hFFDC; // @28:484660 CFG4 i1I11_cZ ( .A(olOo1_Z), .B(i1I11_2_Z), .C(loi11_Z), .D(oOOo1_Z), .Y(i1I11) ); defparam i1I11_cZ.INIT=16'hFFFE; // @28:486344 CFG3 un3_o1i11_0_a2 ( .A(lol11[1]), .B(un3_o1i11_0_a2_3_Z), .C(lol11[3]), .Y(un3_o1i11_0_a2_Z) ); defparam un3_o1i11_0_a2.INIT=8'h04; // @28:484992 CFG2 un25_i0Oo1_ac0_5 ( .A(un25_i0Oo1_c3), .B(O1Oo1_Z[3]), .Y(un25_i0Oo1_c4) ); defparam un25_i0Oo1_ac0_5.INIT=4'h8; // @28:485325 CFG4 \OIIo1_0_a2[3] ( .A(IIIo1_Z[3]), .B(N_43), .C(Iol11[3]), .D(IIIo1_Z[4]), .Y(N_76) ); defparam \OIIo1_0_a2[3] .INIT=16'hE0C0; // @28:484371 CFG4 Ioi11 ( .A(loi11_Z), .B(I1i11_Z), .C(lii11_Z), .D(Iii11_Z), .Y(Ioi11_Z) ); defparam Ioi11.INIT=16'h2722; // @28:484975 CFG3 un18_i0Oo1 ( .A(loII1), .B(un10_i0Oo1_Z), .C(olOo1_Z), .Y(un18_i0Oo1_Z) ); defparam un18_i0Oo1.INIT=8'h20; // @28:484419 CFG4 ooi11 ( .A(ioi11_Z), .B(I1i11_Z), .C(OOOo1_Z), .D(iii11_Z), .Y(ooi11_Z) ); defparam ooi11.INIT=16'h2722; // @28:485145 CFG4 \loOo1_0_0[5] ( .A(ooOo1_Z[5]), .B(loOo1_0_a2_3_0_Z[5]), .C(loII1), .D(N_128), .Y(loOo1_0_0_Z[5]) ); defparam \loOo1_0_0[5] .INIT=16'hCE0A; // @28:483865 CFG4 \l0i11_ns_0_a2_0_21[22] ( .A(N_1276_18), .B(l0i11_ns_0_a2_0_13_Z[22]), .C(l0i11_Z[25]), .D(l0i11_Z[21]), .Y(l0i11_ns_0_a2_0_21_Z[22]) ); defparam \l0i11_ns_0_a2_0_21[22] .INIT=16'h0008; // @28:483865 CFG4 \l0i11_ns_0_a2_0_20[22] ( .A(l0i11_Z[5]), .B(l0i11_Z[6]), .C(l0i11_ns_0_a2_0_17_Z[22]), .D(l0i11_ns_0_a2_0_10_0_Z[22]), .Y(l0i11_ns_0_a2_0_20_Z[22]) ); defparam \l0i11_ns_0_a2_0_20[22] .INIT=16'h1000; // @28:483865 CFG4 \un61_I0i11_1.un33_i_a2[0] ( .A(un61_I0i11_1_un33_i_a2_7[0]), .B(un61_I0i11_1_un33_i_a2_6[0]), .C(un61_I0i11_1_un33_i_a2_9[0]), .D(un61_I0i11_1_un33_i_a2_8[0]), .Y(un61_I0i11_i_0[0]) ); defparam \un61_I0i11_1.un33_i_a2[0] .INIT=16'h8000; // @28:483865 CFG4 \un61_I0i11_1.un33_i_a2[3] ( .A(N_1276_18), .B(un61_I0i11_1_un33_i_a2_1_0[3]), .C(N_1083_1), .D(N_1090), .Y(N_1083) ); defparam \un61_I0i11_1.un33_i_a2[3] .INIT=16'h8000; // @28:484992 CFG2 un25_i0Oo1_ac0_7 ( .A(un25_i0Oo1_c4), .B(O1Oo1_Z[4]), .Y(un25_i0Oo1_c5) ); defparam un25_i0Oo1_ac0_7.INIT=4'h8; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0[1] ( .A(N_1277), .B(N_1289), .C(N_1238), .D(un61_I0i11_i_0[2]), .Y(l0i11_ns[1]) ); defparam \un61_I0i11_1.l0i11_ns_0[1] .INIT=16'hF0F8; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0[2] ( .A(o1l11[2]), .B(o1l11[0]), .C(N_1241), .D(N_1287), .Y(l0i11_ns[2]) ); defparam \un61_I0i11_1.l0i11_ns_0[2] .INIT=16'hF1F0; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0[3] ( .A(o1l11[2]), .B(o1l11[0]), .C(N_1243), .D(N_1287), .Y(l0i11_ns[3]) ); defparam \un61_I0i11_1.l0i11_ns_0[3] .INIT=16'hF4F0; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0[4] ( .A(N_1278), .B(N_1289), .C(N_1244), .D(un61_I0i11_i_0[3]), .Y(l0i11_ns[4]) ); defparam \un61_I0i11_1.l0i11_ns_0[4] .INIT=16'hF0F8; // @28:485145 CFG3 \loOo1_0_a2_8[5] ( .A(o0Oo1_Z), .B(O1Oo1_Z[4]), .C(N_40), .Y(N_136) ); defparam \loOo1_0_a2_8[5] .INIT=8'h08; // @28:485145 CFG3 \loOo1_0_o4[5] ( .A(olOo1_Z), .B(un9_l1Oo1_4_Z), .C(un10_i0Oo1_Z), .Y(N_50) ); defparam \loOo1_0_o4[5] .INIT=8'h57; // @28:482601 CFG4 \un1_l1Oo1[0] ( .A(i1l11), .B(N_85_1), .C(un9_l1Oo1_4_Z), .D(un1_O1Oo1_i), .Y(un1_l1Oo1_Z[0]) ); defparam \un1_l1Oo1[0] .INIT=16'h40EA; // @28:483865 CFG4 \un61_I0i11_1.un33_i_a2[1] ( .A(un61_I0i11_1_un33_i_a2_5[1]), .B(N_1087), .C(un61_I0i11_1_un33_i_a2_6[1]), .D(N_1090), .Y(N_1081) ); defparam \un61_I0i11_1.un33_i_a2[1] .INIT=16'h8000; // @28:483865 CFG4 \un61_I0i11_1.un33_i_a2[4] ( .A(un61_I0i11_1_un33_i_a2_4[4]), .B(N_1083_1), .C(un61_I0i11_1_un33_i_a2_5[4]), .D(N_1087), .Y(N_1084) ); defparam \un61_I0i11_1.un33_i_a2[4] .INIT=16'h8000; // @28:483865 CFG4 \un61_I0i11_1.un33_i_a2[2] ( .A(un61_I0i11_1_un33_i_a2_4[2]), .B(N_1087), .C(un61_I0i11_1_un33_i_a2_5[2]), .D(N_1090), .Y(N_1082) ); defparam \un61_I0i11_1.un33_i_a2[2] .INIT=16'h8000; // @28:484715 CFG4 un1_llOo1 ( .A(OlOo1_Z), .B(loII1), .C(olOo1_Z), .D(IlOo1_0_Z), .Y(un1_llOo1_Z) ); defparam un1_llOo1.INIT=16'h0C08; // @28:484936 CFG4 \i0Oo1[0] ( .A(N_1418_i), .B(olOo1_Z), .C(loII1), .D(un10_i0Oo1_Z), .Y(i0Oo1_Z[0]) ); defparam \i0Oo1[0] .INIT=16'hCA4A; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0[6] ( .A(N_1247), .B(l0i11_Z[0]), .C(un61_I0i11_1_l0i11_ns_0_a2_0_0[6]), .D(un61_I0i11_i_0[4]), .Y(l0i11_ns[6]) ); defparam \un61_I0i11_1.l0i11_ns_0[6] .INIT=16'hAABA; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0[9] ( .A(N_1281), .B(N_1289), .C(N_1251), .D(un61_I0i11_i_0[2]), .Y(l0i11_ns[9]) ); defparam \un61_I0i11_1.l0i11_ns_0[9] .INIT=16'hF0F8; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0[13] ( .A(N_1281), .B(N_1289), .C(N_1256), .D(un61_I0i11_i_0[2]), .Y(l0i11_ns[13]) ); defparam \un61_I0i11_1.l0i11_ns_0[13] .INIT=16'hF8F0; // @28:485145 CFG4 \loOo1_0_a2[5] ( .A(iol11[13]), .B(iol11[5]), .C(O1Oo1_Z[3]), .D(N_136), .Y(N_80) ); defparam \loOo1_0_a2[5] .INIT=16'hCA00; // @28:485145 CFG4 \loOo1_0_a2[3] ( .A(iol11[11]), .B(iol11[3]), .C(O1Oo1_Z[3]), .D(N_136), .Y(N_87) ); defparam \loOo1_0_a2[3] .INIT=16'hCA00; // @28:485147 CFG4 un3_loOo1_0_a2 ( .A(o0Oo1_Z), .B(O1Oo1_Z[4]), .C(O1Oo1_Z[3]), .D(N_40), .Y(un3_loOo1) ); defparam un3_loOo1_0_a2.INIT=16'h0080; // @28:485183 CFG3 un13_loOo1_0_o4 ( .A(O1Oo1_Z[4]), .B(O1Oo1_Z[3]), .C(N_40), .Y(N_42) ); defparam un13_loOo1_0_o4.INIT=8'hFB; // @28:484936 CFG4 \i0Oo1[1] ( .A(N_1418_i), .B(O1Oo1_Z[1]), .C(un18_i0Oo1_Z), .D(loII1), .Y(i0Oo1_Z[1]) ); defparam \i0Oo1[1] .INIT=16'h60EC; // @28:484936 CFG4 \i0Oo1[2] ( .A(loII1), .B(un18_i0Oo1_Z), .C(O1Oo1_Z[2]), .D(un25_i0Oo1_c2), .Y(i0Oo1_Z[2]) ); defparam \i0Oo1[2] .INIT=16'h5CD0; // @28:484936 CFG4 \i0Oo1[3] ( .A(loII1), .B(un18_i0Oo1_Z), .C(O1Oo1_Z[3]), .D(un25_i0Oo1_c3), .Y(i0Oo1_Z[3]) ); defparam \i0Oo1[3] .INIT=16'h5CD0; // @28:485145 CFG3 \loOo1_0_a2_1[3] ( .A(N_47), .B(loOo1_0_a2_0_0_Z[3]), .C(un1_l1Oo1_Z[0]), .Y(N_89) ); defparam \loOo1_0_a2_1[3] .INIT=8'h04; // @28:485212 CFG3 un21_loOo1_i_o2 ( .A(loII1), .B(un1_l1Oo1_Z[0]), .C(olOo1_Z), .Y(N_63) ); defparam un21_loOo1_i_o2.INIT=8'h7F; // @28:483865 CFG4 \l0i11_ns_0_a2_0[22] ( .A(l0i11_ns_0_a2_0_15_Z[22]), .B(l0i11_ns_0_a2_0_14_Z[22]), .C(l0i11_ns_0_a2_0_20_Z[22]), .D(l0i11_ns_0_a2_0_21_Z[22]), .Y(N_1276) ); defparam \l0i11_ns_0_a2_0[22] .INIT=16'h8000; // @28:483854 CFG2 \un61_I0i11_1.un33_i_a2_RNIDCBP2[1] ( .A(N_1081), .B(un61_I0i11_i_0[0]), .Y(un61_I0i11_i_0[1]) ); defparam \un61_I0i11_1.un33_i_a2_RNIDCBP2[1] .INIT=4'h9; // @28:485163 CFG2 \un6_loOo1[1] ( .A(un8_loOo1), .B(iol11[9]), .Y(un6_loOo1_Z[1]) ); defparam \un6_loOo1[1] .INIT=4'h8; // @28:484715 CFG4 llOo1 ( .A(un5_llOo1_1_Z), .B(olOo1_Z), .C(un1_llOo1_Z), .D(un5_llOo1_2_Z), .Y(llOo1_Z) ); defparam llOo1.INIT=16'hF4FC; // @28:484936 CFG4 \i0Oo1[4] ( .A(loII1), .B(un18_i0Oo1_Z), .C(O1Oo1_Z[4]), .D(un25_i0Oo1_c4), .Y(i0Oo1_Z[4]) ); defparam \i0Oo1[4] .INIT=16'h5CD0; // @28:485241 CFG4 un29_loOo1_i ( .A(loII1), .B(N_63), .C(N_47), .D(un29_loOo1_i_a2_0_Z), .Y(N_1350) ); defparam un29_loOo1_i.INIT=16'hF777; // @28:485145 CFG4 \loOo1_2[4] ( .A(un8_loOo1), .B(N_42), .C(iol11[12]), .D(lol11[2]), .Y(loOo1_2_Z[4]) ); defparam \loOo1_2[4] .INIT=16'hB3A0; // @28:485145 CFG4 \loOo1_2[6] ( .A(un8_loOo1), .B(N_42), .C(iol11[14]), .D(lol11[4]), .Y(loOo1_2_Z[6]) ); defparam \loOo1_2[6] .INIT=16'hB3A0; // @28:485145 CFG4 \loOo1_2[2] ( .A(un8_loOo1), .B(N_42), .C(iol11[10]), .D(lol11[0]), .Y(loOo1_2_Z[2]) ); defparam \loOo1_2[2] .INIT=16'hB3A0; // @28:485145 CFG4 \loOo1_0[7] ( .A(iol11[7]), .B(ooOo1_Z[7]), .C(un3_loOo1), .D(loII1), .Y(loOo1_0_Z[7]) ); defparam \loOo1_0[7] .INIT=16'hA0EC; // @28:484936 CFG4 \i0Oo1_0[5] ( .A(olOo1_Z), .B(O1Oo1_Z[5]), .C(loII1), .D(un25_i0Oo1_c5), .Y(i0Oo1_0_Z[5]) ); defparam \i0Oo1_0[5] .INIT=16'h2C8C; // @28:486274 CFG4 llIo18 ( .A(O1Oo1_Z[4]), .B(O1Oo1_Z[3]), .C(un9_l1Oo1_4_Z), .D(ioOo1_Z), .Y(llIo18_Z) ); defparam llIo18.INIT=16'h0020; // @28:485498 CFG3 \lIIo1_0_a2_2[0] ( .A(oOOo1_Z), .B(N_42), .C(Ool11), .Y(N_121) ); defparam \lIIo1_0_a2_2[0] .INIT=8'h8A; // @28:483854 CFG2 \un61_I0i11_1.un33_i_a2_RNIDCBP2_0[1] ( .A(N_1081), .B(un61_I0i11_i_0[0]), .Y(un61_I0i11_1_CO1) ); defparam \un61_I0i11_1.un33_i_a2_RNIDCBP2_0[1] .INIT=4'h7; // @28:483865 CFG2 \un61_I0i11_1.l0i11_ns_0_o2[22] ( .A(un61_I0i11_i_0[4]), .B(N_1276), .Y(N_1219) ); defparam \un61_I0i11_1.l0i11_ns_0_o2[22] .INIT=4'hD; // @28:483865 CFG2 \un61_I0i11_1.l0i11_ns_0_o2[7] ( .A(un61_I0i11_i_0[4]), .B(N_1276), .Y(N_1293) ); defparam \un61_I0i11_1.l0i11_ns_0_o2[7] .INIT=4'hE; // @28:485779 CFG3 IiOo1_2 ( .A(ioOo1_Z), .B(O1Oo1_Z[5]), .C(olOo1_Z), .Y(IiOo1_2_Z) ); defparam IiOo1_2.INIT=8'hBA; // @28:485145 CFG4 \loOo1_0[0] ( .A(loII1), .B(N_63), .C(ooOo1_Z[0]), .D(IIIo1_Z[1]), .Y(loOo1_0_Z[0]) ); defparam \loOo1_0[0] .INIT=16'h7350; // @28:485145 CFG4 \loOo1_0[4] ( .A(ooOo1_Z[4]), .B(o0Oo1_Z), .C(loII1), .D(N_63), .Y(loOo1_0_Z[4]) ); defparam \loOo1_0[4] .INIT=16'h0ACE; // @28:485145 CFG4 \loOo1_1[6] ( .A(iol11[6]), .B(un34_loOo1_Z[6]), .C(N_63), .D(un3_loOo1), .Y(loOo1_1_Z[6]) ); defparam \loOo1_1[6] .INIT=16'hEFCF; // @28:485145 CFG4 \loOo1_0[2] ( .A(loII1), .B(N_63), .C(ooOo1_Z[2]), .D(IIIo1_Z[3]), .Y(loOo1_0_Z[2]) ); defparam \loOo1_0[2] .INIT=16'h7350; // @28:485145 CFG4 \loOo1_0[1] ( .A(loII1), .B(N_63), .C(ooOo1_Z[1]), .D(IIIo1_Z[2]), .Y(loOo1_0_Z[1]) ); defparam \loOo1_0[1] .INIT=16'h7350; // @28:485145 CFG4 \loOo1_0_2[5] ( .A(o0Oo1_Z), .B(loOo1_0_0_Z[5]), .C(N_80), .D(N_63), .Y(loOo1_0_2_Z[5]) ); defparam \loOo1_0_2[5] .INIT=16'hFCFD; // @28:485145 CFG4 \loOo1_0_2[3] ( .A(N_50), .B(N_63), .C(IIIo1_Z[4]), .D(loOo1_0_a2_0_0_Z[3]), .Y(loOo1_0_2_Z[3]) ); defparam \loOo1_0_2[3] .INIT=16'hBA30; // @28:485145 CFG4 \loOo1_0_1[3] ( .A(ooOo1_Z[3]), .B(loII1), .C(N_89), .D(N_87), .Y(loOo1_0_1_Z[3]) ); defparam \loOo1_0_1[3] .INIT=16'hFFF2; CFG4 \loOo1_0_RNO[5] ( .A(un1_l1Oo1_Z[0]), .B(N_50), .C(N_85_1), .D(N_128), .Y(loOo1_0_RNO_Z[5]) ); defparam \loOo1_0_RNO[5] .INIT=16'hDC00; // @28:485498 CFG4 \lIIo1_0_0[3] ( .A(Iol11[3]), .B(IIIo1_Z[3]), .C(oOOo1_Z), .D(N_116), .Y(lIIo1_0_0_Z[3]) ); defparam \lIIo1_0_0[3] .INIT=16'hCE0A; // @28:485498 CFG4 \lIIo1_i_0[4] ( .A(Iol11[4]), .B(IIIo1_Z[4]), .C(oOOo1_Z), .D(N_116), .Y(lIIo1_i_0_Z[4]) ); defparam \lIIo1_i_0[4] .INIT=16'h3705; // @28:485498 CFG4 \lIIo1_0_0[1] ( .A(Iol11[1]), .B(IIIo1_Z[1]), .C(oOOo1_Z), .D(N_116), .Y(lIIo1_0_0_Z[1]) ); defparam \lIIo1_0_0[1] .INIT=16'hCE0A; // @28:485498 CFG4 \lIIo1_0_0[0] ( .A(N_43), .B(N_45), .C(Iol11[0]), .D(oOOo1_Z), .Y(lIIo1_0_0_Z[0]) ); defparam \lIIo1_0_0[0] .INIT=16'h11F1; // @28:485498 CFG4 \lIIo1_0_0[2] ( .A(Iol11[2]), .B(IIIo1_Z[2]), .C(oOOo1_Z), .D(N_116), .Y(lIIo1_0_0_Z[2]) ); defparam \lIIo1_0_0[2] .INIT=16'hCE0A; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0_a2[14] ( .A(un61_I0i11_i_0[1]), .B(un61_I0i11_i_0[3]), .C(N_1278), .D(N_1293), .Y(l0i11_ns[14]) ); defparam \un61_I0i11_1.l0i11_ns_0_a2[14] .INIT=16'h0080; // @28:483865 CFG3 \un61_I0i11_1.l0i11_ns_0_a2[10] ( .A(N_1279), .B(N_1293), .C(N_1291), .Y(l0i11_ns[10]) ); defparam \un61_I0i11_1.l0i11_ns_0_a2[10] .INIT=8'h20; // @28:483865 CFG3 \un61_I0i11_1.l0i11_ns_0_a2[11] ( .A(N_1279), .B(N_1293), .C(N_1281), .Y(l0i11_ns[11]) ); defparam \un61_I0i11_1.l0i11_ns_0_a2[11] .INIT=8'h20; // @28:484936 CFG4 \i0Oo1[5] ( .A(i0Oo1_0_Z[5]), .B(un10_i0Oo1_Z), .C(olOo1_Z), .D(loII1), .Y(i0Oo1_Z[5]) ); defparam \i0Oo1[5] .INIT=16'hEAAA; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0_a2[7] ( .A(un61_I0i11_i_0[1]), .B(un61_I0i11_i_0[2]), .C(N_1277), .D(N_1293), .Y(l0i11_ns[7]) ); defparam \un61_I0i11_1.l0i11_ns_0_a2[7] .INIT=16'h0080; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0_a2[23] ( .A(un61_I0i11_i_0[2]), .B(un61_I0i11_i_0[1]), .C(N_1219), .D(N_1277), .Y(l0i11_ns[23]) ); defparam \un61_I0i11_1.l0i11_ns_0_a2[23] .INIT=16'h0800; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0_a2[15] ( .A(un61_I0i11_i_0[1]), .B(un61_I0i11_i_0[2]), .C(N_1281), .D(N_1293), .Y(l0i11_ns[15]) ); defparam \un61_I0i11_1.l0i11_ns_0_a2[15] .INIT=16'h0080; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0_a2[31] ( .A(un61_I0i11_i_0[2]), .B(un61_I0i11_i_0[1]), .C(N_1219), .D(N_1281), .Y(l0i11_ns[31]) ); defparam \un61_I0i11_1.l0i11_ns_0_a2[31] .INIT=16'h0800; // @28:485325 CFG3 \OIIo1_0_x2[2] ( .A(IIIo1_Z[1]), .B(N_45), .C(IIIo1_Z[2]), .Y(N_58_i) ); defparam \OIIo1_0_x2[2] .INIT=8'h2D; // @28:485325 CFG3 \OIIo1_i_o2[4] ( .A(IIIo1_Z[1]), .B(N_45), .C(IIIo1_Z[2]), .Y(N_48) ); defparam \OIIo1_i_o2[4] .INIT=8'hDF; // @28:483854 CFG3 \un61_I0i11_1.un33_i_a2_RNI54164[2] ( .A(un61_I0i11_i_0[0]), .B(N_1082), .C(N_1081), .Y(un61_I0i11_i_0[2]) ); defparam \un61_I0i11_1.un33_i_a2_RNI54164[2] .INIT=8'h93; // @28:485145 CFG3 \loOo1_1[4] ( .A(loOo1_0_Z[4]), .B(iol11[4]), .C(un3_loOo1), .Y(loOo1_1_Z[4]) ); defparam \loOo1_1[4] .INIT=8'hEA; // @28:485145 CFG3 \loOo1_1[2] ( .A(loOo1_0_Z[2]), .B(iol11[2]), .C(un3_loOo1), .Y(loOo1_1_Z[2]) ); defparam \loOo1_1[2] .INIT=8'hEA; // @28:485145 CFG4 \loOo1_1[7] ( .A(un8_loOo1), .B(N_1350), .C(ooOo1_Z[6]), .D(iol11[15]), .Y(loOo1_1_Z[7]) ); defparam \loOo1_1[7] .INIT=16'hBA30; // @28:485325 CFG4 \OIIo1_0_m2[1] ( .A(IIIo1_Z[1]), .B(Iol11[1]), .C(N_45), .D(N_43), .Y(N_67) ); defparam \OIIo1_0_m2[1] .INIT=16'hCCA5; // @28:485498 CFG3 \lIIo1_0[0] ( .A(ol011[0]), .B(lIIo1_0_0_Z[0]), .C(N_121), .Y(lIIo1[0]) ); defparam \lIIo1_0[0] .INIT=8'hEC; // @28:485498 CFG3 \lIIo1_0[1] ( .A(ol011[1]), .B(lIIo1_0_0_Z[1]), .C(N_121), .Y(lIIo1[1]) ); defparam \lIIo1_0[1] .INIT=8'hEC; // @28:485498 CFG3 \lIIo1_0[2] ( .A(ol011[2]), .B(lIIo1_0_0_Z[2]), .C(N_121), .Y(lIIo1[2]) ); defparam \lIIo1_0[2] .INIT=8'hEC; // @28:485498 CFG3 \lIIo1_0[3] ( .A(ol011[3]), .B(lIIo1_0_0_Z[3]), .C(N_121), .Y(lIIo1[3]) ); defparam \lIIo1_0[3] .INIT=8'hEC; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0_a2[12] ( .A(un61_I0i11_i_0[1]), .B(un61_I0i11_i_0[3]), .C(N_1278), .D(N_1293), .Y(l0i11_ns[12]) ); defparam \un61_I0i11_1.l0i11_ns_0_a2[12] .INIT=16'h0040; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0_a2[29] ( .A(un61_I0i11_i_0[2]), .B(un61_I0i11_i_0[1]), .C(N_1219), .D(N_1281), .Y(l0i11_ns[29]) ); defparam \un61_I0i11_1.l0i11_ns_0_a2[29] .INIT=16'h0200; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0_a2[8] ( .A(un61_I0i11_i_0[1]), .B(un61_I0i11_i_0[2]), .C(N_1291), .D(N_1293), .Y(l0i11_ns[8]) ); defparam \un61_I0i11_1.l0i11_ns_0_a2[8] .INIT=16'h0010; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0_a2[0] ( .A(un61_I0i11_i_0[1]), .B(un61_I0i11_i_0[2]), .C(N_1285), .D(N_1293), .Y(l0i11_ns[0]) ); defparam \un61_I0i11_1.l0i11_ns_0_a2[0] .INIT=16'h0010; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0_a2[5] ( .A(un61_I0i11_i_0[1]), .B(un61_I0i11_i_0[2]), .C(N_1277), .D(N_1293), .Y(l0i11_ns[5]) ); defparam \un61_I0i11_1.l0i11_ns_0_a2[5] .INIT=16'h0040; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0_a2[21] ( .A(un61_I0i11_i_0[2]), .B(un61_I0i11_i_0[1]), .C(N_1219), .D(N_1277), .Y(l0i11_ns[21]) ); defparam \un61_I0i11_1.l0i11_ns_0_a2[21] .INIT=16'h0200; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0_a2[22] ( .A(un61_I0i11_i_0[3]), .B(un61_I0i11_i_0[1]), .C(N_1219), .D(N_1278), .Y(l0i11_ns[22]) ); defparam \un61_I0i11_1.l0i11_ns_0_a2[22] .INIT=16'h0400; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0_a2[30] ( .A(un61_I0i11_i_0[3]), .B(un61_I0i11_i_0[1]), .C(N_1219), .D(N_1278), .Y(l0i11_ns[30]) ); defparam \un61_I0i11_1.l0i11_ns_0_a2[30] .INIT=16'h0800; // @28:485145 CFG4 \loOo1_2[1] ( .A(iol11[1]), .B(N_42), .C(un3_loOo1), .D(loOo1_0_Z[1]), .Y(loOo1_2_Z[1]) ); defparam \loOo1_2[1] .INIT=16'hFFB3; // @28:485145 CFG4 \loOo1_0[3] ( .A(loOo1_0_1_Z[3]), .B(loOo1_0_2_Z[3]), .C(lol11[1]), .D(N_42), .Y(loOo1[3]) ); defparam \loOo1_0[3] .INIT=16'hEEFE; // @28:485145 CFG4 \loOo1_0[5] ( .A(loOo1_0_RNO_Z[5]), .B(lol11[3]), .C(loOo1_0_2_Z[5]), .D(N_42), .Y(loOo1[5]) ); defparam \loOo1_0[5] .INIT=16'hFAFE; // @28:485145 CFG4 \loOo1[6] ( .A(ooOo1_Z[5]), .B(loOo1_2_Z[6]), .C(loOo1_1_Z[6]), .D(N_1350), .Y(loOo1_Z[6]) ); defparam \loOo1[6] .INIT=16'hFCFE; // @28:485145 CFG3 \loOo1[7] ( .A(N_45), .B(loOo1_0_Z[7]), .C(loOo1_1_Z[7]), .Y(loOo1_Z[7]) ); defparam \loOo1[7] .INIT=8'hFD; // @28:485325 CFG4 \OIIo1_0[1] ( .A(Iol11[1]), .B(IIIo1_Z[1]), .C(N_129), .D(N_67), .Y(OIIo1[1]) ); defparam \OIIo1_0[1] .INIT=16'hFF80; // @28:485325 CFG4 \OIIo1_0[2] ( .A(N_43), .B(N_58_i), .C(Iol11[2]), .D(N_129), .Y(OIIo1[2]) ); defparam \OIIo1_0[2] .INIT=16'hF1B1; // @28:483854 CFG4 \un61_I0i11_1.un33_i_a2_RNIUSMI5[3] ( .A(un61_I0i11_i_0[0]), .B(N_1083), .C(N_1081), .D(N_1082), .Y(un61_I0i11_i_0[3]) ); defparam \un61_I0i11_1.un33_i_a2_RNIUSMI5[3] .INIT=16'h9333; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0_a2[28] ( .A(un61_I0i11_i_0[3]), .B(un61_I0i11_i_0[1]), .C(N_1219), .D(N_1278), .Y(l0i11_ns[28]) ); defparam \un61_I0i11_1.l0i11_ns_0_a2[28] .INIT=16'h0200; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0_a2[20] ( .A(un61_I0i11_i_0[3]), .B(un61_I0i11_i_0[1]), .C(N_1219), .D(N_1278), .Y(l0i11_ns[20]) ); defparam \un61_I0i11_1.l0i11_ns_0_a2[20] .INIT=16'h0100; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0_a2[16] ( .A(un61_I0i11_i_0[2]), .B(un61_I0i11_i_0[1]), .C(N_1219), .D(N_1285), .Y(l0i11_ns[16]) ); defparam \un61_I0i11_1.l0i11_ns_0_a2[16] .INIT=16'h0100; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0_a2[17] ( .A(un61_I0i11_i_0[2]), .B(un61_I0i11_i_0[1]), .C(N_1219), .D(N_1277), .Y(l0i11_ns[17]) ); defparam \un61_I0i11_1.l0i11_ns_0_a2[17] .INIT=16'h0100; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0_a2[24] ( .A(un61_I0i11_i_0[2]), .B(un61_I0i11_i_0[1]), .C(N_1219), .D(N_1291), .Y(l0i11_ns[24]) ); defparam \un61_I0i11_1.l0i11_ns_0_a2[24] .INIT=16'h0100; // @28:483865 CFG4 \un61_I0i11_1.l0i11_ns_0_a2[25] ( .A(un61_I0i11_i_0[2]), .B(un61_I0i11_i_0[1]), .C(N_1219), .D(N_1281), .Y(l0i11_ns[25]) ); defparam \un61_I0i11_1.l0i11_ns_0_a2[25] .INIT=16'h0100; // @28:485557 CFG3 \ol011_RNO[4] ( .A(ol011[4]), .B(lIIo1_i_0_Z[4]), .C(N_121), .Y(N_1351_i) ); defparam \ol011_RNO[4] .INIT=8'h23; // @28:485145 CFG4 \loOo1[4] ( .A(ooOo1_Z[3]), .B(loOo1_2_Z[4]), .C(loOo1_1_Z[4]), .D(N_1350), .Y(loOo1_Z[4]) ); defparam \loOo1[4] .INIT=16'hFCFE; // @28:485145 CFG4 \loOo1[2] ( .A(ooOo1_Z[1]), .B(loOo1_2_Z[2]), .C(loOo1_1_Z[2]), .D(N_1350), .Y(loOo1_Z[2]) ); defparam \loOo1[2] .INIT=16'hFCFE; // @28:485145 CFG4 \loOo1[1] ( .A(un6_loOo1_Z[1]), .B(ooOo1_Z[0]), .C(N_1350), .D(loOo1_2_Z[1]), .Y(loOo1_Z[1]) ); defparam \loOo1[1] .INIT=16'hFFAE; // @28:485325 CFG4 \OIIo1_0[3] ( .A(N_43), .B(IIIo1_Z[3]), .C(N_48), .D(N_76), .Y(OIIo1[3]) ); defparam \OIIo1_0[3] .INIT=16'hFF41; // @28:483854 CFG4 \un61_I0i11_1.un33_i_a2_RNIOMCV6[4] ( .A(N_1082), .B(un61_I0i11_1_CO1), .C(N_1084), .D(N_1083), .Y(un61_I0i11_i_0[4]) ); defparam \un61_I0i11_1.un33_i_a2_RNIOMCV6[4] .INIT=16'h2D0F; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMGT_1s_26s */ module CTSE_PETMC_TOP_1s_26s ( iiI11, oIOI1, IioO1, oiI11, o1li1_0, o1li1_6, o1li1_3, o1li1_2, o1li1_1, IIoO1_1z_1, IIoO1_1z_2, IIoO1_1z_0, IIoO1_1z_3, IIoO1_1z_6, Oi011_2, Oi011_7, Oi011_0, Oi011_1, Oi011_6, Oi011_3, i0011, N_247_i_1z, N_243_i_1z, N_239_i_1z, N_103_i_1z, N_251_i_1z, ii1i1, I01i1, ii1i1_2_0, IOiO1, Io011, oOiO1, iOiO1_1z, N_102, N_238_i, N_250_i, N_242_i, N_246_i, iiOi1, oIoO1, lo011, lOiO1, un3_oo1i1_7, N_447, OOiO1_1z, iIl0112, N_19_0, N_28_0, N_72, N_45_0, N_97, O1011_1z, o1011_2z, l1011_1z, IliO1_1z, i1011_1z, oo011, iIiO1_1z, io011_1z, oIiO1_1z, I1011_2z, IIiO1_2z, ooI11, iO111, PF_IOD_CDR_CCC_C0_0_TX_CLK_G, oO011_i ) ; input [15:0] iiI11 ; input [47:0] oIOI1 ; input [7:0] IioO1 ; input [15:0] oiI11 ; input o1li1_0 ; input o1li1_6 ; input o1li1_3 ; input o1li1_2 ; input o1li1_1 ; input IIoO1_1z_1 ; input IIoO1_1z_2 ; input IIoO1_1z_0 ; input IIoO1_1z_3 ; input IIoO1_1z_6 ; input Oi011_2 ; input Oi011_7 ; input Oi011_0 ; input Oi011_1 ; input Oi011_6 ; input Oi011_3 ; output [7:0] i0011 ; output N_247_i_1z ; output N_243_i_1z ; output N_239_i_1z ; output N_103_i_1z ; output N_251_i_1z ; output ii1i1 ; input I01i1 ; input ii1i1_2_0 ; input IOiO1 ; input Io011 ; input oOiO1 ; input iOiO1_1z ; output N_102 ; output N_238_i ; output N_250_i ; output N_242_i ; output N_246_i ; input iiOi1 ; input oIoO1 ; input lo011 ; input lOiO1 ; output un3_oo1i1_7 ; output N_447 ; input OOiO1_1z ; input iIl0112 ; output N_19_0 ; output N_28_0 ; output N_72 ; output N_45_0 ; output N_97 ; output O1011_1z ; output o1011_2z ; output l1011_1z ; output IliO1_1z ; output i1011_1z ; input oo011 ; output iIiO1_1z ; input io011_1z ; output oIiO1_1z ; output I1011_2z ; output IIiO1_2z ; input ooI11 ; input iO111 ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; input oO011_i ; wire o1li1_0 ; wire o1li1_6 ; wire o1li1_3 ; wire o1li1_2 ; wire o1li1_1 ; wire IIoO1_1z_1 ; wire IIoO1_1z_2 ; wire IIoO1_1z_0 ; wire IIoO1_1z_3 ; wire IIoO1_1z_6 ; wire Oi011_2 ; wire Oi011_7 ; wire Oi011_0 ; wire Oi011_1 ; wire Oi011_6 ; wire Oi011_3 ; wire N_247_i_1z ; wire N_243_i_1z ; wire N_239_i_1z ; wire N_103_i_1z ; wire N_251_i_1z ; wire ii1i1 ; wire I01i1 ; wire ii1i1_2_0 ; wire IOiO1 ; wire Io011 ; wire oOiO1 ; wire iOiO1_1z ; wire N_102 ; wire N_238_i ; wire N_250_i ; wire N_242_i ; wire N_246_i ; wire iiOi1 ; wire oIoO1 ; wire lo011 ; wire lOiO1 ; wire un3_oo1i1_7 ; wire N_447 ; wire OOiO1_1z ; wire iIl0112 ; wire N_19_0 ; wire N_28_0 ; wire N_72 ; wire N_45_0 ; wire N_97 ; wire O1011_1z ; wire o1011_2z ; wire l1011_1z ; wire IliO1_1z ; wire i1011_1z ; wire oo011 ; wire iIiO1_1z ; wire io011_1z ; wire oIiO1_1z ; wire I1011_2z ; wire IIiO1_2z ; wire ooI11 ; wire iO111 ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire oO011_i ; wire [7:0] o0oO1; wire [5:1] iiIIo_Z; wire [5:0] oiIIo_Z; wire [7:3] i0011_RNO_3_Z; wire [7:0] i0011_RNO_1_Z; wire iIlIo_Z ; wire VCC ; wire oIlIo_Z ; wire GND ; wire I1IIo_Z ; wire o0IIo_Z ; wire ioIIo_Z ; wire N_373_mux_i ; wire IOoO1_Z ; wire N_254 ; wire i0iOo ; wire lIlIo_Z ; wire iOlIo ; wire lOlIo_Z ; wire lIiO1_Z ; wire N_427_i ; wire O1IIo_Z ; wire i0IIo_Z ; wire l1IIo_Z ; wire N_398_mux_i ; wire ooIIo_Z ; wire N_399_mux_i ; wire OllIo ; wire i1IIo_Z ; wire o1IIo ; wire l1011_RNO_Z ; wire N_261_i ; wire N_6695_i ; wire m263_1_1_co1 ; wire m263_1_1_wmux_0_S ; wire m263_1_1_wmux_0_Y ; wire N_342 ; wire N_345 ; wire m263_1_1_y0 ; wire m263_1_1_co0 ; wire m263_1_1_wmux_S ; wire N_335 ; wire N_338 ; wire m175_1_1_co1 ; wire m175_1_1_wmux_0_S ; wire m175_1_1_wmux_0_Y ; wire N_275 ; wire N_278 ; wire m175_1_1_y0 ; wire m175_1_1_co0 ; wire m175_1_1_wmux_S ; wire N_266 ; wire N_271 ; wire m330_1_0_co1 ; wire m330_1_0_wmux_0_S ; wire m330_1_0_wmux_0_Y ; wire N_402 ; wire N_405 ; wire m330_1_0_y0 ; wire m330_1_0_co0 ; wire m330_1_0_wmux_S ; wire N_395 ; wire N_398 ; wire m297_1_0_co1 ; wire m297_1_0_wmux_0_S ; wire N_382 ; wire N_269_i_Z ; wire m297_1_0_y0 ; wire m297_1_0_co0 ; wire m297_1_0_wmux_S ; wire N_267 ; wire m96_1_0_co1 ; wire m96_1_0_wmux_0_S ; wire N_16_0_i_Z ; wire N_17_0_i_Z ; wire m96_1_0_y0 ; wire m96_1_0_co0 ; wire m96_1_0_wmux_S ; wire N_13_0_i_Z ; wire N_14_0_i_Z ; wire m44_1_0_co1 ; wire m44_1_0_wmux_0_S ; wire m44_1_0_y0 ; wire m44_1_0_co0 ; wire m44_1_0_wmux_S ; wire m71_1_0_co1 ; wire m71_1_0_wmux_0_S ; wire m71_1_0_y0 ; wire m71_1_0_co0 ; wire m71_1_0_wmux_S ; wire m160_1_0_co1 ; wire m160_1_0_wmux_0_S ; wire m160_1_0_y0 ; wire m160_1_0_co0 ; wire m160_1_0_wmux_S ; wire m27_1_0_co1 ; wire m27_1_0_wmux_0_S ; wire m27_1_0_y0 ; wire m27_1_0_co0 ; wire m27_1_0_wmux_S ; wire m164_1_0_co1 ; wire m164_1_0_wmux_0_S ; wire m164_1_0_y0 ; wire m164_1_0_co0 ; wire m164_1_0_wmux_S ; wire m18_1_0_co1 ; wire m18_1_0_wmux_0_S ; wire m18_1_0_y0 ; wire m18_1_0_co0 ; wire m18_1_0_wmux_S ; wire m312_1_0_co1 ; wire m312_1_0_wmux_0_S ; wire m312_1_0_y0 ; wire m312_1_0_co0 ; wire m312_1_0_wmux_S ; wire m187_1_0_co1 ; wire m187_1_0_wmux_0_S ; wire N_296 ; wire m187_1_0_y0 ; wire m187_1_0_co0 ; wire m187_1_0_wmux_S ; wire m280_1_0_co1 ; wire m280_1_0_wmux_0_S ; wire N_367 ; wire N_362 ; wire N_365 ; wire m280_1_0_y0 ; wire m280_1_0_co0 ; wire m280_1_0_wmux_S ; wire N_355 ; wire N_358 ; wire m236_1_0_co1 ; wire m236_1_0_wmux_0_S ; wire N_327 ; wire N_232 ; wire N_325 ; wire m236_1_0_y0 ; wire m236_1_0_co0 ; wire m236_1_0_wmux_S ; wire N_225 ; wire N_228 ; wire m192_1_0_co1 ; wire m192_1_0_wmux_0_S ; wire N_301 ; wire N_299 ; wire m192_1_0_y0 ; wire m192_1_0_co0 ; wire m192_1_0_wmux_S ; wire N_289 ; wire N_292 ; wire m302_1_0_co1 ; wire m302_1_0_wmux_0_S ; wire N_387 ; wire N_385 ; wire m302_1_0_y0 ; wire m302_1_0_co0 ; wire m302_1_0_wmux_S ; wire N_375 ; wire N_378 ; wire m214_1_0_co1 ; wire m214_1_0_wmux_0_S ; wire N_321 ; wire N_316 ; wire N_319 ; wire m214_1_0_y0 ; wire m214_1_0_co0 ; wire m214_1_0_wmux_S ; wire N_309 ; wire N_312 ; wire un10_oiIIo_1_c2 ; wire un10_oiIIo_1_c4 ; wire N_419 ; wire N_262 ; wire m356_1 ; wire N_380_mux ; wire N_425 ; wire N_261_i_1_0 ; wire m330_2_0_1_0 ; wire N_411_2 ; wire m175_2_0_1 ; wire m263_2_0_1 ; wire N_352 ; wire N_286 ; wire N_413 ; wire OllIo_2 ; wire N_417 ; wire m351_0 ; wire m78_1_0_Z ; wire m134_2 ; wire un10_oiIIo_1_c3 ; wire N_383_mux ; wire N_369_mux ; wire N_453 ; wire N_390 ; wire N_370 ; wire N_218 ; wire N_414 ; wire N_304 ; wire N_330 ; wire un10_oiIIo_1_c5 ; wire N_258 ; wire N_392 ; wire N_372 ; wire N_220 ; wire N_306 ; wire N_332 ; // @28:537084 SLE iIlIo ( .Q(iIlIo_Z), .ADn(VCC), .ALn(oO011_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oIlIo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535857 (* cdc_synchronizer=1 *) SLE I1IIo ( .Q(I1IIo_Z), .ADn(VCC), .ALn(oO011_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iO111), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535749 SLE o0IIo ( .Q(o0IIo_Z), .ADn(VCC), .ALn(oO011_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ooI11), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:536175 SLE ioIIo ( .Q(ioIIo_Z), .ADn(VCC), .ALn(oO011_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_373_mux_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:536128 SLE IOoO1 ( .Q(IOoO1_Z), .ADn(VCC), .ALn(oO011_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_254), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:537235 SLE IIiO1 ( .Q(IIiO1_2z), .ADn(VCC), .ALn(oO011_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0iOo), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:537002 SLE lIlIo ( .Q(lIlIo_Z), .ADn(VCC), .ALn(oO011_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iOlIo), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:537128 SLE I1011 ( .Q(I1011_2z), .ADn(VCC), .ALn(oO011_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lOlIo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:537278 SLE lIiO1 ( .Q(lIiO1_Z), .ADn(GND), .ALn(oO011_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_427_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535821 SLE O1IIo ( .Q(O1IIo_Z), .ADn(VCC), .ALn(oO011_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0IIo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535893 (* cdc_synchronizer=1 *) SLE l1IIo ( .Q(l1IIo_Z), .ADn(VCC), .ALn(oO011_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I1IIo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535785 SLE i0IIo ( .Q(i0IIo_Z), .ADn(VCC), .ALn(oO011_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o0IIo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:537360 SLE oIiO1 ( .Q(oIiO1_1z), .ADn(VCC), .ALn(oO011_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(io011_1z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:537319 SLE iIiO1 ( .Q(iIiO1_1z), .ADn(VCC), .ALn(oO011_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oo011), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:536012 SLE i1011 ( .Q(i1011_1z), .ADn(GND), .ALn(oO011_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_398_mux_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:536076 SLE ooIIo ( .Q(ooIIo_Z), .ADn(VCC), .ALn(oO011_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_399_mux_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:537421 SLE IliO1 ( .Q(IliO1_1z), .ADn(GND), .ALn(oO011_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OllIo), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535950 SLE i1IIo ( .Q(i1IIo_Z), .ADn(VCC), .ALn(oO011_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o1IIo), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:537185 SLE l1011 ( .Q(l1011_1z), .ADn(VCC), .ALn(oO011_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l1011_RNO_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:537503 SLE o1011 ( .Q(o1011_2z), .ADn(VCC), .ALn(oO011_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ioIIo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:537043 SLE oIlIo ( .Q(oIlIo_Z), .ADn(VCC), .ALn(oO011_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lIlIo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:536953 SLE O1011 ( .Q(O1011_1z), .ADn(VCC), .ALn(oO011_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_261_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:536879 SLE \i0011_Z[4] ( .Q(i0011[4]), .ADn(VCC), .ALn(oO011_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o0oO1[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:536879 SLE \i0011_Z[3] ( .Q(i0011[3]), .ADn(VCC), .ALn(oO011_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o0oO1[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:536879 SLE \i0011_Z[2] ( .Q(i0011[2]), .ADn(VCC), .ALn(oO011_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o0oO1[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:536879 SLE \i0011_Z[1] ( .Q(i0011[1]), .ADn(VCC), .ALn(oO011_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o0oO1[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:536879 SLE \i0011_Z[0] ( .Q(i0011[0]), .ADn(VCC), .ALn(oO011_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o0oO1[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:536353 SLE \iiIIo[5] ( .Q(iiIIo_Z[5]), .ADn(VCC), .ALn(oO011_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oiIIo_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:536353 SLE \iiIIo[4] ( .Q(iiIIo_Z[4]), .ADn(VCC), .ALn(oO011_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oiIIo_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:536353 SLE \iiIIo[3] ( .Q(iiIIo_Z[3]), .ADn(VCC), .ALn(oO011_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oiIIo_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:536353 SLE \iiIIo[2] ( .Q(iiIIo_Z[2]), .ADn(VCC), .ALn(oO011_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oiIIo_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:536353 SLE \iiIIo[1] ( .Q(iiIIo_Z[1]), .ADn(VCC), .ALn(oO011_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oiIIo_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:536353 SLE \iiIIo[0] ( .Q(N_6695_i), .ADn(VCC), .ALn(oO011_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oiIIo_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:536879 SLE \i0011_Z[7] ( .Q(i0011[7]), .ADn(VCC), .ALn(oO011_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o0oO1[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:536879 SLE \i0011_Z[6] ( .Q(i0011[6]), .ADn(VCC), .ALn(oO011_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o0oO1[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:536879 SLE \i0011_Z[5] ( .Q(i0011[5]), .ADn(VCC), .ALn(oO011_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o0oO1[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:473213 ARI1 m263_1_1_wmux_0 ( .FCO(m263_1_1_co1), .S(m263_1_1_wmux_0_S), .Y(m263_1_1_wmux_0_Y), .B(iiIIo_Z[1]), .C(N_342), .D(N_345), .A(m263_1_1_y0), .FCI(m263_1_1_co0) ); defparam m263_1_1_wmux_0.INIT=20'h0F588; // @28:473213 ARI1 m263_1_1_wmux ( .FCO(m263_1_1_co0), .S(m263_1_1_wmux_S), .Y(m263_1_1_y0), .B(iiIIo_Z[1]), .C(N_335), .D(N_338), .A(N_6695_i), .FCI(VCC) ); defparam m263_1_1_wmux.INIT=20'h0FA44; // @28:473213 ARI1 m175_1_1_wmux_0 ( .FCO(m175_1_1_co1), .S(m175_1_1_wmux_0_S), .Y(m175_1_1_wmux_0_Y), .B(iiIIo_Z[1]), .C(N_275), .D(N_278), .A(m175_1_1_y0), .FCI(m175_1_1_co0) ); defparam m175_1_1_wmux_0.INIT=20'h0F588; // @28:473213 ARI1 m175_1_1_wmux ( .FCO(m175_1_1_co0), .S(m175_1_1_wmux_S), .Y(m175_1_1_y0), .B(iiIIo_Z[1]), .C(N_266), .D(N_271), .A(N_6695_i), .FCI(VCC) ); defparam m175_1_1_wmux.INIT=20'h0FA44; // @28:473213 ARI1 m330_1_0_wmux_0 ( .FCO(m330_1_0_co1), .S(m330_1_0_wmux_0_S), .Y(m330_1_0_wmux_0_Y), .B(iiIIo_Z[1]), .C(N_402), .D(N_405), .A(m330_1_0_y0), .FCI(m330_1_0_co0) ); defparam m330_1_0_wmux_0.INIT=20'h0F588; // @28:473213 ARI1 m330_1_0_wmux ( .FCO(m330_1_0_co0), .S(m330_1_0_wmux_S), .Y(m330_1_0_y0), .B(iiIIo_Z[1]), .C(N_395), .D(N_398), .A(N_6695_i), .FCI(VCC) ); defparam m330_1_0_wmux.INIT=20'h0FA44; // @28:473213 ARI1 m297_1_0_wmux_0 ( .FCO(m297_1_0_co1), .S(m297_1_0_wmux_0_S), .Y(N_382), .B(oiI11[9]), .C(iiIIo_Z[3]), .D(N_269_i_Z), .A(m297_1_0_y0), .FCI(m297_1_0_co0) ); defparam m297_1_0_wmux_0.INIT=20'h0F522; // @28:473213 ARI1 m297_1_0_wmux ( .FCO(m297_1_0_co0), .S(m297_1_0_wmux_S), .Y(m297_1_0_y0), .B(oiI11[9]), .C(N_267), .D(iiIIo_Z[4]), .A(oIOI1[9]), .FCI(VCC) ); defparam m297_1_0_wmux.INIT=20'h0AF44; // @28:473213 ARI1 m96_1_0_wmux_0 ( .FCO(m96_1_0_co1), .S(m96_1_0_wmux_0_S), .Y(N_97), .B(oIOI1[17]), .C(N_16_0_i_Z), .D(N_17_0_i_Z), .A(m96_1_0_y0), .FCI(m96_1_0_co0) ); defparam m96_1_0_wmux_0.INIT=20'h0F588; // @28:473213 ARI1 m96_1_0_wmux ( .FCO(m96_1_0_co0), .S(m96_1_0_wmux_S), .Y(m96_1_0_y0), .B(oIOI1[17]), .C(N_13_0_i_Z), .D(N_14_0_i_Z), .A(oIOI1[16]), .FCI(VCC) ); defparam m96_1_0_wmux.INIT=20'h0FA44; // @28:473213 ARI1 m44_1_0_wmux_0 ( .FCO(m44_1_0_co1), .S(m44_1_0_wmux_0_S), .Y(N_45_0), .B(oIOI1[1]), .C(N_16_0_i_Z), .D(N_17_0_i_Z), .A(m44_1_0_y0), .FCI(m44_1_0_co0) ); defparam m44_1_0_wmux_0.INIT=20'h0F588; // @28:473213 ARI1 m44_1_0_wmux ( .FCO(m44_1_0_co0), .S(m44_1_0_wmux_S), .Y(m44_1_0_y0), .B(oIOI1[1]), .C(N_13_0_i_Z), .D(N_14_0_i_Z), .A(oIOI1[0]), .FCI(VCC) ); defparam m44_1_0_wmux.INIT=20'h0FA44; // @28:473213 ARI1 m71_1_0_wmux_0 ( .FCO(m71_1_0_co1), .S(m71_1_0_wmux_0_S), .Y(N_72), .B(oIOI1[9]), .C(N_16_0_i_Z), .D(N_17_0_i_Z), .A(m71_1_0_y0), .FCI(m71_1_0_co0) ); defparam m71_1_0_wmux_0.INIT=20'h0F588; // @28:473213 ARI1 m71_1_0_wmux ( .FCO(m71_1_0_co0), .S(m71_1_0_wmux_S), .Y(m71_1_0_y0), .B(oIOI1[9]), .C(N_13_0_i_Z), .D(N_14_0_i_Z), .A(oIOI1[8]), .FCI(VCC) ); defparam m71_1_0_wmux.INIT=20'h0FA44; // @28:473213 ARI1 m160_1_0_wmux_0 ( .FCO(m160_1_0_co1), .S(m160_1_0_wmux_0_S), .Y(N_271), .B(iiI11[7]), .C(iiIIo_Z[3]), .D(N_269_i_Z), .A(m160_1_0_y0), .FCI(m160_1_0_co0) ); defparam m160_1_0_wmux_0.INIT=20'h0F522; // @28:473213 ARI1 m160_1_0_wmux ( .FCO(m160_1_0_co0), .S(m160_1_0_wmux_S), .Y(m160_1_0_y0), .B(iiI11[7]), .C(N_267), .D(iiIIo_Z[4]), .A(oIOI1[23]), .FCI(VCC) ); defparam m160_1_0_wmux.INIT=20'h0AF44; // @28:473213 ARI1 m27_1_0_wmux_0 ( .FCO(m27_1_0_co1), .S(m27_1_0_wmux_0_S), .Y(N_28_0), .B(oIOI1[33]), .C(N_16_0_i_Z), .D(N_17_0_i_Z), .A(m27_1_0_y0), .FCI(m27_1_0_co0) ); defparam m27_1_0_wmux_0.INIT=20'h0F588; // @28:473213 ARI1 m27_1_0_wmux ( .FCO(m27_1_0_co0), .S(m27_1_0_wmux_S), .Y(m27_1_0_y0), .B(oIOI1[33]), .C(N_13_0_i_Z), .D(N_14_0_i_Z), .A(oIOI1[32]), .FCI(VCC) ); defparam m27_1_0_wmux.INIT=20'h0FA44; // @28:473213 ARI1 m164_1_0_wmux_0 ( .FCO(m164_1_0_co1), .S(m164_1_0_wmux_0_S), .Y(N_275), .B(oiI11[15]), .C(iiIIo_Z[3]), .D(N_269_i_Z), .A(m164_1_0_y0), .FCI(m164_1_0_co0) ); defparam m164_1_0_wmux_0.INIT=20'h0F522; // @28:473213 ARI1 m164_1_0_wmux ( .FCO(m164_1_0_co0), .S(m164_1_0_wmux_S), .Y(m164_1_0_y0), .B(oiI11[15]), .C(N_267), .D(iiIIo_Z[4]), .A(oIOI1[15]), .FCI(VCC) ); defparam m164_1_0_wmux.INIT=20'h0AF44; // @28:473213 ARI1 m18_1_0_wmux_0 ( .FCO(m18_1_0_co1), .S(m18_1_0_wmux_0_S), .Y(N_19_0), .B(oIOI1[41]), .C(N_16_0_i_Z), .D(N_17_0_i_Z), .A(m18_1_0_y0), .FCI(m18_1_0_co0) ); defparam m18_1_0_wmux_0.INIT=20'h0F588; // @28:473213 ARI1 m18_1_0_wmux ( .FCO(m18_1_0_co0), .S(m18_1_0_wmux_S), .Y(m18_1_0_y0), .B(oIOI1[41]), .C(N_13_0_i_Z), .D(N_14_0_i_Z), .A(oIOI1[40]), .FCI(VCC) ); defparam m18_1_0_wmux.INIT=20'h0FA44; // @28:473213 ARI1 m312_1_0_wmux_0 ( .FCO(m312_1_0_co1), .S(m312_1_0_wmux_0_S), .Y(N_395), .B(oIOI1[24]), .C(iiIIo_Z[4]), .D(N_269_i_Z), .A(m312_1_0_y0), .FCI(m312_1_0_co0) ); defparam m312_1_0_wmux_0.INIT=20'h0F522; // @28:473213 ARI1 m312_1_0_wmux ( .FCO(m312_1_0_co0), .S(m312_1_0_wmux_S), .Y(m312_1_0_y0), .B(oIOI1[24]), .C(N_267), .D(iiIIo_Z[3]), .A(iiI11[8]), .FCI(VCC) ); defparam m312_1_0_wmux.INIT=20'h0AF44; // @28:473213 ARI1 m187_1_0_wmux_0 ( .FCO(m187_1_0_co1), .S(m187_1_0_wmux_0_S), .Y(N_296), .B(oiI11[14]), .C(iiIIo_Z[3]), .D(N_269_i_Z), .A(m187_1_0_y0), .FCI(m187_1_0_co0) ); defparam m187_1_0_wmux_0.INIT=20'h0F522; // @28:473213 ARI1 m187_1_0_wmux ( .FCO(m187_1_0_co0), .S(m187_1_0_wmux_S), .Y(m187_1_0_y0), .B(oiI11[14]), .C(N_267), .D(iiIIo_Z[4]), .A(oIOI1[14]), .FCI(VCC) ); defparam m187_1_0_wmux.INIT=20'h0AF44; // @28:473213 ARI1 m280_1_0_wmux_0 ( .FCO(m280_1_0_co1), .S(m280_1_0_wmux_0_S), .Y(N_367), .B(iiIIo_Z[1]), .C(N_362), .D(N_365), .A(m280_1_0_y0), .FCI(m280_1_0_co0) ); defparam m280_1_0_wmux_0.INIT=20'h0F588; // @28:473213 ARI1 m280_1_0_wmux ( .FCO(m280_1_0_co0), .S(m280_1_0_wmux_S), .Y(m280_1_0_y0), .B(iiIIo_Z[1]), .C(N_355), .D(N_358), .A(N_6695_i), .FCI(VCC) ); defparam m280_1_0_wmux.INIT=20'h0FA44; // @28:473213 ARI1 m236_1_0_wmux_0 ( .FCO(m236_1_0_co1), .S(m236_1_0_wmux_0_S), .Y(N_327), .B(iiIIo_Z[1]), .C(N_232), .D(N_325), .A(m236_1_0_y0), .FCI(m236_1_0_co0) ); defparam m236_1_0_wmux_0.INIT=20'h0F588; // @28:473213 ARI1 m236_1_0_wmux ( .FCO(m236_1_0_co0), .S(m236_1_0_wmux_S), .Y(m236_1_0_y0), .B(iiIIo_Z[1]), .C(N_225), .D(N_228), .A(N_6695_i), .FCI(VCC) ); defparam m236_1_0_wmux.INIT=20'h0FA44; // @28:473213 ARI1 m192_1_0_wmux_0 ( .FCO(m192_1_0_co1), .S(m192_1_0_wmux_0_S), .Y(N_301), .B(iiIIo_Z[1]), .C(N_296), .D(N_299), .A(m192_1_0_y0), .FCI(m192_1_0_co0) ); defparam m192_1_0_wmux_0.INIT=20'h0F588; // @28:473213 ARI1 m192_1_0_wmux ( .FCO(m192_1_0_co0), .S(m192_1_0_wmux_S), .Y(m192_1_0_y0), .B(iiIIo_Z[1]), .C(N_289), .D(N_292), .A(N_6695_i), .FCI(VCC) ); defparam m192_1_0_wmux.INIT=20'h0FA44; // @28:473213 ARI1 m302_1_0_wmux_0 ( .FCO(m302_1_0_co1), .S(m302_1_0_wmux_0_S), .Y(N_387), .B(iiIIo_Z[1]), .C(N_382), .D(N_385), .A(m302_1_0_y0), .FCI(m302_1_0_co0) ); defparam m302_1_0_wmux_0.INIT=20'h0F588; // @28:473213 ARI1 m302_1_0_wmux ( .FCO(m302_1_0_co0), .S(m302_1_0_wmux_S), .Y(m302_1_0_y0), .B(iiIIo_Z[1]), .C(N_375), .D(N_378), .A(N_6695_i), .FCI(VCC) ); defparam m302_1_0_wmux.INIT=20'h0FA44; // @28:473213 ARI1 m214_1_0_wmux_0 ( .FCO(m214_1_0_co1), .S(m214_1_0_wmux_0_S), .Y(N_321), .B(iiIIo_Z[1]), .C(N_316), .D(N_319), .A(m214_1_0_y0), .FCI(m214_1_0_co0) ); defparam m214_1_0_wmux_0.INIT=20'h0F588; // @28:473213 ARI1 m214_1_0_wmux ( .FCO(m214_1_0_co0), .S(m214_1_0_wmux_S), .Y(m214_1_0_y0), .B(iiIIo_Z[1]), .C(N_309), .D(N_312), .A(N_6695_i), .FCI(VCC) ); defparam m214_1_0_wmux.INIT=20'h0FA44; // @28:536324 CFG3 un10_oiIIo_1_ac0_5 ( .A(un10_oiIIo_1_c2), .B(iiIIo_Z[2]), .C(iiIIo_Z[3]), .Y(un10_oiIIo_1_c4) ); defparam un10_oiIIo_1_ac0_5.INIT=8'h80; // @28:473213 CFG3 IliO1_RNO_2 ( .A(O1IIo_Z), .B(o1011_2z), .C(ioIIo_Z), .Y(N_419) ); defparam IliO1_RNO_2.INIT=8'hA2; // @28:473213 CFG3 \i0011_RNO_3[7] ( .A(N_262), .B(N_6695_i), .C(iiIIo_Z[1]), .Y(i0011_RNO_3_Z[7]) ); defparam \i0011_RNO_3[7] .INIT=8'hC2; // @28:473213 CFG4 \iiIIo_RNI2BDEP[5] ( .A(iiIIo_Z[5]), .B(ioIIo_Z), .C(m356_1), .D(N_380_mux), .Y(N_425) ); defparam \iiIIo_RNI2BDEP[5] .INIT=16'hC8CC; // @28:473213 CFG3 iIlIo_RNISIVKC ( .A(iIl0112), .B(iIlIo_Z), .C(oIlIo_Z), .Y(m356_1) ); defparam iIlIo_RNISIVKC.INIT=8'h1B; // @28:536953 CFG4 O1011_RNO ( .A(ioIIo_Z), .B(N_261_i_1_0), .C(ooIIo_Z), .D(OOiO1_1z), .Y(N_261_i) ); defparam O1011_RNO.INIT=16'h7828; // @28:536953 CFG4 O1011_RNO_0 ( .A(i1IIo_Z), .B(oIlIo_Z), .C(O1011_1z), .D(ooIIo_Z), .Y(N_261_i_1_0) ); defparam O1011_RNO_0.INIT=16'h4530; // @28:473213 CFG4 \i0011_RNO_1[0] ( .A(iiIIo_Z[1]), .B(m330_2_0_1_0), .C(N_267), .D(N_411_2), .Y(i0011_RNO_1_Z[0]) ); defparam \i0011_RNO_1[0] .INIT=16'hBA90; // @28:473213 CFG3 \i0011_RNO_2[0] ( .A(iiIIo_Z[1]), .B(oIOI1[40]), .C(N_6695_i), .Y(m330_2_0_1_0) ); defparam \i0011_RNO_2[0] .INIT=8'h0D; // @28:473213 CFG3 \i0011_RNO_1[7] ( .A(m175_2_0_1), .B(iiIIo_Z[1]), .C(N_267), .Y(i0011_RNO_1_Z[7]) ); defparam \i0011_RNO_1[7] .INIT=8'h51; // @28:473213 CFG4 \i0011_RNO_2[7] ( .A(oIOI1[39]), .B(oIOI1[47]), .C(i0011_RNO_3_Z[7]), .D(iiIIo_Z[1]), .Y(m175_2_0_1) ); defparam \i0011_RNO_2[7] .INIT=16'h530F; // @28:473213 CFG3 \i0011_RNO_1[3] ( .A(m263_2_0_1), .B(iiIIo_Z[1]), .C(N_267), .Y(i0011_RNO_1_Z[3]) ); defparam \i0011_RNO_1[3] .INIT=8'h51; // @28:473213 CFG4 \i0011_RNO_2[3] ( .A(oIOI1[35]), .B(oIOI1[43]), .C(i0011_RNO_3_Z[3]), .D(iiIIo_Z[1]), .Y(m263_2_0_1) ); defparam \i0011_RNO_2[3] .INIT=16'h530F; CFG3 \i0011_RNO_0[3] ( .A(iiIIo_Z[2]), .B(m263_1_1_wmux_0_Y), .C(i0011_RNO_1_Z[3]), .Y(N_352) ); defparam \i0011_RNO_0[3] .INIT=8'hE4; // @28:473213 CFG3 \i0011_RNO_3[3] ( .A(N_262), .B(N_6695_i), .C(iiIIo_Z[1]), .Y(i0011_RNO_3_Z[3]) ); defparam \i0011_RNO_3[3] .INIT=8'hCA; CFG3 \i0011_RNO_0[7] ( .A(m175_1_1_wmux_0_Y), .B(iiIIo_Z[2]), .C(i0011_RNO_1_Z[7]), .Y(N_286) ); defparam \i0011_RNO_0[7] .INIT=8'hE2; CFG3 \i0011_RNO_0[0] ( .A(m330_1_0_wmux_0_Y), .B(iiIIo_Z[2]), .C(i0011_RNO_1_Z[0]), .Y(N_413) ); defparam \i0011_RNO_0[0] .INIT=8'hE2; // @28:473213 CFG3 IliO1_RNO ( .A(OllIo_2), .B(IliO1_1z), .C(N_417), .Y(OllIo) ); defparam IliO1_RNO.INIT=8'hBA; // @28:473213 CFG2 \iiIIo_RNI117O2[2] ( .A(iiIIo_Z[1]), .B(iiIIo_Z[2]), .Y(m351_0) ); defparam \iiIIo_RNI117O2[2] .INIT=4'h2; // @28:536324 CFG2 un10_oiIIo_1_ac0_1 ( .A(iiIIo_Z[1]), .B(N_6695_i), .Y(un10_oiIIo_1_c2) ); defparam un10_oiIIo_1_ac0_1.INIT=4'h8; // @28:473213 CFG2 m28 ( .A(Oi011_2), .B(oIOI1[34]), .Y(N_447) ); defparam m28.INIT=4'h6; // @28:473213 CFG2 m80 ( .A(Oi011_7), .B(oIOI1[47]), .Y(un3_oo1i1_7) ); defparam m80.INIT=4'h6; // @28:473213 CFG2 m155 ( .A(iiIIo_Z[4]), .B(iiIIo_Z[3]), .Y(N_267) ); defparam m155.INIT=4'h1; // @28:473213 CFG2 m150 ( .A(iiIIo_Z[4]), .B(iiIIo_Z[3]), .Y(N_262) ); defparam m150.INIT=4'h4; // @28:473213 CFG2 IliO1_RNO_1 ( .A(ioIIo_Z), .B(o1011_2z), .Y(N_417) ); defparam IliO1_RNO_1.INIT=4'h4; // @28:537124 CFG2 lOlIo ( .A(ioIIo_Z), .B(lOiO1), .Y(lOlIo_Z) ); defparam lOlIo.INIT=4'h4; // @28:473213 CFG3 \i0011_RNO[3] ( .A(IioO1[3]), .B(N_352), .C(ioIIo_Z), .Y(o0oO1[3]) ); defparam \i0011_RNO[3] .INIT=8'hCA; // @28:473213 CFG3 \i0011_RNO[7] ( .A(IioO1[7]), .B(N_286), .C(ioIIo_Z), .Y(o0oO1[7]) ); defparam \i0011_RNO[7] .INIT=8'hCA; // @28:473213 CFG3 \i0011_RNO[0] ( .A(IioO1[0]), .B(N_413), .C(ioIIo_Z), .Y(o0oO1[0]) ); defparam \i0011_RNO[0] .INIT=8'hCA; // @28:473213 CFG2 N_269_i ( .A(iiIIo_Z[4]), .B(iiIIo_Z[3]), .Y(N_269_i_Z) ); defparam N_269_i.INIT=4'h7; // @28:473213 CFG2 N_17_0_i ( .A(Oi011_0), .B(Oi011_1), .Y(N_17_0_i_Z) ); defparam N_17_0_i.INIT=4'h7; // @28:473213 CFG2 N_16_0_i ( .A(Oi011_0), .B(Oi011_1), .Y(N_16_0_i_Z) ); defparam N_16_0_i.INIT=4'hB; // @28:473213 CFG2 N_14_0_i ( .A(Oi011_0), .B(Oi011_1), .Y(N_14_0_i_Z) ); defparam N_14_0_i.INIT=4'hD; // @28:473213 CFG2 N_13_0_i ( .A(Oi011_0), .B(Oi011_1), .Y(N_13_0_i_Z) ); defparam N_13_0_i.INIT=4'hE; // @28:473213 CFG4 m78_1_0 ( .A(Oi011_6), .B(Oi011_0), .C(Oi011_7), .D(Oi011_3), .Y(m78_1_0_Z) ); defparam m78_1_0.INIT=16'h1000; // @28:473213 CFG4 \iiIIo_RNI44EG5[5] ( .A(N_6695_i), .B(iiIIo_Z[1]), .C(iiIIo_Z[5]), .D(iiIIo_Z[2]), .Y(m134_2) ); defparam \iiIIo_RNI44EG5[5] .INIT=16'h0100; // @28:536324 CFG2 un10_oiIIo_1_ac0_3 ( .A(un10_oiIIo_1_c2), .B(iiIIo_Z[2]), .Y(un10_oiIIo_1_c3) ); defparam un10_oiIIo_1_ac0_3.INIT=4'h8; // @28:537278 CFG2 lIiO1_RNO ( .A(ioIIo_Z), .B(lo011), .Y(N_427_i) ); defparam lIiO1_RNO.INIT=4'hE; // @28:473213 CFG4 m116 ( .A(oIoO1), .B(iiOi1), .C(IIoO1_1z_1), .D(Oi011_1), .Y(N_246_i) ); defparam m116.INIT=16'hA280; // @28:473213 CFG4 m111 ( .A(oIoO1), .B(iiOi1), .C(IIoO1_1z_2), .D(Oi011_2), .Y(N_242_i) ); defparam m111.INIT=16'hA280; // @28:473213 CFG4 m121 ( .A(oIoO1), .B(iiOi1), .C(IIoO1_1z_0), .D(Oi011_0), .Y(N_250_i) ); defparam m121.INIT=16'hA280; // @28:473213 CFG4 m106 ( .A(oIoO1), .B(iiOi1), .C(IIoO1_1z_3), .D(Oi011_3), .Y(N_238_i) ); defparam m106.INIT=16'hA280; // @28:473213 CFG4 m101 ( .A(oIoO1), .B(iiOi1), .C(IIoO1_1z_6), .D(Oi011_6), .Y(N_102) ); defparam m101.INIT=16'hA280; // @28:473213 CFG4 lIiO1_RNIAB63H ( .A(lIiO1_Z), .B(oIiO1_1z), .C(lo011), .D(ioIIo_Z), .Y(N_254) ); defparam lIiO1_RNIAB63H.INIT=16'hF0EE; // @28:473213 CFG4 \iiIIo_RNI5LHS6[2] ( .A(iiIIo_Z[4]), .B(m351_0), .C(N_6695_i), .D(iiIIo_Z[3]), .Y(N_380_mux) ); defparam \iiIIo_RNI5LHS6[2] .INIT=16'h0080; // @28:473213 CFG3 \iiIIo_RNI99L88[5] ( .A(iiIIo_Z[3]), .B(iiIIo_Z[4]), .C(m134_2), .Y(N_383_mux) ); defparam \iiIIo_RNI99L88[5] .INIT=8'h40; // @28:473213 CFG3 i1IIo_RNO_0 ( .A(iOiO1_1z), .B(ooI11), .C(IliO1_1z), .Y(N_369_mux) ); defparam i1IIo_RNO_0.INIT=8'h80; // @28:473213 CFG4 l1IIo_RNIR06IC ( .A(l1IIo_Z), .B(oOiO1), .C(i1IIo_Z), .D(OOiO1_1z), .Y(N_453) ); defparam l1IIo_RNIR06IC.INIT=16'h020F; // @28:473213 CFG4 lIlIo_RNO ( .A(l1011_1z), .B(Io011), .C(IOiO1), .D(ioIIo_Z), .Y(iOlIo) ); defparam lIlIo_RNO.INIT=16'h0400; // @28:473213 CFG4 IIiO1_RNO ( .A(l1011_1z), .B(Io011), .C(IOiO1), .D(ioIIo_Z), .Y(i0iOo) ); defparam IIiO1_RNO.INIT=16'h0004; // @28:536175 CFG4 ioIIo_RNO ( .A(ooIIo_Z), .B(ioIIo_Z), .C(i1011_1z), .D(i1IIo_Z), .Y(N_373_mux_i) ); defparam ioIIo_RNO.INIT=16'hF888; // @28:473213 CFG4 \i0011_RNO_1[1] ( .A(oIOI1[41]), .B(oIOI1[33]), .C(N_6695_i), .D(N_267), .Y(N_390) ); defparam \i0011_RNO_1[1] .INIT=16'hCA00; // @28:473213 CFG4 \i0011_RNO_1[2] ( .A(oIOI1[42]), .B(oIOI1[34]), .C(N_6695_i), .D(N_267), .Y(N_370) ); defparam \i0011_RNO_1[2] .INIT=16'hCA00; // @28:473213 CFG4 \i0011_RNO_1[5] ( .A(oIOI1[45]), .B(oIOI1[37]), .C(N_6695_i), .D(N_267), .Y(N_218) ); defparam \i0011_RNO_1[5] .INIT=16'hCA00; // @28:473213 CFG2 IOoO1_RNIL90CO ( .A(N_254), .B(IOoO1_Z), .Y(N_414) ); defparam IOoO1_RNIL90CO.INIT=4'h2; // @28:473213 CFG4 \i0011_RNO_1[6] ( .A(oIOI1[46]), .B(oIOI1[38]), .C(N_6695_i), .D(N_267), .Y(N_304) ); defparam \i0011_RNO_1[6] .INIT=16'hCA00; // @28:473213 CFG4 \i0011_RNO_1[4] ( .A(oIOI1[44]), .B(oIOI1[36]), .C(N_6695_i), .D(N_267), .Y(N_330) ); defparam \i0011_RNO_1[4] .INIT=16'hCA00; // @28:473213 CFG4 \i0011_RNO_3[0] ( .A(iiIIo_Z[4]), .B(N_262), .C(oIOI1[32]), .D(N_6695_i), .Y(N_411_2) ); defparam \i0011_RNO_3[0] .INIT=16'h5C00; // @28:536324 CFG2 un10_oiIIo_1_ac0_7 ( .A(un10_oiIIo_1_c4), .B(iiIIo_Z[4]), .Y(un10_oiIIo_1_c5) ); defparam un10_oiIIo_1_ac0_7.INIT=4'h8; // @28:473213 CFG3 l1011_RNO ( .A(N_380_mux), .B(IOiO1), .C(ioIIo_Z), .Y(l1011_RNO_Z) ); defparam l1011_RNO.INIT=8'hAC; // @28:473213 CFG4 i1IIo_RNO ( .A(ioIIo_Z), .B(N_369_mux), .C(lo011), .D(i1IIo_Z), .Y(o1IIo) ); defparam i1IIo_RNO.INIT=16'h5FCC; // @28:473213 CFG4 IliO1_RNO_0 ( .A(i0IIo_Z), .B(IliO1_1z), .C(N_419), .D(iOiO1_1z), .Y(OllIo_2) ); defparam IliO1_RNO_0.INIT=16'h028A; // @28:473213 CFG3 m78 ( .A(ii1i1_2_0), .B(m78_1_0_Z), .C(I01i1), .Y(ii1i1) ); defparam m78.INIT=8'h80; // @28:513310 CFG3 N_251_i ( .A(iIl0112), .B(o1li1_0), .C(N_250_i), .Y(N_251_i_1z) ); defparam N_251_i.INIT=8'hE4; // @28:513310 CFG3 N_103_i ( .A(iIl0112), .B(o1li1_6), .C(N_102), .Y(N_103_i_1z) ); defparam N_103_i.INIT=8'hE4; // @28:513310 CFG3 N_239_i ( .A(iIl0112), .B(o1li1_3), .C(N_238_i), .Y(N_239_i_1z) ); defparam N_239_i.INIT=8'hE4; // @28:513310 CFG3 N_243_i ( .A(iIl0112), .B(o1li1_2), .C(N_242_i), .Y(N_243_i_1z) ); defparam N_243_i.INIT=8'hE4; // @28:513310 CFG3 N_247_i ( .A(iIl0112), .B(o1li1_1), .C(N_246_i), .Y(N_247_i_1z) ); defparam N_247_i.INIT=8'hE4; // @28:473213 CFG4 iIlIo_RNI5SKTK ( .A(iIl0112), .B(iIlIo_Z), .C(oIlIo_Z), .D(N_383_mux), .Y(N_258) ); defparam iIlIo_RNI5SKTK.INIT=16'hFF1B; // @28:473213 CFG4 m322 ( .A(iiIIo_Z[3]), .B(iiIIo_Z[4]), .C(oiI11[0]), .D(oIOI1[0]), .Y(N_405) ); defparam m322.INIT=16'h6240; // @28:473213 CFG4 m319 ( .A(iiIIo_Z[3]), .B(iiIIo_Z[4]), .C(oiI11[8]), .D(oIOI1[8]), .Y(N_402) ); defparam m319.INIT=16'h6240; // @28:473213 CFG4 m224 ( .A(oIOI1[28]), .B(iiIIo_Z[3]), .C(iiIIo_Z[4]), .D(iiI11[12]), .Y(N_225) ); defparam m224.INIT=16'h3808; // @28:473213 CFG4 m190 ( .A(iiIIo_Z[3]), .B(iiIIo_Z[4]), .C(oiI11[6]), .D(oIOI1[6]), .Y(N_299) ); defparam m190.INIT=16'h6240; // @28:473213 CFG4 m315 ( .A(oIOI1[16]), .B(iiIIo_Z[3]), .C(iiIIo_Z[4]), .D(iiI11[0]), .Y(N_398) ); defparam m315.INIT=16'h3808; // @28:473213 CFG4 m183 ( .A(oIOI1[22]), .B(iiIIo_Z[3]), .C(iiIIo_Z[4]), .D(iiI11[6]), .Y(N_292) ); defparam m183.INIT=16'h3808; // @28:473213 CFG4 m290 ( .A(oIOI1[25]), .B(iiIIo_Z[3]), .C(iiIIo_Z[4]), .D(iiI11[9]), .Y(N_375) ); defparam m290.INIT=16'h3808; // @28:473213 CFG4 m209 ( .A(iiIIo_Z[3]), .B(iiIIo_Z[4]), .C(oiI11[13]), .D(oIOI1[13]), .Y(N_316) ); defparam m209.INIT=16'h6240; // @28:473213 CFG4 m278 ( .A(iiIIo_Z[3]), .B(iiIIo_Z[4]), .C(oiI11[2]), .D(oIOI1[2]), .Y(N_365) ); defparam m278.INIT=16'h6240; // @28:473213 CFG4 m234 ( .A(iiIIo_Z[3]), .B(iiIIo_Z[4]), .C(oiI11[4]), .D(oIOI1[4]), .Y(N_325) ); defparam m234.INIT=16'h6240; // @28:473213 CFG4 m227 ( .A(oIOI1[20]), .B(iiIIo_Z[3]), .C(iiIIo_Z[4]), .D(iiI11[4]), .Y(N_228) ); defparam m227.INIT=16'h3808; // @28:473213 CFG4 m231 ( .A(iiIIo_Z[3]), .B(iiIIo_Z[4]), .C(oiI11[12]), .D(oIOI1[12]), .Y(N_232) ); defparam m231.INIT=16'h6240; // @28:473213 CFG4 m253 ( .A(iiIIo_Z[3]), .B(iiIIo_Z[4]), .C(oiI11[11]), .D(oIOI1[11]), .Y(N_342) ); defparam m253.INIT=16'h6240; // @28:473213 CFG4 m256 ( .A(iiIIo_Z[3]), .B(iiIIo_Z[4]), .C(oiI11[3]), .D(oIOI1[3]), .Y(N_345) ); defparam m256.INIT=16'h6240; // @28:473213 CFG4 m271 ( .A(oIOI1[18]), .B(iiIIo_Z[3]), .C(iiIIo_Z[4]), .D(iiI11[2]), .Y(N_358) ); defparam m271.INIT=16'h3808; // @28:473213 CFG4 m268 ( .A(oIOI1[26]), .B(iiIIo_Z[3]), .C(iiIIo_Z[4]), .D(iiI11[10]), .Y(N_355) ); defparam m268.INIT=16'h3808; // @28:473213 CFG4 m275 ( .A(iiIIo_Z[3]), .B(iiIIo_Z[4]), .C(oiI11[10]), .D(oIOI1[10]), .Y(N_362) ); defparam m275.INIT=16'h6240; // @28:473213 CFG4 m293 ( .A(oIOI1[17]), .B(iiIIo_Z[3]), .C(iiIIo_Z[4]), .D(iiI11[1]), .Y(N_378) ); defparam m293.INIT=16'h3808; // @28:473213 CFG4 m300 ( .A(iiIIo_Z[3]), .B(iiIIo_Z[4]), .C(oiI11[1]), .D(oIOI1[1]), .Y(N_385) ); defparam m300.INIT=16'h6240; // @28:473213 CFG4 m205 ( .A(oIOI1[21]), .B(iiIIo_Z[3]), .C(iiIIo_Z[4]), .D(iiI11[5]), .Y(N_312) ); defparam m205.INIT=16'h3808; // @28:473213 CFG4 m167 ( .A(iiIIo_Z[3]), .B(iiIIo_Z[4]), .C(oiI11[7]), .D(oIOI1[7]), .Y(N_278) ); defparam m167.INIT=16'h6240; // @28:473213 CFG4 m249 ( .A(oIOI1[19]), .B(iiIIo_Z[3]), .C(iiIIo_Z[4]), .D(iiI11[3]), .Y(N_338) ); defparam m249.INIT=16'h3808; // @28:473213 CFG4 m212 ( .A(iiIIo_Z[3]), .B(iiIIo_Z[4]), .C(oiI11[5]), .D(oIOI1[5]), .Y(N_319) ); defparam m212.INIT=16'h6240; // @28:473213 CFG4 m154 ( .A(oIOI1[31]), .B(iiIIo_Z[3]), .C(iiIIo_Z[4]), .D(iiI11[15]), .Y(N_266) ); defparam m154.INIT=16'h3808; // @28:473213 CFG4 \i0011_RNO_0[1] ( .A(iiIIo_Z[2]), .B(iiIIo_Z[1]), .C(N_390), .D(N_387), .Y(N_392) ); defparam \i0011_RNO_0[1] .INIT=16'hD580; // @28:473213 CFG4 \i0011_RNO_0[2] ( .A(iiIIo_Z[2]), .B(iiIIo_Z[1]), .C(N_370), .D(N_367), .Y(N_372) ); defparam \i0011_RNO_0[2] .INIT=16'hD580; // @28:473213 CFG4 \i0011_RNO_0[5] ( .A(iiIIo_Z[1]), .B(iiIIo_Z[2]), .C(N_321), .D(N_218), .Y(N_220) ); defparam \i0011_RNO_0[5] .INIT=16'hB830; // @28:473213 CFG4 \i0011_RNO_0[6] ( .A(iiIIo_Z[2]), .B(iiIIo_Z[1]), .C(N_304), .D(N_301), .Y(N_306) ); defparam \i0011_RNO_0[6] .INIT=16'hD580; // @28:473213 CFG4 \i0011_RNO_0[4] ( .A(iiIIo_Z[2]), .B(iiIIo_Z[1]), .C(N_330), .D(N_327), .Y(N_332) ); defparam \i0011_RNO_0[4] .INIT=16'hD580; // @28:536012 CFG4 i1011_RNO ( .A(N_453), .B(N_414), .C(i1011_1z), .D(ooIIo_Z), .Y(N_398_mux_i) ); defparam i1011_RNO.INIT=16'hECA0; // @28:536076 CFG4 ooIIo_RNO ( .A(N_453), .B(N_414), .C(i1011_1z), .D(ooIIo_Z), .Y(N_399_mux_i) ); defparam ooIIo_RNO.INIT=16'h7350; // @28:473213 CFG3 \i0011_RNO[1] ( .A(IioO1[1]), .B(N_392), .C(ioIIo_Z), .Y(o0oO1[1]) ); defparam \i0011_RNO[1] .INIT=8'hCA; // @28:473213 CFG3 \i0011_RNO[2] ( .A(IioO1[2]), .B(N_372), .C(ioIIo_Z), .Y(o0oO1[2]) ); defparam \i0011_RNO[2] .INIT=8'hCA; // @28:473213 CFG3 \i0011_RNO[5] ( .A(IioO1[5]), .B(N_220), .C(ioIIo_Z), .Y(o0oO1[5]) ); defparam \i0011_RNO[5] .INIT=8'hCA; // @28:473213 CFG3 \i0011_RNO[6] ( .A(IioO1[6]), .B(N_306), .C(ioIIo_Z), .Y(o0oO1[6]) ); defparam \i0011_RNO[6] .INIT=8'hCA; // @28:473213 CFG3 \i0011_RNO[4] ( .A(IioO1[4]), .B(N_332), .C(ioIIo_Z), .Y(o0oO1[4]) ); defparam \i0011_RNO[4] .INIT=8'hCA; // @28:473213 CFG4 m180 ( .A(oIOI1[30]), .B(iiIIo_Z[3]), .C(iiIIo_Z[4]), .D(iiI11[14]), .Y(N_289) ); defparam m180.INIT=16'h3808; // @28:473213 CFG4 m202 ( .A(oIOI1[29]), .B(iiIIo_Z[3]), .C(iiIIo_Z[4]), .D(iiI11[13]), .Y(N_309) ); defparam m202.INIT=16'h3808; // @28:473213 CFG4 m246 ( .A(oIOI1[27]), .B(iiIIo_Z[3]), .C(iiIIo_Z[4]), .D(iiI11[11]), .Y(N_335) ); defparam m246.INIT=16'h3808; // @28:536301 CFG4 \oiIIo[5] ( .A(un10_oiIIo_1_c5), .B(iiIIo_Z[5]), .C(N_258), .D(N_425), .Y(oiIIo_Z[5]) ); defparam \oiIIo[5] .INIT=16'hC600; // @28:536301 CFG4 \oiIIo[4] ( .A(un10_oiIIo_1_c4), .B(iiIIo_Z[4]), .C(N_258), .D(N_425), .Y(oiIIo_Z[4]) ); defparam \oiIIo[4] .INIT=16'hC600; // @28:536301 CFG4 \oiIIo[3] ( .A(un10_oiIIo_1_c3), .B(iiIIo_Z[3]), .C(N_258), .D(N_425), .Y(oiIIo_Z[3]) ); defparam \oiIIo[3] .INIT=16'hC600; // @28:536301 CFG4 \oiIIo[2] ( .A(un10_oiIIo_1_c2), .B(iiIIo_Z[2]), .C(N_258), .D(N_425), .Y(oiIIo_Z[2]) ); defparam \oiIIo[2] .INIT=16'hC600; // @28:536301 CFG4 \oiIIo[1] ( .A(N_425), .B(N_258), .C(N_6695_i), .D(iiIIo_Z[1]), .Y(oiIIo_Z[1]) ); defparam \oiIIo[1] .INIT=16'h8A20; // @28:536301 CFG3 \oiIIo[0] ( .A(N_6695_i), .B(N_425), .C(N_258), .Y(oiIIo_Z[0]) ); defparam \oiIIo[0] .INIT=8'h84; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PETMC_TOP_1s_26s */ module CTSE_PECRC_1s_26s_0 ( i1oOo_14, i1oOo_11, i1oOo_0, i1oOo_2, i1oOo_7, i1oOo_8, i1oOo_9, i1oOo_10, OooOo_1, OooOo_14, OooOo_11, OooOo_0, OooOo_2, OooOo_7, OooOo_8, OooOo_9, OooOo_10, O1iO1_0, O1iO1_18, olOIo, lo1Oo, IiiOo, OIo11_0, un6_i1oOo_1_cry_11_S, un6_i1oOo_1_cry_10_S, un6_i1oOo_1_cry_9_S, un6_i1oOo_1_cry_8_S, un6_i1oOo_1_cry_3_S, un6_i1oOo_1_cry_1_S, un6_i1oOo_1_cry_12_S, un6_i1oOo_1_s_15_S, un12_i1oOo, un3_i1oOo, N_547_i, N_545_i_1z, O0IIo_i_m3, OOIIo, II1Oo, oOo11, ii1Oo_1z, lOo11, IOo11, Ol1Oo, iIl0112, PF_IOD_CDR_CCC_C0_0_TX_CLK_G, iOlI1_i ) ; output i1oOo_14 ; output i1oOo_11 ; output i1oOo_0 ; output i1oOo_2 ; output i1oOo_7 ; output i1oOo_8 ; output i1oOo_9 ; output i1oOo_10 ; input OooOo_1 ; input OooOo_14 ; input OooOo_11 ; input OooOo_0 ; input OooOo_2 ; input OooOo_7 ; input OooOo_8 ; input OooOo_9 ; input OooOo_10 ; input O1iO1_0 ; input O1iO1_18 ; output [7:0] olOIo ; input [3:0] lo1Oo ; input [7:0] IiiOo ; output OIo11_0 ; input un6_i1oOo_1_cry_11_S ; input un6_i1oOo_1_cry_10_S ; input un6_i1oOo_1_cry_9_S ; input un6_i1oOo_1_cry_8_S ; input un6_i1oOo_1_cry_3_S ; input un6_i1oOo_1_cry_1_S ; input un6_i1oOo_1_cry_12_S ; input un6_i1oOo_1_s_15_S ; input un12_i1oOo ; input un3_i1oOo ; output N_547_i ; output N_545_i_1z ; input O0IIo_i_m3 ; input OOIIo ; input II1Oo ; input oOo11 ; input ii1Oo_1z ; input lOo11 ; input IOo11 ; input Ol1Oo ; input iIl0112 ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; input iOlI1_i ; wire i1oOo_14 ; wire i1oOo_11 ; wire i1oOo_0 ; wire i1oOo_2 ; wire i1oOo_7 ; wire i1oOo_8 ; wire i1oOo_9 ; wire i1oOo_10 ; wire OooOo_1 ; wire OooOo_14 ; wire OooOo_11 ; wire OooOo_0 ; wire OooOo_2 ; wire OooOo_7 ; wire OooOo_8 ; wire OooOo_9 ; wire OooOo_10 ; wire O1iO1_0 ; wire O1iO1_18 ; wire OIo11_0 ; wire un6_i1oOo_1_cry_11_S ; wire un6_i1oOo_1_cry_10_S ; wire un6_i1oOo_1_cry_9_S ; wire un6_i1oOo_1_cry_8_S ; wire un6_i1oOo_1_cry_3_S ; wire un6_i1oOo_1_cry_1_S ; wire un6_i1oOo_1_cry_12_S ; wire un6_i1oOo_1_s_15_S ; wire un12_i1oOo ; wire un3_i1oOo ; wire N_547_i ; wire N_545_i_1z ; wire O0IIo_i_m3 ; wire OOIIo ; wire II1Oo ; wire oOo11 ; wire ii1Oo_1z ; wire lOo11 ; wire IOo11 ; wire Ol1Oo ; wire iIl0112 ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire iOlI1_i ; wire [31:0] OIo11_Z; wire [31:0] iIo11; wire [17:10] oIo11_0_a3_2_Z; wire [12:12] oIo11_2; wire [27:27] oIo11_0_Z; wire [23:23] iIo11_iv_0_x2_0_Z; wire [20:20] I0IIo_i_a3_0_30_23_Z; wire [20:20] I0IIo_i_a3_0_30_22_Z; wire [20:20] I0IIo_i_a3_0_30_21_Z; wire [20:20] I0IIo_i_a3_0_30_20_Z; wire [20:20] I0IIo_i_a3_0_30_19_Z; wire [20:20] I0IIo_i_a3_0_30_18_Z; wire [20:20] I0IIo_i_a3_0_30_17_Z; wire [20:20] I0IIo_i_a3_0_30_16_Z; wire [28:25] iIo11_iv_0_x2_1_Z; wire [30:30] oIo11_1_Z; wire [26:26] oIo11_2_Z; wire [16:16] iIo11_iv_0_x2_0; wire [7:4] olOIo_0_o4_1_Z; wire [7:4] olOIo_0_o4_0_Z; wire [13:13] oIo11_0_a3_1_Z; wire [12:12] oIo11_0_a3_4_Z; wire [14:14] oIo11_0_a3_3_Z; wire [20:20] I0IIo_i_a3_0_30_29_Z; wire [20:20] I0IIo_i_a3_0_30_28_Z; wire [27:27] oIo11_3_Z; wire [3:0] olOIo_0_1_Z; wire [3:0] olOIo_0_0_Z; wire [13:6] oIo11; wire [9:9] oIo11_Z; wire [2:2] olOIo_0_2_Z; wire [20:20] I0IIo_i_0_tz_Z; wire [3:0] olOIo_0_3_Z; wire VCC ; wire N_278_i ; wire un1_oOo11_1_i_Z ; wire GND ; wire N_270_i ; wire N_271_i ; wire N_276_i ; wire N_275_i ; wire N_277_i ; wire N_273_i ; wire N_274_i ; wire N_272_i ; wire N_568 ; wire N_431 ; wire N_299 ; wire N_644 ; wire N_647 ; wire N_119_i ; wire N_133_i ; wire N_224_i ; wire N_125_i ; wire N_221_i ; wire N_272_i_1 ; wire N_225_i ; wire N_271_i_1 ; wire N_78_0 ; wire N_123_i ; wire N_134_i ; wire N_118_i ; wire N_163_i ; wire N_154_i ; wire N_227_i ; wire N_116_i ; wire N_629 ; wire N_170_i ; wire N_611 ; wire N_613 ; wire N_168_i ; wire N_169_i ; wire N_621 ; wire N_618 ; wire N_223_i ; wire N_617 ; wire N_615 ; wire N_606 ; wire N_608 ; wire N_222_i ; wire N_233_i_i ; wire N_238_i_i ; wire N_237_i ; wire N_267_i_i ; wire N_631_i ; wire N_643 ; wire N_132_i ; wire N_924_i ; wire N_239_i_i ; wire N_175_i ; wire N_174_i ; wire N_297 ; wire N_296 ; wire N_295 ; wire N_294 ; wire N_308 ; wire N_307 ; wire N_176_i ; wire N_167_i ; wire N_289 ; wire N_290 ; wire N_226_i ; wire N_177_i ; wire N_302 ; wire N_301 ; wire N_210 ; wire N_208 ; wire N_209 ; wire N_211 ; // @28:479626 SLE \OIo11[2] ( .Q(OIo11_0), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_278_i), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[1] ( .Q(OIo11_Z[1]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_270_i), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[0] ( .Q(OIo11_Z[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIo11[0]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[17] ( .Q(OIo11_Z[17]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIo11[17]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[16] ( .Q(OIo11_Z[16]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIo11[16]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[15] ( .Q(OIo11_Z[15]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_271_i), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[14] ( .Q(OIo11_Z[14]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIo11[14]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[13] ( .Q(OIo11_Z[13]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIo11[13]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[12] ( .Q(OIo11_Z[12]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIo11[12]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[11] ( .Q(OIo11_Z[11]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_276_i), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[10] ( .Q(OIo11_Z[10]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIo11[10]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[9] ( .Q(OIo11_Z[9]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIo11[9]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[8] ( .Q(OIo11_Z[8]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_275_i), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[7] ( .Q(OIo11_Z[7]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_277_i), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[6] ( .Q(OIo11_Z[6]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIo11[6]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[5] ( .Q(OIo11_Z[5]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_273_i), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[4] ( .Q(OIo11_Z[4]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_274_i), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[3] ( .Q(OIo11_Z[3]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_272_i), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[31] ( .Q(OIo11_Z[31]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIo11[31]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[30] ( .Q(OIo11_Z[30]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIo11[30]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[29] ( .Q(OIo11_Z[29]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIo11[29]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[28] ( .Q(OIo11_Z[28]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIo11[28]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[27] ( .Q(OIo11_Z[27]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIo11[27]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[26] ( .Q(OIo11_Z[26]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIo11[26]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[25] ( .Q(OIo11_Z[25]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIo11[25]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[24] ( .Q(OIo11_Z[24]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIo11[24]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[23] ( .Q(OIo11_Z[23]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIo11[23]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[22] ( .Q(OIo11_Z[22]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIo11[22]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[21] ( .Q(OIo11_Z[21]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIo11[21]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[20] ( .Q(OIo11_Z[20]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIo11[20]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[19] ( .Q(OIo11_Z[19]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIo11[19]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[18] ( .Q(OIo11_Z[18]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIo11[18]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:532654 CFG3 \olOIo_0_a3_4[2] ( .A(IiiOo[2]), .B(N_568), .C(N_431), .Y(N_299) ); defparam \olOIo_0_a3_4[2] .INIT=8'h80; // @28:532654 CFG3 \olOIo_0_a2_0[3] ( .A(iIl0112), .B(Ol1Oo), .C(lo1Oo[2]), .Y(N_644) ); defparam \olOIo_0_a2_0[3] .INIT=8'hE0; // @28:532654 CFG3 \olOIo_0_a2_3[3] ( .A(iIl0112), .B(Ol1Oo), .C(lo1Oo[0]), .Y(N_647) ); defparam \olOIo_0_a2_3[3] .INIT=8'hE0; // @28:479580 CFG3 \iIo11_iv_0_x2_0[19] ( .A(IiiOo[0]), .B(OIo11_Z[31]), .C(IiiOo[4]), .Y(N_119_i) ); defparam \iIo11_iv_0_x2_0[19] .INIT=8'h69; // @28:479092 CFG4 \oIo11_0_a3_2[14] ( .A(OIo11_Z[26]), .B(N_133_i), .C(OIo11_Z[6]), .D(IiiOo[5]), .Y(oIo11_0_a3_2_Z[14]) ); defparam \oIo11_0_a3_2[14] .INIT=16'h9669; // @28:479580 CFG3 \iIo11_iv_0_x2_0[18] ( .A(IiiOo[1]), .B(OIo11_Z[30]), .C(N_224_i), .Y(N_125_i) ); defparam \iIo11_iv_0_x2_0[18] .INIT=8'h69; // @28:479169 CFG4 \oIo11_0_a3_2[12] ( .A(IOo11), .B(N_221_i), .C(IiiOo[1]), .D(OIo11_Z[30]), .Y(oIo11_2[12]) ); defparam \oIo11_0_a3_2[12] .INIT=16'h6C93; // @28:479626 CFG4 \OIo11_RNO[3] ( .A(lOo11), .B(IOo11), .C(N_119_i), .D(N_272_i_1), .Y(N_272_i) ); defparam \OIo11_RNO[3] .INIT=16'hAEEA; // @28:479626 CFG4 \OIo11_RNO_0[3] ( .A(OIo11_Z[26]), .B(IiiOo[5]), .C(N_225_i), .D(OIo11_Z[27]), .Y(N_272_i_1) ); defparam \OIo11_RNO_0[3] .INIT=16'h6996; // @28:479626 CFG4 \OIo11_RNO[15] ( .A(lOo11), .B(IOo11), .C(N_119_i), .D(N_271_i_1), .Y(N_271_i) ); defparam \OIo11_RNO[15] .INIT=16'hEAAE; // @28:479626 CFG4 \OIo11_RNO_0[15] ( .A(OIo11_Z[28]), .B(OIo11_Z[7]), .C(N_78_0), .D(N_123_i), .Y(N_271_i_1) ); defparam \OIo11_RNO_0[15] .INIT=16'h6996; // @28:478779 CFG2 \oIo11_0[27] ( .A(IiiOo[2]), .B(OIo11_Z[19]), .Y(oIo11_0_Z[27]) ); defparam \oIo11_0[27] .INIT=4'h6; // @28:479580 CFG2 \iIo11_iv_i_x2[1] ( .A(OIo11_Z[25]), .B(OIo11_Z[24]), .Y(N_134_i) ); defparam \iIo11_iv_i_x2[1] .INIT=4'h6; // @28:479580 CFG2 \iIo11_iv_0_x2_0[22] ( .A(OIo11_Z[24]), .B(IiiOo[7]), .Y(N_118_i) ); defparam \iIo11_iv_0_x2_0[22] .INIT=4'h6; // @28:479499 CFG2 \oIo11_0_a2_0_x2_1[2] ( .A(IiiOo[5]), .B(IiiOo[6]), .Y(N_163_i) ); defparam \oIo11_0_a2_0_x2_1[2] .INIT=4'h6; // @28:478862 CFG2 \oIo11_0_a2_0_x4[24] ( .A(OIo11_Z[31]), .B(IiiOo[0]), .Y(N_224_i) ); defparam \oIo11_0_a2_0_x4[24] .INIT=4'h9; // @28:479530 CFG2 \oIo11_0_a2_0_x4[1] ( .A(OIo11_Z[25]), .B(IiiOo[6]), .Y(N_225_i) ); defparam \oIo11_0_a2_0_x4[1] .INIT=4'h9; // @28:479401 CFG2 \oIo11_0_a2_i_x2_1[5] ( .A(IiiOo[4]), .B(IiiOo[0]), .Y(N_133_i) ); defparam \oIo11_0_a2_i_x2_1[5] .INIT=4'h6; // @28:479580 CFG2 \iIo11_iv_0_x2_0[20] ( .A(OIo11_Z[28]), .B(IiiOo[3]), .Y(N_154_i) ); defparam \iIo11_iv_0_x2_0[20] .INIT=4'h6; // @28:479334 CFG2 \oIo11_0_a2_0_x4[7] ( .A(OIo11_Z[26]), .B(IiiOo[5]), .Y(N_227_i) ); defparam \oIo11_0_a2_0_x4[7] .INIT=4'h9; // @28:479580 CFG2 \iIo11_iv_0_x2_2[18] ( .A(OIo11_Z[30]), .B(IiiOo[1]), .Y(N_116_i) ); defparam \iIo11_iv_0_x2_2[18] .INIT=4'h6; // @28:479580 CFG2 \iIo11_iv_i_x2_3[5] ( .A(OIo11_Z[27]), .B(IiiOo[3]), .Y(N_123_i) ); defparam \iIo11_iv_i_x2_3[5] .INIT=4'h6; // @28:479169 CFG3 \oIo11_0_a3_2_0[12] ( .A(IiiOo[6]), .B(OIo11_Z[28]), .C(OIo11_Z[4]), .Y(oIo11_0_a3_2_Z[12]) ); defparam \oIo11_0_a3_2_0[12] .INIT=8'h96; // @28:479580 CFG2 \iIo11_iv_0_x2_0[23] ( .A(N_225_i), .B(OIo11_Z[15]), .Y(iIo11_iv_0_x2_0_Z[23]) ); defparam \iIo11_iv_0_x2_0[23] .INIT=4'h6; // @28:535193 CFG4 \I0IIo_i_a3_0_30_23[20] ( .A(OIo11_Z[25]), .B(OIo11_Z[24]), .C(OIo11_Z[27]), .D(OIo11_Z[28]), .Y(I0IIo_i_a3_0_30_23_Z[20]) ); defparam \I0IIo_i_a3_0_30_23[20] .INIT=16'h0008; // @28:535193 CFG4 \I0IIo_i_a3_0_30_22[20] ( .A(OIo11_Z[31]), .B(OIo11_Z[26]), .C(OIo11_Z[29]), .D(OIo11_Z[30]), .Y(I0IIo_i_a3_0_30_22_Z[20]) ); defparam \I0IIo_i_a3_0_30_22[20] .INIT=16'h0800; // @28:535193 CFG4 \I0IIo_i_a3_0_30_21[20] ( .A(OIo11_Z[22]), .B(OIo11_Z[20]), .C(OIo11_Z[16]), .D(OIo11_0), .Y(I0IIo_i_a3_0_30_21_Z[20]) ); defparam \I0IIo_i_a3_0_30_21[20] .INIT=16'h0001; // @28:535193 CFG4 \I0IIo_i_a3_0_30_20[20] ( .A(OIo11_Z[21]), .B(OIo11_Z[17]), .C(OIo11_Z[15]), .D(OIo11_Z[14]), .Y(I0IIo_i_a3_0_30_20_Z[20]) ); defparam \I0IIo_i_a3_0_30_20[20] .INIT=16'h1000; // @28:535193 CFG4 \I0IIo_i_a3_0_30_19[20] ( .A(OIo11_Z[7]), .B(OIo11_Z[3]), .C(OIo11_Z[1]), .D(OIo11_Z[0]), .Y(I0IIo_i_a3_0_30_19_Z[20]) ); defparam \I0IIo_i_a3_0_30_19[20] .INIT=16'h4000; // @28:535193 CFG4 \I0IIo_i_a3_0_30_18[20] ( .A(OIo11_Z[8]), .B(OIo11_Z[6]), .C(OIo11_Z[5]), .D(OIo11_Z[4]), .Y(I0IIo_i_a3_0_30_18_Z[20]) ); defparam \I0IIo_i_a3_0_30_18[20] .INIT=16'h8000; // @28:535193 CFG4 \I0IIo_i_a3_0_30_17[20] ( .A(OIo11_Z[19]), .B(OIo11_Z[12]), .C(OIo11_Z[11]), .D(OIo11_Z[10]), .Y(I0IIo_i_a3_0_30_17_Z[20]) ); defparam \I0IIo_i_a3_0_30_17[20] .INIT=16'h4000; // @28:535193 CFG4 \I0IIo_i_a3_0_30_16[20] ( .A(OIo11_Z[23]), .B(OIo11_Z[18]), .C(OIo11_Z[13]), .D(OIo11_Z[9]), .Y(I0IIo_i_a3_0_30_16_Z[20]) ); defparam \I0IIo_i_a3_0_30_16[20] .INIT=16'h0004; // @28:479580 CFG3 \iIo11_iv_0_x2_1[25] ( .A(IiiOo[4]), .B(OIo11_Z[27]), .C(OIo11_Z[17]), .Y(iIo11_iv_0_x2_1_Z[25]) ); defparam \iIo11_iv_0_x2_1[25] .INIT=8'h96; // @28:478706 CFG3 \oIo11_1[30] ( .A(IiiOo[0]), .B(OIo11_Z[31]), .C(OIo11_Z[22]), .Y(oIo11_1_Z[30]) ); defparam \oIo11_1[30] .INIT=8'h96; // @28:532654 CFG4 \olOIo_0_a2_0[4] ( .A(lo1Oo[2]), .B(lo1Oo[0]), .C(lo1Oo[3]), .D(lo1Oo[1]), .Y(N_431) ); defparam \olOIo_0_a2_0[4] .INIT=16'h0001; // @28:479580 CFG2 \iIo11_iv_i_x2[2] ( .A(N_227_i), .B(N_134_i), .Y(N_629) ); defparam \iIo11_iv_i_x2[2] .INIT=4'h9; // @28:479580 CFG3 \iIo11_iv_i_x2[4] ( .A(OIo11_Z[28]), .B(OIo11_Z[27]), .C(N_227_i), .Y(N_170_i) ); defparam \iIo11_iv_i_x2[4] .INIT=8'h69; // @28:532654 CFG3 \olOIo_0_a2_1[6] ( .A(ii1Oo_1z), .B(OIo11_Z[1]), .C(lo1Oo[0]), .Y(N_611) ); defparam \olOIo_0_a2_1[6] .INIT=8'h90; // @28:532654 CFG3 \olOIo_0_a2_3[6] ( .A(ii1Oo_1z), .B(OIo11_Z[9]), .C(lo1Oo[1]), .Y(N_613) ); defparam \olOIo_0_a2_3[6] .INIT=8'h90; // @28:479580 CFG3 \iIo11_iv_i_x2[11] ( .A(OIo11_Z[27]), .B(OIo11_Z[3]), .C(OIo11_Z[28]), .Y(N_168_i) ); defparam \iIo11_iv_i_x2[11] .INIT=8'h69; // @28:479580 CFG3 \iIo11_iv_i_x2[8] ( .A(OIo11_Z[27]), .B(OIo11_Z[0]), .C(OIo11_Z[28]), .Y(N_169_i) ); defparam \iIo11_iv_i_x2[8] .INIT=8'h69; // @28:479009 CFG3 \oIo11_0_a2[17] ( .A(OIo11_Z[29]), .B(IOo11), .C(IiiOo[2]), .Y(N_78_0) ); defparam \oIo11_0_a2[17] .INIT=8'h6A; // @28:532654 CFG3 \olOIo_0_a2_4[4] ( .A(ii1Oo_1z), .B(OIo11_Z[11]), .C(lo1Oo[1]), .Y(N_621) ); defparam \olOIo_0_a2_4[4] .INIT=8'h90; // @28:532654 CFG3 \olOIo_0_a2_1[4] ( .A(ii1Oo_1z), .B(lo1Oo[3]), .C(OIo11_Z[27]), .Y(N_618) ); defparam \olOIo_0_a2_1[4] .INIT=8'h84; // @28:479169 CFG3 \oIo11_0_a2_0_x4[12] ( .A(OIo11_Z[30]), .B(IOo11), .C(IiiOo[1]), .Y(N_223_i) ); defparam \oIo11_0_a2_0_x4[12] .INIT=8'h95; // @28:479241 CFG3 \oIo11_0_a2_1_x4[10] ( .A(OIo11_Z[24]), .B(IOo11), .C(IiiOo[7]), .Y(N_221_i) ); defparam \oIo11_0_a2_1_x4[10] .INIT=8'h95; // @28:532654 CFG2 \olOIo_0_o2[3] ( .A(Ol1Oo), .B(iIl0112), .Y(N_568) ); defparam \olOIo_0_o2[3] .INIT=4'hE; // @28:532654 CFG3 \olOIo_0_a2_3[5] ( .A(ii1Oo_1z), .B(OIo11_Z[10]), .C(lo1Oo[1]), .Y(N_617) ); defparam \olOIo_0_a2_3[5] .INIT=8'h90; // @28:532654 CFG3 \olOIo_0_a2_1[5] ( .A(ii1Oo_1z), .B(OIo11_0), .C(lo1Oo[0]), .Y(N_615) ); defparam \olOIo_0_a2_1[5] .INIT=8'h90; // @28:532654 CFG3 \olOIo_0_a2_0[7] ( .A(ii1Oo_1z), .B(OIo11_Z[24]), .C(lo1Oo[3]), .Y(N_606) ); defparam \olOIo_0_a2_0[7] .INIT=8'h90; // @28:532654 CFG3 \olOIo_0_a2_2[7] ( .A(ii1Oo_1z), .B(OIo11_Z[16]), .C(lo1Oo[2]), .Y(N_608) ); defparam \olOIo_0_a2_2[7] .INIT=8'h90; // @28:479365 CFG3 \oIo11_0_a2_0_x4[6] ( .A(OIo11_Z[28]), .B(IOo11), .C(IiiOo[3]), .Y(N_222_i) ); defparam \oIo11_0_a2_0_x4[6] .INIT=8'h95; // @28:479241 CFG4 \oIo11_0_a3_2[10] ( .A(OIo11_0), .B(IiiOo[4]), .C(OIo11_Z[27]), .D(N_221_i), .Y(oIo11_0_a3_2_Z[10]) ); defparam \oIo11_0_a3_2[10] .INIT=16'h9669; // @28:478810 CFG4 \oIo11_2[26] ( .A(OIo11_Z[18]), .B(IiiOo[4]), .C(OIo11_Z[27]), .D(N_222_i), .Y(oIo11_2_Z[26]) ); defparam \oIo11_2[26] .INIT=16'h6996; // @28:479580 CFG3 \iIo11_iv_0_x2_0_0[16] ( .A(N_118_i), .B(OIo11_Z[8]), .C(IiiOo[3]), .Y(iIo11_iv_0_x2_0[16]) ); defparam \iIo11_iv_0_x2_0_0[16] .INIT=8'h96; // @28:532654 CFG4 \olOIo_0_o4_1[6] ( .A(lo1Oo[2]), .B(OIo11_Z[17]), .C(N_613), .D(ii1Oo_1z), .Y(olOIo_0_o4_1_Z[6]) ); defparam \olOIo_0_o4_1[6] .INIT=16'hF8F2; // @28:532654 CFG4 \olOIo_0_o4_0[6] ( .A(lo1Oo[3]), .B(OIo11_Z[25]), .C(N_611), .D(ii1Oo_1z), .Y(olOIo_0_o4_0_Z[6]) ); defparam \olOIo_0_o4_0[6] .INIT=16'hF8F2; // @28:532654 CFG4 \olOIo_0_o4_1[7] ( .A(lo1Oo[0]), .B(OIo11_Z[0]), .C(N_606), .D(ii1Oo_1z), .Y(olOIo_0_o4_1_Z[7]) ); defparam \olOIo_0_o4_1[7] .INIT=16'hF8F2; // @28:532654 CFG4 \olOIo_0_o4_0[7] ( .A(lo1Oo[1]), .B(OIo11_Z[8]), .C(N_608), .D(ii1Oo_1z), .Y(olOIo_0_o4_0_Z[7]) ); defparam \olOIo_0_o4_0[7] .INIT=16'hF8F2; // @28:532654 CFG4 \olOIo_0_o4_1[4] ( .A(lo1Oo[0]), .B(OIo11_Z[3]), .C(N_618), .D(ii1Oo_1z), .Y(olOIo_0_o4_1_Z[4]) ); defparam \olOIo_0_o4_1[4] .INIT=16'hF8F2; // @28:532654 CFG4 \olOIo_0_o4_0[4] ( .A(lo1Oo[2]), .B(OIo11_Z[19]), .C(N_621), .D(ii1Oo_1z), .Y(olOIo_0_o4_0_Z[4]) ); defparam \olOIo_0_o4_0[4] .INIT=16'hF8F2; // @28:532654 CFG4 \olOIo_0_o4_1[5] ( .A(lo1Oo[2]), .B(OIo11_Z[18]), .C(N_617), .D(ii1Oo_1z), .Y(olOIo_0_o4_1_Z[5]) ); defparam \olOIo_0_o4_1[5] .INIT=16'hF8F2; // @28:532654 CFG4 \olOIo_0_o4_0[5] ( .A(lo1Oo[3]), .B(OIo11_Z[26]), .C(N_615), .D(ii1Oo_1z), .Y(olOIo_0_o4_0_Z[5]) ); defparam \olOIo_0_o4_0[5] .INIT=16'hF8F2; // @28:479128 CFG4 \oIo11_0_a3_1[13] ( .A(OIo11_Z[31]), .B(OIo11_Z[5]), .C(N_133_i), .D(OIo11_Z[27]), .Y(oIo11_0_a3_1_Z[13]) ); defparam \oIo11_0_a3_1[13] .INIT=16'h6996; // @28:479009 CFG4 \oIo11_0_a3_2[17] ( .A(OIo11_Z[9]), .B(IiiOo[6]), .C(OIo11_Z[25]), .D(N_223_i), .Y(oIo11_0_a3_2_Z[17]) ); defparam \oIo11_0_a3_2[17] .INIT=16'h9669; // @28:479580 CFG3 \iIo11_iv_0_x2_1[28] ( .A(N_227_i), .B(OIo11_Z[20]), .C(N_116_i), .Y(iIo11_iv_0_x2_1_Z[28]) ); defparam \iIo11_iv_0_x2_1[28] .INIT=8'h69; // @28:479580 CFG3 \iIo11_iv_0_x2[18] ( .A(OIo11_Z[10]), .B(N_227_i), .C(N_125_i), .Y(N_233_i_i) ); defparam \iIo11_iv_0_x2[18] .INIT=8'h69; // @28:479580 CFG3 \iIo11_iv_0_x2[19] ( .A(OIo11_Z[27]), .B(N_119_i), .C(OIo11_Z[11]), .Y(N_238_i_i) ); defparam \iIo11_iv_0_x2[19] .INIT=8'h69; // @28:479580 CFG4 \iIo11_iv_0_x2[24] ( .A(N_225_i), .B(N_227_i), .C(OIo11_Z[16]), .D(N_224_i), .Y(N_237_i) ); defparam \iIo11_iv_0_x2[24] .INIT=16'h6996; // @28:479499 CFG4 \oIo11_0_a2_0_x2[2] ( .A(OIo11_Z[26]), .B(OIo11_Z[25]), .C(IOo11), .D(N_163_i), .Y(N_267_i_i) ); defparam \oIo11_0_a2_0_x2[2] .INIT=16'h6999; // @28:479580 CFG3 \iIo11_iv_i_x2_0[1] ( .A(IiiOo[6]), .B(N_125_i), .C(IiiOo[7]), .Y(N_631_i) ); defparam \iIo11_iv_i_x2_0[1] .INIT=8'h69; // @28:532654 CFG2 \olOIo_0_a2[3] ( .A(N_431), .B(N_568), .Y(N_643) ); defparam \olOIo_0_a2[3] .INIT=4'h8; // @28:479580 CFG2 \iIo11_iv_i_x2[5] ( .A(N_78_0), .B(OIo11_Z[28]), .Y(N_132_i) ); defparam \iIo11_iv_i_x2[5] .INIT=4'h6; // @28:479626 CFG3 un1_oOo11_1_i ( .A(oOo11), .B(lOo11), .C(IOo11), .Y(un1_oOo11_1_i_Z) ); defparam un1_oOo11_1_i.INIT=8'hFD; // @28:479169 CFG4 \oIo11_0_a3_4[12] ( .A(IiiOo[3]), .B(OIo11_Z[25]), .C(oIo11_2[12]), .D(oIo11_0_a3_2_Z[12]), .Y(oIo11_0_a3_4_Z[12]) ); defparam \oIo11_0_a3_4[12] .INIT=16'h6996; // @28:479092 CFG4 \oIo11_0_a3_3[14] ( .A(OIo11_Z[27]), .B(OIo11_Z[31]), .C(N_154_i), .D(oIo11_0_a3_2_Z[14]), .Y(oIo11_0_a3_3_Z[14]) ); defparam \oIo11_0_a3_3[14] .INIT=16'h9669; // @28:535193 CFG4 \I0IIo_i_a3_0_30_29[20] ( .A(I0IIo_i_a3_0_30_20_Z[20]), .B(I0IIo_i_a3_0_30_22_Z[20]), .C(I0IIo_i_a3_0_30_21_Z[20]), .D(I0IIo_i_a3_0_30_23_Z[20]), .Y(I0IIo_i_a3_0_30_29_Z[20]) ); defparam \I0IIo_i_a3_0_30_29[20] .INIT=16'h8000; // @28:535193 CFG4 \I0IIo_i_a3_0_30_28[20] ( .A(I0IIo_i_a3_0_30_19_Z[20]), .B(I0IIo_i_a3_0_30_18_Z[20]), .C(I0IIo_i_a3_0_30_17_Z[20]), .D(I0IIo_i_a3_0_30_16_Z[20]), .Y(I0IIo_i_a3_0_30_28_Z[20]) ); defparam \I0IIo_i_a3_0_30_28[20] .INIT=16'h8000; // @28:478779 CFG4 \oIo11_3[27] ( .A(N_224_i), .B(N_225_i), .C(OIo11_Z[29]), .D(oIo11_0_Z[27]), .Y(oIo11_3_Z[27]) ); defparam \oIo11_3[27] .INIT=16'h6996; // @28:475474 CFG4 \OIo11_RNO_0[5] ( .A(N_225_i), .B(N_132_i), .C(OIo11_Z[24]), .D(N_123_i), .Y(N_924_i) ); defparam \OIo11_RNO_0[5] .INIT=16'h9669; // @28:479580 CFG4 \iIo11_iv_0_x2[29] ( .A(OIo11_Z[21]), .B(OIo11_Z[27]), .C(N_116_i), .D(N_119_i), .Y(N_239_i_i) ); defparam \iIo11_iv_0_x2[29] .INIT=16'h9669; // @28:479580 CFG4 \iIo11_iv_i_x2_0[4] ( .A(IiiOo[3]), .B(IiiOo[4]), .C(N_118_i), .D(N_116_i), .Y(N_175_i) ); defparam \iIo11_iv_i_x2_0[4] .INIT=16'h6996; // @28:479580 CFG3 \iIo11_iv_i_x2_0[7] ( .A(IiiOo[5]), .B(N_118_i), .C(N_119_i), .Y(N_174_i) ); defparam \iIo11_iv_i_x2_0[7] .INIT=8'h69; // @28:479580 CFG4 \iIo11_iv_0[22] ( .A(lOo11), .B(OIo11_Z[14]), .C(N_118_i), .D(IOo11), .Y(iIo11[22]) ); defparam \iIo11_iv_0[22] .INIT=16'hBEAA; // @28:532654 CFG3 \olOIo_0_a3_2[2] ( .A(ii1Oo_1z), .B(N_644), .C(OIo11_Z[21]), .Y(N_297) ); defparam \olOIo_0_a3_2[2] .INIT=8'h84; // @28:532654 CFG4 \olOIo_0_a3_1[2] ( .A(lo1Oo[1]), .B(OIo11_Z[13]), .C(N_568), .D(ii1Oo_1z), .Y(N_296) ); defparam \olOIo_0_a3_1[2] .INIT=16'h8020; // @28:532654 CFG3 \olOIo_0_a3_0[2] ( .A(ii1Oo_1z), .B(N_647), .C(OIo11_Z[5]), .Y(N_295) ); defparam \olOIo_0_a3_0[2] .INIT=8'h84; // @28:532654 CFG4 \olOIo_0_a3[2] ( .A(lo1Oo[3]), .B(OIo11_Z[29]), .C(N_568), .D(ii1Oo_1z), .Y(N_294) ); defparam \olOIo_0_a3[2] .INIT=16'h8020; // @28:532654 CFG4 \olOIo_0_a3_1[0] ( .A(lo1Oo[3]), .B(OIo11_Z[31]), .C(N_568), .D(ii1Oo_1z), .Y(N_308) ); defparam \olOIo_0_a3_1[0] .INIT=16'h8020; // @28:532654 CFG4 \olOIo_0_a3_0[0] ( .A(lo1Oo[1]), .B(OIo11_Z[15]), .C(N_568), .D(ii1Oo_1z), .Y(N_307) ); defparam \olOIo_0_a3_0[0] .INIT=16'h8020; // @28:479580 CFG4 \iIo11_iv_i_x2_0[8] ( .A(IiiOo[3]), .B(IiiOo[4]), .C(N_225_i), .D(N_118_i), .Y(N_176_i) ); defparam \iIo11_iv_i_x2_0[8] .INIT=16'h9669; // @28:479580 CFG3 \iIo11_iv_i_x2[7] ( .A(OIo11_Z[27]), .B(N_78_0), .C(OIo11_Z[26]), .Y(N_167_i) ); defparam \iIo11_iv_i_x2[7] .INIT=8'h69; // @28:532654 CFG4 \olOIo_0_a3_0[3] ( .A(lo1Oo[3]), .B(OIo11_Z[28]), .C(ii1Oo_1z), .D(N_568), .Y(N_289) ); defparam \olOIo_0_a3_0[3] .INIT=16'h8200; // @28:532654 CFG4 \olOIo_0_a3_1[3] ( .A(lo1Oo[1]), .B(OIo11_Z[12]), .C(N_568), .D(ii1Oo_1z), .Y(N_290) ); defparam \olOIo_0_a3_1[3] .INIT=16'h8020; // @28:479580 CFG4 \iIo11_iv_0[20] ( .A(lOo11), .B(OIo11_Z[12]), .C(N_154_i), .D(IOo11), .Y(iIo11[20]) ); defparam \iIo11_iv_0[20] .INIT=16'hBEAA; // @28:479241 CFG3 \oIo11_0_a2_0_i_x4[10] ( .A(N_78_0), .B(IiiOo[5]), .C(OIo11_Z[26]), .Y(N_226_i) ); defparam \oIo11_0_a2_0_i_x4[10] .INIT=8'h96; // @28:479580 CFG3 \iIo11_iv_i_x2_2[5] ( .A(IiiOo[7]), .B(N_116_i), .C(N_119_i), .Y(N_177_i) ); defparam \iIo11_iv_i_x2_2[5] .INIT=8'h69; // @28:532654 CFG4 \olOIo_0_a3_1[1] ( .A(lo1Oo[3]), .B(OIo11_Z[30]), .C(N_568), .D(ii1Oo_1z), .Y(N_302) ); defparam \olOIo_0_a3_1[1] .INIT=16'h8020; // @28:532654 CFG4 \olOIo_0_a3_0[1] ( .A(lo1Oo[1]), .B(OIo11_Z[14]), .C(N_568), .D(ii1Oo_1z), .Y(N_301) ); defparam \olOIo_0_a3_0[1] .INIT=16'h8020; // @28:532654 CFG4 \olOIo_0_1[0] ( .A(ii1Oo_1z), .B(OIo11_Z[23]), .C(N_308), .D(N_644), .Y(olOIo_0_1_Z[0]) ); defparam \olOIo_0_1[0] .INIT=16'hF9F0; // @28:532654 CFG4 \olOIo_0_0[0] ( .A(ii1Oo_1z), .B(OIo11_Z[7]), .C(N_307), .D(N_647), .Y(olOIo_0_0_Z[0]) ); defparam \olOIo_0_0[0] .INIT=16'hF9F0; // @28:532654 CFG4 \olOIo_0_1[3] ( .A(ii1Oo_1z), .B(OIo11_Z[4]), .C(N_289), .D(N_647), .Y(olOIo_0_1_Z[3]) ); defparam \olOIo_0_1[3] .INIT=16'hF9F0; // @28:532654 CFG4 \olOIo_0_0[3] ( .A(ii1Oo_1z), .B(OIo11_Z[20]), .C(N_290), .D(N_644), .Y(olOIo_0_0_Z[3]) ); defparam \olOIo_0_0[3] .INIT=16'hF9F0; // @28:532654 CFG4 \olOIo_0_1[1] ( .A(ii1Oo_1z), .B(OIo11_Z[22]), .C(N_302), .D(N_644), .Y(olOIo_0_1_Z[1]) ); defparam \olOIo_0_1[1] .INIT=16'hF9F0; // @28:532654 CFG4 \olOIo_0_0[1] ( .A(ii1Oo_1z), .B(OIo11_Z[6]), .C(N_301), .D(N_647), .Y(olOIo_0_0_Z[1]) ); defparam \olOIo_0_0[1] .INIT=16'hF9F0; // @28:532654 CFG4 \olOIo_0_o4[6] ( .A(olOIo_0_o4_0_Z[6]), .B(N_431), .C(IiiOo[6]), .D(olOIo_0_o4_1_Z[6]), .Y(N_210) ); defparam \olOIo_0_o4[6] .INIT=16'hFFEA; // @28:479365 CFG4 \oIo11_0_a3[6] ( .A(N_222_i), .B(N_267_i_i), .C(N_78_0), .D(N_125_i), .Y(oIo11[6]) ); defparam \oIo11_0_a3[6] .INIT=16'h6996; // @28:532654 CFG4 \olOIo_0_o4[4] ( .A(olOIo_0_o4_0_Z[4]), .B(N_431), .C(IiiOo[4]), .D(olOIo_0_o4_1_Z[4]), .Y(N_208) ); defparam \olOIo_0_o4[4] .INIT=16'hFFEA; // @28:479272 CFG4 \oIo11[9] ( .A(OIo11_Z[1]), .B(N_222_i), .C(N_267_i_i), .D(N_78_0), .Y(oIo11_Z[9]) ); defparam \oIo11[9] .INIT=16'h6996; // @28:532654 CFG4 \olOIo_0_o4[5] ( .A(olOIo_0_o4_0_Z[5]), .B(N_431), .C(IiiOo[5]), .D(olOIo_0_o4_1_Z[5]), .Y(N_209) ); defparam \olOIo_0_o4[5] .INIT=16'hFFEA; // @28:532654 CFG4 \olOIo_0_o4[7] ( .A(olOIo_0_o4_0_Z[7]), .B(N_431), .C(IiiOo[7]), .D(olOIo_0_o4_1_Z[7]), .Y(N_211) ); defparam \olOIo_0_o4[7] .INIT=16'hFFEA; // @28:479128 CFG4 \oIo11_0_a3[13] ( .A(N_223_i), .B(oIo11_0_a3_1_Z[13]), .C(N_78_0), .D(N_267_i_i), .Y(oIo11[13]) ); defparam \oIo11_0_a3[13] .INIT=16'h6996; // @28:479580 CFG3 \iIo11_iv_0[19] ( .A(IOo11), .B(N_238_i_i), .C(lOo11), .Y(iIo11[19]) ); defparam \iIo11_iv_0[19] .INIT=8'hF8; // @28:479580 CFG3 \iIo11_iv_0[18] ( .A(IOo11), .B(N_233_i_i), .C(lOo11), .Y(iIo11[18]) ); defparam \iIo11_iv_0[18] .INIT=8'hF8; // @28:479580 CFG3 \iIo11_iv_0[0] ( .A(IOo11), .B(oIo11_2[12]), .C(lOo11), .Y(iIo11[0]) ); defparam \iIo11_iv_0[0] .INIT=8'hF8; // @28:479580 CFG3 \iIo11_iv_0[24] ( .A(IOo11), .B(N_237_i), .C(lOo11), .Y(iIo11[24]) ); defparam \iIo11_iv_0[24] .INIT=8'hF2; // @28:479580 CFG4 \iIo11_iv_0[31] ( .A(lOo11), .B(OIo11_Z[23]), .C(N_78_0), .D(IOo11), .Y(iIo11[31]) ); defparam \iIo11_iv_0[31] .INIT=16'hBEAA; // @28:479580 CFG4 \iIo11_iv_0[21] ( .A(lOo11), .B(OIo11_Z[13]), .C(N_78_0), .D(IOo11), .Y(iIo11[21]) ); defparam \iIo11_iv_0[21] .INIT=16'hBEAA; // @28:479580 CFG4 \iIo11_iv_0[30] ( .A(IOo11), .B(N_154_i), .C(oIo11_1_Z[30]), .D(lOo11), .Y(iIo11[30]) ); defparam \iIo11_iv_0[30] .INIT=16'hFF28; // @28:479580 CFG4 \iIo11_iv_0[25] ( .A(IOo11), .B(lOo11), .C(N_227_i), .D(iIo11_iv_0_x2_1_Z[25]), .Y(iIo11[25]) ); defparam \iIo11_iv_0[25] .INIT=16'hECCE; // @28:532654 CFG4 \olOIo_0_2[2] ( .A(N_297), .B(N_295), .C(N_296), .D(N_294), .Y(olOIo_0_2_Z[2]) ); defparam \olOIo_0_2[2] .INIT=16'hFFFE; // @28:535193 CFG3 \I0IIo_i_0_tz[20] ( .A(I0IIo_i_a3_0_30_29_Z[20]), .B(II1Oo), .C(I0IIo_i_a3_0_30_28_Z[20]), .Y(I0IIo_i_0_tz_Z[20]) ); defparam \I0IIo_i_0_tz[20] .INIT=8'hEC; // @28:479580 CFG4 \iIo11_iv_0[23] ( .A(IOo11), .B(lOo11), .C(oIo11_2[12]), .D(iIo11_iv_0_x2_0_Z[23]), .Y(iIo11[23]) ); defparam \iIo11_iv_0[23] .INIT=16'hECCE; // @28:479580 CFG4 \iIo11_iv_0[16] ( .A(IOo11), .B(lOo11), .C(N_132_i), .D(iIo11_iv_0_x2_0[16]), .Y(iIo11[16]) ); defparam \iIo11_iv_0[16] .INIT=16'hCEEC; // @28:532654 CFG2 \olOIo_0_a3[6] ( .A(N_210), .B(iIl0112), .Y(olOIo[6]) ); defparam \olOIo_0_a3[6] .INIT=4'h8; // @28:532654 CFG2 \olOIo_0_a3[4] ( .A(N_208), .B(iIl0112), .Y(olOIo[4]) ); defparam \olOIo_0_a3[4] .INIT=4'h8; // @28:479580 CFG4 \iIo11_iv_0[26] ( .A(IOo11), .B(lOo11), .C(oIo11_2_Z[26]), .D(oIo11_2[12]), .Y(iIo11[26]) ); defparam \iIo11_iv_0[26] .INIT=16'hECCE; // @28:532654 CFG2 \olOIo_0_a3[7] ( .A(N_211), .B(iIl0112), .Y(olOIo[7]) ); defparam \olOIo_0_a3[7] .INIT=4'h8; // @28:479580 CFG4 \iIo11_iv_0[17] ( .A(lOo11), .B(IOo11), .C(N_78_0), .D(oIo11_0_a3_2_Z[17]), .Y(iIo11[17]) ); defparam \iIo11_iv_0[17] .INIT=16'hAEEA; // @28:479580 CFG4 \iIo11_iv_0[28] ( .A(IOo11), .B(lOo11), .C(N_78_0), .D(iIo11_iv_0_x2_1_Z[28]), .Y(iIo11[28]) ); defparam \iIo11_iv_0[28] .INIT=16'hCEEC; // @28:479580 CFG3 \iIo11_iv_0[29] ( .A(IOo11), .B(N_239_i_i), .C(lOo11), .Y(iIo11[29]) ); defparam \iIo11_iv_0[29] .INIT=8'hF8; // @28:532654 CFG2 \olOIo_0_a3[5] ( .A(N_209), .B(iIl0112), .Y(olOIo[5]) ); defparam \olOIo_0_a3[5] .INIT=4'h8; // @28:535323 CFG4 N_545_i ( .A(OOIIo), .B(O0IIo_i_m3), .C(O1iO1_0), .D(OooOo_1), .Y(N_545_i_1z) ); defparam N_545_i.INIT=16'hB830; // @28:532654 CFG4 \olOIo_0_3[0] ( .A(olOIo_0_0_Z[0]), .B(N_643), .C(IiiOo[0]), .D(olOIo_0_1_Z[0]), .Y(olOIo_0_3_Z[0]) ); defparam \olOIo_0_3[0] .INIT=16'hFFEA; // @28:532654 CFG4 \olOIo_0_3[3] ( .A(olOIo_0_0_Z[3]), .B(IiiOo[3]), .C(N_643), .D(olOIo_0_1_Z[3]), .Y(olOIo_0_3_Z[3]) ); defparam \olOIo_0_3[3] .INIT=16'hFFEA; // @28:532654 CFG4 \olOIo_0_3[1] ( .A(olOIo_0_0_Z[1]), .B(N_643), .C(IiiOo[1]), .D(olOIo_0_1_Z[1]), .Y(olOIo_0_3_Z[1]) ); defparam \olOIo_0_3[1] .INIT=16'hFFEA; // @28:479580 CFG3 \iIo11_iv_0[6] ( .A(IOo11), .B(oIo11[6]), .C(lOo11), .Y(iIo11[6]) ); defparam \iIo11_iv_0[6] .INIT=8'hF8; // @28:479580 CFG4 \iIo11_iv_0[27] ( .A(IOo11), .B(lOo11), .C(N_222_i), .D(oIo11_3_Z[27]), .Y(iIo11[27]) ); defparam \iIo11_iv_0[27] .INIT=16'hECCE; // @28:479580 CFG3 \iIo11_iv_0[9] ( .A(IOo11), .B(oIo11_Z[9]), .C(lOo11), .Y(iIo11[9]) ); defparam \iIo11_iv_0[9] .INIT=8'hF8; // @28:479580 CFG3 \iIo11_iv_0[13] ( .A(IOo11), .B(oIo11[13]), .C(lOo11), .Y(iIo11[13]) ); defparam \iIo11_iv_0[13] .INIT=8'hF8; // @28:479580 CFG4 \iIo11_iv_0[14] ( .A(lOo11), .B(IOo11), .C(N_223_i), .D(oIo11_0_a3_3_Z[14]), .Y(iIo11[14]) ); defparam \iIo11_iv_0[14] .INIT=16'hEAAE; // @28:479580 CFG4 \iIo11_iv_0[10] ( .A(IOo11), .B(lOo11), .C(N_226_i), .D(oIo11_0_a3_2_Z[10]), .Y(iIo11[10]) ); defparam \iIo11_iv_0[10] .INIT=16'hCEEC; // @28:479580 CFG4 \iIo11_iv_0[12] ( .A(lOo11), .B(IOo11), .C(N_226_i), .D(oIo11_0_a3_4_Z[12]), .Y(iIo11[12]) ); defparam \iIo11_iv_0[12] .INIT=16'hAEEA; // @28:479626 CFG4 \OIo11_RNO[2] ( .A(IOo11), .B(lOo11), .C(N_631_i), .D(N_629), .Y(N_278_i) ); defparam \OIo11_RNO[2] .INIT=16'hECCE; // @28:479626 CFG4 \OIo11_RNO[1] ( .A(IOo11), .B(N_631_i), .C(N_134_i), .D(lOo11), .Y(N_270_i) ); defparam \OIo11_RNO[1] .INIT=16'hFF82; // @28:532654 CFG4 \olOIo_0[2] ( .A(N_568), .B(N_210), .C(N_299), .D(olOIo_0_2_Z[2]), .Y(olOIo[2]) ); defparam \olOIo_0[2] .INIT=16'hFFF4; // @28:532654 CFG3 \olOIo_0[0] ( .A(N_568), .B(N_208), .C(olOIo_0_3_Z[0]), .Y(olOIo[0]) ); defparam \olOIo_0[0] .INIT=8'hF4; // @28:532654 CFG3 \olOIo_0[3] ( .A(N_568), .B(N_211), .C(olOIo_0_3_Z[3]), .Y(olOIo[3]) ); defparam \olOIo_0[3] .INIT=8'hF4; // @28:532654 CFG3 \olOIo_0[1] ( .A(N_568), .B(N_209), .C(olOIo_0_3_Z[1]), .Y(olOIo[1]) ); defparam \olOIo_0[1] .INIT=8'hF4; // @28:479626 CFG4 \OIo11_RNO[11] ( .A(IOo11), .B(lOo11), .C(N_176_i), .D(N_168_i), .Y(N_276_i) ); defparam \OIo11_RNO[11] .INIT=16'hECCE; // @28:479626 CFG4 \OIo11_RNO[8] ( .A(IOo11), .B(lOo11), .C(N_176_i), .D(N_169_i), .Y(N_275_i) ); defparam \OIo11_RNO[8] .INIT=16'hECCE; // @28:479626 CFG4 \OIo11_RNO[7] ( .A(lOo11), .B(IOo11), .C(N_174_i), .D(N_167_i), .Y(N_277_i) ); defparam \OIo11_RNO[7] .INIT=16'hEAAE; // @28:479626 CFG4 \OIo11_RNO[5] ( .A(IOo11), .B(lOo11), .C(N_924_i), .D(N_177_i), .Y(N_273_i) ); defparam \OIo11_RNO[5] .INIT=16'hCEEC; // @28:479626 CFG4 \OIo11_RNO[4] ( .A(IOo11), .B(lOo11), .C(N_175_i), .D(N_170_i), .Y(N_274_i) ); defparam \OIo11_RNO[4] .INIT=16'hCEEC; // @28:535323 CFG4 \I0IIo_i_0_tz_RNIQSNOO[20] ( .A(I0IIo_i_0_tz_Z[20]), .B(O0IIo_i_m3), .C(O1iO1_18), .D(OOIIo), .Y(N_547_i) ); defparam \I0IIo_i_0_tz_RNIQSNOO[20] .INIT=16'h7430; // @28:528807 CFG4 \i1oOo_0[15] ( .A(un3_i1oOo), .B(un12_i1oOo), .C(OooOo_14), .D(un6_i1oOo_1_s_15_S), .Y(i1oOo_14) ); defparam \i1oOo_0[15] .INIT=16'hEAC0; // @28:528807 CFG4 \i1oOo_0[12] ( .A(un3_i1oOo), .B(un12_i1oOo), .C(OooOo_11), .D(un6_i1oOo_1_cry_12_S), .Y(i1oOo_11) ); defparam \i1oOo_0[12] .INIT=16'hEAC0; // @28:528807 CFG4 \i1oOo_0[1] ( .A(un3_i1oOo), .B(un12_i1oOo), .C(OooOo_0), .D(un6_i1oOo_1_cry_1_S), .Y(i1oOo_0) ); defparam \i1oOo_0[1] .INIT=16'hEAC0; // @28:528807 CFG4 \i1oOo_0[3] ( .A(un3_i1oOo), .B(un12_i1oOo), .C(OooOo_2), .D(un6_i1oOo_1_cry_3_S), .Y(i1oOo_2) ); defparam \i1oOo_0[3] .INIT=16'hEAC0; // @28:528807 CFG4 \i1oOo_0[8] ( .A(un3_i1oOo), .B(un12_i1oOo), .C(OooOo_7), .D(un6_i1oOo_1_cry_8_S), .Y(i1oOo_7) ); defparam \i1oOo_0[8] .INIT=16'hEAC0; // @28:528807 CFG4 \i1oOo_0[9] ( .A(un3_i1oOo), .B(un12_i1oOo), .C(OooOo_8), .D(un6_i1oOo_1_cry_9_S), .Y(i1oOo_8) ); defparam \i1oOo_0[9] .INIT=16'hEAC0; // @28:528807 CFG4 \i1oOo_0[10] ( .A(un3_i1oOo), .B(un12_i1oOo), .C(OooOo_9), .D(un6_i1oOo_1_cry_10_S), .Y(i1oOo_9) ); defparam \i1oOo_0[10] .INIT=16'hEAC0; // @28:528807 CFG4 \i1oOo_0[11] ( .A(un3_i1oOo), .B(un12_i1oOo), .C(OooOo_10), .D(un6_i1oOo_1_cry_11_S), .Y(i1oOo_10) ); defparam \i1oOo_0[11] .INIT=16'hEAC0; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PECRC_1s_26s_0 */ module CTSE_PETFN_TOP_26s_0s_0_1s ( IIl11, oIl11, I0l11, lIl11, i0011, iIl11_1z, l0l11, Oll11_1z, ooIO1_0, OOlI1, O1iO1, Oi0i0, oll11, OIl11_0, lll11, lioO1, l1l11, liI11, iioO1, oioO1, o1011, lOl11, oOl11, IOI11, o0l11, l1011, I1011, iIl0112, Ill11, ilo11, iiOI1, ill11_1z, l1I11_1z, li0i0, Ii0i0, oo011, io011, i1_i_12, lo011, Io011_1z, i0iO1_1z, O1l11, lO1i0, IO1i0, O1011_1z, PF_IOD_CDR_CCC_C0_0_TX_CLK_G, iOlI1_i, Oo011_1z ) ; input [6:2] IIl11 ; input [6:2] oIl11 ; input [3:0] I0l11 ; input [6:2] lIl11 ; input [7:0] i0011 ; input [5:0] iIl11_1z ; input [3:0] l0l11 ; input [3:0] Oll11_1z ; input ooIO1_0 ; input [15:0] OOlI1 ; output [51:0] O1iO1 ; output [7:0] Oi0i0 ; input oll11 ; input OIl11_0 ; input lll11 ; input lioO1 ; input l1l11 ; input liI11 ; input iioO1 ; input oioO1 ; input o1011 ; input lOl11 ; input oOl11 ; input IOI11 ; input o0l11 ; input l1011 ; input I1011 ; input iIl0112 ; input Ill11 ; input ilo11 ; input iiOI1 ; input ill11_1z ; output l1I11_1z ; output li0i0 ; output Ii0i0 ; output oo011 ; output io011 ; output i1_i_12 ; output lo011 ; output Io011_1z ; output i0iO1_1z ; input O1l11 ; input lO1i0 ; input IO1i0 ; input O1011_1z ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; input iOlI1_i ; output Oo011_1z ; wire ooIO1_0 ; wire oll11 ; wire OIl11_0 ; wire lll11 ; wire lioO1 ; wire l1l11 ; wire liI11 ; wire iioO1 ; wire oioO1 ; wire o1011 ; wire lOl11 ; wire oOl11 ; wire IOI11 ; wire o0l11 ; wire l1011 ; wire I1011 ; wire iIl0112 ; wire Ill11 ; wire ilo11 ; wire iiOI1 ; wire ill11_1z ; wire l1I11_1z ; wire li0i0 ; wire Ii0i0 ; wire oo011 ; wire io011 ; wire i1_i_12 ; wire lo011 ; wire Io011_1z ; wire i0iO1_1z ; wire O1l11 ; wire lO1i0 ; wire IO1i0 ; wire O1011_1z ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire iOlI1_i ; wire Oo011_1z ; wire [0:0] un1_iO1Oo_Z; wire [0:0] un1_IO1Oo_0_Z; wire [0:0] un1_I0OIo_Z; wire [0:0] un2_O0li1_Z; wire [0:0] IOo11_Z; wire [0:0] I11Oo_Z; wire [0:0] oOOIo_Z; wire [0:0] oOo11_Z; wire [0:0] lolOo_Z; wire [0:0] o11Oo_Z; wire [0:0] IolOo_Z; wire [0:0] OilOo_Z; wire [0:0] l11Oo_Z; wire [0:0] iolOo_Z; wire [0:0] llIIo_Z; wire [0:0] IlIIo_Z; wire [0:0] OlIIo_Z; wire [0:0] O11Oo_Z; wire [0:0] IOOIo_Z; wire [7:0] OiiOo_1_Z; wire [7:0] ooiOo_0_Z; wire [7:0] lOoO1_Z; wire [7:0] IiiOo; wire [0:0] i01Oo_Z; wire [0:0] iiiOo_Z; wire [0:0] lOo11_Z; wire [3:0] l01Oo_1_Z; wire [3:0] Io1Oo_0_Z; wire [3:0] Oo1Oo_Z; wire [0:0] I01Oo_Z; wire [0:0] iI1Oo_Z; wire [3:0] lo1Oo; wire [3:1] oOiOo_Z; wire [2:0] lOiOo_Z; wire [15:0] lioOo_Z; wire [15:6] IioOo; wire [11:0] IioOo_Z; wire [15:0] OooOo_Z; wire [15:1] i1oOo; wire [14:0] i1oOo_Z; wire [9:0] iIiOo_Z; wire [7:0] oIiOo; wire [8:0] O1oi1_Z; wire [8:7] i0oi1; wire [6:0] i0oi1_Z; wire [9:0] l0iOo_Z; wire [9:6] I0iOo_Z; wire [5:0] I0iOo; wire [9:5] oIiOo_Z; wire [6:0] O0oOo_Z; wire [6:0] iloOo; wire [7:0] olOIo; wire [11:1] IIiOo_Z; wire [11:1] OIiOo_Z; wire [3:0] O1oOo_Z; wire [51:0] I0IIo_Z; wire [3:3] i11Oo; wire [5:1] un15_OoiOo_Z; wire [7:0] OoiOo_Z; wire [15:0] ll0i1_Z; wire [4:0] l0oOo_Z; wire [4:4] l0oOo_RNO_Z; wire [3:0] I0oOo; wire [15:7] Il0i1_Z; wire [7:0] un3_oooOo_0_data_tmp; wire [6:6] i0oi1_RNO_Z; wire [1:1] un1_O1oOo_Z; wire [8:1] lliOo; wire [7:7] oIiOo_1; wire [0:0] O0oOo_RNO_1_Z; wire [2:2] OIo11; wire [7:7] un1_OoiOo_1_Z; wire [3:3] lOiOo_i_o2_0_Z; wire [0:0] un1_Oo1Oo; wire [3:1] un1_oIiOo_0; wire [8:5] un1_oIiOo_0_Z; wire [3:1] O1oOo_0_Z; wire [9:9] un1_oIiOo_1_Z; wire [4:4] un1_oIiOo_1; wire Oo011_i ; wire oO0Oo_Z ; wire VCC ; wire lO0Oo_Z ; wire GND ; wire o0iOo_Z ; wire ii1Oo_Z ; wire oi1Oo_Z ; wire iO0Oo_Z ; wire oOIi1_Z ; wire OIIi1_Z ; wire OIIi1_2_Z ; wire OI0Oo_Z ; wire l0Ii1_Z ; wire IlIi1_Z ; wire N_669_3 ; wire IloOo_Z ; wire IloOo_2_Z ; wire II1Oo_Z ; wire lO1Oo_Z ; wire ioOIo_Z ; wire ooOIo_Z ; wire iOoOo_Z ; wire oOoOo ; wire O0IIo_i_m3_Z ; wire OOIIo_Z ; wire iiOIo_Z ; wire IIoOo_Z ; wire OIoOo_Z ; wire Oo0Oo_Z ; wire o10Oo_Z ; wire l1OIo_Z ; wire OiOIo_Z ; wire O0Ii1_Z ; wire iIIi1_Z ; wire OIl11_Z ; wire Il0Oo_Z ; wire i0iOo_Z ; wire oI0Oo_Z ; wire N_637_i ; wire ll0Oo_Z ; wire iI0Oo_Z ; wire o1OIo_Z ; wire l0OIo ; wire O1iOo ; wire o1iOo_Z ; wire oI1Oo_Z ; wire N_10_0_i ; wire i10Oo_Z ; wire l10Oo ; wire o1iO1_Z ; wire lI0i1_Z ; wire iIoOo_Z ; wire oIoOo ; wire lOoOo_Z ; wire IOoOo_Z ; wire I0Ii1_Z ; wire OlIi1_Z ; wire ol0Oo_Z ; wire Ol0Oo_Z ; wire iO1Oo_Z ; wire oO1Oo_Z ; wire li1Oo_Z ; wire Ii1Oo_Z ; wire i1iO1_Z ; wire oI0i1_Z ; wire N_746_i ; wire iIIIo_Z ; wire IOoO1_Z ; wire OliO1_Z ; wire oioOo_Z ; wire l00Oo_Z ; wire I00Oo ; wire O00Oo_Z ; wire il0Oo_Z ; wire OO1Oo_Z ; wire ii0Oo_Z ; wire lIIIo_Z ; wire I00i1_Z ; wire N_162_mux_i ; wire IiOIo_Z ; wire IiOIo_RNO_Z ; wire I1OIo_Z ; wire OloOo_Z ; wire oO0i1 ; wire oOo11 ; wire N_691_i ; wire i1OIo_Z ; wire o0OIo ; wire l1iOo_Z ; wire I1iOo_Z ; wire O0OIo_Z ; wire olIIo ; wire IOo11 ; wire lOo11 ; wire Ol1Oo ; wire CO0_2 ; wire IO0Oo_Z ; wire IO0Oo_3_Z ; wire un1_IO0Oo7_Z ; wire i1_i_8 ; wire i1_i_9 ; wire i1_i_10 ; wire i1_i_11 ; wire N_673_i ; wire ANB3 ; wire ANB2 ; wire ANB1 ; wire CO0 ; wire N_545_i ; wire i1_i_4 ; wire N_693 ; wire N_547_i ; wire i1_i_7 ; wire i1_i_13 ; wire i25_mux_i ; wire i26_mux_0_i ; wire i23_mux_0_i ; wire i24_mux_i ; wire i34_mux_0_i ; wire i29_mux_i ; wire i30_mux_0_i ; wire un42_i0oi1_cry_0_Z ; wire un42_i0oi1_cry_0_S ; wire un42_i0oi1_cry_0_Y ; wire un42_i0oi1_cry_1_Z ; wire un42_i0oi1_cry_1_S ; wire un42_i0oi1_cry_1_Y ; wire un42_i0oi1_cry_2_Z ; wire un42_i0oi1_cry_2_S ; wire un42_i0oi1_cry_2_Y ; wire un42_i0oi1_cry_3_Z ; wire un42_i0oi1_cry_3_S ; wire un42_i0oi1_cry_3_Y ; wire un42_i0oi1_cry_4_Z ; wire un42_i0oi1_cry_4_S ; wire un42_i0oi1_cry_4_Y ; wire un42_i0oi1_cry_5_Z ; wire un42_i0oi1_cry_5_S ; wire un42_i0oi1_cry_5_Y ; wire un42_i0oi1_cry_6_Z ; wire un42_i0oi1_cry_6_S ; wire un42_i0oi1_cry_6_Y ; wire un42_i0oi1_s_8_FCO ; wire un42_i0oi1_s_8_S ; wire un42_i0oi1_s_8_Y ; wire un42_i0oi1_cry_7_Z ; wire un42_i0oi1_cry_7_S ; wire un42_i0oi1_cry_7_Y ; wire un60_iloOo_cry_0_Z ; wire un60_iloOo_cry_0_S ; wire un60_iloOo_cry_0_Y ; wire un60_iloOo_cry_1_Z ; wire un60_iloOo_cry_1_S ; wire un60_iloOo_cry_1_Y ; wire un60_iloOo_cry_2_Z ; wire un60_iloOo_cry_2_S ; wire un60_iloOo_cry_2_Y ; wire un60_iloOo_cry_3_Z ; wire un60_iloOo_cry_3_S ; wire un60_iloOo_cry_3_Y ; wire un60_iloOo_cry_4_Z ; wire un60_iloOo_cry_4_S ; wire un60_iloOo_cry_4_Y ; wire un60_iloOo_s_6_FCO ; wire un60_iloOo_s_6_S ; wire un60_iloOo_s_6_Y ; wire un60_iloOo_cry_5_Z ; wire un60_iloOo_cry_5_S ; wire un60_iloOo_cry_5_Y ; wire un7_il0Oo_cry_0_Z ; wire un7_il0Oo_cry_0_S ; wire un7_il0Oo_cry_0_Y ; wire un7_il0Oo_cry_1_Z ; wire un7_il0Oo_cry_1_S ; wire un7_il0Oo_cry_1_Y ; wire un7_il0Oo_cry_2_Z ; wire un7_il0Oo_cry_2_S ; wire un7_il0Oo_cry_2_Y ; wire un7_il0Oo_cry_3_Z ; wire un7_il0Oo_cry_3_S ; wire un7_il0Oo_cry_3_Y ; wire un7_il0Oo_cry_4_Z ; wire un7_il0Oo_cry_4_S ; wire un7_il0Oo_cry_4_Y ; wire un7_il0Oo_cry_5_Z ; wire un7_il0Oo_cry_5_S ; wire un7_il0Oo_cry_5_Y ; wire un7_il0Oo_cry_6_Z ; wire un7_il0Oo_cry_6_S ; wire un7_il0Oo_cry_6_Y ; wire O0li1_RNO_6_S ; wire O0li1_RNO_6_Y ; wire O0li1_RNO_5_S ; wire O0li1_RNO_5_Y ; wire O0li1_RNO_4_S ; wire O0li1_RNO_4_Y ; wire O0li1_RNO_3_S ; wire O0li1_RNO_3_Y ; wire O0li1_RNO_2_S ; wire O0li1_RNO_2_Y ; wire O0li1_RNO_1_S ; wire O0li1_RNO_1_Y ; wire O0li1_RNO_0_S ; wire O0li1_RNO_0_Y ; wire O0li1_RNO_S ; wire O0li1_RNO_Y ; wire un6_IioOo_s_1_4175_FCO ; wire un6_IioOo_s_1_4175_S ; wire un6_IioOo_s_1_4175_Y ; wire un6_IioOo_cry_1_Z ; wire un6_IioOo_cry_1_S ; wire un6_IioOo_cry_1_Y ; wire un6_IioOo_cry_2_Z ; wire un6_IioOo_cry_2_S ; wire un6_IioOo_cry_2_Y ; wire un6_IioOo_cry_3_Z ; wire un6_IioOo_cry_3_S ; wire un6_IioOo_cry_3_Y ; wire un6_IioOo_cry_4_Z ; wire un6_IioOo_cry_4_S ; wire un6_IioOo_cry_4_Y ; wire un6_IioOo_cry_5_Z ; wire un6_IioOo_cry_5_S ; wire un6_IioOo_cry_5_Y ; wire un6_IioOo_cry_6_Z ; wire un6_IioOo_cry_6_S ; wire un6_IioOo_cry_6_Y ; wire un6_IioOo_cry_7_Z ; wire un6_IioOo_cry_7_S ; wire un6_IioOo_cry_7_Y ; wire un6_IioOo_cry_8_Z ; wire un6_IioOo_cry_8_S ; wire un6_IioOo_cry_8_Y ; wire un6_IioOo_cry_9_Z ; wire un6_IioOo_cry_9_S ; wire un6_IioOo_cry_9_Y ; wire un6_IioOo_cry_10_Z ; wire un6_IioOo_cry_10_S ; wire un6_IioOo_cry_10_Y ; wire un6_IioOo_cry_11_Z ; wire un6_IioOo_cry_11_S ; wire un6_IioOo_cry_11_Y ; wire un6_IioOo_cry_12_Z ; wire un6_IioOo_cry_12_S ; wire un6_IioOo_cry_12_Y ; wire un6_IioOo_cry_13_Z ; wire un6_IioOo_cry_13_S ; wire un6_IioOo_cry_13_Y ; wire un6_IioOo_s_15_FCO ; wire un6_IioOo_s_15_S ; wire un6_IioOo_s_15_Y ; wire un6_IioOo_cry_14_Z ; wire un6_IioOo_cry_14_S ; wire un6_IioOo_cry_14_Y ; wire un6_i1oOo_1_s_1_4176_FCO ; wire un6_i1oOo_1_s_1_4176_S ; wire un6_i1oOo_1_s_1_4176_Y ; wire un6_i1oOo_1_cry_1_Z ; wire un6_i1oOo_1_cry_1_S ; wire un6_i1oOo_1_cry_1_Y ; wire un6_i1oOo_1_cry_2_Z ; wire un6_i1oOo_1_cry_2_S ; wire un6_i1oOo_1_cry_2_Y ; wire un6_i1oOo_1_cry_3_Z ; wire un6_i1oOo_1_cry_3_S ; wire un6_i1oOo_1_cry_3_Y ; wire un6_i1oOo_1_cry_4_Z ; wire un6_i1oOo_1_cry_4_S ; wire un6_i1oOo_1_cry_4_Y ; wire un6_i1oOo_1_cry_5_Z ; wire un6_i1oOo_1_cry_5_S ; wire un6_i1oOo_1_cry_5_Y ; wire un6_i1oOo_1_cry_6_Z ; wire un6_i1oOo_1_cry_6_S ; wire un6_i1oOo_1_cry_6_Y ; wire un6_i1oOo_1_cry_7_Z ; wire un6_i1oOo_1_cry_7_S ; wire un6_i1oOo_1_cry_7_Y ; wire un6_i1oOo_1_cry_8_Z ; wire un6_i1oOo_1_cry_8_S ; wire un6_i1oOo_1_cry_8_Y ; wire un6_i1oOo_1_cry_9_Z ; wire un6_i1oOo_1_cry_9_S ; wire un6_i1oOo_1_cry_9_Y ; wire un6_i1oOo_1_cry_10_Z ; wire un6_i1oOo_1_cry_10_S ; wire un6_i1oOo_1_cry_10_Y ; wire un6_i1oOo_1_cry_11_Z ; wire un6_i1oOo_1_cry_11_S ; wire un6_i1oOo_1_cry_11_Y ; wire un6_i1oOo_1_cry_12_Z ; wire un6_i1oOo_1_cry_12_S ; wire un6_i1oOo_1_cry_12_Y ; wire un6_i1oOo_1_cry_13_Z ; wire un6_i1oOo_1_cry_13_S ; wire un6_i1oOo_1_cry_13_Y ; wire un6_i1oOo_1_s_15_FCO ; wire un6_i1oOo_1_s_15_S ; wire un6_i1oOo_1_s_15_Y ; wire un6_i1oOo_1_cry_14_Z ; wire un6_i1oOo_1_cry_14_S ; wire un6_i1oOo_1_cry_14_Y ; wire un4_I0iOo_1_s_1_4177_FCO ; wire un4_I0iOo_1_s_1_4177_S ; wire un4_I0iOo_1_s_1_4177_Y ; wire un4_I0iOo_1_cry_1_Z ; wire un4_I0iOo_1_cry_1_S ; wire un4_I0iOo_1_cry_1_Y ; wire un4_I0iOo_1_cry_2_Z ; wire un4_I0iOo_1_cry_2_S ; wire un4_I0iOo_1_cry_2_Y ; wire un4_I0iOo_1_cry_3_Z ; wire un4_I0iOo_1_cry_3_S ; wire un4_I0iOo_1_cry_3_Y ; wire un4_I0iOo_1_cry_4_Z ; wire un4_I0iOo_1_cry_4_S ; wire un4_I0iOo_1_cry_4_Y ; wire un4_I0iOo_1_cry_5_Z ; wire un4_I0iOo_1_cry_5_S ; wire un4_I0iOo_1_cry_5_Y ; wire un4_I0iOo_1_cry_6_Z ; wire un4_I0iOo_1_cry_6_S ; wire un4_I0iOo_1_cry_6_Y ; wire un4_I0iOo_1_cry_7_Z ; wire un4_I0iOo_1_cry_7_S ; wire un4_I0iOo_1_cry_7_Y ; wire un4_I0iOo_1_s_9_FCO ; wire un4_I0iOo_1_s_9_S ; wire un4_I0iOo_1_s_9_Y ; wire un4_I0iOo_1_cry_8_Z ; wire un4_I0iOo_1_cry_8_S ; wire un4_I0iOo_1_cry_8_Y ; wire m69_1_0_co1 ; wire m69_1_0_wmux_0_S ; wire N_847 ; wire N_841 ; wire N_842 ; wire m69_1_0_y0 ; wire m69_1_0_co0 ; wire m69_1_0_wmux_S ; wire N_844 ; wire N_845 ; wire m60_0_1_0_co1 ; wire m60_0_1_0_wmux_0_S ; wire N_839 ; wire N_833 ; wire N_834_i_Z ; wire m60_0_1_0_y0 ; wire m60_0_1_0_co0 ; wire m60_0_1_0_wmux_S ; wire N_836 ; wire N_837 ; wire m51_1_0_co1 ; wire m51_1_0_wmux_0_S ; wire N_831 ; wire N_822_i_Z ; wire N_826_i_Z ; wire m51_1_0_y0 ; wire m51_1_0_co0 ; wire m51_1_0_wmux_S ; wire N_828 ; wire N_829 ; wire IiI11_i_o2_5_Z ; wire IiI11_i_o2_4_Z ; wire lIoOo_Z ; wire I0OIo_Z ; wire N_863 ; wire il0Oo_1_Z ; wire il0Oo_4_Z ; wire un28_il0Oo_Z ; wire IliOo_NE_Z ; wire oO1Oo_1_Z ; wire oO1Oo_0_Z ; wire Oi1Oo_Z ; wire un6_ii0Oo ; wire un4_o1oOo_1 ; wire lIiOo_Z ; wire CO1_2 ; wire Oi1Oo_1_0_tz_Z ; wire Oi1Oo_1_0_Z ; wire Oi1Oo_1_Z ; wire un3_OlIi1_Z ; wire N_730_4 ; wire un2_o1oOo_7_Z ; wire un2_o1oOo_1_Z ; wire N_97_i ; wire un2_o1oOo_3_Z ; wire un2_o1oOo_Z ; wire m49_2 ; wire m86_e_1 ; wire iOli1_10_Z ; wire N_802 ; wire m76_1_1 ; wire N_17_0 ; wire N_13_0 ; wire N_853 ; wire N_820 ; wire N_15_0 ; wire iI0i1 ; wire Ol0i1_N_7_mux ; wire N_9_0_1 ; wire un20_oI0i1_4_0_Z ; wire un20_oI0i1_3_0_Z ; wire un20_oI0i1_7_0_Z ; wire un19_oI0i1_Z ; wire un12_o1oOo_Z ; wire un4_o1oOo_0_Z ; wire un4_o1oOo_Z ; wire oI0i1_1459_0 ; wire un14_oO1Oo_0_Z ; wire Ol0i1_m2_e_0_0_Z ; wire un15_il0Oo_4_0_3_Z ; wire un2_i0iOo_0_Z ; wire iiOIo_1_Z ; wire m22_0_2 ; wire un20_oI0i1_3_Z ; wire CO1 ; wire un19_OIiOo_Z ; wire un13_oI0i1_1_Z ; wire IlIi1_1_Z ; wire un1_oioOo_1 ; wire IliOo_0 ; wire un10_oioOo_1_Z ; wire IO0Oo7_Z ; wire o0oOo_Z ; wire un20_il0Oo_Z ; wire II0Oo_2_Z ; wire un1_OIoOo_1_Z ; wire N_665_1 ; wire o0OIo_0_a3_0_1_Z ; wire m49_3 ; wire m44_0_3 ; wire m44_0_2 ; wire ioIi1_0_Z ; wire un2_Ol0i1_5_Z ; wire un2_Ol0i1_3_Z ; wire un6_oioOo_2_Z ; wire un6_oioOo_1_Z ; wire un6_ii0Oolto15_5_Z ; wire un6_ii0Oolto15_4_Z ; wire m41_0 ; wire O0li1_1_Z ; wire m22_0_1_0 ; wire Ol0i1_m2_e_5_Z ; wire Ol0i1_m2_e_4_Z ; wire un2_OioOo_2_Z ; wire m34_0_2 ; wire un2_o1oOo_5_Z ; wire m32_7 ; wire un20_oI0i1_2_0_Z ; wire I00Oo_0_a2_1_Z ; wire m79_2 ; wire IliOo_NE_4_Z ; wire IliOo_NE_3_Z ; wire IliOo_NE_2_Z ; wire IliOo_NE_1_Z ; wire m9_0 ; wire un6_i0oi1_6_Z ; wire un6_i0oi1_5_Z ; wire un6_I00Oo_4_Z ; wire un15_il0Oo_4_0_4_Z ; wire O0iOo_5_Z ; wire IOIIo_0_a3_0_0 ; wire OliOo_6_Z ; wire OliOo_5_Z ; wire m53_e_0_5 ; wire m53_e_0_4 ; wire iOiOo_NE_1_Z ; wire iOiOo_NE_0_Z ; wire un16_OIiOo_6_Z ; wire un16_OIiOo_5_Z ; wire un22_il0Oo_0_a2_1_Z ; wire un1_OIoOo_1_0_Z ; wire m78_e_11 ; wire m78_e_10 ; wire m78_e_9 ; wire m78_e_8 ; wire un2_Ol0Oo_1_Z ; wire N_355 ; wire un8_il0Oo_Z ; wire un3_iI0Oo_Z ; wire un2_OioOo_11_Z ; wire un3_oO1Oo ; wire N_360 ; wire un35_iloOo_c3 ; wire N_160_i ; wire ANC2 ; wire N_375 ; wire N_1925 ; wire N_430 ; wire un13_i0oi1_Z ; wire un3_Ol0Oo_Z ; wire N_27_0 ; wire un6_ii0Oolt5 ; wire m49_5 ; wire il0Oo_0_Z ; wire un16_oI0i1_1_Z ; wire ioIi1_1_Z ; wire oI0i1_1459_2 ; wire un14_oO1Oo_5_Z ; wire un2_Ol0i1_4_Z ; wire un6_oioOo_3_Z ; wire un2_lIIIo_0_o3_1_Z ; wire Ol0i1_m2_e_3_Z ; wire m30_0_2 ; wire IliOo_NE_5_Z ; wire O0iOo_7_Z ; wire o10Oo_3_Z ; wire un2_OioOo_1_0 ; wire N_735 ; wire un17_oioOo_Z ; wire un6_I00Oo_Z ; wire un1_iI0i1_2_0 ; wire un1_ii0Oo_2_Z ; wire N_4973_tz ; wire un8_iloOo_c3_Z ; wire N_435 ; wire N_370 ; wire CO2 ; wire N_824 ; wire N_698 ; wire un11_oIoOolt6 ; wire un9_o1oOo_Z ; wire un1_I1iOo_1_Z ; wire un2_lIIIo_0_0_Z ; wire un14_oO1Oo_6_Z ; wire un1_IOoOo_0_Z ; wire un6_ii0Oolto15_7_Z ; wire m41_3 ; wire O1iOo_0_0_Z ; wire m32_4 ; wire un4_OioOo_2_Z ; wire OliOo_Z ; wire N_640 ; wire O0iOo_Z ; wire un6_i0oi1_Z ; wire N_793 ; wire un17_il0Oo_Z ; wire O0li1_Z ; wire un2_OioOo_Z ; wire un16_OIiOo_Z ; wire i0iOo_RNO_Z ; wire N_5306_tz_tz_tz ; wire N_742 ; wire un1_iIIi1_Z ; wire N_669 ; wire N_11_0 ; wire IOiOo_0_a2_0_1_Z ; wire l0OIo_0_a3_1_Z ; wire N_19_0 ; wire il0Oo_2_Z ; wire un16_oI0i1_3_Z ; wire un29_il0Oo_1_Z ; wire un11_oioOo_Z ; wire N_143_mux ; wire N_105_mux ; wire un3_IOiOo_Z ; wire N_696 ; wire N_36_0 ; wire N_826_2 ; wire l1iOo_1_Z ; wire il0Oo_3_Z ; wire oI0i1_1459_4 ; wire un16_oI0i1_Z ; wire un6_oioOo_Z ; wire un1_IOoOo_Z ; wire ioIi1_Z ; wire i22_mux ; wire Ol0i1_m2_e_Z ; wire N_723 ; wire N_814 ; wire N_16_0 ; wire un2_OlIi1_Z ; wire N_854 ; wire N_809 ; wire un1_I1iOo_Z ; wire oI0i1_RNO_Z ; wire IOiOo ; wire un3_IioOo_Z ; wire un12_IioOo_Z ; wire N_815 ; wire N_21_0 ; wire N_805 ; wire un1_oI0i1_Z ; wire un3_i1oOo_Z ; wire un12_i1oOo_Z ; wire N_155_mux ; wire N_817_1 ; wire N_807_1 ; wire N_817 ; wire N_807 ; wire N_7435 ; wire N_7434 ; wire N_7433 ; wire N_7432 ; wire N_1729 ; wire N_1728 ; wire N_1727 ; wire N_1726 ; wire N_1725 ; wire N_1724 ; wire N_1723 ; wire N_1722 ; CFG1 l1I11_RNO ( .A(Oo011_1z), .Y(Oo011_i) ); defparam l1I11_RNO.INIT=2'h1; // @28:526074 SLE oO0Oo ( .Q(oO0Oo_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lO0Oo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:530494 SLE o0iOo ( .Q(o0iOo_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O1011_1z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:527860 SLE ii1Oo ( .Q(ii1Oo_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oi1Oo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:526212 SLE iO0Oo ( .Q(iO0Oo_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IO1i0), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:526145 SLE oOIi1 ( .Q(oOIi1_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lO1i0), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:526042 SLE lO0Oo ( .Q(lO0Oo_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O1l11), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:526177 SLE OIIi1 ( .Q(OIIi1_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OIIi1_2_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:526244 SLE OI0Oo ( .Q(OI0Oo_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iO0Oo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:526943 SLE l0Ii1 ( .Q(l0Ii1_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IlIi1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:530996 SLE O1OOo ( .Q(Oo011_1z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_669_3), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528294 SLE IloOo ( .Q(IloOo_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IloOo_2_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:527366 SLE II1Oo ( .Q(II1Oo_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un1_iO1Oo_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:527219 SLE lO1Oo ( .Q(lO1Oo_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un1_IO1Oo_0_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:533812 SLE ioOIo ( .Q(ioOIo_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ooOIo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528020 SLE iOoOo ( .Q(iOoOo_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oOoOo), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:534861 SLE i0iO1 ( .Q(i0iO1_1z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0IIo_i_m3_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:533902 SLE OOIIo ( .Q(OOIIo_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iiOIo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528076 SLE IIoOo ( .Q(IIoOo_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OIoOo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:527090 SLE Oo0Oo ( .Q(Oo0Oo_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o10Oo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:533588 SLE l1OIo ( .Q(l1OIo_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un1_I0OIo_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:533848 SLE OiOIo ( .Q(OiOIo_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ioOIo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:526816 SLE O0Ii1 ( .Q(O0Ii1_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIIi1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:526493 SLE OIl11 ( .Q(OIl11_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il0Oo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:530591 SLE IIiO1 ( .Q(Io011_1z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0iOo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:526308 SLE oI0Oo ( .Q(oI0Oo_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_637_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:526365 SLE ll0Oo ( .Q(ll0Oo_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iI0Oo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:533367 SLE o1OIo ( .Q(o1OIo_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l0OIo), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:530706 SLE lIiO1 ( .Q(lo011), .ADn(GND), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O1iOo), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:530627 SLE o1iOo ( .Q(o1iOo_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Io011_1z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:527436 SLE oI1Oo ( .Q(oI1Oo_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_10_0_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:527009 SLE i10Oo ( .Q(i10Oo_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l10Oo), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:533959 SLE o1iO1 ( .Q(o1iO1_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lI0i1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528222 SLE iIoOo ( .Q(iIoOo_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oIoOo), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:527969 SLE lOoOo ( .Q(lOoOo_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOoOo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:526891 SLE I0Ii1 ( .Q(I0Ii1_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OlIi1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:526433 SLE ol0Oo ( .Q(ol0Oo_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Ol0Oo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:527317 SLE iO1Oo ( .Q(iO1Oo_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oO1Oo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:527860 SLE li1Oo ( .Q(li1Oo_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Ii1Oo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:534101 SLE i1iO1 ( .Q(i1iO1_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oI0i1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:533721 SLE o1I11 ( .Q(i1_i_12), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_746_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:534739 SLE iIIIo ( .Q(iIIIo_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOoO1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:530947 SLE OliO1 ( .Q(OliO1_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oioOo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:526743 SLE l00Oo ( .Q(l00Oo_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I00Oo), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:526650 SLE O00Oo ( .Q(O00Oo_Z), .ADn(GND), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il0Oo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:527169 SLE OO1Oo ( .Q(OO1Oo_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ii0Oo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:534698 SLE IOoO1 ( .Q(IOoO1_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lIIIo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:534397 SLE I00i1 ( .Q(I00i1_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_162_mux_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:533757 SLE IiOIo ( .Q(IiOIo_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IiOIo_RNO_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:533489 SLE I1OIo ( .Q(I1OIo_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un2_O0li1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528258 SLE OloOo ( .Q(OloOo_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIoOo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531994 SLE \IOo11[0] ( .Q(IOo11_Z[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oO0i1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:532116 SLE \iOOIo[0] ( .Q(oOo11), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I11Oo_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:532116 SLE \I11Oo[0] ( .Q(I11Oo_Z[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oOOIo_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:532116 SLE \oOOIo[0] ( .Q(oOOIo_Z[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oOo11_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:532116 SLE \oOo11[0] ( .Q(oOo11_Z[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_691_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:533421 SLE i1OIo ( .Q(i1OIo_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o0OIo), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:530911 SLE oIiO1 ( .Q(io011), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l1iOo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:530850 SLE iIiO1 ( .Q(oo011), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I1iOo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:527860 SLE oi1Oo ( .Q(oi1Oo_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(li1Oo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:532532 SLE \ilIO1[0] ( .Q(Ii0i0), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lolOo_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:532532 SLE \lolOo[0] ( .Q(lolOo_Z[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o11Oo_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:532532 SLE \o11Oo[0] ( .Q(o11Oo_Z[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IolOo_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:532532 SLE \IolOo[0] ( .Q(IolOo_Z[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Oo011_1z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:533233 SLE \O0IO1[0] ( .Q(li0i0), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OilOo_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:533233 SLE \OilOo[0] ( .Q(OilOo_Z[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l11Oo_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:533233 SLE \l11Oo[0] ( .Q(l11Oo_Z[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iolOo_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:533233 SLE \iolOo[0] ( .Q(iolOo_Z[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0OIo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:534775 SLE \olIIo[0] ( .Q(olIIo), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(llIIo_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:534775 SLE \llIIo[0] ( .Q(llIIo_Z[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IlIIo_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:534775 SLE \IlIIo[0] ( .Q(IlIIo_Z[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OlIIo_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:534775 SLE \OlIIo[0] ( .Q(OlIIo_Z[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIIIo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531994 SLE \lOOIo[0] ( .Q(IOo11), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O11Oo_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531994 SLE \O11Oo[0] ( .Q(O11Oo_Z[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOOIo_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531994 SLE \IOOIo[0] ( .Q(IOOIo_Z[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOo11_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531068 SLE \OiiOo_1[3] ( .Q(OiiOo_1_Z[3]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ooiOo_0_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531068 SLE \ooiOo_0[3] ( .Q(ooiOo_0_Z[3]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lOoO1_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531068 SLE \IiiOo_2[2] ( .Q(IiiOo[2]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OiiOo_1_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531068 SLE \OiiOo_1[2] ( .Q(OiiOo_1_Z[2]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ooiOo_0_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531068 SLE \ooiOo_0[2] ( .Q(ooiOo_0_Z[2]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lOoO1_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531068 SLE \IiiOo_2[1] ( .Q(IiiOo[1]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OiiOo_1_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531068 SLE \OiiOo_1[1] ( .Q(OiiOo_1_Z[1]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ooiOo_0_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531068 SLE \ooiOo_0[1] ( .Q(ooiOo_0_Z[1]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lOoO1_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531068 SLE \IiiOo_2[0] ( .Q(IiiOo[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OiiOo_1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531068 SLE \OiiOo_1[0] ( .Q(OiiOo_1_Z[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ooiOo_0_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531068 SLE \ooiOo_0[0] ( .Q(ooiOo_0_Z[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lOoO1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531857 SLE \OOOIo[0] ( .Q(lOo11), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i01Oo_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531857 SLE \i01Oo[0] ( .Q(i01Oo_Z[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iiiOo_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531857 SLE \iiiOo[0] ( .Q(iiiOo_Z[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lOo11_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531857 SLE \lOo11[0] ( .Q(lOo11_Z[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0Ii1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:527609 SLE \l01Oo_1[0] ( .Q(l01Oo_1_Z[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Io1Oo_0_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:527609 SLE \Io1Oo_0[0] ( .Q(Io1Oo_0_Z[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Oo1Oo_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531068 SLE \IiiOo_2[7] ( .Q(IiiOo[7]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OiiOo_1_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531068 SLE \OiiOo_1[7] ( .Q(OiiOo_1_Z[7]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ooiOo_0_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531068 SLE \ooiOo_0[7] ( .Q(ooiOo_0_Z[7]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lOoO1_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531068 SLE \IiiOo_2[6] ( .Q(IiiOo[6]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OiiOo_1_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531068 SLE \OiiOo_1[6] ( .Q(OiiOo_1_Z[6]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ooiOo_0_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531068 SLE \ooiOo_0[6] ( .Q(ooiOo_0_Z[6]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lOoO1_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531068 SLE \IiiOo_2[5] ( .Q(IiiOo[5]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OiiOo_1_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531068 SLE \OiiOo_1[5] ( .Q(OiiOo_1_Z[5]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ooiOo_0_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531068 SLE \ooiOo_0[5] ( .Q(ooiOo_0_Z[5]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lOoO1_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531068 SLE \IiiOo_2[4] ( .Q(IiiOo[4]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OiiOo_1_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531068 SLE \OiiOo_1[4] ( .Q(OiiOo_1_Z[4]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ooiOo_0_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531068 SLE \ooiOo_0[4] ( .Q(ooiOo_0_Z[4]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lOoO1_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531068 SLE \IiiOo_2[3] ( .Q(IiiOo[3]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OiiOo_1_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:527436 SLE \Ol1Oo[0] ( .Q(Ol1Oo), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I01Oo_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:527436 SLE \I01Oo[0] ( .Q(I01Oo_Z[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iI1Oo_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:527436 SLE \iI1Oo[0] ( .Q(iI1Oo_Z[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oI1Oo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:527609 SLE \lo1Oo_2[3] ( .Q(lo1Oo[3]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l01Oo_1_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:527609 SLE \l01Oo_1[3] ( .Q(l01Oo_1_Z[3]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Io1Oo_0_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:527609 SLE \Io1Oo_0[3] ( .Q(Io1Oo_0_Z[3]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Oo1Oo_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:527609 SLE \lo1Oo_2[2] ( .Q(lo1Oo[2]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l01Oo_1_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:527609 SLE \l01Oo_1[2] ( .Q(l01Oo_1_Z[2]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Io1Oo_0_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:527609 SLE \Io1Oo_0[2] ( .Q(Io1Oo_0_Z[2]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Oo1Oo_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:527609 SLE \lo1Oo_2[1] ( .Q(lo1Oo[1]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l01Oo_1_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:527609 SLE \l01Oo_1[1] ( .Q(l01Oo_1_Z[1]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Io1Oo_0_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:527609 SLE \Io1Oo_0[1] ( .Q(Io1Oo_0_Z[1]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Oo1Oo_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:527609 SLE \lo1Oo_2[0] ( .Q(lo1Oo[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l01Oo_1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529449 SLE \oOiOo[2] ( .Q(oOiOo_Z[2]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lOiOo_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529449 SLE \oOiOo[1] ( .Q(oOiOo_Z[1]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lOiOo_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529449 SLE \oOiOo[0] ( .Q(CO0_2), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lOiOo_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:526106 SLE l1I11 ( .Q(l1I11_1z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oO0Oo_Z), .EN(Oo011_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:534897 SLE IO0Oo ( .Q(IO0Oo_Z), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IO0Oo_3_Z), .EN(un1_IO0Oo7_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529216 SLE \lioOo[13] ( .Q(lioOo_Z[13]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IioOo[13]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529216 SLE \lioOo[12] ( .Q(lioOo_Z[12]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IioOo[12]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529216 SLE \lioOo[11] ( .Q(lioOo_Z[11]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IioOo_Z[11]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529216 SLE \lioOo[10] ( .Q(lioOo_Z[10]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IioOo_Z[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529216 SLE \lioOo[9] ( .Q(lioOo_Z[9]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IioOo_Z[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529216 SLE \lioOo[8] ( .Q(lioOo_Z[8]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IioOo[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529216 SLE \lioOo[7] ( .Q(lioOo_Z[7]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IioOo[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529216 SLE \lioOo[6] ( .Q(lioOo_Z[6]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IioOo[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529216 SLE \lioOo[5] ( .Q(i1_i_8), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IioOo_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529216 SLE \lioOo[4] ( .Q(lioOo_Z[4]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IioOo_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529216 SLE \lioOo[3] ( .Q(i1_i_9), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IioOo_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529216 SLE \lioOo[2] ( .Q(i1_i_10), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IioOo_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529216 SLE \lioOo[1] ( .Q(i1_i_11), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IioOo_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529216 SLE \lioOo[0] ( .Q(lioOo_Z[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IioOo_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529449 SLE \oOiOo[3] ( .Q(oOiOo_Z[3]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_673_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528845 SLE \OooOo[12] ( .Q(OooOo_Z[12]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i1oOo[12]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528845 SLE \OooOo[11] ( .Q(OooOo_Z[11]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i1oOo[11]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528845 SLE \OooOo[10] ( .Q(OooOo_Z[10]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i1oOo[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528845 SLE \OooOo[9] ( .Q(OooOo_Z[9]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i1oOo[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528845 SLE \OooOo[8] ( .Q(OooOo_Z[8]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i1oOo[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528845 SLE \OooOo[7] ( .Q(OooOo_Z[7]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i1oOo_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528845 SLE \OooOo[6] ( .Q(OooOo_Z[6]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i1oOo_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528845 SLE \OooOo[5] ( .Q(OooOo_Z[5]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i1oOo_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528845 SLE \OooOo[4] ( .Q(OooOo_Z[4]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i1oOo_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528845 SLE \OooOo[3] ( .Q(OooOo_Z[3]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i1oOo[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528845 SLE \OooOo[2] ( .Q(OooOo_Z[2]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i1oOo_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528845 SLE \OooOo[1] ( .Q(OooOo_Z[1]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i1oOo[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528845 SLE \OooOo[0] ( .Q(OooOo_Z[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i1oOo_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529216 SLE \lioOo[15] ( .Q(lioOo_Z[15]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IioOo[15]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529216 SLE \lioOo[14] ( .Q(lioOo_Z[14]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IioOo[14]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529888 SLE \iIiOo[2] ( .Q(iIiOo_Z[2]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oIiOo[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529888 SLE \iIiOo[1] ( .Q(iIiOo_Z[1]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oIiOo[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529888 SLE \iIiOo[0] ( .Q(iIiOo_Z[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oIiOo[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:530350 SLE \O1oi1[8] ( .Q(O1oi1_Z[8]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0oi1[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:530350 SLE \O1oi1[7] ( .Q(O1oi1_Z[7]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0oi1[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:530350 SLE \O1oi1[6] ( .Q(O1oi1_Z[6]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0oi1_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:530350 SLE \O1oi1[5] ( .Q(O1oi1_Z[5]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0oi1_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:530350 SLE \O1oi1[4] ( .Q(O1oi1_Z[4]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0oi1_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:530350 SLE \O1oi1[3] ( .Q(O1oi1_Z[3]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0oi1_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:530350 SLE \O1oi1[2] ( .Q(O1oi1_Z[2]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0oi1_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:530350 SLE \O1oi1[1] ( .Q(O1oi1_Z[1]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0oi1_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:530350 SLE \O1oi1[0] ( .Q(O1oi1_Z[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0oi1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528845 SLE \OooOo[15] ( .Q(OooOo_Z[15]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i1oOo[15]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528845 SLE \OooOo[14] ( .Q(OooOo_Z[14]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i1oOo_Z[14]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528845 SLE \OooOo[13] ( .Q(OooOo_Z[13]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i1oOo_Z[13]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:530453 SLE \l0iOo[7] ( .Q(l0iOo_Z[7]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0iOo_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:530453 SLE \l0iOo[6] ( .Q(l0iOo_Z[6]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0iOo_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:530453 SLE \l0iOo[5] ( .Q(l0iOo_Z[5]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0iOo[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:530453 SLE \l0iOo[4] ( .Q(l0iOo_Z[4]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0iOo[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:530453 SLE \l0iOo[3] ( .Q(l0iOo_Z[3]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0iOo[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:530453 SLE \l0iOo[2] ( .Q(l0iOo_Z[2]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0iOo[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:530453 SLE \l0iOo[1] ( .Q(l0iOo_Z[1]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0iOo[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:530453 SLE \l0iOo[0] ( .Q(l0iOo_Z[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0iOo[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529888 SLE \iIiOo[9] ( .Q(iIiOo_Z[9]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oIiOo_Z[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529888 SLE \iIiOo[8] ( .Q(iIiOo_Z[8]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oIiOo_Z[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529888 SLE \iIiOo[7] ( .Q(iIiOo_Z[7]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oIiOo[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529888 SLE \iIiOo[6] ( .Q(iIiOo_Z[6]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oIiOo_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529888 SLE \iIiOo[5] ( .Q(iIiOo_Z[5]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oIiOo_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529888 SLE \iIiOo[4] ( .Q(iIiOo_Z[4]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oIiOo[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529888 SLE \iIiOo[3] ( .Q(iIiOo_Z[3]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oIiOo[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528481 SLE \O0oOo[4] ( .Q(O0oOo_Z[4]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iloOo[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528481 SLE \O0oOo[3] ( .Q(O0oOo_Z[3]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iloOo[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528481 SLE \O0oOo[2] ( .Q(O0oOo_Z[2]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iloOo[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528481 SLE \O0oOo[1] ( .Q(O0oOo_Z[1]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iloOo[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528481 SLE \O0oOo[0] ( .Q(O0oOo_Z[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iloOo[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:533175 SLE \olIO1[7] ( .Q(Oi0i0[7]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(olOIo[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:533175 SLE \olIO1[6] ( .Q(Oi0i0[6]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(olOIo[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:533175 SLE \olIO1[5] ( .Q(Oi0i0[5]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(olOIo[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:533175 SLE \olIO1[4] ( .Q(Oi0i0[4]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(olOIo[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:533175 SLE \olIO1[3] ( .Q(Oi0i0[3]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(olOIo[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:533175 SLE \olIO1[2] ( .Q(Oi0i0[2]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(olOIo[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:533175 SLE \olIO1[1] ( .Q(Oi0i0[1]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(olOIo[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:533175 SLE \olIO1[0] ( .Q(Oi0i0[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(olOIo[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:530453 SLE \l0iOo[9] ( .Q(l0iOo_Z[9]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0iOo_Z[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:530453 SLE \l0iOo[8] ( .Q(l0iOo_Z[8]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0iOo_Z[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529593 SLE \IIiOo[9] ( .Q(IIiOo_Z[9]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OIiOo_Z[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529593 SLE \IIiOo[8] ( .Q(IIiOo_Z[8]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OIiOo_Z[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529593 SLE \IIiOo[7] ( .Q(IIiOo_Z[7]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OIiOo_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529593 SLE \IIiOo[6] ( .Q(IIiOo_Z[6]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OIiOo_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529593 SLE \IIiOo[5] ( .Q(IIiOo_Z[5]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OIiOo_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529593 SLE \IIiOo[4] ( .Q(IIiOo_Z[4]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OIiOo_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529593 SLE \IIiOo[3] ( .Q(IIiOo_Z[3]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OIiOo_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529593 SLE \IIiOo[2] ( .Q(IIiOo_Z[2]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OIiOo_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529593 SLE \IIiOo[1] ( .Q(IIiOo_Z[1]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OIiOo_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528694 SLE \I1oOo[3] ( .Q(ANB3), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O1oOo_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528694 SLE \I1oOo[2] ( .Q(ANB2), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O1oOo_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528694 SLE \I1oOo[1] ( .Q(ANB1), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O1oOo_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528694 SLE \I1oOo[0] ( .Q(CO0), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O1oOo_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528481 SLE \O0oOo[6] ( .Q(O0oOo_Z[6]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iloOo[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528481 SLE \O0oOo[5] ( .Q(O0oOo_Z[5]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iloOo[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[8] ( .Q(O1iO1[8]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0IIo_Z[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[7] ( .Q(O1iO1[7]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0IIo_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[6] ( .Q(O1iO1[6]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0IIo_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[5] ( .Q(O1iO1[5]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0IIo_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[4] ( .Q(O1iO1[4]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0IIo_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[3] ( .Q(O1iO1[3]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0IIo_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[2] ( .Q(O1iO1[2]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_545_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[1] ( .Q(O1iO1[1]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i1_i_4), .EN(O0IIo_i_m3_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[0] ( .Q(O1iO1[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0IIo_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:527609 SLE \Oo1Oo[3] ( .Q(Oo1Oo_Z[3]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i11Oo[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:527609 SLE \Oo1Oo[2] ( .Q(Oo1Oo_Z[2]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Oo1Oo_Z[3]), .EN(N_693), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:527609 SLE \Oo1Oo[1] ( .Q(Oo1Oo_Z[1]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Oo1Oo_Z[2]), .EN(N_693), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:527609 SLE \Oo1Oo[0] ( .Q(Oo1Oo_Z[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Oo1Oo_Z[1]), .EN(N_693), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529593 SLE \IIiOo[11] ( .Q(IIiOo_Z[11]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OIiOo_Z[11]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:529593 SLE \IIiOo[10] ( .Q(IIiOo_Z[10]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OIiOo_Z[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[20] ( .Q(O1iO1[20]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_547_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[19] ( .Q(O1iO1[19]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0IIo_Z[19]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[18] ( .Q(O1iO1[18]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0IIo_Z[18]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[17] ( .Q(O1iO1[17]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0IIo_Z[17]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[16] ( .Q(O1iO1[16]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0IIo_Z[16]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[15] ( .Q(O1iO1[15]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0IIo_Z[15]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[14] ( .Q(O1iO1[14]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0IIo_Z[14]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[13] ( .Q(O1iO1[13]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0IIo_Z[13]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[12] ( .Q(O1iO1[12]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0IIo_Z[12]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[11] ( .Q(O1iO1[11]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i1_i_7), .EN(O0IIo_i_m3_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[10] ( .Q(O1iO1[10]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0IIo_Z[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[9] ( .Q(O1iO1[9]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0IIo_Z[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[38] ( .Q(O1iO1[38]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lioOo_Z[6]), .EN(O0IIo_i_m3_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[37] ( .Q(O1iO1[37]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i1_i_8), .EN(O0IIo_i_m3_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[36] ( .Q(O1iO1[36]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0IIo_Z[36]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[35] ( .Q(O1iO1[35]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i1_i_9), .EN(O0IIo_i_m3_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[34] ( .Q(O1iO1[34]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i1_i_10), .EN(O0IIo_i_m3_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[33] ( .Q(O1iO1[33]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i1_i_11), .EN(O0IIo_i_m3_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[32] ( .Q(O1iO1[32]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0IIo_Z[32]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[29] ( .Q(O1iO1[29]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0IIo_Z[29]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[28] ( .Q(O1iO1[28]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o1OIo_Z), .EN(O0IIo_i_m3_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[27] ( .Q(O1iO1[27]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i1_i_12), .EN(O0IIo_i_m3_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[26] ( .Q(O1iO1[26]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0IIo_Z[26]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[25] ( .Q(O1iO1[25]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0IIo_Z[25]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[24] ( .Q(O1iO1[24]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i1_i_13), .EN(O0IIo_i_m3_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531187 SLE \lOoO1[1] ( .Q(lOoO1_Z[1]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un15_OoiOo_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531187 SLE \lOoO1[0] ( .Q(lOoO1_Z[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OoiOo_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[51] ( .Q(O1iO1[51]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0IIo_Z[51]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[48] ( .Q(O1iO1[48]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IO0Oo_Z), .EN(O0IIo_i_m3_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[47] ( .Q(O1iO1[47]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lioOo_Z[15]), .EN(O0IIo_i_m3_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[46] ( .Q(O1iO1[46]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lioOo_Z[14]), .EN(O0IIo_i_m3_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[45] ( .Q(O1iO1[45]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lioOo_Z[13]), .EN(O0IIo_i_m3_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[44] ( .Q(O1iO1[44]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lioOo_Z[12]), .EN(O0IIo_i_m3_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[43] ( .Q(O1iO1[43]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0IIo_Z[43]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[42] ( .Q(O1iO1[42]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lioOo_Z[10]), .EN(O0IIo_i_m3_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[41] ( .Q(O1iO1[41]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lioOo_Z[9]), .EN(O0IIo_i_m3_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[40] ( .Q(O1iO1[40]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lioOo_Z[8]), .EN(O0IIo_i_m3_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:535323 SLE \O1iO1_Z[39] ( .Q(O1iO1[39]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0IIo_Z[39]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:534244 SLE \ll0i1[3] ( .Q(ll0i1_Z[3]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i25_mux_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:534244 SLE \ll0i1[2] ( .Q(ll0i1_Z[2]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i26_mux_0_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:534244 SLE \ll0i1[1] ( .Q(ll0i1_Z[1]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i23_mux_0_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:534244 SLE \ll0i1[0] ( .Q(ll0i1_Z[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i24_mux_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528566 SLE \l0oOo[4] ( .Q(l0oOo_Z[4]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l0oOo_RNO_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528566 SLE \l0oOo[3] ( .Q(l0oOo_Z[3]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0oOo[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528566 SLE \l0oOo[2] ( .Q(l0oOo_Z[2]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0oOo[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528566 SLE \l0oOo[1] ( .Q(l0oOo_Z[1]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0oOo[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:528566 SLE \l0oOo[0] ( .Q(l0oOo_Z[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0oOo[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531187 SLE \lOoO1[7] ( .Q(lOoO1_Z[7]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OoiOo_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531187 SLE \lOoO1[6] ( .Q(lOoO1_Z[6]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OoiOo_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531187 SLE \lOoO1[5] ( .Q(lOoO1_Z[5]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un15_OoiOo_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531187 SLE \lOoO1[4] ( .Q(lOoO1_Z[4]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OoiOo_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531187 SLE \lOoO1[3] ( .Q(lOoO1_Z[3]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OoiOo_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:531187 SLE \lOoO1[2] ( .Q(lOoO1_Z[2]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OoiOo_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:534244 SLE \ll0i1[15] ( .Q(ll0i1_Z[15]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il0i1_Z[15]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:534244 SLE \ll0i1[14] ( .Q(ll0i1_Z[14]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il0i1_Z[14]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:534244 SLE \ll0i1[13] ( .Q(ll0i1_Z[13]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il0i1_Z[13]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:534244 SLE \ll0i1[12] ( .Q(ll0i1_Z[12]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il0i1_Z[12]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:534244 SLE \ll0i1[11] ( .Q(ll0i1_Z[11]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il0i1_Z[11]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:534244 SLE \ll0i1[10] ( .Q(ll0i1_Z[10]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il0i1_Z[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:534244 SLE \ll0i1[9] ( .Q(ll0i1_Z[9]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il0i1_Z[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:534244 SLE \ll0i1[8] ( .Q(ll0i1_Z[8]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il0i1_Z[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:534244 SLE \ll0i1[7] ( .Q(ll0i1_Z[7]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il0i1_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:534244 SLE \ll0i1[6] ( .Q(ll0i1_Z[6]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i34_mux_0_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:534244 SLE \ll0i1[5] ( .Q(ll0i1_Z[5]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i29_mux_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:534244 SLE \ll0i1[4] ( .Q(ll0i1_Z[4]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i30_mux_0_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:530324 ARI1 un42_i0oi1_cry_0 ( .FCO(un42_i0oi1_cry_0_Z), .S(un42_i0oi1_cry_0_S), .Y(un42_i0oi1_cry_0_Y), .B(O1oi1_Z[0]), .C(GND), .D(GND), .A(VCC), .FCI(GND) ); defparam un42_i0oi1_cry_0.INIT=20'h65500; // @28:530324 ARI1 un42_i0oi1_cry_1 ( .FCO(un42_i0oi1_cry_1_Z), .S(un42_i0oi1_cry_1_S), .Y(un42_i0oi1_cry_1_Y), .B(O1oi1_Z[1]), .C(GND), .D(GND), .A(VCC), .FCI(un42_i0oi1_cry_0_Z) ); defparam un42_i0oi1_cry_1.INIT=20'h65500; // @28:530324 ARI1 un42_i0oi1_cry_2 ( .FCO(un42_i0oi1_cry_2_Z), .S(un42_i0oi1_cry_2_S), .Y(un42_i0oi1_cry_2_Y), .B(O1oi1_Z[2]), .C(GND), .D(GND), .A(VCC), .FCI(un42_i0oi1_cry_1_Z) ); defparam un42_i0oi1_cry_2.INIT=20'h65500; // @28:530324 ARI1 un42_i0oi1_cry_3 ( .FCO(un42_i0oi1_cry_3_Z), .S(un42_i0oi1_cry_3_S), .Y(un42_i0oi1_cry_3_Y), .B(O1oi1_Z[3]), .C(GND), .D(GND), .A(VCC), .FCI(un42_i0oi1_cry_2_Z) ); defparam un42_i0oi1_cry_3.INIT=20'h65500; // @28:530324 ARI1 un42_i0oi1_cry_4 ( .FCO(un42_i0oi1_cry_4_Z), .S(un42_i0oi1_cry_4_S), .Y(un42_i0oi1_cry_4_Y), .B(O1oi1_Z[4]), .C(GND), .D(GND), .A(VCC), .FCI(un42_i0oi1_cry_3_Z) ); defparam un42_i0oi1_cry_4.INIT=20'h65500; // @28:530324 ARI1 un42_i0oi1_cry_5 ( .FCO(un42_i0oi1_cry_5_Z), .S(un42_i0oi1_cry_5_S), .Y(un42_i0oi1_cry_5_Y), .B(O1oi1_Z[5]), .C(GND), .D(GND), .A(VCC), .FCI(un42_i0oi1_cry_4_Z) ); defparam un42_i0oi1_cry_5.INIT=20'h65500; // @28:530324 ARI1 un42_i0oi1_cry_6 ( .FCO(un42_i0oi1_cry_6_Z), .S(un42_i0oi1_cry_6_S), .Y(un42_i0oi1_cry_6_Y), .B(O1oi1_Z[6]), .C(GND), .D(GND), .A(VCC), .FCI(un42_i0oi1_cry_5_Z) ); defparam un42_i0oi1_cry_6.INIT=20'h65500; // @28:530324 ARI1 un42_i0oi1_s_8 ( .FCO(un42_i0oi1_s_8_FCO), .S(un42_i0oi1_s_8_S), .Y(un42_i0oi1_s_8_Y), .B(O1oi1_Z[8]), .C(GND), .D(GND), .A(VCC), .FCI(un42_i0oi1_cry_7_Z) ); defparam un42_i0oi1_s_8.INIT=20'h45500; // @28:530324 ARI1 un42_i0oi1_cry_7 ( .FCO(un42_i0oi1_cry_7_Z), .S(un42_i0oi1_cry_7_S), .Y(un42_i0oi1_cry_7_Y), .B(O1oi1_Z[7]), .C(GND), .D(GND), .A(VCC), .FCI(un42_i0oi1_cry_6_Z) ); defparam un42_i0oi1_cry_7.INIT=20'h65500; // @28:528470 ARI1 un60_iloOo_cry_0 ( .FCO(un60_iloOo_cry_0_Z), .S(un60_iloOo_cry_0_S), .Y(un60_iloOo_cry_0_Y), .B(O0oOo_Z[0]), .C(GND), .D(GND), .A(VCC), .FCI(GND) ); defparam un60_iloOo_cry_0.INIT=20'h65500; // @28:528470 ARI1 un60_iloOo_cry_1 ( .FCO(un60_iloOo_cry_1_Z), .S(un60_iloOo_cry_1_S), .Y(un60_iloOo_cry_1_Y), .B(O0oOo_Z[1]), .C(GND), .D(GND), .A(VCC), .FCI(un60_iloOo_cry_0_Z) ); defparam un60_iloOo_cry_1.INIT=20'h65500; // @28:528470 ARI1 un60_iloOo_cry_2 ( .FCO(un60_iloOo_cry_2_Z), .S(un60_iloOo_cry_2_S), .Y(un60_iloOo_cry_2_Y), .B(O0oOo_Z[2]), .C(GND), .D(GND), .A(VCC), .FCI(un60_iloOo_cry_1_Z) ); defparam un60_iloOo_cry_2.INIT=20'h65500; // @28:528470 ARI1 un60_iloOo_cry_3 ( .FCO(un60_iloOo_cry_3_Z), .S(un60_iloOo_cry_3_S), .Y(un60_iloOo_cry_3_Y), .B(O0oOo_Z[3]), .C(GND), .D(GND), .A(VCC), .FCI(un60_iloOo_cry_2_Z) ); defparam un60_iloOo_cry_3.INIT=20'h65500; // @28:528470 ARI1 un60_iloOo_cry_4 ( .FCO(un60_iloOo_cry_4_Z), .S(un60_iloOo_cry_4_S), .Y(un60_iloOo_cry_4_Y), .B(O0oOo_Z[4]), .C(GND), .D(GND), .A(VCC), .FCI(un60_iloOo_cry_3_Z) ); defparam un60_iloOo_cry_4.INIT=20'h65500; // @28:528470 ARI1 un60_iloOo_s_6 ( .FCO(un60_iloOo_s_6_FCO), .S(un60_iloOo_s_6_S), .Y(un60_iloOo_s_6_Y), .B(O0oOo_Z[6]), .C(GND), .D(GND), .A(VCC), .FCI(un60_iloOo_cry_5_Z) ); defparam un60_iloOo_s_6.INIT=20'h45500; // @28:528470 ARI1 un60_iloOo_cry_5 ( .FCO(un60_iloOo_cry_5_Z), .S(un60_iloOo_cry_5_S), .Y(un60_iloOo_cry_5_Y), .B(O0oOo_Z[5]), .C(GND), .D(GND), .A(VCC), .FCI(un60_iloOo_cry_4_Z) ); defparam un60_iloOo_cry_5.INIT=20'h65500; // @28:526545 ARI1 un7_il0Oo_cry_0 ( .FCO(un7_il0Oo_cry_0_Z), .S(un7_il0Oo_cry_0_S), .Y(un7_il0Oo_cry_0_Y), .B(l0oOo_Z[0]), .C(GND), .D(GND), .A(O0oOo_Z[0]), .FCI(GND) ); defparam un7_il0Oo_cry_0.INIT=20'h5AA55; // @28:526545 ARI1 un7_il0Oo_cry_1 ( .FCO(un7_il0Oo_cry_1_Z), .S(un7_il0Oo_cry_1_S), .Y(un7_il0Oo_cry_1_Y), .B(l0oOo_Z[1]), .C(GND), .D(GND), .A(O0oOo_Z[1]), .FCI(un7_il0Oo_cry_0_Z) ); defparam un7_il0Oo_cry_1.INIT=20'h5AA55; // @28:526545 ARI1 un7_il0Oo_cry_2 ( .FCO(un7_il0Oo_cry_2_Z), .S(un7_il0Oo_cry_2_S), .Y(un7_il0Oo_cry_2_Y), .B(l0oOo_Z[2]), .C(GND), .D(GND), .A(O0oOo_Z[2]), .FCI(un7_il0Oo_cry_1_Z) ); defparam un7_il0Oo_cry_2.INIT=20'h5AA55; // @28:526545 ARI1 un7_il0Oo_cry_3 ( .FCO(un7_il0Oo_cry_3_Z), .S(un7_il0Oo_cry_3_S), .Y(un7_il0Oo_cry_3_Y), .B(l0oOo_Z[3]), .C(GND), .D(GND), .A(O0oOo_Z[3]), .FCI(un7_il0Oo_cry_2_Z) ); defparam un7_il0Oo_cry_3.INIT=20'h5AA55; // @28:526545 ARI1 un7_il0Oo_cry_4 ( .FCO(un7_il0Oo_cry_4_Z), .S(un7_il0Oo_cry_4_S), .Y(un7_il0Oo_cry_4_Y), .B(l0oOo_Z[4]), .C(GND), .D(GND), .A(O0oOo_Z[4]), .FCI(un7_il0Oo_cry_3_Z) ); defparam un7_il0Oo_cry_4.INIT=20'h5AA55; // @28:526545 ARI1 un7_il0Oo_cry_5 ( .FCO(un7_il0Oo_cry_5_Z), .S(un7_il0Oo_cry_5_S), .Y(un7_il0Oo_cry_5_Y), .B(O0oOo_Z[5]), .C(GND), .D(GND), .A(VCC), .FCI(un7_il0Oo_cry_4_Z) ); defparam un7_il0Oo_cry_5.INIT=20'h65500; // @28:526545 ARI1 un7_il0Oo_cry_6 ( .FCO(un7_il0Oo_cry_6_Z), .S(un7_il0Oo_cry_6_S), .Y(un7_il0Oo_cry_6_Y), .B(O0oOo_Z[6]), .C(GND), .D(GND), .A(VCC), .FCI(un7_il0Oo_cry_5_Z) ); defparam un7_il0Oo_cry_6.INIT=20'h65500; // @28:534549 ARI1 O0li1_RNO_6 ( .FCO(un3_oooOo_0_data_tmp[0]), .S(O0li1_RNO_6_S), .Y(O0li1_RNO_6_Y), .B(OooOo_Z[0]), .C(OooOo_Z[1]), .D(OOlI1[0]), .A(OOlI1[1]), .FCI(GND) ); defparam O0li1_RNO_6.INIT=20'h68421; // @28:534549 ARI1 O0li1_RNO_5 ( .FCO(un3_oooOo_0_data_tmp[1]), .S(O0li1_RNO_5_S), .Y(O0li1_RNO_5_Y), .B(OooOo_Z[2]), .C(OooOo_Z[3]), .D(OOlI1[2]), .A(OOlI1[3]), .FCI(un3_oooOo_0_data_tmp[0]) ); defparam O0li1_RNO_5.INIT=20'h68421; // @28:534549 ARI1 O0li1_RNO_4 ( .FCO(un3_oooOo_0_data_tmp[2]), .S(O0li1_RNO_4_S), .Y(O0li1_RNO_4_Y), .B(OooOo_Z[4]), .C(OooOo_Z[5]), .D(OOlI1[4]), .A(OOlI1[5]), .FCI(un3_oooOo_0_data_tmp[1]) ); defparam O0li1_RNO_4.INIT=20'h68421; // @28:534549 ARI1 O0li1_RNO_3 ( .FCO(un3_oooOo_0_data_tmp[3]), .S(O0li1_RNO_3_S), .Y(O0li1_RNO_3_Y), .B(OooOo_Z[6]), .C(OooOo_Z[7]), .D(OOlI1[6]), .A(OOlI1[7]), .FCI(un3_oooOo_0_data_tmp[2]) ); defparam O0li1_RNO_3.INIT=20'h68421; // @28:534549 ARI1 O0li1_RNO_2 ( .FCO(un3_oooOo_0_data_tmp[4]), .S(O0li1_RNO_2_S), .Y(O0li1_RNO_2_Y), .B(OooOo_Z[8]), .C(OooOo_Z[9]), .D(OOlI1[8]), .A(OOlI1[9]), .FCI(un3_oooOo_0_data_tmp[3]) ); defparam O0li1_RNO_2.INIT=20'h68421; // @28:534549 ARI1 O0li1_RNO_1 ( .FCO(un3_oooOo_0_data_tmp[5]), .S(O0li1_RNO_1_S), .Y(O0li1_RNO_1_Y), .B(OooOo_Z[10]), .C(OooOo_Z[11]), .D(OOlI1[10]), .A(OOlI1[11]), .FCI(un3_oooOo_0_data_tmp[4]) ); defparam O0li1_RNO_1.INIT=20'h68421; // @28:534549 ARI1 O0li1_RNO_0 ( .FCO(un3_oooOo_0_data_tmp[6]), .S(O0li1_RNO_0_S), .Y(O0li1_RNO_0_Y), .B(OooOo_Z[12]), .C(OooOo_Z[13]), .D(OOlI1[12]), .A(OOlI1[13]), .FCI(un3_oooOo_0_data_tmp[5]) ); defparam O0li1_RNO_0.INIT=20'h68421; // @28:534549 ARI1 O0li1_RNO ( .FCO(un3_oooOo_0_data_tmp[7]), .S(O0li1_RNO_S), .Y(O0li1_RNO_Y), .B(OooOo_Z[14]), .C(OooOo_Z[15]), .D(OOlI1[14]), .A(OOlI1[15]), .FCI(un3_oooOo_0_data_tmp[6]) ); defparam O0li1_RNO.INIT=20'h68421; // @28:529187 ARI1 un6_IioOo_s_1_4175 ( .FCO(un6_IioOo_s_1_4175_FCO), .S(un6_IioOo_s_1_4175_S), .Y(un6_IioOo_s_1_4175_Y), .B(lioOo_Z[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam un6_IioOo_s_1_4175.INIT=20'h4AA00; // @28:529187 ARI1 un6_IioOo_cry_1 ( .FCO(un6_IioOo_cry_1_Z), .S(un6_IioOo_cry_1_S), .Y(un6_IioOo_cry_1_Y), .B(i1_i_11), .C(GND), .D(GND), .A(VCC), .FCI(un6_IioOo_s_1_4175_FCO) ); defparam un6_IioOo_cry_1.INIT=20'h4AA00; // @28:529187 ARI1 un6_IioOo_cry_2 ( .FCO(un6_IioOo_cry_2_Z), .S(un6_IioOo_cry_2_S), .Y(un6_IioOo_cry_2_Y), .B(i1_i_10), .C(GND), .D(GND), .A(VCC), .FCI(un6_IioOo_cry_1_Z) ); defparam un6_IioOo_cry_2.INIT=20'h4AA00; // @28:529187 ARI1 un6_IioOo_cry_3 ( .FCO(un6_IioOo_cry_3_Z), .S(un6_IioOo_cry_3_S), .Y(un6_IioOo_cry_3_Y), .B(i1_i_9), .C(GND), .D(GND), .A(VCC), .FCI(un6_IioOo_cry_2_Z) ); defparam un6_IioOo_cry_3.INIT=20'h4AA00; // @28:529187 ARI1 un6_IioOo_cry_4 ( .FCO(un6_IioOo_cry_4_Z), .S(un6_IioOo_cry_4_S), .Y(un6_IioOo_cry_4_Y), .B(lioOo_Z[4]), .C(GND), .D(GND), .A(VCC), .FCI(un6_IioOo_cry_3_Z) ); defparam un6_IioOo_cry_4.INIT=20'h4AA00; // @28:529187 ARI1 un6_IioOo_cry_5 ( .FCO(un6_IioOo_cry_5_Z), .S(un6_IioOo_cry_5_S), .Y(un6_IioOo_cry_5_Y), .B(i1_i_8), .C(GND), .D(GND), .A(VCC), .FCI(un6_IioOo_cry_4_Z) ); defparam un6_IioOo_cry_5.INIT=20'h4AA00; // @28:529187 ARI1 un6_IioOo_cry_6 ( .FCO(un6_IioOo_cry_6_Z), .S(un6_IioOo_cry_6_S), .Y(un6_IioOo_cry_6_Y), .B(lioOo_Z[6]), .C(GND), .D(GND), .A(VCC), .FCI(un6_IioOo_cry_5_Z) ); defparam un6_IioOo_cry_6.INIT=20'h4AA00; // @28:529187 ARI1 un6_IioOo_cry_7 ( .FCO(un6_IioOo_cry_7_Z), .S(un6_IioOo_cry_7_S), .Y(un6_IioOo_cry_7_Y), .B(lioOo_Z[7]), .C(GND), .D(GND), .A(VCC), .FCI(un6_IioOo_cry_6_Z) ); defparam un6_IioOo_cry_7.INIT=20'h4AA00; // @28:529187 ARI1 un6_IioOo_cry_8 ( .FCO(un6_IioOo_cry_8_Z), .S(un6_IioOo_cry_8_S), .Y(un6_IioOo_cry_8_Y), .B(lioOo_Z[8]), .C(GND), .D(GND), .A(VCC), .FCI(un6_IioOo_cry_7_Z) ); defparam un6_IioOo_cry_8.INIT=20'h4AA00; // @28:529187 ARI1 un6_IioOo_cry_9 ( .FCO(un6_IioOo_cry_9_Z), .S(un6_IioOo_cry_9_S), .Y(un6_IioOo_cry_9_Y), .B(lioOo_Z[9]), .C(GND), .D(GND), .A(VCC), .FCI(un6_IioOo_cry_8_Z) ); defparam un6_IioOo_cry_9.INIT=20'h4AA00; // @28:529187 ARI1 un6_IioOo_cry_10 ( .FCO(un6_IioOo_cry_10_Z), .S(un6_IioOo_cry_10_S), .Y(un6_IioOo_cry_10_Y), .B(lioOo_Z[10]), .C(GND), .D(GND), .A(VCC), .FCI(un6_IioOo_cry_9_Z) ); defparam un6_IioOo_cry_10.INIT=20'h4AA00; // @28:529187 ARI1 un6_IioOo_cry_11 ( .FCO(un6_IioOo_cry_11_Z), .S(un6_IioOo_cry_11_S), .Y(un6_IioOo_cry_11_Y), .B(lioOo_Z[11]), .C(GND), .D(GND), .A(VCC), .FCI(un6_IioOo_cry_10_Z) ); defparam un6_IioOo_cry_11.INIT=20'h4AA00; // @28:529187 ARI1 un6_IioOo_cry_12 ( .FCO(un6_IioOo_cry_12_Z), .S(un6_IioOo_cry_12_S), .Y(un6_IioOo_cry_12_Y), .B(lioOo_Z[12]), .C(GND), .D(GND), .A(VCC), .FCI(un6_IioOo_cry_11_Z) ); defparam un6_IioOo_cry_12.INIT=20'h4AA00; // @28:529187 ARI1 un6_IioOo_cry_13 ( .FCO(un6_IioOo_cry_13_Z), .S(un6_IioOo_cry_13_S), .Y(un6_IioOo_cry_13_Y), .B(lioOo_Z[13]), .C(GND), .D(GND), .A(VCC), .FCI(un6_IioOo_cry_12_Z) ); defparam un6_IioOo_cry_13.INIT=20'h4AA00; // @28:529187 ARI1 un6_IioOo_s_15 ( .FCO(un6_IioOo_s_15_FCO), .S(un6_IioOo_s_15_S), .Y(un6_IioOo_s_15_Y), .B(lioOo_Z[15]), .C(GND), .D(GND), .A(VCC), .FCI(un6_IioOo_cry_14_Z) ); defparam un6_IioOo_s_15.INIT=20'h4AA00; // @28:529187 ARI1 un6_IioOo_cry_14 ( .FCO(un6_IioOo_cry_14_Z), .S(un6_IioOo_cry_14_S), .Y(un6_IioOo_cry_14_Y), .B(lioOo_Z[14]), .C(GND), .D(GND), .A(VCC), .FCI(un6_IioOo_cry_13_Z) ); defparam un6_IioOo_cry_14.INIT=20'h4AA00; // @28:528816 ARI1 un6_i1oOo_1_s_1_4176 ( .FCO(un6_i1oOo_1_s_1_4176_FCO), .S(un6_i1oOo_1_s_1_4176_S), .Y(un6_i1oOo_1_s_1_4176_Y), .B(OooOo_Z[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam un6_i1oOo_1_s_1_4176.INIT=20'h4AA00; // @28:528816 ARI1 un6_i1oOo_1_cry_1 ( .FCO(un6_i1oOo_1_cry_1_Z), .S(un6_i1oOo_1_cry_1_S), .Y(un6_i1oOo_1_cry_1_Y), .B(OooOo_Z[1]), .C(GND), .D(GND), .A(VCC), .FCI(un6_i1oOo_1_s_1_4176_FCO) ); defparam un6_i1oOo_1_cry_1.INIT=20'h4AA00; // @28:528816 ARI1 un6_i1oOo_1_cry_2 ( .FCO(un6_i1oOo_1_cry_2_Z), .S(un6_i1oOo_1_cry_2_S), .Y(un6_i1oOo_1_cry_2_Y), .B(OooOo_Z[2]), .C(GND), .D(GND), .A(VCC), .FCI(un6_i1oOo_1_cry_1_Z) ); defparam un6_i1oOo_1_cry_2.INIT=20'h4AA00; // @28:528816 ARI1 un6_i1oOo_1_cry_3 ( .FCO(un6_i1oOo_1_cry_3_Z), .S(un6_i1oOo_1_cry_3_S), .Y(un6_i1oOo_1_cry_3_Y), .B(OooOo_Z[3]), .C(GND), .D(GND), .A(VCC), .FCI(un6_i1oOo_1_cry_2_Z) ); defparam un6_i1oOo_1_cry_3.INIT=20'h4AA00; // @28:528816 ARI1 un6_i1oOo_1_cry_4 ( .FCO(un6_i1oOo_1_cry_4_Z), .S(un6_i1oOo_1_cry_4_S), .Y(un6_i1oOo_1_cry_4_Y), .B(OooOo_Z[4]), .C(GND), .D(GND), .A(VCC), .FCI(un6_i1oOo_1_cry_3_Z) ); defparam un6_i1oOo_1_cry_4.INIT=20'h4AA00; // @28:528816 ARI1 un6_i1oOo_1_cry_5 ( .FCO(un6_i1oOo_1_cry_5_Z), .S(un6_i1oOo_1_cry_5_S), .Y(un6_i1oOo_1_cry_5_Y), .B(OooOo_Z[5]), .C(GND), .D(GND), .A(VCC), .FCI(un6_i1oOo_1_cry_4_Z) ); defparam un6_i1oOo_1_cry_5.INIT=20'h4AA00; // @28:528816 ARI1 un6_i1oOo_1_cry_6 ( .FCO(un6_i1oOo_1_cry_6_Z), .S(un6_i1oOo_1_cry_6_S), .Y(un6_i1oOo_1_cry_6_Y), .B(OooOo_Z[6]), .C(GND), .D(GND), .A(VCC), .FCI(un6_i1oOo_1_cry_5_Z) ); defparam un6_i1oOo_1_cry_6.INIT=20'h4AA00; // @28:528816 ARI1 un6_i1oOo_1_cry_7 ( .FCO(un6_i1oOo_1_cry_7_Z), .S(un6_i1oOo_1_cry_7_S), .Y(un6_i1oOo_1_cry_7_Y), .B(OooOo_Z[7]), .C(GND), .D(GND), .A(VCC), .FCI(un6_i1oOo_1_cry_6_Z) ); defparam un6_i1oOo_1_cry_7.INIT=20'h4AA00; // @28:528816 ARI1 un6_i1oOo_1_cry_8 ( .FCO(un6_i1oOo_1_cry_8_Z), .S(un6_i1oOo_1_cry_8_S), .Y(un6_i1oOo_1_cry_8_Y), .B(OooOo_Z[8]), .C(GND), .D(GND), .A(VCC), .FCI(un6_i1oOo_1_cry_7_Z) ); defparam un6_i1oOo_1_cry_8.INIT=20'h4AA00; // @28:528816 ARI1 un6_i1oOo_1_cry_9 ( .FCO(un6_i1oOo_1_cry_9_Z), .S(un6_i1oOo_1_cry_9_S), .Y(un6_i1oOo_1_cry_9_Y), .B(OooOo_Z[9]), .C(GND), .D(GND), .A(VCC), .FCI(un6_i1oOo_1_cry_8_Z) ); defparam un6_i1oOo_1_cry_9.INIT=20'h4AA00; // @28:528816 ARI1 un6_i1oOo_1_cry_10 ( .FCO(un6_i1oOo_1_cry_10_Z), .S(un6_i1oOo_1_cry_10_S), .Y(un6_i1oOo_1_cry_10_Y), .B(OooOo_Z[10]), .C(GND), .D(GND), .A(VCC), .FCI(un6_i1oOo_1_cry_9_Z) ); defparam un6_i1oOo_1_cry_10.INIT=20'h4AA00; // @28:528816 ARI1 un6_i1oOo_1_cry_11 ( .FCO(un6_i1oOo_1_cry_11_Z), .S(un6_i1oOo_1_cry_11_S), .Y(un6_i1oOo_1_cry_11_Y), .B(OooOo_Z[11]), .C(GND), .D(GND), .A(VCC), .FCI(un6_i1oOo_1_cry_10_Z) ); defparam un6_i1oOo_1_cry_11.INIT=20'h4AA00; // @28:528816 ARI1 un6_i1oOo_1_cry_12 ( .FCO(un6_i1oOo_1_cry_12_Z), .S(un6_i1oOo_1_cry_12_S), .Y(un6_i1oOo_1_cry_12_Y), .B(OooOo_Z[12]), .C(GND), .D(GND), .A(VCC), .FCI(un6_i1oOo_1_cry_11_Z) ); defparam un6_i1oOo_1_cry_12.INIT=20'h4AA00; // @28:528816 ARI1 un6_i1oOo_1_cry_13 ( .FCO(un6_i1oOo_1_cry_13_Z), .S(un6_i1oOo_1_cry_13_S), .Y(un6_i1oOo_1_cry_13_Y), .B(OooOo_Z[13]), .C(GND), .D(GND), .A(VCC), .FCI(un6_i1oOo_1_cry_12_Z) ); defparam un6_i1oOo_1_cry_13.INIT=20'h4AA00; // @28:528816 ARI1 un6_i1oOo_1_s_15 ( .FCO(un6_i1oOo_1_s_15_FCO), .S(un6_i1oOo_1_s_15_S), .Y(un6_i1oOo_1_s_15_Y), .B(OooOo_Z[15]), .C(GND), .D(GND), .A(VCC), .FCI(un6_i1oOo_1_cry_14_Z) ); defparam un6_i1oOo_1_s_15.INIT=20'h4AA00; // @28:528816 ARI1 un6_i1oOo_1_cry_14 ( .FCO(un6_i1oOo_1_cry_14_Z), .S(un6_i1oOo_1_cry_14_S), .Y(un6_i1oOo_1_cry_14_Y), .B(OooOo_Z[14]), .C(GND), .D(GND), .A(VCC), .FCI(un6_i1oOo_1_cry_13_Z) ); defparam un6_i1oOo_1_cry_14.INIT=20'h4AA00; // @28:530424 ARI1 un4_I0iOo_1_s_1_4177 ( .FCO(un4_I0iOo_1_s_1_4177_FCO), .S(un4_I0iOo_1_s_1_4177_S), .Y(un4_I0iOo_1_s_1_4177_Y), .B(l0iOo_Z[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam un4_I0iOo_1_s_1_4177.INIT=20'h4AA00; // @28:530424 ARI1 un4_I0iOo_1_cry_1 ( .FCO(un4_I0iOo_1_cry_1_Z), .S(un4_I0iOo_1_cry_1_S), .Y(un4_I0iOo_1_cry_1_Y), .B(l0iOo_Z[1]), .C(GND), .D(GND), .A(VCC), .FCI(un4_I0iOo_1_s_1_4177_FCO) ); defparam un4_I0iOo_1_cry_1.INIT=20'h4AA00; // @28:530424 ARI1 un4_I0iOo_1_cry_2 ( .FCO(un4_I0iOo_1_cry_2_Z), .S(un4_I0iOo_1_cry_2_S), .Y(un4_I0iOo_1_cry_2_Y), .B(l0iOo_Z[2]), .C(GND), .D(GND), .A(VCC), .FCI(un4_I0iOo_1_cry_1_Z) ); defparam un4_I0iOo_1_cry_2.INIT=20'h4AA00; // @28:530424 ARI1 un4_I0iOo_1_cry_3 ( .FCO(un4_I0iOo_1_cry_3_Z), .S(un4_I0iOo_1_cry_3_S), .Y(un4_I0iOo_1_cry_3_Y), .B(l0iOo_Z[3]), .C(GND), .D(GND), .A(VCC), .FCI(un4_I0iOo_1_cry_2_Z) ); defparam un4_I0iOo_1_cry_3.INIT=20'h4AA00; // @28:530424 ARI1 un4_I0iOo_1_cry_4 ( .FCO(un4_I0iOo_1_cry_4_Z), .S(un4_I0iOo_1_cry_4_S), .Y(un4_I0iOo_1_cry_4_Y), .B(l0iOo_Z[4]), .C(GND), .D(GND), .A(VCC), .FCI(un4_I0iOo_1_cry_3_Z) ); defparam un4_I0iOo_1_cry_4.INIT=20'h4AA00; // @28:530424 ARI1 un4_I0iOo_1_cry_5 ( .FCO(un4_I0iOo_1_cry_5_Z), .S(un4_I0iOo_1_cry_5_S), .Y(un4_I0iOo_1_cry_5_Y), .B(l0iOo_Z[5]), .C(GND), .D(GND), .A(VCC), .FCI(un4_I0iOo_1_cry_4_Z) ); defparam un4_I0iOo_1_cry_5.INIT=20'h4AA00; // @28:530424 ARI1 un4_I0iOo_1_cry_6 ( .FCO(un4_I0iOo_1_cry_6_Z), .S(un4_I0iOo_1_cry_6_S), .Y(un4_I0iOo_1_cry_6_Y), .B(l0iOo_Z[6]), .C(GND), .D(GND), .A(VCC), .FCI(un4_I0iOo_1_cry_5_Z) ); defparam un4_I0iOo_1_cry_6.INIT=20'h4AA00; // @28:530424 ARI1 un4_I0iOo_1_cry_7 ( .FCO(un4_I0iOo_1_cry_7_Z), .S(un4_I0iOo_1_cry_7_S), .Y(un4_I0iOo_1_cry_7_Y), .B(l0iOo_Z[7]), .C(GND), .D(GND), .A(VCC), .FCI(un4_I0iOo_1_cry_6_Z) ); defparam un4_I0iOo_1_cry_7.INIT=20'h4AA00; // @28:530424 ARI1 un4_I0iOo_1_s_9 ( .FCO(un4_I0iOo_1_s_9_FCO), .S(un4_I0iOo_1_s_9_S), .Y(un4_I0iOo_1_s_9_Y), .B(l0iOo_Z[9]), .C(GND), .D(GND), .A(VCC), .FCI(un4_I0iOo_1_cry_8_Z) ); defparam un4_I0iOo_1_s_9.INIT=20'h4AA00; // @28:530424 ARI1 un4_I0iOo_1_cry_8 ( .FCO(un4_I0iOo_1_cry_8_Z), .S(un4_I0iOo_1_cry_8_S), .Y(un4_I0iOo_1_cry_8_Y), .B(l0iOo_Z[8]), .C(GND), .D(GND), .A(VCC), .FCI(un4_I0iOo_1_cry_7_Z) ); defparam un4_I0iOo_1_cry_8.INIT=20'h4AA00; // @28:475474 ARI1 m69_1_0_wmux_0 ( .FCO(m69_1_0_co1), .S(m69_1_0_wmux_0_S), .Y(N_847), .B(ooIO1_0), .C(N_841), .D(N_842), .A(m69_1_0_y0), .FCI(m69_1_0_co0) ); defparam m69_1_0_wmux_0.INIT=20'h0F588; // @28:475474 ARI1 m69_1_0_wmux ( .FCO(m69_1_0_co0), .S(m69_1_0_wmux_S), .Y(m69_1_0_y0), .B(ooIO1_0), .C(N_844), .D(N_845), .A(iOoOo_Z), .FCI(VCC) ); defparam m69_1_0_wmux.INIT=20'h0FA44; // @28:475474 ARI1 m60_0_1_0_wmux_0 ( .FCO(m60_0_1_0_co1), .S(m60_0_1_0_wmux_0_S), .Y(N_839), .B(ooIO1_0), .C(N_833), .D(N_834_i_Z), .A(m60_0_1_0_y0), .FCI(m60_0_1_0_co0) ); defparam m60_0_1_0_wmux_0.INIT=20'h0F588; // @28:475474 ARI1 m60_0_1_0_wmux ( .FCO(m60_0_1_0_co0), .S(m60_0_1_0_wmux_S), .Y(m60_0_1_0_y0), .B(ooIO1_0), .C(N_836), .D(N_837), .A(iOoOo_Z), .FCI(VCC) ); defparam m60_0_1_0_wmux.INIT=20'h0FA44; // @28:475474 ARI1 m51_1_0_wmux_0 ( .FCO(m51_1_0_co1), .S(m51_1_0_wmux_0_S), .Y(N_831), .B(ooIO1_0), .C(N_822_i_Z), .D(N_826_i_Z), .A(m51_1_0_y0), .FCI(m51_1_0_co0) ); defparam m51_1_0_wmux_0.INIT=20'h0F588; // @28:475474 ARI1 m51_1_0_wmux ( .FCO(m51_1_0_co0), .S(m51_1_0_wmux_S), .Y(m51_1_0_y0), .B(ooIO1_0), .C(N_828), .D(N_829), .A(iOoOo_Z), .FCI(VCC) ); defparam m51_1_0_wmux.INIT=20'h0FA44; CFG4 \i0oi1_RNO[6] ( .A(O1oi1_Z[0]), .B(ooIO1_0), .C(IiI11_i_o2_5_Z), .D(IiI11_i_o2_4_Z), .Y(i0oi1_RNO_Z[6]) ); defparam \i0oi1_RNO[6] .INIT=16'h0002; // @28:528115 CFG4 lIoOo ( .A(ill11_1z), .B(iiOI1), .C(ilo11), .D(Ill11), .Y(lIoOo_Z) ); defparam lIoOo.INIT=16'hFFA8; // @28:528629 CFG4 \un1_O1oOo[1] ( .A(I0l11[1]), .B(iIl0112), .C(I0Ii1_Z), .D(iIoOo_Z), .Y(un1_O1oOo_Z[1]) ); defparam \un1_O1oOo[1] .INIT=16'h8808; // @28:534839 CFG4 O0IIo_i_m3 ( .A(olIIo), .B(ol0Oo_Z), .C(iIIIo_Z), .D(ll0Oo_Z), .Y(O0IIo_i_m3_Z) ); defparam O0IIo_i_m3.INIT=16'hF0E2; // @28:533565 CFG4 I0OIo ( .A(i10Oo_Z), .B(I1011), .C(oI0Oo_Z), .D(Oo0Oo_Z), .Y(I0OIo_Z) ); defparam I0OIo.INIT=16'h0C08; // @28:526532 CFG4 il0Oo ( .A(I0Ii1_Z), .B(N_863), .C(il0Oo_1_Z), .D(il0Oo_4_Z), .Y(il0Oo_Z) ); defparam il0Oo.INIT=16'hFF2F; // @28:526532 CFG4 il0Oo_1 ( .A(lOoOo_Z), .B(I1011), .C(un28_il0Oo_Z), .D(IliOo_NE_Z), .Y(il0Oo_1_Z) ); defparam il0Oo_1.INIT=16'h0705; // @28:527259 CFG4 oO1Oo ( .A(l1011), .B(oO1Oo_1_Z), .C(oO1Oo_0_Z), .D(Oi1Oo_Z), .Y(oO1Oo_Z) ); defparam oO1Oo.INIT=16'hFFF8; // @28:527259 CFG4 oO1Oo_1 ( .A(ol0Oo_Z), .B(ll0Oo_Z), .C(un6_ii0Oo), .D(un4_o1oOo_1), .Y(oO1Oo_1_Z) ); defparam oO1Oo_1.INIT=16'h2E00; // @28:529655 CFG4 \un31_oIiOo_1.oIiOo[7] ( .A(iIiOo_Z[7]), .B(lliOo[8]), .C(oIiOo_1[7]), .D(lIiOo_Z), .Y(oIiOo[7]) ); defparam \un31_oIiOo_1.oIiOo[7] .INIT=16'h0CAA; // @28:529655 CFG4 \un31_oIiOo_1.oIiOo_1[7] ( .A(oOiOo_Z[3]), .B(CO1_2), .C(IIiOo_Z[8]), .D(oOiOo_Z[2]), .Y(oIiOo_1[7]) ); defparam \un31_oIiOo_1.oIiOo_1[7] .INIT=16'h1F5F; // @28:527811 CFG4 Oi1Oo ( .A(oI0Oo_Z), .B(Oi1Oo_1_0_tz_Z), .C(Oi1Oo_1_0_Z), .D(Oi1Oo_1_Z), .Y(Oi1Oo_Z) ); defparam Oi1Oo.INIT=16'hFF8A; // @28:527811 CFG4 Oi1Oo_1_0 ( .A(I0Ii1_Z), .B(iO1Oo_Z), .C(un3_OlIi1_Z), .D(N_730_4), .Y(Oi1Oo_1_0_Z) ); defparam Oi1Oo_1_0.INIT=16'h31F5; // @28:528748 CFG4 un2_o1oOo ( .A(un2_o1oOo_7_Z), .B(un2_o1oOo_1_Z), .C(N_97_i), .D(un2_o1oOo_3_Z), .Y(un2_o1oOo_Z) ); defparam un2_o1oOo.INIT=16'h2000; // @28:528748 CFG4 un2_o1oOo_1 ( .A(OooOo_Z[2]), .B(OooOo_Z[6]), .C(m49_2), .D(OooOo_Z[3]), .Y(un2_o1oOo_1_Z) ); defparam un2_o1oOo_1.INIT=16'h7FFF; // @28:475474 CFG4 I00i1_RNO_1 ( .A(OooOo_Z[9]), .B(OooOo_Z[8]), .C(m86_e_1), .D(iOli1_10_Z), .Y(N_802) ); defparam I00i1_RNO_1.INIT=16'h0100; // @28:475474 CFG4 I00i1_RNO_6 ( .A(o1iOo_Z), .B(OooOo_Z[2]), .C(OooOo_Z[3]), .D(N_97_i), .Y(m86_e_1) ); defparam I00i1_RNO_6.INIT=16'h7FFF; // @28:475474 CFG3 \O0oOo_RNO_1[0] ( .A(iIl0112), .B(m76_1_1), .C(ooIO1_0), .Y(O0oOo_RNO_1_Z[0]) ); defparam \O0oOo_RNO_1[0] .INIT=8'h34; // @28:475474 CFG4 \O0oOo_RNO_2[0] ( .A(IIl11[2]), .B(oIl11[2]), .C(iOoOo_Z), .D(ooIO1_0), .Y(m76_1_1) ); defparam \O0oOo_RNO_2[0] .INIT=16'h0F53; // @28:475474 CFG4 \O0oOo_RNO_0[0] ( .A(ooIO1_0), .B(O0oOo_RNO_1_Z[0]), .C(N_17_0), .D(N_13_0), .Y(N_853) ); defparam \O0oOo_RNO_0[0] .INIT=16'hE6C4; // @28:475474 CFG3 N_822_i ( .A(oIl11[6]), .B(N_820), .C(N_15_0), .Y(N_822_i_Z) ); defparam N_822_i.INIT=8'h58; // @28:534172 CFG3 \Il0i1[8] ( .A(ll0i1_Z[8]), .B(lOoO1_Z[0]), .C(iI0i1), .Y(Il0i1_Z[8]) ); defparam \Il0i1[8] .INIT=8'hCA; // @28:534172 CFG3 \Il0i1[7] ( .A(ll0i1_Z[7]), .B(lOoO1_Z[7]), .C(Ol0i1_N_7_mux), .Y(Il0i1_Z[7]) ); defparam \Il0i1[7] .INIT=8'hAC; // @28:534172 CFG3 \Il0i1[15] ( .A(ll0i1_Z[15]), .B(lOoO1_Z[7]), .C(iI0i1), .Y(Il0i1_Z[15]) ); defparam \Il0i1[15] .INIT=8'hCA; // @28:534172 CFG3 \Il0i1[9] ( .A(ll0i1_Z[9]), .B(lOoO1_Z[1]), .C(iI0i1), .Y(Il0i1_Z[9]) ); defparam \Il0i1[9] .INIT=8'hCA; // @28:534172 CFG3 \Il0i1[10] ( .A(ll0i1_Z[10]), .B(lOoO1_Z[2]), .C(iI0i1), .Y(Il0i1_Z[10]) ); defparam \Il0i1[10] .INIT=8'hCA; // @28:534172 CFG3 \Il0i1[11] ( .A(ll0i1_Z[11]), .B(lOoO1_Z[3]), .C(iI0i1), .Y(Il0i1_Z[11]) ); defparam \Il0i1[11] .INIT=8'hCA; // @28:534172 CFG3 \Il0i1[12] ( .A(ll0i1_Z[12]), .B(lOoO1_Z[4]), .C(iI0i1), .Y(Il0i1_Z[12]) ); defparam \Il0i1[12] .INIT=8'hCA; // @28:534172 CFG3 \Il0i1[13] ( .A(ll0i1_Z[13]), .B(lOoO1_Z[5]), .C(iI0i1), .Y(Il0i1_Z[13]) ); defparam \Il0i1[13] .INIT=8'hCA; // @28:534172 CFG3 \Il0i1[14] ( .A(ll0i1_Z[14]), .B(lOoO1_Z[6]), .C(iI0i1), .Y(Il0i1_Z[14]) ); defparam \Il0i1[14] .INIT=8'hCA; // @28:527436 CFG4 oI1Oo_RNO ( .A(oI1Oo_Z), .B(iIoOo_Z), .C(iO1Oo_Z), .D(N_9_0_1), .Y(N_10_0_i) ); defparam oI1Oo_RNO.INIT=16'hCCDF; // @28:534093 CFG4 un19_oI0i1 ( .A(i1iO1_Z), .B(un20_oI0i1_4_0_Z), .C(un20_oI0i1_3_0_Z), .D(un20_oI0i1_7_0_Z), .Y(un19_oI0i1_Z) ); defparam un19_oI0i1.INIT=16'hAAA8; // @28:528757 CFG3 un4_o1oOo ( .A(un4_o1oOo_1), .B(un12_o1oOo_Z), .C(un4_o1oOo_0_Z), .Y(un4_o1oOo_Z) ); defparam un4_o1oOo.INIT=8'hFE; CFG2 oI0i1_RNO_3 ( .A(OooOo_Z[15]), .B(OooOo_Z[4]), .Y(oI0i1_1459_0) ); defparam oI0i1_RNO_3.INIT=4'h1; // @28:527294 CFG2 un14_oO1Oo_0 ( .A(OooOo_Z[1]), .B(OO1Oo_Z), .Y(un14_oO1Oo_0_Z) ); defparam un14_oO1Oo_0.INIT=4'h8; // @28:475474 CFG2 \OooOo_RNINIKV4[0] ( .A(OooOo_Z[0]), .B(OooOo_Z[1]), .Y(N_97_i) ); defparam \OooOo_RNINIKV4[0] .INIT=4'h8; // @28:534153 CFG2 Ol0i1_m2_e_0_0 ( .A(OooOo_Z[3]), .B(OooOo_Z[2]), .Y(Ol0i1_m2_e_0_0_Z) ); defparam Ol0i1_m2_e_0_0.INIT=4'h8; // @28:526578 CFG2 un15_il0Oo_4_0_3 ( .A(lioOo_Z[0]), .B(i1_i_11), .Y(un15_il0Oo_4_0_3_Z) ); defparam un15_il0Oo_4_0_3.INIT=4'h8; // @28:530534 CFG2 un2_i0iOo_0 ( .A(ANB2), .B(ANB3), .Y(un2_i0iOo_0_Z) ); defparam un2_i0iOo_0.INIT=4'h1; // @28:533888 CFG2 iiOIo_1 ( .A(I1OIo_Z), .B(l1OIo_Z), .Y(iiOIo_1_Z) ); defparam iiOIo_1.INIT=4'h1; // @28:475474 CFG2 \OooOo_RNI62LV4[7] ( .A(OooOo_Z[9]), .B(OooOo_Z[7]), .Y(m49_2) ); defparam \OooOo_RNI62LV4[7] .INIT=4'h8; // @28:475474 CFG2 \OooOo_RNIGCTP4[11] ( .A(OooOo_Z[8]), .B(OooOo_Z[11]), .Y(m22_0_2) ); defparam \OooOo_RNIGCTP4[11] .INIT=4'h1; // @28:530064 CFG2 \lliOo_0[6] ( .A(l0l11[3]), .B(o0l11), .Y(lliOo[8]) ); defparam \lliOo_0[6] .INIT=4'hB; // @28:534093 CFG2 un20_oI0i1_3 ( .A(OooOo_Z[6]), .B(OooOo_Z[7]), .Y(un20_oI0i1_3_Z) ); defparam un20_oI0i1_3.INIT=4'hE; // @28:529420 CFG2 \oOiOo_RNIBMSF3[0] ( .A(oOiOo_Z[1]), .B(CO0_2), .Y(CO1_2) ); defparam \oOiOo_RNIBMSF3[0] .INIT=4'h8; // @28:530044 CFG2 \un35_lliOo_1.CO1_1 ( .A(l0l11[0]), .B(l0l11[1]), .Y(CO1) ); defparam \un35_lliOo_1.CO1_1 .INIT=4'h7; // @28:529540 CFG2 un19_OIiOo ( .A(Oo0Oo_Z), .B(OIo11[2]), .Y(un19_OIiOo_Z) ); defparam un19_OIiOo.INIT=4'h8; // @28:534060 CFG2 un13_oI0i1_1 ( .A(OooOo_Z[2]), .B(i1iO1_Z), .Y(un13_oI0i1_1_Z) ); defparam un13_oI0i1_1.INIT=4'h8; // @28:533229 CFG2 O0OIo ( .A(I1OIo_Z), .B(l1OIo_Z), .Y(O0OIo_Z) ); defparam O0OIo.INIT=4'hE; // @28:526930 CFG2 IlIi1_1 ( .A(I0Ii1_Z), .B(CO0), .Y(IlIi1_1_Z) ); defparam IlIi1_1.INIT=4'h8; // @28:526206 CFG2 OIIi1_2 ( .A(oOIi1_Z), .B(IOI11), .Y(OIIi1_2_Z) ); defparam OIIi1_2.INIT=4'h2; // @28:526855 CFG2 un1_OlIi1 ( .A(O0Ii1_Z), .B(O1011_1z), .Y(un1_oioOo_1) ); defparam un1_OlIi1.INIT=4'h8; // @28:475474 CFG2 \l0oOo_RNO[4] ( .A(ooIO1_0), .B(lIl11[6]), .Y(l0oOo_RNO_Z[4]) ); defparam \l0oOo_RNO[4] .INIT=4'h4; // @28:529946 CFG2 \un31_oIiOo_1.IliOo_0 ( .A(l0iOo_Z[0]), .B(iIiOo_Z[0]), .Y(IliOo_0) ); defparam \un31_oIiOo_1.IliOo_0 .INIT=4'h6; // @28:529277 CFG2 un10_oioOo_1 ( .A(OooOo_Z[1]), .B(iIl11_1z[1]), .Y(un10_oioOo_1_Z) ); defparam un10_oioOo_1.INIT=4'h6; // @28:534924 CFG2 IO0Oo7 ( .A(O1011_1z), .B(Io011_1z), .Y(IO0Oo7_Z) ); defparam IO0Oo7.INIT=4'h8; // @28:528611 CFG2 o0oOo ( .A(I0Ii1_Z), .B(iIoOo_Z), .Y(o0oOo_Z) ); defparam o0oOo.INIT=4'hD; // @28:475474 CFG2 \O1iO1_RNO[24] ( .A(OOIIo_Z), .B(o1iO1_Z), .Y(i1_i_13) ); defparam \O1iO1_RNO[24] .INIT=4'h8; // @28:475474 CFG2 \O1iO1_RNO[11] ( .A(OOIIo_Z), .B(OooOo_Z[11]), .Y(i1_i_7) ); defparam \O1iO1_RNO[11] .INIT=4'h8; // @28:475474 CFG2 \O1iO1_RNO[1] ( .A(OOIIo_Z), .B(OooOo_Z[1]), .Y(i1_i_4) ); defparam \O1iO1_RNO[1] .INIT=4'h8; // @28:528327 CFG2 IloOo_2 ( .A(iIoOo_Z), .B(IloOo_Z), .Y(IloOo_2_Z) ); defparam IloOo_2.INIT=4'h2; // @28:526596 CFG2 un20_il0Oo ( .A(ll0Oo_Z), .B(ol0Oo_Z), .Y(un20_il0Oo_Z) ); defparam un20_il0Oo.INIT=4'hE; // @28:526279 CFG2 II0Oo_2 ( .A(Oo0Oo_Z), .B(i10Oo_Z), .Y(II0Oo_2_Z) ); defparam II0Oo_2.INIT=4'hE; // @28:528060 CFG2 un1_OIoOo_1 ( .A(OIIi1_Z), .B(O00Oo_Z), .Y(un1_OIoOo_1_Z) ); defparam un1_OIoOo_1.INIT=4'h8; // @28:531131 CFG2 \un1_OoiOo_1[7] ( .A(I0Ii1_Z), .B(l0Ii1_Z), .Y(un1_OoiOo_1_Z[7]) ); defparam \un1_OoiOo_1[7] .INIT=4'h8; // @28:526689 CFG2 I00Oo_0_a2_0_1 ( .A(OIIi1_Z), .B(O00Oo_Z), .Y(N_665_1) ); defparam I00Oo_0_a2_0_1.INIT=4'h4; // @28:528748 CFG2 un2_o1oOo_3 ( .A(OooOo_Z[4]), .B(OooOo_Z[5]), .Y(un2_o1oOo_3_Z) ); defparam un2_o1oOo_3.INIT=4'h8; // @28:513733 CFG3 \un1_iO1Oo[0] ( .A(i0iO1_1z), .B(iO1Oo_Z), .C(II1Oo_Z), .Y(un1_iO1Oo_Z[0]) ); defparam \un1_iO1Oo[0] .INIT=8'h5C; // @28:533407 CFG3 o0OIo_0_a3_0_1 ( .A(OliO1_Z), .B(oI0Oo_Z), .C(i1OIo_Z), .Y(o0OIo_0_a3_0_1_Z) ); defparam o0OIo_0_a3_0_1.INIT=8'h04; // @28:475474 CFG4 O00Oo_RNIAR34C ( .A(OooOo_Z[8]), .B(OooOo_Z[1]), .C(O00Oo_Z), .D(O1011_1z), .Y(m49_3) ); defparam O00Oo_RNIAR34C.INIT=16'h8000; // @28:475474 CFG4 \OooOo_RNID63E9[10] ( .A(OooOo_Z[13]), .B(OooOo_Z[12]), .C(OooOo_Z[10]), .D(OooOo_Z[9]), .Y(m44_0_3) ); defparam \OooOo_RNID63E9[10] .INIT=16'h0001; // @28:475474 CFG3 o1iOo_RNI09I8B ( .A(OooOo_Z[15]), .B(o1iOo_Z), .C(OooOo_Z[5]), .Y(m44_0_2) ); defparam o1iOo_RNI09I8B.INIT=8'h04; // @28:529411 CFG2 \lOiOo_i_o2_0[3] ( .A(CO1_2), .B(oOiOo_Z[2]), .Y(lOiOo_i_o2_0_Z[3]) ); defparam \lOiOo_i_o2_0[3] .INIT=4'h7; // @28:528930 CFG4 ioIi1_0 ( .A(OooOo_Z[0]), .B(OooOo_Z[1]), .C(OooOo_Z[3]), .D(OooOo_Z[2]), .Y(ioIi1_0_Z) ); defparam ioIi1_0.INIT=16'h0002; // @28:534157 CFG4 un2_Ol0i1_5 ( .A(OooOo_Z[5]), .B(OooOo_Z[6]), .C(OooOo_Z[3]), .D(OooOo_Z[2]), .Y(un2_Ol0i1_5_Z) ); defparam un2_Ol0i1_5.INIT=16'h0001; // @28:534157 CFG3 un2_Ol0i1_3 ( .A(OooOo_Z[1]), .B(OooOo_Z[15]), .C(OooOo_Z[4]), .Y(un2_Ol0i1_3_Z) ); defparam un2_Ol0i1_3.INIT=8'h20; // @28:529275 CFG4 un6_oioOo_2 ( .A(iIl11_1z[5]), .B(iIl11_1z[0]), .C(OooOo_Z[5]), .D(OooOo_Z[0]), .Y(un6_oioOo_2_Z) ); defparam un6_oioOo_2.INIT=16'h8421; // @28:529275 CFG4 un6_oioOo_1 ( .A(iIl11_1z[4]), .B(iIl11_1z[3]), .C(OooOo_Z[4]), .D(OooOo_Z[3]), .Y(un6_oioOo_1_Z) ); defparam un6_oioOo_1.INIT=16'h8421; // @28:527142 CFG4 un6_ii0Oolto15_5 ( .A(OooOo_Z[6]), .B(OooOo_Z[15]), .C(OooOo_Z[11]), .D(OooOo_Z[10]), .Y(un6_ii0Oolto15_5_Z) ); defparam un6_ii0Oolto15_5.INIT=16'h0001; // @28:527142 CFG4 un6_ii0Oolto15_4 ( .A(OooOo_Z[9]), .B(OooOo_Z[8]), .C(OooOo_Z[7]), .D(OooOo_Z[12]), .Y(un6_ii0Oolto15_4_Z) ); defparam un6_ii0Oolto15_4.INIT=16'h0001; // @28:475474 CFG2 \OooOo_RNIFGDL9[11] ( .A(OooOo_Z[11]), .B(iIl0112), .Y(m41_0) ); defparam \OooOo_RNIFGDL9[11] .INIT=4'h8; // @28:533461 CFG3 O0li1_1 ( .A(oI0Oo_Z), .B(OIl11_Z), .C(I1011), .Y(O0li1_1_Z) ); defparam O0li1_1.INIT=8'h01; // @28:475474 CFG4 \OooOo_RNIF83E9[7] ( .A(OooOo_Z[7]), .B(OooOo_Z[13]), .C(OooOo_Z[12]), .D(OooOo_Z[14]), .Y(m22_0_1_0) ); defparam \OooOo_RNIF83E9[7] .INIT=16'h0001; // @28:534153 CFG4 Ol0i1_m2_e_5 ( .A(OooOo_Z[14]), .B(o1iOo_Z), .C(OooOo_Z[15]), .D(OooOo_Z[0]), .Y(Ol0i1_m2_e_5_Z) ); defparam Ol0i1_m2_e_5.INIT=16'h0004; // @28:534153 CFG4 Ol0i1_m2_e_4 ( .A(OooOo_Z[13]), .B(OooOo_Z[12]), .C(OooOo_Z[9]), .D(OooOo_Z[8]), .Y(Ol0i1_m2_e_4_Z) ); defparam Ol0i1_m2_e_4.INIT=16'h0001; // @28:529126 CFG4 un2_OioOo_2 ( .A(lioOo_Z[15]), .B(lioOo_Z[14]), .C(lioOo_Z[13]), .D(lioOo_Z[12]), .Y(un2_OioOo_2_Z) ); defparam un2_OioOo_2.INIT=16'h8000; // @28:475474 CFG4 \OooOo_RNI0O9V9[7] ( .A(OooOo_Z[7]), .B(OooOo_Z[6]), .C(OooOo_Z[4]), .D(OooOo_Z[3]), .Y(m34_0_2) ); defparam \OooOo_RNI0O9V9[7] .INIT=16'h0100; // @28:528748 CFG4 un2_o1oOo_5 ( .A(OooOo_Z[13]), .B(OooOo_Z[11]), .C(OooOo_Z[10]), .D(OooOo_Z[8]), .Y(un2_o1oOo_5_Z) ); defparam un2_o1oOo_5.INIT=16'h8000; // @28:475474 CFG4 \OooOo_RNIC53E9[11] ( .A(OooOo_Z[15]), .B(OooOo_Z[3]), .C(OooOo_Z[11]), .D(OooOo_Z[14]), .Y(m32_7) ); defparam \OooOo_RNIC53E9[11] .INIT=16'h0001; // @28:534093 CFG4 un20_oI0i1_4_0 ( .A(OooOo_Z[4]), .B(OooOo_Z[15]), .C(OooOo_Z[14]), .D(OooOo_Z[5]), .Y(un20_oI0i1_4_0_Z) ); defparam un20_oI0i1_4_0.INIT=16'hFFFE; // @28:534093 CFG4 un20_oI0i1_3_0 ( .A(OooOo_Z[13]), .B(OooOo_Z[12]), .C(OooOo_Z[9]), .D(OooOo_Z[8]), .Y(un20_oI0i1_3_0_Z) ); defparam un20_oI0i1_3_0.INIT=16'hFFFE; // @28:534093 CFG4 un20_oI0i1_2_0 ( .A(o1iOo_Z), .B(OooOo_Z[11]), .C(OooOo_Z[10]), .D(OooOo_Z[3]), .Y(un20_oI0i1_2_0_Z) ); defparam un20_oI0i1_2_0.INIT=16'hFFFD; // @28:526689 CFG4 I00Oo_0_a2_1 ( .A(OIIi1_Z), .B(iIoOo_Z), .C(l00Oo_Z), .D(un7_il0Oo_cry_6_Z), .Y(I00Oo_0_a2_1_Z) ); defparam I00Oo_0_a2_1.INIT=16'h1030; // @28:475474 CFG4 iIoOo_RNO_2 ( .A(O0oOo_Z[4]), .B(l00Oo_Z), .C(O0oOo_Z[6]), .D(O0oOo_Z[5]), .Y(m79_2) ); defparam iIoOo_RNO_2.INIT=16'h0004; // @28:529946 CFG4 IliOo_NE_4 ( .A(iIiOo_Z[9]), .B(iIiOo_Z[8]), .C(l0iOo_Z[9]), .D(l0iOo_Z[8]), .Y(IliOo_NE_4_Z) ); defparam IliOo_NE_4.INIT=16'h7BDE; // @28:529946 CFG4 IliOo_NE_3 ( .A(iIiOo_Z[7]), .B(iIiOo_Z[6]), .C(l0iOo_Z[7]), .D(l0iOo_Z[6]), .Y(IliOo_NE_3_Z) ); defparam IliOo_NE_3.INIT=16'h7BDE; // @28:529946 CFG4 IliOo_NE_2 ( .A(iIiOo_Z[5]), .B(iIiOo_Z[4]), .C(l0iOo_Z[5]), .D(l0iOo_Z[4]), .Y(IliOo_NE_2_Z) ); defparam IliOo_NE_2.INIT=16'h7BDE; // @28:529946 CFG4 IliOo_NE_1 ( .A(iIiOo_Z[3]), .B(iIiOo_Z[2]), .C(l0iOo_Z[3]), .D(l0iOo_Z[2]), .Y(IliOo_NE_1_Z) ); defparam IliOo_NE_1.INIT=16'h7BDE; // @28:475474 CFG3 \OooOo_RNI9K8U6[10] ( .A(OooOo_Z[13]), .B(OooOo_Z[12]), .C(OooOo_Z[10]), .Y(m9_0) ); defparam \OooOo_RNI9K8U6[10] .INIT=8'h01; // @28:529553 CFG4 un6_i0oi1_6 ( .A(l0iOo_Z[8]), .B(l0iOo_Z[7]), .C(l0iOo_Z[6]), .D(l0iOo_Z[5]), .Y(un6_i0oi1_6_Z) ); defparam un6_i0oi1_6.INIT=16'h0001; // @28:529553 CFG4 un6_i0oi1_5 ( .A(l0iOo_Z[4]), .B(l0iOo_Z[3]), .C(l0iOo_Z[2]), .D(l0iOo_Z[1]), .Y(un6_i0oi1_5_Z) ); defparam un6_i0oi1_5.INIT=16'h0001; // @28:526702 CFG4 un6_I00Oo_4 ( .A(O0oOo_Z[5]), .B(O0oOo_Z[3]), .C(O0oOo_Z[2]), .D(O0oOo_Z[1]), .Y(un6_I00Oo_4_Z) ); defparam un6_I00Oo_4.INIT=16'hFFFE; // @28:526578 CFG4 un15_il0Oo_4_0_4 ( .A(i1_i_8), .B(lioOo_Z[7]), .C(lioOo_Z[6]), .D(lioOo_Z[4]), .Y(un15_il0Oo_4_0_4_Z) ); defparam un15_il0Oo_4_0_4.INIT=16'h8000; // @28:530399 CFG4 O0iOo_5 ( .A(O1oi1_Z[7]), .B(O1oi1_Z[5]), .C(O1oi1_Z[4]), .D(O1oi1_Z[2]), .Y(O0iOo_5_Z) ); defparam O0iOo_5.INIT=16'h0001; // @28:530745 CFG3 IOIIo_0_a3_0 ( .A(un20_il0Oo_Z), .B(l1011), .C(oI0Oo_Z), .Y(IOIIo_0_a3_0_0) ); defparam IOIIo_0_a3_0.INIT=8'h04; // @28:530203 CFG4 IiI11_i_o2_5 ( .A(O1oi1_Z[7]), .B(O1oi1_Z[6]), .C(O1oi1_Z[3]), .D(O1oi1_Z[1]), .Y(IiI11_i_o2_5_Z) ); defparam IiI11_i_o2_5.INIT=16'h7FFF; // @28:530203 CFG4 IiI11_i_o2_4 ( .A(O1oi1_Z[8]), .B(O1oi1_Z[5]), .C(O1oi1_Z[4]), .D(O1oi1_Z[2]), .Y(IiI11_i_o2_4_Z) ); defparam IiI11_i_o2_4.INIT=16'h7FFF; // @28:529553 CFG4 OliOo_6 ( .A(iIiOo_Z[7]), .B(iIiOo_Z[6]), .C(iIiOo_Z[5]), .D(iIiOo_Z[4]), .Y(OliOo_6_Z) ); defparam OliOo_6.INIT=16'h0001; // @28:529553 CFG4 OliOo_5 ( .A(iIiOo_Z[3]), .B(iIiOo_Z[2]), .C(iIiOo_Z[1]), .D(iIiOo_Z[0]), .Y(OliOo_5_Z) ); defparam OliOo_5.INIT=16'h0001; // @28:475474 CFG4 \lOoO1_RNII9FRC[2] ( .A(lOoO1_Z[5]), .B(lOoO1_Z[3]), .C(lOoO1_Z[2]), .D(lOoO1_Z[0]), .Y(m53_e_0_5) ); defparam \lOoO1_RNII9FRC[2] .INIT=16'h8000; // @28:475474 CFG4 \lOoO1_RNIQHFRC[1] ( .A(lOoO1_Z[7]), .B(lOoO1_Z[6]), .C(lOoO1_Z[4]), .D(lOoO1_Z[1]), .Y(m53_e_0_4) ); defparam \lOoO1_RNIQHFRC[1] .INIT=16'h8000; // @28:529493 CFG4 iOiOo_NE_1 ( .A(Oll11_1z[0]), .B(Oll11_1z[3]), .C(oOiOo_Z[3]), .D(CO0_2), .Y(iOiOo_NE_1_Z) ); defparam iOiOo_NE_1.INIT=16'h7DBE; // @28:529493 CFG4 iOiOo_NE_0 ( .A(Oll11_1z[1]), .B(Oll11_1z[2]), .C(oOiOo_Z[2]), .D(oOiOo_Z[1]), .Y(iOiOo_NE_0_Z) ); defparam iOiOo_NE_0.INIT=16'h7DBE; // @28:529553 CFG4 un16_OIiOo_6 ( .A(IIiOo_Z[6]), .B(IIiOo_Z[5]), .C(IIiOo_Z[3]), .D(IIiOo_Z[7]), .Y(un16_OIiOo_6_Z) ); defparam un16_OIiOo_6.INIT=16'h0001; // @28:529553 CFG4 un16_OIiOo_5 ( .A(IIiOo_Z[11]), .B(IIiOo_Z[10]), .C(IIiOo_Z[4]), .D(IIiOo_Z[2]), .Y(un16_OIiOo_5_Z) ); defparam un16_OIiOo_5.INIT=16'h0001; // @28:526606 CFG3 un22_il0Oo_0_a2_1 ( .A(oI0Oo_Z), .B(l1011), .C(Oo0Oo_Z), .Y(un22_il0Oo_0_a2_1_Z) ); defparam un22_il0Oo_0_a2_1.INIT=8'h40; // @28:528060 CFG3 un1_OIoOo_1_0 ( .A(O1011_1z), .B(IIoOo_Z), .C(Oo011_1z), .Y(un1_OIoOo_1_0_Z) ); defparam un1_OIoOo_1_0.INIT=8'h02; // @28:475474 CFG4 I00i1_RNO_2 ( .A(ll0i1_Z[5]), .B(ll0i1_Z[4]), .C(ll0i1_Z[1]), .D(ll0i1_Z[0]), .Y(m78_e_11) ); defparam I00i1_RNO_2.INIT=16'h0001; // @28:475474 CFG4 I00i1_RNO_3 ( .A(ll0i1_Z[15]), .B(ll0i1_Z[14]), .C(ll0i1_Z[9]), .D(ll0i1_Z[8]), .Y(m78_e_10) ); defparam I00i1_RNO_3.INIT=16'h0200; // @28:475474 CFG4 I00i1_RNO_5 ( .A(ll0i1_Z[7]), .B(ll0i1_Z[6]), .C(ll0i1_Z[3]), .D(ll0i1_Z[2]), .Y(m78_e_9) ); defparam I00i1_RNO_5.INIT=16'h0001; // @28:475474 CFG4 I00i1_RNO_4 ( .A(ll0i1_Z[13]), .B(ll0i1_Z[12]), .C(ll0i1_Z[11]), .D(ll0i1_Z[10]), .Y(m78_e_8) ); defparam I00i1_RNO_4.INIT=16'h0001; // @28:526409 CFG3 un2_Ol0Oo_1 ( .A(oOl11), .B(lOl11), .C(o1011), .Y(un2_Ol0Oo_1_Z) ); defparam un2_Ol0Oo_1.INIT=8'hFE; // @28:529814 CFG3 \un24_oIiOo_1.CO3 ( .A(oOiOo_Z[1]), .B(oOiOo_Z[2]), .C(oOiOo_Z[3]), .Y(N_355) ); defparam \un24_oIiOo_1.CO3 .INIT=8'h01; // @28:526864 CFG4 un3_OlIi1 ( .A(ANB3), .B(ANB1), .C(CO0), .D(ANB2), .Y(un3_OlIi1_Z) ); defparam un3_OlIi1.INIT=16'hFFFE; // @28:526559 CFG3 un8_il0Oo ( .A(O1011_1z), .B(O0Ii1_Z), .C(OIIi1_Z), .Y(un8_il0Oo_Z) ); defparam un8_il0Oo.INIT=8'h40; // @28:526351 CFG4 un3_iI0Oo ( .A(oioO1), .B(lOl11), .C(o1011), .D(iioO1), .Y(un3_iI0Oo_Z) ); defparam un3_iI0Oo.INIT=16'hFEFC; // @28:529126 CFG4 un2_OioOo_11 ( .A(lioOo_Z[11]), .B(lioOo_Z[10]), .C(lioOo_Z[9]), .D(lioOo_Z[8]), .Y(un2_OioOo_11_Z) ); defparam un2_OioOo_11.INIT=16'h8000; // @28:529637 CFG3 lIiOo ( .A(li1Oo_Z), .B(Oo1Oo_Z[3]), .C(oI1Oo_Z), .Y(lIiOo_Z) ); defparam lIiOo.INIT=8'h80; // @28:527558 CFG4 \i11Oo_0_a3_4[3] ( .A(Oo1Oo_Z[0]), .B(Oo1Oo_Z[2]), .C(Oo1Oo_Z[3]), .D(Oo1Oo_Z[1]), .Y(N_730_4) ); defparam \i11Oo_0_a3_4[3] .INIT=16'h0001; // @28:526587 CFG2 un17_il0Oo_0 ( .A(i10Oo_Z), .B(iIl0112), .Y(un3_oO1Oo) ); defparam un17_il0Oo_0.INIT=4'h8; // @28:527811 CFG3 Oi1Oo_1_0_tz ( .A(Oo0Oo_Z), .B(OO1Oo_Z), .C(i10Oo_Z), .Y(Oi1Oo_1_0_tz_Z) ); defparam Oi1Oo_1_0_tz.INIT=8'hFE; // @28:529793 CFG3 \un31_oIiOo_1.oIiOo_RNO[3] ( .A(oOiOo_Z[3]), .B(CO1_2), .C(oOiOo_Z[2]), .Y(N_360) ); defparam \un31_oIiOo_1.oIiOo_RNO[3] .INIT=8'h01; // @28:528422 CFG3 un35_iloOo_ac0_3 ( .A(oIl11[4]), .B(oIl11[3]), .C(oIl11[2]), .Y(un35_iloOo_c3) ); defparam un35_iloOo_ac0_3.INIT=8'h80; // @28:529056 CFG3 iOli1_10 ( .A(OooOo_Z[4]), .B(un20_oI0i1_3_Z), .C(OooOo_Z[5]), .Y(iOli1_10_Z) ); defparam iOli1_10.INIT=8'h01; // @28:528683 CFG3 \I1oOo_RNI8T7D[1] ( .A(ANB2), .B(ANB1), .C(CO0), .Y(N_160_i) ); defparam \I1oOo_RNI8T7D[1] .INIT=8'h56; // @28:530188 CFG3 \un95_lliOo_1.CO2 ( .A(l0l11[2]), .B(l0l11[1]), .C(l0l11[0]), .Y(ANC2) ); defparam \un95_lliOo_1.CO2 .INIT=8'h01; // @28:529730 CFG3 \un52_oIiOo_1.CO3 ( .A(oOiOo_Z[1]), .B(oOiOo_Z[2]), .C(oOiOo_Z[3]), .Y(N_375) ); defparam \un52_oIiOo_1.CO3 .INIT=8'h07; // @28:529835 CFG3 \un17_oIiOo_1.CO2 ( .A(CO0_2), .B(oOiOo_Z[1]), .C(oOiOo_Z[2]), .Y(N_1925) ); defparam \un17_oIiOo_1.CO2 .INIT=8'h01; // @28:529972 CFG3 \un6_lliOo_1.CO3 ( .A(l0l11[3]), .B(l0l11[2]), .C(l0l11[1]), .Y(N_430) ); defparam \un6_lliOo_1.CO3 .INIT=8'h57; // @28:530252 CFG2 un13_i0oi1 ( .A(iIl0112), .B(ooIO1_0), .Y(un13_i0oi1_Z) ); defparam un13_i0oi1.INIT=4'hB; // @28:529516 CFG3 \OIiOo[10] ( .A(liI11), .B(l1l11), .C(IIiOo_Z[5]), .Y(OIiOo_Z[10]) ); defparam \OIiOo[10] .INIT=8'h32; // @28:534907 CFG2 IO0Oo_3 ( .A(IO0Oo7_Z), .B(o1011), .Y(IO0Oo_3_Z) ); defparam IO0Oo_3.INIT=4'h8; // @28:534924 CFG2 un1_IO0Oo7 ( .A(IO0Oo7_Z), .B(i0iO1_1z), .Y(un1_IO0Oo7_Z) ); defparam un1_IO0Oo7.INIT=4'hE; // @28:526413 CFG3 un3_Ol0Oo ( .A(oioO1), .B(iioO1), .C(lioO1), .Y(un3_Ol0Oo_Z) ); defparam un3_Ol0Oo.INIT=8'hA8; // @28:527558 CFG2 \i11Oo_0_o3[3] ( .A(oI1Oo_Z), .B(iIl0112), .Y(N_693) ); defparam \i11Oo_0_o3[3] .INIT=4'hD; // @28:475474 CFG3 m67_0 ( .A(IIl11[3]), .B(IIl11[2]), .C(iIl0112), .Y(N_845) ); defparam m67_0.INIT=8'h06; // @28:475474 CFG3 m66 ( .A(oIl11[3]), .B(oIl11[2]), .C(iIl0112), .Y(N_844) ); defparam m66.INIT=8'h06; // @28:475474 CFG2 m16_0 ( .A(iIl0112), .B(IIl11[3]), .Y(N_17_0) ); defparam m16_0.INIT=4'h2; // @28:475474 CFG2 m12_0 ( .A(iIl0112), .B(oIl11[3]), .Y(N_13_0) ); defparam m12_0.INIT=4'h2; // @28:529516 CFG3 \OIiOo[8] ( .A(liI11), .B(l1l11), .C(IIiOo_Z[3]), .Y(OIiOo_Z[8]) ); defparam \OIiOo[8] .INIT=8'h32; // @28:529516 CFG3 \OIiOo[9] ( .A(liI11), .B(l1l11), .C(IIiOo_Z[4]), .Y(OIiOo_Z[9]) ); defparam \OIiOo[9] .INIT=8'h32; // @28:529516 CFG3 \OIiOo[11] ( .A(liI11), .B(l1l11), .C(IIiOo_Z[6]), .Y(OIiOo_Z[11]) ); defparam \OIiOo[11] .INIT=8'h32; // @28:475474 CFG3 \OooOo_RNI7HN97[14] ( .A(OooOo_Z[14]), .B(OooOo_Z[1]), .C(OooOo_Z[0]), .Y(N_27_0) ); defparam \OooOo_RNI7HN97[14] .INIT=8'h10; // @28:527142 CFG2 un6_ii0Oolto2 ( .A(N_97_i), .B(OooOo_Z[2]), .Y(un6_ii0Oolt5) ); defparam un6_ii0Oolto2.INIT=4'h1; // @28:513733 CFG3 \un1_IO1Oo_0[0] ( .A(Oo0Oo_Z), .B(lO1Oo_Z), .C(OO1Oo_Z), .Y(un1_IO1Oo_0_Z[0]) ); defparam \un1_IO1Oo_0[0] .INIT=8'h35; // @28:531170 CFG2 \un15_OoiOo[1] ( .A(II0Oo_2_Z), .B(i0011[1]), .Y(un15_OoiOo_Z[1]) ); defparam \un15_OoiOo[1] .INIT=4'h8; // @28:531170 CFG2 \un15_OoiOo[5] ( .A(II0Oo_2_Z), .B(i0011[5]), .Y(un15_OoiOo_Z[5]) ); defparam \un15_OoiOo[5] .INIT=4'h8; // @28:475474 CFG4 \O0oOo_RNO[2] ( .A(N_665_1), .B(un60_iloOo_cry_2_S), .C(l00Oo_Z), .D(N_839), .Y(iloOo[2]) ); defparam \O0oOo_RNO[2] .INIT=16'hEA40; // @28:475474 CFG4 \O0oOo_RNO[0] ( .A(O0oOo_Z[0]), .B(l00Oo_Z), .C(N_665_1), .D(N_853), .Y(iloOo[0]) ); defparam \O0oOo_RNO[0] .INIT=16'hF404; // @28:475474 CFG4 \O0oOo_RNO[1] ( .A(N_665_1), .B(un60_iloOo_cry_1_S), .C(l00Oo_Z), .D(N_847), .Y(iloOo[1]) ); defparam \O0oOo_RNO[1] .INIT=16'hEA40; // @28:475474 CFG4 \O0oOo_RNO[3] ( .A(N_665_1), .B(un60_iloOo_cry_3_S), .C(l00Oo_Z), .D(N_831), .Y(iloOo[3]) ); defparam \O0oOo_RNO[3] .INIT=16'hEA40; // @28:513733 CFG3 \un1_Oo1Oo_i_m3[0] ( .A(iIl0112), .B(Oo1Oo_Z[0]), .C(Oo1Oo_Z[1]), .Y(un1_Oo1Oo[0]) ); defparam \un1_Oo1Oo_i_m3[0] .INIT=8'hE4; // @28:528008 CFG4 oOoOo_0 ( .A(IOI11), .B(O00Oo_Z), .C(iOoOo_Z), .D(I0Ii1_Z), .Y(oOoOo) ); defparam oOoOo_0.INIT=16'hBFBA; // @28:475474 CFG4 \OooOo_RNIAJD3M[0] ( .A(OooOo_Z[0]), .B(OooOo_Z[4]), .C(m49_3), .D(m49_2), .Y(m49_5) ); defparam \OooOo_RNIAJD3M[0] .INIT=16'h8000; // @28:526532 CFG4 il0Oo_0 ( .A(OIIi1_Z), .B(un8_il0Oo_Z), .C(l1I11_1z), .D(O00Oo_Z), .Y(il0Oo_0_Z) ); defparam il0Oo_0.INIT=16'hEFCC; // @28:534076 CFG4 un16_oI0i1_1 ( .A(OooOo_Z[0]), .B(o1iOo_Z), .C(un13_oI0i1_1_Z), .D(OooOo_Z[3]), .Y(un16_oI0i1_1_Z) ); defparam un16_oI0i1_1.INIT=16'h0040; // @28:528930 CFG2 ioIi1_1 ( .A(iOli1_10_Z), .B(ioIi1_0_Z), .Y(ioIi1_1_Z) ); defparam ioIi1_1.INIT=4'h8; CFG4 oI0i1_RNO_1 ( .A(OooOo_Z[3]), .B(oI0i1_1459_0), .C(OooOo_Z[6]), .D(OooOo_Z[5]), .Y(oI0i1_1459_2) ); defparam oI0i1_RNO_1.INIT=16'h0004; // @28:527294 CFG4 un14_oO1Oo_5 ( .A(OooOo_Z[0]), .B(OooOo_Z[15]), .C(OooOo_Z[3]), .D(un2_o1oOo_3_Z), .Y(un14_oO1Oo_5_Z) ); defparam un14_oO1Oo_5.INIT=16'h2000; // @28:534157 CFG4 un2_Ol0i1_4 ( .A(I00i1_Z), .B(o1iOo_Z), .C(OooOo_Z[0]), .D(un2_Ol0i1_3_Z), .Y(un2_Ol0i1_4_Z) ); defparam un2_Ol0i1_4.INIT=16'h0800; // @28:529275 CFG4 un6_oioOo_3 ( .A(oI0Oo_Z), .B(iIl11_1z[2]), .C(un10_oioOo_1_Z), .D(OooOo_Z[2]), .Y(un6_oioOo_3_Z) ); defparam un6_oioOo_3.INIT=16'h0401; // @28:534625 CFG4 un2_lIIIo_0_o3_1 ( .A(i1OIo_Z), .B(OliO1_Z), .C(li1Oo_Z), .D(O0OIo_Z), .Y(un2_lIIIo_0_o3_1_Z) ); defparam un2_lIIIo_0_o3_1.INIT=16'hFF2F; // @28:534153 CFG4 Ol0i1_m2_e_3 ( .A(OooOo_Z[11]), .B(OooOo_Z[10]), .C(OooOo_Z[1]), .D(Ol0i1_m2_e_0_0_Z), .Y(Ol0i1_m2_e_3_Z) ); defparam Ol0i1_m2_e_3.INIT=16'h1000; // @28:475474 CFG4 un20_oI0i1_3_RNI81TOD ( .A(I00i1_Z), .B(OooOo_Z[4]), .C(OooOo_Z[3]), .D(un20_oI0i1_3_Z), .Y(m30_0_2) ); defparam un20_oI0i1_3_RNI81TOD.INIT=16'h0008; // @28:528748 CFG4 un2_o1oOo_7 ( .A(OooOo_Z[12]), .B(OooOo_Z[14]), .C(OooOo_Z[15]), .D(un2_o1oOo_5_Z), .Y(un2_o1oOo_7_Z) ); defparam un2_o1oOo_7.INIT=16'h8000; // @28:529655 CFG4 \un31_oIiOo_1.un1_oIiOo_0[1] ( .A(l0l11[2]), .B(l0l11[1]), .C(lliOo[8]), .D(IIiOo_Z[2]), .Y(un1_oIiOo_0[1]) ); defparam \un31_oIiOo_1.un1_oIiOo_0[1] .INIT=16'hFE00; // @28:529655 CFG4 \un1_oIiOo_0[5] ( .A(l0l11[2]), .B(l0l11[1]), .C(lliOo[8]), .D(IIiOo_Z[6]), .Y(un1_oIiOo_0_Z[5]) ); defparam \un1_oIiOo_0[5] .INIT=16'hF800; // @28:529946 CFG4 IliOo_NE_5 ( .A(iIiOo_Z[1]), .B(l0iOo_Z[1]), .C(IliOo_0), .D(IliOo_NE_1_Z), .Y(IliOo_NE_5_Z) ); defparam IliOo_NE_5.INIT=16'hFFF6; // @28:529655 CFG3 \un31_oIiOo_1.un1_oIiOo_0[3] ( .A(l0l11[2]), .B(lliOo[8]), .C(IIiOo_Z[4]), .Y(un1_oIiOo_0[3]) ); defparam \un31_oIiOo_1.un1_oIiOo_0[3] .INIT=8'hE0; // @28:530399 CFG4 O0iOo_7 ( .A(lOoOo_Z), .B(O0iOo_5_Z), .C(O1oi1_Z[8]), .D(O1oi1_Z[3]), .Y(O0iOo_7_Z) ); defparam O0iOo_7.INIT=16'h0008; // @28:527048 CFG4 o10Oo_3 ( .A(iIl0112), .B(I1OIo_Z), .C(i10Oo_Z), .D(l1011), .Y(o10Oo_3_Z) ); defparam o10Oo_3.INIT=16'h1030; // @28:526578 CFG4 un15_il0Oo_4_0 ( .A(i1_i_9), .B(i1_i_10), .C(un15_il0Oo_4_0_4_Z), .D(un15_il0Oo_4_0_3_Z), .Y(un2_OioOo_1_0) ); defparam un15_il0Oo_4_0.INIT=16'h8000; // @28:533888 CFG4 iiOIo ( .A(ioOIo_Z), .B(o1OIo_Z), .C(iiOIo_1_Z), .D(i1OIo_Z), .Y(iiOIo_Z) ); defparam iiOIo.INIT=16'h0010; // @28:526982 CFG4 l10Oo_0_a3_0 ( .A(l1011), .B(Oo0Oo_Z), .C(oI0Oo_Z), .D(O0OIo_Z), .Y(N_735) ); defparam l10Oo_0_a3_0.INIT=16'h0004; // @28:526930 CFG4 IlIi1 ( .A(ANB1), .B(ANB3), .C(IlIi1_1_Z), .D(ANB2), .Y(IlIi1_Z) ); defparam IlIi1.INIT=16'h0010; // @28:529312 CFG4 un17_oioOo ( .A(li1Oo_Z), .B(iO1Oo_Z), .C(iIl0112), .D(oI1Oo_Z), .Y(un17_oioOo_Z) ); defparam un17_oioOo.INIT=16'h4440; // @28:526702 CFG4 un6_I00Oo ( .A(O0oOo_Z[0]), .B(un6_I00Oo_4_Z), .C(O0oOo_Z[6]), .D(O0oOo_Z[4]), .Y(un6_I00Oo_Z) ); defparam un6_I00Oo.INIT=16'hFFFE; // @28:530986 CFG4 i0OOo_i_a2 ( .A(OO1Oo_Z), .B(iO1Oo_Z), .C(I0Ii1_Z), .D(II0Oo_2_Z), .Y(N_669_3) ); defparam i0OOo_i_a2.INIT=16'hFFFE; // @28:475474 CFG4 \OooOo_RNIF1U1J[10] ( .A(OooOo_Z[10]), .B(OooOo_Z[9]), .C(m22_0_2), .D(m22_0_1_0), .Y(un1_iI0i1_2_0) ); defparam \OooOo_RNIF1U1J[10] .INIT=16'h1000; // @28:527130 CFG4 un1_ii0Oo_2 ( .A(l1011), .B(ll0Oo_Z), .C(II0Oo_2_Z), .D(oI0Oo_Z), .Y(un1_ii0Oo_2_Z) ); defparam un1_ii0Oo_2.INIT=16'h0080; // @28:530088 CFG4 \un31_oIiOo_1.lliOo[5] ( .A(l0l11[2]), .B(l0l11[1]), .C(l0l11[0]), .D(lliOo[8]), .Y(lliOo[5]) ); defparam \un31_oIiOo_1.lliOo[5] .INIT=16'hFFA8; // @28:530184 CFG2 \un31_oIiOo_1.lliOo[1] ( .A(lliOo[8]), .B(ANC2), .Y(lliOo[1]) ); defparam \un31_oIiOo_1.lliOo[1] .INIT=4'hB; CFG3 i0iOo_RNO_0 ( .A(i10Oo_Z), .B(iIl0112), .C(Io011_1z), .Y(N_4973_tz) ); defparam i0iOo_RNO_0.INIT=8'hE2; // @28:528369 CFG3 un8_iloOo_c3 ( .A(IIl11[4]), .B(IIl11[3]), .C(IIl11[2]), .Y(un8_iloOo_c3_Z) ); defparam un8_iloOo_c3.INIT=8'hEA; // @28:533800 CFG4 ooOIo ( .A(lll11), .B(IiOIo_Z), .C(ioOIo_Z), .D(IOoO1_Z), .Y(ooOIo_Z) ); defparam ooOIo.INIT=16'h04F4; // @28:529835 CFG2 \un17_oIiOo_1.CO3 ( .A(N_1925), .B(oOiOo_Z[3]), .Y(N_435) ); defparam \un17_oIiOo_1.CO3 .INIT=4'h2; // @28:529516 CFG4 \OIiOo[4] ( .A(liI11), .B(l1l11), .C(IIiOo_Z[10]), .D(IIiOo_Z[8]), .Y(OIiOo_Z[4]) ); defparam \OIiOo[4] .INIT=16'h2332; // @28:529751 CFG4 \un45_oIiOo_1.CO3 ( .A(CO0_2), .B(oOiOo_Z[1]), .C(oOiOo_Z[2]), .D(oOiOo_Z[3]), .Y(N_370) ); defparam \un45_oIiOo_1.CO3 .INIT=16'h001F; // @28:531131 CFG4 \OoiOo[4] ( .A(I0Ii1_Z), .B(II0Oo_2_Z), .C(iIl0112), .D(i0011[4]), .Y(OoiOo_Z[4]) ); defparam \OoiOo[4] .INIT=16'hECA0; // @28:531131 CFG4 \OoiOo[6] ( .A(I0Ii1_Z), .B(II0Oo_2_Z), .C(iIl0112), .D(i0011[6]), .Y(OoiOo_Z[6]) ); defparam \OoiOo[6] .INIT=16'hECA0; // @28:528786 CFG3 un12_o1oOo ( .A(iO1Oo_Z), .B(iIl0112), .C(oI1Oo_Z), .Y(un12_o1oOo_Z) ); defparam un12_o1oOo.INIT=8'hA8; // @28:529292 CFG2 un11_oioOo_1 ( .A(un3_oO1Oo), .B(Oo0Oo_Z), .Y(un4_o1oOo_1) ); defparam un11_oioOo_1.INIT=4'hE; // @28:529516 CFG4 \OIiOo[1] ( .A(liI11), .B(l1l11), .C(IIiOo_Z[7]), .D(IIiOo_Z[5]), .Y(OIiOo_Z[1]) ); defparam \OIiOo[1] .INIT=16'h2332; // @28:528683 CFG2 \O1oOo_RNO[3] ( .A(N_160_i), .B(ANB2), .Y(CO2) ); defparam \O1oOo_RNO[3] .INIT=4'hE; // @28:526472 CFG3 Il0Oo ( .A(OIl11_0), .B(OIl11_Z), .C(IO0Oo7_Z), .Y(Il0Oo_Z) ); defparam Il0Oo.INIT=8'hAC; // @28:475474 CFG4 m57 ( .A(oIl11[4]), .B(oIl11[3]), .C(oIl11[2]), .D(iIl0112), .Y(N_836) ); defparam m57.INIT=16'h006A; // @28:475474 CFG4 m58_0 ( .A(IIl11[4]), .B(IIl11[3]), .C(IIl11[2]), .D(iIl0112), .Y(N_837) ); defparam m58_0.INIT=16'h0095; // @28:475474 CFG3 m44 ( .A(IIl11[4]), .B(IIl11[3]), .C(iIl0112), .Y(N_824) ); defparam m44.INIT=8'h80; // @28:475474 CFG3 m40 ( .A(oIl11[4]), .B(oIl11[3]), .C(iIl0112), .Y(N_820) ); defparam m40.INIT=8'h80; // @28:529516 CFG4 \OIiOo[2] ( .A(liI11), .B(l1l11), .C(IIiOo_Z[8]), .D(IIiOo_Z[6]), .Y(OIiOo_Z[2]) ); defparam \OIiOo[2] .INIT=16'h2332; // @28:529516 CFG4 \OIiOo[3] ( .A(liI11), .B(l1l11), .C(IIiOo_Z[9]), .D(IIiOo_Z[7]), .Y(OIiOo_Z[3]) ); defparam \OIiOo[3] .INIT=16'h2332; // @28:529516 CFG4 \OIiOo[5] ( .A(liI11), .B(l1l11), .C(IIiOo_Z[11]), .D(IIiOo_Z[9]), .Y(OIiOo_Z[5]) ); defparam \OIiOo[5] .INIT=16'h2332; // @28:531973 CFG4 oO0i1_0_o3 ( .A(OO1Oo_Z), .B(Oo0Oo_Z), .C(iIl0112), .D(lO1Oo_Z), .Y(N_698) ); defparam oO0i1_0_o3.INIT=16'hE0EA; // @28:528196 CFG4 un11_oIoOolto3 ( .A(O0oOo_Z[3]), .B(O0oOo_Z[2]), .C(O0oOo_Z[1]), .D(O0oOo_Z[0]), .Y(un11_oIoOolt6) ); defparam un11_oIoOolto3.INIT=16'hA888; // @28:531131 CFG4 \OoiOo[3] ( .A(un1_OoiOo_1_Z[7]), .B(II0Oo_2_Z), .C(iIl0112), .D(i0011[3]), .Y(OoiOo_Z[3]) ); defparam \OoiOo[3] .INIT=16'hCE0A; // @28:531131 CFG3 \OoiOo[2] ( .A(II0Oo_2_Z), .B(i0011[2]), .C(I0Ii1_Z), .Y(OoiOo_Z[2]) ); defparam \OoiOo[2] .INIT=8'hF8; // @28:531131 CFG3 \OoiOo[0] ( .A(II0Oo_2_Z), .B(i0011[0]), .C(I0Ii1_Z), .Y(OoiOo_Z[0]) ); defparam \OoiOo[0] .INIT=8'hF8; // @28:528775 CFG3 un9_o1oOo ( .A(OO1Oo_Z), .B(iIl0112), .C(lO1Oo_Z), .Y(un9_o1oOo_Z) ); defparam un9_o1oOo.INIT=8'hA8; // @28:531131 CFG4 \OoiOo[7] ( .A(un1_OoiOo_1_Z[7]), .B(II0Oo_2_Z), .C(iIl0112), .D(i0011[7]), .Y(OoiOo_Z[7]) ); defparam \OoiOo[7] .INIT=16'hECA0; // @28:475474 CFG4 \l0oOo_RNO[2] ( .A(lIl11[5]), .B(lIl11[4]), .C(ooIO1_0), .D(iIl0112), .Y(I0oOo[2]) ); defparam \l0oOo_RNO[2] .INIT=16'hA00C; // @28:475474 CFG4 \l0oOo_RNO[3] ( .A(lIl11[6]), .B(lIl11[5]), .C(ooIO1_0), .D(iIl0112), .Y(I0oOo[3]) ); defparam \l0oOo_RNO[3] .INIT=16'hA00C; // @28:513733 CFG3 \un1_I0OIo[0] ( .A(l1OIo_Z), .B(IOoO1_Z), .C(I0OIo_Z), .Y(un1_I0OIo_Z[0]) ); defparam \un1_I0OIo[0] .INIT=8'h72; // @28:475474 CFG4 \l0oOo_RNO[1] ( .A(lIl11[4]), .B(lIl11[3]), .C(ooIO1_0), .D(iIl0112), .Y(I0oOo[1]) ); defparam \l0oOo_RNO[1] .INIT=16'hA00C; // @28:475474 CFG4 \l0oOo_RNO[0] ( .A(lIl11[3]), .B(lIl11[2]), .C(ooIO1_0), .D(iIl0112), .Y(I0oOo[0]) ); defparam \l0oOo_RNO[0] .INIT=16'hA00C; // @28:475474 CFG3 m64_0 ( .A(IIl11[4]), .B(IIl11[3]), .C(iIl0112), .Y(N_842) ); defparam m64_0.INIT=8'h60; // @28:475474 CFG3 m63_0 ( .A(oIl11[4]), .B(oIl11[3]), .C(iIl0112), .Y(N_841) ); defparam m63_0.INIT=8'h60; // @28:530825 CFG4 un1_I1iOo_1 ( .A(iOiOo_NE_1_Z), .B(iOiOo_NE_0_Z), .C(oo011), .D(OliO1_Z), .Y(un1_I1iOo_1_Z) ); defparam un1_I1iOo_1.INIT=16'h0E00; // @28:534625 CFG4 un2_lIIIo_0_0 ( .A(ioOIo_Z), .B(OiOIo_Z), .C(II0Oo_2_Z), .D(IOIIo_0_a3_0_0), .Y(un2_lIIIo_0_0_Z) ); defparam un2_lIIIo_0_0.INIT=16'hF888; // @28:527294 CFG4 un14_oO1Oo_6 ( .A(OooOo_Z[2]), .B(OooOo_Z[6]), .C(un14_oO1Oo_5_Z), .D(un14_oO1Oo_0_Z), .Y(un14_oO1Oo_6_Z) ); defparam un14_oO1Oo_6.INIT=16'h1000; // @28:527945 CFG3 un1_IOoOo_0 ( .A(iOiOo_NE_0_Z), .B(OliO1_Z), .C(iOiOo_NE_1_Z), .Y(un1_IOoOo_0_Z) ); defparam un1_IOoOo_0.INIT=8'hC8; // @28:527142 CFG4 un6_ii0Oolto15_7 ( .A(OooOo_Z[14]), .B(OooOo_Z[13]), .C(un6_ii0Oolto15_4_Z), .D(un6_ii0Oolto15_5_Z), .Y(un6_ii0Oolto15_7_Z) ); defparam un6_ii0Oolto15_7.INIT=16'h1000; // @28:528629 CFG4 \O1oOo_0[3] ( .A(I0l11[2]), .B(I0l11[3]), .C(o0oOo_Z), .D(iIl0112), .Y(O1oOo_0_Z[3]) ); defparam \O1oOo_0[3] .INIT=16'hC0A0; // @28:475474 CFG4 \OooOo_RNIALS4H[5] ( .A(OooOo_Z[2]), .B(OooOo_Z[5]), .C(m41_0), .D(OooOo_Z[3]), .Y(m41_3) ); defparam \OooOo_RNIALS4H[5] .INIT=16'h1000; // @28:530666 CFG4 O1iOo_0_0 ( .A(lo011), .B(O1011_1z), .C(IOIIo_0_a3_0_0), .D(II0Oo_2_Z), .Y(O1iOo_0_0_Z) ); defparam O1iOo_0_0.INIT=16'hF222; // @28:528629 CFG4 \O1oOo_0[2] ( .A(N_160_i), .B(o0oOo_Z), .C(I0l11[2]), .D(iIl0112), .Y(O1oOo_0_Z[2]) ); defparam \O1oOo_0[2] .INIT=16'hD111; // @28:528629 CFG4 \O1oOo_0[1] ( .A(CO0), .B(ANB1), .C(o0oOo_Z), .D(un1_O1oOo_Z[1]), .Y(O1oOo_0_Z[1]) ); defparam \O1oOo_0[1] .INIT=16'hFF09; // @28:475474 CFG4 \OooOo_RNITHVJB[10] ( .A(OooOo_Z[5]), .B(OooOo_Z[2]), .C(ooIO1_0), .D(OooOo_Z[10]), .Y(m32_4) ); defparam \OooOo_RNITHVJB[10] .INIT=16'h0800; // @28:534093 CFG4 un20_oI0i1_7_0 ( .A(un20_oI0i1_3_Z), .B(N_97_i), .C(OooOo_Z[2]), .D(un20_oI0i1_2_0_Z), .Y(un20_oI0i1_7_0_Z) ); defparam un20_oI0i1_7_0.INIT=16'hFFEA; // @28:528757 CFG4 un4_o1oOo_0 ( .A(O1011_1z), .B(Oo011_1z), .C(un9_o1oOo_Z), .D(un1_OIoOo_1_Z), .Y(un4_o1oOo_0_Z) ); defparam un4_o1oOo_0.INIT=16'hF2F0; // @28:529135 CFG4 un4_OioOo_2 ( .A(IloOo_Z), .B(Oo0Oo_Z), .C(un3_oO1Oo), .D(un9_o1oOo_Z), .Y(un4_OioOo_2_Z) ); defparam un4_OioOo_2.INIT=16'hFFFE; // @28:529655 CFG4 \un1_oIiOo_0[6] ( .A(l0l11[2]), .B(CO1), .C(lliOo[8]), .D(IIiOo_Z[7]), .Y(un1_oIiOo_0_Z[6]) ); defparam \un1_oIiOo_0[6] .INIT=16'hF200; // @28:529655 CFG4 \un31_oIiOo_1.un1_oIiOo_0[2] ( .A(l0l11[2]), .B(CO1), .C(lliOo[8]), .D(IIiOo_Z[3]), .Y(un1_oIiOo_0[2]) ); defparam \un31_oIiOo_1.un1_oIiOo_0[2] .INIT=16'hFB00; // @28:529553 CFG4 OliOo ( .A(iIiOo_Z[9]), .B(iIiOo_Z[8]), .C(OliOo_6_Z), .D(OliOo_5_Z), .Y(OliOo_Z) ); defparam OliOo.INIT=16'h1000; // @28:530203 CFG3 IiI11_i_o2 ( .A(O1oi1_Z[0]), .B(IiI11_i_o2_5_Z), .C(IiI11_i_o2_4_Z), .Y(N_640) ); defparam IiI11_i_o2.INIT=8'hFD; // @28:530399 CFG4 O0iOo ( .A(O1oi1_Z[6]), .B(O1oi1_Z[1]), .C(O1oi1_Z[0]), .D(O0iOo_7_Z), .Y(O0iOo_Z) ); defparam O0iOo.INIT=16'h0100; // @28:529553 CFG4 un6_i0oi1 ( .A(l0iOo_Z[9]), .B(l0iOo_Z[0]), .C(un6_i0oi1_6_Z), .D(un6_i0oi1_5_Z), .Y(un6_i0oi1_Z) ); defparam un6_i0oi1.INIT=16'h1000; // @28:528629 CFG4 \O1oOo[0] ( .A(CO0), .B(o0oOo_Z), .C(I0l11[0]), .D(iIl0112), .Y(O1oOo_Z[0]) ); defparam \O1oOo[0] .INIT=16'hD1DD; // @28:475474 CFG4 I00i1_RNO_0 ( .A(m78_e_11), .B(m78_e_10), .C(m78_e_8), .D(m78_e_9), .Y(N_793) ); defparam I00i1_RNO_0.INIT=16'h8000; // @28:526587 CFG4 un17_il0Oo ( .A(un20_il0Oo_Z), .B(un3_oO1Oo), .C(l1011), .D(oI0Oo_Z), .Y(un17_il0Oo_Z) ); defparam un17_il0Oo.INIT=16'h0040; // @28:533461 CFG4 O0li1 ( .A(un3_oooOo_0_data_tmp[7]), .B(II0Oo_2_Z), .C(iO1Oo_Z), .D(O0li1_1_Z), .Y(O0li1_Z) ); defparam O0li1.INIT=16'h5400; // @28:529126 CFG3 un2_OioOo ( .A(un2_OioOo_11_Z), .B(un2_OioOo_1_0), .C(un2_OioOo_2_Z), .Y(un2_OioOo_Z) ); defparam un2_OioOo.INIT=8'h80; // @28:529553 CFG4 un16_OIiOo ( .A(IIiOo_Z[8]), .B(IIiOo_Z[9]), .C(un16_OIiOo_6_Z), .D(un16_OIiOo_5_Z), .Y(un16_OIiOo_Z) ); defparam un16_OIiOo.INIT=16'h1000; // @28:527048 CFG4 o10Oo ( .A(oI0Oo_Z), .B(o10Oo_3_Z), .C(l1OIo_Z), .D(I1011), .Y(o10Oo_Z) ); defparam o10Oo.INIT=16'h0004; CFG3 i0iOo_RNO ( .A(l1011), .B(N_4973_tz), .C(oo011), .Y(i0iOo_RNO_Z) ); defparam i0iOo_RNO.INIT=8'h04; CFG4 oI0i1_RNO_2 ( .A(i1iO1_Z), .B(o1iOo_Z), .C(OooOo_Z[1]), .D(OooOo_Z[2]), .Y(N_5306_tz_tz_tz) ); defparam oI0i1_RNO_2.INIT=16'h0880; // @28:533350 CFG3 l0OIo_0_a2 ( .A(iOiOo_NE_0_Z), .B(OliO1_Z), .C(iOiOo_NE_1_Z), .Y(N_742) ); defparam l0OIo_0_a2.INIT=8'h04; // @28:526982 CFG4 l10Oo_0 ( .A(oI0Oo_Z), .B(I0Ii1_Z), .C(un3_OlIi1_Z), .D(N_735), .Y(l10Oo) ); defparam l10Oo_0.INIT=16'hFF04; // @28:529516 CFG4 \OIiOo[7] ( .A(l1l11), .B(liI11), .C(un19_OIiOo_Z), .D(IIiOo_Z[2]), .Y(OIiOo_Z[7]) ); defparam \OIiOo[7] .INIT=16'h4554; // @28:526782 CFG2 un1_iIIi1 ( .A(un6_I00Oo_Z), .B(l00Oo_Z), .Y(un1_iIIi1_Z) ); defparam un1_iIIi1.INIT=4'h4; // @28:475474 CFG3 un35_iloOo_ac0_3_RNIA6V5D ( .A(oIl11[5]), .B(un35_iloOo_c3), .C(iIl0112), .Y(N_828) ); defparam un35_iloOo_ac0_3_RNIA6V5D.INIT=8'h09; // @28:531973 CFG2 oO0i1_0 ( .A(N_698), .B(i10Oo_Z), .Y(oO0i1) ); defparam oO0i1_0.INIT=4'hE; // @28:528060 CFG4 OIoOo ( .A(i0iO1_1z), .B(IIoOo_Z), .C(un1_OIoOo_1_0_Z), .D(un1_OIoOo_1_Z), .Y(OIoOo_Z) ); defparam OIoOo.INIT=16'hF444; // @28:526294 CFG2 lI0Oo_i_a2_0 ( .A(N_669_3), .B(l0Ii1_Z), .Y(N_669) ); defparam lI0Oo_i_a2_0.INIT=4'h1; // @28:475474 CFG4 \OooOo_RNINDHSD[11] ( .A(OooOo_Z[11]), .B(OooOo_Z[14]), .C(OooOo_Z[15]), .D(m9_0), .Y(N_11_0) ); defparam \OooOo_RNINDHSD[11] .INIT=16'h0100; // @28:529367 CFG4 IOiOo_0_a2_0_1 ( .A(OliO1_Z), .B(li1Oo_Z), .C(iO1Oo_Z), .D(un1_Oo1Oo[0]), .Y(IOiOo_0_a2_0_1_Z) ); defparam IOiOo_0_a2_0_1.INIT=16'h8000; // @28:533350 CFG4 l0OIo_0_a3_1 ( .A(iO1Oo_Z), .B(un1_Oo1Oo[0]), .C(o1OIo_Z), .D(li1Oo_Z), .Y(l0OIo_0_a3_1_Z) ); defparam l0OIo_0_a3_1.INIT=16'h0800; // @28:535030 CFG3 \I0IIo[51] ( .A(O1iO1[51]), .B(I00i1_Z), .C(O0IIo_i_m3_Z), .Y(I0IIo_Z[51]) ); defparam \I0IIo[51] .INIT=8'hCA; // @28:535070 CFG3 \I0IIo[32] ( .A(O0IIo_i_m3_Z), .B(O1iO1[32]), .C(lioOo_Z[0]), .Y(I0IIo_Z[32]) ); defparam \I0IIo[32] .INIT=8'hE4; // @28:535070 CFG3 \I0IIo[36] ( .A(O0IIo_i_m3_Z), .B(O1iO1[36]), .C(lioOo_Z[4]), .Y(I0IIo_Z[36]) ); defparam \I0IIo[36] .INIT=8'hE4; // @28:535070 CFG3 \I0IIo[39] ( .A(O0IIo_i_m3_Z), .B(O1iO1[39]), .C(lioOo_Z[7]), .Y(I0IIo_Z[39]) ); defparam \I0IIo[39] .INIT=8'hE4; // @28:535107 CFG3 \I0IIo[29] ( .A(O0IIo_i_m3_Z), .B(O1iO1[29]), .C(i1OIo_Z), .Y(I0IIo_Z[29]) ); defparam \I0IIo[29] .INIT=8'hE4; // @28:535070 CFG3 \I0IIo[43] ( .A(O0IIo_i_m3_Z), .B(O1iO1[43]), .C(lioOo_Z[11]), .Y(I0IIo_Z[43]) ); defparam \I0IIo[43] .INIT=8'hE4; // @28:535147 CFG4 \I0IIo[26] ( .A(IIoOo_Z), .B(O1iO1[26]), .C(O0IIo_i_m3_Z), .D(OOIIo_Z), .Y(I0IIo_Z[26]) ); defparam \I0IIo[26] .INIT=16'hAC0C; // @28:475474 CFG4 m18 ( .A(IIl11[5]), .B(IIl11[4]), .C(N_17_0), .D(iIl0112), .Y(N_19_0) ); defparam m18.INIT=16'h5140; // @28:535244 CFG4 \I0IIo[16] ( .A(CO0_2), .B(O1iO1[16]), .C(O0IIo_i_m3_Z), .D(OOIIo_Z), .Y(I0IIo_Z[16]) ); defparam \I0IIo[16] .INIT=16'hAC0C; // @28:475474 CFG4 oI1Oo_RNO_0 ( .A(i10Oo_Z), .B(un13_i0oi1_Z), .C(iO1Oo_Z), .D(Oo0Oo_Z), .Y(N_9_0_1) ); defparam oI1Oo_RNO_0.INIT=16'h0E02; // @28:526532 CFG4 il0Oo_2 ( .A(OIIi1_Z), .B(l00Oo_Z), .C(un7_il0Oo_cry_6_Z), .D(un17_il0Oo_Z), .Y(il0Oo_2_Z) ); defparam il0Oo_2.INIT=16'hFF80; // @28:534076 CFG4 un16_oI0i1_3 ( .A(un16_oI0i1_1_Z), .B(m53_e_0_4), .C(m53_e_0_5), .D(iOli1_10_Z), .Y(un16_oI0i1_3_Z) ); defparam un16_oI0i1_3.INIT=16'h8000; // @28:529655 CFG4 \un1_oIiOo_1[9] ( .A(N_430), .B(o0l11), .C(oOiOo_Z[3]), .D(IIiOo_Z[10]), .Y(un1_oIiOo_1_Z[9]) ); defparam \un1_oIiOo_1[9] .INIT=16'h7000; // @28:526632 CFG4 un29_il0Oo_1 ( .A(iOiOo_NE_1_Z), .B(iOiOo_NE_0_Z), .C(OliO1_Z), .D(lIoOo_Z), .Y(un29_il0Oo_1_Z) ); defparam un29_il0Oo_1.INIT=16'hFF1F; // @28:529655 CFG4 \un31_oIiOo_1.un1_oIiOo_1[4] ( .A(IIiOo_Z[5]), .B(lliOo[5]), .C(oOiOo_Z[3]), .D(oOiOo_Z[2]), .Y(un1_oIiOo_1[4]) ); defparam \un31_oIiOo_1.un1_oIiOo_1[4] .INIT=16'h8880; // @28:529655 CFG4 \un1_oIiOo_0[8] ( .A(o0l11), .B(l0l11[3]), .C(ANC2), .D(IIiOo_Z[9]), .Y(un1_oIiOo_0_Z[8]) ); defparam \un1_oIiOo_0[8] .INIT=16'h5D00; // @28:528629 CFG4 \O1oOo[1] ( .A(o0oOo_Z), .B(O1oOo_0_Z[1]), .C(I0l11[0]), .D(iIl0112), .Y(O1oOo_Z[1]) ); defparam \O1oOo[1] .INIT=16'hCCEC; // @28:529292 CFG3 un11_oioOo ( .A(un17_oioOo_Z), .B(un9_o1oOo_Z), .C(un4_o1oOo_1), .Y(un11_oioOo_Z) ); defparam un11_oioOo.INIT=8'hFE; // @28:529946 CFG4 IliOo_NE ( .A(IliOo_NE_2_Z), .B(IliOo_NE_5_Z), .C(IliOo_NE_4_Z), .D(IliOo_NE_3_Z), .Y(IliOo_NE_Z) ); defparam IliOo_NE.INIT=16'hFFFE; // @28:528629 CFG4 \O1oOo[2] ( .A(o0oOo_Z), .B(O1oOo_0_Z[2]), .C(I0l11[1]), .D(iIl0112), .Y(O1oOo_Z[2]) ); defparam \O1oOo[2] .INIT=16'hCCEC; // @28:527142 CFG4 un6_ii0Oolto15 ( .A(un2_o1oOo_3_Z), .B(un6_ii0Oolt5), .C(OooOo_Z[3]), .D(un6_ii0Oolto15_7_Z), .Y(un6_ii0Oo) ); defparam un6_ii0Oolto15.INIT=16'hDF00; // @28:475474 CFG4 \OooOo_RNIK7BNS[14] ( .A(OooOo_Z[14]), .B(OooOo_Z[15]), .C(m9_0), .D(m41_3), .Y(N_143_mux) ); defparam \OooOo_RNIK7BNS[14] .INIT=16'h1000; // @28:526782 CFG4 iIIi1 ( .A(OIIi1_Z), .B(O1011_1z), .C(O0Ii1_Z), .D(un1_iIIi1_Z), .Y(iIIi1_Z) ); defparam iIIi1.INIT=16'hFF10; // @28:475474 CFG4 iIoOo_RNO_1 ( .A(un11_oIoOolt6), .B(m79_2), .C(Oo011_1z), .D(O0Ii1_Z), .Y(N_105_mux) ); defparam iIoOo_RNO_1.INIT=16'hB0BB; // @28:527811 CFG2 Oi1Oo_1 ( .A(O0li1_Z), .B(I0OIo_Z), .Y(Oi1Oo_1_Z) ); defparam Oi1Oo_1.INIT=4'hE; // @28:526404 CFG4 Ol0Oo ( .A(un3_Ol0Oo_Z), .B(ol0Oo_Z), .C(un2_Ol0Oo_1_Z), .D(IO0Oo7_Z), .Y(Ol0Oo_Z) ); defparam Ol0Oo.INIT=16'hFACC; // @28:526344 CFG4 iI0Oo ( .A(ll0Oo_Z), .B(i0iO1_1z), .C(un3_iI0Oo_Z), .D(IO0Oo7_Z), .Y(iI0Oo_Z) ); defparam iI0Oo.INIT=16'h7222; // @28:527558 CFG4 \i11Oo_0[3] ( .A(Oo1Oo_Z[3]), .B(iO1Oo_Z), .C(N_693), .D(N_730_4), .Y(i11Oo[3]) ); defparam \i11Oo_0[3] .INIT=16'hCA0A; // @28:475474 CFG4 m54 ( .A(oIl11[5]), .B(oIl11[4]), .C(oIl11[3]), .D(iIl0112), .Y(N_833) ); defparam m54.INIT=16'h6A00; // @28:475474 CFG3 un8_iloOo_c3_RNI420PL ( .A(IIl11[5]), .B(un8_iloOo_c3_Z), .C(iIl0112), .Y(N_829) ); defparam un8_iloOo_c3_RNI420PL.INIT=8'h09; // @28:475474 CFG4 m14 ( .A(oIl11[5]), .B(oIl11[4]), .C(N_13_0), .D(iIl0112), .Y(N_15_0) ); defparam m14.INIT=16'hF780; // @28:529376 CFG2 un3_IOiOo ( .A(OliOo_Z), .B(lIoOo_Z), .Y(un3_IOiOo_Z) ); defparam un3_IOiOo.INIT=4'hE; // @28:526689 CFG4 I00Oo_0 ( .A(l1I11_1z), .B(un6_I00Oo_Z), .C(N_665_1), .D(I00Oo_0_a2_1_Z), .Y(I00Oo) ); defparam I00Oo_0.INIT=16'hECA0; // @28:532116 CFG3 \oOo11_RNO[0] ( .A(N_698), .B(i10Oo_Z), .C(I0Ii1_Z), .Y(N_691_i) ); defparam \oOo11_RNO[0] .INIT=8'h01; // @28:530666 CFG4 O1iOo_0 ( .A(un1_Oo1Oo[0]), .B(O1iOo_0_0_Z), .C(li1Oo_Z), .D(iO1Oo_Z), .Y(O1iOo) ); defparam O1iOo_0.INIT=16'hCECC; // @28:535244 CFG4 \I0IIo[18] ( .A(OOIIo_Z), .B(O0IIo_i_m3_Z), .C(O1iO1[18]), .D(oOiOo_Z[2]), .Y(I0IIo_Z[18]) ); defparam \I0IIo[18] .INIT=16'hB830; // @28:535288 CFG4 \I0IIo[10] ( .A(OOIIo_Z), .B(O0IIo_i_m3_Z), .C(O1iO1[10]), .D(OooOo_Z[10]), .Y(I0IIo_Z[10]) ); defparam \I0IIo[10] .INIT=16'hB830; // @28:535288 CFG4 \I0IIo[13] ( .A(OOIIo_Z), .B(O0IIo_i_m3_Z), .C(O1iO1[13]), .D(OooOo_Z[13]), .Y(I0IIo_Z[13]) ); defparam \I0IIo[13] .INIT=16'hB830; // @28:535288 CFG4 \I0IIo[9] ( .A(OOIIo_Z), .B(O0IIo_i_m3_Z), .C(O1iO1[9]), .D(OooOo_Z[9]), .Y(I0IIo_Z[9]) ); defparam \I0IIo[9] .INIT=16'hB830; // @28:535288 CFG4 \I0IIo[15] ( .A(OOIIo_Z), .B(O0IIo_i_m3_Z), .C(O1iO1[15]), .D(OooOo_Z[15]), .Y(I0IIo_Z[15]) ); defparam \I0IIo[15] .INIT=16'hB830; // @28:535288 CFG4 \I0IIo[5] ( .A(OOIIo_Z), .B(O0IIo_i_m3_Z), .C(O1iO1[5]), .D(OooOo_Z[5]), .Y(I0IIo_Z[5]) ); defparam \I0IIo[5] .INIT=16'hB830; // @28:535147 CFG4 \I0IIo[25] ( .A(OOIIo_Z), .B(O0IIo_i_m3_Z), .C(O1iO1[25]), .D(i1iO1_Z), .Y(I0IIo_Z[25]) ); defparam \I0IIo[25] .INIT=16'hB830; // @28:529413 CFG4 un3_lOiOo_i_o3 ( .A(i0iO1_1z), .B(iO1Oo_Z), .C(O0OIo_Z), .D(un1_Oo1Oo[0]), .Y(N_696) ); defparam un3_lOiOo_i_o3.INIT=16'hEAAA; // @28:535288 CFG4 \I0IIo[14] ( .A(OOIIo_Z), .B(O0IIo_i_m3_Z), .C(O1iO1[14]), .D(OooOo_Z[14]), .Y(I0IIo_Z[14]) ); defparam \I0IIo[14] .INIT=16'hB830; // @28:535244 CFG4 \I0IIo[19] ( .A(OOIIo_Z), .B(O0IIo_i_m3_Z), .C(O1iO1[19]), .D(oOiOo_Z[3]), .Y(I0IIo_Z[19]) ); defparam \I0IIo[19] .INIT=16'hB830; // @28:535288 CFG4 \I0IIo[8] ( .A(OOIIo_Z), .B(O0IIo_i_m3_Z), .C(O1iO1[8]), .D(OooOo_Z[8]), .Y(I0IIo_Z[8]) ); defparam \I0IIo[8] .INIT=16'hB830; // @28:535288 CFG4 \I0IIo[7] ( .A(OOIIo_Z), .B(O0IIo_i_m3_Z), .C(O1iO1[7]), .D(OooOo_Z[7]), .Y(I0IIo_Z[7]) ); defparam \I0IIo[7] .INIT=16'hB830; // @28:475474 CFG4 OloOo_RNIE4GMA ( .A(iIoOo_Z), .B(OloOo_Z), .C(un2_OioOo_1_0), .D(un2_OioOo_11_Z), .Y(N_863) ); defparam OloOo_RNIE4GMA.INIT=16'h1BBB; // @28:535288 CFG4 \I0IIo[0] ( .A(OOIIo_Z), .B(O0IIo_i_m3_Z), .C(O1iO1[0]), .D(OooOo_Z[0]), .Y(I0IIo_Z[0]) ); defparam \I0IIo[0] .INIT=16'hB830; // @28:535288 CFG4 \I0IIo[6] ( .A(OOIIo_Z), .B(O0IIo_i_m3_Z), .C(O1iO1[6]), .D(OooOo_Z[6]), .Y(I0IIo_Z[6]) ); defparam \I0IIo[6] .INIT=16'hB830; // @28:513733 CFG3 \un2_O0li1[0] ( .A(I1OIo_Z), .B(IOoO1_Z), .C(O0li1_Z), .Y(un2_O0li1_Z[0]) ); defparam \un2_O0li1[0] .INIT=8'h72; // @28:535288 CFG4 \I0IIo[12] ( .A(OOIIo_Z), .B(O0IIo_i_m3_Z), .C(O1iO1[12]), .D(OooOo_Z[12]), .Y(I0IIo_Z[12]) ); defparam \I0IIo[12] .INIT=16'hB830; // @28:535244 CFG4 \I0IIo[17] ( .A(OOIIo_Z), .B(O0IIo_i_m3_Z), .C(O1iO1[17]), .D(oOiOo_Z[1]), .Y(I0IIo_Z[17]) ); defparam \I0IIo[17] .INIT=16'hB830; // @28:535288 CFG4 \I0IIo[3] ( .A(OOIIo_Z), .B(O0IIo_i_m3_Z), .C(O1iO1[3]), .D(OooOo_Z[3]), .Y(I0IIo_Z[3]) ); defparam \I0IIo[3] .INIT=16'hB830; // @28:535288 CFG4 \I0IIo[4] ( .A(OOIIo_Z), .B(O0IIo_i_m3_Z), .C(O1iO1[4]), .D(OooOo_Z[4]), .Y(I0IIo_Z[4]) ); defparam \I0IIo[4] .INIT=16'hB830; // @28:475474 CFG4 \OooOo_RNICLOH11[2] ( .A(OooOo_Z[2]), .B(N_27_0), .C(m34_0_2), .D(m30_0_2), .Y(N_36_0) ); defparam \OooOo_RNICLOH11[2] .INIT=16'hC480; // @28:475474 CFG4 m46_2_0 ( .A(IIl11[6]), .B(IIl11[5]), .C(N_824), .D(iIl0112), .Y(N_826_2) ); defparam m46_2_0.INIT=16'h028A; // @28:475474 CFG4 N_834_i ( .A(IIl11[5]), .B(IIl11[4]), .C(IIl11[3]), .D(iIl0112), .Y(N_834_i_Z) ); defparam N_834_i.INIT=16'h9500; // @28:530889 CFG4 l1iOo_1 ( .A(io011), .B(ioOIo_Z), .C(O1011_1z), .D(Oi1Oo_1_Z), .Y(l1iOo_1_Z) ); defparam l1iOo_1.INIT=16'hFFCE; // @28:527259 CFG4 oO1Oo_0 ( .A(iO1Oo_Z), .B(un1_Oo1Oo[0]), .C(un1_iI0i1_2_0), .D(un14_oO1Oo_6_Z), .Y(oO1Oo_0_Z) ); defparam oO1Oo_0.INIT=16'hF222; // @28:526532 CFG4 il0Oo_3 ( .A(un20_il0Oo_Z), .B(il0Oo_2_Z), .C(un22_il0Oo_0_a2_1_Z), .D(il0Oo_0_Z), .Y(il0Oo_3_Z) ); defparam il0Oo_3.INIT=16'hFFDC; CFG4 oI0i1_RNO_0 ( .A(oI0i1_1459_2), .B(N_5306_tz_tz_tz), .C(m53_e_0_4), .D(m53_e_0_5), .Y(oI0i1_1459_4) ); defparam oI0i1_RNO_0.INIT=16'h8000; // @28:534076 CFG4 un16_oI0i1 ( .A(N_11_0), .B(un16_oI0i1_3_Z), .C(OooOo_Z[9]), .D(OooOo_Z[8]), .Y(un16_oI0i1_Z) ); defparam un16_oI0i1.INIT=16'h0008; // @28:529275 CFG4 un6_oioOo ( .A(un6_oioOo_1_Z), .B(un6_oioOo_2_Z), .C(un11_oioOo_Z), .D(un6_oioOo_3_Z), .Y(un6_oioOo_Z) ); defparam un6_oioOo.INIT=16'h8000; // @28:528629 CFG4 \O1oOo[3] ( .A(CO2), .B(ANB3), .C(O1oOo_0_Z[3]), .D(o0oOo_Z), .Y(O1oOo_Z[3]) ); defparam \O1oOo[3] .INIT=16'hF0F9; // @28:527945 CFG4 un1_IOoOo ( .A(un1_Oo1Oo[0]), .B(li1Oo_Z), .C(un1_IOoOo_0_Z), .D(un3_IOiOo_Z), .Y(un1_IOoOo_Z) ); defparam un1_IOoOo.INIT=16'h0080; // @28:530229 CFG3 \i0oi1[2] ( .A(un42_i0oi1_cry_2_S), .B(N_640), .C(lOoOo_Z), .Y(i0oi1_Z[2]) ); defparam \i0oi1[2] .INIT=8'hBF; // @28:530229 CFG3 \i0oi1[5] ( .A(un42_i0oi1_cry_5_S), .B(N_640), .C(lOoOo_Z), .Y(i0oi1_Z[5]) ); defparam \i0oi1[5] .INIT=8'hBF; // @28:528930 CFG4 ioIi1 ( .A(N_11_0), .B(ioIi1_1_Z), .C(OooOo_Z[9]), .D(OooOo_Z[8]), .Y(ioIi1_Z) ); defparam ioIi1.INIT=16'h0008; // @28:475474 CFG4 \OooOo_RNI6H8MP[12] ( .A(OooOo_Z[12]), .B(OooOo_Z[13]), .C(m32_7), .D(m32_4), .Y(i22_mux) ); defparam \OooOo_RNI6H8MP[12] .INIT=16'h2000; // @28:534153 CFG4 Ol0i1_m2_e ( .A(Ol0i1_m2_e_3_Z), .B(iOli1_10_Z), .C(Ol0i1_m2_e_5_Z), .D(Ol0i1_m2_e_4_Z), .Y(Ol0i1_m2_e_Z) ); defparam Ol0i1_m2_e.INIT=16'h8000; // @28:527130 CFG4 ii0Oo ( .A(OO1Oo_Z), .B(oI0Oo_Z), .C(un1_ii0Oo_2_Z), .D(un6_ii0Oo), .Y(ii0Oo_Z) ); defparam ii0Oo.INIT=16'hF200; // @28:529655 CFG4 \un31_oIiOo_1.oIiOo[0] ( .A(iIiOo_Z[0]), .B(lIiOo_Z), .C(lliOo[1]), .D(IIiOo_Z[1]), .Y(oIiOo[0]) ); defparam \un31_oIiOo_1.oIiOo[0] .INIT=16'hE222; // @28:529655 CFG4 \un31_oIiOo_1.oIiOo[1] ( .A(iIiOo_Z[1]), .B(un1_oIiOo_0[1]), .C(N_435), .D(lIiOo_Z), .Y(oIiOo[1]) ); defparam \un31_oIiOo_1.oIiOo[1] .INIT=16'h0CAA; // @28:529655 CFG4 \un31_oIiOo_1.oIiOo[3] ( .A(un1_oIiOo_0[3]), .B(iIiOo_Z[3]), .C(N_360), .D(lIiOo_Z), .Y(oIiOo[3]) ); defparam \un31_oIiOo_1.oIiOo[3] .INIT=16'h0ACC; // @28:529655 CFG4 \oIiOo[5] ( .A(iIiOo_Z[5]), .B(un1_oIiOo_0_Z[5]), .C(N_370), .D(lIiOo_Z), .Y(oIiOo_Z[5]) ); defparam \oIiOo[5] .INIT=16'h0CAA; // @28:534625 CFG4 un2_lIIIo_0_a3 ( .A(un2_lIIIo_0_o3_1_Z), .B(N_742), .C(iO1Oo_Z), .D(un1_Oo1Oo[0]), .Y(N_723) ); defparam un2_lIIIo_0_a3.INIT=16'hE000; // @28:530534 CFG4 i0iOo ( .A(IlIi1_1_Z), .B(i0iOo_RNO_Z), .C(io011), .D(un2_i0iOo_0_Z), .Y(i0iOo_Z) ); defparam i0iOo.INIT=16'h0E0C; // @28:475474 CFG4 \O0oOo_RNO_3[4] ( .A(oIl11[6]), .B(oIl11[5]), .C(un35_iloOo_c3), .D(iIl0112), .Y(N_814) ); defparam \O0oOo_RNO_3[4] .INIT=16'h00A9; // @28:475474 CFG2 m15 ( .A(N_15_0), .B(oIl11[6]), .Y(N_16_0) ); defparam m15.INIT=4'h2; // @28:526308 CFG4 oI0Oo_RNO ( .A(IOI11), .B(OI0Oo_Z), .C(oI0Oo_Z), .D(N_669), .Y(N_637_i) ); defparam oI0Oo_RNO.INIT=16'h00F4; // @28:526861 CFG3 un2_OlIi1 ( .A(N_863), .B(I0Ii1_Z), .C(un3_OlIi1_Z), .Y(un2_OlIi1_Z) ); defparam un2_OlIi1.INIT=8'h80; // @28:475474 CFG4 \OooOo_RNI9HB2R1[10] ( .A(m44_0_3), .B(N_36_0), .C(m22_0_2), .D(m44_0_2), .Y(iI0i1) ); defparam \OooOo_RNI9HB2R1[10] .INIT=16'h8000; // @28:533350 CFG4 l0OIo_0 ( .A(l0OIo_0_a3_1_Z), .B(N_742), .C(o1OIo_Z), .D(i0iO1_1z), .Y(l0OIo) ); defparam l0OIo_0.INIT=16'h88F8; // @28:475474 CFG4 iIoOo_RNO_0 ( .A(iIoOo_Z), .B(N_105_mux), .C(un2_OioOo_11_Z), .D(un2_OioOo_1_0), .Y(N_854) ); defparam iIoOo_RNO_0.INIT=16'h1BBB; // @28:526532 CFG4 il0Oo_4 ( .A(li1Oo_Z), .B(iO1Oo_Z), .C(un1_Oo1Oo[0]), .D(il0Oo_3_Z), .Y(il0Oo_4_Z) ); defparam il0Oo_4.INIT=16'hFF40; // @28:475474 CFG4 un35_iloOo_ac0_3_RNIQ7C8H ( .A(oIl11[6]), .B(oIl11[5]), .C(un35_iloOo_c3), .D(iIl0112), .Y(N_809) ); defparam un35_iloOo_ac0_3_RNIQ7C8H.INIT=16'h0001; // @28:530229 CFG4 \i0oi1[0] ( .A(un6_i0oi1_Z), .B(N_640), .C(O1oi1_Z[0]), .D(lOoOo_Z), .Y(i0oi1_Z[0]) ); defparam \i0oi1[0] .INIT=16'h2EFF; // @28:530825 CFG4 un1_I1iOo ( .A(O0li1_Z), .B(Oi1Oo_Z), .C(I0OIo_Z), .D(un1_I1iOo_1_Z), .Y(un1_I1iOo_Z) ); defparam un1_I1iOo.INIT=16'h0400; CFG2 oI0i1_RNO ( .A(un1_iI0i1_2_0), .B(oI0i1_1459_4), .Y(oI0i1_RNO_Z) ); defparam oI0i1_RNO.INIT=4'h8; // @28:534153 CFG4 Ol0i1_m3_0_a2 ( .A(un2_Ol0i1_5_Z), .B(un2_Ol0i1_4_Z), .C(un1_iI0i1_2_0), .D(Ol0i1_m2_e_Z), .Y(Ol0i1_N_7_mux) ); defparam Ol0i1_m3_0_a2.INIT=16'h007F; // @28:530418 CFG4 \un31_oIiOo_1.I0iOo[1] ( .A(l0iOo_Z[1]), .B(O0Ii1_Z), .C(un4_I0iOo_1_cry_1_S), .D(O0iOo_Z), .Y(I0iOo[1]) ); defparam \un31_oIiOo_1.I0iOo[1] .INIT=16'hF022; // @28:530418 CFG4 \un31_oIiOo_1.I0iOo[2] ( .A(l0iOo_Z[2]), .B(O0Ii1_Z), .C(un4_I0iOo_1_cry_2_S), .D(O0iOo_Z), .Y(I0iOo[2]) ); defparam \un31_oIiOo_1.I0iOo[2] .INIT=16'hF022; // @28:530418 CFG4 \un31_oIiOo_1.I0iOo[3] ( .A(l0iOo_Z[3]), .B(O0Ii1_Z), .C(un4_I0iOo_1_cry_3_S), .D(O0iOo_Z), .Y(I0iOo[3]) ); defparam \un31_oIiOo_1.I0iOo[3] .INIT=16'hF022; // @28:530418 CFG4 \un31_oIiOo_1.I0iOo[4] ( .A(l0iOo_Z[4]), .B(O0Ii1_Z), .C(un4_I0iOo_1_cry_4_S), .D(O0iOo_Z), .Y(I0iOo[4]) ); defparam \un31_oIiOo_1.I0iOo[4] .INIT=16'hF022; // @28:530418 CFG4 \un31_oIiOo_1.I0iOo[5] ( .A(l0iOo_Z[5]), .B(O0Ii1_Z), .C(un4_I0iOo_1_cry_5_S), .D(O0iOo_Z), .Y(I0iOo[5]) ); defparam \un31_oIiOo_1.I0iOo[5] .INIT=16'hF022; // @28:529655 CFG4 \un31_oIiOo_1.oIiOo[2] ( .A(iIiOo_Z[2]), .B(un1_oIiOo_0[2]), .C(N_355), .D(lIiOo_Z), .Y(oIiOo[2]) ); defparam \un31_oIiOo_1.oIiOo[2] .INIT=16'h0CAA; // @28:530418 CFG4 \I0iOo[6] ( .A(l0iOo_Z[6]), .B(O0Ii1_Z), .C(un4_I0iOo_1_cry_6_S), .D(O0iOo_Z), .Y(I0iOo_Z[6]) ); defparam \I0iOo[6] .INIT=16'hF022; // @28:530418 CFG4 \I0iOo[7] ( .A(l0iOo_Z[7]), .B(O0Ii1_Z), .C(un4_I0iOo_1_cry_7_S), .D(O0iOo_Z), .Y(I0iOo_Z[7]) ); defparam \I0iOo[7] .INIT=16'hF022; // @28:530418 CFG4 \I0iOo[8] ( .A(l0iOo_Z[8]), .B(O0Ii1_Z), .C(un4_I0iOo_1_cry_8_S), .D(O0iOo_Z), .Y(I0iOo_Z[8]) ); defparam \I0iOo[8] .INIT=16'hF022; // @28:530418 CFG4 \I0iOo[9] ( .A(l0iOo_Z[9]), .B(O0Ii1_Z), .C(un4_I0iOo_1_s_9_S), .D(O0iOo_Z), .Y(I0iOo_Z[9]) ); defparam \I0iOo[9] .INIT=16'hF022; // @28:530229 CFG4 \i0oi1[1] ( .A(un42_i0oi1_cry_1_S), .B(lOoOo_Z), .C(N_640), .D(un6_i0oi1_Z), .Y(i0oi1_Z[1]) ); defparam \i0oi1[1] .INIT=16'hB3BF; // @28:530229 CFG4 \i0oi1[3] ( .A(un42_i0oi1_cry_3_S), .B(lOoOo_Z), .C(N_640), .D(un6_i0oi1_Z), .Y(i0oi1_Z[3]) ); defparam \i0oi1[3] .INIT=16'hB3BF; // @28:530229 CFG4 \i0oi1[4] ( .A(un42_i0oi1_cry_4_S), .B(lOoOo_Z), .C(N_640), .D(un6_i0oi1_Z), .Y(i0oi1_Z[4]) ); defparam \i0oi1[4] .INIT=16'hB3BF; // @28:530418 CFG3 \un31_oIiOo_1.I0iOo[0] ( .A(O0iOo_Z), .B(l0iOo_Z[0]), .C(O0Ii1_Z), .Y(I0iOo[0]) ); defparam \un31_oIiOo_1.I0iOo[0] .INIT=8'h26; // @28:529655 CFG3 \un31_oIiOo_1.oIiOo[4] ( .A(lIiOo_Z), .B(iIiOo_Z[4]), .C(un1_oIiOo_1[4]), .Y(oIiOo[4]) ); defparam \un31_oIiOo_1.oIiOo[4] .INIT=8'hE4; // @28:529655 CFG4 \oIiOo[6] ( .A(iIiOo_Z[6]), .B(un1_oIiOo_0_Z[6]), .C(N_375), .D(lIiOo_Z), .Y(oIiOo_Z[6]) ); defparam \oIiOo[6] .INIT=16'h0CAA; // @28:529367 CFG4 IOiOo_0 ( .A(lOoOo_Z), .B(un3_IOiOo_Z), .C(IOiOo_0_a2_0_1_Z), .D(IliOo_NE_Z), .Y(IOiOo) ); defparam IOiOo_0.INIT=16'hC0EA; // @28:529181 CFG4 un3_IioOo ( .A(un4_OioOo_2_Z), .B(un2_OioOo_Z), .C(iIIIo_Z), .D(un12_o1oOo_Z), .Y(un3_IioOo_Z) ); defparam un3_IioOo.INIT=16'h0302; // @28:529202 CFG4 un12_IioOo ( .A(un4_OioOo_2_Z), .B(un2_OioOo_Z), .C(iIIIo_Z), .D(un12_o1oOo_Z), .Y(un12_IioOo_Z) ); defparam un12_IioOo.INIT=16'h0C0D; // @28:526627 CFG4 un28_il0Oo ( .A(OliOo_Z), .B(li1Oo_Z), .C(un29_il0Oo_1_Z), .D(un1_Oo1Oo[0]), .Y(un28_il0Oo_Z) ); defparam un28_il0Oo.INIT=16'hC800; // @28:530229 CFG4 \i0oi1_0[7] ( .A(un42_i0oi1_cry_7_S), .B(N_640), .C(un13_i0oi1_Z), .D(lOoOo_Z), .Y(i0oi1[7]) ); defparam \i0oi1_0[7] .INIT=16'h8BFF; // @28:530229 CFG4 \i0oi1_0[8] ( .A(un42_i0oi1_s_8_S), .B(N_640), .C(un13_i0oi1_Z), .D(lOoOo_Z), .Y(i0oi1[8]) ); defparam \i0oi1_0[8] .INIT=16'h8BFF; // @28:475474 CFG4 \O0oOo_RNO_2[4] ( .A(IIl11[6]), .B(IIl11[5]), .C(un8_iloOo_c3_Z), .D(iIl0112), .Y(N_815) ); defparam \O0oOo_RNO_2[4] .INIT=16'h00A9; // @28:529516 CFG4 \OIiOo[6] ( .A(l1l11), .B(liI11), .C(un16_OIiOo_Z), .D(IIiOo_Z[1]), .Y(OIiOo_Z[6]) ); defparam \OIiOo[6] .INIT=16'h5554; // @28:527854 CFG3 Ii1Oo ( .A(li1Oo_Z), .B(iO1Oo_Z), .C(Oi1Oo_Z), .Y(Ii1Oo_Z) ); defparam Ii1Oo.INIT=8'hF8; // @28:475474 CFG3 iIoOo_RNO ( .A(oll11), .B(N_854), .C(O1011_1z), .Y(oIoOo) ); defparam iIoOo_RNO.INIT=8'h08; // @28:526855 CFG3 OlIi1 ( .A(iIoOo_Z), .B(un1_oioOo_1), .C(un2_OlIi1_Z), .Y(OlIi1_Z) ); defparam OlIi1.INIT=8'hFE; // @28:475474 CFG4 m20_0 ( .A(N_19_0), .B(IIl11[6]), .C(iOoOo_Z), .D(N_16_0), .Y(N_21_0) ); defparam m20_0.INIT=16'h2F20; // @28:475474 CFG4 un8_iloOo_c3_RNIEO6GT ( .A(IIl11[6]), .B(IIl11[5]), .C(un8_iloOo_c3_Z), .D(iIl0112), .Y(N_805) ); defparam un8_iloOo_c3_RNIEO6GT.INIT=16'h0001; // @28:530889 CFG4 l1iOo ( .A(N_742), .B(OliO1_Z), .C(Oi1Oo_Z), .D(l1iOo_1_Z), .Y(l1iOo_Z) ); defparam l1iOo.INIT=16'hFFB0; // @28:530229 CFG4 \i0oi1[6] ( .A(i0oi1_RNO_Z[6]), .B(lOoOo_Z), .C(N_640), .D(un42_i0oi1_cry_6_S), .Y(i0oi1_Z[6]) ); defparam \i0oi1[6] .INIT=16'hFBBB; // @28:533407 CFG4 o0OIo_0 ( .A(i1OIo_Z), .B(i0iO1_1z), .C(o0OIo_0_a3_0_1_Z), .D(Oi1Oo_Z), .Y(o0OIo) ); defparam o0OIo_0.INIT=16'hF222; // @28:529655 CFG4 \oIiOo[9] ( .A(un1_oIiOo_1_Z[9]), .B(lIiOo_Z), .C(iIiOo_Z[9]), .D(N_1925), .Y(oIiOo_Z[9]) ); defparam \oIiOo[9] .INIT=16'h30B8; // @28:533998 CFG4 un1_oI0i1 ( .A(o1iOo_Z), .B(m53_e_0_4), .C(m53_e_0_5), .D(ioIi1_Z), .Y(un1_oI0i1_Z) ); defparam un1_oI0i1.INIT=16'h8000; // @28:529655 CFG4 \oIiOo[8] ( .A(oOiOo_Z[3]), .B(iIiOo_Z[8]), .C(lIiOo_Z), .D(un1_oIiOo_0_Z[8]), .Y(oIiOo_Z[8]) ); defparam \oIiOo[8] .INIT=16'hAC0C; // @28:534622 CFG3 lIIIo ( .A(N_723), .B(IOoO1_Z), .C(un2_lIIIo_0_0_Z), .Y(lIIIo_Z) ); defparam lIIIo.INIT=8'h32; // @28:530825 CFG4 I1iOo ( .A(O1011_1z), .B(un1_I1iOo_Z), .C(o0iOo_Z), .D(oo011), .Y(I1iOo_Z) ); defparam I1iOo.INIT=16'hFDCC; // @28:529261 CFG4 oioOo ( .A(un1_oioOo_1), .B(un6_oioOo_Z), .C(IOI11), .D(OliO1_Z), .Y(oioOo_Z) ); defparam oioOo.INIT=16'h330A; // @28:527945 CFG4 IOoOo ( .A(lOoOo_Z), .B(I1011), .C(un1_IOoOo_Z), .D(IliOo_NE_Z), .Y(IOoOo_Z) ); defparam IOoOo.INIT=16'hF2F0; // @28:528810 CFG4 un3_i1oOo ( .A(I0Ii1_Z), .B(un2_o1oOo_Z), .C(O0IIo_i_m3_Z), .D(un4_o1oOo_Z), .Y(un3_i1oOo_Z) ); defparam un3_i1oOo.INIT=16'h0100; // @28:528831 CFG4 un12_i1oOo ( .A(I0Ii1_Z), .B(un2_o1oOo_Z), .C(O0IIo_i_m3_Z), .D(un4_o1oOo_Z), .Y(un12_i1oOo_Z) ); defparam un12_i1oOo.INIT=16'h0405; // @28:475474 CFG4 \OooOo_RNI5RR0F2[6] ( .A(m49_5), .B(OooOo_Z[6]), .C(N_143_mux), .D(i22_mux), .Y(N_155_mux) ); defparam \OooOo_RNI5RR0F2[6] .INIT=16'hA280; // @28:529178 CFG4 \IioOo_0[15] ( .A(un12_IioOo_Z), .B(un3_IioOo_Z), .C(lioOo_Z[15]), .D(un6_IioOo_s_15_S), .Y(IioOo[15]) ); defparam \IioOo_0[15] .INIT=16'hECA0; // @28:529178 CFG4 \IioOo_0[14] ( .A(un12_IioOo_Z), .B(un3_IioOo_Z), .C(lioOo_Z[14]), .D(un6_IioOo_cry_14_S), .Y(IioOo[14]) ); defparam \IioOo_0[14] .INIT=16'hECA0; // @28:529178 CFG4 \IioOo_0[8] ( .A(un12_IioOo_Z), .B(un3_IioOo_Z), .C(lioOo_Z[8]), .D(un6_IioOo_cry_8_S), .Y(IioOo[8]) ); defparam \IioOo_0[8] .INIT=16'hECA0; // @28:529178 CFG4 \IioOo_0[7] ( .A(un12_IioOo_Z), .B(un3_IioOo_Z), .C(lioOo_Z[7]), .D(un6_IioOo_cry_7_S), .Y(IioOo[7]) ); defparam \IioOo_0[7] .INIT=16'hECA0; // @28:529178 CFG4 \IioOo_0[6] ( .A(un12_IioOo_Z), .B(un3_IioOo_Z), .C(lioOo_Z[6]), .D(un6_IioOo_cry_6_S), .Y(IioOo[6]) ); defparam \IioOo_0[6] .INIT=16'hECA0; // @28:529178 CFG4 \IioOo_0[13] ( .A(un12_IioOo_Z), .B(un3_IioOo_Z), .C(lioOo_Z[13]), .D(un6_IioOo_cry_13_S), .Y(IioOo[13]) ); defparam \IioOo_0[13] .INIT=16'hECA0; // @28:529178 CFG4 \IioOo_0[12] ( .A(un12_IioOo_Z), .B(un3_IioOo_Z), .C(lioOo_Z[12]), .D(un6_IioOo_cry_12_S), .Y(IioOo[12]) ); defparam \IioOo_0[12] .INIT=16'hECA0; // @28:529178 CFG3 \IioOo[0] ( .A(un3_IioOo_Z), .B(lioOo_Z[0]), .C(un12_IioOo_Z), .Y(IioOo_Z[0]) ); defparam \IioOo[0] .INIT=8'hE2; // @28:529178 CFG4 \IioOo[1] ( .A(i1_i_11), .B(un6_IioOo_cry_1_S), .C(un12_IioOo_Z), .D(un3_IioOo_Z), .Y(IioOo_Z[1]) ); defparam \IioOo[1] .INIT=16'hECA0; // @28:529178 CFG4 \IioOo[2] ( .A(i1_i_10), .B(un6_IioOo_cry_2_S), .C(un12_IioOo_Z), .D(un3_IioOo_Z), .Y(IioOo_Z[2]) ); defparam \IioOo[2] .INIT=16'hECA0; // @28:529178 CFG4 \IioOo[3] ( .A(i1_i_9), .B(un6_IioOo_cry_3_S), .C(un12_IioOo_Z), .D(un3_IioOo_Z), .Y(IioOo_Z[3]) ); defparam \IioOo[3] .INIT=16'hECA0; // @28:529178 CFG4 \IioOo[4] ( .A(un12_IioOo_Z), .B(un3_IioOo_Z), .C(lioOo_Z[4]), .D(un6_IioOo_cry_4_S), .Y(IioOo_Z[4]) ); defparam \IioOo[4] .INIT=16'hECA0; // @28:529178 CFG4 \IioOo[5] ( .A(i1_i_8), .B(un6_IioOo_cry_5_S), .C(un12_IioOo_Z), .D(un3_IioOo_Z), .Y(IioOo_Z[5]) ); defparam \IioOo[5] .INIT=16'hECA0; // @28:529178 CFG4 \IioOo[9] ( .A(un12_IioOo_Z), .B(un3_IioOo_Z), .C(lioOo_Z[9]), .D(un6_IioOo_cry_9_S), .Y(IioOo_Z[9]) ); defparam \IioOo[9] .INIT=16'hECA0; // @28:529178 CFG4 \IioOo[10] ( .A(un12_IioOo_Z), .B(un3_IioOo_Z), .C(lioOo_Z[10]), .D(un6_IioOo_cry_10_S), .Y(IioOo_Z[10]) ); defparam \IioOo[10] .INIT=16'hECA0; // @28:529178 CFG4 \IioOo[11] ( .A(un12_IioOo_Z), .B(un3_IioOo_Z), .C(lioOo_Z[11]), .D(un6_IioOo_cry_11_S), .Y(IioOo_Z[11]) ); defparam \IioOo[11] .INIT=16'hECA0; // @28:533941 CFG4 lI0i1 ( .A(o1iOo_Z), .B(ioIi1_Z), .C(o1iO1_Z), .D(lOoO1_Z[0]), .Y(lI0i1_Z) ); defparam lI0i1.INIT=16'hF870; // @28:475474 CFG3 N_826_i ( .A(IIl11[6]), .B(N_826_2), .C(N_19_0), .Y(N_826_i_Z) ); defparam N_826_i.INIT=8'h32; // @28:475474 CFG2 IiOIo_RNO ( .A(N_155_mux), .B(i1_i_12), .Y(IiOIo_RNO_Z) ); defparam IiOIo_RNO.INIT=4'h2; // @28:475474 CFG4 \O0oOo_RNO_1[4] ( .A(ooIO1_0), .B(iOoOo_Z), .C(N_815), .D(N_814), .Y(N_817_1) ); defparam \O0oOo_RNO_1[4] .INIT=16'h5140; // @28:533998 CFG4 oI0i1 ( .A(oI0i1_RNO_Z), .B(un19_oI0i1_Z), .C(un1_oI0i1_Z), .D(un16_oI0i1_Z), .Y(oI0i1_Z) ); defparam oI0i1.INIT=16'hFFFE; // @28:528807 CFG4 \i1oOo[4] ( .A(un3_i1oOo_Z), .B(un12_i1oOo_Z), .C(OooOo_Z[4]), .D(un6_i1oOo_1_cry_4_S), .Y(i1oOo_Z[4]) ); defparam \i1oOo[4] .INIT=16'hEAC0; // @28:528807 CFG4 \i1oOo[2] ( .A(un3_i1oOo_Z), .B(un12_i1oOo_Z), .C(OooOo_Z[2]), .D(un6_i1oOo_1_cry_2_S), .Y(i1oOo_Z[2]) ); defparam \i1oOo[2] .INIT=16'hEAC0; // @28:529411 CFG4 \lOiOo[1] ( .A(N_696), .B(IOiOo), .C(CO0_2), .D(oOiOo_Z[1]), .Y(lOiOo_Z[1]) ); defparam \lOiOo[1] .INIT=16'h1540; // @28:529411 CFG4 \lOiOo[2] ( .A(N_696), .B(IOiOo), .C(oOiOo_Z[2]), .D(CO1_2), .Y(lOiOo_Z[2]) ); defparam \lOiOo[2] .INIT=16'h1450; // @28:528807 CFG4 \i1oOo[5] ( .A(un3_i1oOo_Z), .B(un12_i1oOo_Z), .C(OooOo_Z[5]), .D(un6_i1oOo_1_cry_5_S), .Y(i1oOo_Z[5]) ); defparam \i1oOo[5] .INIT=16'hEAC0; // @28:528807 CFG4 \i1oOo[14] ( .A(un3_i1oOo_Z), .B(un12_i1oOo_Z), .C(OooOo_Z[14]), .D(un6_i1oOo_1_cry_14_S), .Y(i1oOo_Z[14]) ); defparam \i1oOo[14] .INIT=16'hEAC0; // @28:528807 CFG3 \i1oOo[0] ( .A(OooOo_Z[0]), .B(un3_i1oOo_Z), .C(un12_i1oOo_Z), .Y(i1oOo_Z[0]) ); defparam \i1oOo[0] .INIT=8'hE4; // @28:528807 CFG4 \i1oOo[6] ( .A(un3_i1oOo_Z), .B(un12_i1oOo_Z), .C(OooOo_Z[6]), .D(un6_i1oOo_1_cry_6_S), .Y(i1oOo_Z[6]) ); defparam \i1oOo[6] .INIT=16'hEAC0; // @28:528807 CFG4 \i1oOo[7] ( .A(un3_i1oOo_Z), .B(un12_i1oOo_Z), .C(OooOo_Z[7]), .D(un6_i1oOo_1_cry_7_S), .Y(i1oOo_Z[7]) ); defparam \i1oOo[7] .INIT=16'hEAC0; // @28:528807 CFG4 \i1oOo[13] ( .A(un3_i1oOo_Z), .B(un12_i1oOo_Z), .C(OooOo_Z[13]), .D(un6_i1oOo_1_cry_13_S), .Y(i1oOo_Z[13]) ); defparam \i1oOo[13] .INIT=16'hEAC0; // @28:529411 CFG3 \lOiOo[0] ( .A(IOiOo), .B(CO0_2), .C(N_696), .Y(lOiOo_Z[0]) ); defparam \lOiOo[0] .INIT=8'h06; // @28:534397 CFG4 I00i1_RNO ( .A(I00i1_Z), .B(N_793), .C(N_11_0), .D(N_802), .Y(N_162_mux_i) ); defparam I00i1_RNO.INIT=16'hCAAA; // @28:534244 CFG3 \ll0i1_RNO[3] ( .A(ll0i1_Z[3]), .B(lOoO1_Z[3]), .C(Ol0i1_N_7_mux), .Y(i25_mux_i) ); defparam \ll0i1_RNO[3] .INIT=8'hAC; // @28:534244 CFG3 \ll0i1_RNO[2] ( .A(ll0i1_Z[2]), .B(lOoO1_Z[2]), .C(Ol0i1_N_7_mux), .Y(i26_mux_0_i) ); defparam \ll0i1_RNO[2] .INIT=8'hAC; // @28:534244 CFG3 \ll0i1_RNO[1] ( .A(ll0i1_Z[1]), .B(lOoO1_Z[1]), .C(Ol0i1_N_7_mux), .Y(i23_mux_0_i) ); defparam \ll0i1_RNO[1] .INIT=8'hAC; // @28:534244 CFG3 \ll0i1_RNO[0] ( .A(ll0i1_Z[0]), .B(lOoO1_Z[0]), .C(Ol0i1_N_7_mux), .Y(i24_mux_i) ); defparam \ll0i1_RNO[0] .INIT=8'hAC; // @28:534244 CFG3 \ll0i1_RNO[6] ( .A(ll0i1_Z[6]), .B(lOoO1_Z[6]), .C(Ol0i1_N_7_mux), .Y(i34_mux_0_i) ); defparam \ll0i1_RNO[6] .INIT=8'hAC; // @28:534244 CFG3 \ll0i1_RNO[5] ( .A(ll0i1_Z[5]), .B(lOoO1_Z[5]), .C(Ol0i1_N_7_mux), .Y(i29_mux_i) ); defparam \ll0i1_RNO[5] .INIT=8'hAC; // @28:534244 CFG3 \ll0i1_RNO[4] ( .A(ll0i1_Z[4]), .B(lOoO1_Z[4]), .C(Ol0i1_N_7_mux), .Y(i30_mux_0_i) ); defparam \ll0i1_RNO[4] .INIT=8'hAC; // @28:475474 CFG4 un35_iloOo_ac0_3_RNI99EPJ1 ( .A(ooIO1_0), .B(iOoOo_Z), .C(N_809), .D(N_805), .Y(N_807_1) ); defparam un35_iloOo_ac0_3_RNI99EPJ1.INIT=16'h5410; // @28:529449 CFG4 \oOiOo_RNO[3] ( .A(oOiOo_Z[3]), .B(lOiOo_i_o2_0_Z[3]), .C(N_696), .D(IOiOo), .Y(N_673_i) ); defparam \oOiOo_RNO[3] .INIT=16'h090A; // @28:475474 CFG3 \O0oOo_RNO_0[4] ( .A(N_21_0), .B(ooIO1_0), .C(N_817_1), .Y(N_817) ); defparam \O0oOo_RNO_0[4] .INIT=8'hF8; // @28:475474 CFG3 un35_iloOo_ac0_3_RNIEP2E54 ( .A(N_21_0), .B(ooIO1_0), .C(N_807_1), .Y(N_807) ); defparam un35_iloOo_ac0_3_RNIEP2E54.INIT=8'hF8; // @28:533721 CFG3 o1I11_RNO ( .A(N_155_mux), .B(i1_i_12), .C(i0iO1_1z), .Y(N_746_i) ); defparam o1I11_RNO.INIT=8'h2E; // @28:475474 CFG4 \O0oOo_RNO[4] ( .A(N_665_1), .B(un60_iloOo_cry_4_S), .C(l00Oo_Z), .D(N_817), .Y(iloOo[4]) ); defparam \O0oOo_RNO[4] .INIT=16'hEA40; // @28:475474 CFG4 \O0oOo_RNO[5] ( .A(N_665_1), .B(un60_iloOo_cry_5_S), .C(l00Oo_Z), .D(N_807), .Y(iloOo[5]) ); defparam \O0oOo_RNO[5] .INIT=16'hEA40; // @28:475474 CFG4 \O0oOo_RNO[6] ( .A(N_665_1), .B(un60_iloOo_s_6_S), .C(l00Oo_Z), .D(N_807), .Y(iloOo[6]) ); defparam \O0oOo_RNO[6] .INIT=16'hEA40; // @28:532238 CTSE_PECRC_1s_26s_0 CTSE_PECRC_1 ( .i1oOo_14(i1oOo[15]), .i1oOo_11(i1oOo[12]), .i1oOo_0(i1oOo[1]), .i1oOo_2(i1oOo[3]), .i1oOo_7(i1oOo[8]), .i1oOo_8(i1oOo[9]), .i1oOo_9(i1oOo[10]), .i1oOo_10(i1oOo[11]), .OooOo_1(OooOo_Z[2]), .OooOo_14(OooOo_Z[15]), .OooOo_11(OooOo_Z[12]), .OooOo_0(OooOo_Z[1]), .OooOo_2(OooOo_Z[3]), .OooOo_7(OooOo_Z[8]), .OooOo_8(OooOo_Z[9]), .OooOo_9(OooOo_Z[10]), .OooOo_10(OooOo_Z[11]), .O1iO1_0(O1iO1[2]), .O1iO1_18(O1iO1[20]), .olOIo(olOIo[7:0]), .lo1Oo(lo1Oo[3:0]), .IiiOo(IiiOo[7:0]), .OIo11_0(OIo11[2]), .un6_i1oOo_1_cry_11_S(un6_i1oOo_1_cry_11_S), .un6_i1oOo_1_cry_10_S(un6_i1oOo_1_cry_10_S), .un6_i1oOo_1_cry_9_S(un6_i1oOo_1_cry_9_S), .un6_i1oOo_1_cry_8_S(un6_i1oOo_1_cry_8_S), .un6_i1oOo_1_cry_3_S(un6_i1oOo_1_cry_3_S), .un6_i1oOo_1_cry_1_S(un6_i1oOo_1_cry_1_S), .un6_i1oOo_1_cry_12_S(un6_i1oOo_1_cry_12_S), .un6_i1oOo_1_s_15_S(un6_i1oOo_1_s_15_S), .un12_i1oOo(un12_i1oOo_Z), .un3_i1oOo(un3_i1oOo_Z), .N_547_i(N_547_i), .N_545_i_1z(N_545_i), .O0IIo_i_m3(O0IIo_i_m3_Z), .OOIIo(OOIIo_Z), .II1Oo(II1Oo_Z), .oOo11(oOo11), .ii1Oo_1z(ii1Oo_Z), .lOo11(lOo11), .IOo11(IOo11), .Ol1Oo(Ol1Oo), .iIl0112(iIl0112), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .iOlI1_i(iOlI1_i) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PETFN_TOP_26s_0s_0_1s */ module CTSE_PECRC_1s_26s_1 ( IIoO1, OIo11, un4_IIo11_1z, lOo11, oOo11, IOo11, PF_IOD_CDR_C0_0_RX_CLK_R, OIlI1_i ) ; input [7:0] IIoO1 ; output [31:25] OIo11 ; output un4_IIo11_1z ; input lOo11 ; input oOo11 ; input IOo11 ; input PF_IOD_CDR_C0_0_RX_CLK_R ; input OIlI1_i ; wire un4_IIo11_1z ; wire lOo11 ; wire oOo11 ; wire IOo11 ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire OIlI1_i ; wire [24:0] OIo11_Z; wire [31:0] iIo11; wire [15:0] oIo11_1_Z; wire [26:8] oIo11_7; wire [3:3] oIo11_2; wire [1:1] oIo11_1; wire [1:1] oIo11_3_Z; wire [2:2] oIo11_3; wire [30:19] oIo11_0_Z; wire [23:1] oIo11_0_a2_0_Z; wire [29:0] oIo11; wire [5:5] oIo11_0_a2_0; wire [13:13] oIo11_0_a2_1_Z; wire VCC ; wire un1_oOo11_1_i_Z ; wire GND ; wire N_81 ; wire N_76 ; wire un4_IIo11_23_Z ; wire un4_IIo11_22_Z ; wire un4_IIo11_21_Z ; wire un4_IIo11_20_Z ; wire un4_IIo11_19_Z ; wire un4_IIo11_18_Z ; wire un4_IIo11_17_Z ; wire un4_IIo11_16_Z ; wire N_77 ; wire N_75 ; wire N_87 ; wire un4_IIo11_29_Z ; wire un4_IIo11_28_Z ; wire N_86 ; wire N_84 ; wire N_83 ; // @28:479626 SLE \OIo11[2] ( .Q(OIo11_Z[2]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIo11[2]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[1] ( .Q(OIo11_Z[1]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIo11[1]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[0] ( .Q(OIo11_Z[0]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIo11[0]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[17] ( .Q(OIo11_Z[17]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIo11[17]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[16] ( .Q(OIo11_Z[16]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIo11[16]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[15] ( .Q(OIo11_Z[15]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIo11[15]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[14] ( .Q(OIo11_Z[14]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIo11[14]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[13] ( .Q(OIo11_Z[13]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIo11[13]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[12] ( .Q(OIo11_Z[12]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIo11[12]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[11] ( .Q(OIo11_Z[11]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIo11[11]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[10] ( .Q(OIo11_Z[10]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIo11[10]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[9] ( .Q(OIo11_Z[9]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIo11[9]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[8] ( .Q(OIo11_Z[8]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIo11[8]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[7] ( .Q(OIo11_Z[7]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIo11[7]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[6] ( .Q(OIo11_Z[6]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIo11[6]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[5] ( .Q(OIo11_Z[5]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIo11[5]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[4] ( .Q(OIo11_Z[4]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIo11[4]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[3] ( .Q(OIo11_Z[3]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIo11[3]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11_Z[31] ( .Q(OIo11[31]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIo11[31]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11_Z[30] ( .Q(OIo11[30]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIo11[30]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11_Z[29] ( .Q(OIo11[29]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIo11[29]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11_Z[28] ( .Q(OIo11[28]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIo11[28]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11_Z[27] ( .Q(OIo11[27]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIo11[27]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11_Z[26] ( .Q(OIo11[26]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIo11[26]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11_Z[25] ( .Q(OIo11[25]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIo11[25]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[24] ( .Q(OIo11_Z[24]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIo11[24]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[23] ( .Q(OIo11_Z[23]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIo11[23]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[22] ( .Q(OIo11_Z[22]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIo11[22]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[21] ( .Q(OIo11_Z[21]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIo11[21]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[20] ( .Q(OIo11_Z[20]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIo11[20]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[19] ( .Q(OIo11_Z[19]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIo11[19]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:479626 SLE \OIo11[18] ( .Q(OIo11_Z[18]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIo11[18]), .EN(un1_oOo11_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:478810 CFG3 \oIo11_7_0_a2[26] ( .A(oIo11_1_Z[0]), .B(N_81), .C(N_76), .Y(oIo11_7[26]) ); defparam \oIo11_7_0_a2[26] .INIT=8'h96; // @28:479680 CFG4 un4_IIo11_23 ( .A(OIo11[31]), .B(OIo11[29]), .C(OIo11[28]), .D(OIo11[27]), .Y(un4_IIo11_23_Z) ); defparam un4_IIo11_23.INIT=16'h0002; // @28:479680 CFG4 un4_IIo11_22 ( .A(OIo11[26]), .B(OIo11[25]), .C(OIo11_Z[11]), .D(OIo11[30]), .Y(un4_IIo11_22_Z) ); defparam un4_IIo11_22.INIT=16'h8000; // @28:479680 CFG4 un4_IIo11_21 ( .A(OIo11_Z[10]), .B(OIo11_Z[8]), .C(OIo11_Z[6]), .D(OIo11_Z[5]), .Y(un4_IIo11_21_Z) ); defparam un4_IIo11_21.INIT=16'h8000; // @28:479680 CFG4 un4_IIo11_20 ( .A(OIo11_Z[4]), .B(OIo11_Z[3]), .C(OIo11_Z[1]), .D(OIo11_Z[0]), .Y(un4_IIo11_20_Z) ); defparam un4_IIo11_20.INIT=16'h8000; // @28:479680 CFG4 un4_IIo11_19 ( .A(OIo11_Z[23]), .B(OIo11_Z[22]), .C(OIo11_Z[21]), .D(OIo11_Z[20]), .Y(un4_IIo11_19_Z) ); defparam un4_IIo11_19.INIT=16'h0001; // @28:479680 CFG4 un4_IIo11_18 ( .A(OIo11_Z[19]), .B(OIo11_Z[17]), .C(OIo11_Z[16]), .D(OIo11_Z[9]), .Y(un4_IIo11_18_Z) ); defparam un4_IIo11_18.INIT=16'h0001; // @28:479680 CFG4 un4_IIo11_17 ( .A(OIo11_Z[18]), .B(OIo11_Z[13]), .C(OIo11_Z[7]), .D(OIo11_Z[2]), .Y(un4_IIo11_17_Z) ); defparam un4_IIo11_17.INIT=16'h0002; // @28:479680 CFG4 un4_IIo11_16 ( .A(OIo11_Z[24]), .B(OIo11_Z[15]), .C(OIo11_Z[14]), .D(OIo11_Z[12]), .Y(un4_IIo11_16_Z) ); defparam un4_IIo11_16.INIT=16'h8000; // @28:479061 CFG3 \oIo11_7_0_a2_0[15] ( .A(OIo11[29]), .B(IIoO1[2]), .C(IOo11), .Y(N_77) ); defparam \oIo11_7_0_a2_0[15] .INIT=8'h6A; // @28:478706 CFG3 \oIo11_3_0_a2_0[30] ( .A(OIo11[28]), .B(IIoO1[3]), .C(IOo11), .Y(N_75) ); defparam \oIo11_3_0_a2_0[30] .INIT=8'h6A; // @28:478841 CFG3 \oIo11_1[25] ( .A(OIo11[27]), .B(IIoO1[4]), .C(IOo11), .Y(oIo11_2[3]) ); defparam \oIo11_1[25] .INIT=8'h6A; // @28:479128 CFG3 \oIo11_1[13] ( .A(OIo11[31]), .B(IIoO1[0]), .C(IOo11), .Y(oIo11_1[1]) ); defparam \oIo11_1[13] .INIT=8'h6A; // @28:479303 CFG3 \oIo11_7_0_a2_0[8] ( .A(OIo11_Z[24]), .B(IIoO1[7]), .C(IOo11), .Y(N_76) ); defparam \oIo11_7_0_a2_0[8] .INIT=8'h6A; // @28:479530 CFG3 \oIo11_3[1] ( .A(OIo11[25]), .B(IIoO1[6]), .C(IOo11), .Y(oIo11_3_Z[1]) ); defparam \oIo11_3[1] .INIT=8'h6A; // @28:478862 CFG3 \oIo11_2[24] ( .A(OIo11[26]), .B(IIoO1[5]), .C(IOo11), .Y(oIo11_3[2]) ); defparam \oIo11_2[24] .INIT=8'h6A; // @28:479556 CFG3 \oIo11_1[0] ( .A(OIo11[30]), .B(IIoO1[1]), .C(IOo11), .Y(oIo11_1_Z[0]) ); defparam \oIo11_1[0] .INIT=8'h6A; // @28:478779 CFG2 \oIo11_0[27] ( .A(oIo11_1[1]), .B(OIo11_Z[19]), .Y(oIo11_0_Z[27]) ); defparam \oIo11_0[27] .INIT=4'h6; // @28:478888 CFG2 \oIo11_0_a2_0[23] ( .A(oIo11_3_Z[1]), .B(OIo11_Z[15]), .Y(oIo11_0_a2_0_Z[23]) ); defparam \oIo11_0_a2_0[23] .INIT=4'h6; // @28:479530 CFG2 \oIo11_0_a2_0[1] ( .A(oIo11_1[1]), .B(oIo11_3_Z[1]), .Y(oIo11_0_a2_0_Z[1]) ); defparam \oIo11_0_a2_0[1] .INIT=4'h6; // @28:479035 CFG2 \oIo11_0_a2_0[16] ( .A(N_75), .B(OIo11_Z[8]), .Y(oIo11_0_a2_0_Z[16]) ); defparam \oIo11_0_a2_0[16] .INIT=4'h6; // @28:478962 CFG2 \oIo11_0[19] ( .A(oIo11_1[1]), .B(OIo11_Z[11]), .Y(oIo11_0_Z[19]) ); defparam \oIo11_0[19] .INIT=4'h6; // @28:478841 CFG2 \oIo11_0[25] ( .A(oIo11_3[2]), .B(OIo11_Z[17]), .Y(oIo11_0_Z[25]) ); defparam \oIo11_0[25] .INIT=4'h6; // @28:478706 CFG2 \oIo11_0[30] ( .A(N_75), .B(OIo11_Z[22]), .Y(oIo11_0_Z[30]) ); defparam \oIo11_0[30] .INIT=4'h6; // @28:479303 CFG2 \oIo11_7_0_a2_1[8] ( .A(oIo11_2[3]), .B(N_75), .Y(N_81) ); defparam \oIo11_7_0_a2_1[8] .INIT=4'h6; // @28:479556 CFG2 \oIo11_0_a2[0] ( .A(oIo11_1_Z[0]), .B(N_76), .Y(oIo11[0]) ); defparam \oIo11_0_a2[0] .INIT=4'h6; // @28:479334 CFG2 \oIo11_0_a2_1[7] ( .A(N_77), .B(N_76), .Y(N_87) ); defparam \oIo11_0_a2_1[7] .INIT=4'h6; // @28:479626 CFG3 un1_oOo11_1_i ( .A(oOo11), .B(lOo11), .C(IOo11), .Y(un1_oOo11_1_i_Z) ); defparam un1_oOo11_1_i.INIT=8'hFD; // @28:479169 CFG2 \oIo11_0_a2_0[12] ( .A(oIo11[0]), .B(OIo11_Z[4]), .Y(oIo11_0_a2_0_Z[12]) ); defparam \oIo11_0_a2_0[12] .INIT=4'h6; // @28:479401 CFG3 \oIo11_0_a2_0_0[5] ( .A(N_77), .B(oIo11_1[1]), .C(oIo11_3_Z[1]), .Y(oIo11_0_a2_0[5]) ); defparam \oIo11_0_a2_0_0[5] .INIT=8'h96; // @28:479128 CFG4 \oIo11_0_a2_1[13] ( .A(OIo11_Z[5]), .B(oIo11_3_Z[1]), .C(oIo11_2[3]), .D(N_77), .Y(oIo11_0_a2_1_Z[13]) ); defparam \oIo11_0_a2_1[13] .INIT=16'h6996; // @28:479092 CFG2 \oIo11_0_a2_0[14] ( .A(N_81), .B(OIo11_Z[6]), .Y(oIo11_0_a2_0_Z[14]) ); defparam \oIo11_0_a2_0[14] .INIT=4'h6; // @28:479061 CFG3 \oIo11_1[15] ( .A(oIo11_1[1]), .B(OIo11_Z[7]), .C(N_77), .Y(oIo11_1_Z[15]) ); defparam \oIo11_1[15] .INIT=8'h96; // @28:479241 CFG3 \oIo11_1[10] ( .A(oIo11_2[3]), .B(OIo11_Z[2]), .C(oIo11_3[2]), .Y(oIo11_1_Z[10]) ); defparam \oIo11_1[10] .INIT=8'h96; // @28:479680 CFG4 un4_IIo11_29 ( .A(un4_IIo11_20_Z), .B(un4_IIo11_21_Z), .C(un4_IIo11_23_Z), .D(un4_IIo11_22_Z), .Y(un4_IIo11_29_Z) ); defparam un4_IIo11_29.INIT=16'h8000; // @28:479680 CFG4 un4_IIo11_28 ( .A(un4_IIo11_18_Z), .B(un4_IIo11_17_Z), .C(un4_IIo11_16_Z), .D(un4_IIo11_19_Z), .Y(un4_IIo11_28_Z) ); defparam un4_IIo11_28.INIT=16'h8000; // @28:478727 CFG4 \oIo11_0_a2[29] ( .A(oIo11_1_Z[0]), .B(OIo11_Z[21]), .C(oIo11_1[1]), .D(oIo11_2[3]), .Y(oIo11[29]) ); defparam \oIo11_0_a2[29] .INIT=16'h6996; // @28:479303 CFG3 \oIo11_7_0_a2[8] ( .A(oIo11_3_Z[1]), .B(N_81), .C(N_76), .Y(oIo11_7[8]) ); defparam \oIo11_7_0_a2[8] .INIT=8'h96; // @28:478753 CFG4 \oIo11_0_a2[28] ( .A(OIo11_Z[20]), .B(oIo11_1_Z[0]), .C(oIo11_3[2]), .D(N_77), .Y(oIo11[28]) ); defparam \oIo11_0_a2[28] .INIT=16'h6996; // @28:479009 CFG4 \oIo11_0_a2[17] ( .A(OIo11_Z[9]), .B(oIo11_1_Z[0]), .C(oIo11_3_Z[1]), .D(N_77), .Y(oIo11[17]) ); defparam \oIo11_0_a2[17] .INIT=16'h6996; // @28:479499 CFG3 \oIo11_0_a2_0[2] ( .A(oIo11_3[2]), .B(oIo11_3_Z[1]), .C(oIo11_1[1]), .Y(N_86) ); defparam \oIo11_0_a2_0[2] .INIT=8'h96; // @28:479365 CFG3 \oIo11_0_a2_1[6] ( .A(oIo11_1[1]), .B(oIo11_1_Z[0]), .C(oIo11_3[2]), .Y(N_84) ); defparam \oIo11_0_a2_1[6] .INIT=8'h96; // @28:479365 CFG3 \oIo11_0_a2_0[6] ( .A(oIo11_3_Z[1]), .B(N_77), .C(N_75), .Y(N_83) ); defparam \oIo11_0_a2_0[6] .INIT=8'h96; // @28:479334 CFG4 \oIo11_0_a2[7] ( .A(oIo11_1[1]), .B(N_87), .C(oIo11_3[2]), .D(oIo11_2[3]), .Y(oIo11[7]) ); defparam \oIo11_0_a2[7] .INIT=16'h6996; // @28:479680 CFG2 un4_IIo11 ( .A(un4_IIo11_29_Z), .B(un4_IIo11_28_Z), .Y(un4_IIo11_1z) ); defparam un4_IIo11.INIT=4'h8; // @28:479580 CFG4 \iIo11_iv[31] ( .A(IOo11), .B(N_77), .C(OIo11_Z[23]), .D(lOo11), .Y(iIo11[31]) ); defparam \iIo11_iv[31] .INIT=16'hFF28; // @28:479580 CFG4 \iIo11_iv[22] ( .A(IOo11), .B(N_76), .C(OIo11_Z[14]), .D(lOo11), .Y(iIo11[22]) ); defparam \iIo11_iv[22] .INIT=16'hFF28; // @28:479272 CFG2 \oIo11_7_0_a2[9] ( .A(N_83), .B(oIo11_3[2]), .Y(oIo11_7[9]) ); defparam \oIo11_7_0_a2[9] .INIT=4'h6; // @28:479580 CFG3 \iIo11_iv[0] ( .A(IOo11), .B(oIo11[0]), .C(lOo11), .Y(iIo11[0]) ); defparam \iIo11_iv[0] .INIT=8'hF8; // @28:479580 CFG4 \iIo11_iv[20] ( .A(IOo11), .B(N_75), .C(OIo11_Z[12]), .D(lOo11), .Y(iIo11[20]) ); defparam \iIo11_iv[20] .INIT=16'hFF28; // @28:479580 CFG4 \iIo11_iv[21] ( .A(IOo11), .B(N_77), .C(OIo11_Z[13]), .D(lOo11), .Y(iIo11[21]) ); defparam \iIo11_iv[21] .INIT=16'hFF28; // @28:479580 CFG3 \iIo11_iv[29] ( .A(IOo11), .B(oIo11[29]), .C(lOo11), .Y(iIo11[29]) ); defparam \iIo11_iv[29] .INIT=8'hF8; // @28:479580 CFG4 \iIo11_iv[1] ( .A(lOo11), .B(IOo11), .C(oIo11_0_a2_0_Z[1]), .D(oIo11[0]), .Y(iIo11[1]) ); defparam \iIo11_iv[1] .INIT=16'hAEEA; // @28:479580 CFG4 \iIo11_iv[16] ( .A(IOo11), .B(lOo11), .C(N_87), .D(oIo11_0_a2_0_Z[16]), .Y(iIo11[16]) ); defparam \iIo11_iv[16] .INIT=16'hCEEC; // @28:479580 CFG4 \iIo11_iv[19] ( .A(lOo11), .B(IOo11), .C(oIo11_2[3]), .D(oIo11_0_Z[19]), .Y(iIo11[19]) ); defparam \iIo11_iv[19] .INIT=16'hAEEA; // @28:479580 CFG4 \iIo11_iv[25] ( .A(lOo11), .B(IOo11), .C(oIo11_2[3]), .D(oIo11_0_Z[25]), .Y(iIo11[25]) ); defparam \iIo11_iv[25] .INIT=16'hAEEA; // @28:479580 CFG4 \iIo11_iv[23] ( .A(lOo11), .B(IOo11), .C(oIo11_0_a2_0_Z[23]), .D(oIo11[0]), .Y(iIo11[23]) ); defparam \iIo11_iv[23] .INIT=16'hAEEA; // @28:479580 CFG4 \iIo11_iv[30] ( .A(lOo11), .B(IOo11), .C(oIo11_1[1]), .D(oIo11_0_Z[30]), .Y(iIo11[30]) ); defparam \iIo11_iv[30] .INIT=16'hAEEA; // @28:479580 CFG3 \iIo11_iv[28] ( .A(IOo11), .B(oIo11[28]), .C(lOo11), .Y(iIo11[28]) ); defparam \iIo11_iv[28] .INIT=8'hF8; // @28:479580 CFG3 \iIo11_iv[17] ( .A(IOo11), .B(oIo11[17]), .C(lOo11), .Y(iIo11[17]) ); defparam \iIo11_iv[17] .INIT=8'hF8; // @28:479580 CFG4 \iIo11_iv[13] ( .A(IOo11), .B(lOo11), .C(N_84), .D(oIo11_0_a2_1_Z[13]), .Y(iIo11[13]) ); defparam \iIo11_iv[13] .INIT=16'hCEEC; // @28:479580 CFG4 \iIo11_iv[11] ( .A(IOo11), .B(oIo11_7[8]), .C(OIo11_Z[3]), .D(lOo11), .Y(iIo11[11]) ); defparam \iIo11_iv[11] .INIT=16'hFF28; // @28:479580 CFG4 \iIo11_iv[8] ( .A(IOo11), .B(oIo11_7[8]), .C(OIo11_Z[0]), .D(lOo11), .Y(iIo11[8]) ); defparam \iIo11_iv[8] .INIT=16'hFF28; // @28:479580 CFG4 \iIo11_iv[3] ( .A(IOo11), .B(lOo11), .C(N_86), .D(oIo11_2[3]), .Y(iIo11[3]) ); defparam \iIo11_iv[3] .INIT=16'hCEEC; // @28:479580 CFG4 \iIo11_iv[2] ( .A(IOo11), .B(lOo11), .C(N_86), .D(oIo11[0]), .Y(iIo11[2]) ); defparam \iIo11_iv[2] .INIT=16'hCEEC; // @28:479580 CFG4 \iIo11_iv[10] ( .A(IOo11), .B(lOo11), .C(N_87), .D(oIo11_1_Z[10]), .Y(iIo11[10]) ); defparam \iIo11_iv[10] .INIT=16'hCEEC; // @28:479580 CFG4 \iIo11_iv[15] ( .A(IOo11), .B(lOo11), .C(N_81), .D(oIo11_1_Z[15]), .Y(iIo11[15]) ); defparam \iIo11_iv[15] .INIT=16'hCEEC; // @28:479580 CFG4 \iIo11_iv[24] ( .A(IOo11), .B(N_86), .C(OIo11_Z[16]), .D(lOo11), .Y(iIo11[24]) ); defparam \iIo11_iv[24] .INIT=16'hFF28; // @28:479580 CFG3 \iIo11_iv[7] ( .A(IOo11), .B(oIo11[7]), .C(lOo11), .Y(iIo11[7]) ); defparam \iIo11_iv[7] .INIT=8'hF8; // @28:479580 CFG4 \iIo11_iv[18] ( .A(IOo11), .B(N_84), .C(OIo11_Z[10]), .D(lOo11), .Y(iIo11[18]) ); defparam \iIo11_iv[18] .INIT=16'hFF28; // @28:479580 CFG4 \iIo11_iv[27] ( .A(IOo11), .B(lOo11), .C(N_83), .D(oIo11_0_Z[27]), .Y(iIo11[27]) ); defparam \iIo11_iv[27] .INIT=16'hCEEC; // @28:479580 CFG4 \iIo11_iv[6] ( .A(IOo11), .B(lOo11), .C(N_84), .D(N_83), .Y(iIo11[6]) ); defparam \iIo11_iv[6] .INIT=16'hCEEC; // @28:479580 CFG4 \iIo11_iv[14] ( .A(lOo11), .B(IOo11), .C(N_84), .D(oIo11_0_a2_0_Z[14]), .Y(iIo11[14]) ); defparam \iIo11_iv[14] .INIT=16'hAEEA; // @28:479580 CFG4 \iIo11_iv[5] ( .A(IOo11), .B(lOo11), .C(oIo11_7[26]), .D(oIo11_0_a2_0[5]), .Y(iIo11[5]) ); defparam \iIo11_iv[5] .INIT=16'hCEEC; // @28:479580 CFG4 \iIo11_iv[4] ( .A(IOo11), .B(lOo11), .C(oIo11_7[26]), .D(oIo11_3[2]), .Y(iIo11[4]) ); defparam \iIo11_iv[4] .INIT=16'hCEEC; // @28:479580 CFG4 \iIo11_iv[26] ( .A(IOo11), .B(oIo11_7[26]), .C(OIo11_Z[18]), .D(lOo11), .Y(iIo11[26]) ); defparam \iIo11_iv[26] .INIT=16'hFF28; // @28:479580 CFG4 \iIo11_iv[12] ( .A(IOo11), .B(lOo11), .C(oIo11_7[9]), .D(oIo11_0_a2_0_Z[12]), .Y(iIo11[12]) ); defparam \iIo11_iv[12] .INIT=16'hCEEC; // @28:479580 CFG4 \iIo11_iv[9] ( .A(IOo11), .B(oIo11_7[9]), .C(OIo11_Z[1]), .D(lOo11), .Y(iIo11[9]) ); defparam \iIo11_iv[9] .INIT=16'hFF28; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PECRC_1s_26s_1 */ module CTSE_PERFN_TOP_26s_0s_0_1s ( O0l11, ii0i0, Oi0i0, ooIO1_0, OOlI1, OO111, o1li1_0, o1li1_6, o1li1_3, o1li1_2, o1li1_1, IIoO1_6, IIoO1_3, IIoO1_2, IIoO1_1, IIoO1_0, Oi011, OoiO1_1z, un1_o0IO1_0, II111, OIl11, iOl11, oi0i0_1z, Ii0i0_1z, Ol1i0, lI111, iIl0112, IOI11, i1_i_1, N_246_i, N_242_i, N_238_i, N_102, N_247_i, N_243_i, N_239_i, N_103_i, N_250_i, N_251_i, I1I11_1z, o1iO1_1z, iiOi1_1z, oIoO1_1z, oi011_1z, IoiO1_1z, i1iO1_1z, li011, Ii011, Oo011, lO1i0, i0l11, ii011_1z, PF_IOD_CDR_C0_0_RX_CLK_R, OIlI1_i ) ; input [7:2] O0l11 ; input [7:0] ii0i0 ; input [7:0] Oi0i0 ; input ooIO1_0 ; input [15:0] OOlI1 ; output [32:0] OO111 ; output o1li1_0 ; output o1li1_6 ; output o1li1_3 ; output o1li1_2 ; output o1li1_1 ; output IIoO1_6 ; output IIoO1_3 ; output IIoO1_2 ; output IIoO1_1 ; output IIoO1_0 ; output [7:0] Oi011 ; output [8:2] OoiO1_1z ; input un1_o0IO1_0 ; input II111 ; input OIl11 ; input iOl11 ; input oi0i0_1z ; input Ii0i0_1z ; input Ol1i0 ; input lI111 ; input iIl0112 ; input IOI11 ; input i1_i_1 ; input N_246_i ; input N_242_i ; input N_238_i ; input N_102 ; input N_247_i ; input N_243_i ; input N_239_i ; input N_103_i ; input N_250_i ; input N_251_i ; output I1I11_1z ; output o1iO1_1z ; output iiOi1_1z ; output oIoO1_1z ; output oi011_1z ; output IoiO1_1z ; output i1iO1_1z ; output li011 ; output Ii011 ; input Oo011 ; input lO1i0 ; input i0l11 ; output ii011_1z ; input PF_IOD_CDR_C0_0_RX_CLK_R ; input OIlI1_i ; wire ooIO1_0 ; wire o1li1_0 ; wire o1li1_6 ; wire o1li1_3 ; wire o1li1_2 ; wire o1li1_1 ; wire IIoO1_6 ; wire IIoO1_3 ; wire IIoO1_2 ; wire IIoO1_1 ; wire IIoO1_0 ; wire un1_o0IO1_0 ; wire II111 ; wire OIl11 ; wire iOl11 ; wire oi0i0_1z ; wire Ii0i0_1z ; wire Ol1i0 ; wire lI111 ; wire iIl0112 ; wire IOI11 ; wire i1_i_1 ; wire N_246_i ; wire N_242_i ; wire N_238_i ; wire N_102 ; wire N_247_i ; wire N_243_i ; wire N_239_i ; wire N_103_i ; wire N_250_i ; wire N_251_i ; wire I1I11_1z ; wire o1iO1_1z ; wire iiOi1_1z ; wire oIoO1_1z ; wire oi011_1z ; wire IoiO1_1z ; wire i1iO1_1z ; wire li011 ; wire Ii011 ; wire Oo011 ; wire lO1i0 ; wire i0l11 ; wire ii011_1z ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire OIlI1_i ; wire [7:0] l1Ii1_Z; wire [4:0] l1Ii1_i; wire [14:0] Olli1_Z; wire [14:0] Olli1_s; wire [0:0] un1_loli1_Z; wire [0:0] un1_ooli1_Z; wire [0:0] un1_iili1_Z; wire [15:0] loIi1_Z; wire [12:0] IoIi1_Z; wire [7:0] I1Ii1_Z; wire [8:2] II0i1_Z; wire [7:4] Iili1_Z; wire [7:4] IIoO1_Z; wire [3:1] IIoO1_RNO_Z; wire [2:0] O1oO1_Z; wire [7:4] o1li1_Z; wire [7:4] l1li1_Z; wire [7:0] ioOi1_Z; wire [2:0] oO111_Z; wire [30:16] lO1i1_Z; wire [15:0] ll0i1_Z; wire [15:0] Il0i1_Z; wire [28:23] lO1i1; wire [15:0] O10i1_Z; wire [11:0] i00i1_Z; wire [13:0] Olli1_cry; wire [0:0] Olli1_RNI5NO6U_Y; wire [1:1] Olli1_RNI0D3CF1_Y; wire [2:2] Olli1_RNIS3EH02_Y; wire [3:3] Olli1_RNIPROMH2_Y; wire [4:4] Olli1_RNINK3S23_Y; wire [5:5] Olli1_RNIMEE1K3_Y; wire [6:6] Olli1_RNIM9P654_Y; wire [7:7] Olli1_RNIN54CM4_Y; wire [8:8] Olli1_RNIP2FH75_Y; wire [9:9] Olli1_RNIS0QMO5_Y; wire [10:10] Olli1_RNI7RMO56_Y; wire [11:11] Olli1_RNIJMJQI6_Y; wire [12:12] Olli1_RNI0JGSV6_Y; wire [14:14] Olli1_RNO_FCO; wire [14:14] Olli1_RNO_Y; wire [13:13] Olli1_RNIEGDUC7_Y; wire [16:16] un12_i0li1_a_4; wire [7:0] un6_I10i1_0_data_tmp; wire [28:28] lO1i1_0_o2_1_0_Z; wire [28:28] lO1i1_0_o2_1_Z; wire [15:12] i00i1_i_a2_0_0_Z; wire [28:28] lO1i1_0_a2_2_Z; wire [31:25] OIo11; wire [28:28] lO1i1_0_a2_4_Z; wire IiOi1_Z ; wire IiOi1_i ; wire VCC ; wire GND ; wire ooOi1_Z ; wire N_570_i ; wire loOi1_Z ; wire loOi1_2 ; wire loli1_Z ; wire i1li1 ; wire I0li1_Z ; wire O0li1 ; wire lIIi1_Z ; wire IIIi1_Z ; wire iOIi1_Z ; wire oOIi1_Z ; wire lOIi1_Z ; wire IOIi1_Z ; wire liOi1_Z ; wire OiOi1_Z ; wire OO1i1_Z ; wire O1li1_Z ; wire l0li1 ; wire ii0i1_Z ; wire oi0i1 ; wire ioli1_Z ; wire Ioli1_Z ; wire ooli1_Z ; wire Ooli1_Z ; wire Oili1_Z ; wire Io0i1_Z ; wire N_69 ; wire i1_i_2 ; wire Ii0i1 ; wire i10i1_Z ; wire i10i1_RNO_Z ; wire o0Ii1_Z ; wire lIoO1_Z ; wire O0Ii1_Z ; wire iIIi1_Z ; wire i1_i_3 ; wire olli1_Z ; wire N_65_i ; wire i1_i_0 ; wire Illi1 ; wire OI0i1_Z ; wire I1li1_Z ; wire N_125_mux_i ; wire N_122_mux ; wire ilIi1_Z ; wire oIIi1_Z ; wire Oi0i1_Z ; wire io0i1 ; wire OoOi1_Z ; wire IoOi1_Z ; wire i1_i ; wire I10i1_Z ; wire l0Ii1_Z ; wire l1oO1_Z ; wire oiOi1_Z ; wire I00i1_Z ; wire O00i1_Z ; wire lI0i1 ; wire I0Ii1_Z ; wire OlIi1_Z ; wire oo0i1_Z ; wire lo0i1_Z ; wire oOo11_Z ; wire iO0i1_Z ; wire lOo11_Z ; wire lO0i1_Z ; wire IOo11_Z ; wire oO0i1 ; wire N_661_i ; wire N_660_i ; wire N_659_i ; wire N_658_i ; wire iiIi1lt2 ; wire N_657_i ; wire N_664_i ; wire N_663_i ; wire N_662_i ; wire N_692_i ; wire N_691_i ; wire N_690_i ; wire N_689_i ; wire N_24_0_i ; wire N_558_i ; wire N_30_0_i ; wire N_33_0_i ; wire N_36_0_i ; wire N_695_i ; wire N_58_i ; wire N_467_i ; wire N_520_i ; wire N_521_i ; wire N_522_i ; wire N_523_i ; wire Olli1_cry_cy ; wire iOIi1_RNIB2E1D_S ; wire iOIi1_RNIB2E1D_Y ; wire un18_i00i1_cry_0_Z ; wire un18_i00i1_cry_0_S ; wire un18_i00i1_cry_0_Y ; wire un18_i00i1_cry_1_Z ; wire un18_i00i1_cry_1_S ; wire un18_i00i1_cry_1_Y ; wire un18_i00i1_cry_2_Z ; wire un18_i00i1_cry_2_S ; wire un18_i00i1_cry_2_Y ; wire un18_i00i1_cry_3_Z ; wire un18_i00i1_cry_3_S ; wire un18_i00i1_cry_3_Y ; wire un18_i00i1_cry_4_Z ; wire un18_i00i1_cry_4_S ; wire un18_i00i1_cry_4_Y ; wire un18_i00i1_cry_5_Z ; wire un18_i00i1_cry_5_S ; wire un18_i00i1_cry_5_Y ; wire un18_i00i1_cry_6_Z ; wire un18_i00i1_cry_6_S ; wire un18_i00i1_cry_6_Y ; wire un18_i00i1_cry_7_Z ; wire un18_i00i1_cry_7_S ; wire un18_i00i1_cry_7_Y ; wire un18_i00i1_cry_8_Z ; wire un18_i00i1_cry_8_S ; wire un18_i00i1_cry_8_Y ; wire un18_i00i1_cry_9_Z ; wire un18_i00i1_cry_9_S ; wire un18_i00i1_cry_9_Y ; wire un18_i00i1_cry_10_Z ; wire un18_i00i1_cry_10_S ; wire un18_i00i1_cry_10_Y ; wire un18_i00i1_cry_11_Z ; wire un18_i00i1_cry_11_S ; wire un18_i00i1_cry_11_Y ; wire un18_i00i1_cry_12_Z ; wire un18_i00i1_cry_12_S ; wire un18_i00i1_cry_12_Y ; wire un18_i00i1_cry_13_Z ; wire un18_i00i1_cry_13_S ; wire un18_i00i1_cry_13_Y ; wire un18_i00i1_s_15_FCO ; wire un18_i00i1_s_15_S ; wire un18_i00i1_s_15_Y ; wire un18_i00i1_cry_14_Z ; wire un18_i00i1_cry_14_S ; wire un18_i00i1_cry_14_Y ; wire un8_i00i1_cry_0_Z ; wire un8_i00i1_cry_0_S ; wire un8_i00i1_cry_0_Y ; wire un8_i00i1_cry_1_Z ; wire un8_i00i1_cry_1_S ; wire un8_i00i1_cry_1_Y ; wire un8_i00i1_cry_2_Z ; wire un8_i00i1_cry_2_S ; wire un8_i00i1_cry_2_Y ; wire un8_i00i1_cry_3_Z ; wire un8_i00i1_cry_3_S ; wire un8_i00i1_cry_3_Y ; wire un8_i00i1_cry_4_Z ; wire un8_i00i1_cry_4_S ; wire un8_i00i1_cry_4_Y ; wire un8_i00i1_cry_5_Z ; wire un8_i00i1_cry_5_S ; wire un8_i00i1_cry_5_Y ; wire un8_i00i1_cry_6_Z ; wire un8_i00i1_cry_6_S ; wire un8_i00i1_cry_6_Y ; wire un8_i00i1_cry_7_Z ; wire un8_i00i1_cry_7_S ; wire un8_i00i1_cry_7_Y ; wire un8_i00i1_cry_8_Z ; wire un8_i00i1_cry_8_S ; wire un8_i00i1_cry_8_Y ; wire un8_i00i1_cry_9_Z ; wire un8_i00i1_cry_9_S ; wire un8_i00i1_cry_9_Y ; wire un8_i00i1_cry_10_Z ; wire un8_i00i1_cry_10_S ; wire un8_i00i1_cry_10_Y ; wire un8_i00i1_cry_11_Z ; wire un8_i00i1_cry_11_S ; wire un8_i00i1_cry_11_Y ; wire un8_i00i1_cry_12_Z ; wire un8_i00i1_cry_12_S ; wire un8_i00i1_cry_12_Y ; wire un8_i00i1_cry_13_Z ; wire un8_i00i1_cry_13_S ; wire un8_i00i1_cry_13_Y ; wire un8_i00i1_s_15_FCO ; wire un8_i00i1_s_15_S ; wire un8_i00i1_s_15_Y ; wire un8_i00i1_cry_14_Z ; wire un8_i00i1_cry_14_S ; wire un8_i00i1_cry_14_Y ; wire un12_i0li1_a_4_cry_0_Z ; wire un12_i0li1_a_4_cry_0_S ; wire un12_i0li1_a_4_cry_0_Y ; wire un12_i0li1_a_4_cry_1_Z ; wire un12_i0li1_1 ; wire un12_i0li1_a_4_cry_1_Y ; wire un12_i0li1_a_4_cry_2_Z ; wire un12_i0li1_2 ; wire un12_i0li1_a_4_cry_2_Y ; wire un12_i0li1_a_4_cry_3_Z ; wire un12_i0li1_3 ; wire un12_i0li1_a_4_cry_3_Y ; wire un12_i0li1_a_4_cry_4_Z ; wire un12_i0li1_4 ; wire un12_i0li1_a_4_cry_4_Y ; wire un12_i0li1_a_4_cry_5_Z ; wire un12_i0li1_5 ; wire un12_i0li1_a_4_cry_5_Y ; wire un12_i0li1_a_4_cry_6_Z ; wire un12_i0li1_6 ; wire un12_i0li1_a_4_cry_6_Y ; wire un12_i0li1_a_4_cry_7_Z ; wire un12_i0li1_7 ; wire un12_i0li1_a_4_cry_7_Y ; wire un12_i0li1_a_4_cry_8_Z ; wire un12_i0li1_8 ; wire un12_i0li1_a_4_cry_8_Y ; wire un12_i0li1_a_4_cry_9_Z ; wire un12_i0li1_9 ; wire un12_i0li1_a_4_cry_9_Y ; wire un12_i0li1_a_4_cry_10_Z ; wire un12_i0li1_10 ; wire un12_i0li1_a_4_cry_10_Y ; wire un12_i0li1_a_4_cry_11_Z ; wire un12_i0li1_11 ; wire un12_i0li1_a_4_cry_11_Y ; wire un12_i0li1_a_4_cry_12_Z ; wire un12_i0li1_12 ; wire un12_i0li1_a_4_cry_12_Y ; wire un12_i0li1_a_4_cry_13_Z ; wire un12_i0li1_13 ; wire un12_i0li1_a_4_cry_13_Y ; wire un12_i0li1_a_4_cry_14_Z ; wire un12_i0li1_14 ; wire un12_i0li1_a_4_cry_14_Y ; wire un12_i0li1_15 ; wire un12_i0li1_a_4_cry_15_Y ; wire un6_olli1_cry_0_Z ; wire un6_olli1_cry_0_S ; wire un6_olli1_cry_0_Y ; wire un6_olli1_cry_1_Z ; wire un6_olli1_cry_1_S ; wire un6_olli1_cry_1_Y ; wire un6_olli1_cry_2_Z ; wire un6_olli1_cry_2_S ; wire un6_olli1_cry_2_Y ; wire un6_olli1_cry_3_Z ; wire un6_olli1_cry_3_S ; wire un6_olli1_cry_3_Y ; wire un6_olli1_cry_4_Z ; wire un6_olli1_cry_4_S ; wire un6_olli1_cry_4_Y ; wire un6_olli1_cry_5_Z ; wire un6_olli1_cry_5_S ; wire un6_olli1_cry_5_Y ; wire un6_olli1_cry_6_Z ; wire un6_olli1_cry_6_S ; wire un6_olli1_cry_6_Y ; wire un6_olli1_cry_7_Z ; wire un6_olli1_cry_7_S ; wire un6_olli1_cry_7_Y ; wire un6_olli1_cry_8_Z ; wire un6_olli1_cry_8_S ; wire un6_olli1_cry_8_Y ; wire un6_olli1_cry_9_Z ; wire un6_olli1_cry_9_S ; wire un6_olli1_cry_9_Y ; wire un6_olli1_cry_10_Z ; wire un6_olli1_cry_10_S ; wire un6_olli1_cry_10_Y ; wire un6_olli1_cry_11_Z ; wire un6_olli1_cry_11_S ; wire un6_olli1_cry_11_Y ; wire un6_olli1_cry_12_Z ; wire un6_olli1_cry_12_S ; wire un6_olli1_cry_12_Y ; wire un6_olli1_cry_13_Z ; wire un6_olli1_cry_13_S ; wire un6_olli1_cry_13_Y ; wire un6_olli1_cry_14_Z ; wire un6_olli1_cry_14_S ; wire un6_olli1_cry_14_Y ; wire un6_olli1_cry_15_Z ; wire un6_olli1_cry_15_S ; wire un6_olli1_cry_15_Y ; wire un23_o1Ii1_cry_0_Z ; wire un23_o1Ii1_cry_0_S ; wire un23_o1Ii1_cry_0_Y ; wire un23_o1Ii1_cry_1_Z ; wire un23_o1Ii1_cry_1_S ; wire un23_o1Ii1_cry_1_Y ; wire un23_o1Ii1_cry_2_Z ; wire un23_o1Ii1_cry_2_S ; wire un23_o1Ii1_cry_2_Y ; wire un23_o1Ii1_cry_3_Z ; wire un23_o1Ii1_cry_3_S ; wire un23_o1Ii1_cry_3_Y ; wire un17_o1Ii1_c2 ; wire un23_o1Ii1_cry_4_Z ; wire un23_o1Ii1_cry_4_S ; wire un23_o1Ii1_cry_4_Y ; wire un23_o1Ii1_4 ; wire un23_o1Ii1_cry_5_Z ; wire un23_o1Ii1_cry_5_S ; wire un23_o1Ii1_cry_5_Y ; wire un23_o1Ii1_5 ; wire un23_o1Ii1_cry_6_Z ; wire un23_o1Ii1_cry_6_S ; wire un23_o1Ii1_cry_6_Y ; wire un23_o1Ii1_cry_7_Z ; wire un23_o1Ii1_cry_7_S ; wire un23_o1Ii1_cry_7_Y ; wire un12_o1Ii1_cry_0_Z ; wire un12_o1Ii1_cry_0_S ; wire un12_o1Ii1_cry_0_Y ; wire un12_o1Ii1_cry_1_Z ; wire un12_o1Ii1_cry_1_S ; wire un12_o1Ii1_cry_1_Y ; wire un12_o1Ii1_cry_2_Z ; wire un12_o1Ii1_cry_2_S ; wire un12_o1Ii1_cry_2_Y ; wire un12_o1Ii1_cry_3_Z ; wire un12_o1Ii1_cry_3_S ; wire un12_o1Ii1_cry_3_Y ; wire un6_o1Ii1_c3_Z ; wire un12_o1Ii1_cry_4_Z ; wire un12_o1Ii1_cry_4_S ; wire un12_o1Ii1_cry_4_Y ; wire un12_o1Ii1_cry_5_Z ; wire un12_o1Ii1_cry_5_S ; wire un12_o1Ii1_cry_5_Y ; wire un12_o1Ii1_5 ; wire un12_o1Ii1_cry_6_Z ; wire un12_o1Ii1_cry_6_S ; wire un12_o1Ii1_cry_6_Y ; wire un12_o1Ii1_6 ; wire un12_o1Ii1_cry_7_Z ; wire un12_o1Ii1_cry_7_S ; wire un12_o1Ii1_cry_7_Y ; wire un1_I10i1_2_RNO_6_S ; wire un1_I10i1_2_RNO_6_Y ; wire un1_I10i1_2_RNO_5_S ; wire un1_I10i1_2_RNO_5_Y ; wire un1_I10i1_2_RNO_4_S ; wire un1_I10i1_2_RNO_4_Y ; wire un1_I10i1_2_RNO_3_S ; wire un1_I10i1_2_RNO_3_Y ; wire un1_I10i1_2_RNO_2_S ; wire un1_I10i1_2_RNO_2_Y ; wire un1_I10i1_2_RNO_1_S ; wire un1_I10i1_2_RNO_1_Y ; wire un1_I10i1_2_RNO_0_S ; wire un1_I10i1_2_RNO_0_Y ; wire un1_I10i1_2_RNO_S ; wire un1_I10i1_2_RNO_Y ; wire un6_IoIi1_1_s_1_4178_FCO ; wire un6_IoIi1_1_s_1_4178_S ; wire un6_IoIi1_1_s_1_4178_Y ; wire un6_IoIi1_1_cry_1_Z ; wire un6_IoIi1_1_cry_1_S ; wire un6_IoIi1_1_cry_1_Y ; wire un6_IoIi1_1_cry_2_Z ; wire un6_IoIi1_1_cry_2_S ; wire un6_IoIi1_1_cry_2_Y ; wire un6_IoIi1_1_cry_3_Z ; wire un6_IoIi1_1_cry_3_S ; wire un6_IoIi1_1_cry_3_Y ; wire un6_IoIi1_1_cry_4_Z ; wire un6_IoIi1_1_cry_4_S ; wire un6_IoIi1_1_cry_4_Y ; wire un6_IoIi1_1_cry_5_Z ; wire un6_IoIi1_1_cry_5_S ; wire un6_IoIi1_1_cry_5_Y ; wire un6_IoIi1_1_cry_6_Z ; wire un6_IoIi1_1_cry_6_S ; wire un6_IoIi1_1_cry_6_Y ; wire un6_IoIi1_1_cry_7_Z ; wire un6_IoIi1_1_cry_7_S ; wire un6_IoIi1_1_cry_7_Y ; wire un6_IoIi1_1_cry_8_Z ; wire un6_IoIi1_1_cry_8_S ; wire un6_IoIi1_1_cry_8_Y ; wire un6_IoIi1_1_cry_9_Z ; wire un6_IoIi1_1_cry_9_S ; wire un6_IoIi1_1_cry_9_Y ; wire un6_IoIi1_1_cry_10_Z ; wire un6_IoIi1_1_cry_10_S ; wire un6_IoIi1_1_cry_10_Y ; wire un6_IoIi1_1_cry_11_Z ; wire un6_IoIi1_1_cry_11_S ; wire un6_IoIi1_1_cry_11_Y ; wire un6_IoIi1_1_cry_12_Z ; wire un6_IoIi1_1_cry_12_S ; wire un6_IoIi1_1_cry_12_Y ; wire un6_IoIi1_1_cry_13_Z ; wire un6_IoIi1_1_cry_13_S ; wire un6_IoIi1_1_cry_13_Y ; wire un6_IoIi1_1_s_15_FCO ; wire un6_IoIi1_1_s_15_S ; wire un6_IoIi1_1_s_15_Y ; wire un6_IoIi1_1_cry_14_Z ; wire un6_IoIi1_1_cry_14_S ; wire un6_IoIi1_1_cry_14_Y ; wire un6_I1Ii1_s_1_4179_FCO ; wire un6_I1Ii1_s_1_4179_S ; wire un6_I1Ii1_s_1_4179_Y ; wire un6_I1Ii1_cry_1_Z ; wire un6_I1Ii1_cry_1_S ; wire un6_I1Ii1_cry_1_Y ; wire un6_I1Ii1_cry_2_Z ; wire un6_I1Ii1_cry_2_S ; wire un6_I1Ii1_cry_2_Y ; wire un6_I1Ii1_cry_3_Z ; wire un6_I1Ii1_cry_3_S ; wire un6_I1Ii1_cry_3_Y ; wire un6_I1Ii1_cry_4_Z ; wire un6_I1Ii1_cry_4_S ; wire un6_I1Ii1_cry_4_Y ; wire un6_I1Ii1_cry_5_Z ; wire un6_I1Ii1_cry_5_S ; wire un6_I1Ii1_cry_5_Y ; wire un6_I1Ii1_s_7_FCO ; wire un6_I1Ii1_s_7_S ; wire un6_I1Ii1_s_7_Y ; wire un6_I1Ii1_cry_6_Z ; wire un6_I1Ii1_cry_6_S ; wire un6_I1Ii1_cry_6_Y ; wire un16_i00i1 ; wire N_62 ; wire N_125_mux_i_1_0 ; wire N_587 ; wire un1_IlIi1_3 ; wire un3_olli1lto15_0_0_1_Z ; wire un2_OoIi1_4_Z ; wire un3_olli1lto15_0_0_Z ; wire iOli1_9_Z ; wire N_792 ; wire N_557_1 ; wire N_557 ; wire N_678 ; wire N_667 ; wire Ol0i1 ; wire iI0i1 ; wire un1_O00i1_1_2_Z ; wire m46_e_2 ; wire un2_OoIi1_1_Z ; wire Ooli1_0_Z ; wire m78_i_a3_0_1 ; wire un2_IoOi1_0_a2_3_Z ; wire m9_3 ; wire l0li1_0_a3_0_0_Z ; wire un11_I10i1lto3_0_Z ; wire un1_O00i1_4_Z ; wire N_5430_tz_tz_tz_tz_tz ; wire un4_IlIi1_3_Z ; wire N_666 ; wire N_681 ; wire oi0i1_1 ; wire N_577 ; wire N_59 ; wire un4_lo0i1_2_Z ; wire un4_O1Ii1_1_Z ; wire iI0i1_0_0_a3_1_Z ; wire Ol0i1_0_0_a3_0_2 ; wire un1_O00i1_8_Z ; wire un1_O00i1_7_Z ; wire OI0i1_1_Z ; wire m46_e_12 ; wire m46_e_11 ; wire m46_e_10 ; wire Ol0i1_0_0_a3_3_Z ; wire Ol0i1_0_0_a3_2_Z ; wire io0i1_0_a3_0_0_Z ; wire l1oO1_0_1_Z ; wire un2_OoIi1_7_Z ; wire un2_OoIi1_6_Z ; wire IoOi1_1583_4 ; wire m25_4 ; wire m25_3 ; wire un3_il0i1lto15_4_0_2_Z ; wire un23_lO1i1lto8_1_Z ; wire ol0i1lto8_1_Z ; wire un11_I10i1lto15_6_Z ; wire un11_I10i1lto15_5_Z ; wire m78_i_a3_0_8 ; wire m78_i_a3_0_7 ; wire un2_IoOi1_0_a2_4_Z ; wire un2_O1Ii1_5_Z ; wire un2_O1Ii1_4_Z ; wire m16_5 ; wire un23_lO1i1lto4_1_Z ; wire un18_oIIi1_5_Z ; wire un18_oIIi1_4_Z ; wire ol0i1lto4_1_Z ; wire un5_iili1_Z ; wire un1_I10i1_2_0_Z ; wire un4_IlIi1_1_0_Z ; wire N_113_mux ; wire un1_lo0i1_2_Z ; wire iIIi1_2_tz_Z ; wire un7_OlIi1_0 ; wire N_4996_tz_tz ; wire N_670 ; wire N_675 ; wire N_677 ; wire N_684 ; wire N_560 ; wire N_223 ; wire un1_O00i1_11_Z ; wire un1_O00i1_10_Z ; wire iI0i1_0_0_a3_0_1_Z ; wire un2_OoIi1_8_Z ; wire IoOi1_1583_3 ; wire lo0i1_1553_tz_0 ; wire un11_I10i1lto15_7_Z ; wire m78_i_a3_0_9 ; wire m9_4 ; wire m16_4 ; wire un6_OlIi1_Z ; wire un5_oIIi1_Z ; wire un2_IoOi1 ; wire un10_iIIi1_Z ; wire un4_O1Ii1_Z ; wire l1oO1_0_tz_Z ; wire OI0i1_10 ; wire N_672 ; wire un11_I10i1lt5 ; wire un3_il0i1lt5 ; wire un1_I10i1_2_Z ; wire m46_e_9 ; wire io0i1_0_a3_0_2_Z ; wire m25_6 ; wire i8_mux ; wire un1_lIoO1_Z ; wire N_5400_tz ; wire lIoO1_RNO_Z ; wire un23_lO1i1lt8 ; wire N_676 ; wire un16_i00i1lt15 ; wire ol0i1lt8 ; wire un17_oIIi1_Z ; wire lo0i1_1553_1 ; wire IoOi1_1583_7 ; wire un1_O00i1_1_Z ; wire un11_I10i1 ; wire un3_il0i1_4_0 ; wire oIIi1_1_RNO_Z ; wire un3_I1Ii1_Z ; wire un12_I1Ii1_Z ; wire i7_mux ; wire un4_IIo11 ; wire oIIi1_1_Z ; wire un7_I10i1_1_Z ; wire IoOi1_RNO_Z ; wire un13_OlIi1_Z ; wire un9_IlIi1_Z ; wire N_631 ; wire N_682 ; wire N_748 ; wire N_768 ; wire N_686 ; wire un23_lO1i1lt15 ; wire N_655 ; wire ol0i1lt15 ; wire N_665 ; wire N_153 ; wire N_152 ; CFG1 \l1Ii1_RNIEA0D6[0] ( .A(l1Ii1_Z[0]), .Y(l1Ii1_i[0]) ); defparam \l1Ii1_RNIEA0D6[0] .INIT=2'h1; CFG1 \l1Ii1_RNIFB0D6[1] ( .A(l1Ii1_Z[1]), .Y(l1Ii1_i[1]) ); defparam \l1Ii1_RNIFB0D6[1] .INIT=2'h1; CFG1 \l1Ii1_RNIGC0D6[2] ( .A(l1Ii1_Z[2]), .Y(l1Ii1_i[2]) ); defparam \l1Ii1_RNIGC0D6[2] .INIT=2'h1; CFG1 \l1Ii1_RNIHD0D6[3] ( .A(l1Ii1_Z[3]), .Y(l1Ii1_i[3]) ); defparam \l1Ii1_RNIHD0D6[3] .INIT=2'h1; CFG1 un12_o1Ii1_cry_4_RNO ( .A(l1Ii1_Z[4]), .Y(l1Ii1_i[4]) ); defparam un12_o1Ii1_cry_4_RNO.INIT=2'h1; CFG1 I1I11_RNO ( .A(IiOi1_Z), .Y(IiOi1_i) ); defparam I1I11_RNO.INIT=2'h1; // @28:512657 SLE \Olli1[14] ( .Q(Olli1_Z[14]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Olli1_s[14]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512657 SLE \Olli1[13] ( .Q(Olli1_Z[13]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Olli1_s[13]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512657 SLE \Olli1[12] ( .Q(Olli1_Z[12]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Olli1_s[12]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512657 SLE \Olli1[11] ( .Q(Olli1_Z[11]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Olli1_s[11]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512657 SLE \Olli1[10] ( .Q(Olli1_Z[10]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Olli1_s[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512657 SLE \Olli1[9] ( .Q(Olli1_Z[9]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Olli1_s[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512657 SLE \Olli1[8] ( .Q(Olli1_Z[8]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Olli1_s[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512657 SLE \Olli1[7] ( .Q(Olli1_Z[7]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Olli1_s[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512657 SLE \Olli1[6] ( .Q(Olli1_Z[6]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Olli1_s[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512657 SLE \Olli1[5] ( .Q(Olli1_Z[5]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Olli1_s[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512657 SLE \Olli1[4] ( .Q(Olli1_Z[4]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Olli1_s[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512657 SLE \Olli1[3] ( .Q(Olli1_Z[3]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Olli1_s[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512657 SLE \Olli1[2] ( .Q(Olli1_Z[2]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Olli1_s[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512657 SLE \Olli1[1] ( .Q(Olli1_Z[1]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Olli1_s[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512657 SLE \Olli1[0] ( .Q(Olli1_Z[0]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Olli1_s[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:510928 SLE ooOi1 ( .Q(ooOi1_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_570_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:510889 SLE loOi1 ( .Q(loOi1_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(loOi1_2), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:513093 SLE loli1 ( .Q(loli1_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1li1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512802 SLE I0li1 ( .Q(I0li1_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O0li1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:511484 SLE lIIi1 ( .Q(lIIi1_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IIIi1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:511404 SLE iOIi1 ( .Q(iOIi1_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oOIi1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:511324 SLE lOIi1 ( .Q(lOIi1_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IOIi1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:511190 SLE liOi1 ( .Q(liOi1_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OiOi1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515107 SLE l0iO1 ( .Q(ii011_1z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO1i1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:511448 SLE IIIi1 ( .Q(IIIi1_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i0l11), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:511368 SLE oOIi1 ( .Q(oOIi1_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lO1i0), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:511288 SLE IOIi1 ( .Q(IOIi1_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Oo011), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:511015 SLE OiOi1 ( .Q(OiOi1_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(un1_o0IO1_0), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512856 SLE O1li1 ( .Q(O1li1_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(l0li1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:513379 SLE oliO1 ( .Q(Ii011), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(un1_loli1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515030 SLE ii0i1 ( .Q(ii0i1_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oi0i1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:513231 SLE ioli1 ( .Q(ioli1_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Ioli1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:513183 SLE ooli1 ( .Q(ooli1_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Ooli1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:511051 SLE IiOi1 ( .Q(IiOi1_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(loOi1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:513129 SLE Oili1 ( .Q(Oili1_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(loli1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514773 SLE Io0i1 ( .Q(Io0i1_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_69), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514981 SLE li0i1 ( .Q(i1_i_2), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Ii0i1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:513433 SLE iliO1 ( .Q(li011), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(un1_ooli1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515066 SLE OO1i1 ( .Q(OO1i1_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ii0i1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514707 SLE i10i1 ( .Q(i10i1_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i10i1_RNO_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:511961 SLE o0Ii1 ( .Q(o0Ii1_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIoO1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:511706 SLE O0Ii1 ( .Q(O0Ii1_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIIi1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514488 SLE illi1 ( .Q(i1_i_3), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(olli1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514168 SLE i1iO1 ( .Q(i1iO1_1z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_65_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512759 SLE llli1 ( .Q(i1_i_0), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Illi1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:513843 SLE IoiO1 ( .Q(IoiO1_1z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OI0i1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:513499 SLE O0iO1 ( .Q(oi011_1z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(un1_iili1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512956 SLE I1li1 ( .Q(I1li1_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_125_mux_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512048 SLE oIoO1 ( .Q(oIoO1_1z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_122_mux), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:511627 SLE ilIi1 ( .Q(ilIi1_Z), .ADn(GND), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oIIi1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514923 SLE Oi0i1 ( .Q(Oi0i1_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(io0i1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514132 SLE OoOi1 ( .Q(OoOi1_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IoOi1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514656 SLE l10i1 ( .Q(i1_i), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I10i1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:511885 SLE l0Ii1 ( .Q(l0Ii1_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(l1oO1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:511252 SLE iiOi1 ( .Q(iiOi1_1z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oiOi1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514420 SLE I00i1 ( .Q(I00i1_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O00i1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:513976 SLE o1iO1 ( .Q(o1iO1_1z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lI0i1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:511803 SLE I0Ii1 ( .Q(I0Ii1_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OlIi1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514855 SLE oo0i1 ( .Q(oo0i1_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lo0i1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:513733 SLE oOo11 ( .Q(oOo11_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iO0i1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:513627 SLE lOo11 ( .Q(lOo11_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lO0i1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:513688 SLE IOo11 ( .Q(IOo11_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oO0i1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512350 SLE \loIi1[9] ( .Q(loIi1_Z[9]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IoIi1_Z[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512350 SLE \loIi1[8] ( .Q(loIi1_Z[8]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IoIi1_Z[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512350 SLE \loIi1[7] ( .Q(loIi1_Z[7]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IoIi1_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512350 SLE \loIi1[6] ( .Q(loIi1_Z[6]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IoIi1_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512350 SLE \loIi1[5] ( .Q(loIi1_Z[5]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_661_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512350 SLE \loIi1[4] ( .Q(loIi1_Z[4]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_660_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512350 SLE \loIi1[3] ( .Q(loIi1_Z[3]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_659_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512350 SLE \loIi1[2] ( .Q(loIi1_Z[2]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_658_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512350 SLE \loIi1[1] ( .Q(iiIi1lt2), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_657_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512350 SLE \loIi1[0] ( .Q(loIi1_Z[0]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IoIi1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:511532 SLE I1I11 ( .Q(I1I11_1z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIIi1_Z), .EN(IiOi1_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:513310 SLE \lliO1[0] ( .Q(Oi011[0]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_251_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512167 SLE \l1Ii1[7] ( .Q(l1Ii1_Z[7]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I1Ii1_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512167 SLE \l1Ii1[6] ( .Q(l1Ii1_Z[6]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I1Ii1_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512167 SLE \l1Ii1[5] ( .Q(l1Ii1_Z[5]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I1Ii1_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512167 SLE \l1Ii1[4] ( .Q(l1Ii1_Z[4]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I1Ii1_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512167 SLE \l1Ii1[3] ( .Q(l1Ii1_Z[3]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I1Ii1_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512167 SLE \l1Ii1[2] ( .Q(l1Ii1_Z[2]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I1Ii1_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512167 SLE \l1Ii1[1] ( .Q(l1Ii1_Z[1]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I1Ii1_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512167 SLE \l1Ii1[0] ( .Q(l1Ii1_Z[0]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I1Ii1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512350 SLE \loIi1[15] ( .Q(loIi1_Z[15]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_664_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512350 SLE \loIi1[14] ( .Q(loIi1_Z[14]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_663_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512350 SLE \loIi1[13] ( .Q(loIi1_Z[13]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_662_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512350 SLE \loIi1[12] ( .Q(loIi1_Z[12]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IoIi1_Z[12]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512350 SLE \loIi1[11] ( .Q(loIi1_Z[11]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IoIi1_Z[11]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:512350 SLE \loIi1[10] ( .Q(loIi1_Z[10]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IoIi1_Z[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:513033 SLE \o1li1[0] ( .Q(o1li1_0), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_250_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:513901 SLE \OoiO1[8] ( .Q(OoiO1_1z[8]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(II0i1_Z[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:513901 SLE \OoiO1[7] ( .Q(OoiO1_1z[7]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(II0i1_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:513901 SLE \OoiO1[6] ( .Q(OoiO1_1z[6]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(II0i1_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:513901 SLE \OoiO1[5] ( .Q(OoiO1_1z[5]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(II0i1_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:513901 SLE \OoiO1[4] ( .Q(OoiO1_1z[4]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(II0i1_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:513901 SLE \OoiO1[3] ( .Q(OoiO1_1z[3]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(II0i1_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:513901 SLE \OoiO1[2] ( .Q(OoiO1_1z[2]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(II0i1_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:513310 SLE \lliO1[7] ( .Q(Oi011[7]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Iili1_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:513310 SLE \lliO1[6] ( .Q(Oi011[6]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_103_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:513310 SLE \lliO1[5] ( .Q(Oi011[5]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Iili1_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:513310 SLE \lliO1[4] ( .Q(Oi011[4]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Iili1_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:513310 SLE \lliO1[3] ( .Q(Oi011[3]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_239_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:513310 SLE \lliO1[2] ( .Q(Oi011[2]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_243_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:513310 SLE \lliO1[1] ( .Q(Oi011[1]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_247_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:511139 SLE \IIoO1[7] ( .Q(IIoO1_Z[7]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_692_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:511139 SLE \IIoO1[6] ( .Q(IIoO1_6), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_691_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:511139 SLE \IIoO1[5] ( .Q(IIoO1_Z[5]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_690_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:511139 SLE \IIoO1[4] ( .Q(IIoO1_Z[4]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_689_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:511139 SLE \IIoO1[3] ( .Q(IIoO1_3), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IIoO1_RNO_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:511139 SLE \IIoO1[2] ( .Q(IIoO1_2), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O1oO1_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:511139 SLE \IIoO1[1] ( .Q(IIoO1_1), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IIoO1_RNO_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:511139 SLE \IIoO1[0] ( .Q(IIoO1_0), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O1oO1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:513033 SLE \o1li1[7] ( .Q(o1li1_Z[7]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(l1li1_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:513033 SLE \o1li1[6] ( .Q(o1li1_6), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_102), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:513033 SLE \o1li1[5] ( .Q(o1li1_Z[5]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(l1li1_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:513033 SLE \o1li1[4] ( .Q(o1li1_Z[4]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(l1li1_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:513033 SLE \o1li1[3] ( .Q(o1li1_3), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_238_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:513033 SLE \o1li1[2] ( .Q(o1li1_2), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_242_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:513033 SLE \o1li1[1] ( .Q(o1li1_1), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_246_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515398 SLE \o0iO1[6] ( .Q(OO111[6]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(loIi1_Z[6]), .EN(OO1i1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515398 SLE \o0iO1[5] ( .Q(OO111[5]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(loIi1_Z[5]), .EN(OO1i1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515398 SLE \o0iO1[4] ( .Q(OO111[4]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(loIi1_Z[4]), .EN(OO1i1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515398 SLE \o0iO1[3] ( .Q(OO111[3]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(loIi1_Z[3]), .EN(OO1i1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515398 SLE \o0iO1[2] ( .Q(OO111[2]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(loIi1_Z[2]), .EN(OO1i1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515398 SLE \o0iO1[1] ( .Q(OO111[1]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iiIi1lt2), .EN(OO1i1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515398 SLE \o0iO1[0] ( .Q(OO111[0]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(loIi1_Z[0]), .EN(OO1i1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:510964 SLE \ioOi1[7] ( .Q(ioOi1_Z[7]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_24_0_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:510964 SLE \ioOi1[6] ( .Q(ioOi1_Z[6]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_558_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:510964 SLE \ioOi1[5] ( .Q(ioOi1_Z[5]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_30_0_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:510964 SLE \ioOi1[4] ( .Q(ioOi1_Z[4]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_33_0_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:510964 SLE \ioOi1[3] ( .Q(ioOi1_Z[3]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_36_0_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:510964 SLE \ioOi1[2] ( .Q(ioOi1_Z[2]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oO111_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:510964 SLE \ioOi1[1] ( .Q(ioOi1_Z[1]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oO111_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:510964 SLE \ioOi1[0] ( .Q(ioOi1_Z[0]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oO111_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515398 SLE \o0iO1[21] ( .Q(OO111[21]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1_i), .EN(OO1i1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515398 SLE \o0iO1[20] ( .Q(OO111[20]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_695_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515398 SLE \o0iO1[19] ( .Q(OO111[19]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i10i1_Z), .EN(OO1i1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515398 SLE \o0iO1[18] ( .Q(OO111[18]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Io0i1_Z), .EN(OO1i1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515398 SLE \o0iO1[17] ( .Q(OO111[17]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lO1i1_Z[17]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515398 SLE \o0iO1[16] ( .Q(OO111[16]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lO1i1_Z[16]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515398 SLE \o0iO1[15] ( .Q(OO111[15]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(loIi1_Z[15]), .EN(OO1i1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515398 SLE \o0iO1[14] ( .Q(OO111[14]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(loIi1_Z[14]), .EN(OO1i1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515398 SLE \o0iO1[13] ( .Q(OO111[13]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(loIi1_Z[13]), .EN(OO1i1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515398 SLE \o0iO1[12] ( .Q(OO111[12]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(loIi1_Z[12]), .EN(OO1i1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515398 SLE \o0iO1[11] ( .Q(OO111[11]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(loIi1_Z[11]), .EN(OO1i1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515398 SLE \o0iO1[10] ( .Q(OO111[10]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(loIi1_Z[10]), .EN(OO1i1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515398 SLE \o0iO1[9] ( .Q(OO111[9]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(loIi1_Z[9]), .EN(OO1i1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515398 SLE \o0iO1[8] ( .Q(OO111[8]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(loIi1_Z[8]), .EN(OO1i1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515398 SLE \o0iO1[7] ( .Q(OO111[7]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(loIi1_Z[7]), .EN(OO1i1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514311 SLE \ll0i1[3] ( .Q(ll0i1_Z[3]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Il0i1_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514311 SLE \ll0i1[2] ( .Q(ll0i1_Z[2]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Il0i1_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514311 SLE \ll0i1[1] ( .Q(ll0i1_Z[1]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Il0i1_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514311 SLE \ll0i1[0] ( .Q(ll0i1_Z[0]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Il0i1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515398 SLE \o0iO1[32] ( .Q(OO111[32]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O1li1_Z), .EN(OO1i1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515398 SLE \o0iO1[31] ( .Q(OO111[31]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1_i_0), .EN(OO1i1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515398 SLE \o0iO1[30] ( .Q(OO111[30]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lO1i1_Z[30]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515398 SLE \o0iO1[29] ( .Q(OO111[29]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lO1i1_Z[29]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515398 SLE \o0iO1[28] ( .Q(OO111[28]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lO1i1[28]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515398 SLE \o0iO1[27] ( .Q(OO111[27]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1_i_1), .EN(OO1i1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515398 SLE \o0iO1[26] ( .Q(OO111[26]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1_i_2), .EN(OO1i1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515398 SLE \o0iO1[25] ( .Q(OO111[25]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_58_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515398 SLE \o0iO1[24] ( .Q(OO111[24]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_467_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515398 SLE \o0iO1[23] ( .Q(OO111[23]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lO1i1[23]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515398 SLE \o0iO1[22] ( .Q(OO111[22]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1_i_3), .EN(OO1i1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514580 SLE \O10i1[2] ( .Q(O10i1_Z[2]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i00i1_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514580 SLE \O10i1[1] ( .Q(O10i1_Z[1]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i00i1_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514580 SLE \O10i1[0] ( .Q(O10i1_Z[0]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i00i1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514311 SLE \ll0i1[15] ( .Q(ll0i1_Z[15]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Il0i1_Z[15]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514311 SLE \ll0i1[14] ( .Q(ll0i1_Z[14]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Il0i1_Z[14]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514311 SLE \ll0i1[13] ( .Q(ll0i1_Z[13]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Il0i1_Z[13]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514311 SLE \ll0i1[12] ( .Q(ll0i1_Z[12]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Il0i1_Z[12]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514311 SLE \ll0i1[11] ( .Q(ll0i1_Z[11]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Il0i1_Z[11]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514311 SLE \ll0i1[10] ( .Q(ll0i1_Z[10]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Il0i1_Z[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514311 SLE \ll0i1[9] ( .Q(ll0i1_Z[9]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Il0i1_Z[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514311 SLE \ll0i1[8] ( .Q(ll0i1_Z[8]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Il0i1_Z[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514311 SLE \ll0i1[7] ( .Q(ll0i1_Z[7]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Il0i1_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514311 SLE \ll0i1[6] ( .Q(ll0i1_Z[6]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Il0i1_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514311 SLE \ll0i1[5] ( .Q(ll0i1_Z[5]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Il0i1_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514311 SLE \ll0i1[4] ( .Q(ll0i1_Z[4]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Il0i1_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514580 SLE \O10i1[15] ( .Q(O10i1_Z[15]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_520_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514580 SLE \O10i1[14] ( .Q(O10i1_Z[14]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_521_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514580 SLE \O10i1[13] ( .Q(O10i1_Z[13]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_522_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514580 SLE \O10i1[12] ( .Q(O10i1_Z[12]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_523_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514580 SLE \O10i1[11] ( .Q(O10i1_Z[11]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i00i1_Z[11]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514580 SLE \O10i1[10] ( .Q(O10i1_Z[10]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i00i1_Z[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514580 SLE \O10i1[9] ( .Q(O10i1_Z[9]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i00i1_Z[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514580 SLE \O10i1[8] ( .Q(O10i1_Z[8]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i00i1_Z[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514580 SLE \O10i1[7] ( .Q(O10i1_Z[7]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i00i1_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514580 SLE \O10i1[6] ( .Q(O10i1_Z[6]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i00i1_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514580 SLE \O10i1[5] ( .Q(O10i1_Z[5]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i00i1_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514580 SLE \O10i1[4] ( .Q(O10i1_Z[4]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i00i1_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:514580 SLE \O10i1[3] ( .Q(O10i1_Z[3]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i00i1_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:473213 ARI1 iOIi1_RNIB2E1D ( .FCO(Olli1_cry_cy), .S(iOIi1_RNIB2E1D_S), .Y(iOIi1_RNIB2E1D_Y), .B(iOIi1_Z), .C(ii011_1z), .D(IOI11), .A(VCC), .FCI(VCC) ); defparam iOIi1_RNIB2E1D.INIT=20'h40200; // @28:473213 ARI1 \Olli1_RNI5NO6U[0] ( .FCO(Olli1_cry[0]), .S(Olli1_s[0]), .Y(Olli1_RNI5NO6U_Y[0]), .B(Olli1_Z[0]), .C(IOI11), .D(ii011_1z), .A(iOIi1_Z), .FCI(Olli1_cry_cy) ); defparam \Olli1_RNI5NO6U[0] .INIT=20'h40200; // @28:473213 ARI1 \Olli1_RNI0D3CF1[1] ( .FCO(Olli1_cry[1]), .S(Olli1_s[1]), .Y(Olli1_RNI0D3CF1_Y[1]), .B(Olli1_Z[1]), .C(iOIi1_RNIB2E1D_Y), .D(GND), .A(VCC), .FCI(Olli1_cry[0]) ); defparam \Olli1_RNI0D3CF1[1] .INIT=20'h48800; // @28:473213 ARI1 \Olli1_RNIS3EH02[2] ( .FCO(Olli1_cry[2]), .S(Olli1_s[2]), .Y(Olli1_RNIS3EH02_Y[2]), .B(Olli1_Z[2]), .C(iOIi1_RNIB2E1D_Y), .D(GND), .A(VCC), .FCI(Olli1_cry[1]) ); defparam \Olli1_RNIS3EH02[2] .INIT=20'h48800; // @28:473213 ARI1 \Olli1_RNIPROMH2[3] ( .FCO(Olli1_cry[3]), .S(Olli1_s[3]), .Y(Olli1_RNIPROMH2_Y[3]), .B(Olli1_Z[3]), .C(iOIi1_RNIB2E1D_Y), .D(GND), .A(VCC), .FCI(Olli1_cry[2]) ); defparam \Olli1_RNIPROMH2[3] .INIT=20'h48800; // @28:473213 ARI1 \Olli1_RNINK3S23[4] ( .FCO(Olli1_cry[4]), .S(Olli1_s[4]), .Y(Olli1_RNINK3S23_Y[4]), .B(Olli1_Z[4]), .C(iOIi1_RNIB2E1D_Y), .D(GND), .A(VCC), .FCI(Olli1_cry[3]) ); defparam \Olli1_RNINK3S23[4] .INIT=20'h48800; // @28:473213 ARI1 \Olli1_RNIMEE1K3[5] ( .FCO(Olli1_cry[5]), .S(Olli1_s[5]), .Y(Olli1_RNIMEE1K3_Y[5]), .B(Olli1_Z[5]), .C(iOIi1_RNIB2E1D_Y), .D(GND), .A(VCC), .FCI(Olli1_cry[4]) ); defparam \Olli1_RNIMEE1K3[5] .INIT=20'h48800; // @28:473213 ARI1 \Olli1_RNIM9P654[6] ( .FCO(Olli1_cry[6]), .S(Olli1_s[6]), .Y(Olli1_RNIM9P654_Y[6]), .B(Olli1_Z[6]), .C(iOIi1_RNIB2E1D_Y), .D(GND), .A(VCC), .FCI(Olli1_cry[5]) ); defparam \Olli1_RNIM9P654[6] .INIT=20'h48800; // @28:473213 ARI1 \Olli1_RNIN54CM4[7] ( .FCO(Olli1_cry[7]), .S(Olli1_s[7]), .Y(Olli1_RNIN54CM4_Y[7]), .B(Olli1_Z[7]), .C(iOIi1_RNIB2E1D_Y), .D(GND), .A(VCC), .FCI(Olli1_cry[6]) ); defparam \Olli1_RNIN54CM4[7] .INIT=20'h48800; // @28:473213 ARI1 \Olli1_RNIP2FH75[8] ( .FCO(Olli1_cry[8]), .S(Olli1_s[8]), .Y(Olli1_RNIP2FH75_Y[8]), .B(Olli1_Z[8]), .C(iOIi1_RNIB2E1D_Y), .D(GND), .A(VCC), .FCI(Olli1_cry[7]) ); defparam \Olli1_RNIP2FH75[8] .INIT=20'h48800; // @28:473213 ARI1 \Olli1_RNIS0QMO5[9] ( .FCO(Olli1_cry[9]), .S(Olli1_s[9]), .Y(Olli1_RNIS0QMO5_Y[9]), .B(Olli1_Z[9]), .C(iOIi1_RNIB2E1D_Y), .D(GND), .A(VCC), .FCI(Olli1_cry[8]) ); defparam \Olli1_RNIS0QMO5[9] .INIT=20'h48800; // @28:473213 ARI1 \Olli1_RNI7RMO56[10] ( .FCO(Olli1_cry[10]), .S(Olli1_s[10]), .Y(Olli1_RNI7RMO56_Y[10]), .B(Olli1_Z[10]), .C(iOIi1_RNIB2E1D_Y), .D(GND), .A(VCC), .FCI(Olli1_cry[9]) ); defparam \Olli1_RNI7RMO56[10] .INIT=20'h48800; // @28:473213 ARI1 \Olli1_RNIJMJQI6[11] ( .FCO(Olli1_cry[11]), .S(Olli1_s[11]), .Y(Olli1_RNIJMJQI6_Y[11]), .B(Olli1_Z[11]), .C(iOIi1_RNIB2E1D_Y), .D(GND), .A(VCC), .FCI(Olli1_cry[10]) ); defparam \Olli1_RNIJMJQI6[11] .INIT=20'h48800; // @28:473213 ARI1 \Olli1_RNI0JGSV6[12] ( .FCO(Olli1_cry[12]), .S(Olli1_s[12]), .Y(Olli1_RNI0JGSV6_Y[12]), .B(Olli1_Z[12]), .C(iOIi1_RNIB2E1D_Y), .D(GND), .A(VCC), .FCI(Olli1_cry[11]) ); defparam \Olli1_RNI0JGSV6[12] .INIT=20'h48800; // @28:473213 ARI1 \Olli1_RNO[14] ( .FCO(Olli1_RNO_FCO[14]), .S(Olli1_s[14]), .Y(Olli1_RNO_Y[14]), .B(Olli1_Z[14]), .C(iOIi1_RNIB2E1D_Y), .D(GND), .A(VCC), .FCI(Olli1_cry[13]) ); defparam \Olli1_RNO[14] .INIT=20'h48800; // @28:473213 ARI1 \Olli1_RNIEGDUC7[13] ( .FCO(Olli1_cry[13]), .S(Olli1_s[13]), .Y(Olli1_RNIEGDUC7_Y[13]), .B(Olli1_Z[13]), .C(iOIi1_RNIB2E1D_Y), .D(GND), .A(VCC), .FCI(Olli1_cry[12]) ); defparam \Olli1_RNIEGDUC7[13] .INIT=20'h48800; // @28:514568 ARI1 un18_i00i1_cry_0 ( .FCO(un18_i00i1_cry_0_Z), .S(un18_i00i1_cry_0_S), .Y(un18_i00i1_cry_0_Y), .B(loIi1_Z[0]), .C(GND), .D(GND), .A(VCC), .FCI(GND) ); defparam un18_i00i1_cry_0.INIT=20'h65500; // @28:514568 ARI1 un18_i00i1_cry_1 ( .FCO(un18_i00i1_cry_1_Z), .S(un18_i00i1_cry_1_S), .Y(un18_i00i1_cry_1_Y), .B(iiIi1lt2), .C(GND), .D(GND), .A(VCC), .FCI(un18_i00i1_cry_0_Z) ); defparam un18_i00i1_cry_1.INIT=20'h65500; // @28:514568 ARI1 un18_i00i1_cry_2 ( .FCO(un18_i00i1_cry_2_Z), .S(un18_i00i1_cry_2_S), .Y(un18_i00i1_cry_2_Y), .B(loIi1_Z[2]), .C(GND), .D(GND), .A(VCC), .FCI(un18_i00i1_cry_1_Z) ); defparam un18_i00i1_cry_2.INIT=20'h4AA00; // @28:514568 ARI1 un18_i00i1_cry_3 ( .FCO(un18_i00i1_cry_3_Z), .S(un18_i00i1_cry_3_S), .Y(un18_i00i1_cry_3_Y), .B(loIi1_Z[3]), .C(GND), .D(GND), .A(VCC), .FCI(un18_i00i1_cry_2_Z) ); defparam un18_i00i1_cry_3.INIT=20'h65500; // @28:514568 ARI1 un18_i00i1_cry_4 ( .FCO(un18_i00i1_cry_4_Z), .S(un18_i00i1_cry_4_S), .Y(un18_i00i1_cry_4_Y), .B(loIi1_Z[4]), .C(GND), .D(GND), .A(VCC), .FCI(un18_i00i1_cry_3_Z) ); defparam un18_i00i1_cry_4.INIT=20'h4AA00; // @28:514568 ARI1 un18_i00i1_cry_5 ( .FCO(un18_i00i1_cry_5_Z), .S(un18_i00i1_cry_5_S), .Y(un18_i00i1_cry_5_Y), .B(loIi1_Z[5]), .C(GND), .D(GND), .A(VCC), .FCI(un18_i00i1_cry_4_Z) ); defparam un18_i00i1_cry_5.INIT=20'h65500; // @28:514568 ARI1 un18_i00i1_cry_6 ( .FCO(un18_i00i1_cry_6_Z), .S(un18_i00i1_cry_6_S), .Y(un18_i00i1_cry_6_Y), .B(loIi1_Z[6]), .C(GND), .D(GND), .A(VCC), .FCI(un18_i00i1_cry_5_Z) ); defparam un18_i00i1_cry_6.INIT=20'h65500; // @28:514568 ARI1 un18_i00i1_cry_7 ( .FCO(un18_i00i1_cry_7_Z), .S(un18_i00i1_cry_7_S), .Y(un18_i00i1_cry_7_Y), .B(loIi1_Z[7]), .C(GND), .D(GND), .A(VCC), .FCI(un18_i00i1_cry_6_Z) ); defparam un18_i00i1_cry_7.INIT=20'h65500; // @28:514568 ARI1 un18_i00i1_cry_8 ( .FCO(un18_i00i1_cry_8_Z), .S(un18_i00i1_cry_8_S), .Y(un18_i00i1_cry_8_Y), .B(loIi1_Z[8]), .C(GND), .D(GND), .A(VCC), .FCI(un18_i00i1_cry_7_Z) ); defparam un18_i00i1_cry_8.INIT=20'h65500; // @28:514568 ARI1 un18_i00i1_cry_9 ( .FCO(un18_i00i1_cry_9_Z), .S(un18_i00i1_cry_9_S), .Y(un18_i00i1_cry_9_Y), .B(loIi1_Z[9]), .C(GND), .D(GND), .A(VCC), .FCI(un18_i00i1_cry_8_Z) ); defparam un18_i00i1_cry_9.INIT=20'h65500; // @28:514568 ARI1 un18_i00i1_cry_10 ( .FCO(un18_i00i1_cry_10_Z), .S(un18_i00i1_cry_10_S), .Y(un18_i00i1_cry_10_Y), .B(loIi1_Z[10]), .C(GND), .D(GND), .A(VCC), .FCI(un18_i00i1_cry_9_Z) ); defparam un18_i00i1_cry_10.INIT=20'h65500; // @28:514568 ARI1 un18_i00i1_cry_11 ( .FCO(un18_i00i1_cry_11_Z), .S(un18_i00i1_cry_11_S), .Y(un18_i00i1_cry_11_Y), .B(loIi1_Z[11]), .C(GND), .D(GND), .A(VCC), .FCI(un18_i00i1_cry_10_Z) ); defparam un18_i00i1_cry_11.INIT=20'h65500; // @28:514568 ARI1 un18_i00i1_cry_12 ( .FCO(un18_i00i1_cry_12_Z), .S(un18_i00i1_cry_12_S), .Y(un18_i00i1_cry_12_Y), .B(loIi1_Z[12]), .C(GND), .D(GND), .A(VCC), .FCI(un18_i00i1_cry_11_Z) ); defparam un18_i00i1_cry_12.INIT=20'h65500; // @28:514568 ARI1 un18_i00i1_cry_13 ( .FCO(un18_i00i1_cry_13_Z), .S(un18_i00i1_cry_13_S), .Y(un18_i00i1_cry_13_Y), .B(loIi1_Z[13]), .C(GND), .D(GND), .A(VCC), .FCI(un18_i00i1_cry_12_Z) ); defparam un18_i00i1_cry_13.INIT=20'h65500; // @28:514568 ARI1 un18_i00i1_s_15 ( .FCO(un18_i00i1_s_15_FCO), .S(un18_i00i1_s_15_S), .Y(un18_i00i1_s_15_Y), .B(loIi1_Z[15]), .C(GND), .D(GND), .A(VCC), .FCI(un18_i00i1_cry_14_Z) ); defparam un18_i00i1_s_15.INIT=20'h45500; // @28:514568 ARI1 un18_i00i1_cry_14 ( .FCO(un18_i00i1_cry_14_Z), .S(un18_i00i1_cry_14_S), .Y(un18_i00i1_cry_14_Y), .B(loIi1_Z[14]), .C(GND), .D(GND), .A(VCC), .FCI(un18_i00i1_cry_13_Z) ); defparam un18_i00i1_cry_14.INIT=20'h65500; // @28:514542 ARI1 un8_i00i1_cry_0 ( .FCO(un8_i00i1_cry_0_Z), .S(un8_i00i1_cry_0_S), .Y(un8_i00i1_cry_0_Y), .B(loIi1_Z[0]), .C(GND), .D(GND), .A(VCC), .FCI(GND) ); defparam un8_i00i1_cry_0.INIT=20'h65500; // @28:514542 ARI1 un8_i00i1_cry_1 ( .FCO(un8_i00i1_cry_1_Z), .S(un8_i00i1_cry_1_S), .Y(un8_i00i1_cry_1_Y), .B(iiIi1lt2), .C(GND), .D(GND), .A(VCC), .FCI(un8_i00i1_cry_0_Z) ); defparam un8_i00i1_cry_1.INIT=20'h65500; // @28:514542 ARI1 un8_i00i1_cry_2 ( .FCO(un8_i00i1_cry_2_Z), .S(un8_i00i1_cry_2_S), .Y(un8_i00i1_cry_2_Y), .B(loIi1_Z[2]), .C(GND), .D(GND), .A(VCC), .FCI(un8_i00i1_cry_1_Z) ); defparam un8_i00i1_cry_2.INIT=20'h65500; // @28:514542 ARI1 un8_i00i1_cry_3 ( .FCO(un8_i00i1_cry_3_Z), .S(un8_i00i1_cry_3_S), .Y(un8_i00i1_cry_3_Y), .B(loIi1_Z[3]), .C(GND), .D(GND), .A(VCC), .FCI(un8_i00i1_cry_2_Z) ); defparam un8_i00i1_cry_3.INIT=20'h65500; // @28:514542 ARI1 un8_i00i1_cry_4 ( .FCO(un8_i00i1_cry_4_Z), .S(un8_i00i1_cry_4_S), .Y(un8_i00i1_cry_4_Y), .B(loIi1_Z[4]), .C(GND), .D(GND), .A(VCC), .FCI(un8_i00i1_cry_3_Z) ); defparam un8_i00i1_cry_4.INIT=20'h4AA00; // @28:514542 ARI1 un8_i00i1_cry_5 ( .FCO(un8_i00i1_cry_5_Z), .S(un8_i00i1_cry_5_S), .Y(un8_i00i1_cry_5_Y), .B(loIi1_Z[5]), .C(GND), .D(GND), .A(VCC), .FCI(un8_i00i1_cry_4_Z) ); defparam un8_i00i1_cry_5.INIT=20'h65500; // @28:514542 ARI1 un8_i00i1_cry_6 ( .FCO(un8_i00i1_cry_6_Z), .S(un8_i00i1_cry_6_S), .Y(un8_i00i1_cry_6_Y), .B(loIi1_Z[6]), .C(GND), .D(GND), .A(VCC), .FCI(un8_i00i1_cry_5_Z) ); defparam un8_i00i1_cry_6.INIT=20'h65500; // @28:514542 ARI1 un8_i00i1_cry_7 ( .FCO(un8_i00i1_cry_7_Z), .S(un8_i00i1_cry_7_S), .Y(un8_i00i1_cry_7_Y), .B(loIi1_Z[7]), .C(GND), .D(GND), .A(VCC), .FCI(un8_i00i1_cry_6_Z) ); defparam un8_i00i1_cry_7.INIT=20'h65500; // @28:514542 ARI1 un8_i00i1_cry_8 ( .FCO(un8_i00i1_cry_8_Z), .S(un8_i00i1_cry_8_S), .Y(un8_i00i1_cry_8_Y), .B(loIi1_Z[8]), .C(GND), .D(GND), .A(VCC), .FCI(un8_i00i1_cry_7_Z) ); defparam un8_i00i1_cry_8.INIT=20'h65500; // @28:514542 ARI1 un8_i00i1_cry_9 ( .FCO(un8_i00i1_cry_9_Z), .S(un8_i00i1_cry_9_S), .Y(un8_i00i1_cry_9_Y), .B(loIi1_Z[9]), .C(GND), .D(GND), .A(VCC), .FCI(un8_i00i1_cry_8_Z) ); defparam un8_i00i1_cry_9.INIT=20'h65500; // @28:514542 ARI1 un8_i00i1_cry_10 ( .FCO(un8_i00i1_cry_10_Z), .S(un8_i00i1_cry_10_S), .Y(un8_i00i1_cry_10_Y), .B(loIi1_Z[10]), .C(GND), .D(GND), .A(VCC), .FCI(un8_i00i1_cry_9_Z) ); defparam un8_i00i1_cry_10.INIT=20'h65500; // @28:514542 ARI1 un8_i00i1_cry_11 ( .FCO(un8_i00i1_cry_11_Z), .S(un8_i00i1_cry_11_S), .Y(un8_i00i1_cry_11_Y), .B(loIi1_Z[11]), .C(GND), .D(GND), .A(VCC), .FCI(un8_i00i1_cry_10_Z) ); defparam un8_i00i1_cry_11.INIT=20'h65500; // @28:514542 ARI1 un8_i00i1_cry_12 ( .FCO(un8_i00i1_cry_12_Z), .S(un8_i00i1_cry_12_S), .Y(un8_i00i1_cry_12_Y), .B(loIi1_Z[12]), .C(GND), .D(GND), .A(VCC), .FCI(un8_i00i1_cry_11_Z) ); defparam un8_i00i1_cry_12.INIT=20'h65500; // @28:514542 ARI1 un8_i00i1_cry_13 ( .FCO(un8_i00i1_cry_13_Z), .S(un8_i00i1_cry_13_S), .Y(un8_i00i1_cry_13_Y), .B(loIi1_Z[13]), .C(GND), .D(GND), .A(VCC), .FCI(un8_i00i1_cry_12_Z) ); defparam un8_i00i1_cry_13.INIT=20'h65500; // @28:514542 ARI1 un8_i00i1_s_15 ( .FCO(un8_i00i1_s_15_FCO), .S(un8_i00i1_s_15_S), .Y(un8_i00i1_s_15_Y), .B(loIi1_Z[15]), .C(GND), .D(GND), .A(VCC), .FCI(un8_i00i1_cry_14_Z) ); defparam un8_i00i1_s_15.INIT=20'h45500; // @28:514542 ARI1 un8_i00i1_cry_14 ( .FCO(un8_i00i1_cry_14_Z), .S(un8_i00i1_cry_14_S), .Y(un8_i00i1_cry_14_Y), .B(loIi1_Z[14]), .C(GND), .D(GND), .A(VCC), .FCI(un8_i00i1_cry_13_Z) ); defparam un8_i00i1_cry_14.INIT=20'h65500; // @28:512901 ARI1 un12_i0li1_a_4_cry_0 ( .FCO(un12_i0li1_a_4_cry_0_Z), .S(un12_i0li1_a_4_cry_0_S), .Y(un12_i0li1_a_4_cry_0_Y), .B(loIi1_Z[0]), .C(GND), .D(GND), .A(OOlI1[0]), .FCI(GND) ); defparam un12_i0li1_a_4_cry_0.INIT=20'h5AA55; // @28:512901 ARI1 un12_i0li1_a_4_cry_1 ( .FCO(un12_i0li1_a_4_cry_1_Z), .S(un12_i0li1_1), .Y(un12_i0li1_a_4_cry_1_Y), .B(iiIi1lt2), .C(GND), .D(GND), .A(OOlI1[1]), .FCI(un12_i0li1_a_4_cry_0_Z) ); defparam un12_i0li1_a_4_cry_1.INIT=20'h5AA55; // @28:512901 ARI1 un12_i0li1_a_4_cry_2 ( .FCO(un12_i0li1_a_4_cry_2_Z), .S(un12_i0li1_2), .Y(un12_i0li1_a_4_cry_2_Y), .B(loIi1_Z[2]), .C(GND), .D(GND), .A(OOlI1[2]), .FCI(un12_i0li1_a_4_cry_1_Z) ); defparam un12_i0li1_a_4_cry_2.INIT=20'h5AA55; // @28:512901 ARI1 un12_i0li1_a_4_cry_3 ( .FCO(un12_i0li1_a_4_cry_3_Z), .S(un12_i0li1_3), .Y(un12_i0li1_a_4_cry_3_Y), .B(loIi1_Z[3]), .C(GND), .D(GND), .A(OOlI1[3]), .FCI(un12_i0li1_a_4_cry_2_Z) ); defparam un12_i0li1_a_4_cry_3.INIT=20'h5AA55; // @28:512901 ARI1 un12_i0li1_a_4_cry_4 ( .FCO(un12_i0li1_a_4_cry_4_Z), .S(un12_i0li1_4), .Y(un12_i0li1_a_4_cry_4_Y), .B(loIi1_Z[4]), .C(GND), .D(GND), .A(OOlI1[4]), .FCI(un12_i0li1_a_4_cry_3_Z) ); defparam un12_i0li1_a_4_cry_4.INIT=20'h5AA55; // @28:512901 ARI1 un12_i0li1_a_4_cry_5 ( .FCO(un12_i0li1_a_4_cry_5_Z), .S(un12_i0li1_5), .Y(un12_i0li1_a_4_cry_5_Y), .B(loIi1_Z[5]), .C(GND), .D(GND), .A(OOlI1[5]), .FCI(un12_i0li1_a_4_cry_4_Z) ); defparam un12_i0li1_a_4_cry_5.INIT=20'h5AA55; // @28:512901 ARI1 un12_i0li1_a_4_cry_6 ( .FCO(un12_i0li1_a_4_cry_6_Z), .S(un12_i0li1_6), .Y(un12_i0li1_a_4_cry_6_Y), .B(loIi1_Z[6]), .C(GND), .D(GND), .A(OOlI1[6]), .FCI(un12_i0li1_a_4_cry_5_Z) ); defparam un12_i0li1_a_4_cry_6.INIT=20'h5AA55; // @28:512901 ARI1 un12_i0li1_a_4_cry_7 ( .FCO(un12_i0li1_a_4_cry_7_Z), .S(un12_i0li1_7), .Y(un12_i0li1_a_4_cry_7_Y), .B(loIi1_Z[7]), .C(GND), .D(GND), .A(OOlI1[7]), .FCI(un12_i0li1_a_4_cry_6_Z) ); defparam un12_i0li1_a_4_cry_7.INIT=20'h5AA55; // @28:512901 ARI1 un12_i0li1_a_4_cry_8 ( .FCO(un12_i0li1_a_4_cry_8_Z), .S(un12_i0li1_8), .Y(un12_i0li1_a_4_cry_8_Y), .B(loIi1_Z[8]), .C(GND), .D(GND), .A(OOlI1[8]), .FCI(un12_i0li1_a_4_cry_7_Z) ); defparam un12_i0li1_a_4_cry_8.INIT=20'h5AA55; // @28:512901 ARI1 un12_i0li1_a_4_cry_9 ( .FCO(un12_i0li1_a_4_cry_9_Z), .S(un12_i0li1_9), .Y(un12_i0li1_a_4_cry_9_Y), .B(loIi1_Z[9]), .C(GND), .D(GND), .A(OOlI1[9]), .FCI(un12_i0li1_a_4_cry_8_Z) ); defparam un12_i0li1_a_4_cry_9.INIT=20'h5AA55; // @28:512901 ARI1 un12_i0li1_a_4_cry_10 ( .FCO(un12_i0li1_a_4_cry_10_Z), .S(un12_i0li1_10), .Y(un12_i0li1_a_4_cry_10_Y), .B(loIi1_Z[10]), .C(GND), .D(GND), .A(OOlI1[10]), .FCI(un12_i0li1_a_4_cry_9_Z) ); defparam un12_i0li1_a_4_cry_10.INIT=20'h5AA55; // @28:512901 ARI1 un12_i0li1_a_4_cry_11 ( .FCO(un12_i0li1_a_4_cry_11_Z), .S(un12_i0li1_11), .Y(un12_i0li1_a_4_cry_11_Y), .B(loIi1_Z[11]), .C(GND), .D(GND), .A(OOlI1[11]), .FCI(un12_i0li1_a_4_cry_10_Z) ); defparam un12_i0li1_a_4_cry_11.INIT=20'h5AA55; // @28:512901 ARI1 un12_i0li1_a_4_cry_12 ( .FCO(un12_i0li1_a_4_cry_12_Z), .S(un12_i0li1_12), .Y(un12_i0li1_a_4_cry_12_Y), .B(loIi1_Z[12]), .C(GND), .D(GND), .A(OOlI1[12]), .FCI(un12_i0li1_a_4_cry_11_Z) ); defparam un12_i0li1_a_4_cry_12.INIT=20'h5AA55; // @28:512901 ARI1 un12_i0li1_a_4_cry_13 ( .FCO(un12_i0li1_a_4_cry_13_Z), .S(un12_i0li1_13), .Y(un12_i0li1_a_4_cry_13_Y), .B(loIi1_Z[13]), .C(GND), .D(GND), .A(OOlI1[13]), .FCI(un12_i0li1_a_4_cry_12_Z) ); defparam un12_i0li1_a_4_cry_13.INIT=20'h5AA55; // @28:512901 ARI1 un12_i0li1_a_4_cry_14 ( .FCO(un12_i0li1_a_4_cry_14_Z), .S(un12_i0li1_14), .Y(un12_i0li1_a_4_cry_14_Y), .B(loIi1_Z[14]), .C(GND), .D(GND), .A(OOlI1[14]), .FCI(un12_i0li1_a_4_cry_13_Z) ); defparam un12_i0li1_a_4_cry_14.INIT=20'h5AA55; // @28:512901 ARI1 un12_i0li1_a_4_cry_15 ( .FCO(un12_i0li1_a_4[16]), .S(un12_i0li1_15), .Y(un12_i0li1_a_4_cry_15_Y), .B(loIi1_Z[15]), .C(GND), .D(GND), .A(OOlI1[15]), .FCI(un12_i0li1_a_4_cry_14_Z) ); defparam un12_i0li1_a_4_cry_15.INIT=20'h5AA55; // @28:514473 ARI1 un6_olli1_cry_0 ( .FCO(un6_olli1_cry_0_Z), .S(un6_olli1_cry_0_S), .Y(un6_olli1_cry_0_Y), .B(loIi1_Z[0]), .C(GND), .D(GND), .A(OOlI1[0]), .FCI(GND) ); defparam un6_olli1_cry_0.INIT=20'h5AA55; // @28:514473 ARI1 un6_olli1_cry_1 ( .FCO(un6_olli1_cry_1_Z), .S(un6_olli1_cry_1_S), .Y(un6_olli1_cry_1_Y), .B(iiIi1lt2), .C(GND), .D(GND), .A(OOlI1[1]), .FCI(un6_olli1_cry_0_Z) ); defparam un6_olli1_cry_1.INIT=20'h5AA55; // @28:514473 ARI1 un6_olli1_cry_2 ( .FCO(un6_olli1_cry_2_Z), .S(un6_olli1_cry_2_S), .Y(un6_olli1_cry_2_Y), .B(loIi1_Z[2]), .C(GND), .D(GND), .A(OOlI1[2]), .FCI(un6_olli1_cry_1_Z) ); defparam un6_olli1_cry_2.INIT=20'h5AA55; // @28:514473 ARI1 un6_olli1_cry_3 ( .FCO(un6_olli1_cry_3_Z), .S(un6_olli1_cry_3_S), .Y(un6_olli1_cry_3_Y), .B(loIi1_Z[3]), .C(GND), .D(GND), .A(OOlI1[3]), .FCI(un6_olli1_cry_2_Z) ); defparam un6_olli1_cry_3.INIT=20'h5AA55; // @28:514473 ARI1 un6_olli1_cry_4 ( .FCO(un6_olli1_cry_4_Z), .S(un6_olli1_cry_4_S), .Y(un6_olli1_cry_4_Y), .B(loIi1_Z[4]), .C(GND), .D(GND), .A(OOlI1[4]), .FCI(un6_olli1_cry_3_Z) ); defparam un6_olli1_cry_4.INIT=20'h5AA55; // @28:514473 ARI1 un6_olli1_cry_5 ( .FCO(un6_olli1_cry_5_Z), .S(un6_olli1_cry_5_S), .Y(un6_olli1_cry_5_Y), .B(loIi1_Z[5]), .C(GND), .D(GND), .A(OOlI1[5]), .FCI(un6_olli1_cry_4_Z) ); defparam un6_olli1_cry_5.INIT=20'h5AA55; // @28:514473 ARI1 un6_olli1_cry_6 ( .FCO(un6_olli1_cry_6_Z), .S(un6_olli1_cry_6_S), .Y(un6_olli1_cry_6_Y), .B(loIi1_Z[6]), .C(GND), .D(GND), .A(OOlI1[6]), .FCI(un6_olli1_cry_5_Z) ); defparam un6_olli1_cry_6.INIT=20'h5AA55; // @28:514473 ARI1 un6_olli1_cry_7 ( .FCO(un6_olli1_cry_7_Z), .S(un6_olli1_cry_7_S), .Y(un6_olli1_cry_7_Y), .B(loIi1_Z[7]), .C(GND), .D(GND), .A(OOlI1[7]), .FCI(un6_olli1_cry_6_Z) ); defparam un6_olli1_cry_7.INIT=20'h5AA55; // @28:514473 ARI1 un6_olli1_cry_8 ( .FCO(un6_olli1_cry_8_Z), .S(un6_olli1_cry_8_S), .Y(un6_olli1_cry_8_Y), .B(loIi1_Z[8]), .C(GND), .D(GND), .A(OOlI1[8]), .FCI(un6_olli1_cry_7_Z) ); defparam un6_olli1_cry_8.INIT=20'h5AA55; // @28:514473 ARI1 un6_olli1_cry_9 ( .FCO(un6_olli1_cry_9_Z), .S(un6_olli1_cry_9_S), .Y(un6_olli1_cry_9_Y), .B(loIi1_Z[9]), .C(GND), .D(GND), .A(OOlI1[9]), .FCI(un6_olli1_cry_8_Z) ); defparam un6_olli1_cry_9.INIT=20'h5AA55; // @28:514473 ARI1 un6_olli1_cry_10 ( .FCO(un6_olli1_cry_10_Z), .S(un6_olli1_cry_10_S), .Y(un6_olli1_cry_10_Y), .B(loIi1_Z[10]), .C(GND), .D(GND), .A(OOlI1[10]), .FCI(un6_olli1_cry_9_Z) ); defparam un6_olli1_cry_10.INIT=20'h5AA55; // @28:514473 ARI1 un6_olli1_cry_11 ( .FCO(un6_olli1_cry_11_Z), .S(un6_olli1_cry_11_S), .Y(un6_olli1_cry_11_Y), .B(loIi1_Z[11]), .C(GND), .D(GND), .A(OOlI1[11]), .FCI(un6_olli1_cry_10_Z) ); defparam un6_olli1_cry_11.INIT=20'h5AA55; // @28:514473 ARI1 un6_olli1_cry_12 ( .FCO(un6_olli1_cry_12_Z), .S(un6_olli1_cry_12_S), .Y(un6_olli1_cry_12_Y), .B(loIi1_Z[12]), .C(GND), .D(GND), .A(OOlI1[12]), .FCI(un6_olli1_cry_11_Z) ); defparam un6_olli1_cry_12.INIT=20'h5AA55; // @28:514473 ARI1 un6_olli1_cry_13 ( .FCO(un6_olli1_cry_13_Z), .S(un6_olli1_cry_13_S), .Y(un6_olli1_cry_13_Y), .B(loIi1_Z[13]), .C(GND), .D(GND), .A(OOlI1[13]), .FCI(un6_olli1_cry_12_Z) ); defparam un6_olli1_cry_13.INIT=20'h5AA55; // @28:514473 ARI1 un6_olli1_cry_14 ( .FCO(un6_olli1_cry_14_Z), .S(un6_olli1_cry_14_S), .Y(un6_olli1_cry_14_Y), .B(loIi1_Z[14]), .C(GND), .D(GND), .A(OOlI1[14]), .FCI(un6_olli1_cry_13_Z) ); defparam un6_olli1_cry_14.INIT=20'h5AA55; // @28:514473 ARI1 un6_olli1_cry_15 ( .FCO(un6_olli1_cry_15_Z), .S(un6_olli1_cry_15_S), .Y(un6_olli1_cry_15_Y), .B(loIi1_Z[15]), .C(GND), .D(GND), .A(OOlI1[15]), .FCI(un6_olli1_cry_14_Z) ); defparam un6_olli1_cry_15.INIT=20'h5AA55; // @28:512255 ARI1 un23_o1Ii1_cry_0 ( .FCO(un23_o1Ii1_cry_0_Z), .S(un23_o1Ii1_cry_0_S), .Y(un23_o1Ii1_cry_0_Y), .B(O0l11[3]), .C(GND), .D(GND), .A(l1Ii1_i[0]), .FCI(GND) ); defparam un23_o1Ii1_cry_0.INIT=20'h5AA55; // @28:512255 ARI1 un23_o1Ii1_cry_1 ( .FCO(un23_o1Ii1_cry_1_Z), .S(un23_o1Ii1_cry_1_S), .Y(un23_o1Ii1_cry_1_Y), .B(O0l11[3]), .C(O0l11[4]), .D(GND), .A(l1Ii1_i[1]), .FCI(un23_o1Ii1_cry_0_Z) ); defparam un23_o1Ii1_cry_1.INIT=20'h56699; // @28:512255 ARI1 un23_o1Ii1_cry_2 ( .FCO(un23_o1Ii1_cry_2_Z), .S(un23_o1Ii1_cry_2_S), .Y(un23_o1Ii1_cry_2_Y), .B(O0l11[5]), .C(O0l11[3]), .D(O0l11[4]), .A(l1Ii1_i[2]), .FCI(un23_o1Ii1_cry_1_Z) ); defparam un23_o1Ii1_cry_2.INIT=20'h556A9; // @28:512255 ARI1 un23_o1Ii1_cry_3 ( .FCO(un23_o1Ii1_cry_3_Z), .S(un23_o1Ii1_cry_3_S), .Y(un23_o1Ii1_cry_3_Y), .B(un17_o1Ii1_c2), .C(O0l11[5]), .D(O0l11[6]), .A(l1Ii1_i[3]), .FCI(un23_o1Ii1_cry_2_Z) ); defparam un23_o1Ii1_cry_3.INIT=20'h51EE1; // @28:512255 ARI1 un23_o1Ii1_cry_4 ( .FCO(un23_o1Ii1_cry_4_Z), .S(un23_o1Ii1_cry_4_S), .Y(un23_o1Ii1_cry_4_Y), .B(l1Ii1_Z[4]), .C(GND), .D(GND), .A(un23_o1Ii1_4), .FCI(un23_o1Ii1_cry_3_Z) ); defparam un23_o1Ii1_cry_4.INIT=20'h5AA55; // @28:512255 ARI1 un23_o1Ii1_cry_5 ( .FCO(un23_o1Ii1_cry_5_Z), .S(un23_o1Ii1_cry_5_S), .Y(un23_o1Ii1_cry_5_Y), .B(l1Ii1_Z[5]), .C(GND), .D(GND), .A(un23_o1Ii1_5), .FCI(un23_o1Ii1_cry_4_Z) ); defparam un23_o1Ii1_cry_5.INIT=20'h5AA55; // @28:512255 ARI1 un23_o1Ii1_cry_6 ( .FCO(un23_o1Ii1_cry_6_Z), .S(un23_o1Ii1_cry_6_S), .Y(un23_o1Ii1_cry_6_Y), .B(l1Ii1_Z[6]), .C(GND), .D(GND), .A(un23_o1Ii1_5), .FCI(un23_o1Ii1_cry_5_Z) ); defparam un23_o1Ii1_cry_6.INIT=20'h5AA55; // @28:512255 ARI1 un23_o1Ii1_cry_7 ( .FCO(un23_o1Ii1_cry_7_Z), .S(un23_o1Ii1_cry_7_S), .Y(un23_o1Ii1_cry_7_Y), .B(l1Ii1_Z[7]), .C(GND), .D(GND), .A(un23_o1Ii1_5), .FCI(un23_o1Ii1_cry_6_Z) ); defparam un23_o1Ii1_cry_7.INIT=20'h5AA55; // @28:512228 ARI1 un12_o1Ii1_cry_0 ( .FCO(un12_o1Ii1_cry_0_Z), .S(un12_o1Ii1_cry_0_S), .Y(un12_o1Ii1_cry_0_Y), .B(O0l11[2]), .C(GND), .D(GND), .A(l1Ii1_i[0]), .FCI(GND) ); defparam un12_o1Ii1_cry_0.INIT=20'h5AA55; // @28:512228 ARI1 un12_o1Ii1_cry_1 ( .FCO(un12_o1Ii1_cry_1_Z), .S(un12_o1Ii1_cry_1_S), .Y(un12_o1Ii1_cry_1_Y), .B(O0l11[2]), .C(O0l11[3]), .D(GND), .A(l1Ii1_i[1]), .FCI(un12_o1Ii1_cry_0_Z) ); defparam un12_o1Ii1_cry_1.INIT=20'h56699; // @28:512228 ARI1 un12_o1Ii1_cry_2 ( .FCO(un12_o1Ii1_cry_2_Z), .S(un12_o1Ii1_cry_2_S), .Y(un12_o1Ii1_cry_2_Y), .B(O0l11[2]), .C(O0l11[3]), .D(O0l11[4]), .A(l1Ii1_i[2]), .FCI(un12_o1Ii1_cry_1_Z) ); defparam un12_o1Ii1_cry_2.INIT=20'h51EE1; // @28:512228 ARI1 un12_o1Ii1_cry_3 ( .FCO(un12_o1Ii1_cry_3_Z), .S(un12_o1Ii1_cry_3_S), .Y(un12_o1Ii1_cry_3_Y), .B(un6_o1Ii1_c3_Z), .C(O0l11[5]), .D(GND), .A(l1Ii1_i[3]), .FCI(un12_o1Ii1_cry_2_Z) ); defparam un12_o1Ii1_cry_3.INIT=20'h56699; // @28:512228 ARI1 un12_o1Ii1_cry_4 ( .FCO(un12_o1Ii1_cry_4_Z), .S(un12_o1Ii1_cry_4_S), .Y(un12_o1Ii1_cry_4_Y), .B(un6_o1Ii1_c3_Z), .C(O0l11[5]), .D(O0l11[6]), .A(l1Ii1_i[4]), .FCI(un12_o1Ii1_cry_3_Z) ); defparam un12_o1Ii1_cry_4.INIT=20'h51EE1; // @28:512228 ARI1 un12_o1Ii1_cry_5 ( .FCO(un12_o1Ii1_cry_5_Z), .S(un12_o1Ii1_cry_5_S), .Y(un12_o1Ii1_cry_5_Y), .B(l1Ii1_Z[5]), .C(GND), .D(GND), .A(un12_o1Ii1_5), .FCI(un12_o1Ii1_cry_4_Z) ); defparam un12_o1Ii1_cry_5.INIT=20'h5AA55; // @28:512228 ARI1 un12_o1Ii1_cry_6 ( .FCO(un12_o1Ii1_cry_6_Z), .S(un12_o1Ii1_cry_6_S), .Y(un12_o1Ii1_cry_6_Y), .B(l1Ii1_Z[6]), .C(GND), .D(GND), .A(un12_o1Ii1_6), .FCI(un12_o1Ii1_cry_5_Z) ); defparam un12_o1Ii1_cry_6.INIT=20'h5AA55; // @28:512228 ARI1 un12_o1Ii1_cry_7 ( .FCO(un12_o1Ii1_cry_7_Z), .S(un12_o1Ii1_cry_7_S), .Y(un12_o1Ii1_cry_7_Y), .B(l1Ii1_Z[7]), .C(GND), .D(GND), .A(un12_o1Ii1_6), .FCI(un12_o1Ii1_cry_6_Z) ); defparam un12_o1Ii1_cry_7.INIT=20'h5AA55; // @28:534549 ARI1 un1_I10i1_2_RNO_6 ( .FCO(un6_I10i1_0_data_tmp[0]), .S(un1_I10i1_2_RNO_6_S), .Y(un1_I10i1_2_RNO_6_Y), .B(O10i1_Z[0]), .C(O10i1_Z[1]), .D(ll0i1_Z[0]), .A(ll0i1_Z[1]), .FCI(GND) ); defparam un1_I10i1_2_RNO_6.INIT=20'h68421; // @28:534549 ARI1 un1_I10i1_2_RNO_5 ( .FCO(un6_I10i1_0_data_tmp[1]), .S(un1_I10i1_2_RNO_5_S), .Y(un1_I10i1_2_RNO_5_Y), .B(O10i1_Z[2]), .C(O10i1_Z[3]), .D(ll0i1_Z[2]), .A(ll0i1_Z[3]), .FCI(un6_I10i1_0_data_tmp[0]) ); defparam un1_I10i1_2_RNO_5.INIT=20'h68421; // @28:534549 ARI1 un1_I10i1_2_RNO_4 ( .FCO(un6_I10i1_0_data_tmp[2]), .S(un1_I10i1_2_RNO_4_S), .Y(un1_I10i1_2_RNO_4_Y), .B(O10i1_Z[4]), .C(O10i1_Z[5]), .D(ll0i1_Z[4]), .A(ll0i1_Z[5]), .FCI(un6_I10i1_0_data_tmp[1]) ); defparam un1_I10i1_2_RNO_4.INIT=20'h68421; // @28:534549 ARI1 un1_I10i1_2_RNO_3 ( .FCO(un6_I10i1_0_data_tmp[3]), .S(un1_I10i1_2_RNO_3_S), .Y(un1_I10i1_2_RNO_3_Y), .B(O10i1_Z[6]), .C(O10i1_Z[7]), .D(ll0i1_Z[6]), .A(ll0i1_Z[7]), .FCI(un6_I10i1_0_data_tmp[2]) ); defparam un1_I10i1_2_RNO_3.INIT=20'h68421; // @28:534549 ARI1 un1_I10i1_2_RNO_2 ( .FCO(un6_I10i1_0_data_tmp[4]), .S(un1_I10i1_2_RNO_2_S), .Y(un1_I10i1_2_RNO_2_Y), .B(O10i1_Z[8]), .C(O10i1_Z[9]), .D(ll0i1_Z[8]), .A(ll0i1_Z[9]), .FCI(un6_I10i1_0_data_tmp[3]) ); defparam un1_I10i1_2_RNO_2.INIT=20'h68421; // @28:534549 ARI1 un1_I10i1_2_RNO_1 ( .FCO(un6_I10i1_0_data_tmp[5]), .S(un1_I10i1_2_RNO_1_S), .Y(un1_I10i1_2_RNO_1_Y), .B(O10i1_Z[10]), .C(O10i1_Z[11]), .D(ll0i1_Z[10]), .A(ll0i1_Z[11]), .FCI(un6_I10i1_0_data_tmp[4]) ); defparam un1_I10i1_2_RNO_1.INIT=20'h68421; // @28:534549 ARI1 un1_I10i1_2_RNO_0 ( .FCO(un6_I10i1_0_data_tmp[6]), .S(un1_I10i1_2_RNO_0_S), .Y(un1_I10i1_2_RNO_0_Y), .B(O10i1_Z[12]), .C(O10i1_Z[13]), .D(ll0i1_Z[12]), .A(ll0i1_Z[13]), .FCI(un6_I10i1_0_data_tmp[5]) ); defparam un1_I10i1_2_RNO_0.INIT=20'h68421; // @28:534549 ARI1 un1_I10i1_2_RNO ( .FCO(un6_I10i1_0_data_tmp[7]), .S(un1_I10i1_2_RNO_S), .Y(un1_I10i1_2_RNO_Y), .B(O10i1_Z[14]), .C(O10i1_Z[15]), .D(ll0i1_Z[14]), .A(ll0i1_Z[15]), .FCI(un6_I10i1_0_data_tmp[6]) ); defparam un1_I10i1_2_RNO.INIT=20'h68421; // @28:512321 ARI1 un6_IoIi1_1_s_1_4178 ( .FCO(un6_IoIi1_1_s_1_4178_FCO), .S(un6_IoIi1_1_s_1_4178_S), .Y(un6_IoIi1_1_s_1_4178_Y), .B(loIi1_Z[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam un6_IoIi1_1_s_1_4178.INIT=20'h4AA00; // @28:512321 ARI1 un6_IoIi1_1_cry_1 ( .FCO(un6_IoIi1_1_cry_1_Z), .S(un6_IoIi1_1_cry_1_S), .Y(un6_IoIi1_1_cry_1_Y), .B(iiIi1lt2), .C(GND), .D(GND), .A(VCC), .FCI(un6_IoIi1_1_s_1_4178_FCO) ); defparam un6_IoIi1_1_cry_1.INIT=20'h4AA00; // @28:512321 ARI1 un6_IoIi1_1_cry_2 ( .FCO(un6_IoIi1_1_cry_2_Z), .S(un6_IoIi1_1_cry_2_S), .Y(un6_IoIi1_1_cry_2_Y), .B(loIi1_Z[2]), .C(GND), .D(GND), .A(VCC), .FCI(un6_IoIi1_1_cry_1_Z) ); defparam un6_IoIi1_1_cry_2.INIT=20'h4AA00; // @28:512321 ARI1 un6_IoIi1_1_cry_3 ( .FCO(un6_IoIi1_1_cry_3_Z), .S(un6_IoIi1_1_cry_3_S), .Y(un6_IoIi1_1_cry_3_Y), .B(loIi1_Z[3]), .C(GND), .D(GND), .A(VCC), .FCI(un6_IoIi1_1_cry_2_Z) ); defparam un6_IoIi1_1_cry_3.INIT=20'h4AA00; // @28:512321 ARI1 un6_IoIi1_1_cry_4 ( .FCO(un6_IoIi1_1_cry_4_Z), .S(un6_IoIi1_1_cry_4_S), .Y(un6_IoIi1_1_cry_4_Y), .B(loIi1_Z[4]), .C(GND), .D(GND), .A(VCC), .FCI(un6_IoIi1_1_cry_3_Z) ); defparam un6_IoIi1_1_cry_4.INIT=20'h4AA00; // @28:512321 ARI1 un6_IoIi1_1_cry_5 ( .FCO(un6_IoIi1_1_cry_5_Z), .S(un6_IoIi1_1_cry_5_S), .Y(un6_IoIi1_1_cry_5_Y), .B(loIi1_Z[5]), .C(GND), .D(GND), .A(VCC), .FCI(un6_IoIi1_1_cry_4_Z) ); defparam un6_IoIi1_1_cry_5.INIT=20'h4AA00; // @28:512321 ARI1 un6_IoIi1_1_cry_6 ( .FCO(un6_IoIi1_1_cry_6_Z), .S(un6_IoIi1_1_cry_6_S), .Y(un6_IoIi1_1_cry_6_Y), .B(loIi1_Z[6]), .C(GND), .D(GND), .A(VCC), .FCI(un6_IoIi1_1_cry_5_Z) ); defparam un6_IoIi1_1_cry_6.INIT=20'h4AA00; // @28:512321 ARI1 un6_IoIi1_1_cry_7 ( .FCO(un6_IoIi1_1_cry_7_Z), .S(un6_IoIi1_1_cry_7_S), .Y(un6_IoIi1_1_cry_7_Y), .B(loIi1_Z[7]), .C(GND), .D(GND), .A(VCC), .FCI(un6_IoIi1_1_cry_6_Z) ); defparam un6_IoIi1_1_cry_7.INIT=20'h4AA00; // @28:512321 ARI1 un6_IoIi1_1_cry_8 ( .FCO(un6_IoIi1_1_cry_8_Z), .S(un6_IoIi1_1_cry_8_S), .Y(un6_IoIi1_1_cry_8_Y), .B(loIi1_Z[8]), .C(GND), .D(GND), .A(VCC), .FCI(un6_IoIi1_1_cry_7_Z) ); defparam un6_IoIi1_1_cry_8.INIT=20'h4AA00; // @28:512321 ARI1 un6_IoIi1_1_cry_9 ( .FCO(un6_IoIi1_1_cry_9_Z), .S(un6_IoIi1_1_cry_9_S), .Y(un6_IoIi1_1_cry_9_Y), .B(loIi1_Z[9]), .C(GND), .D(GND), .A(VCC), .FCI(un6_IoIi1_1_cry_8_Z) ); defparam un6_IoIi1_1_cry_9.INIT=20'h4AA00; // @28:512321 ARI1 un6_IoIi1_1_cry_10 ( .FCO(un6_IoIi1_1_cry_10_Z), .S(un6_IoIi1_1_cry_10_S), .Y(un6_IoIi1_1_cry_10_Y), .B(loIi1_Z[10]), .C(GND), .D(GND), .A(VCC), .FCI(un6_IoIi1_1_cry_9_Z) ); defparam un6_IoIi1_1_cry_10.INIT=20'h4AA00; // @28:512321 ARI1 un6_IoIi1_1_cry_11 ( .FCO(un6_IoIi1_1_cry_11_Z), .S(un6_IoIi1_1_cry_11_S), .Y(un6_IoIi1_1_cry_11_Y), .B(loIi1_Z[11]), .C(GND), .D(GND), .A(VCC), .FCI(un6_IoIi1_1_cry_10_Z) ); defparam un6_IoIi1_1_cry_11.INIT=20'h4AA00; // @28:512321 ARI1 un6_IoIi1_1_cry_12 ( .FCO(un6_IoIi1_1_cry_12_Z), .S(un6_IoIi1_1_cry_12_S), .Y(un6_IoIi1_1_cry_12_Y), .B(loIi1_Z[12]), .C(GND), .D(GND), .A(VCC), .FCI(un6_IoIi1_1_cry_11_Z) ); defparam un6_IoIi1_1_cry_12.INIT=20'h4AA00; // @28:512321 ARI1 un6_IoIi1_1_cry_13 ( .FCO(un6_IoIi1_1_cry_13_Z), .S(un6_IoIi1_1_cry_13_S), .Y(un6_IoIi1_1_cry_13_Y), .B(loIi1_Z[13]), .C(GND), .D(GND), .A(VCC), .FCI(un6_IoIi1_1_cry_12_Z) ); defparam un6_IoIi1_1_cry_13.INIT=20'h4AA00; // @28:512321 ARI1 un6_IoIi1_1_s_15 ( .FCO(un6_IoIi1_1_s_15_FCO), .S(un6_IoIi1_1_s_15_S), .Y(un6_IoIi1_1_s_15_Y), .B(loIi1_Z[15]), .C(GND), .D(GND), .A(VCC), .FCI(un6_IoIi1_1_cry_14_Z) ); defparam un6_IoIi1_1_s_15.INIT=20'h4AA00; // @28:512321 ARI1 un6_IoIi1_1_cry_14 ( .FCO(un6_IoIi1_1_cry_14_Z), .S(un6_IoIi1_1_cry_14_S), .Y(un6_IoIi1_1_cry_14_Y), .B(loIi1_Z[14]), .C(GND), .D(GND), .A(VCC), .FCI(un6_IoIi1_1_cry_13_Z) ); defparam un6_IoIi1_1_cry_14.INIT=20'h4AA00; // @28:512138 ARI1 un6_I1Ii1_s_1_4179 ( .FCO(un6_I1Ii1_s_1_4179_FCO), .S(un6_I1Ii1_s_1_4179_S), .Y(un6_I1Ii1_s_1_4179_Y), .B(l1Ii1_Z[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam un6_I1Ii1_s_1_4179.INIT=20'h4AA00; // @28:512138 ARI1 un6_I1Ii1_cry_1 ( .FCO(un6_I1Ii1_cry_1_Z), .S(un6_I1Ii1_cry_1_S), .Y(un6_I1Ii1_cry_1_Y), .B(l1Ii1_Z[1]), .C(GND), .D(GND), .A(VCC), .FCI(un6_I1Ii1_s_1_4179_FCO) ); defparam un6_I1Ii1_cry_1.INIT=20'h4AA00; // @28:512138 ARI1 un6_I1Ii1_cry_2 ( .FCO(un6_I1Ii1_cry_2_Z), .S(un6_I1Ii1_cry_2_S), .Y(un6_I1Ii1_cry_2_Y), .B(l1Ii1_Z[2]), .C(GND), .D(GND), .A(VCC), .FCI(un6_I1Ii1_cry_1_Z) ); defparam un6_I1Ii1_cry_2.INIT=20'h4AA00; // @28:512138 ARI1 un6_I1Ii1_cry_3 ( .FCO(un6_I1Ii1_cry_3_Z), .S(un6_I1Ii1_cry_3_S), .Y(un6_I1Ii1_cry_3_Y), .B(l1Ii1_Z[3]), .C(GND), .D(GND), .A(VCC), .FCI(un6_I1Ii1_cry_2_Z) ); defparam un6_I1Ii1_cry_3.INIT=20'h4AA00; // @28:512138 ARI1 un6_I1Ii1_cry_4 ( .FCO(un6_I1Ii1_cry_4_Z), .S(un6_I1Ii1_cry_4_S), .Y(un6_I1Ii1_cry_4_Y), .B(l1Ii1_Z[4]), .C(GND), .D(GND), .A(VCC), .FCI(un6_I1Ii1_cry_3_Z) ); defparam un6_I1Ii1_cry_4.INIT=20'h4AA00; // @28:512138 ARI1 un6_I1Ii1_cry_5 ( .FCO(un6_I1Ii1_cry_5_Z), .S(un6_I1Ii1_cry_5_S), .Y(un6_I1Ii1_cry_5_Y), .B(l1Ii1_Z[5]), .C(GND), .D(GND), .A(VCC), .FCI(un6_I1Ii1_cry_4_Z) ); defparam un6_I1Ii1_cry_5.INIT=20'h4AA00; // @28:512138 ARI1 un6_I1Ii1_s_7 ( .FCO(un6_I1Ii1_s_7_FCO), .S(un6_I1Ii1_s_7_S), .Y(un6_I1Ii1_s_7_Y), .B(l1Ii1_Z[7]), .C(GND), .D(GND), .A(VCC), .FCI(un6_I1Ii1_cry_6_Z) ); defparam un6_I1Ii1_s_7.INIT=20'h4AA00; // @28:512138 ARI1 un6_I1Ii1_cry_6 ( .FCO(un6_I1Ii1_cry_6_Z), .S(un6_I1Ii1_cry_6_S), .Y(un6_I1Ii1_cry_6_Y), .B(l1Ii1_Z[6]), .C(GND), .D(GND), .A(VCC), .FCI(un6_I1Ii1_cry_5_Z) ); defparam un6_I1Ii1_cry_6.INIT=20'h4AA00; // @28:514528 CFG4 \i00i1[0] ( .A(I00i1_Z), .B(loIi1_Z[0]), .C(un16_i00i1), .D(N_62), .Y(i00i1_Z[0]) ); defparam \i00i1[0] .INIT=16'h2033; // @28:512956 CFG4 I1li1_RNO ( .A(I1li1_Z), .B(ooOi1_Z), .C(N_125_mux_i_1_0), .D(N_587), .Y(N_125_mux_i) ); defparam I1li1_RNO.INIT=16'h8F88; // @28:473213 CFG4 I1I11_RNIL0RR8 ( .A(O0Ii1_Z), .B(I1I11_1z), .C(iiOi1_1z), .D(IiOi1_Z), .Y(un1_IlIi1_3) ); defparam I1I11_RNIL0RR8.INIT=16'h8000; // @28:514460 CFG4 un3_olli1lto15_0_0 ( .A(loIi1_Z[9]), .B(loIi1_Z[10]), .C(un3_olli1lto15_0_0_1_Z), .D(un2_OoIi1_4_Z), .Y(un3_olli1lto15_0_0_Z) ); defparam un3_olli1lto15_0_0.INIT=16'h8C88; // @28:514460 CFG4 un3_olli1lto15_0_0_1 ( .A(loIi1_Z[8]), .B(loIi1_Z[5]), .C(loIi1_Z[4]), .D(iOli1_9_Z), .Y(un3_olli1lto15_0_0_1_Z) ); defparam un3_olli1lto15_0_0_1.INIT=16'h777F; // @28:515170 CFG4 \lO1i1_0_o2[28] ( .A(loIi1_Z[10]), .B(loIi1_Z[11]), .C(lO1i1_0_o2_1_0_Z[28]), .D(lO1i1_0_o2_1_Z[28]), .Y(N_792) ); defparam \lO1i1_0_o2[28] .INIT=16'hFFEF; // @28:515170 CFG4 \lO1i1_0_o2_1_0[28] ( .A(loIi1_Z[13]), .B(loIi1_Z[12]), .C(loIi1_Z[7]), .D(loIi1_Z[6]), .Y(lO1i1_0_o2_1_0_Z[28]) ); defparam \lO1i1_0_o2_1_0[28] .INIT=16'h0001; // @28:512956 CFG3 I1li1_RNO_0 ( .A(iIl0112), .B(un12_i0li1_1), .C(ooIO1_0), .Y(N_125_mux_i_1_0) ); defparam I1li1_RNO_0.INIT=8'h74; // @28:473213 CFG2 IiOi1_RNICJS9T ( .A(N_557_1), .B(IiOi1_Z), .Y(N_557) ); defparam IiOi1_RNICJS9T.INIT=4'hB; // @28:514580 CFG3 \O10i1_RNO[12] ( .A(N_678), .B(i00i1_i_a2_0_0_Z[12]), .C(N_667), .Y(N_523_i) ); defparam \O10i1_RNO[12] .INIT=8'h23; // @28:514580 CFG3 \O10i1_RNO[15] ( .A(N_678), .B(i00i1_i_a2_0_0_Z[15]), .C(N_667), .Y(N_520_i) ); defparam \O10i1_RNO[15] .INIT=8'h23; // @28:514580 CFG3 \O10i1_RNO[14] ( .A(N_678), .B(i00i1_i_a2_0_0_Z[14]), .C(N_667), .Y(N_521_i) ); defparam \O10i1_RNO[14] .INIT=8'h23; // @28:514580 CFG3 \O10i1_RNO[13] ( .A(N_678), .B(i00i1_i_a2_0_0_Z[13]), .C(N_667), .Y(N_522_i) ); defparam \O10i1_RNO[13] .INIT=8'h23; // @28:514239 CFG3 \Il0i1[1] ( .A(Ol0i1), .B(ll0i1_Z[1]), .C(IIoO1_1), .Y(Il0i1_Z[1]) ); defparam \Il0i1[1] .INIT=8'hE4; // @28:514239 CFG3 \Il0i1[5] ( .A(Ol0i1), .B(ll0i1_Z[5]), .C(IIoO1_Z[5]), .Y(Il0i1_Z[5]) ); defparam \Il0i1[5] .INIT=8'hE4; // @28:514239 CFG3 \Il0i1[14] ( .A(iI0i1), .B(ll0i1_Z[14]), .C(IIoO1_6), .Y(Il0i1_Z[14]) ); defparam \Il0i1[14] .INIT=8'hE4; // @28:514239 CFG3 \Il0i1[11] ( .A(iI0i1), .B(ll0i1_Z[11]), .C(IIoO1_3), .Y(Il0i1_Z[11]) ); defparam \Il0i1[11] .INIT=8'hE4; // @28:514239 CFG3 \Il0i1[3] ( .A(Ol0i1), .B(ll0i1_Z[3]), .C(IIoO1_3), .Y(Il0i1_Z[3]) ); defparam \Il0i1[3] .INIT=8'hE4; // @28:514239 CFG3 \Il0i1[13] ( .A(iI0i1), .B(ll0i1_Z[13]), .C(IIoO1_Z[5]), .Y(Il0i1_Z[13]) ); defparam \Il0i1[13] .INIT=8'hE4; // @28:514239 CFG3 \Il0i1[12] ( .A(iI0i1), .B(ll0i1_Z[12]), .C(IIoO1_Z[4]), .Y(Il0i1_Z[12]) ); defparam \Il0i1[12] .INIT=8'hE4; // @28:514239 CFG3 \Il0i1[8] ( .A(iI0i1), .B(ll0i1_Z[8]), .C(IIoO1_0), .Y(Il0i1_Z[8]) ); defparam \Il0i1[8] .INIT=8'hE4; // @28:514239 CFG3 \Il0i1[4] ( .A(Ol0i1), .B(ll0i1_Z[4]), .C(IIoO1_Z[4]), .Y(Il0i1_Z[4]) ); defparam \Il0i1[4] .INIT=8'hE4; // @28:514239 CFG3 \Il0i1[2] ( .A(Ol0i1), .B(ll0i1_Z[2]), .C(IIoO1_2), .Y(Il0i1_Z[2]) ); defparam \Il0i1[2] .INIT=8'hE4; // @28:514239 CFG3 \Il0i1[0] ( .A(Ol0i1), .B(ll0i1_Z[0]), .C(IIoO1_0), .Y(Il0i1_Z[0]) ); defparam \Il0i1[0] .INIT=8'hE4; // @28:514239 CFG3 \Il0i1[9] ( .A(iI0i1), .B(ll0i1_Z[9]), .C(IIoO1_1), .Y(Il0i1_Z[9]) ); defparam \Il0i1[9] .INIT=8'hE4; // @28:514239 CFG3 \Il0i1[6] ( .A(Ol0i1), .B(ll0i1_Z[6]), .C(IIoO1_6), .Y(Il0i1_Z[6]) ); defparam \Il0i1[6] .INIT=8'hE4; // @28:514239 CFG3 \Il0i1[7] ( .A(Ol0i1), .B(ll0i1_Z[7]), .C(IIoO1_Z[7]), .Y(Il0i1_Z[7]) ); defparam \Il0i1[7] .INIT=8'hE4; // @28:514239 CFG3 \Il0i1[10] ( .A(iI0i1), .B(ll0i1_Z[10]), .C(IIoO1_2), .Y(Il0i1_Z[10]) ); defparam \Il0i1[10] .INIT=8'hE4; // @28:514239 CFG3 \Il0i1[15] ( .A(iI0i1), .B(ll0i1_Z[15]), .C(IIoO1_Z[7]), .Y(Il0i1_Z[15]) ); defparam \Il0i1[15] .INIT=8'hE4; // @28:514395 CFG2 un1_O00i1_1_2 ( .A(ll0i1_Z[13]), .B(ll0i1_Z[14]), .Y(un1_O00i1_1_2_Z) ); defparam un1_O00i1_1_2.INIT=4'h1; // @28:473213 CFG2 I1li1_RNO_6 ( .A(un12_i0li1_3), .B(un12_i0li1_2), .Y(m46_e_2) ); defparam I1li1_RNO_6.INIT=4'h1; // @28:512287 CFG2 un2_OoIi1_1 ( .A(loIi1_Z[10]), .B(loIi1_Z[11]), .Y(un2_OoIi1_1_Z) ); defparam un2_OoIi1_1.INIT=4'h8; // @28:513168 CFG2 Ooli1_0 ( .A(ooli1_Z), .B(Oili1_Z), .Y(Ooli1_0_Z) ); defparam Ooli1_0.INIT=4'h1; // @28:473213 CFG2 Io0i1_RNO_3 ( .A(ioOi1_Z[4]), .B(ioOi1_Z[5]), .Y(m78_i_a3_0_1) ); defparam Io0i1_RNO_3.INIT=4'h1; // @28:514021 CFG2 un2_IoOi1_0_a2_3 ( .A(IIoO1_Z[7]), .B(IIoO1_Z[4]), .Y(un2_IoOi1_0_a2_3_Z) ); defparam un2_IoOi1_0_a2_3.INIT=4'h8; // @28:473213 CFG2 llli1_RNO_8 ( .A(Olli1_Z[1]), .B(Olli1_Z[11]), .Y(m9_3) ); defparam llli1_RNO_8.INIT=4'h8; // @28:512842 CFG2 l0li1_0_a3_0_0 ( .A(ooOi1_Z), .B(I0li1_Z), .Y(l0li1_0_a3_0_0_Z) ); defparam l0li1_0_a3_0_0.INIT=4'h8; // @28:514645 CFG2 un11_I10i1lto3_0 ( .A(O10i1_Z[2]), .B(O10i1_Z[3]), .Y(un11_I10i1lto3_0_Z) ); defparam un11_I10i1lto3_0.INIT=4'h8; // @28:514395 CFG2 un1_O00i1_4 ( .A(ll0i1_Z[10]), .B(ll0i1_Z[11]), .Y(un1_O00i1_4_Z) ); defparam un1_O00i1_4.INIT=4'h1; CFG2 \loIi1_RNIR3S4[1] ( .A(loIi1_Z[2]), .B(iiIi1lt2), .Y(N_5430_tz_tz_tz_tz_tz) ); defparam \loIi1_RNIR3S4[1] .INIT=4'h7; // @28:511846 CFG2 un4_IlIi1_3 ( .A(IIoO1_1), .B(IIoO1_3), .Y(un4_IlIi1_3_Z) ); defparam un4_IlIi1_3.INIT=4'h1; // @28:512287 CFG2 un2_OoIi1_4 ( .A(loIi1_Z[6]), .B(loIi1_Z[7]), .Y(un2_OoIi1_4_Z) ); defparam un2_OoIi1_4.INIT=4'h8; // @28:473213 CFG2 I0li1_RNO ( .A(I1li1_Z), .B(ooOi1_Z), .Y(O0li1) ); defparam I0li1_RNO.INIT=4'h8; // @28:512558 CFG2 iOli1_1_i_0_o3 ( .A(loIi1_Z[0]), .B(iiIi1lt2), .Y(N_666) ); defparam iOli1_1_i_0_o3.INIT=4'h7; // @28:514207 CFG2 iI0i1_0_0_o2 ( .A(iiOi1_1z), .B(iiIi1lt2), .Y(N_681) ); defparam iI0i1_0_0_o2.INIT=4'hD; // @28:473213 CFG2 IiOi1_RNIE6MPA ( .A(IiOi1_Z), .B(oIoO1_1z), .Y(oi0i1_1) ); defparam IiOi1_RNIE6MPA.INIT=4'h8; // @28:473213 CFG2 I0Ii1_RNI73OH4 ( .A(l0Ii1_Z), .B(I0Ii1_Z), .Y(N_577) ); defparam I0Ii1_RNI73OH4.INIT=4'h1; // @28:473213 CFG2 IiOi1_RNI29J25 ( .A(iiOi1_1z), .B(IiOi1_Z), .Y(N_59) ); defparam IiOi1_RNI29J25.INIT=4'h7; // @28:514825 CFG2 un4_lo0i1_2 ( .A(IiOi1_Z), .B(oo0i1_Z), .Y(un4_lo0i1_2_Z) ); defparam un4_lo0i1_2.INIT=4'h1; // @28:512106 CFG2 un4_O1Ii1_1 ( .A(O0Ii1_Z), .B(I0Ii1_Z), .Y(un4_O1Ii1_1_Z) ); defparam un4_O1Ii1_1.INIT=4'hE; // @28:514207 CFG4 iI0i1_0_0_a3_1 ( .A(loIi1_Z[0]), .B(loIi1_Z[2]), .C(loIi1_Z[3]), .D(loIi1_Z[4]), .Y(iI0i1_0_0_a3_1_Z) ); defparam iI0i1_0_0_a3_1.INIT=16'h0040; // @28:514220 CFG4 Ol0i1_0_0_a3_0_3 ( .A(loIi1_Z[0]), .B(loIi1_Z[2]), .C(loIi1_Z[3]), .D(loIi1_Z[4]), .Y(Ol0i1_0_0_a3_0_2) ); defparam Ol0i1_0_0_a3_0_3.INIT=16'h0080; // @28:514395 CFG4 un1_O00i1_8 ( .A(ll0i1_Z[9]), .B(ll0i1_Z[4]), .C(ll0i1_Z[3]), .D(ll0i1_Z[2]), .Y(un1_O00i1_8_Z) ); defparam un1_O00i1_8.INIT=16'h0001; // @28:514395 CFG4 un1_O00i1_7 ( .A(ll0i1_Z[12]), .B(ll0i1_Z[7]), .C(ll0i1_Z[6]), .D(ll0i1_Z[5]), .Y(un1_O00i1_7_Z) ); defparam un1_O00i1_7.INIT=16'h0001; // @28:513839 CFG3 OI0i1_1 ( .A(IoiO1_1z), .B(loIi1_Z[0]), .C(loIi1_Z[3]), .Y(OI0i1_1_Z) ); defparam OI0i1_1.INIT=8'h01; // @28:473213 CFG4 I1li1_RNO_2 ( .A(un12_i0li1_12), .B(un12_i0li1_13), .C(un12_i0li1_14), .D(un12_i0li1_15), .Y(m46_e_12) ); defparam I1li1_RNO_2.INIT=16'h0001; // @28:473213 CFG4 I1li1_RNO_5 ( .A(un12_i0li1_8), .B(un12_i0li1_9), .C(un12_i0li1_10), .D(un12_i0li1_11), .Y(m46_e_11) ); defparam I1li1_RNO_5.INIT=16'h0001; // @28:473213 CFG4 I1li1_RNO_4 ( .A(un12_i0li1_4), .B(un12_i0li1_5), .C(un12_i0li1_6), .D(un12_i0li1_7), .Y(m46_e_10) ); defparam I1li1_RNO_4.INIT=16'h0001; // @28:514220 CFG3 Ol0i1_0_0_a3_3 ( .A(I00i1_Z), .B(loIi1_Z[4]), .C(N_681), .Y(Ol0i1_0_0_a3_3_Z) ); defparam Ol0i1_0_0_a3_3.INIT=8'h08; // @28:514220 CFG4 Ol0i1_0_0_a3_2 ( .A(loIi1_Z[2]), .B(loIi1_Z[3]), .C(loIi1_Z[5]), .D(loIi1_Z[0]), .Y(Ol0i1_0_0_a3_2_Z) ); defparam Ol0i1_0_0_a3_2.INIT=16'h0100; // @28:514895 CFG2 io0i1_0_a3_0_0 ( .A(N_59), .B(Oi0i1_Z), .Y(io0i1_0_a3_0_0_Z) ); defparam io0i1_0_a3_0_0.INIT=4'h1; // @28:511842 CFG3 l1oO1_0_1 ( .A(IIoO1_Z[5]), .B(un4_IlIi1_3_Z), .C(IIoO1_Z[7]), .Y(l1oO1_0_1_Z) ); defparam l1oO1_0_1.INIT=8'h04; // @28:512287 CFG3 un2_OoIi1_7 ( .A(loIi1_Z[4]), .B(un2_OoIi1_4_Z), .C(loIi1_Z[12]), .Y(un2_OoIi1_7_Z) ); defparam un2_OoIi1_7.INIT=8'h80; // @28:512287 CFG4 un2_OoIi1_6 ( .A(loIi1_Z[13]), .B(loIi1_Z[9]), .C(loIi1_Z[8]), .D(loIi1_Z[5]), .Y(un2_OoIi1_6_Z) ); defparam un2_OoIi1_6.INIT=16'h8000; CFG4 IoOi1_RNO_0 ( .A(loIi1_Z[5]), .B(loIi1_Z[6]), .C(loIi1_Z[4]), .D(loIi1_Z[3]), .Y(IoOi1_1583_4) ); defparam IoOi1_RNO_0.INIT=16'h0001; // @28:473213 CFG4 llli1_RNO_6 ( .A(Olli1_Z[14]), .B(Olli1_Z[10]), .C(Olli1_Z[9]), .D(Olli1_Z[8]), .Y(m25_4) ); defparam llli1_RNO_6.INIT=16'h0001; // @28:473213 CFG3 llli1_RNO_5 ( .A(Olli1_Z[12]), .B(Olli1_Z[6]), .C(Olli1_Z[0]), .Y(m25_3) ); defparam llli1_RNO_5.INIT=8'h08; // @28:514380 CFG4 un3_il0i1lto15_4_0_2 ( .A(ll0i1_Z[9]), .B(ll0i1_Z[8]), .C(ll0i1_Z[7]), .D(ll0i1_Z[6]), .Y(un3_il0i1lto15_4_0_2_Z) ); defparam un3_il0i1lto15_4_0_2.INIT=16'h0001; // @28:515170 CFG4 \lO1i1_0_o2_1[28] ( .A(loIi1_Z[8]), .B(loIi1_Z[15]), .C(loIi1_Z[14]), .D(loIi1_Z[9]), .Y(lO1i1_0_o2_1_Z[28]) ); defparam \lO1i1_0_o2_1[28] .INIT=16'hFFFE; // @28:515204 CFG3 un23_lO1i1lto8_1 ( .A(loIi1_Z[8]), .B(loIi1_Z[7]), .C(loIi1_Z[6]), .Y(un23_lO1i1lto8_1_Z) ); defparam un23_lO1i1lto8_1.INIT=8'h80; // @28:514365 CFG3 ol0i1lto8_1 ( .A(ll0i1_Z[8]), .B(ll0i1_Z[7]), .C(ll0i1_Z[6]), .Y(ol0i1lto8_1_Z) ); defparam ol0i1lto8_1.INIT=8'h80; // @28:514645 CFG4 un11_I10i1lto15_6 ( .A(O10i1_Z[15]), .B(O10i1_Z[14]), .C(O10i1_Z[13]), .D(O10i1_Z[9]), .Y(un11_I10i1lto15_6_Z) ); defparam un11_I10i1lto15_6.INIT=16'hFFFE; // @28:514645 CFG4 un11_I10i1lto15_5 ( .A(O10i1_Z[11]), .B(O10i1_Z[8]), .C(O10i1_Z[7]), .D(O10i1_Z[6]), .Y(un11_I10i1lto15_5_Z) ); defparam un11_I10i1lto15_5.INIT=16'hFFFE; // @28:473213 CFG4 Io0i1_RNO_0 ( .A(OiOi1_Z), .B(loOi1_Z), .C(ioOi1_Z[3]), .D(ioOi1_Z[1]), .Y(m78_i_a3_0_8) ); defparam Io0i1_RNO_0.INIT=16'h2000; // @28:473213 CFG4 Io0i1_RNO_2 ( .A(ioOi1_Z[7]), .B(ioOi1_Z[6]), .C(ioOi1_Z[2]), .D(Io0i1_Z), .Y(m78_i_a3_0_7) ); defparam Io0i1_RNO_2.INIT=16'h0010; // @28:514021 CFG4 un2_IoOi1_0_a2_4 ( .A(IIoO1_1), .B(IIoO1_6), .C(IIoO1_3), .D(IIoO1_2), .Y(un2_IoOi1_0_a2_4_Z) ); defparam un2_IoOi1_0_a2_4.INIT=16'h8000; // @28:512097 CFG4 un2_O1Ii1_5 ( .A(l1Ii1_Z[7]), .B(l1Ii1_Z[6]), .C(l1Ii1_Z[5]), .D(l1Ii1_Z[4]), .Y(un2_O1Ii1_5_Z) ); defparam un2_O1Ii1_5.INIT=16'h8000; // @28:512097 CFG4 un2_O1Ii1_4 ( .A(l1Ii1_Z[3]), .B(l1Ii1_Z[2]), .C(l1Ii1_Z[1]), .D(l1Ii1_Z[0]), .Y(un2_O1Ii1_4_Z) ); defparam un2_O1Ii1_4.INIT=16'h8000; // @28:473213 CFG4 llli1_RNO_3 ( .A(Olli1_Z[11]), .B(Olli1_Z[5]), .C(Olli1_Z[3]), .D(Olli1_Z[1]), .Y(m16_5) ); defparam llli1_RNO_3.INIT=16'h0001; // @28:515204 CFG3 un23_lO1i1lto4_1 ( .A(loIi1_Z[2]), .B(loIi1_Z[3]), .C(loIi1_Z[4]), .Y(un23_lO1i1lto4_1_Z) ); defparam un23_lO1i1lto4_1.INIT=8'h80; // @28:511625 CFG4 un18_oIIi1_5 ( .A(IIoO1_6), .B(IIoO1_Z[4]), .C(IIoO1_Z[7]), .D(IIoO1_Z[5]), .Y(un18_oIIi1_5_Z) ); defparam un18_oIIi1_5.INIT=16'hFFFE; // @28:511625 CFG4 un18_oIIi1_4 ( .A(IIoO1_3), .B(IIoO1_2), .C(IIoO1_1), .D(IIoO1_0), .Y(un18_oIIi1_4_Z) ); defparam un18_oIIi1_4.INIT=16'hFFFE; // @28:514365 CFG3 ol0i1lto4_1 ( .A(ll0i1_Z[4]), .B(ll0i1_Z[3]), .C(ll0i1_Z[2]), .Y(ol0i1lto4_1_Z) ); defparam ol0i1lto4_1.INIT=8'h80; // @28:513481 CFG3 un5_iili1 ( .A(iiOi1_1z), .B(oi0i1_1), .C(loOi1_Z), .Y(un5_iili1_Z) ); defparam un5_iili1.INIT=8'h04; // @28:513222 CFG3 Ioli1 ( .A(loOi1_Z), .B(oIoO1_1z), .C(N_59), .Y(Ioli1_Z) ); defparam Ioli1.INIT=8'h04; // @28:514619 CFG4 un1_I10i1_2_0 ( .A(ll0i1_Z[15]), .B(ll0i1_Z[14]), .C(ll0i1_Z[13]), .D(ll0i1_Z[12]), .Y(un1_I10i1_2_0_Z) ); defparam un1_I10i1_2_0.INIT=16'h0001; // @28:511846 CFG4 un4_IlIi1_1_0 ( .A(IIoO1_6), .B(IIoO1_2), .C(IIoO1_0), .D(IIoO1_Z[4]), .Y(un4_IlIi1_1_0_Z) ); defparam un4_IlIi1_1_0.INIT=16'h8000; // @28:473213 CFG3 ii0i1_RNO ( .A(ii0i1_Z), .B(loOi1_Z), .C(oi0i1_1), .Y(oi0i1) ); defparam ii0i1_RNO.INIT=8'h10; // @28:473213 CFG4 li0i1_RNO_0 ( .A(O1li1_Z), .B(loOi1_Z), .C(IiOi1_Z), .D(iiOi1_1z), .Y(N_113_mux) ); defparam li0i1_RNO_0.INIT=16'h0010; // @28:514813 CFG4 un1_lo0i1_2 ( .A(oo0i1_Z), .B(o0Ii1_Z), .C(IiOi1_Z), .D(oIoO1_1z), .Y(un1_lo0i1_2_Z) ); defparam un1_lo0i1_2.INIT=16'h0400; // @28:511666 CFG4 iIIi1_2_tz ( .A(I0Ii1_Z), .B(ilIi1_Z), .C(oIoO1_1z), .D(l0Ii1_Z), .Y(iIIi1_2_tz_Z) ); defparam iIIi1_2_tz.INIT=16'hFFFE; // @28:511605 CFG2 un12_oIIi1_0 ( .A(N_59), .B(l0Ii1_Z), .Y(un7_OlIi1_0) ); defparam un12_oIIi1_0.INIT=4'h4; CFG3 oIIi1_1_RNO_0 ( .A(IiOi1_Z), .B(I0Ii1_Z), .C(O0Ii1_Z), .Y(N_4996_tz_tz) ); defparam oIIi1_1_RNO_0.INIT=8'hA8; // @28:512263 CFG2 \un17_o1Ii1.un17_o1Ii1_c2 ( .A(O0l11[3]), .B(O0l11[4]), .Y(un17_o1Ii1_c2) ); defparam \un17_o1Ii1.un17_o1Ii1_c2 .INIT=4'hE; // @28:515170 CFG3 \lO1i1[29] ( .A(lI111), .B(OO111[29]), .C(OO1i1_Z), .Y(lO1i1_Z[29]) ); defparam \lO1i1[29] .INIT=8'hAC; // @28:515330 CFG3 \lO1i1[17] ( .A(OO111[17]), .B(oo0i1_Z), .C(OO1i1_Z), .Y(lO1i1_Z[17]) ); defparam \lO1i1[17] .INIT=8'hCA; // @28:515330 CFG3 \lO1i1[16] ( .A(OO111[16]), .B(Oi0i1_Z), .C(OO1i1_Z), .Y(lO1i1_Z[16]) ); defparam \lO1i1[16] .INIT=8'hCA; // @28:515170 CFG3 \lO1i1[30] ( .A(OO1i1_Z), .B(OO111[30]), .C(I00i1_Z), .Y(lO1i1_Z[30]) ); defparam \lO1i1[30] .INIT=8'hE4; // @28:514533 CFG3 un6_i00i1lto15_3_0_0_o2_0_i_o2 ( .A(loIi1_Z[14]), .B(loIi1_Z[13]), .C(loIi1_Z[12]), .Y(N_670) ); defparam un6_i00i1lto15_3_0_0_o2_0_i_o2.INIT=8'hFE; // @28:475864 CFG3 \oO111[2] ( .A(Oi0i0[2]), .B(ii0i0[2]), .C(Ol1i0), .Y(oO111_Z[2]) ); defparam \oO111[2] .INIT=8'hAC; // @28:475864 CFG3 \oO111[1] ( .A(Oi0i0[1]), .B(ii0i0[1]), .C(Ol1i0), .Y(oO111_Z[1]) ); defparam \oO111[1] .INIT=8'hAC; // @28:475864 CFG3 \oO111[0] ( .A(Oi0i0[0]), .B(ii0i0[0]), .C(Ol1i0), .Y(oO111_Z[0]) ); defparam \oO111[0] .INIT=8'hAC; // @28:513839 CFG4 OI0i1_2_0_0_o2_0 ( .A(loIi1_Z[11]), .B(loIi1_Z[10]), .C(loIi1_Z[9]), .D(loIi1_Z[8]), .Y(N_675) ); defparam OI0i1_2_0_0_o2_0.INIT=16'hFFFE; // @28:513839 CFG3 OI0i1_10_0_o2 ( .A(loIi1_Z[7]), .B(loIi1_Z[6]), .C(loIi1_Z[5]), .Y(N_677) ); defparam OI0i1_10_0_o2.INIT=8'hFE; // @28:512558 CFG3 iOli1_9 ( .A(loIi1_Z[2]), .B(loIi1_Z[3]), .C(N_666), .Y(iOli1_9_Z) ); defparam iOli1_9.INIT=8'h08; // @28:514207 CFG3 iI0i1_0_0_o2_0 ( .A(loIi1_Z[0]), .B(loIi1_Z[2]), .C(N_681), .Y(N_684) ); defparam iI0i1_0_0_o2_0.INIT=8'hFE; // @28:473213 CFG3 IiOi1_RNIFR1EB ( .A(iiOi1_1z), .B(oIoO1_1z), .C(IiOi1_Z), .Y(N_560) ); defparam IiOi1_RNIFR1EB.INIT=8'h40; // @28:512296 CFG2 i1li1_0_a2 ( .A(N_59), .B(oIoO1_1z), .Y(i1li1) ); defparam i1li1_0_a2.INIT=4'h4; // @28:473213 CFG4 loOi1_RNO ( .A(Ii0i0_1z), .B(Ol1i0), .C(I1li1_Z), .D(oi0i0_1z), .Y(loOi1_2) ); defparam loOi1_RNO.INIT=16'h0B08; // @28:473213 CFG3 ooOi1_RNO ( .A(Ii0i0_1z), .B(oi0i0_1z), .C(Ol1i0), .Y(N_570_i) ); defparam ooOi1_RNO.INIT=8'hAC; // @28:473213 CFG3 \IIoO1_RNO[1] ( .A(IIoO1_Z[5]), .B(iIl0112), .C(ioOi1_Z[1]), .Y(IIoO1_RNO_Z[1]) ); defparam \IIoO1_RNO[1] .INIT=8'hE2; // @28:473213 CFG3 \IIoO1_RNO[3] ( .A(IIoO1_Z[7]), .B(iIl0112), .C(ioOi1_Z[3]), .Y(IIoO1_RNO_Z[3]) ); defparam \IIoO1_RNO[3] .INIT=8'hE2; // @28:517574 CFG3 \un1_o1Ii1[0] ( .A(un12_o1Ii1_cry_7_Z), .B(iIl0112), .C(un23_o1Ii1_cry_7_Z), .Y(N_223) ); defparam \un1_o1Ii1[0] .INIT=8'hE2; // @28:510964 CFG3 \ioOi1_RNO[7] ( .A(Oi0i0[7]), .B(ii0i0[7]), .C(Ol1i0), .Y(N_24_0_i) ); defparam \ioOi1_RNO[7] .INIT=8'hAC; // @28:510964 CFG3 \ioOi1_RNO[6] ( .A(Oi0i0[6]), .B(ii0i0[6]), .C(Ol1i0), .Y(N_558_i) ); defparam \ioOi1_RNO[6] .INIT=8'hAC; // @28:510964 CFG3 \ioOi1_RNO[5] ( .A(Oi0i0[5]), .B(ii0i0[5]), .C(Ol1i0), .Y(N_30_0_i) ); defparam \ioOi1_RNO[5] .INIT=8'hAC; // @28:510964 CFG3 \ioOi1_RNO[4] ( .A(Oi0i0[4]), .B(ii0i0[4]), .C(Ol1i0), .Y(N_33_0_i) ); defparam \ioOi1_RNO[4] .INIT=8'hAC; // @28:510964 CFG3 \ioOi1_RNO[3] ( .A(Oi0i0[3]), .B(ii0i0[3]), .C(Ol1i0), .Y(N_36_0_i) ); defparam \ioOi1_RNO[3] .INIT=8'hAC; // @28:514395 CFG4 un1_O00i1_11 ( .A(ll0i1_Z[0]), .B(ll0i1_Z[1]), .C(un1_O00i1_4_Z), .D(un1_O00i1_8_Z), .Y(un1_O00i1_11_Z) ); defparam un1_O00i1_11.INIT=16'h1000; // @28:514395 CFG4 un1_O00i1_10 ( .A(ll0i1_Z[8]), .B(ll0i1_Z[15]), .C(un1_O00i1_7_Z), .D(un1_O00i1_1_2_Z), .Y(un1_O00i1_10_Z) ); defparam un1_O00i1_10.INIT=16'h8000; // @28:514207 CFG4 iI0i1_0_0_a3_0_1 ( .A(I00i1_Z), .B(loIi1_Z[3]), .C(loIi1_Z[4]), .D(N_684), .Y(iI0i1_0_0_a3_0_1_Z) ); defparam iI0i1_0_0_a3_0_1.INIT=16'h0020; // @28:512287 CFG4 un2_OoIi1_8 ( .A(loIi1_Z[14]), .B(loIi1_Z[15]), .C(un2_OoIi1_1_Z), .D(un2_OoIi1_6_Z), .Y(un2_OoIi1_8_Z) ); defparam un2_OoIi1_8.INIT=16'h8000; CFG4 IoOi1_RNO_2 ( .A(loIi1_Z[7]), .B(OoOi1_Z), .C(iiOi1_1z), .D(loIi1_Z[15]), .Y(IoOi1_1583_3) ); defparam IoOi1_RNO_2.INIT=16'h0040; CFG4 lo0i1_RNO_1 ( .A(oIoO1_1z), .B(l0Ii1_Z), .C(un1_lo0i1_2_Z), .D(un4_lo0i1_2_Z), .Y(lo0i1_1553_tz_0) ); defparam lo0i1_RNO_1.INIT=16'hF4F0; // @28:514645 CFG3 un11_I10i1lto15_7 ( .A(O10i1_Z[10]), .B(un11_I10i1lto15_5_Z), .C(O10i1_Z[12]), .Y(un11_I10i1lto15_7_Z) ); defparam un11_I10i1lto15_7.INIT=8'hFE; // @28:473213 CFG4 Io0i1_RNO_1 ( .A(ioOi1_Z[0]), .B(m78_i_a3_0_7), .C(liOi1_Z), .D(m78_i_a3_0_1), .Y(m78_i_a3_0_9) ); defparam Io0i1_RNO_1.INIT=16'h0400; // @28:473213 CFG4 llli1_RNO_7 ( .A(Olli1_Z[7]), .B(Olli1_Z[4]), .C(iIl0112), .D(Olli1_Z[13]), .Y(m9_4) ); defparam llli1_RNO_7.INIT=16'h0010; // @28:473213 CFG4 llli1_RNO_2 ( .A(Olli1_Z[7]), .B(Olli1_Z[4]), .C(iIl0112), .D(Olli1_Z[13]), .Y(m16_4) ); defparam llli1_RNO_2.INIT=16'h0800; // @28:511749 CFG3 un6_OlIi1 ( .A(un4_IlIi1_1_0_Z), .B(IIoO1_Z[5]), .C(un4_IlIi1_3_Z), .Y(un6_OlIi1_Z) ); defparam un6_OlIi1.INIT=8'h20; // @28:511579 CFG4 un5_oIIi1 ( .A(IIoO1_Z[7]), .B(IIoO1_Z[5]), .C(un4_IlIi1_3_Z), .D(un4_IlIi1_1_0_Z), .Y(un5_oIIi1_Z) ); defparam un5_oIIi1.INIT=16'h2000; // @28:514021 CFG4 un2_IoOi1_0_a2 ( .A(IIoO1_0), .B(IIoO1_Z[5]), .C(un2_IoOi1_0_a2_3_Z), .D(un2_IoOi1_0_a2_4_Z), .Y(un2_IoOi1) ); defparam un2_IoOi1_0_a2.INIT=16'h8000; // @28:511690 CFG4 un10_iIIi1 ( .A(I1I11_1z), .B(N_59), .C(IOI11), .D(lOIi1_Z), .Y(un10_iIIi1_Z) ); defparam un10_iIIi1.INIT=16'hDFDD; // @28:512106 CFG4 un4_O1Ii1 ( .A(ilIi1_Z), .B(l0Ii1_Z), .C(oIoO1_1z), .D(un4_O1Ii1_1_Z), .Y(un4_O1Ii1_Z) ); defparam un4_O1Ii1.INIT=16'hFFFE; // @28:511842 CFG4 l1oO1_0_tz ( .A(I0Ii1_Z), .B(IiOi1_Z), .C(iiOi1_1z), .D(un1_IlIi1_3), .Y(l1oO1_0_tz_Z) ); defparam l1oO1_0_tz.INIT=16'hFF80; // @28:513001 CFG4 \l1li1[7] ( .A(oIoO1_1z), .B(iiOi1_1z), .C(IIoO1_Z[7]), .D(Oi011[7]), .Y(l1li1_Z[7]) ); defparam \l1li1[7] .INIT=16'hA280; // @28:513001 CFG4 \l1li1[4] ( .A(oIoO1_1z), .B(iiOi1_1z), .C(IIoO1_Z[4]), .D(Oi011[4]), .Y(l1li1_Z[4]) ); defparam \l1li1[4] .INIT=16'hA280; // @28:511096 CFG3 \O1oO1[2] ( .A(IIoO1_6), .B(iIl0112), .C(ioOi1_Z[2]), .Y(O1oO1_Z[2]) ); defparam \O1oO1[2] .INIT=8'hE2; // @28:511096 CFG3 \O1oO1[0] ( .A(IIoO1_Z[4]), .B(iIl0112), .C(ioOi1_Z[0]), .Y(O1oO1_Z[0]) ); defparam \O1oO1[0] .INIT=8'hE2; // @28:513001 CFG4 \l1li1[5] ( .A(oIoO1_1z), .B(iiOi1_1z), .C(IIoO1_Z[5]), .D(Oi011[5]), .Y(l1li1_Z[5]) ); defparam \l1li1[5] .INIT=16'hA280; // @28:473213 CFG4 i10i1_RNO ( .A(OiOi1_Z), .B(i10i1_Z), .C(loOi1_Z), .D(ii011_1z), .Y(i10i1_RNO_Z) ); defparam i10i1_RNO.INIT=16'h20EC; // @28:513839 CFG2 OI0i1_10_0_a3 ( .A(N_677), .B(loIi1_Z[4]), .Y(OI0i1_10) ); defparam OI0i1_10_0_a3.INIT=4'h1; // @28:512842 CFG4 l0li1_0 ( .A(l0li1_0_a3_0_0_Z), .B(ii011_1z), .C(li011), .D(O1li1_Z), .Y(l0li1) ); defparam l0li1_0.INIT=16'h03AA; // @28:514533 CFG4 un6_i00i1lto15_3_0_0_o2_i_o2 ( .A(loIi1_Z[12]), .B(loIi1_Z[15]), .C(loIi1_Z[14]), .D(loIi1_Z[13]), .Y(N_672) ); defparam un6_i00i1lto15_3_0_0_o2_i_o2.INIT=16'hFFFE; // @28:514528 CFG4 \i00i1_i_o2_1_0_o2[15] ( .A(loIi1_Z[2]), .B(loIi1_Z[3]), .C(loIi1_Z[4]), .D(N_666), .Y(N_667) ); defparam \i00i1_i_o2_1_0_o2[15] .INIT=16'h1F0F; // @28:514645 CFG4 un11_I10i1lto4 ( .A(O10i1_Z[0]), .B(un11_I10i1lto3_0_Z), .C(O10i1_Z[4]), .D(O10i1_Z[1]), .Y(un11_I10i1lt5) ); defparam un11_I10i1lto4.INIT=16'hF8F0; // @28:514380 CFG4 un3_il0i1lto4 ( .A(ll0i1_Z[4]), .B(ll0i1_Z[3]), .C(ll0i1_Z[2]), .D(ll0i1_Z[1]), .Y(un3_il0i1lt5) ); defparam un3_il0i1lto4.INIT=16'h1555; // @28:517574 CFG3 \un1_loli1[0] ( .A(i1li1), .B(iIl0112), .C(loli1_Z), .Y(un1_loli1_Z[0]) ); defparam \un1_loli1[0] .INIT=8'hB8; // @28:473213 CFG3 li0i1_RNO ( .A(N_113_mux), .B(i1_i_2), .C(O0Ii1_Z), .Y(Ii0i1) ); defparam li0i1_RNO.INIT=8'h2E; // @28:511139 CFG3 \IIoO1_RNO[7] ( .A(ioOi1_Z[3]), .B(iIl0112), .C(ioOi1_Z[7]), .Y(N_692_i) ); defparam \IIoO1_RNO[7] .INIT=8'hE2; // @28:511139 CFG3 \IIoO1_RNO[6] ( .A(ioOi1_Z[2]), .B(iIl0112), .C(ioOi1_Z[6]), .Y(N_691_i) ); defparam \IIoO1_RNO[6] .INIT=8'hE2; // @28:511139 CFG3 \IIoO1_RNO[5] ( .A(ioOi1_Z[1]), .B(iIl0112), .C(ioOi1_Z[5]), .Y(N_690_i) ); defparam \IIoO1_RNO[5] .INIT=8'hE2; // @28:511139 CFG3 \IIoO1_RNO[4] ( .A(ioOi1_Z[0]), .B(iIl0112), .C(ioOi1_Z[4]), .Y(N_689_i) ); defparam \IIoO1_RNO[4] .INIT=8'hE2; // @28:514619 CFG4 un1_I10i1_2 ( .A(un1_I10i1_2_0_Z), .B(un6_I10i1_0_data_tmp[7]), .C(iOl11), .D(ll0i1_Z[11]), .Y(un1_I10i1_2_Z) ); defparam un1_I10i1_2.INIT=16'h0080; // @28:473213 CFG4 I1li1_RNO_3 ( .A(OIl11), .B(un12_i0li1_a_4_cry_0_Y), .C(un12_i0li1_a_4[16]), .D(m46_e_2), .Y(m46_e_9) ); defparam I1li1_RNO_3.INIT=16'h1000; // @28:514895 CFG4 io0i1_0_a3_0_2 ( .A(io0i1_0_a3_0_0_Z), .B(N_223), .C(l0Ii1_Z), .D(un4_O1Ii1_1_Z), .Y(io0i1_0_a3_0_2_Z) ); defparam io0i1_0_a3_0_2.INIT=16'h8880; // @28:473213 CFG4 llli1_RNO_1 ( .A(IOI11), .B(m25_3), .C(m25_4), .D(iOIi1_Z), .Y(m25_6) ); defparam llli1_RNO_1.INIT=16'h4000; // @28:473213 CFG4 llli1_RNO_4 ( .A(Olli1_Z[3]), .B(Olli1_Z[5]), .C(m9_4), .D(m9_3), .Y(i8_mux) ); defparam llli1_RNO_4.INIT=16'h8000; // @28:511924 CFG4 un1_lIoO1 ( .A(O0Ii1_Z), .B(I1I11_1z), .C(un5_oIIi1_Z), .D(IiOi1_Z), .Y(un1_lIoO1_Z) ); defparam un1_lIoO1.INIT=16'h8000; // @28:513168 CFG4 Ooli1 ( .A(Ooli1_0_Z), .B(loli1_Z), .C(oIoO1_1z), .D(N_59), .Y(Ooli1_Z) ); defparam Ooli1.INIT=16'h0020; CFG4 lo0i1_RNO_0 ( .A(l0Ii1_Z), .B(I0Ii1_Z), .C(lo0i1_1553_tz_0), .D(un4_lo0i1_2_Z), .Y(N_5400_tz) ); defparam lo0i1_RNO_0.INIT=16'hF4F0; CFG4 lIoO1_RNO ( .A(I0Ii1_Z), .B(l0Ii1_Z), .C(IiOi1_Z), .D(un5_oIIi1_Z), .Y(lIoO1_RNO_Z) ); defparam lIoO1_RNO.INIT=16'hE000; // @28:512236 CFG3 un6_o1Ii1_c3 ( .A(O0l11[4]), .B(O0l11[3]), .C(O0l11[2]), .Y(un6_o1Ii1_c3_Z) ); defparam un6_o1Ii1_c3.INIT=8'hFE; // @28:515204 CFG4 un23_lO1i1lto5 ( .A(iiIi1lt2), .B(loIi1_Z[5]), .C(loIi1_Z[0]), .D(un23_lO1i1lto4_1_Z), .Y(un23_lO1i1lt8) ); defparam un23_lO1i1lto5.INIT=16'hFECC; // @28:513839 CFG3 OI0i1_2_0_0_o2 ( .A(loIi1_Z[15]), .B(N_670), .C(N_675), .Y(N_676) ); defparam OI0i1_2_0_0_o2.INIT=8'hFE; // @28:514559 CFG4 un16_i00i1lto4 ( .A(loIi1_Z[2]), .B(loIi1_Z[3]), .C(loIi1_Z[4]), .D(N_666), .Y(un16_i00i1lt15) ); defparam un16_i00i1lto4.INIT=16'hC0E0; // @28:514365 CFG4 ol0i1lto5 ( .A(ll0i1_Z[0]), .B(ll0i1_Z[5]), .C(ll0i1_Z[1]), .D(ol0i1lto4_1_Z), .Y(ol0i1lt8) ); defparam ol0i1lto5.INIT=16'hFECC; // @28:511620 CFG3 un17_oIIi1 ( .A(un18_oIIi1_5_Z), .B(oi0i1_1), .C(un18_oIIi1_4_Z), .Y(un17_oIIi1_Z) ); defparam un17_oIIi1.INIT=8'hC8; // @28:517574 CFG4 \un1_iili1[0] ( .A(ioli1_Z), .B(iIl0112), .C(Ioli1_Z), .D(un5_iili1_Z), .Y(un1_iili1_Z[0]) ); defparam \un1_iili1[0] .INIT=16'hF3E2; // @28:473213 CFG4 oIoO1_RNIBVKRO ( .A(N_59), .B(un1_IlIi1_3), .C(oIoO1_1z), .D(N_577), .Y(N_557_1) ); defparam oIoO1_RNIBVKRO.INIT=16'h030A; CFG4 lo0i1_RNO ( .A(iiIi1lt2), .B(loIi1_Z[0]), .C(loIi1_Z[2]), .D(N_5400_tz), .Y(lo0i1_1553_1) ); defparam lo0i1_RNO.INIT=16'h0100; CFG3 IoOi1_RNO_1 ( .A(N_670), .B(IoOi1_1583_3), .C(N_5430_tz_tz_tz_tz_tz), .Y(IoOi1_1583_7) ); defparam IoOi1_RNO_1.INIT=8'h40; // @28:514395 CFG4 un1_O00i1_1 ( .A(OI0i1_10), .B(iiOi1_1z), .C(N_676), .D(iOli1_9_Z), .Y(un1_O00i1_1_Z) ); defparam un1_O00i1_1.INIT=16'h0800; // @28:513839 CFG4 OI0i1 ( .A(OI0i1_10), .B(N_676), .C(OI0i1_1_Z), .D(N_5430_tz_tz_tz_tz_tz), .Y(OI0i1_Z) ); defparam OI0i1.INIT=16'h0020; // @28:514645 CFG4 un11_I10i1lto15 ( .A(O10i1_Z[5]), .B(un11_I10i1lto15_6_Z), .C(un11_I10i1lt5), .D(un11_I10i1lto15_7_Z), .Y(un11_I10i1) ); defparam un11_I10i1lto15.INIT=16'hFFEC; // @28:514380 CFG4 un3_il0i1lto15_4_0 ( .A(un1_O00i1_4_Z), .B(ll0i1_Z[5]), .C(un3_il0i1lt5), .D(un3_il0i1lto15_4_0_2_Z), .Y(un3_il0i1_4_0) ); defparam un3_il0i1lto15_4_0.INIT=16'hA200; CFG4 oIIi1_1_RNO ( .A(N_223), .B(un5_oIIi1_Z), .C(iiOi1_1z), .D(N_4996_tz_tz), .Y(oIIi1_1_RNO_Z) ); defparam oIIi1_1_RNO.INIT=16'h8000; // @28:511666 CFG4 iIIi1 ( .A(IiOi1_Z), .B(O0Ii1_Z), .C(un10_iIIi1_Z), .D(iIIi1_2_tz_Z), .Y(iIIi1_Z) ); defparam iIIi1.INIT=16'hD5C0; // @28:513276 CFG3 \Iili1[4] ( .A(l1li1_Z[4]), .B(iIl0112), .C(o1li1_Z[4]), .Y(Iili1_Z[4]) ); defparam \Iili1[4] .INIT=8'hB8; // @28:513276 CFG3 \Iili1[7] ( .A(l1li1_Z[7]), .B(iIl0112), .C(o1li1_Z[7]), .Y(Iili1_Z[7]) ); defparam \Iili1[7] .INIT=8'hB8; // @28:513276 CFG3 \Iili1[5] ( .A(l1li1_Z[5]), .B(iIl0112), .C(o1li1_Z[5]), .Y(Iili1_Z[5]) ); defparam \Iili1[5] .INIT=8'hB8; // @28:473213 CFG4 Io0i1_RNO ( .A(m78_i_a3_0_8), .B(m78_i_a3_0_9), .C(Io0i1_Z), .D(ii011_1z), .Y(N_69) ); defparam Io0i1_RNO.INIT=16'h88F8; // @28:514528 CFG4 \i00i1_i_o2_1_0_o2_0[15] ( .A(loIi1_Z[15]), .B(N_670), .C(N_675), .D(N_677), .Y(N_678) ); defparam \i00i1_i_o2_1_0_o2_0[15] .INIT=16'hFFFE; // @28:512132 CFG4 un3_I1Ii1 ( .A(un4_O1Ii1_Z), .B(oi0i1_1), .C(un2_O1Ii1_4_Z), .D(un2_O1Ii1_5_Z), .Y(un3_I1Ii1_Z) ); defparam un3_I1Ii1.INIT=16'h0222; // @28:512153 CFG4 un12_I1Ii1 ( .A(un4_O1Ii1_Z), .B(oi0i1_1), .C(un2_O1Ii1_4_Z), .D(un2_O1Ii1_5_Z), .Y(un12_I1Ii1_Z) ); defparam un12_I1Ii1.INIT=16'h3111; // @28:473213 CFG4 llli1_RNO_0 ( .A(Olli1_Z[2]), .B(m16_4), .C(m16_5), .D(i8_mux), .Y(i7_mux) ); defparam llli1_RNO_0.INIT=16'hD580; // @28:517574 CFG3 \un1_ooli1[0] ( .A(Ooli1_Z), .B(iIl0112), .C(ooli1_Z), .Y(un1_ooli1_Z[0]) ); defparam \un1_ooli1[0] .INIT=8'hB8; // @28:515170 CFG4 \lO1i1_0_a2_2[28] ( .A(II111), .B(i10i1_Z), .C(OO1i1_Z), .D(un4_IIo11), .Y(lO1i1_0_a2_2_Z[28]) ); defparam \lO1i1_0_a2_2[28] .INIT=16'h2000; // @28:511571 CFG4 oIIi1_1 ( .A(IiOi1_Z), .B(ilIi1_Z), .C(oIIi1_1_RNO_Z), .D(un17_oIIi1_Z), .Y(oIIi1_1_Z) ); defparam oIIi1_1.INIT=16'hFFF8; // @28:514641 CFG3 un7_I10i1_1 ( .A(un11_I10i1), .B(iOl11), .C(un1_I10i1_2_0_Z), .Y(un7_I10i1_1_Z) ); defparam un7_I10i1_1.INIT=8'h80; // @28:473213 CFG4 I1li1_RNO_1 ( .A(m46_e_12), .B(m46_e_9), .C(m46_e_10), .D(m46_e_11), .Y(N_587) ); defparam I1li1_RNO_1.INIT=16'h8000; // @28:514559 CFG4 un16_i00i1lto15 ( .A(N_677), .B(un16_i00i1lt15), .C(N_672), .D(N_675), .Y(un16_i00i1) ); defparam un16_i00i1lto15.INIT=16'hFFFE; // @28:511924 CFG4 lIoO1 ( .A(O0Ii1_Z), .B(o0Ii1_Z), .C(lIoO1_RNO_Z), .D(un1_lIoO1_Z), .Y(lIoO1_Z) ); defparam lIoO1.INIT=16'hFFF4; CFG4 IoOi1_RNO ( .A(un2_IoOi1), .B(IoOi1_1583_4), .C(IoOi1_1583_7), .D(N_675), .Y(IoOi1_RNO_Z) ); defparam IoOi1_RNO.INIT=16'h0080; // @28:511781 CFG4 un13_OlIi1 ( .A(I0Ii1_Z), .B(IiOi1_Z), .C(iiOi1_1z), .D(un6_OlIi1_Z), .Y(un13_OlIi1_Z) ); defparam un13_OlIi1.INIT=16'h0A8A; // @28:511868 CFG4 un9_IlIi1 ( .A(IiOi1_Z), .B(l0Ii1_Z), .C(un5_oIIi1_Z), .D(iiOi1_1z), .Y(un9_IlIi1_Z) ); defparam un9_IlIi1.INIT=16'h08CC; // @28:513888 CFG2 \II0i1[8] ( .A(OI0i1_Z), .B(OIo11[31]), .Y(II0i1_Z[8]) ); defparam \II0i1[8] .INIT=4'h8; // @28:513888 CFG2 \II0i1[7] ( .A(OI0i1_Z), .B(OIo11[30]), .Y(II0i1_Z[7]) ); defparam \II0i1[7] .INIT=4'h8; // @28:513888 CFG2 \II0i1[6] ( .A(OI0i1_Z), .B(OIo11[29]), .Y(II0i1_Z[6]) ); defparam \II0i1[6] .INIT=4'h8; // @28:513888 CFG2 \II0i1[5] ( .A(OI0i1_Z), .B(OIo11[28]), .Y(II0i1_Z[5]) ); defparam \II0i1[5] .INIT=4'h8; // @28:513888 CFG2 \II0i1[4] ( .A(OI0i1_Z), .B(OIo11[27]), .Y(II0i1_Z[4]) ); defparam \II0i1[4] .INIT=4'h8; // @28:513888 CFG2 \II0i1[3] ( .A(OI0i1_Z), .B(OIo11[26]), .Y(II0i1_Z[3]) ); defparam \II0i1[3] .INIT=4'h8; // @28:513888 CFG2 \II0i1[2] ( .A(OI0i1_Z), .B(OIo11[25]), .Y(II0i1_Z[2]) ); defparam \II0i1[2] .INIT=4'h8; // @28:514895 CFG4 io0i1_0 ( .A(io0i1_0_a3_0_2_Z), .B(un5_oIIi1_Z), .C(Oi0i1_Z), .D(ii011_1z), .Y(io0i1) ); defparam io0i1_0.INIT=16'h88F8; // @28:512336 CFG4 un12_IoIi1_i_a2 ( .A(un2_OoIi1_8_Z), .B(un2_OoIi1_7_Z), .C(i1li1), .D(iOli1_9_Z), .Y(N_631) ); defparam un12_IoIi1_i_a2.INIT=16'h70F0; // @28:512404 CFG4 ooIi1_0_a2_0_o2 ( .A(loIi1_Z[4]), .B(loIi1_Z[3]), .C(N_676), .D(N_677), .Y(N_682) ); defparam ooIi1_0_a2_0_o2.INIT=16'hFFFE; // @28:514220 CFG4 Ol0i1_0_0_a3_0 ( .A(N_677), .B(N_676), .C(Ol0i1_0_0_a3_0_2), .D(N_681), .Y(N_748) ); defparam Ol0i1_0_0_a3_0.INIT=16'h0010; // @28:511230 CFG4 oiOi1 ( .A(iIl0112), .B(IiOi1_Z), .C(iiOi1_1z), .D(lIoO1_Z), .Y(oiOi1_Z) ); defparam oiOi1.INIT=16'hAEFF; // @28:511571 CFG4 oIIi1 ( .A(N_223), .B(un7_OlIi1_0), .C(oIIi1_1_Z), .D(un5_oIIi1_Z), .Y(oIIi1_Z) ); defparam oIIi1.INIT=16'hF8F0; // @28:512263 CFG4 \un17_o1Ii1.un17_o1Ii1_axbxc4 ( .A(O0l11[7]), .B(O0l11[6]), .C(O0l11[5]), .D(un17_o1Ii1_c2), .Y(un23_o1Ii1_4) ); defparam \un17_o1Ii1.un17_o1Ii1_axbxc4 .INIT=16'hAAA9; // @28:511842 CFG4 l1oO1 ( .A(l1oO1_0_1_Z), .B(un4_IlIi1_1_0_Z), .C(un9_IlIi1_Z), .D(l1oO1_0_tz_Z), .Y(l1oO1_Z) ); defparam l1oO1.INIT=16'hF8F0; // @28:511745 CFG4 OlIi1 ( .A(un1_IlIi1_3), .B(un6_OlIi1_Z), .C(un7_OlIi1_0), .D(un13_OlIi1_Z), .Y(OlIi1_Z) ); defparam OlIi1.INIT=16'hFF32; // @28:514395 CFG4 O00i1 ( .A(un1_O00i1_10_Z), .B(I00i1_Z), .C(un1_O00i1_1_Z), .D(un1_O00i1_11_Z), .Y(O00i1_Z) ); defparam O00i1.INIT=16'hAC0C; // @28:514460 CFG4 olli1 ( .A(un6_olli1_cry_15_Z), .B(loIi1_Z[11]), .C(un3_olli1lto15_0_0_Z), .D(N_672), .Y(olli1_Z) ); defparam olli1.INIT=16'hAAA8; // @28:512129 CFG4 \I1Ii1[7] ( .A(un12_I1Ii1_Z), .B(un3_I1Ii1_Z), .C(l1Ii1_Z[7]), .D(un6_I1Ii1_s_7_S), .Y(I1Ii1_Z[7]) ); defparam \I1Ii1[7] .INIT=16'hECA0; // @28:512129 CFG4 \I1Ii1[6] ( .A(un12_I1Ii1_Z), .B(un3_I1Ii1_Z), .C(l1Ii1_Z[6]), .D(un6_I1Ii1_cry_6_S), .Y(I1Ii1_Z[6]) ); defparam \I1Ii1[6] .INIT=16'hECA0; // @28:512129 CFG4 \I1Ii1[5] ( .A(un12_I1Ii1_Z), .B(un3_I1Ii1_Z), .C(l1Ii1_Z[5]), .D(un6_I1Ii1_cry_5_S), .Y(I1Ii1_Z[5]) ); defparam \I1Ii1[5] .INIT=16'hECA0; // @28:512129 CFG4 \I1Ii1[4] ( .A(un12_I1Ii1_Z), .B(un3_I1Ii1_Z), .C(l1Ii1_Z[4]), .D(un6_I1Ii1_cry_4_S), .Y(I1Ii1_Z[4]) ); defparam \I1Ii1[4] .INIT=16'hECA0; // @28:512129 CFG4 \I1Ii1[3] ( .A(un12_I1Ii1_Z), .B(un3_I1Ii1_Z), .C(l1Ii1_Z[3]), .D(un6_I1Ii1_cry_3_S), .Y(I1Ii1_Z[3]) ); defparam \I1Ii1[3] .INIT=16'hECA0; // @28:512129 CFG4 \I1Ii1[2] ( .A(un12_I1Ii1_Z), .B(un3_I1Ii1_Z), .C(l1Ii1_Z[2]), .D(un6_I1Ii1_cry_2_S), .Y(I1Ii1_Z[2]) ); defparam \I1Ii1[2] .INIT=16'hECA0; // @28:512129 CFG4 \I1Ii1[1] ( .A(un12_I1Ii1_Z), .B(un3_I1Ii1_Z), .C(l1Ii1_Z[1]), .D(un6_I1Ii1_cry_1_S), .Y(I1Ii1_Z[1]) ); defparam \I1Ii1[1] .INIT=16'hECA0; // @28:512129 CFG3 \I1Ii1[0] ( .A(un3_I1Ii1_Z), .B(l1Ii1_Z[0]), .C(un12_I1Ii1_Z), .Y(I1Ii1_Z[0]) ); defparam \I1Ii1[0] .INIT=8'hE2; // @28:514121 CFG4 oI0i1_i_0_a2 ( .A(loIi1_Z[4]), .B(loIi1_Z[3]), .C(N_678), .D(N_5430_tz_tz_tz_tz_tz), .Y(N_768) ); defparam oI0i1_i_0_a2.INIT=16'h0100; // @28:513955 CFG4 lI0i1_0_0_o2 ( .A(loIi1_Z[4]), .B(loIi1_Z[3]), .C(N_678), .D(N_684), .Y(N_686) ); defparam lI0i1_0_0_o2.INIT=16'hFFFE; // @28:515204 CFG4 un23_lO1i1lto10 ( .A(loIi1_Z[10]), .B(loIi1_Z[9]), .C(un23_lO1i1lto8_1_Z), .D(un23_lO1i1lt8), .Y(un23_lO1i1lt15) ); defparam un23_lO1i1lto10.INIT=16'hA888; // @28:514528 CFG3 \i00i1_i_o2_1_0[15] ( .A(I00i1_Z), .B(N_667), .C(N_678), .Y(N_62) ); defparam \i00i1_i_o2_1_0[15] .INIT=8'hAE; // @28:514557 CFG2 un14_i00i1_i_0 ( .A(un16_i00i1), .B(I00i1_Z), .Y(N_655) ); defparam un14_i00i1_i_0.INIT=4'h7; // @28:514365 CFG4 ol0i1lto10 ( .A(ll0i1_Z[10]), .B(ll0i1_Z[9]), .C(ol0i1lto8_1_Z), .D(ol0i1lt8), .Y(ol0i1lt15) ); defparam ol0i1lto10.INIT=16'hA888; // @28:473213 CFG4 \un1_o1Ii1_RNIM7MGF1[0] ( .A(N_223), .B(un5_oIIi1_Z), .C(oi0i1_1), .D(N_557), .Y(N_122_mux) ); defparam \un1_o1Ii1_RNIM7MGF1[0] .INIT=16'hB0F4; // @28:514528 CFG4 \i00i1_i_a2_0_0[12] ( .A(un8_i00i1_cry_12_S), .B(un16_i00i1), .C(I00i1_Z), .D(un18_i00i1_cry_12_S), .Y(i00i1_i_a2_0_0_Z[12]) ); defparam \i00i1_i_a2_0_0[12] .INIT=16'h35F5; // @28:515170 CFG4 \lO1i1_0_a2_4[28] ( .A(N_792), .B(loIi1_Z[11]), .C(lO1i1_0_a2_2_Z[28]), .D(N_672), .Y(lO1i1_0_a2_4_Z[28]) ); defparam \lO1i1_0_a2_4[28] .INIT=16'h0020; // @28:514813 CFG4 lo0i1 ( .A(oo0i1_Z), .B(ii011_1z), .C(lo0i1_1553_1), .D(N_682), .Y(lo0i1_Z) ); defparam lo0i1.INIT=16'h22F2; // @28:515286 CFG4 \lO1i1_0_0[23] ( .A(OO111[23]), .B(i10i1_Z), .C(OO1i1_Z), .D(un4_IIo11), .Y(lO1i1[23]) ); defparam \lO1i1_0_0[23] .INIT=16'h3A0A; // @28:514207 CFG4 iI0i1_0_0 ( .A(iI0i1_0_0_a3_1_Z), .B(N_681), .C(iI0i1_0_0_a3_0_1_Z), .D(N_678), .Y(iI0i1) ); defparam iI0i1_0_0.INIT=16'h00F2; // @28:473213 CFG4 llli1_RNO ( .A(ii011_1z), .B(i1_i_0), .C(i7_mux), .D(m25_6), .Y(Illi1) ); defparam llli1_RNO.INIT=16'h7444; // @28:514220 CFG4 Ol0i1_0_0 ( .A(Ol0i1_0_0_a3_3_Z), .B(N_748), .C(Ol0i1_0_0_a3_2_Z), .D(N_792), .Y(Ol0i1) ); defparam Ol0i1_0_0.INIT=16'hCCEC; // @28:515398 CFG3 \o0iO1_RNO[20] ( .A(OO111[20]), .B(OO1i1_Z), .C(un4_IIo11), .Y(N_695_i) ); defparam \o0iO1_RNO[20] .INIT=8'h2E; // @28:514528 CFG4 \i00i1_i_a2_0_0[14] ( .A(un8_i00i1_cry_14_S), .B(un16_i00i1), .C(I00i1_Z), .D(un18_i00i1_cry_14_S), .Y(i00i1_i_a2_0_0_Z[14]) ); defparam \i00i1_i_a2_0_0[14] .INIT=16'h35F5; // @28:514528 CFG4 \i00i1_i_a2_0_0[15] ( .A(un8_i00i1_s_15_S), .B(un16_i00i1), .C(I00i1_Z), .D(un18_i00i1_s_15_S), .Y(i00i1_i_a2_0_0_Z[15]) ); defparam \i00i1_i_a2_0_0[15] .INIT=16'h35F5; // @28:514528 CFG4 \i00i1_i_a2_0_0[13] ( .A(un8_i00i1_cry_13_S), .B(un16_i00i1), .C(I00i1_Z), .D(un18_i00i1_cry_13_S), .Y(i00i1_i_a2_0_0_Z[13]) ); defparam \i00i1_i_a2_0_0[13] .INIT=16'h35F5; // @28:512236 CFG4 un6_o1Ii1_axbxc5 ( .A(O0l11[7]), .B(O0l11[6]), .C(O0l11[5]), .D(un6_o1Ii1_c3_Z), .Y(un12_o1Ii1_5) ); defparam un6_o1Ii1_axbxc5.INIT=16'hAAA9; // @28:514528 CFG4 \i00i1[2] ( .A(un8_i00i1_cry_2_S), .B(un18_i00i1_cry_2_S), .C(N_655), .D(N_62), .Y(i00i1_Z[2]) ); defparam \i00i1[2] .INIT=16'h0CAE; // @28:514528 CFG4 \i00i1[3] ( .A(un8_i00i1_cry_3_S), .B(un18_i00i1_cry_3_S), .C(N_655), .D(N_62), .Y(i00i1_Z[3]) ); defparam \i00i1[3] .INIT=16'h0CAE; // @28:514528 CFG4 \i00i1[4] ( .A(un8_i00i1_cry_4_S), .B(un18_i00i1_cry_4_S), .C(N_655), .D(N_62), .Y(i00i1_Z[4]) ); defparam \i00i1[4] .INIT=16'h0CAE; // @28:514528 CFG4 \i00i1[5] ( .A(un8_i00i1_cry_5_S), .B(un18_i00i1_cry_5_S), .C(N_655), .D(N_62), .Y(i00i1_Z[5]) ); defparam \i00i1[5] .INIT=16'h0CAE; // @28:514528 CFG4 \i00i1[6] ( .A(un8_i00i1_cry_6_S), .B(un18_i00i1_cry_6_S), .C(N_655), .D(N_62), .Y(i00i1_Z[6]) ); defparam \i00i1[6] .INIT=16'h0CAE; // @28:514528 CFG4 \i00i1[1] ( .A(un8_i00i1_cry_1_S), .B(un18_i00i1_cry_1_S), .C(N_655), .D(N_62), .Y(i00i1_Z[1]) ); defparam \i00i1[1] .INIT=16'h0CAE; // @28:514528 CFG4 \i00i1[7] ( .A(un8_i00i1_cry_7_S), .B(un18_i00i1_cry_7_S), .C(N_655), .D(N_62), .Y(i00i1_Z[7]) ); defparam \i00i1[7] .INIT=16'h0CAE; // @28:514528 CFG4 \i00i1[8] ( .A(un8_i00i1_cry_8_S), .B(un18_i00i1_cry_8_S), .C(N_655), .D(N_62), .Y(i00i1_Z[8]) ); defparam \i00i1[8] .INIT=16'h0CAE; // @28:514528 CFG4 \i00i1[9] ( .A(un8_i00i1_cry_9_S), .B(un18_i00i1_cry_9_S), .C(N_655), .D(N_62), .Y(i00i1_Z[9]) ); defparam \i00i1[9] .INIT=16'h0CAE; // @28:514528 CFG4 \i00i1[10] ( .A(un8_i00i1_cry_10_S), .B(un18_i00i1_cry_10_S), .C(N_655), .D(N_62), .Y(i00i1_Z[10]) ); defparam \i00i1[10] .INIT=16'h0CAE; // @28:514528 CFG4 \i00i1[11] ( .A(un8_i00i1_cry_11_S), .B(un18_i00i1_cry_11_S), .C(N_655), .D(N_62), .Y(i00i1_Z[11]) ); defparam \i00i1[11] .INIT=16'h0CAE; // @28:513955 CFG4 lI0i1_0_0 ( .A(i1iO1_1z), .B(o1iO1_1z), .C(N_686), .D(IIoO1_0), .Y(lI0i1) ); defparam lI0i1_0_0.INIT=16'h4F40; // @28:514110 CFG4 un19_IoOi1_i ( .A(iiOi1_1z), .B(OoOi1_Z), .C(N_682), .D(N_5430_tz_tz_tz_tz_tz), .Y(N_665) ); defparam un19_IoOi1_i.INIT=16'h3B33; // @28:512312 CFG3 \IoIi1[0] ( .A(N_631), .B(loIi1_Z[0]), .C(ii011_1z), .Y(IoIi1_Z[0]) ); defparam \IoIi1[0] .INIT=8'h06; // @28:512312 CFG4 \IoIi1[6] ( .A(ii011_1z), .B(loIi1_Z[6]), .C(N_631), .D(un6_IoIi1_1_cry_6_S), .Y(IoIi1_Z[6]) ); defparam \IoIi1[6] .INIT=16'h5404; // @28:512312 CFG4 \IoIi1[7] ( .A(ii011_1z), .B(loIi1_Z[7]), .C(N_631), .D(un6_IoIi1_1_cry_7_S), .Y(IoIi1_Z[7]) ); defparam \IoIi1[7] .INIT=16'h5404; // @28:512312 CFG4 \IoIi1[8] ( .A(ii011_1z), .B(loIi1_Z[8]), .C(N_631), .D(un6_IoIi1_1_cry_8_S), .Y(IoIi1_Z[8]) ); defparam \IoIi1[8] .INIT=16'h5404; // @28:512312 CFG4 \IoIi1[9] ( .A(ii011_1z), .B(loIi1_Z[9]), .C(N_631), .D(un6_IoIi1_1_cry_9_S), .Y(IoIi1_Z[9]) ); defparam \IoIi1[9] .INIT=16'h5404; // @28:512312 CFG4 \IoIi1[10] ( .A(ii011_1z), .B(loIi1_Z[10]), .C(N_631), .D(un6_IoIi1_1_cry_10_S), .Y(IoIi1_Z[10]) ); defparam \IoIi1[10] .INIT=16'h5404; // @28:512312 CFG4 \IoIi1[11] ( .A(ii011_1z), .B(loIi1_Z[11]), .C(N_631), .D(un6_IoIi1_1_cry_11_S), .Y(IoIi1_Z[11]) ); defparam \IoIi1[11] .INIT=16'h5404; // @28:512312 CFG4 \IoIi1[12] ( .A(ii011_1z), .B(loIi1_Z[12]), .C(N_631), .D(un6_IoIi1_1_cry_12_S), .Y(IoIi1_Z[12]) ); defparam \IoIi1[12] .INIT=16'h5404; // @28:514619 CFG4 I10i1 ( .A(un7_I10i1_1_Z), .B(un3_il0i1_4_0), .C(un1_I10i1_2_Z), .D(ol0i1lt15), .Y(I10i1_Z) ); defparam I10i1.INIT=16'h88B8; // @28:514168 CFG2 i1iO1_RNO ( .A(N_768), .B(OoOi1_Z), .Y(N_65_i) ); defparam i1iO1_RNO.INIT=4'h4; // @28:512255 CFG4 \un17_o1Ii1.un17_o1Ii1_c2_RNI72A3C ( .A(O0l11[7]), .B(O0l11[6]), .C(O0l11[5]), .D(un17_o1Ii1_c2), .Y(un23_o1Ii1_5) ); defparam \un17_o1Ii1.un17_o1Ii1_c2_RNI72A3C .INIT=16'h0001; // @28:512350 CFG4 \loIi1_RNO[5] ( .A(ii011_1z), .B(loIi1_Z[5]), .C(N_631), .D(un6_IoIi1_1_cry_5_S), .Y(N_661_i) ); defparam \loIi1_RNO[5] .INIT=16'h5404; // @28:512350 CFG4 \loIi1_RNO[4] ( .A(ii011_1z), .B(loIi1_Z[4]), .C(N_631), .D(un6_IoIi1_1_cry_4_S), .Y(N_660_i) ); defparam \loIi1_RNO[4] .INIT=16'h5404; // @28:512350 CFG4 \loIi1_RNO[3] ( .A(ii011_1z), .B(loIi1_Z[3]), .C(N_631), .D(un6_IoIi1_1_cry_3_S), .Y(N_659_i) ); defparam \loIi1_RNO[3] .INIT=16'h5404; // @28:512350 CFG4 \loIi1_RNO[2] ( .A(ii011_1z), .B(loIi1_Z[2]), .C(N_631), .D(un6_IoIi1_1_cry_2_S), .Y(N_658_i) ); defparam \loIi1_RNO[2] .INIT=16'h5404; // @28:512350 CFG4 \loIi1_RNO[1] ( .A(ii011_1z), .B(iiIi1lt2), .C(N_631), .D(un6_IoIi1_1_cry_1_S), .Y(N_657_i) ); defparam \loIi1_RNO[1] .INIT=16'h5404; // @28:512350 CFG4 \loIi1_RNO[15] ( .A(ii011_1z), .B(loIi1_Z[15]), .C(N_631), .D(un6_IoIi1_1_s_15_S), .Y(N_664_i) ); defparam \loIi1_RNO[15] .INIT=16'h5404; // @28:512350 CFG4 \loIi1_RNO[14] ( .A(ii011_1z), .B(loIi1_Z[14]), .C(N_631), .D(un6_IoIi1_1_cry_14_S), .Y(N_663_i) ); defparam \loIi1_RNO[14] .INIT=16'h5404; // @28:512350 CFG4 \loIi1_RNO[13] ( .A(ii011_1z), .B(loIi1_Z[13]), .C(N_631), .D(un6_IoIi1_1_cry_13_S), .Y(N_662_i) ); defparam \loIi1_RNO[13] .INIT=16'h5404; // @28:514015 CFG4 IoOi1 ( .A(N_686), .B(N_665), .C(un2_IoOi1), .D(IoOi1_RNO_Z), .Y(IoOi1_Z) ); defparam IoOi1.INIT=16'hFF73; // @28:515170 CFG4 \lO1i1_0[28] ( .A(un23_lO1i1lt15), .B(lO1i1_0_a2_4_Z[28]), .C(OO111[28]), .D(OO1i1_Z), .Y(lO1i1[28]) ); defparam \lO1i1_0[28] .INIT=16'h44F4; // @28:473213 CFG4 loOi1_RNIHBJH62 ( .A(loOi1_Z), .B(iIl0112), .C(N_122_mux), .D(N_560), .Y(oO0i1) ); defparam loOi1_RNIHBJH62.INIT=16'hA280; // @28:515398 CFG4 \o0iO1_RNO[25] ( .A(OO1i1_Z), .B(N_768), .C(OO111[25]), .D(i1iO1_1z), .Y(N_58_i) ); defparam \o0iO1_RNO[25] .INIT=16'h7250; // @28:515398 CFG4 \o0iO1_RNO[24] ( .A(OO1i1_Z), .B(N_768), .C(OO111[24]), .D(o1iO1_1z), .Y(N_467_i) ); defparam \o0iO1_RNO[24] .INIT=16'h7250; // @28:513622 CFG2 lO0i1 ( .A(oO0i1), .B(O0Ii1_Z), .Y(lO0i1_Z) ); defparam lO0i1.INIT=4'h4; // @28:513728 CFG2 iO0i1 ( .A(oO0i1), .B(O0Ii1_Z), .Y(iO0i1_Z) ); defparam iO0i1.INIT=4'h1; // @28:512228 CFG4 un6_o1Ii1_c3_RNIRCS1B ( .A(O0l11[7]), .B(O0l11[6]), .C(O0l11[5]), .D(un6_o1Ii1_c3_Z), .Y(un12_o1Ii1_6) ); defparam un6_o1Ii1_c3_RNIRCS1B.INIT=16'h0001; // @28:513778 CTSE_PECRC_1s_26s_1 CTSE_PECRC_1 ( .IIoO1({IIoO1_Z[7], IIoO1_6, IIoO1_Z[5:4], IIoO1_3, IIoO1_2, IIoO1_1, IIoO1_0}), .OIo11(OIo11[31:25]), .un4_IIo11_1z(un4_IIo11), .lOo11(lOo11_Z), .oOo11(oOo11_Z), .IOo11(IOo11_Z), .PF_IOD_CDR_C0_0_RX_CLK_R(PF_IOD_CDR_C0_0_RX_CLK_R), .OIlI1_i(OIlI1_i) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PERFN_TOP_26s_0s_0_1s */ module CTSE_PERMC_TOP_1s_26s ( oIOI1, OO111, o0iO1, Oi011, lliO1, ii1i1, N_28_0, IiI11, OiI11, ioI11, N_72, N_45_0, N_97, N_19_0, I01i1_1z, N_447, un3_oo1i1_7, iIl0112, ii1i1_2_0, II111_1z, lI111_1z, iO111_1z, I1iO1_1z, i1_i_1, oi011_1z, O0iO1_1z, ii011, l0iO1_1z, i1011, Ii011_1z, oliO1_1z, li011, PF_IOD_CDR_C0_0_RX_CLK_R, iO011_i, iliO1_1z ) ; input [46:2] oIOI1 ; input [32:0] OO111 ; output [32:0] o0iO1 ; input [7:0] Oi011 ; output [7:0] lliO1 ; input ii1i1 ; input N_28_0 ; input IiI11 ; input OiI11 ; input ioI11 ; input N_72 ; input N_45_0 ; input N_97 ; input N_19_0 ; output I01i1_1z ; input N_447 ; input un3_oo1i1_7 ; input iIl0112 ; output ii1i1_2_0 ; output II111_1z ; output lI111_1z ; output iO111_1z ; output I1iO1_1z ; output i1_i_1 ; input oi011_1z ; output O0iO1_1z ; input ii011 ; output l0iO1_1z ; input i1011 ; input Ii011_1z ; output oliO1_1z ; input li011 ; input PF_IOD_CDR_C0_0_RX_CLK_R ; input iO011_i ; output iliO1_1z ; wire ii1i1 ; wire N_28_0 ; wire IiI11 ; wire OiI11 ; wire ioI11 ; wire N_72 ; wire N_45_0 ; wire N_97 ; wire N_19_0 ; wire I01i1_1z ; wire N_447 ; wire un3_oo1i1_7 ; wire iIl0112 ; wire ii1i1_2_0 ; wire II111_1z ; wire lI111_1z ; wire iO111_1z ; wire I1iO1_1z ; wire i1_i_1 ; wire oi011_1z ; wire O0iO1_1z ; wire ii011 ; wire l0iO1_1z ; wire i1011 ; wire Ii011_1z ; wire oliO1_1z ; wire li011 ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire iO011_i ; wire iliO1_1z ; wire [0:0] un1_ii1i1_Z; wire [15:0] I0oi1_Z; wire [15:0] O0oi1_Z; wire [15:0] oIoi1_Z; wire [14:0] lIoi1_Z; wire [6:0] O1oi1_Z; wire [4:0] oI1i1_Z; wire [15:0] OIoi1_Z; wire [15:0] iOoi1_Z; wire [15:15] lIoi1; wire [15:0] O0oi1_0_Z; wire VCC ; wire GND ; wire Iooi1_Z ; wire looi1_Z ; wire oOoi1_Z ; wire o1iO1_Z ; wire lI0i1 ; wire IOoi1_Z ; wire l1oi1_Z ; wire I1oi1 ; wire iloi1_Z ; wire oloi1_Z ; wire N_35_i ; wire iO111_2_Z ; wire Oooi1_Z ; wire i1oi1_Z ; wire N_20_i ; wire N_18_i ; wire N_16_i ; wire N_14_i ; wire N_12_i ; wire N_10_i ; wire N_637_i ; wire N_598_i ; wire N_599_i ; wire N_600_i ; wire N_601_i ; wire N_602_i ; wire un11_O0oi1_cry_0_Z ; wire un11_O0oi1_cry_0_S ; wire un11_O0oi1_cry_0_Y ; wire un11_O0oi1_cry_1_Z ; wire un11_O0oi1_cry_1_S ; wire un11_O0oi1_cry_1_Y ; wire un11_O0oi1_cry_2_Z ; wire un11_O0oi1_cry_2_S ; wire un11_O0oi1_cry_2_Y ; wire un11_O0oi1_cry_3_Z ; wire un11_O0oi1_cry_3_S ; wire un11_O0oi1_cry_3_Y ; wire un11_O0oi1_cry_4_Z ; wire un11_O0oi1_cry_4_S ; wire un11_O0oi1_cry_4_Y ; wire un11_O0oi1_cry_5_Z ; wire un11_O0oi1_cry_5_S ; wire un11_O0oi1_cry_5_Y ; wire un11_O0oi1_cry_6_Z ; wire un11_O0oi1_cry_6_S ; wire un11_O0oi1_cry_6_Y ; wire un11_O0oi1_cry_7_Z ; wire un11_O0oi1_cry_7_S ; wire un11_O0oi1_cry_7_Y ; wire un11_O0oi1_cry_8_Z ; wire un11_O0oi1_cry_8_S ; wire un11_O0oi1_cry_8_Y ; wire un11_O0oi1_cry_9_Z ; wire un11_O0oi1_cry_9_S ; wire un11_O0oi1_cry_9_Y ; wire un11_O0oi1_cry_10_Z ; wire un11_O0oi1_cry_10_S ; wire un11_O0oi1_cry_10_Y ; wire un11_O0oi1_cry_11_Z ; wire un11_O0oi1_cry_11_S ; wire un11_O0oi1_cry_11_Y ; wire un11_O0oi1_cry_12_Z ; wire un11_O0oi1_cry_12_S ; wire un11_O0oi1_cry_12_Y ; wire un11_O0oi1_cry_13_Z ; wire un11_O0oi1_cry_13_S ; wire un11_O0oi1_cry_13_Y ; wire un11_O0oi1_s_15_FCO ; wire un11_O0oi1_s_15_S ; wire un11_O0oi1_s_15_Y ; wire un11_O0oi1_cry_14_Z ; wire un11_O0oi1_cry_14_S ; wire un11_O0oi1_cry_14_Y ; wire un6_i0oi1_1_s_1_4180_FCO ; wire un6_i0oi1_1_s_1_4180_S ; wire un6_i0oi1_1_s_1_4180_Y ; wire un6_i0oi1_1_cry_1_Z ; wire un6_i0oi1_1_cry_1_S ; wire un6_i0oi1_1_cry_1_Y ; wire un6_i0oi1_1_cry_2_Z ; wire un6_i0oi1_1_cry_2_S ; wire un6_i0oi1_1_cry_2_Y ; wire un6_i0oi1_1_cry_3_Z ; wire un6_i0oi1_1_cry_3_S ; wire un6_i0oi1_1_cry_3_Y ; wire un6_i0oi1_1_cry_4_Z ; wire un6_i0oi1_1_cry_4_S ; wire un6_i0oi1_1_cry_4_Y ; wire un6_i0oi1_1_s_6_FCO ; wire un6_i0oi1_1_s_6_S ; wire un6_i0oi1_1_s_6_Y ; wire un6_i0oi1_1_cry_5_Z ; wire un6_i0oi1_1_cry_5_S ; wire un6_i0oi1_1_cry_5_Y ; wire N_605 ; wire N_53 ; wire N_630 ; wire un4_IOoi1_7_1_Z ; wire un4_IOoi1_1_Z ; wire N_634 ; wire un4_IOoi1_7_Z ; wire I11i1 ; wire i01i1_Z ; wire O11i1_Z ; wire o01i1 ; wire O11i1_1_Z ; wire lI0i1_0_a2_0 ; wire Iloi1_i_0_a2_0_Z ; wire il1i1_1 ; wire N_606 ; wire N_51 ; wire N_635 ; wire I01i1_3 ; wire N_24 ; wire O11i1_2 ; wire un9_lOoi1_1_Z ; wire I1oi1_0_a2_4_Z ; wire un1_IOoi1_2_Z ; wire un1_IOoi1_1_Z ; wire un6_IOoi1_2_Z ; wire un6_IOoi1_1_Z ; wire un4_IOoi1_3_Z ; wire un4_IOoi1_2_Z ; wire un5_IOoi1_2_Z ; wire un5_IOoi1_1_Z ; wire un3_IOoi1_2_Z ; wire un3_IOoi1_1_Z ; wire un7_IOoi1_2_Z ; wire un7_IOoi1_1_Z ; wire Iloi1_i_0_4_Z ; wire un9_O0oi1_11_Z ; wire un9_O0oi1_10_Z ; wire un9_O0oi1_9_Z ; wire un9_O0oi1_8_Z ; wire lI0i1_0_a3_1_3_Z ; wire lI0i1_0_a3_1_2_Z ; wire Iloi1_i_0_a3_2_Z ; wire I01i1_1_0_Z ; wire IIoi1_11_Z ; wire IIoi1_10_Z ; wire IIoi1_9_Z ; wire IIoi1_8_Z ; wire Iloi1_i_0_a3_1_2_Z ; wire N_629 ; wire N_619 ; wire N_633 ; wire I1oi1_0_a2_3_Z ; wire un1_IOoi1_3_Z ; wire un6_IOoi1_5_Z ; wire un6_IOoi1_4_Z ; wire un5_IOoi1_5_Z ; wire un5_IOoi1_4_Z ; wire un3_IOoi1_3_Z ; wire un7_IOoi1_5_Z ; wire un7_IOoi1_4_Z ; wire Iloi1_i_0_6_Z ; wire N_222 ; wire N_616 ; wire N_618 ; wire N_607 ; wire IOoi1_0_Z ; wire Iloi1_i_0_7_Z ; wire IIoi1_Z ; wire un9_O0oi1_Z ; wire iI1i1 ; wire N_612 ; wire lI0i1_0_0_Z ; wire un1_IOoi1_6_Z ; wire lI0i1_0_a3_0_0_Z ; wire un3_IOoi1_6_Z ; wire Iloi1_i_0_8_Z ; wire un7_O0oi1_0_a2_Z ; wire N_608 ; wire N_614_2 ; wire N_22 ; wire N_89 ; wire un4_OOoi1 ; wire un5_IOoi1_Z ; wire un4_IOoi1_Z ; wire un7_IOoi1_Z ; wire un6_IOoi1_Z ; wire N_614 ; wire un9_lOoi1_Z ; wire IOoi1_4_Z ; wire IOoi1_3_Z ; // @28:516044 SLE iliO1 ( .Q(iliO1_1z), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(li011), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516008 SLE oliO1 ( .Q(oliO1_1z), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Ii011_1z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515907 SLE Iooi1 ( .Q(Iooi1_Z), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1011), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515907 SLE looi1 ( .Q(looi1_Z), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Iooi1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516116 SLE l0iO1 ( .Q(l0iO1_1z), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ii011), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516080 SLE O0iO1 ( .Q(O0iO1_1z), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oi011_1z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517896 SLE OI111 ( .Q(i1_i_1), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oOoi1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516881 SLE o1iO1 ( .Q(o1iO1_Z), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lI0i1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517036 SLE oOoi1 ( .Q(oOoi1_Z), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(un1_ii1i1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516969 SLE I1iO1 ( .Q(I1iO1_1z), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IOoi1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517855 SLE l1oi1 ( .Q(l1oi1_Z), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I1oi1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517474 SLE iloi1 ( .Q(iloi1_Z), .ADn(GND), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I1oi1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517433 SLE oloi1 ( .Q(oloi1_Z), .ADn(GND), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_35_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517625 (* cdc_synchronizer=1 *) SLE iO111 ( .Q(iO111_1z), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iO111_2_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517989 SLE lI111 ( .Q(lI111_1z), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Oooi1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517945 SLE II111 ( .Q(II111_1z), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1oi1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517574 SLE \I0oi1[14] ( .Q(I0oi1_Z[14]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O0oi1_Z[14]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517574 SLE \I0oi1[13] ( .Q(I0oi1_Z[13]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O0oi1_Z[13]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517574 SLE \I0oi1[12] ( .Q(I0oi1_Z[12]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O0oi1_Z[12]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517574 SLE \I0oi1[11] ( .Q(I0oi1_Z[11]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O0oi1_Z[11]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517574 SLE \I0oi1[10] ( .Q(I0oi1_Z[10]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O0oi1_Z[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517574 SLE \I0oi1[9] ( .Q(I0oi1_Z[9]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O0oi1_Z[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517574 SLE \I0oi1[8] ( .Q(I0oi1_Z[8]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O0oi1_Z[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517574 SLE \I0oi1[7] ( .Q(I0oi1_Z[7]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O0oi1_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517574 SLE \I0oi1[6] ( .Q(I0oi1_Z[6]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O0oi1_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517574 SLE \I0oi1[5] ( .Q(I0oi1_Z[5]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O0oi1_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517574 SLE \I0oi1[4] ( .Q(I0oi1_Z[4]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O0oi1_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517574 SLE \I0oi1[3] ( .Q(I0oi1_Z[3]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O0oi1_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517574 SLE \I0oi1[2] ( .Q(I0oi1_Z[2]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O0oi1_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517574 SLE \I0oi1[1] ( .Q(I0oi1_Z[1]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O0oi1_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517574 SLE \I0oi1[0] ( .Q(I0oi1_Z[0]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O0oi1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517299 SLE \oIoi1[1] ( .Q(oIoi1_Z[1]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIoi1_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517299 SLE \oIoi1[0] ( .Q(oIoi1_Z[0]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIoi1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517758 SLE \O1oi1[6] ( .Q(O1oi1_Z[6]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_20_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517758 SLE \O1oi1[5] ( .Q(O1oi1_Z[5]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_18_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517758 SLE \O1oi1[4] ( .Q(O1oi1_Z[4]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_16_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517758 SLE \O1oi1[3] ( .Q(O1oi1_Z[3]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_14_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517758 SLE \O1oi1[2] ( .Q(O1oi1_Z[2]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_12_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517758 SLE \O1oi1[1] ( .Q(O1oi1_Z[1]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_10_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517758 SLE \O1oi1[0] ( .Q(O1oi1_Z[0]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_637_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516297 SLE \oI1i1[4] ( .Q(oI1i1_Z[4]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_598_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516297 SLE \oI1i1[3] ( .Q(oI1i1_Z[3]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_599_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516297 SLE \oI1i1[2] ( .Q(oI1i1_Z[2]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_600_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516297 SLE \oI1i1[1] ( .Q(oI1i1_Z[1]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_601_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516297 SLE \oI1i1[0] ( .Q(oI1i1_Z[0]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_602_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517574 SLE \I0oi1[15] ( .Q(I0oi1_Z[15]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O0oi1_Z[15]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517153 SLE \OIoi1[0] ( .Q(OIoi1_Z[0]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iOoi1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517299 SLE \oIoi1[15] ( .Q(oIoi1_Z[15]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIoi1[15]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517299 SLE \oIoi1[14] ( .Q(oIoi1_Z[14]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIoi1_Z[14]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517299 SLE \oIoi1[13] ( .Q(oIoi1_Z[13]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIoi1_Z[13]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517299 SLE \oIoi1[12] ( .Q(oIoi1_Z[12]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIoi1_Z[12]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517299 SLE \oIoi1[11] ( .Q(oIoi1_Z[11]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIoi1_Z[11]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517299 SLE \oIoi1[10] ( .Q(oIoi1_Z[10]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIoi1_Z[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517299 SLE \oIoi1[9] ( .Q(oIoi1_Z[9]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIoi1_Z[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517299 SLE \oIoi1[8] ( .Q(oIoi1_Z[8]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIoi1_Z[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517299 SLE \oIoi1[7] ( .Q(oIoi1_Z[7]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIoi1_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517299 SLE \oIoi1[6] ( .Q(oIoi1_Z[6]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIoi1_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517299 SLE \oIoi1[5] ( .Q(oIoi1_Z[5]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIoi1_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517299 SLE \oIoi1[4] ( .Q(oIoi1_Z[4]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIoi1_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517299 SLE \oIoi1[3] ( .Q(oIoi1_Z[3]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIoi1_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517299 SLE \oIoi1[2] ( .Q(oIoi1_Z[2]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIoi1_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517153 SLE \OIoi1[15] ( .Q(OIoi1_Z[15]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iOoi1_Z[15]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517153 SLE \OIoi1[14] ( .Q(OIoi1_Z[14]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iOoi1_Z[14]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517153 SLE \OIoi1[13] ( .Q(OIoi1_Z[13]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iOoi1_Z[13]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517153 SLE \OIoi1[12] ( .Q(OIoi1_Z[12]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iOoi1_Z[12]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517153 SLE \OIoi1[11] ( .Q(OIoi1_Z[11]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iOoi1_Z[11]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517153 SLE \OIoi1[10] ( .Q(OIoi1_Z[10]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iOoi1_Z[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517153 SLE \OIoi1[9] ( .Q(OIoi1_Z[9]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iOoi1_Z[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517153 SLE \OIoi1[8] ( .Q(OIoi1_Z[8]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iOoi1_Z[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517153 SLE \OIoi1[7] ( .Q(OIoi1_Z[7]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iOoi1_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517153 SLE \OIoi1[6] ( .Q(OIoi1_Z[6]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iOoi1_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517153 SLE \OIoi1[5] ( .Q(OIoi1_Z[5]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iOoi1_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517153 SLE \OIoi1[4] ( .Q(OIoi1_Z[4]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iOoi1_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517153 SLE \OIoi1[3] ( .Q(OIoi1_Z[3]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iOoi1_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517153 SLE \OIoi1[2] ( .Q(OIoi1_Z[2]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iOoi1_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517153 SLE \OIoi1[1] ( .Q(OIoi1_Z[1]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iOoi1_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516152 SLE \o0iO1_Z[14] ( .Q(o0iO1[14]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO111[14]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516152 SLE \o0iO1_Z[13] ( .Q(o0iO1[13]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO111[13]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516152 SLE \o0iO1_Z[12] ( .Q(o0iO1[12]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO111[12]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516152 SLE \o0iO1_Z[11] ( .Q(o0iO1[11]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO111[11]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516152 SLE \o0iO1_Z[10] ( .Q(o0iO1[10]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO111[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516152 SLE \o0iO1_Z[9] ( .Q(o0iO1[9]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO111[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516152 SLE \o0iO1_Z[8] ( .Q(o0iO1[8]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO111[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516152 SLE \o0iO1_Z[7] ( .Q(o0iO1[7]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO111[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516152 SLE \o0iO1_Z[6] ( .Q(o0iO1[6]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO111[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516152 SLE \o0iO1_Z[5] ( .Q(o0iO1[5]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO111[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516152 SLE \o0iO1_Z[4] ( .Q(o0iO1[4]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO111[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516152 SLE \o0iO1_Z[3] ( .Q(o0iO1[3]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO111[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516152 SLE \o0iO1_Z[2] ( .Q(o0iO1[2]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO111[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516152 SLE \o0iO1_Z[1] ( .Q(o0iO1[1]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO111[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516152 SLE \o0iO1_Z[0] ( .Q(o0iO1[0]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO111[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516152 SLE \o0iO1_Z[29] ( .Q(o0iO1[29]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO111[29]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516152 SLE \o0iO1_Z[28] ( .Q(o0iO1[28]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO111[28]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516152 SLE \o0iO1_Z[27] ( .Q(o0iO1[27]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO111[27]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516152 SLE \o0iO1_Z[26] ( .Q(o0iO1[26]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO111[26]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516152 SLE \o0iO1_Z[25] ( .Q(o0iO1[25]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO111[25]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516152 SLE \o0iO1_Z[24] ( .Q(o0iO1[24]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO111[24]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516152 SLE \o0iO1_Z[23] ( .Q(o0iO1[23]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO111[23]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516152 SLE \o0iO1_Z[22] ( .Q(o0iO1[22]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO111[22]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516152 SLE \o0iO1_Z[21] ( .Q(o0iO1[21]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO111[21]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516152 SLE \o0iO1_Z[20] ( .Q(o0iO1[20]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO111[20]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516152 SLE \o0iO1_Z[19] ( .Q(o0iO1[19]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO111[19]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516152 SLE \o0iO1_Z[18] ( .Q(o0iO1[18]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO111[18]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516152 SLE \o0iO1_Z[17] ( .Q(o0iO1[17]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO111[17]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516152 SLE \o0iO1_Z[16] ( .Q(o0iO1[16]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO111[16]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516152 SLE \o0iO1_Z[15] ( .Q(o0iO1[15]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO111[15]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515957 SLE \lliO1_Z[7] ( .Q(lliO1[7]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Oi011[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515957 SLE \lliO1_Z[6] ( .Q(lliO1[6]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Oi011[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515957 SLE \lliO1_Z[5] ( .Q(lliO1[5]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Oi011[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515957 SLE \lliO1_Z[4] ( .Q(lliO1[4]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Oi011[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515957 SLE \lliO1_Z[3] ( .Q(lliO1[3]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Oi011[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515957 SLE \lliO1_Z[2] ( .Q(lliO1[2]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Oi011[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515957 SLE \lliO1_Z[1] ( .Q(lliO1[1]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Oi011[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:515957 SLE \lliO1_Z[0] ( .Q(lliO1[0]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Oi011[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516152 SLE \o0iO1_Z[32] ( .Q(o0iO1[32]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO111[32]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516152 SLE \o0iO1_Z[31] ( .Q(o0iO1[31]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO111[31]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:516152 SLE \o0iO1_Z[30] ( .Q(o0iO1[30]), .ADn(VCC), .ALn(iO011_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO111[30]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:517545 ARI1 un11_O0oi1_cry_0 ( .FCO(un11_O0oi1_cry_0_Z), .S(un11_O0oi1_cry_0_S), .Y(un11_O0oi1_cry_0_Y), .B(I0oi1_Z[0]), .C(GND), .D(GND), .A(VCC), .FCI(GND) ); defparam un11_O0oi1_cry_0.INIT=20'h65500; // @28:517545 ARI1 un11_O0oi1_cry_1 ( .FCO(un11_O0oi1_cry_1_Z), .S(un11_O0oi1_cry_1_S), .Y(un11_O0oi1_cry_1_Y), .B(I0oi1_Z[1]), .C(GND), .D(GND), .A(VCC), .FCI(un11_O0oi1_cry_0_Z) ); defparam un11_O0oi1_cry_1.INIT=20'h65500; // @28:517545 ARI1 un11_O0oi1_cry_2 ( .FCO(un11_O0oi1_cry_2_Z), .S(un11_O0oi1_cry_2_S), .Y(un11_O0oi1_cry_2_Y), .B(I0oi1_Z[2]), .C(GND), .D(GND), .A(VCC), .FCI(un11_O0oi1_cry_1_Z) ); defparam un11_O0oi1_cry_2.INIT=20'h65500; // @28:517545 ARI1 un11_O0oi1_cry_3 ( .FCO(un11_O0oi1_cry_3_Z), .S(un11_O0oi1_cry_3_S), .Y(un11_O0oi1_cry_3_Y), .B(I0oi1_Z[3]), .C(GND), .D(GND), .A(VCC), .FCI(un11_O0oi1_cry_2_Z) ); defparam un11_O0oi1_cry_3.INIT=20'h65500; // @28:517545 ARI1 un11_O0oi1_cry_4 ( .FCO(un11_O0oi1_cry_4_Z), .S(un11_O0oi1_cry_4_S), .Y(un11_O0oi1_cry_4_Y), .B(I0oi1_Z[4]), .C(GND), .D(GND), .A(VCC), .FCI(un11_O0oi1_cry_3_Z) ); defparam un11_O0oi1_cry_4.INIT=20'h65500; // @28:517545 ARI1 un11_O0oi1_cry_5 ( .FCO(un11_O0oi1_cry_5_Z), .S(un11_O0oi1_cry_5_S), .Y(un11_O0oi1_cry_5_Y), .B(I0oi1_Z[5]), .C(GND), .D(GND), .A(VCC), .FCI(un11_O0oi1_cry_4_Z) ); defparam un11_O0oi1_cry_5.INIT=20'h65500; // @28:517545 ARI1 un11_O0oi1_cry_6 ( .FCO(un11_O0oi1_cry_6_Z), .S(un11_O0oi1_cry_6_S), .Y(un11_O0oi1_cry_6_Y), .B(I0oi1_Z[6]), .C(GND), .D(GND), .A(VCC), .FCI(un11_O0oi1_cry_5_Z) ); defparam un11_O0oi1_cry_6.INIT=20'h65500; // @28:517545 ARI1 un11_O0oi1_cry_7 ( .FCO(un11_O0oi1_cry_7_Z), .S(un11_O0oi1_cry_7_S), .Y(un11_O0oi1_cry_7_Y), .B(I0oi1_Z[7]), .C(GND), .D(GND), .A(VCC), .FCI(un11_O0oi1_cry_6_Z) ); defparam un11_O0oi1_cry_7.INIT=20'h65500; // @28:517545 ARI1 un11_O0oi1_cry_8 ( .FCO(un11_O0oi1_cry_8_Z), .S(un11_O0oi1_cry_8_S), .Y(un11_O0oi1_cry_8_Y), .B(I0oi1_Z[8]), .C(GND), .D(GND), .A(VCC), .FCI(un11_O0oi1_cry_7_Z) ); defparam un11_O0oi1_cry_8.INIT=20'h65500; // @28:517545 ARI1 un11_O0oi1_cry_9 ( .FCO(un11_O0oi1_cry_9_Z), .S(un11_O0oi1_cry_9_S), .Y(un11_O0oi1_cry_9_Y), .B(I0oi1_Z[9]), .C(GND), .D(GND), .A(VCC), .FCI(un11_O0oi1_cry_8_Z) ); defparam un11_O0oi1_cry_9.INIT=20'h65500; // @28:517545 ARI1 un11_O0oi1_cry_10 ( .FCO(un11_O0oi1_cry_10_Z), .S(un11_O0oi1_cry_10_S), .Y(un11_O0oi1_cry_10_Y), .B(I0oi1_Z[10]), .C(GND), .D(GND), .A(VCC), .FCI(un11_O0oi1_cry_9_Z) ); defparam un11_O0oi1_cry_10.INIT=20'h65500; // @28:517545 ARI1 un11_O0oi1_cry_11 ( .FCO(un11_O0oi1_cry_11_Z), .S(un11_O0oi1_cry_11_S), .Y(un11_O0oi1_cry_11_Y), .B(I0oi1_Z[11]), .C(GND), .D(GND), .A(VCC), .FCI(un11_O0oi1_cry_10_Z) ); defparam un11_O0oi1_cry_11.INIT=20'h65500; // @28:517545 ARI1 un11_O0oi1_cry_12 ( .FCO(un11_O0oi1_cry_12_Z), .S(un11_O0oi1_cry_12_S), .Y(un11_O0oi1_cry_12_Y), .B(I0oi1_Z[12]), .C(GND), .D(GND), .A(VCC), .FCI(un11_O0oi1_cry_11_Z) ); defparam un11_O0oi1_cry_12.INIT=20'h65500; // @28:517545 ARI1 un11_O0oi1_cry_13 ( .FCO(un11_O0oi1_cry_13_Z), .S(un11_O0oi1_cry_13_S), .Y(un11_O0oi1_cry_13_Y), .B(I0oi1_Z[13]), .C(GND), .D(GND), .A(VCC), .FCI(un11_O0oi1_cry_12_Z) ); defparam un11_O0oi1_cry_13.INIT=20'h65500; // @28:517545 ARI1 un11_O0oi1_s_15 ( .FCO(un11_O0oi1_s_15_FCO), .S(un11_O0oi1_s_15_S), .Y(un11_O0oi1_s_15_Y), .B(I0oi1_Z[15]), .C(GND), .D(GND), .A(VCC), .FCI(un11_O0oi1_cry_14_Z) ); defparam un11_O0oi1_s_15.INIT=20'h45500; // @28:517545 ARI1 un11_O0oi1_cry_14 ( .FCO(un11_O0oi1_cry_14_Z), .S(un11_O0oi1_cry_14_S), .Y(un11_O0oi1_cry_14_Y), .B(I0oi1_Z[14]), .C(GND), .D(GND), .A(VCC), .FCI(un11_O0oi1_cry_13_Z) ); defparam un11_O0oi1_cry_14.INIT=20'h65500; // @28:517709 ARI1 un6_i0oi1_1_s_1_4180 ( .FCO(un6_i0oi1_1_s_1_4180_FCO), .S(un6_i0oi1_1_s_1_4180_S), .Y(un6_i0oi1_1_s_1_4180_Y), .B(O1oi1_Z[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam un6_i0oi1_1_s_1_4180.INIT=20'h4AA00; // @28:517709 ARI1 un6_i0oi1_1_cry_1 ( .FCO(un6_i0oi1_1_cry_1_Z), .S(un6_i0oi1_1_cry_1_S), .Y(un6_i0oi1_1_cry_1_Y), .B(O1oi1_Z[1]), .C(GND), .D(GND), .A(VCC), .FCI(un6_i0oi1_1_s_1_4180_FCO) ); defparam un6_i0oi1_1_cry_1.INIT=20'h4AA00; // @28:517709 ARI1 un6_i0oi1_1_cry_2 ( .FCO(un6_i0oi1_1_cry_2_Z), .S(un6_i0oi1_1_cry_2_S), .Y(un6_i0oi1_1_cry_2_Y), .B(O1oi1_Z[2]), .C(GND), .D(GND), .A(VCC), .FCI(un6_i0oi1_1_cry_1_Z) ); defparam un6_i0oi1_1_cry_2.INIT=20'h4AA00; // @28:517709 ARI1 un6_i0oi1_1_cry_3 ( .FCO(un6_i0oi1_1_cry_3_Z), .S(un6_i0oi1_1_cry_3_S), .Y(un6_i0oi1_1_cry_3_Y), .B(O1oi1_Z[3]), .C(GND), .D(GND), .A(VCC), .FCI(un6_i0oi1_1_cry_2_Z) ); defparam un6_i0oi1_1_cry_3.INIT=20'h4AA00; // @28:517709 ARI1 un6_i0oi1_1_cry_4 ( .FCO(un6_i0oi1_1_cry_4_Z), .S(un6_i0oi1_1_cry_4_S), .Y(un6_i0oi1_1_cry_4_Y), .B(O1oi1_Z[4]), .C(GND), .D(GND), .A(VCC), .FCI(un6_i0oi1_1_cry_3_Z) ); defparam un6_i0oi1_1_cry_4.INIT=20'h4AA00; // @28:517709 ARI1 un6_i0oi1_1_s_6 ( .FCO(un6_i0oi1_1_s_6_FCO), .S(un6_i0oi1_1_s_6_S), .Y(un6_i0oi1_1_s_6_Y), .B(O1oi1_Z[6]), .C(GND), .D(GND), .A(VCC), .FCI(un6_i0oi1_1_cry_5_Z) ); defparam un6_i0oi1_1_s_6.INIT=20'h4AA00; // @28:517709 ARI1 un6_i0oi1_1_cry_5 ( .FCO(un6_i0oi1_1_cry_5_Z), .S(un6_i0oi1_1_cry_5_S), .Y(un6_i0oi1_1_cry_5_Y), .B(O1oi1_Z[5]), .C(GND), .D(GND), .A(VCC), .FCI(un6_i0oi1_1_cry_4_Z) ); defparam un6_i0oi1_1_cry_5.INIT=20'h4AA00; // @28:516511 CFG3 i01i1_4_0_o2 ( .A(oI1i1_Z[1]), .B(N_605), .C(oI1i1_Z[2]), .Y(N_53) ); defparam i01i1_4_0_o2.INIT=8'hDF; // @28:516415 CFG4 ol1i1_0_a2 ( .A(Ii011_1z), .B(oI1i1_Z[3]), .C(oI1i1_Z[4]), .D(oI1i1_Z[0]), .Y(N_630) ); defparam ol1i1_0_a2.INIT=16'h0002; // @28:516793 CFG4 ii1i1_2_0_0_a2 ( .A(Oi011[4]), .B(Oi011[5]), .C(Oi011[1]), .D(Oi011[2]), .Y(ii1i1_2_0) ); defparam ii1i1_2_0_0_a2.INIT=16'h0001; // @28:516933 CFG4 un4_IOoi1_7 ( .A(I1iO1_1z), .B(un4_IOoi1_7_1_Z), .C(un4_IOoi1_1_Z), .D(N_634), .Y(un4_IOoi1_7_Z) ); defparam un4_IOoi1_7.INIT=16'h2000; // @28:516933 CFG4 un4_IOoi1_7_1 ( .A(oIOI1[25]), .B(oIOI1[27]), .C(Oi011[3]), .D(Oi011[1]), .Y(un4_IOoi1_7_1_Z) ); defparam un4_IOoi1_7_1.INIT=16'h7DBE; // @28:517227 CFG3 \lIoi1[6] ( .A(Oi011[6]), .B(I11i1), .C(oIoi1_Z[6]), .Y(lIoi1_Z[6]) ); defparam \lIoi1[6] .INIT=8'hB8; // @28:517081 CFG3 \iOoi1[2] ( .A(i01i1_Z), .B(OIoi1_Z[2]), .C(Oi011[2]), .Y(iOoi1_Z[2]) ); defparam \iOoi1[2] .INIT=8'hE4; // @28:517227 CFG3 \lIoi1[12] ( .A(Oi011[4]), .B(O11i1_Z), .C(oIoi1_Z[12]), .Y(lIoi1_Z[12]) ); defparam \lIoi1[12] .INIT=8'hB8; // @28:517081 CFG3 \iOoi1[15] ( .A(o01i1), .B(OIoi1_Z[15]), .C(Oi011[7]), .Y(iOoi1_Z[15]) ); defparam \iOoi1[15] .INIT=8'hE4; // @28:517227 CFG3 \lIoi1[13] ( .A(Oi011[5]), .B(O11i1_Z), .C(oIoi1_Z[13]), .Y(lIoi1_Z[13]) ); defparam \lIoi1[13] .INIT=8'hB8; // @28:517227 CFG3 \lIoi1[1] ( .A(Oi011[1]), .B(I11i1), .C(oIoi1_Z[1]), .Y(lIoi1_Z[1]) ); defparam \lIoi1[1] .INIT=8'hB8; // @28:517227 CFG3 \lIoi1[0] ( .A(Oi011[0]), .B(I11i1), .C(oIoi1_Z[0]), .Y(lIoi1_Z[0]) ); defparam \lIoi1[0] .INIT=8'hB8; // @28:517081 CFG3 \iOoi1[14] ( .A(o01i1), .B(OIoi1_Z[14]), .C(Oi011[6]), .Y(iOoi1_Z[14]) ); defparam \iOoi1[14] .INIT=8'hE4; // @28:517081 CFG3 \iOoi1[13] ( .A(o01i1), .B(OIoi1_Z[13]), .C(Oi011[5]), .Y(iOoi1_Z[13]) ); defparam \iOoi1[13] .INIT=8'hE4; // @28:517081 CFG3 \iOoi1[12] ( .A(o01i1), .B(OIoi1_Z[12]), .C(Oi011[4]), .Y(iOoi1_Z[12]) ); defparam \iOoi1[12] .INIT=8'hE4; // @28:517081 CFG3 \iOoi1[11] ( .A(o01i1), .B(OIoi1_Z[11]), .C(Oi011[3]), .Y(iOoi1_Z[11]) ); defparam \iOoi1[11] .INIT=8'hE4; // @28:517081 CFG3 \iOoi1[10] ( .A(o01i1), .B(OIoi1_Z[10]), .C(Oi011[2]), .Y(iOoi1_Z[10]) ); defparam \iOoi1[10] .INIT=8'hE4; // @28:517081 CFG3 \iOoi1[9] ( .A(o01i1), .B(OIoi1_Z[9]), .C(Oi011[1]), .Y(iOoi1_Z[9]) ); defparam \iOoi1[9] .INIT=8'hE4; // @28:517081 CFG3 \iOoi1[8] ( .A(o01i1), .B(OIoi1_Z[8]), .C(Oi011[0]), .Y(iOoi1_Z[8]) ); defparam \iOoi1[8] .INIT=8'hE4; // @28:517081 CFG3 \iOoi1[7] ( .A(i01i1_Z), .B(OIoi1_Z[7]), .C(Oi011[7]), .Y(iOoi1_Z[7]) ); defparam \iOoi1[7] .INIT=8'hE4; // @28:517081 CFG3 \iOoi1[6] ( .A(i01i1_Z), .B(OIoi1_Z[6]), .C(Oi011[6]), .Y(iOoi1_Z[6]) ); defparam \iOoi1[6] .INIT=8'hE4; // @28:517081 CFG3 \iOoi1[5] ( .A(i01i1_Z), .B(OIoi1_Z[5]), .C(Oi011[5]), .Y(iOoi1_Z[5]) ); defparam \iOoi1[5] .INIT=8'hE4; // @28:517081 CFG3 \iOoi1[4] ( .A(i01i1_Z), .B(OIoi1_Z[4]), .C(Oi011[4]), .Y(iOoi1_Z[4]) ); defparam \iOoi1[4] .INIT=8'hE4; // @28:517081 CFG3 \iOoi1[3] ( .A(i01i1_Z), .B(OIoi1_Z[3]), .C(Oi011[3]), .Y(iOoi1_Z[3]) ); defparam \iOoi1[3] .INIT=8'hE4; // @28:517081 CFG3 \iOoi1[1] ( .A(i01i1_Z), .B(OIoi1_Z[1]), .C(Oi011[1]), .Y(iOoi1_Z[1]) ); defparam \iOoi1[1] .INIT=8'hE4; // @28:517081 CFG3 \iOoi1[0] ( .A(i01i1_Z), .B(OIoi1_Z[0]), .C(Oi011[0]), .Y(iOoi1_Z[0]) ); defparam \iOoi1[0] .INIT=8'hE4; // @28:517227 CFG3 \lIoi1[2] ( .A(Oi011[2]), .B(I11i1), .C(oIoi1_Z[2]), .Y(lIoi1_Z[2]) ); defparam \lIoi1[2] .INIT=8'hB8; // @28:517227 CFG3 \lIoi1[14] ( .A(Oi011[6]), .B(O11i1_Z), .C(oIoi1_Z[14]), .Y(lIoi1_Z[14]) ); defparam \lIoi1[14] .INIT=8'hB8; // @28:517227 CFG3 \lIoi1[9] ( .A(Oi011[1]), .B(O11i1_Z), .C(oIoi1_Z[9]), .Y(lIoi1_Z[9]) ); defparam \lIoi1[9] .INIT=8'hB8; // @28:517227 CFG3 \lIoi1[10] ( .A(Oi011[2]), .B(O11i1_Z), .C(oIoi1_Z[10]), .Y(lIoi1_Z[10]) ); defparam \lIoi1[10] .INIT=8'hB8; // @28:517227 CFG3 \lIoi1[3] ( .A(Oi011[3]), .B(I11i1), .C(oIoi1_Z[3]), .Y(lIoi1_Z[3]) ); defparam \lIoi1[3] .INIT=8'hB8; // @28:517227 CFG3 \lIoi1[4] ( .A(Oi011[4]), .B(I11i1), .C(oIoi1_Z[4]), .Y(lIoi1_Z[4]) ); defparam \lIoi1[4] .INIT=8'hB8; // @28:517227 CFG3 \lIoi1[5] ( .A(Oi011[5]), .B(I11i1), .C(oIoi1_Z[5]), .Y(lIoi1_Z[5]) ); defparam \lIoi1[5] .INIT=8'hB8; // @28:517227 CFG3 \lIoi1[7] ( .A(Oi011[7]), .B(I11i1), .C(oIoi1_Z[7]), .Y(lIoi1_Z[7]) ); defparam \lIoi1[7] .INIT=8'hB8; // @28:517227 CFG3 \lIoi1[8] ( .A(Oi011[0]), .B(O11i1_Z), .C(oIoi1_Z[8]), .Y(lIoi1_Z[8]) ); defparam \lIoi1[8] .INIT=8'hB8; // @28:517227 CFG3 \lIoi1[11] ( .A(Oi011[3]), .B(O11i1_Z), .C(oIoi1_Z[11]), .Y(lIoi1_Z[11]) ); defparam \lIoi1[11] .INIT=8'hB8; // @28:516527 CFG2 O11i1_1 ( .A(oI1i1_Z[3]), .B(oI1i1_Z[0]), .Y(O11i1_1_Z) ); defparam O11i1_1.INIT=4'h1; // @28:516830 CFG2 lI0i1_0_a2_0_0 ( .A(Oi011[7]), .B(oI1i1_Z[2]), .Y(lI0i1_0_a2_0) ); defparam lI0i1_0_a2_0_0.INIT=4'h4; // @28:517402 CFG2 Iloi1_i_0_a2_0 ( .A(OO111[3]), .B(OO111[4]), .Y(Iloi1_i_0_a2_0_Z) ); defparam Iloi1_i_0_a2_0.INIT=4'h8; // @28:516431 CFG2 il1i1_0_a3_1 ( .A(oI1i1_Z[1]), .B(oI1i1_Z[2]), .Y(il1i1_1) ); defparam il1i1_0_a3_1.INIT=4'h4; // @28:516245 CFG2 \lI1i1_i_o2[2] ( .A(Ii011_1z), .B(oI1i1_Z[0]), .Y(N_605) ); defparam \lI1i1_i_o2[2] .INIT=4'h7; // @28:516447 CFG2 O01i1_i_o2 ( .A(oI1i1_Z[1]), .B(oI1i1_Z[2]), .Y(N_606) ); defparam O01i1_i_o2.INIT=4'h7; // @28:516245 CFG2 \lI1i1_i_o2[4] ( .A(oI1i1_Z[3]), .B(oI1i1_Z[4]), .Y(N_51) ); defparam \lI1i1_i_o2[4] .INIT=4'hE; // @28:516543 CFG2 I11i1_0_a2 ( .A(oI1i1_Z[3]), .B(oI1i1_Z[4]), .Y(N_635) ); defparam I11i1_0_a2.INIT=4'h4; // @28:516463 CFG2 I01i1_3_0_a2 ( .A(oI1i1_Z[0]), .B(oI1i1_Z[4]), .Y(I01i1_3) ); defparam I01i1_3_0_a2.INIT=4'h1; // @28:517698 CFG2 \i0oi1_i_o2[0] ( .A(oloi1_Z), .B(l1oi1_Z), .Y(N_24) ); defparam \i0oi1_i_o2[0] .INIT=4'hE; // @28:516399 CFG2 ll1i1_0_a2_0 ( .A(oI1i1_Z[1]), .B(oI1i1_Z[2]), .Y(N_634) ); defparam ll1i1_0_a2_0.INIT=4'h2; // @28:516527 CFG2 O11i1_2_0_a2 ( .A(oI1i1_Z[1]), .B(oI1i1_Z[2]), .Y(O11i1_2) ); defparam O11i1_2_0_a2.INIT=4'h1; // @28:517030 CFG4 un9_lOoi1_1 ( .A(oI1i1_Z[4]), .B(oI1i1_Z[2]), .C(oI1i1_Z[3]), .D(oI1i1_Z[1]), .Y(un9_lOoi1_1_Z) ); defparam un9_lOoi1_1.INIT=16'h0040; // @28:517813 CFG4 I1oi1_0_a2_4 ( .A(O1oi1_Z[5]), .B(O1oi1_Z[4]), .C(O1oi1_Z[3]), .D(O1oi1_Z[0]), .Y(I1oi1_0_a2_4_Z) ); defparam I1oi1_0_a2_4.INIT=16'h0080; // @28:516921 CFG4 un1_IOoi1_2 ( .A(oIOI1[46]), .B(oIOI1[43]), .C(Oi011[6]), .D(Oi011[3]), .Y(un1_IOoi1_2_Z) ); defparam un1_IOoi1_2.INIT=16'h8421; // @28:516921 CFG4 un1_IOoi1_1 ( .A(oIOI1[45]), .B(oIOI1[42]), .C(Oi011[5]), .D(Oi011[2]), .Y(un1_IOoi1_1_Z) ); defparam un1_IOoi1_1.INIT=16'h8421; // @28:516945 CFG4 un6_IOoi1_2 ( .A(oIOI1[14]), .B(oIOI1[15]), .C(Oi011[7]), .D(Oi011[6]), .Y(un6_IOoi1_2_Z) ); defparam un6_IOoi1_2.INIT=16'h8241; // @28:516945 CFG4 un6_IOoi1_1 ( .A(oIOI1[12]), .B(oIOI1[10]), .C(Oi011[4]), .D(Oi011[2]), .Y(un6_IOoi1_1_Z) ); defparam un6_IOoi1_1.INIT=16'h8421; // @28:516933 CFG4 un4_IOoi1_3 ( .A(oIOI1[30]), .B(oIOI1[31]), .C(Oi011[7]), .D(Oi011[6]), .Y(un4_IOoi1_3_Z) ); defparam un4_IOoi1_3.INIT=16'h8241; // @28:516933 CFG4 un4_IOoi1_2 ( .A(oIOI1[29]), .B(oIOI1[26]), .C(Oi011[5]), .D(Oi011[2]), .Y(un4_IOoi1_2_Z) ); defparam un4_IOoi1_2.INIT=16'h8421; // @28:516933 CFG4 un4_IOoi1_1 ( .A(oIOI1[28]), .B(oIOI1[24]), .C(Oi011[4]), .D(Oi011[0]), .Y(un4_IOoi1_1_Z) ); defparam un4_IOoi1_1.INIT=16'h8421; // @28:516939 CFG4 un5_IOoi1_2 ( .A(oIOI1[22]), .B(oIOI1[23]), .C(Oi011[7]), .D(Oi011[6]), .Y(un5_IOoi1_2_Z) ); defparam un5_IOoi1_2.INIT=16'h8241; // @28:516939 CFG4 un5_IOoi1_1 ( .A(oIOI1[21]), .B(oIOI1[20]), .C(Oi011[5]), .D(Oi011[4]), .Y(un5_IOoi1_1_Z) ); defparam un5_IOoi1_1.INIT=16'h8421; // @28:516927 CFG4 un3_IOoi1_2 ( .A(oIOI1[38]), .B(oIOI1[39]), .C(Oi011[7]), .D(Oi011[6]), .Y(un3_IOoi1_2_Z) ); defparam un3_IOoi1_2.INIT=16'h8241; // @28:516927 CFG4 un3_IOoi1_1 ( .A(oIOI1[37]), .B(oIOI1[36]), .C(Oi011[5]), .D(Oi011[4]), .Y(un3_IOoi1_1_Z) ); defparam un3_IOoi1_1.INIT=16'h8421; // @28:516951 CFG4 un7_IOoi1_2 ( .A(oIOI1[6]), .B(oIOI1[7]), .C(Oi011[7]), .D(Oi011[6]), .Y(un7_IOoi1_2_Z) ); defparam un7_IOoi1_2.INIT=16'h8241; // @28:516951 CFG4 un7_IOoi1_1 ( .A(oIOI1[4]), .B(oIOI1[2]), .C(Oi011[4]), .D(Oi011[2]), .Y(un7_IOoi1_1_Z) ); defparam un7_IOoi1_1.INIT=16'h8421; // @28:517402 CFG4 Iloi1_i_0_4 ( .A(OO111[14]), .B(OO111[13]), .C(OO111[12]), .D(II111_1z), .Y(Iloi1_i_0_4_Z) ); defparam Iloi1_i_0_4.INIT=16'hFEFF; // @28:517541 CFG4 un9_O0oi1_11 ( .A(I0oi1_Z[7]), .B(I0oi1_Z[6]), .C(I0oi1_Z[5]), .D(I0oi1_Z[0]), .Y(un9_O0oi1_11_Z) ); defparam un9_O0oi1_11.INIT=16'hFFFE; // @28:517541 CFG4 un9_O0oi1_10 ( .A(I0oi1_Z[4]), .B(I0oi1_Z[3]), .C(I0oi1_Z[2]), .D(I0oi1_Z[1]), .Y(un9_O0oi1_10_Z) ); defparam un9_O0oi1_10.INIT=16'hFFFE; // @28:517541 CFG4 un9_O0oi1_9 ( .A(I0oi1_Z[14]), .B(I0oi1_Z[13]), .C(I0oi1_Z[12]), .D(I0oi1_Z[8]), .Y(un9_O0oi1_9_Z) ); defparam un9_O0oi1_9.INIT=16'hFFFE; // @28:517541 CFG4 un9_O0oi1_8 ( .A(I0oi1_Z[15]), .B(I0oi1_Z[11]), .C(I0oi1_Z[10]), .D(I0oi1_Z[9]), .Y(un9_O0oi1_8_Z) ); defparam un9_O0oi1_8.INIT=16'hFFFE; // @28:516830 CFG4 lI0i1_0_a3_1_3 ( .A(Oi011[0]), .B(o1iO1_Z), .C(Oi011[3]), .D(Oi011[7]), .Y(lI0i1_0_a3_1_3_Z) ); defparam lI0i1_0_a3_1_3.INIT=16'h0400; // @28:516830 CFG4 lI0i1_0_a3_1_2 ( .A(oI1i1_Z[0]), .B(oI1i1_Z[1]), .C(Oi011[1]), .D(Oi011[6]), .Y(lI0i1_0_a3_1_2_Z) ); defparam lI0i1_0_a3_1_2.INIT=16'h4000; // @28:517402 CFG4 Iloi1_i_0_a3_2 ( .A(OO111[6]), .B(OO111[10]), .C(OO111[8]), .D(OO111[7]), .Y(Iloi1_i_0_a3_2_Z) ); defparam Iloi1_i_0_a3_2.INIT=16'h8000; // @28:516463 CFG4 I01i1_1_0 ( .A(Ii011_1z), .B(oI1i1_Z[2]), .C(oI1i1_Z[3]), .D(oI1i1_Z[1]), .Y(I01i1_1_0_Z) ); defparam I01i1_1_0.INIT=16'h0080; // @28:517207 CFG4 IIoi1_11 ( .A(OIoi1_Z[7]), .B(OIoi1_Z[6]), .C(OIoi1_Z[5]), .D(OIoi1_Z[4]), .Y(IIoi1_11_Z) ); defparam IIoi1_11.INIT=16'h0001; // @28:517207 CFG4 IIoi1_10 ( .A(OIoi1_Z[3]), .B(OIoi1_Z[2]), .C(OIoi1_Z[1]), .D(OIoi1_Z[0]), .Y(IIoi1_10_Z) ); defparam IIoi1_10.INIT=16'h0100; // @28:517207 CFG4 IIoi1_9 ( .A(OIoi1_Z[15]), .B(OIoi1_Z[14]), .C(OIoi1_Z[13]), .D(OIoi1_Z[12]), .Y(IIoi1_9_Z) ); defparam IIoi1_9.INIT=16'h0001; // @28:517207 CFG4 IIoi1_8 ( .A(OIoi1_Z[11]), .B(OIoi1_Z[10]), .C(OIoi1_Z[9]), .D(OIoi1_Z[8]), .Y(IIoi1_8_Z) ); defparam IIoi1_8.INIT=16'h0001; // @28:517402 CFG3 Iloi1_i_0_a3_1_2 ( .A(OO111[6]), .B(OO111[10]), .C(OO111[8]), .Y(Iloi1_i_0_a3_1_2_Z) ); defparam Iloi1_i_0_a3_1_2.INIT=8'h01; // @28:516830 CFG3 lI0i1_0_a2_1 ( .A(Oi011[5]), .B(Oi011[4]), .C(Oi011[2]), .Y(N_629) ); defparam lI0i1_0_a2_1.INIT=8'h01; // @28:516447 CFG2 O01i1_i_a3 ( .A(N_606), .B(N_51), .Y(N_619) ); defparam O01i1_i_a3.INIT=4'h2; // @28:516399 CFG2 ll1i1_0_a2 ( .A(N_605), .B(N_51), .Y(N_633) ); defparam ll1i1_0_a2.INIT=4'h1; // @28:517519 CFG4 \O0oi1_0[2] ( .A(I0oi1_Z[2]), .B(oIoi1_Z[2]), .C(oloi1_Z), .D(iloi1_Z), .Y(O0oi1_0_Z[2]) ); defparam \O0oi1_0[2] .INIT=16'hC0CA; // @28:517519 CFG4 \O0oi1_0[15] ( .A(I0oi1_Z[15]), .B(oIoi1_Z[15]), .C(oloi1_Z), .D(iloi1_Z), .Y(O0oi1_0_Z[15]) ); defparam \O0oi1_0[15] .INIT=16'hC0CA; // @28:517519 CFG4 \O0oi1_0[14] ( .A(I0oi1_Z[14]), .B(oIoi1_Z[14]), .C(oloi1_Z), .D(iloi1_Z), .Y(O0oi1_0_Z[14]) ); defparam \O0oi1_0[14] .INIT=16'hC0CA; // @28:517519 CFG4 \O0oi1_0[3] ( .A(I0oi1_Z[3]), .B(oIoi1_Z[3]), .C(oloi1_Z), .D(iloi1_Z), .Y(O0oi1_0_Z[3]) ); defparam \O0oi1_0[3] .INIT=16'hC0CA; // @28:517519 CFG4 \O0oi1_0[0] ( .A(I0oi1_Z[0]), .B(oIoi1_Z[0]), .C(oloi1_Z), .D(iloi1_Z), .Y(O0oi1_0_Z[0]) ); defparam \O0oi1_0[0] .INIT=16'hC0CA; // @28:517519 CFG4 \O0oi1_0[1] ( .A(I0oi1_Z[1]), .B(oIoi1_Z[1]), .C(oloi1_Z), .D(iloi1_Z), .Y(O0oi1_0_Z[1]) ); defparam \O0oi1_0[1] .INIT=16'hC0CA; // @28:517519 CFG4 \O0oi1_0[8] ( .A(I0oi1_Z[8]), .B(oIoi1_Z[8]), .C(oloi1_Z), .D(iloi1_Z), .Y(O0oi1_0_Z[8]) ); defparam \O0oi1_0[8] .INIT=16'hC0CA; // @28:517519 CFG4 \O0oi1_0[12] ( .A(I0oi1_Z[12]), .B(oIoi1_Z[12]), .C(oloi1_Z), .D(iloi1_Z), .Y(O0oi1_0_Z[12]) ); defparam \O0oi1_0[12] .INIT=16'hC0CA; // @28:517519 CFG4 \O0oi1_0[7] ( .A(I0oi1_Z[7]), .B(oIoi1_Z[7]), .C(oloi1_Z), .D(iloi1_Z), .Y(O0oi1_0_Z[7]) ); defparam \O0oi1_0[7] .INIT=16'hC0CA; // @28:517519 CFG4 \O0oi1_0[13] ( .A(I0oi1_Z[13]), .B(oIoi1_Z[13]), .C(oloi1_Z), .D(iloi1_Z), .Y(O0oi1_0_Z[13]) ); defparam \O0oi1_0[13] .INIT=16'hC0CA; // @28:517519 CFG4 \O0oi1_0[10] ( .A(I0oi1_Z[10]), .B(oIoi1_Z[10]), .C(oloi1_Z), .D(iloi1_Z), .Y(O0oi1_0_Z[10]) ); defparam \O0oi1_0[10] .INIT=16'hC0CA; // @28:517519 CFG4 \O0oi1_0[5] ( .A(I0oi1_Z[5]), .B(oIoi1_Z[5]), .C(oloi1_Z), .D(iloi1_Z), .Y(O0oi1_0_Z[5]) ); defparam \O0oi1_0[5] .INIT=16'hC0CA; // @28:517519 CFG4 \O0oi1_0[11] ( .A(I0oi1_Z[11]), .B(oIoi1_Z[11]), .C(oloi1_Z), .D(iloi1_Z), .Y(O0oi1_0_Z[11]) ); defparam \O0oi1_0[11] .INIT=16'hC0CA; // @28:517519 CFG4 \O0oi1_0[6] ( .A(I0oi1_Z[6]), .B(oIoi1_Z[6]), .C(oloi1_Z), .D(iloi1_Z), .Y(O0oi1_0_Z[6]) ); defparam \O0oi1_0[6] .INIT=16'hC0CA; // @28:517519 CFG4 \O0oi1_0[4] ( .A(I0oi1_Z[4]), .B(oIoi1_Z[4]), .C(oloi1_Z), .D(iloi1_Z), .Y(O0oi1_0_Z[4]) ); defparam \O0oi1_0[4] .INIT=16'hC0CA; // @28:517519 CFG4 \O0oi1_0[9] ( .A(I0oi1_Z[9]), .B(oIoi1_Z[9]), .C(oloi1_Z), .D(iloi1_Z), .Y(O0oi1_0_Z[9]) ); defparam \O0oi1_0[9] .INIT=16'hC0CA; // @28:517813 CFG4 I1oi1_0_a2_3 ( .A(O1oi1_Z[2]), .B(O1oi1_Z[1]), .C(iIl0112), .D(O1oi1_Z[6]), .Y(I1oi1_0_a2_3_Z) ); defparam I1oi1_0_a2_3.INIT=16'h0880; // @28:516921 CFG4 un1_IOoi1_3 ( .A(oIOI1[44]), .B(I1iO1_1z), .C(Oi011[4]), .D(un3_oo1i1_7), .Y(un1_IOoi1_3_Z) ); defparam un1_IOoi1_3.INIT=16'h0021; // @28:516945 CFG4 un6_IOoi1_5 ( .A(il1i1_1), .B(un6_IOoi1_2_Z), .C(oIOI1[11]), .D(Oi011[3]), .Y(un6_IOoi1_5_Z) ); defparam un6_IOoi1_5.INIT=16'h8008; // @28:516945 CFG4 un6_IOoi1_4 ( .A(oIOI1[13]), .B(I1iO1_1z), .C(Oi011[5]), .D(un6_IOoi1_1_Z), .Y(un6_IOoi1_4_Z) ); defparam un6_IOoi1_4.INIT=16'h8400; // @28:516939 CFG4 un5_IOoi1_5 ( .A(un5_IOoi1_2_Z), .B(N_634), .C(oIOI1[19]), .D(Oi011[3]), .Y(un5_IOoi1_5_Z) ); defparam un5_IOoi1_5.INIT=16'h8008; // @28:516939 CFG4 un5_IOoi1_4 ( .A(oIOI1[18]), .B(I1iO1_1z), .C(Oi011[2]), .D(un5_IOoi1_1_Z), .Y(un5_IOoi1_4_Z) ); defparam un5_IOoi1_4.INIT=16'h8400; // @28:516927 CFG4 un3_IOoi1_3 ( .A(oIOI1[35]), .B(I1iO1_1z), .C(Oi011[3]), .D(N_447), .Y(un3_IOoi1_3_Z) ); defparam un3_IOoi1_3.INIT=16'h0084; // @28:516951 CFG4 un7_IOoi1_5 ( .A(il1i1_1), .B(un7_IOoi1_2_Z), .C(oIOI1[3]), .D(Oi011[3]), .Y(un7_IOoi1_5_Z) ); defparam un7_IOoi1_5.INIT=16'h8008; // @28:516951 CFG4 un7_IOoi1_4 ( .A(oIOI1[5]), .B(I1iO1_1z), .C(Oi011[5]), .D(un7_IOoi1_1_Z), .Y(un7_IOoi1_4_Z) ); defparam un7_IOoi1_4.INIT=16'h8400; // @28:517402 CFG4 Iloi1_i_0_6 ( .A(Iloi1_i_0_4_Z), .B(OO111[23]), .C(OO111[15]), .D(OO111[11]), .Y(Iloi1_i_0_6_Z) ); defparam Iloi1_i_0_6.INIT=16'hFFFB; // @28:517402 CFG4 Iloi1_i_0_a2 ( .A(OO111[2]), .B(OO111[1]), .C(OO111[0]), .D(Iloi1_i_0_a2_0_Z), .Y(N_222) ); defparam Iloi1_i_0_a2.INIT=16'hA800; // @28:516495 CFG4 o01i1_0_a3 ( .A(I01i1_3), .B(N_606), .C(Ii011_1z), .D(oI1i1_Z[3]), .Y(o01i1) ); defparam o01i1_0_a3.INIT=16'h2000; // @28:517227 CFG4 \lIoi1_0_a3_1[15] ( .A(oIoi1_Z[15]), .B(N_635), .C(O11i1_2), .D(N_605), .Y(N_616) ); defparam \lIoi1_0_a3_1[15] .INIT=16'h0080; // @28:516463 CFG2 I01i1 ( .A(I01i1_1_0_Z), .B(I01i1_3), .Y(I01i1_1z) ); defparam I01i1.INIT=4'h8; // @28:516511 CFG3 i01i1 ( .A(oI1i1_Z[3]), .B(N_53), .C(oI1i1_Z[4]), .Y(i01i1_Z) ); defparam i01i1.INIT=8'h02; // @28:516543 CFG3 I11i1_0_a3 ( .A(N_605), .B(N_635), .C(O11i1_2), .Y(I11i1) ); defparam I11i1_0_a3.INIT=8'h40; // @28:516245 CFG3 \lI1i1_i_a3[0] ( .A(N_634), .B(oI1i1_Z[0]), .C(N_635), .Y(N_618) ); defparam \lI1i1_i_a3[0] .INIT=8'h20; // @28:516527 CFG4 O11i1 ( .A(oI1i1_Z[4]), .B(Ii011_1z), .C(O11i1_1_Z), .D(O11i1_2), .Y(O11i1_Z) ); defparam O11i1.INIT=16'h8000; // @28:516830 CFG3 lI0i1_0_o2_2 ( .A(Oi011[7]), .B(O11i1_2), .C(oI1i1_Z[1]), .Y(N_607) ); defparam lI0i1_0_o2_2.INIT=8'hD8; // @28:516921 CFG4 IOoi1_0 ( .A(I1iO1_1z), .B(N_619), .C(l0iO1_1z), .D(Ii011_1z), .Y(IOoi1_0_Z) ); defparam IOoi1_0.INIT=16'h220A; // @28:517402 CFG4 Iloi1_i_0_7 ( .A(Iloi1_i_0_6_Z), .B(ii011), .C(OO111[9]), .D(OO111[10]), .Y(Iloi1_i_0_7_Z) ); defparam Iloi1_i_0_7.INIT=16'hFBBB; // @28:517207 CFG4 IIoi1 ( .A(IIoi1_11_Z), .B(IIoi1_10_Z), .C(IIoi1_8_Z), .D(IIoi1_9_Z), .Y(IIoi1_Z) ); defparam IIoi1.INIT=16'h8000; // @28:517541 CFG4 un9_O0oi1 ( .A(un9_O0oi1_8_Z), .B(un9_O0oi1_11_Z), .C(un9_O0oi1_10_Z), .D(un9_O0oi1_9_Z), .Y(un9_O0oi1_Z) ); defparam un9_O0oi1.INIT=16'hFFFE; // @28:516351 CFG2 iI1i1_0_a2 ( .A(N_630), .B(O11i1_2), .Y(iI1i1) ); defparam iI1i1_0_a2.INIT=4'h8; // @28:516830 CFG4 lI0i1_0_a3 ( .A(o1iO1_Z), .B(Ii011_1z), .C(N_51), .D(N_606), .Y(N_612) ); defparam lI0i1_0_a3.INIT=16'hA2AA; // @28:516297 CFG3 \oI1i1_RNO[1] ( .A(N_605), .B(oI1i1_Z[1]), .C(ii011), .Y(N_601_i) ); defparam \oI1i1_RNO[1] .INIT=8'h09; // @28:516830 CFG4 lI0i1_0_0 ( .A(lI0i1_0_a3_1_3_Z), .B(N_612), .C(N_629), .D(lI0i1_0_a3_1_2_Z), .Y(lI0i1_0_0_Z) ); defparam lI0i1_0_0.INIT=16'hECCC; // @28:516921 CFG4 un1_IOoi1_6 ( .A(un1_IOoi1_1_Z), .B(un1_IOoi1_2_Z), .C(un1_IOoi1_3_Z), .D(N_19_0), .Y(un1_IOoi1_6_Z) ); defparam un1_IOoi1_6.INIT=16'h0080; // @28:516830 CFG4 lI0i1_0_a3_0_0 ( .A(Oi011[6]), .B(o1iO1_Z), .C(ii1i1_2_0), .D(Oi011[3]), .Y(lI0i1_0_a3_0_0_Z) ); defparam lI0i1_0_a3_0_0.INIT=16'h0040; // @28:516927 CFG4 un3_IOoi1_6 ( .A(un3_IOoi1_3_Z), .B(O11i1_2), .C(un3_IOoi1_1_Z), .D(un3_IOoi1_2_Z), .Y(un3_IOoi1_6_Z) ); defparam un3_IOoi1_6.INIT=16'h8000; // @28:517402 CFG4 Iloi1_i_0_8 ( .A(OO111[9]), .B(OO111[7]), .C(Iloi1_i_0_a3_1_2_Z), .D(Iloi1_i_0_7_Z), .Y(Iloi1_i_0_8_Z) ); defparam Iloi1_i_0_8.INIT=16'hFF10; // @28:517354 CFG4 i1oi1 ( .A(o1iO1_Z), .B(oOoi1_Z), .C(IIoi1_Z), .D(I1iO1_1z), .Y(i1oi1_Z) ); defparam i1oi1.INIT=16'hC080; // @28:517536 CFG3 un7_O0oi1_0_a2 ( .A(iloi1_Z), .B(oloi1_Z), .C(un9_O0oi1_Z), .Y(un7_O0oi1_0_a2_Z) ); defparam un7_O0oi1_0_a2.INIT=8'h20; // @28:516830 CFG4 lI0i1_0_o2 ( .A(oI1i1_Z[0]), .B(Oi011[0]), .C(lI0i1_0_a2_0), .D(N_607), .Y(N_608) ); defparam lI0i1_0_o2.INIT=16'hB290; // @28:516830 CFG3 lI0i1_0_a3_2_2 ( .A(Oi011[7]), .B(ii1i1_2_0), .C(Oi011[6]), .Y(N_614_2) ); defparam lI0i1_0_a3_2_2.INIT=8'h04; // @28:517813 CFG2 I1oi1_0_o4 ( .A(un9_O0oi1_Z), .B(looi1_Z), .Y(N_22) ); defparam I1oi1_0_o4.INIT=4'h7; // @28:517227 CFG3 \lIoi1_0_a3[15] ( .A(O11i1_Z), .B(oIoi1_Z[15]), .C(I11i1), .Y(N_89) ); defparam \lIoi1_0_a3[15] .INIT=8'h04; // @28:517984 CFG2 Oooi1 ( .A(IIoi1_Z), .B(oOoi1_Z), .Y(Oooi1_Z) ); defparam Oooi1.INIT=4'h4; // @28:516297 CFG3 \oI1i1_RNO[3] ( .A(N_53), .B(oI1i1_Z[3]), .C(ii011), .Y(N_599_i) ); defparam \oI1i1_RNO[3] .INIT=8'h09; // @28:516297 CFG4 \oI1i1_RNO[2] ( .A(oI1i1_Z[2]), .B(oI1i1_Z[1]), .C(ii011), .D(N_605), .Y(N_600_i) ); defparam \oI1i1_RNO[2] .INIT=16'h0A06; // @28:516297 CFG4 \oI1i1_RNO[0] ( .A(Ii011_1z), .B(oI1i1_Z[0]), .C(N_618), .D(ii011), .Y(N_602_i) ); defparam \oI1i1_RNO[0] .INIT=16'h0006; // @28:516814 CFG3 un4_OOoi1_0_a3 ( .A(Oi011[3]), .B(N_614_2), .C(Oi011[0]), .Y(un4_OOoi1) ); defparam un4_OOoi1_0_a3.INIT=8'h08; // @28:516939 CFG4 un5_IOoi1 ( .A(un5_IOoi1_5_Z), .B(un5_IOoi1_4_Z), .C(N_97), .D(N_633), .Y(un5_IOoi1_Z) ); defparam un5_IOoi1.INIT=16'h0800; // @28:516933 CFG4 un4_IOoi1 ( .A(un4_IOoi1_3_Z), .B(un4_IOoi1_2_Z), .C(un4_IOoi1_7_Z), .D(N_630), .Y(un4_IOoi1_Z) ); defparam un4_IOoi1.INIT=16'h8000; // @28:516951 CFG4 un7_IOoi1 ( .A(un7_IOoi1_5_Z), .B(un7_IOoi1_4_Z), .C(N_633), .D(N_45_0), .Y(un7_IOoi1_Z) ); defparam un7_IOoi1.INIT=16'h0080; // @28:516945 CFG4 un6_IOoi1 ( .A(un6_IOoi1_5_Z), .B(un6_IOoi1_4_Z), .C(N_630), .D(N_72), .Y(un6_IOoi1_Z) ); defparam un6_IOoi1.INIT=16'h0080; // @28:516830 CFG4 lI0i1_0_a3_2 ( .A(Oi011[0]), .B(Oi011[3]), .C(iI1i1), .D(N_614_2), .Y(N_614) ); defparam lI0i1_0_a3_2.INIT=16'h2000; // @28:517227 CFG4 \lIoi1_0[15] ( .A(N_616), .B(Oi011[7]), .C(N_89), .D(O11i1_Z), .Y(lIoi1[15]) ); defparam \lIoi1_0[15] .INIT=16'hFEFA; // @28:517659 CFG3 iO111_2 ( .A(ioI11), .B(OiI11), .C(un9_O0oi1_Z), .Y(iO111_2_Z) ); defparam iO111_2.INIT=8'hEC; // @28:516297 CFG4 \oI1i1_RNO[4] ( .A(oI1i1_Z[4]), .B(oI1i1_Z[3]), .C(ii011), .D(N_53), .Y(N_598_i) ); defparam \oI1i1_RNO[4] .INIT=16'h0A06; // @28:517030 CFG3 un9_lOoi1 ( .A(N_605), .B(un4_OOoi1), .C(un9_lOoi1_1_Z), .Y(un9_lOoi1_Z) ); defparam un9_lOoi1.INIT=8'h10; // @28:517519 CFG3 \O0oi1[9] ( .A(un7_O0oi1_0_a2_Z), .B(O0oi1_0_Z[9]), .C(un11_O0oi1_cry_9_S), .Y(O0oi1_Z[9]) ); defparam \O0oi1[9] .INIT=8'hEC; // @28:517519 CFG3 \O0oi1[10] ( .A(un7_O0oi1_0_a2_Z), .B(O0oi1_0_Z[10]), .C(un11_O0oi1_cry_10_S), .Y(O0oi1_Z[10]) ); defparam \O0oi1[10] .INIT=8'hEC; // @28:517519 CFG3 \O0oi1[11] ( .A(un7_O0oi1_0_a2_Z), .B(O0oi1_0_Z[11]), .C(un11_O0oi1_cry_11_S), .Y(O0oi1_Z[11]) ); defparam \O0oi1[11] .INIT=8'hEC; // @28:517519 CFG3 \O0oi1[12] ( .A(un7_O0oi1_0_a2_Z), .B(O0oi1_0_Z[12]), .C(un11_O0oi1_cry_12_S), .Y(O0oi1_Z[12]) ); defparam \O0oi1[12] .INIT=8'hEC; // @28:517519 CFG3 \O0oi1[8] ( .A(un7_O0oi1_0_a2_Z), .B(O0oi1_0_Z[8]), .C(un11_O0oi1_cry_8_S), .Y(O0oi1_Z[8]) ); defparam \O0oi1[8] .INIT=8'hEC; // @28:517519 CFG3 \O0oi1[7] ( .A(un7_O0oi1_0_a2_Z), .B(O0oi1_0_Z[7]), .C(un11_O0oi1_cry_7_S), .Y(O0oi1_Z[7]) ); defparam \O0oi1[7] .INIT=8'hEC; // @28:517519 CFG3 \O0oi1[6] ( .A(un7_O0oi1_0_a2_Z), .B(O0oi1_0_Z[6]), .C(un11_O0oi1_cry_6_S), .Y(O0oi1_Z[6]) ); defparam \O0oi1[6] .INIT=8'hEC; // @28:517519 CFG3 \O0oi1[5] ( .A(un7_O0oi1_0_a2_Z), .B(O0oi1_0_Z[5]), .C(un11_O0oi1_cry_5_S), .Y(O0oi1_Z[5]) ); defparam \O0oi1[5] .INIT=8'hEC; // @28:517519 CFG3 \O0oi1[4] ( .A(un7_O0oi1_0_a2_Z), .B(O0oi1_0_Z[4]), .C(un11_O0oi1_cry_4_S), .Y(O0oi1_Z[4]) ); defparam \O0oi1[4] .INIT=8'hEC; // @28:517519 CFG3 \O0oi1[3] ( .A(un7_O0oi1_0_a2_Z), .B(O0oi1_0_Z[3]), .C(un11_O0oi1_cry_3_S), .Y(O0oi1_Z[3]) ); defparam \O0oi1[3] .INIT=8'hEC; // @28:517519 CFG3 \O0oi1[2] ( .A(un7_O0oi1_0_a2_Z), .B(O0oi1_0_Z[2]), .C(un11_O0oi1_cry_2_S), .Y(O0oi1_Z[2]) ); defparam \O0oi1[2] .INIT=8'hEC; // @28:517519 CFG3 \O0oi1[1] ( .A(un7_O0oi1_0_a2_Z), .B(O0oi1_0_Z[1]), .C(un11_O0oi1_cry_1_S), .Y(O0oi1_Z[1]) ); defparam \O0oi1[1] .INIT=8'hEC; // @28:517519 CFG3 \O0oi1[0] ( .A(I0oi1_Z[0]), .B(O0oi1_0_Z[0]), .C(un7_O0oi1_0_a2_Z), .Y(O0oi1_Z[0]) ); defparam \O0oi1[0] .INIT=8'hDC; // @28:517519 CFG3 \O0oi1[15] ( .A(un7_O0oi1_0_a2_Z), .B(O0oi1_0_Z[15]), .C(un11_O0oi1_s_15_S), .Y(O0oi1_Z[15]) ); defparam \O0oi1[15] .INIT=8'hEC; // @28:517519 CFG3 \O0oi1[13] ( .A(un7_O0oi1_0_a2_Z), .B(O0oi1_0_Z[13]), .C(un11_O0oi1_cry_13_S), .Y(O0oi1_Z[13]) ); defparam \O0oi1[13] .INIT=8'hEC; // @28:517519 CFG3 \O0oi1[14] ( .A(un7_O0oi1_0_a2_Z), .B(O0oi1_0_Z[14]), .C(un11_O0oi1_cry_14_S), .Y(O0oi1_Z[14]) ); defparam \O0oi1[14] .INIT=8'hEC; // @28:517813 CFG4 I1oi1_0 ( .A(I1oi1_0_a2_4_Z), .B(IiI11), .C(N_22), .D(I1oi1_0_a2_3_Z), .Y(I1oi1) ); defparam I1oi1_0.INIT=16'hCECC; // @28:517433 CFG4 oloi1_RNO ( .A(OO111[5]), .B(N_222), .C(Iloi1_i_0_a3_2_Z), .D(Iloi1_i_0_8_Z), .Y(N_35_i) ); defparam oloi1_RNO.INIT=16'h001F; // @28:516921 CFG4 IOoi1_4 ( .A(IOoi1_0_Z), .B(un4_IOoi1_Z), .C(un5_IOoi1_Z), .D(un7_IOoi1_Z), .Y(IOoi1_4_Z) ); defparam IOoi1_4.INIT=16'hFFFE; // @28:516921 CFG4 IOoi1_3 ( .A(N_28_0), .B(un6_IOoi1_Z), .C(un3_IOoi1_6_Z), .D(N_633), .Y(IOoi1_3_Z) ); defparam IOoi1_3.INIT=16'hDCCC; // @28:516830 CFG4 lI0i1_0 ( .A(lI0i1_0_0_Z), .B(lI0i1_0_a3_0_0_Z), .C(N_614), .D(N_608), .Y(lI0i1) ); defparam lI0i1_0.INIT=16'hFEFA; // @28:517758 CFG3 \O1oi1_RNO[0] ( .A(N_22), .B(O1oi1_Z[0]), .C(N_24), .Y(N_637_i) ); defparam \O1oi1_RNO[0] .INIT=8'h09; // @28:517758 CFG4 \O1oi1_RNO[6] ( .A(N_24), .B(N_22), .C(O1oi1_Z[6]), .D(un6_i0oi1_1_s_6_S), .Y(N_20_i) ); defparam \O1oi1_RNO[6] .INIT=16'h5140; // @28:517758 CFG4 \O1oi1_RNO[5] ( .A(N_24), .B(N_22), .C(O1oi1_Z[5]), .D(un6_i0oi1_1_cry_5_S), .Y(N_18_i) ); defparam \O1oi1_RNO[5] .INIT=16'h5140; // @28:517758 CFG4 \O1oi1_RNO[4] ( .A(N_24), .B(N_22), .C(O1oi1_Z[4]), .D(un6_i0oi1_1_cry_4_S), .Y(N_16_i) ); defparam \O1oi1_RNO[4] .INIT=16'h5140; // @28:517758 CFG4 \O1oi1_RNO[3] ( .A(N_24), .B(N_22), .C(O1oi1_Z[3]), .D(un6_i0oi1_1_cry_3_S), .Y(N_14_i) ); defparam \O1oi1_RNO[3] .INIT=16'h5140; // @28:517758 CFG4 \O1oi1_RNO[2] ( .A(N_24), .B(N_22), .C(O1oi1_Z[2]), .D(un6_i0oi1_1_cry_2_S), .Y(N_12_i) ); defparam \O1oi1_RNO[2] .INIT=16'h5140; // @28:517758 CFG4 \O1oi1_RNO[1] ( .A(N_24), .B(N_22), .C(O1oi1_Z[1]), .D(un6_i0oi1_1_cry_1_S), .Y(N_10_i) ); defparam \O1oi1_RNO[1] .INIT=16'h5140; // @28:475864 CFG4 \un1_ii1i1[0] ( .A(I01i1_1z), .B(oOoi1_Z), .C(un9_lOoi1_Z), .D(ii1i1), .Y(un1_ii1i1_Z[0]) ); defparam \un1_ii1i1[0] .INIT=16'h3F04; // @28:516921 CFG4 IOoi1 ( .A(iI1i1), .B(un1_IOoi1_6_Z), .C(IOoi1_3_Z), .D(IOoi1_4_Z), .Y(IOoi1_Z) ); defparam IOoi1.INIT=16'hFFF8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PERMC_TOP_1s_26s */ module CTSE_PE_MCXMAC_CORE_26s_0_0s_0s ( lliO1, o0iO1_1z, OoiO1, ii0i0, O0l11, Oi0i0_1z, O1iO1_1z, OOlI1, ooIO1_1z_0, Oll11_1z, l0l11, iIl11, lIl11, I0l11_1z, oIl11_1z, IIl11_1z, oiI11_1z, IioO1_1z, oIOI1, iiI11_1z, iliO1, iO011_i, oliO1, l0iO1, O0iO1, I1iO1, ioI11, OiI11, IiI11, OIlI1_i, PF_IOD_CDR_C0_0_RX_CLK_R, i0l11, i1iO1_1z, IoiO1, o1iO1, I1I11, oi0i0, iOl11, iOlI1_i, IO1i0, lO1i0, O1l11, i0iO1, i1_i_12, Ii0i0_1z, l1I11, ill11, iiOI1, ilo11, Ill11_1z, o0l11_1z, IOI11_1z, oOl11, lOl11, oioO1, iioO1, liI11, l1l11, lioO1, lll11, OIl11, oll11, oO011_i, PF_IOD_CDR_CCC_C0_0_TX_CLK_G, ooI11, IIiO1, oIiO1, iIiO1_1z, IliO1_1z, iIl0112, OOiO1_2z, lOiO1, iOiO1_1z, oOiO1_3z, IOiO1_2z, OO1i0, Ol1i0, li0i0 ) ; output [7:0] lliO1 ; output [32:0] o0iO1_1z ; output [8:2] OoiO1 ; input [7:0] ii0i0 ; input [7:2] O0l11 ; output [7:0] Oi0i0_1z ; output [51:0] O1iO1_1z ; input [15:0] OOlI1 ; input ooIO1_1z_0 ; input [3:0] Oll11_1z ; input [3:0] l0l11 ; input [5:0] iIl11 ; input [6:2] lIl11 ; input [3:0] I0l11_1z ; input [6:2] oIl11_1z ; input [6:2] IIl11_1z ; input [15:0] oiI11_1z ; input [7:0] IioO1_1z ; input [47:0] oIOI1 ; input [15:0] iiI11_1z ; output iliO1 ; input iO011_i ; output oliO1 ; output l0iO1 ; output O0iO1 ; output I1iO1 ; input ioI11 ; input OiI11 ; input IiI11 ; input OIlI1_i ; input PF_IOD_CDR_C0_0_RX_CLK_R ; input i0l11 ; output i1iO1_1z ; output IoiO1 ; output o1iO1 ; output I1I11 ; input oi0i0 ; input iOl11 ; input iOlI1_i ; input IO1i0 ; input lO1i0 ; input O1l11 ; output i0iO1 ; output i1_i_12 ; output Ii0i0_1z ; output l1I11 ; input ill11 ; input iiOI1 ; input ilo11 ; input Ill11_1z ; input o0l11_1z ; input IOI11_1z ; input oOl11 ; input lOl11 ; input oioO1 ; input iioO1 ; input liI11 ; input l1l11 ; input lioO1 ; input lll11 ; input OIl11 ; input oll11 ; input oO011_i ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; input ooI11 ; output IIiO1 ; output oIiO1 ; output iIiO1_1z ; output IliO1_1z ; input iIl0112 ; input OOiO1_2z ; input lOiO1 ; input iOiO1_1z ; input oOiO1_3z ; input IOiO1_2z ; input OO1i0 ; input Ol1i0 ; output li0i0 ; wire ooIO1_1z_0 ; wire iliO1 ; wire iO011_i ; wire oliO1 ; wire l0iO1 ; wire O0iO1 ; wire I1iO1 ; wire ioI11 ; wire OiI11 ; wire IiI11 ; wire OIlI1_i ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire i0l11 ; wire i1iO1_1z ; wire IoiO1 ; wire o1iO1 ; wire I1I11 ; wire oi0i0 ; wire iOl11 ; wire iOlI1_i ; wire IO1i0 ; wire lO1i0 ; wire O1l11 ; wire i0iO1 ; wire i1_i_12 ; wire Ii0i0_1z ; wire l1I11 ; wire ill11 ; wire iiOI1 ; wire ilo11 ; wire Ill11_1z ; wire o0l11_1z ; wire IOI11_1z ; wire oOl11 ; wire lOl11 ; wire oioO1 ; wire iioO1 ; wire liI11 ; wire l1l11 ; wire lioO1 ; wire lll11 ; wire OIl11 ; wire oll11 ; wire oO011_i ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire ooI11 ; wire IIiO1 ; wire oIiO1 ; wire iIiO1_1z ; wire IliO1_1z ; wire iIl0112 ; wire OOiO1_2z ; wire lOiO1 ; wire iOiO1_1z ; wire oOiO1_3z ; wire IOiO1_2z ; wire OO1i0 ; wire Ol1i0 ; wire li0i0 ; wire [0:0] un1_o0IO1_Z; wire [6:0] o1li1; wire [6:0] IIoO1; wire [7:0] Oi011; wire [7:0] i0011; wire [32:0] OO111; wire N_247_i ; wire N_243_i ; wire N_239_i ; wire N_103_i ; wire N_251_i ; wire ii1i1 ; wire I01i1 ; wire ii1i1_2_0 ; wire Io011 ; wire N_102 ; wire N_238_i ; wire N_250_i ; wire N_242_i ; wire N_246_i ; wire iiOi1 ; wire oIoO1 ; wire lo011 ; wire un3_oo1i1_7 ; wire N_447 ; wire N_19_0 ; wire N_28_0 ; wire N_72 ; wire N_45_0 ; wire N_97 ; wire O1011 ; wire o1011 ; wire l1011 ; wire i1011 ; wire oo011 ; wire io011 ; wire I1011 ; wire iO111 ; wire N_14997 ; wire N_14998 ; wire N_14999 ; wire N_15000 ; wire N_15001 ; wire N_15002 ; wire N_15003 ; wire Oo011 ; wire II111 ; wire lI111 ; wire i1_i_1 ; wire oi011 ; wire li011 ; wire Ii011 ; wire ii011 ; wire N_15004 ; wire N_15005 ; wire N_15006 ; wire N_15007 ; wire N_15008 ; wire N_15009 ; wire N_15010 ; wire N_15011 ; wire N_15012 ; wire GND ; wire VCC ; // @28:486239 CFG3 \un1_o0IO1[0] ( .A(li0i0), .B(Ol1i0), .C(OO1i0), .Y(un1_o0IO1_Z[0]) ); defparam \un1_o0IO1[0] .INIT=8'hB8; // @28:475258 CTSE_PETMC_TOP_1s_26s CTSE_PETMC_TOP_1 ( .iiI11(iiI11_1z[15:0]), .oIOI1(oIOI1[47:0]), .IioO1(IioO1_1z[7:0]), .oiI11(oiI11_1z[15:0]), .o1li1_0(o1li1[0]), .o1li1_6(o1li1[6]), .o1li1_3(o1li1[3]), .o1li1_2(o1li1[2]), .o1li1_1(o1li1[1]), .IIoO1_1z_1(IIoO1[1]), .IIoO1_1z_2(IIoO1[2]), .IIoO1_1z_0(IIoO1[0]), .IIoO1_1z_3(IIoO1[3]), .IIoO1_1z_6(IIoO1[6]), .Oi011_2(Oi011[2]), .Oi011_7(Oi011[7]), .Oi011_0(Oi011[0]), .Oi011_1(Oi011[1]), .Oi011_6(Oi011[6]), .Oi011_3(Oi011[3]), .i0011(i0011[7:0]), .N_247_i_1z(N_247_i), .N_243_i_1z(N_243_i), .N_239_i_1z(N_239_i), .N_103_i_1z(N_103_i), .N_251_i_1z(N_251_i), .ii1i1(ii1i1), .I01i1(I01i1), .ii1i1_2_0(ii1i1_2_0), .IOiO1(IOiO1_2z), .Io011(Io011), .oOiO1(oOiO1_3z), .iOiO1_1z(iOiO1_1z), .N_102(N_102), .N_238_i(N_238_i), .N_250_i(N_250_i), .N_242_i(N_242_i), .N_246_i(N_246_i), .iiOi1(iiOi1), .oIoO1(oIoO1), .lo011(lo011), .lOiO1(lOiO1), .un3_oo1i1_7(un3_oo1i1_7), .N_447(N_447), .OOiO1_1z(OOiO1_2z), .iIl0112(iIl0112), .N_19_0(N_19_0), .N_28_0(N_28_0), .N_72(N_72), .N_45_0(N_45_0), .N_97(N_97), .O1011_1z(O1011), .o1011_2z(o1011), .l1011_1z(l1011), .IliO1_1z(IliO1_1z), .i1011_1z(i1011), .oo011(oo011), .iIiO1_1z(iIiO1_1z), .io011_1z(io011), .oIiO1_1z(oIiO1), .I1011_2z(I1011), .IIiO1_2z(IIiO1), .ooI11(ooI11), .iO111(iO111), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .oO011_i(oO011_i) ); // @28:475474 CTSE_PETFN_TOP_26s_0s_0_1s CTSE_PETFN_TOP_1 ( .IIl11(IIl11_1z[6:2]), .oIl11(oIl11_1z[6:2]), .I0l11(I0l11_1z[3:0]), .lIl11(lIl11[6:2]), .i0011(i0011[7:0]), .iIl11_1z(iIl11[5:0]), .l0l11(l0l11[3:0]), .Oll11_1z(Oll11_1z[3:0]), .ooIO1_0(ooIO1_1z_0), .OOlI1(OOlI1[15:0]), .O1iO1({O1iO1_1z[51], N_15003, N_15002, O1iO1_1z[48:32], N_15001, N_15000, O1iO1_1z[29:24], N_14999, N_14998, N_14997, O1iO1_1z[20:0]}), .Oi0i0(Oi0i0_1z[7:0]), .oll11(oll11), .OIl11_0(OIl11), .lll11(lll11), .lioO1(lioO1), .l1l11(l1l11), .liI11(liI11), .iioO1(iioO1), .oioO1(oioO1), .o1011(o1011), .lOl11(lOl11), .oOl11(oOl11), .IOI11(IOI11_1z), .o0l11(o0l11_1z), .l1011(l1011), .I1011(I1011), .iIl0112(iIl0112), .Ill11(Ill11_1z), .ilo11(ilo11), .iiOI1(iiOI1), .ill11_1z(ill11), .l1I11_1z(l1I11), .li0i0(li0i0), .Ii0i0(Ii0i0_1z), .oo011(oo011), .io011(io011), .i1_i_12(i1_i_12), .lo011(lo011), .Io011_1z(Io011), .i0iO1_1z(i0iO1), .O1l11(O1l11), .lO1i0(lO1i0), .IO1i0(IO1i0), .O1011_1z(O1011), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .iOlI1_i(iOlI1_i), .Oo011_1z(Oo011) ); // @28:475925 CTSE_PERFN_TOP_26s_0s_0_1s CTSE_PERFN_TOP_1 ( .O0l11(O0l11[7:2]), .ii0i0(ii0i0[7:0]), .Oi0i0(Oi0i0_1z[7:0]), .ooIO1_0(ooIO1_1z_0), .OOlI1(OOlI1[15:0]), .OO111(OO111[32:0]), .o1li1_0(o1li1[0]), .o1li1_6(o1li1[6]), .o1li1_3(o1li1[3]), .o1li1_2(o1li1[2]), .o1li1_1(o1li1[1]), .IIoO1_6(IIoO1[6]), .IIoO1_3(IIoO1[3]), .IIoO1_2(IIoO1[2]), .IIoO1_1(IIoO1[1]), .IIoO1_0(IIoO1[0]), .Oi011(Oi011[7:0]), .OoiO1_1z(OoiO1[8:2]), .un1_o0IO1_0(un1_o0IO1_Z[0]), .II111(II111), .OIl11(OIl11), .iOl11(iOl11), .oi0i0_1z(oi0i0), .Ii0i0_1z(Ii0i0_1z), .Ol1i0(Ol1i0), .lI111(lI111), .iIl0112(iIl0112), .IOI11(IOI11_1z), .i1_i_1(i1_i_1), .N_246_i(N_246_i), .N_242_i(N_242_i), .N_238_i(N_238_i), .N_102(N_102), .N_247_i(N_247_i), .N_243_i(N_243_i), .N_239_i(N_239_i), .N_103_i(N_103_i), .N_250_i(N_250_i), .N_251_i(N_251_i), .I1I11_1z(I1I11), .o1iO1_1z(o1iO1), .iiOi1_1z(iiOi1), .oIoO1_1z(oIoO1), .oi011_1z(oi011), .IoiO1_1z(IoiO1), .i1iO1_1z(i1iO1_1z), .li011(li011), .Ii011(Ii011), .Oo011(Oo011), .lO1i0(lO1i0), .i0l11(i0l11), .ii011_1z(ii011), .PF_IOD_CDR_C0_0_RX_CLK_R(PF_IOD_CDR_C0_0_RX_CLK_R), .OIlI1_i(OIlI1_i) ); // @28:476153 CTSE_PERMC_TOP_1s_26s CTSE_PERMC_TOP_1 ( .oIOI1({oIOI1[46:42], N_15012, N_15011, oIOI1[39:35], N_15010, N_15009, N_15008, oIOI1[31:18], N_15007, N_15006, oIOI1[15:10], N_15005, N_15004, oIOI1[7:2]}), .OO111(OO111[32:0]), .o0iO1(o0iO1_1z[32:0]), .Oi011(Oi011[7:0]), .lliO1(lliO1[7:0]), .ii1i1(ii1i1), .N_28_0(N_28_0), .IiI11(IiI11), .OiI11(OiI11), .ioI11(ioI11), .N_72(N_72), .N_45_0(N_45_0), .N_97(N_97), .N_19_0(N_19_0), .I01i1_1z(I01i1), .N_447(N_447), .un3_oo1i1_7(un3_oo1i1_7), .iIl0112(iIl0112), .ii1i1_2_0(ii1i1_2_0), .II111_1z(II111), .lI111_1z(lI111), .iO111_1z(iO111), .I1iO1_1z(I1iO1), .i1_i_1(i1_i_1), .oi011_1z(oi011), .O0iO1_1z(O0iO1), .ii011(ii011), .l0iO1_1z(l0iO1), .i1011(i1011), .Ii011_1z(Ii011), .oliO1_1z(oliO1), .li011(li011), .PF_IOD_CDR_C0_0_RX_CLK_R(PF_IOD_CDR_C0_0_RX_CLK_R), .iO011_i(iO011_i), .iliO1_1z(iliO1) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PE_MCXMAC_CORE_26s_0_0s_0s */ module CTSE_PEHST_1s_26s ( un112_OOOI1_0, un1_OOOI1_0, un8_OOOI1_15, un8_OOOI1_0, un8_OOOI1_5, un8_OOOI1_10, un103_OOOI1_0, un103_OOOI1_3, un103_OOOI1_2, un45_OOOI1_0, un45_OOOI1_3, un39_OOOI1_0, un39_OOOI1_9, un39_OOOI1_1, OoI11_0, OoI11_9, OoI11_1, paddr_0, CoreAPB3_0_0_APBmslave0_PADDR_1, CoreAPB3_0_0_APBmslave0_PADDR_3, CoreAPB3_0_0_APBmslave0_PADDR_0, CoreAPB3_0_0_APBmslave0_PADDR_5, CoreAPB3_0_0_APBmslave0_PADDR_6, CoreAPB3_0_0_APBmslave0_PADDR_7, PADDR_1z_0, oIOI1, lol11, Iol11, o1l11, iol11_1z, Oll11, oiI11, OOl11, OOlI1, l0l11, CoreAPB3_0_0_APBmslave0_PWDATA, iIl11, oIl11, O0l11, IIl11_1z, lIl11, ooIO1, I0l11, wrdata_0, Ioo11_1z, I0o11_1z, un1_PADDR_3, oli11_1z, un5_l0iIo_1, OOi11_1z, tx_fifo_write_sig14_i_2, tx_fifo_write_sig14_i_1, O0i11_1z, un1_IIOO1_2_1, Ilo11_1z, un1_IIOO1_1_2, ioo11_2z, oio11_1z, N_82_2, i1o11_1z, l1o11_1z, o0o11_1z, olo11_1z, IOi11_1z, Iio11_1z, un5_l0iIo_2, O1o11_1z, un1_PADDR_2, un4_I1o11_4_RNI4IU79_1z, tx_fifo_write_sig_0_sqmuxa_i_1, lOi11_1z, oOi11_2z, un1_ooiO1, N_1206, rx_fifo_read_1, liO019_i_1, liO0110_i_1, CoreAPB3_0_0_APBmslave0_PWRITE, un4_I1o11_4_1z, N_1112, lOi11_4_1z, un4_Ooo11_1_1z, oll11_1z, iiOI1, ool11_1z, l1l11_1z, ioI11_2z, iil11_2z, i0l11_1z, OO011_1z, O1l11_1z, Ol1i0, IoI11, iOi11_3z, IiI11_1z, lll11_1z, o0l11_1z, ill11_1z, Ill11_2z, oOl11_2z, lOl11_1z, iOl11_2z, OIl11_1z, IoOI1_1z, IOI11_4z, III11_2z, ooI11_3z, oil11_2z, lil11_1z, liII1_1z, lO011_1z, l1II1_1z, iIOI1_1z, i1II1_1z, OlOI1_1z, IiII1_1z, Oil11_3z, Iil11_3z, i1l11_1z, Ool11_3z, IO011_1z, liI11_1z, ilo11_2z, OiI11_1z, olOI1_2z, oiII1_1z, o1II1_1z, loo11_1z, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; output un112_OOOI1_0 ; output un1_OOOI1_0 ; output un8_OOOI1_15 ; output un8_OOOI1_0 ; output un8_OOOI1_5 ; output un8_OOOI1_10 ; output un103_OOOI1_0 ; output un103_OOOI1_3 ; output un103_OOOI1_2 ; output un45_OOOI1_0 ; output un45_OOOI1_3 ; output un39_OOOI1_0 ; output un39_OOOI1_9 ; output un39_OOOI1_1 ; input OoI11_0 ; input OoI11_9 ; input OoI11_1 ; input paddr_0 ; input CoreAPB3_0_0_APBmslave0_PADDR_1 ; input CoreAPB3_0_0_APBmslave0_PADDR_3 ; input CoreAPB3_0_0_APBmslave0_PADDR_0 ; input CoreAPB3_0_0_APBmslave0_PADDR_5 ; input CoreAPB3_0_0_APBmslave0_PADDR_6 ; input CoreAPB3_0_0_APBmslave0_PADDR_7 ; input PADDR_1z_0 ; output [47:0] oIOI1 ; output [4:0] lol11 ; output [4:0] Iol11 ; output [2:0] o1l11 ; output [15:0] iol11_1z ; output [3:0] Oll11 ; output [15:0] oiI11 ; output [15:0] OOl11 ; output [15:0] OOlI1 ; output [3:0] l0l11 ; input [31:1] CoreAPB3_0_0_APBmslave0_PWDATA ; output [9:0] iIl11 ; output [6:0] oIl11 ; output [7:0] O0l11 ; output [6:0] IIl11_1z ; output [6:0] lIl11 ; output [1:0] ooIO1 ; output [3:0] I0l11 ; input wrdata_0 ; output Ioo11_1z ; output I0o11_1z ; input un1_PADDR_3 ; output oli11_1z ; input un5_l0iIo_1 ; output OOi11_1z ; input tx_fifo_write_sig14_i_2 ; input tx_fifo_write_sig14_i_1 ; output O0i11_1z ; input un1_IIOO1_2_1 ; output Ilo11_1z ; input un1_IIOO1_1_2 ; output ioo11_2z ; output oio11_1z ; input N_82_2 ; output i1o11_1z ; output l1o11_1z ; output o0o11_1z ; output olo11_1z ; output IOi11_1z ; output Iio11_1z ; input un5_l0iIo_2 ; output O1o11_1z ; input un1_PADDR_2 ; output un4_I1o11_4_RNI4IU79_1z ; input tx_fifo_write_sig_0_sqmuxa_i_1 ; output lOi11_1z ; output oOi11_2z ; input un1_ooiO1 ; input N_1206 ; input rx_fifo_read_1 ; input liO019_i_1 ; input liO0110_i_1 ; input CoreAPB3_0_0_APBmslave0_PWRITE ; output un4_I1o11_4_1z ; output N_1112 ; output lOi11_4_1z ; output un4_Ooo11_1_1z ; output oll11_1z ; input iiOI1 ; output ool11_1z ; output l1l11_1z ; output ioI11_2z ; output iil11_2z ; output i0l11_1z ; output OO011_1z ; output O1l11_1z ; output Ol1i0 ; input IoI11 ; output iOi11_3z ; output IiI11_1z ; output lll11_1z ; output o0l11_1z ; output ill11_1z ; output Ill11_2z ; output oOl11_2z ; output lOl11_1z ; output iOl11_2z ; output OIl11_1z ; output IoOI1_1z ; output IOI11_4z ; output III11_2z ; output ooI11_3z ; output oil11_2z ; output lil11_1z ; output liII1_1z ; output lO011_1z ; output l1II1_1z ; output iIOI1_1z ; output i1II1_1z ; output OlOI1_1z ; output IiII1_1z ; output Oil11_3z ; output Iil11_3z ; output i1l11_1z ; output Ool11_3z ; output IO011_1z ; output liI11_1z ; output ilo11_2z ; output OiI11_1z ; output olOI1_2z ; output oiII1_1z ; output o1II1_1z ; output loo11_1z ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire un112_OOOI1_0 ; wire un1_OOOI1_0 ; wire un8_OOOI1_15 ; wire un8_OOOI1_0 ; wire un8_OOOI1_5 ; wire un8_OOOI1_10 ; wire un103_OOOI1_0 ; wire un103_OOOI1_3 ; wire un103_OOOI1_2 ; wire un45_OOOI1_0 ; wire un45_OOOI1_3 ; wire un39_OOOI1_0 ; wire un39_OOOI1_9 ; wire un39_OOOI1_1 ; wire OoI11_0 ; wire OoI11_9 ; wire OoI11_1 ; wire paddr_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_1 ; wire CoreAPB3_0_0_APBmslave0_PADDR_3 ; wire CoreAPB3_0_0_APBmslave0_PADDR_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_5 ; wire CoreAPB3_0_0_APBmslave0_PADDR_6 ; wire CoreAPB3_0_0_APBmslave0_PADDR_7 ; wire PADDR_1z_0 ; wire wrdata_0 ; wire Ioo11_1z ; wire I0o11_1z ; wire un1_PADDR_3 ; wire oli11_1z ; wire un5_l0iIo_1 ; wire OOi11_1z ; wire tx_fifo_write_sig14_i_2 ; wire tx_fifo_write_sig14_i_1 ; wire O0i11_1z ; wire un1_IIOO1_2_1 ; wire Ilo11_1z ; wire un1_IIOO1_1_2 ; wire ioo11_2z ; wire oio11_1z ; wire N_82_2 ; wire i1o11_1z ; wire l1o11_1z ; wire o0o11_1z ; wire olo11_1z ; wire IOi11_1z ; wire Iio11_1z ; wire un5_l0iIo_2 ; wire O1o11_1z ; wire un1_PADDR_2 ; wire un4_I1o11_4_RNI4IU79_1z ; wire tx_fifo_write_sig_0_sqmuxa_i_1 ; wire lOi11_1z ; wire oOi11_2z ; wire un1_ooiO1 ; wire N_1206 ; wire rx_fifo_read_1 ; wire liO019_i_1 ; wire liO0110_i_1 ; wire CoreAPB3_0_0_APBmslave0_PWRITE ; wire un4_I1o11_4_1z ; wire N_1112 ; wire lOi11_4_1z ; wire un4_Ooo11_1_1z ; wire oll11_1z ; wire iiOI1 ; wire ool11_1z ; wire l1l11_1z ; wire ioI11_2z ; wire iil11_2z ; wire i0l11_1z ; wire OO011_1z ; wire O1l11_1z ; wire Ol1i0 ; wire IoI11 ; wire iOi11_3z ; wire IiI11_1z ; wire lll11_1z ; wire o0l11_1z ; wire ill11_1z ; wire Ill11_2z ; wire oOl11_2z ; wire lOl11_1z ; wire iOl11_2z ; wire OIl11_1z ; wire IoOI1_1z ; wire IOI11_4z ; wire III11_2z ; wire ooI11_3z ; wire oil11_2z ; wire lil11_1z ; wire liII1_1z ; wire lO011_1z ; wire l1II1_1z ; wire iIOI1_1z ; wire i1II1_1z ; wire OlOI1_1z ; wire IiII1_1z ; wire Oil11_3z ; wire Iil11_3z ; wire i1l11_1z ; wire Ool11_3z ; wire IO011_1z ; wire liI11_1z ; wire ilo11_2z ; wire OiI11_1z ; wire olOI1_2z ; wire oiII1_1z ; wire o1II1_1z ; wire loo11_1z ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire OIi11_Z ; wire VCC ; wire GND ; wire lIi11_Z ; wire IIi11_Z ; wire Ooo11_Z ; wire ooo11_Z ; wire Oio11_Z ; wire lio11_Z ; wire Olo11_Z ; wire llo11_Z ; wire l0o11_Z ; wire O0o11_Z ; wire un1_IoI11_Z ; wire i0o11_Z ; wire NN_1 ; wire NN_2 ; wire o1o11_Z ; wire I1o11_Z ; wire iio11_Z ; wire ili11_Z ; wire lli11_Z ; wire un4_I1o11_2_Z ; wire un4_Oio11_1_Z ; wire loo11_1_Z ; wire oOi11_1_Z ; wire lOi11_0_Z ; wire un4_I1o11_4_RNI5JU79_Z ; wire O1o11_1_Z ; wire IOi11_1_Z ; wire llo11_1_Z ; wire o1o11_1_Z ; // @28:482314 SLE OIi11 ( .Q(OIi11_Z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(loo11_1z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482378 SLE lIi11 ( .Q(lIi11_Z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IIi11_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482346 SLE IIi11 ( .Q(IIi11_Z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(OIi11_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482161 SLE o1II1 ( .Q(o1II1_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(Ooo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482161 SLE oiII1 ( .Q(oiII1_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[25]), .EN(Ooo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482161 SLE olOI1 ( .Q(olOI1_2z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(Ooo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481879 SLE OiI11 ( .Q(OiI11_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(ooo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481879 SLE ilo11 ( .Q(ilo11_2z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(ooo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481879 SLE liI11 ( .Q(liI11_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(ooo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481936 SLE IO011 ( .Q(IO011_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[31]), .EN(Oio11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481936 SLE Ool11 ( .Q(Ool11_3z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(Oio11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481936 SLE i1l11 ( .Q(i1l11_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(Oio11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482007 SLE Iil11 ( .Q(Iil11_3z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(lio11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482007 SLE Oil11 ( .Q(Oil11_3z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(lio11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482161 SLE IiII1 ( .Q(IiII1_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[27]), .EN(Ooo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482161 SLE OlOI1 ( .Q(OlOI1_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(Ooo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482161 SLE i1II1 ( .Q(i1II1_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(Ooo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482161 SLE iIOI1 ( .Q(iIOI1_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .EN(Ooo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482161 SLE l1II1 ( .Q(l1II1_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(Ooo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482161 SLE lO011 ( .Q(lO011_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[31]), .EN(Ooo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482161 SLE liII1 ( .Q(liII1_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[26]), .EN(Ooo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481209 SLE lil11 ( .Q(lil11_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[16]), .EN(Olo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481209 SLE oil11 ( .Q(oil11_2z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[17]), .EN(Olo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481209 SLE ooI11 ( .Q(ooI11_3z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(Olo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481209 SLE III11 ( .Q(III11_2z), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[31]), .EN(Olo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481350 SLE IOI11 ( .Q(IOI11_4z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(llo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481350 SLE IoOI1 ( .Q(IoOI1_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(llo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481350 SLE OIl11 ( .Q(OIl11_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(llo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481350 SLE iOl11 ( .Q(iOl11_2z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(llo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481350 SLE lOl11 ( .Q(lOl11_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(llo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481350 SLE oOl11 ( .Q(oOl11_2z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(llo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481554 SLE Ill11 ( .Q(Ill11_2z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[17]), .EN(l0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481554 SLE ill11 ( .Q(ill11_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[18]), .EN(l0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481554 SLE o0l11 ( .Q(o0l11_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[19]), .EN(l0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481554 SLE lll11 ( .Q(lll11_1z), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[16]), .EN(l0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481879 SLE IiI11 ( .Q(IiI11_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(ooo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481460 SLE \IIl11[0] ( .Q(IIl11_1z[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(O0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481350 SLE \I0l11_Z[3] ( .Q(I0l11[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[15]), .EN(llo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481350 SLE \I0l11_Z[2] ( .Q(I0l11[2]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[14]), .EN(llo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481350 SLE \I0l11_Z[1] ( .Q(I0l11[1]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[13]), .EN(llo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481350 SLE \I0l11_Z[0] ( .Q(I0l11[0]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .EN(llo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481350 SLE \o[1] ( .Q(ooIO1[1]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .EN(llo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481350 SLE \o[0] ( .Q(ooIO1[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .EN(llo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482263 SLE iOi11 ( .Q(iOi11_3z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IoI11), .EN(un1_IoI11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481209 SLE I1l11 ( .Q(Ol1i0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .EN(Olo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481209 SLE O1l11 ( .Q(O1l11_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(Olo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481209 SLE OO011 ( .Q(OO011_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[19]), .EN(Olo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481209 SLE i0l11 ( .Q(i0l11_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(Olo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481209 SLE iil11 ( .Q(iil11_2z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[18]), .EN(Olo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481209 SLE ioI11 ( .Q(ioI11_2z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(Olo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481209 SLE l1l11 ( .Q(l1l11_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[30]), .EN(Olo11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481460 SLE \oIl11_Z[1] ( .Q(oIl11[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[17]), .EN(O0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481460 SLE \oIl11_Z[0] ( .Q(oIl11[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[16]), .EN(O0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481460 SLE \lIl11_Z[6] ( .Q(lIl11[6]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[30]), .EN(O0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481460 SLE \lIl11_Z[5] ( .Q(lIl11[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[29]), .EN(O0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481460 SLE \lIl11_Z[4] ( .Q(lIl11[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[28]), .EN(O0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481460 SLE \lIl11_Z[3] ( .Q(lIl11[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[27]), .EN(O0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481460 SLE \lIl11_Z[2] ( .Q(lIl11[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[26]), .EN(O0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481460 SLE \lIl11_Z[1] ( .Q(lIl11[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[25]), .EN(O0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481460 SLE \lIl11_Z[0] ( .Q(lIl11[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[24]), .EN(O0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481460 SLE \IIl11[6] ( .Q(IIl11_1z[6]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(O0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481460 SLE \IIl11[5] ( .Q(IIl11_1z[5]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(O0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481460 SLE \IIl11[4] ( .Q(IIl11_1z[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(O0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481460 SLE \IIl11[3] ( .Q(IIl11_1z[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(O0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481460 SLE \IIl11[2] ( .Q(IIl11_1z[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(O0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481460 SLE \IIl11[1] ( .Q(IIl11_1z[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(O0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481554 SLE \l0l11_Z[1] ( .Q(l0l11[1]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[21]), .EN(l0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481554 SLE \l0l11_Z[0] ( .Q(l0l11[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[20]), .EN(l0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481460 SLE \O0l11_Z[7] ( .Q(O0l11[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[15]), .EN(O0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481460 SLE \O0l11_Z[6] ( .Q(O0l11[6]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[14]), .EN(O0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481460 SLE \O0l11_Z[5] ( .Q(O0l11[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[13]), .EN(O0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481460 SLE \O0l11_Z[4] ( .Q(O0l11[4]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .EN(O0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481460 SLE \O0l11_Z[3] ( .Q(O0l11[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .EN(O0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481460 SLE \O0l11_Z[2] ( .Q(O0l11[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .EN(O0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481460 SLE \O0l11_Z[1] ( .Q(O0l11[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .EN(O0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481460 SLE \O0l11_Z[0] ( .Q(O0l11[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .EN(O0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481460 SLE \oIl11_Z[6] ( .Q(oIl11[6]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[22]), .EN(O0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481460 SLE \oIl11_Z[5] ( .Q(oIl11[5]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[21]), .EN(O0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481460 SLE \oIl11_Z[4] ( .Q(oIl11[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[20]), .EN(O0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481460 SLE \oIl11_Z[3] ( .Q(oIl11[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[19]), .EN(O0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481460 SLE \oIl11_Z[2] ( .Q(oIl11[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[18]), .EN(O0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481756 SLE \loiO1[2] ( .Q(OOlI1[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(i0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481756 SLE \loiO1[1] ( .Q(OOlI1[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(i0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481756 SLE \loiO1[0] ( .Q(OOlI1[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(i0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481554 SLE \iIl11_Z[9] ( .Q(iIl11[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .EN(l0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481554 SLE \iIl11_Z[8] ( .Q(NN_1), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .EN(l0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481554 SLE \iIl11_Z[7] ( .Q(NN_2), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .EN(l0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481554 SLE \iIl11_Z[6] ( .Q(iIl11[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(l0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481554 SLE \iIl11_Z[5] ( .Q(iIl11[5]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(l0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481554 SLE \iIl11_Z[4] ( .Q(iIl11[4]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(l0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481554 SLE \iIl11_Z[3] ( .Q(iIl11[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(l0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481554 SLE \iIl11_Z[2] ( .Q(iIl11[2]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(l0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481554 SLE \iIl11_Z[1] ( .Q(iIl11[1]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(l0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481554 SLE \iIl11_Z[0] ( .Q(iIl11[0]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(l0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481554 SLE \l0l11_Z[3] ( .Q(l0l11[3]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[23]), .EN(l0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481554 SLE \l0l11_Z[2] ( .Q(l0l11[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[22]), .EN(l0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481756 SLE \loiO1[15] ( .Q(OOlI1[15]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[15]), .EN(i0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481756 SLE \loiO1[14] ( .Q(OOlI1[14]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[14]), .EN(i0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481756 SLE \loiO1[13] ( .Q(OOlI1[13]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[13]), .EN(i0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481756 SLE \loiO1[12] ( .Q(OOlI1[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .EN(i0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481756 SLE \loiO1[11] ( .Q(OOlI1[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .EN(i0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481756 SLE \loiO1[10] ( .Q(OOlI1[10]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .EN(i0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481756 SLE \loiO1[9] ( .Q(OOlI1[9]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .EN(i0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481756 SLE \loiO1[8] ( .Q(OOlI1[8]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .EN(i0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481756 SLE \loiO1[7] ( .Q(OOlI1[7]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .EN(i0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481756 SLE \loiO1[6] ( .Q(OOlI1[6]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(i0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481756 SLE \loiO1[5] ( .Q(OOlI1[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(i0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481756 SLE \loiO1[4] ( .Q(OOlI1[4]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(i0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481756 SLE \loiO1[3] ( .Q(OOlI1[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(i0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481838 SLE \I1II1[7] ( .Q(OOl11[7]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .EN(o1o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481838 SLE \I1II1[6] ( .Q(OOl11[6]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(o1o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481838 SLE \I1II1[5] ( .Q(OOl11[5]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(o1o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481838 SLE \I1II1[4] ( .Q(OOl11[4]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(o1o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481838 SLE \I1II1[3] ( .Q(OOl11[3]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(o1o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481838 SLE \I1II1[2] ( .Q(OOl11[2]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(o1o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481838 SLE \I1II1[1] ( .Q(OOl11[1]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(o1o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481838 SLE \I1II1[0] ( .Q(OOl11[0]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(o1o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481797 SLE \iI011[6] ( .Q(oiI11[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(I1o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481797 SLE \iI011[5] ( .Q(oiI11[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(I1o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481797 SLE \iI011[4] ( .Q(oiI11[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(I1o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481797 SLE \iI011[3] ( .Q(oiI11[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(I1o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481797 SLE \iI011[2] ( .Q(oiI11[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(I1o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481797 SLE \iI011[1] ( .Q(oiI11[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(I1o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481797 SLE \iI011[0] ( .Q(oiI11[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(I1o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481838 SLE \I1II1[15] ( .Q(OOl11[15]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[15]), .EN(o1o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481838 SLE \I1II1[14] ( .Q(OOl11[14]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[14]), .EN(o1o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481838 SLE \I1II1[13] ( .Q(OOl11[13]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[13]), .EN(o1o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481838 SLE \I1II1[12] ( .Q(OOl11[12]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .EN(o1o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481838 SLE \I1II1[11] ( .Q(OOl11[11]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .EN(o1o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481838 SLE \I1II1[10] ( .Q(OOl11[10]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .EN(o1o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481838 SLE \I1II1[9] ( .Q(OOl11[9]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .EN(o1o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481838 SLE \I1II1[8] ( .Q(OOl11[8]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .EN(o1o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481797 SLE \iI011[15] ( .Q(oiI11[15]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[15]), .EN(I1o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481797 SLE \iI011[14] ( .Q(oiI11[14]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[14]), .EN(I1o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481797 SLE \iI011[13] ( .Q(oiI11[13]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[13]), .EN(I1o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481797 SLE \iI011[12] ( .Q(oiI11[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .EN(I1o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481797 SLE \iI011[11] ( .Q(oiI11[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .EN(I1o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481797 SLE \iI011[10] ( .Q(oiI11[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .EN(I1o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481797 SLE \iI011[9] ( .Q(oiI11[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .EN(I1o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481797 SLE \iI011[8] ( .Q(oiI11[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .EN(I1o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481797 SLE \iI011[7] ( .Q(oiI11[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .EN(I1o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482120 SLE \iol11[1] ( .Q(iol11_1z[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(ool11_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482120 SLE \iol11[0] ( .Q(iol11_1z[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(ool11_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481554 SLE \Oll11_Z[3] ( .Q(Oll11[3]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[15]), .EN(l0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481554 SLE \Oll11_Z[2] ( .Q(Oll11[2]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[14]), .EN(l0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481554 SLE \Oll11_Z[1] ( .Q(Oll11[1]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[13]), .EN(l0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481554 SLE \Oll11_Z[0] ( .Q(Oll11[0]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .EN(l0o11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482056 SLE \lol11_Z[0] ( .Q(lol11[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(iio11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482120 SLE \iol11[15] ( .Q(iol11_1z[15]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[15]), .EN(ool11_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482120 SLE \iol11[14] ( .Q(iol11_1z[14]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[14]), .EN(ool11_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482120 SLE \iol11[13] ( .Q(iol11_1z[13]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[13]), .EN(ool11_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482120 SLE \iol11[12] ( .Q(iol11_1z[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .EN(ool11_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482120 SLE \iol11[11] ( .Q(iol11_1z[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .EN(ool11_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482120 SLE \iol11[10] ( .Q(iol11_1z[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .EN(ool11_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482120 SLE \iol11[9] ( .Q(iol11_1z[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .EN(ool11_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482120 SLE \iol11[8] ( .Q(iol11_1z[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .EN(ool11_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482120 SLE \iol11[7] ( .Q(iol11_1z[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .EN(ool11_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482120 SLE \iol11[6] ( .Q(iol11_1z[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(ool11_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482120 SLE \iol11[5] ( .Q(iol11_1z[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(ool11_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482120 SLE \iol11[4] ( .Q(iol11_1z[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(ool11_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482120 SLE \iol11[3] ( .Q(iol11_1z[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(ool11_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482120 SLE \iol11[2] ( .Q(iol11_1z[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(ool11_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482515 SLE \oIOI1_1[34] ( .Q(oIOI1[34]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[26]), .EN(ili11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482515 SLE \oIOI1_1[33] ( .Q(oIOI1[33]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[25]), .EN(ili11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482515 SLE \oIOI1_1[32] ( .Q(oIOI1[32]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[24]), .EN(ili11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481936 SLE \o1l11_Z[2] ( .Q(o1l11[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(Oio11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481936 SLE \o1l11_Z[1] ( .Q(o1l11[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(Oio11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481936 SLE \o1l11_Z[0] ( .Q(o1l11[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(Oio11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482056 SLE \Iol11_Z[4] ( .Q(Iol11[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .EN(iio11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482056 SLE \Iol11_Z[3] ( .Q(Iol11[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .EN(iio11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482056 SLE \Iol11_Z[2] ( .Q(Iol11[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .EN(iio11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482056 SLE \Iol11_Z[1] ( .Q(Iol11[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .EN(iio11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482056 SLE \Iol11_Z[0] ( .Q(Iol11[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .EN(iio11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482056 SLE \lol11_Z[4] ( .Q(lol11[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(iio11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482056 SLE \lol11_Z[3] ( .Q(lol11[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(iio11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482056 SLE \lol11_Z[2] ( .Q(lol11[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(iio11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482056 SLE \lol11_Z[1] ( .Q(lol11[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(iio11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482418 SLE \oIOI1_1[1] ( .Q(oIOI1[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[25]), .EN(lli11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482418 SLE \oIOI1_1[0] ( .Q(oIOI1[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[24]), .EN(lli11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482515 SLE \oIOI1_1[47] ( .Q(oIOI1[47]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[23]), .EN(ili11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482515 SLE \oIOI1_1[46] ( .Q(oIOI1[46]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[22]), .EN(ili11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482515 SLE \oIOI1_1[45] ( .Q(oIOI1[45]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[21]), .EN(ili11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482515 SLE \oIOI1_1[44] ( .Q(oIOI1[44]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[20]), .EN(ili11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482515 SLE \oIOI1_1[43] ( .Q(oIOI1[43]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[19]), .EN(ili11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482515 SLE \oIOI1_1[42] ( .Q(oIOI1[42]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[18]), .EN(ili11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482515 SLE \oIOI1_1[41] ( .Q(oIOI1[41]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[17]), .EN(ili11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482515 SLE \oIOI1_1[40] ( .Q(oIOI1[40]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[16]), .EN(ili11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482515 SLE \oIOI1_1[39] ( .Q(oIOI1[39]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[31]), .EN(ili11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482515 SLE \oIOI1_1[38] ( .Q(oIOI1[38]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[30]), .EN(ili11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482515 SLE \oIOI1_1[37] ( .Q(oIOI1[37]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[29]), .EN(ili11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482515 SLE \oIOI1_1[36] ( .Q(oIOI1[36]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[28]), .EN(ili11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482515 SLE \oIOI1_1[35] ( .Q(oIOI1[35]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[27]), .EN(ili11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482418 SLE \oIOI1_1[16] ( .Q(oIOI1[16]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .EN(lli11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482418 SLE \oIOI1_1[15] ( .Q(oIOI1[15]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[23]), .EN(lli11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482418 SLE \oIOI1_1[14] ( .Q(oIOI1[14]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[22]), .EN(lli11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482418 SLE \oIOI1_1[13] ( .Q(oIOI1[13]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[21]), .EN(lli11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482418 SLE \oIOI1_1[12] ( .Q(oIOI1[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[20]), .EN(lli11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482418 SLE \oIOI1_1[11] ( .Q(oIOI1[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[19]), .EN(lli11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482418 SLE \oIOI1_1[10] ( .Q(oIOI1[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[18]), .EN(lli11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482418 SLE \oIOI1_1[9] ( .Q(oIOI1[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[17]), .EN(lli11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482418 SLE \oIOI1_1[8] ( .Q(oIOI1[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[16]), .EN(lli11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482418 SLE \oIOI1_1[7] ( .Q(oIOI1[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[31]), .EN(lli11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482418 SLE \oIOI1_1[6] ( .Q(oIOI1[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[30]), .EN(lli11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482418 SLE \oIOI1_1[5] ( .Q(oIOI1[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[29]), .EN(lli11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482418 SLE \oIOI1_1[4] ( .Q(oIOI1[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[28]), .EN(lli11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482418 SLE \oIOI1_1[3] ( .Q(oIOI1[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[27]), .EN(lli11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482418 SLE \oIOI1_1[2] ( .Q(oIOI1[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[26]), .EN(lli11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482418 SLE \oIOI1_1[31] ( .Q(oIOI1[31]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .EN(lli11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482418 SLE \oIOI1_1[30] ( .Q(oIOI1[30]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(lli11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482418 SLE \oIOI1_1[29] ( .Q(oIOI1[29]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(lli11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482418 SLE \oIOI1_1[28] ( .Q(oIOI1[28]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(lli11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482418 SLE \oIOI1_1[27] ( .Q(oIOI1[27]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(lli11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482418 SLE \oIOI1_1[26] ( .Q(oIOI1[26]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(lli11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482418 SLE \oIOI1_1[25] ( .Q(oIOI1[25]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(lli11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482418 SLE \oIOI1_1[24] ( .Q(oIOI1[24]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(lli11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482418 SLE \oIOI1_1[23] ( .Q(oIOI1[23]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[15]), .EN(lli11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482418 SLE \oIOI1_1[22] ( .Q(oIOI1[22]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[14]), .EN(lli11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482418 SLE \oIOI1_1[21] ( .Q(oIOI1[21]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[13]), .EN(lli11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482418 SLE \oIOI1_1[20] ( .Q(oIOI1[20]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .EN(lli11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482418 SLE \oIOI1_1[19] ( .Q(oIOI1[19]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .EN(lli11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482418 SLE \oIOI1_1[18] ( .Q(oIOI1[18]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .EN(lli11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:482418 SLE \oIOI1_1[17] ( .Q(oIOI1[17]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .EN(lli11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:481346 CFG2 oll11 ( .A(iiOI1), .B(ilo11_2z), .Y(oll11_1z) ); defparam oll11.INIT=4'hE; // @28:480765 CFG2 un4_I1o11_2 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_1), .B(CoreAPB3_0_0_APBmslave0_PADDR_3), .Y(un4_I1o11_2_Z) ); defparam un4_I1o11_2.INIT=4'h1; // @28:480882 CFG2 un4_Oio11_1 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_0), .B(CoreAPB3_0_0_APBmslave0_PADDR_3), .Y(un4_Oio11_1_Z) ); defparam un4_Oio11_1.INIT=4'h4; // @28:481076 CFG2 un4_Ooo11_1 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_1), .B(PADDR_1z_0), .Y(un4_Ooo11_1_1z) ); defparam un4_Ooo11_1.INIT=4'h8; // @28:481038 CFG2 lOi11_4 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_5), .B(CoreAPB3_0_0_APBmslave0_PADDR_6), .Y(lOi11_4_1z) ); defparam lOi11_4.INIT=4'h1; // @28:480843 CFG2 un4_ooo11_2 ( .A(PADDR_1z_0), .B(CoreAPB3_0_0_APBmslave0_PADDR_3), .Y(N_1112) ); defparam un4_ooo11_2.INIT=4'h2; // @28:480765 CFG2 un4_I1o11_4 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_6), .B(CoreAPB3_0_0_APBmslave0_PADDR_7), .Y(un4_I1o11_4_1z) ); defparam un4_I1o11_4.INIT=4'h1; // @28:481115 CFG3 loo11_1 ( .A(lOi11_4_1z), .B(paddr_0), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .Y(loo11_1_Z) ); defparam loo11_1.INIT=8'h02; // @28:481057 CFG3 oOi11_1 ( .A(CoreAPB3_0_0_APBmslave0_PWRITE), .B(liO0110_i_1), .C(CoreAPB3_0_0_APBmslave0_PADDR_3), .Y(oOi11_1_Z) ); defparam oOi11_1.INIT=8'h40; // @28:481038 CFG2 lOi11_0 ( .A(liO019_i_1), .B(rx_fifo_read_1), .Y(lOi11_0_Z) ); defparam lOi11_0.INIT=4'h8; // @28:479903 CFG3 un1_IoI11 ( .A(IoI11), .B(IIi11_Z), .C(lIi11_Z), .Y(un1_IoI11_Z) ); defparam un1_IoI11.INIT=8'hBA; // @28:481057 CFG4 oOi11 ( .A(N_1206), .B(lOi11_4_1z), .C(un1_ooiO1), .D(oOi11_1_Z), .Y(oOi11_2z) ); defparam oOi11.INIT=16'h8000; // @28:481038 CFG4 lOi11 ( .A(N_1206), .B(lOi11_4_1z), .C(un1_ooiO1), .D(lOi11_0_Z), .Y(lOi11_1z) ); defparam lOi11.INIT=16'h8000; // @28:481115 CFG4 loo11 ( .A(liO019_i_1), .B(loo11_1_Z), .C(un1_ooiO1), .D(tx_fifo_write_sig_0_sqmuxa_i_1), .Y(loo11_1z) ); defparam loo11.INIT=16'h8000; CFG4 un4_I1o11_4_RNI4IU79 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_5), .B(CoreAPB3_0_0_APBmslave0_PADDR_3), .C(un4_I1o11_4_1z), .D(un1_ooiO1), .Y(un4_I1o11_4_RNI4IU79_1z) ); defparam un4_I1o11_4_RNI4IU79.INIT=16'h1000; CFG4 un4_I1o11_4_RNI5JU79 ( .A(un4_I1o11_4_1z), .B(un1_ooiO1), .C(CoreAPB3_0_0_APBmslave0_PADDR_5), .D(paddr_0), .Y(un4_I1o11_4_RNI5JU79_Z) ); defparam un4_I1o11_4_RNI5JU79.INIT=16'h0008; // @28:480746 CFG4 O1o11_1 ( .A(un4_I1o11_2_Z), .B(un4_I1o11_4_RNI5JU79_Z), .C(PADDR_1z_0), .D(CoreAPB3_0_0_APBmslave0_PADDR_0), .Y(O1o11_1_Z) ); defparam O1o11_1.INIT=16'h0080; // @28:481019 CFG4 IOi11_1 ( .A(tx_fifo_write_sig_0_sqmuxa_i_1), .B(un4_I1o11_4_RNI5JU79_Z), .C(CoreAPB3_0_0_APBmslave0_PADDR_3), .D(PADDR_1z_0), .Y(IOi11_1_Z) ); defparam IOi11_1.INIT=16'h0080; // @28:480609 CFG4 llo11_1 ( .A(un1_PADDR_2), .B(un4_I1o11_4_RNI5JU79_Z), .C(CoreAPB3_0_0_APBmslave0_PADDR_0), .D(CoreAPB3_0_0_APBmslave0_PADDR_1), .Y(llo11_1_Z) ); defparam llo11_1.INIT=16'h0080; // @28:480804 CFG4 o1o11_1 ( .A(un4_Ooo11_1_1z), .B(un4_I1o11_4_RNI5JU79_Z), .C(CoreAPB3_0_0_APBmslave0_PADDR_3), .D(CoreAPB3_0_0_APBmslave0_PADDR_0), .Y(o1o11_1_Z) ); defparam o1o11_1.INIT=16'h0008; // @28:482768 CFG2 \un39_OOOI1[2] ( .A(lOi11_1z), .B(OoI11_0), .Y(un39_OOOI1_0) ); defparam \un39_OOOI1[2] .INIT=4'h8; // @28:482768 CFG2 \un39_OOOI1[11] ( .A(lOi11_1z), .B(OoI11_9), .Y(un39_OOOI1_9) ); defparam \un39_OOOI1[11] .INIT=4'h8; // @28:482768 CFG2 \un39_OOOI1[3] ( .A(lOi11_1z), .B(OoI11_1), .Y(un39_OOOI1_1) ); defparam \un39_OOOI1[3] .INIT=4'h8; // @28:480999 CFG2 ool11 ( .A(IOi11_1_Z), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .Y(ool11_1z) ); defparam ool11.INIT=4'h8; // @28:480726 CFG2 i0o11 ( .A(O1o11_1_Z), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .Y(i0o11_Z) ); defparam i0o11.INIT=4'h8; // @28:480746 CFG2 O1o11 ( .A(O1o11_1_Z), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .Y(O1o11_1z) ); defparam O1o11.INIT=4'h2; // @28:480902 CFG4 Iio11 ( .A(un5_l0iIo_2), .B(un4_I1o11_4_RNI5JU79_Z), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .D(un4_Oio11_1_Z), .Y(Iio11_1z) ); defparam Iio11.INIT=16'h0800; // @28:481019 CFG2 IOi11 ( .A(IOi11_1_Z), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .Y(IOi11_1z) ); defparam IOi11.INIT=4'h2; // @28:480629 CFG2 olo11 ( .A(llo11_1_Z), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .Y(olo11_1z) ); defparam olo11.INIT=4'h2; // @28:480609 CFG2 llo11 ( .A(llo11_1_Z), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .Y(llo11_Z) ); defparam llo11.INIT=4'h8; // @28:480707 CFG4 o0o11 ( .A(tx_fifo_write_sig_0_sqmuxa_i_1), .B(un4_I1o11_4_RNI5JU79_Z), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .D(un1_PADDR_2), .Y(o0o11_1z) ); defparam o0o11.INIT=16'h0800; // @28:480687 CFG4 l0o11 ( .A(tx_fifo_write_sig_0_sqmuxa_i_1), .B(un4_I1o11_4_RNI5JU79_Z), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .D(un1_PADDR_2), .Y(l0o11_Z) ); defparam l0o11.INIT=16'h8000; // @28:480785 CFG4 l1o11 ( .A(liO0110_i_1), .B(un4_I1o11_4_RNI5JU79_Z), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .D(un4_I1o11_2_Z), .Y(l1o11_1z) ); defparam l1o11.INIT=16'h0800; // @28:480765 CFG4 I1o11 ( .A(liO0110_i_1), .B(un4_I1o11_4_RNI5JU79_Z), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .D(un4_I1o11_2_Z), .Y(I1o11_Z) ); defparam I1o11.INIT=16'h8000; // @28:480824 CFG2 i1o11 ( .A(o1o11_1_Z), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .Y(i1o11_1z) ); defparam i1o11.INIT=4'h2; // @28:480941 CFG4 oio11 ( .A(N_82_2), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .C(un4_I1o11_4_RNI5JU79_Z), .D(un5_l0iIo_2), .Y(oio11_1z) ); defparam oio11.INIT=16'h2000; // @28:480921 CFG4 lio11 ( .A(N_82_2), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .C(un4_I1o11_4_RNI5JU79_Z), .D(un5_l0iIo_2), .Y(lio11_Z) ); defparam lio11.INIT=16'h8000; // @28:480804 CFG2 o1o11 ( .A(o1o11_1_Z), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .Y(o1o11_Z) ); defparam o1o11.INIT=4'h8; // @28:480882 CFG4 Oio11 ( .A(un5_l0iIo_2), .B(un4_I1o11_4_RNI5JU79_Z), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .D(un4_Oio11_1_Z), .Y(Oio11_Z) ); defparam Oio11.INIT=16'h8000; // @28:480863 CFG4 ioo11 ( .A(tx_fifo_write_sig_0_sqmuxa_i_1), .B(un4_I1o11_4_RNI5JU79_Z), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .D(N_1112), .Y(ioo11_2z) ); defparam ioo11.INIT=16'h0800; // @28:480843 CFG4 ooo11 ( .A(tx_fifo_write_sig_0_sqmuxa_i_1), .B(un4_I1o11_4_RNI5JU79_Z), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .D(N_1112), .Y(ooo11_Z) ); defparam ooo11.INIT=16'h8000; // @28:480570 CFG4 Olo11 ( .A(un1_PADDR_2), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .C(un4_I1o11_4_RNI5JU79_Z), .D(un1_IIOO1_1_2), .Y(Olo11_Z) ); defparam Olo11.INIT=16'h8000; // @28:480590 CFG4 Ilo11 ( .A(un1_PADDR_2), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .C(un4_I1o11_4_RNI5JU79_Z), .D(un1_IIOO1_1_2), .Y(Ilo11_1z) ); defparam Ilo11.INIT=16'h2000; // @28:481173 CFG4 ili11 ( .A(un1_IIOO1_2_1), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .C(un4_I1o11_4_RNI4IU79_1z), .D(un5_l0iIo_2), .Y(ili11_Z) ); defparam ili11.INIT=16'h8000; // @28:481193 CFG4 O0i11 ( .A(un1_IIOO1_2_1), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .C(un4_I1o11_4_RNI4IU79_1z), .D(un5_l0iIo_2), .Y(O0i11_1z) ); defparam O0i11.INIT=16'h2000; // @28:480980 CFG4 OOi11 ( .A(tx_fifo_write_sig14_i_1), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .C(un4_I1o11_4_RNI5JU79_Z), .D(tx_fifo_write_sig14_i_2), .Y(OOi11_1z) ); defparam OOi11.INIT=16'h2000; // @28:480960 CFG4 iio11 ( .A(tx_fifo_write_sig14_i_1), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .C(un4_I1o11_4_RNI5JU79_Z), .D(tx_fifo_write_sig14_i_2), .Y(iio11_Z) ); defparam iio11.INIT=16'h8000; // @28:481134 CFG4 lli11 ( .A(un5_l0iIo_1), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .C(un4_I1o11_4_RNI4IU79_1z), .D(un5_l0iIo_2), .Y(lli11_Z) ); defparam lli11.INIT=16'h8000; // @28:481154 CFG4 oli11 ( .A(un5_l0iIo_1), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .C(un4_I1o11_4_RNI4IU79_1z), .D(un5_l0iIo_2), .Y(oli11_1z) ); defparam oli11.INIT=16'h2000; // @28:480648 CFG3 O0o11 ( .A(un1_PADDR_3), .B(un4_I1o11_4_RNI5JU79_Z), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .Y(O0o11_Z) ); defparam O0o11.INIT=8'h80; // @28:480668 CFG3 I0o11 ( .A(un1_PADDR_3), .B(un4_I1o11_4_RNI5JU79_Z), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .Y(I0o11_1z) ); defparam I0o11.INIT=8'h08; // @28:481076 CFG4 Ooo11 ( .A(un4_Oio11_1_Z), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .C(un4_I1o11_4_RNI5JU79_Z), .D(un4_Ooo11_1_1z), .Y(Ooo11_Z) ); defparam Ooo11.INIT=16'h8000; // @28:481096 CFG4 Ioo11 ( .A(un4_Oio11_1_Z), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .C(un4_I1o11_4_RNI5JU79_Z), .D(un4_Ooo11_1_1z), .Y(Ioo11_1z) ); defparam Ioo11.INIT=16'h2000; // @28:482628 CFG2 \un8_OOOI1[31] ( .A(oli11_1z), .B(oIOI1[7]), .Y(un8_OOOI1_15) ); defparam \un8_OOOI1[31] .INIT=4'h8; // @28:482788 CFG3 \un45_OOOI1[10] ( .A(CoreAPB3_0_0_APBmslave0_PWRITE), .B(IOi11_1_Z), .C(iol11_1z[10]), .Y(un45_OOOI1_0) ); defparam \un45_OOOI1[10] .INIT=8'h40; // @28:483003 CFG2 \un103_OOOI1[5] ( .A(o0o11_1z), .B(iIl11[5]), .Y(un103_OOOI1_0) ); defparam \un103_OOOI1[5] .INIT=4'h8; // @28:482628 CFG2 \un8_OOOI1[16] ( .A(oli11_1z), .B(oIOI1[8]), .Y(un8_OOOI1_0) ); defparam \un8_OOOI1[16] .INIT=4'h8; // @28:482628 CFG2 \un8_OOOI1[21] ( .A(oli11_1z), .B(oIOI1[13]), .Y(un8_OOOI1_5) ); defparam \un8_OOOI1[21] .INIT=4'h8; // @28:482788 CFG3 \un45_OOOI1[13] ( .A(CoreAPB3_0_0_APBmslave0_PWRITE), .B(IOi11_1_Z), .C(iol11_1z[13]), .Y(un45_OOOI1_3) ); defparam \un45_OOOI1[13] .INIT=8'h40; // @28:483003 CFG2 \un103_OOOI1[8] ( .A(o0o11_1z), .B(NN_1), .Y(un103_OOOI1_3) ); defparam \un103_OOOI1[8] .INIT=4'h8; // @28:483003 CFG2 \un103_OOOI1[7] ( .A(o0o11_1z), .B(NN_2), .Y(un103_OOOI1_2) ); defparam \un103_OOOI1[7] .INIT=4'h8; // @28:482628 CFG2 \un8_OOOI1[26] ( .A(oli11_1z), .B(oIOI1[2]), .Y(un8_OOOI1_10) ); defparam \un8_OOOI1[26] .INIT=4'h8; // @28:482601 CFG2 \un1_OOOI1[19] ( .A(O0i11_1z), .B(oIOI1[43]), .Y(un1_OOOI1_0) ); defparam \un1_OOOI1[19] .INIT=4'h8; // @28:483049 CFG4 \un112_OOOI1[20] ( .A(un1_PADDR_3), .B(un4_I1o11_4_RNI5JU79_Z), .C(oIl11[4]), .D(CoreAPB3_0_0_APBmslave0_PWRITE), .Y(un112_OOOI1_0) ); defparam \un112_OOOI1[20] .INIT=16'h0080; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEHST_1s_26s */ module CTSE_PECAR_26s_1s ( IO011, iil11, oil11, lil11, OO011, III11, OI011, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i, PF_IOD_CDR_CCC_C0_0_TX_CLK_G, iIli0_i, PF_IOD_CDR_C0_0_RX_CLK_R, Olli0_i, iO011_i, OIlI1_i, iOlI1_i, oO011_i ) ; input IO011 ; input iil11 ; input oil11 ; input lil11 ; input OO011 ; input III11 ; output OI011 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; input iIli0_i ; input PF_IOD_CDR_C0_0_RX_CLK_R ; input Olli0_i ; output iO011_i ; output OIlI1_i ; output iOlI1_i ; output oO011_i ; wire IO011 ; wire iil11 ; wire oil11 ; wire lil11 ; wire OO011 ; wire III11 ; wire OI011 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire iIli0_i ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire Olli0_i ; wire iO011_i ; wire OIlI1_i ; wire iOlI1_i ; wire oO011_i ; wire oO011 ; wire iOlI1 ; wire OIlI1 ; wire iO011 ; wire srrmc_1_Z ; wire GND ; wire lo111_Z ; wire VCC ; wire srtmc_1_Z ; wire Oo111_Z ; wire Ii111_Z ; wire Ii111_2_Z ; wire io111_Z ; wire io111_2_Z ; wire lo111_2_Z ; wire Oo111_2_Z ; wire i1111_2_Z ; wire srrfn_1_Z ; wire srtfn_1_Z ; CFG1 Io111_4_RNI15E55 ( .A(oO011), .Y(oO011_i) ); defparam Io111_4_RNI15E55.INIT=2'h1; CFG1 Oi111_4_RNI1BC23 ( .A(iOlI1), .Y(iOlI1_i) ); defparam Oi111_4_RNI1BC23.INIT=2'h1; CFG1 li111_4_RNIUP4K ( .A(OIlI1), .Y(OIlI1_i) ); defparam li111_4_RNIUP4K.INIT=2'h1; CFG1 oo111_4_RNI7AFF7 ( .A(iO011), .Y(iO011_i) ); defparam oo111_4_RNI7AFF7.INIT=2'h1; // @28:478138 (* cdc_synchronizer=1 *) SLE srrmc_1 ( .Q(srrmc_1_Z), .ADn(GND), .ALn(Olli0_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lo111_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:478046 (* cdc_synchronizer=1 *) SLE srtmc_1 ( .Q(srtmc_1_Z), .ADn(GND), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Oo111_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:478290 (* cdc_synchronizer=1 *) SLE Ii111 ( .Q(Ii111_Z), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ii111_2_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:478198 (* cdc_synchronizer=1 *) SLE io111 ( .Q(io111_Z), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(io111_2_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:478106 (* cdc_synchronizer=1 *) SLE lo111 ( .Q(lo111_Z), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lo111_2_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:478014 (* cdc_synchronizer=1 *) SLE Oo111 ( .Q(Oo111_Z), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Oo111_2_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477982 SLE i1111 ( .Q(OI011), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(i1111_2_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:478352 (* cdc_synchronizer=1 *) SLE li111 ( .Q(OIlI1), .ADn(GND), .ALn(Olli0_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(srrfn_1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:478260 (* cdc_synchronizer=1 *) SLE Oi111 ( .Q(iOlI1), .ADn(GND), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(srtfn_1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:478168 (* cdc_synchronizer=1 *) SLE oo111 ( .Q(iO011), .ADn(GND), .ALn(Olli0_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(srrmc_1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:478076 (* cdc_synchronizer=1 *) SLE Io111 ( .Q(oO011), .ADn(GND), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(srtmc_1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:478322 (* cdc_synchronizer=1 *) SLE srrfn_1 ( .Q(srrfn_1_Z), .ADn(GND), .ALn(Olli0_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Ii111_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:478230 (* cdc_synchronizer=1 *) SLE srtfn_1 ( .Q(srtfn_1_Z), .ADn(GND), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(io111_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:478134 CFG2 lo111_2 ( .A(III11), .B(OO011), .Y(lo111_2_Z) ); defparam lo111_2.INIT=4'hE; // @28:478226 CFG2 io111_2 ( .A(III11), .B(lil11), .Y(io111_2_Z) ); defparam io111_2.INIT=4'hE; // @28:478318 CFG2 Ii111_2 ( .A(III11), .B(oil11), .Y(Ii111_2_Z) ); defparam Ii111_2.INIT=4'hE; // @28:478042 CFG2 Oo111_2 ( .A(III11), .B(iil11), .Y(Oo111_2_Z) ); defparam Oo111_2.INIT=4'hE; // @28:478010 CFG2 i1111_2 ( .A(III11), .B(IO011), .Y(i1111_2_Z) ); defparam i1111_2.INIT=4'hE; //@28:478352 //@28:478260 //@28:478168 //@28:478076 GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PECAR_26s_1s */ module CTSE_PE_MCXMAC_26s_0_0s_0s ( wrdata_0, ooIO1, lIl11_1z, IIl11_1z, O0l11, oIl11_1z, iIl11_2z_0, iIl11_2z_1, iIl11_2z_2, iIl11_2z_3, iIl11_2z_4, iIl11_2z_6, iIl11_2z_9, CoreAPB3_0_0_APBmslave0_PWDATA, PADDR_0, CoreAPB3_0_0_APBmslave0_PADDR_1, CoreAPB3_0_0_APBmslave0_PADDR_3, CoreAPB3_0_0_APBmslave0_PADDR_0, CoreAPB3_0_0_APBmslave0_PADDR_5, CoreAPB3_0_0_APBmslave0_PADDR_6, CoreAPB3_0_0_APBmslave0_PADDR_7, paddr_1z_0, un39_OOOI1_0, un39_OOOI1_9, un39_OOOI1_1, un45_OOOI1_0, un45_OOOI1_3, un103_OOOI1_0, un103_OOOI1_3, un103_OOOI1_2, un8_OOOI1_15, un8_OOOI1_0, un8_OOOI1_5, un8_OOOI1_10, un1_OOOI1_0, un112_OOOI1_0, oIOI1, IioO1_1z, oiI11_1z, I0l11_1z, l0l11, Oll11, OOlI1, O1iO1_1z, Oi0i0_1z, ii0i0_1z, OoiO1_3z, o0iO1_1z, lliO1, OoI11_3z, Iol11_1z, lol11_1z, iol11_2z, o1l11_1z, OOl11_2z, o0il1, Olli0_i, iIli0_i, hstrst_i, loo11, o1II1, oiII1, olOI1, IO011, IiII1, OlOI1_1z, i1II1, iIOI1, l1II1, lO011, liII1, lil11, oil11, III11, IoOI1, iOi11, OO011, iil11, un4_Ooo11_1, lOi11_4, N_1112, un4_I1o11_4, CoreAPB3_0_0_APBmslave0_PWRITE, liO0110_i_1, liO019_i_1, rx_fifo_read_1, N_1206, un1_ooiO1, oOi11, lOi11, tx_fifo_write_sig_0_sqmuxa_i_1, un4_I1o11_4_RNI4IU79, un1_PADDR_2, O1o11, un5_l0iIo_2, Iio11, IOi11_1z, olo11, o0o11, l1o11, i1o11, N_82_2, oio11, ioo11, un1_IIOO1_1_2, Ilo11, un1_IIOO1_2_1, O0i11, tx_fifo_write_sig14_i_1, tx_fifo_write_sig14_i_2, OOi11_1z, un5_l0iIo_1, oli11, un1_PADDR_3, I0o11, Ioo11_1z, li0i0, Ol1i0, OO1i0, IOiO1, oOiO1_1z, iOiO1_1z, lOiO1, OOiO1_2z, iIl0112, IliO1, iIiO1, oIiO1, IIiO1_1z, ooI11_2z, PF_IOD_CDR_CCC_C0_0_TX_CLK_G, OIl11_2z, lll11, lioO1, l1l11, liI11, iioO1, oioO1, lOl11, oOl11, IOI11_2z, o0l11_1z, Ill11, ilo11_1z, iiOI1_1z, ill11_1z, l1I11, Ii0i0, i1_i_12, i0iO1, O1l11, lO1i0, IO1i0, iOlI1_i, iOl11, oi0i0, I1I11, o1iO1, IoiO1_2z, i1iO1, i0l11, PF_IOD_CDR_C0_0_RX_CLK_R, OIlI1_i, IiI11_1z, OiI11, ioI11_3z, I1iO1_1z, O0iO1, l0iO1, oliO1, iliO1_1z, loI11_1z, i1I11_1z, iI1i0, PHY_MDC_c, CORETSE_0_MDOEN, CORETSE_0_MDO, OOOO1, Iil11_3z, Oil11_3z, Ool11_1z, i1l11, PF_CCC_0_0_OUT0_FABCLK_0 ) ; input wrdata_0 ; output [1:0] ooIO1 ; output [6:0] lIl11_1z ; output [6:0] IIl11_1z ; output [7:0] O0l11 ; output [6:0] oIl11_1z ; output iIl11_2z_0 ; output iIl11_2z_1 ; output iIl11_2z_2 ; output iIl11_2z_3 ; output iIl11_2z_4 ; output iIl11_2z_6 ; output iIl11_2z_9 ; input [31:1] CoreAPB3_0_0_APBmslave0_PWDATA ; input PADDR_0 ; input CoreAPB3_0_0_APBmslave0_PADDR_1 ; input CoreAPB3_0_0_APBmslave0_PADDR_3 ; input CoreAPB3_0_0_APBmslave0_PADDR_0 ; input CoreAPB3_0_0_APBmslave0_PADDR_5 ; input CoreAPB3_0_0_APBmslave0_PADDR_6 ; input CoreAPB3_0_0_APBmslave0_PADDR_7 ; input paddr_1z_0 ; output un39_OOOI1_0 ; output un39_OOOI1_9 ; output un39_OOOI1_1 ; output un45_OOOI1_0 ; output un45_OOOI1_3 ; output un103_OOOI1_0 ; output un103_OOOI1_3 ; output un103_OOOI1_2 ; output un8_OOOI1_15 ; output un8_OOOI1_0 ; output un8_OOOI1_5 ; output un8_OOOI1_10 ; output un1_OOOI1_0 ; output un112_OOOI1_0 ; output [47:0] oIOI1 ; input [7:0] IioO1_1z ; output [15:0] oiI11_1z ; output [3:0] I0l11_1z ; output [3:0] l0l11 ; output [3:0] Oll11 ; output [15:0] OOlI1 ; output [51:0] O1iO1_1z ; output [7:0] Oi0i0_1z ; input [7:0] ii0i0_1z ; output [8:2] OoiO1_3z ; output [32:0] o0iO1_1z ; output [7:0] lliO1 ; output [15:0] OoI11_3z ; output [4:0] Iol11_1z ; output [4:0] lol11_1z ; output [15:0] iol11_2z ; output [2:0] o1l11_1z ; output [15:0] OOl11_2z ; input [2:0] o0il1 ; input Olli0_i ; input iIli0_i ; input hstrst_i ; output loo11 ; output o1II1 ; output oiII1 ; output olOI1 ; output IO011 ; output IiII1 ; output OlOI1_1z ; output i1II1 ; output iIOI1 ; output l1II1 ; output lO011 ; output liII1 ; output lil11 ; output oil11 ; output III11 ; output IoOI1 ; output iOi11 ; output OO011 ; output iil11 ; output un4_Ooo11_1 ; output lOi11_4 ; output N_1112 ; output un4_I1o11_4 ; input CoreAPB3_0_0_APBmslave0_PWRITE ; input liO0110_i_1 ; input liO019_i_1 ; input rx_fifo_read_1 ; input N_1206 ; input un1_ooiO1 ; output oOi11 ; output lOi11 ; input tx_fifo_write_sig_0_sqmuxa_i_1 ; output un4_I1o11_4_RNI4IU79 ; input un1_PADDR_2 ; output O1o11 ; input un5_l0iIo_2 ; output Iio11 ; output IOi11_1z ; output olo11 ; output o0o11 ; output l1o11 ; output i1o11 ; input N_82_2 ; output oio11 ; output ioo11 ; input un1_IIOO1_1_2 ; output Ilo11 ; input un1_IIOO1_2_1 ; output O0i11 ; input tx_fifo_write_sig14_i_1 ; input tx_fifo_write_sig14_i_2 ; output OOi11_1z ; input un5_l0iIo_1 ; output oli11 ; input un1_PADDR_3 ; output I0o11 ; output Ioo11_1z ; output li0i0 ; output Ol1i0 ; input OO1i0 ; input IOiO1 ; input oOiO1_1z ; input iOiO1_1z ; input lOiO1 ; input OOiO1_2z ; input iIl0112 ; output IliO1 ; output iIiO1 ; output oIiO1 ; output IIiO1_1z ; output ooI11_2z ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; output OIl11_2z ; output lll11 ; input lioO1 ; output l1l11 ; output liI11 ; input iioO1 ; input oioO1 ; output lOl11 ; output oOl11 ; output IOI11_2z ; output o0l11_1z ; output Ill11 ; output ilo11_1z ; input iiOI1_1z ; output ill11_1z ; output l1I11 ; output Ii0i0 ; output i1_i_12 ; output i0iO1 ; output O1l11 ; input lO1i0 ; input IO1i0 ; output iOlI1_i ; output iOl11 ; input oi0i0 ; output I1I11 ; output o1iO1 ; output IoiO1_2z ; output i1iO1 ; output i0l11 ; input PF_IOD_CDR_C0_0_RX_CLK_R ; output OIlI1_i ; output IiI11_1z ; output OiI11 ; output ioI11_3z ; output I1iO1_1z ; output O0iO1 ; output l0iO1 ; output oliO1 ; output iliO1_1z ; output loI11_1z ; output i1I11_1z ; output iI1i0 ; output PHY_MDC_c ; output CORETSE_0_MDOEN ; output CORETSE_0_MDO ; input OOOO1 ; output Iil11_3z ; output Oil11_3z ; output Ool11_1z ; output i1l11 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; wire wrdata_0 ; wire iIl11_2z_0 ; wire iIl11_2z_1 ; wire iIl11_2z_2 ; wire iIl11_2z_3 ; wire iIl11_2z_4 ; wire iIl11_2z_6 ; wire iIl11_2z_9 ; wire PADDR_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_1 ; wire CoreAPB3_0_0_APBmslave0_PADDR_3 ; wire CoreAPB3_0_0_APBmslave0_PADDR_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_5 ; wire CoreAPB3_0_0_APBmslave0_PADDR_6 ; wire CoreAPB3_0_0_APBmslave0_PADDR_7 ; wire paddr_1z_0 ; wire un39_OOOI1_0 ; wire un39_OOOI1_9 ; wire un39_OOOI1_1 ; wire un45_OOOI1_0 ; wire un45_OOOI1_3 ; wire un103_OOOI1_0 ; wire un103_OOOI1_3 ; wire un103_OOOI1_2 ; wire un8_OOOI1_15 ; wire un8_OOOI1_0 ; wire un8_OOOI1_5 ; wire un8_OOOI1_10 ; wire un1_OOOI1_0 ; wire un112_OOOI1_0 ; wire Olli0_i ; wire iIli0_i ; wire hstrst_i ; wire loo11 ; wire o1II1 ; wire oiII1 ; wire olOI1 ; wire IO011 ; wire IiII1 ; wire OlOI1_1z ; wire i1II1 ; wire iIOI1 ; wire l1II1 ; wire lO011 ; wire liII1 ; wire lil11 ; wire oil11 ; wire III11 ; wire IoOI1 ; wire iOi11 ; wire OO011 ; wire iil11 ; wire un4_Ooo11_1 ; wire lOi11_4 ; wire N_1112 ; wire un4_I1o11_4 ; wire CoreAPB3_0_0_APBmslave0_PWRITE ; wire liO0110_i_1 ; wire liO019_i_1 ; wire rx_fifo_read_1 ; wire N_1206 ; wire un1_ooiO1 ; wire oOi11 ; wire lOi11 ; wire tx_fifo_write_sig_0_sqmuxa_i_1 ; wire un4_I1o11_4_RNI4IU79 ; wire un1_PADDR_2 ; wire O1o11 ; wire un5_l0iIo_2 ; wire Iio11 ; wire IOi11_1z ; wire olo11 ; wire o0o11 ; wire l1o11 ; wire i1o11 ; wire N_82_2 ; wire oio11 ; wire ioo11 ; wire un1_IIOO1_1_2 ; wire Ilo11 ; wire un1_IIOO1_2_1 ; wire O0i11 ; wire tx_fifo_write_sig14_i_1 ; wire tx_fifo_write_sig14_i_2 ; wire OOi11_1z ; wire un5_l0iIo_1 ; wire oli11 ; wire un1_PADDR_3 ; wire I0o11 ; wire Ioo11_1z ; wire li0i0 ; wire Ol1i0 ; wire OO1i0 ; wire IOiO1 ; wire oOiO1_1z ; wire iOiO1_1z ; wire lOiO1 ; wire OOiO1_2z ; wire iIl0112 ; wire IliO1 ; wire iIiO1 ; wire oIiO1 ; wire IIiO1_1z ; wire ooI11_2z ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire OIl11_2z ; wire lll11 ; wire lioO1 ; wire l1l11 ; wire liI11 ; wire iioO1 ; wire oioO1 ; wire lOl11 ; wire oOl11 ; wire IOI11_2z ; wire o0l11_1z ; wire Ill11 ; wire ilo11_1z ; wire iiOI1_1z ; wire ill11_1z ; wire l1I11 ; wire Ii0i0 ; wire i1_i_12 ; wire i0iO1 ; wire O1l11 ; wire lO1i0 ; wire IO1i0 ; wire iOlI1_i ; wire iOl11 ; wire oi0i0 ; wire I1I11 ; wire o1iO1 ; wire IoiO1_2z ; wire i1iO1 ; wire i0l11 ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire OIlI1_i ; wire IiI11_1z ; wire OiI11 ; wire ioI11_3z ; wire I1iO1_1z ; wire O0iO1 ; wire l0iO1 ; wire oliO1 ; wire iliO1_1z ; wire loI11_1z ; wire i1I11_1z ; wire iI1i0 ; wire PHY_MDC_c ; wire CORETSE_0_MDOEN ; wire CORETSE_0_MDO ; wire OOOO1 ; wire Iil11_3z ; wire Oil11_3z ; wire Ool11_1z ; wire i1l11 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire [15:0] iiI11_Z; wire [13:10] iol11; wire [11:2] OoI11; wire [4:0] ol011; wire [5:5] iIl11; wire [4:4] oIl11; wire ool11 ; wire OI011 ; wire il011 ; wire IoI11 ; wire N_15013 ; wire N_15014 ; wire N_15015 ; wire N_15016 ; wire N_15017 ; wire N_15018 ; wire N_15019 ; wire iO011_i ; wire oll11 ; wire oO011_i ; wire N_15020 ; wire N_15021 ; wire GND ; wire VCC ; // @28:473144 CFG4 \iiI11[1] ( .A(o0il1[2]), .B(o0il1[1]), .C(OOl11_2z[1]), .D(o0il1[0]), .Y(iiI11_Z[1]) ); defparam \iiI11[1] .INIT=16'hF0E0; // @28:473144 CFG4 \iiI11[2] ( .A(o0il1[2]), .B(o0il1[1]), .C(OOl11_2z[2]), .D(o0il1[0]), .Y(iiI11_Z[2]) ); defparam \iiI11[2] .INIT=16'hF0E0; // @28:473144 CFG4 \iiI11[3] ( .A(o0il1[2]), .B(o0il1[1]), .C(OOl11_2z[3]), .D(o0il1[0]), .Y(iiI11_Z[3]) ); defparam \iiI11[3] .INIT=16'hF0E0; // @28:473144 CFG4 \iiI11[7] ( .A(o0il1[2]), .B(o0il1[1]), .C(OOl11_2z[7]), .D(o0il1[0]), .Y(iiI11_Z[7]) ); defparam \iiI11[7] .INIT=16'hF0E0; // @28:473144 CFG4 \iiI11[9] ( .A(o0il1[2]), .B(o0il1[1]), .C(OOl11_2z[9]), .D(o0il1[0]), .Y(iiI11_Z[9]) ); defparam \iiI11[9] .INIT=16'hF0E0; // @28:473144 CFG4 \iiI11[10] ( .A(o0il1[2]), .B(o0il1[1]), .C(OOl11_2z[10]), .D(o0il1[0]), .Y(iiI11_Z[10]) ); defparam \iiI11[10] .INIT=16'hF0E0; // @28:473144 CFG4 \iiI11[11] ( .A(o0il1[2]), .B(o0il1[1]), .C(OOl11_2z[11]), .D(o0il1[0]), .Y(iiI11_Z[11]) ); defparam \iiI11[11] .INIT=16'hF0E0; // @28:473144 CFG4 \iiI11[15] ( .A(o0il1[2]), .B(o0il1[1]), .C(OOl11_2z[15]), .D(o0il1[0]), .Y(iiI11_Z[15]) ); defparam \iiI11[15] .INIT=16'hF0E0; // @28:473144 CFG4 \iiI11[13] ( .A(o0il1[2]), .B(o0il1[1]), .C(OOl11_2z[13]), .D(o0il1[0]), .Y(iiI11_Z[13]) ); defparam \iiI11[13] .INIT=16'hF0E0; // @28:473144 CFG4 \iiI11[5] ( .A(o0il1[2]), .B(o0il1[1]), .C(OOl11_2z[5]), .D(o0il1[0]), .Y(iiI11_Z[5]) ); defparam \iiI11[5] .INIT=16'hF0E0; // @28:473144 CFG4 \iiI11[6] ( .A(o0il1[2]), .B(o0il1[1]), .C(OOl11_2z[6]), .D(o0il1[0]), .Y(iiI11_Z[6]) ); defparam \iiI11[6] .INIT=16'hF0E0; // @28:473144 CFG4 \iiI11[14] ( .A(o0il1[2]), .B(o0il1[1]), .C(OOl11_2z[14]), .D(o0il1[0]), .Y(iiI11_Z[14]) ); defparam \iiI11[14] .INIT=16'hF0E0; // @28:473144 CFG4 \iiI11[12] ( .A(o0il1[2]), .B(o0il1[1]), .C(OOl11_2z[12]), .D(o0il1[0]), .Y(iiI11_Z[12]) ); defparam \iiI11[12] .INIT=16'hF0E0; // @28:473144 CFG4 \iiI11[4] ( .A(o0il1[2]), .B(o0il1[1]), .C(OOl11_2z[4]), .D(o0il1[0]), .Y(iiI11_Z[4]) ); defparam \iiI11[4] .INIT=16'hF0E0; // @28:473144 CFG4 \iiI11[8] ( .A(o0il1[2]), .B(o0il1[1]), .C(OOl11_2z[8]), .D(o0il1[0]), .Y(iiI11_Z[8]) ); defparam \iiI11[8] .INIT=16'hF0E0; // @28:473144 CFG4 \iiI11[0] ( .A(o0il1[2]), .B(o0il1[1]), .C(OOl11_2z[0]), .D(o0il1[0]), .Y(iiI11_Z[0]) ); defparam \iiI11[0] .INIT=16'hF0E0; // @28:473813 CTSE_PEMGT_1s_26s CTSE_PEMGT_1 ( .OlII1(PF_CCC_0_0_OUT0_FABCLK_0), .o1l11(o1l11_1z[2:0]), .i1l11(i1l11), .Ool11(Ool11_1z), .iol11({iol11_2z[15:14], iol11[13], iol11_2z[12:11], iol11[10], iol11_2z[9:0]}), .lol11(lol11_1z[4:0]), .Iol11(Iol11_1z[4:0]), .ll011(ool11), .Oil11(Oil11_3z), .Iil11(Iil11_3z), .ioIO1(OOOO1), .OI011(OI011), .OiIO1(CORETSE_0_MDO), .IiIO1(CORETSE_0_MDOEN), .mdc(PHY_MDC_c), .loII1(iI1i0), .i1I11(i1I11_1z), .OoI11({OoI11_3z[15:12], OoI11[11], OoI11_3z[10:4], OoI11[3:2], OoI11_3z[1:0]}), .ol011(ol011[4:0]), .il011(il011), .IoI11(IoI11), .loI11(loI11_1z) ); // @28:473213 CTSE_PE_MCXMAC_CORE_26s_0_0s_0s CTSE_PE_MCXMAC_CORE_1 ( .lliO1(lliO1[7:0]), .o0iO1_1z(o0iO1_1z[32:0]), .OoiO1(OoiO1_3z[8:2]), .ii0i0(ii0i0_1z[7:0]), .O0l11(O0l11[7:2]), .Oi0i0_1z(Oi0i0_1z[7:0]), .O1iO1_1z({O1iO1_1z[51], N_15019, N_15018, O1iO1_1z[48:32], N_15017, N_15016, O1iO1_1z[29:24], N_15015, N_15014, N_15013, O1iO1_1z[20:0]}), .OOlI1(OOlI1[15:0]), .ooIO1_1z_0(ooIO1[1]), .Oll11_1z(Oll11[3:0]), .l0l11(l0l11[3:0]), .iIl11({iIl11[5], iIl11_2z_4, iIl11_2z_3, iIl11_2z_2, iIl11_2z_1, iIl11_2z_0}), .lIl11(lIl11_1z[6:2]), .I0l11_1z(I0l11_1z[3:0]), .oIl11_1z({oIl11_1z[6:5], oIl11[4], oIl11_1z[3:2]}), .IIl11_1z(IIl11_1z[6:2]), .oiI11_1z(oiI11_1z[15:0]), .IioO1_1z(IioO1_1z[7:0]), .oIOI1(oIOI1[47:0]), .iiI11_1z(iiI11_Z[15:0]), .iliO1(iliO1_1z), .iO011_i(iO011_i), .oliO1(oliO1), .l0iO1(l0iO1), .O0iO1(O0iO1), .I1iO1(I1iO1_1z), .ioI11(ioI11_3z), .OiI11(OiI11), .IiI11(IiI11_1z), .OIlI1_i(OIlI1_i), .PF_IOD_CDR_C0_0_RX_CLK_R(PF_IOD_CDR_C0_0_RX_CLK_R), .i0l11(i0l11), .i1iO1_1z(i1iO1), .IoiO1(IoiO1_2z), .o1iO1(o1iO1), .I1I11(I1I11), .oi0i0(oi0i0), .iOl11(iOl11), .iOlI1_i(iOlI1_i), .IO1i0(IO1i0), .lO1i0(lO1i0), .O1l11(O1l11), .i0iO1(i0iO1), .i1_i_12(i1_i_12), .Ii0i0_1z(Ii0i0), .l1I11(l1I11), .ill11(ill11_1z), .iiOI1(iiOI1_1z), .ilo11(ilo11_1z), .Ill11_1z(Ill11), .o0l11_1z(o0l11_1z), .IOI11_1z(IOI11_2z), .oOl11(oOl11), .lOl11(lOl11), .oioO1(oioO1), .iioO1(iioO1), .liI11(liI11), .l1l11(l1l11), .lioO1(lioO1), .lll11(lll11), .OIl11(OIl11_2z), .oll11(oll11), .oO011_i(oO011_i), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .ooI11(ooI11_2z), .IIiO1(IIiO1_1z), .oIiO1(oIiO1), .iIiO1_1z(iIiO1), .IliO1_1z(IliO1), .iIl0112(iIl0112), .OOiO1_2z(OOiO1_2z), .lOiO1(lOiO1), .iOiO1_1z(iOiO1_1z), .oOiO1_3z(oOiO1_1z), .IOiO1_2z(IOiO1), .OO1i0(OO1i0), .Ol1i0(Ol1i0), .li0i0(li0i0) ); // @28:473955 CTSE_PEHST_1s_26s CTSE_PEHST_1 ( .un112_OOOI1_0(un112_OOOI1_0), .un1_OOOI1_0(un1_OOOI1_0), .un8_OOOI1_15(un8_OOOI1_15), .un8_OOOI1_0(un8_OOOI1_0), .un8_OOOI1_5(un8_OOOI1_5), .un8_OOOI1_10(un8_OOOI1_10), .un103_OOOI1_0(un103_OOOI1_0), .un103_OOOI1_3(un103_OOOI1_3), .un103_OOOI1_2(un103_OOOI1_2), .un45_OOOI1_0(un45_OOOI1_0), .un45_OOOI1_3(un45_OOOI1_3), .un39_OOOI1_0(un39_OOOI1_0), .un39_OOOI1_9(un39_OOOI1_9), .un39_OOOI1_1(un39_OOOI1_1), .OoI11_0(OoI11[2]), .OoI11_9(OoI11[11]), .OoI11_1(OoI11[3]), .paddr_0(paddr_1z_0), .CoreAPB3_0_0_APBmslave0_PADDR_1(CoreAPB3_0_0_APBmslave0_PADDR_1), .CoreAPB3_0_0_APBmslave0_PADDR_3(CoreAPB3_0_0_APBmslave0_PADDR_3), .CoreAPB3_0_0_APBmslave0_PADDR_0(CoreAPB3_0_0_APBmslave0_PADDR_0), .CoreAPB3_0_0_APBmslave0_PADDR_5(CoreAPB3_0_0_APBmslave0_PADDR_5), .CoreAPB3_0_0_APBmslave0_PADDR_6(CoreAPB3_0_0_APBmslave0_PADDR_6), .CoreAPB3_0_0_APBmslave0_PADDR_7(CoreAPB3_0_0_APBmslave0_PADDR_7), .PADDR_1z_0(PADDR_0), .oIOI1(oIOI1[47:0]), .lol11(lol11_1z[4:0]), .Iol11(Iol11_1z[4:0]), .o1l11(o1l11_1z[2:0]), .iol11_1z({iol11_2z[15:14], iol11[13], iol11_2z[12:11], iol11[10], iol11_2z[9:0]}), .Oll11(Oll11[3:0]), .oiI11(oiI11_1z[15:0]), .OOl11(OOl11_2z[15:0]), .OOlI1(OOlI1[15:0]), .l0l11(l0l11[3:0]), .CoreAPB3_0_0_APBmslave0_PWDATA(CoreAPB3_0_0_APBmslave0_PWDATA[31:1]), .iIl11({iIl11_2z_9, N_15021, N_15020, iIl11_2z_6, iIl11[5], iIl11_2z_4, iIl11_2z_3, iIl11_2z_2, iIl11_2z_1, iIl11_2z_0}), .oIl11({oIl11_1z[6:5], oIl11[4], oIl11_1z[3:0]}), .O0l11(O0l11[7:0]), .IIl11_1z(IIl11_1z[6:0]), .lIl11(lIl11_1z[6:0]), .ooIO1(ooIO1[1:0]), .I0l11(I0l11_1z[3:0]), .wrdata_0(wrdata_0), .Ioo11_1z(Ioo11_1z), .I0o11_1z(I0o11), .un1_PADDR_3(un1_PADDR_3), .oli11_1z(oli11), .un5_l0iIo_1(un5_l0iIo_1), .OOi11_1z(OOi11_1z), .tx_fifo_write_sig14_i_2(tx_fifo_write_sig14_i_2), .tx_fifo_write_sig14_i_1(tx_fifo_write_sig14_i_1), .O0i11_1z(O0i11), .un1_IIOO1_2_1(un1_IIOO1_2_1), .Ilo11_1z(Ilo11), .un1_IIOO1_1_2(un1_IIOO1_1_2), .ioo11_2z(ioo11), .oio11_1z(oio11), .N_82_2(N_82_2), .i1o11_1z(i1o11), .l1o11_1z(l1o11), .o0o11_1z(o0o11), .olo11_1z(olo11), .IOi11_1z(IOi11_1z), .Iio11_1z(Iio11), .un5_l0iIo_2(un5_l0iIo_2), .O1o11_1z(O1o11), .un1_PADDR_2(un1_PADDR_2), .un4_I1o11_4_RNI4IU79_1z(un4_I1o11_4_RNI4IU79), .tx_fifo_write_sig_0_sqmuxa_i_1(tx_fifo_write_sig_0_sqmuxa_i_1), .lOi11_1z(lOi11), .oOi11_2z(oOi11), .un1_ooiO1(un1_ooiO1), .N_1206(N_1206), .rx_fifo_read_1(rx_fifo_read_1), .liO019_i_1(liO019_i_1), .liO0110_i_1(liO0110_i_1), .CoreAPB3_0_0_APBmslave0_PWRITE(CoreAPB3_0_0_APBmslave0_PWRITE), .un4_I1o11_4_1z(un4_I1o11_4), .N_1112(N_1112), .lOi11_4_1z(lOi11_4), .un4_Ooo11_1_1z(un4_Ooo11_1), .oll11_1z(oll11), .iiOI1(iiOI1_1z), .ool11_1z(ool11), .l1l11_1z(l1l11), .ioI11_2z(ioI11_3z), .iil11_2z(iil11), .i0l11_1z(i0l11), .OO011_1z(OO011), .O1l11_1z(O1l11), .Ol1i0(Ol1i0), .IoI11(IoI11), .iOi11_3z(iOi11), .IiI11_1z(IiI11_1z), .lll11_1z(lll11), .o0l11_1z(o0l11_1z), .ill11_1z(ill11_1z), .Ill11_2z(Ill11), .oOl11_2z(oOl11), .lOl11_1z(lOl11), .iOl11_2z(iOl11), .OIl11_1z(OIl11_2z), .IoOI1_1z(IoOI1), .IOI11_4z(IOI11_2z), .III11_2z(III11), .ooI11_3z(ooI11_2z), .oil11_2z(oil11), .lil11_1z(lil11), .liII1_1z(liII1), .lO011_1z(lO011), .l1II1_1z(l1II1), .iIOI1_1z(iIOI1), .i1II1_1z(i1II1), .OlOI1_1z(OlOI1_1z), .IiII1_1z(IiII1), .Oil11_3z(Oil11_3z), .Iil11_3z(Iil11_3z), .i1l11_1z(i1l11), .Ool11_3z(Ool11_1z), .IO011_1z(IO011), .liI11_1z(liI11), .ilo11_2z(ilo11_1z), .OiI11_1z(OiI11), .olOI1_2z(olOI1), .oiII1_1z(oiII1), .o1II1_1z(o1II1), .loo11_1z(loo11), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:474443 CTSE_PECAR_26s_1s CTSE_PECAR_1 ( .IO011(IO011), .iil11(iil11), .oil11(oil11), .lil11(lil11), .OO011(OO011), .III11(III11), .OI011(OI011), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .iIli0_i(iIli0_i), .PF_IOD_CDR_C0_0_RX_CLK_R(PF_IOD_CDR_C0_0_RX_CLK_R), .Olli0_i(Olli0_i), .iO011_i(iO011_i), .OIlI1_i(OIlI1_i), .iOlI1_i(iOlI1_i), .oO011_i(oO011_i) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PE_MCXMAC_26s_0_0s_0s */ module CTSE_SIB_SYNC_2FLP_1s_26s_1s_12_0 ( lloIo, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i, PF_IOD_CDR_CCC_C0_0_TX_CLK_G, iOlI1_i, iloIo ) ; input lloIo ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; input iOlI1_i ; output iloIo ; wire lloIo ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire iOlI1_i ; wire iloIo ; wire [0:0] ii1Io; wire [0:0] IOoIo; wire VCC ; wire GND ; // @28:545090 (* cdc_synchronizer=1 *) SLE \IIoIo.OOoIo[0] ( .Q(iloIo), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ii1Io[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545090 (* cdc_synchronizer=1 *) SLE \IIoIo.ii1Io[0] ( .Q(ii1Io[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOoIo[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545058 (* cdc_synchronizer=1 *) SLE \IIoIo.IOoIo[0] ( .Q(IOoIo[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lloIo), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_SIB_SYNC_2FLP_1s_26s_1s_12_0 */ module CTSE_SIB_SYNC_2FLP_1s_26s_1s ( IloIo, PF_IOD_CDR_CCC_C0_0_TX_CLK_G, iOlI1_i, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i, O0oIo ) ; input IloIo ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; input iOlI1_i ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; output O0oIo ; wire IloIo ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire iOlI1_i ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire O0oIo ; wire [0:0] ii1Io; wire [0:0] IOoIo; wire VCC ; wire GND ; // @28:545090 (* cdc_synchronizer=1 *) SLE \IIoIo.OOoIo[0] ( .Q(O0oIo), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ii1Io[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545090 (* cdc_synchronizer=1 *) SLE \IIoIo.ii1Io[0] ( .Q(ii1Io[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOoIo[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545058 (* cdc_synchronizer=1 *) SLE \IIoIo.IOoIo[0] ( .Q(IOoIo[0]), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IloIo), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_SIB_SYNC_2FLP_1s_26s_1s */ module CTSE_SIB_SYNC_PULSE_26s_1s_0s_16 ( i0iO1, OllI1, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i, PF_IOD_CDR_CCC_C0_0_TX_CLK_G, iOlI1_i ) ; input i0iO1 ; output OllI1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; input iOlI1_i ; wire i0iO1 ; wire OllI1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire iOlI1_i ; wire IloIo ; wire VCC ; wire OloIo_Z ; wire GND ; wire lloIo ; wire O0oIo ; wire iloIo ; wire N_1 ; // @28:545461 SLE \O1oIo.IloIo ( .Q(IloIo), .ADn(VCC), .ALn(iOlI1_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OloIo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545507 SLE \O1oIo.lloIo ( .Q(lloIo), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O0oIo), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545337 CFG2 O0lI1 ( .A(O0oIo), .B(lloIo), .Y(OllI1) ); defparam O0lI1.INIT=4'h6; // @28:545311 CFG3 OloIo ( .A(IloIo), .B(i0iO1), .C(iloIo), .Y(OloIo_Z) ); defparam OloIo.INIT=8'h2E; // @28:545362 CTSE_SIB_SYNC_2FLP_1s_26s_1s_12_0 \O1oIo.CTSE_SIB_SYNC_2FLP_u0 ( .lloIo(lloIo), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .iOlI1_i(iOlI1_i), .iloIo(iloIo) ); // @28:545422 CTSE_SIB_SYNC_2FLP_1s_26s_1s \O1oIo.CTSE_SIB_SYNC_2FLP_u1 ( .IloIo(IloIo), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .iOlI1_i(iOlI1_i), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i), .O0oIo(O0oIo) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_SIB_SYNC_PULSE_26s_1s_0s_16 */ module CTSE_SIB_SYNC_2FLP_1s_26s_1s_8_1 ( lloIo, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i, PF_IOD_CDR_C0_0_RX_CLK_R, OIlI1_i, iloIo ) ; input lloIo ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; input PF_IOD_CDR_C0_0_RX_CLK_R ; input OIlI1_i ; output iloIo ; wire lloIo ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire OIlI1_i ; wire iloIo ; wire [0:0] ii1Io; wire [0:0] IOoIo; wire VCC ; wire GND ; // @28:545090 (* cdc_synchronizer=1 *) SLE \IIoIo.OOoIo[0] ( .Q(iloIo), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ii1Io[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545090 (* cdc_synchronizer=1 *) SLE \IIoIo.ii1Io[0] ( .Q(ii1Io[0]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IOoIo[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545058 (* cdc_synchronizer=1 *) SLE \IIoIo.IOoIo[0] ( .Q(IOoIo[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lloIo), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_SIB_SYNC_2FLP_1s_26s_1s_8_1 */ module CTSE_SIB_SYNC_2FLP_1s_26s_1s_10_0 ( IloIo, PF_IOD_CDR_C0_0_RX_CLK_R, OIlI1_i, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i, O0oIo ) ; input IloIo ; input PF_IOD_CDR_C0_0_RX_CLK_R ; input OIlI1_i ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; output O0oIo ; wire IloIo ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire OIlI1_i ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire O0oIo ; wire [0:0] ii1Io; wire [0:0] IOoIo; wire VCC ; wire GND ; // @28:545090 (* cdc_synchronizer=1 *) SLE \IIoIo.OOoIo[0] ( .Q(O0oIo), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ii1Io[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545090 (* cdc_synchronizer=1 *) SLE \IIoIo.ii1Io[0] ( .Q(ii1Io[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOoIo[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545058 (* cdc_synchronizer=1 *) SLE \IIoIo.IOoIo[0] ( .Q(IOoIo[0]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IloIo), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_SIB_SYNC_2FLP_1s_26s_1s_10_0 */ module CTSE_SIB_SYNC_PULSE_26s_1s_0s_0 ( l0iO1, IllI1, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i, PF_IOD_CDR_C0_0_RX_CLK_R, OIlI1_i ) ; input l0iO1 ; output IllI1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; input PF_IOD_CDR_C0_0_RX_CLK_R ; input OIlI1_i ; wire l0iO1 ; wire IllI1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire OIlI1_i ; wire IloIo ; wire VCC ; wire OloIo_Z ; wire GND ; wire lloIo ; wire O0oIo ; wire iloIo ; wire N_1 ; // @28:545461 SLE \O1oIo.IloIo ( .Q(IloIo), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OloIo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545507 SLE \O1oIo.lloIo ( .Q(lloIo), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O0oIo), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545337 CFG2 O0lI1 ( .A(O0oIo), .B(lloIo), .Y(IllI1) ); defparam O0lI1.INIT=4'h6; // @28:545311 CFG3 OloIo ( .A(IloIo), .B(l0iO1), .C(iloIo), .Y(OloIo_Z) ); defparam OloIo.INIT=8'h2E; // @28:545362 CTSE_SIB_SYNC_2FLP_1s_26s_1s_8_1 \O1oIo.CTSE_SIB_SYNC_2FLP_u0 ( .lloIo(lloIo), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i), .PF_IOD_CDR_C0_0_RX_CLK_R(PF_IOD_CDR_C0_0_RX_CLK_R), .OIlI1_i(OIlI1_i), .iloIo(iloIo) ); // @28:545422 CTSE_SIB_SYNC_2FLP_1s_26s_1s_10_0 \O1oIo.CTSE_SIB_SYNC_2FLP_u1 ( .IloIo(IloIo), .PF_IOD_CDR_C0_0_RX_CLK_R(PF_IOD_CDR_C0_0_RX_CLK_R), .OIlI1_i(OIlI1_i), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i), .O0oIo(O0oIo) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_SIB_SYNC_PULSE_26s_1s_0s_0 */ module CTSE_PEMSTAT_CNTRL_1s_26s ( o0iO1, O1iO1, O0Io1_1z, I0Io1, l0Io1, I0OI1, i1II1, OllI1, IllI1, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input [30:0] o0iO1 ; input [51:0] O1iO1 ; output [15:0] O0Io1_1z ; output [3:0] I0Io1 ; output [43:0] l0Io1 ; input I0OI1 ; input i1II1 ; input OllI1 ; input IllI1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire I0OI1 ; wire i1II1 ; wire OllI1 ; wire IllI1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [43:0] lIlo1_Z; wire [28:7] lIlo1; wire [15:0] O0Io1_5_Z; wire [15:0] oIlo1_Z; wire [5:0] lIlo1_1_Z; wire [7:7] lIlo1_0_a3_2_Z; wire [4:0] lIlo1_2_Z; wire [2:2] lIlo1_3_Z; wire [42:42] lIlo1_1_2_Z; wire [0:0] lIlo1_4_Z; wire OOlo1_Z ; wire VCC ; wire GND ; wire IiIo1_Z ; wire lOlo1_Z ; wire IOlo1_Z ; wire oiIo1_Z ; wire liIo1_Z ; wire O0Io16 ; wire un530_lIlo1lto15_1_0_Z ; wire un530_lIlo1lt15 ; wire un49_lIlo1_3 ; wire un528_lIlo1_2_Z ; wire un49_lIlo1_2 ; wire un77_lIlo1_4 ; wire un541_lIlo1lt8 ; wire un161_lIlo1_3 ; wire un161_lIlo1_2 ; wire un17_iIlo1lto10_fc_1_Z ; wire un295_lIlo1lto8_2_Z ; wire un483_lIlo1_Z ; wire un115_lIlo1_1_Z ; wire un295_lIlo1lt8 ; wire un200_lIlo1_fc_1_2 ; wire un314_lIlo1lto15_3_0_4_Z ; wire N_869 ; wire un17_iIlo1lt4_fc ; wire un161_lIlo1lt4 ; wire un314_lIlo1_3_0 ; wire un295_lIlo1lt9 ; wire un96_lIlo1_1_Z ; wire un17_iIlo1lto10_fc_0_Z ; wire un161_lIlo1lto8_2_Z ; wire un541_lIlo1lto8_1_Z ; wire un331_lIlo1_1_Z ; wire un49_lIlo1_1 ; wire un49_lIlo1_4 ; wire un541_lIlo1lt8_1 ; wire un530_lIlo1lto8_2_Z ; wire un30_lIlo1lto5_0_Z ; wire un530_lIlo1lt4 ; wire un49_lIlo1_2_0 ; wire un161_lIlo1lt10 ; wire un541_lIlo1lto8_3_Z ; wire un200_lIlo1_fc_1_1_Z ; wire un530_lIlo1lt9 ; wire un161_lIlo1_4 ; wire un541_lIlo1lt10 ; wire un161_lIlo1lto15_4_RNI1SNO9_Z ; wire un541_lIlo1 ; wire un530_lIlo1 ; wire un331_lIlo1_2_Z ; // @28:488060 SLE OOlo1 ( .Q(OOlo1_Z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IllI1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:487964 SLE IiIo1 ( .Q(IiIo1_Z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(OllI1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:488124 SLE lOlo1 ( .Q(lOlo1_Z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOlo1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:488028 SLE oiIo1 ( .Q(oiIo1_Z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(liIo1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:488092 SLE IOlo1 ( .Q(IOlo1_Z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(OOlo1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:487996 SLE liIo1 ( .Q(liIo1_Z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IiIo1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[5] ( .Q(l0Io1[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[4] ( .Q(l0Io1[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[3] ( .Q(l0Io1[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[2] ( .Q(l0Io1[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[1] ( .Q(l0Io1[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[0] ( .Q(l0Io1[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[20] ( .Q(l0Io1[20]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1_Z[20]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[19] ( .Q(l0Io1[19]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1[19]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[18] ( .Q(l0Io1[18]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1_Z[18]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[17] ( .Q(l0Io1[17]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1_Z[17]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[16] ( .Q(l0Io1[16]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1[16]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[15] ( .Q(l0Io1[15]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1_Z[15]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[14] ( .Q(l0Io1[14]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1[14]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[13] ( .Q(l0Io1[13]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1[13]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[12] ( .Q(l0Io1[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1[12]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[11] ( .Q(l0Io1[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1[11]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[10] ( .Q(l0Io1[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[9] ( .Q(l0Io1[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[7] ( .Q(l0Io1[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[6] ( .Q(l0Io1[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[35] ( .Q(l0Io1[35]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1_Z[35]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[34] ( .Q(l0Io1[34]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1_Z[34]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[33] ( .Q(l0Io1[33]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1_Z[33]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[32] ( .Q(l0Io1[32]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1_Z[32]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[31] ( .Q(l0Io1[31]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1_Z[31]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[30] ( .Q(l0Io1[30]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1_Z[30]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[29] ( .Q(l0Io1[29]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1_Z[29]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[28] ( .Q(l0Io1[28]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1[28]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[27] ( .Q(l0Io1[27]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1[27]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[26] ( .Q(l0Io1[26]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1[26]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[24] ( .Q(l0Io1[24]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O0Io16), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[23] ( .Q(l0Io1[23]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1_Z[23]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[22] ( .Q(l0Io1[22]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1[22]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[21] ( .Q(l0Io1[21]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1[21]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489992 SLE \O0Io1[8] ( .Q(O0Io1_1z[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O0Io1_5_Z[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489992 SLE \O0Io1[7] ( .Q(O0Io1_1z[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O0Io1_5_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489992 SLE \O0Io1[6] ( .Q(O0Io1_1z[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O0Io1_5_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489992 SLE \O0Io1[5] ( .Q(O0Io1_1z[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O0Io1_5_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489992 SLE \O0Io1[4] ( .Q(O0Io1_1z[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O0Io1_5_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489992 SLE \O0Io1[3] ( .Q(O0Io1_1z[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O0Io1_5_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489992 SLE \O0Io1[2] ( .Q(O0Io1_1z[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O0Io1_5_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489992 SLE \O0Io1[1] ( .Q(O0Io1_1z[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O0Io1_5_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489992 SLE \O0Io1[0] ( .Q(O0Io1_1z[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O0Io1_5_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[43] ( .Q(l0Io1[43]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1_Z[43]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[42] ( .Q(l0Io1[42]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1_Z[42]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[41] ( .Q(l0Io1[41]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1_Z[41]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[39] ( .Q(l0Io1[39]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1_Z[39]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489960 SLE \l0Io1_Z[38] ( .Q(l0Io1[38]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lIlo1_Z[38]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:490066 SLE \I0Io1_Z[3] ( .Q(I0Io1[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O1iO1[19]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:490066 SLE \I0Io1_Z[2] ( .Q(I0Io1[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O1iO1[18]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:490066 SLE \I0Io1_Z[1] ( .Q(I0Io1[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O1iO1[17]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:490066 SLE \I0Io1_Z[0] ( .Q(I0Io1[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O1iO1[16]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489992 SLE \O0Io1[15] ( .Q(O0Io1_1z[15]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O0Io1_5_Z[15]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489992 SLE \O0Io1[14] ( .Q(O0Io1_1z[14]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O0Io1_5_Z[14]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489992 SLE \O0Io1[13] ( .Q(O0Io1_1z[13]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O0Io1_5_Z[13]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489992 SLE \O0Io1[12] ( .Q(O0Io1_1z[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O0Io1_5_Z[12]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489992 SLE \O0Io1[11] ( .Q(O0Io1_1z[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O0Io1_5_Z[11]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489992 SLE \O0Io1[10] ( .Q(O0Io1_1z[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O0Io1_5_Z[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489992 SLE \O0Io1[9] ( .Q(O0Io1_1z[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O0Io1_5_Z[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:489675 CFG4 un528_lIlo1_2 ( .A(un530_lIlo1lto15_1_0_Z), .B(un530_lIlo1lt15), .C(O1iO1[51]), .D(un49_lIlo1_3), .Y(un528_lIlo1_2_Z) ); defparam un528_lIlo1_2.INIT=16'h0F0E; // @28:488438 CFG3 un77_lIlo1lto15_4 ( .A(oIlo1_Z[12]), .B(oIlo1_Z[13]), .C(un49_lIlo1_2), .Y(un77_lIlo1_4) ); defparam un77_lIlo1lto15_4.INIT=8'hFE; // @28:489678 CFG3 un530_lIlo1lto15_1_0 ( .A(oIlo1_Z[14]), .B(oIlo1_Z[15]), .C(oIlo1_Z[11]), .Y(un530_lIlo1lto15_1_0_Z) ); defparam un530_lIlo1lto15_1_0.INIT=8'hFE; // @28:489717 CFG4 un541_lIlo1lto3 ( .A(oIlo1_Z[2]), .B(oIlo1_Z[3]), .C(oIlo1_Z[0]), .D(oIlo1_Z[1]), .Y(un541_lIlo1lt8) ); defparam un541_lIlo1lto3.INIT=16'hFEEE; // @28:488366 CFG4 \lIlo1_1[0] ( .A(oIlo1_Z[3]), .B(oIlo1_Z[2]), .C(oIlo1_Z[1]), .D(oIlo1_Z[0]), .Y(lIlo1_1_Z[0]) ); defparam \lIlo1_1[0] .INIT=16'h0001; // @28:489485 CFG2 un459_lIlo1 ( .A(O0Io16), .B(O1iO1[48]), .Y(lIlo1[28]) ); defparam un459_lIlo1.INIT=4'h8; // @28:489589 CFG2 \lIlo1[33] ( .A(O0Io16), .B(O1iO1[29]), .Y(lIlo1_Z[33]) ); defparam \lIlo1[33] .INIT=4'h8; // @28:489539 CFG2 \lIlo1[30] ( .A(O0Io16), .B(O1iO1[27]), .Y(lIlo1_Z[30]) ); defparam \lIlo1[30] .INIT=4'h8; // @28:489602 CFG2 \lIlo1[34] ( .A(O0Io16), .B(O1iO1[28]), .Y(lIlo1_Z[34]) ); defparam \lIlo1[34] .INIT=4'h8; // @28:489757 CFG2 \lIlo1[39] ( .A(O0Io16), .B(O1iO1[20]), .Y(lIlo1_Z[39]) ); defparam \lIlo1[39] .INIT=4'h8; // @28:489526 CFG2 \lIlo1[29] ( .A(O0Io16), .B(O1iO1[26]), .Y(lIlo1_Z[29]) ); defparam \lIlo1[29] .INIT=4'h8; // @28:488595 CFG2 un161_lIlo1lto15_3 ( .A(o0iO1[14]), .B(o0iO1[15]), .Y(un161_lIlo1_3) ); defparam un161_lIlo1lto15_3.INIT=4'hE; // @28:488595 CFG2 un161_lIlo1lto15_2 ( .A(o0iO1[12]), .B(o0iO1[13]), .Y(un161_lIlo1_2) ); defparam un161_lIlo1lto15_2.INIT=4'hE; // @28:490002 CFG3 \O0Io1_5[0] ( .A(O0Io16), .B(o0iO1[0]), .C(O1iO1[32]), .Y(O0Io1_5_Z[0]) ); defparam \O0Io1_5[0] .INIT=8'hE4; // @28:490002 CFG3 \O0Io1_5[1] ( .A(O0Io16), .B(o0iO1[1]), .C(O1iO1[33]), .Y(O0Io1_5_Z[1]) ); defparam \O0Io1_5[1] .INIT=8'hE4; // @28:490002 CFG3 \O0Io1_5[4] ( .A(O0Io16), .B(o0iO1[4]), .C(O1iO1[36]), .Y(O0Io1_5_Z[4]) ); defparam \O0Io1_5[4] .INIT=8'hE4; // @28:490002 CFG3 \O0Io1_5[9] ( .A(O0Io16), .B(o0iO1[9]), .C(O1iO1[41]), .Y(O0Io1_5_Z[9]) ); defparam \O0Io1_5[9] .INIT=8'hE4; // @28:490002 CFG3 \O0Io1_5[15] ( .A(O0Io16), .B(o0iO1[15]), .C(O1iO1[47]), .Y(O0Io1_5_Z[15]) ); defparam \O0Io1_5[15] .INIT=8'hE4; // @28:490002 CFG3 \O0Io1_5[8] ( .A(O0Io16), .B(o0iO1[8]), .C(O1iO1[40]), .Y(O0Io1_5_Z[8]) ); defparam \O0Io1_5[8] .INIT=8'hE4; // @28:490002 CFG3 \O0Io1_5[10] ( .A(O0Io16), .B(o0iO1[10]), .C(O1iO1[42]), .Y(O0Io1_5_Z[10]) ); defparam \O0Io1_5[10] .INIT=8'hE4; // @28:490002 CFG3 \O0Io1_5[7] ( .A(O0Io16), .B(o0iO1[7]), .C(O1iO1[39]), .Y(O0Io1_5_Z[7]) ); defparam \O0Io1_5[7] .INIT=8'hE4; // @28:490002 CFG3 \O0Io1_5[11] ( .A(O0Io16), .B(o0iO1[11]), .C(O1iO1[43]), .Y(O0Io1_5_Z[11]) ); defparam \O0Io1_5[11] .INIT=8'hE4; // @28:490002 CFG3 \O0Io1_5[2] ( .A(O0Io16), .B(o0iO1[2]), .C(O1iO1[34]), .Y(O0Io1_5_Z[2]) ); defparam \O0Io1_5[2] .INIT=8'hE4; // @28:490002 CFG3 \O0Io1_5[3] ( .A(O0Io16), .B(o0iO1[3]), .C(O1iO1[35]), .Y(O0Io1_5_Z[3]) ); defparam \O0Io1_5[3] .INIT=8'hE4; // @28:490002 CFG3 \O0Io1_5[5] ( .A(O0Io16), .B(o0iO1[5]), .C(O1iO1[37]), .Y(O0Io1_5_Z[5]) ); defparam \O0Io1_5[5] .INIT=8'hE4; // @28:490002 CFG3 \O0Io1_5[13] ( .A(O0Io16), .B(o0iO1[13]), .C(O1iO1[45]), .Y(O0Io1_5_Z[13]) ); defparam \O0Io1_5[13] .INIT=8'hE4; // @28:490002 CFG3 \O0Io1_5[14] ( .A(O0Io16), .B(o0iO1[14]), .C(O1iO1[46]), .Y(O0Io1_5_Z[14]) ); defparam \O0Io1_5[14] .INIT=8'hE4; // @28:490002 CFG3 \O0Io1_5[6] ( .A(O0Io16), .B(o0iO1[6]), .C(O1iO1[38]), .Y(O0Io1_5_Z[6]) ); defparam \O0Io1_5[6] .INIT=8'hE4; // @28:490002 CFG3 \O0Io1_5[12] ( .A(O0Io16), .B(o0iO1[12]), .C(O1iO1[44]), .Y(O0Io1_5_Z[12]) ); defparam \O0Io1_5[12] .INIT=8'hE4; // @28:488171 CFG3 \lIlo1_0_a3_2[7] ( .A(lOlo1_Z), .B(i1II1), .C(oiIo1_Z), .Y(lIlo1_0_a3_2_Z[7]) ); defparam \lIlo1_0_a3_2[7] .INIT=8'h04; // @28:432792 CFG3 un17_iIlo1lto10_fc_1 ( .A(o0iO1[8]), .B(o0iO1[7]), .C(o0iO1[6]), .Y(un17_iIlo1lto10_fc_1_Z) ); defparam un17_iIlo1lto10_fc_1.INIT=8'h80; // @28:488994 CFG4 un295_lIlo1lto8_2 ( .A(o0iO1[8]), .B(o0iO1[7]), .C(o0iO1[6]), .D(o0iO1[5]), .Y(un295_lIlo1lto8_2_Z) ); defparam un295_lIlo1lto8_2.INIT=16'h8000; // @28:489426 CFG4 un442_lIlo1 ( .A(O1iO1[20]), .B(O0Io16), .C(O1iO1[25]), .D(O1iO1[24]), .Y(lIlo1[27]) ); defparam un442_lIlo1.INIT=16'h4000; // @28:489365 CFG4 un423_lIlo1 ( .A(O1iO1[20]), .B(O0Io16), .C(O1iO1[25]), .D(O1iO1[24]), .Y(lIlo1[26]) ); defparam un423_lIlo1.INIT=16'h0400; // @28:489555 CFG3 un483_lIlo1 ( .A(O1iO1[19]), .B(O1iO1[18]), .C(O1iO1[17]), .Y(un483_lIlo1_Z) ); defparam un483_lIlo1.INIT=8'hFE; // @28:488159 CFG3 \lIlo1[24] ( .A(IiIo1_Z), .B(liIo1_Z), .C(i1II1), .Y(O0Io16) ); defparam \lIlo1[24] .INIT=8'h20; // @28:488503 CFG3 un115_lIlo1_1 ( .A(O1iO1[20]), .B(O0Io16), .C(O1iO1[51]), .Y(un115_lIlo1_1_Z) ); defparam un115_lIlo1_1.INIT=8'h40; // @28:488994 CFG4 un295_lIlo1lto3 ( .A(o0iO1[3]), .B(o0iO1[2]), .C(o0iO1[1]), .D(o0iO1[0]), .Y(un295_lIlo1lt8) ); defparam un295_lIlo1lto3.INIT=16'hFEEE; // @28:432792 CFG3 un161_lIlo1lto15_2_RNIPUBB9 ( .A(o0iO1[20]), .B(un161_lIlo1_3), .C(un161_lIlo1_2), .Y(un200_lIlo1_fc_1_2) ); defparam un161_lIlo1lto15_2_RNIPUBB9.INIT=8'h01; // @28:489046 CFG4 un314_lIlo1lto15_3_0_4 ( .A(o0iO1[11]), .B(o0iO1[10]), .C(o0iO1[9]), .D(un161_lIlo1_2), .Y(un314_lIlo1lto15_3_0_4_Z) ); defparam un314_lIlo1lto15_3_0_4.INIT=16'h0001; // @28:488171 CFG4 \lIlo1_0_a3_0[7] ( .A(OOlo1_Z), .B(IOlo1_Z), .C(i1II1), .D(O0Io16), .Y(N_869) ); defparam \lIlo1_0_a3_0[7] .INIT=16'h0020; // @28:432792 CFG4 un17_iIlo1lto3_fc ( .A(o0iO1[3]), .B(o0iO1[2]), .C(o0iO1[1]), .D(o0iO1[0]), .Y(un17_iIlo1lt4_fc) ); defparam un17_iIlo1lto3_fc.INIT=16'hFFFE; // @28:488595 CFG4 un161_lIlo1lto3 ( .A(o0iO1[3]), .B(o0iO1[2]), .C(o0iO1[1]), .D(o0iO1[0]), .Y(un161_lIlo1lt4) ); defparam un161_lIlo1lto3.INIT=16'h8000; // @28:489573 CFG2 \lIlo1[32] ( .A(O0Io16), .B(un483_lIlo1_Z), .Y(lIlo1_Z[32]) ); defparam \lIlo1[32] .INIT=4'h8; // @28:489046 CFG4 un314_lIlo1lto15_3_0 ( .A(o0iO1[8]), .B(o0iO1[7]), .C(o0iO1[6]), .D(un314_lIlo1lto15_3_0_4_Z), .Y(un314_lIlo1_3_0) ); defparam un314_lIlo1lto15_3_0.INIT=16'h0100; // @28:489552 CFG3 \lIlo1[31] ( .A(O0Io16), .B(un483_lIlo1_Z), .C(O1iO1[16]), .Y(lIlo1_Z[31]) ); defparam \lIlo1[31] .INIT=8'h20; // @28:488994 CFG3 un295_lIlo1lto8 ( .A(o0iO1[4]), .B(un295_lIlo1lto8_2_Z), .C(un295_lIlo1lt8), .Y(un295_lIlo1lt9) ); defparam un295_lIlo1lto8.INIT=8'h80; // @28:488171 CFG4 \lIlo1_0[7] ( .A(IOlo1_Z), .B(liIo1_Z), .C(N_869), .D(lIlo1_0_a3_2_Z[7]), .Y(lIlo1[7]) ); defparam \lIlo1_0[7] .INIT=16'hF8F0; // @28:489615 CFG3 \lIlo1[35] ( .A(O0Io16), .B(un483_lIlo1_Z), .C(O1iO1[16]), .Y(lIlo1_Z[35]) ); defparam \lIlo1[35] .INIT=8'hA8; // @28:489331 CFG3 \lIlo1[23] ( .A(lIlo1[7]), .B(I0OI1), .C(l0Io1[23]), .Y(lIlo1_Z[23]) ); defparam \lIlo1[23] .INIT=8'h08; // @28:488467 CFG3 un96_lIlo1_1 ( .A(o0iO1[30]), .B(o0iO1[20]), .C(lIlo1[7]), .Y(un96_lIlo1_1_Z) ); defparam un96_lIlo1_1.INIT=8'h20; // @28:489026 CFG2 \lIlo1[18] ( .A(lIlo1[7]), .B(o0iO1[18]), .Y(lIlo1_Z[18]) ); defparam \lIlo1[18] .INIT=4'h8; // @28:489013 CFG2 \lIlo1[17] ( .A(lIlo1[7]), .B(o0iO1[19]), .Y(lIlo1_Z[17]) ); defparam \lIlo1[17] .INIT=4'h8; // @28:488786 CFG2 un215_lIlo1 ( .A(lIlo1[7]), .B(o0iO1[28]), .Y(lIlo1[13]) ); defparam un215_lIlo1.INIT=4'h8; // @28:488835 CFG2 un230_lIlo1 ( .A(lIlo1[7]), .B(o0iO1[29]), .Y(lIlo1[14]) ); defparam un230_lIlo1.INIT=4'h8; // @28:488924 CFG2 un263_lIlo1 ( .A(lIlo1[7]), .B(o0iO1[21]), .Y(lIlo1[16]) ); defparam un263_lIlo1.INIT=4'h8; // @28:432792 CFG4 un17_iIlo1lto10_fc_0 ( .A(o0iO1[9]), .B(o0iO1[5]), .C(o0iO1[4]), .D(un17_iIlo1lt4_fc), .Y(un17_iIlo1lto10_fc_0_Z) ); defparam un17_iIlo1lto10_fc_0.INIT=16'hA888; // @28:488595 CFG4 un161_lIlo1lto8_2 ( .A(o0iO1[7]), .B(o0iO1[6]), .C(o0iO1[4]), .D(un161_lIlo1lt4), .Y(un161_lIlo1lto8_2_Z) ); defparam un161_lIlo1lto8_2.INIT=16'h8880; // @28:488263 CFG4 \oIlo1[15] ( .A(O0Io16), .B(lIlo1[7]), .C(o0iO1[15]), .D(O1iO1[15]), .Y(oIlo1_Z[15]) ); defparam \oIlo1[15] .INIT=16'hEAC0; // @28:488263 CFG4 \oIlo1[1] ( .A(O0Io16), .B(lIlo1[7]), .C(o0iO1[1]), .D(O1iO1[1]), .Y(oIlo1_Z[1]) ); defparam \oIlo1[1] .INIT=16'hEAC0; // @28:488263 CFG4 \oIlo1[0] ( .A(O0Io16), .B(lIlo1[7]), .C(o0iO1[0]), .D(O1iO1[0]), .Y(oIlo1_Z[0]) ); defparam \oIlo1[0] .INIT=16'hEAC0; // @28:488263 CFG4 \oIlo1[7] ( .A(O0Io16), .B(lIlo1[7]), .C(o0iO1[7]), .D(O1iO1[7]), .Y(oIlo1_Z[7]) ); defparam \oIlo1[7] .INIT=16'hEAC0; // @28:488263 CFG4 \oIlo1[14] ( .A(O0Io16), .B(lIlo1[7]), .C(o0iO1[14]), .D(O1iO1[14]), .Y(oIlo1_Z[14]) ); defparam \oIlo1[14] .INIT=16'hEAC0; // @28:488263 CFG4 \oIlo1[13] ( .A(O0Io16), .B(lIlo1[7]), .C(o0iO1[13]), .D(O1iO1[13]), .Y(oIlo1_Z[13]) ); defparam \oIlo1[13] .INIT=16'hEAC0; // @28:488263 CFG4 \oIlo1[8] ( .A(O0Io16), .B(lIlo1[7]), .C(o0iO1[8]), .D(O1iO1[8]), .Y(oIlo1_Z[8]) ); defparam \oIlo1[8] .INIT=16'hEAC0; // @28:488263 CFG4 \oIlo1[9] ( .A(O0Io16), .B(lIlo1[7]), .C(o0iO1[9]), .D(O1iO1[9]), .Y(oIlo1_Z[9]) ); defparam \oIlo1[9] .INIT=16'hEAC0; // @28:488263 CFG4 \oIlo1[11] ( .A(O0Io16), .B(lIlo1[7]), .C(o0iO1[11]), .D(O1iO1[11]), .Y(oIlo1_Z[11]) ); defparam \oIlo1[11] .INIT=16'hEAC0; // @28:488263 CFG4 \oIlo1[10] ( .A(O0Io16), .B(lIlo1[7]), .C(o0iO1[10]), .D(O1iO1[10]), .Y(oIlo1_Z[10]) ); defparam \oIlo1[10] .INIT=16'hEAC0; // @28:488263 CFG4 \oIlo1[6] ( .A(O0Io16), .B(lIlo1[7]), .C(o0iO1[6]), .D(O1iO1[6]), .Y(oIlo1_Z[6]) ); defparam \oIlo1[6] .INIT=16'hEAC0; // @28:488263 CFG4 \oIlo1[3] ( .A(O0Io16), .B(lIlo1[7]), .C(o0iO1[3]), .D(O1iO1[3]), .Y(oIlo1_Z[3]) ); defparam \oIlo1[3] .INIT=16'hEAC0; // @28:488263 CFG4 \oIlo1[5] ( .A(O0Io16), .B(lIlo1[7]), .C(o0iO1[5]), .D(O1iO1[5]), .Y(oIlo1_Z[5]) ); defparam \oIlo1[5] .INIT=16'hEAC0; // @28:488263 CFG4 \oIlo1[2] ( .A(O0Io16), .B(lIlo1[7]), .C(o0iO1[2]), .D(O1iO1[2]), .Y(oIlo1_Z[2]) ); defparam \oIlo1[2] .INIT=16'hEAC0; // @28:488263 CFG4 \oIlo1[12] ( .A(O0Io16), .B(lIlo1[7]), .C(o0iO1[12]), .D(O1iO1[12]), .Y(oIlo1_Z[12]) ); defparam \oIlo1[12] .INIT=16'hEAC0; // @28:488263 CFG4 \oIlo1[4] ( .A(O0Io16), .B(lIlo1[7]), .C(o0iO1[4]), .D(O1iO1[4]), .Y(oIlo1_Z[4]) ); defparam \oIlo1[4] .INIT=16'hEAC0; // @28:489717 CFG2 un541_lIlo1lto8_1 ( .A(oIlo1_Z[7]), .B(oIlo1_Z[6]), .Y(un541_lIlo1lto8_1_Z) ); defparam un541_lIlo1lto8_1.INIT=4'h8; // @28:489113 CFG4 un331_lIlo1_1 ( .A(o0iO1[10]), .B(o0iO1[9]), .C(un295_lIlo1lt9), .D(un161_lIlo1_3), .Y(un331_lIlo1_1_Z) ); defparam un331_lIlo1_1.INIT=16'hFFA8; // @28:488366 CFG2 \lIlo1_2[0] ( .A(oIlo1_Z[4]), .B(oIlo1_Z[5]), .Y(lIlo1_2_Z[0]) ); defparam \lIlo1_2[0] .INIT=4'h1; // @28:488402 CFG2 un49_lIlo1lto15_1 ( .A(oIlo1_Z[9]), .B(oIlo1_Z[8]), .Y(un49_lIlo1_1) ); defparam un49_lIlo1lto15_1.INIT=4'hE; // @28:488402 CFG2 un49_lIlo1lto15_2 ( .A(oIlo1_Z[10]), .B(oIlo1_Z[11]), .Y(un49_lIlo1_2) ); defparam un49_lIlo1lto15_2.INIT=4'hE; // @28:488402 CFG2 un49_lIlo1lto15_3 ( .A(oIlo1_Z[12]), .B(oIlo1_Z[13]), .Y(un49_lIlo1_3) ); defparam un49_lIlo1lto15_3.INIT=4'hE; // @28:488402 CFG2 un49_lIlo1lto15_4 ( .A(oIlo1_Z[14]), .B(oIlo1_Z[15]), .Y(un49_lIlo1_4) ); defparam un49_lIlo1lto15_4.INIT=4'hE; // @28:489717 CFG2 un541_lIlo1lto3_1 ( .A(oIlo1_Z[2]), .B(oIlo1_Z[3]), .Y(un541_lIlo1lt8_1) ); defparam un541_lIlo1lto3_1.INIT=4'hE; // @28:489041 CFG4 un310_lIlo1 ( .A(o0iO1[20]), .B(un314_lIlo1_3_0), .C(un161_lIlo1_3), .D(lIlo1[7]), .Y(lIlo1[19]) ); defparam un310_lIlo1.INIT=16'h0400; // @28:489157 CFG4 un351_lIlo1 ( .A(o0iO1[20]), .B(un314_lIlo1_3_0), .C(un161_lIlo1_3), .D(lIlo1[7]), .Y(lIlo1[21]) ); defparam un351_lIlo1.INIT=16'h0800; // @28:488450 CFG2 \lIlo1_1[5] ( .A(un49_lIlo1_2), .B(un49_lIlo1_4), .Y(lIlo1_1_Z[5]) ); defparam \lIlo1_1[5] .INIT=4'h2; // @28:489678 CFG4 un530_lIlo1lto8_2 ( .A(oIlo1_Z[6]), .B(oIlo1_Z[7]), .C(oIlo1_Z[5]), .D(oIlo1_Z[8]), .Y(un530_lIlo1lto8_2_Z) ); defparam un530_lIlo1lto8_2.INIT=16'h8000; // @28:488396 CFG4 \lIlo1_3[2] ( .A(oIlo1_Z[15]), .B(oIlo1_Z[8]), .C(oIlo1_Z[10]), .D(oIlo1_Z[7]), .Y(lIlo1_3_Z[2]) ); defparam \lIlo1_3[2] .INIT=16'h0100; // @28:488396 CFG3 \lIlo1_2[2] ( .A(oIlo1_Z[14]), .B(oIlo1_Z[13]), .C(oIlo1_Z[9]), .Y(lIlo1_2_Z[2]) ); defparam \lIlo1_2[2] .INIT=8'h01; // @28:488432 CFG4 \lIlo1_2[4] ( .A(oIlo1_Z[15]), .B(oIlo1_Z[12]), .C(oIlo1_Z[11]), .D(oIlo1_Z[10]), .Y(lIlo1_2_Z[4]) ); defparam \lIlo1_2[4] .INIT=16'h0001; // @28:488378 CFG3 un30_lIlo1lto5_0 ( .A(oIlo1_Z[0]), .B(un541_lIlo1lt8_1), .C(oIlo1_Z[1]), .Y(un30_lIlo1lto5_0_Z) ); defparam un30_lIlo1lto5_0.INIT=8'h01; // @28:489678 CFG4 un530_lIlo1lto3 ( .A(oIlo1_Z[3]), .B(oIlo1_Z[2]), .C(oIlo1_Z[1]), .D(oIlo1_Z[0]), .Y(un530_lIlo1lt4) ); defparam un530_lIlo1lto3.INIT=16'h8000; // @28:488402 CFG2 un49_lIlo1lto15_2_0 ( .A(un49_lIlo1_3), .B(un49_lIlo1_4), .Y(un49_lIlo1_2_0) ); defparam un49_lIlo1lto15_2_0.INIT=4'hE; // @28:488595 CFG4 un161_lIlo1lto9 ( .A(o0iO1[9]), .B(o0iO1[8]), .C(o0iO1[5]), .D(un161_lIlo1lto8_2_Z), .Y(un161_lIlo1lt10) ); defparam un161_lIlo1lto9.INIT=16'hEAAA; // @28:489927 CFG4 \lIlo1_1_2[42] ( .A(O0Io16), .B(oIlo1_Z[6]), .C(oIlo1_Z[7]), .D(un49_lIlo1_4), .Y(lIlo1_1_2_Z[42]) ); defparam \lIlo1_1_2[42] .INIT=16'h0002; // @28:488378 CFG4 \lIlo1_1[1] ( .A(oIlo1_Z[7]), .B(oIlo1_Z[6]), .C(un49_lIlo1_1), .D(un49_lIlo1_4), .Y(lIlo1_1_Z[1]) ); defparam \lIlo1_1[1] .INIT=16'h0004; // @28:488366 CFG4 \lIlo1_4[0] ( .A(lIlo1_2_Z[0]), .B(un49_lIlo1_1), .C(oIlo1_Z[6]), .D(oIlo1_Z[7]), .Y(lIlo1_4_Z[0]) ); defparam \lIlo1_4[0] .INIT=16'h0020; // @28:489717 CFG4 un541_lIlo1lto8_3 ( .A(oIlo1_Z[4]), .B(oIlo1_Z[5]), .C(un541_lIlo1lto8_1_Z), .D(oIlo1_Z[8]), .Y(un541_lIlo1lto8_3_Z) ); defparam un541_lIlo1lto8_3.INIT=16'h8000; // @28:432792 CFG4 un200_lIlo1_fc_1_1 ( .A(o0iO1[11]), .B(o0iO1[10]), .C(un17_iIlo1lto10_fc_1_Z), .D(un17_iIlo1lto10_fc_0_Z), .Y(un200_lIlo1_fc_1_1_Z) ); defparam un200_lIlo1_fc_1_1.INIT=16'h1555; // @28:488432 CFG4 \lIlo1[4] ( .A(oIlo1_Z[14]), .B(oIlo1_Z[13]), .C(oIlo1_Z[9]), .D(lIlo1_2_Z[4]), .Y(lIlo1_Z[4]) ); defparam \lIlo1[4] .INIT=16'h1000; // @28:488414 CFG4 \lIlo1[3] ( .A(oIlo1_Z[9]), .B(un49_lIlo1_2), .C(un49_lIlo1_1), .D(un49_lIlo1_2_0), .Y(lIlo1_Z[3]) ); defparam \lIlo1[3] .INIT=16'h0010; // @28:488396 CFG4 \lIlo1[2] ( .A(oIlo1_Z[11]), .B(oIlo1_Z[12]), .C(lIlo1_3_Z[2]), .D(lIlo1_2_Z[2]), .Y(lIlo1_Z[2]) ); defparam \lIlo1[2] .INIT=16'h1000; // @28:489678 CFG3 un530_lIlo1lto8 ( .A(un530_lIlo1lt4), .B(oIlo1_Z[4]), .C(un530_lIlo1lto8_2_Z), .Y(un530_lIlo1lt9) ); defparam un530_lIlo1lto8.INIT=8'hE0; // @28:488366 CFG4 \lIlo1[0] ( .A(un49_lIlo1_2), .B(lIlo1_1_Z[0]), .C(lIlo1_4_Z[0]), .D(un49_lIlo1_2_0), .Y(lIlo1_Z[0]) ); defparam \lIlo1[0] .INIT=16'h0040; // @28:488378 CFG4 \lIlo1[1] ( .A(lIlo1_1_Z[1]), .B(un77_lIlo1_4), .C(lIlo1_2_Z[0]), .D(un30_lIlo1lto5_0_Z), .Y(lIlo1_Z[1]) ); defparam \lIlo1[1] .INIT=16'h0222; // @28:488595 CFG4 un161_lIlo1lto15_4 ( .A(o0iO1[11]), .B(o0iO1[10]), .C(un161_lIlo1lt10), .D(un161_lIlo1_2), .Y(un161_lIlo1_4) ); defparam un161_lIlo1lto15_4.INIT=16'hFFEA; // @28:489717 CFG3 un541_lIlo1lto9 ( .A(oIlo1_Z[9]), .B(un541_lIlo1lt8), .C(un541_lIlo1lto8_3_Z), .Y(un541_lIlo1lt10) ); defparam un541_lIlo1lto9.INIT=8'hEA; // @28:489947 CFG4 \lIlo1[43] ( .A(O1iO1[20]), .B(un49_lIlo1_1), .C(lIlo1_1_2_Z[42]), .D(un77_lIlo1_4), .Y(lIlo1_Z[43]) ); defparam \lIlo1[43] .INIT=16'h0020; // @28:489927 CFG4 \lIlo1[42] ( .A(O1iO1[20]), .B(un49_lIlo1_1), .C(lIlo1_1_2_Z[42]), .D(un77_lIlo1_4), .Y(lIlo1_Z[42]) ); defparam \lIlo1[42] .INIT=16'h0010; // @28:489678 CFG3 un530_lIlo1lto10 ( .A(oIlo1_Z[9]), .B(un530_lIlo1lt9), .C(oIlo1_Z[10]), .Y(un530_lIlo1lt15) ); defparam un530_lIlo1lto10.INIT=8'hE0; // @28:432792 CFG4 \l0Io1_RNO[10] ( .A(o0iO1[24]), .B(un200_lIlo1_fc_1_2), .C(un200_lIlo1_fc_1_1_Z), .D(lIlo1[7]), .Y(lIlo1[10]) ); defparam \l0Io1_RNO[10] .INIT=16'h8000; // @28:432792 CFG4 \l0Io1_RNO[11] ( .A(o0iO1[25]), .B(un200_lIlo1_fc_1_2), .C(un200_lIlo1_fc_1_1_Z), .D(lIlo1[7]), .Y(lIlo1[11]) ); defparam \l0Io1_RNO[11] .INIT=16'h8000; // @28:432792 CFG4 \l0Io1_RNO[12] ( .A(o0iO1[27]), .B(un200_lIlo1_fc_1_2), .C(un200_lIlo1_fc_1_1_Z), .D(lIlo1[7]), .Y(lIlo1[12]) ); defparam \l0Io1_RNO[12] .INIT=16'h8000; // @28:488450 CFG4 \lIlo1[5] ( .A(lIlo1_1_Z[5]), .B(un530_lIlo1lt15), .C(oIlo1_Z[11]), .D(un49_lIlo1_3), .Y(lIlo1_Z[5]) ); defparam \lIlo1[5] .INIT=16'h0002; CFG3 un161_lIlo1lto15_4_RNI1SNO9 ( .A(un314_lIlo1_3_0), .B(un161_lIlo1_4), .C(un161_lIlo1_3), .Y(un161_lIlo1lto15_4_RNI1SNO9_Z) ); defparam un161_lIlo1lto15_4_RNI1SNO9.INIT=8'h01; // @28:489717 CFG4 un541_lIlo1lto15 ( .A(oIlo1_Z[10]), .B(un49_lIlo1_3), .C(un530_lIlo1lto15_1_0_Z), .D(un541_lIlo1lt10), .Y(un541_lIlo1) ); defparam un541_lIlo1lto15.INIT=16'hFEFC; // @28:489678 CFG3 un530_lIlo1lto15 ( .A(un530_lIlo1lt15), .B(un49_lIlo1_3), .C(un530_lIlo1lto15_1_0_Z), .Y(un530_lIlo1) ); defparam un530_lIlo1lto15.INIT=8'hFE; // @28:489113 CFG4 un331_lIlo1_2 ( .A(o0iO1[30]), .B(o0iO1[11]), .C(un161_lIlo1_4), .D(un161_lIlo1_2), .Y(un331_lIlo1_2_Z) ); defparam un331_lIlo1_2.INIT=16'hFFDC; // @28:488568 CFG4 un145_lIlo1 ( .A(un161_lIlo1lto15_4_RNI1SNO9_Z), .B(o0iO1[26]), .C(o0iO1[20]), .D(lIlo1[7]), .Y(lIlo1[9]) ); defparam un145_lIlo1.INIT=16'h2000; // @28:488882 CFG4 \lIlo1[15] ( .A(un161_lIlo1lto15_4_RNI1SNO9_Z), .B(o0iO1[26]), .C(o0iO1[20]), .D(lIlo1[7]), .Y(lIlo1_Z[15]) ); defparam \lIlo1[15] .INIT=16'h8000; // @28:488467 CFG4 \lIlo1[6] ( .A(un96_lIlo1_1_Z), .B(un115_lIlo1_1_Z), .C(un541_lIlo1), .D(un530_lIlo1), .Y(lIlo1_Z[6]) ); defparam \lIlo1[6] .INIT=16'h0E00; // @28:489843 CFG4 \lIlo1[41] ( .A(O1iO1[20]), .B(O0Io16), .C(un528_lIlo1_2_Z), .D(un541_lIlo1), .Y(lIlo1_Z[41]) ); defparam \lIlo1[41] .INIT=16'h4440; // @28:489675 CFG4 \lIlo1[38] ( .A(O1iO1[20]), .B(O0Io16), .C(un528_lIlo1_2_Z), .D(un541_lIlo1), .Y(lIlo1_Z[38]) ); defparam \lIlo1[38] .INIT=16'h8880; // @28:489102 CFG4 \lIlo1[20] ( .A(o0iO1[20]), .B(un331_lIlo1_2_Z), .C(un331_lIlo1_1_Z), .D(lIlo1[7]), .Y(lIlo1_Z[20]) ); defparam \lIlo1[20] .INIT=16'h5400; // @28:489219 CFG4 un368_lIlo1 ( .A(o0iO1[20]), .B(un331_lIlo1_2_Z), .C(un331_lIlo1_1_Z), .D(lIlo1[7]), .Y(lIlo1[22]) ); defparam un368_lIlo1.INIT=16'hA800; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_CNTRL_1s_26s */ module CTSE_PEMSTAT_LINC_1s_26s ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, o0Io1_0, cnt00, N_1133, N_1131, N_1115, l1II1, N_1124, l0lo1, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; output o0Io1_0 ; output [17:0] cnt00 ; input N_1133 ; input N_1131 ; input N_1115 ; input l1II1 ; input N_1124 ; input l0lo1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire o0Io1_0 ; wire N_1133 ; wire N_1131 ; wire N_1115 ; wire l1II1 ; wire N_1124 ; wire l0lo1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [17:0] precnt_lm; wire [0:0] Ioli0_i; wire [16:1] precnt_cry_Z; wire [17:1] precnt_s; wire [11:1] precnt_cry_Y_37; wire [17:12] precnt_cry_Y_11; wire [18:18] OO0o1; wire [0:0] precnt_lm_0_1_0_Z; wire VCC ; wire N_285 ; wire GND ; wire un1_Ioli0_1_0_Z ; wire precnt_s_4172_FCO ; wire precnt_s_4172_S ; wire precnt_s_4172_Y ; // @28:496288 SLE \precnt[17] ( .Q(cnt00[17]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[17]), .EN(N_285), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[16] ( .Q(cnt00[16]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[16]), .EN(N_285), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[15] ( .Q(cnt00[15]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[15]), .EN(N_285), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[14] ( .Q(cnt00[14]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[14]), .EN(N_285), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[13] ( .Q(cnt00[13]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[13]), .EN(N_285), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[12] ( .Q(cnt00[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[12]), .EN(N_285), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[11] ( .Q(cnt00[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_285), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[10] ( .Q(cnt00[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_285), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[9] ( .Q(cnt00[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_285), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[8] ( .Q(cnt00[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_285), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[7] ( .Q(cnt00[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_285), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[6] ( .Q(cnt00[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_285), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[5] ( .Q(cnt00[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_285), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[4] ( .Q(cnt00[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_285), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[3] ( .Q(cnt00[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_285), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[2] ( .Q(cnt00[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_285), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[1] ( .Q(cnt00[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_285), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[0] ( .Q(cnt00[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_285), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496391 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i[0]), .EN(un1_Ioli0_1_0_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 ARI1 precnt_s_4172 ( .FCO(precnt_s_4172_FCO), .S(precnt_s_4172_S), .Y(precnt_s_4172_Y), .B(cnt00[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4172.INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_37[1]), .B(cnt00[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4172_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_37[2]), .B(cnt00[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_37[3]), .B(cnt00[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_37[4]), .B(cnt00[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_37[5]), .B(cnt00[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_37[6]), .B(cnt00[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_37[7]), .B(cnt00[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_37[8]), .B(cnt00[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_37[9]), .B(cnt00[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_37[10]), .B(cnt00[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[11] ( .FCO(precnt_cry_Z[11]), .S(precnt_s[11]), .Y(precnt_cry_Y_37[11]), .B(cnt00[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[12] ( .FCO(precnt_cry_Z[12]), .S(precnt_s[12]), .Y(precnt_cry_Y_11[12]), .B(cnt00[12]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[11]) ); defparam \precnt_cry[12] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[13] ( .FCO(precnt_cry_Z[13]), .S(precnt_s[13]), .Y(precnt_cry_Y_11[13]), .B(cnt00[13]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[12]) ); defparam \precnt_cry[13] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[14] ( .FCO(precnt_cry_Z[14]), .S(precnt_s[14]), .Y(precnt_cry_Y_11[14]), .B(cnt00[14]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[13]) ); defparam \precnt_cry[14] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[15] ( .FCO(precnt_cry_Z[15]), .S(precnt_s[15]), .Y(precnt_cry_Y_11[15]), .B(cnt00[15]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[14]) ); defparam \precnt_cry[15] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[16] ( .FCO(precnt_cry_Z[16]), .S(precnt_s[16]), .Y(precnt_cry_Y_11[16]), .B(cnt00[16]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[15]) ); defparam \precnt_cry[16] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[17] ( .FCO(OO0o1[18]), .S(precnt_s[17]), .Y(precnt_cry_Y_11[17]), .B(cnt00[17]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[16]) ); defparam \precnt_cry[17] .INIT=20'h4AA00; // @28:496288 CFG4 \precnt_lm_0[0] ( .A(cnt00[0]), .B(l0Io1_0), .C(precnt_lm_0_1_0_Z[0]), .D(l0lo1), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=16'hCC5C; // @28:496288 CFG3 \precnt_lm_0_1_0[0] ( .A(N_1124), .B(l1II1), .C(N_1115), .Y(precnt_lm_0_1_0_Z[0]) ); defparam \precnt_lm_0_1_0[0] .INIT=8'h7F; // @28:496198 CFG4 un1_Ioli0_1_0 ( .A(l0Io1_0), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .C(OO0o1[18]), .D(N_1131), .Y(un1_Ioli0_1_0_Z) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:496391 CFG2 IilI1_RNO ( .A(N_1131), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .Y(Ioli0_i[0]) ); defparam IilI1_RNO.INIT=4'h7; // @28:496288 CFG4 \precnt_lm_0[17] ( .A(l0lo1), .B(precnt_s[17]), .C(N_1133), .D(N_1115), .Y(precnt_lm[17]) ); defparam \precnt_lm_0[17] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[16] ( .A(l0lo1), .B(precnt_s[16]), .C(N_1133), .D(N_1115), .Y(precnt_lm[16]) ); defparam \precnt_lm_0[16] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[15] ( .A(l0lo1), .B(precnt_s[15]), .C(N_1133), .D(N_1115), .Y(precnt_lm[15]) ); defparam \precnt_lm_0[15] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[14] ( .A(l0lo1), .B(precnt_s[14]), .C(N_1133), .D(N_1115), .Y(precnt_lm[14]) ); defparam \precnt_lm_0[14] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[13] ( .A(l0lo1), .B(precnt_s[13]), .C(N_1133), .D(N_1115), .Y(precnt_lm[13]) ); defparam \precnt_lm_0[13] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[12] ( .A(l0lo1), .B(precnt_s[12]), .C(N_1133), .D(N_1115), .Y(precnt_lm[12]) ); defparam \precnt_lm_0[12] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[11] ( .A(l0lo1), .B(precnt_s[11]), .C(N_1133), .D(N_1115), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[10] ( .A(l0lo1), .B(precnt_s[10]), .C(N_1133), .D(N_1115), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[9] ( .A(l0lo1), .B(precnt_s[9]), .C(N_1133), .D(N_1115), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[8] ( .A(l0lo1), .B(precnt_s[8]), .C(N_1133), .D(N_1115), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[7] ( .A(l0lo1), .B(precnt_s[7]), .C(N_1133), .D(N_1115), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[6] ( .A(l0lo1), .B(precnt_s[6]), .C(N_1133), .D(N_1115), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[5] ( .A(l0lo1), .B(precnt_s[5]), .C(N_1133), .D(N_1115), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[4] ( .A(l0lo1), .B(precnt_s[4]), .C(N_1133), .D(N_1115), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[3] ( .A(l0lo1), .B(precnt_s[3]), .C(N_1133), .D(N_1115), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[2] ( .A(l0lo1), .B(precnt_s[2]), .C(N_1133), .D(N_1115), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[1] ( .A(l0lo1), .B(precnt_s[1]), .C(N_1133), .D(N_1115), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=16'h0444; // @28:496184 CFG4 un1_iOI01_1_i_0 ( .A(N_1115), .B(N_1133), .C(l0Io1_0), .D(l0lo1), .Y(N_285) ); defparam un1_iOI01_1_i_0.INIT=16'hFFF8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_LINC_1s_26s */ module CTSE_PEMSTAT_LINC_1s_26s_0 ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, o0Io1_0, cnt01, N_1133, N_1131, N_1121, l1II1, N_1124, l0lo1, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; output o0Io1_0 ; output [17:0] cnt01 ; input N_1133 ; input N_1131 ; input N_1121 ; input l1II1 ; input N_1124 ; input l0lo1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire o0Io1_0 ; wire N_1133 ; wire N_1131 ; wire N_1121 ; wire l1II1 ; wire N_1124 ; wire l0lo1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [17:0] precnt_lm; wire [1:1] Ioli0_i; wire [16:1] precnt_cry_Z; wire [17:1] precnt_s; wire [11:1] precnt_cry_Y_36; wire [17:12] precnt_cry_Y_10; wire [18:18] OO0o1; wire [0:0] precnt_lm_0_1_0_Z; wire VCC ; wire N_290 ; wire GND ; wire un1_Ioli0_1_0_0 ; wire precnt_s_4171_FCO ; wire precnt_s_4171_S ; wire precnt_s_4171_Y ; // @28:496288 SLE \precnt[17] ( .Q(cnt01[17]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[17]), .EN(N_290), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[16] ( .Q(cnt01[16]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[16]), .EN(N_290), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[15] ( .Q(cnt01[15]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[15]), .EN(N_290), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[14] ( .Q(cnt01[14]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[14]), .EN(N_290), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[13] ( .Q(cnt01[13]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[13]), .EN(N_290), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[12] ( .Q(cnt01[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[12]), .EN(N_290), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[11] ( .Q(cnt01[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_290), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[10] ( .Q(cnt01[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_290), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[9] ( .Q(cnt01[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_290), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[8] ( .Q(cnt01[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_290), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[7] ( .Q(cnt01[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_290), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[6] ( .Q(cnt01[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_290), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[5] ( .Q(cnt01[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_290), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[4] ( .Q(cnt01[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_290), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[3] ( .Q(cnt01[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_290), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[2] ( .Q(cnt01[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_290), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[1] ( .Q(cnt01[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_290), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[0] ( .Q(cnt01[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_290), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496391 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i[1]), .EN(un1_Ioli0_1_0_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 ARI1 precnt_s_4171 ( .FCO(precnt_s_4171_FCO), .S(precnt_s_4171_S), .Y(precnt_s_4171_Y), .B(cnt01[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4171.INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_36[1]), .B(cnt01[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4171_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_36[2]), .B(cnt01[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_36[3]), .B(cnt01[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_36[4]), .B(cnt01[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_36[5]), .B(cnt01[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_36[6]), .B(cnt01[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_36[7]), .B(cnt01[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_36[8]), .B(cnt01[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_36[9]), .B(cnt01[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_36[10]), .B(cnt01[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[11] ( .FCO(precnt_cry_Z[11]), .S(precnt_s[11]), .Y(precnt_cry_Y_36[11]), .B(cnt01[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[12] ( .FCO(precnt_cry_Z[12]), .S(precnt_s[12]), .Y(precnt_cry_Y_10[12]), .B(cnt01[12]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[11]) ); defparam \precnt_cry[12] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[13] ( .FCO(precnt_cry_Z[13]), .S(precnt_s[13]), .Y(precnt_cry_Y_10[13]), .B(cnt01[13]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[12]) ); defparam \precnt_cry[13] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[14] ( .FCO(precnt_cry_Z[14]), .S(precnt_s[14]), .Y(precnt_cry_Y_10[14]), .B(cnt01[14]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[13]) ); defparam \precnt_cry[14] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[15] ( .FCO(precnt_cry_Z[15]), .S(precnt_s[15]), .Y(precnt_cry_Y_10[15]), .B(cnt01[15]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[14]) ); defparam \precnt_cry[15] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[16] ( .FCO(precnt_cry_Z[16]), .S(precnt_s[16]), .Y(precnt_cry_Y_10[16]), .B(cnt01[16]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[15]) ); defparam \precnt_cry[16] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[17] ( .FCO(OO0o1[18]), .S(precnt_s[17]), .Y(precnt_cry_Y_10[17]), .B(cnt01[17]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[16]) ); defparam \precnt_cry[17] .INIT=20'h4AA00; // @28:496288 CFG4 \precnt_lm_0[0] ( .A(cnt01[0]), .B(l0Io1_0), .C(precnt_lm_0_1_0_Z[0]), .D(l0lo1), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=16'hCC5C; // @28:496288 CFG3 \precnt_lm_0_1_0[0] ( .A(N_1124), .B(l1II1), .C(N_1121), .Y(precnt_lm_0_1_0_Z[0]) ); defparam \precnt_lm_0_1_0[0] .INIT=8'h7F; // @28:496198 CFG4 un1_Ioli0_1_0 ( .A(l0Io1_0), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .C(OO0o1[18]), .D(N_1131), .Y(un1_Ioli0_1_0_0) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:496391 CFG2 IilI1_RNO ( .A(N_1131), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .Y(Ioli0_i[1]) ); defparam IilI1_RNO.INIT=4'h7; // @28:496288 CFG4 \precnt_lm_0[17] ( .A(l0lo1), .B(precnt_s[17]), .C(N_1133), .D(N_1121), .Y(precnt_lm[17]) ); defparam \precnt_lm_0[17] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[16] ( .A(l0lo1), .B(precnt_s[16]), .C(N_1133), .D(N_1121), .Y(precnt_lm[16]) ); defparam \precnt_lm_0[16] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[15] ( .A(l0lo1), .B(precnt_s[15]), .C(N_1133), .D(N_1121), .Y(precnt_lm[15]) ); defparam \precnt_lm_0[15] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[14] ( .A(l0lo1), .B(precnt_s[14]), .C(N_1133), .D(N_1121), .Y(precnt_lm[14]) ); defparam \precnt_lm_0[14] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[13] ( .A(l0lo1), .B(precnt_s[13]), .C(N_1133), .D(N_1121), .Y(precnt_lm[13]) ); defparam \precnt_lm_0[13] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[12] ( .A(l0lo1), .B(precnt_s[12]), .C(N_1133), .D(N_1121), .Y(precnt_lm[12]) ); defparam \precnt_lm_0[12] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[11] ( .A(l0lo1), .B(precnt_s[11]), .C(N_1133), .D(N_1121), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[10] ( .A(l0lo1), .B(precnt_s[10]), .C(N_1133), .D(N_1121), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[9] ( .A(l0lo1), .B(precnt_s[9]), .C(N_1133), .D(N_1121), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[8] ( .A(l0lo1), .B(precnt_s[8]), .C(N_1133), .D(N_1121), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[7] ( .A(l0lo1), .B(precnt_s[7]), .C(N_1133), .D(N_1121), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[6] ( .A(l0lo1), .B(precnt_s[6]), .C(N_1133), .D(N_1121), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[5] ( .A(l0lo1), .B(precnt_s[5]), .C(N_1133), .D(N_1121), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[4] ( .A(l0lo1), .B(precnt_s[4]), .C(N_1133), .D(N_1121), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[3] ( .A(l0lo1), .B(precnt_s[3]), .C(N_1133), .D(N_1121), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[2] ( .A(l0lo1), .B(precnt_s[2]), .C(N_1133), .D(N_1121), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[1] ( .A(l0lo1), .B(precnt_s[1]), .C(N_1133), .D(N_1121), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=16'h0444; // @28:496184 CFG4 un1_iOI01_1_i_0 ( .A(N_1121), .B(N_1133), .C(l0Io1_0), .D(l0lo1), .Y(N_290) ); defparam un1_iOI01_1_i_0.INIT=16'hFFF8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_LINC_1s_26s_0 */ module CTSE_PEMSTAT_LINC_1s_26s_1 ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, o0Io1_0, cnt02, N_1137, N_1131, N_1115, l1II1, N_1118, l0lo1, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; output o0Io1_0 ; output [17:0] cnt02 ; input N_1137 ; input N_1131 ; input N_1115 ; input l1II1 ; input N_1118 ; input l0lo1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire o0Io1_0 ; wire N_1137 ; wire N_1131 ; wire N_1115 ; wire l1II1 ; wire N_1118 ; wire l0lo1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [17:0] precnt_lm; wire [2:2] Ioli0_i; wire [16:1] precnt_cry_Z; wire [17:1] precnt_s; wire [11:1] precnt_cry_Y_35; wire [17:12] precnt_cry_Y_9; wire [18:18] OO0o1; wire [0:0] precnt_lm_0_1_0_Z; wire VCC ; wire N_295 ; wire GND ; wire un1_Ioli0_1_0_1 ; wire precnt_s_4170_FCO ; wire precnt_s_4170_S ; wire precnt_s_4170_Y ; // @28:496288 SLE \precnt[17] ( .Q(cnt02[17]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[17]), .EN(N_295), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[16] ( .Q(cnt02[16]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[16]), .EN(N_295), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[15] ( .Q(cnt02[15]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[15]), .EN(N_295), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[14] ( .Q(cnt02[14]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[14]), .EN(N_295), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[13] ( .Q(cnt02[13]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[13]), .EN(N_295), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[12] ( .Q(cnt02[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[12]), .EN(N_295), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[11] ( .Q(cnt02[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_295), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[10] ( .Q(cnt02[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_295), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[9] ( .Q(cnt02[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_295), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[8] ( .Q(cnt02[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_295), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[7] ( .Q(cnt02[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_295), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[6] ( .Q(cnt02[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_295), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[5] ( .Q(cnt02[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_295), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[4] ( .Q(cnt02[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_295), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[3] ( .Q(cnt02[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_295), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[2] ( .Q(cnt02[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_295), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[1] ( .Q(cnt02[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_295), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[0] ( .Q(cnt02[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_295), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496391 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i[2]), .EN(un1_Ioli0_1_0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 ARI1 precnt_s_4170 ( .FCO(precnt_s_4170_FCO), .S(precnt_s_4170_S), .Y(precnt_s_4170_Y), .B(cnt02[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4170.INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_35[1]), .B(cnt02[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4170_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_35[2]), .B(cnt02[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_35[3]), .B(cnt02[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_35[4]), .B(cnt02[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_35[5]), .B(cnt02[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_35[6]), .B(cnt02[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_35[7]), .B(cnt02[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_35[8]), .B(cnt02[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_35[9]), .B(cnt02[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_35[10]), .B(cnt02[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[11] ( .FCO(precnt_cry_Z[11]), .S(precnt_s[11]), .Y(precnt_cry_Y_35[11]), .B(cnt02[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[12] ( .FCO(precnt_cry_Z[12]), .S(precnt_s[12]), .Y(precnt_cry_Y_9[12]), .B(cnt02[12]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[11]) ); defparam \precnt_cry[12] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[13] ( .FCO(precnt_cry_Z[13]), .S(precnt_s[13]), .Y(precnt_cry_Y_9[13]), .B(cnt02[13]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[12]) ); defparam \precnt_cry[13] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[14] ( .FCO(precnt_cry_Z[14]), .S(precnt_s[14]), .Y(precnt_cry_Y_9[14]), .B(cnt02[14]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[13]) ); defparam \precnt_cry[14] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[15] ( .FCO(precnt_cry_Z[15]), .S(precnt_s[15]), .Y(precnt_cry_Y_9[15]), .B(cnt02[15]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[14]) ); defparam \precnt_cry[15] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[16] ( .FCO(precnt_cry_Z[16]), .S(precnt_s[16]), .Y(precnt_cry_Y_9[16]), .B(cnt02[16]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[15]) ); defparam \precnt_cry[16] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[17] ( .FCO(OO0o1[18]), .S(precnt_s[17]), .Y(precnt_cry_Y_9[17]), .B(cnt02[17]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[16]) ); defparam \precnt_cry[17] .INIT=20'h4AA00; // @28:496288 CFG4 \precnt_lm_0[0] ( .A(cnt02[0]), .B(l0Io1_0), .C(precnt_lm_0_1_0_Z[0]), .D(l0lo1), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=16'hCC5C; // @28:496288 CFG3 \precnt_lm_0_1_0[0] ( .A(N_1118), .B(l1II1), .C(N_1115), .Y(precnt_lm_0_1_0_Z[0]) ); defparam \precnt_lm_0_1_0[0] .INIT=8'h7F; // @28:496198 CFG4 un1_Ioli0_1_0 ( .A(l0Io1_0), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .C(OO0o1[18]), .D(N_1131), .Y(un1_Ioli0_1_0_1) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:496391 CFG2 IilI1_RNO ( .A(N_1131), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .Y(Ioli0_i[2]) ); defparam IilI1_RNO.INIT=4'h7; // @28:496288 CFG4 \precnt_lm_0[17] ( .A(l0lo1), .B(precnt_s[17]), .C(N_1137), .D(N_1115), .Y(precnt_lm[17]) ); defparam \precnt_lm_0[17] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[16] ( .A(l0lo1), .B(precnt_s[16]), .C(N_1137), .D(N_1115), .Y(precnt_lm[16]) ); defparam \precnt_lm_0[16] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[15] ( .A(l0lo1), .B(precnt_s[15]), .C(N_1137), .D(N_1115), .Y(precnt_lm[15]) ); defparam \precnt_lm_0[15] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[14] ( .A(l0lo1), .B(precnt_s[14]), .C(N_1137), .D(N_1115), .Y(precnt_lm[14]) ); defparam \precnt_lm_0[14] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[13] ( .A(l0lo1), .B(precnt_s[13]), .C(N_1137), .D(N_1115), .Y(precnt_lm[13]) ); defparam \precnt_lm_0[13] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[12] ( .A(l0lo1), .B(precnt_s[12]), .C(N_1137), .D(N_1115), .Y(precnt_lm[12]) ); defparam \precnt_lm_0[12] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[11] ( .A(l0lo1), .B(precnt_s[11]), .C(N_1137), .D(N_1115), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[10] ( .A(l0lo1), .B(precnt_s[10]), .C(N_1137), .D(N_1115), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[9] ( .A(l0lo1), .B(precnt_s[9]), .C(N_1137), .D(N_1115), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[8] ( .A(l0lo1), .B(precnt_s[8]), .C(N_1137), .D(N_1115), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[7] ( .A(l0lo1), .B(precnt_s[7]), .C(N_1137), .D(N_1115), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[6] ( .A(l0lo1), .B(precnt_s[6]), .C(N_1137), .D(N_1115), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[5] ( .A(l0lo1), .B(precnt_s[5]), .C(N_1137), .D(N_1115), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[4] ( .A(l0lo1), .B(precnt_s[4]), .C(N_1137), .D(N_1115), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[3] ( .A(l0lo1), .B(precnt_s[3]), .C(N_1137), .D(N_1115), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[2] ( .A(l0lo1), .B(precnt_s[2]), .C(N_1137), .D(N_1115), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[1] ( .A(l0lo1), .B(precnt_s[1]), .C(N_1137), .D(N_1115), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=16'h0444; // @28:496184 CFG4 un1_iOI01_1_i_0 ( .A(N_1115), .B(N_1137), .C(l0Io1_0), .D(l0lo1), .Y(N_295) ); defparam un1_iOI01_1_i_0.INIT=16'hFFF8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_LINC_1s_26s_1 */ module CTSE_PEMSTAT_LINC_1s_26s_2 ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, o0Io1_0, cnt03, N_1137, N_1131, N_1118, N_1121, l1II1, l0lo1, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; output o0Io1_0 ; output [17:0] cnt03 ; input N_1137 ; input N_1131 ; input N_1118 ; input N_1121 ; input l1II1 ; input l0lo1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire o0Io1_0 ; wire N_1137 ; wire N_1131 ; wire N_1118 ; wire N_1121 ; wire l1II1 ; wire l0lo1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [17:0] precnt_lm; wire [3:3] Ioli0_i; wire [16:1] precnt_cry_Z; wire [17:1] precnt_s; wire [11:1] precnt_cry_Y_34; wire [17:12] precnt_cry_Y_8; wire [18:18] OO0o1; wire [0:0] precnt_lm_0_1_0_Z; wire VCC ; wire N_300 ; wire GND ; wire un1_Ioli0_1_0_2 ; wire precnt_s_4169_FCO ; wire precnt_s_4169_S ; wire precnt_s_4169_Y ; // @28:496288 SLE \precnt[17] ( .Q(cnt03[17]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[17]), .EN(N_300), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[16] ( .Q(cnt03[16]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[16]), .EN(N_300), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[15] ( .Q(cnt03[15]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[15]), .EN(N_300), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[14] ( .Q(cnt03[14]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[14]), .EN(N_300), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[13] ( .Q(cnt03[13]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[13]), .EN(N_300), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[12] ( .Q(cnt03[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[12]), .EN(N_300), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[11] ( .Q(cnt03[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_300), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[10] ( .Q(cnt03[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_300), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[9] ( .Q(cnt03[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_300), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[8] ( .Q(cnt03[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_300), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[7] ( .Q(cnt03[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_300), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[6] ( .Q(cnt03[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_300), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[5] ( .Q(cnt03[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_300), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[4] ( .Q(cnt03[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_300), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[3] ( .Q(cnt03[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_300), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[2] ( .Q(cnt03[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_300), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[1] ( .Q(cnt03[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_300), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[0] ( .Q(cnt03[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_300), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496391 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i[3]), .EN(un1_Ioli0_1_0_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 ARI1 precnt_s_4169 ( .FCO(precnt_s_4169_FCO), .S(precnt_s_4169_S), .Y(precnt_s_4169_Y), .B(cnt03[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4169.INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_34[1]), .B(cnt03[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4169_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_34[2]), .B(cnt03[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_34[3]), .B(cnt03[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_34[4]), .B(cnt03[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_34[5]), .B(cnt03[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_34[6]), .B(cnt03[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_34[7]), .B(cnt03[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_34[8]), .B(cnt03[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_34[9]), .B(cnt03[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_34[10]), .B(cnt03[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[11] ( .FCO(precnt_cry_Z[11]), .S(precnt_s[11]), .Y(precnt_cry_Y_34[11]), .B(cnt03[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[12] ( .FCO(precnt_cry_Z[12]), .S(precnt_s[12]), .Y(precnt_cry_Y_8[12]), .B(cnt03[12]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[11]) ); defparam \precnt_cry[12] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[13] ( .FCO(precnt_cry_Z[13]), .S(precnt_s[13]), .Y(precnt_cry_Y_8[13]), .B(cnt03[13]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[12]) ); defparam \precnt_cry[13] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[14] ( .FCO(precnt_cry_Z[14]), .S(precnt_s[14]), .Y(precnt_cry_Y_8[14]), .B(cnt03[14]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[13]) ); defparam \precnt_cry[14] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[15] ( .FCO(precnt_cry_Z[15]), .S(precnt_s[15]), .Y(precnt_cry_Y_8[15]), .B(cnt03[15]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[14]) ); defparam \precnt_cry[15] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[16] ( .FCO(precnt_cry_Z[16]), .S(precnt_s[16]), .Y(precnt_cry_Y_8[16]), .B(cnt03[16]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[15]) ); defparam \precnt_cry[16] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[17] ( .FCO(OO0o1[18]), .S(precnt_s[17]), .Y(precnt_cry_Y_8[17]), .B(cnt03[17]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[16]) ); defparam \precnt_cry[17] .INIT=20'h4AA00; // @28:496288 CFG4 \precnt_lm_0[0] ( .A(cnt03[0]), .B(l0Io1_0), .C(precnt_lm_0_1_0_Z[0]), .D(l0lo1), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=16'hCC5C; // @28:496288 CFG3 \precnt_lm_0_1_0[0] ( .A(l1II1), .B(N_1121), .C(N_1118), .Y(precnt_lm_0_1_0_Z[0]) ); defparam \precnt_lm_0_1_0[0] .INIT=8'h7F; // @28:496198 CFG4 un1_Ioli0_1_0 ( .A(l0Io1_0), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .C(OO0o1[18]), .D(N_1131), .Y(un1_Ioli0_1_0_2) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:496391 CFG2 IilI1_RNO ( .A(N_1131), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .Y(Ioli0_i[3]) ); defparam IilI1_RNO.INIT=4'h7; // @28:496288 CFG4 \precnt_lm_0[17] ( .A(l0lo1), .B(precnt_s[17]), .C(N_1137), .D(N_1121), .Y(precnt_lm[17]) ); defparam \precnt_lm_0[17] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[16] ( .A(l0lo1), .B(precnt_s[16]), .C(N_1137), .D(N_1121), .Y(precnt_lm[16]) ); defparam \precnt_lm_0[16] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[15] ( .A(l0lo1), .B(precnt_s[15]), .C(N_1137), .D(N_1121), .Y(precnt_lm[15]) ); defparam \precnt_lm_0[15] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[14] ( .A(l0lo1), .B(precnt_s[14]), .C(N_1137), .D(N_1121), .Y(precnt_lm[14]) ); defparam \precnt_lm_0[14] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[13] ( .A(l0lo1), .B(precnt_s[13]), .C(N_1137), .D(N_1121), .Y(precnt_lm[13]) ); defparam \precnt_lm_0[13] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[12] ( .A(l0lo1), .B(precnt_s[12]), .C(N_1137), .D(N_1121), .Y(precnt_lm[12]) ); defparam \precnt_lm_0[12] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[11] ( .A(l0lo1), .B(precnt_s[11]), .C(N_1137), .D(N_1121), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[10] ( .A(l0lo1), .B(precnt_s[10]), .C(N_1137), .D(N_1121), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[9] ( .A(l0lo1), .B(precnt_s[9]), .C(N_1137), .D(N_1121), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[8] ( .A(l0lo1), .B(precnt_s[8]), .C(N_1137), .D(N_1121), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[7] ( .A(l0lo1), .B(precnt_s[7]), .C(N_1137), .D(N_1121), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[6] ( .A(l0lo1), .B(precnt_s[6]), .C(N_1137), .D(N_1121), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[5] ( .A(l0lo1), .B(precnt_s[5]), .C(N_1137), .D(N_1121), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[4] ( .A(l0lo1), .B(precnt_s[4]), .C(N_1137), .D(N_1121), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[3] ( .A(l0lo1), .B(precnt_s[3]), .C(N_1137), .D(N_1121), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[2] ( .A(l0lo1), .B(precnt_s[2]), .C(N_1137), .D(N_1121), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[1] ( .A(l0lo1), .B(precnt_s[1]), .C(N_1137), .D(N_1121), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=16'h0444; // @28:496184 CFG4 un1_iOI01_1_i_0 ( .A(N_1121), .B(N_1137), .C(l0Io1_0), .D(l0lo1), .Y(N_300) ); defparam un1_iOI01_1_i_0.INIT=16'hFFF8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_LINC_1s_26s_2 */ module CTSE_PEMSTAT_LINC_1s_26s_3 ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, o0Io1_0, cnt04, N_1133, N_1131, N_1124, N_1130, l1II1, l0lo1, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; output o0Io1_0 ; output [17:0] cnt04 ; input N_1133 ; input N_1131 ; input N_1124 ; input N_1130 ; input l1II1 ; input l0lo1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire o0Io1_0 ; wire N_1133 ; wire N_1131 ; wire N_1124 ; wire N_1130 ; wire l1II1 ; wire l0lo1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [17:0] precnt_lm; wire [4:4] Ioli0_i; wire [16:1] precnt_cry_Z; wire [17:1] precnt_s; wire [11:1] precnt_cry_Y_33; wire [17:12] precnt_cry_Y_7; wire [18:18] OO0o1; wire [0:0] precnt_lm_0_1_0_Z; wire VCC ; wire N_305 ; wire GND ; wire un1_Ioli0_1_0_3 ; wire precnt_s_4168_FCO ; wire precnt_s_4168_S ; wire precnt_s_4168_Y ; // @28:496288 SLE \precnt[17] ( .Q(cnt04[17]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[17]), .EN(N_305), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[16] ( .Q(cnt04[16]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[16]), .EN(N_305), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[15] ( .Q(cnt04[15]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[15]), .EN(N_305), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[14] ( .Q(cnt04[14]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[14]), .EN(N_305), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[13] ( .Q(cnt04[13]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[13]), .EN(N_305), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[12] ( .Q(cnt04[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[12]), .EN(N_305), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[11] ( .Q(cnt04[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_305), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[10] ( .Q(cnt04[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_305), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[9] ( .Q(cnt04[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_305), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[8] ( .Q(cnt04[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_305), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[7] ( .Q(cnt04[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_305), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[6] ( .Q(cnt04[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_305), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[5] ( .Q(cnt04[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_305), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[4] ( .Q(cnt04[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_305), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[3] ( .Q(cnt04[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_305), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[2] ( .Q(cnt04[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_305), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[1] ( .Q(cnt04[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_305), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[0] ( .Q(cnt04[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_305), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496391 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i[4]), .EN(un1_Ioli0_1_0_3), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 ARI1 precnt_s_4168 ( .FCO(precnt_s_4168_FCO), .S(precnt_s_4168_S), .Y(precnt_s_4168_Y), .B(cnt04[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4168.INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_33[1]), .B(cnt04[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4168_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_33[2]), .B(cnt04[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_33[3]), .B(cnt04[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_33[4]), .B(cnt04[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_33[5]), .B(cnt04[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_33[6]), .B(cnt04[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_33[7]), .B(cnt04[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_33[8]), .B(cnt04[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_33[9]), .B(cnt04[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_33[10]), .B(cnt04[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[11] ( .FCO(precnt_cry_Z[11]), .S(precnt_s[11]), .Y(precnt_cry_Y_33[11]), .B(cnt04[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[12] ( .FCO(precnt_cry_Z[12]), .S(precnt_s[12]), .Y(precnt_cry_Y_7[12]), .B(cnt04[12]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[11]) ); defparam \precnt_cry[12] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[13] ( .FCO(precnt_cry_Z[13]), .S(precnt_s[13]), .Y(precnt_cry_Y_7[13]), .B(cnt04[13]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[12]) ); defparam \precnt_cry[13] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[14] ( .FCO(precnt_cry_Z[14]), .S(precnt_s[14]), .Y(precnt_cry_Y_7[14]), .B(cnt04[14]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[13]) ); defparam \precnt_cry[14] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[15] ( .FCO(precnt_cry_Z[15]), .S(precnt_s[15]), .Y(precnt_cry_Y_7[15]), .B(cnt04[15]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[14]) ); defparam \precnt_cry[15] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[16] ( .FCO(precnt_cry_Z[16]), .S(precnt_s[16]), .Y(precnt_cry_Y_7[16]), .B(cnt04[16]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[15]) ); defparam \precnt_cry[16] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[17] ( .FCO(OO0o1[18]), .S(precnt_s[17]), .Y(precnt_cry_Y_7[17]), .B(cnt04[17]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[16]) ); defparam \precnt_cry[17] .INIT=20'h4AA00; // @28:496288 CFG4 \precnt_lm_0[0] ( .A(cnt04[0]), .B(l0Io1_0), .C(precnt_lm_0_1_0_Z[0]), .D(l0lo1), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=16'hCC5C; // @28:496288 CFG3 \precnt_lm_0_1_0[0] ( .A(l1II1), .B(N_1130), .C(N_1124), .Y(precnt_lm_0_1_0_Z[0]) ); defparam \precnt_lm_0_1_0[0] .INIT=8'h7F; // @28:496198 CFG4 un1_Ioli0_1_0 ( .A(l0Io1_0), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .C(OO0o1[18]), .D(N_1131), .Y(un1_Ioli0_1_0_3) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:496391 CFG2 IilI1_RNO ( .A(N_1131), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .Y(Ioli0_i[4]) ); defparam IilI1_RNO.INIT=4'h7; // @28:496288 CFG4 \precnt_lm_0[17] ( .A(l0lo1), .B(precnt_s[17]), .C(N_1133), .D(N_1130), .Y(precnt_lm[17]) ); defparam \precnt_lm_0[17] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[16] ( .A(l0lo1), .B(precnt_s[16]), .C(N_1133), .D(N_1130), .Y(precnt_lm[16]) ); defparam \precnt_lm_0[16] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[15] ( .A(l0lo1), .B(precnt_s[15]), .C(N_1133), .D(N_1130), .Y(precnt_lm[15]) ); defparam \precnt_lm_0[15] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[14] ( .A(l0lo1), .B(precnt_s[14]), .C(N_1133), .D(N_1130), .Y(precnt_lm[14]) ); defparam \precnt_lm_0[14] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[13] ( .A(l0lo1), .B(precnt_s[13]), .C(N_1133), .D(N_1130), .Y(precnt_lm[13]) ); defparam \precnt_lm_0[13] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[12] ( .A(l0lo1), .B(precnt_s[12]), .C(N_1133), .D(N_1130), .Y(precnt_lm[12]) ); defparam \precnt_lm_0[12] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[11] ( .A(l0lo1), .B(precnt_s[11]), .C(N_1133), .D(N_1130), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[10] ( .A(l0lo1), .B(precnt_s[10]), .C(N_1133), .D(N_1130), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[9] ( .A(l0lo1), .B(precnt_s[9]), .C(N_1133), .D(N_1130), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[8] ( .A(l0lo1), .B(precnt_s[8]), .C(N_1133), .D(N_1130), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[7] ( .A(l0lo1), .B(precnt_s[7]), .C(N_1133), .D(N_1130), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[6] ( .A(l0lo1), .B(precnt_s[6]), .C(N_1133), .D(N_1130), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[5] ( .A(l0lo1), .B(precnt_s[5]), .C(N_1133), .D(N_1130), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[4] ( .A(l0lo1), .B(precnt_s[4]), .C(N_1133), .D(N_1130), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[3] ( .A(l0lo1), .B(precnt_s[3]), .C(N_1133), .D(N_1130), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[2] ( .A(l0lo1), .B(precnt_s[2]), .C(N_1133), .D(N_1130), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[1] ( .A(l0lo1), .B(precnt_s[1]), .C(N_1133), .D(N_1130), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=16'h0444; // @28:496184 CFG4 un1_iOI01_1_i_0 ( .A(N_1130), .B(N_1133), .C(l0Io1_0), .D(l0lo1), .Y(N_305) ); defparam un1_iOI01_1_i_0.INIT=16'hFFF8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_LINC_1s_26s_3 */ module CTSE_PEMSTAT_LINC_1s_26s_4 ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, o0Io1_0, cnt05, N_1133, N_1131, N_1124, N_1127, l1II1, l0lo1, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; output o0Io1_0 ; output [17:0] cnt05 ; input N_1133 ; input N_1131 ; input N_1124 ; input N_1127 ; input l1II1 ; input l0lo1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire o0Io1_0 ; wire N_1133 ; wire N_1131 ; wire N_1124 ; wire N_1127 ; wire l1II1 ; wire l0lo1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [17:0] precnt_lm; wire [5:5] Ioli0_i; wire [16:1] precnt_cry_Z; wire [17:1] precnt_s; wire [11:1] precnt_cry_Y_32; wire [17:12] precnt_cry_Y_6; wire [18:18] OO0o1; wire [0:0] precnt_lm_0_1_0_Z; wire VCC ; wire N_310 ; wire GND ; wire un1_Ioli0_1_0_4 ; wire precnt_s_4167_FCO ; wire precnt_s_4167_S ; wire precnt_s_4167_Y ; // @28:496288 SLE \precnt[17] ( .Q(cnt05[17]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[17]), .EN(N_310), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[16] ( .Q(cnt05[16]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[16]), .EN(N_310), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[15] ( .Q(cnt05[15]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[15]), .EN(N_310), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[14] ( .Q(cnt05[14]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[14]), .EN(N_310), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[13] ( .Q(cnt05[13]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[13]), .EN(N_310), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[12] ( .Q(cnt05[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[12]), .EN(N_310), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[11] ( .Q(cnt05[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_310), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[10] ( .Q(cnt05[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_310), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[9] ( .Q(cnt05[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_310), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[8] ( .Q(cnt05[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_310), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[7] ( .Q(cnt05[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_310), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[6] ( .Q(cnt05[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_310), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[5] ( .Q(cnt05[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_310), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[4] ( .Q(cnt05[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_310), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[3] ( .Q(cnt05[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_310), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[2] ( .Q(cnt05[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_310), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[1] ( .Q(cnt05[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_310), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[0] ( .Q(cnt05[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_310), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496391 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i[5]), .EN(un1_Ioli0_1_0_4), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 ARI1 precnt_s_4167 ( .FCO(precnt_s_4167_FCO), .S(precnt_s_4167_S), .Y(precnt_s_4167_Y), .B(cnt05[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4167.INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_32[1]), .B(cnt05[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4167_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_32[2]), .B(cnt05[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_32[3]), .B(cnt05[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_32[4]), .B(cnt05[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_32[5]), .B(cnt05[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_32[6]), .B(cnt05[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_32[7]), .B(cnt05[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_32[8]), .B(cnt05[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_32[9]), .B(cnt05[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_32[10]), .B(cnt05[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[11] ( .FCO(precnt_cry_Z[11]), .S(precnt_s[11]), .Y(precnt_cry_Y_32[11]), .B(cnt05[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[12] ( .FCO(precnt_cry_Z[12]), .S(precnt_s[12]), .Y(precnt_cry_Y_6[12]), .B(cnt05[12]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[11]) ); defparam \precnt_cry[12] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[13] ( .FCO(precnt_cry_Z[13]), .S(precnt_s[13]), .Y(precnt_cry_Y_6[13]), .B(cnt05[13]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[12]) ); defparam \precnt_cry[13] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[14] ( .FCO(precnt_cry_Z[14]), .S(precnt_s[14]), .Y(precnt_cry_Y_6[14]), .B(cnt05[14]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[13]) ); defparam \precnt_cry[14] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[15] ( .FCO(precnt_cry_Z[15]), .S(precnt_s[15]), .Y(precnt_cry_Y_6[15]), .B(cnt05[15]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[14]) ); defparam \precnt_cry[15] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[16] ( .FCO(precnt_cry_Z[16]), .S(precnt_s[16]), .Y(precnt_cry_Y_6[16]), .B(cnt05[16]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[15]) ); defparam \precnt_cry[16] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[17] ( .FCO(OO0o1[18]), .S(precnt_s[17]), .Y(precnt_cry_Y_6[17]), .B(cnt05[17]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[16]) ); defparam \precnt_cry[17] .INIT=20'h4AA00; // @28:496288 CFG4 \precnt_lm_0[0] ( .A(cnt05[0]), .B(l0Io1_0), .C(precnt_lm_0_1_0_Z[0]), .D(l0lo1), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=16'hCC5C; // @28:496288 CFG3 \precnt_lm_0_1_0[0] ( .A(l1II1), .B(N_1127), .C(N_1124), .Y(precnt_lm_0_1_0_Z[0]) ); defparam \precnt_lm_0_1_0[0] .INIT=8'h7F; // @28:496198 CFG4 un1_Ioli0_1_0 ( .A(l0Io1_0), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .C(OO0o1[18]), .D(N_1131), .Y(un1_Ioli0_1_0_4) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:496391 CFG2 IilI1_RNO ( .A(N_1131), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .Y(Ioli0_i[5]) ); defparam IilI1_RNO.INIT=4'h7; // @28:496288 CFG4 \precnt_lm_0[17] ( .A(l0lo1), .B(precnt_s[17]), .C(N_1133), .D(N_1127), .Y(precnt_lm[17]) ); defparam \precnt_lm_0[17] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[16] ( .A(l0lo1), .B(precnt_s[16]), .C(N_1133), .D(N_1127), .Y(precnt_lm[16]) ); defparam \precnt_lm_0[16] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[15] ( .A(l0lo1), .B(precnt_s[15]), .C(N_1133), .D(N_1127), .Y(precnt_lm[15]) ); defparam \precnt_lm_0[15] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[14] ( .A(l0lo1), .B(precnt_s[14]), .C(N_1133), .D(N_1127), .Y(precnt_lm[14]) ); defparam \precnt_lm_0[14] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[13] ( .A(l0lo1), .B(precnt_s[13]), .C(N_1133), .D(N_1127), .Y(precnt_lm[13]) ); defparam \precnt_lm_0[13] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[12] ( .A(l0lo1), .B(precnt_s[12]), .C(N_1133), .D(N_1127), .Y(precnt_lm[12]) ); defparam \precnt_lm_0[12] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[11] ( .A(l0lo1), .B(precnt_s[11]), .C(N_1133), .D(N_1127), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[10] ( .A(l0lo1), .B(precnt_s[10]), .C(N_1133), .D(N_1127), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[9] ( .A(l0lo1), .B(precnt_s[9]), .C(N_1133), .D(N_1127), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[8] ( .A(l0lo1), .B(precnt_s[8]), .C(N_1133), .D(N_1127), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[7] ( .A(l0lo1), .B(precnt_s[7]), .C(N_1133), .D(N_1127), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[6] ( .A(l0lo1), .B(precnt_s[6]), .C(N_1133), .D(N_1127), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[5] ( .A(l0lo1), .B(precnt_s[5]), .C(N_1133), .D(N_1127), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[4] ( .A(l0lo1), .B(precnt_s[4]), .C(N_1133), .D(N_1127), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[3] ( .A(l0lo1), .B(precnt_s[3]), .C(N_1133), .D(N_1127), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[2] ( .A(l0lo1), .B(precnt_s[2]), .C(N_1133), .D(N_1127), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[1] ( .A(l0lo1), .B(precnt_s[1]), .C(N_1133), .D(N_1127), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=16'h0444; // @28:496184 CFG4 un1_iOI01_1_i_0 ( .A(N_1127), .B(N_1133), .C(l0Io1_0), .D(l0lo1), .Y(N_310) ); defparam un1_iOI01_1_i_0.INIT=16'hFFF8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_LINC_1s_26s_4 */ module CTSE_PEMSTAT_LINC_1s_26s_5 ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, o0Io1_0, cnt06, N_1137, N_1131, N_1118, N_1130, l1II1, l0lo1, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; output o0Io1_0 ; output [17:0] cnt06 ; input N_1137 ; input N_1131 ; input N_1118 ; input N_1130 ; input l1II1 ; input l0lo1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire o0Io1_0 ; wire N_1137 ; wire N_1131 ; wire N_1118 ; wire N_1130 ; wire l1II1 ; wire l0lo1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [17:0] precnt_lm; wire [6:6] Ioli0_i; wire [16:1] precnt_cry_Z; wire [17:1] precnt_s; wire [11:1] precnt_cry_Y_31; wire [17:12] precnt_cry_Y_5; wire [18:18] OO0o1; wire [0:0] precnt_lm_0_1_0_Z; wire VCC ; wire N_315 ; wire GND ; wire un1_Ioli0_1_0_5 ; wire precnt_s_4166_FCO ; wire precnt_s_4166_S ; wire precnt_s_4166_Y ; // @28:496288 SLE \precnt[17] ( .Q(cnt06[17]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[17]), .EN(N_315), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[16] ( .Q(cnt06[16]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[16]), .EN(N_315), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[15] ( .Q(cnt06[15]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[15]), .EN(N_315), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[14] ( .Q(cnt06[14]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[14]), .EN(N_315), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[13] ( .Q(cnt06[13]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[13]), .EN(N_315), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[12] ( .Q(cnt06[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[12]), .EN(N_315), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[11] ( .Q(cnt06[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_315), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[10] ( .Q(cnt06[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_315), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[9] ( .Q(cnt06[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_315), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[8] ( .Q(cnt06[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_315), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[7] ( .Q(cnt06[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_315), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[6] ( .Q(cnt06[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_315), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[5] ( .Q(cnt06[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_315), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[4] ( .Q(cnt06[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_315), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[3] ( .Q(cnt06[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_315), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[2] ( .Q(cnt06[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_315), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[1] ( .Q(cnt06[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_315), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[0] ( .Q(cnt06[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_315), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496391 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i[6]), .EN(un1_Ioli0_1_0_5), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 ARI1 precnt_s_4166 ( .FCO(precnt_s_4166_FCO), .S(precnt_s_4166_S), .Y(precnt_s_4166_Y), .B(cnt06[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4166.INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_31[1]), .B(cnt06[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4166_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_31[2]), .B(cnt06[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_31[3]), .B(cnt06[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_31[4]), .B(cnt06[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_31[5]), .B(cnt06[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_31[6]), .B(cnt06[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_31[7]), .B(cnt06[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_31[8]), .B(cnt06[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_31[9]), .B(cnt06[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_31[10]), .B(cnt06[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[11] ( .FCO(precnt_cry_Z[11]), .S(precnt_s[11]), .Y(precnt_cry_Y_31[11]), .B(cnt06[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[12] ( .FCO(precnt_cry_Z[12]), .S(precnt_s[12]), .Y(precnt_cry_Y_5[12]), .B(cnt06[12]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[11]) ); defparam \precnt_cry[12] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[13] ( .FCO(precnt_cry_Z[13]), .S(precnt_s[13]), .Y(precnt_cry_Y_5[13]), .B(cnt06[13]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[12]) ); defparam \precnt_cry[13] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[14] ( .FCO(precnt_cry_Z[14]), .S(precnt_s[14]), .Y(precnt_cry_Y_5[14]), .B(cnt06[14]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[13]) ); defparam \precnt_cry[14] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[15] ( .FCO(precnt_cry_Z[15]), .S(precnt_s[15]), .Y(precnt_cry_Y_5[15]), .B(cnt06[15]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[14]) ); defparam \precnt_cry[15] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[16] ( .FCO(precnt_cry_Z[16]), .S(precnt_s[16]), .Y(precnt_cry_Y_5[16]), .B(cnt06[16]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[15]) ); defparam \precnt_cry[16] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[17] ( .FCO(OO0o1[18]), .S(precnt_s[17]), .Y(precnt_cry_Y_5[17]), .B(cnt06[17]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[16]) ); defparam \precnt_cry[17] .INIT=20'h4AA00; // @28:496288 CFG4 \precnt_lm_0[0] ( .A(cnt06[0]), .B(l0Io1_0), .C(precnt_lm_0_1_0_Z[0]), .D(l0lo1), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=16'hCC5C; // @28:496288 CFG3 \precnt_lm_0_1_0[0] ( .A(l1II1), .B(N_1130), .C(N_1118), .Y(precnt_lm_0_1_0_Z[0]) ); defparam \precnt_lm_0_1_0[0] .INIT=8'h7F; // @28:496198 CFG4 un1_Ioli0_1_0 ( .A(l0Io1_0), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .C(OO0o1[18]), .D(N_1131), .Y(un1_Ioli0_1_0_5) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:496391 CFG2 IilI1_RNO ( .A(N_1131), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .Y(Ioli0_i[6]) ); defparam IilI1_RNO.INIT=4'h7; // @28:496288 CFG4 \precnt_lm_0[17] ( .A(l0lo1), .B(precnt_s[17]), .C(N_1137), .D(N_1130), .Y(precnt_lm[17]) ); defparam \precnt_lm_0[17] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[16] ( .A(l0lo1), .B(precnt_s[16]), .C(N_1137), .D(N_1130), .Y(precnt_lm[16]) ); defparam \precnt_lm_0[16] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[15] ( .A(l0lo1), .B(precnt_s[15]), .C(N_1137), .D(N_1130), .Y(precnt_lm[15]) ); defparam \precnt_lm_0[15] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[14] ( .A(l0lo1), .B(precnt_s[14]), .C(N_1137), .D(N_1130), .Y(precnt_lm[14]) ); defparam \precnt_lm_0[14] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[13] ( .A(l0lo1), .B(precnt_s[13]), .C(N_1137), .D(N_1130), .Y(precnt_lm[13]) ); defparam \precnt_lm_0[13] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[12] ( .A(l0lo1), .B(precnt_s[12]), .C(N_1137), .D(N_1130), .Y(precnt_lm[12]) ); defparam \precnt_lm_0[12] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[11] ( .A(l0lo1), .B(precnt_s[11]), .C(N_1137), .D(N_1130), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[10] ( .A(l0lo1), .B(precnt_s[10]), .C(N_1137), .D(N_1130), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[9] ( .A(l0lo1), .B(precnt_s[9]), .C(N_1137), .D(N_1130), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[8] ( .A(l0lo1), .B(precnt_s[8]), .C(N_1137), .D(N_1130), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[7] ( .A(l0lo1), .B(precnt_s[7]), .C(N_1137), .D(N_1130), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[6] ( .A(l0lo1), .B(precnt_s[6]), .C(N_1137), .D(N_1130), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[5] ( .A(l0lo1), .B(precnt_s[5]), .C(N_1137), .D(N_1130), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[4] ( .A(l0lo1), .B(precnt_s[4]), .C(N_1137), .D(N_1130), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[3] ( .A(l0lo1), .B(precnt_s[3]), .C(N_1137), .D(N_1130), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[2] ( .A(l0lo1), .B(precnt_s[2]), .C(N_1137), .D(N_1130), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[1] ( .A(l0lo1), .B(precnt_s[1]), .C(N_1137), .D(N_1130), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=16'h0444; // @28:496184 CFG4 un1_iOI01_1_i_0 ( .A(N_1130), .B(N_1137), .C(l0Io1_0), .D(l0lo1), .Y(N_315) ); defparam un1_iOI01_1_i_0.INIT=16'hFFF8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_LINC_1s_26s_5 */ module CTSE_PEMSTAT_LADD_1s_26s ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, loli0_0, O0Io1, cnt07, o0Io1_1z_0, N_1131, N_1114, un1_ooiO1, CoreAPB3_0_0_APBmslave0_PWRITE, N_1128, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; input loli0_0 ; input [15:0] O0Io1 ; output [23:0] cnt07 ; output o0Io1_1z_0 ; output N_1131 ; input N_1114 ; input un1_ooiO1 ; input CoreAPB3_0_0_APBmslave0_PWRITE ; input N_1128 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire loli0_0 ; wire o0Io1_1z_0 ; wire N_1131 ; wire N_1114 ; wire un1_ooiO1 ; wire CoreAPB3_0_0_APBmslave0_PWRITE ; wire N_1128 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [9:9] Ioli0_i; wire [24:1] OO0o1; wire VCC ; wire un1_Ioli0_1_0_6 ; wire GND ; wire N_210_i ; wire un1_iOI01_1_i_Z ; wire N_208_i ; wire N_206_i ; wire N_198_i ; wire N_196_i ; wire N_194_i ; wire precnt_6_16_110_a2_Z ; wire precnt_6_15_116_a2_Z ; wire precnt_6_14_122_a2_Z ; wire precnt_6_13_128_a2_Z ; wire precnt_6_12_134_a2_Z ; wire N_97_i ; wire N_246_i ; wire N_244_i ; wire N_242_i ; wire N_234_i ; wire N_232_i ; wire N_230_i ; wire N_222_i ; wire N_220_i ; wire N_218_i ; wire precnt_6_1_140_a2_Z ; wire precnt_6_0_146_a2_Z ; wire precnt_6_152_a2_Z ; wire OO0o1_cry_0_Z ; wire OO0o1_cry_0_S_1 ; wire OO0o1_cry_0_Y_1 ; wire OO0o1_cry_1_Z ; wire OO0o1_cry_1_Y_1 ; wire OO0o1_cry_2_Z ; wire OO0o1_cry_2_Y_1 ; wire OO0o1_cry_3_Z ; wire OO0o1_cry_3_Y_1 ; wire OO0o1_cry_4_Z ; wire OO0o1_cry_4_Y_1 ; wire OO0o1_cry_5_Z ; wire OO0o1_cry_5_Y_1 ; wire OO0o1_cry_6_Z ; wire OO0o1_cry_6_Y_1 ; wire OO0o1_cry_7_Z ; wire OO0o1_cry_7_Y_1 ; wire OO0o1_cry_8_Z ; wire OO0o1_cry_8_Y_1 ; wire OO0o1_cry_9_Z ; wire OO0o1_cry_9_Y_1 ; wire OO0o1_cry_10_Z ; wire OO0o1_cry_10_Y_1 ; wire OO0o1_cry_11_Z ; wire OO0o1_cry_11_Y_1 ; wire OO0o1_cry_12_Z ; wire OO0o1_cry_12_Y_0 ; wire OO0o1_cry_13_Z ; wire OO0o1_cry_13_Y_0 ; wire OO0o1_cry_14_Z ; wire OO0o1_cry_14_Y_0 ; wire OO0o1_cry_15_Z ; wire OO0o1_cry_15_Y_0 ; wire OO0o1_cry_16_Z ; wire OO0o1_cry_16_Y_0 ; wire OO0o1_cry_17_Z ; wire OO0o1_cry_17_Y_0 ; wire OO0o1_cry_18_Z ; wire OO0o1_cry_18_Y_0 ; wire OO0o1_cry_19_Z ; wire OO0o1_cry_19_Y_0 ; wire OO0o1_cry_20_Z ; wire OO0o1_cry_20_Y_0 ; wire OO0o1_cry_21_Z ; wire OO0o1_cry_21_Y_0 ; wire OO0o1_cry_22_Z ; wire OO0o1_cry_22_Y_0 ; wire OO0o1_cry_23_Y_0 ; // @28:496089 SLE IilI1 ( .Q(o0Io1_1z_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i[9]), .EN(un1_Ioli0_1_0_6), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[5] ( .Q(cnt07[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_210_i), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[4] ( .Q(cnt07[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_208_i), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[3] ( .Q(cnt07[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_206_i), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[2] ( .Q(cnt07[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_198_i), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[1] ( .Q(cnt07[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_196_i), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[0] ( .Q(cnt07[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_194_i), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[20] ( .Q(cnt07[20]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_6_16_110_a2_Z), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[19] ( .Q(cnt07[19]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_6_15_116_a2_Z), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[18] ( .Q(cnt07[18]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_6_14_122_a2_Z), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[17] ( .Q(cnt07[17]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_6_13_128_a2_Z), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[16] ( .Q(cnt07[16]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_6_12_134_a2_Z), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[15] ( .Q(cnt07[15]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_97_i), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[14] ( .Q(cnt07[14]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_246_i), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[13] ( .Q(cnt07[13]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_244_i), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[12] ( .Q(cnt07[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_242_i), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[11] ( .Q(cnt07[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_234_i), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[10] ( .Q(cnt07[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_232_i), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[9] ( .Q(cnt07[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_230_i), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[8] ( .Q(cnt07[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_222_i), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[7] ( .Q(cnt07[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_220_i), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[6] ( .Q(cnt07[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_218_i), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[23] ( .Q(cnt07[23]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_6_1_140_a2_Z), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[22] ( .Q(cnt07[22]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_6_0_146_a2_Z), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[21] ( .Q(cnt07[21]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_6_152_a2_Z), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495912 ARI1 OO0o1_cry_0 ( .FCO(OO0o1_cry_0_Z), .S(OO0o1_cry_0_S_1), .Y(OO0o1_cry_0_Y_1), .B(cnt07[0]), .C(GND), .D(GND), .A(O0Io1[0]), .FCI(GND) ); defparam OO0o1_cry_0.INIT=20'h555AA; // @28:495912 ARI1 OO0o1_cry_1 ( .FCO(OO0o1_cry_1_Z), .S(OO0o1[1]), .Y(OO0o1_cry_1_Y_1), .B(cnt07[1]), .C(GND), .D(GND), .A(O0Io1[1]), .FCI(OO0o1_cry_0_Z) ); defparam OO0o1_cry_1.INIT=20'h555AA; // @28:495912 ARI1 OO0o1_cry_2 ( .FCO(OO0o1_cry_2_Z), .S(OO0o1[2]), .Y(OO0o1_cry_2_Y_1), .B(cnt07[2]), .C(GND), .D(GND), .A(O0Io1[2]), .FCI(OO0o1_cry_1_Z) ); defparam OO0o1_cry_2.INIT=20'h555AA; // @28:495912 ARI1 OO0o1_cry_3 ( .FCO(OO0o1_cry_3_Z), .S(OO0o1[3]), .Y(OO0o1_cry_3_Y_1), .B(cnt07[3]), .C(GND), .D(GND), .A(O0Io1[3]), .FCI(OO0o1_cry_2_Z) ); defparam OO0o1_cry_3.INIT=20'h555AA; // @28:495912 ARI1 OO0o1_cry_4 ( .FCO(OO0o1_cry_4_Z), .S(OO0o1[4]), .Y(OO0o1_cry_4_Y_1), .B(cnt07[4]), .C(GND), .D(GND), .A(O0Io1[4]), .FCI(OO0o1_cry_3_Z) ); defparam OO0o1_cry_4.INIT=20'h555AA; // @28:495912 ARI1 OO0o1_cry_5 ( .FCO(OO0o1_cry_5_Z), .S(OO0o1[5]), .Y(OO0o1_cry_5_Y_1), .B(cnt07[5]), .C(GND), .D(GND), .A(O0Io1[5]), .FCI(OO0o1_cry_4_Z) ); defparam OO0o1_cry_5.INIT=20'h555AA; // @28:495912 ARI1 OO0o1_cry_6 ( .FCO(OO0o1_cry_6_Z), .S(OO0o1[6]), .Y(OO0o1_cry_6_Y_1), .B(cnt07[6]), .C(GND), .D(GND), .A(O0Io1[6]), .FCI(OO0o1_cry_5_Z) ); defparam OO0o1_cry_6.INIT=20'h555AA; // @28:495912 ARI1 OO0o1_cry_7 ( .FCO(OO0o1_cry_7_Z), .S(OO0o1[7]), .Y(OO0o1_cry_7_Y_1), .B(cnt07[7]), .C(GND), .D(GND), .A(O0Io1[7]), .FCI(OO0o1_cry_6_Z) ); defparam OO0o1_cry_7.INIT=20'h555AA; // @28:495912 ARI1 OO0o1_cry_8 ( .FCO(OO0o1_cry_8_Z), .S(OO0o1[8]), .Y(OO0o1_cry_8_Y_1), .B(cnt07[8]), .C(GND), .D(GND), .A(O0Io1[8]), .FCI(OO0o1_cry_7_Z) ); defparam OO0o1_cry_8.INIT=20'h555AA; // @28:495912 ARI1 OO0o1_cry_9 ( .FCO(OO0o1_cry_9_Z), .S(OO0o1[9]), .Y(OO0o1_cry_9_Y_1), .B(cnt07[9]), .C(GND), .D(GND), .A(O0Io1[9]), .FCI(OO0o1_cry_8_Z) ); defparam OO0o1_cry_9.INIT=20'h555AA; // @28:495912 ARI1 OO0o1_cry_10 ( .FCO(OO0o1_cry_10_Z), .S(OO0o1[10]), .Y(OO0o1_cry_10_Y_1), .B(cnt07[10]), .C(GND), .D(GND), .A(O0Io1[10]), .FCI(OO0o1_cry_9_Z) ); defparam OO0o1_cry_10.INIT=20'h555AA; // @28:495912 ARI1 OO0o1_cry_11 ( .FCO(OO0o1_cry_11_Z), .S(OO0o1[11]), .Y(OO0o1_cry_11_Y_1), .B(cnt07[11]), .C(GND), .D(GND), .A(O0Io1[11]), .FCI(OO0o1_cry_10_Z) ); defparam OO0o1_cry_11.INIT=20'h555AA; // @28:495912 ARI1 OO0o1_cry_12 ( .FCO(OO0o1_cry_12_Z), .S(OO0o1[12]), .Y(OO0o1_cry_12_Y_0), .B(cnt07[12]), .C(GND), .D(GND), .A(O0Io1[12]), .FCI(OO0o1_cry_11_Z) ); defparam OO0o1_cry_12.INIT=20'h555AA; // @28:495912 ARI1 OO0o1_cry_13 ( .FCO(OO0o1_cry_13_Z), .S(OO0o1[13]), .Y(OO0o1_cry_13_Y_0), .B(cnt07[13]), .C(GND), .D(GND), .A(O0Io1[13]), .FCI(OO0o1_cry_12_Z) ); defparam OO0o1_cry_13.INIT=20'h555AA; // @28:495912 ARI1 OO0o1_cry_14 ( .FCO(OO0o1_cry_14_Z), .S(OO0o1[14]), .Y(OO0o1_cry_14_Y_0), .B(cnt07[14]), .C(GND), .D(GND), .A(O0Io1[14]), .FCI(OO0o1_cry_13_Z) ); defparam OO0o1_cry_14.INIT=20'h555AA; // @28:495912 ARI1 OO0o1_cry_15 ( .FCO(OO0o1_cry_15_Z), .S(OO0o1[15]), .Y(OO0o1_cry_15_Y_0), .B(cnt07[15]), .C(GND), .D(GND), .A(O0Io1[15]), .FCI(OO0o1_cry_14_Z) ); defparam OO0o1_cry_15.INIT=20'h555AA; // @28:495912 ARI1 OO0o1_cry_16 ( .FCO(OO0o1_cry_16_Z), .S(OO0o1[16]), .Y(OO0o1_cry_16_Y_0), .B(cnt07[16]), .C(GND), .D(GND), .A(VCC), .FCI(OO0o1_cry_15_Z) ); defparam OO0o1_cry_16.INIT=20'h4AA00; // @28:495912 ARI1 OO0o1_cry_17 ( .FCO(OO0o1_cry_17_Z), .S(OO0o1[17]), .Y(OO0o1_cry_17_Y_0), .B(cnt07[17]), .C(GND), .D(GND), .A(VCC), .FCI(OO0o1_cry_16_Z) ); defparam OO0o1_cry_17.INIT=20'h4AA00; // @28:495912 ARI1 OO0o1_cry_18 ( .FCO(OO0o1_cry_18_Z), .S(OO0o1[18]), .Y(OO0o1_cry_18_Y_0), .B(cnt07[18]), .C(GND), .D(GND), .A(VCC), .FCI(OO0o1_cry_17_Z) ); defparam OO0o1_cry_18.INIT=20'h4AA00; // @28:495912 ARI1 OO0o1_cry_19 ( .FCO(OO0o1_cry_19_Z), .S(OO0o1[19]), .Y(OO0o1_cry_19_Y_0), .B(cnt07[19]), .C(GND), .D(GND), .A(VCC), .FCI(OO0o1_cry_18_Z) ); defparam OO0o1_cry_19.INIT=20'h4AA00; // @28:495912 ARI1 OO0o1_cry_20 ( .FCO(OO0o1_cry_20_Z), .S(OO0o1[20]), .Y(OO0o1_cry_20_Y_0), .B(cnt07[20]), .C(GND), .D(GND), .A(VCC), .FCI(OO0o1_cry_19_Z) ); defparam OO0o1_cry_20.INIT=20'h4AA00; // @28:495912 ARI1 OO0o1_cry_21 ( .FCO(OO0o1_cry_21_Z), .S(OO0o1[21]), .Y(OO0o1_cry_21_Y_0), .B(cnt07[21]), .C(GND), .D(GND), .A(VCC), .FCI(OO0o1_cry_20_Z) ); defparam OO0o1_cry_21.INIT=20'h4AA00; // @28:495912 ARI1 OO0o1_cry_22 ( .FCO(OO0o1_cry_22_Z), .S(OO0o1[22]), .Y(OO0o1_cry_22_Y_0), .B(cnt07[22]), .C(GND), .D(GND), .A(VCC), .FCI(OO0o1_cry_21_Z) ); defparam OO0o1_cry_22.INIT=20'h4AA00; // @28:495912 ARI1 OO0o1_cry_23 ( .FCO(OO0o1[24]), .S(OO0o1[23]), .Y(OO0o1_cry_23_Y_0), .B(cnt07[23]), .C(GND), .D(GND), .A(VCC), .FCI(OO0o1_cry_22_Z) ); defparam OO0o1_cry_23.INIT=20'h4AA00; // @28:495932 CFG2 precnt_6_16_110_a2 ( .A(loli0_0), .B(OO0o1[20]), .Y(precnt_6_16_110_a2_Z) ); defparam precnt_6_16_110_a2.INIT=4'h4; // @28:495932 CFG2 precnt_6_15_116_a2 ( .A(loli0_0), .B(OO0o1[19]), .Y(precnt_6_15_116_a2_Z) ); defparam precnt_6_15_116_a2.INIT=4'h4; // @28:495932 CFG2 precnt_6_14_122_a2 ( .A(loli0_0), .B(OO0o1[18]), .Y(precnt_6_14_122_a2_Z) ); defparam precnt_6_14_122_a2.INIT=4'h4; // @28:495932 CFG2 precnt_6_13_128_a2 ( .A(loli0_0), .B(OO0o1[17]), .Y(precnt_6_13_128_a2_Z) ); defparam precnt_6_13_128_a2.INIT=4'h4; // @28:495932 CFG2 precnt_6_12_134_a2 ( .A(loli0_0), .B(OO0o1[16]), .Y(precnt_6_12_134_a2_Z) ); defparam precnt_6_12_134_a2.INIT=4'h4; // @28:495932 CFG2 precnt_6_1_140_a2 ( .A(loli0_0), .B(OO0o1[23]), .Y(precnt_6_1_140_a2_Z) ); defparam precnt_6_1_140_a2.INIT=4'h4; // @28:495932 CFG2 precnt_6_0_146_a2 ( .A(loli0_0), .B(OO0o1[22]), .Y(precnt_6_0_146_a2_Z) ); defparam precnt_6_0_146_a2.INIT=4'h4; // @28:495932 CFG2 precnt_6_152_a2 ( .A(loli0_0), .B(OO0o1[21]), .Y(precnt_6_152_a2_Z) ); defparam precnt_6_152_a2.INIT=4'h4; // @28:495932 CFG2 un1_iOI01_1_i ( .A(loli0_0), .B(l0Io1_0), .Y(un1_iOI01_1_i_Z) ); defparam un1_iOI01_1_i.INIT=4'hE; // @28:495932 CFG4 \precnt_RNO[5] ( .A(l0Io1_0), .B(O0Io1[5]), .C(loli0_0), .D(OO0o1[5]), .Y(N_210_i) ); defparam \precnt_RNO[5] .INIT=16'h8A80; // @28:495932 CFG4 \precnt_RNO[4] ( .A(l0Io1_0), .B(O0Io1[4]), .C(loli0_0), .D(OO0o1[4]), .Y(N_208_i) ); defparam \precnt_RNO[4] .INIT=16'h8A80; // @28:495932 CFG4 \precnt_RNO[3] ( .A(l0Io1_0), .B(O0Io1[3]), .C(loli0_0), .D(OO0o1[3]), .Y(N_206_i) ); defparam \precnt_RNO[3] .INIT=16'h8A80; // @28:495932 CFG4 \precnt_RNO[2] ( .A(l0Io1_0), .B(O0Io1[2]), .C(loli0_0), .D(OO0o1[2]), .Y(N_198_i) ); defparam \precnt_RNO[2] .INIT=16'h8A80; // @28:495932 CFG4 \precnt_RNO[1] ( .A(l0Io1_0), .B(O0Io1[1]), .C(loli0_0), .D(OO0o1[1]), .Y(N_196_i) ); defparam \precnt_RNO[1] .INIT=16'h8A80; // @28:495932 CFG4 \precnt_RNO[15] ( .A(l0Io1_0), .B(O0Io1[15]), .C(loli0_0), .D(OO0o1[15]), .Y(N_97_i) ); defparam \precnt_RNO[15] .INIT=16'h8A80; // @28:495932 CFG4 \precnt_RNO[14] ( .A(l0Io1_0), .B(O0Io1[14]), .C(loli0_0), .D(OO0o1[14]), .Y(N_246_i) ); defparam \precnt_RNO[14] .INIT=16'h8A80; // @28:495932 CFG4 \precnt_RNO[13] ( .A(l0Io1_0), .B(O0Io1[13]), .C(loli0_0), .D(OO0o1[13]), .Y(N_244_i) ); defparam \precnt_RNO[13] .INIT=16'h8A80; // @28:495932 CFG4 \precnt_RNO[12] ( .A(l0Io1_0), .B(O0Io1[12]), .C(loli0_0), .D(OO0o1[12]), .Y(N_242_i) ); defparam \precnt_RNO[12] .INIT=16'h8A80; // @28:495932 CFG4 \precnt_RNO[11] ( .A(l0Io1_0), .B(O0Io1[11]), .C(loli0_0), .D(OO0o1[11]), .Y(N_234_i) ); defparam \precnt_RNO[11] .INIT=16'h8A80; // @28:495932 CFG4 \precnt_RNO[10] ( .A(l0Io1_0), .B(O0Io1[10]), .C(loli0_0), .D(OO0o1[10]), .Y(N_232_i) ); defparam \precnt_RNO[10] .INIT=16'h8A80; // @28:495932 CFG4 \precnt_RNO[9] ( .A(l0Io1_0), .B(O0Io1[9]), .C(loli0_0), .D(OO0o1[9]), .Y(N_230_i) ); defparam \precnt_RNO[9] .INIT=16'h8A80; // @28:495932 CFG4 \precnt_RNO[8] ( .A(l0Io1_0), .B(O0Io1[8]), .C(loli0_0), .D(OO0o1[8]), .Y(N_222_i) ); defparam \precnt_RNO[8] .INIT=16'h8A80; // @28:495932 CFG4 \precnt_RNO[7] ( .A(l0Io1_0), .B(O0Io1[7]), .C(loli0_0), .D(OO0o1[7]), .Y(N_220_i) ); defparam \precnt_RNO[7] .INIT=16'h8A80; // @28:495932 CFG4 \precnt_RNO[6] ( .A(l0Io1_0), .B(O0Io1[6]), .C(loli0_0), .D(OO0o1[6]), .Y(N_218_i) ); defparam \precnt_RNO[6] .INIT=16'h8A80; // @28:495932 CFG4 \precnt_RNO[0] ( .A(l0Io1_0), .B(O0Io1[0]), .C(loli0_0), .D(OO0o1_cry_0_Y_1), .Y(N_194_i) ); defparam \precnt_RNO[0] .INIT=16'h8A80; // @28:495823 CFG4 un1_Ioli0_1_0_a2 ( .A(N_1128), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .C(un1_ooiO1), .D(N_1114), .Y(N_1131) ); defparam un1_Ioli0_1_0_a2.INIT=16'h8000; // @28:495823 CFG4 un1_Ioli0_1_0 ( .A(l0Io1_0), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .C(OO0o1[24]), .D(N_1131), .Y(un1_Ioli0_1_0_6) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:496089 CFG2 IilI1_RNO ( .A(N_1131), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .Y(Ioli0_i[9]) ); defparam IilI1_RNO.INIT=4'h7; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_LADD_1s_26s */ module CTSE_PEMSTAT_LINC_1s_26s_6 ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, Ioli0_i_0, o0Io1_0, cnt08, N_1133, N_1131, N_1120, l1II1, N_1124, l0lo1, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; input Ioli0_i_0 ; output o0Io1_0 ; output [17:0] cnt08 ; input N_1133 ; input N_1131 ; input N_1120 ; input l1II1 ; input N_1124 ; input l0lo1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire Ioli0_i_0 ; wire o0Io1_0 ; wire N_1133 ; wire N_1131 ; wire N_1120 ; wire l1II1 ; wire N_1124 ; wire l0lo1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [17:0] precnt_lm; wire [16:1] precnt_cry_Z; wire [17:1] precnt_s; wire [11:1] precnt_cry_Y_30; wire [17:12] precnt_cry_Y_4; wire [18:18] OO0o1; wire [0:0] precnt_lm_0_1_0_Z; wire VCC ; wire N_318 ; wire GND ; wire un1_Ioli0_1_0_7 ; wire precnt_s_4165_FCO ; wire precnt_s_4165_S ; wire precnt_s_4165_Y ; // @28:496288 SLE \precnt[17] ( .Q(cnt08[17]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[17]), .EN(N_318), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[16] ( .Q(cnt08[16]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[16]), .EN(N_318), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[15] ( .Q(cnt08[15]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[15]), .EN(N_318), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[14] ( .Q(cnt08[14]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[14]), .EN(N_318), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[13] ( .Q(cnt08[13]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[13]), .EN(N_318), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[12] ( .Q(cnt08[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[12]), .EN(N_318), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[11] ( .Q(cnt08[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_318), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[10] ( .Q(cnt08[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_318), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[9] ( .Q(cnt08[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_318), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[8] ( .Q(cnt08[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_318), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[7] ( .Q(cnt08[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_318), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[6] ( .Q(cnt08[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_318), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[5] ( .Q(cnt08[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_318), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[4] ( .Q(cnt08[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_318), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[3] ( .Q(cnt08[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_318), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[2] ( .Q(cnt08[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_318), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[1] ( .Q(cnt08[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_318), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[0] ( .Q(cnt08[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_318), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496391 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i_0), .EN(un1_Ioli0_1_0_7), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 ARI1 precnt_s_4165 ( .FCO(precnt_s_4165_FCO), .S(precnt_s_4165_S), .Y(precnt_s_4165_Y), .B(cnt08[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4165.INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_30[1]), .B(cnt08[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4165_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_30[2]), .B(cnt08[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_30[3]), .B(cnt08[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_30[4]), .B(cnt08[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_30[5]), .B(cnt08[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_30[6]), .B(cnt08[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_30[7]), .B(cnt08[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_30[8]), .B(cnt08[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_30[9]), .B(cnt08[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_30[10]), .B(cnt08[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[11] ( .FCO(precnt_cry_Z[11]), .S(precnt_s[11]), .Y(precnt_cry_Y_30[11]), .B(cnt08[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[12] ( .FCO(precnt_cry_Z[12]), .S(precnt_s[12]), .Y(precnt_cry_Y_4[12]), .B(cnt08[12]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[11]) ); defparam \precnt_cry[12] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[13] ( .FCO(precnt_cry_Z[13]), .S(precnt_s[13]), .Y(precnt_cry_Y_4[13]), .B(cnt08[13]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[12]) ); defparam \precnt_cry[13] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[14] ( .FCO(precnt_cry_Z[14]), .S(precnt_s[14]), .Y(precnt_cry_Y_4[14]), .B(cnt08[14]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[13]) ); defparam \precnt_cry[14] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[15] ( .FCO(precnt_cry_Z[15]), .S(precnt_s[15]), .Y(precnt_cry_Y_4[15]), .B(cnt08[15]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[14]) ); defparam \precnt_cry[15] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[16] ( .FCO(precnt_cry_Z[16]), .S(precnt_s[16]), .Y(precnt_cry_Y_4[16]), .B(cnt08[16]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[15]) ); defparam \precnt_cry[16] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[17] ( .FCO(OO0o1[18]), .S(precnt_s[17]), .Y(precnt_cry_Y_4[17]), .B(cnt08[17]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[16]) ); defparam \precnt_cry[17] .INIT=20'h4AA00; // @28:496288 CFG4 \precnt_lm_0[0] ( .A(l0Io1_0), .B(cnt08[0]), .C(precnt_lm_0_1_0_Z[0]), .D(l0lo1), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=16'hAA3A; // @28:496288 CFG3 \precnt_lm_0_1_0[0] ( .A(N_1124), .B(l1II1), .C(N_1120), .Y(precnt_lm_0_1_0_Z[0]) ); defparam \precnt_lm_0_1_0[0] .INIT=8'h7F; // @28:496198 CFG4 un1_Ioli0_1_0 ( .A(l0Io1_0), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .C(OO0o1[18]), .D(N_1131), .Y(un1_Ioli0_1_0_7) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:496288 CFG4 \precnt_lm_0[17] ( .A(l0lo1), .B(precnt_s[17]), .C(N_1133), .D(N_1120), .Y(precnt_lm[17]) ); defparam \precnt_lm_0[17] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[16] ( .A(l0lo1), .B(precnt_s[16]), .C(N_1133), .D(N_1120), .Y(precnt_lm[16]) ); defparam \precnt_lm_0[16] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[15] ( .A(l0lo1), .B(precnt_s[15]), .C(N_1133), .D(N_1120), .Y(precnt_lm[15]) ); defparam \precnt_lm_0[15] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[14] ( .A(l0lo1), .B(precnt_s[14]), .C(N_1133), .D(N_1120), .Y(precnt_lm[14]) ); defparam \precnt_lm_0[14] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[13] ( .A(l0lo1), .B(precnt_s[13]), .C(N_1133), .D(N_1120), .Y(precnt_lm[13]) ); defparam \precnt_lm_0[13] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[12] ( .A(l0lo1), .B(precnt_s[12]), .C(N_1133), .D(N_1120), .Y(precnt_lm[12]) ); defparam \precnt_lm_0[12] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[11] ( .A(l0lo1), .B(precnt_s[11]), .C(N_1133), .D(N_1120), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[10] ( .A(l0lo1), .B(precnt_s[10]), .C(N_1133), .D(N_1120), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[9] ( .A(l0lo1), .B(precnt_s[9]), .C(N_1133), .D(N_1120), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[8] ( .A(l0lo1), .B(precnt_s[8]), .C(N_1133), .D(N_1120), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[7] ( .A(l0lo1), .B(precnt_s[7]), .C(N_1133), .D(N_1120), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[6] ( .A(l0lo1), .B(precnt_s[6]), .C(N_1133), .D(N_1120), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[5] ( .A(l0lo1), .B(precnt_s[5]), .C(N_1133), .D(N_1120), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[4] ( .A(l0lo1), .B(precnt_s[4]), .C(N_1133), .D(N_1120), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[3] ( .A(l0lo1), .B(precnt_s[3]), .C(N_1133), .D(N_1120), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[2] ( .A(l0lo1), .B(precnt_s[2]), .C(N_1133), .D(N_1120), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[1] ( .A(l0lo1), .B(precnt_s[1]), .C(N_1133), .D(N_1120), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=16'h0444; // @28:496184 CFG4 un1_iOI01_1_i_0 ( .A(l0lo1), .B(l0Io1_0), .C(N_1133), .D(N_1120), .Y(N_318) ); defparam un1_iOI01_1_i_0.INIT=16'hFEEE; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_LINC_1s_26s_6 */ module CTSE_PEMSTAT_SINC_1s_26s ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, Ioli0_i_0, o0Io1_0, cnt09, N_1133, N_1131, N_1124, N_1126, l1II1, l0lo1, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; input Ioli0_i_0 ; output o0Io1_0 ; output [11:0] cnt09 ; input N_1133 ; input N_1131 ; input N_1124 ; input N_1126 ; input l1II1 ; input l0lo1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire Ioli0_i_0 ; wire o0Io1_0 ; wire N_1133 ; wire N_1131 ; wire N_1124 ; wire N_1126 ; wire l1II1 ; wire l0lo1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [11:0] precnt_lm; wire [10:1] precnt_cry_Z; wire [11:1] precnt_s; wire [11:1] precnt_cry_Y_29; wire [12:12] OO0o1; wire [0:0] precnt_lm_0_1_0_Z; wire VCC ; wire N_321 ; wire GND ; wire un1_Ioli0_1_0_8 ; wire precnt_s_4164_FCO ; wire precnt_s_4164_S ; wire precnt_s_4164_Y ; // @28:497254 SLE \precnt[11] ( .Q(cnt09[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_321), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[10] ( .Q(cnt09[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_321), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[9] ( .Q(cnt09[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_321), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[8] ( .Q(cnt09[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_321), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[7] ( .Q(cnt09[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_321), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[6] ( .Q(cnt09[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_321), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[5] ( .Q(cnt09[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_321), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[4] ( .Q(cnt09[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_321), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[3] ( .Q(cnt09[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_321), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[2] ( .Q(cnt09[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_321), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[1] ( .Q(cnt09[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_321), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[0] ( .Q(cnt09[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_321), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497357 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i_0), .EN(un1_Ioli0_1_0_8), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 ARI1 precnt_s_4164 ( .FCO(precnt_s_4164_FCO), .S(precnt_s_4164_S), .Y(precnt_s_4164_Y), .B(cnt09[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4164.INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_29[1]), .B(cnt09[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4164_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_29[2]), .B(cnt09[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_29[3]), .B(cnt09[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_29[4]), .B(cnt09[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_29[5]), .B(cnt09[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_29[6]), .B(cnt09[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_29[7]), .B(cnt09[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_29[8]), .B(cnt09[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_29[9]), .B(cnt09[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_29[10]), .B(cnt09[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[11] ( .FCO(OO0o1[12]), .S(precnt_s[11]), .Y(precnt_cry_Y_29[11]), .B(cnt09[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:497254 CFG4 \precnt_lm_0[0] ( .A(cnt09[0]), .B(l0Io1_0), .C(precnt_lm_0_1_0_Z[0]), .D(l0lo1), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=16'hCC5C; // @28:497254 CFG3 \precnt_lm_0_1_0[0] ( .A(l1II1), .B(N_1126), .C(N_1124), .Y(precnt_lm_0_1_0_Z[0]) ); defparam \precnt_lm_0_1_0[0] .INIT=8'h7F; // @28:497164 CFG4 un1_Ioli0_1_0 ( .A(l0Io1_0), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .C(OO0o1[12]), .D(N_1131), .Y(un1_Ioli0_1_0_8) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:497254 CFG4 \precnt_lm_0[11] ( .A(l0lo1), .B(precnt_s[11]), .C(N_1133), .D(N_1126), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[10] ( .A(l0lo1), .B(precnt_s[10]), .C(N_1133), .D(N_1126), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[9] ( .A(l0lo1), .B(precnt_s[9]), .C(N_1133), .D(N_1126), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[8] ( .A(l0lo1), .B(precnt_s[8]), .C(N_1133), .D(N_1126), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[7] ( .A(l0lo1), .B(precnt_s[7]), .C(N_1133), .D(N_1126), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[6] ( .A(l0lo1), .B(precnt_s[6]), .C(N_1133), .D(N_1126), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[5] ( .A(l0lo1), .B(precnt_s[5]), .C(N_1133), .D(N_1126), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[4] ( .A(l0lo1), .B(precnt_s[4]), .C(N_1133), .D(N_1126), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[3] ( .A(l0lo1), .B(precnt_s[3]), .C(N_1133), .D(N_1126), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[2] ( .A(l0lo1), .B(precnt_s[2]), .C(N_1133), .D(N_1126), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[1] ( .A(l0lo1), .B(precnt_s[1]), .C(N_1133), .D(N_1126), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=16'h0444; // @28:497150 CFG4 un1_iOI01_1_i_0 ( .A(N_1126), .B(N_1133), .C(l0Io1_0), .D(l0lo1), .Y(N_321) ); defparam un1_iOI01_1_i_0.INIT=16'hFFF8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_SINC_1s_26s */ module CTSE_PEMSTAT_LINC_1s_26s_7 ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, o0Io1_0, cnt10, N_1137, N_1131, N_1118, N_1120, l1II1, l0lo1, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; output o0Io1_0 ; output [17:0] cnt10 ; input N_1137 ; input N_1131 ; input N_1118 ; input N_1120 ; input l1II1 ; input l0lo1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire o0Io1_0 ; wire N_1137 ; wire N_1131 ; wire N_1118 ; wire N_1120 ; wire l1II1 ; wire l0lo1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [17:0] precnt_lm; wire [12:12] Ioli0_i; wire [16:1] precnt_cry_Z; wire [17:1] precnt_s; wire [11:1] precnt_cry_Y_28; wire [17:12] precnt_cry_Y_3; wire [18:18] OO0o1; wire [0:0] precnt_lm_0_1_0_Z; wire VCC ; wire N_326 ; wire GND ; wire un1_Ioli0_1_0_9 ; wire precnt_s_4163_FCO ; wire precnt_s_4163_S ; wire precnt_s_4163_Y ; // @28:496288 SLE \precnt[17] ( .Q(cnt10[17]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[17]), .EN(N_326), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[16] ( .Q(cnt10[16]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[16]), .EN(N_326), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[15] ( .Q(cnt10[15]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[15]), .EN(N_326), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[14] ( .Q(cnt10[14]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[14]), .EN(N_326), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[13] ( .Q(cnt10[13]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[13]), .EN(N_326), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[12] ( .Q(cnt10[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[12]), .EN(N_326), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[11] ( .Q(cnt10[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_326), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[10] ( .Q(cnt10[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_326), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[9] ( .Q(cnt10[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_326), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[8] ( .Q(cnt10[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_326), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[7] ( .Q(cnt10[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_326), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[6] ( .Q(cnt10[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_326), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[5] ( .Q(cnt10[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_326), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[4] ( .Q(cnt10[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_326), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[3] ( .Q(cnt10[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_326), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[2] ( .Q(cnt10[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_326), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[1] ( .Q(cnt10[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_326), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[0] ( .Q(cnt10[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_326), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496391 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i[12]), .EN(un1_Ioli0_1_0_9), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 ARI1 precnt_s_4163 ( .FCO(precnt_s_4163_FCO), .S(precnt_s_4163_S), .Y(precnt_s_4163_Y), .B(cnt10[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4163.INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_28[1]), .B(cnt10[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4163_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_28[2]), .B(cnt10[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_28[3]), .B(cnt10[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_28[4]), .B(cnt10[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_28[5]), .B(cnt10[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_28[6]), .B(cnt10[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_28[7]), .B(cnt10[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_28[8]), .B(cnt10[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_28[9]), .B(cnt10[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_28[10]), .B(cnt10[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[11] ( .FCO(precnt_cry_Z[11]), .S(precnt_s[11]), .Y(precnt_cry_Y_28[11]), .B(cnt10[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[12] ( .FCO(precnt_cry_Z[12]), .S(precnt_s[12]), .Y(precnt_cry_Y_3[12]), .B(cnt10[12]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[11]) ); defparam \precnt_cry[12] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[13] ( .FCO(precnt_cry_Z[13]), .S(precnt_s[13]), .Y(precnt_cry_Y_3[13]), .B(cnt10[13]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[12]) ); defparam \precnt_cry[13] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[14] ( .FCO(precnt_cry_Z[14]), .S(precnt_s[14]), .Y(precnt_cry_Y_3[14]), .B(cnt10[14]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[13]) ); defparam \precnt_cry[14] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[15] ( .FCO(precnt_cry_Z[15]), .S(precnt_s[15]), .Y(precnt_cry_Y_3[15]), .B(cnt10[15]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[14]) ); defparam \precnt_cry[15] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[16] ( .FCO(precnt_cry_Z[16]), .S(precnt_s[16]), .Y(precnt_cry_Y_3[16]), .B(cnt10[16]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[15]) ); defparam \precnt_cry[16] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[17] ( .FCO(OO0o1[18]), .S(precnt_s[17]), .Y(precnt_cry_Y_3[17]), .B(cnt10[17]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[16]) ); defparam \precnt_cry[17] .INIT=20'h4AA00; // @28:496288 CFG4 \precnt_lm_0[0] ( .A(cnt10[0]), .B(l0Io1_0), .C(precnt_lm_0_1_0_Z[0]), .D(l0lo1), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=16'hCC5C; // @28:496288 CFG3 \precnt_lm_0_1_0[0] ( .A(l1II1), .B(N_1120), .C(N_1118), .Y(precnt_lm_0_1_0_Z[0]) ); defparam \precnt_lm_0_1_0[0] .INIT=8'h7F; // @28:496198 CFG4 un1_Ioli0_1_0 ( .A(l0Io1_0), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .C(OO0o1[18]), .D(N_1131), .Y(un1_Ioli0_1_0_9) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:496391 CFG2 IilI1_RNO ( .A(N_1131), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .Y(Ioli0_i[12]) ); defparam IilI1_RNO.INIT=4'h7; // @28:496288 CFG4 \precnt_lm_0[17] ( .A(l0lo1), .B(precnt_s[17]), .C(N_1137), .D(N_1120), .Y(precnt_lm[17]) ); defparam \precnt_lm_0[17] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[16] ( .A(l0lo1), .B(precnt_s[16]), .C(N_1137), .D(N_1120), .Y(precnt_lm[16]) ); defparam \precnt_lm_0[16] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[15] ( .A(l0lo1), .B(precnt_s[15]), .C(N_1137), .D(N_1120), .Y(precnt_lm[15]) ); defparam \precnt_lm_0[15] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[14] ( .A(l0lo1), .B(precnt_s[14]), .C(N_1137), .D(N_1120), .Y(precnt_lm[14]) ); defparam \precnt_lm_0[14] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[13] ( .A(l0lo1), .B(precnt_s[13]), .C(N_1137), .D(N_1120), .Y(precnt_lm[13]) ); defparam \precnt_lm_0[13] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[12] ( .A(l0lo1), .B(precnt_s[12]), .C(N_1137), .D(N_1120), .Y(precnt_lm[12]) ); defparam \precnt_lm_0[12] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[11] ( .A(l0lo1), .B(precnt_s[11]), .C(N_1137), .D(N_1120), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[10] ( .A(l0lo1), .B(precnt_s[10]), .C(N_1137), .D(N_1120), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[9] ( .A(l0lo1), .B(precnt_s[9]), .C(N_1137), .D(N_1120), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[8] ( .A(l0lo1), .B(precnt_s[8]), .C(N_1137), .D(N_1120), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[7] ( .A(l0lo1), .B(precnt_s[7]), .C(N_1137), .D(N_1120), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[6] ( .A(l0lo1), .B(precnt_s[6]), .C(N_1137), .D(N_1120), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[5] ( .A(l0lo1), .B(precnt_s[5]), .C(N_1137), .D(N_1120), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[4] ( .A(l0lo1), .B(precnt_s[4]), .C(N_1137), .D(N_1120), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[3] ( .A(l0lo1), .B(precnt_s[3]), .C(N_1137), .D(N_1120), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[2] ( .A(l0lo1), .B(precnt_s[2]), .C(N_1137), .D(N_1120), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[1] ( .A(l0lo1), .B(precnt_s[1]), .C(N_1137), .D(N_1120), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=16'h0444; // @28:496184 CFG4 un1_iOI01_1_i_0 ( .A(N_1120), .B(N_1137), .C(l0Io1_0), .D(l0lo1), .Y(N_326) ); defparam un1_iOI01_1_i_0.INIT=16'hFFF8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_LINC_1s_26s_7 */ module CTSE_PEMSTAT_LINC_1s_26s_8 ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, o0Io1_0, cnt11, N_1137, N_1131, N_1118, N_1126, l1II1, l0lo1, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; output o0Io1_0 ; output [17:0] cnt11 ; input N_1137 ; input N_1131 ; input N_1118 ; input N_1126 ; input l1II1 ; input l0lo1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire o0Io1_0 ; wire N_1137 ; wire N_1131 ; wire N_1118 ; wire N_1126 ; wire l1II1 ; wire l0lo1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [17:0] precnt_lm; wire [13:13] Ioli0_i; wire [16:1] precnt_cry_Z; wire [17:1] precnt_s; wire [11:1] precnt_cry_Y_27; wire [17:12] precnt_cry_Y_2; wire [18:18] OO0o1; wire [0:0] precnt_lm_0_1_0_Z; wire VCC ; wire N_331 ; wire GND ; wire un1_Ioli0_1_0_10 ; wire precnt_s_4162_FCO ; wire precnt_s_4162_S ; wire precnt_s_4162_Y ; // @28:496288 SLE \precnt[17] ( .Q(cnt11[17]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[17]), .EN(N_331), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[16] ( .Q(cnt11[16]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[16]), .EN(N_331), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[15] ( .Q(cnt11[15]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[15]), .EN(N_331), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[14] ( .Q(cnt11[14]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[14]), .EN(N_331), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[13] ( .Q(cnt11[13]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[13]), .EN(N_331), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[12] ( .Q(cnt11[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[12]), .EN(N_331), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[11] ( .Q(cnt11[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_331), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[10] ( .Q(cnt11[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_331), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[9] ( .Q(cnt11[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_331), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[8] ( .Q(cnt11[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_331), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[7] ( .Q(cnt11[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_331), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[6] ( .Q(cnt11[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_331), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[5] ( .Q(cnt11[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_331), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[4] ( .Q(cnt11[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_331), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[3] ( .Q(cnt11[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_331), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[2] ( .Q(cnt11[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_331), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[1] ( .Q(cnt11[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_331), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[0] ( .Q(cnt11[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_331), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496391 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i[13]), .EN(un1_Ioli0_1_0_10), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 ARI1 precnt_s_4162 ( .FCO(precnt_s_4162_FCO), .S(precnt_s_4162_S), .Y(precnt_s_4162_Y), .B(cnt11[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4162.INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_27[1]), .B(cnt11[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4162_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_27[2]), .B(cnt11[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_27[3]), .B(cnt11[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_27[4]), .B(cnt11[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_27[5]), .B(cnt11[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_27[6]), .B(cnt11[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_27[7]), .B(cnt11[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_27[8]), .B(cnt11[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_27[9]), .B(cnt11[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_27[10]), .B(cnt11[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[11] ( .FCO(precnt_cry_Z[11]), .S(precnt_s[11]), .Y(precnt_cry_Y_27[11]), .B(cnt11[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[12] ( .FCO(precnt_cry_Z[12]), .S(precnt_s[12]), .Y(precnt_cry_Y_2[12]), .B(cnt11[12]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[11]) ); defparam \precnt_cry[12] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[13] ( .FCO(precnt_cry_Z[13]), .S(precnt_s[13]), .Y(precnt_cry_Y_2[13]), .B(cnt11[13]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[12]) ); defparam \precnt_cry[13] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[14] ( .FCO(precnt_cry_Z[14]), .S(precnt_s[14]), .Y(precnt_cry_Y_2[14]), .B(cnt11[14]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[13]) ); defparam \precnt_cry[14] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[15] ( .FCO(precnt_cry_Z[15]), .S(precnt_s[15]), .Y(precnt_cry_Y_2[15]), .B(cnt11[15]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[14]) ); defparam \precnt_cry[15] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[16] ( .FCO(precnt_cry_Z[16]), .S(precnt_s[16]), .Y(precnt_cry_Y_2[16]), .B(cnt11[16]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[15]) ); defparam \precnt_cry[16] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[17] ( .FCO(OO0o1[18]), .S(precnt_s[17]), .Y(precnt_cry_Y_2[17]), .B(cnt11[17]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[16]) ); defparam \precnt_cry[17] .INIT=20'h4AA00; // @28:496288 CFG4 \precnt_lm_0[0] ( .A(cnt11[0]), .B(l0Io1_0), .C(precnt_lm_0_1_0_Z[0]), .D(l0lo1), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=16'hCC5C; // @28:496288 CFG3 \precnt_lm_0_1_0[0] ( .A(l1II1), .B(N_1126), .C(N_1118), .Y(precnt_lm_0_1_0_Z[0]) ); defparam \precnt_lm_0_1_0[0] .INIT=8'h7F; // @28:496198 CFG4 un1_Ioli0_1_0 ( .A(l0Io1_0), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .C(OO0o1[18]), .D(N_1131), .Y(un1_Ioli0_1_0_10) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:496391 CFG2 IilI1_RNO ( .A(N_1131), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .Y(Ioli0_i[13]) ); defparam IilI1_RNO.INIT=4'h7; // @28:496288 CFG4 \precnt_lm_0[17] ( .A(l0lo1), .B(precnt_s[17]), .C(N_1137), .D(N_1126), .Y(precnt_lm[17]) ); defparam \precnt_lm_0[17] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[16] ( .A(l0lo1), .B(precnt_s[16]), .C(N_1137), .D(N_1126), .Y(precnt_lm[16]) ); defparam \precnt_lm_0[16] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[15] ( .A(l0lo1), .B(precnt_s[15]), .C(N_1137), .D(N_1126), .Y(precnt_lm[15]) ); defparam \precnt_lm_0[15] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[14] ( .A(l0lo1), .B(precnt_s[14]), .C(N_1137), .D(N_1126), .Y(precnt_lm[14]) ); defparam \precnt_lm_0[14] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[13] ( .A(l0lo1), .B(precnt_s[13]), .C(N_1137), .D(N_1126), .Y(precnt_lm[13]) ); defparam \precnt_lm_0[13] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[12] ( .A(l0lo1), .B(precnt_s[12]), .C(N_1137), .D(N_1126), .Y(precnt_lm[12]) ); defparam \precnt_lm_0[12] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[11] ( .A(l0lo1), .B(precnt_s[11]), .C(N_1137), .D(N_1126), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[10] ( .A(l0lo1), .B(precnt_s[10]), .C(N_1137), .D(N_1126), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[9] ( .A(l0lo1), .B(precnt_s[9]), .C(N_1137), .D(N_1126), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[8] ( .A(l0lo1), .B(precnt_s[8]), .C(N_1137), .D(N_1126), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[7] ( .A(l0lo1), .B(precnt_s[7]), .C(N_1137), .D(N_1126), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[6] ( .A(l0lo1), .B(precnt_s[6]), .C(N_1137), .D(N_1126), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[5] ( .A(l0lo1), .B(precnt_s[5]), .C(N_1137), .D(N_1126), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[4] ( .A(l0lo1), .B(precnt_s[4]), .C(N_1137), .D(N_1126), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[3] ( .A(l0lo1), .B(precnt_s[3]), .C(N_1137), .D(N_1126), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[2] ( .A(l0lo1), .B(precnt_s[2]), .C(N_1137), .D(N_1126), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[1] ( .A(l0lo1), .B(precnt_s[1]), .C(N_1137), .D(N_1126), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=16'h0444; // @28:496184 CFG4 un1_iOI01_1_i_0 ( .A(N_1126), .B(N_1137), .C(l0Io1_0), .D(l0lo1), .Y(N_331) ); defparam un1_iOI01_1_i_0.INIT=16'hFFF8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_LINC_1s_26s_8 */ module CTSE_PEMSTAT_SINC_1s_26s_0 ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, o0Io1_0, cnt12, N_1133, N_1131, N_1114, l1II1, N_1124, l0lo1, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; output o0Io1_0 ; output [11:0] cnt12 ; input N_1133 ; input N_1131 ; input N_1114 ; input l1II1 ; input N_1124 ; input l0lo1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire o0Io1_0 ; wire N_1133 ; wire N_1131 ; wire N_1114 ; wire l1II1 ; wire N_1124 ; wire l0lo1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [11:0] precnt_lm; wire [14:14] Ioli0_i; wire [10:1] precnt_cry_Z; wire [11:1] precnt_s; wire [11:1] precnt_cry_Y_26; wire [12:12] OO0o1; wire [0:0] precnt_lm_0_1_0_Z; wire VCC ; wire N_336 ; wire GND ; wire un1_Ioli0_1_0_11 ; wire precnt_s_4161_FCO ; wire precnt_s_4161_S ; wire precnt_s_4161_Y ; // @28:497254 SLE \precnt[11] ( .Q(cnt12[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_336), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[10] ( .Q(cnt12[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_336), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[9] ( .Q(cnt12[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_336), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[8] ( .Q(cnt12[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_336), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[7] ( .Q(cnt12[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_336), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[6] ( .Q(cnt12[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_336), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[5] ( .Q(cnt12[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_336), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[4] ( .Q(cnt12[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_336), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[3] ( .Q(cnt12[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_336), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[2] ( .Q(cnt12[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_336), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[1] ( .Q(cnt12[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_336), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[0] ( .Q(cnt12[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_336), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497357 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i[14]), .EN(un1_Ioli0_1_0_11), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 ARI1 precnt_s_4161 ( .FCO(precnt_s_4161_FCO), .S(precnt_s_4161_S), .Y(precnt_s_4161_Y), .B(cnt12[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4161.INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_26[1]), .B(cnt12[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4161_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_26[2]), .B(cnt12[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_26[3]), .B(cnt12[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_26[4]), .B(cnt12[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_26[5]), .B(cnt12[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_26[6]), .B(cnt12[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_26[7]), .B(cnt12[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_26[8]), .B(cnt12[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_26[9]), .B(cnt12[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_26[10]), .B(cnt12[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[11] ( .FCO(OO0o1[12]), .S(precnt_s[11]), .Y(precnt_cry_Y_26[11]), .B(cnt12[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:497254 CFG4 \precnt_lm_0[0] ( .A(cnt12[0]), .B(l0Io1_0), .C(precnt_lm_0_1_0_Z[0]), .D(l0lo1), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=16'hCC5C; // @28:497254 CFG3 \precnt_lm_0_1_0[0] ( .A(N_1124), .B(l1II1), .C(N_1114), .Y(precnt_lm_0_1_0_Z[0]) ); defparam \precnt_lm_0_1_0[0] .INIT=8'h7F; // @28:497164 CFG4 un1_Ioli0_1_0 ( .A(l0Io1_0), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .C(OO0o1[12]), .D(N_1131), .Y(un1_Ioli0_1_0_11) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:497357 CFG2 IilI1_RNO ( .A(N_1131), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .Y(Ioli0_i[14]) ); defparam IilI1_RNO.INIT=4'h7; // @28:497254 CFG4 \precnt_lm_0[11] ( .A(l0lo1), .B(precnt_s[11]), .C(N_1133), .D(N_1114), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[10] ( .A(l0lo1), .B(precnt_s[10]), .C(N_1133), .D(N_1114), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[9] ( .A(l0lo1), .B(precnt_s[9]), .C(N_1133), .D(N_1114), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[8] ( .A(l0lo1), .B(precnt_s[8]), .C(N_1133), .D(N_1114), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[7] ( .A(l0lo1), .B(precnt_s[7]), .C(N_1133), .D(N_1114), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[6] ( .A(l0lo1), .B(precnt_s[6]), .C(N_1133), .D(N_1114), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[5] ( .A(l0lo1), .B(precnt_s[5]), .C(N_1133), .D(N_1114), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[4] ( .A(l0lo1), .B(precnt_s[4]), .C(N_1133), .D(N_1114), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[3] ( .A(l0lo1), .B(precnt_s[3]), .C(N_1133), .D(N_1114), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[2] ( .A(l0lo1), .B(precnt_s[2]), .C(N_1133), .D(N_1114), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[1] ( .A(l0lo1), .B(precnt_s[1]), .C(N_1133), .D(N_1114), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=16'h0444; // @28:497150 CFG4 un1_iOI01_1_i_0 ( .A(N_1114), .B(N_1133), .C(l0Io1_0), .D(l0lo1), .Y(N_336) ); defparam un1_iOI01_1_i_0.INIT=16'hFFF8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_SINC_1s_26s_0 */ module CTSE_PEMSTAT_SINC_1s_26s_1 ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, o0Io1_0, cnt13, N_1133, N_1131, N_1117, l1II1, N_1124, l0lo1, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; output o0Io1_0 ; output [11:0] cnt13 ; input N_1133 ; input N_1131 ; input N_1117 ; input l1II1 ; input N_1124 ; input l0lo1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire o0Io1_0 ; wire N_1133 ; wire N_1131 ; wire N_1117 ; wire l1II1 ; wire N_1124 ; wire l0lo1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [11:0] precnt_lm; wire [15:15] Ioli0_i; wire [10:1] precnt_cry_Z; wire [11:1] precnt_s; wire [11:1] precnt_cry_Y_25; wire [12:12] OO0o1; wire [0:0] precnt_lm_0_1_0_Z; wire VCC ; wire N_341 ; wire GND ; wire un1_Ioli0_1_0_12 ; wire precnt_s_4160_FCO ; wire precnt_s_4160_S ; wire precnt_s_4160_Y ; // @28:497254 SLE \precnt[11] ( .Q(cnt13[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_341), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[10] ( .Q(cnt13[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_341), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[9] ( .Q(cnt13[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_341), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[8] ( .Q(cnt13[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_341), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[7] ( .Q(cnt13[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_341), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[6] ( .Q(cnt13[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_341), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[5] ( .Q(cnt13[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_341), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[4] ( .Q(cnt13[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_341), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[3] ( .Q(cnt13[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_341), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[2] ( .Q(cnt13[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_341), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[1] ( .Q(cnt13[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_341), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[0] ( .Q(cnt13[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_341), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497357 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i[15]), .EN(un1_Ioli0_1_0_12), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 ARI1 precnt_s_4160 ( .FCO(precnt_s_4160_FCO), .S(precnt_s_4160_S), .Y(precnt_s_4160_Y), .B(cnt13[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4160.INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_25[1]), .B(cnt13[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4160_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_25[2]), .B(cnt13[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_25[3]), .B(cnt13[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_25[4]), .B(cnt13[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_25[5]), .B(cnt13[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_25[6]), .B(cnt13[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_25[7]), .B(cnt13[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_25[8]), .B(cnt13[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_25[9]), .B(cnt13[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_25[10]), .B(cnt13[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[11] ( .FCO(OO0o1[12]), .S(precnt_s[11]), .Y(precnt_cry_Y_25[11]), .B(cnt13[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:497254 CFG4 \precnt_lm_0[0] ( .A(cnt13[0]), .B(l0Io1_0), .C(precnt_lm_0_1_0_Z[0]), .D(l0lo1), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=16'hCC5C; // @28:497254 CFG3 \precnt_lm_0_1_0[0] ( .A(N_1124), .B(l1II1), .C(N_1117), .Y(precnt_lm_0_1_0_Z[0]) ); defparam \precnt_lm_0_1_0[0] .INIT=8'h7F; // @28:497164 CFG4 un1_Ioli0_1_0 ( .A(l0Io1_0), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .C(OO0o1[12]), .D(N_1131), .Y(un1_Ioli0_1_0_12) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:497357 CFG2 IilI1_RNO ( .A(N_1131), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .Y(Ioli0_i[15]) ); defparam IilI1_RNO.INIT=4'h7; // @28:497254 CFG4 \precnt_lm_0[11] ( .A(l0lo1), .B(precnt_s[11]), .C(N_1133), .D(N_1117), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[10] ( .A(l0lo1), .B(precnt_s[10]), .C(N_1133), .D(N_1117), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[9] ( .A(l0lo1), .B(precnt_s[9]), .C(N_1133), .D(N_1117), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[8] ( .A(l0lo1), .B(precnt_s[8]), .C(N_1133), .D(N_1117), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[7] ( .A(l0lo1), .B(precnt_s[7]), .C(N_1133), .D(N_1117), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[6] ( .A(l0lo1), .B(precnt_s[6]), .C(N_1133), .D(N_1117), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[5] ( .A(l0lo1), .B(precnt_s[5]), .C(N_1133), .D(N_1117), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[4] ( .A(l0lo1), .B(precnt_s[4]), .C(N_1133), .D(N_1117), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[3] ( .A(l0lo1), .B(precnt_s[3]), .C(N_1133), .D(N_1117), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[2] ( .A(l0lo1), .B(precnt_s[2]), .C(N_1133), .D(N_1117), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[1] ( .A(l0lo1), .B(precnt_s[1]), .C(N_1133), .D(N_1117), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=16'h0444; // @28:497150 CFG4 un1_iOI01_1_i_0 ( .A(N_1117), .B(N_1133), .C(l0Io1_0), .D(l0lo1), .Y(N_341) ); defparam un1_iOI01_1_i_0.INIT=16'hFFF8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_SINC_1s_26s_1 */ module CTSE_PEMSTAT_SINC_1s_26s_2 ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, o0Io1_0, cnt14, N_1137, N_1131, N_1114, l1II1, N_1118, l0lo1, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; output o0Io1_0 ; output [11:0] cnt14 ; input N_1137 ; input N_1131 ; input N_1114 ; input l1II1 ; input N_1118 ; input l0lo1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire o0Io1_0 ; wire N_1137 ; wire N_1131 ; wire N_1114 ; wire l1II1 ; wire N_1118 ; wire l0lo1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [11:0] precnt_lm; wire [16:16] Ioli0_i; wire [10:1] precnt_cry_Z; wire [11:1] precnt_s; wire [11:1] precnt_cry_Y_24; wire [12:12] OO0o1; wire [0:0] precnt_lm_0_1_0_Z; wire VCC ; wire N_346 ; wire GND ; wire un1_Ioli0_1_0_13 ; wire precnt_s_4159_FCO ; wire precnt_s_4159_S ; wire precnt_s_4159_Y ; // @28:497254 SLE \precnt[11] ( .Q(cnt14[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_346), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[10] ( .Q(cnt14[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_346), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[9] ( .Q(cnt14[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_346), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[8] ( .Q(cnt14[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_346), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[7] ( .Q(cnt14[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_346), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[6] ( .Q(cnt14[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_346), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[5] ( .Q(cnt14[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_346), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[4] ( .Q(cnt14[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_346), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[3] ( .Q(cnt14[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_346), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[2] ( .Q(cnt14[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_346), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[1] ( .Q(cnt14[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_346), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[0] ( .Q(cnt14[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_346), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497357 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i[16]), .EN(un1_Ioli0_1_0_13), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 ARI1 precnt_s_4159 ( .FCO(precnt_s_4159_FCO), .S(precnt_s_4159_S), .Y(precnt_s_4159_Y), .B(cnt14[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4159.INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_24[1]), .B(cnt14[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4159_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_24[2]), .B(cnt14[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_24[3]), .B(cnt14[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_24[4]), .B(cnt14[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_24[5]), .B(cnt14[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_24[6]), .B(cnt14[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_24[7]), .B(cnt14[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_24[8]), .B(cnt14[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_24[9]), .B(cnt14[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_24[10]), .B(cnt14[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[11] ( .FCO(OO0o1[12]), .S(precnt_s[11]), .Y(precnt_cry_Y_24[11]), .B(cnt14[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:497254 CFG4 \precnt_lm_0[0] ( .A(cnt14[0]), .B(l0Io1_0), .C(precnt_lm_0_1_0_Z[0]), .D(l0lo1), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=16'hCC5C; // @28:497254 CFG3 \precnt_lm_0_1_0[0] ( .A(N_1118), .B(l1II1), .C(N_1114), .Y(precnt_lm_0_1_0_Z[0]) ); defparam \precnt_lm_0_1_0[0] .INIT=8'h7F; // @28:497164 CFG4 un1_Ioli0_1_0 ( .A(l0Io1_0), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .C(OO0o1[12]), .D(N_1131), .Y(un1_Ioli0_1_0_13) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:497357 CFG2 IilI1_RNO ( .A(N_1131), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .Y(Ioli0_i[16]) ); defparam IilI1_RNO.INIT=4'h7; // @28:497254 CFG4 \precnt_lm_0[11] ( .A(l0lo1), .B(precnt_s[11]), .C(N_1137), .D(N_1114), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[10] ( .A(l0lo1), .B(precnt_s[10]), .C(N_1137), .D(N_1114), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[9] ( .A(l0lo1), .B(precnt_s[9]), .C(N_1137), .D(N_1114), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[8] ( .A(l0lo1), .B(precnt_s[8]), .C(N_1137), .D(N_1114), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[7] ( .A(l0lo1), .B(precnt_s[7]), .C(N_1137), .D(N_1114), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[6] ( .A(l0lo1), .B(precnt_s[6]), .C(N_1137), .D(N_1114), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[5] ( .A(l0lo1), .B(precnt_s[5]), .C(N_1137), .D(N_1114), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[4] ( .A(l0lo1), .B(precnt_s[4]), .C(N_1137), .D(N_1114), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[3] ( .A(l0lo1), .B(precnt_s[3]), .C(N_1137), .D(N_1114), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[2] ( .A(l0lo1), .B(precnt_s[2]), .C(N_1137), .D(N_1114), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[1] ( .A(l0lo1), .B(precnt_s[1]), .C(N_1137), .D(N_1114), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=16'h0444; // @28:497150 CFG4 un1_iOI01_1_i_0 ( .A(N_1114), .B(N_1137), .C(l0Io1_0), .D(l0lo1), .Y(N_346) ); defparam un1_iOI01_1_i_0.INIT=16'hFFF8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_SINC_1s_26s_2 */ module CTSE_PEMSTAT_SINC_1s_26s_3 ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, Ioli0_i_0, o0Io1_0, cnt15, N_1137, N_1131, N_1117, l1II1, N_1118, l0lo1, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; input Ioli0_i_0 ; output o0Io1_0 ; output [11:0] cnt15 ; input N_1137 ; input N_1131 ; input N_1117 ; input l1II1 ; input N_1118 ; input l0lo1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire Ioli0_i_0 ; wire o0Io1_0 ; wire N_1137 ; wire N_1131 ; wire N_1117 ; wire l1II1 ; wire N_1118 ; wire l0lo1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [11:0] precnt_lm; wire [10:1] precnt_cry_Z; wire [11:1] precnt_s; wire [11:1] precnt_cry_Y_23; wire [12:12] OO0o1; wire [0:0] precnt_lm_0_1_0_Z; wire VCC ; wire un1_iOI01_1_i_Z ; wire GND ; wire un1_Ioli0_1_Z ; wire precnt_s_4158_FCO ; wire precnt_s_4158_S ; wire precnt_s_4158_Y ; // @28:497254 SLE \precnt[11] ( .Q(cnt15[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[10] ( .Q(cnt15[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[9] ( .Q(cnt15[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[8] ( .Q(cnt15[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[7] ( .Q(cnt15[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[6] ( .Q(cnt15[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[5] ( .Q(cnt15[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[4] ( .Q(cnt15[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[3] ( .Q(cnt15[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[2] ( .Q(cnt15[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[1] ( .Q(cnt15[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[0] ( .Q(cnt15[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497357 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i_0), .EN(un1_Ioli0_1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 ARI1 precnt_s_4158 ( .FCO(precnt_s_4158_FCO), .S(precnt_s_4158_S), .Y(precnt_s_4158_Y), .B(cnt15[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4158.INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_23[1]), .B(cnt15[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4158_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_23[2]), .B(cnt15[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_23[3]), .B(cnt15[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_23[4]), .B(cnt15[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_23[5]), .B(cnt15[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_23[6]), .B(cnt15[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_23[7]), .B(cnt15[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_23[8]), .B(cnt15[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_23[9]), .B(cnt15[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_23[10]), .B(cnt15[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[11] ( .FCO(OO0o1[12]), .S(precnt_s[11]), .Y(precnt_cry_Y_23[11]), .B(cnt15[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:497254 CFG4 \precnt_lm_0[0] ( .A(cnt15[0]), .B(l0Io1_0), .C(precnt_lm_0_1_0_Z[0]), .D(l0lo1), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=16'hCC5C; // @28:497254 CFG3 \precnt_lm_0_1_0[0] ( .A(N_1118), .B(l1II1), .C(N_1117), .Y(precnt_lm_0_1_0_Z[0]) ); defparam \precnt_lm_0_1_0[0] .INIT=8'h7F; // @28:497164 CFG4 un1_Ioli0_1 ( .A(l0Io1_0), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .C(OO0o1[12]), .D(N_1131), .Y(un1_Ioli0_1_Z) ); defparam un1_Ioli0_1.INIT=16'hECA0; // @28:497254 CFG4 \precnt_lm_0[11] ( .A(l0lo1), .B(precnt_s[11]), .C(N_1137), .D(N_1117), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[10] ( .A(l0lo1), .B(precnt_s[10]), .C(N_1137), .D(N_1117), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[9] ( .A(l0lo1), .B(precnt_s[9]), .C(N_1137), .D(N_1117), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[8] ( .A(l0lo1), .B(precnt_s[8]), .C(N_1137), .D(N_1117), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[7] ( .A(l0lo1), .B(precnt_s[7]), .C(N_1137), .D(N_1117), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[6] ( .A(l0lo1), .B(precnt_s[6]), .C(N_1137), .D(N_1117), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[5] ( .A(l0lo1), .B(precnt_s[5]), .C(N_1137), .D(N_1117), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[4] ( .A(l0lo1), .B(precnt_s[4]), .C(N_1137), .D(N_1117), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[3] ( .A(l0lo1), .B(precnt_s[3]), .C(N_1137), .D(N_1117), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[2] ( .A(l0lo1), .B(precnt_s[2]), .C(N_1137), .D(N_1117), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[1] ( .A(l0lo1), .B(precnt_s[1]), .C(N_1137), .D(N_1117), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=16'h0444; // @28:497254 CFG4 un1_iOI01_1_i ( .A(N_1117), .B(N_1137), .C(l0Io1_0), .D(l0lo1), .Y(un1_iOI01_1_i_Z) ); defparam un1_iOI01_1_i.INIT=16'hFFF8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_SINC_1s_26s_3 */ module CTSE_PEMSTAT_SINC_1s_26s_4 ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, Ioli0_i_0, o0Io1_0, cnt16, N_1136, N_1131, N_1115, l1II1, N_1119, l0lo1, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; input Ioli0_i_0 ; output o0Io1_0 ; output [11:0] cnt16 ; input N_1136 ; input N_1131 ; input N_1115 ; input l1II1 ; input N_1119 ; input l0lo1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire Ioli0_i_0 ; wire o0Io1_0 ; wire N_1136 ; wire N_1131 ; wire N_1115 ; wire l1II1 ; wire N_1119 ; wire l0lo1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [11:0] precnt_lm; wire [10:1] precnt_cry_Z; wire [11:1] precnt_s; wire [11:1] precnt_cry_Y_22; wire [12:12] OO0o1; wire [0:0] precnt_lm_0_1_0_Z; wire VCC ; wire N_249 ; wire GND ; wire un1_Ioli0_1_0_14 ; wire precnt_s_4157_FCO ; wire precnt_s_4157_S ; wire precnt_s_4157_Y ; // @28:497254 SLE \precnt[11] ( .Q(cnt16[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_249), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[10] ( .Q(cnt16[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_249), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[9] ( .Q(cnt16[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_249), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[8] ( .Q(cnt16[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_249), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[7] ( .Q(cnt16[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_249), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[6] ( .Q(cnt16[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_249), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[5] ( .Q(cnt16[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_249), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[4] ( .Q(cnt16[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_249), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[3] ( .Q(cnt16[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_249), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[2] ( .Q(cnt16[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_249), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[1] ( .Q(cnt16[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_249), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[0] ( .Q(cnt16[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_249), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497357 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i_0), .EN(un1_Ioli0_1_0_14), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 ARI1 precnt_s_4157 ( .FCO(precnt_s_4157_FCO), .S(precnt_s_4157_S), .Y(precnt_s_4157_Y), .B(cnt16[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4157.INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_22[1]), .B(cnt16[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4157_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_22[2]), .B(cnt16[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_22[3]), .B(cnt16[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_22[4]), .B(cnt16[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_22[5]), .B(cnt16[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_22[6]), .B(cnt16[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_22[7]), .B(cnt16[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_22[8]), .B(cnt16[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_22[9]), .B(cnt16[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_22[10]), .B(cnt16[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[11] ( .FCO(OO0o1[12]), .S(precnt_s[11]), .Y(precnt_cry_Y_22[11]), .B(cnt16[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:497254 CFG4 \precnt_lm_0[0] ( .A(cnt16[0]), .B(l0Io1_0), .C(precnt_lm_0_1_0_Z[0]), .D(l0lo1), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=16'hCC5C; // @28:497254 CFG3 \precnt_lm_0_1_0[0] ( .A(N_1119), .B(l1II1), .C(N_1115), .Y(precnt_lm_0_1_0_Z[0]) ); defparam \precnt_lm_0_1_0[0] .INIT=8'h7F; // @28:497164 CFG4 un1_Ioli0_1_0 ( .A(l0Io1_0), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .C(OO0o1[12]), .D(N_1131), .Y(un1_Ioli0_1_0_14) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:497254 CFG4 \precnt_lm_0[11] ( .A(l0lo1), .B(precnt_s[11]), .C(N_1136), .D(N_1115), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[10] ( .A(l0lo1), .B(precnt_s[10]), .C(N_1136), .D(N_1115), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[9] ( .A(l0lo1), .B(precnt_s[9]), .C(N_1136), .D(N_1115), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[8] ( .A(l0lo1), .B(precnt_s[8]), .C(N_1136), .D(N_1115), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[7] ( .A(l0lo1), .B(precnt_s[7]), .C(N_1136), .D(N_1115), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[6] ( .A(l0lo1), .B(precnt_s[6]), .C(N_1136), .D(N_1115), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[5] ( .A(l0lo1), .B(precnt_s[5]), .C(N_1136), .D(N_1115), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[4] ( .A(l0lo1), .B(precnt_s[4]), .C(N_1136), .D(N_1115), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[3] ( .A(l0lo1), .B(precnt_s[3]), .C(N_1136), .D(N_1115), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[2] ( .A(l0lo1), .B(precnt_s[2]), .C(N_1136), .D(N_1115), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[1] ( .A(l0lo1), .B(precnt_s[1]), .C(N_1136), .D(N_1115), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=16'h0444; // @28:497150 CFG4 un1_iOI01_1_i_0 ( .A(N_1115), .B(N_1136), .C(l0Io1_0), .D(l0lo1), .Y(N_249) ); defparam un1_iOI01_1_i_0.INIT=16'hFFF8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_SINC_1s_26s_4 */ module CTSE_PEMSTAT_SINC_1s_26s_5 ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, o0Io1_0, cnt17, N_1136, N_1131, N_1119, N_1121, l1II1, l0lo1, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; output o0Io1_0 ; output [11:0] cnt17 ; input N_1136 ; input N_1131 ; input N_1119 ; input N_1121 ; input l1II1 ; input l0lo1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire o0Io1_0 ; wire N_1136 ; wire N_1131 ; wire N_1119 ; wire N_1121 ; wire l1II1 ; wire l0lo1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [11:0] precnt_lm; wire [19:19] Ioli0_i; wire [10:1] precnt_cry_Z; wire [11:1] precnt_s; wire [11:1] precnt_cry_Y_21; wire [12:12] OO0o1; wire [0:0] precnt_lm_0_1_0_Z; wire VCC ; wire N_351 ; wire GND ; wire un1_Ioli0_1_0_15 ; wire precnt_s_4156_FCO ; wire precnt_s_4156_S ; wire precnt_s_4156_Y ; // @28:497254 SLE \precnt[11] ( .Q(cnt17[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_351), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[10] ( .Q(cnt17[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_351), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[9] ( .Q(cnt17[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_351), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[8] ( .Q(cnt17[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_351), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[7] ( .Q(cnt17[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_351), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[6] ( .Q(cnt17[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_351), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[5] ( .Q(cnt17[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_351), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[4] ( .Q(cnt17[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_351), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[3] ( .Q(cnt17[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_351), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[2] ( .Q(cnt17[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_351), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[1] ( .Q(cnt17[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_351), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[0] ( .Q(cnt17[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_351), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497357 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i[19]), .EN(un1_Ioli0_1_0_15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 ARI1 precnt_s_4156 ( .FCO(precnt_s_4156_FCO), .S(precnt_s_4156_S), .Y(precnt_s_4156_Y), .B(cnt17[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4156.INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_21[1]), .B(cnt17[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4156_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_21[2]), .B(cnt17[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_21[3]), .B(cnt17[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_21[4]), .B(cnt17[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_21[5]), .B(cnt17[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_21[6]), .B(cnt17[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_21[7]), .B(cnt17[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_21[8]), .B(cnt17[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_21[9]), .B(cnt17[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_21[10]), .B(cnt17[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[11] ( .FCO(OO0o1[12]), .S(precnt_s[11]), .Y(precnt_cry_Y_21[11]), .B(cnt17[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:497254 CFG4 \precnt_lm_0[0] ( .A(cnt17[0]), .B(l0Io1_0), .C(precnt_lm_0_1_0_Z[0]), .D(l0lo1), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=16'hCC5C; // @28:497254 CFG3 \precnt_lm_0_1_0[0] ( .A(l1II1), .B(N_1121), .C(N_1119), .Y(precnt_lm_0_1_0_Z[0]) ); defparam \precnt_lm_0_1_0[0] .INIT=8'h7F; // @28:497164 CFG4 un1_Ioli0_1_0 ( .A(l0Io1_0), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .C(OO0o1[12]), .D(N_1131), .Y(un1_Ioli0_1_0_15) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:497357 CFG2 IilI1_RNO ( .A(N_1131), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .Y(Ioli0_i[19]) ); defparam IilI1_RNO.INIT=4'h7; // @28:497254 CFG4 \precnt_lm_0[11] ( .A(l0lo1), .B(precnt_s[11]), .C(N_1136), .D(N_1121), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[10] ( .A(l0lo1), .B(precnt_s[10]), .C(N_1136), .D(N_1121), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[9] ( .A(l0lo1), .B(precnt_s[9]), .C(N_1136), .D(N_1121), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[8] ( .A(l0lo1), .B(precnt_s[8]), .C(N_1136), .D(N_1121), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[7] ( .A(l0lo1), .B(precnt_s[7]), .C(N_1136), .D(N_1121), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[6] ( .A(l0lo1), .B(precnt_s[6]), .C(N_1136), .D(N_1121), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[5] ( .A(l0lo1), .B(precnt_s[5]), .C(N_1136), .D(N_1121), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[4] ( .A(l0lo1), .B(precnt_s[4]), .C(N_1136), .D(N_1121), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[3] ( .A(l0lo1), .B(precnt_s[3]), .C(N_1136), .D(N_1121), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[2] ( .A(l0lo1), .B(precnt_s[2]), .C(N_1136), .D(N_1121), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[1] ( .A(l0lo1), .B(precnt_s[1]), .C(N_1136), .D(N_1121), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=16'h0444; // @28:497150 CFG4 un1_iOI01_1_i_0 ( .A(N_1121), .B(N_1136), .C(l0Io1_0), .D(l0lo1), .Y(N_351) ); defparam un1_iOI01_1_i_0.INIT=16'hFFF8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_SINC_1s_26s_5 */ module CTSE_PEMSTAT_SINC_1s_26s_6 ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, o0Io1_0, cnt18, N_1135, N_1131, N_1115, l1II1, N_1123, l0lo1, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; output o0Io1_0 ; output [11:0] cnt18 ; input N_1135 ; input N_1131 ; input N_1115 ; input l1II1 ; input N_1123 ; input l0lo1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire o0Io1_0 ; wire N_1135 ; wire N_1131 ; wire N_1115 ; wire l1II1 ; wire N_1123 ; wire l0lo1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [11:0] precnt_lm; wire [20:20] Ioli0_i; wire [10:1] precnt_cry_Z; wire [11:1] precnt_s; wire [11:1] precnt_cry_Y_20; wire [12:12] OO0o1; wire [0:0] precnt_lm_0_1_0_Z; wire VCC ; wire N_356 ; wire GND ; wire un1_Ioli0_1_0_16 ; wire precnt_s_4155_FCO ; wire precnt_s_4155_S ; wire precnt_s_4155_Y ; // @28:497254 SLE \precnt[11] ( .Q(cnt18[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_356), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[10] ( .Q(cnt18[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_356), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[9] ( .Q(cnt18[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_356), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[8] ( .Q(cnt18[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_356), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[7] ( .Q(cnt18[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_356), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[6] ( .Q(cnt18[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_356), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[5] ( .Q(cnt18[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_356), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[4] ( .Q(cnt18[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_356), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[3] ( .Q(cnt18[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_356), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[2] ( .Q(cnt18[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_356), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[1] ( .Q(cnt18[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_356), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[0] ( .Q(cnt18[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_356), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497357 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i[20]), .EN(un1_Ioli0_1_0_16), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 ARI1 precnt_s_4155 ( .FCO(precnt_s_4155_FCO), .S(precnt_s_4155_S), .Y(precnt_s_4155_Y), .B(cnt18[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4155.INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_20[1]), .B(cnt18[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4155_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_20[2]), .B(cnt18[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_20[3]), .B(cnt18[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_20[4]), .B(cnt18[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_20[5]), .B(cnt18[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_20[6]), .B(cnt18[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_20[7]), .B(cnt18[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_20[8]), .B(cnt18[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_20[9]), .B(cnt18[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_20[10]), .B(cnt18[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[11] ( .FCO(OO0o1[12]), .S(precnt_s[11]), .Y(precnt_cry_Y_20[11]), .B(cnt18[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:497254 CFG4 \precnt_lm_0[0] ( .A(cnt18[0]), .B(l0Io1_0), .C(precnt_lm_0_1_0_Z[0]), .D(l0lo1), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=16'hCC5C; // @28:497254 CFG3 \precnt_lm_0_1_0[0] ( .A(N_1123), .B(l1II1), .C(N_1115), .Y(precnt_lm_0_1_0_Z[0]) ); defparam \precnt_lm_0_1_0[0] .INIT=8'h7F; // @28:497164 CFG4 un1_Ioli0_1_0 ( .A(l0Io1_0), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .C(OO0o1[12]), .D(N_1131), .Y(un1_Ioli0_1_0_16) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:497357 CFG2 IilI1_RNO ( .A(N_1131), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .Y(Ioli0_i[20]) ); defparam IilI1_RNO.INIT=4'h7; // @28:497254 CFG4 \precnt_lm_0[11] ( .A(l0lo1), .B(precnt_s[11]), .C(N_1135), .D(N_1115), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[10] ( .A(l0lo1), .B(precnt_s[10]), .C(N_1135), .D(N_1115), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[9] ( .A(l0lo1), .B(precnt_s[9]), .C(N_1135), .D(N_1115), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[8] ( .A(l0lo1), .B(precnt_s[8]), .C(N_1135), .D(N_1115), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[7] ( .A(l0lo1), .B(precnt_s[7]), .C(N_1135), .D(N_1115), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[6] ( .A(l0lo1), .B(precnt_s[6]), .C(N_1135), .D(N_1115), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[5] ( .A(l0lo1), .B(precnt_s[5]), .C(N_1135), .D(N_1115), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[4] ( .A(l0lo1), .B(precnt_s[4]), .C(N_1135), .D(N_1115), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[3] ( .A(l0lo1), .B(precnt_s[3]), .C(N_1135), .D(N_1115), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[2] ( .A(l0lo1), .B(precnt_s[2]), .C(N_1135), .D(N_1115), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[1] ( .A(l0lo1), .B(precnt_s[1]), .C(N_1135), .D(N_1115), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=16'h0444; // @28:497150 CFG4 un1_iOI01_1_i_0 ( .A(N_1115), .B(N_1135), .C(l0Io1_0), .D(l0lo1), .Y(N_356) ); defparam un1_iOI01_1_i_0.INIT=16'hFFF8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_SINC_1s_26s_6 */ module CTSE_PEMSTAT_SINC_1s_26s_7 ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, Ioli0_i_0, o0Io1_0, cnt19, N_1135, N_1131, N_1121, l1II1, N_1123, l0lo1, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; input Ioli0_i_0 ; output o0Io1_0 ; output [11:0] cnt19 ; input N_1135 ; input N_1131 ; input N_1121 ; input l1II1 ; input N_1123 ; input l0lo1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire Ioli0_i_0 ; wire o0Io1_0 ; wire N_1135 ; wire N_1131 ; wire N_1121 ; wire l1II1 ; wire N_1123 ; wire l0lo1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [11:0] precnt_lm; wire [10:1] precnt_cry_Z; wire [11:1] precnt_s; wire [11:1] precnt_cry_Y_19; wire [12:12] OO0o1; wire [0:0] precnt_lm_0_1_0_Z; wire VCC ; wire N_359 ; wire GND ; wire un1_Ioli0_1_0_17 ; wire precnt_s_4154_FCO ; wire precnt_s_4154_S ; wire precnt_s_4154_Y ; // @28:497254 SLE \precnt[11] ( .Q(cnt19[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_359), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[10] ( .Q(cnt19[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_359), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[9] ( .Q(cnt19[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_359), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[8] ( .Q(cnt19[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_359), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[7] ( .Q(cnt19[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_359), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[6] ( .Q(cnt19[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_359), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[5] ( .Q(cnt19[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_359), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[4] ( .Q(cnt19[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_359), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[3] ( .Q(cnt19[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_359), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[2] ( .Q(cnt19[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_359), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[1] ( .Q(cnt19[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_359), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[0] ( .Q(cnt19[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_359), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497357 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i_0), .EN(un1_Ioli0_1_0_17), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 ARI1 precnt_s_4154 ( .FCO(precnt_s_4154_FCO), .S(precnt_s_4154_S), .Y(precnt_s_4154_Y), .B(cnt19[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4154.INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_19[1]), .B(cnt19[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4154_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_19[2]), .B(cnt19[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_19[3]), .B(cnt19[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_19[4]), .B(cnt19[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_19[5]), .B(cnt19[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_19[6]), .B(cnt19[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_19[7]), .B(cnt19[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_19[8]), .B(cnt19[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_19[9]), .B(cnt19[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_19[10]), .B(cnt19[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[11] ( .FCO(OO0o1[12]), .S(precnt_s[11]), .Y(precnt_cry_Y_19[11]), .B(cnt19[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:497254 CFG4 \precnt_lm_0[0] ( .A(cnt19[0]), .B(l0Io1_0), .C(precnt_lm_0_1_0_Z[0]), .D(l0lo1), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=16'hCC5C; // @28:497254 CFG3 \precnt_lm_0_1_0[0] ( .A(N_1123), .B(l1II1), .C(N_1121), .Y(precnt_lm_0_1_0_Z[0]) ); defparam \precnt_lm_0_1_0[0] .INIT=8'h7F; // @28:497164 CFG4 un1_Ioli0_1_0 ( .A(l0Io1_0), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .C(OO0o1[12]), .D(N_1131), .Y(un1_Ioli0_1_0_17) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:497254 CFG4 \precnt_lm_0[11] ( .A(l0lo1), .B(precnt_s[11]), .C(N_1135), .D(N_1121), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[10] ( .A(l0lo1), .B(precnt_s[10]), .C(N_1135), .D(N_1121), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[9] ( .A(l0lo1), .B(precnt_s[9]), .C(N_1135), .D(N_1121), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[8] ( .A(l0lo1), .B(precnt_s[8]), .C(N_1135), .D(N_1121), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[7] ( .A(l0lo1), .B(precnt_s[7]), .C(N_1135), .D(N_1121), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[6] ( .A(l0lo1), .B(precnt_s[6]), .C(N_1135), .D(N_1121), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[5] ( .A(l0lo1), .B(precnt_s[5]), .C(N_1135), .D(N_1121), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[4] ( .A(l0lo1), .B(precnt_s[4]), .C(N_1135), .D(N_1121), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[3] ( .A(l0lo1), .B(precnt_s[3]), .C(N_1135), .D(N_1121), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[2] ( .A(l0lo1), .B(precnt_s[2]), .C(N_1135), .D(N_1121), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[1] ( .A(l0lo1), .B(precnt_s[1]), .C(N_1135), .D(N_1121), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=16'h0444; // @28:497150 CFG4 un1_iOI01_1_i_0 ( .A(N_1121), .B(N_1135), .C(l0Io1_0), .D(l0lo1), .Y(N_359) ); defparam un1_iOI01_1_i_0.INIT=16'hFFF8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_SINC_1s_26s_7 */ module CTSE_PEMSTAT_SINC_1s_26s_8 ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, Ioli0_i_0, o0Io1_0, cnt20, N_1136, N_1131, N_1119, N_1130, l1II1, l0lo1, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; input Ioli0_i_0 ; output o0Io1_0 ; output [11:0] cnt20 ; input N_1136 ; input N_1131 ; input N_1119 ; input N_1130 ; input l1II1 ; input l0lo1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire Ioli0_i_0 ; wire o0Io1_0 ; wire N_1136 ; wire N_1131 ; wire N_1119 ; wire N_1130 ; wire l1II1 ; wire l0lo1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [11:0] precnt_lm; wire [10:1] precnt_cry_Z; wire [11:1] precnt_s; wire [11:1] precnt_cry_Y_18; wire [12:12] OO0o1; wire [0:0] precnt_lm_0_1_0_Z; wire VCC ; wire N_252 ; wire GND ; wire un1_Ioli0_1_0_18 ; wire precnt_s_4153_FCO ; wire precnt_s_4153_S ; wire precnt_s_4153_Y ; // @28:497254 SLE \precnt[11] ( .Q(cnt20[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_252), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[10] ( .Q(cnt20[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_252), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[9] ( .Q(cnt20[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_252), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[8] ( .Q(cnt20[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_252), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[7] ( .Q(cnt20[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_252), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[6] ( .Q(cnt20[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_252), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[5] ( .Q(cnt20[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_252), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[4] ( .Q(cnt20[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_252), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[3] ( .Q(cnt20[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_252), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[2] ( .Q(cnt20[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_252), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[1] ( .Q(cnt20[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_252), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[0] ( .Q(cnt20[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_252), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497357 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i_0), .EN(un1_Ioli0_1_0_18), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 ARI1 precnt_s_4153 ( .FCO(precnt_s_4153_FCO), .S(precnt_s_4153_S), .Y(precnt_s_4153_Y), .B(cnt20[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4153.INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_18[1]), .B(cnt20[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4153_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_18[2]), .B(cnt20[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_18[3]), .B(cnt20[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_18[4]), .B(cnt20[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_18[5]), .B(cnt20[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_18[6]), .B(cnt20[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_18[7]), .B(cnt20[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_18[8]), .B(cnt20[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_18[9]), .B(cnt20[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_18[10]), .B(cnt20[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[11] ( .FCO(OO0o1[12]), .S(precnt_s[11]), .Y(precnt_cry_Y_18[11]), .B(cnt20[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:497254 CFG4 \precnt_lm_0[0] ( .A(cnt20[0]), .B(l0Io1_0), .C(precnt_lm_0_1_0_Z[0]), .D(l0lo1), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=16'hCC5C; // @28:497254 CFG3 \precnt_lm_0_1_0[0] ( .A(l1II1), .B(N_1130), .C(N_1119), .Y(precnt_lm_0_1_0_Z[0]) ); defparam \precnt_lm_0_1_0[0] .INIT=8'h7F; // @28:497164 CFG4 un1_Ioli0_1_0 ( .A(l0Io1_0), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .C(OO0o1[12]), .D(N_1131), .Y(un1_Ioli0_1_0_18) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:497254 CFG4 \precnt_lm_0[11] ( .A(l0lo1), .B(precnt_s[11]), .C(N_1136), .D(N_1130), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[10] ( .A(l0lo1), .B(precnt_s[10]), .C(N_1136), .D(N_1130), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[9] ( .A(l0lo1), .B(precnt_s[9]), .C(N_1136), .D(N_1130), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[8] ( .A(l0lo1), .B(precnt_s[8]), .C(N_1136), .D(N_1130), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[7] ( .A(l0lo1), .B(precnt_s[7]), .C(N_1136), .D(N_1130), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[6] ( .A(l0lo1), .B(precnt_s[6]), .C(N_1136), .D(N_1130), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[5] ( .A(l0lo1), .B(precnt_s[5]), .C(N_1136), .D(N_1130), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[4] ( .A(l0lo1), .B(precnt_s[4]), .C(N_1136), .D(N_1130), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[3] ( .A(l0lo1), .B(precnt_s[3]), .C(N_1136), .D(N_1130), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[2] ( .A(l0lo1), .B(precnt_s[2]), .C(N_1136), .D(N_1130), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[1] ( .A(l0lo1), .B(precnt_s[1]), .C(N_1136), .D(N_1130), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=16'h0444; // @28:497150 CFG4 un1_iOI01_1_i_0 ( .A(N_1130), .B(N_1136), .C(l0Io1_0), .D(l0lo1), .Y(N_252) ); defparam un1_iOI01_1_i_0.INIT=16'hFFF8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_SINC_1s_26s_8 */ module CTSE_PEMSTAT_SINC_1s_26s_9 ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, Ioli0_i_0, o0Io1_0, cnt21, N_1136, N_1131, N_1119, N_1127, l1II1, l0lo1, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; input Ioli0_i_0 ; output o0Io1_0 ; output [11:0] cnt21 ; input N_1136 ; input N_1131 ; input N_1119 ; input N_1127 ; input l1II1 ; input l0lo1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire Ioli0_i_0 ; wire o0Io1_0 ; wire N_1136 ; wire N_1131 ; wire N_1119 ; wire N_1127 ; wire l1II1 ; wire l0lo1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [11:0] precnt_lm; wire [10:1] precnt_cry_Z; wire [11:1] precnt_s; wire [11:1] precnt_cry_Y_17; wire [12:12] OO0o1; wire [0:0] precnt_lm_0_1_0_Z; wire VCC ; wire N_255 ; wire GND ; wire un1_Ioli0_1_0_19 ; wire precnt_s_4152_FCO ; wire precnt_s_4152_S ; wire precnt_s_4152_Y ; // @28:497254 SLE \precnt[11] ( .Q(cnt21[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_255), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[10] ( .Q(cnt21[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_255), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[9] ( .Q(cnt21[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_255), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[8] ( .Q(cnt21[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_255), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[7] ( .Q(cnt21[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_255), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[6] ( .Q(cnt21[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_255), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[5] ( .Q(cnt21[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_255), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[4] ( .Q(cnt21[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_255), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[3] ( .Q(cnt21[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_255), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[2] ( .Q(cnt21[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_255), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[1] ( .Q(cnt21[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_255), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[0] ( .Q(cnt21[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_255), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497357 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i_0), .EN(un1_Ioli0_1_0_19), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 ARI1 precnt_s_4152 ( .FCO(precnt_s_4152_FCO), .S(precnt_s_4152_S), .Y(precnt_s_4152_Y), .B(cnt21[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4152.INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_17[1]), .B(cnt21[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4152_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_17[2]), .B(cnt21[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_17[3]), .B(cnt21[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_17[4]), .B(cnt21[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_17[5]), .B(cnt21[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_17[6]), .B(cnt21[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_17[7]), .B(cnt21[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_17[8]), .B(cnt21[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_17[9]), .B(cnt21[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_17[10]), .B(cnt21[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[11] ( .FCO(OO0o1[12]), .S(precnt_s[11]), .Y(precnt_cry_Y_17[11]), .B(cnt21[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:497254 CFG4 \precnt_lm_0[0] ( .A(cnt21[0]), .B(l0Io1_0), .C(precnt_lm_0_1_0_Z[0]), .D(l0lo1), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=16'hCC5C; // @28:497254 CFG3 \precnt_lm_0_1_0[0] ( .A(l1II1), .B(N_1127), .C(N_1119), .Y(precnt_lm_0_1_0_Z[0]) ); defparam \precnt_lm_0_1_0[0] .INIT=8'h7F; // @28:497164 CFG4 un1_Ioli0_1_0 ( .A(l0Io1_0), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .C(OO0o1[12]), .D(N_1131), .Y(un1_Ioli0_1_0_19) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:497254 CFG4 \precnt_lm_0[11] ( .A(l0lo1), .B(precnt_s[11]), .C(N_1136), .D(N_1127), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[10] ( .A(l0lo1), .B(precnt_s[10]), .C(N_1136), .D(N_1127), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[9] ( .A(l0lo1), .B(precnt_s[9]), .C(N_1136), .D(N_1127), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[8] ( .A(l0lo1), .B(precnt_s[8]), .C(N_1136), .D(N_1127), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[7] ( .A(l0lo1), .B(precnt_s[7]), .C(N_1136), .D(N_1127), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[6] ( .A(l0lo1), .B(precnt_s[6]), .C(N_1136), .D(N_1127), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[5] ( .A(l0lo1), .B(precnt_s[5]), .C(N_1136), .D(N_1127), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[4] ( .A(l0lo1), .B(precnt_s[4]), .C(N_1136), .D(N_1127), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[3] ( .A(l0lo1), .B(precnt_s[3]), .C(N_1136), .D(N_1127), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[2] ( .A(l0lo1), .B(precnt_s[2]), .C(N_1136), .D(N_1127), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[1] ( .A(l0lo1), .B(precnt_s[1]), .C(N_1136), .D(N_1127), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=16'h0444; // @28:497150 CFG4 un1_iOI01_1_i_0 ( .A(N_1127), .B(N_1136), .C(l0Io1_0), .D(l0lo1), .Y(N_255) ); defparam un1_iOI01_1_i_0.INIT=16'hFFF8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_SINC_1s_26s_9 */ module CTSE_PEMSTAT_SINC_1s_26s_10 ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, Ioli0_i_0, o0Io1_0, cnt22, N_1135, N_1131, N_1123, N_1130, l1II1, l0lo1, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; input Ioli0_i_0 ; output o0Io1_0 ; output [11:0] cnt22 ; input N_1135 ; input N_1131 ; input N_1123 ; input N_1130 ; input l1II1 ; input l0lo1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire Ioli0_i_0 ; wire o0Io1_0 ; wire N_1135 ; wire N_1131 ; wire N_1123 ; wire N_1130 ; wire l1II1 ; wire l0lo1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [11:0] precnt_lm; wire [10:1] precnt_cry_Z; wire [11:1] precnt_s; wire [11:1] precnt_cry_Y_16; wire [12:12] OO0o1; wire [0:0] precnt_lm_0_1_0_Z; wire VCC ; wire N_258 ; wire GND ; wire un1_Ioli0_1_0_20 ; wire precnt_s_4151_FCO ; wire precnt_s_4151_S ; wire precnt_s_4151_Y ; // @28:497254 SLE \precnt[11] ( .Q(cnt22[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_258), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[10] ( .Q(cnt22[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_258), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[9] ( .Q(cnt22[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_258), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[8] ( .Q(cnt22[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_258), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[7] ( .Q(cnt22[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_258), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[6] ( .Q(cnt22[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_258), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[5] ( .Q(cnt22[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_258), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[4] ( .Q(cnt22[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_258), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[3] ( .Q(cnt22[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_258), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[2] ( .Q(cnt22[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_258), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[1] ( .Q(cnt22[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_258), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[0] ( .Q(cnt22[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_258), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497357 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i_0), .EN(un1_Ioli0_1_0_20), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 ARI1 precnt_s_4151 ( .FCO(precnt_s_4151_FCO), .S(precnt_s_4151_S), .Y(precnt_s_4151_Y), .B(cnt22[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4151.INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_16[1]), .B(cnt22[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4151_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_16[2]), .B(cnt22[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_16[3]), .B(cnt22[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_16[4]), .B(cnt22[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_16[5]), .B(cnt22[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_16[6]), .B(cnt22[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_16[7]), .B(cnt22[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_16[8]), .B(cnt22[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_16[9]), .B(cnt22[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_16[10]), .B(cnt22[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[11] ( .FCO(OO0o1[12]), .S(precnt_s[11]), .Y(precnt_cry_Y_16[11]), .B(cnt22[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:497254 CFG4 \precnt_lm_0[0] ( .A(cnt22[0]), .B(l0Io1_0), .C(precnt_lm_0_1_0_Z[0]), .D(l0lo1), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=16'hCC5C; // @28:497254 CFG3 \precnt_lm_0_1_0[0] ( .A(l1II1), .B(N_1130), .C(N_1123), .Y(precnt_lm_0_1_0_Z[0]) ); defparam \precnt_lm_0_1_0[0] .INIT=8'h7F; // @28:497164 CFG4 un1_Ioli0_1_0 ( .A(l0Io1_0), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .C(OO0o1[12]), .D(N_1131), .Y(un1_Ioli0_1_0_20) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:497254 CFG4 \precnt_lm_0[11] ( .A(l0lo1), .B(precnt_s[11]), .C(N_1135), .D(N_1130), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[10] ( .A(l0lo1), .B(precnt_s[10]), .C(N_1135), .D(N_1130), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[9] ( .A(l0lo1), .B(precnt_s[9]), .C(N_1135), .D(N_1130), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[8] ( .A(l0lo1), .B(precnt_s[8]), .C(N_1135), .D(N_1130), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[7] ( .A(l0lo1), .B(precnt_s[7]), .C(N_1135), .D(N_1130), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[6] ( .A(l0lo1), .B(precnt_s[6]), .C(N_1135), .D(N_1130), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[5] ( .A(l0lo1), .B(precnt_s[5]), .C(N_1135), .D(N_1130), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[4] ( .A(l0lo1), .B(precnt_s[4]), .C(N_1135), .D(N_1130), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[3] ( .A(l0lo1), .B(precnt_s[3]), .C(N_1135), .D(N_1130), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[2] ( .A(l0lo1), .B(precnt_s[2]), .C(N_1135), .D(N_1130), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[1] ( .A(l0lo1), .B(precnt_s[1]), .C(N_1135), .D(N_1130), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=16'h0444; // @28:497150 CFG4 un1_iOI01_1_i_0 ( .A(N_1130), .B(N_1135), .C(l0Io1_0), .D(l0lo1), .Y(N_258) ); defparam un1_iOI01_1_i_0.INIT=16'hFFF8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_SINC_1s_26s_10 */ module CTSE_PEMSTAT_SINC_1s_26s_11 ( wrdata_0, l0Io1_0, Ioli0_i_0, o0Io1_0, cnt23, N_1135, N_1131, N_1123, N_1127, l1II1, l0lo1, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input wrdata_0 ; input l0Io1_0 ; input Ioli0_i_0 ; output o0Io1_0 ; output [11:0] cnt23 ; input N_1135 ; input N_1131 ; input N_1123 ; input N_1127 ; input l1II1 ; input l0lo1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire wrdata_0 ; wire l0Io1_0 ; wire Ioli0_i_0 ; wire o0Io1_0 ; wire N_1135 ; wire N_1131 ; wire N_1123 ; wire N_1127 ; wire l1II1 ; wire l0lo1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [11:0] precnt_lm; wire [10:1] precnt_cry_Z; wire [11:1] precnt_s; wire [11:1] precnt_cry_Y_15; wire [12:12] OO0o1; wire [0:0] precnt_lm_0_1_0_Z; wire VCC ; wire N_407 ; wire GND ; wire un1_Ioli0_1_0_21 ; wire precnt_s_4150_FCO ; wire precnt_s_4150_S ; wire precnt_s_4150_Y ; // @28:497254 SLE \precnt[11] ( .Q(cnt23[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_407), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[10] ( .Q(cnt23[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_407), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[9] ( .Q(cnt23[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_407), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[8] ( .Q(cnt23[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_407), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[7] ( .Q(cnt23[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_407), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[6] ( .Q(cnt23[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_407), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[5] ( .Q(cnt23[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_407), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[4] ( .Q(cnt23[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_407), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[3] ( .Q(cnt23[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_407), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[2] ( .Q(cnt23[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_407), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[1] ( .Q(cnt23[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_407), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[0] ( .Q(cnt23[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_407), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497357 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i_0), .EN(un1_Ioli0_1_0_21), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 ARI1 precnt_s_4150 ( .FCO(precnt_s_4150_FCO), .S(precnt_s_4150_S), .Y(precnt_s_4150_Y), .B(cnt23[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4150.INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_15[1]), .B(cnt23[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4150_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_15[2]), .B(cnt23[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_15[3]), .B(cnt23[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_15[4]), .B(cnt23[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_15[5]), .B(cnt23[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_15[6]), .B(cnt23[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_15[7]), .B(cnt23[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_15[8]), .B(cnt23[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_15[9]), .B(cnt23[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_15[10]), .B(cnt23[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[11] ( .FCO(OO0o1[12]), .S(precnt_s[11]), .Y(precnt_cry_Y_15[11]), .B(cnt23[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:497254 CFG4 \precnt_lm_0[0] ( .A(cnt23[0]), .B(l0Io1_0), .C(l0lo1), .D(precnt_lm_0_1_0_Z[0]), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=16'hC5CC; // @28:497254 CFG3 \precnt_lm_0_1_0[0] ( .A(l1II1), .B(N_1127), .C(N_1123), .Y(precnt_lm_0_1_0_Z[0]) ); defparam \precnt_lm_0_1_0[0] .INIT=8'h7F; // @28:497164 CFG4 un1_Ioli0_1_0 ( .A(OO0o1[12]), .B(N_1131), .C(l0Io1_0), .D(wrdata_0), .Y(un1_Ioli0_1_0_21) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:497254 CFG4 \precnt_lm_0[11] ( .A(l0lo1), .B(precnt_s[11]), .C(N_1135), .D(N_1127), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[10] ( .A(l0lo1), .B(precnt_s[10]), .C(N_1135), .D(N_1127), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[9] ( .A(l0lo1), .B(precnt_s[9]), .C(N_1135), .D(N_1127), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[8] ( .A(l0lo1), .B(precnt_s[8]), .C(N_1135), .D(N_1127), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[7] ( .A(l0lo1), .B(precnt_s[7]), .C(N_1135), .D(N_1127), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[6] ( .A(l0lo1), .B(precnt_s[6]), .C(N_1135), .D(N_1127), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[5] ( .A(l0lo1), .B(precnt_s[5]), .C(N_1135), .D(N_1127), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[4] ( .A(l0lo1), .B(precnt_s[4]), .C(N_1135), .D(N_1127), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[3] ( .A(l0lo1), .B(precnt_s[3]), .C(N_1135), .D(N_1127), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[2] ( .A(l0lo1), .B(precnt_s[2]), .C(N_1135), .D(N_1127), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[1] ( .A(l0lo1), .B(precnt_s[1]), .C(N_1135), .D(N_1127), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=16'h0444; // @28:497150 CFG4 un1_iOI01_1_i_0 ( .A(N_1127), .B(N_1135), .C(l0Io1_0), .D(l0lo1), .Y(N_407) ); defparam un1_iOI01_1_i_0.INIT=16'hFFF8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_SINC_1s_26s_11 */ module CTSE_PEMSTAT_LADD_1s_26s_0 ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, loli0_0, O0Io1, cnt24, o0Io1_1z_0, un36_Ioli0, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; input loli0_0 ; input [15:0] O0Io1 ; output [23:0] cnt24 ; output o0Io1_1z_0 ; input un36_Ioli0 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire loli0_0 ; wire o0Io1_1z_0 ; wire un36_Ioli0 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [26:26] Ioli0_i; wire [24:1] OO0o1; wire VCC ; wire un1_Ioli0_1_0_22 ; wire GND ; wire N_228_i ; wire un1_iOI01_1_i_Z ; wire N_226_i ; wire N_224_i ; wire N_216_i ; wire N_214_i ; wire N_212_i ; wire N_204_i ; wire N_202_i ; wire N_200_i ; wire N_192_i ; wire N_190_i ; wire N_188_i ; wire precnt_6_10_158_a2_Z ; wire precnt_6_9_164_a2_Z ; wire precnt_6_8_170_a2_Z ; wire precnt_6_7_176_a2_Z ; wire precnt_6_6_182_a2_Z ; wire precnt_6_5_188_a2_Z ; wire precnt_6_4_194_a2_Z ; wire precnt_6_3_200_a2_Z ; wire N_157_i ; wire N_240_i ; wire N_238_i ; wire N_236_i ; wire OO0o1_cry_0_Z ; wire OO0o1_cry_0_S_0 ; wire OO0o1_cry_0_Y_0 ; wire OO0o1_cry_1_Z ; wire OO0o1_cry_1_Y_0 ; wire OO0o1_cry_2_Z ; wire OO0o1_cry_2_Y_0 ; wire OO0o1_cry_3_Z ; wire OO0o1_cry_3_Y_0 ; wire OO0o1_cry_4_Z ; wire OO0o1_cry_4_Y_0 ; wire OO0o1_cry_5_Z ; wire OO0o1_cry_5_Y_0 ; wire OO0o1_cry_6_Z ; wire OO0o1_cry_6_Y_0 ; wire OO0o1_cry_7_Z ; wire OO0o1_cry_7_Y_0 ; wire OO0o1_cry_8_Z ; wire OO0o1_cry_8_Y_0 ; wire OO0o1_cry_9_Z ; wire OO0o1_cry_9_Y_0 ; wire OO0o1_cry_10_Z ; wire OO0o1_cry_10_Y_0 ; wire OO0o1_cry_11_Z ; wire OO0o1_cry_11_Y_0 ; wire OO0o1_cry_12_Z ; wire OO0o1_cry_12_Y ; wire OO0o1_cry_13_Z ; wire OO0o1_cry_13_Y ; wire OO0o1_cry_14_Z ; wire OO0o1_cry_14_Y ; wire OO0o1_cry_15_Z ; wire OO0o1_cry_15_Y ; wire OO0o1_cry_16_Z ; wire OO0o1_cry_16_Y ; wire OO0o1_cry_17_Z ; wire OO0o1_cry_17_Y ; wire OO0o1_cry_18_Z ; wire OO0o1_cry_18_Y ; wire OO0o1_cry_19_Z ; wire OO0o1_cry_19_Y ; wire OO0o1_cry_20_Z ; wire OO0o1_cry_20_Y ; wire OO0o1_cry_21_Z ; wire OO0o1_cry_21_Y ; wire OO0o1_cry_22_Z ; wire OO0o1_cry_22_Y ; wire OO0o1_cry_23_Y ; // @28:496089 SLE IilI1 ( .Q(o0Io1_1z_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i[26]), .EN(un1_Ioli0_1_0_22), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[11] ( .Q(cnt24[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_228_i), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[10] ( .Q(cnt24[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_226_i), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[9] ( .Q(cnt24[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_224_i), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[8] ( .Q(cnt24[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_216_i), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[7] ( .Q(cnt24[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_214_i), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[6] ( .Q(cnt24[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_212_i), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[5] ( .Q(cnt24[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_204_i), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[4] ( .Q(cnt24[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_202_i), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[3] ( .Q(cnt24[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_200_i), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[2] ( .Q(cnt24[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_192_i), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[1] ( .Q(cnt24[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_190_i), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[0] ( .Q(cnt24[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_188_i), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[23] ( .Q(cnt24[23]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_6_10_158_a2_Z), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[22] ( .Q(cnt24[22]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_6_9_164_a2_Z), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[21] ( .Q(cnt24[21]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_6_8_170_a2_Z), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[20] ( .Q(cnt24[20]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_6_7_176_a2_Z), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[19] ( .Q(cnt24[19]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_6_6_182_a2_Z), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[18] ( .Q(cnt24[18]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_6_5_188_a2_Z), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[17] ( .Q(cnt24[17]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_6_4_194_a2_Z), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[16] ( .Q(cnt24[16]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_6_3_200_a2_Z), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[15] ( .Q(cnt24[15]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_157_i), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[14] ( .Q(cnt24[14]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_240_i), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[13] ( .Q(cnt24[13]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_238_i), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495932 SLE \precnt[12] ( .Q(cnt24[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_236_i), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:495912 ARI1 OO0o1_cry_0 ( .FCO(OO0o1_cry_0_Z), .S(OO0o1_cry_0_S_0), .Y(OO0o1_cry_0_Y_0), .B(cnt24[0]), .C(GND), .D(GND), .A(O0Io1[0]), .FCI(GND) ); defparam OO0o1_cry_0.INIT=20'h555AA; // @28:495912 ARI1 OO0o1_cry_1 ( .FCO(OO0o1_cry_1_Z), .S(OO0o1[1]), .Y(OO0o1_cry_1_Y_0), .B(cnt24[1]), .C(GND), .D(GND), .A(O0Io1[1]), .FCI(OO0o1_cry_0_Z) ); defparam OO0o1_cry_1.INIT=20'h555AA; // @28:495912 ARI1 OO0o1_cry_2 ( .FCO(OO0o1_cry_2_Z), .S(OO0o1[2]), .Y(OO0o1_cry_2_Y_0), .B(cnt24[2]), .C(GND), .D(GND), .A(O0Io1[2]), .FCI(OO0o1_cry_1_Z) ); defparam OO0o1_cry_2.INIT=20'h555AA; // @28:495912 ARI1 OO0o1_cry_3 ( .FCO(OO0o1_cry_3_Z), .S(OO0o1[3]), .Y(OO0o1_cry_3_Y_0), .B(cnt24[3]), .C(GND), .D(GND), .A(O0Io1[3]), .FCI(OO0o1_cry_2_Z) ); defparam OO0o1_cry_3.INIT=20'h555AA; // @28:495912 ARI1 OO0o1_cry_4 ( .FCO(OO0o1_cry_4_Z), .S(OO0o1[4]), .Y(OO0o1_cry_4_Y_0), .B(cnt24[4]), .C(GND), .D(GND), .A(O0Io1[4]), .FCI(OO0o1_cry_3_Z) ); defparam OO0o1_cry_4.INIT=20'h555AA; // @28:495912 ARI1 OO0o1_cry_5 ( .FCO(OO0o1_cry_5_Z), .S(OO0o1[5]), .Y(OO0o1_cry_5_Y_0), .B(cnt24[5]), .C(GND), .D(GND), .A(O0Io1[5]), .FCI(OO0o1_cry_4_Z) ); defparam OO0o1_cry_5.INIT=20'h555AA; // @28:495912 ARI1 OO0o1_cry_6 ( .FCO(OO0o1_cry_6_Z), .S(OO0o1[6]), .Y(OO0o1_cry_6_Y_0), .B(cnt24[6]), .C(GND), .D(GND), .A(O0Io1[6]), .FCI(OO0o1_cry_5_Z) ); defparam OO0o1_cry_6.INIT=20'h555AA; // @28:495912 ARI1 OO0o1_cry_7 ( .FCO(OO0o1_cry_7_Z), .S(OO0o1[7]), .Y(OO0o1_cry_7_Y_0), .B(cnt24[7]), .C(GND), .D(GND), .A(O0Io1[7]), .FCI(OO0o1_cry_6_Z) ); defparam OO0o1_cry_7.INIT=20'h555AA; // @28:495912 ARI1 OO0o1_cry_8 ( .FCO(OO0o1_cry_8_Z), .S(OO0o1[8]), .Y(OO0o1_cry_8_Y_0), .B(cnt24[8]), .C(GND), .D(GND), .A(O0Io1[8]), .FCI(OO0o1_cry_7_Z) ); defparam OO0o1_cry_8.INIT=20'h555AA; // @28:495912 ARI1 OO0o1_cry_9 ( .FCO(OO0o1_cry_9_Z), .S(OO0o1[9]), .Y(OO0o1_cry_9_Y_0), .B(cnt24[9]), .C(GND), .D(GND), .A(O0Io1[9]), .FCI(OO0o1_cry_8_Z) ); defparam OO0o1_cry_9.INIT=20'h555AA; // @28:495912 ARI1 OO0o1_cry_10 ( .FCO(OO0o1_cry_10_Z), .S(OO0o1[10]), .Y(OO0o1_cry_10_Y_0), .B(cnt24[10]), .C(GND), .D(GND), .A(O0Io1[10]), .FCI(OO0o1_cry_9_Z) ); defparam OO0o1_cry_10.INIT=20'h555AA; // @28:495912 ARI1 OO0o1_cry_11 ( .FCO(OO0o1_cry_11_Z), .S(OO0o1[11]), .Y(OO0o1_cry_11_Y_0), .B(cnt24[11]), .C(GND), .D(GND), .A(O0Io1[11]), .FCI(OO0o1_cry_10_Z) ); defparam OO0o1_cry_11.INIT=20'h555AA; // @28:495912 ARI1 OO0o1_cry_12 ( .FCO(OO0o1_cry_12_Z), .S(OO0o1[12]), .Y(OO0o1_cry_12_Y), .B(cnt24[12]), .C(GND), .D(GND), .A(O0Io1[12]), .FCI(OO0o1_cry_11_Z) ); defparam OO0o1_cry_12.INIT=20'h555AA; // @28:495912 ARI1 OO0o1_cry_13 ( .FCO(OO0o1_cry_13_Z), .S(OO0o1[13]), .Y(OO0o1_cry_13_Y), .B(cnt24[13]), .C(GND), .D(GND), .A(O0Io1[13]), .FCI(OO0o1_cry_12_Z) ); defparam OO0o1_cry_13.INIT=20'h555AA; // @28:495912 ARI1 OO0o1_cry_14 ( .FCO(OO0o1_cry_14_Z), .S(OO0o1[14]), .Y(OO0o1_cry_14_Y), .B(cnt24[14]), .C(GND), .D(GND), .A(O0Io1[14]), .FCI(OO0o1_cry_13_Z) ); defparam OO0o1_cry_14.INIT=20'h555AA; // @28:495912 ARI1 OO0o1_cry_15 ( .FCO(OO0o1_cry_15_Z), .S(OO0o1[15]), .Y(OO0o1_cry_15_Y), .B(cnt24[15]), .C(GND), .D(GND), .A(O0Io1[15]), .FCI(OO0o1_cry_14_Z) ); defparam OO0o1_cry_15.INIT=20'h555AA; // @28:495912 ARI1 OO0o1_cry_16 ( .FCO(OO0o1_cry_16_Z), .S(OO0o1[16]), .Y(OO0o1_cry_16_Y), .B(cnt24[16]), .C(GND), .D(GND), .A(VCC), .FCI(OO0o1_cry_15_Z) ); defparam OO0o1_cry_16.INIT=20'h4AA00; // @28:495912 ARI1 OO0o1_cry_17 ( .FCO(OO0o1_cry_17_Z), .S(OO0o1[17]), .Y(OO0o1_cry_17_Y), .B(cnt24[17]), .C(GND), .D(GND), .A(VCC), .FCI(OO0o1_cry_16_Z) ); defparam OO0o1_cry_17.INIT=20'h4AA00; // @28:495912 ARI1 OO0o1_cry_18 ( .FCO(OO0o1_cry_18_Z), .S(OO0o1[18]), .Y(OO0o1_cry_18_Y), .B(cnt24[18]), .C(GND), .D(GND), .A(VCC), .FCI(OO0o1_cry_17_Z) ); defparam OO0o1_cry_18.INIT=20'h4AA00; // @28:495912 ARI1 OO0o1_cry_19 ( .FCO(OO0o1_cry_19_Z), .S(OO0o1[19]), .Y(OO0o1_cry_19_Y), .B(cnt24[19]), .C(GND), .D(GND), .A(VCC), .FCI(OO0o1_cry_18_Z) ); defparam OO0o1_cry_19.INIT=20'h4AA00; // @28:495912 ARI1 OO0o1_cry_20 ( .FCO(OO0o1_cry_20_Z), .S(OO0o1[20]), .Y(OO0o1_cry_20_Y), .B(cnt24[20]), .C(GND), .D(GND), .A(VCC), .FCI(OO0o1_cry_19_Z) ); defparam OO0o1_cry_20.INIT=20'h4AA00; // @28:495912 ARI1 OO0o1_cry_21 ( .FCO(OO0o1_cry_21_Z), .S(OO0o1[21]), .Y(OO0o1_cry_21_Y), .B(cnt24[21]), .C(GND), .D(GND), .A(VCC), .FCI(OO0o1_cry_20_Z) ); defparam OO0o1_cry_21.INIT=20'h4AA00; // @28:495912 ARI1 OO0o1_cry_22 ( .FCO(OO0o1_cry_22_Z), .S(OO0o1[22]), .Y(OO0o1_cry_22_Y), .B(cnt24[22]), .C(GND), .D(GND), .A(VCC), .FCI(OO0o1_cry_21_Z) ); defparam OO0o1_cry_22.INIT=20'h4AA00; // @28:495912 ARI1 OO0o1_cry_23 ( .FCO(OO0o1[24]), .S(OO0o1[23]), .Y(OO0o1_cry_23_Y), .B(cnt24[23]), .C(GND), .D(GND), .A(VCC), .FCI(OO0o1_cry_22_Z) ); defparam OO0o1_cry_23.INIT=20'h4AA00; // @28:495932 CFG2 precnt_6_10_158_a2 ( .A(loli0_0), .B(OO0o1[23]), .Y(precnt_6_10_158_a2_Z) ); defparam precnt_6_10_158_a2.INIT=4'h4; // @28:495932 CFG2 precnt_6_9_164_a2 ( .A(loli0_0), .B(OO0o1[22]), .Y(precnt_6_9_164_a2_Z) ); defparam precnt_6_9_164_a2.INIT=4'h4; // @28:495932 CFG2 precnt_6_8_170_a2 ( .A(loli0_0), .B(OO0o1[21]), .Y(precnt_6_8_170_a2_Z) ); defparam precnt_6_8_170_a2.INIT=4'h4; // @28:495932 CFG2 precnt_6_7_176_a2 ( .A(loli0_0), .B(OO0o1[20]), .Y(precnt_6_7_176_a2_Z) ); defparam precnt_6_7_176_a2.INIT=4'h4; // @28:495932 CFG2 precnt_6_6_182_a2 ( .A(loli0_0), .B(OO0o1[19]), .Y(precnt_6_6_182_a2_Z) ); defparam precnt_6_6_182_a2.INIT=4'h4; // @28:495932 CFG2 precnt_6_5_188_a2 ( .A(loli0_0), .B(OO0o1[18]), .Y(precnt_6_5_188_a2_Z) ); defparam precnt_6_5_188_a2.INIT=4'h4; // @28:495932 CFG2 precnt_6_4_194_a2 ( .A(loli0_0), .B(OO0o1[17]), .Y(precnt_6_4_194_a2_Z) ); defparam precnt_6_4_194_a2.INIT=4'h4; // @28:495932 CFG2 precnt_6_3_200_a2 ( .A(loli0_0), .B(OO0o1[16]), .Y(precnt_6_3_200_a2_Z) ); defparam precnt_6_3_200_a2.INIT=4'h4; // @28:495932 CFG2 un1_iOI01_1_i ( .A(loli0_0), .B(l0Io1_0), .Y(un1_iOI01_1_i_Z) ); defparam un1_iOI01_1_i.INIT=4'hE; // @28:495932 CFG4 \precnt_RNO[11] ( .A(l0Io1_0), .B(O0Io1[11]), .C(loli0_0), .D(OO0o1[11]), .Y(N_228_i) ); defparam \precnt_RNO[11] .INIT=16'h8A80; // @28:495932 CFG4 \precnt_RNO[10] ( .A(l0Io1_0), .B(O0Io1[10]), .C(loli0_0), .D(OO0o1[10]), .Y(N_226_i) ); defparam \precnt_RNO[10] .INIT=16'h8A80; // @28:495932 CFG4 \precnt_RNO[9] ( .A(l0Io1_0), .B(O0Io1[9]), .C(loli0_0), .D(OO0o1[9]), .Y(N_224_i) ); defparam \precnt_RNO[9] .INIT=16'h8A80; // @28:495932 CFG4 \precnt_RNO[8] ( .A(l0Io1_0), .B(O0Io1[8]), .C(loli0_0), .D(OO0o1[8]), .Y(N_216_i) ); defparam \precnt_RNO[8] .INIT=16'h8A80; // @28:495932 CFG4 \precnt_RNO[7] ( .A(l0Io1_0), .B(O0Io1[7]), .C(loli0_0), .D(OO0o1[7]), .Y(N_214_i) ); defparam \precnt_RNO[7] .INIT=16'h8A80; // @28:495932 CFG4 \precnt_RNO[6] ( .A(l0Io1_0), .B(O0Io1[6]), .C(loli0_0), .D(OO0o1[6]), .Y(N_212_i) ); defparam \precnt_RNO[6] .INIT=16'h8A80; // @28:495932 CFG4 \precnt_RNO[5] ( .A(l0Io1_0), .B(O0Io1[5]), .C(loli0_0), .D(OO0o1[5]), .Y(N_204_i) ); defparam \precnt_RNO[5] .INIT=16'h8A80; // @28:495932 CFG4 \precnt_RNO[4] ( .A(l0Io1_0), .B(O0Io1[4]), .C(loli0_0), .D(OO0o1[4]), .Y(N_202_i) ); defparam \precnt_RNO[4] .INIT=16'h8A80; // @28:495932 CFG4 \precnt_RNO[3] ( .A(l0Io1_0), .B(O0Io1[3]), .C(loli0_0), .D(OO0o1[3]), .Y(N_200_i) ); defparam \precnt_RNO[3] .INIT=16'h8A80; // @28:495932 CFG4 \precnt_RNO[2] ( .A(l0Io1_0), .B(O0Io1[2]), .C(loli0_0), .D(OO0o1[2]), .Y(N_192_i) ); defparam \precnt_RNO[2] .INIT=16'h8A80; // @28:495932 CFG4 \precnt_RNO[1] ( .A(l0Io1_0), .B(O0Io1[1]), .C(loli0_0), .D(OO0o1[1]), .Y(N_190_i) ); defparam \precnt_RNO[1] .INIT=16'h8A80; // @28:495932 CFG4 \precnt_RNO[15] ( .A(l0Io1_0), .B(O0Io1[15]), .C(loli0_0), .D(OO0o1[15]), .Y(N_157_i) ); defparam \precnt_RNO[15] .INIT=16'h8A80; // @28:495932 CFG4 \precnt_RNO[14] ( .A(l0Io1_0), .B(O0Io1[14]), .C(loli0_0), .D(OO0o1[14]), .Y(N_240_i) ); defparam \precnt_RNO[14] .INIT=16'h8A80; // @28:495932 CFG4 \precnt_RNO[13] ( .A(l0Io1_0), .B(O0Io1[13]), .C(loli0_0), .D(OO0o1[13]), .Y(N_238_i) ); defparam \precnt_RNO[13] .INIT=16'h8A80; // @28:495932 CFG4 \precnt_RNO[12] ( .A(l0Io1_0), .B(O0Io1[12]), .C(loli0_0), .D(OO0o1[12]), .Y(N_236_i) ); defparam \precnt_RNO[12] .INIT=16'h8A80; // @28:495932 CFG4 \precnt_RNO[0] ( .A(l0Io1_0), .B(O0Io1[0]), .C(loli0_0), .D(OO0o1_cry_0_Y_0), .Y(N_188_i) ); defparam \precnt_RNO[0] .INIT=16'h8A80; // @28:495823 CFG4 un1_Ioli0_1_0 ( .A(CoreAPB3_0_0_APBmslave0_PWDATA_0), .B(l0Io1_0), .C(un36_Ioli0), .D(OO0o1[24]), .Y(un1_Ioli0_1_0_22) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:496089 CFG2 IilI1_RNO ( .A(un36_Ioli0), .B(CoreAPB3_0_0_APBmslave0_PWDATA_0), .Y(Ioli0_i[26]) ); defparam IilI1_RNO.INIT=4'h7; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_LADD_1s_26s_0 */ module CTSE_PEMSTAT_LINC_1s_26s_9 ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, Ioli0_i_0, o0Io1_0, cnt25, N_1136, un36_Ioli0, N_1119, N_1126, l1II1, l0lo1, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; input Ioli0_i_0 ; output o0Io1_0 ; output [17:0] cnt25 ; input N_1136 ; input un36_Ioli0 ; input N_1119 ; input N_1126 ; input l1II1 ; input l0lo1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire Ioli0_i_0 ; wire o0Io1_0 ; wire N_1136 ; wire un36_Ioli0 ; wire N_1119 ; wire N_1126 ; wire l1II1 ; wire l0lo1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [17:0] precnt_lm; wire [16:1] precnt_cry_Z; wire [17:1] precnt_s; wire [11:1] precnt_cry_Y_14; wire [17:12] precnt_cry_Y_1; wire [18:18] OO0o1; wire [0:0] precnt_lm_0_1_0_Z; wire VCC ; wire N_362 ; wire GND ; wire un1_Ioli0_1_0_23 ; wire precnt_s_4149_FCO ; wire precnt_s_4149_S ; wire precnt_s_4149_Y ; // @28:496288 SLE \precnt[17] ( .Q(cnt25[17]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[17]), .EN(N_362), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[16] ( .Q(cnt25[16]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[16]), .EN(N_362), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[15] ( .Q(cnt25[15]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[15]), .EN(N_362), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[14] ( .Q(cnt25[14]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[14]), .EN(N_362), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[13] ( .Q(cnt25[13]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[13]), .EN(N_362), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[12] ( .Q(cnt25[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[12]), .EN(N_362), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[11] ( .Q(cnt25[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_362), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[10] ( .Q(cnt25[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_362), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[9] ( .Q(cnt25[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_362), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[8] ( .Q(cnt25[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_362), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[7] ( .Q(cnt25[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_362), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[6] ( .Q(cnt25[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_362), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[5] ( .Q(cnt25[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_362), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[4] ( .Q(cnt25[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_362), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[3] ( .Q(cnt25[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_362), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[2] ( .Q(cnt25[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_362), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[1] ( .Q(cnt25[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_362), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[0] ( .Q(cnt25[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_362), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496391 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i_0), .EN(un1_Ioli0_1_0_23), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 ARI1 precnt_s_4149 ( .FCO(precnt_s_4149_FCO), .S(precnt_s_4149_S), .Y(precnt_s_4149_Y), .B(cnt25[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4149.INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_14[1]), .B(cnt25[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4149_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_14[2]), .B(cnt25[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_14[3]), .B(cnt25[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_14[4]), .B(cnt25[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_14[5]), .B(cnt25[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_14[6]), .B(cnt25[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_14[7]), .B(cnt25[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_14[8]), .B(cnt25[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_14[9]), .B(cnt25[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_14[10]), .B(cnt25[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[11] ( .FCO(precnt_cry_Z[11]), .S(precnt_s[11]), .Y(precnt_cry_Y_14[11]), .B(cnt25[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[12] ( .FCO(precnt_cry_Z[12]), .S(precnt_s[12]), .Y(precnt_cry_Y_1[12]), .B(cnt25[12]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[11]) ); defparam \precnt_cry[12] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[13] ( .FCO(precnt_cry_Z[13]), .S(precnt_s[13]), .Y(precnt_cry_Y_1[13]), .B(cnt25[13]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[12]) ); defparam \precnt_cry[13] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[14] ( .FCO(precnt_cry_Z[14]), .S(precnt_s[14]), .Y(precnt_cry_Y_1[14]), .B(cnt25[14]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[13]) ); defparam \precnt_cry[14] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[15] ( .FCO(precnt_cry_Z[15]), .S(precnt_s[15]), .Y(precnt_cry_Y_1[15]), .B(cnt25[15]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[14]) ); defparam \precnt_cry[15] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[16] ( .FCO(precnt_cry_Z[16]), .S(precnt_s[16]), .Y(precnt_cry_Y_1[16]), .B(cnt25[16]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[15]) ); defparam \precnt_cry[16] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[17] ( .FCO(OO0o1[18]), .S(precnt_s[17]), .Y(precnt_cry_Y_1[17]), .B(cnt25[17]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[16]) ); defparam \precnt_cry[17] .INIT=20'h4AA00; // @28:496288 CFG4 \precnt_lm_0[0] ( .A(l0Io1_0), .B(cnt25[0]), .C(precnt_lm_0_1_0_Z[0]), .D(l0lo1), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=16'hAA3A; // @28:496288 CFG3 \precnt_lm_0_1_0[0] ( .A(l1II1), .B(N_1126), .C(N_1119), .Y(precnt_lm_0_1_0_Z[0]) ); defparam \precnt_lm_0_1_0[0] .INIT=8'h7F; // @28:496198 CFG4 un1_Ioli0_1_0 ( .A(CoreAPB3_0_0_APBmslave0_PWDATA_0), .B(l0Io1_0), .C(un36_Ioli0), .D(OO0o1[18]), .Y(un1_Ioli0_1_0_23) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:496288 CFG4 \precnt_lm_0[17] ( .A(l0lo1), .B(precnt_s[17]), .C(N_1136), .D(N_1126), .Y(precnt_lm[17]) ); defparam \precnt_lm_0[17] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[16] ( .A(l0lo1), .B(precnt_s[16]), .C(N_1136), .D(N_1126), .Y(precnt_lm[16]) ); defparam \precnt_lm_0[16] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[15] ( .A(l0lo1), .B(precnt_s[15]), .C(N_1136), .D(N_1126), .Y(precnt_lm[15]) ); defparam \precnt_lm_0[15] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[14] ( .A(l0lo1), .B(precnt_s[14]), .C(N_1136), .D(N_1126), .Y(precnt_lm[14]) ); defparam \precnt_lm_0[14] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[13] ( .A(l0lo1), .B(precnt_s[13]), .C(N_1136), .D(N_1126), .Y(precnt_lm[13]) ); defparam \precnt_lm_0[13] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[12] ( .A(l0lo1), .B(precnt_s[12]), .C(N_1136), .D(N_1126), .Y(precnt_lm[12]) ); defparam \precnt_lm_0[12] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[11] ( .A(l0lo1), .B(precnt_s[11]), .C(N_1136), .D(N_1126), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[10] ( .A(l0lo1), .B(precnt_s[10]), .C(N_1136), .D(N_1126), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[9] ( .A(l0lo1), .B(precnt_s[9]), .C(N_1136), .D(N_1126), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[8] ( .A(l0lo1), .B(precnt_s[8]), .C(N_1136), .D(N_1126), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[7] ( .A(l0lo1), .B(precnt_s[7]), .C(N_1136), .D(N_1126), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[6] ( .A(l0lo1), .B(precnt_s[6]), .C(N_1136), .D(N_1126), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[5] ( .A(l0lo1), .B(precnt_s[5]), .C(N_1136), .D(N_1126), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[4] ( .A(l0lo1), .B(precnt_s[4]), .C(N_1136), .D(N_1126), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[3] ( .A(l0lo1), .B(precnt_s[3]), .C(N_1136), .D(N_1126), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[2] ( .A(l0lo1), .B(precnt_s[2]), .C(N_1136), .D(N_1126), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[1] ( .A(l0lo1), .B(precnt_s[1]), .C(N_1136), .D(N_1126), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=16'h0444; // @28:496184 CFG4 un1_iOI01_1_i_0 ( .A(l0lo1), .B(l0Io1_0), .C(N_1136), .D(N_1126), .Y(N_362) ); defparam un1_iOI01_1_i_0.INIT=16'hFEEE; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_LINC_1s_26s_9 */ module CTSE_PEMSTAT_LINC_1s_26s_10 ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, Ioli0_i_0, o0Io1_0, cnt26, N_1135, un36_Ioli0, N_1120, l1II1, N_1123, l0lo1, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; input Ioli0_i_0 ; output o0Io1_0 ; output [17:0] cnt26 ; input N_1135 ; input un36_Ioli0 ; input N_1120 ; input l1II1 ; input N_1123 ; input l0lo1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire Ioli0_i_0 ; wire o0Io1_0 ; wire N_1135 ; wire un36_Ioli0 ; wire N_1120 ; wire l1II1 ; wire N_1123 ; wire l0lo1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [17:0] precnt_lm; wire [16:1] precnt_cry_Z; wire [17:1] precnt_s; wire [11:1] precnt_cry_Y_13; wire [17:12] precnt_cry_Y_0; wire [18:18] OO0o1; wire [0:0] precnt_lm_0_1_0_Z; wire VCC ; wire N_365 ; wire GND ; wire un1_Ioli0_1_0_24 ; wire precnt_s_4148_FCO ; wire precnt_s_4148_S ; wire precnt_s_4148_Y ; // @28:496288 SLE \precnt[17] ( .Q(cnt26[17]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[17]), .EN(N_365), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[16] ( .Q(cnt26[16]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[16]), .EN(N_365), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[15] ( .Q(cnt26[15]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[15]), .EN(N_365), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[14] ( .Q(cnt26[14]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[14]), .EN(N_365), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[13] ( .Q(cnt26[13]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[13]), .EN(N_365), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[12] ( .Q(cnt26[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[12]), .EN(N_365), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[11] ( .Q(cnt26[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_365), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[10] ( .Q(cnt26[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_365), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[9] ( .Q(cnt26[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_365), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[8] ( .Q(cnt26[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_365), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[7] ( .Q(cnt26[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_365), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[6] ( .Q(cnt26[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_365), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[5] ( .Q(cnt26[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_365), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[4] ( .Q(cnt26[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_365), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[3] ( .Q(cnt26[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_365), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[2] ( .Q(cnt26[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_365), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[1] ( .Q(cnt26[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_365), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[0] ( .Q(cnt26[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_365), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496391 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i_0), .EN(un1_Ioli0_1_0_24), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 ARI1 precnt_s_4148 ( .FCO(precnt_s_4148_FCO), .S(precnt_s_4148_S), .Y(precnt_s_4148_Y), .B(cnt26[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4148.INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_13[1]), .B(cnt26[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4148_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_13[2]), .B(cnt26[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_13[3]), .B(cnt26[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_13[4]), .B(cnt26[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_13[5]), .B(cnt26[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_13[6]), .B(cnt26[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_13[7]), .B(cnt26[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_13[8]), .B(cnt26[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_13[9]), .B(cnt26[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_13[10]), .B(cnt26[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[11] ( .FCO(precnt_cry_Z[11]), .S(precnt_s[11]), .Y(precnt_cry_Y_13[11]), .B(cnt26[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[12] ( .FCO(precnt_cry_Z[12]), .S(precnt_s[12]), .Y(precnt_cry_Y_0[12]), .B(cnt26[12]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[11]) ); defparam \precnt_cry[12] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[13] ( .FCO(precnt_cry_Z[13]), .S(precnt_s[13]), .Y(precnt_cry_Y_0[13]), .B(cnt26[13]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[12]) ); defparam \precnt_cry[13] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[14] ( .FCO(precnt_cry_Z[14]), .S(precnt_s[14]), .Y(precnt_cry_Y_0[14]), .B(cnt26[14]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[13]) ); defparam \precnt_cry[14] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[15] ( .FCO(precnt_cry_Z[15]), .S(precnt_s[15]), .Y(precnt_cry_Y_0[15]), .B(cnt26[15]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[14]) ); defparam \precnt_cry[15] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[16] ( .FCO(precnt_cry_Z[16]), .S(precnt_s[16]), .Y(precnt_cry_Y_0[16]), .B(cnt26[16]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[15]) ); defparam \precnt_cry[16] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[17] ( .FCO(OO0o1[18]), .S(precnt_s[17]), .Y(precnt_cry_Y_0[17]), .B(cnt26[17]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[16]) ); defparam \precnt_cry[17] .INIT=20'h4AA00; // @28:496288 CFG4 \precnt_lm_0[0] ( .A(cnt26[0]), .B(l0Io1_0), .C(precnt_lm_0_1_0_Z[0]), .D(l0lo1), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=16'hCC5C; // @28:496288 CFG3 \precnt_lm_0_1_0[0] ( .A(N_1123), .B(l1II1), .C(N_1120), .Y(precnt_lm_0_1_0_Z[0]) ); defparam \precnt_lm_0_1_0[0] .INIT=8'h7F; // @28:496198 CFG4 un1_Ioli0_1_0 ( .A(CoreAPB3_0_0_APBmslave0_PWDATA_0), .B(l0Io1_0), .C(un36_Ioli0), .D(OO0o1[18]), .Y(un1_Ioli0_1_0_24) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:496288 CFG4 \precnt_lm_0[17] ( .A(l0lo1), .B(precnt_s[17]), .C(N_1135), .D(N_1120), .Y(precnt_lm[17]) ); defparam \precnt_lm_0[17] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[16] ( .A(l0lo1), .B(precnt_s[16]), .C(N_1135), .D(N_1120), .Y(precnt_lm[16]) ); defparam \precnt_lm_0[16] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[15] ( .A(l0lo1), .B(precnt_s[15]), .C(N_1135), .D(N_1120), .Y(precnt_lm[15]) ); defparam \precnt_lm_0[15] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[14] ( .A(l0lo1), .B(precnt_s[14]), .C(N_1135), .D(N_1120), .Y(precnt_lm[14]) ); defparam \precnt_lm_0[14] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[13] ( .A(l0lo1), .B(precnt_s[13]), .C(N_1135), .D(N_1120), .Y(precnt_lm[13]) ); defparam \precnt_lm_0[13] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[12] ( .A(l0lo1), .B(precnt_s[12]), .C(N_1135), .D(N_1120), .Y(precnt_lm[12]) ); defparam \precnt_lm_0[12] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[11] ( .A(l0lo1), .B(precnt_s[11]), .C(N_1135), .D(N_1120), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[10] ( .A(l0lo1), .B(precnt_s[10]), .C(N_1135), .D(N_1120), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[9] ( .A(l0lo1), .B(precnt_s[9]), .C(N_1135), .D(N_1120), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[8] ( .A(l0lo1), .B(precnt_s[8]), .C(N_1135), .D(N_1120), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[7] ( .A(l0lo1), .B(precnt_s[7]), .C(N_1135), .D(N_1120), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[6] ( .A(l0lo1), .B(precnt_s[6]), .C(N_1135), .D(N_1120), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[5] ( .A(l0lo1), .B(precnt_s[5]), .C(N_1135), .D(N_1120), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[4] ( .A(l0lo1), .B(precnt_s[4]), .C(N_1135), .D(N_1120), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[3] ( .A(l0lo1), .B(precnt_s[3]), .C(N_1135), .D(N_1120), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[2] ( .A(l0lo1), .B(precnt_s[2]), .C(N_1135), .D(N_1120), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[1] ( .A(l0lo1), .B(precnt_s[1]), .C(N_1135), .D(N_1120), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=16'h0444; // @28:496184 CFG4 un1_iOI01_1_i_0 ( .A(N_1120), .B(N_1135), .C(l0Io1_0), .D(l0lo1), .Y(N_365) ); defparam un1_iOI01_1_i_0.INIT=16'hFFF8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_LINC_1s_26s_10 */ module CTSE_PEMSTAT_LINC_1s_26s_11 ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, Ioli0_i_0, o0Io1_0, cnt27, N_1135, un36_Ioli0, N_1123, N_1126, l1II1, l0lo1, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; input Ioli0_i_0 ; output o0Io1_0 ; output [17:0] cnt27 ; input N_1135 ; input un36_Ioli0 ; input N_1123 ; input N_1126 ; input l1II1 ; input l0lo1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire Ioli0_i_0 ; wire o0Io1_0 ; wire N_1135 ; wire un36_Ioli0 ; wire N_1123 ; wire N_1126 ; wire l1II1 ; wire l0lo1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [17:0] precnt_lm; wire [16:1] precnt_cry_Z; wire [17:1] precnt_s; wire [11:1] precnt_cry_Y_12; wire [17:12] precnt_cry_Y; wire [18:18] OO0o1; wire [0:0] precnt_lm_0_1_0_Z; wire VCC ; wire N_368 ; wire GND ; wire un1_Ioli0_1_0_25 ; wire precnt_s_4147_FCO ; wire precnt_s_4147_S ; wire precnt_s_4147_Y ; // @28:496288 SLE \precnt[17] ( .Q(cnt27[17]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[17]), .EN(N_368), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[16] ( .Q(cnt27[16]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[16]), .EN(N_368), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[15] ( .Q(cnt27[15]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[15]), .EN(N_368), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[14] ( .Q(cnt27[14]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[14]), .EN(N_368), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[13] ( .Q(cnt27[13]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[13]), .EN(N_368), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[12] ( .Q(cnt27[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[12]), .EN(N_368), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[11] ( .Q(cnt27[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_368), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[10] ( .Q(cnt27[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_368), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[9] ( .Q(cnt27[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_368), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[8] ( .Q(cnt27[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_368), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[7] ( .Q(cnt27[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_368), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[6] ( .Q(cnt27[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_368), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[5] ( .Q(cnt27[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_368), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[4] ( .Q(cnt27[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_368), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[3] ( .Q(cnt27[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_368), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[2] ( .Q(cnt27[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_368), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[1] ( .Q(cnt27[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_368), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 SLE \precnt[0] ( .Q(cnt27[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_368), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496391 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i_0), .EN(un1_Ioli0_1_0_25), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496288 ARI1 precnt_s_4147 ( .FCO(precnt_s_4147_FCO), .S(precnt_s_4147_S), .Y(precnt_s_4147_Y), .B(cnt27[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4147.INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_12[1]), .B(cnt27[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4147_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_12[2]), .B(cnt27[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_12[3]), .B(cnt27[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_12[4]), .B(cnt27[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_12[5]), .B(cnt27[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_12[6]), .B(cnt27[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_12[7]), .B(cnt27[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_12[8]), .B(cnt27[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_12[9]), .B(cnt27[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_12[10]), .B(cnt27[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[11] ( .FCO(precnt_cry_Z[11]), .S(precnt_s[11]), .Y(precnt_cry_Y_12[11]), .B(cnt27[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[12] ( .FCO(precnt_cry_Z[12]), .S(precnt_s[12]), .Y(precnt_cry_Y[12]), .B(cnt27[12]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[11]) ); defparam \precnt_cry[12] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[13] ( .FCO(precnt_cry_Z[13]), .S(precnt_s[13]), .Y(precnt_cry_Y[13]), .B(cnt27[13]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[12]) ); defparam \precnt_cry[13] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[14] ( .FCO(precnt_cry_Z[14]), .S(precnt_s[14]), .Y(precnt_cry_Y[14]), .B(cnt27[14]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[13]) ); defparam \precnt_cry[14] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[15] ( .FCO(precnt_cry_Z[15]), .S(precnt_s[15]), .Y(precnt_cry_Y[15]), .B(cnt27[15]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[14]) ); defparam \precnt_cry[15] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[16] ( .FCO(precnt_cry_Z[16]), .S(precnt_s[16]), .Y(precnt_cry_Y[16]), .B(cnt27[16]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[15]) ); defparam \precnt_cry[16] .INIT=20'h4AA00; // @28:496288 ARI1 \precnt_cry[17] ( .FCO(OO0o1[18]), .S(precnt_s[17]), .Y(precnt_cry_Y[17]), .B(cnt27[17]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[16]) ); defparam \precnt_cry[17] .INIT=20'h4AA00; // @28:496288 CFG4 \precnt_lm_0[0] ( .A(cnt27[0]), .B(l0Io1_0), .C(precnt_lm_0_1_0_Z[0]), .D(l0lo1), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=16'hCC5C; // @28:496288 CFG3 \precnt_lm_0_1_0[0] ( .A(l1II1), .B(N_1126), .C(N_1123), .Y(precnt_lm_0_1_0_Z[0]) ); defparam \precnt_lm_0_1_0[0] .INIT=8'h7F; // @28:496198 CFG4 un1_Ioli0_1_0 ( .A(CoreAPB3_0_0_APBmslave0_PWDATA_0), .B(l0Io1_0), .C(un36_Ioli0), .D(OO0o1[18]), .Y(un1_Ioli0_1_0_25) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:496288 CFG4 \precnt_lm_0[17] ( .A(l0lo1), .B(precnt_s[17]), .C(N_1135), .D(N_1126), .Y(precnt_lm[17]) ); defparam \precnt_lm_0[17] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[16] ( .A(l0lo1), .B(precnt_s[16]), .C(N_1135), .D(N_1126), .Y(precnt_lm[16]) ); defparam \precnt_lm_0[16] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[15] ( .A(l0lo1), .B(precnt_s[15]), .C(N_1135), .D(N_1126), .Y(precnt_lm[15]) ); defparam \precnt_lm_0[15] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[14] ( .A(l0lo1), .B(precnt_s[14]), .C(N_1135), .D(N_1126), .Y(precnt_lm[14]) ); defparam \precnt_lm_0[14] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[13] ( .A(l0lo1), .B(precnt_s[13]), .C(N_1135), .D(N_1126), .Y(precnt_lm[13]) ); defparam \precnt_lm_0[13] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[12] ( .A(l0lo1), .B(precnt_s[12]), .C(N_1135), .D(N_1126), .Y(precnt_lm[12]) ); defparam \precnt_lm_0[12] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[11] ( .A(l0lo1), .B(precnt_s[11]), .C(N_1135), .D(N_1126), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[10] ( .A(l0lo1), .B(precnt_s[10]), .C(N_1135), .D(N_1126), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[9] ( .A(l0lo1), .B(precnt_s[9]), .C(N_1135), .D(N_1126), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[8] ( .A(l0lo1), .B(precnt_s[8]), .C(N_1135), .D(N_1126), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[7] ( .A(l0lo1), .B(precnt_s[7]), .C(N_1135), .D(N_1126), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[6] ( .A(l0lo1), .B(precnt_s[6]), .C(N_1135), .D(N_1126), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[5] ( .A(l0lo1), .B(precnt_s[5]), .C(N_1135), .D(N_1126), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[4] ( .A(l0lo1), .B(precnt_s[4]), .C(N_1135), .D(N_1126), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[3] ( .A(l0lo1), .B(precnt_s[3]), .C(N_1135), .D(N_1126), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[2] ( .A(l0lo1), .B(precnt_s[2]), .C(N_1135), .D(N_1126), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=16'h0444; // @28:496288 CFG4 \precnt_lm_0[1] ( .A(l0lo1), .B(precnt_s[1]), .C(N_1135), .D(N_1126), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=16'h0444; // @28:496184 CFG4 un1_iOI01_1_i_0 ( .A(N_1126), .B(N_1135), .C(l0Io1_0), .D(l0lo1), .Y(N_368) ); defparam un1_iOI01_1_i_0.INIT=16'hFFF8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_LINC_1s_26s_11 */ module CTSE_PEMSTAT_SINC_1s_26s_12 ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, Ioli0_i_0, o0Io1_0, cnt28, N_1136, un36_Ioli0, N_1114, l1II1, N_1119, l0lo1, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; input Ioli0_i_0 ; output o0Io1_0 ; output [11:0] cnt28 ; input N_1136 ; input un36_Ioli0 ; input N_1114 ; input l1II1 ; input N_1119 ; input l0lo1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire Ioli0_i_0 ; wire o0Io1_0 ; wire N_1136 ; wire un36_Ioli0 ; wire N_1114 ; wire l1II1 ; wire N_1119 ; wire l0lo1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [11:0] precnt_lm; wire [10:1] precnt_cry_Z; wire [11:1] precnt_s; wire [11:1] precnt_cry_Y_11; wire [12:12] OO0o1; wire [0:0] precnt_lm_0_1_0_Z; wire VCC ; wire N_371 ; wire GND ; wire un1_Ioli0_1_0_26 ; wire precnt_s_4146_FCO ; wire precnt_s_4146_S ; wire precnt_s_4146_Y ; // @28:497254 SLE \precnt[11] ( .Q(cnt28[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_371), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[10] ( .Q(cnt28[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_371), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[9] ( .Q(cnt28[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_371), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[8] ( .Q(cnt28[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_371), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[7] ( .Q(cnt28[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_371), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[6] ( .Q(cnt28[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_371), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[5] ( .Q(cnt28[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_371), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[4] ( .Q(cnt28[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_371), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[3] ( .Q(cnt28[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_371), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[2] ( .Q(cnt28[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_371), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[1] ( .Q(cnt28[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_371), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 SLE \precnt[0] ( .Q(cnt28[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_371), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497357 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i_0), .EN(un1_Ioli0_1_0_26), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497254 ARI1 precnt_s_4146 ( .FCO(precnt_s_4146_FCO), .S(precnt_s_4146_S), .Y(precnt_s_4146_Y), .B(cnt28[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4146.INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_11[1]), .B(cnt28[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4146_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_11[2]), .B(cnt28[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_11[3]), .B(cnt28[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_11[4]), .B(cnt28[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_11[5]), .B(cnt28[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_11[6]), .B(cnt28[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_11[7]), .B(cnt28[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_11[8]), .B(cnt28[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_11[9]), .B(cnt28[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_11[10]), .B(cnt28[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:497254 ARI1 \precnt_cry[11] ( .FCO(OO0o1[12]), .S(precnt_s[11]), .Y(precnt_cry_Y_11[11]), .B(cnt28[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:497254 CFG4 \precnt_lm_0[0] ( .A(cnt28[0]), .B(l0Io1_0), .C(l0lo1), .D(precnt_lm_0_1_0_Z[0]), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=16'hC5CC; // @28:497254 CFG3 \precnt_lm_0_1_0[0] ( .A(N_1119), .B(l1II1), .C(N_1114), .Y(precnt_lm_0_1_0_Z[0]) ); defparam \precnt_lm_0_1_0[0] .INIT=8'h7F; // @28:497164 CFG4 un1_Ioli0_1_0 ( .A(CoreAPB3_0_0_APBmslave0_PWDATA_0), .B(l0Io1_0), .C(un36_Ioli0), .D(OO0o1[12]), .Y(un1_Ioli0_1_0_26) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:497254 CFG4 \precnt_lm_0[11] ( .A(l0lo1), .B(precnt_s[11]), .C(N_1136), .D(N_1114), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[10] ( .A(l0lo1), .B(precnt_s[10]), .C(N_1136), .D(N_1114), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[9] ( .A(l0lo1), .B(precnt_s[9]), .C(N_1136), .D(N_1114), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[8] ( .A(l0lo1), .B(precnt_s[8]), .C(N_1136), .D(N_1114), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[7] ( .A(l0lo1), .B(precnt_s[7]), .C(N_1136), .D(N_1114), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[6] ( .A(l0lo1), .B(precnt_s[6]), .C(N_1136), .D(N_1114), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[5] ( .A(l0lo1), .B(precnt_s[5]), .C(N_1136), .D(N_1114), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[4] ( .A(l0lo1), .B(precnt_s[4]), .C(N_1136), .D(N_1114), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[3] ( .A(l0lo1), .B(precnt_s[3]), .C(N_1136), .D(N_1114), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[2] ( .A(l0lo1), .B(precnt_s[2]), .C(N_1136), .D(N_1114), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=16'h0444; // @28:497254 CFG4 \precnt_lm_0[1] ( .A(l0lo1), .B(precnt_s[1]), .C(N_1136), .D(N_1114), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=16'h0444; // @28:497150 CFG4 un1_iOI01_1_i_0 ( .A(N_1114), .B(N_1136), .C(l0Io1_0), .D(l0lo1), .Y(N_371) ); defparam un1_iOI01_1_i_0.INIT=16'hFFF8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_SINC_1s_26s_12 */ module CTSE_PEMSTAT_SINCHD_1s_26s ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, Ioli0_i_0, o0Io1_0, cnt29, N_1136, un36_Ioli0, N_1117, l1II1, N_1119, l0lo1, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; input Ioli0_i_0 ; output o0Io1_0 ; output [11:0] cnt29 ; input N_1136 ; input un36_Ioli0 ; input N_1117 ; input l1II1 ; input N_1119 ; input l0lo1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire Ioli0_i_0 ; wire o0Io1_0 ; wire N_1136 ; wire un36_Ioli0 ; wire N_1117 ; wire l1II1 ; wire N_1119 ; wire l0lo1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [11:0] precnt_lm; wire [10:1] precnt_cry_Z; wire [11:1] precnt_s; wire [11:1] precnt_cry_Y_10; wire [12:12] OO0o1; wire [0:0] precnt_lm_0_1_0_Z; wire VCC ; wire N_374 ; wire GND ; wire un1_Ioli0_1_0_27 ; wire precnt_s_4145_FCO ; wire precnt_s_4145_S ; wire precnt_s_4145_Y ; // @28:497556 SLE \precnt[11] ( .Q(cnt29[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_374), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[10] ( .Q(cnt29[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_374), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[9] ( .Q(cnt29[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_374), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[8] ( .Q(cnt29[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_374), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[7] ( .Q(cnt29[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_374), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[6] ( .Q(cnt29[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_374), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[5] ( .Q(cnt29[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_374), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[4] ( .Q(cnt29[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_374), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[3] ( .Q(cnt29[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_374), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[2] ( .Q(cnt29[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_374), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[1] ( .Q(cnt29[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_374), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[0] ( .Q(cnt29[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_374), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497659 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i_0), .EN(un1_Ioli0_1_0_27), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 ARI1 precnt_s_4145 ( .FCO(precnt_s_4145_FCO), .S(precnt_s_4145_S), .Y(precnt_s_4145_Y), .B(cnt29[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4145.INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_10[1]), .B(cnt29[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4145_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_10[2]), .B(cnt29[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_10[3]), .B(cnt29[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_10[4]), .B(cnt29[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_10[5]), .B(cnt29[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_10[6]), .B(cnt29[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_10[7]), .B(cnt29[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_10[8]), .B(cnt29[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_10[9]), .B(cnt29[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_10[10]), .B(cnt29[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[11] ( .FCO(OO0o1[12]), .S(precnt_s[11]), .Y(precnt_cry_Y_10[11]), .B(cnt29[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:497556 CFG4 \precnt_lm_0[0] ( .A(cnt29[0]), .B(l0Io1_0), .C(precnt_lm_0_1_0_Z[0]), .D(l0lo1), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=16'hCC5C; // @28:497556 CFG3 \precnt_lm_0_1_0[0] ( .A(N_1119), .B(l1II1), .C(N_1117), .Y(precnt_lm_0_1_0_Z[0]) ); defparam \precnt_lm_0_1_0[0] .INIT=8'h7F; // @28:497466 CFG4 un1_Ioli0_1_0 ( .A(CoreAPB3_0_0_APBmslave0_PWDATA_0), .B(l0Io1_0), .C(un36_Ioli0), .D(OO0o1[12]), .Y(un1_Ioli0_1_0_27) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:497556 CFG4 \precnt_lm_0[11] ( .A(l0lo1), .B(precnt_s[11]), .C(N_1136), .D(N_1117), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=16'h0444; // @28:497556 CFG4 \precnt_lm_0[10] ( .A(l0lo1), .B(precnt_s[10]), .C(N_1136), .D(N_1117), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=16'h0444; // @28:497556 CFG4 \precnt_lm_0[9] ( .A(l0lo1), .B(precnt_s[9]), .C(N_1136), .D(N_1117), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=16'h0444; // @28:497556 CFG4 \precnt_lm_0[8] ( .A(l0lo1), .B(precnt_s[8]), .C(N_1136), .D(N_1117), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=16'h0444; // @28:497556 CFG4 \precnt_lm_0[7] ( .A(l0lo1), .B(precnt_s[7]), .C(N_1136), .D(N_1117), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=16'h0444; // @28:497556 CFG4 \precnt_lm_0[6] ( .A(l0lo1), .B(precnt_s[6]), .C(N_1136), .D(N_1117), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=16'h0444; // @28:497556 CFG4 \precnt_lm_0[5] ( .A(l0lo1), .B(precnt_s[5]), .C(N_1136), .D(N_1117), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=16'h0444; // @28:497556 CFG4 \precnt_lm_0[4] ( .A(l0lo1), .B(precnt_s[4]), .C(N_1136), .D(N_1117), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=16'h0444; // @28:497556 CFG4 \precnt_lm_0[3] ( .A(l0lo1), .B(precnt_s[3]), .C(N_1136), .D(N_1117), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=16'h0444; // @28:497556 CFG4 \precnt_lm_0[2] ( .A(l0lo1), .B(precnt_s[2]), .C(N_1136), .D(N_1117), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=16'h0444; // @28:497556 CFG4 \precnt_lm_0[1] ( .A(l0lo1), .B(precnt_s[1]), .C(N_1136), .D(N_1117), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=16'h0444; // @28:497452 CFG4 un1_iOI01_1_i_0 ( .A(N_1117), .B(N_1136), .C(l0Io1_0), .D(l0lo1), .Y(N_374) ); defparam un1_iOI01_1_i_0.INIT=16'hFFF8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_SINCHD_1s_26s */ module CTSE_PEMSTAT_SINCHD_1s_26s_0 ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, Ioli0_i_0, o0Io1_0, cnt30, N_1135, un36_Ioli0, N_1114, l1II1, N_1123, l0lo1, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; input Ioli0_i_0 ; output o0Io1_0 ; output [11:0] cnt30 ; input N_1135 ; input un36_Ioli0 ; input N_1114 ; input l1II1 ; input N_1123 ; input l0lo1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire Ioli0_i_0 ; wire o0Io1_0 ; wire N_1135 ; wire un36_Ioli0 ; wire N_1114 ; wire l1II1 ; wire N_1123 ; wire l0lo1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [11:0] precnt_lm; wire [10:1] precnt_cry_Z; wire [11:1] precnt_s; wire [11:1] precnt_cry_Y_9; wire [12:12] OO0o1; wire [0:0] precnt_lm_0_1_0_Z; wire VCC ; wire N_377 ; wire GND ; wire un1_Ioli0_1_0_28 ; wire precnt_s_4144_FCO ; wire precnt_s_4144_S ; wire precnt_s_4144_Y ; // @28:497556 SLE \precnt[11] ( .Q(cnt30[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_377), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[10] ( .Q(cnt30[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_377), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[9] ( .Q(cnt30[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_377), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[8] ( .Q(cnt30[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_377), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[7] ( .Q(cnt30[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_377), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[6] ( .Q(cnt30[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_377), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[5] ( .Q(cnt30[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_377), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[4] ( .Q(cnt30[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_377), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[3] ( .Q(cnt30[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_377), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[2] ( .Q(cnt30[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_377), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[1] ( .Q(cnt30[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_377), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[0] ( .Q(cnt30[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_377), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497659 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i_0), .EN(un1_Ioli0_1_0_28), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 ARI1 precnt_s_4144 ( .FCO(precnt_s_4144_FCO), .S(precnt_s_4144_S), .Y(precnt_s_4144_Y), .B(cnt30[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4144.INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_9[1]), .B(cnt30[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4144_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_9[2]), .B(cnt30[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_9[3]), .B(cnt30[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_9[4]), .B(cnt30[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_9[5]), .B(cnt30[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_9[6]), .B(cnt30[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_9[7]), .B(cnt30[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_9[8]), .B(cnt30[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_9[9]), .B(cnt30[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_9[10]), .B(cnt30[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[11] ( .FCO(OO0o1[12]), .S(precnt_s[11]), .Y(precnt_cry_Y_9[11]), .B(cnt30[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:497556 CFG4 \precnt_lm_0[0] ( .A(cnt30[0]), .B(l0Io1_0), .C(precnt_lm_0_1_0_Z[0]), .D(l0lo1), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=16'hCC5C; // @28:497556 CFG3 \precnt_lm_0_1_0[0] ( .A(N_1123), .B(l1II1), .C(N_1114), .Y(precnt_lm_0_1_0_Z[0]) ); defparam \precnt_lm_0_1_0[0] .INIT=8'h7F; // @28:497466 CFG4 un1_Ioli0_1_0 ( .A(CoreAPB3_0_0_APBmslave0_PWDATA_0), .B(l0Io1_0), .C(un36_Ioli0), .D(OO0o1[12]), .Y(un1_Ioli0_1_0_28) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:497556 CFG4 \precnt_lm_0[11] ( .A(l0lo1), .B(precnt_s[11]), .C(N_1135), .D(N_1114), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=16'h0444; // @28:497556 CFG4 \precnt_lm_0[10] ( .A(l0lo1), .B(precnt_s[10]), .C(N_1135), .D(N_1114), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=16'h0444; // @28:497556 CFG4 \precnt_lm_0[9] ( .A(l0lo1), .B(precnt_s[9]), .C(N_1135), .D(N_1114), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=16'h0444; // @28:497556 CFG4 \precnt_lm_0[8] ( .A(l0lo1), .B(precnt_s[8]), .C(N_1135), .D(N_1114), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=16'h0444; // @28:497556 CFG4 \precnt_lm_0[7] ( .A(l0lo1), .B(precnt_s[7]), .C(N_1135), .D(N_1114), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=16'h0444; // @28:497556 CFG4 \precnt_lm_0[6] ( .A(l0lo1), .B(precnt_s[6]), .C(N_1135), .D(N_1114), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=16'h0444; // @28:497556 CFG4 \precnt_lm_0[5] ( .A(l0lo1), .B(precnt_s[5]), .C(N_1135), .D(N_1114), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=16'h0444; // @28:497556 CFG4 \precnt_lm_0[4] ( .A(l0lo1), .B(precnt_s[4]), .C(N_1135), .D(N_1114), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=16'h0444; // @28:497556 CFG4 \precnt_lm_0[3] ( .A(l0lo1), .B(precnt_s[3]), .C(N_1135), .D(N_1114), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=16'h0444; // @28:497556 CFG4 \precnt_lm_0[2] ( .A(l0lo1), .B(precnt_s[2]), .C(N_1135), .D(N_1114), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=16'h0444; // @28:497556 CFG4 \precnt_lm_0[1] ( .A(l0lo1), .B(precnt_s[1]), .C(N_1135), .D(N_1114), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=16'h0444; // @28:497452 CFG4 un1_iOI01_1_i_0 ( .A(N_1114), .B(N_1135), .C(l0Io1_0), .D(l0lo1), .Y(N_377) ); defparam un1_iOI01_1_i_0.INIT=16'hFFF8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_SINCHD_1s_26s_0 */ module CTSE_PEMSTAT_SINCHD_1s_26s_1 ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, Ioli0_i_0, o0Io1_0, cnt31, N_1135, un36_Ioli0, N_1117, l1II1, N_1123, l0lo1, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; input Ioli0_i_0 ; output o0Io1_0 ; output [11:0] cnt31 ; input N_1135 ; input un36_Ioli0 ; input N_1117 ; input l1II1 ; input N_1123 ; input l0lo1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire Ioli0_i_0 ; wire o0Io1_0 ; wire N_1135 ; wire un36_Ioli0 ; wire N_1117 ; wire l1II1 ; wire N_1123 ; wire l0lo1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [11:0] precnt_lm; wire [10:1] precnt_cry_Z; wire [11:1] precnt_s; wire [11:1] precnt_cry_Y_8; wire [12:12] OO0o1; wire [0:0] precnt_lm_0_1_0_Z; wire VCC ; wire N_380 ; wire GND ; wire un1_Ioli0_1_0_29 ; wire precnt_s_4143_FCO ; wire precnt_s_4143_S ; wire precnt_s_4143_Y ; // @28:497556 SLE \precnt[11] ( .Q(cnt31[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_380), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[10] ( .Q(cnt31[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_380), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[9] ( .Q(cnt31[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_380), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[8] ( .Q(cnt31[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_380), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[7] ( .Q(cnt31[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_380), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[6] ( .Q(cnt31[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_380), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[5] ( .Q(cnt31[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_380), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[4] ( .Q(cnt31[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_380), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[3] ( .Q(cnt31[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_380), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[2] ( .Q(cnt31[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_380), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[1] ( .Q(cnt31[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_380), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[0] ( .Q(cnt31[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_380), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497659 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i_0), .EN(un1_Ioli0_1_0_29), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 ARI1 precnt_s_4143 ( .FCO(precnt_s_4143_FCO), .S(precnt_s_4143_S), .Y(precnt_s_4143_Y), .B(cnt31[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4143.INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_8[1]), .B(cnt31[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4143_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_8[2]), .B(cnt31[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_8[3]), .B(cnt31[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_8[4]), .B(cnt31[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_8[5]), .B(cnt31[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_8[6]), .B(cnt31[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_8[7]), .B(cnt31[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_8[8]), .B(cnt31[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_8[9]), .B(cnt31[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_8[10]), .B(cnt31[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[11] ( .FCO(OO0o1[12]), .S(precnt_s[11]), .Y(precnt_cry_Y_8[11]), .B(cnt31[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:497556 CFG4 \precnt_lm_0[0] ( .A(cnt31[0]), .B(l0Io1_0), .C(precnt_lm_0_1_0_Z[0]), .D(l0lo1), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=16'hCC5C; // @28:497556 CFG3 \precnt_lm_0_1_0[0] ( .A(N_1123), .B(l1II1), .C(N_1117), .Y(precnt_lm_0_1_0_Z[0]) ); defparam \precnt_lm_0_1_0[0] .INIT=8'h7F; // @28:497466 CFG4 un1_Ioli0_1_0 ( .A(CoreAPB3_0_0_APBmslave0_PWDATA_0), .B(l0Io1_0), .C(un36_Ioli0), .D(OO0o1[12]), .Y(un1_Ioli0_1_0_29) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:497556 CFG4 \precnt_lm_0[11] ( .A(l0lo1), .B(precnt_s[11]), .C(N_1135), .D(N_1117), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=16'h0444; // @28:497556 CFG4 \precnt_lm_0[10] ( .A(l0lo1), .B(precnt_s[10]), .C(N_1135), .D(N_1117), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=16'h0444; // @28:497556 CFG4 \precnt_lm_0[9] ( .A(l0lo1), .B(precnt_s[9]), .C(N_1135), .D(N_1117), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=16'h0444; // @28:497556 CFG4 \precnt_lm_0[8] ( .A(l0lo1), .B(precnt_s[8]), .C(N_1135), .D(N_1117), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=16'h0444; // @28:497556 CFG4 \precnt_lm_0[7] ( .A(l0lo1), .B(precnt_s[7]), .C(N_1135), .D(N_1117), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=16'h0444; // @28:497556 CFG4 \precnt_lm_0[6] ( .A(l0lo1), .B(precnt_s[6]), .C(N_1135), .D(N_1117), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=16'h0444; // @28:497556 CFG4 \precnt_lm_0[5] ( .A(l0lo1), .B(precnt_s[5]), .C(N_1135), .D(N_1117), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=16'h0444; // @28:497556 CFG4 \precnt_lm_0[4] ( .A(l0lo1), .B(precnt_s[4]), .C(N_1135), .D(N_1117), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=16'h0444; // @28:497556 CFG4 \precnt_lm_0[3] ( .A(l0lo1), .B(precnt_s[3]), .C(N_1135), .D(N_1117), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=16'h0444; // @28:497556 CFG4 \precnt_lm_0[2] ( .A(l0lo1), .B(precnt_s[2]), .C(N_1135), .D(N_1117), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=16'h0444; // @28:497556 CFG4 \precnt_lm_0[1] ( .A(l0lo1), .B(precnt_s[1]), .C(N_1135), .D(N_1117), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=16'h0444; // @28:497452 CFG4 un1_iOI01_1_i_0 ( .A(N_1117), .B(N_1135), .C(l0Io1_0), .D(l0lo1), .Y(N_380) ); defparam un1_iOI01_1_i_0.INIT=16'hFFF8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_SINCHD_1s_26s_1 */ module CTSE_PEMSTAT_SINCHD_1s_26s_2 ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, loli0_0, Ioli0_i_0, o0Io1_0, cnt32, un36_Ioli0, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; input loli0_0 ; input Ioli0_i_0 ; output o0Io1_0 ; output [11:0] cnt32 ; input un36_Ioli0 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire loli0_0 ; wire Ioli0_i_0 ; wire o0Io1_0 ; wire un36_Ioli0 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [11:0] precnt_lm; wire [10:1] precnt_cry_Z; wire [11:1] precnt_s; wire [11:1] precnt_cry_Y_7; wire [12:12] OO0o1; wire VCC ; wire N_383 ; wire GND ; wire un1_Ioli0_1_0_30 ; wire precnt_s_4142_FCO ; wire precnt_s_4142_S ; wire precnt_s_4142_Y ; // @28:497556 SLE \precnt[11] ( .Q(cnt32[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_383), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[10] ( .Q(cnt32[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_383), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[9] ( .Q(cnt32[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_383), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[8] ( .Q(cnt32[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_383), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[7] ( .Q(cnt32[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_383), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[6] ( .Q(cnt32[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_383), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[5] ( .Q(cnt32[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_383), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[4] ( .Q(cnt32[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_383), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[3] ( .Q(cnt32[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_383), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[2] ( .Q(cnt32[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_383), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[1] ( .Q(cnt32[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_383), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[0] ( .Q(cnt32[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_383), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497659 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i_0), .EN(un1_Ioli0_1_0_30), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 ARI1 precnt_s_4142 ( .FCO(precnt_s_4142_FCO), .S(precnt_s_4142_S), .Y(precnt_s_4142_Y), .B(cnt32[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4142.INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_7[1]), .B(cnt32[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4142_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_7[2]), .B(cnt32[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_7[3]), .B(cnt32[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_7[4]), .B(cnt32[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_7[5]), .B(cnt32[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_7[6]), .B(cnt32[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_7[7]), .B(cnt32[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_7[8]), .B(cnt32[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_7[9]), .B(cnt32[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_7[10]), .B(cnt32[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[11] ( .FCO(OO0o1[12]), .S(precnt_s[11]), .Y(precnt_cry_Y_7[11]), .B(cnt32[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:497556 CFG3 \precnt_lm_0[0] ( .A(cnt32[0]), .B(loli0_0), .C(l0Io1_0), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=8'hD1; // @28:497466 CFG4 un1_Ioli0_1_0 ( .A(CoreAPB3_0_0_APBmslave0_PWDATA_0), .B(l0Io1_0), .C(un36_Ioli0), .D(OO0o1[12]), .Y(un1_Ioli0_1_0_30) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:497556 CFG2 \precnt_lm_0[11] ( .A(loli0_0), .B(precnt_s[11]), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=4'h4; // @28:497556 CFG2 \precnt_lm_0[10] ( .A(loli0_0), .B(precnt_s[10]), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=4'h4; // @28:497556 CFG2 \precnt_lm_0[9] ( .A(loli0_0), .B(precnt_s[9]), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=4'h4; // @28:497556 CFG2 \precnt_lm_0[8] ( .A(loli0_0), .B(precnt_s[8]), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=4'h4; // @28:497556 CFG2 \precnt_lm_0[7] ( .A(loli0_0), .B(precnt_s[7]), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=4'h4; // @28:497556 CFG2 \precnt_lm_0[6] ( .A(loli0_0), .B(precnt_s[6]), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=4'h4; // @28:497556 CFG2 \precnt_lm_0[5] ( .A(loli0_0), .B(precnt_s[5]), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=4'h4; // @28:497556 CFG2 \precnt_lm_0[4] ( .A(loli0_0), .B(precnt_s[4]), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=4'h4; // @28:497556 CFG2 \precnt_lm_0[3] ( .A(loli0_0), .B(precnt_s[3]), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=4'h4; // @28:497556 CFG2 \precnt_lm_0[2] ( .A(loli0_0), .B(precnt_s[2]), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=4'h4; // @28:497556 CFG2 \precnt_lm_0[1] ( .A(loli0_0), .B(precnt_s[1]), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=4'h4; // @28:497452 CFG2 un1_iOI01_1_i_0 ( .A(loli0_0), .B(l0Io1_0), .Y(N_383) ); defparam un1_iOI01_1_i_0.INIT=4'hE; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_SINCHD_1s_26s_2 */ module CTSE_PEMSTAT_SINCHD_1s_26s_3 ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, loli0_0, Ioli0_i_0, o0Io1_0, cnt33, un36_Ioli0, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; input loli0_0 ; input Ioli0_i_0 ; output o0Io1_0 ; output [11:0] cnt33 ; input un36_Ioli0 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire loli0_0 ; wire Ioli0_i_0 ; wire o0Io1_0 ; wire un36_Ioli0 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [11:0] precnt_lm; wire [10:1] precnt_cry_Z; wire [11:1] precnt_s; wire [11:1] precnt_cry_Y_6; wire [12:12] OO0o1; wire VCC ; wire N_386 ; wire GND ; wire un1_Ioli0_1_0_31 ; wire precnt_s_4141_FCO ; wire precnt_s_4141_S ; wire precnt_s_4141_Y ; // @28:497556 SLE \precnt[11] ( .Q(cnt33[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_386), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[10] ( .Q(cnt33[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_386), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[9] ( .Q(cnt33[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_386), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[8] ( .Q(cnt33[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_386), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[7] ( .Q(cnt33[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_386), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[6] ( .Q(cnt33[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_386), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[5] ( .Q(cnt33[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_386), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[4] ( .Q(cnt33[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_386), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[3] ( .Q(cnt33[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_386), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[2] ( .Q(cnt33[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_386), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[1] ( .Q(cnt33[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_386), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[0] ( .Q(cnt33[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_386), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497659 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i_0), .EN(un1_Ioli0_1_0_31), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 ARI1 precnt_s_4141 ( .FCO(precnt_s_4141_FCO), .S(precnt_s_4141_S), .Y(precnt_s_4141_Y), .B(cnt33[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4141.INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_6[1]), .B(cnt33[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4141_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_6[2]), .B(cnt33[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_6[3]), .B(cnt33[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_6[4]), .B(cnt33[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_6[5]), .B(cnt33[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_6[6]), .B(cnt33[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_6[7]), .B(cnt33[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_6[8]), .B(cnt33[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_6[9]), .B(cnt33[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_6[10]), .B(cnt33[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[11] ( .FCO(OO0o1[12]), .S(precnt_s[11]), .Y(precnt_cry_Y_6[11]), .B(cnt33[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:497556 CFG3 \precnt_lm_0[0] ( .A(cnt33[0]), .B(loli0_0), .C(l0Io1_0), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=8'hD1; // @28:497466 CFG4 un1_Ioli0_1_0 ( .A(CoreAPB3_0_0_APBmslave0_PWDATA_0), .B(l0Io1_0), .C(un36_Ioli0), .D(OO0o1[12]), .Y(un1_Ioli0_1_0_31) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:497556 CFG2 \precnt_lm_0[11] ( .A(loli0_0), .B(precnt_s[11]), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=4'h4; // @28:497556 CFG2 \precnt_lm_0[10] ( .A(loli0_0), .B(precnt_s[10]), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=4'h4; // @28:497556 CFG2 \precnt_lm_0[9] ( .A(loli0_0), .B(precnt_s[9]), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=4'h4; // @28:497556 CFG2 \precnt_lm_0[8] ( .A(loli0_0), .B(precnt_s[8]), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=4'h4; // @28:497556 CFG2 \precnt_lm_0[7] ( .A(loli0_0), .B(precnt_s[7]), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=4'h4; // @28:497556 CFG2 \precnt_lm_0[6] ( .A(loli0_0), .B(precnt_s[6]), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=4'h4; // @28:497556 CFG2 \precnt_lm_0[5] ( .A(loli0_0), .B(precnt_s[5]), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=4'h4; // @28:497556 CFG2 \precnt_lm_0[4] ( .A(loli0_0), .B(precnt_s[4]), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=4'h4; // @28:497556 CFG2 \precnt_lm_0[3] ( .A(loli0_0), .B(precnt_s[3]), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=4'h4; // @28:497556 CFG2 \precnt_lm_0[2] ( .A(loli0_0), .B(precnt_s[2]), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=4'h4; // @28:497556 CFG2 \precnt_lm_0[1] ( .A(loli0_0), .B(precnt_s[1]), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=4'h4; // @28:497452 CFG2 un1_iOI01_1_i_0 ( .A(loli0_0), .B(l0Io1_0), .Y(N_386) ); defparam un1_iOI01_1_i_0.INIT=4'hE; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_SINCHD_1s_26s_3 */ module CTSE_PEMSTAT_SINCHD_1s_26s_4 ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, loli0_0, Ioli0_i_0, o0Io1_0, cnt34, un36_Ioli0, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; input loli0_0 ; input Ioli0_i_0 ; output o0Io1_0 ; output [11:0] cnt34 ; input un36_Ioli0 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire loli0_0 ; wire Ioli0_i_0 ; wire o0Io1_0 ; wire un36_Ioli0 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [11:0] precnt_lm; wire [10:1] precnt_cry_Z; wire [11:1] precnt_s; wire [11:1] precnt_cry_Y_5; wire [12:12] OO0o1; wire VCC ; wire N_389 ; wire GND ; wire un1_Ioli0_1_0_32 ; wire precnt_s_4140_FCO ; wire precnt_s_4140_S ; wire precnt_s_4140_Y ; // @28:497556 SLE \precnt[11] ( .Q(cnt34[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_389), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[10] ( .Q(cnt34[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_389), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[9] ( .Q(cnt34[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_389), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[8] ( .Q(cnt34[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_389), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[7] ( .Q(cnt34[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_389), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[6] ( .Q(cnt34[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_389), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[5] ( .Q(cnt34[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_389), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[4] ( .Q(cnt34[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_389), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[3] ( .Q(cnt34[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_389), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[2] ( .Q(cnt34[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_389), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[1] ( .Q(cnt34[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_389), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 SLE \precnt[0] ( .Q(cnt34[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_389), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497659 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i_0), .EN(un1_Ioli0_1_0_32), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497556 ARI1 precnt_s_4140 ( .FCO(precnt_s_4140_FCO), .S(precnt_s_4140_S), .Y(precnt_s_4140_Y), .B(cnt34[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4140.INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_5[1]), .B(cnt34[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4140_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_5[2]), .B(cnt34[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_5[3]), .B(cnt34[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_5[4]), .B(cnt34[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_5[5]), .B(cnt34[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_5[6]), .B(cnt34[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_5[7]), .B(cnt34[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_5[8]), .B(cnt34[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_5[9]), .B(cnt34[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_5[10]), .B(cnt34[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:497556 ARI1 \precnt_cry[11] ( .FCO(OO0o1[12]), .S(precnt_s[11]), .Y(precnt_cry_Y_5[11]), .B(cnt34[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:497556 CFG3 \precnt_lm_0[0] ( .A(cnt34[0]), .B(loli0_0), .C(l0Io1_0), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=8'hD1; // @28:497466 CFG4 un1_Ioli0_1_0 ( .A(CoreAPB3_0_0_APBmslave0_PWDATA_0), .B(l0Io1_0), .C(un36_Ioli0), .D(OO0o1[12]), .Y(un1_Ioli0_1_0_32) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:497556 CFG2 \precnt_lm_0[11] ( .A(loli0_0), .B(precnt_s[11]), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=4'h4; // @28:497556 CFG2 \precnt_lm_0[10] ( .A(loli0_0), .B(precnt_s[10]), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=4'h4; // @28:497556 CFG2 \precnt_lm_0[9] ( .A(loli0_0), .B(precnt_s[9]), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=4'h4; // @28:497556 CFG2 \precnt_lm_0[8] ( .A(loli0_0), .B(precnt_s[8]), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=4'h4; // @28:497556 CFG2 \precnt_lm_0[7] ( .A(loli0_0), .B(precnt_s[7]), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=4'h4; // @28:497556 CFG2 \precnt_lm_0[6] ( .A(loli0_0), .B(precnt_s[6]), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=4'h4; // @28:497556 CFG2 \precnt_lm_0[5] ( .A(loli0_0), .B(precnt_s[5]), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=4'h4; // @28:497556 CFG2 \precnt_lm_0[4] ( .A(loli0_0), .B(precnt_s[4]), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=4'h4; // @28:497556 CFG2 \precnt_lm_0[3] ( .A(loli0_0), .B(precnt_s[3]), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=4'h4; // @28:497556 CFG2 \precnt_lm_0[2] ( .A(loli0_0), .B(precnt_s[2]), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=4'h4; // @28:497556 CFG2 \precnt_lm_0[1] ( .A(loli0_0), .B(precnt_s[1]), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=4'h4; // @28:497452 CFG2 un1_iOI01_1_i_0 ( .A(loli0_0), .B(l0Io1_0), .Y(N_389) ); defparam un1_iOI01_1_i_0.INIT=4'hE; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_SINCHD_1s_26s_4 */ module CTSE_PEMSTAT_SADD_1s_26s ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, loli0_0, I0Io1, cnt35, Ioli0_i_0, o0Io1_0, un36_Ioli0, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; input loli0_0 ; input [3:0] I0Io1 ; output [11:0] cnt35 ; input Ioli0_i_0 ; output o0Io1_0 ; input un36_Ioli0 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire loli0_0 ; wire Ioli0_i_0 ; wire o0Io1_0 ; wire un36_Ioli0 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [12:1] OO0o1; wire VCC ; wire un1_Ioli0_1_0_33 ; wire GND ; wire N_268_i ; wire un1_iOI01_1_i_Z ; wire N_266_i ; wire N_264_i ; wire N_2047 ; wire N_2052 ; wire N_2057 ; wire N_2062 ; wire N_2067 ; wire N_2072 ; wire N_2077 ; wire N_2082 ; wire N_270_i ; wire OO0o1_cry_0_Z ; wire OO0o1_cry_0_S ; wire OO0o1_cry_0_Y ; wire OO0o1_cry_1_Z ; wire OO0o1_cry_1_Y ; wire OO0o1_cry_2_Z ; wire OO0o1_cry_2_Y ; wire OO0o1_cry_3_Z ; wire OO0o1_cry_3_Y ; wire OO0o1_cry_4_Z ; wire OO0o1_cry_4_Y ; wire OO0o1_cry_5_Z ; wire OO0o1_cry_5_Y ; wire OO0o1_cry_6_Z ; wire OO0o1_cry_6_Y ; wire OO0o1_cry_7_Z ; wire OO0o1_cry_7_Y ; wire OO0o1_cry_8_Z ; wire OO0o1_cry_8_Y ; wire OO0o1_cry_9_Z ; wire OO0o1_cry_9_Y ; wire OO0o1_cry_10_Z ; wire OO0o1_cry_10_Y ; wire OO0o1_cry_11_Y ; // @28:497055 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i_0), .EN(un1_Ioli0_1_0_33), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496943 SLE \precnt[2] ( .Q(cnt35[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_268_i), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496943 SLE \precnt[1] ( .Q(cnt35[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_266_i), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496943 SLE \precnt[0] ( .Q(cnt35[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_264_i), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496943 SLE \precnt[11] ( .Q(cnt35[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_2047), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496943 SLE \precnt[10] ( .Q(cnt35[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_2052), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496943 SLE \precnt[9] ( .Q(cnt35[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_2057), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496943 SLE \precnt[8] ( .Q(cnt35[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_2062), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496943 SLE \precnt[7] ( .Q(cnt35[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_2067), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496943 SLE \precnt[6] ( .Q(cnt35[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_2072), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496943 SLE \precnt[5] ( .Q(cnt35[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_2077), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496943 SLE \precnt[4] ( .Q(cnt35[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_2082), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496943 SLE \precnt[3] ( .Q(cnt35[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_270_i), .EN(un1_iOI01_1_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:496933 ARI1 OO0o1_cry_0 ( .FCO(OO0o1_cry_0_Z), .S(OO0o1_cry_0_S), .Y(OO0o1_cry_0_Y), .B(cnt35[0]), .C(GND), .D(GND), .A(I0Io1[0]), .FCI(GND) ); defparam OO0o1_cry_0.INIT=20'h555AA; // @28:496933 ARI1 OO0o1_cry_1 ( .FCO(OO0o1_cry_1_Z), .S(OO0o1[1]), .Y(OO0o1_cry_1_Y), .B(cnt35[1]), .C(GND), .D(GND), .A(I0Io1[1]), .FCI(OO0o1_cry_0_Z) ); defparam OO0o1_cry_1.INIT=20'h555AA; // @28:496933 ARI1 OO0o1_cry_2 ( .FCO(OO0o1_cry_2_Z), .S(OO0o1[2]), .Y(OO0o1_cry_2_Y), .B(cnt35[2]), .C(GND), .D(GND), .A(I0Io1[2]), .FCI(OO0o1_cry_1_Z) ); defparam OO0o1_cry_2.INIT=20'h555AA; // @28:496933 ARI1 OO0o1_cry_3 ( .FCO(OO0o1_cry_3_Z), .S(OO0o1[3]), .Y(OO0o1_cry_3_Y), .B(cnt35[3]), .C(GND), .D(GND), .A(I0Io1[3]), .FCI(OO0o1_cry_2_Z) ); defparam OO0o1_cry_3.INIT=20'h555AA; // @28:496933 ARI1 OO0o1_cry_4 ( .FCO(OO0o1_cry_4_Z), .S(OO0o1[4]), .Y(OO0o1_cry_4_Y), .B(cnt35[4]), .C(GND), .D(GND), .A(VCC), .FCI(OO0o1_cry_3_Z) ); defparam OO0o1_cry_4.INIT=20'h4AA00; // @28:496933 ARI1 OO0o1_cry_5 ( .FCO(OO0o1_cry_5_Z), .S(OO0o1[5]), .Y(OO0o1_cry_5_Y), .B(cnt35[5]), .C(GND), .D(GND), .A(VCC), .FCI(OO0o1_cry_4_Z) ); defparam OO0o1_cry_5.INIT=20'h4AA00; // @28:496933 ARI1 OO0o1_cry_6 ( .FCO(OO0o1_cry_6_Z), .S(OO0o1[6]), .Y(OO0o1_cry_6_Y), .B(cnt35[6]), .C(GND), .D(GND), .A(VCC), .FCI(OO0o1_cry_5_Z) ); defparam OO0o1_cry_6.INIT=20'h4AA00; // @28:496933 ARI1 OO0o1_cry_7 ( .FCO(OO0o1_cry_7_Z), .S(OO0o1[7]), .Y(OO0o1_cry_7_Y), .B(cnt35[7]), .C(GND), .D(GND), .A(VCC), .FCI(OO0o1_cry_6_Z) ); defparam OO0o1_cry_7.INIT=20'h4AA00; // @28:496933 ARI1 OO0o1_cry_8 ( .FCO(OO0o1_cry_8_Z), .S(OO0o1[8]), .Y(OO0o1_cry_8_Y), .B(cnt35[8]), .C(GND), .D(GND), .A(VCC), .FCI(OO0o1_cry_7_Z) ); defparam OO0o1_cry_8.INIT=20'h4AA00; // @28:496933 ARI1 OO0o1_cry_9 ( .FCO(OO0o1_cry_9_Z), .S(OO0o1[9]), .Y(OO0o1_cry_9_Y), .B(cnt35[9]), .C(GND), .D(GND), .A(VCC), .FCI(OO0o1_cry_8_Z) ); defparam OO0o1_cry_9.INIT=20'h4AA00; // @28:496933 ARI1 OO0o1_cry_10 ( .FCO(OO0o1_cry_10_Z), .S(OO0o1[10]), .Y(OO0o1_cry_10_Y), .B(cnt35[10]), .C(GND), .D(GND), .A(VCC), .FCI(OO0o1_cry_9_Z) ); defparam OO0o1_cry_10.INIT=20'h4AA00; // @28:496933 ARI1 OO0o1_cry_11 ( .FCO(OO0o1[12]), .S(OO0o1[11]), .Y(OO0o1_cry_11_Y), .B(cnt35[11]), .C(GND), .D(GND), .A(VCC), .FCI(OO0o1_cry_10_Z) ); defparam OO0o1_cry_11.INIT=20'h4AA00; // @28:496943 CFG2 precnt_5_0_248_a2 ( .A(loli0_0), .B(OO0o1[4]), .Y(N_2082) ); defparam precnt_5_0_248_a2.INIT=4'h4; // @28:496943 CFG2 precnt_5_1_242_a2 ( .A(loli0_0), .B(OO0o1[5]), .Y(N_2077) ); defparam precnt_5_1_242_a2.INIT=4'h4; // @28:496943 CFG2 precnt_5_2_236_a2 ( .A(loli0_0), .B(OO0o1[6]), .Y(N_2072) ); defparam precnt_5_2_236_a2.INIT=4'h4; // @28:496943 CFG2 precnt_5_3_230_a2 ( .A(loli0_0), .B(OO0o1[7]), .Y(N_2067) ); defparam precnt_5_3_230_a2.INIT=4'h4; // @28:496943 CFG2 precnt_5_4_224_a2 ( .A(loli0_0), .B(OO0o1[8]), .Y(N_2062) ); defparam precnt_5_4_224_a2.INIT=4'h4; // @28:496943 CFG2 precnt_5_5_218_a2 ( .A(loli0_0), .B(OO0o1[9]), .Y(N_2057) ); defparam precnt_5_5_218_a2.INIT=4'h4; // @28:496943 CFG2 precnt_5_6_212_a2 ( .A(loli0_0), .B(OO0o1[10]), .Y(N_2052) ); defparam precnt_5_6_212_a2.INIT=4'h4; // @28:496943 CFG2 precnt_5_7_206_a2 ( .A(loli0_0), .B(OO0o1[11]), .Y(N_2047) ); defparam precnt_5_7_206_a2.INIT=4'h4; // @28:496943 CFG2 un1_iOI01_1_i ( .A(loli0_0), .B(l0Io1_0), .Y(un1_iOI01_1_i_Z) ); defparam un1_iOI01_1_i.INIT=4'hE; // @28:496943 CFG4 \precnt_RNO[2] ( .A(l0Io1_0), .B(I0Io1[2]), .C(loli0_0), .D(OO0o1[2]), .Y(N_268_i) ); defparam \precnt_RNO[2] .INIT=16'h8A80; // @28:496943 CFG4 \precnt_RNO[1] ( .A(l0Io1_0), .B(I0Io1[1]), .C(loli0_0), .D(OO0o1[1]), .Y(N_266_i) ); defparam \precnt_RNO[1] .INIT=16'h8A80; // @28:496943 CFG4 \precnt_RNO[3] ( .A(l0Io1_0), .B(I0Io1[3]), .C(loli0_0), .D(OO0o1[3]), .Y(N_270_i) ); defparam \precnt_RNO[3] .INIT=16'h8A80; // @28:496943 CFG4 \precnt_RNO[0] ( .A(l0Io1_0), .B(loli0_0), .C(I0Io1[0]), .D(OO0o1_cry_0_Y), .Y(N_264_i) ); defparam \precnt_RNO[0] .INIT=16'hA280; // @28:496849 CFG4 un1_Ioli0_1_0 ( .A(CoreAPB3_0_0_APBmslave0_PWDATA_0), .B(un36_Ioli0), .C(l0Io1_0), .D(OO0o1[12]), .Y(un1_Ioli0_1_0_33) ); defparam un1_Ioli0_1_0.INIT=16'hF888; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_SADD_1s_26s */ module CTSE_PEMSTAT_SINCNF_1s_26s ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, loli0_0, Ioli0_i_0, o0Io1_0, cnt38, un36_Ioli0, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; input loli0_0 ; input Ioli0_i_0 ; output o0Io1_0 ; output [11:0] cnt38 ; input un36_Ioli0 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire loli0_0 ; wire Ioli0_i_0 ; wire o0Io1_0 ; wire un36_Ioli0 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [11:0] precnt_lm; wire [10:1] precnt_cry_Z; wire [11:1] precnt_s; wire [11:1] precnt_cry_Y_4; wire [12:12] OO0o1; wire VCC ; wire N_392 ; wire GND ; wire un1_Ioli0_1_0_34 ; wire precnt_s_4139_FCO ; wire precnt_s_4139_S ; wire precnt_s_4139_Y ; // @28:497858 SLE \precnt[11] ( .Q(cnt38[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_392), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[10] ( .Q(cnt38[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_392), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[9] ( .Q(cnt38[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_392), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[8] ( .Q(cnt38[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_392), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[7] ( .Q(cnt38[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_392), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[6] ( .Q(cnt38[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_392), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[5] ( .Q(cnt38[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_392), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[4] ( .Q(cnt38[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_392), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[3] ( .Q(cnt38[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_392), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[2] ( .Q(cnt38[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_392), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[1] ( .Q(cnt38[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_392), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[0] ( .Q(cnt38[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_392), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497961 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i_0), .EN(un1_Ioli0_1_0_34), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 ARI1 precnt_s_4139 ( .FCO(precnt_s_4139_FCO), .S(precnt_s_4139_S), .Y(precnt_s_4139_Y), .B(cnt38[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4139.INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_4[1]), .B(cnt38[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4139_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_4[2]), .B(cnt38[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_4[3]), .B(cnt38[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_4[4]), .B(cnt38[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_4[5]), .B(cnt38[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_4[6]), .B(cnt38[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_4[7]), .B(cnt38[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_4[8]), .B(cnt38[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_4[9]), .B(cnt38[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_4[10]), .B(cnt38[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[11] ( .FCO(OO0o1[12]), .S(precnt_s[11]), .Y(precnt_cry_Y_4[11]), .B(cnt38[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:497858 CFG3 \precnt_lm_0[0] ( .A(cnt38[0]), .B(loli0_0), .C(l0Io1_0), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=8'hD1; // @28:497768 CFG4 un1_Ioli0_1_0 ( .A(CoreAPB3_0_0_APBmslave0_PWDATA_0), .B(l0Io1_0), .C(un36_Ioli0), .D(OO0o1[12]), .Y(un1_Ioli0_1_0_34) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:497858 CFG2 \precnt_lm_0[11] ( .A(loli0_0), .B(precnt_s[11]), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[10] ( .A(loli0_0), .B(precnt_s[10]), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[9] ( .A(loli0_0), .B(precnt_s[9]), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[8] ( .A(loli0_0), .B(precnt_s[8]), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[7] ( .A(loli0_0), .B(precnt_s[7]), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[6] ( .A(loli0_0), .B(precnt_s[6]), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[5] ( .A(loli0_0), .B(precnt_s[5]), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[4] ( .A(loli0_0), .B(precnt_s[4]), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[3] ( .A(loli0_0), .B(precnt_s[3]), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[2] ( .A(loli0_0), .B(precnt_s[2]), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[1] ( .A(loli0_0), .B(precnt_s[1]), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=4'h4; // @28:497754 CFG2 un1_iOI01_1_i_0 ( .A(loli0_0), .B(l0Io1_0), .Y(N_392) ); defparam un1_iOI01_1_i_0.INIT=4'hE; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_SINCNF_1s_26s */ module CTSE_PEMSTAT_SINCNF_1s_26s_0 ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, loli0_0, Ioli0_i_0, o0Io1_0, cnt39, un36_Ioli0, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; input loli0_0 ; input Ioli0_i_0 ; output o0Io1_0 ; output [11:0] cnt39 ; input un36_Ioli0 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire loli0_0 ; wire Ioli0_i_0 ; wire o0Io1_0 ; wire un36_Ioli0 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [11:0] precnt_lm; wire [10:1] precnt_cry_Z; wire [11:1] precnt_s; wire [11:1] precnt_cry_Y_3; wire [12:12] OO0o1; wire VCC ; wire N_262 ; wire GND ; wire un1_Ioli0_1_0_35 ; wire precnt_s_4138_FCO ; wire precnt_s_4138_S ; wire precnt_s_4138_Y ; // @28:497858 SLE \precnt[11] ( .Q(cnt39[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_262), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[10] ( .Q(cnt39[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_262), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[9] ( .Q(cnt39[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_262), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[8] ( .Q(cnt39[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_262), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[7] ( .Q(cnt39[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_262), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[6] ( .Q(cnt39[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_262), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[5] ( .Q(cnt39[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_262), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[4] ( .Q(cnt39[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_262), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[3] ( .Q(cnt39[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_262), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[2] ( .Q(cnt39[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_262), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[1] ( .Q(cnt39[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_262), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[0] ( .Q(cnt39[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_262), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497961 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i_0), .EN(un1_Ioli0_1_0_35), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 ARI1 precnt_s_4138 ( .FCO(precnt_s_4138_FCO), .S(precnt_s_4138_S), .Y(precnt_s_4138_Y), .B(cnt39[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4138.INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_3[1]), .B(cnt39[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4138_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_3[2]), .B(cnt39[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_3[3]), .B(cnt39[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_3[4]), .B(cnt39[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_3[5]), .B(cnt39[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_3[6]), .B(cnt39[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_3[7]), .B(cnt39[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_3[8]), .B(cnt39[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_3[9]), .B(cnt39[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_3[10]), .B(cnt39[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[11] ( .FCO(OO0o1[12]), .S(precnt_s[11]), .Y(precnt_cry_Y_3[11]), .B(cnt39[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:497858 CFG3 \precnt_lm_0[0] ( .A(cnt39[0]), .B(loli0_0), .C(l0Io1_0), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=8'hD1; // @28:497768 CFG4 un1_Ioli0_1_0 ( .A(CoreAPB3_0_0_APBmslave0_PWDATA_0), .B(l0Io1_0), .C(un36_Ioli0), .D(OO0o1[12]), .Y(un1_Ioli0_1_0_35) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:497858 CFG2 \precnt_lm_0[11] ( .A(loli0_0), .B(precnt_s[11]), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[10] ( .A(loli0_0), .B(precnt_s[10]), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[9] ( .A(loli0_0), .B(precnt_s[9]), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[8] ( .A(loli0_0), .B(precnt_s[8]), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[7] ( .A(loli0_0), .B(precnt_s[7]), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[6] ( .A(loli0_0), .B(precnt_s[6]), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[5] ( .A(loli0_0), .B(precnt_s[5]), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[4] ( .A(loli0_0), .B(precnt_s[4]), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[3] ( .A(loli0_0), .B(precnt_s[3]), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[2] ( .A(loli0_0), .B(precnt_s[2]), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[1] ( .A(loli0_0), .B(precnt_s[1]), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=4'h4; // @28:497754 CFG2 un1_iOI01_1_i_0 ( .A(loli0_0), .B(l0Io1_0), .Y(N_262) ); defparam un1_iOI01_1_i_0.INIT=4'hE; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_SINCNF_1s_26s_0 */ module CTSE_PEMSTAT_SINCNF_1s_26s_1 ( l0Io1_0, CoreAPB3_0_0_APBmslave0_PWDATA_0, Ioli0_i_0, o0Io1_0, i0Io1, N_1270, l0lo1, un36_Ioli0, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input l0Io1_0 ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input Ioli0_i_0 ; output o0Io1_0 ; output [11:0] i0Io1 ; input N_1270 ; input l0lo1 ; input un36_Ioli0 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire l0Io1_0 ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire Ioli0_i_0 ; wire o0Io1_0 ; wire N_1270 ; wire l0lo1 ; wire un36_Ioli0 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [11:0] precnt_lm; wire [10:1] precnt_cry_Z; wire [11:1] precnt_s; wire [11:1] precnt_cry_Y_2; wire [12:12] OO0o1; wire VCC ; wire N_142 ; wire GND ; wire un1_Ioli0_1_0_0_0 ; wire precnt_s_4137_FCO ; wire precnt_s_4137_S ; wire precnt_s_4137_Y ; // @28:497858 SLE \precnt[11] ( .Q(i0Io1[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_142), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[10] ( .Q(i0Io1[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_142), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[9] ( .Q(i0Io1[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_142), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[8] ( .Q(i0Io1[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_142), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[7] ( .Q(i0Io1[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_142), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[6] ( .Q(i0Io1[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_142), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[5] ( .Q(i0Io1[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_142), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[4] ( .Q(i0Io1[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_142), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[3] ( .Q(i0Io1[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_142), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[2] ( .Q(i0Io1[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_142), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[1] ( .Q(i0Io1[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_142), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[0] ( .Q(i0Io1[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_142), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497961 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i_0), .EN(un1_Ioli0_1_0_0_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 ARI1 precnt_s_4137 ( .FCO(precnt_s_4137_FCO), .S(precnt_s_4137_S), .Y(precnt_s_4137_Y), .B(i0Io1[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4137.INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_2[1]), .B(i0Io1[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4137_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_2[2]), .B(i0Io1[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_2[3]), .B(i0Io1[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_2[4]), .B(i0Io1[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_2[5]), .B(i0Io1[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_2[6]), .B(i0Io1[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_2[7]), .B(i0Io1[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_2[8]), .B(i0Io1[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_2[9]), .B(i0Io1[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_2[10]), .B(i0Io1[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[11] ( .FCO(OO0o1[12]), .S(precnt_s[11]), .Y(precnt_cry_Y_2[11]), .B(i0Io1[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:497768 CFG4 un1_Ioli0_1_0_0 ( .A(CoreAPB3_0_0_APBmslave0_PWDATA_0), .B(l0Io1_0), .C(un36_Ioli0), .D(OO0o1[12]), .Y(un1_Ioli0_1_0_0_0) ); defparam un1_Ioli0_1_0_0.INIT=16'hECA0; // @28:497858 CFG3 \precnt_lm_0[11] ( .A(l0lo1), .B(N_1270), .C(precnt_s[11]), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=8'h10; // @28:497858 CFG3 \precnt_lm_0[10] ( .A(l0lo1), .B(N_1270), .C(precnt_s[10]), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=8'h10; // @28:497858 CFG3 \precnt_lm_0[9] ( .A(l0lo1), .B(N_1270), .C(precnt_s[9]), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=8'h10; // @28:497858 CFG3 \precnt_lm_0[8] ( .A(l0lo1), .B(N_1270), .C(precnt_s[8]), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=8'h10; // @28:497858 CFG3 \precnt_lm_0[7] ( .A(l0lo1), .B(N_1270), .C(precnt_s[7]), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=8'h10; // @28:497858 CFG3 \precnt_lm_0[6] ( .A(l0lo1), .B(N_1270), .C(precnt_s[6]), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=8'h10; // @28:497858 CFG3 \precnt_lm_0[5] ( .A(l0lo1), .B(N_1270), .C(precnt_s[5]), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=8'h10; // @28:497858 CFG3 \precnt_lm_0[4] ( .A(l0lo1), .B(N_1270), .C(precnt_s[4]), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=8'h10; // @28:497858 CFG3 \precnt_lm_0[3] ( .A(l0lo1), .B(N_1270), .C(precnt_s[3]), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=8'h10; // @28:497858 CFG3 \precnt_lm_0[2] ( .A(l0lo1), .B(N_1270), .C(precnt_s[2]), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=8'h10; // @28:497858 CFG3 \precnt_lm_0[1] ( .A(l0lo1), .B(N_1270), .C(precnt_s[1]), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=8'h10; // @28:497754 CFG3 un1_iOI01_1_0_a3_i ( .A(N_1270), .B(l0Io1_0), .C(l0lo1), .Y(N_142) ); defparam un1_iOI01_1_0_a3_i.INIT=8'hFE; // @28:497858 CFG4 \precnt_lm_0[0] ( .A(i0Io1[0]), .B(l0Io1_0), .C(l0lo1), .D(N_1270), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=16'hCCC5; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_SINCNF_1s_26s_1 */ module CTSE_PEMSTAT_SINCNF_1s_26s_2 ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, loli0_0, Ioli0_i_0, o0Io1_0, O1Io1, un36_Ioli0, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; input loli0_0 ; input Ioli0_i_0 ; output o0Io1_0 ; output [11:0] O1Io1 ; input un36_Ioli0 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire loli0_0 ; wire Ioli0_i_0 ; wire o0Io1_0 ; wire un36_Ioli0 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [11:0] precnt_lm; wire [10:1] precnt_cry_Z; wire [11:1] precnt_s; wire [11:1] precnt_cry_Y_1; wire [12:12] OO0o1; wire VCC ; wire N_410 ; wire GND ; wire un1_Ioli0_1_0_36 ; wire precnt_s_4136_FCO ; wire precnt_s_4136_S ; wire precnt_s_4136_Y ; // @28:497858 SLE \precnt[11] ( .Q(O1Io1[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_410), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[10] ( .Q(O1Io1[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_410), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[9] ( .Q(O1Io1[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_410), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[8] ( .Q(O1Io1[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_410), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[7] ( .Q(O1Io1[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_410), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[6] ( .Q(O1Io1[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_410), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[5] ( .Q(O1Io1[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_410), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[4] ( .Q(O1Io1[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_410), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[3] ( .Q(O1Io1[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_410), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[2] ( .Q(O1Io1[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_410), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[1] ( .Q(O1Io1[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_410), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[0] ( .Q(O1Io1[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_410), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497961 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i_0), .EN(un1_Ioli0_1_0_36), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 ARI1 precnt_s_4136 ( .FCO(precnt_s_4136_FCO), .S(precnt_s_4136_S), .Y(precnt_s_4136_Y), .B(O1Io1[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4136.INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_1[1]), .B(O1Io1[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4136_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_1[2]), .B(O1Io1[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_1[3]), .B(O1Io1[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_1[4]), .B(O1Io1[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_1[5]), .B(O1Io1[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_1[6]), .B(O1Io1[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_1[7]), .B(O1Io1[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_1[8]), .B(O1Io1[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_1[9]), .B(O1Io1[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_1[10]), .B(O1Io1[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[11] ( .FCO(OO0o1[12]), .S(precnt_s[11]), .Y(precnt_cry_Y_1[11]), .B(O1Io1[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:497858 CFG3 \precnt_lm_0[0] ( .A(O1Io1[0]), .B(loli0_0), .C(l0Io1_0), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=8'hD1; // @28:497768 CFG4 un1_Ioli0_1_0 ( .A(CoreAPB3_0_0_APBmslave0_PWDATA_0), .B(l0Io1_0), .C(un36_Ioli0), .D(OO0o1[12]), .Y(un1_Ioli0_1_0_36) ); defparam un1_Ioli0_1_0.INIT=16'hECA0; // @28:497858 CFG2 \precnt_lm_0[11] ( .A(loli0_0), .B(precnt_s[11]), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[10] ( .A(loli0_0), .B(precnt_s[10]), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[9] ( .A(loli0_0), .B(precnt_s[9]), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[8] ( .A(loli0_0), .B(precnt_s[8]), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[7] ( .A(loli0_0), .B(precnt_s[7]), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[6] ( .A(loli0_0), .B(precnt_s[6]), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[5] ( .A(loli0_0), .B(precnt_s[5]), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[4] ( .A(loli0_0), .B(precnt_s[4]), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[3] ( .A(loli0_0), .B(precnt_s[3]), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[2] ( .A(loli0_0), .B(precnt_s[2]), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[1] ( .A(loli0_0), .B(precnt_s[1]), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=4'h4; // @28:497754 CFG2 un1_iOI01_1_i_0 ( .A(loli0_0), .B(l0Io1_0), .Y(N_410) ); defparam un1_iOI01_1_i_0.INIT=4'hE; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_SINCNF_1s_26s_2 */ module CTSE_PEMSTAT_SINCNF_1s_26s_3 ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, Ioli0_i_0, o0Io1_0, I1Io1, un36_Ioli0, N_152_tz, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; input Ioli0_i_0 ; output o0Io1_0 ; output [11:0] I1Io1 ; input un36_Ioli0 ; input N_152_tz ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire Ioli0_i_0 ; wire o0Io1_0 ; wire un36_Ioli0 ; wire N_152_tz ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [11:0] precnt_lm; wire [10:1] precnt_cry_Z; wire [11:1] precnt_s; wire [11:1] precnt_cry_Y_0; wire [12:12] OO0o1; wire VCC ; wire N_140 ; wire GND ; wire un1_Ioli0_1_0_0_1 ; wire precnt_s_4135_FCO ; wire precnt_s_4135_S ; wire precnt_s_4135_Y ; // @28:497858 SLE \precnt[11] ( .Q(I1Io1[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_140), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[10] ( .Q(I1Io1[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_140), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[9] ( .Q(I1Io1[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_140), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[8] ( .Q(I1Io1[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_140), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[7] ( .Q(I1Io1[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_140), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[6] ( .Q(I1Io1[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_140), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[5] ( .Q(I1Io1[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_140), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[4] ( .Q(I1Io1[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_140), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[3] ( .Q(I1Io1[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_140), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[2] ( .Q(I1Io1[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_140), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[1] ( .Q(I1Io1[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_140), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[0] ( .Q(I1Io1[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_140), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497961 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i_0), .EN(un1_Ioli0_1_0_0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 ARI1 precnt_s_4135 ( .FCO(precnt_s_4135_FCO), .S(precnt_s_4135_S), .Y(precnt_s_4135_Y), .B(I1Io1[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4135.INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y_0[1]), .B(I1Io1[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4135_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y_0[2]), .B(I1Io1[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y_0[3]), .B(I1Io1[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y_0[4]), .B(I1Io1[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y_0[5]), .B(I1Io1[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y_0[6]), .B(I1Io1[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y_0[7]), .B(I1Io1[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y_0[8]), .B(I1Io1[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y_0[9]), .B(I1Io1[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y_0[10]), .B(I1Io1[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[11] ( .FCO(OO0o1[12]), .S(precnt_s[11]), .Y(precnt_cry_Y_0[11]), .B(I1Io1[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:497858 CFG3 \precnt_lm_0[0] ( .A(N_152_tz), .B(l0Io1_0), .C(I1Io1[0]), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=8'h8D; // @28:497768 CFG4 un1_Ioli0_1_0_0 ( .A(CoreAPB3_0_0_APBmslave0_PWDATA_0), .B(l0Io1_0), .C(un36_Ioli0), .D(OO0o1[12]), .Y(un1_Ioli0_1_0_0_1) ); defparam un1_Ioli0_1_0_0.INIT=16'hECA0; // @28:497858 CFG2 \precnt_lm_0[11] ( .A(N_152_tz), .B(precnt_s[11]), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[10] ( .A(N_152_tz), .B(precnt_s[10]), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[9] ( .A(N_152_tz), .B(precnt_s[9]), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[8] ( .A(N_152_tz), .B(precnt_s[8]), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[7] ( .A(N_152_tz), .B(precnt_s[7]), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[6] ( .A(N_152_tz), .B(precnt_s[6]), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[5] ( .A(N_152_tz), .B(precnt_s[5]), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[4] ( .A(N_152_tz), .B(precnt_s[4]), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[3] ( .A(N_152_tz), .B(precnt_s[3]), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[2] ( .A(N_152_tz), .B(precnt_s[2]), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[1] ( .A(N_152_tz), .B(precnt_s[1]), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=4'h4; // @28:497754 CFG2 un1_iOI01_1_0_a3_i ( .A(N_152_tz), .B(l0Io1_0), .Y(N_140) ); defparam un1_iOI01_1_0_a3_i.INIT=4'hE; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_SINCNF_1s_26s_3 */ module CTSE_PEMSTAT_SINCNF_1s_26s_4 ( CoreAPB3_0_0_APBmslave0_PWDATA_0, l0Io1_0, Ioli0_i_0, o0Io1_0, l1Io1, un36_Ioli0, N_149_tz, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input CoreAPB3_0_0_APBmslave0_PWDATA_0 ; input l0Io1_0 ; input Ioli0_i_0 ; output o0Io1_0 ; output [11:0] l1Io1 ; input un36_Ioli0 ; input N_149_tz ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire CoreAPB3_0_0_APBmslave0_PWDATA_0 ; wire l0Io1_0 ; wire Ioli0_i_0 ; wire o0Io1_0 ; wire un36_Ioli0 ; wire N_149_tz ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [11:0] precnt_lm; wire [10:1] precnt_cry_Z; wire [11:1] precnt_s; wire [11:1] precnt_cry_Y; wire [12:12] OO0o1; wire VCC ; wire N_138 ; wire GND ; wire un1_Ioli0_1_0_0_2 ; wire precnt_s_4134_FCO ; wire precnt_s_4134_S ; wire precnt_s_4134_Y ; // @28:497858 SLE \precnt[11] ( .Q(l1Io1[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[11]), .EN(N_138), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[10] ( .Q(l1Io1[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[10]), .EN(N_138), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[9] ( .Q(l1Io1[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[9]), .EN(N_138), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[8] ( .Q(l1Io1[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[8]), .EN(N_138), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[7] ( .Q(l1Io1[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[7]), .EN(N_138), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[6] ( .Q(l1Io1[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[6]), .EN(N_138), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[5] ( .Q(l1Io1[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[5]), .EN(N_138), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[4] ( .Q(l1Io1[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[4]), .EN(N_138), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[3] ( .Q(l1Io1[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[3]), .EN(N_138), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[2] ( .Q(l1Io1[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[2]), .EN(N_138), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[1] ( .Q(l1Io1[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[1]), .EN(N_138), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 SLE \precnt[0] ( .Q(l1Io1[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(precnt_lm[0]), .EN(N_138), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497961 SLE IilI1 ( .Q(o0Io1_0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Ioli0_i_0), .EN(un1_Ioli0_1_0_0_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:497858 ARI1 precnt_s_4134 ( .FCO(precnt_s_4134_FCO), .S(precnt_s_4134_S), .Y(precnt_s_4134_Y), .B(l1Io1[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam precnt_s_4134.INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[1] ( .FCO(precnt_cry_Z[1]), .S(precnt_s[1]), .Y(precnt_cry_Y[1]), .B(l1Io1[1]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_s_4134_FCO) ); defparam \precnt_cry[1] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[2] ( .FCO(precnt_cry_Z[2]), .S(precnt_s[2]), .Y(precnt_cry_Y[2]), .B(l1Io1[2]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[1]) ); defparam \precnt_cry[2] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[3] ( .FCO(precnt_cry_Z[3]), .S(precnt_s[3]), .Y(precnt_cry_Y[3]), .B(l1Io1[3]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[2]) ); defparam \precnt_cry[3] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[4] ( .FCO(precnt_cry_Z[4]), .S(precnt_s[4]), .Y(precnt_cry_Y[4]), .B(l1Io1[4]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[3]) ); defparam \precnt_cry[4] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[5] ( .FCO(precnt_cry_Z[5]), .S(precnt_s[5]), .Y(precnt_cry_Y[5]), .B(l1Io1[5]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[4]) ); defparam \precnt_cry[5] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[6] ( .FCO(precnt_cry_Z[6]), .S(precnt_s[6]), .Y(precnt_cry_Y[6]), .B(l1Io1[6]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[5]) ); defparam \precnt_cry[6] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[7] ( .FCO(precnt_cry_Z[7]), .S(precnt_s[7]), .Y(precnt_cry_Y[7]), .B(l1Io1[7]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[6]) ); defparam \precnt_cry[7] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[8] ( .FCO(precnt_cry_Z[8]), .S(precnt_s[8]), .Y(precnt_cry_Y[8]), .B(l1Io1[8]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[7]) ); defparam \precnt_cry[8] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[9] ( .FCO(precnt_cry_Z[9]), .S(precnt_s[9]), .Y(precnt_cry_Y[9]), .B(l1Io1[9]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[8]) ); defparam \precnt_cry[9] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[10] ( .FCO(precnt_cry_Z[10]), .S(precnt_s[10]), .Y(precnt_cry_Y[10]), .B(l1Io1[10]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[9]) ); defparam \precnt_cry[10] .INIT=20'h4AA00; // @28:497858 ARI1 \precnt_cry[11] ( .FCO(OO0o1[12]), .S(precnt_s[11]), .Y(precnt_cry_Y[11]), .B(l1Io1[11]), .C(GND), .D(GND), .A(VCC), .FCI(precnt_cry_Z[10]) ); defparam \precnt_cry[11] .INIT=20'h4AA00; // @28:497858 CFG3 \precnt_lm_0[0] ( .A(l1Io1[0]), .B(l0Io1_0), .C(N_149_tz), .Y(precnt_lm[0]) ); defparam \precnt_lm_0[0] .INIT=8'hC5; // @28:497768 CFG4 un1_Ioli0_1_0_0 ( .A(CoreAPB3_0_0_APBmslave0_PWDATA_0), .B(l0Io1_0), .C(un36_Ioli0), .D(OO0o1[12]), .Y(un1_Ioli0_1_0_0_2) ); defparam un1_Ioli0_1_0_0.INIT=16'hECA0; // @28:497858 CFG2 \precnt_lm_0[11] ( .A(N_149_tz), .B(precnt_s[11]), .Y(precnt_lm[11]) ); defparam \precnt_lm_0[11] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[10] ( .A(N_149_tz), .B(precnt_s[10]), .Y(precnt_lm[10]) ); defparam \precnt_lm_0[10] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[9] ( .A(N_149_tz), .B(precnt_s[9]), .Y(precnt_lm[9]) ); defparam \precnt_lm_0[9] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[8] ( .A(N_149_tz), .B(precnt_s[8]), .Y(precnt_lm[8]) ); defparam \precnt_lm_0[8] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[7] ( .A(N_149_tz), .B(precnt_s[7]), .Y(precnt_lm[7]) ); defparam \precnt_lm_0[7] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[6] ( .A(N_149_tz), .B(precnt_s[6]), .Y(precnt_lm[6]) ); defparam \precnt_lm_0[6] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[5] ( .A(N_149_tz), .B(precnt_s[5]), .Y(precnt_lm[5]) ); defparam \precnt_lm_0[5] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[4] ( .A(N_149_tz), .B(precnt_s[4]), .Y(precnt_lm[4]) ); defparam \precnt_lm_0[4] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[3] ( .A(N_149_tz), .B(precnt_s[3]), .Y(precnt_lm[3]) ); defparam \precnt_lm_0[3] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[2] ( .A(N_149_tz), .B(precnt_s[2]), .Y(precnt_lm[2]) ); defparam \precnt_lm_0[2] .INIT=4'h4; // @28:497858 CFG2 \precnt_lm_0[1] ( .A(N_149_tz), .B(precnt_s[1]), .Y(precnt_lm[1]) ); defparam \precnt_lm_0[1] .INIT=4'h4; // @28:497754 CFG2 un1_iOI01_1_0_a3_i ( .A(N_149_tz), .B(l0Io1_0), .Y(N_138) ); defparam un1_iOI01_1_0_a3_i.INIT=4'hE; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_SINCNF_1s_26s_4 */ module CTSE_PEMSTAT_STORE_26s ( l1Io1, o0Io1, Ioli0_i_0, Ioli0_i_1, Ioli0_i_7, Ioli0_i_8, Ioli0_i_11, Ioli0_i_12, Ioli0_i_13, Ioli0_i_14, Ioli0_i_15, Ioli0_i_17, Ioli0_i_18, Ioli0_i_19, Ioli0_i_20, Ioli0_i_21, Ioli0_i_22, Ioli0_i_23, Ioli0_i_24, Ioli0_i_25, Ioli0_i_26, Ioli0_i_27, Ioli0_i_32, Ioli0_i_33, Ioli0_i_34, Ioli0_i_35, Ioli0_i_36, Ioli0_i_37, l0Io1, I1Io1, O1Io1, loli0_0, loli0_17, loli0_25, loli0_26, loli0_27, loli0_28, loli0_31, loli0_32, loli0_34, i0Io1, CoreAPB3_0_0_APBmslave0_PWDATA, cnt39, cnt38, cnt35, I0Io1_1z, cnt34, cnt33, cnt32, cnt31, cnt30, cnt29, cnt28, cnt27, cnt26, cnt25, cnt24, cnt23, wrdata_0, cnt22, cnt21, cnt20, cnt19, cnt18, cnt17, cnt16, cnt15, cnt14, cnt13, cnt12, cnt11, cnt10, cnt09, cnt08, cnt07, O0Io1_1z, cnt06, cnt05, cnt04, cnt03, cnt02, cnt01, cnt00, N_149_tz, N_152_tz, N_1270, un36_Ioli0, N_1123, N_1135, N_1119, N_1136, N_1117, N_1126, N_1120, N_1128, CoreAPB3_0_0_APBmslave0_PWRITE, un1_ooiO1, N_1114, N_1127, N_1130, N_1118, N_1137, N_1121, hstrst_i, PF_CCC_0_0_OUT0_FABCLK_0, l0lo1, N_1124, l1II1, N_1115, N_1131, N_1133 ) ; output [11:0] l1Io1 ; output [43:0] o0Io1 ; input Ioli0_i_0 ; input Ioli0_i_1 ; input Ioli0_i_7 ; input Ioli0_i_8 ; input Ioli0_i_11 ; input Ioli0_i_12 ; input Ioli0_i_13 ; input Ioli0_i_14 ; input Ioli0_i_15 ; input Ioli0_i_17 ; input Ioli0_i_18 ; input Ioli0_i_19 ; input Ioli0_i_20 ; input Ioli0_i_21 ; input Ioli0_i_22 ; input Ioli0_i_23 ; input Ioli0_i_24 ; input Ioli0_i_25 ; input Ioli0_i_26 ; input Ioli0_i_27 ; input Ioli0_i_32 ; input Ioli0_i_33 ; input Ioli0_i_34 ; input Ioli0_i_35 ; input Ioli0_i_36 ; input Ioli0_i_37 ; input [43:0] l0Io1 ; output [11:0] I1Io1 ; output [11:0] O1Io1 ; input loli0_0 ; input loli0_17 ; input loli0_25 ; input loli0_26 ; input loli0_27 ; input loli0_28 ; input loli0_31 ; input loli0_32 ; input loli0_34 ; output [11:0] i0Io1 ; input [31:1] CoreAPB3_0_0_APBmslave0_PWDATA ; output [11:0] cnt39 ; output [11:0] cnt38 ; output [11:0] cnt35 ; input [3:0] I0Io1_1z ; output [11:0] cnt34 ; output [11:0] cnt33 ; output [11:0] cnt32 ; output [11:0] cnt31 ; output [11:0] cnt30 ; output [11:0] cnt29 ; output [11:0] cnt28 ; output [17:0] cnt27 ; output [17:0] cnt26 ; output [17:0] cnt25 ; output [23:0] cnt24 ; output [11:0] cnt23 ; input wrdata_0 ; output [11:0] cnt22 ; output [11:0] cnt21 ; output [11:0] cnt20 ; output [11:0] cnt19 ; output [11:0] cnt18 ; output [11:0] cnt17 ; output [11:0] cnt16 ; output [11:0] cnt15 ; output [11:0] cnt14 ; output [11:0] cnt13 ; output [11:0] cnt12 ; output [17:0] cnt11 ; output [17:0] cnt10 ; output [11:0] cnt09 ; output [17:0] cnt08 ; output [23:0] cnt07 ; input [15:0] O0Io1_1z ; output [17:0] cnt06 ; output [17:0] cnt05 ; output [17:0] cnt04 ; output [17:0] cnt03 ; output [17:0] cnt02 ; output [17:0] cnt01 ; output [17:0] cnt00 ; input N_149_tz ; input N_152_tz ; input N_1270 ; input un36_Ioli0 ; input N_1123 ; input N_1135 ; input N_1119 ; input N_1136 ; input N_1117 ; input N_1126 ; input N_1120 ; input N_1128 ; input CoreAPB3_0_0_APBmslave0_PWRITE ; input un1_ooiO1 ; input N_1114 ; input N_1127 ; input N_1130 ; input N_1118 ; input N_1137 ; input N_1121 ; input hstrst_i ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input l0lo1 ; input N_1124 ; input l1II1 ; input N_1115 ; output N_1131 ; input N_1133 ; wire Ioli0_i_0 ; wire Ioli0_i_1 ; wire Ioli0_i_7 ; wire Ioli0_i_8 ; wire Ioli0_i_11 ; wire Ioli0_i_12 ; wire Ioli0_i_13 ; wire Ioli0_i_14 ; wire Ioli0_i_15 ; wire Ioli0_i_17 ; wire Ioli0_i_18 ; wire Ioli0_i_19 ; wire Ioli0_i_20 ; wire Ioli0_i_21 ; wire Ioli0_i_22 ; wire Ioli0_i_23 ; wire Ioli0_i_24 ; wire Ioli0_i_25 ; wire Ioli0_i_26 ; wire Ioli0_i_27 ; wire Ioli0_i_32 ; wire Ioli0_i_33 ; wire Ioli0_i_34 ; wire Ioli0_i_35 ; wire Ioli0_i_36 ; wire Ioli0_i_37 ; wire loli0_0 ; wire loli0_17 ; wire loli0_25 ; wire loli0_26 ; wire loli0_27 ; wire loli0_28 ; wire loli0_31 ; wire loli0_32 ; wire loli0_34 ; wire wrdata_0 ; wire N_149_tz ; wire N_152_tz ; wire N_1270 ; wire un36_Ioli0 ; wire N_1123 ; wire N_1135 ; wire N_1119 ; wire N_1136 ; wire N_1117 ; wire N_1126 ; wire N_1120 ; wire N_1128 ; wire CoreAPB3_0_0_APBmslave0_PWRITE ; wire un1_ooiO1 ; wire N_1114 ; wire N_1127 ; wire N_1130 ; wire N_1118 ; wire N_1137 ; wire N_1121 ; wire hstrst_i ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire l0lo1 ; wire N_1124 ; wire l1II1 ; wire N_1115 ; wire N_1131 ; wire N_1133 ; wire GND ; wire VCC ; // @28:498385 CTSE_PEMSTAT_LINC_1s_26s CTSE_PEMSTAT_LINC_00 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[31]), .l0Io1_0(l0Io1[0]), .o0Io1_0(o0Io1[0]), .cnt00(cnt00[17:0]), .N_1133(N_1133), .N_1131(N_1131), .N_1115(N_1115), .l1II1(l1II1), .N_1124(N_1124), .l0lo1(l0lo1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:498471 CTSE_PEMSTAT_LINC_1s_26s_0 CTSE_PEMSTAT_LINC_01 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[30]), .l0Io1_0(l0Io1[1]), .o0Io1_0(o0Io1[1]), .cnt01(cnt01[17:0]), .N_1133(N_1133), .N_1131(N_1131), .N_1121(N_1121), .l1II1(l1II1), .N_1124(N_1124), .l0lo1(l0lo1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:498557 CTSE_PEMSTAT_LINC_1s_26s_1 CTSE_PEMSTAT_LINC_02 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[29]), .l0Io1_0(l0Io1[2]), .o0Io1_0(o0Io1[2]), .cnt02(cnt02[17:0]), .N_1137(N_1137), .N_1131(N_1131), .N_1115(N_1115), .l1II1(l1II1), .N_1118(N_1118), .l0lo1(l0lo1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:498643 CTSE_PEMSTAT_LINC_1s_26s_2 CTSE_PEMSTAT_LINC_03 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[28]), .l0Io1_0(l0Io1[3]), .o0Io1_0(o0Io1[3]), .cnt03(cnt03[17:0]), .N_1137(N_1137), .N_1131(N_1131), .N_1118(N_1118), .N_1121(N_1121), .l1II1(l1II1), .l0lo1(l0lo1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:498729 CTSE_PEMSTAT_LINC_1s_26s_3 CTSE_PEMSTAT_LINC_04 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[27]), .l0Io1_0(l0Io1[4]), .o0Io1_0(o0Io1[4]), .cnt04(cnt04[17:0]), .N_1133(N_1133), .N_1131(N_1131), .N_1124(N_1124), .N_1130(N_1130), .l1II1(l1II1), .l0lo1(l0lo1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:498815 CTSE_PEMSTAT_LINC_1s_26s_4 CTSE_PEMSTAT_LINC_05 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[26]), .l0Io1_0(l0Io1[5]), .o0Io1_0(o0Io1[5]), .cnt05(cnt05[17:0]), .N_1133(N_1133), .N_1131(N_1131), .N_1124(N_1124), .N_1127(N_1127), .l1II1(l1II1), .l0lo1(l0lo1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:498901 CTSE_PEMSTAT_LINC_1s_26s_5 CTSE_PEMSTAT_LINC_06 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[25]), .l0Io1_0(l0Io1[6]), .o0Io1_0(o0Io1[6]), .cnt06(cnt06[17:0]), .N_1137(N_1137), .N_1131(N_1131), .N_1118(N_1118), .N_1130(N_1130), .l1II1(l1II1), .l0lo1(l0lo1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:498987 CTSE_PEMSTAT_LADD_1s_26s CTSE_PEMSTAT_LADD_07 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[16]), .l0Io1_0(l0Io1[7]), .loli0_0(loli0_0), .O0Io1(O0Io1_1z[15:0]), .cnt07(cnt07[23:0]), .o0Io1_1z_0(o0Io1[7]), .N_1131(N_1131), .N_1114(N_1114), .un1_ooiO1(un1_ooiO1), .CoreAPB3_0_0_APBmslave0_PWRITE(CoreAPB3_0_0_APBmslave0_PWRITE), .N_1128(N_1128), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:499079 CTSE_PEMSTAT_LINC_1s_26s_6 CTSE_PEMSTAT_LINC_08 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[15]), .l0Io1_0(l0Io1[7]), .Ioli0_i_0(Ioli0_i_0), .o0Io1_0(o0Io1[8]), .cnt08(cnt08[17:0]), .N_1133(N_1133), .N_1131(N_1131), .N_1120(N_1120), .l1II1(l1II1), .N_1124(N_1124), .l0lo1(l0lo1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:499165 CTSE_PEMSTAT_SINC_1s_26s CTSE_PEMSTAT_sinc_09 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[14]), .l0Io1_0(l0Io1[9]), .Ioli0_i_0(Ioli0_i_1), .o0Io1_0(o0Io1[9]), .cnt09(cnt09[11:0]), .N_1133(N_1133), .N_1131(N_1131), .N_1124(N_1124), .N_1126(N_1126), .l1II1(l1II1), .l0lo1(l0lo1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:499251 CTSE_PEMSTAT_LINC_1s_26s_7 CTSE_PEMSTAT_LINC_10 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[13]), .l0Io1_0(l0Io1[10]), .o0Io1_0(o0Io1[10]), .cnt10(cnt10[17:0]), .N_1137(N_1137), .N_1131(N_1131), .N_1118(N_1118), .N_1120(N_1120), .l1II1(l1II1), .l0lo1(l0lo1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:499337 CTSE_PEMSTAT_LINC_1s_26s_8 CTSE_PEMSTAT_LINC_11 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .l0Io1_0(l0Io1[11]), .o0Io1_0(o0Io1[11]), .cnt11(cnt11[17:0]), .N_1137(N_1137), .N_1131(N_1131), .N_1118(N_1118), .N_1126(N_1126), .l1II1(l1II1), .l0lo1(l0lo1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:499423 CTSE_PEMSTAT_SINC_1s_26s_0 CTSE_PEMSTAT_sinc_12 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .l0Io1_0(l0Io1[12]), .o0Io1_0(o0Io1[12]), .cnt12(cnt12[11:0]), .N_1133(N_1133), .N_1131(N_1131), .N_1114(N_1114), .l1II1(l1II1), .N_1124(N_1124), .l0lo1(l0lo1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:499509 CTSE_PEMSTAT_SINC_1s_26s_1 CTSE_PEMSTAT_sinc_13 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .l0Io1_0(l0Io1[13]), .o0Io1_0(o0Io1[13]), .cnt13(cnt13[11:0]), .N_1133(N_1133), .N_1131(N_1131), .N_1117(N_1117), .l1II1(l1II1), .N_1124(N_1124), .l0lo1(l0lo1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:499595 CTSE_PEMSTAT_SINC_1s_26s_2 CTSE_PEMSTAT_sinc_14 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .l0Io1_0(l0Io1[14]), .o0Io1_0(o0Io1[14]), .cnt14(cnt14[11:0]), .N_1137(N_1137), .N_1131(N_1131), .N_1114(N_1114), .l1II1(l1II1), .N_1118(N_1118), .l0lo1(l0lo1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:499681 CTSE_PEMSTAT_SINC_1s_26s_3 CTSE_PEMSTAT_sinc_15 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .l0Io1_0(l0Io1[15]), .Ioli0_i_0(Ioli0_i_7), .o0Io1_0(o0Io1[15]), .cnt15(cnt15[11:0]), .N_1137(N_1137), .N_1131(N_1131), .N_1117(N_1117), .l1II1(l1II1), .N_1118(N_1118), .l0lo1(l0lo1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:499767 CTSE_PEMSTAT_SINC_1s_26s_4 CTSE_PEMSTAT_sinc_16 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .l0Io1_0(l0Io1[16]), .Ioli0_i_0(Ioli0_i_8), .o0Io1_0(o0Io1[16]), .cnt16(cnt16[11:0]), .N_1136(N_1136), .N_1131(N_1131), .N_1115(N_1115), .l1II1(l1II1), .N_1119(N_1119), .l0lo1(l0lo1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:499853 CTSE_PEMSTAT_SINC_1s_26s_5 CTSE_PEMSTAT_sinc_17 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .l0Io1_0(l0Io1[17]), .o0Io1_0(o0Io1[17]), .cnt17(cnt17[11:0]), .N_1136(N_1136), .N_1131(N_1131), .N_1119(N_1119), .N_1121(N_1121), .l1II1(l1II1), .l0lo1(l0lo1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:499939 CTSE_PEMSTAT_SINC_1s_26s_6 CTSE_PEMSTAT_sinc_18 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .l0Io1_0(l0Io1[18]), .o0Io1_0(o0Io1[18]), .cnt18(cnt18[11:0]), .N_1135(N_1135), .N_1131(N_1131), .N_1115(N_1115), .l1II1(l1II1), .N_1123(N_1123), .l0lo1(l0lo1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:500025 CTSE_PEMSTAT_SINC_1s_26s_7 CTSE_PEMSTAT_sinc_19 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .l0Io1_0(l0Io1[19]), .Ioli0_i_0(Ioli0_i_11), .o0Io1_0(o0Io1[19]), .cnt19(cnt19[11:0]), .N_1135(N_1135), .N_1131(N_1131), .N_1121(N_1121), .l1II1(l1II1), .N_1123(N_1123), .l0lo1(l0lo1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:500111 CTSE_PEMSTAT_SINC_1s_26s_8 CTSE_PEMSTAT_sinc_20 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .l0Io1_0(l0Io1[20]), .Ioli0_i_0(Ioli0_i_12), .o0Io1_0(o0Io1[20]), .cnt20(cnt20[11:0]), .N_1136(N_1136), .N_1131(N_1131), .N_1119(N_1119), .N_1130(N_1130), .l1II1(l1II1), .l0lo1(l0lo1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:500197 CTSE_PEMSTAT_SINC_1s_26s_9 CTSE_PEMSTAT_sinc_21 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .l0Io1_0(l0Io1[21]), .Ioli0_i_0(Ioli0_i_13), .o0Io1_0(o0Io1[21]), .cnt21(cnt21[11:0]), .N_1136(N_1136), .N_1131(N_1131), .N_1119(N_1119), .N_1127(N_1127), .l1II1(l1II1), .l0lo1(l0lo1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:500283 CTSE_PEMSTAT_SINC_1s_26s_10 CTSE_PEMSTAT_sinc_22 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .l0Io1_0(l0Io1[22]), .Ioli0_i_0(Ioli0_i_14), .o0Io1_0(o0Io1[22]), .cnt22(cnt22[11:0]), .N_1135(N_1135), .N_1131(N_1131), .N_1123(N_1123), .N_1130(N_1130), .l1II1(l1II1), .l0lo1(l0lo1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:500369 CTSE_PEMSTAT_SINC_1s_26s_11 CTSE_PEMSTAT_sinc_23 ( .wrdata_0(wrdata_0), .l0Io1_0(l0Io1[23]), .Ioli0_i_0(Ioli0_i_15), .o0Io1_0(o0Io1[23]), .cnt23(cnt23[11:0]), .N_1135(N_1135), .N_1131(N_1131), .N_1123(N_1123), .N_1127(N_1127), .l1II1(l1II1), .l0lo1(l0lo1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:500455 CTSE_PEMSTAT_LADD_1s_26s_0 CTSE_PEMSTAT_LADD_24 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[13]), .l0Io1_0(l0Io1[24]), .loli0_0(loli0_17), .O0Io1(O0Io1_1z[15:0]), .cnt24(cnt24[23:0]), .o0Io1_1z_0(o0Io1[24]), .un36_Ioli0(un36_Ioli0), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:500547 CTSE_PEMSTAT_LINC_1s_26s_9 CTSE_PEMSTAT_LINC_25 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .l0Io1_0(l0Io1[24]), .Ioli0_i_0(Ioli0_i_17), .o0Io1_0(o0Io1[25]), .cnt25(cnt25[17:0]), .N_1136(N_1136), .un36_Ioli0(un36_Ioli0), .N_1119(N_1119), .N_1126(N_1126), .l1II1(l1II1), .l0lo1(l0lo1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:500633 CTSE_PEMSTAT_LINC_1s_26s_10 CTSE_PEMSTAT_LINC_26 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .l0Io1_0(l0Io1[26]), .Ioli0_i_0(Ioli0_i_18), .o0Io1_0(o0Io1[26]), .cnt26(cnt26[17:0]), .N_1135(N_1135), .un36_Ioli0(un36_Ioli0), .N_1120(N_1120), .l1II1(l1II1), .N_1123(N_1123), .l0lo1(l0lo1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:500719 CTSE_PEMSTAT_LINC_1s_26s_11 CTSE_PEMSTAT_LINC_27 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .l0Io1_0(l0Io1[27]), .Ioli0_i_0(Ioli0_i_19), .o0Io1_0(o0Io1[27]), .cnt27(cnt27[17:0]), .N_1135(N_1135), .un36_Ioli0(un36_Ioli0), .N_1123(N_1123), .N_1126(N_1126), .l1II1(l1II1), .l0lo1(l0lo1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:500805 CTSE_PEMSTAT_SINC_1s_26s_12 CTSE_PEMSTAT_sinc_28 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .l0Io1_0(l0Io1[28]), .Ioli0_i_0(Ioli0_i_20), .o0Io1_0(o0Io1[28]), .cnt28(cnt28[11:0]), .N_1136(N_1136), .un36_Ioli0(un36_Ioli0), .N_1114(N_1114), .l1II1(l1II1), .N_1119(N_1119), .l0lo1(l0lo1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:500891 CTSE_PEMSTAT_SINCHD_1s_26s CTSE_PEMSTAT_SINCHD_29 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .l0Io1_0(l0Io1[29]), .Ioli0_i_0(Ioli0_i_21), .o0Io1_0(o0Io1[29]), .cnt29(cnt29[11:0]), .N_1136(N_1136), .un36_Ioli0(un36_Ioli0), .N_1117(N_1117), .l1II1(l1II1), .N_1119(N_1119), .l0lo1(l0lo1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:500977 CTSE_PEMSTAT_SINCHD_1s_26s_0 CTSE_PEMSTAT_SINCHD_30 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .l0Io1_0(l0Io1[30]), .Ioli0_i_0(Ioli0_i_22), .o0Io1_0(o0Io1[30]), .cnt30(cnt30[11:0]), .N_1135(N_1135), .un36_Ioli0(un36_Ioli0), .N_1114(N_1114), .l1II1(l1II1), .N_1123(N_1123), .l0lo1(l0lo1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:501063 CTSE_PEMSTAT_SINCHD_1s_26s_1 CTSE_PEMSTAT_SINCHD_31 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .l0Io1_0(l0Io1[31]), .Ioli0_i_0(Ioli0_i_23), .o0Io1_0(o0Io1[31]), .cnt31(cnt31[11:0]), .N_1135(N_1135), .un36_Ioli0(un36_Ioli0), .N_1117(N_1117), .l1II1(l1II1), .N_1123(N_1123), .l0lo1(l0lo1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:501149 CTSE_PEMSTAT_SINCHD_1s_26s_2 CTSE_PEMSTAT_SINCHD_32 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .l0Io1_0(l0Io1[32]), .loli0_0(loli0_25), .Ioli0_i_0(Ioli0_i_24), .o0Io1_0(o0Io1[32]), .cnt32(cnt32[11:0]), .un36_Ioli0(un36_Ioli0), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:501235 CTSE_PEMSTAT_SINCHD_1s_26s_3 CTSE_PEMSTAT_SINCHD_33 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .l0Io1_0(l0Io1[33]), .loli0_0(loli0_26), .Ioli0_i_0(Ioli0_i_25), .o0Io1_0(o0Io1[33]), .cnt33(cnt33[11:0]), .un36_Ioli0(un36_Ioli0), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:501321 CTSE_PEMSTAT_SINCHD_1s_26s_4 CTSE_PEMSTAT_SINCHD_34 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .l0Io1_0(l0Io1[34]), .loli0_0(loli0_27), .Ioli0_i_0(Ioli0_i_26), .o0Io1_0(o0Io1[34]), .cnt34(cnt34[11:0]), .un36_Ioli0(un36_Ioli0), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:501407 CTSE_PEMSTAT_SADD_1s_26s CTSE_PEMSTAT_SADD_35 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .l0Io1_0(l0Io1[35]), .loli0_0(loli0_28), .I0Io1(I0Io1_1z[3:0]), .cnt35(cnt35[11:0]), .Ioli0_i_0(Ioli0_i_27), .o0Io1_0(o0Io1[35]), .un36_Ioli0(un36_Ioli0), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:501671 CTSE_PEMSTAT_SINCNF_1s_26s CTSE_PEMSTAT_SINCNF_38 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[19]), .l0Io1_0(l0Io1[38]), .loli0_0(loli0_31), .Ioli0_i_0(Ioli0_i_32), .o0Io1_0(o0Io1[38]), .cnt38(cnt38[11:0]), .un36_Ioli0(un36_Ioli0), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:501757 CTSE_PEMSTAT_SINCNF_1s_26s_0 CTSE_PEMSTAT_SINCNF_39 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[18]), .l0Io1_0(l0Io1[39]), .loli0_0(loli0_32), .Ioli0_i_0(Ioli0_i_33), .o0Io1_0(o0Io1[39]), .cnt39(cnt39[11:0]), .un36_Ioli0(un36_Ioli0), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:501843 CTSE_PEMSTAT_SINCNF_1s_26s_1 CTSE_PEMSTAT_SINCNF_40 ( .l0Io1_0(l0Io1[28]), .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[17]), .Ioli0_i_0(Ioli0_i_34), .o0Io1_0(o0Io1[40]), .i0Io1(i0Io1[11:0]), .N_1270(N_1270), .l0lo1(l0lo1), .un36_Ioli0(un36_Ioli0), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:501929 CTSE_PEMSTAT_SINCNF_1s_26s_2 CTSE_PEMSTAT_SINCNF_41 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[16]), .l0Io1_0(l0Io1[41]), .loli0_0(loli0_34), .Ioli0_i_0(Ioli0_i_35), .o0Io1_0(o0Io1[41]), .O1Io1(O1Io1[11:0]), .un36_Ioli0(un36_Ioli0), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:502015 CTSE_PEMSTAT_SINCNF_1s_26s_3 CTSE_PEMSTAT_SINCNF_42 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[15]), .l0Io1_0(l0Io1[42]), .Ioli0_i_0(Ioli0_i_36), .o0Io1_0(o0Io1[42]), .I1Io1(I1Io1[11:0]), .un36_Ioli0(un36_Ioli0), .N_152_tz(N_152_tz), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:502101 CTSE_PEMSTAT_SINCNF_1s_26s_4 CTSE_PEMSTAT_SINCNF_43 ( .CoreAPB3_0_0_APBmslave0_PWDATA_0(CoreAPB3_0_0_APBmslave0_PWDATA[14]), .l0Io1_0(l0Io1[43]), .Ioli0_i_0(Ioli0_i_37), .o0Io1_0(o0Io1[43]), .l1Io1(l1Io1[11:0]), .un36_Ioli0(un36_Ioli0), .N_149_tz(N_149_tz), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_STORE_26s */ module CTSE_PEMSTAT_EIM_26s_1s_0s ( cnt07, cnt24, cnt31, loli0_26, loli0_25, loli0_0, loli0_34, loli0_28, loli0_31, loli0_27, loli0_32, loli0_17, cnt34, cnt22, cnt25, cnt16, cnt30, cnt19, cnt21, cnt27, cnt29, cnt18, cnt20, cnt23, cnt26, cnt28, cnt39, cnt17, l1Io1, cnt38, I1Io1, cnt32, cnt33, i0Io1, O1Io1, cnt14, o0Io1_31, o0Io1_0, o0Io1_14, o0Io1_2, o0Io1_16, o0Io1_1, o0Io1_15, o0Io1_10, o0Io1_11, cnt03, cnt10, cnt05, cnt08, cnt11, cnt13, cnt04, cnt02, cnt06, cnt15, cnt00, cnt12, cnt01, cnt09, cnt35, Ioli0_i_27, Ioli0_i_32, Ioli0_i_33, Ioli0_i_34, Ioli0_i_35, Ioli0_i_36, Ioli0_i_37, Ioli0_i_12, Ioli0_i_13, Ioli0_i_14, Ioli0_i_15, Ioli0_i_17, Ioli0_i_18, Ioli0_i_19, Ioli0_i_20, Ioli0_i_21, Ioli0_i_22, Ioli0_i_23, Ioli0_i_24, Ioli0_i_25, Ioli0_i_26, Ioli0_i_0, Ioli0_i_1, Ioli0_i_7, Ioli0_i_8, Ioli0_i_11, un78_OilI1_0, un50_OilI1_0, un1_OilI1_1, un1_OilI1_2, un1_OilI1_5, un1_OilI1_10, un1_OilI1_0, un86_OilI1_0, un86_OilI1_2, i0lo1_3, i0lo1_6, i0lo1_4, i0lo1_5, i0lo1_0, i0lo1_40_3, i0lo1_40_0, i0lo1_40_1, i0lo1_41_3, i0lo1_41_0, i0lo1_41_1, i0lo1_12, i0lo1_11, CoreAPB3_0_0_APBmslave0_PADDR_5, CoreAPB3_0_0_APBmslave0_PADDR_6, CoreAPB3_0_0_APBmslave0_PADDR_0, CoreAPB3_0_0_APBmslave0_PADDR_3, CoreAPB3_0_0_APBmslave0_PADDR_1, PADDR_0, paddr_1z_0, CoreAPB3_0_0_APBmslave0_PWDATA, Oolo1_5, Oolo1_4, Oolo1_3, Oolo1_2, Oolo1_1, Oolo1_0, Oolo1_20, Oolo1_18, Oolo1_16, Oolo1_14, Oolo1_13, Oolo1_12, Oolo1_11, Oolo1_10, Oolo1_6, Oolo1_23, Oolo1_22, Oolo1_21, Iolo1_12, Iolo1_11, Iolo1_10, Iolo1_6, Iolo1_5, Iolo1_4, Iolo1_3, Iolo1_2, Iolo1_1, Iolo1_0, Iolo1_19, Iolo1_18, Iolo1_17, Iolo1_16, Iolo1_14, wrdata_0, N_280, N_161, N_402, N_159, N_404, N_152_tz, N_149_tz, N_829, N_1131, N_1146, N_1270, N_1135, N_1136, N_679, N_675, un18_OilI1_0_a2_1z, N_1147, N_1133, un52_OilI1, N_1137, l1II1, N_1119, un36_Ioli0, N_1118, N_1124, N_16, N_133, un1_Ii0O1, un1_o01O1_0, CoreAPB3_0_0_APBmslave0_PWRITE, un4_Ooo11_1, un1_ooiO1, N_82_2, N_1112, liO019_i_1, N_1206, tx_fifo_write_sig14_i_2, rx_fifo_read_0, N_1130, N_1127, N_1115, N_1120, N_1117, N_1128, N_1126, N_1121, l0lo1_1z, un80_OilI1_0_a2_1z, N_1114, N_1123, o1II1, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input [21:0] cnt07 ; input [23:0] cnt24 ; input [11:0] cnt31 ; output loli0_26 ; output loli0_25 ; output loli0_0 ; output loli0_34 ; output loli0_28 ; output loli0_31 ; output loli0_27 ; output loli0_32 ; output loli0_17 ; input [11:0] cnt34 ; input [11:0] cnt22 ; input [17:0] cnt25 ; input [11:0] cnt16 ; input [11:0] cnt30 ; input [11:0] cnt19 ; input [11:0] cnt21 ; input [17:0] cnt27 ; input [11:0] cnt29 ; input [11:0] cnt18 ; input [11:0] cnt20 ; input [11:0] cnt23 ; input [17:0] cnt26 ; input [11:0] cnt28 ; input [11:0] cnt39 ; input [11:0] cnt17 ; input [11:0] l1Io1 ; input [11:0] cnt38 ; input [11:0] I1Io1 ; input [11:0] cnt32 ; input [11:0] cnt33 ; input [11:0] i0Io1 ; input [11:0] O1Io1 ; input [11:0] cnt14 ; input o0Io1_31 ; input o0Io1_0 ; input o0Io1_14 ; input o0Io1_2 ; input o0Io1_16 ; input o0Io1_1 ; input o0Io1_15 ; input o0Io1_10 ; input o0Io1_11 ; input [17:0] cnt03 ; input [17:0] cnt10 ; input [17:0] cnt05 ; input [17:0] cnt08 ; input [17:0] cnt11 ; input [11:0] cnt13 ; input [17:0] cnt04 ; input [17:0] cnt02 ; input [17:0] cnt06 ; input [11:0] cnt15 ; input [17:0] cnt00 ; input [11:0] cnt12 ; input [17:0] cnt01 ; input [11:0] cnt09 ; input [11:0] cnt35 ; output Ioli0_i_27 ; output Ioli0_i_32 ; output Ioli0_i_33 ; output Ioli0_i_34 ; output Ioli0_i_35 ; output Ioli0_i_36 ; output Ioli0_i_37 ; output Ioli0_i_12 ; output Ioli0_i_13 ; output Ioli0_i_14 ; output Ioli0_i_15 ; output Ioli0_i_17 ; output Ioli0_i_18 ; output Ioli0_i_19 ; output Ioli0_i_20 ; output Ioli0_i_21 ; output Ioli0_i_22 ; output Ioli0_i_23 ; output Ioli0_i_24 ; output Ioli0_i_25 ; output Ioli0_i_26 ; output Ioli0_i_0 ; output Ioli0_i_1 ; output Ioli0_i_7 ; output Ioli0_i_8 ; output Ioli0_i_11 ; output un78_OilI1_0 ; output un50_OilI1_0 ; output un1_OilI1_1 ; output un1_OilI1_2 ; output un1_OilI1_5 ; output un1_OilI1_10 ; output un1_OilI1_0 ; output un86_OilI1_0 ; output un86_OilI1_2 ; output i0lo1_3 ; output i0lo1_6 ; output i0lo1_4 ; output i0lo1_5 ; output i0lo1_0 ; output i0lo1_40_3 ; output i0lo1_40_0 ; output i0lo1_40_1 ; output i0lo1_41_3 ; output i0lo1_41_0 ; output i0lo1_41_1 ; output [17:13] i0lo1_12 ; output [17:13] i0lo1_11 ; input CoreAPB3_0_0_APBmslave0_PADDR_5 ; input CoreAPB3_0_0_APBmslave0_PADDR_6 ; input CoreAPB3_0_0_APBmslave0_PADDR_0 ; input CoreAPB3_0_0_APBmslave0_PADDR_3 ; input CoreAPB3_0_0_APBmslave0_PADDR_1 ; input PADDR_0 ; input paddr_1z_0 ; input [31:1] CoreAPB3_0_0_APBmslave0_PWDATA ; output Oolo1_5 ; output Oolo1_4 ; output Oolo1_3 ; output Oolo1_2 ; output Oolo1_1 ; output Oolo1_0 ; output Oolo1_20 ; output Oolo1_18 ; output Oolo1_16 ; output Oolo1_14 ; output Oolo1_13 ; output Oolo1_12 ; output Oolo1_11 ; output Oolo1_10 ; output Oolo1_6 ; output Oolo1_23 ; output Oolo1_22 ; output Oolo1_21 ; output Iolo1_12 ; output Iolo1_11 ; output Iolo1_10 ; output Iolo1_6 ; output Iolo1_5 ; output Iolo1_4 ; output Iolo1_3 ; output Iolo1_2 ; output Iolo1_1 ; output Iolo1_0 ; output Iolo1_19 ; output Iolo1_18 ; output Iolo1_17 ; output Iolo1_16 ; output Iolo1_14 ; input wrdata_0 ; output N_280 ; output N_161 ; output N_402 ; output N_159 ; output N_404 ; output N_152_tz ; output N_149_tz ; output N_829 ; input N_1131 ; output N_1146 ; output N_1270 ; output N_1135 ; output N_1136 ; output N_679 ; output N_675 ; output un18_OilI1_0_a2_1z ; output N_1147 ; output N_1133 ; output un52_OilI1 ; output N_1137 ; input l1II1 ; output N_1119 ; output un36_Ioli0 ; output N_1118 ; output N_1124 ; output N_16 ; output N_133 ; input un1_Ii0O1 ; input un1_o01O1_0 ; input CoreAPB3_0_0_APBmslave0_PWRITE ; input un4_Ooo11_1 ; input un1_ooiO1 ; input N_82_2 ; input N_1112 ; input liO019_i_1 ; input N_1206 ; input tx_fifo_write_sig14_i_2 ; input rx_fifo_read_0 ; output N_1130 ; output N_1127 ; output N_1115 ; output N_1120 ; output N_1117 ; output N_1128 ; output N_1126 ; output N_1121 ; output l0lo1_1z ; output un80_OilI1_0_a2_1z ; output N_1114 ; output N_1123 ; input o1II1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire loli0_26 ; wire loli0_25 ; wire loli0_0 ; wire loli0_34 ; wire loli0_28 ; wire loli0_31 ; wire loli0_27 ; wire loli0_32 ; wire loli0_17 ; wire o0Io1_31 ; wire o0Io1_0 ; wire o0Io1_14 ; wire o0Io1_2 ; wire o0Io1_16 ; wire o0Io1_1 ; wire o0Io1_15 ; wire o0Io1_10 ; wire o0Io1_11 ; wire Ioli0_i_27 ; wire Ioli0_i_32 ; wire Ioli0_i_33 ; wire Ioli0_i_34 ; wire Ioli0_i_35 ; wire Ioli0_i_36 ; wire Ioli0_i_37 ; wire Ioli0_i_12 ; wire Ioli0_i_13 ; wire Ioli0_i_14 ; wire Ioli0_i_15 ; wire Ioli0_i_17 ; wire Ioli0_i_18 ; wire Ioli0_i_19 ; wire Ioli0_i_20 ; wire Ioli0_i_21 ; wire Ioli0_i_22 ; wire Ioli0_i_23 ; wire Ioli0_i_24 ; wire Ioli0_i_25 ; wire Ioli0_i_26 ; wire Ioli0_i_0 ; wire Ioli0_i_1 ; wire Ioli0_i_7 ; wire Ioli0_i_8 ; wire Ioli0_i_11 ; wire un78_OilI1_0 ; wire un50_OilI1_0 ; wire un1_OilI1_1 ; wire un1_OilI1_2 ; wire un1_OilI1_5 ; wire un1_OilI1_10 ; wire un1_OilI1_0 ; wire un86_OilI1_0 ; wire un86_OilI1_2 ; wire i0lo1_3 ; wire i0lo1_6 ; wire i0lo1_4 ; wire i0lo1_5 ; wire i0lo1_0 ; wire i0lo1_40_3 ; wire i0lo1_40_0 ; wire i0lo1_40_1 ; wire i0lo1_41_3 ; wire i0lo1_41_0 ; wire i0lo1_41_1 ; wire CoreAPB3_0_0_APBmslave0_PADDR_5 ; wire CoreAPB3_0_0_APBmslave0_PADDR_6 ; wire CoreAPB3_0_0_APBmslave0_PADDR_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_3 ; wire CoreAPB3_0_0_APBmslave0_PADDR_1 ; wire PADDR_0 ; wire paddr_1z_0 ; wire Oolo1_5 ; wire Oolo1_4 ; wire Oolo1_3 ; wire Oolo1_2 ; wire Oolo1_1 ; wire Oolo1_0 ; wire Oolo1_20 ; wire Oolo1_18 ; wire Oolo1_16 ; wire Oolo1_14 ; wire Oolo1_13 ; wire Oolo1_12 ; wire Oolo1_11 ; wire Oolo1_10 ; wire Oolo1_6 ; wire Oolo1_23 ; wire Oolo1_22 ; wire Oolo1_21 ; wire Iolo1_12 ; wire Iolo1_11 ; wire Iolo1_10 ; wire Iolo1_6 ; wire Iolo1_5 ; wire Iolo1_4 ; wire Iolo1_3 ; wire Iolo1_2 ; wire Iolo1_1 ; wire Iolo1_0 ; wire Iolo1_19 ; wire Iolo1_18 ; wire Iolo1_17 ; wire Iolo1_16 ; wire Iolo1_14 ; wire wrdata_0 ; wire N_280 ; wire N_161 ; wire N_402 ; wire N_159 ; wire N_404 ; wire N_152_tz ; wire N_149_tz ; wire N_829 ; wire N_1131 ; wire N_1146 ; wire N_1270 ; wire N_1135 ; wire N_1136 ; wire N_679 ; wire N_675 ; wire un18_OilI1_0_a2_1z ; wire N_1147 ; wire N_1133 ; wire un52_OilI1 ; wire N_1137 ; wire l1II1 ; wire N_1119 ; wire un36_Ioli0 ; wire N_1118 ; wire N_1124 ; wire N_16 ; wire N_133 ; wire un1_Ii0O1 ; wire un1_o01O1_0 ; wire CoreAPB3_0_0_APBmslave0_PWRITE ; wire un4_Ooo11_1 ; wire un1_ooiO1 ; wire N_82_2 ; wire N_1112 ; wire liO019_i_1 ; wire N_1206 ; wire tx_fifo_write_sig14_i_2 ; wire rx_fifo_read_0 ; wire N_1130 ; wire N_1127 ; wire N_1115 ; wire N_1120 ; wire N_1117 ; wire N_1128 ; wire N_1126 ; wire N_1121 ; wire l0lo1_1z ; wire un80_OilI1_0_a2_1z ; wire N_1114 ; wire N_1123 ; wire o1II1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [17:0] Iolo1_Z; wire [21:0] Oolo1_Z; wire [9:9] OilI1_0_i_a3_5_Z; wire [10:9] OilI1_0_i_a3_25_Z; wire [10:10] OilI1_0_i_a3_25_1_Z; wire [11:11] OilI1_i_a3_25_1_Z; wire [11:0] OilI1_i_a3_25_Z; wire [17:2] i0lo1_1_Z; wire [8:2] i0lo1_29_1_Z; wire [17:2] i0lo1_0_Z; wire [8:2] i0lo1_29_Z; wire [43:0] o0lo1; wire [11:0] OilI1_i_a3_3_Z; wire [11:0] OilI1_i_a3_24_Z; wire [1:1] OilI1_i_a3_4_Z; wire [11:0] OilI1_i_a3_6_Z; wire [7:3] un11_i0lo1_Z; wire [12:12] un36_i0lo1_Z; wire [4:4] un41_i0lo1_Z; wire [8:2] i0lo1_13_Z; wire [8:2] i0lo1_12_Z; wire [12:2] i0lo1_11_Z; wire [12:2] i0lo1_10_Z; wire [17:2] i0lo1_9_Z; wire [17:2] i0lo1_8_Z; wire [8:2] i0lo1_7_Z; wire [12:2] i0lo1_6_Z; wire [17:2] i0lo1_5_Z; wire [17:2] i0lo1_4_Z; wire [17:12] i0lo1_3_Z; wire [17:12] i0lo1_2_Z; wire [2:2] un91_i0lo1_Z; wire [8:2] i0lo1_28_Z; wire [8:2] i0lo1_27_Z; wire [8:2] i0lo1_25_Z; wire [8:2] i0lo1_23_Z; wire [8:2] i0lo1_22_Z; wire [8:2] i0lo1_21_Z; wire [8:2] i0lo1_20_Z; wire [8:3] i0lo1_24_Z; wire [7:3] i0lo1_26_Z; wire [2:2] i0lo1_34_Z; wire [8:2] i0lo1_31_Z; wire [8:2] i0lo1_30_Z; wire [8:5] i0lo1_35_Z; wire [7:2] i0lo1_39_Z; wire [8:2] i0lo1_38_Z; wire [7:2] i0lo1_40_Z; wire [11:11] OilI1_i_a3_15_Z; wire [11:0] OilI1_i_a3_14_Z; wire [11:0] OilI1_i_a3_13_Z; wire [11:0] OilI1_i_a3_12_Z; wire [11:0] OilI1_i_a3_11_Z; wire [11:0] OilI1_i_a3_10_Z; wire [11:0] OilI1_i_a3_9_Z; wire [11:0] OilI1_i_a3_8_Z; wire [11:0] OilI1_i_a3_7_Z; wire [11:0] OilI1_i_a3_2_Z; wire [11:11] OilI1_i_a3_1_Z; wire [11:0] OilI1_i_a3_0_Z; wire [10:9] OilI1_0_i_a3_15_Z; wire [10:9] OilI1_0_i_a3_14_Z; wire [10:9] OilI1_0_i_a3_13_Z; wire [10:9] OilI1_0_i_a3_12_Z; wire [10:9] OilI1_0_i_a3_11_Z; wire [10:9] OilI1_0_i_a3_10_Z; wire [10:9] OilI1_0_i_a3_9_Z; wire [10:9] OilI1_0_i_a3_8_Z; wire [10:9] OilI1_0_i_a3_7_Z; wire [10:9] OilI1_0_i_a3_6_Z; wire [10:9] OilI1_0_i_a3_3_Z; wire [10:9] OilI1_0_i_a3_2_Z; wire [10:9] OilI1_0_i_a3_1_Z; wire [10:9] OilI1_0_i_a3_0_Z; wire [1:0] OilI1_i_a3_5_Z; wire [11:0] OilI1_i_a3_32_Z; wire [11:0] OilI1_i_a3_31_Z; wire [11:0] OilI1_i_a3_30_Z; wire [11:0] OilI1_i_a3_29_Z; wire [11:0] OilI1_i_a3_28_Z; wire [11:0] OilI1_i_a3_27_Z; wire [11:0] OilI1_i_a3_26_Z; wire [10:9] OilI1_0_i_a3_32_Z; wire [10:9] OilI1_0_i_a3_31_Z; wire [10:9] OilI1_0_i_a3_30_Z; wire [10:9] OilI1_0_i_a3_29_Z; wire [10:9] OilI1_0_i_a3_28_Z; wire [10:9] OilI1_0_i_a3_27_Z; wire [10:9] OilI1_0_i_a3_26_Z; wire [1:0] OilI1_i_a3_16_Z; wire [11:11] OilI1_i_a3_35_Z; wire [11:0] OilI1_i_a3_34_Z; wire [11:0] OilI1_i_a3_33_Z; wire [10:9] OilI1_0_i_a3_35_Z; wire [10:9] OilI1_0_i_a3_34_Z; wire [10:9] OilI1_0_i_a3_33_Z; wire [10:9] OilI1_0_i_a3_24_Z; wire [1:0] OilI1_i_a3_23_Z; wire [11:0] OilI1_i_a3_43_Z; wire [10:9] OilI1_0_i_a3_43_Z; wire [11:0] OilI1_i_a3_42_Z; wire [11:11] OilI1_i_a3_44_Z; wire [10:9] OilI1_0_i_a3_44_Z; wire [10:9] OilI1_0_i_a3_42_Z; wire [1:0] OilI1_i_a3_41_Z; wire I0lo1_Z ; wire VCC ; wire O0lo1_Z ; wire GND ; wire illo1_Z ; wire Iolo14 ; wire Oolo17 ; wire N_1781 ; wire N_1784 ; wire N_1776 ; wire N_1773 ; wire N_1103 ; wire Iolo14_0_a2_0_Z ; wire N_1148 ; wire N_1145 ; wire N_1143 ; wire N_586 ; wire N_1144 ; wire NN_1 ; wire N_89 ; wire N_457 ; wire N_1116 ; wire N_1122 ; wire N_1793 ; wire N_1790 ; wire N_1789 ; wire N_1771 ; wire N_1763 ; wire N_1149 ; wire N_1783 ; wire N_1768 ; wire N_1764 ; wire N_1153 ; wire N_1785 ; wire N_1782 ; wire N_1778 ; wire N_1777 ; wire N_1772 ; wire N_1767 ; wire N_1766 ; wire N_1762 ; wire N_1152 ; wire N_1770 ; wire N_1779 ; wire N_1788 ; wire N_1800 ; wire N_1797 ; wire N_1775 ; wire N_1682 ; wire N_1642 ; wire N_1786 ; wire N_1791 ; wire N_1769 ; wire N_1792 ; wire N_1795 ; wire N_1796 ; wire N_1798 ; wire N_1774 ; wire N_1780 ; wire N_1787 ; wire N_1799 ; // @28:490844 SLE I0lo1 ( .Q(I0lo1_Z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O0lo1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:490812 SLE O0lo1 ( .Q(O0lo1_Z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(illo1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:490780 SLE illo1 ( .Q(illo1_Z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(o1II1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492994 SLE \Iolo1[14] ( .Q(Iolo1_12), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[14]), .EN(Iolo14), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492994 SLE \Iolo1[13] ( .Q(Iolo1_11), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[13]), .EN(Iolo14), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492994 SLE \Iolo1[12] ( .Q(Iolo1_10), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .EN(Iolo14), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492994 SLE \Iolo1[11] ( .Q(Iolo1_Z[11]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .EN(Iolo14), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492994 SLE \Iolo1[10] ( .Q(Iolo1_Z[10]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .EN(Iolo14), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492994 SLE \Iolo1[9] ( .Q(Iolo1_Z[9]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .EN(Iolo14), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492994 SLE \Iolo1[8] ( .Q(Iolo1_6), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .EN(Iolo14), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492994 SLE \Iolo1[7] ( .Q(Iolo1_5), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .EN(Iolo14), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492994 SLE \Iolo1[6] ( .Q(Iolo1_4), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(Iolo14), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492994 SLE \Iolo1[5] ( .Q(Iolo1_3), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(Iolo14), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492994 SLE \Iolo1[4] ( .Q(Iolo1_2), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(Iolo14), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492994 SLE \Iolo1[3] ( .Q(Iolo1_1), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(Iolo14), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492994 SLE \Iolo1[2] ( .Q(Iolo1_0), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(Iolo14), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492994 SLE \Iolo1[1] ( .Q(Iolo1_Z[1]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(Iolo14), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492994 SLE \Iolo1[0] ( .Q(Iolo1_Z[0]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(Iolo14), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492929 SLE \Oolo1[7] ( .Q(Oolo1_5), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .EN(Oolo17), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492929 SLE \Oolo1[6] ( .Q(Oolo1_4), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(Oolo17), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492929 SLE \Oolo1[5] ( .Q(Oolo1_3), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(Oolo17), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492929 SLE \Oolo1[4] ( .Q(Oolo1_2), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(Oolo17), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492929 SLE \Oolo1[3] ( .Q(Oolo1_1), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(Oolo17), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492929 SLE \Oolo1[2] ( .Q(Oolo1_0), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(Oolo17), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492929 SLE \Oolo1[1] ( .Q(Oolo1_Z[1]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(Oolo17), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492929 SLE \Oolo1[0] ( .Q(Oolo1_Z[0]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(Oolo17), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492994 SLE \Iolo1[21] ( .Q(Iolo1_19), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[21]), .EN(Iolo14), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492994 SLE \Iolo1[20] ( .Q(Iolo1_18), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[20]), .EN(Iolo14), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492994 SLE \Iolo1[19] ( .Q(Iolo1_17), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[19]), .EN(Iolo14), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492994 SLE \Iolo1[18] ( .Q(Iolo1_16), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[18]), .EN(Iolo14), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492994 SLE \Iolo1[17] ( .Q(Iolo1_Z[17]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[17]), .EN(Iolo14), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492994 SLE \Iolo1[16] ( .Q(Iolo1_14), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[16]), .EN(Iolo14), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492994 SLE \Iolo1[15] ( .Q(Iolo1_Z[15]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[15]), .EN(Iolo14), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492929 SLE \Oolo1[22] ( .Q(Oolo1_20), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[28]), .EN(Oolo17), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492929 SLE \Oolo1[21] ( .Q(Oolo1_Z[21]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[27]), .EN(Oolo17), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492929 SLE \Oolo1[20] ( .Q(Oolo1_18), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[26]), .EN(Oolo17), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492929 SLE \Oolo1[19] ( .Q(Oolo1_Z[19]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[25]), .EN(Oolo17), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492929 SLE \Oolo1[18] ( .Q(Oolo1_16), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[18]), .EN(Oolo17), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492929 SLE \Oolo1[17] ( .Q(Oolo1_Z[17]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[17]), .EN(Oolo17), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492929 SLE \Oolo1[16] ( .Q(Oolo1_14), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[16]), .EN(Oolo17), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492929 SLE \Oolo1[15] ( .Q(Oolo1_13), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[15]), .EN(Oolo17), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492929 SLE \Oolo1[14] ( .Q(Oolo1_12), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[14]), .EN(Oolo17), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492929 SLE \Oolo1[13] ( .Q(Oolo1_11), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[13]), .EN(Oolo17), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492929 SLE \Oolo1[12] ( .Q(Oolo1_10), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .EN(Oolo17), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492929 SLE \Oolo1[11] ( .Q(Oolo1_Z[11]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .EN(Oolo17), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492929 SLE \Oolo1[10] ( .Q(Oolo1_Z[10]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .EN(Oolo17), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492929 SLE \Oolo1[9] ( .Q(Oolo1_Z[9]), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .EN(Oolo17), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492929 SLE \Oolo1[8] ( .Q(Oolo1_6), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .EN(Oolo17), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492929 SLE \Oolo1[25] ( .Q(Oolo1_23), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[31]), .EN(Oolo17), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492929 SLE \Oolo1[24] ( .Q(Oolo1_22), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[30]), .EN(Oolo17), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492929 SLE \Oolo1[23] ( .Q(Oolo1_21), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[29]), .EN(Oolo17), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:492443 CFG4 \OilI1_0_i_a3_25[9] ( .A(N_1123), .B(OilI1_0_i_a3_5_Z[9]), .C(cnt30[9]), .D(N_1114), .Y(OilI1_0_i_a3_25_Z[9]) ); defparam \OilI1_0_i_a3_25[9] .INIT=16'h4CCC; // @28:492443 CFG3 \OilI1_0_i_a3_25[10] ( .A(cnt17[10]), .B(N_1781), .C(OilI1_0_i_a3_25_1_Z[10]), .Y(OilI1_0_i_a3_25_Z[10]) ); defparam \OilI1_0_i_a3_25[10] .INIT=8'h70; // @28:492443 CFG4 \OilI1_0_i_a3_25_1[10] ( .A(i0Io1[10]), .B(cnt32[10]), .C(N_1784), .D(N_1776), .Y(OilI1_0_i_a3_25_1_Z[10]) ); defparam \OilI1_0_i_a3_25_1[10] .INIT=16'h153F; // @28:492443 CFG3 \OilI1_i_a3_25[11] ( .A(cnt17[11]), .B(N_1781), .C(OilI1_i_a3_25_1_Z[11]), .Y(OilI1_i_a3_25_Z[11]) ); defparam \OilI1_i_a3_25[11] .INIT=8'h70; // @28:492443 CFG4 \OilI1_i_a3_25_1[11] ( .A(i0Io1[11]), .B(cnt32[11]), .C(N_1784), .D(N_1776), .Y(OilI1_i_a3_25_1_Z[11]) ); defparam \OilI1_i_a3_25_1[11] .INIT=16'h153F; // @28:491772 CFG3 \i0lo1_29[3] ( .A(i0lo1_1_Z[3]), .B(i0lo1_29_1_Z[3]), .C(i0lo1_0_Z[3]), .Y(i0lo1_29_Z[3]) ); defparam \i0lo1_29[3] .INIT=8'hFB; // @28:491772 CFG4 \i0lo1_29_1[3] ( .A(O1Io1[3]), .B(cnt33[3]), .C(o0lo1[41]), .D(o0lo1[33]), .Y(i0lo1_29_1_Z[3]) ); defparam \i0lo1_29_1[3] .INIT=16'h135F; // @28:491772 CFG3 \i0lo1_29[6] ( .A(i0lo1_1_Z[6]), .B(i0lo1_29_1_Z[6]), .C(i0lo1_0_Z[6]), .Y(i0lo1_29_Z[6]) ); defparam \i0lo1_29[6] .INIT=8'hFB; // @28:491772 CFG4 \i0lo1_29_1[6] ( .A(O1Io1[6]), .B(cnt33[6]), .C(o0lo1[41]), .D(o0lo1[33]), .Y(i0lo1_29_1_Z[6]) ); defparam \i0lo1_29_1[6] .INIT=16'h135F; // @28:491772 CFG3 \i0lo1_29[4] ( .A(i0lo1_1_Z[4]), .B(i0lo1_29_1_Z[4]), .C(i0lo1_0_Z[4]), .Y(i0lo1_29_Z[4]) ); defparam \i0lo1_29[4] .INIT=8'hFB; // @28:491772 CFG4 \i0lo1_29_1[4] ( .A(O1Io1[4]), .B(cnt33[4]), .C(o0lo1[41]), .D(o0lo1[33]), .Y(i0lo1_29_1_Z[4]) ); defparam \i0lo1_29_1[4] .INIT=16'h135F; // @28:491772 CFG3 \i0lo1_29[5] ( .A(i0lo1_1_Z[5]), .B(i0lo1_29_1_Z[5]), .C(i0lo1_0_Z[5]), .Y(i0lo1_29_Z[5]) ); defparam \i0lo1_29[5] .INIT=8'hFB; // @28:491772 CFG4 \i0lo1_29_1[5] ( .A(O1Io1[5]), .B(cnt33[5]), .C(o0lo1[41]), .D(o0lo1[33]), .Y(i0lo1_29_1_Z[5]) ); defparam \i0lo1_29_1[5] .INIT=16'h135F; // @28:491772 CFG3 \i0lo1_29[7] ( .A(i0lo1_1_Z[7]), .B(i0lo1_29_1_Z[7]), .C(i0lo1_0_Z[7]), .Y(i0lo1_29_Z[7]) ); defparam \i0lo1_29[7] .INIT=8'hFB; // @28:491772 CFG4 \i0lo1_29_1[7] ( .A(O1Io1[7]), .B(cnt33[7]), .C(o0lo1[41]), .D(o0lo1[33]), .Y(i0lo1_29_1_Z[7]) ); defparam \i0lo1_29_1[7] .INIT=16'h135F; // @28:491772 CFG3 \i0lo1_29[8] ( .A(i0lo1_1_Z[8]), .B(i0lo1_29_1_Z[8]), .C(i0lo1_0_Z[8]), .Y(i0lo1_29_Z[8]) ); defparam \i0lo1_29[8] .INIT=8'hFB; // @28:491772 CFG4 \i0lo1_29_1[8] ( .A(O1Io1[8]), .B(cnt33[8]), .C(o0lo1[41]), .D(o0lo1[33]), .Y(i0lo1_29_1_Z[8]) ); defparam \i0lo1_29_1[8] .INIT=16'h135F; // @28:491772 CFG3 \i0lo1_29[2] ( .A(i0lo1_1_Z[2]), .B(i0lo1_29_1_Z[2]), .C(i0lo1_0_Z[2]), .Y(i0lo1_29_Z[2]) ); defparam \i0lo1_29[2] .INIT=8'hFB; // @28:491772 CFG4 \i0lo1_29_1[2] ( .A(O1Io1[2]), .B(cnt33[2]), .C(o0lo1[41]), .D(o0lo1[33]), .Y(i0lo1_29_1_Z[2]) ); defparam \i0lo1_29_1[2] .INIT=16'h135F; // @28:492443 CFG3 \OilI1_i_a3_24[0] ( .A(cnt17[0]), .B(N_1781), .C(OilI1_i_a3_3_Z[0]), .Y(OilI1_i_a3_24_Z[0]) ); defparam \OilI1_i_a3_24[0] .INIT=8'h70; // @28:492443 CFG2 \OilI1_i_a3_4[1] ( .A(N_1773), .B(cnt33[1]), .Y(OilI1_i_a3_4_Z[1]) ); defparam \OilI1_i_a3_4[1] .INIT=4'h7; // @28:492443 CFG2 \OilI1_i_a3_6[1] ( .A(un80_OilI1_0_a2_1z), .B(Oolo1_Z[1]), .Y(OilI1_i_a3_6_Z[1]) ); defparam \OilI1_i_a3_6[1] .INIT=4'h7; // @28:490879 CFG2 l0lo1 ( .A(O0lo1_Z), .B(I0lo1_Z), .Y(l0lo1_1z) ); defparam l0lo1.INIT=4'h2; // @28:491215 CFG2 \o0lo1_0_a2_1[8] ( .A(CoreAPB3_0_0_APBmslave0_PADDR_5), .B(CoreAPB3_0_0_APBmslave0_PADDR_6), .Y(N_1103) ); defparam \o0lo1_0_a2_1[8] .INIT=4'h2; // @28:493026 CFG3 Iolo14_0_a2_0 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_6), .B(CoreAPB3_0_0_APBmslave0_PADDR_5), .C(paddr_1z_0), .Y(Iolo14_0_a2_0_Z) ); defparam Iolo14_0_a2_0.INIT=8'h02; // @28:491117 CFG3 \o0lo1_0_a2[1] ( .A(PADDR_0), .B(CoreAPB3_0_0_APBmslave0_PADDR_0), .C(CoreAPB3_0_0_APBmslave0_PADDR_3), .Y(N_1121) ); defparam \o0lo1_0_a2[1] .INIT=8'h04; // @28:491229 CFG3 \o0lo1_0_a2[9] ( .A(PADDR_0), .B(CoreAPB3_0_0_APBmslave0_PADDR_0), .C(CoreAPB3_0_0_APBmslave0_PADDR_3), .Y(N_1126) ); defparam \o0lo1_0_a2[9] .INIT=8'h40; // @28:491635 CFG4 \o0lo1_0_a2[38] ( .A(CoreAPB3_0_0_APBmslave0_PADDR_5), .B(CoreAPB3_0_0_APBmslave0_PADDR_6), .C(CoreAPB3_0_0_APBmslave0_PADDR_1), .D(paddr_1z_0), .Y(N_1148) ); defparam \o0lo1_0_a2[38] .INIT=16'h0040; // @28:491187 CFG4 \o0lo1_0_a2_0[6] ( .A(CoreAPB3_0_0_APBmslave0_PADDR_5), .B(CoreAPB3_0_0_APBmslave0_PADDR_6), .C(CoreAPB3_0_0_APBmslave0_PADDR_1), .D(paddr_1z_0), .Y(N_1145) ); defparam \o0lo1_0_a2_0[6] .INIT=16'h0020; // @28:491215 CFG4 \o0lo1_0_a2_0[8] ( .A(CoreAPB3_0_0_APBmslave0_PADDR_5), .B(CoreAPB3_0_0_APBmslave0_PADDR_6), .C(CoreAPB3_0_0_APBmslave0_PADDR_1), .D(paddr_1z_0), .Y(N_1143) ); defparam \o0lo1_0_a2_0[8] .INIT=16'h0002; // @28:491621 CFG4 \o0lo1_0_a2[37] ( .A(CoreAPB3_0_0_APBmslave0_PADDR_5), .B(CoreAPB3_0_0_APBmslave0_PADDR_6), .C(CoreAPB3_0_0_APBmslave0_PADDR_1), .D(paddr_1z_0), .Y(N_1128) ); defparam \o0lo1_0_a2[37] .INIT=16'h0004; // @28:491285 CFG3 \o0lo1_0_a2[13] ( .A(PADDR_0), .B(CoreAPB3_0_0_APBmslave0_PADDR_0), .C(CoreAPB3_0_0_APBmslave0_PADDR_3), .Y(N_1117) ); defparam \o0lo1_0_a2[13] .INIT=8'h80; // @28:491299 CFG3 \o0lo1_0_a2[14] ( .A(PADDR_0), .B(CoreAPB3_0_0_APBmslave0_PADDR_0), .C(CoreAPB3_0_0_APBmslave0_PADDR_3), .Y(N_1114) ); defparam \o0lo1_0_a2[14] .INIT=8'h20; // @28:491215 CFG3 \o0lo1_0_a2[8] ( .A(PADDR_0), .B(CoreAPB3_0_0_APBmslave0_PADDR_0), .C(CoreAPB3_0_0_APBmslave0_PADDR_3), .Y(N_1120) ); defparam \o0lo1_0_a2[8] .INIT=8'h10; // @28:491103 CFG3 \o0lo1_0_a2[0] ( .A(PADDR_0), .B(CoreAPB3_0_0_APBmslave0_PADDR_0), .C(CoreAPB3_0_0_APBmslave0_PADDR_3), .Y(N_1115) ); defparam \o0lo1_0_a2[0] .INIT=8'h01; // @28:491201 CFG3 \o0lo1_0_a2[7] ( .A(PADDR_0), .B(CoreAPB3_0_0_APBmslave0_PADDR_0), .C(CoreAPB3_0_0_APBmslave0_PADDR_3), .Y(N_1127) ); defparam \o0lo1_0_a2[7] .INIT=8'h08; // @28:491187 CFG3 \o0lo1_0_a2[6] ( .A(PADDR_0), .B(CoreAPB3_0_0_APBmslave0_PADDR_0), .C(CoreAPB3_0_0_APBmslave0_PADDR_3), .Y(N_1130) ); defparam \o0lo1_0_a2[6] .INIT=8'h02; // @28:492447 CFG3 un3_OilI1_i_m3 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_6), .B(CoreAPB3_0_0_APBmslave0_PADDR_5), .C(paddr_1z_0), .Y(N_586) ); defparam un3_OilI1_i_m3.INIT=8'hB9; // @28:491411 CFG4 \o0lo1_0_a2[22] ( .A(CoreAPB3_0_0_APBmslave0_PADDR_5), .B(CoreAPB3_0_0_APBmslave0_PADDR_6), .C(CoreAPB3_0_0_APBmslave0_PADDR_1), .D(paddr_1z_0), .Y(N_1144) ); defparam \o0lo1_0_a2[22] .INIT=16'h2000; // @28:491257 CFG3 \o0lo1_0_a3[11] ( .A(rx_fifo_read_0), .B(N_1103), .C(N_1126), .Y(o0lo1[11]) ); defparam \o0lo1_0_a3[11] .INIT=8'h80; // @28:491243 CFG4 \o0lo1_0_a3[10] ( .A(tx_fifo_write_sig14_i_2), .B(CoreAPB3_0_0_APBmslave0_PADDR_3), .C(N_1103), .D(rx_fifo_read_0), .Y(o0lo1[10]) ); defparam \o0lo1_0_a3[10] .INIT=16'h8000; // @28:491145 CFG3 \o0lo1_0_a3[3] ( .A(rx_fifo_read_0), .B(N_1103), .C(N_1121), .Y(o0lo1[3]) ); defparam \o0lo1_0_a3[3] .INIT=8'h80; // @28:491131 CFG4 \o0lo1_0_a3[2] ( .A(tx_fifo_write_sig14_i_2), .B(CoreAPB3_0_0_APBmslave0_PADDR_3), .C(N_1103), .D(rx_fifo_read_0), .Y(o0lo1[2]) ); defparam \o0lo1_0_a3[2] .INIT=16'h2000; // @28:491565 CFG4 \o0lo1_0_a3[33] ( .A(N_1206), .B(N_1121), .C(CoreAPB3_0_0_APBmslave0_PADDR_6), .D(CoreAPB3_0_0_APBmslave0_PADDR_5), .Y(o0lo1[33]) ); defparam \o0lo1_0_a3[33] .INIT=16'h0080; // @28:491313 CFG4 \o0lo1_0_a3[15] ( .A(liO019_i_1), .B(CoreAPB3_0_0_APBmslave0_PADDR_0), .C(N_1103), .D(rx_fifo_read_0), .Y(o0lo1[15]) ); defparam \o0lo1_0_a3[15] .INIT=16'h8000; // @28:491201 CFG4 \o0lo1_0_a3[7] ( .A(N_1112), .B(CoreAPB3_0_0_APBmslave0_PADDR_0), .C(N_1103), .D(rx_fifo_read_0), .Y(o0lo1[7]) ); defparam \o0lo1_0_a3[7] .INIT=16'h8000; // @28:491187 CFG4 \o0lo1_0_a3[6] ( .A(N_1112), .B(CoreAPB3_0_0_APBmslave0_PADDR_0), .C(N_1103), .D(rx_fifo_read_0), .Y(o0lo1[6]) ); defparam \o0lo1_0_a3[6] .INIT=16'h2000; // @28:491271 CFG4 \o0lo1_0_a3[12] ( .A(CoreAPB3_0_0_APBmslave0_PADDR_0), .B(liO019_i_1), .C(N_1206), .D(N_1103), .Y(o0lo1[12]) ); defparam \o0lo1_0_a3[12] .INIT=16'h4000; // @28:491173 CFG4 \o0lo1_0_a3[5] ( .A(N_1206), .B(N_1103), .C(CoreAPB3_0_0_APBmslave0_PADDR_0), .D(N_1112), .Y(o0lo1[5]) ); defparam \o0lo1_0_a3[5] .INIT=16'h8000; // @28:491159 CFG4 \o0lo1_0_a3[4] ( .A(N_1206), .B(N_1103), .C(CoreAPB3_0_0_APBmslave0_PADDR_0), .D(N_1112), .Y(o0lo1[4]) ); defparam \o0lo1_0_a3[4] .INIT=16'h0800; // @28:491593 CFG4 \o0lo1_0_a3[35] ( .A(CoreAPB3_0_0_APBmslave0_PADDR_5), .B(CoreAPB3_0_0_APBmslave0_PADDR_6), .C(N_1121), .D(rx_fifo_read_0), .Y(o0lo1[35]) ); defparam \o0lo1_0_a3[35] .INIT=16'h4000; // @28:491579 CFG3 \o0lo1_0_a3[34] ( .A(CoreAPB3_0_0_APBmslave0_PADDR_3), .B(N_1148), .C(tx_fifo_write_sig14_i_2), .Y(o0lo1[34]) ); defparam \o0lo1_0_a3[34] .INIT=8'h40; // @28:491117 CFG3 \o0lo1_0_a3[1] ( .A(N_1121), .B(N_1206), .C(N_1103), .Y(o0lo1[1]) ); defparam \o0lo1_0_a3[1] .INIT=8'h80; // @28:491103 CFG4 \o0lo1_0_a3[0] ( .A(CoreAPB3_0_0_APBmslave0_PADDR_3), .B(tx_fifo_write_sig14_i_2), .C(N_1206), .D(N_1103), .Y(o0lo1[0]) ); defparam \o0lo1_0_a3[0] .INIT=16'h4000; // @28:491705 CFG4 \o0lo1_0_a3[43] ( .A(CoreAPB3_0_0_APBmslave0_PADDR_5), .B(CoreAPB3_0_0_APBmslave0_PADDR_6), .C(N_1126), .D(rx_fifo_read_0), .Y(o0lo1[43]) ); defparam \o0lo1_0_a3[43] .INIT=16'h4000; // @28:491691 CFG3 \o0lo1_0_a3[42] ( .A(CoreAPB3_0_0_APBmslave0_PADDR_3), .B(N_1148), .C(tx_fifo_write_sig14_i_2), .Y(o0lo1[42]) ); defparam \o0lo1_0_a3[42] .INIT=8'h80; // @28:491649 CFG4 \o0lo1_0_a3[39] ( .A(CoreAPB3_0_0_APBmslave0_PADDR_5), .B(CoreAPB3_0_0_APBmslave0_PADDR_6), .C(N_1127), .D(rx_fifo_read_0), .Y(o0lo1[39]) ); defparam \o0lo1_0_a3[39] .INIT=16'h4000; // @28:491635 CFG4 \o0lo1_0_a3[38] ( .A(CoreAPB3_0_0_APBmslave0_PADDR_5), .B(CoreAPB3_0_0_APBmslave0_PADDR_6), .C(N_1130), .D(rx_fifo_read_0), .Y(o0lo1[38]) ); defparam \o0lo1_0_a3[38] .INIT=16'h4000; // @28:491285 CFG4 \o0lo1_0_a3[13] ( .A(CoreAPB3_0_0_APBmslave0_PADDR_0), .B(liO019_i_1), .C(N_1206), .D(N_1103), .Y(o0lo1[13]) ); defparam \o0lo1_0_a3[13] .INIT=16'h8000; // @28:491229 CFG3 \o0lo1_0_a3[9] ( .A(N_1126), .B(N_1206), .C(N_1103), .Y(o0lo1[9]) ); defparam \o0lo1_0_a3[9] .INIT=8'h80; // @28:491215 CFG4 \o0lo1_0_a3[8] ( .A(CoreAPB3_0_0_APBmslave0_PADDR_3), .B(tx_fifo_write_sig14_i_2), .C(N_1206), .D(N_1103), .Y(o0lo1[8]) ); defparam \o0lo1_0_a3[8] .INIT=16'h8000; // @28:491551 CFG3 \o0lo1_0_a3[32] ( .A(CoreAPB3_0_0_APBmslave0_PADDR_3), .B(N_1128), .C(tx_fifo_write_sig14_i_2), .Y(o0lo1[32]) ); defparam \o0lo1_0_a3[32] .INIT=8'h40; // @28:491677 CFG4 \o0lo1_0_a3[41] ( .A(N_1206), .B(N_1126), .C(CoreAPB3_0_0_APBmslave0_PADDR_6), .D(CoreAPB3_0_0_APBmslave0_PADDR_5), .Y(o0lo1[41]) ); defparam \o0lo1_0_a3[41] .INIT=16'h0080; // @28:491663 CFG3 \o0lo1_0_a3[40] ( .A(CoreAPB3_0_0_APBmslave0_PADDR_3), .B(N_1128), .C(tx_fifo_write_sig14_i_2), .Y(o0lo1[40]) ); defparam \o0lo1_0_a3[40] .INIT=8'h80; // @28:491299 CFG4 \o0lo1_0_a3[14] ( .A(liO019_i_1), .B(CoreAPB3_0_0_APBmslave0_PADDR_0), .C(N_1103), .D(rx_fifo_read_0), .Y(o0lo1[14]) ); defparam \o0lo1_0_a3[14] .INIT=16'h2000; // @28:491800 CFG4 \un11_i0lo1[3] ( .A(CoreAPB3_0_0_APBmslave0_PADDR_3), .B(cnt02[3]), .C(tx_fifo_write_sig14_i_2), .D(N_1145), .Y(un11_i0lo1_Z[3]) ); defparam \un11_i0lo1[3] .INIT=16'h4000; // @28:491800 CFG4 \un11_i0lo1[7] ( .A(CoreAPB3_0_0_APBmslave0_PADDR_3), .B(cnt02[7]), .C(tx_fifo_write_sig14_i_2), .D(N_1145), .Y(un11_i0lo1_Z[7]) ); defparam \un11_i0lo1[7] .INIT=16'h4000; // @28:491870 CFG4 \un36_i0lo1[12] ( .A(N_1103), .B(N_1127), .C(cnt07[12]), .D(rx_fifo_read_0), .Y(un36_i0lo1_Z[12]) ); defparam \un36_i0lo1[12] .INIT=16'h8000; // @28:491884 CFG4 \un41_i0lo1[4] ( .A(CoreAPB3_0_0_APBmslave0_PADDR_3), .B(cnt08[4]), .C(tx_fifo_write_sig14_i_2), .D(N_1143), .Y(un41_i0lo1_Z[4]) ); defparam \un41_i0lo1[4] .INIT=16'h8000; // @28:491495 CFG4 \o0lo1_0_a3[28] ( .A(N_1103), .B(N_1114), .C(paddr_1z_0), .D(CoreAPB3_0_0_APBmslave0_PADDR_1), .Y(o0lo1[28]) ); defparam \o0lo1_0_a3[28] .INIT=16'h0080; // @28:491453 CFG4 \o0lo1_0_a3[25] ( .A(N_1103), .B(N_1126), .C(paddr_1z_0), .D(CoreAPB3_0_0_APBmslave0_PADDR_1), .Y(o0lo1[25]) ); defparam \o0lo1_0_a3[25] .INIT=16'h0080; // @28:491383 CFG4 \o0lo1_0_a3[20] ( .A(N_1103), .B(N_1130), .C(paddr_1z_0), .D(CoreAPB3_0_0_APBmslave0_PADDR_1), .Y(o0lo1[20]) ); defparam \o0lo1_0_a3[20] .INIT=16'h0080; // @28:491341 CFG4 \o0lo1_0_a3[17] ( .A(N_1103), .B(N_1121), .C(paddr_1z_0), .D(CoreAPB3_0_0_APBmslave0_PADDR_1), .Y(o0lo1[17]) ); defparam \o0lo1_0_a3[17] .INIT=16'h0080; // @28:491327 CFG4 \o0lo1_0_a3[16] ( .A(N_1103), .B(N_1115), .C(paddr_1z_0), .D(CoreAPB3_0_0_APBmslave0_PADDR_1), .Y(o0lo1[16]) ); defparam \o0lo1_0_a3[16] .INIT=16'h0080; // @28:491509 CFG4 \o0lo1_0_a3[29] ( .A(N_1103), .B(N_1117), .C(paddr_1z_0), .D(CoreAPB3_0_0_APBmslave0_PADDR_1), .Y(o0lo1[29]) ); defparam \o0lo1_0_a3[29] .INIT=16'h0080; // @28:491439 CFG4 \o0lo1_0_a3[24] ( .A(N_1103), .B(N_1120), .C(paddr_1z_0), .D(CoreAPB3_0_0_APBmslave0_PADDR_1), .Y(o0lo1[24]) ); defparam \o0lo1_0_a3[24] .INIT=16'h0080; // @28:491397 CFG4 \o0lo1_0_a3[21] ( .A(N_1103), .B(N_1127), .C(paddr_1z_0), .D(CoreAPB3_0_0_APBmslave0_PADDR_1), .Y(o0lo1[21]) ); defparam \o0lo1_0_a3[21] .INIT=16'h0080; // @28:491481 CFG4 \o0lo1_0_a3[27] ( .A(N_1103), .B(N_1126), .C(paddr_1z_0), .D(CoreAPB3_0_0_APBmslave0_PADDR_1), .Y(o0lo1[27]) ); defparam \o0lo1_0_a3[27] .INIT=16'h8000; // @28:491467 CFG4 \o0lo1_0_a3[26] ( .A(N_1103), .B(N_1120), .C(paddr_1z_0), .D(CoreAPB3_0_0_APBmslave0_PADDR_1), .Y(o0lo1[26]) ); defparam \o0lo1_0_a3[26] .INIT=16'h8000; // @28:491369 CFG4 \o0lo1_0_a3[19] ( .A(N_1103), .B(N_1121), .C(paddr_1z_0), .D(CoreAPB3_0_0_APBmslave0_PADDR_1), .Y(o0lo1[19]) ); defparam \o0lo1_0_a3[19] .INIT=16'h8000; // @28:491355 CFG4 \o0lo1_0_a3[18] ( .A(N_1103), .B(N_1115), .C(paddr_1z_0), .D(CoreAPB3_0_0_APBmslave0_PADDR_1), .Y(o0lo1[18]) ); defparam \o0lo1_0_a3[18] .INIT=16'h8000; // @28:491537 CFG4 \o0lo1_0_a3[31] ( .A(N_1103), .B(N_1117), .C(paddr_1z_0), .D(CoreAPB3_0_0_APBmslave0_PADDR_1), .Y(o0lo1[31]) ); defparam \o0lo1_0_a3[31] .INIT=16'h8000; // @28:491425 CFG4 \o0lo1_0_a3[23] ( .A(N_1103), .B(N_1127), .C(paddr_1z_0), .D(CoreAPB3_0_0_APBmslave0_PADDR_1), .Y(o0lo1[23]) ); defparam \o0lo1_0_a3[23] .INIT=16'h8000; // @28:491411 CFG4 \o0lo1_0_a3[22] ( .A(N_1103), .B(N_1130), .C(paddr_1z_0), .D(CoreAPB3_0_0_APBmslave0_PADDR_1), .Y(o0lo1[22]) ); defparam \o0lo1_0_a3[22] .INIT=16'h8000; // @28:491523 CFG4 \o0lo1_0_a3[30] ( .A(N_1103), .B(N_1114), .C(paddr_1z_0), .D(CoreAPB3_0_0_APBmslave0_PADDR_1), .Y(o0lo1[30]) ); defparam \o0lo1_0_a3[30] .INIT=16'h8000; // @28:491772 CFG4 \i0lo1_13[2] ( .A(cnt02[2]), .B(cnt08[2]), .C(o0lo1[8]), .D(o0lo1[2]), .Y(i0lo1_13_Z[2]) ); defparam \i0lo1_13[2] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_12[2] ( .A(cnt10[2]), .B(cnt00[2]), .C(o0lo1[10]), .D(o0lo1[0]), .Y(i0lo1_12_Z[2]) ); defparam \i0lo1_12[2] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_11[2] ( .A(cnt32[2]), .B(I1Io1[2]), .C(o0lo1[42]), .D(o0lo1[32]), .Y(i0lo1_11_Z[2]) ); defparam \i0lo1_11[2] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_10[2] ( .A(i0Io1[2]), .B(cnt34[2]), .C(o0lo1[40]), .D(o0lo1[34]), .Y(i0lo1_10_Z[2]) ); defparam \i0lo1_10[2] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_9[2] ( .A(cnt05[2]), .B(cnt04[2]), .C(o0lo1[5]), .D(o0lo1[4]), .Y(i0lo1_9_Z[2]) ); defparam \i0lo1_9[2] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_8[2] ( .A(cnt07[2]), .B(cnt01[2]), .C(o0lo1[7]), .D(o0lo1[1]), .Y(i0lo1_8_Z[2]) ); defparam \i0lo1_8[2] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_7[2] ( .A(cnt14[2]), .B(cnt12[2]), .C(o0lo1[14]), .D(o0lo1[12]), .Y(i0lo1_7_Z[2]) ); defparam \i0lo1_7[2] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_6[2] ( .A(cnt03[2]), .B(cnt11[2]), .C(o0lo1[11]), .D(o0lo1[3]), .Y(i0lo1_6_Z[2]) ); defparam \i0lo1_6[2] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_5[2] ( .A(cnt13[2]), .B(cnt06[2]), .C(o0lo1[13]), .D(o0lo1[6]), .Y(i0lo1_5_Z[2]) ); defparam \i0lo1_5[2] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_4[2] ( .A(cnt15[2]), .B(cnt09[2]), .C(o0lo1[15]), .D(o0lo1[9]), .Y(i0lo1_4_Z[2]) ); defparam \i0lo1_4[2] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_1[2] ( .A(cnt35[2]), .B(l1Io1[2]), .C(o0lo1[43]), .D(o0lo1[35]), .Y(i0lo1_1_Z[2]) ); defparam \i0lo1_1[2] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_0[2] ( .A(cnt39[2]), .B(cnt38[2]), .C(o0lo1[39]), .D(o0lo1[38]), .Y(i0lo1_0_Z[2]) ); defparam \i0lo1_0[2] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_13[8] ( .A(cnt10[8]), .B(cnt08[8]), .C(o0lo1[10]), .D(o0lo1[8]), .Y(i0lo1_13_Z[8]) ); defparam \i0lo1_13[8] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_12[8] ( .A(cnt02[8]), .B(cnt00[8]), .C(o0lo1[2]), .D(o0lo1[0]), .Y(i0lo1_12_Z[8]) ); defparam \i0lo1_12[8] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_11[8] ( .A(cnt34[8]), .B(I1Io1[8]), .C(o0lo1[42]), .D(o0lo1[34]), .Y(i0lo1_11_Z[8]) ); defparam \i0lo1_11[8] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_10[8] ( .A(i0Io1[8]), .B(cnt32[8]), .C(o0lo1[40]), .D(o0lo1[32]), .Y(i0lo1_10_Z[8]) ); defparam \i0lo1_10[8] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_9[8] ( .A(cnt05[8]), .B(cnt04[8]), .C(o0lo1[5]), .D(o0lo1[4]), .Y(i0lo1_9_Z[8]) ); defparam \i0lo1_9[8] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_8[8] ( .A(cnt07[8]), .B(cnt01[8]), .C(o0lo1[7]), .D(o0lo1[1]), .Y(i0lo1_8_Z[8]) ); defparam \i0lo1_8[8] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_7[8] ( .A(cnt14[8]), .B(cnt12[8]), .C(o0lo1[14]), .D(o0lo1[12]), .Y(i0lo1_7_Z[8]) ); defparam \i0lo1_7[8] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_6[8] ( .A(cnt03[8]), .B(cnt11[8]), .C(o0lo1[11]), .D(o0lo1[3]), .Y(i0lo1_6_Z[8]) ); defparam \i0lo1_6[8] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_5[8] ( .A(cnt13[8]), .B(cnt06[8]), .C(o0lo1[13]), .D(o0lo1[6]), .Y(i0lo1_5_Z[8]) ); defparam \i0lo1_5[8] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_4[8] ( .A(cnt15[8]), .B(cnt09[8]), .C(o0lo1[15]), .D(o0lo1[9]), .Y(i0lo1_4_Z[8]) ); defparam \i0lo1_4[8] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_1[8] ( .A(cnt35[8]), .B(l1Io1[8]), .C(o0lo1[43]), .D(o0lo1[35]), .Y(i0lo1_1_Z[8]) ); defparam \i0lo1_1[8] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_0[8] ( .A(cnt39[8]), .B(cnt38[8]), .C(o0lo1[39]), .D(o0lo1[38]), .Y(i0lo1_0_Z[8]) ); defparam \i0lo1_0[8] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_13[7] ( .A(cnt10[7]), .B(cnt08[7]), .C(o0lo1[10]), .D(o0lo1[8]), .Y(i0lo1_13_Z[7]) ); defparam \i0lo1_13[7] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_11[7] ( .A(cnt34[7]), .B(I1Io1[7]), .C(o0lo1[42]), .D(o0lo1[34]), .Y(i0lo1_11_Z[7]) ); defparam \i0lo1_11[7] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_10[7] ( .A(i0Io1[7]), .B(cnt32[7]), .C(o0lo1[40]), .D(o0lo1[32]), .Y(i0lo1_10_Z[7]) ); defparam \i0lo1_10[7] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_9[7] ( .A(cnt05[7]), .B(cnt04[7]), .C(o0lo1[5]), .D(o0lo1[4]), .Y(i0lo1_9_Z[7]) ); defparam \i0lo1_9[7] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_8[7] ( .A(cnt07[7]), .B(cnt01[7]), .C(o0lo1[7]), .D(o0lo1[1]), .Y(i0lo1_8_Z[7]) ); defparam \i0lo1_8[7] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_7[7] ( .A(cnt14[7]), .B(cnt12[7]), .C(o0lo1[14]), .D(o0lo1[12]), .Y(i0lo1_7_Z[7]) ); defparam \i0lo1_7[7] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_6[7] ( .A(cnt03[7]), .B(cnt11[7]), .C(o0lo1[11]), .D(o0lo1[3]), .Y(i0lo1_6_Z[7]) ); defparam \i0lo1_6[7] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_5[7] ( .A(cnt13[7]), .B(cnt06[7]), .C(o0lo1[13]), .D(o0lo1[6]), .Y(i0lo1_5_Z[7]) ); defparam \i0lo1_5[7] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_4[7] ( .A(cnt15[7]), .B(cnt09[7]), .C(o0lo1[15]), .D(o0lo1[9]), .Y(i0lo1_4_Z[7]) ); defparam \i0lo1_4[7] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_1[7] ( .A(cnt35[7]), .B(l1Io1[7]), .C(o0lo1[43]), .D(o0lo1[35]), .Y(i0lo1_1_Z[7]) ); defparam \i0lo1_1[7] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_0[7] ( .A(cnt39[7]), .B(cnt38[7]), .C(o0lo1[39]), .D(o0lo1[38]), .Y(i0lo1_0_Z[7]) ); defparam \i0lo1_0[7] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_13[5] ( .A(cnt10[5]), .B(cnt08[5]), .C(o0lo1[10]), .D(o0lo1[8]), .Y(i0lo1_13_Z[5]) ); defparam \i0lo1_13[5] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_12[5] ( .A(cnt02[5]), .B(cnt00[5]), .C(o0lo1[2]), .D(o0lo1[0]), .Y(i0lo1_12_Z[5]) ); defparam \i0lo1_12[5] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_11[5] ( .A(cnt34[5]), .B(I1Io1[5]), .C(o0lo1[42]), .D(o0lo1[34]), .Y(i0lo1_11_Z[5]) ); defparam \i0lo1_11[5] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_10[5] ( .A(i0Io1[5]), .B(cnt32[5]), .C(o0lo1[40]), .D(o0lo1[32]), .Y(i0lo1_10_Z[5]) ); defparam \i0lo1_10[5] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_9[5] ( .A(cnt05[5]), .B(cnt04[5]), .C(o0lo1[5]), .D(o0lo1[4]), .Y(i0lo1_9_Z[5]) ); defparam \i0lo1_9[5] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_8[5] ( .A(cnt07[5]), .B(cnt01[5]), .C(o0lo1[7]), .D(o0lo1[1]), .Y(i0lo1_8_Z[5]) ); defparam \i0lo1_8[5] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_7[5] ( .A(cnt14[5]), .B(cnt12[5]), .C(o0lo1[14]), .D(o0lo1[12]), .Y(i0lo1_7_Z[5]) ); defparam \i0lo1_7[5] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_6[5] ( .A(cnt03[5]), .B(cnt11[5]), .C(o0lo1[11]), .D(o0lo1[3]), .Y(i0lo1_6_Z[5]) ); defparam \i0lo1_6[5] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_5[5] ( .A(cnt13[5]), .B(cnt06[5]), .C(o0lo1[13]), .D(o0lo1[6]), .Y(i0lo1_5_Z[5]) ); defparam \i0lo1_5[5] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_4[5] ( .A(cnt15[5]), .B(cnt09[5]), .C(o0lo1[15]), .D(o0lo1[9]), .Y(i0lo1_4_Z[5]) ); defparam \i0lo1_4[5] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_1[5] ( .A(cnt35[5]), .B(l1Io1[5]), .C(o0lo1[43]), .D(o0lo1[35]), .Y(i0lo1_1_Z[5]) ); defparam \i0lo1_1[5] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_0[5] ( .A(cnt39[5]), .B(cnt38[5]), .C(o0lo1[39]), .D(o0lo1[38]), .Y(i0lo1_0_Z[5]) ); defparam \i0lo1_0[5] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_13[4] ( .A(cnt02[4]), .B(cnt10[4]), .C(o0lo1[10]), .D(o0lo1[2]), .Y(i0lo1_13_Z[4]) ); defparam \i0lo1_13[4] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_11[4] ( .A(cnt34[4]), .B(I1Io1[4]), .C(o0lo1[42]), .D(o0lo1[34]), .Y(i0lo1_11_Z[4]) ); defparam \i0lo1_11[4] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_10[4] ( .A(i0Io1[4]), .B(cnt32[4]), .C(o0lo1[40]), .D(o0lo1[32]), .Y(i0lo1_10_Z[4]) ); defparam \i0lo1_10[4] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_9[4] ( .A(cnt05[4]), .B(cnt01[4]), .C(o0lo1[5]), .D(o0lo1[1]), .Y(i0lo1_9_Z[4]) ); defparam \i0lo1_9[4] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_8[4] ( .A(cnt04[4]), .B(cnt07[4]), .C(o0lo1[7]), .D(o0lo1[4]), .Y(i0lo1_8_Z[4]) ); defparam \i0lo1_8[4] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_7[4] ( .A(cnt14[4]), .B(cnt12[4]), .C(o0lo1[14]), .D(o0lo1[12]), .Y(i0lo1_7_Z[4]) ); defparam \i0lo1_7[4] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_6[4] ( .A(cnt03[4]), .B(cnt11[4]), .C(o0lo1[11]), .D(o0lo1[3]), .Y(i0lo1_6_Z[4]) ); defparam \i0lo1_6[4] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_5[4] ( .A(cnt13[4]), .B(cnt06[4]), .C(o0lo1[13]), .D(o0lo1[6]), .Y(i0lo1_5_Z[4]) ); defparam \i0lo1_5[4] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_4[4] ( .A(cnt15[4]), .B(cnt09[4]), .C(o0lo1[15]), .D(o0lo1[9]), .Y(i0lo1_4_Z[4]) ); defparam \i0lo1_4[4] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_1[4] ( .A(cnt35[4]), .B(l1Io1[4]), .C(o0lo1[43]), .D(o0lo1[35]), .Y(i0lo1_1_Z[4]) ); defparam \i0lo1_1[4] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_0[4] ( .A(cnt39[4]), .B(cnt38[4]), .C(o0lo1[39]), .D(o0lo1[38]), .Y(i0lo1_0_Z[4]) ); defparam \i0lo1_0[4] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_13[6] ( .A(cnt10[6]), .B(cnt08[6]), .C(o0lo1[10]), .D(o0lo1[8]), .Y(i0lo1_13_Z[6]) ); defparam \i0lo1_13[6] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_12[6] ( .A(cnt02[6]), .B(cnt00[6]), .C(o0lo1[2]), .D(o0lo1[0]), .Y(i0lo1_12_Z[6]) ); defparam \i0lo1_12[6] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_11[6] ( .A(cnt34[6]), .B(I1Io1[6]), .C(o0lo1[42]), .D(o0lo1[34]), .Y(i0lo1_11_Z[6]) ); defparam \i0lo1_11[6] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_10[6] ( .A(i0Io1[6]), .B(cnt32[6]), .C(o0lo1[40]), .D(o0lo1[32]), .Y(i0lo1_10_Z[6]) ); defparam \i0lo1_10[6] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_9[6] ( .A(cnt05[6]), .B(cnt04[6]), .C(o0lo1[5]), .D(o0lo1[4]), .Y(i0lo1_9_Z[6]) ); defparam \i0lo1_9[6] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_8[6] ( .A(cnt07[6]), .B(cnt01[6]), .C(o0lo1[7]), .D(o0lo1[1]), .Y(i0lo1_8_Z[6]) ); defparam \i0lo1_8[6] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_7[6] ( .A(cnt14[6]), .B(cnt12[6]), .C(o0lo1[14]), .D(o0lo1[12]), .Y(i0lo1_7_Z[6]) ); defparam \i0lo1_7[6] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_6[6] ( .A(cnt03[6]), .B(cnt11[6]), .C(o0lo1[11]), .D(o0lo1[3]), .Y(i0lo1_6_Z[6]) ); defparam \i0lo1_6[6] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_5[6] ( .A(cnt13[6]), .B(cnt06[6]), .C(o0lo1[13]), .D(o0lo1[6]), .Y(i0lo1_5_Z[6]) ); defparam \i0lo1_5[6] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_4[6] ( .A(cnt15[6]), .B(cnt09[6]), .C(o0lo1[15]), .D(o0lo1[9]), .Y(i0lo1_4_Z[6]) ); defparam \i0lo1_4[6] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_1[6] ( .A(cnt35[6]), .B(l1Io1[6]), .C(o0lo1[43]), .D(o0lo1[35]), .Y(i0lo1_1_Z[6]) ); defparam \i0lo1_1[6] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_0[6] ( .A(cnt39[6]), .B(cnt38[6]), .C(o0lo1[39]), .D(o0lo1[38]), .Y(i0lo1_0_Z[6]) ); defparam \i0lo1_0[6] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_13[3] ( .A(cnt10[3]), .B(cnt08[3]), .C(o0lo1[10]), .D(o0lo1[8]), .Y(i0lo1_13_Z[3]) ); defparam \i0lo1_13[3] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_11[3] ( .A(cnt34[3]), .B(I1Io1[3]), .C(o0lo1[42]), .D(o0lo1[34]), .Y(i0lo1_11_Z[3]) ); defparam \i0lo1_11[3] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_10[3] ( .A(i0Io1[3]), .B(cnt32[3]), .C(o0lo1[40]), .D(o0lo1[32]), .Y(i0lo1_10_Z[3]) ); defparam \i0lo1_10[3] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_9[3] ( .A(cnt05[3]), .B(cnt04[3]), .C(o0lo1[5]), .D(o0lo1[4]), .Y(i0lo1_9_Z[3]) ); defparam \i0lo1_9[3] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_8[3] ( .A(cnt07[3]), .B(cnt01[3]), .C(o0lo1[7]), .D(o0lo1[1]), .Y(i0lo1_8_Z[3]) ); defparam \i0lo1_8[3] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_7[3] ( .A(cnt14[3]), .B(cnt12[3]), .C(o0lo1[14]), .D(o0lo1[12]), .Y(i0lo1_7_Z[3]) ); defparam \i0lo1_7[3] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_6[3] ( .A(cnt03[3]), .B(cnt11[3]), .C(o0lo1[11]), .D(o0lo1[3]), .Y(i0lo1_6_Z[3]) ); defparam \i0lo1_6[3] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_5[3] ( .A(cnt13[3]), .B(cnt06[3]), .C(o0lo1[13]), .D(o0lo1[6]), .Y(i0lo1_5_Z[3]) ); defparam \i0lo1_5[3] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_4[3] ( .A(cnt15[3]), .B(cnt09[3]), .C(o0lo1[15]), .D(o0lo1[9]), .Y(i0lo1_4_Z[3]) ); defparam \i0lo1_4[3] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_1[3] ( .A(cnt35[3]), .B(l1Io1[3]), .C(o0lo1[43]), .D(o0lo1[35]), .Y(i0lo1_1_Z[3]) ); defparam \i0lo1_1[3] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_0[3] ( .A(cnt39[3]), .B(cnt38[3]), .C(o0lo1[39]), .D(o0lo1[38]), .Y(i0lo1_0_Z[3]) ); defparam \i0lo1_0[3] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_4[12] ( .A(cnt10[12]), .B(cnt08[12]), .C(o0lo1[10]), .D(o0lo1[8]), .Y(i0lo1_4_Z[12]) ); defparam \i0lo1_4[12] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_3[12] ( .A(cnt05[12]), .B(cnt02[12]), .C(o0lo1[5]), .D(o0lo1[2]), .Y(i0lo1_3_Z[12]) ); defparam \i0lo1_3[12] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_2[12] ( .A(cnt04[12]), .B(cnt01[12]), .C(o0lo1[4]), .D(o0lo1[1]), .Y(i0lo1_2_Z[12]) ); defparam \i0lo1_2[12] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_0[12] ( .A(cnt06[12]), .B(cnt03[12]), .C(o0lo1[6]), .D(o0lo1[3]), .Y(i0lo1_0_Z[12]) ); defparam \i0lo1_0[12] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_4[16] ( .A(cnt10[16]), .B(cnt08[16]), .C(o0lo1[10]), .D(o0lo1[8]), .Y(i0lo1_4_Z[16]) ); defparam \i0lo1_4[16] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_3[16] ( .A(cnt05[16]), .B(cnt02[16]), .C(o0lo1[5]), .D(o0lo1[2]), .Y(i0lo1_3_Z[16]) ); defparam \i0lo1_3[16] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_2[16] ( .A(cnt04[16]), .B(cnt01[16]), .C(o0lo1[4]), .D(o0lo1[1]), .Y(i0lo1_2_Z[16]) ); defparam \i0lo1_2[16] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_1[16] ( .A(cnt07[16]), .B(cnt11[16]), .C(o0lo1[11]), .D(o0lo1[7]), .Y(i0lo1_1_Z[16]) ); defparam \i0lo1_1[16] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_0[16] ( .A(cnt06[16]), .B(cnt03[16]), .C(o0lo1[6]), .D(o0lo1[3]), .Y(i0lo1_0_Z[16]) ); defparam \i0lo1_0[16] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_4[17] ( .A(cnt10[17]), .B(cnt08[17]), .C(o0lo1[10]), .D(o0lo1[8]), .Y(i0lo1_4_Z[17]) ); defparam \i0lo1_4[17] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_3[17] ( .A(cnt05[17]), .B(cnt02[17]), .C(o0lo1[5]), .D(o0lo1[2]), .Y(i0lo1_3_Z[17]) ); defparam \i0lo1_3[17] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_2[17] ( .A(cnt04[17]), .B(cnt01[17]), .C(o0lo1[4]), .D(o0lo1[1]), .Y(i0lo1_2_Z[17]) ); defparam \i0lo1_2[17] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_1[17] ( .A(cnt07[17]), .B(cnt11[17]), .C(o0lo1[11]), .D(o0lo1[7]), .Y(i0lo1_1_Z[17]) ); defparam \i0lo1_1[17] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_0[17] ( .A(cnt06[17]), .B(cnt03[17]), .C(o0lo1[6]), .D(o0lo1[3]), .Y(i0lo1_0_Z[17]) ); defparam \i0lo1_0[17] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_4[14] ( .A(cnt10[14]), .B(cnt08[14]), .C(o0lo1[10]), .D(o0lo1[8]), .Y(i0lo1_4_Z[14]) ); defparam \i0lo1_4[14] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_3[14] ( .A(cnt05[14]), .B(cnt02[14]), .C(o0lo1[5]), .D(o0lo1[2]), .Y(i0lo1_3_Z[14]) ); defparam \i0lo1_3[14] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_2[14] ( .A(cnt04[14]), .B(cnt01[14]), .C(o0lo1[4]), .D(o0lo1[1]), .Y(i0lo1_2_Z[14]) ); defparam \i0lo1_2[14] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_1[14] ( .A(cnt07[14]), .B(cnt11[14]), .C(o0lo1[11]), .D(o0lo1[7]), .Y(i0lo1_1_Z[14]) ); defparam \i0lo1_1[14] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_0[14] ( .A(cnt06[14]), .B(cnt03[14]), .C(o0lo1[6]), .D(o0lo1[3]), .Y(i0lo1_0_Z[14]) ); defparam \i0lo1_0[14] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_4[13] ( .A(cnt10[13]), .B(cnt08[13]), .C(o0lo1[10]), .D(o0lo1[8]), .Y(i0lo1_4_Z[13]) ); defparam \i0lo1_4[13] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_3[13] ( .A(cnt04[13]), .B(cnt02[13]), .C(o0lo1[4]), .D(o0lo1[2]), .Y(i0lo1_3_Z[13]) ); defparam \i0lo1_3[13] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_2[13] ( .A(cnt05[13]), .B(cnt01[13]), .C(o0lo1[5]), .D(o0lo1[1]), .Y(i0lo1_2_Z[13]) ); defparam \i0lo1_2[13] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_1[13] ( .A(cnt07[13]), .B(cnt11[13]), .C(o0lo1[11]), .D(o0lo1[7]), .Y(i0lo1_1_Z[13]) ); defparam \i0lo1_1[13] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_0[13] ( .A(cnt06[13]), .B(cnt03[13]), .C(o0lo1[6]), .D(o0lo1[3]), .Y(i0lo1_0_Z[13]) ); defparam \i0lo1_0[13] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_4[15] ( .A(cnt10[15]), .B(cnt08[15]), .C(o0lo1[10]), .D(o0lo1[8]), .Y(i0lo1_4_Z[15]) ); defparam \i0lo1_4[15] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_3[15] ( .A(cnt05[15]), .B(cnt02[15]), .C(o0lo1[5]), .D(o0lo1[2]), .Y(i0lo1_3_Z[15]) ); defparam \i0lo1_3[15] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_2[15] ( .A(cnt04[15]), .B(cnt01[15]), .C(o0lo1[4]), .D(o0lo1[1]), .Y(i0lo1_2_Z[15]) ); defparam \i0lo1_2[15] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_1[15] ( .A(cnt07[15]), .B(cnt11[15]), .C(o0lo1[11]), .D(o0lo1[7]), .Y(i0lo1_1_Z[15]) ); defparam \i0lo1_1[15] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_0[15] ( .A(cnt06[15]), .B(cnt03[15]), .C(o0lo1[6]), .D(o0lo1[3]), .Y(i0lo1_0_Z[15]) ); defparam \i0lo1_0[15] .INIT=16'hECA0; // @28:492024 CFG3 \un91_i0lo1[2] ( .A(cnt18[2]), .B(N_1144), .C(N_1115), .Y(un91_i0lo1_Z[2]) ); defparam \un91_i0lo1[2] .INIT=8'h80; // @28:491772 CFG4 \i0lo1_28[2] ( .A(cnt25[2]), .B(cnt24[2]), .C(o0lo1[25]), .D(o0lo1[24]), .Y(i0lo1_28_Z[2]) ); defparam \i0lo1_28[2] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_27[2] ( .A(cnt26[2]), .B(cnt27[2]), .C(o0lo1[27]), .D(o0lo1[26]), .Y(i0lo1_27_Z[2]) ); defparam \i0lo1_27[2] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_25[2] ( .A(cnt16[2]), .B(cnt30[2]), .C(o0lo1[30]), .D(o0lo1[16]), .Y(i0lo1_25_Z[2]) ); defparam \i0lo1_25[2] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_23[2] ( .A(cnt29[2]), .B(cnt20[2]), .C(o0lo1[29]), .D(o0lo1[20]), .Y(i0lo1_23_Z[2]) ); defparam \i0lo1_23[2] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_22[2] ( .A(cnt21[2]), .B(cnt19[2]), .C(o0lo1[21]), .D(o0lo1[19]), .Y(i0lo1_22_Z[2]) ); defparam \i0lo1_22[2] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_21[2] ( .A(cnt22[2]), .B(cnt28[2]), .C(o0lo1[28]), .D(o0lo1[22]), .Y(i0lo1_21_Z[2]) ); defparam \i0lo1_21[2] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_20[2] ( .A(cnt31[2]), .B(cnt17[2]), .C(o0lo1[31]), .D(o0lo1[17]), .Y(i0lo1_20_Z[2]) ); defparam \i0lo1_20[2] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_28[8] ( .A(cnt25[8]), .B(cnt24[8]), .C(o0lo1[25]), .D(o0lo1[24]), .Y(i0lo1_28_Z[8]) ); defparam \i0lo1_28[8] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_27[8] ( .A(cnt26[8]), .B(cnt27[8]), .C(o0lo1[27]), .D(o0lo1[26]), .Y(i0lo1_27_Z[8]) ); defparam \i0lo1_27[8] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_25[8] ( .A(cnt28[8]), .B(cnt19[8]), .C(o0lo1[28]), .D(o0lo1[19]), .Y(i0lo1_25_Z[8]) ); defparam \i0lo1_25[8] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_24[8] ( .A(cnt18[8]), .B(cnt31[8]), .C(o0lo1[31]), .D(o0lo1[18]), .Y(i0lo1_24_Z[8]) ); defparam \i0lo1_24[8] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_23[8] ( .A(cnt23[8]), .B(cnt30[8]), .C(o0lo1[30]), .D(o0lo1[23]), .Y(i0lo1_23_Z[8]) ); defparam \i0lo1_23[8] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_22[8] ( .A(cnt16[8]), .B(cnt17[8]), .C(o0lo1[17]), .D(o0lo1[16]), .Y(i0lo1_22_Z[8]) ); defparam \i0lo1_22[8] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_21[8] ( .A(cnt21[8]), .B(cnt22[8]), .C(o0lo1[22]), .D(o0lo1[21]), .Y(i0lo1_21_Z[8]) ); defparam \i0lo1_21[8] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_20[8] ( .A(cnt29[8]), .B(cnt20[8]), .C(o0lo1[29]), .D(o0lo1[20]), .Y(i0lo1_20_Z[8]) ); defparam \i0lo1_20[8] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_28[7] ( .A(cnt25[7]), .B(cnt24[7]), .C(o0lo1[25]), .D(o0lo1[24]), .Y(i0lo1_28_Z[7]) ); defparam \i0lo1_28[7] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_27[7] ( .A(cnt26[7]), .B(cnt27[7]), .C(o0lo1[27]), .D(o0lo1[26]), .Y(i0lo1_27_Z[7]) ); defparam \i0lo1_27[7] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_26[7] ( .A(cnt00[7]), .B(un11_i0lo1_Z[7]), .C(o0lo1[0]), .D(i0lo1_13_Z[7]), .Y(i0lo1_26_Z[7]) ); defparam \i0lo1_26[7] .INIT=16'hFFEC; // @28:491772 CFG4 \i0lo1_25[7] ( .A(cnt28[7]), .B(cnt19[7]), .C(o0lo1[28]), .D(o0lo1[19]), .Y(i0lo1_25_Z[7]) ); defparam \i0lo1_25[7] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_24[7] ( .A(cnt18[7]), .B(cnt31[7]), .C(o0lo1[31]), .D(o0lo1[18]), .Y(i0lo1_24_Z[7]) ); defparam \i0lo1_24[7] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_23[7] ( .A(cnt23[7]), .B(cnt30[7]), .C(o0lo1[30]), .D(o0lo1[23]), .Y(i0lo1_23_Z[7]) ); defparam \i0lo1_23[7] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_22[7] ( .A(cnt16[7]), .B(cnt17[7]), .C(o0lo1[17]), .D(o0lo1[16]), .Y(i0lo1_22_Z[7]) ); defparam \i0lo1_22[7] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_21[7] ( .A(cnt21[7]), .B(cnt22[7]), .C(o0lo1[22]), .D(o0lo1[21]), .Y(i0lo1_21_Z[7]) ); defparam \i0lo1_21[7] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_20[7] ( .A(cnt29[7]), .B(cnt20[7]), .C(o0lo1[29]), .D(o0lo1[20]), .Y(i0lo1_20_Z[7]) ); defparam \i0lo1_20[7] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_28[5] ( .A(cnt25[5]), .B(cnt24[5]), .C(o0lo1[25]), .D(o0lo1[24]), .Y(i0lo1_28_Z[5]) ); defparam \i0lo1_28[5] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_27[5] ( .A(cnt26[5]), .B(cnt27[5]), .C(o0lo1[27]), .D(o0lo1[26]), .Y(i0lo1_27_Z[5]) ); defparam \i0lo1_27[5] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_25[5] ( .A(cnt28[5]), .B(cnt19[5]), .C(o0lo1[28]), .D(o0lo1[19]), .Y(i0lo1_25_Z[5]) ); defparam \i0lo1_25[5] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_24[5] ( .A(cnt18[5]), .B(cnt31[5]), .C(o0lo1[31]), .D(o0lo1[18]), .Y(i0lo1_24_Z[5]) ); defparam \i0lo1_24[5] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_23[5] ( .A(cnt23[5]), .B(cnt30[5]), .C(o0lo1[30]), .D(o0lo1[23]), .Y(i0lo1_23_Z[5]) ); defparam \i0lo1_23[5] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_22[5] ( .A(cnt16[5]), .B(cnt17[5]), .C(o0lo1[17]), .D(o0lo1[16]), .Y(i0lo1_22_Z[5]) ); defparam \i0lo1_22[5] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_21[5] ( .A(cnt21[5]), .B(cnt22[5]), .C(o0lo1[22]), .D(o0lo1[21]), .Y(i0lo1_21_Z[5]) ); defparam \i0lo1_21[5] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_20[5] ( .A(cnt29[5]), .B(cnt20[5]), .C(o0lo1[29]), .D(o0lo1[20]), .Y(i0lo1_20_Z[5]) ); defparam \i0lo1_20[5] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_28[4] ( .A(cnt25[4]), .B(cnt24[4]), .C(o0lo1[25]), .D(o0lo1[24]), .Y(i0lo1_28_Z[4]) ); defparam \i0lo1_28[4] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_27[4] ( .A(cnt26[4]), .B(cnt27[4]), .C(o0lo1[27]), .D(o0lo1[26]), .Y(i0lo1_27_Z[4]) ); defparam \i0lo1_27[4] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_26[4] ( .A(cnt00[4]), .B(un41_i0lo1_Z[4]), .C(o0lo1[0]), .D(i0lo1_13_Z[4]), .Y(i0lo1_26_Z[4]) ); defparam \i0lo1_26[4] .INIT=16'hFFEC; // @28:491772 CFG4 \i0lo1_25[4] ( .A(cnt28[4]), .B(cnt19[4]), .C(o0lo1[28]), .D(o0lo1[19]), .Y(i0lo1_25_Z[4]) ); defparam \i0lo1_25[4] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_24[4] ( .A(cnt31[4]), .B(cnt16[4]), .C(o0lo1[31]), .D(o0lo1[16]), .Y(i0lo1_24_Z[4]) ); defparam \i0lo1_24[4] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_23[4] ( .A(cnt23[4]), .B(cnt30[4]), .C(o0lo1[30]), .D(o0lo1[23]), .Y(i0lo1_23_Z[4]) ); defparam \i0lo1_23[4] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_22[4] ( .A(cnt18[4]), .B(cnt22[4]), .C(o0lo1[22]), .D(o0lo1[18]), .Y(i0lo1_22_Z[4]) ); defparam \i0lo1_22[4] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_21[4] ( .A(cnt21[4]), .B(cnt17[4]), .C(o0lo1[21]), .D(o0lo1[17]), .Y(i0lo1_21_Z[4]) ); defparam \i0lo1_21[4] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_20[4] ( .A(cnt29[4]), .B(cnt20[4]), .C(o0lo1[29]), .D(o0lo1[20]), .Y(i0lo1_20_Z[4]) ); defparam \i0lo1_20[4] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_28[6] ( .A(cnt25[6]), .B(cnt24[6]), .C(o0lo1[25]), .D(o0lo1[24]), .Y(i0lo1_28_Z[6]) ); defparam \i0lo1_28[6] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_27[6] ( .A(cnt26[6]), .B(cnt27[6]), .C(o0lo1[27]), .D(o0lo1[26]), .Y(i0lo1_27_Z[6]) ); defparam \i0lo1_27[6] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_25[6] ( .A(cnt28[6]), .B(cnt19[6]), .C(o0lo1[28]), .D(o0lo1[19]), .Y(i0lo1_25_Z[6]) ); defparam \i0lo1_25[6] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_24[6] ( .A(cnt18[6]), .B(cnt31[6]), .C(o0lo1[31]), .D(o0lo1[18]), .Y(i0lo1_24_Z[6]) ); defparam \i0lo1_24[6] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_23[6] ( .A(cnt23[6]), .B(cnt30[6]), .C(o0lo1[30]), .D(o0lo1[23]), .Y(i0lo1_23_Z[6]) ); defparam \i0lo1_23[6] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_22[6] ( .A(cnt16[6]), .B(cnt17[6]), .C(o0lo1[17]), .D(o0lo1[16]), .Y(i0lo1_22_Z[6]) ); defparam \i0lo1_22[6] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_21[6] ( .A(cnt21[6]), .B(cnt22[6]), .C(o0lo1[22]), .D(o0lo1[21]), .Y(i0lo1_21_Z[6]) ); defparam \i0lo1_21[6] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_20[6] ( .A(cnt29[6]), .B(cnt20[6]), .C(o0lo1[29]), .D(o0lo1[20]), .Y(i0lo1_20_Z[6]) ); defparam \i0lo1_20[6] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_28[3] ( .A(cnt25[3]), .B(cnt24[3]), .C(o0lo1[25]), .D(o0lo1[24]), .Y(i0lo1_28_Z[3]) ); defparam \i0lo1_28[3] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_27[3] ( .A(cnt26[3]), .B(cnt27[3]), .C(o0lo1[27]), .D(o0lo1[26]), .Y(i0lo1_27_Z[3]) ); defparam \i0lo1_27[3] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_26[3] ( .A(cnt00[3]), .B(un11_i0lo1_Z[3]), .C(o0lo1[0]), .D(i0lo1_13_Z[3]), .Y(i0lo1_26_Z[3]) ); defparam \i0lo1_26[3] .INIT=16'hFFEC; // @28:491772 CFG4 \i0lo1_25[3] ( .A(cnt28[3]), .B(cnt19[3]), .C(o0lo1[28]), .D(o0lo1[19]), .Y(i0lo1_25_Z[3]) ); defparam \i0lo1_25[3] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_24[3] ( .A(cnt18[3]), .B(cnt31[3]), .C(o0lo1[31]), .D(o0lo1[18]), .Y(i0lo1_24_Z[3]) ); defparam \i0lo1_24[3] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_23[3] ( .A(cnt23[3]), .B(cnt30[3]), .C(o0lo1[30]), .D(o0lo1[23]), .Y(i0lo1_23_Z[3]) ); defparam \i0lo1_23[3] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_22[3] ( .A(cnt16[3]), .B(cnt17[3]), .C(o0lo1[17]), .D(o0lo1[16]), .Y(i0lo1_22_Z[3]) ); defparam \i0lo1_22[3] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_21[3] ( .A(cnt21[3]), .B(cnt22[3]), .C(o0lo1[22]), .D(o0lo1[21]), .Y(i0lo1_21_Z[3]) ); defparam \i0lo1_21[3] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_20[3] ( .A(cnt29[3]), .B(cnt20[3]), .C(o0lo1[29]), .D(o0lo1[20]), .Y(i0lo1_20_Z[3]) ); defparam \i0lo1_20[3] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_9[12] ( .A(cnt27[12]), .B(cnt24[12]), .C(o0lo1[27]), .D(o0lo1[24]), .Y(i0lo1_9_Z[12]) ); defparam \i0lo1_9[12] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_8[12] ( .A(cnt26[12]), .B(cnt25[12]), .C(o0lo1[26]), .D(o0lo1[25]), .Y(i0lo1_8_Z[12]) ); defparam \i0lo1_8[12] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_6[12] ( .A(cnt11[12]), .B(un36_i0lo1_Z[12]), .C(o0lo1[11]), .D(i0lo1_2_Z[12]), .Y(i0lo1_6_Z[12]) ); defparam \i0lo1_6[12] .INIT=16'hFFEC; // @28:491772 CFG4 \i0lo1_9[16] ( .A(cnt27[16]), .B(cnt24[16]), .C(o0lo1[27]), .D(o0lo1[24]), .Y(i0lo1_9_Z[16]) ); defparam \i0lo1_9[16] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_8[16] ( .A(cnt26[16]), .B(cnt25[16]), .C(o0lo1[26]), .D(o0lo1[25]), .Y(i0lo1_8_Z[16]) ); defparam \i0lo1_8[16] .INIT=16'hECA0; // @28:491772 CFG3 \i0lo1_5[16] ( .A(cnt00[16]), .B(o0lo1[0]), .C(i0lo1_0_Z[16]), .Y(i0lo1_5_Z[16]) ); defparam \i0lo1_5[16] .INIT=8'hF8; // @28:491772 CFG4 \i0lo1_9[17] ( .A(cnt27[17]), .B(cnt24[17]), .C(o0lo1[27]), .D(o0lo1[24]), .Y(i0lo1_9_Z[17]) ); defparam \i0lo1_9[17] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_8[17] ( .A(cnt26[17]), .B(cnt25[17]), .C(o0lo1[26]), .D(o0lo1[25]), .Y(i0lo1_8_Z[17]) ); defparam \i0lo1_8[17] .INIT=16'hECA0; // @28:491772 CFG3 \i0lo1_5[17] ( .A(cnt00[17]), .B(o0lo1[0]), .C(i0lo1_0_Z[17]), .Y(i0lo1_5_Z[17]) ); defparam \i0lo1_5[17] .INIT=8'hF8; // @28:491772 CFG4 \i0lo1_9[14] ( .A(cnt27[14]), .B(cnt24[14]), .C(o0lo1[27]), .D(o0lo1[24]), .Y(i0lo1_9_Z[14]) ); defparam \i0lo1_9[14] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_8[14] ( .A(cnt26[14]), .B(cnt25[14]), .C(o0lo1[26]), .D(o0lo1[25]), .Y(i0lo1_8_Z[14]) ); defparam \i0lo1_8[14] .INIT=16'hECA0; // @28:491772 CFG3 \i0lo1_5[14] ( .A(cnt00[14]), .B(o0lo1[0]), .C(i0lo1_0_Z[14]), .Y(i0lo1_5_Z[14]) ); defparam \i0lo1_5[14] .INIT=8'hF8; // @28:491772 CFG4 \i0lo1_9[13] ( .A(cnt27[13]), .B(cnt24[13]), .C(o0lo1[27]), .D(o0lo1[24]), .Y(i0lo1_9_Z[13]) ); defparam \i0lo1_9[13] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_8[13] ( .A(cnt26[13]), .B(cnt25[13]), .C(o0lo1[26]), .D(o0lo1[25]), .Y(i0lo1_8_Z[13]) ); defparam \i0lo1_8[13] .INIT=16'hECA0; // @28:491772 CFG3 \i0lo1_5[13] ( .A(cnt00[13]), .B(o0lo1[0]), .C(i0lo1_0_Z[13]), .Y(i0lo1_5_Z[13]) ); defparam \i0lo1_5[13] .INIT=8'hF8; // @28:491772 CFG4 \i0lo1_9[15] ( .A(cnt27[15]), .B(cnt24[15]), .C(o0lo1[27]), .D(o0lo1[24]), .Y(i0lo1_9_Z[15]) ); defparam \i0lo1_9[15] .INIT=16'hECA0; // @28:491772 CFG4 \i0lo1_8[15] ( .A(cnt26[15]), .B(cnt25[15]), .C(o0lo1[26]), .D(o0lo1[25]), .Y(i0lo1_8_Z[15]) ); defparam \i0lo1_8[15] .INIT=16'hECA0; // @28:491772 CFG3 \i0lo1_5[15] ( .A(cnt00[15]), .B(o0lo1[0]), .C(i0lo1_0_Z[15]), .Y(i0lo1_5_Z[15]) ); defparam \i0lo1_5[15] .INIT=8'hF8; // @28:491772 CFG4 \i0lo1[18] ( .A(cnt07[18]), .B(cnt24[18]), .C(o0lo1[24]), .D(o0lo1[7]), .Y(i0lo1_3) ); defparam \i0lo1[18] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1[21] ( .A(cnt07[21]), .B(cnt24[21]), .C(o0lo1[24]), .D(o0lo1[7]), .Y(i0lo1_6) ); defparam \i0lo1[21] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1[19] ( .A(cnt07[19]), .B(cnt24[19]), .C(o0lo1[24]), .D(o0lo1[7]), .Y(i0lo1_4) ); defparam \i0lo1[19] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1[20] ( .A(cnt07[20]), .B(cnt24[20]), .C(o0lo1[24]), .D(o0lo1[7]), .Y(i0lo1_5) ); defparam \i0lo1[20] .INIT=16'hEAC0; // @28:491772 CFG4 \i0lo1_34[2] ( .A(cnt23[2]), .B(un91_i0lo1_Z[2]), .C(o0lo1[23]), .D(i0lo1_25_Z[2]), .Y(i0lo1_34_Z[2]) ); defparam \i0lo1_34[2] .INIT=16'hFFEC; // @28:491772 CFG4 \i0lo1_31[2] ( .A(i0lo1_11_Z[2]), .B(i0lo1_10_Z[2]), .C(i0lo1_9_Z[2]), .D(i0lo1_8_Z[2]), .Y(i0lo1_31_Z[2]) ); defparam \i0lo1_31[2] .INIT=16'hFFFE; // @28:491772 CFG4 \i0lo1_30[2] ( .A(i0lo1_5_Z[2]), .B(i0lo1_7_Z[2]), .C(i0lo1_6_Z[2]), .D(i0lo1_4_Z[2]), .Y(i0lo1_30_Z[2]) ); defparam \i0lo1_30[2] .INIT=16'hFFFE; // @28:491772 CFG3 \i0lo1_35[8] ( .A(i0lo1_12_Z[8]), .B(i0lo1_27_Z[8]), .C(i0lo1_13_Z[8]), .Y(i0lo1_35_Z[8]) ); defparam \i0lo1_35[8] .INIT=8'hFE; // @28:491772 CFG4 \i0lo1_31[8] ( .A(i0lo1_11_Z[8]), .B(i0lo1_10_Z[8]), .C(i0lo1_9_Z[8]), .D(i0lo1_8_Z[8]), .Y(i0lo1_31_Z[8]) ); defparam \i0lo1_31[8] .INIT=16'hFFFE; // @28:491772 CFG4 \i0lo1_30[8] ( .A(i0lo1_5_Z[8]), .B(i0lo1_7_Z[8]), .C(i0lo1_6_Z[8]), .D(i0lo1_4_Z[8]), .Y(i0lo1_30_Z[8]) ); defparam \i0lo1_30[8] .INIT=16'hFFFE; // @28:491772 CFG4 \i0lo1_31[7] ( .A(i0lo1_11_Z[7]), .B(i0lo1_10_Z[7]), .C(i0lo1_9_Z[7]), .D(i0lo1_8_Z[7]), .Y(i0lo1_31_Z[7]) ); defparam \i0lo1_31[7] .INIT=16'hFFFE; // @28:491772 CFG4 \i0lo1_30[7] ( .A(i0lo1_5_Z[7]), .B(i0lo1_7_Z[7]), .C(i0lo1_6_Z[7]), .D(i0lo1_4_Z[7]), .Y(i0lo1_30_Z[7]) ); defparam \i0lo1_30[7] .INIT=16'hFFFE; // @28:491772 CFG3 \i0lo1_35[5] ( .A(i0lo1_12_Z[5]), .B(i0lo1_27_Z[5]), .C(i0lo1_13_Z[5]), .Y(i0lo1_35_Z[5]) ); defparam \i0lo1_35[5] .INIT=8'hFE; // @28:491772 CFG4 \i0lo1_31[5] ( .A(i0lo1_11_Z[5]), .B(i0lo1_10_Z[5]), .C(i0lo1_9_Z[5]), .D(i0lo1_8_Z[5]), .Y(i0lo1_31_Z[5]) ); defparam \i0lo1_31[5] .INIT=16'hFFFE; // @28:491772 CFG4 \i0lo1_30[5] ( .A(i0lo1_5_Z[5]), .B(i0lo1_7_Z[5]), .C(i0lo1_6_Z[5]), .D(i0lo1_4_Z[5]), .Y(i0lo1_30_Z[5]) ); defparam \i0lo1_30[5] .INIT=16'hFFFE; // @28:491772 CFG4 \i0lo1_31[4] ( .A(i0lo1_10_Z[4]), .B(i0lo1_11_Z[4]), .C(i0lo1_9_Z[4]), .D(i0lo1_8_Z[4]), .Y(i0lo1_31_Z[4]) ); defparam \i0lo1_31[4] .INIT=16'hFFFE; // @28:491772 CFG4 \i0lo1_30[4] ( .A(i0lo1_5_Z[4]), .B(i0lo1_7_Z[4]), .C(i0lo1_6_Z[4]), .D(i0lo1_4_Z[4]), .Y(i0lo1_30_Z[4]) ); defparam \i0lo1_30[4] .INIT=16'hFFFE; // @28:491772 CFG3 \i0lo1_35[6] ( .A(i0lo1_12_Z[6]), .B(i0lo1_27_Z[6]), .C(i0lo1_13_Z[6]), .Y(i0lo1_35_Z[6]) ); defparam \i0lo1_35[6] .INIT=8'hFE; // @28:491772 CFG4 \i0lo1_31[6] ( .A(i0lo1_11_Z[6]), .B(i0lo1_10_Z[6]), .C(i0lo1_9_Z[6]), .D(i0lo1_8_Z[6]), .Y(i0lo1_31_Z[6]) ); defparam \i0lo1_31[6] .INIT=16'hFFFE; // @28:491772 CFG4 \i0lo1_30[6] ( .A(i0lo1_5_Z[6]), .B(i0lo1_7_Z[6]), .C(i0lo1_6_Z[6]), .D(i0lo1_4_Z[6]), .Y(i0lo1_30_Z[6]) ); defparam \i0lo1_30[6] .INIT=16'hFFFE; // @28:491772 CFG4 \i0lo1_31[3] ( .A(i0lo1_11_Z[3]), .B(i0lo1_10_Z[3]), .C(i0lo1_9_Z[3]), .D(i0lo1_8_Z[3]), .Y(i0lo1_31_Z[3]) ); defparam \i0lo1_31[3] .INIT=16'hFFFE; // @28:491772 CFG4 \i0lo1_30[3] ( .A(i0lo1_5_Z[3]), .B(i0lo1_7_Z[3]), .C(i0lo1_6_Z[3]), .D(i0lo1_4_Z[3]), .Y(i0lo1_30_Z[3]) ); defparam \i0lo1_30[3] .INIT=16'hFFFE; // @28:491772 CFG3 \i0lo1_11[12] ( .A(i0lo1_3_Z[12]), .B(i0lo1_4_Z[12]), .C(i0lo1_8_Z[12]), .Y(i0lo1_11_Z[12]) ); defparam \i0lo1_11[12] .INIT=8'hFE; // @28:491772 CFG4 \i0lo1_10[12] ( .A(o0lo1[0]), .B(cnt00[12]), .C(i0lo1_6_Z[12]), .D(i0lo1_0_Z[12]), .Y(i0lo1_10_Z[12]) ); defparam \i0lo1_10[12] .INIT=16'hFFF8; // @28:491772 CFG3 \i0lo1_11_cZ[16] ( .A(i0lo1_3_Z[16]), .B(i0lo1_4_Z[16]), .C(i0lo1_8_Z[16]), .Y(i0lo1_11[16]) ); defparam \i0lo1_11_cZ[16] .INIT=8'hFE; // @28:491772 CFG3 \i0lo1_11_cZ[17] ( .A(i0lo1_3_Z[17]), .B(i0lo1_4_Z[17]), .C(i0lo1_8_Z[17]), .Y(i0lo1_11[17]) ); defparam \i0lo1_11_cZ[17] .INIT=8'hFE; // @28:491772 CFG3 \i0lo1_11_cZ[14] ( .A(i0lo1_3_Z[14]), .B(i0lo1_4_Z[14]), .C(i0lo1_8_Z[14]), .Y(i0lo1_11[14]) ); defparam \i0lo1_11_cZ[14] .INIT=8'hFE; // @28:491772 CFG3 \i0lo1_11_cZ[13] ( .A(i0lo1_3_Z[13]), .B(i0lo1_4_Z[13]), .C(i0lo1_8_Z[13]), .Y(i0lo1_11[13]) ); defparam \i0lo1_11_cZ[13] .INIT=8'hFE; // @28:491772 CFG4 \i0lo1_39[2] ( .A(i0lo1_12_Z[2]), .B(i0lo1_13_Z[2]), .C(i0lo1_34_Z[2]), .D(i0lo1_27_Z[2]), .Y(i0lo1_39_Z[2]) ); defparam \i0lo1_39[2] .INIT=16'hFFFE; // @28:491772 CFG4 \i0lo1_38[2] ( .A(i0lo1_23_Z[2]), .B(i0lo1_21_Z[2]), .C(i0lo1_22_Z[2]), .D(i0lo1_20_Z[2]), .Y(i0lo1_38_Z[2]) ); defparam \i0lo1_38[2] .INIT=16'hFFFE; // @28:491772 CFG4 \i0lo1_38[8] ( .A(i0lo1_21_Z[8]), .B(i0lo1_23_Z[8]), .C(i0lo1_20_Z[8]), .D(i0lo1_22_Z[8]), .Y(i0lo1_38_Z[8]) ); defparam \i0lo1_38[8] .INIT=16'hFFFE; // @28:491772 CFG4 \i0lo1_39[7] ( .A(i0lo1_25_Z[7]), .B(i0lo1_24_Z[7]), .C(i0lo1_26_Z[7]), .D(i0lo1_27_Z[7]), .Y(i0lo1_39_Z[7]) ); defparam \i0lo1_39[7] .INIT=16'hFFFE; // @28:491772 CFG4 \i0lo1_38[7] ( .A(i0lo1_21_Z[7]), .B(i0lo1_23_Z[7]), .C(i0lo1_20_Z[7]), .D(i0lo1_22_Z[7]), .Y(i0lo1_38_Z[7]) ); defparam \i0lo1_38[7] .INIT=16'hFFFE; // @28:491772 CFG4 \i0lo1_38[5] ( .A(i0lo1_21_Z[5]), .B(i0lo1_23_Z[5]), .C(i0lo1_20_Z[5]), .D(i0lo1_22_Z[5]), .Y(i0lo1_38_Z[5]) ); defparam \i0lo1_38[5] .INIT=16'hFFFE; // @28:491772 CFG4 \i0lo1_39[4] ( .A(i0lo1_25_Z[4]), .B(i0lo1_24_Z[4]), .C(i0lo1_26_Z[4]), .D(i0lo1_27_Z[4]), .Y(i0lo1_39_Z[4]) ); defparam \i0lo1_39[4] .INIT=16'hFFFE; // @28:491772 CFG4 \i0lo1_38[4] ( .A(i0lo1_22_Z[4]), .B(i0lo1_23_Z[4]), .C(i0lo1_21_Z[4]), .D(i0lo1_20_Z[4]), .Y(i0lo1_38_Z[4]) ); defparam \i0lo1_38[4] .INIT=16'hFFFE; // @28:491772 CFG4 \i0lo1_38[6] ( .A(i0lo1_21_Z[6]), .B(i0lo1_23_Z[6]), .C(i0lo1_20_Z[6]), .D(i0lo1_22_Z[6]), .Y(i0lo1_38_Z[6]) ); defparam \i0lo1_38[6] .INIT=16'hFFFE; // @28:491772 CFG4 \i0lo1_39[3] ( .A(i0lo1_25_Z[3]), .B(i0lo1_24_Z[3]), .C(i0lo1_26_Z[3]), .D(i0lo1_27_Z[3]), .Y(i0lo1_39_Z[3]) ); defparam \i0lo1_39[3] .INIT=16'hFFFE; // @28:491772 CFG4 \i0lo1_38[3] ( .A(i0lo1_21_Z[3]), .B(i0lo1_23_Z[3]), .C(i0lo1_20_Z[3]), .D(i0lo1_22_Z[3]), .Y(i0lo1_38_Z[3]) ); defparam \i0lo1_38[3] .INIT=16'hFFFE; // @28:491772 CFG4 \i0lo1_12_cZ[16] ( .A(i0lo1_2_Z[16]), .B(i0lo1_9_Z[16]), .C(i0lo1_1_Z[16]), .D(i0lo1_5_Z[16]), .Y(i0lo1_12[16]) ); defparam \i0lo1_12_cZ[16] .INIT=16'hFFFE; // @28:491772 CFG4 \i0lo1_12_cZ[17] ( .A(i0lo1_2_Z[17]), .B(i0lo1_9_Z[17]), .C(i0lo1_1_Z[17]), .D(i0lo1_5_Z[17]), .Y(i0lo1_12[17]) ); defparam \i0lo1_12_cZ[17] .INIT=16'hFFFE; // @28:491772 CFG4 \i0lo1_12_cZ[14] ( .A(i0lo1_2_Z[14]), .B(i0lo1_9_Z[14]), .C(i0lo1_1_Z[14]), .D(i0lo1_5_Z[14]), .Y(i0lo1_12[14]) ); defparam \i0lo1_12_cZ[14] .INIT=16'hFFFE; // @28:491772 CFG4 \i0lo1_12_cZ[13] ( .A(i0lo1_2_Z[13]), .B(i0lo1_9_Z[13]), .C(i0lo1_1_Z[13]), .D(i0lo1_5_Z[13]), .Y(i0lo1_12[13]) ); defparam \i0lo1_12_cZ[13] .INIT=16'hFFFE; // @28:491772 CFG4 \i0lo1_12_cZ[15] ( .A(i0lo1_2_Z[15]), .B(i0lo1_9_Z[15]), .C(i0lo1_1_Z[15]), .D(i0lo1_5_Z[15]), .Y(NN_1) ); defparam \i0lo1_12_cZ[15] .INIT=16'hFFFE; // @28:491772 CFG4 \i0lo1_40[2] ( .A(i0lo1_29_Z[2]), .B(i0lo1_28_Z[2]), .C(i0lo1_30_Z[2]), .D(i0lo1_31_Z[2]), .Y(i0lo1_40_Z[2]) ); defparam \i0lo1_40[2] .INIT=16'hFFFE; // @28:491772 CFG4 \i0lo1_41[8] ( .A(i0lo1_24_Z[8]), .B(i0lo1_25_Z[8]), .C(i0lo1_35_Z[8]), .D(i0lo1_38_Z[8]), .Y(i0lo1_41_3) ); defparam \i0lo1_41[8] .INIT=16'hFFFE; // @28:491772 CFG4 \i0lo1_40[8] ( .A(i0lo1_29_Z[8]), .B(i0lo1_28_Z[8]), .C(i0lo1_30_Z[8]), .D(i0lo1_31_Z[8]), .Y(i0lo1_40_3) ); defparam \i0lo1_40[8] .INIT=16'hFFFE; // @28:491772 CFG4 \i0lo1_40[7] ( .A(i0lo1_29_Z[7]), .B(i0lo1_28_Z[7]), .C(i0lo1_30_Z[7]), .D(i0lo1_31_Z[7]), .Y(i0lo1_40_Z[7]) ); defparam \i0lo1_40[7] .INIT=16'hFFFE; // @28:491772 CFG4 \i0lo1_41[5] ( .A(i0lo1_24_Z[5]), .B(i0lo1_25_Z[5]), .C(i0lo1_35_Z[5]), .D(i0lo1_38_Z[5]), .Y(i0lo1_41_0) ); defparam \i0lo1_41[5] .INIT=16'hFFFE; // @28:491772 CFG4 \i0lo1_40[5] ( .A(i0lo1_29_Z[5]), .B(i0lo1_28_Z[5]), .C(i0lo1_30_Z[5]), .D(i0lo1_31_Z[5]), .Y(i0lo1_40_0) ); defparam \i0lo1_40[5] .INIT=16'hFFFE; // @28:491772 CFG4 \i0lo1_40[4] ( .A(i0lo1_29_Z[4]), .B(i0lo1_30_Z[4]), .C(i0lo1_28_Z[4]), .D(i0lo1_31_Z[4]), .Y(i0lo1_40_Z[4]) ); defparam \i0lo1_40[4] .INIT=16'hFFFE; // @28:491772 CFG4 \i0lo1_41[6] ( .A(i0lo1_24_Z[6]), .B(i0lo1_25_Z[6]), .C(i0lo1_35_Z[6]), .D(i0lo1_38_Z[6]), .Y(i0lo1_41_1) ); defparam \i0lo1_41[6] .INIT=16'hFFFE; // @28:491772 CFG4 \i0lo1_40[6] ( .A(i0lo1_29_Z[6]), .B(i0lo1_28_Z[6]), .C(i0lo1_30_Z[6]), .D(i0lo1_31_Z[6]), .Y(i0lo1_40_1) ); defparam \i0lo1_40[6] .INIT=16'hFFFE; // @28:491772 CFG4 \i0lo1_40[3] ( .A(i0lo1_29_Z[3]), .B(i0lo1_28_Z[3]), .C(i0lo1_30_Z[3]), .D(i0lo1_31_Z[3]), .Y(i0lo1_40_Z[3]) ); defparam \i0lo1_40[3] .INIT=16'hFFFE; // @28:491772 CFG4 \i0lo1[15] ( .A(i0lo1_3_Z[15]), .B(i0lo1_4_Z[15]), .C(i0lo1_8_Z[15]), .D(NN_1), .Y(i0lo1_0) ); defparam \i0lo1[15] .INIT=16'hFFFE; // @28:493026 CFG4 Iolo14_0_a2 ( .A(N_82_2), .B(Iolo14_0_a2_0_Z), .C(un1_ooiO1), .D(un4_Ooo11_1), .Y(N_89) ); defparam Iolo14_0_a2.INIT=16'h8000; // @28:492447 CFG3 un3_OilI1_i_o3 ( .A(CoreAPB3_0_0_APBmslave0_PWRITE), .B(un1_o01O1_0), .C(un1_Ii0O1), .Y(N_457) ); defparam un3_OilI1_i_o3.INIT=8'hBF; // @28:492447 CFG4 un3_OilI1_i ( .A(N_586), .B(CoreAPB3_0_0_APBmslave0_PADDR_6), .C(N_457), .D(liO019_i_1), .Y(N_133) ); defparam un3_OilI1_i.INIT=16'hFEFA; // @28:492961 CFG4 Oolo17_0_a3 ( .A(N_1148), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .C(un1_ooiO1), .D(N_1114), .Y(Oolo17) ); defparam Oolo17_0_a3.INIT=16'h8000; // @28:493026 CFG2 Iolo14_0_a3 ( .A(N_89), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .Y(Iolo14) ); defparam Iolo14_0_a3.INIT=4'h8; // @28:492811 CFG2 un88_OilI1_0_a2_i ( .A(N_89), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .Y(N_16) ); defparam un88_OilI1_0_a2_i.INIT=4'hD; // @28:492808 CFG3 \un86_OilI1[15] ( .A(N_89), .B(Iolo1_Z[15]), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .Y(un86_OilI1_0) ); defparam \un86_OilI1[15] .INIT=8'h08; // @28:492808 CFG3 \un86_OilI1[17] ( .A(N_89), .B(Iolo1_Z[17]), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .Y(un86_OilI1_2) ); defparam \un86_OilI1[17] .INIT=8'h08; // @28:492443 CFG4 \un1_OilI1[3] ( .A(i0lo1_38_Z[3]), .B(i0lo1_39_Z[3]), .C(i0lo1_40_Z[3]), .D(N_133), .Y(un1_OilI1_1) ); defparam \un1_OilI1[3] .INIT=16'h00FE; // @28:492443 CFG4 \un1_OilI1[4] ( .A(i0lo1_38_Z[4]), .B(i0lo1_39_Z[4]), .C(i0lo1_40_Z[4]), .D(N_133), .Y(un1_OilI1_2) ); defparam \un1_OilI1[4] .INIT=16'h00FE; // @28:492443 CFG4 \un1_OilI1[7] ( .A(i0lo1_38_Z[7]), .B(i0lo1_39_Z[7]), .C(i0lo1_40_Z[7]), .D(N_133), .Y(un1_OilI1_5) ); defparam \un1_OilI1[7] .INIT=16'h00FE; // @28:492443 CFG4 \un1_OilI1[12] ( .A(i0lo1_9_Z[12]), .B(i0lo1_11_Z[12]), .C(i0lo1_10_Z[12]), .D(N_133), .Y(un1_OilI1_10) ); defparam \un1_OilI1[12] .INIT=16'h00FE; // @28:492443 CFG4 \un1_OilI1[2] ( .A(i0lo1_38_Z[2]), .B(i0lo1_39_Z[2]), .C(i0lo1_40_Z[2]), .D(N_133), .Y(un1_OilI1_0) ); defparam \un1_OilI1[2] .INIT=16'h00FE; // @28:492492 CFG4 un18_OilI1_0_a2_0 ( .A(N_1206), .B(N_457), .C(CoreAPB3_0_0_APBmslave0_PADDR_6), .D(CoreAPB3_0_0_APBmslave0_PADDR_5), .Y(N_1116) ); defparam un18_OilI1_0_a2_0.INIT=16'h0020; // @28:492778 CFG4 un80_OilI1_0_a2_0 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_5), .B(CoreAPB3_0_0_APBmslave0_PADDR_6), .C(N_457), .D(rx_fifo_read_0), .Y(N_1122) ); defparam un80_OilI1_0_a2_0.INIT=16'h0400; // @28:494159 CFG4 \loli0_1_0_a2_1[13] ( .A(CoreAPB3_0_0_APBmslave0_PWRITE), .B(N_1206), .C(N_1103), .D(un1_ooiO1), .Y(N_1124) ); defparam \loli0_1_0_a2_1[13] .INIT=16'h4000; // @28:494201 CFG4 \loli0_1_0_a2_0[15] ( .A(N_1103), .B(un1_ooiO1), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .D(rx_fifo_read_0), .Y(N_1118) ); defparam \loli0_1_0_a2_0[15] .INIT=16'h0800; // @28:493757 CFG4 un36_Ioli0_0_a2_3_a2 ( .A(N_1128), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .C(un1_ooiO1), .D(N_1117), .Y(un36_Ioli0) ); defparam un36_Ioli0_0_a2_3_a2.INIT=16'h8000; // @28:494537 CFG4 \loli0_1_0_a2_1[31] ( .A(N_1103), .B(N_457), .C(paddr_1z_0), .D(CoreAPB3_0_0_APBmslave0_PADDR_1), .Y(N_1123) ); defparam \loli0_1_0_a2_1[31] .INIT=16'h2000; // @28:494390 CFG4 \loli0_1_0_a2_0[24] ( .A(N_1103), .B(N_457), .C(paddr_1z_0), .D(CoreAPB3_0_0_APBmslave0_PADDR_1), .Y(N_1119) ); defparam \loli0_1_0_a2_0[24] .INIT=16'h0020; // @28:494201 CFG4 \loli0_1_0_a2[15] ( .A(N_1103), .B(N_457), .C(l1II1), .D(rx_fifo_read_0), .Y(N_1137) ); defparam \loli0_1_0_a2[15] .INIT=16'h2000; // @28:492443 CFG4 \OilI1_i_a2_81[11] ( .A(N_1206), .B(N_1103), .C(N_1126), .D(N_457), .Y(N_1793) ); defparam \OilI1_i_a2_81[11] .INIT=16'h0080; // @28:492443 CFG4 \OilI1_i_a2_78[11] ( .A(N_1103), .B(rx_fifo_read_0), .C(N_457), .D(N_1120), .Y(N_1790) ); defparam \OilI1_i_a2_78[11] .INIT=16'h0800; // @28:492443 CFG2 \OilI1_i_a2_77[11] ( .A(N_1116), .B(N_1126), .Y(N_1789) ); defparam \OilI1_i_a2_77[11] .INIT=4'h8; // @28:492443 CFG2 \OilI1_i_a2_72[11] ( .A(N_1116), .B(N_1115), .Y(N_1784) ); defparam \OilI1_i_a2_72[11] .INIT=4'h8; // @28:492443 CFG2 \OilI1_i_a2_64[11] ( .A(N_1116), .B(N_1120), .Y(N_1776) ); defparam \OilI1_i_a2_64[11] .INIT=4'h8; // @28:492443 CFG4 \OilI1_i_a2_59[11] ( .A(N_1103), .B(rx_fifo_read_0), .C(N_457), .D(N_1126), .Y(N_1771) ); defparam \OilI1_i_a2_59[11] .INIT=16'h0800; // @28:492443 CFG4 \OilI1_i_a2_51[11] ( .A(N_1103), .B(rx_fifo_read_0), .C(N_457), .D(N_1117), .Y(N_1763) ); defparam \OilI1_i_a2_51[11] .INIT=16'h0800; // @28:492649 CFG2 un52_OilI1_0_a2_0_a2 ( .A(N_1116), .B(N_1117), .Y(un52_OilI1) ); defparam un52_OilI1_0_a2_0_a2.INIT=4'h8; // @28:492443 CFG2 \OilI1_i_a2_46[11] ( .A(N_1122), .B(N_1126), .Y(N_1149) ); defparam \OilI1_i_a2_46[11] .INIT=4'h8; // @28:492443 CFG4 \OilI1_i_a2_71[11] ( .A(N_1206), .B(N_1103), .C(N_1120), .D(N_457), .Y(N_1783) ); defparam \OilI1_i_a2_71[11] .INIT=16'h0080; // @28:492443 CFG4 \OilI1_i_a2_56[11] ( .A(N_1206), .B(N_1103), .C(N_1117), .D(N_457), .Y(N_1768) ); defparam \OilI1_i_a2_56[11] .INIT=16'h0080; // @28:492443 CFG4 \OilI1_i_a2_52[11] ( .A(N_1206), .B(N_1103), .C(N_1121), .D(N_457), .Y(N_1764) ); defparam \OilI1_i_a2_52[11] .INIT=16'h0080; // @28:492443 CFG4 \OilI1_i_a2_48[11] ( .A(N_1206), .B(N_1103), .C(N_1115), .D(N_457), .Y(N_1153) ); defparam \OilI1_i_a2_48[11] .INIT=16'h0080; // @28:494159 CFG4 \loli0_1_0_a2_0[13] ( .A(N_1206), .B(l1II1), .C(N_457), .D(N_1103), .Y(N_1133) ); defparam \loli0_1_0_a2_0[13] .INIT=16'h0800; // @28:492443 CFG2 \OilI1_i_a2_73[11] ( .A(N_1122), .B(N_1130), .Y(N_1785) ); defparam \OilI1_i_a2_73[11] .INIT=4'h8; // @28:492443 CFG4 \OilI1_i_a2_70[11] ( .A(N_1103), .B(rx_fifo_read_0), .C(N_457), .D(N_1114), .Y(N_1782) ); defparam \OilI1_i_a2_70[11] .INIT=16'h0800; // @28:492443 CFG4 \OilI1_i_a2_66[11] ( .A(N_1103), .B(rx_fifo_read_0), .C(N_457), .D(N_1130), .Y(N_1778) ); defparam \OilI1_i_a2_66[11] .INIT=16'h0800; // @28:492443 CFG2 \OilI1_i_a2_65[11] ( .A(N_1122), .B(N_1115), .Y(N_1777) ); defparam \OilI1_i_a2_65[11] .INIT=4'h8; // @28:492443 CFG2 \OilI1_i_a2_61[11] ( .A(N_1116), .B(N_1121), .Y(N_1773) ); defparam \OilI1_i_a2_61[11] .INIT=4'h8; // @28:492443 CFG4 \OilI1_i_a2_60[11] ( .A(N_1206), .B(N_1103), .C(N_1130), .D(N_457), .Y(N_1772) ); defparam \OilI1_i_a2_60[11] .INIT=16'h0080; // @28:492443 CFG4 \OilI1_i_a2_55[11] ( .A(N_1103), .B(rx_fifo_read_0), .C(N_457), .D(N_1115), .Y(N_1767) ); defparam \OilI1_i_a2_55[11] .INIT=16'h0800; // @28:492443 CFG2 \OilI1_i_a2_54[11] ( .A(N_1122), .B(N_1121), .Y(N_1766) ); defparam \OilI1_i_a2_54[11] .INIT=4'h8; // @28:492443 CFG2 \OilI1_i_a2_50[11] ( .A(N_1122), .B(N_1120), .Y(N_1762) ); defparam \OilI1_i_a2_50[11] .INIT=4'h8; // @28:492443 CFG4 \OilI1_i_a2_47[11] ( .A(N_1103), .B(rx_fifo_read_0), .C(N_457), .D(N_1121), .Y(N_1152) ); defparam \OilI1_i_a2_47[11] .INIT=16'h0800; // @28:492443 CFG4 \un1_OilI1_0_a2_0[22] ( .A(N_1103), .B(rx_fifo_read_0), .C(N_457), .D(N_1127), .Y(N_1147) ); defparam \un1_OilI1_0_a2_0[22] .INIT=16'h0800; // @28:492443 CFG2 \OilI1_i_a2_58[11] ( .A(N_1122), .B(N_1127), .Y(N_1770) ); defparam \OilI1_i_a2_58[11] .INIT=4'h8; // @28:492443 CFG4 \OilI1_i_a2_67[11] ( .A(N_1206), .B(N_1103), .C(N_1127), .D(N_457), .Y(N_1779) ); defparam \OilI1_i_a2_67[11] .INIT=16'h0080; // @28:492778 CFG2 un80_OilI1_0_a2 ( .A(N_1122), .B(N_1114), .Y(un80_OilI1_0_a2_1z) ); defparam un80_OilI1_0_a2.INIT=4'h8; // @28:492492 CFG2 un18_OilI1_0_a2 ( .A(N_1116), .B(N_1114), .Y(un18_OilI1_0_a2_1z) ); defparam un18_OilI1_0_a2.INIT=4'h8; // @28:492443 CFG4 \OilI1_i_a2_76[11] ( .A(N_1206), .B(N_1103), .C(N_1114), .D(N_457), .Y(N_1788) ); defparam \OilI1_i_a2_76[11] .INIT=16'h0080; // @28:492443 CFG3 \OilI1_0_0_a3[27] ( .A(Oolo1_Z[21]), .B(N_1114), .C(N_1122), .Y(N_675) ); defparam \OilI1_0_0_a3[27] .INIT=8'h80; // @28:492646 CFG3 \un50_OilI1[14] ( .A(o0Io1_31), .B(N_1117), .C(N_1116), .Y(un50_OilI1_0) ); defparam \un50_OilI1[14] .INIT=8'h80; // @28:492775 CFG3 \un78_OilI1[17] ( .A(Oolo1_Z[17]), .B(N_1114), .C(N_1122), .Y(un78_OilI1_0) ); defparam \un78_OilI1[17] .INIT=8'h80; // @28:492443 CFG2 \OilI1_i_a2_87[11] ( .A(N_1119), .B(N_1114), .Y(N_1800) ); defparam \OilI1_i_a2_87[11] .INIT=4'h8; // @28:492443 CFG2 \OilI1_i_a2_84[11] ( .A(N_1119), .B(N_1115), .Y(N_1797) ); defparam \OilI1_i_a2_84[11] .INIT=4'h8; // @28:492443 CFG2 \OilI1_i_a2_63[11] ( .A(N_1119), .B(N_1117), .Y(N_1775) ); defparam \OilI1_i_a2_63[11] .INIT=4'h8; // @28:492443 CFG3 \OilI1_i_a2_8[0] ( .A(N_1122), .B(cnt35[0]), .C(N_1121), .Y(N_1682) ); defparam \OilI1_i_a2_8[0] .INIT=8'h80; // @28:492443 CFG3 \OilI1_i_a2_14[1] ( .A(cnt38[1]), .B(N_1130), .C(N_1122), .Y(N_1642) ); defparam \OilI1_i_a2_14[1] .INIT=8'h80; // @28:492443 CFG3 \OilI1_0_0_a3[25] ( .A(Oolo1_Z[19]), .B(N_1114), .C(N_1122), .Y(N_679) ); defparam \OilI1_0_0_a3[25] .INIT=8'h80; // @28:494390 CFG2 \loli0_1_0_a2[24] ( .A(N_1119), .B(l1II1), .Y(N_1136) ); defparam \loli0_1_0_a2[24] .INIT=4'h8; // @28:494537 CFG2 \loli0_1_0_a2_0[31] ( .A(N_1123), .B(l1II1), .Y(N_1135) ); defparam \loli0_1_0_a2_0[31] .INIT=4'h8; // @28:494726 CFG3 \loli0_1_0_a2[40] ( .A(l1II1), .B(N_1120), .C(N_1116), .Y(N_1270) ); defparam \loli0_1_0_a2[40] .INIT=8'h80; // @28:492443 CFG2 \OilI1_i_a2_69[11] ( .A(N_1119), .B(N_1121), .Y(N_1781) ); defparam \OilI1_i_a2_69[11] .INIT=4'h8; // @28:492443 CFG2 \OilI1_i_a2_74[11] ( .A(N_1123), .B(N_1130), .Y(N_1786) ); defparam \OilI1_i_a2_74[11] .INIT=4'h8; // @28:492443 CFG2 \OilI1_i_a2_79[11] ( .A(N_1119), .B(N_1130), .Y(N_1791) ); defparam \OilI1_i_a2_79[11] .INIT=4'h8; // @28:492443 CFG2 \un1_OilI1_0_a2[22] ( .A(N_1119), .B(N_1120), .Y(N_1146) ); defparam \un1_OilI1_0_a2[22] .INIT=4'h8; // @28:492443 CFG2 \OilI1_i_a2_57[11] ( .A(N_1123), .B(N_1117), .Y(N_1769) ); defparam \OilI1_i_a2_57[11] .INIT=4'h8; // @28:492443 CFG2 \OilI1_i_a2_80[11] ( .A(N_1123), .B(N_1120), .Y(N_1792) ); defparam \OilI1_i_a2_80[11] .INIT=4'h8; // @28:492443 CFG2 \OilI1_i_a2_82[11] ( .A(N_1119), .B(N_1126), .Y(N_1795) ); defparam \OilI1_i_a2_82[11] .INIT=4'h8; // @28:492443 CFG2 \OilI1_i_a2_83[11] ( .A(N_1123), .B(N_1115), .Y(N_1796) ); defparam \OilI1_i_a2_83[11] .INIT=4'h8; // @28:492443 CFG2 \OilI1_i_a2_85[11] ( .A(N_1123), .B(N_1126), .Y(N_1798) ); defparam \OilI1_i_a2_85[11] .INIT=4'h8; // @28:492443 CFG2 \OilI1_i_a2_62[11] ( .A(N_1123), .B(N_1121), .Y(N_1774) ); defparam \OilI1_i_a2_62[11] .INIT=4'h8; // @28:492443 CFG2 \OilI1_i_a2_68[11] ( .A(N_1123), .B(N_1127), .Y(N_1780) ); defparam \OilI1_i_a2_68[11] .INIT=4'h8; // @28:492443 CFG2 \OilI1_i_a2_75[11] ( .A(N_1119), .B(N_1127), .Y(N_1787) ); defparam \OilI1_i_a2_75[11] .INIT=4'h8; // @28:492443 CFG2 \OilI1_i_a2_86[11] ( .A(N_1123), .B(N_1114), .Y(N_1799) ); defparam \OilI1_i_a2_86[11] .INIT=4'h8; // @28:497055 CFG2 un36_Ioli0_0_a2_3_a2_RNIP2FO8 ( .A(un36_Ioli0), .B(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .Y(Ioli0_i_27) ); defparam un36_Ioli0_0_a2_3_a2_RNIP2FO8.INIT=4'h7; // @28:497961 CFG2 un36_Ioli0_0_a2_3_a2_RNIHNUT5 ( .A(un36_Ioli0), .B(CoreAPB3_0_0_APBmslave0_PWDATA[19]), .Y(Ioli0_i_32) ); defparam un36_Ioli0_0_a2_3_a2_RNIHNUT5.INIT=4'h7; // @28:497961 CFG2 un36_Ioli0_0_a2_3_a2_RNIGMUT5 ( .A(un36_Ioli0), .B(CoreAPB3_0_0_APBmslave0_PWDATA[18]), .Y(Ioli0_i_33) ); defparam un36_Ioli0_0_a2_3_a2_RNIGMUT5.INIT=4'h7; // @28:497961 CFG2 un36_Ioli0_0_a2_3_a2_RNIFLUT5 ( .A(un36_Ioli0), .B(CoreAPB3_0_0_APBmslave0_PWDATA[17]), .Y(Ioli0_i_34) ); defparam un36_Ioli0_0_a2_3_a2_RNIFLUT5.INIT=4'h7; // @28:497961 CFG2 un36_Ioli0_0_a2_3_a2_RNIEKUT5 ( .A(un36_Ioli0), .B(CoreAPB3_0_0_APBmslave0_PWDATA[16]), .Y(Ioli0_i_35) ); defparam un36_Ioli0_0_a2_3_a2_RNIEKUT5.INIT=4'h7; // @28:497961 CFG2 un36_Ioli0_0_a2_3_a2_RNIDJUT5 ( .A(un36_Ioli0), .B(CoreAPB3_0_0_APBmslave0_PWDATA[15]), .Y(Ioli0_i_36) ); defparam un36_Ioli0_0_a2_3_a2_RNIDJUT5.INIT=4'h7; // @28:497961 CFG2 un36_Ioli0_0_a2_3_a2_RNICIUT5 ( .A(un36_Ioli0), .B(CoreAPB3_0_0_APBmslave0_PWDATA[14]), .Y(Ioli0_i_37) ); defparam un36_Ioli0_0_a2_3_a2_RNICIUT5.INIT=4'h7; // @28:497357 CFG2 \Ioli0_i[22] ( .A(N_1131), .B(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .Y(Ioli0_i_12) ); defparam \Ioli0_i[22] .INIT=4'h7; // @28:497357 CFG2 \Ioli0_i[23] ( .A(N_1131), .B(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .Y(Ioli0_i_13) ); defparam \Ioli0_i[23] .INIT=4'h7; // @28:497357 CFG2 \Ioli0_i[24] ( .A(N_1131), .B(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .Y(Ioli0_i_14) ); defparam \Ioli0_i[24] .INIT=4'h7; // @28:497357 CFG2 \Ioli0_i[25] ( .A(N_1131), .B(wrdata_0), .Y(Ioli0_i_15) ); defparam \Ioli0_i[25] .INIT=4'h7; // @28:496391 CFG2 un36_Ioli0_0_a2_3_a2_RNIAGUT5 ( .A(un36_Ioli0), .B(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .Y(Ioli0_i_17) ); defparam un36_Ioli0_0_a2_3_a2_RNIAGUT5.INIT=4'h7; // @28:496391 CFG2 un36_Ioli0_0_a2_3_a2_RNI9FUT5 ( .A(un36_Ioli0), .B(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .Y(Ioli0_i_18) ); defparam un36_Ioli0_0_a2_3_a2_RNI9FUT5.INIT=4'h7; // @28:496391 CFG2 un36_Ioli0_0_a2_3_a2_RNI8EUT5 ( .A(un36_Ioli0), .B(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .Y(Ioli0_i_19) ); defparam un36_Ioli0_0_a2_3_a2_RNI8EUT5.INIT=4'h7; // @28:497357 CFG2 un36_Ioli0_0_a2_3_a2_RNI0AFO8 ( .A(un36_Ioli0), .B(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .Y(Ioli0_i_20) ); defparam un36_Ioli0_0_a2_3_a2_RNI0AFO8.INIT=4'h7; // @28:497659 CFG2 un36_Ioli0_0_a2_3_a2_RNIV8FO8 ( .A(un36_Ioli0), .B(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .Y(Ioli0_i_21) ); defparam un36_Ioli0_0_a2_3_a2_RNIV8FO8.INIT=4'h7; // @28:497659 CFG2 un36_Ioli0_0_a2_3_a2_RNIU7FO8 ( .A(un36_Ioli0), .B(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .Y(Ioli0_i_22) ); defparam un36_Ioli0_0_a2_3_a2_RNIU7FO8.INIT=4'h7; // @28:497659 CFG2 un36_Ioli0_0_a2_3_a2_RNIT6FO8 ( .A(un36_Ioli0), .B(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .Y(Ioli0_i_23) ); defparam un36_Ioli0_0_a2_3_a2_RNIT6FO8.INIT=4'h7; // @28:497659 CFG2 un36_Ioli0_0_a2_3_a2_RNIS5FO8 ( .A(un36_Ioli0), .B(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .Y(Ioli0_i_24) ); defparam un36_Ioli0_0_a2_3_a2_RNIS5FO8.INIT=4'h7; // @28:497659 CFG2 un36_Ioli0_0_a2_3_a2_RNIR4FO8 ( .A(un36_Ioli0), .B(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .Y(Ioli0_i_25) ); defparam un36_Ioli0_0_a2_3_a2_RNIR4FO8.INIT=4'h7; // @28:497659 CFG2 un36_Ioli0_0_a2_3_a2_RNIQ3FO8 ( .A(un36_Ioli0), .B(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .Y(Ioli0_i_26) ); defparam un36_Ioli0_0_a2_3_a2_RNIQ3FO8.INIT=4'h7; // @28:496391 CFG2 \Ioli0_i[10] ( .A(N_1131), .B(CoreAPB3_0_0_APBmslave0_PWDATA[15]), .Y(Ioli0_i_0) ); defparam \Ioli0_i[10] .INIT=4'h7; // @28:497357 CFG2 \Ioli0_i[11] ( .A(N_1131), .B(CoreAPB3_0_0_APBmslave0_PWDATA[14]), .Y(Ioli0_i_1) ); defparam \Ioli0_i[11] .INIT=4'h7; // @28:497357 CFG2 \Ioli0_i[17] ( .A(N_1131), .B(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .Y(Ioli0_i_7) ); defparam \Ioli0_i[17] .INIT=4'h7; // @28:497357 CFG2 \Ioli0_i[18] ( .A(N_1131), .B(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .Y(Ioli0_i_8) ); defparam \Ioli0_i[18] .INIT=4'h7; // @28:497357 CFG2 \Ioli0_i[21] ( .A(N_1131), .B(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .Y(Ioli0_i_11) ); defparam \Ioli0_i[21] .INIT=4'h7; // @28:492443 CFG4 \OilI1_i_a3_15[11] ( .A(cnt05[11]), .B(cnt07[11]), .C(N_1779), .D(N_1147), .Y(OilI1_i_a3_15_Z[11]) ); defparam \OilI1_i_a3_15[11] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_i_a3_14[11] ( .A(cnt14[11]), .B(cnt00[11]), .C(N_1782), .D(N_1153), .Y(OilI1_i_a3_14_Z[11]) ); defparam \OilI1_i_a3_14[11] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_i_a3_13[11] ( .A(cnt09[11]), .B(cnt08[11]), .C(N_1793), .D(N_1783), .Y(OilI1_i_a3_13_Z[11]) ); defparam \OilI1_i_a3_13[11] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_i_a3_12[11] ( .A(cnt15[11]), .B(cnt03[11]), .C(N_1763), .D(N_1152), .Y(OilI1_i_a3_12_Z[11]) ); defparam \OilI1_i_a3_12[11] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_i_a3_11[11] ( .A(cnt10[11]), .B(cnt04[11]), .C(N_1790), .D(N_1772), .Y(OilI1_i_a3_11_Z[11]) ); defparam \OilI1_i_a3_11[11] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_i_a3_10[11] ( .A(cnt11[11]), .B(cnt12[11]), .C(N_1788), .D(N_1771), .Y(OilI1_i_a3_10_Z[11]) ); defparam \OilI1_i_a3_10[11] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_i_a3_9[11] ( .A(cnt02[11]), .B(cnt01[11]), .C(N_1767), .D(N_1764), .Y(OilI1_i_a3_9_Z[11]) ); defparam \OilI1_i_a3_9[11] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_i_a3_8[11] ( .A(cnt13[11]), .B(cnt06[11]), .C(N_1778), .D(N_1768), .Y(OilI1_i_a3_8_Z[11]) ); defparam \OilI1_i_a3_8[11] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_i_a3_7[11] ( .A(un18_OilI1_0_a2_1z), .B(un80_OilI1_0_a2_1z), .C(o0Io1_0), .D(Oolo1_Z[11]), .Y(OilI1_i_a3_7_Z[11]) ); defparam \OilI1_i_a3_7[11] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_i_a3_6[11] ( .A(o0Io1_14), .B(O1Io1[11]), .C(N_1789), .D(un52_OilI1), .Y(OilI1_i_a3_6_Z[11]) ); defparam \OilI1_i_a3_6[11] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_i_a3_3[11] ( .A(cnt33[11]), .B(cnt38[11]), .C(N_1785), .D(N_1773), .Y(OilI1_i_a3_3_Z[11]) ); defparam \OilI1_i_a3_3[11] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_i_a3_2[11] ( .A(N_1766), .B(N_1762), .C(cnt35[11]), .D(I1Io1[11]), .Y(OilI1_i_a3_2_Z[11]) ); defparam \OilI1_i_a3_2[11] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_i_a3_1[11] ( .A(l1Io1[11]), .B(cnt34[11]), .C(N_1777), .D(N_1149), .Y(OilI1_i_a3_1_Z[11]) ); defparam \OilI1_i_a3_1[11] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_i_a3_0[11] ( .A(N_89), .B(N_1770), .C(Iolo1_Z[11]), .D(cnt39[11]), .Y(OilI1_i_a3_0_Z[11]) ); defparam \OilI1_i_a3_0[11] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_0_i_a3_15[9] ( .A(cnt07[9]), .B(cnt06[9]), .C(N_1778), .D(N_1147), .Y(OilI1_0_i_a3_15_Z[9]) ); defparam \OilI1_0_i_a3_15[9] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_0_i_a3_14[9] ( .A(cnt15[9]), .B(cnt02[9]), .C(N_1767), .D(N_1763), .Y(OilI1_0_i_a3_14_Z[9]) ); defparam \OilI1_0_i_a3_14[9] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_0_i_a3_13[9] ( .A(cnt13[9]), .B(cnt08[9]), .C(N_1783), .D(N_1768), .Y(OilI1_0_i_a3_13_Z[9]) ); defparam \OilI1_0_i_a3_13[9] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_0_i_a3_12[9] ( .A(cnt03[9]), .B(cnt05[9]), .C(N_1779), .D(N_1152), .Y(OilI1_0_i_a3_12_Z[9]) ); defparam \OilI1_0_i_a3_12[9] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_0_i_a3_11[9] ( .A(cnt14[9]), .B(cnt00[9]), .C(N_1782), .D(N_1153), .Y(OilI1_0_i_a3_11_Z[9]) ); defparam \OilI1_0_i_a3_11[9] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_0_i_a3_10[9] ( .A(cnt09[9]), .B(cnt01[9]), .C(N_1793), .D(N_1764), .Y(OilI1_0_i_a3_10_Z[9]) ); defparam \OilI1_0_i_a3_10[9] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_0_i_a3_9[9] ( .A(cnt10[9]), .B(cnt04[9]), .C(N_1790), .D(N_1772), .Y(OilI1_0_i_a3_9_Z[9]) ); defparam \OilI1_0_i_a3_9[9] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_0_i_a3_8[9] ( .A(cnt11[9]), .B(cnt12[9]), .C(N_1788), .D(N_1771), .Y(OilI1_0_i_a3_8_Z[9]) ); defparam \OilI1_0_i_a3_8[9] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_0_i_a3_7[9] ( .A(un18_OilI1_0_a2_1z), .B(un80_OilI1_0_a2_1z), .C(o0Io1_2), .D(Oolo1_Z[9]), .Y(OilI1_0_i_a3_7_Z[9]) ); defparam \OilI1_0_i_a3_7[9] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_0_i_a3_6[9] ( .A(o0Io1_16), .B(cnt33[9]), .C(N_1773), .D(un52_OilI1), .Y(OilI1_0_i_a3_6_Z[9]) ); defparam \OilI1_0_i_a3_6[9] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_0_i_a3_5[9] ( .A(cnt32[9]), .B(O1Io1[9]), .C(N_1789), .D(N_1784), .Y(OilI1_0_i_a3_5_Z[9]) ); defparam \OilI1_0_i_a3_5[9] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_0_i_a3_3[9] ( .A(l1Io1[9]), .B(i0Io1[9]), .C(N_1776), .D(N_1149), .Y(OilI1_0_i_a3_3_Z[9]) ); defparam \OilI1_0_i_a3_3[9] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_0_i_a3_2[9] ( .A(cnt38[9]), .B(cnt34[9]), .C(N_1785), .D(N_1777), .Y(OilI1_0_i_a3_2_Z[9]) ); defparam \OilI1_0_i_a3_2[9] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_0_i_a3_1[9] ( .A(N_1770), .B(N_1762), .C(cnt39[9]), .D(I1Io1[9]), .Y(OilI1_0_i_a3_1_Z[9]) ); defparam \OilI1_0_i_a3_1[9] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_0_i_a3_0[9] ( .A(N_89), .B(N_1766), .C(Iolo1_Z[9]), .D(cnt35[9]), .Y(OilI1_0_i_a3_0_Z[9]) ); defparam \OilI1_0_i_a3_0[9] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_0_i_a3_15[10] ( .A(cnt14[10]), .B(cnt07[10]), .C(N_1782), .D(N_1147), .Y(OilI1_0_i_a3_15_Z[10]) ); defparam \OilI1_0_i_a3_15[10] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_0_i_a3_14[10] ( .A(cnt05[10]), .B(cnt00[10]), .C(N_1779), .D(N_1153), .Y(OilI1_0_i_a3_14_Z[10]) ); defparam \OilI1_0_i_a3_14[10] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_0_i_a3_13[10] ( .A(cnt09[10]), .B(cnt08[10]), .C(N_1793), .D(N_1783), .Y(OilI1_0_i_a3_13_Z[10]) ); defparam \OilI1_0_i_a3_13[10] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_0_i_a3_12[10] ( .A(cnt15[10]), .B(cnt03[10]), .C(N_1763), .D(N_1152), .Y(OilI1_0_i_a3_12_Z[10]) ); defparam \OilI1_0_i_a3_12[10] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_0_i_a3_11[10] ( .A(cnt13[10]), .B(cnt04[10]), .C(N_1772), .D(N_1768), .Y(OilI1_0_i_a3_11_Z[10]) ); defparam \OilI1_0_i_a3_11[10] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_0_i_a3_10[10] ( .A(cnt11[10]), .B(cnt12[10]), .C(N_1788), .D(N_1771), .Y(OilI1_0_i_a3_10_Z[10]) ); defparam \OilI1_0_i_a3_10[10] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_0_i_a3_9[10] ( .A(cnt10[10]), .B(cnt01[10]), .C(N_1790), .D(N_1764), .Y(OilI1_0_i_a3_9_Z[10]) ); defparam \OilI1_0_i_a3_9[10] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_0_i_a3_8[10] ( .A(cnt06[10]), .B(cnt02[10]), .C(N_1778), .D(N_1767), .Y(OilI1_0_i_a3_8_Z[10]) ); defparam \OilI1_0_i_a3_8[10] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_0_i_a3_7[10] ( .A(un18_OilI1_0_a2_1z), .B(un80_OilI1_0_a2_1z), .C(o0Io1_1), .D(Oolo1_Z[10]), .Y(OilI1_0_i_a3_7_Z[10]) ); defparam \OilI1_0_i_a3_7[10] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_0_i_a3_6[10] ( .A(o0Io1_15), .B(O1Io1[10]), .C(N_1789), .D(un52_OilI1), .Y(OilI1_0_i_a3_6_Z[10]) ); defparam \OilI1_0_i_a3_6[10] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_0_i_a3_3[10] ( .A(cnt33[10]), .B(cnt38[10]), .C(N_1785), .D(N_1773), .Y(OilI1_0_i_a3_3_Z[10]) ); defparam \OilI1_0_i_a3_3[10] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_0_i_a3_2[10] ( .A(N_1766), .B(N_1762), .C(cnt35[10]), .D(I1Io1[10]), .Y(OilI1_0_i_a3_2_Z[10]) ); defparam \OilI1_0_i_a3_2[10] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_0_i_a3_1[10] ( .A(l1Io1[10]), .B(cnt34[10]), .C(N_1777), .D(N_1149), .Y(OilI1_0_i_a3_1_Z[10]) ); defparam \OilI1_0_i_a3_1[10] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_0_i_a3_0[10] ( .A(N_89), .B(N_1770), .C(Iolo1_Z[10]), .D(cnt39[10]), .Y(OilI1_0_i_a3_0_Z[10]) ); defparam \OilI1_0_i_a3_0[10] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_i_a3_14[1] ( .A(cnt15[1]), .B(cnt10[1]), .C(N_1790), .D(N_1763), .Y(OilI1_i_a3_14_Z[1]) ); defparam \OilI1_i_a3_14[1] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_i_a3_13[1] ( .A(cnt08[1]), .B(cnt04[1]), .C(N_1783), .D(N_1772), .Y(OilI1_i_a3_13_Z[1]) ); defparam \OilI1_i_a3_13[1] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_i_a3_12[1] ( .A(cnt12[1]), .B(cnt09[1]), .C(N_1793), .D(N_1788), .Y(OilI1_i_a3_12_Z[1]) ); defparam \OilI1_i_a3_12[1] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_i_a3_11[1] ( .A(cnt14[1]), .B(cnt01[1]), .C(N_1782), .D(N_1764), .Y(OilI1_i_a3_11_Z[1]) ); defparam \OilI1_i_a3_11[1] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_i_a3_10[1] ( .A(cnt03[1]), .B(cnt13[1]), .C(N_1768), .D(N_1152), .Y(OilI1_i_a3_10_Z[1]) ); defparam \OilI1_i_a3_10[1] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_i_a3_9[1] ( .A(cnt06[1]), .B(cnt00[1]), .C(N_1778), .D(N_1153), .Y(OilI1_i_a3_9_Z[1]) ); defparam \OilI1_i_a3_9[1] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_i_a3_8[1] ( .A(cnt02[1]), .B(cnt05[1]), .C(N_1779), .D(N_1767), .Y(OilI1_i_a3_8_Z[1]) ); defparam \OilI1_i_a3_8[1] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_i_a3_7[1] ( .A(o0Io1_10), .B(cnt11[1]), .C(N_1771), .D(un18_OilI1_0_a2_1z), .Y(OilI1_i_a3_7_Z[1]) ); defparam \OilI1_i_a3_7[1] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_i_a3_5[1] ( .A(i0Io1[1]), .B(O1Io1[1]), .C(N_1789), .D(N_1776), .Y(OilI1_i_a3_5_Z[1]) ); defparam \OilI1_i_a3_5[1] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_i_a3_3[1] ( .A(l1Io1[1]), .B(cnt32[1]), .C(N_1784), .D(N_1149), .Y(OilI1_i_a3_3_Z[1]) ); defparam \OilI1_i_a3_3[1] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_i_a3_2[1] ( .A(cnt34[1]), .B(cnt35[1]), .C(N_1777), .D(N_1766), .Y(OilI1_i_a3_2_Z[1]) ); defparam \OilI1_i_a3_2[1] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_i_a3_0[1] ( .A(Iolo1_Z[1]), .B(I1Io1[1]), .C(N_89), .D(N_1762), .Y(OilI1_i_a3_0_Z[1]) ); defparam \OilI1_i_a3_0[1] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_i_a3_14[0] ( .A(cnt09[0]), .B(cnt01[0]), .C(N_1793), .D(N_1764), .Y(OilI1_i_a3_14_Z[0]) ); defparam \OilI1_i_a3_14[0] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_i_a3_13[0] ( .A(cnt12[0]), .B(cnt00[0]), .C(N_1788), .D(N_1153), .Y(OilI1_i_a3_13_Z[0]) ); defparam \OilI1_i_a3_13[0] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_i_a3_12[0] ( .A(cnt15[0]), .B(cnt06[0]), .C(N_1778), .D(N_1763), .Y(OilI1_i_a3_12_Z[0]) ); defparam \OilI1_i_a3_12[0] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_i_a3_11[0] ( .A(cnt02[0]), .B(cnt04[0]), .C(N_1772), .D(N_1767), .Y(OilI1_i_a3_11_Z[0]) ); defparam \OilI1_i_a3_11[0] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_i_a3_10[0] ( .A(cnt13[0]), .B(cnt11[0]), .C(N_1771), .D(N_1768), .Y(OilI1_i_a3_10_Z[0]) ); defparam \OilI1_i_a3_10[0] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_i_a3_9[0] ( .A(cnt08[0]), .B(cnt05[0]), .C(N_1783), .D(N_1779), .Y(OilI1_i_a3_9_Z[0]) ); defparam \OilI1_i_a3_9[0] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_i_a3_8[0] ( .A(cnt10[0]), .B(cnt03[0]), .C(N_1790), .D(N_1152), .Y(OilI1_i_a3_8_Z[0]) ); defparam \OilI1_i_a3_8[0] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_i_a3_7[0] ( .A(o0Io1_11), .B(cnt14[0]), .C(N_1782), .D(un18_OilI1_0_a2_1z), .Y(OilI1_i_a3_7_Z[0]) ); defparam \OilI1_i_a3_7[0] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_i_a3_6[0] ( .A(N_1789), .B(un80_OilI1_0_a2_1z), .C(Oolo1_Z[0]), .D(O1Io1[0]), .Y(OilI1_i_a3_6_Z[0]) ); defparam \OilI1_i_a3_6[0] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_i_a3_5[0] ( .A(i0Io1[0]), .B(cnt33[0]), .C(N_1776), .D(N_1773), .Y(OilI1_i_a3_5_Z[0]) ); defparam \OilI1_i_a3_5[0] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_i_a3_3[0] ( .A(N_1784), .B(N_1762), .C(cnt32[0]), .D(I1Io1[0]), .Y(OilI1_i_a3_3_Z[0]) ); defparam \OilI1_i_a3_3[0] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_i_a3_2[0] ( .A(cnt39[0]), .B(cnt38[0]), .C(N_1785), .D(N_1770), .Y(OilI1_i_a3_2_Z[0]) ); defparam \OilI1_i_a3_2[0] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_i_a3_0[0] ( .A(N_89), .B(N_1149), .C(Iolo1_Z[0]), .D(l1Io1[0]), .Y(OilI1_i_a3_0_Z[0]) ); defparam \OilI1_i_a3_0[0] .INIT=16'h135F; // @28:492443 CFG3 \un1_OilI1_0_a3_0[23] ( .A(cnt24[23]), .B(N_1120), .C(N_1119), .Y(N_829) ); defparam \un1_OilI1_0_a3_0[23] .INIT=8'h80; // @28:494579 CFG4 \loli0_1_0[33] ( .A(N_1121), .B(N_1116), .C(l1II1), .D(l0lo1_1z), .Y(loli0_26) ); defparam \loli0_1_0[33] .INIT=16'hFF80; // @28:494558 CFG4 \loli0_1_0[32] ( .A(N_1115), .B(N_1116), .C(l1II1), .D(l0lo1_1z), .Y(loli0_25) ); defparam \loli0_1_0[32] .INIT=16'hFF80; // @28:494033 CFG4 \loli0_1_0[7] ( .A(N_1127), .B(N_1118), .C(l1II1), .D(l0lo1_1z), .Y(loli0_0) ); defparam \loli0_1_0[7] .INIT=16'hFF80; // @28:494747 CFG4 \loli0_1_0[41] ( .A(N_1126), .B(N_1116), .C(l1II1), .D(l0lo1_1z), .Y(loli0_34) ); defparam \loli0_1_0[41] .INIT=16'hFF80; // @28:494789 CFG4 \loli0_1_0[43] ( .A(N_1126), .B(N_1122), .C(l1II1), .D(l0lo1_1z), .Y(N_149_tz) ); defparam \loli0_1_0[43] .INIT=16'hFF80; // @28:494621 CFG4 \loli0_1_0[35] ( .A(N_1121), .B(N_1122), .C(l1II1), .D(l0lo1_1z), .Y(loli0_28) ); defparam \loli0_1_0[35] .INIT=16'hFF80; // @28:494684 CFG4 \loli0_1_0[38] ( .A(N_1130), .B(N_1122), .C(l1II1), .D(l0lo1_1z), .Y(loli0_31) ); defparam \loli0_1_0[38] .INIT=16'hFF80; // @28:494600 CFG4 \loli0_1_0[34] ( .A(N_1115), .B(N_1122), .C(l1II1), .D(l0lo1_1z), .Y(loli0_27) ); defparam \loli0_1_0[34] .INIT=16'hFF80; // @28:494705 CFG4 \loli0_1_0[39] ( .A(N_1127), .B(N_1122), .C(l1II1), .D(l0lo1_1z), .Y(loli0_32) ); defparam \loli0_1_0[39] .INIT=16'hFF80; // @28:494768 CFG4 \loli0_1_0[42] ( .A(N_1120), .B(N_1122), .C(l1II1), .D(l0lo1_1z), .Y(N_152_tz) ); defparam \loli0_1_0[42] .INIT=16'hFF80; // @28:492443 CFG4 \OilI1_i_a3_32[11] ( .A(cnt22[11]), .B(cnt16[11]), .C(N_1797), .D(N_1786), .Y(OilI1_i_a3_32_Z[11]) ); defparam \OilI1_i_a3_32[11] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_i_a3_31[11] ( .A(cnt30[11]), .B(cnt25[11]), .C(N_1799), .D(N_1795), .Y(OilI1_i_a3_31_Z[11]) ); defparam \OilI1_i_a3_31[11] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_i_a3_30[11] ( .A(cnt21[11]), .B(cnt19[11]), .C(N_1787), .D(N_1774), .Y(OilI1_i_a3_30_Z[11]) ); defparam \OilI1_i_a3_30[11] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_i_a3_29[11] ( .A(cnt29[11]), .B(cnt27[11]), .C(N_1798), .D(N_1775), .Y(OilI1_i_a3_29_Z[11]) ); defparam \OilI1_i_a3_29[11] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_i_a3_28[11] ( .A(cnt23[11]), .B(cnt18[11]), .C(N_1796), .D(N_1780), .Y(OilI1_i_a3_28_Z[11]) ); defparam \OilI1_i_a3_28[11] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_i_a3_27[11] ( .A(cnt31[11]), .B(cnt26[11]), .C(N_1792), .D(N_1769), .Y(OilI1_i_a3_27_Z[11]) ); defparam \OilI1_i_a3_27[11] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_i_a3_26[11] ( .A(cnt28[11]), .B(cnt20[11]), .C(N_1800), .D(N_1791), .Y(OilI1_i_a3_26_Z[11]) ); defparam \OilI1_i_a3_26[11] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_0_i_a3_32[9] ( .A(cnt25[9]), .B(cnt16[9]), .C(N_1797), .D(N_1795), .Y(OilI1_0_i_a3_32_Z[9]) ); defparam \OilI1_0_i_a3_32[9] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_0_i_a3_31[9] ( .A(cnt22[9]), .B(cnt17[9]), .C(N_1786), .D(N_1781), .Y(OilI1_0_i_a3_31_Z[9]) ); defparam \OilI1_0_i_a3_31[9] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_0_i_a3_30[9] ( .A(cnt31[9]), .B(cnt26[9]), .C(N_1792), .D(N_1769), .Y(OilI1_0_i_a3_30_Z[9]) ); defparam \OilI1_0_i_a3_30[9] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_0_i_a3_29[9] ( .A(cnt28[9]), .B(cnt23[9]), .C(N_1800), .D(N_1780), .Y(OilI1_0_i_a3_29_Z[9]) ); defparam \OilI1_0_i_a3_29[9] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_0_i_a3_28[9] ( .A(cnt20[9]), .B(cnt18[9]), .C(N_1796), .D(N_1791), .Y(OilI1_0_i_a3_28_Z[9]) ); defparam \OilI1_0_i_a3_28[9] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_0_i_a3_27[9] ( .A(cnt29[9]), .B(cnt27[9]), .C(N_1798), .D(N_1775), .Y(OilI1_0_i_a3_27_Z[9]) ); defparam \OilI1_0_i_a3_27[9] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_0_i_a3_26[9] ( .A(cnt21[9]), .B(cnt19[9]), .C(N_1787), .D(N_1774), .Y(OilI1_0_i_a3_26_Z[9]) ); defparam \OilI1_0_i_a3_26[9] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_0_i_a3_32[10] ( .A(cnt22[10]), .B(cnt16[10]), .C(N_1797), .D(N_1786), .Y(OilI1_0_i_a3_32_Z[10]) ); defparam \OilI1_0_i_a3_32[10] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_0_i_a3_31[10] ( .A(cnt30[10]), .B(cnt25[10]), .C(N_1799), .D(N_1795), .Y(OilI1_0_i_a3_31_Z[10]) ); defparam \OilI1_0_i_a3_31[10] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_0_i_a3_30[10] ( .A(cnt21[10]), .B(cnt19[10]), .C(N_1787), .D(N_1774), .Y(OilI1_0_i_a3_30_Z[10]) ); defparam \OilI1_0_i_a3_30[10] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_0_i_a3_29[10] ( .A(cnt29[10]), .B(cnt27[10]), .C(N_1798), .D(N_1775), .Y(OilI1_0_i_a3_29_Z[10]) ); defparam \OilI1_0_i_a3_29[10] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_0_i_a3_28[10] ( .A(cnt23[10]), .B(cnt18[10]), .C(N_1796), .D(N_1780), .Y(OilI1_0_i_a3_28_Z[10]) ); defparam \OilI1_0_i_a3_28[10] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_0_i_a3_27[10] ( .A(cnt31[10]), .B(cnt26[10]), .C(N_1792), .D(N_1769), .Y(OilI1_0_i_a3_27_Z[10]) ); defparam \OilI1_0_i_a3_27[10] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_0_i_a3_26[10] ( .A(cnt28[10]), .B(cnt20[10]), .C(N_1800), .D(N_1791), .Y(OilI1_0_i_a3_26_Z[10]) ); defparam \OilI1_0_i_a3_26[10] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_i_a3_31[1] ( .A(cnt28[1]), .B(cnt22[1]), .C(N_1800), .D(N_1786), .Y(OilI1_i_a3_31_Z[1]) ); defparam \OilI1_i_a3_31[1] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_i_a3_30[1] ( .A(cnt25[1]), .B(cnt17[1]), .C(N_1795), .D(N_1781), .Y(OilI1_i_a3_30_Z[1]) ); defparam \OilI1_i_a3_30[1] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_i_a3_29[1] ( .A(cnt30[1]), .B(cnt20[1]), .C(N_1799), .D(N_1791), .Y(OilI1_i_a3_29_Z[1]) ); defparam \OilI1_i_a3_29[1] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_i_a3_28[1] ( .A(cnt21[1]), .B(cnt19[1]), .C(N_1787), .D(N_1774), .Y(OilI1_i_a3_28_Z[1]) ); defparam \OilI1_i_a3_28[1] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_i_a3_27[1] ( .A(cnt29[1]), .B(cnt27[1]), .C(N_1798), .D(N_1775), .Y(OilI1_i_a3_27_Z[1]) ); defparam \OilI1_i_a3_27[1] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_i_a3_26[1] ( .A(cnt18[1]), .B(cnt16[1]), .C(N_1797), .D(N_1796), .Y(OilI1_i_a3_26_Z[1]) ); defparam \OilI1_i_a3_26[1] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_i_a3_25[1] ( .A(cnt26[1]), .B(cnt23[1]), .C(N_1792), .D(N_1780), .Y(OilI1_i_a3_25_Z[1]) ); defparam \OilI1_i_a3_25[1] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_i_a3_16[1] ( .A(cnt39[1]), .B(N_1642), .C(N_1770), .D(OilI1_i_a3_2_Z[1]), .Y(OilI1_i_a3_16_Z[1]) ); defparam \OilI1_i_a3_16[1] .INIT=16'h1300; // @28:492443 CFG4 \OilI1_i_a3_31[0] ( .A(cnt28[0]), .B(cnt26[0]), .C(N_1800), .D(N_1792), .Y(OilI1_i_a3_31_Z[0]) ); defparam \OilI1_i_a3_31[0] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_i_a3_30[0] ( .A(cnt31[0]), .B(cnt23[0]), .C(N_1780), .D(N_1769), .Y(OilI1_i_a3_30_Z[0]) ); defparam \OilI1_i_a3_30[0] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_i_a3_29[0] ( .A(cnt20[0]), .B(cnt18[0]), .C(N_1796), .D(N_1791), .Y(OilI1_i_a3_29_Z[0]) ); defparam \OilI1_i_a3_29[0] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_i_a3_28[0] ( .A(cnt29[0]), .B(cnt27[0]), .C(N_1798), .D(N_1775), .Y(OilI1_i_a3_28_Z[0]) ); defparam \OilI1_i_a3_28[0] .INIT=16'h153F; // @28:492443 CFG4 \OilI1_i_a3_27[0] ( .A(cnt21[0]), .B(cnt19[0]), .C(N_1787), .D(N_1774), .Y(OilI1_i_a3_27_Z[0]) ); defparam \OilI1_i_a3_27[0] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_i_a3_26[0] ( .A(cnt30[0]), .B(cnt16[0]), .C(N_1799), .D(N_1797), .Y(OilI1_i_a3_26_Z[0]) ); defparam \OilI1_i_a3_26[0] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_i_a3_25[0] ( .A(cnt25[0]), .B(cnt22[0]), .C(N_1795), .D(N_1786), .Y(OilI1_i_a3_25_Z[0]) ); defparam \OilI1_i_a3_25[0] .INIT=16'h135F; // @28:492443 CFG4 \OilI1_i_a3_16[0] ( .A(cnt34[0]), .B(N_1682), .C(N_1777), .D(OilI1_i_a3_2_Z[0]), .Y(OilI1_i_a3_16_Z[0]) ); defparam \OilI1_i_a3_16[0] .INIT=16'h1300; // @28:494390 CFG4 \loli0_1_0[24] ( .A(N_1120), .B(N_1119), .C(l1II1), .D(l0lo1_1z), .Y(loli0_17) ); defparam \loli0_1_0[24] .INIT=16'hFF80; // @28:492443 CFG4 \OilI1_i_a3_35[11] ( .A(OilI1_i_a3_14_Z[11]), .B(OilI1_i_a3_13_Z[11]), .C(OilI1_i_a3_12_Z[11]), .D(OilI1_i_a3_15_Z[11]), .Y(OilI1_i_a3_35_Z[11]) ); defparam \OilI1_i_a3_35[11] .INIT=16'h8000; // @28:492443 CFG4 \OilI1_i_a3_34[11] ( .A(OilI1_i_a3_11_Z[11]), .B(OilI1_i_a3_10_Z[11]), .C(OilI1_i_a3_8_Z[11]), .D(OilI1_i_a3_9_Z[11]), .Y(OilI1_i_a3_34_Z[11]) ); defparam \OilI1_i_a3_34[11] .INIT=16'h8000; // @28:492443 CFG4 \OilI1_i_a3_33[11] ( .A(N_1146), .B(cnt24[11]), .C(OilI1_i_a3_7_Z[11]), .D(OilI1_i_a3_6_Z[11]), .Y(OilI1_i_a3_33_Z[11]) ); defparam \OilI1_i_a3_33[11] .INIT=16'h7000; // @28:492443 CFG4 \OilI1_i_a3_24[11] ( .A(OilI1_i_a3_2_Z[11]), .B(OilI1_i_a3_0_Z[11]), .C(OilI1_i_a3_3_Z[11]), .D(OilI1_i_a3_1_Z[11]), .Y(OilI1_i_a3_24_Z[11]) ); defparam \OilI1_i_a3_24[11] .INIT=16'h8000; // @28:492443 CFG4 \OilI1_0_i_a3_35[9] ( .A(OilI1_0_i_a3_14_Z[9]), .B(OilI1_0_i_a3_12_Z[9]), .C(OilI1_0_i_a3_15_Z[9]), .D(OilI1_0_i_a3_13_Z[9]), .Y(OilI1_0_i_a3_35_Z[9]) ); defparam \OilI1_0_i_a3_35[9] .INIT=16'h8000; // @28:492443 CFG4 \OilI1_0_i_a3_34[9] ( .A(OilI1_0_i_a3_10_Z[9]), .B(OilI1_0_i_a3_9_Z[9]), .C(OilI1_0_i_a3_8_Z[9]), .D(OilI1_0_i_a3_11_Z[9]), .Y(OilI1_0_i_a3_34_Z[9]) ); defparam \OilI1_0_i_a3_34[9] .INIT=16'h8000; // @28:492443 CFG4 \OilI1_0_i_a3_33[9] ( .A(N_1146), .B(cnt24[9]), .C(OilI1_0_i_a3_7_Z[9]), .D(OilI1_0_i_a3_6_Z[9]), .Y(OilI1_0_i_a3_33_Z[9]) ); defparam \OilI1_0_i_a3_33[9] .INIT=16'h7000; // @28:492443 CFG4 \OilI1_0_i_a3_24[9] ( .A(OilI1_0_i_a3_1_Z[9]), .B(OilI1_0_i_a3_0_Z[9]), .C(OilI1_0_i_a3_2_Z[9]), .D(OilI1_0_i_a3_3_Z[9]), .Y(OilI1_0_i_a3_24_Z[9]) ); defparam \OilI1_0_i_a3_24[9] .INIT=16'h8000; // @28:492443 CFG4 \OilI1_0_i_a3_35[10] ( .A(OilI1_0_i_a3_14_Z[10]), .B(OilI1_0_i_a3_13_Z[10]), .C(OilI1_0_i_a3_12_Z[10]), .D(OilI1_0_i_a3_15_Z[10]), .Y(OilI1_0_i_a3_35_Z[10]) ); defparam \OilI1_0_i_a3_35[10] .INIT=16'h8000; // @28:492443 CFG4 \OilI1_0_i_a3_34[10] ( .A(OilI1_0_i_a3_10_Z[10]), .B(OilI1_0_i_a3_8_Z[10]), .C(OilI1_0_i_a3_9_Z[10]), .D(OilI1_0_i_a3_11_Z[10]), .Y(OilI1_0_i_a3_34_Z[10]) ); defparam \OilI1_0_i_a3_34[10] .INIT=16'h8000; // @28:492443 CFG4 \OilI1_0_i_a3_33[10] ( .A(N_1146), .B(cnt24[10]), .C(OilI1_0_i_a3_7_Z[10]), .D(OilI1_0_i_a3_6_Z[10]), .Y(OilI1_0_i_a3_33_Z[10]) ); defparam \OilI1_0_i_a3_33[10] .INIT=16'h7000; // @28:492443 CFG4 \OilI1_0_i_a3_24[10] ( .A(OilI1_0_i_a3_2_Z[10]), .B(OilI1_0_i_a3_0_Z[10]), .C(OilI1_0_i_a3_3_Z[10]), .D(OilI1_0_i_a3_1_Z[10]), .Y(OilI1_0_i_a3_24_Z[10]) ); defparam \OilI1_0_i_a3_24[10] .INIT=16'h8000; // @28:492443 CFG4 \OilI1_i_a3_34[1] ( .A(OilI1_i_a3_14_Z[1]), .B(OilI1_i_a3_13_Z[1]), .C(OilI1_i_a3_12_Z[1]), .D(OilI1_i_a3_11_Z[1]), .Y(OilI1_i_a3_34_Z[1]) ); defparam \OilI1_i_a3_34[1] .INIT=16'h8000; // @28:492443 CFG4 \OilI1_i_a3_33[1] ( .A(OilI1_i_a3_10_Z[1]), .B(OilI1_i_a3_8_Z[1]), .C(OilI1_i_a3_9_Z[1]), .D(OilI1_i_a3_7_Z[1]), .Y(OilI1_i_a3_33_Z[1]) ); defparam \OilI1_i_a3_33[1] .INIT=16'h8000; // @28:492443 CFG4 \OilI1_i_a3_32[1] ( .A(N_1146), .B(cnt24[1]), .C(OilI1_i_a3_6_Z[1]), .D(OilI1_i_a3_5_Z[1]), .Y(OilI1_i_a3_32_Z[1]) ); defparam \OilI1_i_a3_32[1] .INIT=16'h7000; // @28:492443 CFG4 \OilI1_i_a3_24[1] ( .A(cnt31[1]), .B(N_1769), .C(OilI1_i_a3_4_Z[1]), .D(OilI1_i_a3_3_Z[1]), .Y(OilI1_i_a3_24_Z[1]) ); defparam \OilI1_i_a3_24[1] .INIT=16'h7000; // @28:492443 CFG4 \OilI1_i_a3_23[1] ( .A(N_1147), .B(cnt07[1]), .C(OilI1_i_a3_16_Z[1]), .D(OilI1_i_a3_0_Z[1]), .Y(OilI1_i_a3_23_Z[1]) ); defparam \OilI1_i_a3_23[1] .INIT=16'h7000; // @28:492443 CFG4 \OilI1_i_a3_34[0] ( .A(OilI1_i_a3_12_Z[0]), .B(OilI1_i_a3_11_Z[0]), .C(OilI1_i_a3_14_Z[0]), .D(OilI1_i_a3_13_Z[0]), .Y(OilI1_i_a3_34_Z[0]) ); defparam \OilI1_i_a3_34[0] .INIT=16'h8000; // @28:492443 CFG4 \OilI1_i_a3_33[0] ( .A(OilI1_i_a3_10_Z[0]), .B(OilI1_i_a3_8_Z[0]), .C(OilI1_i_a3_7_Z[0]), .D(OilI1_i_a3_9_Z[0]), .Y(OilI1_i_a3_33_Z[0]) ); defparam \OilI1_i_a3_33[0] .INIT=16'h8000; // @28:492443 CFG4 \OilI1_i_a3_32[0] ( .A(N_1146), .B(cnt24[0]), .C(OilI1_i_a3_6_Z[0]), .D(OilI1_i_a3_5_Z[0]), .Y(OilI1_i_a3_32_Z[0]) ); defparam \OilI1_i_a3_32[0] .INIT=16'h7000; // @28:492443 CFG4 \OilI1_i_a3_23[0] ( .A(N_1147), .B(cnt07[0]), .C(OilI1_i_a3_16_Z[0]), .D(OilI1_i_a3_0_Z[0]), .Y(OilI1_i_a3_23_Z[0]) ); defparam \OilI1_i_a3_23[0] .INIT=16'h7000; // @28:492443 CFG4 \OilI1_i_a3_43[11] ( .A(OilI1_i_a3_31_Z[11]), .B(OilI1_i_a3_30_Z[11]), .C(OilI1_i_a3_29_Z[11]), .D(OilI1_i_a3_28_Z[11]), .Y(OilI1_i_a3_43_Z[11]) ); defparam \OilI1_i_a3_43[11] .INIT=16'h8000; // @28:492443 CFG4 \OilI1_0_i_a3_43[9] ( .A(OilI1_0_i_a3_31_Z[9]), .B(OilI1_0_i_a3_30_Z[9]), .C(OilI1_0_i_a3_29_Z[9]), .D(OilI1_0_i_a3_28_Z[9]), .Y(OilI1_0_i_a3_43_Z[9]) ); defparam \OilI1_0_i_a3_43[9] .INIT=16'h8000; // @28:492443 CFG4 \OilI1_0_i_a3_43[10] ( .A(OilI1_0_i_a3_31_Z[10]), .B(OilI1_0_i_a3_30_Z[10]), .C(OilI1_0_i_a3_29_Z[10]), .D(OilI1_0_i_a3_28_Z[10]), .Y(OilI1_0_i_a3_43_Z[10]) ); defparam \OilI1_0_i_a3_43[10] .INIT=16'h8000; // @28:492443 CFG4 \OilI1_i_a3_42[1] ( .A(OilI1_i_a3_30_Z[1]), .B(OilI1_i_a3_29_Z[1]), .C(OilI1_i_a3_28_Z[1]), .D(OilI1_i_a3_27_Z[1]), .Y(OilI1_i_a3_42_Z[1]) ); defparam \OilI1_i_a3_42[1] .INIT=16'h8000; // @28:492443 CFG4 \OilI1_i_a3_42[0] ( .A(OilI1_i_a3_30_Z[0]), .B(OilI1_i_a3_29_Z[0]), .C(OilI1_i_a3_28_Z[0]), .D(OilI1_i_a3_27_Z[0]), .Y(OilI1_i_a3_42_Z[0]) ); defparam \OilI1_i_a3_42[0] .INIT=16'h8000; // @28:492443 CFG4 \OilI1_i_a3_44[11] ( .A(OilI1_i_a3_34_Z[11]), .B(OilI1_i_a3_35_Z[11]), .C(OilI1_i_a3_33_Z[11]), .D(OilI1_i_a3_32_Z[11]), .Y(OilI1_i_a3_44_Z[11]) ); defparam \OilI1_i_a3_44[11] .INIT=16'h8000; // @28:492443 CFG4 \OilI1_i_a3_42[11] ( .A(OilI1_i_a3_27_Z[11]), .B(OilI1_i_a3_26_Z[11]), .C(OilI1_i_a3_25_Z[11]), .D(OilI1_i_a3_24_Z[11]), .Y(OilI1_i_a3_42_Z[11]) ); defparam \OilI1_i_a3_42[11] .INIT=16'h8000; // @28:492443 CFG4 \OilI1_0_i_a3_44[9] ( .A(OilI1_0_i_a3_34_Z[9]), .B(OilI1_0_i_a3_35_Z[9]), .C(OilI1_0_i_a3_33_Z[9]), .D(OilI1_0_i_a3_32_Z[9]), .Y(OilI1_0_i_a3_44_Z[9]) ); defparam \OilI1_0_i_a3_44[9] .INIT=16'h8000; // @28:492443 CFG4 \OilI1_0_i_a3_42[9] ( .A(OilI1_0_i_a3_27_Z[9]), .B(OilI1_0_i_a3_26_Z[9]), .C(OilI1_0_i_a3_25_Z[9]), .D(OilI1_0_i_a3_24_Z[9]), .Y(OilI1_0_i_a3_42_Z[9]) ); defparam \OilI1_0_i_a3_42[9] .INIT=16'h8000; // @28:492443 CFG4 \OilI1_0_i_a3_44[10] ( .A(OilI1_0_i_a3_34_Z[10]), .B(OilI1_0_i_a3_35_Z[10]), .C(OilI1_0_i_a3_33_Z[10]), .D(OilI1_0_i_a3_32_Z[10]), .Y(OilI1_0_i_a3_44_Z[10]) ); defparam \OilI1_0_i_a3_44[10] .INIT=16'h8000; // @28:492443 CFG4 \OilI1_0_i_a3_42[10] ( .A(OilI1_0_i_a3_27_Z[10]), .B(OilI1_0_i_a3_26_Z[10]), .C(OilI1_0_i_a3_25_Z[10]), .D(OilI1_0_i_a3_24_Z[10]), .Y(OilI1_0_i_a3_42_Z[10]) ); defparam \OilI1_0_i_a3_42[10] .INIT=16'h8000; // @28:492443 CFG4 \OilI1_i_a3_43[1] ( .A(OilI1_i_a3_32_Z[1]), .B(OilI1_i_a3_33_Z[1]), .C(OilI1_i_a3_34_Z[1]), .D(OilI1_i_a3_31_Z[1]), .Y(OilI1_i_a3_43_Z[1]) ); defparam \OilI1_i_a3_43[1] .INIT=16'h8000; // @28:492443 CFG4 \OilI1_i_a3_41[1] ( .A(OilI1_i_a3_26_Z[1]), .B(OilI1_i_a3_25_Z[1]), .C(OilI1_i_a3_24_Z[1]), .D(OilI1_i_a3_23_Z[1]), .Y(OilI1_i_a3_41_Z[1]) ); defparam \OilI1_i_a3_41[1] .INIT=16'h8000; // @28:492443 CFG4 \OilI1_i_a3_43[0] ( .A(OilI1_i_a3_32_Z[0]), .B(OilI1_i_a3_33_Z[0]), .C(OilI1_i_a3_34_Z[0]), .D(OilI1_i_a3_31_Z[0]), .Y(OilI1_i_a3_43_Z[0]) ); defparam \OilI1_i_a3_43[0] .INIT=16'h8000; // @28:492443 CFG4 \OilI1_i_a3_41[0] ( .A(OilI1_i_a3_26_Z[0]), .B(OilI1_i_a3_25_Z[0]), .C(OilI1_i_a3_24_Z[0]), .D(OilI1_i_a3_23_Z[0]), .Y(OilI1_i_a3_41_Z[0]) ); defparam \OilI1_i_a3_41[0] .INIT=16'h8000; // @28:492443 CFG4 \OilI1_i[11] ( .A(CoreAPB3_0_0_APBmslave0_PWRITE), .B(OilI1_i_a3_43_Z[11]), .C(OilI1_i_a3_44_Z[11]), .D(OilI1_i_a3_42_Z[11]), .Y(N_404) ); defparam \OilI1_i[11] .INIT=16'hEAAA; // @28:492443 CFG4 \OilI1_0_i[10] ( .A(CoreAPB3_0_0_APBmslave0_PWRITE), .B(OilI1_0_i_a3_43_Z[10]), .C(OilI1_0_i_a3_44_Z[10]), .D(OilI1_0_i_a3_42_Z[10]), .Y(N_159) ); defparam \OilI1_0_i[10] .INIT=16'hEAAA; // @28:492443 CFG4 \OilI1_i[1] ( .A(CoreAPB3_0_0_APBmslave0_PWRITE), .B(OilI1_i_a3_42_Z[1]), .C(OilI1_i_a3_43_Z[1]), .D(OilI1_i_a3_41_Z[1]), .Y(N_402) ); defparam \OilI1_i[1] .INIT=16'hEAAA; // @28:492443 CFG4 \OilI1_0_i[9] ( .A(CoreAPB3_0_0_APBmslave0_PWRITE), .B(OilI1_0_i_a3_43_Z[9]), .C(OilI1_0_i_a3_44_Z[9]), .D(OilI1_0_i_a3_42_Z[9]), .Y(N_161) ); defparam \OilI1_0_i[9] .INIT=16'hEAAA; // @28:492443 CFG4 \OilI1_i[0] ( .A(CoreAPB3_0_0_APBmslave0_PWRITE), .B(OilI1_i_a3_42_Z[0]), .C(OilI1_i_a3_43_Z[0]), .D(OilI1_i_a3_41_Z[0]), .Y(N_280) ); defparam \OilI1_i[0] .INIT=16'hEAAA; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_EIM_26s_1s_0s */ module CTSE_PEMSTAT_26s ( Iolo1_12, Iolo1_11, Iolo1_10, Iolo1_6, Iolo1_5, Iolo1_4, Iolo1_3, Iolo1_2, Iolo1_1, Iolo1_0, Iolo1_19, Iolo1_18, Iolo1_17, Iolo1_16, Iolo1_14, Oolo1_5, Oolo1_4, Oolo1_3, Oolo1_2, Oolo1_1, Oolo1_0, Oolo1_20, Oolo1_18, Oolo1_16, Oolo1_14, Oolo1_13, Oolo1_12, Oolo1_11, Oolo1_10, Oolo1_6, Oolo1_23, Oolo1_22, Oolo1_21, CoreAPB3_0_0_APBmslave0_PWDATA, paddr_0, PADDR_1z_0, CoreAPB3_0_0_APBmslave0_PADDR_5, CoreAPB3_0_0_APBmslave0_PADDR_6, CoreAPB3_0_0_APBmslave0_PADDR_0, CoreAPB3_0_0_APBmslave0_PADDR_3, CoreAPB3_0_0_APBmslave0_PADDR_1, i0lo1_11, i0lo1_12, i0lo1_41_3, i0lo1_41_0, i0lo1_41_1, i0lo1_40_3, i0lo1_40_0, i0lo1_40_1, i0lo1_3, i0lo1_6, i0lo1_4, i0lo1_5, i0lo1_0, un86_OilI1_0, un86_OilI1_2, un1_OilI1_1, un1_OilI1_2, un1_OilI1_5, un1_OilI1_10, un1_OilI1_0, un50_OilI1_0, un78_OilI1_0, cnt07, wrdata_0, cnt24_0, o0Io1_0, o0Io1_1, o0Io1_2, o0Io1_3, o0Io1_4, o0Io1_5, o0Io1_6, o0Io1_7, o0Io1_8, o0Io1_9, o0Io1_10, o0Io1_11, o0Io1_15, o0Io1_16, o0Io1_17, o0Io1_18, o0Io1_19, o0Io1_20, o0Io1_21, o0Io1_24, o0Io1_25, o0Io1_29, o0Io1_30, o0Io1_31, o0Io1_32, o0Io1_33, o0Io1_34, o0Io1_35, o0Io1_38, o0Io1_39, o0Io1_40, o0Io1_41, o0Io1_42, O1iO1, o0iO1_1z, o1II1, un80_OilI1_0_a2, rx_fifo_read_0, tx_fifo_write_sig14_i_2, N_1206, liO019_i_1, N_1112, N_82_2, un4_Ooo11_1, un1_o01O1_0, un1_Ii0O1, N_133, N_16, un52_OilI1, N_1147, un18_OilI1_0_a2, N_675, N_679, N_1146, N_829, N_404, N_159, N_402, N_161, N_280, l1II1, un1_ooiO1, CoreAPB3_0_0_APBmslave0_PWRITE, hstrst_i, PF_CCC_0_0_OUT0_FABCLK_0, IllI1, OllI1, i1II1, I0OI1 ) ; output Iolo1_12 ; output Iolo1_11 ; output Iolo1_10 ; output Iolo1_6 ; output Iolo1_5 ; output Iolo1_4 ; output Iolo1_3 ; output Iolo1_2 ; output Iolo1_1 ; output Iolo1_0 ; output Iolo1_19 ; output Iolo1_18 ; output Iolo1_17 ; output Iolo1_16 ; output Iolo1_14 ; output Oolo1_5 ; output Oolo1_4 ; output Oolo1_3 ; output Oolo1_2 ; output Oolo1_1 ; output Oolo1_0 ; output Oolo1_20 ; output Oolo1_18 ; output Oolo1_16 ; output Oolo1_14 ; output Oolo1_13 ; output Oolo1_12 ; output Oolo1_11 ; output Oolo1_10 ; output Oolo1_6 ; output Oolo1_23 ; output Oolo1_22 ; output Oolo1_21 ; input [31:1] CoreAPB3_0_0_APBmslave0_PWDATA ; input paddr_0 ; input PADDR_1z_0 ; input CoreAPB3_0_0_APBmslave0_PADDR_5 ; input CoreAPB3_0_0_APBmslave0_PADDR_6 ; input CoreAPB3_0_0_APBmslave0_PADDR_0 ; input CoreAPB3_0_0_APBmslave0_PADDR_3 ; input CoreAPB3_0_0_APBmslave0_PADDR_1 ; output [17:13] i0lo1_11 ; output [17:13] i0lo1_12 ; output i0lo1_41_3 ; output i0lo1_41_0 ; output i0lo1_41_1 ; output i0lo1_40_3 ; output i0lo1_40_0 ; output i0lo1_40_1 ; output i0lo1_3 ; output i0lo1_6 ; output i0lo1_4 ; output i0lo1_5 ; output i0lo1_0 ; output un86_OilI1_0 ; output un86_OilI1_2 ; output un1_OilI1_1 ; output un1_OilI1_2 ; output un1_OilI1_5 ; output un1_OilI1_10 ; output un1_OilI1_0 ; output un50_OilI1_0 ; output un78_OilI1_0 ; output [23:22] cnt07 ; input wrdata_0 ; output cnt24_0 ; output o0Io1_0 ; output o0Io1_1 ; output o0Io1_2 ; output o0Io1_3 ; output o0Io1_4 ; output o0Io1_5 ; output o0Io1_6 ; output o0Io1_7 ; output o0Io1_8 ; output o0Io1_9 ; output o0Io1_10 ; output o0Io1_11 ; output o0Io1_15 ; output o0Io1_16 ; output o0Io1_17 ; output o0Io1_18 ; output o0Io1_19 ; output o0Io1_20 ; output o0Io1_21 ; output o0Io1_24 ; output o0Io1_25 ; output o0Io1_29 ; output o0Io1_30 ; output o0Io1_31 ; output o0Io1_32 ; output o0Io1_33 ; output o0Io1_34 ; output o0Io1_35 ; output o0Io1_38 ; output o0Io1_39 ; output o0Io1_40 ; output o0Io1_41 ; output o0Io1_42 ; input [51:0] O1iO1 ; input [30:0] o0iO1_1z ; input o1II1 ; output un80_OilI1_0_a2 ; input rx_fifo_read_0 ; input tx_fifo_write_sig14_i_2 ; input N_1206 ; input liO019_i_1 ; input N_1112 ; input N_82_2 ; input un4_Ooo11_1 ; input un1_o01O1_0 ; input un1_Ii0O1 ; output N_133 ; output N_16 ; output un52_OilI1 ; output N_1147 ; output un18_OilI1_0_a2 ; output N_675 ; output N_679 ; output N_1146 ; output N_829 ; output N_404 ; output N_159 ; output N_402 ; output N_161 ; output N_280 ; input l1II1 ; input un1_ooiO1 ; input CoreAPB3_0_0_APBmslave0_PWRITE ; input hstrst_i ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input IllI1 ; input OllI1 ; input i1II1 ; input I0OI1 ; wire Iolo1_12 ; wire Iolo1_11 ; wire Iolo1_10 ; wire Iolo1_6 ; wire Iolo1_5 ; wire Iolo1_4 ; wire Iolo1_3 ; wire Iolo1_2 ; wire Iolo1_1 ; wire Iolo1_0 ; wire Iolo1_19 ; wire Iolo1_18 ; wire Iolo1_17 ; wire Iolo1_16 ; wire Iolo1_14 ; wire Oolo1_5 ; wire Oolo1_4 ; wire Oolo1_3 ; wire Oolo1_2 ; wire Oolo1_1 ; wire Oolo1_0 ; wire Oolo1_20 ; wire Oolo1_18 ; wire Oolo1_16 ; wire Oolo1_14 ; wire Oolo1_13 ; wire Oolo1_12 ; wire Oolo1_11 ; wire Oolo1_10 ; wire Oolo1_6 ; wire Oolo1_23 ; wire Oolo1_22 ; wire Oolo1_21 ; wire paddr_0 ; wire PADDR_1z_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_5 ; wire CoreAPB3_0_0_APBmslave0_PADDR_6 ; wire CoreAPB3_0_0_APBmslave0_PADDR_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_3 ; wire CoreAPB3_0_0_APBmslave0_PADDR_1 ; wire i0lo1_41_3 ; wire i0lo1_41_0 ; wire i0lo1_41_1 ; wire i0lo1_40_3 ; wire i0lo1_40_0 ; wire i0lo1_40_1 ; wire i0lo1_3 ; wire i0lo1_6 ; wire i0lo1_4 ; wire i0lo1_5 ; wire i0lo1_0 ; wire un86_OilI1_0 ; wire un86_OilI1_2 ; wire un1_OilI1_1 ; wire un1_OilI1_2 ; wire un1_OilI1_5 ; wire un1_OilI1_10 ; wire un1_OilI1_0 ; wire un50_OilI1_0 ; wire un78_OilI1_0 ; wire wrdata_0 ; wire cnt24_0 ; wire o0Io1_0 ; wire o0Io1_1 ; wire o0Io1_2 ; wire o0Io1_3 ; wire o0Io1_4 ; wire o0Io1_5 ; wire o0Io1_6 ; wire o0Io1_7 ; wire o0Io1_8 ; wire o0Io1_9 ; wire o0Io1_10 ; wire o0Io1_11 ; wire o0Io1_15 ; wire o0Io1_16 ; wire o0Io1_17 ; wire o0Io1_18 ; wire o0Io1_19 ; wire o0Io1_20 ; wire o0Io1_21 ; wire o0Io1_24 ; wire o0Io1_25 ; wire o0Io1_29 ; wire o0Io1_30 ; wire o0Io1_31 ; wire o0Io1_32 ; wire o0Io1_33 ; wire o0Io1_34 ; wire o0Io1_35 ; wire o0Io1_38 ; wire o0Io1_39 ; wire o0Io1_40 ; wire o0Io1_41 ; wire o0Io1_42 ; wire o1II1 ; wire un80_OilI1_0_a2 ; wire rx_fifo_read_0 ; wire tx_fifo_write_sig14_i_2 ; wire N_1206 ; wire liO019_i_1 ; wire N_1112 ; wire N_82_2 ; wire un4_Ooo11_1 ; wire un1_o01O1_0 ; wire un1_Ii0O1 ; wire N_133 ; wire N_16 ; wire un52_OilI1 ; wire N_1147 ; wire un18_OilI1_0_a2 ; wire N_675 ; wire N_679 ; wire N_1146 ; wire N_829 ; wire N_404 ; wire N_159 ; wire N_402 ; wire N_161 ; wire N_280 ; wire l1II1 ; wire un1_ooiO1 ; wire CoreAPB3_0_0_APBmslave0_PWRITE ; wire hstrst_i ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire IllI1 ; wire OllI1 ; wire i1II1 ; wire I0OI1 ; wire [15:0] O0Io1; wire [3:0] I0Io1; wire [43:0] l0Io1; wire [11:0] l1Io1; wire [43:12] o0Io1; wire [47:10] Ioli0_i; wire [11:0] I1Io1; wire [11:0] O1Io1; wire [41:7] loli0; wire [11:0] i0Io1; wire [11:0] cnt39; wire [11:0] cnt38; wire [11:0] cnt35; wire [11:0] cnt34; wire [11:0] cnt33; wire [11:0] cnt32; wire [11:0] cnt31; wire [11:0] cnt30; wire [11:0] cnt29; wire [11:0] cnt28; wire [17:0] cnt27; wire [17:0] cnt26; wire [17:0] cnt25; wire [23:0] cnt24; wire [11:0] cnt23; wire [11:0] cnt22; wire [11:0] cnt21; wire [11:0] cnt20; wire [11:0] cnt19; wire [11:0] cnt18; wire [11:0] cnt17; wire [11:0] cnt16; wire [11:0] cnt15; wire [11:0] cnt14; wire [11:0] cnt13; wire [11:0] cnt12; wire [17:0] cnt11; wire [17:0] cnt10; wire [11:0] cnt09; wire [17:0] cnt08; wire [21:0] cnt07_Z; wire [17:0] cnt06; wire [17:0] cnt05; wire [17:0] cnt04; wire [17:0] cnt03; wire [17:0] cnt02; wire [17:0] cnt01; wire [17:0] cnt00; wire N_15035 ; wire N_15036 ; wire N_15037 ; wire N_15038 ; wire N_15039 ; wire N_15040 ; wire N_15041 ; wire N_15042 ; wire N_15043 ; wire N_15044 ; wire N_15045 ; wire N_15046 ; wire N_15047 ; wire N_15048 ; wire N_15049 ; wire N_15050 ; wire N_15051 ; wire N_15052 ; wire N_15053 ; wire N_15054 ; wire N_15055 ; wire N_15056 ; wire N_15057 ; wire N_15058 ; wire N_15059 ; wire N_15060 ; wire N_15061 ; wire N_15062 ; wire N_149_tz ; wire N_152_tz ; wire N_1270 ; wire un36_Ioli0 ; wire N_1123 ; wire N_1135 ; wire N_1119 ; wire N_1136 ; wire N_1117 ; wire N_1126 ; wire N_1120 ; wire N_1128 ; wire N_1114 ; wire N_1127 ; wire N_1130 ; wire N_1118 ; wire N_1137 ; wire N_1121 ; wire l0lo1 ; wire N_1124 ; wire N_1115 ; wire N_1131 ; wire N_1133 ; wire N_15063 ; wire N_15064 ; wire N_15065 ; wire N_15066 ; wire N_15067 ; wire N_15068 ; wire GND ; wire VCC ; // @28:486870 CTSE_PEMSTAT_CNTRL_1s_26s CTSE_PEMSTAT_CNTRL_0 ( .o0iO1({o0iO1_1z[30:24], N_15038, N_15037, o0iO1_1z[21:18], N_15036, N_15035, o0iO1_1z[15:0]}), .O1iO1({O1iO1[51], N_15045, N_15044, O1iO1[48:32], N_15043, N_15042, O1iO1[29:24], N_15041, N_15040, N_15039, O1iO1[20:0]}), .O0Io1_1z(O0Io1[15:0]), .I0Io1(I0Io1[3:0]), .l0Io1({l0Io1[43:41], N_15050, l0Io1[39:38], N_15049, N_15048, l0Io1[35:26], N_15047, l0Io1[24:9], N_15046, l0Io1[7:0]}), .I0OI1(I0OI1), .i1II1(i1II1), .OllI1(OllI1), .IllI1(IllI1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:486966 CTSE_PEMSTAT_STORE_26s CTSE_PEMSTAT_STORE_1 ( .l1Io1(l1Io1[11:0]), .o0Io1({o0Io1[43], o0Io1_42, o0Io1_41, o0Io1_40, o0Io1_39, o0Io1_38, N_15052, N_15051, o0Io1_35, o0Io1_34, o0Io1_33, o0Io1_32, o0Io1_31, o0Io1_30, o0Io1_29, o0Io1[28:26], o0Io1_25, o0Io1_24, o0Io1[23:22], o0Io1_21, o0Io1_20, o0Io1_19, o0Io1_18, o0Io1_17, o0Io1_16, o0Io1_15, o0Io1[14:12], o0Io1_11, o0Io1_10, o0Io1_9, o0Io1_8, o0Io1_7, o0Io1_6, o0Io1_5, o0Io1_4, o0Io1_3, o0Io1_2, o0Io1_1, o0Io1_0}), .Ioli0_i_0(Ioli0_i[10]), .Ioli0_i_1(Ioli0_i[11]), .Ioli0_i_7(Ioli0_i[17]), .Ioli0_i_8(Ioli0_i[18]), .Ioli0_i_11(Ioli0_i[21]), .Ioli0_i_12(Ioli0_i[22]), .Ioli0_i_13(Ioli0_i[23]), .Ioli0_i_14(Ioli0_i[24]), .Ioli0_i_15(Ioli0_i[25]), .Ioli0_i_17(Ioli0_i[27]), .Ioli0_i_18(Ioli0_i[28]), .Ioli0_i_19(Ioli0_i[29]), .Ioli0_i_20(Ioli0_i[30]), .Ioli0_i_21(Ioli0_i[31]), .Ioli0_i_22(Ioli0_i[32]), .Ioli0_i_23(Ioli0_i[33]), .Ioli0_i_24(Ioli0_i[34]), .Ioli0_i_25(Ioli0_i[35]), .Ioli0_i_26(Ioli0_i[36]), .Ioli0_i_27(Ioli0_i[37]), .Ioli0_i_32(Ioli0_i[42]), .Ioli0_i_33(Ioli0_i[43]), .Ioli0_i_34(Ioli0_i[44]), .Ioli0_i_35(Ioli0_i[45]), .Ioli0_i_36(Ioli0_i[46]), .Ioli0_i_37(Ioli0_i[47]), .l0Io1({l0Io1[43:41], N_15057, l0Io1[39:38], N_15056, N_15055, l0Io1[35:26], N_15054, l0Io1[24:9], N_15053, l0Io1[7:0]}), .I1Io1(I1Io1[11:0]), .O1Io1(O1Io1[11:0]), .loli0_0(loli0[7]), .loli0_17(loli0[24]), .loli0_25(loli0[32]), .loli0_26(loli0[33]), .loli0_27(loli0[34]), .loli0_28(loli0[35]), .loli0_31(loli0[38]), .loli0_32(loli0[39]), .loli0_34(loli0[41]), .i0Io1(i0Io1[11:0]), .CoreAPB3_0_0_APBmslave0_PWDATA({CoreAPB3_0_0_APBmslave0_PWDATA[31:25], N_15062, N_15061, N_15060, N_15059, N_15058, CoreAPB3_0_0_APBmslave0_PWDATA[19:1]}), .cnt39(cnt39[11:0]), .cnt38(cnt38[11:0]), .cnt35(cnt35[11:0]), .I0Io1_1z(I0Io1[3:0]), .cnt34(cnt34[11:0]), .cnt33(cnt33[11:0]), .cnt32(cnt32[11:0]), .cnt31(cnt31[11:0]), .cnt30(cnt30[11:0]), .cnt29(cnt29[11:0]), .cnt28(cnt28[11:0]), .cnt27(cnt27[17:0]), .cnt26(cnt26[17:0]), .cnt25(cnt25[17:0]), .cnt24({cnt24[23], cnt24_0, cnt24[21:0]}), .cnt23(cnt23[11:0]), .wrdata_0(wrdata_0), .cnt22(cnt22[11:0]), .cnt21(cnt21[11:0]), .cnt20(cnt20[11:0]), .cnt19(cnt19[11:0]), .cnt18(cnt18[11:0]), .cnt17(cnt17[11:0]), .cnt16(cnt16[11:0]), .cnt15(cnt15[11:0]), .cnt14(cnt14[11:0]), .cnt13(cnt13[11:0]), .cnt12(cnt12[11:0]), .cnt11(cnt11[17:0]), .cnt10(cnt10[17:0]), .cnt09(cnt09[11:0]), .cnt08(cnt08[17:0]), .cnt07({cnt07[23:22], cnt07_Z[21:0]}), .O0Io1_1z(O0Io1[15:0]), .cnt06(cnt06[17:0]), .cnt05(cnt05[17:0]), .cnt04(cnt04[17:0]), .cnt03(cnt03[17:0]), .cnt02(cnt02[17:0]), .cnt01(cnt01[17:0]), .cnt00(cnt00[17:0]), .N_149_tz(N_149_tz), .N_152_tz(N_152_tz), .N_1270(N_1270), .un36_Ioli0(un36_Ioli0), .N_1123(N_1123), .N_1135(N_1135), .N_1119(N_1119), .N_1136(N_1136), .N_1117(N_1117), .N_1126(N_1126), .N_1120(N_1120), .N_1128(N_1128), .CoreAPB3_0_0_APBmslave0_PWRITE(CoreAPB3_0_0_APBmslave0_PWRITE), .un1_ooiO1(un1_ooiO1), .N_1114(N_1114), .N_1127(N_1127), .N_1130(N_1130), .N_1118(N_1118), .N_1137(N_1137), .N_1121(N_1121), .hstrst_i(hstrst_i), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .l0lo1(l0lo1), .N_1124(N_1124), .l1II1(l1II1), .N_1115(N_1115), .N_1131(N_1131), .N_1133(N_1133) ); // @28:487326 CTSE_PEMSTAT_EIM_26s_1s_0s CTSE_PEMSTAT_EIM_2 ( .cnt07(cnt07_Z[21:0]), .cnt24({cnt24[23], N_15063, cnt24[21:0]}), .cnt31(cnt31[11:0]), .loli0_26(loli0[33]), .loli0_25(loli0[32]), .loli0_0(loli0[7]), .loli0_34(loli0[41]), .loli0_28(loli0[35]), .loli0_31(loli0[38]), .loli0_27(loli0[34]), .loli0_32(loli0[39]), .loli0_17(loli0[24]), .cnt34(cnt34[11:0]), .cnt22(cnt22[11:0]), .cnt25(cnt25[17:0]), .cnt16(cnt16[11:0]), .cnt30(cnt30[11:0]), .cnt19(cnt19[11:0]), .cnt21(cnt21[11:0]), .cnt27(cnt27[17:0]), .cnt29(cnt29[11:0]), .cnt18(cnt18[11:0]), .cnt20(cnt20[11:0]), .cnt23(cnt23[11:0]), .cnt26(cnt26[17:0]), .cnt28(cnt28[11:0]), .cnt39(cnt39[11:0]), .cnt17(cnt17[11:0]), .l1Io1(l1Io1[11:0]), .cnt38(cnt38[11:0]), .I1Io1(I1Io1[11:0]), .cnt32(cnt32[11:0]), .cnt33(cnt33[11:0]), .i0Io1(i0Io1[11:0]), .O1Io1(O1Io1[11:0]), .cnt14(cnt14[11:0]), .o0Io1_31(o0Io1[43]), .o0Io1_0(o0Io1[12]), .o0Io1_14(o0Io1[26]), .o0Io1_2(o0Io1[14]), .o0Io1_16(o0Io1[28]), .o0Io1_1(o0Io1[13]), .o0Io1_15(o0Io1[27]), .o0Io1_10(o0Io1[22]), .o0Io1_11(o0Io1[23]), .cnt03(cnt03[17:0]), .cnt10(cnt10[17:0]), .cnt05(cnt05[17:0]), .cnt08(cnt08[17:0]), .cnt11(cnt11[17:0]), .cnt13(cnt13[11:0]), .cnt04(cnt04[17:0]), .cnt02(cnt02[17:0]), .cnt06(cnt06[17:0]), .cnt15(cnt15[11:0]), .cnt00(cnt00[17:0]), .cnt12(cnt12[11:0]), .cnt01(cnt01[17:0]), .cnt09(cnt09[11:0]), .cnt35(cnt35[11:0]), .Ioli0_i_27(Ioli0_i[37]), .Ioli0_i_32(Ioli0_i[42]), .Ioli0_i_33(Ioli0_i[43]), .Ioli0_i_34(Ioli0_i[44]), .Ioli0_i_35(Ioli0_i[45]), .Ioli0_i_36(Ioli0_i[46]), .Ioli0_i_37(Ioli0_i[47]), .Ioli0_i_12(Ioli0_i[22]), .Ioli0_i_13(Ioli0_i[23]), .Ioli0_i_14(Ioli0_i[24]), .Ioli0_i_15(Ioli0_i[25]), .Ioli0_i_17(Ioli0_i[27]), .Ioli0_i_18(Ioli0_i[28]), .Ioli0_i_19(Ioli0_i[29]), .Ioli0_i_20(Ioli0_i[30]), .Ioli0_i_21(Ioli0_i[31]), .Ioli0_i_22(Ioli0_i[32]), .Ioli0_i_23(Ioli0_i[33]), .Ioli0_i_24(Ioli0_i[34]), .Ioli0_i_25(Ioli0_i[35]), .Ioli0_i_26(Ioli0_i[36]), .Ioli0_i_0(Ioli0_i[10]), .Ioli0_i_1(Ioli0_i[11]), .Ioli0_i_7(Ioli0_i[17]), .Ioli0_i_8(Ioli0_i[18]), .Ioli0_i_11(Ioli0_i[21]), .un78_OilI1_0(un78_OilI1_0), .un50_OilI1_0(un50_OilI1_0), .un1_OilI1_1(un1_OilI1_1), .un1_OilI1_2(un1_OilI1_2), .un1_OilI1_5(un1_OilI1_5), .un1_OilI1_10(un1_OilI1_10), .un1_OilI1_0(un1_OilI1_0), .un86_OilI1_0(un86_OilI1_0), .un86_OilI1_2(un86_OilI1_2), .i0lo1_3(i0lo1_3), .i0lo1_6(i0lo1_6), .i0lo1_4(i0lo1_4), .i0lo1_5(i0lo1_5), .i0lo1_0(i0lo1_0), .i0lo1_40_3(i0lo1_40_3), .i0lo1_40_0(i0lo1_40_0), .i0lo1_40_1(i0lo1_40_1), .i0lo1_41_3(i0lo1_41_3), .i0lo1_41_0(i0lo1_41_0), .i0lo1_41_1(i0lo1_41_1), .i0lo1_12({i0lo1_12[17:16], N_15064, i0lo1_12[14:13]}), .i0lo1_11({i0lo1_11[17:16], N_15065, i0lo1_11[14:13]}), .CoreAPB3_0_0_APBmslave0_PADDR_5(CoreAPB3_0_0_APBmslave0_PADDR_5), .CoreAPB3_0_0_APBmslave0_PADDR_6(CoreAPB3_0_0_APBmslave0_PADDR_6), .CoreAPB3_0_0_APBmslave0_PADDR_0(CoreAPB3_0_0_APBmslave0_PADDR_0), .CoreAPB3_0_0_APBmslave0_PADDR_3(CoreAPB3_0_0_APBmslave0_PADDR_3), .CoreAPB3_0_0_APBmslave0_PADDR_1(CoreAPB3_0_0_APBmslave0_PADDR_1), .PADDR_0(PADDR_1z_0), .paddr_1z_0(paddr_0), .CoreAPB3_0_0_APBmslave0_PWDATA({CoreAPB3_0_0_APBmslave0_PWDATA[31:25], N_15068, N_15067, N_15066, CoreAPB3_0_0_APBmslave0_PWDATA[21:1]}), .Oolo1_5(Oolo1_5), .Oolo1_4(Oolo1_4), .Oolo1_3(Oolo1_3), .Oolo1_2(Oolo1_2), .Oolo1_1(Oolo1_1), .Oolo1_0(Oolo1_0), .Oolo1_20(Oolo1_20), .Oolo1_18(Oolo1_18), .Oolo1_16(Oolo1_16), .Oolo1_14(Oolo1_14), .Oolo1_13(Oolo1_13), .Oolo1_12(Oolo1_12), .Oolo1_11(Oolo1_11), .Oolo1_10(Oolo1_10), .Oolo1_6(Oolo1_6), .Oolo1_23(Oolo1_23), .Oolo1_22(Oolo1_22), .Oolo1_21(Oolo1_21), .Iolo1_12(Iolo1_12), .Iolo1_11(Iolo1_11), .Iolo1_10(Iolo1_10), .Iolo1_6(Iolo1_6), .Iolo1_5(Iolo1_5), .Iolo1_4(Iolo1_4), .Iolo1_3(Iolo1_3), .Iolo1_2(Iolo1_2), .Iolo1_1(Iolo1_1), .Iolo1_0(Iolo1_0), .Iolo1_19(Iolo1_19), .Iolo1_18(Iolo1_18), .Iolo1_17(Iolo1_17), .Iolo1_16(Iolo1_16), .Iolo1_14(Iolo1_14), .wrdata_0(wrdata_0), .N_280(N_280), .N_161(N_161), .N_402(N_402), .N_159(N_159), .N_404(N_404), .N_152_tz(N_152_tz), .N_149_tz(N_149_tz), .N_829(N_829), .N_1131(N_1131), .N_1146(N_1146), .N_1270(N_1270), .N_1135(N_1135), .N_1136(N_1136), .N_679(N_679), .N_675(N_675), .un18_OilI1_0_a2_1z(un18_OilI1_0_a2), .N_1147(N_1147), .N_1133(N_1133), .un52_OilI1(un52_OilI1), .N_1137(N_1137), .l1II1(l1II1), .N_1119(N_1119), .un36_Ioli0(un36_Ioli0), .N_1118(N_1118), .N_1124(N_1124), .N_16(N_16), .N_133(N_133), .un1_Ii0O1(un1_Ii0O1), .un1_o01O1_0(un1_o01O1_0), .CoreAPB3_0_0_APBmslave0_PWRITE(CoreAPB3_0_0_APBmslave0_PWRITE), .un4_Ooo11_1(un4_Ooo11_1), .un1_ooiO1(un1_ooiO1), .N_82_2(N_82_2), .N_1112(N_1112), .liO019_i_1(liO019_i_1), .N_1206(N_1206), .tx_fifo_write_sig14_i_2(tx_fifo_write_sig14_i_2), .rx_fifo_read_0(rx_fifo_read_0), .N_1130(N_1130), .N_1127(N_1127), .N_1115(N_1115), .N_1120(N_1120), .N_1117(N_1117), .N_1128(N_1128), .N_1126(N_1126), .N_1121(N_1121), .l0lo1_1z(l0lo1), .un80_OilI1_0_a2_1z(un80_OilI1_0_a2), .N_1114(N_1114), .N_1123(N_1123), .o1II1(o1II1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEMSTAT_26s */ module CTSE_MMCXWOL_1s_26s ( oIOI1, o0iO1, lliO1, OlOI1, iIOI1, IlOI1_1z, oliO1, iliO1, O0iO1_1z, l0iO1, i1iO1, o1iO1, I1iO1_1z, olOI1_1z, PF_IOD_CDR_C0_0_RX_CLK_R, OIlI1_i ) ; input [47:0] oIOI1 ; input [22:20] o0iO1 ; input [7:0] lliO1 ; input OlOI1 ; input iIOI1 ; output IlOI1_1z ; input oliO1 ; input iliO1 ; input O0iO1_1z ; input l0iO1 ; input i1iO1 ; input o1iO1 ; input I1iO1_1z ; input olOI1_1z ; input PF_IOD_CDR_C0_0_RX_CLK_R ; input OIlI1_i ; wire OlOI1 ; wire iIOI1 ; wire IlOI1_1z ; wire oliO1 ; wire iliO1 ; wire O0iO1_1z ; wire l0iO1 ; wire i1iO1 ; wire o1iO1 ; wire I1iO1_1z ; wire olOI1_1z ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire OIlI1_i ; wire [7:0] oII01_Z; wire [7:0] lII01_Z; wire [3:0] o0I01_Z; wire [3:0] o0I01_3_Z; wire [22:20] llI01_Z; wire [2:0] O1I01_Z; wire [2:1] O1I01_3; wire [0:0] O1I01_3_iv_i_Z; wire [4:0] I1I01_Z; wire [4:0] i0I01_Z; wire l0I01_Z ; wire l0I01_i ; wire O1ll1_Z ; wire O1ll1_i ; wire VCC ; wire I0I01_Z ; wire GND ; wire IlI01_Z ; wire OlI01_Z ; wire i0ll1_Z ; wire o0ll1_Z ; wire O0I01_Z ; wire ilI01_Z ; wire olI01_Z ; wire iII01_Z ; wire loI01_Z ; wire i1I015_Z ; wire un1_IlOI18_1_Z ; wire o1I01_Z ; wire l1I01_Z ; wire un1_o1I018_1_Z ; wire IoI01_Z ; wire un1_IoI017_1_Z ; wire i1I01_Z ; wire i1I01_2_Z ; wire N_708_i ; wire I1I01e ; wire I1I01_n3_Z ; wire I1I01_n2_Z ; wire I1I01_n1_Z ; wire N_709_i ; wire I1I01_n4_Z ; wire i0I01_n3_Z ; wire i0I01_n2_Z ; wire i0I01_n1_Z ; wire i0I01_n4_Z ; wire un1_iII01_5_Z ; wire un1_iII01_1_Z ; wire un1_o0I01_2_Z ; wire un1_iII01_Z ; wire I1I01_c2_Z ; wire N_86 ; wire O1I019_Z ; wire un1_i0I01_1_0_0_Z ; wire un19_l1I01_0_Z ; wire un30_l1I01_4_Z ; wire un36_l1I01_1_Z ; wire CO0 ; wire un1_liOI1_7_i ; wire un1_O1I019_1_Z ; wire un6_OoI01_2_Z ; wire o0I018_Z ; wire un1_liOI1_5_2_Z ; wire un1_l1I01_3_Z ; wire un1_l1I01_2_Z ; wire un1_l1I01_1_Z ; wire un1_l1I01_0_Z ; wire un31_l1I01_3_Z ; wire un31_l1I01_1_Z ; wire un31_l1I01_0_Z ; wire un7_l1I01_4_Z ; wire un7_l1I01_3_Z ; wire un7_l1I01_2_Z ; wire un7_l1I01_1_Z ; wire un25_l1I01_3_Z ; wire un25_l1I01_1_Z ; wire un19_l1I01_4_Z ; wire un19_l1I01_3_Z ; wire un19_l1I01_2_Z ; wire un19_l1I01_1_Z ; wire un13_l1I01_4_Z ; wire un13_l1I01_3_Z ; wire un13_l1I01_2_Z ; wire un13_l1I01_1_Z ; wire un1_i0I01_1_4_Z ; wire un1_O1I019_2_0_44_a3_1 ; wire un1_liOI1_6_2_Z ; wire un34_l1I01_Z ; wire un4_l1I01_Z ; wire un1_OlOI1_1_Z ; wire CO1 ; wire i0I01_c2_Z ; wire un1_OoI01_1_Z ; wire un31_l1I01_5_Z ; wire un7_l1I01_5_Z ; wire un25_l1I01_6_Z ; wire un25_l1I01_5_Z ; wire un19_l1I01_5_Z ; wire un13_l1I01_5_Z ; wire un1_i0I01_1_5_Z ; wire un6_OoI01_Z ; wire N_104 ; wire un1_liOI1_3_Z ; wire un1_l1I01_6_Z ; wire un25_l1I01_7_Z ; wire un1_liOI1_5_Z ; wire un19_l1I01_Z ; wire un7_l1I01_Z ; wire un13_l1I01_Z ; wire un31_l1I01_Z ; wire un1_i0I01_3_Z ; wire l1I01_2_Z ; wire l1I01_1_Z ; CFG1 IlOI1_RNO ( .A(l0I01_Z), .Y(l0I01_i) ); defparam IlOI1_RNO.INIT=2'h1; CFG1 IoI01_RNO ( .A(O1ll1_Z), .Y(O1ll1_i) ); defparam IoI01_RNO.INIT=2'h1; // @28:459808 SLE l0I01 ( .Q(l0I01_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I0I01_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459736 SLE IlI01 ( .Q(IlI01_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OlI01_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459664 SLE i0ll1 ( .Q(i0ll1_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(o0ll1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459772 SLE I0I01 ( .Q(I0I01_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(olOI1_1z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459628 SLE O0I01 ( .Q(O0I01_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I1iO1_1z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459592 SLE ilI01 ( .Q(ilI01_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(o1iO1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459556 SLE olI01 ( .Q(olI01_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1iO1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459520 SLE O1ll1 ( .Q(O1ll1_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(l0iO1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459448 SLE OlI01 ( .Q(OlI01_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O0iO1_1z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459412 SLE iII01 ( .Q(iII01_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iliO1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459376 SLE o0ll1 ( .Q(o0ll1_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oliO1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:460602 SLE loI01 ( .Q(loI01_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O0I01_Z), .EN(i1I015_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:460646 SLE IlOI1 ( .Q(IlOI1_1z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(l0I01_i), .EN(un1_IlOI18_1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:460363 SLE o1I01 ( .Q(o1I01_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(l1I01_Z), .EN(un1_o1I018_1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:460545 SLE IoI01 ( .Q(IoI01_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O1ll1_i), .EN(un1_IoI017_1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459700 SLE \oII01[5] ( .Q(oII01_Z[5]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lII01_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459700 SLE \oII01[4] ( .Q(oII01_Z[4]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lII01_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459700 SLE \oII01[3] ( .Q(oII01_Z[3]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lII01_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459700 SLE \oII01[2] ( .Q(oII01_Z[2]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lII01_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459700 SLE \oII01[1] ( .Q(oII01_Z[1]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lII01_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459700 SLE \oII01[0] ( .Q(oII01_Z[0]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lII01_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:460495 SLE i1I01 ( .Q(i1I01_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1I01_2_Z), .EN(i1I015_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459844 SLE \o0I01[1] ( .Q(o0I01_Z[1]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(o0I01_3_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459844 SLE \o0I01[0] ( .Q(o0I01_Z[0]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(o0I01_3_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459340 SLE \lII01[7] ( .Q(lII01_Z[7]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lliO1[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459340 SLE \lII01[6] ( .Q(lII01_Z[6]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lliO1[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459340 SLE \lII01[5] ( .Q(lII01_Z[5]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lliO1[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459340 SLE \lII01[4] ( .Q(lII01_Z[4]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lliO1[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459340 SLE \lII01[3] ( .Q(lII01_Z[3]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lliO1[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459340 SLE \lII01[2] ( .Q(lII01_Z[2]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lliO1[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459340 SLE \lII01[1] ( .Q(lII01_Z[1]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lliO1[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459340 SLE \lII01[0] ( .Q(lII01_Z[0]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lliO1[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459484 SLE \llI01[22] ( .Q(llI01_Z[22]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(o0iO1[22]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459484 SLE \llI01[21] ( .Q(llI01_Z[21]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(o0iO1[21]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459484 SLE \llI01[20] ( .Q(llI01_Z[20]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(o0iO1[20]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459700 SLE \oII01[7] ( .Q(oII01_Z[7]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lII01_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459700 SLE \oII01[6] ( .Q(oII01_Z[6]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lII01_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:460004 SLE \O1I01[2] ( .Q(O1I01_Z[2]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O1I01_3[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:460004 SLE \O1I01[1] ( .Q(O1I01_Z[1]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O1I01_3[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:460004 SLE \O1I01[0] ( .Q(O1I01_Z[0]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O1I01_3_iv_i_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459844 SLE \o0I01[3] ( .Q(o0I01_Z[3]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(o0I01_3_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459844 SLE \o0I01[2] ( .Q(o0I01_Z[2]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(o0I01_3_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:460114 SLE \I1I01[0] ( .Q(I1I01_Z[0]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_708_i), .EN(I1I01e), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:460114 SLE \I1I01[3] ( .Q(I1I01_Z[3]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I1I01_n3_Z), .EN(I1I01e), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:460114 SLE \I1I01[2] ( .Q(I1I01_Z[2]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I1I01_n2_Z), .EN(I1I01e), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:460114 SLE \I1I01[1] ( .Q(I1I01_Z[1]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I1I01_n1_Z), .EN(I1I01e), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459911 SLE \i0I01[0] ( .Q(i0I01_Z[0]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_709_i), .EN(o0ll1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:460114 SLE \I1I01[4] ( .Q(I1I01_Z[4]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I1I01_n4_Z), .EN(I1I01e), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459911 SLE \i0I01[3] ( .Q(i0I01_Z[3]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i0I01_n3_Z), .EN(o0ll1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459911 SLE \i0I01[2] ( .Q(i0I01_Z[2]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i0I01_n2_Z), .EN(o0ll1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459911 SLE \i0I01[1] ( .Q(i0I01_Z[1]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i0I01_n1_Z), .EN(o0ll1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459911 SLE \i0I01[4] ( .Q(i0I01_Z[4]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i0I01_n4_Z), .EN(o0ll1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:459944 CFG4 un1_iII01 ( .A(lII01_Z[7]), .B(un1_iII01_5_Z), .C(un1_iII01_1_Z), .D(un1_o0I01_2_Z), .Y(un1_iII01_Z) ); defparam un1_iII01.INIT=16'hDFFF; // @28:459944 CFG4 un1_iII01_1 ( .A(lII01_Z[2]), .B(lII01_Z[1]), .C(lII01_Z[0]), .D(iII01_Z), .Y(un1_iII01_1_Z) ); defparam un1_iII01_1.INIT=16'h0080; // @28:460114 CFG3 I1I01_n3 ( .A(I1I01_Z[3]), .B(I1I01_c2_Z), .C(N_86), .Y(I1I01_n3_Z) ); defparam I1I01_n3.INIT=8'h06; // @28:460114 CFG2 \I1I01_RNO[0] ( .A(O1I019_Z), .B(I1I01_Z[0]), .Y(N_708_i) ); defparam \I1I01_RNO[0] .INIT=4'h1; // @28:460165 CFG2 un1_i0I01_1_0_0 ( .A(i0I01_Z[1]), .B(i0I01_Z[2]), .Y(un1_i0I01_1_0_0_Z) ); defparam un1_i0I01_1_0_0.INIT=4'h8; // @28:460302 CFG2 un19_l1I01_0 ( .A(O1I01_Z[1]), .B(O1I01_Z[2]), .Y(un19_l1I01_0_Z) ); defparam un19_l1I01_0.INIT=4'h4; // @28:460331 CFG2 un30_l1I01_4 ( .A(oII01_Z[4]), .B(oIOI1[12]), .Y(un30_l1I01_4_Z) ); defparam un30_l1I01_4.INIT=4'h6; // @28:460352 CFG2 un36_l1I01_1 ( .A(oII01_Z[1]), .B(oIOI1[1]), .Y(un36_l1I01_1_Z) ); defparam un36_l1I01_1.INIT=4'h6; // @28:460031 CFG2 O1I019 ( .A(o0ll1_Z), .B(iII01_Z), .Y(O1I019_Z) ); defparam O1I019.INIT=4'h8; // @28:460107 CFG2 \O1I01_RNIOEBO8[0] ( .A(O1I01_Z[0]), .B(o0ll1_Z), .Y(CO0) ); defparam \O1I01_RNIOEBO8[0] .INIT=4'h8; // @28:460014 CFG2 un1_O1I019_1 ( .A(un1_liOI1_7_i), .B(O1I019_Z), .Y(un1_O1I019_1_Z) ); defparam un1_O1I019_1.INIT=4'h1; // @28:460487 CFG2 un6_OoI01_2 ( .A(I1I01_Z[1]), .B(I1I01_Z[2]), .Y(un6_OoI01_2_Z) ); defparam un6_OoI01_2.INIT=4'h1; // @28:459871 CFG2 o0I018 ( .A(i0ll1_Z), .B(IlI01_Z), .Y(o0I018_Z) ); defparam o0I018.INIT=4'h8; // @28:460437 CFG4 un1_liOI1_5_2 ( .A(i0ll1_Z), .B(I1I01_Z[4]), .C(I1I01_Z[1]), .D(I1I01_Z[0]), .Y(un1_liOI1_5_2_Z) ); defparam un1_liOI1_5_2.INIT=16'h0200; // @28:460239 CFG4 un1_l1I01_3 ( .A(oIOI1[41]), .B(oIOI1[40]), .C(oII01_Z[1]), .D(oII01_Z[0]), .Y(un1_l1I01_3_Z) ); defparam un1_l1I01_3.INIT=16'h8421; // @28:460239 CFG4 un1_l1I01_2 ( .A(oIOI1[45]), .B(oIOI1[42]), .C(oII01_Z[5]), .D(oII01_Z[2]), .Y(un1_l1I01_2_Z) ); defparam un1_l1I01_2.INIT=16'h8421; // @28:460239 CFG4 un1_l1I01_1 ( .A(oIOI1[46]), .B(oIOI1[43]), .C(oII01_Z[6]), .D(oII01_Z[3]), .Y(un1_l1I01_1_Z) ); defparam un1_l1I01_1.INIT=16'h8421; // @28:460239 CFG4 un1_l1I01_0 ( .A(oIOI1[47]), .B(oIOI1[44]), .C(oII01_Z[7]), .D(oII01_Z[4]), .Y(un1_l1I01_0_Z) ); defparam un1_l1I01_0.INIT=16'h8421; // @28:459944 CFG4 un1_iII01_5 ( .A(lII01_Z[6]), .B(lII01_Z[5]), .C(lII01_Z[4]), .D(lII01_Z[3]), .Y(un1_iII01_5_Z) ); defparam un1_iII01_5.INIT=16'h7FFF; // @28:460344 CFG4 un31_l1I01_3 ( .A(oIOI1[2]), .B(oIOI1[0]), .C(oII01_Z[2]), .D(oII01_Z[0]), .Y(un31_l1I01_3_Z) ); defparam un31_l1I01_3.INIT=16'h8421; // @28:460344 CFG4 un31_l1I01_1 ( .A(oIOI1[5]), .B(oIOI1[4]), .C(oII01_Z[5]), .D(oII01_Z[4]), .Y(un31_l1I01_1_Z) ); defparam un31_l1I01_1.INIT=16'h8421; // @28:460344 CFG4 un31_l1I01_0 ( .A(oIOI1[7]), .B(oIOI1[3]), .C(oII01_Z[7]), .D(oII01_Z[3]), .Y(un31_l1I01_0_Z) ); defparam un31_l1I01_0.INIT=16'h8421; // @28:460260 CFG4 un7_l1I01_4 ( .A(oIOI1[39]), .B(oII01_Z[7]), .C(O1I01_Z[2]), .D(O1I01_Z[1]), .Y(un7_l1I01_4_Z) ); defparam un7_l1I01_4.INIT=16'h0900; // @28:460260 CFG4 un7_l1I01_3 ( .A(oIOI1[36]), .B(oIOI1[32]), .C(oII01_Z[4]), .D(oII01_Z[0]), .Y(un7_l1I01_3_Z) ); defparam un7_l1I01_3.INIT=16'h8421; // @28:460260 CFG4 un7_l1I01_2 ( .A(oIOI1[35]), .B(oIOI1[34]), .C(oII01_Z[3]), .D(oII01_Z[2]), .Y(un7_l1I01_2_Z) ); defparam un7_l1I01_2.INIT=16'h8421; // @28:460260 CFG4 un7_l1I01_1 ( .A(oIOI1[37]), .B(oIOI1[33]), .C(oII01_Z[5]), .D(oII01_Z[1]), .Y(un7_l1I01_1_Z) ); defparam un7_l1I01_1.INIT=16'h8421; // @28:460323 CFG4 un25_l1I01_3 ( .A(oIOI1[11]), .B(oIOI1[8]), .C(oII01_Z[3]), .D(oII01_Z[0]), .Y(un25_l1I01_3_Z) ); defparam un25_l1I01_3.INIT=16'h8421; // @28:460323 CFG4 un25_l1I01_1 ( .A(oIOI1[13]), .B(oIOI1[10]), .C(oII01_Z[5]), .D(oII01_Z[2]), .Y(un25_l1I01_1_Z) ); defparam un25_l1I01_1.INIT=16'h8421; // @28:460302 CFG3 un19_l1I01_4 ( .A(un19_l1I01_0_Z), .B(oIOI1[23]), .C(oII01_Z[7]), .Y(un19_l1I01_4_Z) ); defparam un19_l1I01_4.INIT=8'h82; // @28:460302 CFG4 un19_l1I01_3 ( .A(oIOI1[20]), .B(oIOI1[16]), .C(oII01_Z[4]), .D(oII01_Z[0]), .Y(un19_l1I01_3_Z) ); defparam un19_l1I01_3.INIT=16'h8421; // @28:460302 CFG4 un19_l1I01_2 ( .A(oIOI1[19]), .B(oIOI1[18]), .C(oII01_Z[3]), .D(oII01_Z[2]), .Y(un19_l1I01_2_Z) ); defparam un19_l1I01_2.INIT=16'h8421; // @28:460302 CFG4 un19_l1I01_1 ( .A(oIOI1[22]), .B(oIOI1[17]), .C(oII01_Z[6]), .D(oII01_Z[1]), .Y(un19_l1I01_1_Z) ); defparam un19_l1I01_1.INIT=16'h8421; // @28:460281 CFG4 un13_l1I01_4 ( .A(oIOI1[31]), .B(oII01_Z[7]), .C(O1I01_Z[2]), .D(O1I01_Z[1]), .Y(un13_l1I01_4_Z) ); defparam un13_l1I01_4.INIT=16'h0900; // @28:460281 CFG4 un13_l1I01_3 ( .A(oIOI1[28]), .B(oIOI1[27]), .C(oII01_Z[4]), .D(oII01_Z[3]), .Y(un13_l1I01_3_Z) ); defparam un13_l1I01_3.INIT=16'h8421; // @28:460281 CFG4 un13_l1I01_2 ( .A(oIOI1[26]), .B(oIOI1[25]), .C(oII01_Z[2]), .D(oII01_Z[1]), .Y(un13_l1I01_2_Z) ); defparam un13_l1I01_2.INIT=16'h8421; // @28:460281 CFG4 un13_l1I01_1 ( .A(oIOI1[30]), .B(oIOI1[24]), .C(oII01_Z[6]), .D(oII01_Z[0]), .Y(un13_l1I01_1_Z) ); defparam un13_l1I01_1.INIT=16'h8421; // @28:460165 CFG4 un1_i0I01_1_4 ( .A(i0I01_Z[0]), .B(I1I01_Z[4]), .C(I1I01_Z[0]), .D(I1I01_Z[3]), .Y(un1_i0I01_1_4_Z) ); defparam un1_i0I01_1_4.INIT=16'h0001; // @28:433143 CFG4 \I1I01_RNII5V8F[2] ( .A(I1I01_Z[3]), .B(I1I01_Z[2]), .C(I1I01_Z[0]), .D(I1I01_Z[1]), .Y(un1_O1I019_2_0_44_a3_1) ); defparam \I1I01_RNII5V8F[2] .INIT=16'h0001; // @28:460688 CFG4 un1_liOI1_6_2 ( .A(llI01_Z[22]), .B(llI01_Z[21]), .C(llI01_Z[20]), .D(O1ll1_Z), .Y(un1_liOI1_6_2_Z) ); defparam un1_liOI1_6_2.INIT=16'h0100; // @28:460344 CFG3 un34_l1I01 ( .A(O1I01_Z[2]), .B(O1I01_Z[1]), .C(O1I01_Z[0]), .Y(un34_l1I01_Z) ); defparam un34_l1I01.INIT=8'h08; // @28:459893 CFG4 un1_o0I01_2 ( .A(o0I01_Z[3]), .B(o0I01_Z[2]), .C(o0I01_Z[1]), .D(o0I01_Z[0]), .Y(un1_o0I01_2_Z) ); defparam un1_o0I01_2.INIT=16'h0008; // @28:460522 CFG4 i1I015 ( .A(o0I01_Z[3]), .B(o0I01_Z[2]), .C(o0I01_Z[1]), .D(o0I01_Z[0]), .Y(i1I015_Z) ); defparam i1I015.INIT=16'h0040; // @28:460537 CFG3 i1I01_2 ( .A(olI01_Z), .B(ilI01_Z), .C(O0I01_Z), .Y(i1I01_2_Z) ); defparam i1I01_2.INIT=8'hFE; // @28:460107 CFG3 un4_l1I01 ( .A(O1I01_Z[2]), .B(O1I01_Z[1]), .C(O1I01_Z[0]), .Y(un4_l1I01_Z) ); defparam un4_l1I01.INIT=8'h10; // @28:460702 CFG4 un1_OlOI1_1 ( .A(iIOI1), .B(OlOI1), .C(loI01_Z), .D(IoI01_Z), .Y(un1_OlOI1_1_Z) ); defparam un1_OlOI1_1.INIT=16'hECA0; // @28:459904 CFG3 \un1_o0I01_5_1.CO1 ( .A(o0I01_Z[0]), .B(o0ll1_Z), .C(o0I01_Z[1]), .Y(CO1) ); defparam \un1_o0I01_5_1.CO1 .INIT=8'h80; // @28:460114 CFG3 I1I01_c2 ( .A(I1I01_Z[2]), .B(I1I01_Z[1]), .C(I1I01_Z[0]), .Y(I1I01_c2_Z) ); defparam I1I01_c2.INIT=8'h80; // @28:459911 CFG3 i0I01_c2 ( .A(i0I01_Z[2]), .B(i0I01_Z[1]), .C(i0I01_Z[0]), .Y(i0I01_c2_Z) ); defparam i0I01_c2.INIT=8'h80; // @28:460587 CFG3 un1_OoI01_1 ( .A(i1I01_Z), .B(o1I01_Z), .C(un34_l1I01_Z), .Y(un1_OoI01_1_Z) ); defparam un1_OoI01_1.INIT=8'h80; // @28:460344 CFG4 un31_l1I01_5 ( .A(un36_l1I01_1_Z), .B(un31_l1I01_3_Z), .C(oIOI1[6]), .D(oII01_Z[6]), .Y(un31_l1I01_5_Z) ); defparam un31_l1I01_5.INIT=16'h4004; // @28:460260 CFG4 un7_l1I01_5 ( .A(oII01_Z[6]), .B(oIOI1[38]), .C(un7_l1I01_1_Z), .D(O1I01_Z[0]), .Y(un7_l1I01_5_Z) ); defparam un7_l1I01_5.INIT=16'h0090; // @28:460323 CFG4 un25_l1I01_6 ( .A(un30_l1I01_4_Z), .B(un25_l1I01_3_Z), .C(oIOI1[9]), .D(oII01_Z[1]), .Y(un25_l1I01_6_Z) ); defparam un25_l1I01_6.INIT=16'h4004; // @28:460323 CFG4 un25_l1I01_5 ( .A(oII01_Z[6]), .B(oIOI1[14]), .C(un25_l1I01_1_Z), .D(O1I01_Z[0]), .Y(un25_l1I01_5_Z) ); defparam un25_l1I01_5.INIT=16'h9000; // @28:460302 CFG4 un19_l1I01_5 ( .A(oII01_Z[5]), .B(oIOI1[21]), .C(un19_l1I01_1_Z), .D(O1I01_Z[0]), .Y(un19_l1I01_5_Z) ); defparam un19_l1I01_5.INIT=16'h0090; // @28:460281 CFG4 un13_l1I01_5 ( .A(oII01_Z[5]), .B(oIOI1[29]), .C(un13_l1I01_1_Z), .D(O1I01_Z[0]), .Y(un13_l1I01_5_Z) ); defparam un13_l1I01_5.INIT=16'h9000; // @28:460165 CFG4 un1_i0I01_1_5 ( .A(i0I01_Z[3]), .B(i0I01_Z[4]), .C(un6_OoI01_2_Z), .D(un1_i0I01_1_0_0_Z), .Y(un1_i0I01_1_5_Z) ); defparam un1_i0I01_1_5.INIT=16'h1000; // @28:460487 CFG4 un6_OoI01 ( .A(I1I01_Z[0]), .B(un6_OoI01_2_Z), .C(I1I01_Z[4]), .D(I1I01_Z[3]), .Y(un6_OoI01_Z) ); defparam un6_OoI01.INIT=16'h0040; // @28:433143 CFG4 un1_i0I01_1_0_0_RNI889TQ ( .A(i0I01_Z[0]), .B(un1_i0I01_1_0_0_Z), .C(i0I01_Z[4]), .D(i0I01_Z[3]), .Y(N_104) ); defparam un1_i0I01_1_0_0_RNI889TQ.INIT=16'h0004; // @28:459854 CFG4 \o0I01_3[1] ( .A(o0ll1_Z), .B(o0I018_Z), .C(o0I01_Z[1]), .D(o0I01_Z[0]), .Y(o0I01_3_Z[1]) ); defparam \o0I01_3[1] .INIT=16'h1230; // @28:460014 CFG3 \O1I01_RNO[1] ( .A(CO0), .B(un1_O1I019_1_Z), .C(O1I01_Z[1]), .Y(O1I01_3[1]) ); defparam \O1I01_RNO[1] .INIT=8'h48; // @28:460091 CFG4 un1_liOI1_3 ( .A(o0ll1_Z), .B(O1I01_Z[0]), .C(O1I01_Z[2]), .D(O1I01_Z[1]), .Y(un1_liOI1_3_Z) ); defparam un1_liOI1_3.INIT=16'hAAA8; // @28:460239 CFG4 un1_l1I01_6 ( .A(un1_l1I01_3_Z), .B(un1_l1I01_2_Z), .C(un1_l1I01_1_Z), .D(un1_l1I01_0_Z), .Y(un1_l1I01_6_Z) ); defparam un1_l1I01_6.INIT=16'h8000; // @28:460323 CFG4 un25_l1I01_7 ( .A(un19_l1I01_0_Z), .B(un25_l1I01_5_Z), .C(oIOI1[15]), .D(oII01_Z[7]), .Y(un25_l1I01_7_Z) ); defparam un25_l1I01_7.INIT=16'h8008; // @28:460437 CFG4 un1_liOI1_5 ( .A(I1I01_Z[3]), .B(I1I01_Z[2]), .C(un1_liOI1_5_2_Z), .D(un4_l1I01_Z), .Y(un1_liOI1_5_Z) ); defparam un1_liOI1_5.INIT=16'h1000; // @28:460673 CFG3 un1_IlOI18_1 ( .A(l0I01_Z), .B(un1_OlOI1_1_Z), .C(un1_liOI1_6_2_Z), .Y(un1_IlOI18_1_Z) ); defparam un1_IlOI18_1.INIT=8'hEA; // @28:459854 CFG3 \o0I01_3[2] ( .A(CO1), .B(o0I018_Z), .C(o0I01_Z[2]), .Y(o0I01_3_Z[2]) ); defparam \o0I01_3[2] .INIT=8'h12; // @28:460014 CFG4 \O1I01_RNO[2] ( .A(CO0), .B(un1_O1I019_1_Z), .C(O1I01_Z[2]), .D(O1I01_Z[1]), .Y(O1I01_3[2]) ); defparam \O1I01_RNO[2] .INIT=16'h48C0; // @28:460302 CFG4 un19_l1I01 ( .A(un19_l1I01_2_Z), .B(un19_l1I01_3_Z), .C(un19_l1I01_5_Z), .D(un19_l1I01_4_Z), .Y(un19_l1I01_Z) ); defparam un19_l1I01.INIT=16'h8000; // @28:460260 CFG4 un7_l1I01 ( .A(un7_l1I01_2_Z), .B(un7_l1I01_5_Z), .C(un7_l1I01_4_Z), .D(un7_l1I01_3_Z), .Y(un7_l1I01_Z) ); defparam un7_l1I01.INIT=16'h8000; // @28:460281 CFG4 un13_l1I01 ( .A(un13_l1I01_2_Z), .B(un13_l1I01_5_Z), .C(un13_l1I01_4_Z), .D(un13_l1I01_3_Z), .Y(un13_l1I01_Z) ); defparam un13_l1I01.INIT=16'h8000; // @28:460344 CFG4 un31_l1I01 ( .A(un31_l1I01_0_Z), .B(un31_l1I01_1_Z), .C(un34_l1I01_Z), .D(un31_l1I01_5_Z), .Y(un31_l1I01_Z) ); defparam un31_l1I01.INIT=16'h8000; // @28:459854 CFG4 \o0I01_3[0] ( .A(un1_o0I01_2_Z), .B(o0I018_Z), .C(o0I01_Z[0]), .D(o0ll1_Z), .Y(o0I01_3_Z[0]) ); defparam \o0I01_3[0] .INIT=16'h2130; // @28:459854 CFG4 \o0I01_3[3] ( .A(CO1), .B(o0I018_Z), .C(o0I01_Z[3]), .D(o0I01_Z[2]), .Y(o0I01_3_Z[3]) ); defparam \o0I01_3[3] .INIT=16'h1230; // @28:460165 CFG4 un1_i0I01_3 ( .A(un1_i0I01_1_4_Z), .B(un6_OoI01_Z), .C(un1_i0I01_1_5_Z), .D(un34_l1I01_Z), .Y(un1_i0I01_3_Z) ); defparam un1_i0I01_3.INIT=16'hECA0; // @28:460239 CFG4 l1I01_2 ( .A(un1_l1I01_6_Z), .B(un25_l1I01_7_Z), .C(un4_l1I01_Z), .D(un25_l1I01_6_Z), .Y(l1I01_2_Z) ); defparam l1I01_2.INIT=16'hECA0; // @28:460239 CFG2 l1I01_1 ( .A(un7_l1I01_Z), .B(un13_l1I01_Z), .Y(l1I01_1_Z) ); defparam l1I01_1.INIT=4'hE; // @28:459911 CFG4 i0I01_n2 ( .A(i0I01_Z[0]), .B(un1_iII01_Z), .C(i0I01_Z[2]), .D(i0I01_Z[1]), .Y(i0I01_n2_Z) ); defparam i0I01_n2.INIT=16'h1230; // @28:460048 CFG4 un1_liOI1_7 ( .A(o0ll1_Z), .B(un1_i0I01_1_4_Z), .C(un1_i0I01_1_5_Z), .D(un34_l1I01_Z), .Y(un1_liOI1_7_i) ); defparam un1_liOI1_7.INIT=16'hAA80; // @28:433143 CFG4 O1I019_RNIBEMUF1 ( .A(N_104), .B(O1I019_Z), .C(I1I01_Z[4]), .D(un1_O1I019_2_0_44_a3_1), .Y(N_86) ); defparam O1I019_RNIBEMUF1.INIT=16'hFECC; // @28:433143 CFG4 un1_i0I01_3_RNIVSQ5B ( .A(o0ll1_Z), .B(O1I019_Z), .C(un34_l1I01_Z), .D(un1_i0I01_3_Z), .Y(I1I01e) ); defparam un1_i0I01_3_RNIVSQ5B.INIT=16'hEEEC; // @28:460114 CFG4 I1I01_n4 ( .A(I1I01_Z[3]), .B(I1I01_Z[4]), .C(N_86), .D(I1I01_c2_Z), .Y(I1I01_n4_Z) ); defparam I1I01_n4.INIT=16'h060C; // @28:460114 CFG4 I1I01_n2 ( .A(I1I01_Z[0]), .B(N_86), .C(I1I01_Z[2]), .D(I1I01_Z[1]), .Y(I1I01_n2_Z) ); defparam I1I01_n2.INIT=16'h1230; // @28:460114 CFG3 I1I01_n1 ( .A(I1I01_Z[0]), .B(N_86), .C(I1I01_Z[1]), .Y(I1I01_n1_Z) ); defparam I1I01_n1.INIT=8'h12; // @28:459911 CFG3 i0I01_n3 ( .A(i0I01_Z[3]), .B(i0I01_c2_Z), .C(un1_iII01_Z), .Y(i0I01_n3_Z) ); defparam i0I01_n3.INIT=8'h06; // @28:459911 CFG3 i0I01_n1 ( .A(i0I01_Z[0]), .B(un1_iII01_Z), .C(i0I01_Z[1]), .Y(i0I01_n1_Z) ); defparam i0I01_n1.INIT=8'h12; // @28:460004 CFG4 \O1I01_3_iv_i[0] ( .A(O1I01_Z[0]), .B(un1_liOI1_3_Z), .C(O1I019_Z), .D(un1_liOI1_7_i), .Y(O1I01_3_iv_i_Z[0]) ); defparam \O1I01_3_iv_i[0] .INIT=16'h0F06; // @28:460239 CFG4 l1I01 ( .A(un31_l1I01_Z), .B(un19_l1I01_Z), .C(l1I01_1_Z), .D(l1I01_2_Z), .Y(l1I01_Z) ); defparam l1I01.INIT=16'hFFFE; // @28:459911 CFG4 i0I01_n4 ( .A(i0I01_Z[3]), .B(i0I01_Z[4]), .C(un1_iII01_Z), .D(i0I01_c2_Z), .Y(i0I01_n4_Z) ); defparam i0I01_n4.INIT=16'h060C; // @28:459911 CFG2 \i0I01_RNO[0] ( .A(un1_iII01_Z), .B(i0I01_Z[0]), .Y(N_709_i) ); defparam \i0I01_RNO[0] .INIT=4'h1; // @28:460390 CFG4 un1_o1I018_1 ( .A(o1I01_Z), .B(i0ll1_Z), .C(un1_liOI1_5_Z), .D(l1I01_Z), .Y(un1_o1I018_1_Z) ); defparam un1_o1I018_1.INIT=16'hF8FC; // @28:460572 CFG4 un1_IoI017_1 ( .A(un1_OoI01_1_Z), .B(l1I01_Z), .C(O1ll1_Z), .D(un6_OoI01_Z), .Y(un1_IoI017_1_Z) ); defparam un1_IoI017_1.INIT=16'hF8F0; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_MMCXWOL_1s_26s */ module CTSE_SIB_SYNC_2FLP_1s_26s_1s_10_1 ( IlOI1, PF_IOD_CDR_C0_0_RX_CLK_R, OIlI1_i, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i, llOI1 ) ; input IlOI1 ; input PF_IOD_CDR_C0_0_RX_CLK_R ; input OIlI1_i ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; output llOI1 ; wire IlOI1 ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire OIlI1_i ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire llOI1 ; wire [0:0] ii1Io; wire [0:0] IOoIo; wire VCC ; wire GND ; // @28:545090 (* cdc_synchronizer=1 *) SLE \IIoIo.OOoIo[0] ( .Q(llOI1), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ii1Io[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545090 (* cdc_synchronizer=1 *) SLE \IIoIo.ii1Io[0] ( .Q(ii1Io[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOoIo[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545058 (* cdc_synchronizer=1 *) SLE \IIoIo.IOoIo[0] ( .Q(IOoIo[0]), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IlOI1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_SIB_SYNC_2FLP_1s_26s_1s_10_1 */ module CTSE_SI_SAL_26s ( OoiO1, O1OI1, i0OI1, I1OI1, o0OI1, l0OI1, i1iO1, I1iO1_1z, o1iO1, IoiO1, l0iO1, I0OI1_1z, PF_IOD_CDR_C0_0_RX_CLK_R, OIlI1_i, O0OI1_1z ) ; input [8:2] OoiO1 ; input [31:0] O1OI1 ; input [31:0] i0OI1 ; input [31:0] I1OI1 ; input [31:0] o0OI1 ; input [5:0] l0OI1 ; input i1iO1 ; input I1iO1_1z ; input o1iO1 ; input IoiO1 ; input l0iO1 ; output I0OI1_1z ; input PF_IOD_CDR_C0_0_RX_CLK_R ; input OIlI1_i ; output O0OI1_1z ; wire i1iO1 ; wire I1iO1_1z ; wire o1iO1 ; wire IoiO1 ; wire l0iO1 ; wire I0OI1_1z ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire OIlI1_i ; wire O0OI1_1z ; wire [3:3] un137_i11Io_Z; wire [7:0] i11Io_7_Z; wire [7:0] i11Io_6_Z; wire [7:0] i11Io_5_Z; wire [7:0] i11Io_4_Z; wire [7:0] i11Io_3_Z; wire [7:0] i11Io_2_Z; wire [7:0] i11Io_1_Z; wire [7:0] i11Io_0_Z; wire [3:3] i11Io_11_Z; wire [7:0] i11Io_13_Z; wire [7:0] i11Io_12_Z; wire [3:3] i11Io_Z; wire VCC ; wire oo1Io_i ; wire GND ; wire Io1Io_Z ; wire Oo1Io_Z ; wire un26_Oo1Io_0_Z ; wire un10_Oo1Io_0_Z ; wire un18_Oo1Io_0_Z ; wire un1_Oo1Io_2_Z ; wire oo1Io_1_Z ; wire oo1Io_0_Z ; wire un28_i11Io_Z ; wire un16_i11Io_Z ; wire un118_i11Io_Z ; wire un74_i11Io_Z ; wire un63_i11Io_Z ; wire un107_i11Io_Z ; wire un150_i11Io_Z ; wire un160_i11Io_Z ; wire un85_i11Io_Z ; wire un40_i11Io_Z ; wire un3_i11Io_Z ; wire un129_i11Io_Z ; wire un51_i11Io_Z ; wire un170_i11Io_Z ; wire un95_i11Io_Z ; wire un139_i11Io_Z ; wire N_4859_tz ; wire un1_Oo1Io_Z ; wire un10_Oo1Io_Z ; wire un18_Oo1Io_Z ; wire un33_Oo1Io_Z ; wire un41_Oo1Io_Z ; wire un48_Oo1Io_Z ; wire un55_Oo1Io_Z ; wire Oo1Io_3_Z ; wire Oo1Io_4_Z ; // @28:544839 SLE io1Io ( .Q(O0OI1_1z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oo1Io_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:544839 SLE I0OI1 ( .Q(I0OI1_1z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O0OI1_1z), .EN(l0iO1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:544730 SLE Io1Io ( .Q(Io1Io_Z), .ADn(VCC), .ALn(OIlI1_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Oo1Io_Z), .EN(IoiO1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:544608 CFG2 un26_Oo1Io_0 ( .A(OoiO1[2]), .B(OoiO1[3]), .Y(un26_Oo1Io_0_Z) ); defparam un26_Oo1Io_0.INIT=4'h8; // @28:544556 CFG2 un10_Oo1Io_0 ( .A(OoiO1[2]), .B(OoiO1[3]), .Y(un10_Oo1Io_0_Z) ); defparam un10_Oo1Io_0.INIT=4'h2; // @28:544582 CFG2 un18_Oo1Io_0 ( .A(OoiO1[2]), .B(OoiO1[3]), .Y(un18_Oo1Io_0_Z) ); defparam un18_Oo1Io_0.INIT=4'h4; // @28:544529 CFG2 un1_Oo1Io_2 ( .A(OoiO1[2]), .B(OoiO1[3]), .Y(un1_Oo1Io_2_Z) ); defparam un1_Oo1Io_2.INIT=4'h1; // @28:544777 CFG4 oo1Io_1 ( .A(o1iO1), .B(I1iO1_1z), .C(l0OI1[2]), .D(l0OI1[1]), .Y(oo1Io_1_Z) ); defparam oo1Io_1.INIT=16'hEAC0; // @28:544777 CFG3 oo1Io_0 ( .A(l0OI1[3]), .B(l0OI1[0]), .C(i1iO1), .Y(oo1Io_0_Z) ); defparam oo1Io_0.INIT=8'hEA; // @28:544054 CFG4 un28_i11Io ( .A(OoiO1[8]), .B(OoiO1[7]), .C(OoiO1[6]), .D(OoiO1[5]), .Y(un28_i11Io_Z) ); defparam un28_i11Io.INIT=16'h0010; // @28:544019 CFG4 un16_i11Io ( .A(OoiO1[8]), .B(OoiO1[7]), .C(OoiO1[6]), .D(OoiO1[5]), .Y(un16_i11Io_Z) ); defparam un16_i11Io.INIT=16'h0100; // @28:544327 CFG4 un118_i11Io ( .A(OoiO1[8]), .B(OoiO1[7]), .C(OoiO1[6]), .D(OoiO1[5]), .Y(un118_i11Io_Z) ); defparam un118_i11Io.INIT=16'h0020; // @28:544192 CFG4 un74_i11Io ( .A(OoiO1[8]), .B(OoiO1[7]), .C(OoiO1[6]), .D(OoiO1[5]), .Y(un74_i11Io_Z) ); defparam un74_i11Io.INIT=16'h0040; // @28:544158 CFG4 un63_i11Io ( .A(OoiO1[8]), .B(OoiO1[7]), .C(OoiO1[6]), .D(OoiO1[5]), .Y(un63_i11Io_Z) ); defparam un63_i11Io.INIT=16'h0400; // @28:544293 CFG4 un107_i11Io ( .A(OoiO1[8]), .B(OoiO1[7]), .C(OoiO1[6]), .D(OoiO1[5]), .Y(un107_i11Io_Z) ); defparam un107_i11Io.INIT=16'h0200; // @28:544428 CFG4 un150_i11Io ( .A(OoiO1[8]), .B(OoiO1[7]), .C(OoiO1[6]), .D(OoiO1[5]), .Y(un150_i11Io_Z) ); defparam un150_i11Io.INIT=16'h0800; // @28:544461 CFG4 un160_i11Io ( .A(OoiO1[8]), .B(OoiO1[7]), .C(OoiO1[6]), .D(OoiO1[5]), .Y(un160_i11Io_Z) ); defparam un160_i11Io.INIT=16'h0080; // @28:544226 CFG4 un85_i11Io ( .A(OoiO1[8]), .B(OoiO1[7]), .C(OoiO1[6]), .D(OoiO1[5]), .Y(un85_i11Io_Z) ); defparam un85_i11Io.INIT=16'h4000; // @28:544089 CFG4 un40_i11Io ( .A(OoiO1[8]), .B(OoiO1[7]), .C(OoiO1[6]), .D(OoiO1[5]), .Y(un40_i11Io_Z) ); defparam un40_i11Io.INIT=16'h1000; // @28:543983 CFG4 un3_i11Io ( .A(OoiO1[8]), .B(OoiO1[7]), .C(OoiO1[6]), .D(OoiO1[5]), .Y(un3_i11Io_Z) ); defparam un3_i11Io.INIT=16'h0001; // @28:544361 CFG4 un129_i11Io ( .A(OoiO1[8]), .B(OoiO1[7]), .C(OoiO1[6]), .D(OoiO1[5]), .Y(un129_i11Io_Z) ); defparam un129_i11Io.INIT=16'h2000; // @28:544123 CFG4 un51_i11Io ( .A(OoiO1[8]), .B(OoiO1[7]), .C(OoiO1[6]), .D(OoiO1[5]), .Y(un51_i11Io_Z) ); defparam un51_i11Io.INIT=16'h0004; // @28:544494 CFG4 un170_i11Io ( .A(OoiO1[8]), .B(OoiO1[7]), .C(OoiO1[6]), .D(OoiO1[5]), .Y(un170_i11Io_Z) ); defparam un170_i11Io.INIT=16'h8000; // @28:544258 CFG4 un95_i11Io ( .A(OoiO1[8]), .B(OoiO1[7]), .C(OoiO1[6]), .D(OoiO1[5]), .Y(un95_i11Io_Z) ); defparam un95_i11Io.INIT=16'h0002; // @28:544394 CFG4 un139_i11Io ( .A(OoiO1[8]), .B(OoiO1[7]), .C(OoiO1[6]), .D(OoiO1[5]), .Y(un139_i11Io_Z) ); defparam un139_i11Io.INIT=16'h0008; CFG4 io1Io_RNO_0 ( .A(Io1Io_Z), .B(o1iO1), .C(l0OI1[5]), .D(l0OI1[4]), .Y(N_4859_tz) ); defparam io1Io_RNO_0.INIT=16'hA280; // @28:544392 CFG2 \un137_i11Io[3] ( .A(un139_i11Io_Z), .B(I1OI1[3]), .Y(un137_i11Io_Z[3]) ); defparam \un137_i11Io[3] .INIT=4'h8; // @28:543980 CFG4 \i11Io_7[7] ( .A(un139_i11Io_Z), .B(un95_i11Io_Z), .C(O1OI1[7]), .D(I1OI1[7]), .Y(i11Io_7_Z[7]) ); defparam \i11Io_7[7] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_6[7] ( .A(o0OI1[7]), .B(i0OI1[7]), .C(un51_i11Io_Z), .D(un3_i11Io_Z), .Y(i11Io_6_Z[7]) ); defparam \i11Io_6[7] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_5[7] ( .A(un170_i11Io_Z), .B(un129_i11Io_Z), .C(O1OI1[31]), .D(I1OI1[31]), .Y(i11Io_5_Z[7]) ); defparam \i11Io_5[7] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_4[7] ( .A(o0OI1[31]), .B(i0OI1[31]), .C(un85_i11Io_Z), .D(un40_i11Io_Z), .Y(i11Io_4_Z[7]) ); defparam \i11Io_4[7] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_3[7] ( .A(O1OI1[15]), .B(O1OI1[23]), .C(un118_i11Io_Z), .D(un107_i11Io_Z), .Y(i11Io_3_Z[7]) ); defparam \i11Io_3[7] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_2[7] ( .A(o0OI1[15]), .B(o0OI1[23]), .C(un28_i11Io_Z), .D(un16_i11Io_Z), .Y(i11Io_2_Z[7]) ); defparam \i11Io_2[7] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_1[7] ( .A(I1OI1[15]), .B(I1OI1[23]), .C(un160_i11Io_Z), .D(un150_i11Io_Z), .Y(i11Io_1_Z[7]) ); defparam \i11Io_1[7] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_0[7] ( .A(i0OI1[15]), .B(i0OI1[23]), .C(un74_i11Io_Z), .D(un63_i11Io_Z), .Y(i11Io_0_Z[7]) ); defparam \i11Io_0[7] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_7[2] ( .A(un139_i11Io_Z), .B(un95_i11Io_Z), .C(O1OI1[2]), .D(I1OI1[2]), .Y(i11Io_7_Z[2]) ); defparam \i11Io_7[2] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_6[2] ( .A(o0OI1[2]), .B(i0OI1[2]), .C(un51_i11Io_Z), .D(un3_i11Io_Z), .Y(i11Io_6_Z[2]) ); defparam \i11Io_6[2] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_5[2] ( .A(un170_i11Io_Z), .B(un129_i11Io_Z), .C(O1OI1[26]), .D(I1OI1[26]), .Y(i11Io_5_Z[2]) ); defparam \i11Io_5[2] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_4[2] ( .A(o0OI1[26]), .B(i0OI1[26]), .C(un85_i11Io_Z), .D(un40_i11Io_Z), .Y(i11Io_4_Z[2]) ); defparam \i11Io_4[2] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_3[2] ( .A(O1OI1[10]), .B(O1OI1[18]), .C(un118_i11Io_Z), .D(un107_i11Io_Z), .Y(i11Io_3_Z[2]) ); defparam \i11Io_3[2] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_2[2] ( .A(o0OI1[10]), .B(o0OI1[18]), .C(un28_i11Io_Z), .D(un16_i11Io_Z), .Y(i11Io_2_Z[2]) ); defparam \i11Io_2[2] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_1[2] ( .A(I1OI1[10]), .B(I1OI1[18]), .C(un160_i11Io_Z), .D(un150_i11Io_Z), .Y(i11Io_1_Z[2]) ); defparam \i11Io_1[2] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_0[2] ( .A(i0OI1[10]), .B(i0OI1[18]), .C(un74_i11Io_Z), .D(un63_i11Io_Z), .Y(i11Io_0_Z[2]) ); defparam \i11Io_0[2] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_7[1] ( .A(un139_i11Io_Z), .B(un95_i11Io_Z), .C(O1OI1[1]), .D(I1OI1[1]), .Y(i11Io_7_Z[1]) ); defparam \i11Io_7[1] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_6[1] ( .A(o0OI1[1]), .B(i0OI1[1]), .C(un51_i11Io_Z), .D(un3_i11Io_Z), .Y(i11Io_6_Z[1]) ); defparam \i11Io_6[1] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_5[1] ( .A(un170_i11Io_Z), .B(un129_i11Io_Z), .C(O1OI1[25]), .D(I1OI1[25]), .Y(i11Io_5_Z[1]) ); defparam \i11Io_5[1] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_4[1] ( .A(o0OI1[25]), .B(i0OI1[25]), .C(un85_i11Io_Z), .D(un40_i11Io_Z), .Y(i11Io_4_Z[1]) ); defparam \i11Io_4[1] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_3[1] ( .A(O1OI1[9]), .B(O1OI1[17]), .C(un118_i11Io_Z), .D(un107_i11Io_Z), .Y(i11Io_3_Z[1]) ); defparam \i11Io_3[1] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_2[1] ( .A(o0OI1[9]), .B(o0OI1[17]), .C(un28_i11Io_Z), .D(un16_i11Io_Z), .Y(i11Io_2_Z[1]) ); defparam \i11Io_2[1] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_1[1] ( .A(I1OI1[9]), .B(I1OI1[17]), .C(un160_i11Io_Z), .D(un150_i11Io_Z), .Y(i11Io_1_Z[1]) ); defparam \i11Io_1[1] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_0[1] ( .A(i0OI1[9]), .B(i0OI1[17]), .C(un74_i11Io_Z), .D(un63_i11Io_Z), .Y(i11Io_0_Z[1]) ); defparam \i11Io_0[1] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_7[6] ( .A(un139_i11Io_Z), .B(un95_i11Io_Z), .C(O1OI1[6]), .D(I1OI1[6]), .Y(i11Io_7_Z[6]) ); defparam \i11Io_7[6] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_6[6] ( .A(o0OI1[6]), .B(i0OI1[6]), .C(un51_i11Io_Z), .D(un3_i11Io_Z), .Y(i11Io_6_Z[6]) ); defparam \i11Io_6[6] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_5[6] ( .A(un170_i11Io_Z), .B(un129_i11Io_Z), .C(O1OI1[30]), .D(I1OI1[30]), .Y(i11Io_5_Z[6]) ); defparam \i11Io_5[6] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_4[6] ( .A(o0OI1[30]), .B(i0OI1[30]), .C(un85_i11Io_Z), .D(un40_i11Io_Z), .Y(i11Io_4_Z[6]) ); defparam \i11Io_4[6] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_3[6] ( .A(O1OI1[14]), .B(O1OI1[22]), .C(un118_i11Io_Z), .D(un107_i11Io_Z), .Y(i11Io_3_Z[6]) ); defparam \i11Io_3[6] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_2[6] ( .A(o0OI1[14]), .B(o0OI1[22]), .C(un28_i11Io_Z), .D(un16_i11Io_Z), .Y(i11Io_2_Z[6]) ); defparam \i11Io_2[6] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_1[6] ( .A(I1OI1[14]), .B(I1OI1[22]), .C(un160_i11Io_Z), .D(un150_i11Io_Z), .Y(i11Io_1_Z[6]) ); defparam \i11Io_1[6] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_0[6] ( .A(i0OI1[14]), .B(i0OI1[22]), .C(un74_i11Io_Z), .D(un63_i11Io_Z), .Y(i11Io_0_Z[6]) ); defparam \i11Io_0[6] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_6[3] ( .A(o0OI1[3]), .B(i0OI1[3]), .C(un51_i11Io_Z), .D(un3_i11Io_Z), .Y(i11Io_6_Z[3]) ); defparam \i11Io_6[3] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_5[3] ( .A(un170_i11Io_Z), .B(un129_i11Io_Z), .C(O1OI1[27]), .D(I1OI1[27]), .Y(i11Io_5_Z[3]) ); defparam \i11Io_5[3] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_4[3] ( .A(o0OI1[27]), .B(i0OI1[27]), .C(un85_i11Io_Z), .D(un40_i11Io_Z), .Y(i11Io_4_Z[3]) ); defparam \i11Io_4[3] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_3[3] ( .A(O1OI1[11]), .B(O1OI1[19]), .C(un118_i11Io_Z), .D(un107_i11Io_Z), .Y(i11Io_3_Z[3]) ); defparam \i11Io_3[3] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_2[3] ( .A(o0OI1[11]), .B(o0OI1[19]), .C(un28_i11Io_Z), .D(un16_i11Io_Z), .Y(i11Io_2_Z[3]) ); defparam \i11Io_2[3] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_1[3] ( .A(I1OI1[11]), .B(I1OI1[19]), .C(un160_i11Io_Z), .D(un150_i11Io_Z), .Y(i11Io_1_Z[3]) ); defparam \i11Io_1[3] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_0[3] ( .A(i0OI1[11]), .B(i0OI1[19]), .C(un74_i11Io_Z), .D(un63_i11Io_Z), .Y(i11Io_0_Z[3]) ); defparam \i11Io_0[3] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_7[0] ( .A(un139_i11Io_Z), .B(un95_i11Io_Z), .C(O1OI1[0]), .D(I1OI1[0]), .Y(i11Io_7_Z[0]) ); defparam \i11Io_7[0] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_6[0] ( .A(o0OI1[0]), .B(i0OI1[0]), .C(un51_i11Io_Z), .D(un3_i11Io_Z), .Y(i11Io_6_Z[0]) ); defparam \i11Io_6[0] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_5[0] ( .A(un170_i11Io_Z), .B(un129_i11Io_Z), .C(O1OI1[24]), .D(I1OI1[24]), .Y(i11Io_5_Z[0]) ); defparam \i11Io_5[0] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_4[0] ( .A(o0OI1[24]), .B(i0OI1[24]), .C(un85_i11Io_Z), .D(un40_i11Io_Z), .Y(i11Io_4_Z[0]) ); defparam \i11Io_4[0] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_3[0] ( .A(O1OI1[8]), .B(O1OI1[16]), .C(un118_i11Io_Z), .D(un107_i11Io_Z), .Y(i11Io_3_Z[0]) ); defparam \i11Io_3[0] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_2[0] ( .A(o0OI1[8]), .B(o0OI1[16]), .C(un28_i11Io_Z), .D(un16_i11Io_Z), .Y(i11Io_2_Z[0]) ); defparam \i11Io_2[0] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_1[0] ( .A(I1OI1[8]), .B(I1OI1[16]), .C(un160_i11Io_Z), .D(un150_i11Io_Z), .Y(i11Io_1_Z[0]) ); defparam \i11Io_1[0] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_0[0] ( .A(i0OI1[8]), .B(i0OI1[16]), .C(un74_i11Io_Z), .D(un63_i11Io_Z), .Y(i11Io_0_Z[0]) ); defparam \i11Io_0[0] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_7[5] ( .A(un139_i11Io_Z), .B(un95_i11Io_Z), .C(O1OI1[5]), .D(I1OI1[5]), .Y(i11Io_7_Z[5]) ); defparam \i11Io_7[5] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_6[5] ( .A(o0OI1[5]), .B(i0OI1[5]), .C(un51_i11Io_Z), .D(un3_i11Io_Z), .Y(i11Io_6_Z[5]) ); defparam \i11Io_6[5] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_5[5] ( .A(un170_i11Io_Z), .B(un129_i11Io_Z), .C(O1OI1[29]), .D(I1OI1[29]), .Y(i11Io_5_Z[5]) ); defparam \i11Io_5[5] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_4[5] ( .A(o0OI1[29]), .B(i0OI1[29]), .C(un85_i11Io_Z), .D(un40_i11Io_Z), .Y(i11Io_4_Z[5]) ); defparam \i11Io_4[5] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_3[5] ( .A(O1OI1[13]), .B(O1OI1[21]), .C(un118_i11Io_Z), .D(un107_i11Io_Z), .Y(i11Io_3_Z[5]) ); defparam \i11Io_3[5] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_2[5] ( .A(o0OI1[13]), .B(o0OI1[21]), .C(un28_i11Io_Z), .D(un16_i11Io_Z), .Y(i11Io_2_Z[5]) ); defparam \i11Io_2[5] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_1[5] ( .A(I1OI1[13]), .B(I1OI1[21]), .C(un160_i11Io_Z), .D(un150_i11Io_Z), .Y(i11Io_1_Z[5]) ); defparam \i11Io_1[5] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_0[5] ( .A(i0OI1[13]), .B(i0OI1[21]), .C(un74_i11Io_Z), .D(un63_i11Io_Z), .Y(i11Io_0_Z[5]) ); defparam \i11Io_0[5] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_7[4] ( .A(un139_i11Io_Z), .B(un95_i11Io_Z), .C(O1OI1[4]), .D(I1OI1[4]), .Y(i11Io_7_Z[4]) ); defparam \i11Io_7[4] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_6[4] ( .A(o0OI1[4]), .B(i0OI1[4]), .C(un51_i11Io_Z), .D(un3_i11Io_Z), .Y(i11Io_6_Z[4]) ); defparam \i11Io_6[4] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_5[4] ( .A(un170_i11Io_Z), .B(un129_i11Io_Z), .C(O1OI1[28]), .D(I1OI1[28]), .Y(i11Io_5_Z[4]) ); defparam \i11Io_5[4] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_4[4] ( .A(o0OI1[28]), .B(i0OI1[28]), .C(un85_i11Io_Z), .D(un40_i11Io_Z), .Y(i11Io_4_Z[4]) ); defparam \i11Io_4[4] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_3[4] ( .A(O1OI1[12]), .B(O1OI1[20]), .C(un118_i11Io_Z), .D(un107_i11Io_Z), .Y(i11Io_3_Z[4]) ); defparam \i11Io_3[4] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_2[4] ( .A(o0OI1[12]), .B(o0OI1[20]), .C(un28_i11Io_Z), .D(un16_i11Io_Z), .Y(i11Io_2_Z[4]) ); defparam \i11Io_2[4] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_1[4] ( .A(I1OI1[12]), .B(I1OI1[20]), .C(un160_i11Io_Z), .D(un150_i11Io_Z), .Y(i11Io_1_Z[4]) ); defparam \i11Io_1[4] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_0[4] ( .A(i0OI1[12]), .B(i0OI1[20]), .C(un74_i11Io_Z), .D(un63_i11Io_Z), .Y(i11Io_0_Z[4]) ); defparam \i11Io_0[4] .INIT=16'hEAC0; // @28:543980 CFG4 \i11Io_11[3] ( .A(O1OI1[3]), .B(un95_i11Io_Z), .C(un137_i11Io_Z[3]), .D(i11Io_6_Z[3]), .Y(i11Io_11_Z[3]) ); defparam \i11Io_11[3] .INIT=16'hFFF8; // @28:543980 CFG4 \i11Io_13[7] ( .A(i11Io_5_Z[7]), .B(i11Io_7_Z[7]), .C(i11Io_4_Z[7]), .D(i11Io_6_Z[7]), .Y(i11Io_13_Z[7]) ); defparam \i11Io_13[7] .INIT=16'hFFFE; // @28:543980 CFG4 \i11Io_12[7] ( .A(i11Io_3_Z[7]), .B(i11Io_2_Z[7]), .C(i11Io_1_Z[7]), .D(i11Io_0_Z[7]), .Y(i11Io_12_Z[7]) ); defparam \i11Io_12[7] .INIT=16'hFFFE; // @28:543980 CFG4 \i11Io_13[2] ( .A(i11Io_5_Z[2]), .B(i11Io_7_Z[2]), .C(i11Io_4_Z[2]), .D(i11Io_6_Z[2]), .Y(i11Io_13_Z[2]) ); defparam \i11Io_13[2] .INIT=16'hFFFE; // @28:543980 CFG4 \i11Io_12[2] ( .A(i11Io_3_Z[2]), .B(i11Io_2_Z[2]), .C(i11Io_1_Z[2]), .D(i11Io_0_Z[2]), .Y(i11Io_12_Z[2]) ); defparam \i11Io_12[2] .INIT=16'hFFFE; // @28:543980 CFG4 \i11Io_13[1] ( .A(i11Io_5_Z[1]), .B(i11Io_7_Z[1]), .C(i11Io_4_Z[1]), .D(i11Io_6_Z[1]), .Y(i11Io_13_Z[1]) ); defparam \i11Io_13[1] .INIT=16'hFFFE; // @28:543980 CFG4 \i11Io_12[1] ( .A(i11Io_3_Z[1]), .B(i11Io_2_Z[1]), .C(i11Io_1_Z[1]), .D(i11Io_0_Z[1]), .Y(i11Io_12_Z[1]) ); defparam \i11Io_12[1] .INIT=16'hFFFE; // @28:543980 CFG4 \i11Io_13[6] ( .A(i11Io_5_Z[6]), .B(i11Io_7_Z[6]), .C(i11Io_4_Z[6]), .D(i11Io_6_Z[6]), .Y(i11Io_13_Z[6]) ); defparam \i11Io_13[6] .INIT=16'hFFFE; // @28:543980 CFG4 \i11Io_12[6] ( .A(i11Io_3_Z[6]), .B(i11Io_2_Z[6]), .C(i11Io_1_Z[6]), .D(i11Io_0_Z[6]), .Y(i11Io_12_Z[6]) ); defparam \i11Io_12[6] .INIT=16'hFFFE; // @28:543980 CFG4 \i11Io_12[3] ( .A(i11Io_3_Z[3]), .B(i11Io_2_Z[3]), .C(i11Io_1_Z[3]), .D(i11Io_0_Z[3]), .Y(i11Io_12_Z[3]) ); defparam \i11Io_12[3] .INIT=16'hFFFE; // @28:543980 CFG4 \i11Io_13[0] ( .A(i11Io_5_Z[0]), .B(i11Io_7_Z[0]), .C(i11Io_4_Z[0]), .D(i11Io_6_Z[0]), .Y(i11Io_13_Z[0]) ); defparam \i11Io_13[0] .INIT=16'hFFFE; // @28:543980 CFG4 \i11Io_12[0] ( .A(i11Io_3_Z[0]), .B(i11Io_2_Z[0]), .C(i11Io_1_Z[0]), .D(i11Io_0_Z[0]), .Y(i11Io_12_Z[0]) ); defparam \i11Io_12[0] .INIT=16'hFFFE; // @28:543980 CFG4 \i11Io_13[5] ( .A(i11Io_5_Z[5]), .B(i11Io_7_Z[5]), .C(i11Io_4_Z[5]), .D(i11Io_6_Z[5]), .Y(i11Io_13_Z[5]) ); defparam \i11Io_13[5] .INIT=16'hFFFE; // @28:543980 CFG4 \i11Io_12[5] ( .A(i11Io_3_Z[5]), .B(i11Io_2_Z[5]), .C(i11Io_1_Z[5]), .D(i11Io_0_Z[5]), .Y(i11Io_12_Z[5]) ); defparam \i11Io_12[5] .INIT=16'hFFFE; // @28:543980 CFG4 \i11Io_13[4] ( .A(i11Io_5_Z[4]), .B(i11Io_7_Z[4]), .C(i11Io_4_Z[4]), .D(i11Io_6_Z[4]), .Y(i11Io_13_Z[4]) ); defparam \i11Io_13[4] .INIT=16'hFFFE; // @28:543980 CFG4 \i11Io_12[4] ( .A(i11Io_3_Z[4]), .B(i11Io_2_Z[4]), .C(i11Io_1_Z[4]), .D(i11Io_0_Z[4]), .Y(i11Io_12_Z[4]) ); defparam \i11Io_12[4] .INIT=16'hFFFE; // @28:544839 CFG4 io1Io_RNO ( .A(i1iO1), .B(N_4859_tz), .C(oo1Io_0_Z), .D(oo1Io_1_Z), .Y(oo1Io_i) ); defparam io1Io_RNO.INIT=16'h000B; // @28:543980 CFG4 \i11Io[3] ( .A(i11Io_5_Z[3]), .B(i11Io_4_Z[3]), .C(i11Io_12_Z[3]), .D(i11Io_11_Z[3]), .Y(i11Io_Z[3]) ); defparam \i11Io[3] .INIT=16'hFFFE; // @28:544529 CFG4 un1_Oo1Io ( .A(un1_Oo1Io_2_Z), .B(OoiO1[4]), .C(i11Io_13_Z[0]), .D(i11Io_12_Z[0]), .Y(un1_Oo1Io_Z) ); defparam un1_Oo1Io.INIT=16'h2220; // @28:544556 CFG4 un10_Oo1Io ( .A(un10_Oo1Io_0_Z), .B(OoiO1[4]), .C(i11Io_13_Z[1]), .D(i11Io_12_Z[1]), .Y(un10_Oo1Io_Z) ); defparam un10_Oo1Io.INIT=16'h2220; // @28:544582 CFG4 un18_Oo1Io ( .A(un18_Oo1Io_0_Z), .B(OoiO1[4]), .C(i11Io_13_Z[2]), .D(i11Io_12_Z[2]), .Y(un18_Oo1Io_Z) ); defparam un18_Oo1Io.INIT=16'h2220; // @28:544632 CFG4 un33_Oo1Io ( .A(un1_Oo1Io_2_Z), .B(OoiO1[4]), .C(i11Io_13_Z[4]), .D(i11Io_12_Z[4]), .Y(un33_Oo1Io_Z) ); defparam un33_Oo1Io.INIT=16'h8880; // @28:544658 CFG4 un41_Oo1Io ( .A(un10_Oo1Io_0_Z), .B(OoiO1[4]), .C(i11Io_13_Z[5]), .D(i11Io_12_Z[5]), .Y(un41_Oo1Io_Z) ); defparam un41_Oo1Io.INIT=16'h8880; // @28:544683 CFG4 un48_Oo1Io ( .A(un18_Oo1Io_0_Z), .B(OoiO1[4]), .C(i11Io_13_Z[6]), .D(i11Io_12_Z[6]), .Y(un48_Oo1Io_Z) ); defparam un48_Oo1Io.INIT=16'h8880; // @28:544708 CFG4 un55_Oo1Io ( .A(un26_Oo1Io_0_Z), .B(OoiO1[4]), .C(i11Io_13_Z[7]), .D(i11Io_12_Z[7]), .Y(un55_Oo1Io_Z) ); defparam un55_Oo1Io.INIT=16'h8880; // @28:544529 CFG4 Oo1Io_3 ( .A(OoiO1[4]), .B(un26_Oo1Io_0_Z), .C(un18_Oo1Io_Z), .D(i11Io_Z[3]), .Y(Oo1Io_3_Z) ); defparam Oo1Io_3.INIT=16'hF4F0; // @28:544529 CFG4 Oo1Io_4 ( .A(un55_Oo1Io_Z), .B(un48_Oo1Io_Z), .C(un41_Oo1Io_Z), .D(un33_Oo1Io_Z), .Y(Oo1Io_4_Z) ); defparam Oo1Io_4.INIT=16'hFFFE; // @28:544529 CFG4 Oo1Io ( .A(un10_Oo1Io_Z), .B(un1_Oo1Io_Z), .C(Oo1Io_4_Z), .D(Oo1Io_3_Z), .Y(Oo1Io_Z) ); defparam Oo1Io.INIT=16'hFFFE; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_SI_SAL_26s */ module CTSE_TSMAC_TOP_Z9 ( ii0i0_1z, Oi0i0_1z, o00i0, l00i0, I10i0, O10i0, oo0i0, CORETSE_0_MRXDAT, io0i0, un2_O1Il1_0, O0Il1_1z_0, Io0i0_1z, Oo0i0_1z, CoreAPB3_0_0_APBmslave2_PRDATA_m, rx_fifo_data_out, PADDR_0, paddr_1z_0, io0O1, io0O1_m, CoreAPB3_0_0_APBmslave0_PADDR_5, CoreAPB3_0_0_APBmslave0_PADDR_3, CoreAPB3_0_0_APBmslave0_PADDR_7, CoreAPB3_0_0_APBmslave0_PADDR_6, CoreAPB3_0_0_APBmslave0_PADDR_0, CoreAPB3_0_0_APBmslave0_PADDR_1, CoreAPB3_0_0_APBmslave0_PWDATA, wrdata_0, ooIO1, o01I1_0, rx_fifo_read_0, OOOO1, CORETSE_0_MDO, CORETSE_0_MDOEN, PHY_MDC_c, iI1i0, oi0i0, IO1i0, lO1i0, Ii0i0, iIl0112, OO1i0, li0i0, un1_PADDR_3, un1_PADDR_2, N_1206, rx_fifo_read_1, O00i0_i, PF_IOD_CDR_CCC_C0_0_TX_CLK_G, o0Il1, o0oI1_i, PF_IOD_CDR_C0_0_RX_CLK_R, o10i0_i, tx_fifo_write_sig14_i_1, iPRDATA28, un1_PADDR, tx_fifo_write_sig_0_sqmuxa_i_1, lIli0_i, oIli0_i, iIli0_i, Olli0_i, hstrst_i, PF_CCC_0_0_OUT0_FABCLK_0, CoreAPB3_0_0_APBmslave0_PWRITE, IiO01, OiO01, CoreAPB3_0_0_APBmslave0_PENABLE, CoreAPB3_0_0_APBmslave0_PSELx, un1_Ii0O1, CoreAPB3_0_0_APBmslave0_PWRITE_s0, iPRDATA_0_sqmuxa, Oi0O1, liO019_i_1, un1_IIOO1_1_2, liO0110_i_1, tx_fifo_write_sig14_i_2, un1_IIOO1_3_1, un1_IIOO1_2_1, N_1214, iO0i0_2z, oO0i0_2z ) ; input [7:0] ii0i0_1z ; output [7:0] Oi0i0_1z ; output [39:0] o00i0 ; output [10:0] l00i0 ; input [39:0] I10i0 ; output [10:0] O10i0 ; output [11:0] oo0i0 ; output [31:0] CORETSE_0_MRXDAT ; input [34:0] io0i0 ; output un2_O1Il1_0 ; output O0Il1_1z_0 ; output [35:0] Io0i0_1z ; output [11:0] Oo0i0_1z ; output [15:8] CoreAPB3_0_0_APBmslave2_PRDATA_m ; input [15:8] rx_fifo_data_out ; input PADDR_0 ; input paddr_1z_0 ; output [31:16] io0O1 ; output [15:0] io0O1_m ; input CoreAPB3_0_0_APBmslave0_PADDR_5 ; input CoreAPB3_0_0_APBmslave0_PADDR_3 ; input CoreAPB3_0_0_APBmslave0_PADDR_7 ; input CoreAPB3_0_0_APBmslave0_PADDR_6 ; input CoreAPB3_0_0_APBmslave0_PADDR_0 ; input CoreAPB3_0_0_APBmslave0_PADDR_1 ; input [31:1] CoreAPB3_0_0_APBmslave0_PWDATA ; input wrdata_0 ; output [1:0] ooIO1 ; input o01I1_0 ; input rx_fifo_read_0 ; input OOOO1 ; output CORETSE_0_MDO ; output CORETSE_0_MDOEN ; output PHY_MDC_c ; output iI1i0 ; input oi0i0 ; input IO1i0 ; input lO1i0 ; output Ii0i0 ; input iIl0112 ; input OO1i0 ; output li0i0 ; input un1_PADDR_3 ; input un1_PADDR_2 ; input N_1206 ; input rx_fifo_read_1 ; output O00i0_i ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; output o0Il1 ; output o0oI1_i ; input PF_IOD_CDR_C0_0_RX_CLK_R ; output o10i0_i ; input tx_fifo_write_sig14_i_1 ; input iPRDATA28 ; input un1_PADDR ; input tx_fifo_write_sig_0_sqmuxa_i_1 ; input lIli0_i ; input oIli0_i ; input iIli0_i ; input Olli0_i ; input hstrst_i ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input CoreAPB3_0_0_APBmslave0_PWRITE ; input IiO01 ; input OiO01 ; input CoreAPB3_0_0_APBmslave0_PENABLE ; input CoreAPB3_0_0_APBmslave0_PSELx ; output un1_Ii0O1 ; output CoreAPB3_0_0_APBmslave0_PWRITE_s0 ; input iPRDATA_0_sqmuxa ; output Oi0O1 ; input liO019_i_1 ; input un1_IIOO1_1_2 ; input liO0110_i_1 ; input tx_fifo_write_sig14_i_2 ; input un1_IIOO1_3_1 ; input un1_IIOO1_2_1 ; output N_1214 ; input iO0i0_2z ; input oO0i0_2z ; wire un2_O1Il1_0 ; wire O0Il1_1z_0 ; wire PADDR_0 ; wire paddr_1z_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_5 ; wire CoreAPB3_0_0_APBmslave0_PADDR_3 ; wire CoreAPB3_0_0_APBmslave0_PADDR_7 ; wire CoreAPB3_0_0_APBmslave0_PADDR_6 ; wire CoreAPB3_0_0_APBmslave0_PADDR_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_1 ; wire wrdata_0 ; wire o01I1_0 ; wire rx_fifo_read_0 ; wire OOOO1 ; wire CORETSE_0_MDO ; wire CORETSE_0_MDOEN ; wire PHY_MDC_c ; wire iI1i0 ; wire oi0i0 ; wire IO1i0 ; wire lO1i0 ; wire Ii0i0 ; wire iIl0112 ; wire OO1i0 ; wire li0i0 ; wire un1_PADDR_3 ; wire un1_PADDR_2 ; wire N_1206 ; wire rx_fifo_read_1 ; wire O00i0_i ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire o0Il1 ; wire o0oI1_i ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire o10i0_i ; wire tx_fifo_write_sig14_i_1 ; wire iPRDATA28 ; wire un1_PADDR ; wire tx_fifo_write_sig_0_sqmuxa_i_1 ; wire lIli0_i ; wire oIli0_i ; wire iIli0_i ; wire Olli0_i ; wire hstrst_i ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire CoreAPB3_0_0_APBmslave0_PWRITE ; wire IiO01 ; wire OiO01 ; wire CoreAPB3_0_0_APBmslave0_PENABLE ; wire CoreAPB3_0_0_APBmslave0_PSELx ; wire un1_Ii0O1 ; wire CoreAPB3_0_0_APBmslave0_PWRITE_s0 ; wire iPRDATA_0_sqmuxa ; wire Oi0O1 ; wire liO019_i_1 ; wire un1_IIOO1_1_2 ; wire liO0110_i_1 ; wire tx_fifo_write_sig14_i_2 ; wire un1_IIOO1_3_1 ; wire un1_IIOO1_2_1 ; wire N_1214 ; wire iO0i0_2z ; wire oO0i0_2z ; wire [26:0] OOOI1_7_Z; wire [22:0] OOOI1_14_Z; wire [27:0] OOOI1_1_Z; wire [16:16] OOOI1_18_1_Z; wire [18:3] OOOI1_18_Z; wire [39:0] il1I1; wire [21:2] Iolo1; wire [21:21] OOOI1_4_1_Z; wire [35:0] oloI1; wire [31:0] OOOI1_0_Z; wire [30:0] OOOI1_4_Z; wire [21:15] i0lo1; wire [15:0] OoI11; wire [31:0] o01I1; wire [11:2] un39_OOOI1; wire [31:2] OOOI1_2_Z; wire [17:13] i0lo1_11; wire [17:13] i0lo1_12; wire [15:0] oiI11; wire [15:0] OOlI1; wire [23:0] OOOI1_12_Z; wire [17:0] lo1I1; wire [7:0] O0l11; wire [31:0] OOOI1_10_Z; wire [15:0] i01I1; wire [47:0] oIOI1; wire [30:0] OOOI1_9_Z; wire [11:0] Oo1I1; wire [12:0] I11I1; wire [31:0] OOOI1_8_Z; wire [4:0] Iol11; wire [12:0] iIoI1; wire [39:0] oIoI1; wire [31:0] OOOI1_6_Z; wire [10:0] ll1I1; wire [31:2] OOOI1_5_Z; wire [13:0] iloI1; wire [31:0] OOOI1_3_Z; wire [15:0] iol11; wire [31:0] OOOI1_11_Z; wire [17:0] oo1I1; wire [15:0] OOl11; wire [22:0] OOOI1_13_Z; wire [21:0] OOOI1_15_Z; wire [2:0] o1l11; wire [6:0] IIl11; wire [4:0] lol11; wire [12:0] I01I1; wire [9:0] iIl11; wire [20:0] OOOI1_17_Z; wire [21:0] OOOI1_16_Z; wire [8:5] i0lo1_41; wire [8:5] i0lo1_40; wire [3:0] Oll11; wire [3:0] I0l11; wire [6:0] oIl11; wire [12:0] O11I1; wire [11:0] Io1I1; wire [11:0] i11I1; wire [20:18] un137_OOOI1; wire [3:0] l0l11; wire [39:36] oloI1_1; wire [19:16] un1_OOOI1; wire [0:0] lIol1; wire [6:0] lIl11; wire [13:10] un45_OOOI1; wire [11:11] un59_OOOI1; wire [42:0] o0Io1; wire [25:2] Oolo1; wire [6:0] OOOI1_25_Z; wire [12:2] un1_OilI1; wire [8:0] OOOI1_24_Z; wire [14:4] un12_OOOI1; wire [18:2] OOOI1_19_Z; wire [12:5] OOOI1_21_Z; wire [16:6] OOOI1_20_Z; wire [31:16] un8_OOOI1; wire [17:15] un86_OilI1; wire [20:20] un112_OOOI1; wire [31:10] un114_OOOI1; wire [4:2] OOOI1_28_Z; wire [8:2] OOOI1_27_Z; wire [4:0] OOOI1_26_Z; wire [12:4] OOOI1_22_Z; wire [12:3] OOOI1_23_Z; wire [8:5] un103_OOOI1; wire [13:5] un73_OOOI1; wire [14:14] un50_OilI1; wire [23:22] cnt07; wire [2:2] OOOI1_29_Z; wire [22:22] cnt24; wire [17:17] un78_OilI1; wire [2:2] OOOI1_30_Z; wire [19:9] OOOI1_Z; wire [31:0] o0OI1; wire [31:0] i0OI1; wire [31:0] O1OI1; wire [5:0] l0OI1; wire [31:0] I1OI1; wire [29:29] un149_OOOI1; wire [28:24] un105_OOOI1; wire [28:24] un128_OOOI1; wire [2:0] o0il1; wire [7:0] lliO1; wire [32:0] o0iO1; wire [7:0] IioO1; wire [51:0] O1iO1; wire [8:2] OoiO1; wire N_16 ; wire l1Ol1 ; wire IoOl1 ; wire ooOl1 ; wire N_133 ; wire loo11 ; wire lOi11 ; wire llOI1 ; wire ioOl1 ; wire o1Ol1 ; wire i1_i_12 ; wire Iil11 ; wire oOi11 ; wire i1I11 ; wire o1Ol1_3_0 ; wire ioOl1_3_0 ; wire loI11 ; wire iOi11 ; wire l1o11 ; wire O1o11 ; wire l0Ol1 ; wire I0o11 ; wire ilOl1 ; wire oli11 ; wire I0Ol1 ; wire O0Ol1 ; wire OOi11 ; wire oOoI1 ; wire olOl1 ; wire O1Ol1 ; wire i0Ol1 ; wire IOi11 ; wire i1o11 ; wire o0Ol1 ; wire lOoI1 ; wire olo11 ; wire iOoI1 ; wire l1I11 ; wire Ilo11 ; wire oOl11 ; wire Iio11 ; wire OiI11 ; wire ioo11 ; wire ii1I1 ; wire OoOl1 ; wire oio11 ; wire O1l11 ; wire IOI11 ; wire IiI11 ; wire OOoI1 ; wire Oil11 ; wire o0o11 ; wire i0l11 ; wire lOl11 ; wire Ioo11 ; wire i1II1 ; wire ilo11 ; wire oi1I1 ; wire ooI11 ; wire iOl11 ; wire l1II1 ; wire i1l11 ; wire Ii1I1 ; wire Ol1i0 ; wire OIoI1 ; wire ioI11 ; wire OIl11 ; wire olOI1 ; wire Ool11 ; wire I1I11 ; wire o1II1 ; wire liI11 ; wire li1I1 ; wire iIOI1 ; wire IoOI1 ; wire OlOI1 ; wire IOoI1 ; wire iil11 ; wire io1I1 ; wire O0i11 ; wire lI1I1 ; wire lil11 ; wire oil11 ; wire oI1I1 ; wire o11I1 ; wire Oi1I1 ; wire OI1I1 ; wire OO011 ; wire l11I1 ; wire oool1 ; wire lO011 ; wire IO011 ; wire lIoI1 ; wire l1l11 ; wire ol1I1 ; wire Il1I1 ; wire liII1 ; wire IiII1 ; wire oiII1 ; wire Ol1I1 ; wire un52_OilI1 ; wire un80_OilI1_0_a2 ; wire un18_OilI1_0_a2 ; wire ill11 ; wire lll11 ; wire Ill11 ; wire o0l11 ; wire OloI1 ; wire III11 ; wire O01I1 ; wire N_1147 ; wire N_675 ; wire N_679 ; wire N_1146 ; wire N_161 ; wire N_36 ; wire N_14982 ; wire un5_l0iIo_1 ; wire un5_l0iIo_2 ; wire N_82_2 ; wire un5_l1iIo_2 ; wire o1Ol1_2 ; wire un5_O1iIo_3 ; wire un1_ooiO1 ; wire un1_o01O1_0 ; wire N_829 ; wire N_159 ; wire N_404 ; wire N_402 ; wire N_280 ; wire N_14984 ; wire N_14985 ; wire N_14986 ; wire N_14987 ; wire N_14988 ; wire N_14989 ; wire N_14990 ; wire N_14991 ; wire N_14992 ; wire N_14993 ; wire N_14994 ; wire N_14995 ; wire N_14996 ; wire un4_I1o11_4 ; wire lOi11_4 ; wire un4_Ooo11_1 ; wire un4_I1o11_4_RNI4IU79 ; wire iiOI1 ; wire IliO1 ; wire iOiO1 ; wire l0iO1 ; wire oliO1 ; wire O0iO1 ; wire iliO1 ; wire o1iO1 ; wire i1iO1 ; wire I1iO1 ; wire O0OI1 ; wire oIiO1 ; wire IIiO1 ; wire iIiO1 ; wire lOiO1 ; wire OOiO1 ; wire oOiO1 ; wire iioO1 ; wire oioO1 ; wire lioO1 ; wire IOiO1 ; wire N_15022 ; wire N_15023 ; wire N_15024 ; wire N_15025 ; wire N_15026 ; wire N_15027 ; wire N_15028 ; wire N_15029 ; wire N_15030 ; wire N_15031 ; wire N_15032 ; wire N_15033 ; wire N_15034 ; wire N_1112 ; wire i0iO1 ; wire iOlI1_i ; wire IoiO1 ; wire OIlI1_i ; wire OllI1 ; wire IllI1 ; wire N_15069 ; wire N_15070 ; wire N_15071 ; wire N_15072 ; wire N_15073 ; wire N_15074 ; wire N_15075 ; wire N_15076 ; wire N_15077 ; wire N_15078 ; wire N_15079 ; wire N_15080 ; wire N_15081 ; wire N_15082 ; wire N_15083 ; wire N_15084 ; wire I0OI1 ; wire IlOI1 ; wire GND ; wire VCC ; // @28:433051 CFG4 \OOOI1_18[16] ( .A(OOOI1_7_Z[16]), .B(OOOI1_14_Z[16]), .C(OOOI1_1_Z[16]), .D(OOOI1_18_1_Z[16]), .Y(OOOI1_18_Z[16]) ); defparam \OOOI1_18[16] .INIT=16'hFEFF; // @28:433051 CFG4 \OOOI1_18_1[16] ( .A(N_16), .B(l1Ol1), .C(il1I1[32]), .D(Iolo1[16]), .Y(OOOI1_18_1_Z[16]) ); defparam \OOOI1_18_1[16] .INIT=16'h2A3F; // @28:433051 CFG4 \OOOI1_4[21] ( .A(IoOl1), .B(OOOI1_4_1_Z[21]), .C(oloI1[21]), .D(OOOI1_0_Z[21]), .Y(OOOI1_4_Z[21]) ); defparam \OOOI1_4[21] .INIT=16'hFFB3; // @28:433051 CFG4 \OOOI1_4_1[21] ( .A(ooOl1), .B(N_133), .C(o01I1_0), .D(i0lo1[21]), .Y(OOOI1_4_1_Z[21]) ); defparam \OOOI1_4_1[21] .INIT=16'h4C5F; // @28:433051 CFG4 \OOOI1_1[10] ( .A(loo11), .B(lOi11), .C(llOI1), .D(OoI11[10]), .Y(OOOI1_1_Z[10]) ); defparam \OOOI1_1[10] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_0[10] ( .A(o01I1[10]), .B(il1I1[10]), .C(ioOl1), .D(o1Ol1), .Y(OOOI1_0_Z[10]) ); defparam \OOOI1_0[10] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_0[11] ( .A(o01I1[11]), .B(il1I1[11]), .C(ioOl1), .D(o1Ol1), .Y(OOOI1_0_Z[11]) ); defparam \OOOI1_0[11] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_1[9] ( .A(i1_i_12), .B(OoI11[9]), .C(loo11), .D(lOi11), .Y(OOOI1_1_Z[9]) ); defparam \OOOI1_1[9] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_0[9] ( .A(o01I1[9]), .B(il1I1[9]), .C(ioOl1), .D(o1Ol1), .Y(OOOI1_0_Z[9]) ); defparam \OOOI1_0[9] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_1[1] ( .A(OoI11[1]), .B(Iil11), .C(oOi11), .D(lOi11), .Y(OOOI1_1_Z[1]) ); defparam \OOOI1_1[1] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_0[1] ( .A(o01I1[1]), .B(il1I1[1]), .C(ioOl1), .D(o1Ol1), .Y(OOOI1_0_Z[1]) ); defparam \OOOI1_0[1] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_1[0] ( .A(i1I11), .B(OoI11[0]), .C(lOi11), .D(oOi11), .Y(OOOI1_1_Z[0]) ); defparam \OOOI1_1[0] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_0[0] ( .A(o01I1[0]), .B(il1I1[0]), .C(ioOl1), .D(o1Ol1), .Y(OOOI1_0_Z[0]) ); defparam \OOOI1_0[0] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_0[2] ( .A(o01I1[2]), .B(il1I1[2]), .C(ioOl1), .D(o1Ol1), .Y(OOOI1_0_Z[2]) ); defparam \OOOI1_0[2] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_0[4] ( .A(o01I1[4]), .B(il1I1[4]), .C(ioOl1), .D(o1Ol1), .Y(OOOI1_0_Z[4]) ); defparam \OOOI1_0[4] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_0[8] ( .A(o01I1[8]), .B(il1I1[8]), .C(ioOl1), .D(o1Ol1), .Y(OOOI1_0_Z[8]) ); defparam \OOOI1_0[8] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_0[5] ( .A(o01I1[5]), .B(il1I1[5]), .C(ioOl1), .D(o1Ol1), .Y(OOOI1_0_Z[5]) ); defparam \OOOI1_0[5] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_0[3] ( .A(o01I1[3]), .B(il1I1[3]), .C(ioOl1), .D(o1Ol1), .Y(OOOI1_0_Z[3]) ); defparam \OOOI1_0[3] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_0[7] ( .A(o01I1[7]), .B(il1I1[7]), .C(ioOl1), .D(o1Ol1), .Y(OOOI1_0_Z[7]) ); defparam \OOOI1_0[7] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_0[6] ( .A(o01I1[6]), .B(il1I1[6]), .C(ioOl1), .D(o1Ol1), .Y(OOOI1_0_Z[6]) ); defparam \OOOI1_0[6] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_0[12] ( .A(o01I1[12]), .B(il1I1[12]), .C(ioOl1), .D(o1Ol1), .Y(OOOI1_0_Z[12]) ); defparam \OOOI1_0[12] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_0[18] ( .A(o01I1[18]), .B(il1I1[18]), .C(ioOl1), .D(o1Ol1), .Y(OOOI1_0_Z[18]) ); defparam \OOOI1_0[18] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_0[16] ( .A(o01I1[16]), .B(il1I1[16]), .C(ioOl1), .D(o1Ol1), .Y(OOOI1_0_Z[16]) ); defparam \OOOI1_0[16] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_0[17] ( .A(o01I1[17]), .B(il1I1[17]), .C(ioOl1), .D(o1Ol1), .Y(OOOI1_0_Z[17]) ); defparam \OOOI1_0[17] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_0[13] ( .A(o01I1[13]), .B(il1I1[13]), .C(ioOl1), .D(o1Ol1), .Y(OOOI1_0_Z[13]) ); defparam \OOOI1_0[13] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_0[15] ( .A(o01I1[15]), .B(il1I1[15]), .C(ioOl1), .D(o1Ol1), .Y(OOOI1_0_Z[15]) ); defparam \OOOI1_0[15] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_0[14] ( .A(o01I1[14]), .B(il1I1[14]), .C(ioOl1), .D(o1Ol1), .Y(OOOI1_0_Z[14]) ); defparam \OOOI1_0[14] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_0[22] ( .A(o01I1[22]), .B(il1I1[22]), .C(ioOl1), .D(o1Ol1), .Y(OOOI1_0_Z[22]) ); defparam \OOOI1_0[22] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_0[23] ( .A(o01I1[23]), .B(il1I1[23]), .C(ioOl1), .D(o1Ol1), .Y(OOOI1_0_Z[23]) ); defparam \OOOI1_0[23] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_0[20] ( .A(o01I1[20]), .B(il1I1[20]), .C(ioOl1), .D(o1Ol1), .Y(OOOI1_0_Z[20]) ); defparam \OOOI1_0[20] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_0[19] ( .A(o01I1[19]), .B(il1I1[19]), .C(ioOl1), .D(o1Ol1_3_0), .Y(OOOI1_0_Z[19]) ); defparam \OOOI1_0[19] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_0[31] ( .A(o01I1[31]), .B(il1I1[31]), .C(ioOl1), .D(o1Ol1), .Y(OOOI1_0_Z[31]) ); defparam \OOOI1_0[31] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_0[30] ( .A(o01I1[30]), .B(il1I1[30]), .C(ioOl1), .D(o1Ol1), .Y(OOOI1_0_Z[30]) ); defparam \OOOI1_0[30] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_0[26] ( .A(il1I1[26]), .B(o01I1[26]), .C(ioOl1_3_0), .D(o1Ol1), .Y(OOOI1_0_Z[26]) ); defparam \OOOI1_0[26] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_0[27] ( .A(o01I1[27]), .B(il1I1[27]), .C(ioOl1), .D(o1Ol1), .Y(OOOI1_0_Z[27]) ); defparam \OOOI1_0[27] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_0[25] ( .A(o01I1[25]), .B(il1I1[25]), .C(ioOl1), .D(o1Ol1), .Y(OOOI1_0_Z[25]) ); defparam \OOOI1_0[25] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_0[21] ( .A(o01I1[21]), .B(il1I1[21]), .C(ioOl1), .D(o1Ol1), .Y(OOOI1_0_Z[21]) ); defparam \OOOI1_0[21] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_2[2] ( .A(oOi11), .B(loI11), .C(un39_OOOI1[2]), .D(OOOI1_0_Z[2]), .Y(OOOI1_2_Z[2]) ); defparam \OOOI1_2[2] .INIT=16'hFFF8; // @28:433051 CFG3 \OOOI1_1[4] ( .A(lOi11), .B(OoI11[4]), .C(OOOI1_0_Z[4]), .Y(OOOI1_1_Z[4]) ); defparam \OOOI1_1[4] .INIT=8'hF8; // @28:433051 CFG3 \OOOI1_1[8] ( .A(lOi11), .B(OoI11[8]), .C(OOOI1_0_Z[8]), .Y(OOOI1_1_Z[8]) ); defparam \OOOI1_1[8] .INIT=8'hF8; // @28:433051 CFG3 \OOOI1_1[5] ( .A(lOi11), .B(OoI11[5]), .C(OOOI1_0_Z[5]), .Y(OOOI1_1_Z[5]) ); defparam \OOOI1_1[5] .INIT=8'hF8; // @28:433051 CFG4 \OOOI1_2[3] ( .A(OOOI1_0_Z[3]), .B(un39_OOOI1[3]), .C(iOi11), .D(loo11), .Y(OOOI1_2_Z[3]) ); defparam \OOOI1_2[3] .INIT=16'hFEEE; // @28:433051 CFG3 \OOOI1_1[7] ( .A(lOi11), .B(OoI11[7]), .C(OOOI1_0_Z[7]), .Y(OOOI1_1_Z[7]) ); defparam \OOOI1_1[7] .INIT=8'hF8; // @28:433051 CFG3 \OOOI1_1[6] ( .A(lOi11), .B(OoI11[6]), .C(OOOI1_0_Z[6]), .Y(OOOI1_1_Z[6]) ); defparam \OOOI1_1[6] .INIT=8'hF8; // @28:433051 CFG3 \OOOI1_1[12] ( .A(lOi11), .B(OoI11[12]), .C(OOOI1_0_Z[12]), .Y(OOOI1_1_Z[12]) ); defparam \OOOI1_1[12] .INIT=8'hF8; // @28:433051 CFG4 \OOOI1_1[16] ( .A(OOOI1_0_Z[16]), .B(N_133), .C(i0lo1_11[16]), .D(i0lo1_12[16]), .Y(OOOI1_1_Z[16]) ); defparam \OOOI1_1[16] .INIT=16'hBBBA; // @28:433051 CFG4 \OOOI1_1[17] ( .A(OOOI1_0_Z[17]), .B(N_133), .C(i0lo1_11[17]), .D(i0lo1_12[17]), .Y(OOOI1_1_Z[17]) ); defparam \OOOI1_1[17] .INIT=16'hBBBA; // @28:433051 CFG3 \OOOI1_1[13] ( .A(lOi11), .B(OoI11[13]), .C(OOOI1_0_Z[13]), .Y(OOOI1_1_Z[13]) ); defparam \OOOI1_1[13] .INIT=8'hF8; // @28:433051 CFG3 \OOOI1_1[15] ( .A(lOi11), .B(OoI11[15]), .C(OOOI1_0_Z[15]), .Y(OOOI1_1_Z[15]) ); defparam \OOOI1_1[15] .INIT=8'hF8; // @28:433051 CFG3 \OOOI1_1[14] ( .A(lOi11), .B(OoI11[14]), .C(OOOI1_0_Z[14]), .Y(OOOI1_1_Z[14]) ); defparam \OOOI1_1[14] .INIT=8'hF8; // @28:433051 CFG4 \OOOI1_12[10] ( .A(oiI11[10]), .B(OOlI1[10]), .C(l1o11), .D(O1o11), .Y(OOOI1_12_Z[10]) ); defparam \OOOI1_12[10] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_10[10] ( .A(lo1I1[10]), .B(O0l11[2]), .C(l0Ol1), .D(I0o11), .Y(OOOI1_10_Z[10]) ); defparam \OOOI1_10[10] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_9[10] ( .A(ilOl1), .B(oli11), .C(i01I1[10]), .D(oIOI1[18]), .Y(OOOI1_9_Z[10]) ); defparam \OOOI1_9[10] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_8[10] ( .A(Oo1I1[10]), .B(I11I1[10]), .C(I0Ol1), .D(O0Ol1), .Y(OOOI1_8_Z[10]) ); defparam \OOOI1_8[10] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_7[10] ( .A(Iol11[2]), .B(iIoI1[10]), .C(l1Ol1), .D(OOi11), .Y(OOOI1_7_Z[10]) ); defparam \OOOI1_7[10] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_6[10] ( .A(oOoI1), .B(oIoI1[10]), .C(olOl1), .D(O1Ol1), .Y(OOOI1_6_Z[10]) ); defparam \OOOI1_6[10] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_5[10] ( .A(oloI1[10]), .B(ll1I1[10]), .C(i0Ol1), .D(IoOl1), .Y(OOOI1_5_Z[10]) ); defparam \OOOI1_5[10] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_3[10] ( .A(OOOI1_1_Z[10]), .B(ooOl1), .C(iloI1[10]), .D(OOOI1_0_Z[10]), .Y(OOOI1_3_Z[10]) ); defparam \OOOI1_3[10] .INIT=16'hFFEA; // @28:433051 CFG4 \OOOI1_11[11] ( .A(iol11[11]), .B(OOlI1[11]), .C(O1o11), .D(IOi11), .Y(OOOI1_11_Z[11]) ); defparam \OOOI1_11[11] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_10[11] ( .A(oo1I1[11]), .B(OOl11[11]), .C(i1o11), .D(o0Ol1), .Y(OOOI1_10_Z[11]) ); defparam \OOOI1_10[11] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_9[11] ( .A(lo1I1[11]), .B(O0l11[3]), .C(l0Ol1), .D(I0o11), .Y(OOOI1_9_Z[11]) ); defparam \OOOI1_9[11] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_8[11] ( .A(ilOl1), .B(oli11), .C(i01I1[11]), .D(oIOI1[19]), .Y(OOOI1_8_Z[11]) ); defparam \OOOI1_8[11] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_7[11] ( .A(Oo1I1[11]), .B(I11I1[11]), .C(I0Ol1), .D(O0Ol1), .Y(OOOI1_7_Z[11]) ); defparam \OOOI1_7[11] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_6[11] ( .A(Iol11[3]), .B(iIoI1[11]), .C(l1Ol1), .D(OOi11), .Y(OOOI1_6_Z[11]) ); defparam \OOOI1_6[11] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_5[11] ( .A(oIoI1[11]), .B(lOoI1), .C(olOl1), .D(O1Ol1), .Y(OOOI1_5_Z[11]) ); defparam \OOOI1_5[11] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_2[11] ( .A(iloI1[11]), .B(OOOI1_0_Z[11]), .C(un39_OOOI1[11]), .D(ooOl1), .Y(OOOI1_2_Z[11]) ); defparam \OOOI1_2[11] .INIT=16'hFEFC; // @28:433051 CFG4 \OOOI1_13[9] ( .A(iol11[9]), .B(OOlI1[9]), .C(O1o11), .D(IOi11), .Y(OOOI1_13_Z[9]) ); defparam \OOOI1_13[9] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_12[9] ( .A(oiI11[9]), .B(OOl11[9]), .C(i1o11), .D(l1o11), .Y(OOOI1_12_Z[9]) ); defparam \OOOI1_12[9] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_11[9] ( .A(ooIO1[1]), .B(oo1I1[9]), .C(olo11), .D(o0Ol1), .Y(OOOI1_11_Z[9]) ); defparam \OOOI1_11[9] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_10[9] ( .A(lo1I1[9]), .B(O0l11[1]), .C(I0o11), .D(l0Ol1), .Y(OOOI1_10_Z[9]) ); defparam \OOOI1_10[9] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_9[9] ( .A(ilOl1), .B(oli11), .C(i01I1[9]), .D(oIOI1[17]), .Y(OOOI1_9_Z[9]) ); defparam \OOOI1_9[9] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_8[9] ( .A(Oo1I1[9]), .B(I11I1[9]), .C(I0Ol1), .D(O0Ol1), .Y(OOOI1_8_Z[9]) ); defparam \OOOI1_8[9] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_7[9] ( .A(Iol11[1]), .B(iIoI1[9]), .C(l1Ol1), .D(OOi11), .Y(OOOI1_7_Z[9]) ); defparam \OOOI1_7[9] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_6[9] ( .A(oIoI1[9]), .B(iOoI1), .C(olOl1), .D(O1Ol1), .Y(OOOI1_6_Z[9]) ); defparam \OOOI1_6[9] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_5[9] ( .A(oloI1[9]), .B(ll1I1[9]), .C(i0Ol1), .D(IoOl1), .Y(OOOI1_5_Z[9]) ); defparam \OOOI1_5[9] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_3[9] ( .A(OOOI1_1_Z[9]), .B(ooOl1), .C(iloI1[9]), .D(OOOI1_0_Z[9]), .Y(OOOI1_3_Z[9]) ); defparam \OOOI1_3[9] .INIT=16'hFFEA; // @28:433051 CFG4 \OOOI1_15[1] ( .A(iol11[1]), .B(OOl11[1]), .C(i1o11), .D(IOi11), .Y(OOOI1_15_Z[1]) ); defparam \OOOI1_15[1] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_14[1] ( .A(oiI11[1]), .B(OOlI1[1]), .C(l1o11), .D(O1o11), .Y(OOOI1_14_Z[1]) ); defparam \OOOI1_14[1] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_13[1] ( .A(l1I11), .B(oo1I1[1]), .C(Ilo11), .D(o0Ol1), .Y(OOOI1_13_Z[1]) ); defparam \OOOI1_13[1] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_12[1] ( .A(lo1I1[1]), .B(oOl11), .C(olo11), .D(l0Ol1), .Y(OOOI1_12_Z[1]) ); defparam \OOOI1_12[1] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_11[1] ( .A(o1l11[1]), .B(IIl11[1]), .C(I0o11), .D(Iio11), .Y(OOOI1_11_Z[1]) ); defparam \OOOI1_11[1] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_10[1] ( .A(ilOl1), .B(oli11), .C(i01I1[1]), .D(oIOI1[25]), .Y(OOOI1_10_Z[1]) ); defparam \OOOI1_10[1] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_9[1] ( .A(Oo1I1[1]), .B(I11I1[1]), .C(I0Ol1), .D(O0Ol1), .Y(OOOI1_9_Z[1]) ); defparam \OOOI1_9[1] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_8[1] ( .A(OiI11), .B(iIoI1[1]), .C(ioo11), .D(l1Ol1), .Y(OOOI1_8_Z[1]) ); defparam \OOOI1_8[1] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_7[1] ( .A(lol11[1]), .B(ii1I1), .C(olOl1), .D(OOi11), .Y(OOOI1_7_Z[1]) ); defparam \OOOI1_7[1] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_6[1] ( .A(oIoI1[1]), .B(ll1I1[1]), .C(i0Ol1), .D(O1Ol1), .Y(OOOI1_6_Z[1]) ); defparam \OOOI1_6[1] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_4[1] ( .A(Iil11), .B(I01I1[1]), .C(OoOl1), .D(oio11), .Y(OOOI1_4_Z[1]) ); defparam \OOOI1_4[1] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_3[1] ( .A(OOOI1_1_Z[1]), .B(ooOl1), .C(iloI1[1]), .D(OOOI1_0_Z[1]), .Y(OOOI1_3_Z[1]) ); defparam \OOOI1_3[1] .INIT=16'hFFEA; // @28:433051 CFG4 \OOOI1_15[0] ( .A(oiI11[0]), .B(OOlI1[0]), .C(l1o11), .D(O1o11), .Y(OOOI1_15_Z[0]) ); defparam \OOOI1_15[0] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_14[0] ( .A(iol11[0]), .B(OOl11[0]), .C(i1o11), .D(IOi11), .Y(OOOI1_14_Z[0]) ); defparam \OOOI1_14[0] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_13[0] ( .A(O1l11), .B(oo1I1[0]), .C(Ilo11), .D(o0Ol1), .Y(OOOI1_13_Z[0]) ); defparam \OOOI1_13[0] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_12[0] ( .A(lo1I1[0]), .B(IOI11), .C(l0Ol1), .D(olo11), .Y(OOOI1_12_Z[0]) ); defparam \OOOI1_12[0] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_11[0] ( .A(o1l11[0]), .B(IIl11[0]), .C(I0o11), .D(Iio11), .Y(OOOI1_11_Z[0]) ); defparam \OOOI1_11[0] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_10[0] ( .A(ilOl1), .B(oli11), .C(i01I1[0]), .D(oIOI1[24]), .Y(OOOI1_10_Z[0]) ); defparam \OOOI1_10[0] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_9[0] ( .A(Oo1I1[0]), .B(I11I1[0]), .C(I0Ol1), .D(O0Ol1), .Y(OOOI1_9_Z[0]) ); defparam \OOOI1_9[0] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_8[0] ( .A(IiI11), .B(iIoI1[0]), .C(ioo11), .D(l1Ol1), .Y(OOOI1_8_Z[0]) ); defparam \OOOI1_8[0] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_7[0] ( .A(lol11[0]), .B(OOoI1), .C(olOl1), .D(OOi11), .Y(OOOI1_7_Z[0]) ); defparam \OOOI1_7[0] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_6[0] ( .A(oIoI1[0]), .B(ll1I1[0]), .C(i0Ol1), .D(O1Ol1), .Y(OOOI1_6_Z[0]) ); defparam \OOOI1_6[0] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_4[0] ( .A(Oil11), .B(I01I1[0]), .C(OoOl1), .D(oio11), .Y(OOOI1_4_Z[0]) ); defparam \OOOI1_4[0] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_3[0] ( .A(OOOI1_1_Z[0]), .B(ooOl1), .C(iloI1[0]), .D(OOOI1_0_Z[0]), .Y(OOOI1_3_Z[0]) ); defparam \OOOI1_3[0] .INIT=16'hFFEA; // @28:433051 CFG4 \OOOI1_17[2] ( .A(iIl11[2]), .B(OOl11[2]), .C(o0o11), .D(i1o11), .Y(OOOI1_17_Z[2]) ); defparam \OOOI1_17[2] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_16[2] ( .A(oiI11[2]), .B(OOlI1[2]), .C(l1o11), .D(O1o11), .Y(OOOI1_16_Z[2]) ); defparam \OOOI1_16[2] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_15[2] ( .A(oo1I1[2]), .B(iol11[2]), .C(IOi11), .D(o0Ol1), .Y(OOOI1_15_Z[2]) ); defparam \OOOI1_15[2] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_14[2] ( .A(i0l11), .B(lOl11), .C(Ilo11), .D(olo11), .Y(OOOI1_14_Z[2]) ); defparam \OOOI1_14[2] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_13[2] ( .A(Ioo11), .B(l0Ol1), .C(lo1I1[2]), .D(i1II1), .Y(OOOI1_13_Z[2]) ); defparam \OOOI1_13[2] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_12[2] ( .A(o1l11[2]), .B(IIl11[2]), .C(I0o11), .D(Iio11), .Y(OOOI1_12_Z[2]) ); defparam \OOOI1_12[2] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_11[2] ( .A(ilOl1), .B(oli11), .C(i01I1[2]), .D(oIOI1[26]), .Y(OOOI1_11_Z[2]) ); defparam \OOOI1_11[2] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_10[2] ( .A(Oo1I1[2]), .B(I11I1[2]), .C(I0Ol1), .D(O0Ol1), .Y(OOOI1_10_Z[2]) ); defparam \OOOI1_10[2] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_9[2] ( .A(ioo11), .B(l1Ol1), .C(iIoI1[2]), .D(ilo11), .Y(OOOI1_9_Z[2]) ); defparam \OOOI1_9[2] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_8[2] ( .A(lol11[2]), .B(oi1I1), .C(olOl1), .D(OOi11), .Y(OOOI1_8_Z[2]) ); defparam \OOOI1_8[2] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_6[2] ( .A(oloI1[2]), .B(ll1I1[2]), .C(i0Ol1), .D(IoOl1), .Y(OOOI1_6_Z[2]) ); defparam \OOOI1_6[2] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_5[2] ( .A(N_16), .B(OoOl1), .C(I01I1[2]), .D(Iolo1[2]), .Y(OOOI1_5_Z[2]) ); defparam \OOOI1_5[2] .INIT=16'hD5C0; // @28:433051 CFG4 \OOOI1_15[4] ( .A(oiI11[4]), .B(iol11[4]), .C(l1o11), .D(IOi11), .Y(OOOI1_15_Z[4]) ); defparam \OOOI1_15[4] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_14[4] ( .A(OOlI1[4]), .B(OOl11[4]), .C(O1o11), .D(i1o11), .Y(OOOI1_14_Z[4]) ); defparam \OOOI1_14[4] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_13[4] ( .A(ooI11), .B(oo1I1[4]), .C(o0Ol1), .D(Ilo11), .Y(OOOI1_13_Z[4]) ); defparam \OOOI1_13[4] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_12[4] ( .A(lo1I1[4]), .B(iOl11), .C(l0Ol1), .D(olo11), .Y(OOOI1_12_Z[4]) ); defparam \OOOI1_12[4] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_11[4] ( .A(Ioo11), .B(I0o11), .C(IIl11[4]), .D(l1II1), .Y(OOOI1_11_Z[4]) ); defparam \OOOI1_11[4] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_10[4] ( .A(Iio11), .B(oli11), .C(i1l11), .D(oIOI1[28]), .Y(OOOI1_10_Z[4]) ); defparam \OOOI1_10[4] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_8[4] ( .A(iIoI1[4]), .B(Oo1I1[4]), .C(I0Ol1), .D(l1Ol1), .Y(OOOI1_8_Z[4]) ); defparam \OOOI1_8[4] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_7[4] ( .A(lol11[4]), .B(Ii1I1), .C(olOl1), .D(OOi11), .Y(OOOI1_7_Z[4]) ); defparam \OOOI1_7[4] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_5[4] ( .A(oloI1[4]), .B(ll1I1[4]), .C(i0Ol1), .D(IoOl1), .Y(OOOI1_5_Z[4]) ); defparam \OOOI1_5[4] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_4[4] ( .A(N_16), .B(OoOl1), .C(I01I1[4]), .D(Iolo1[4]), .Y(OOOI1_4_Z[4]) ); defparam \OOOI1_4[4] .INIT=16'hD5C0; // @28:433051 CFG4 \OOOI1_14[8] ( .A(oiI11[8]), .B(OOl11[8]), .C(l1o11), .D(i1o11), .Y(OOOI1_14_Z[8]) ); defparam \OOOI1_14[8] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_13[8] ( .A(iol11[8]), .B(OOlI1[8]), .C(O1o11), .D(IOi11), .Y(OOOI1_13_Z[8]) ); defparam \OOOI1_13[8] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_12[8] ( .A(oo1I1[8]), .B(Ol1i0), .C(Ilo11), .D(o0Ol1), .Y(OOOI1_12_Z[8]) ); defparam \OOOI1_12[8] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_11[8] ( .A(ooIO1[0]), .B(lo1I1[8]), .C(olo11), .D(l0Ol1), .Y(OOOI1_11_Z[8]) ); defparam \OOOI1_11[8] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_10[8] ( .A(oIOI1[16]), .B(O0l11[0]), .C(oli11), .D(I0o11), .Y(OOOI1_10_Z[8]) ); defparam \OOOI1_10[8] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_9[8] ( .A(i01I1[8]), .B(I11I1[8]), .C(ilOl1), .D(O0Ol1), .Y(OOOI1_9_Z[8]) ); defparam \OOOI1_9[8] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_8[8] ( .A(iIoI1[8]), .B(Oo1I1[8]), .C(I0Ol1), .D(l1Ol1), .Y(OOOI1_8_Z[8]) ); defparam \OOOI1_8[8] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_7[8] ( .A(Iol11[0]), .B(OIoI1), .C(olOl1), .D(OOi11), .Y(OOOI1_7_Z[8]) ); defparam \OOOI1_7[8] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_5[8] ( .A(oloI1[8]), .B(ll1I1[8]), .C(i0Ol1), .D(IoOl1), .Y(OOOI1_5_Z[8]) ); defparam \OOOI1_5[8] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_4[8] ( .A(N_16), .B(OoOl1), .C(I01I1[8]), .D(Iolo1[8]), .Y(OOOI1_4_Z[8]) ); defparam \OOOI1_4[8] .INIT=16'hD5C0; // @28:433051 CFG4 \OOOI1_2[8] ( .A(OOOI1_1_Z[8]), .B(N_133), .C(i0lo1_41[8]), .D(i0lo1_40[8]), .Y(OOOI1_2_Z[8]) ); defparam \OOOI1_2[8] .INIT=16'hBBBA; // @28:433051 CFG4 \OOOI1_14[5] ( .A(oiI11[5]), .B(OOl11[5]), .C(l1o11), .D(i1o11), .Y(OOOI1_14_Z[5]) ); defparam \OOOI1_14[5] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_13[5] ( .A(iol11[5]), .B(OOlI1[5]), .C(O1o11), .D(IOi11), .Y(OOOI1_13_Z[5]) ); defparam \OOOI1_13[5] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_12[5] ( .A(ioI11), .B(oo1I1[5]), .C(Ilo11), .D(o0Ol1), .Y(OOOI1_12_Z[5]) ); defparam \OOOI1_12[5] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_11[5] ( .A(lo1I1[5]), .B(OIl11), .C(l0Ol1), .D(olo11), .Y(OOOI1_11_Z[5]) ); defparam \OOOI1_11[5] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_10[5] ( .A(Ioo11), .B(I0o11), .C(olOI1), .D(IIl11[5]), .Y(OOOI1_10_Z[5]) ); defparam \OOOI1_10[5] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_9[5] ( .A(Iio11), .B(oli11), .C(Ool11), .D(oIOI1[29]), .Y(OOOI1_9_Z[5]) ); defparam \OOOI1_9[5] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_8[5] ( .A(i01I1[5]), .B(I11I1[5]), .C(ilOl1), .D(O0Ol1), .Y(OOOI1_8_Z[5]) ); defparam \OOOI1_8[5] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_7[5] ( .A(iIoI1[5]), .B(Oo1I1[5]), .C(I0Ol1), .D(l1Ol1), .Y(OOOI1_7_Z[5]) ); defparam \OOOI1_7[5] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_5[5] ( .A(oloI1[5]), .B(ll1I1[5]), .C(i0Ol1), .D(IoOl1), .Y(OOOI1_5_Z[5]) ); defparam \OOOI1_5[5] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_4[5] ( .A(N_16), .B(OoOl1), .C(I01I1[5]), .D(Iolo1[5]), .Y(OOOI1_4_Z[5]) ); defparam \OOOI1_4[5] .INIT=16'hD5C0; // @28:433051 CFG4 \OOOI1_2[5] ( .A(OOOI1_1_Z[5]), .B(N_133), .C(i0lo1_41[5]), .D(i0lo1_40[5]), .Y(OOOI1_2_Z[5]) ); defparam \OOOI1_2[5] .INIT=16'hBBBA; // @28:433051 CFG4 \OOOI1_16[3] ( .A(iIl11[3]), .B(OOl11[3]), .C(o0o11), .D(i1o11), .Y(OOOI1_16_Z[3]) ); defparam \OOOI1_16[3] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_15[3] ( .A(oiI11[3]), .B(OOlI1[3]), .C(l1o11), .D(O1o11), .Y(OOOI1_15_Z[3]) ); defparam \OOOI1_15[3] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_14[3] ( .A(oo1I1[3]), .B(iol11[3]), .C(IOi11), .D(o0Ol1), .Y(OOOI1_14_Z[3]) ); defparam \OOOI1_14[3] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_13[3] ( .A(I1I11), .B(lo1I1[3]), .C(Ilo11), .D(l0Ol1), .Y(OOOI1_13_Z[3]) ); defparam \OOOI1_13[3] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_12[3] ( .A(Ioo11), .B(I0o11), .C(o1II1), .D(IIl11[3]), .Y(OOOI1_12_Z[3]) ); defparam \OOOI1_12[3] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_11[3] ( .A(ilOl1), .B(oli11), .C(i01I1[3]), .D(oIOI1[27]), .Y(OOOI1_11_Z[3]) ); defparam \OOOI1_11[3] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_10[3] ( .A(Oo1I1[3]), .B(I11I1[3]), .C(I0Ol1), .D(O0Ol1), .Y(OOOI1_10_Z[3]) ); defparam \OOOI1_10[3] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_9[3] ( .A(liI11), .B(iIoI1[3]), .C(l1Ol1), .D(ioo11), .Y(OOOI1_9_Z[3]) ); defparam \OOOI1_9[3] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_8[3] ( .A(lol11[3]), .B(li1I1), .C(olOl1), .D(OOi11), .Y(OOOI1_8_Z[3]) ); defparam \OOOI1_8[3] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_6[3] ( .A(oloI1[3]), .B(ll1I1[3]), .C(i0Ol1), .D(IoOl1), .Y(OOOI1_6_Z[3]) ); defparam \OOOI1_6[3] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_5[3] ( .A(N_16), .B(OoOl1), .C(I01I1[3]), .D(Iolo1[3]), .Y(OOOI1_5_Z[3]) ); defparam \OOOI1_5[3] .INIT=16'hD5C0; // @28:433051 CFG4 \OOOI1_12[7] ( .A(iol11[7]), .B(OOlI1[7]), .C(O1o11), .D(IOi11), .Y(OOOI1_12_Z[7]) ); defparam \OOOI1_12[7] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_11[7] ( .A(oiI11[7]), .B(OOl11[7]), .C(l1o11), .D(i1o11), .Y(OOOI1_11_Z[7]) ); defparam \OOOI1_11[7] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_10[7] ( .A(lo1I1[7]), .B(oo1I1[7]), .C(o0Ol1), .D(l0Ol1), .Y(OOOI1_10_Z[7]) ); defparam \OOOI1_10[7] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_9[7] ( .A(iIOI1), .B(oIOI1[31]), .C(Ioo11), .D(oli11), .Y(OOOI1_9_Z[7]) ); defparam \OOOI1_9[7] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_8[7] ( .A(i01I1[7]), .B(I11I1[7]), .C(ilOl1), .D(O0Ol1), .Y(OOOI1_8_Z[7]) ); defparam \OOOI1_8[7] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_7[7] ( .A(iIoI1[7]), .B(Oo1I1[7]), .C(I0Ol1), .D(l1Ol1), .Y(OOOI1_7_Z[7]) ); defparam \OOOI1_7[7] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_5[7] ( .A(oloI1[7]), .B(ll1I1[7]), .C(i0Ol1), .D(IoOl1), .Y(OOOI1_5_Z[7]) ); defparam \OOOI1_5[7] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_4[7] ( .A(N_16), .B(OoOl1), .C(I01I1[7]), .D(Iolo1[7]), .Y(OOOI1_4_Z[7]) ); defparam \OOOI1_4[7] .INIT=16'hD5C0; // @28:433051 CFG4 \OOOI1_13[6] ( .A(OOlI1[6]), .B(OOl11[6]), .C(O1o11), .D(i1o11), .Y(OOOI1_13_Z[6]) ); defparam \OOOI1_13[6] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_12[6] ( .A(oiI11[6]), .B(iol11[6]), .C(l1o11), .D(IOi11), .Y(OOOI1_12_Z[6]) ); defparam \OOOI1_12[6] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_11[6] ( .A(IoOI1), .B(oo1I1[6]), .C(olo11), .D(o0Ol1), .Y(OOOI1_11_Z[6]) ); defparam \OOOI1_11[6] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_10[6] ( .A(lo1I1[6]), .B(OlOI1), .C(Ioo11), .D(l0Ol1), .Y(OOOI1_10_Z[6]) ); defparam \OOOI1_10[6] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_9[6] ( .A(I0o11), .B(oli11), .C(oIOI1[30]), .D(IIl11[6]), .Y(OOOI1_9_Z[6]) ); defparam \OOOI1_9[6] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_8[6] ( .A(i01I1[6]), .B(I11I1[6]), .C(ilOl1), .D(O0Ol1), .Y(OOOI1_8_Z[6]) ); defparam \OOOI1_8[6] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_7[6] ( .A(iIoI1[6]), .B(Oo1I1[6]), .C(I0Ol1), .D(l1Ol1), .Y(OOOI1_7_Z[6]) ); defparam \OOOI1_7[6] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_5[6] ( .A(oloI1[6]), .B(ll1I1[6]), .C(i0Ol1), .D(IoOl1), .Y(OOOI1_5_Z[6]) ); defparam \OOOI1_5[6] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_4[6] ( .A(N_16), .B(OoOl1), .C(I01I1[6]), .D(Iolo1[6]), .Y(OOOI1_4_Z[6]) ); defparam \OOOI1_4[6] .INIT=16'hD5C0; // @28:433051 CFG4 \OOOI1_2[6] ( .A(OOOI1_1_Z[6]), .B(N_133), .C(i0lo1_41[6]), .D(i0lo1_40[6]), .Y(OOOI1_2_Z[6]) ); defparam \OOOI1_2[6] .INIT=16'hBBBA; // @28:433051 CFG4 \OOOI1_13[12] ( .A(Oll11[0]), .B(oiI11[12]), .C(o0o11), .D(l1o11), .Y(OOOI1_13_Z[12]) ); defparam \OOOI1_13[12] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_12[12] ( .A(OOlI1[12]), .B(OOl11[12]), .C(O1o11), .D(i1o11), .Y(OOOI1_12_Z[12]) ); defparam \OOOI1_12[12] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_11[12] ( .A(oo1I1[12]), .B(iol11[12]), .C(IOi11), .D(o0Ol1), .Y(OOOI1_11_Z[12]) ); defparam \OOOI1_11[12] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_10[12] ( .A(lo1I1[12]), .B(I0l11[0]), .C(l0Ol1), .D(olo11), .Y(OOOI1_10_Z[12]) ); defparam \OOOI1_10[12] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_9[12] ( .A(I0o11), .B(oli11), .C(oIOI1[20]), .D(O0l11[4]), .Y(OOOI1_9_Z[12]) ); defparam \OOOI1_9[12] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_8[12] ( .A(i01I1[12]), .B(I11I1[12]), .C(ilOl1), .D(O0Ol1), .Y(OOOI1_8_Z[12]) ); defparam \OOOI1_8[12] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_7[12] ( .A(Iol11[4]), .B(iIoI1[12]), .C(OOi11), .D(l1Ol1), .Y(OOOI1_7_Z[12]) ); defparam \OOOI1_7[12] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_6[12] ( .A(oIoI1[12]), .B(IOoI1), .C(olOl1), .D(O1Ol1), .Y(OOOI1_6_Z[12]) ); defparam \OOOI1_6[12] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_4[12] ( .A(N_16), .B(OoOl1), .C(I01I1[12]), .D(Iolo1[12]), .Y(OOOI1_4_Z[12]) ); defparam \OOOI1_4[12] .INIT=16'hD5C0; // @28:433051 CFG4 \OOOI1_10[18] ( .A(iil11), .B(io1I1), .C(Ilo11), .D(o0Ol1), .Y(OOOI1_10_Z[18]) ); defparam \OOOI1_10[18] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_9[18] ( .A(I0o11), .B(oli11), .C(oIOI1[10]), .D(oIl11[2]), .Y(OOOI1_9_Z[18]) ); defparam \OOOI1_9[18] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_8[18] ( .A(O11I1[2]), .B(Io1I1[2]), .C(ilOl1), .D(O0Ol1), .Y(OOOI1_8_Z[18]) ); defparam \OOOI1_8[18] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_7[18] ( .A(il1I1[34]), .B(i11I1[2]), .C(l1Ol1), .D(I0Ol1), .Y(OOOI1_7_Z[18]) ); defparam \OOOI1_7[18] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_6[18] ( .A(olOl1), .B(O0i11), .C(lI1I1), .D(oIOI1[42]), .Y(OOOI1_6_Z[18]) ); defparam \OOOI1_6[18] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_5[18] ( .A(oIoI1[34]), .B(oIoI1[18]), .C(i0Ol1), .D(O1Ol1), .Y(OOOI1_5_Z[18]) ); defparam \OOOI1_5[18] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_3[18] ( .A(N_16), .B(OoOl1), .C(Iolo1[18]), .D(oloI1[34]), .Y(OOOI1_3_Z[18]) ); defparam \OOOI1_3[18] .INIT=16'hDC50; // @28:433051 CFG4 \OOOI1_2[18] ( .A(i0lo1[18]), .B(OOOI1_0_Z[18]), .C(un137_OOOI1[18]), .D(N_133), .Y(OOOI1_2_Z[18]) ); defparam \OOOI1_2[18] .INIT=16'hFCFE; // @28:433051 CFG4 \OOOI1_10[16] ( .A(lil11), .B(oo1I1[16]), .C(Ilo11), .D(o0Ol1), .Y(OOOI1_10_Z[16]) ); defparam \OOOI1_10[16] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_9[16] ( .A(lo1I1[16]), .B(oIl11[0]), .C(I0o11), .D(l0Ol1), .Y(OOOI1_9_Z[16]) ); defparam \OOOI1_9[16] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_7[16] ( .A(O11I1[0]), .B(i11I1[0]), .C(O0Ol1), .D(I0Ol1), .Y(OOOI1_7_Z[16]) ); defparam \OOOI1_7[16] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_4[16] ( .A(oIoI1[32]), .B(oIoI1[16]), .C(i0Ol1), .D(O1Ol1), .Y(OOOI1_4_Z[16]) ); defparam \OOOI1_4[16] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_3[16] ( .A(oloI1[32]), .B(oloI1[16]), .C(OoOl1), .D(IoOl1), .Y(OOOI1_3_Z[16]) ); defparam \OOOI1_3[16] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_10[17] ( .A(oil11), .B(oo1I1[17]), .C(Ilo11), .D(o0Ol1), .Y(OOOI1_10_Z[17]) ); defparam \OOOI1_10[17] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_9[17] ( .A(lo1I1[17]), .B(oIl11[1]), .C(I0o11), .D(l0Ol1), .Y(OOOI1_9_Z[17]) ); defparam \OOOI1_9[17] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_8[17] ( .A(ilOl1), .B(oli11), .C(Io1I1[1]), .D(oIOI1[9]), .Y(OOOI1_8_Z[17]) ); defparam \OOOI1_8[17] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_7[17] ( .A(O11I1[1]), .B(i11I1[1]), .C(O0Ol1), .D(I0Ol1), .Y(OOOI1_7_Z[17]) ); defparam \OOOI1_7[17] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_5[17] ( .A(olOl1), .B(O0i11), .C(oI1I1), .D(oIOI1[41]), .Y(OOOI1_5_Z[17]) ); defparam \OOOI1_5[17] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_4[17] ( .A(oIoI1[33]), .B(oIoI1[17]), .C(i0Ol1), .D(O1Ol1), .Y(OOOI1_4_Z[17]) ); defparam \OOOI1_4[17] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_3[17] ( .A(oloI1[33]), .B(oloI1[17]), .C(OoOl1), .D(IoOl1), .Y(OOOI1_3_Z[17]) ); defparam \OOOI1_3[17] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_10[13] ( .A(oiI11[13]), .B(OOlI1[13]), .C(l1o11), .D(O1o11), .Y(OOOI1_10_Z[13]) ); defparam \OOOI1_10[13] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_8[13] ( .A(oo1I1[13]), .B(I0l11[1]), .C(o0Ol1), .D(olo11), .Y(OOOI1_8_Z[13]) ); defparam \OOOI1_8[13] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_7[13] ( .A(lo1I1[13]), .B(O0l11[5]), .C(l0Ol1), .D(I0o11), .Y(OOOI1_7_Z[13]) ); defparam \OOOI1_7[13] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_6[13] ( .A(ilOl1), .B(oli11), .C(i01I1[13]), .D(oIOI1[21]), .Y(OOOI1_6_Z[13]) ); defparam \OOOI1_6[13] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_4[13] ( .A(N_16), .B(IoOl1), .C(Iolo1[13]), .D(oloI1[13]), .Y(OOOI1_4_Z[13]) ); defparam \OOOI1_4[13] .INIT=16'hDC50; // @28:433051 CFG4 \OOOI1_2[13] ( .A(OOOI1_1_Z[13]), .B(N_133), .C(i0lo1_11[13]), .D(i0lo1_12[13]), .Y(OOOI1_2_Z[13]) ); defparam \OOOI1_2[13] .INIT=16'hBBBA; // @28:433051 CFG4 \OOOI1_10[15] ( .A(Oll11[3]), .B(OOl11[15]), .C(o0o11), .D(i1o11), .Y(OOOI1_10_Z[15]) ); defparam \OOOI1_10[15] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_9[15] ( .A(oiI11[15]), .B(OOlI1[15]), .C(l1o11), .D(O1o11), .Y(OOOI1_9_Z[15]) ); defparam \OOOI1_9[15] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_8[15] ( .A(oo1I1[15]), .B(iol11[15]), .C(IOi11), .D(o0Ol1), .Y(OOOI1_8_Z[15]) ); defparam \OOOI1_8[15] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_7[15] ( .A(lo1I1[15]), .B(I0l11[3]), .C(olo11), .D(l0Ol1), .Y(OOOI1_7_Z[15]) ); defparam \OOOI1_7[15] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_6[15] ( .A(I0o11), .B(oli11), .C(oIOI1[23]), .D(O0l11[7]), .Y(OOOI1_6_Z[15]) ); defparam \OOOI1_6[15] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_4[15] ( .A(oIoI1[15]), .B(oloI1[15]), .C(O1Ol1), .D(IoOl1), .Y(OOOI1_4_Z[15]) ); defparam \OOOI1_4[15] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_10[14] ( .A(Oll11[2]), .B(OOl11[14]), .C(o0o11), .D(i1o11), .Y(OOOI1_10_Z[14]) ); defparam \OOOI1_10[14] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_9[14] ( .A(oiI11[14]), .B(OOlI1[14]), .C(l1o11), .D(O1o11), .Y(OOOI1_9_Z[14]) ); defparam \OOOI1_9[14] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_8[14] ( .A(oo1I1[14]), .B(iol11[14]), .C(IOi11), .D(o0Ol1), .Y(OOOI1_8_Z[14]) ); defparam \OOOI1_8[14] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_7[14] ( .A(lo1I1[14]), .B(I0l11[2]), .C(l0Ol1), .D(olo11), .Y(OOOI1_7_Z[14]) ); defparam \OOOI1_7[14] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_6[14] ( .A(I0o11), .B(oli11), .C(oIOI1[22]), .D(O0l11[6]), .Y(OOOI1_6_Z[14]) ); defparam \OOOI1_6[14] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_4[14] ( .A(oIoI1[14]), .B(oloI1[14]), .C(O1Ol1), .D(IoOl1), .Y(OOOI1_4_Z[14]) ); defparam \OOOI1_4[14] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_2[14] ( .A(OOOI1_1_Z[14]), .B(N_133), .C(i0lo1_11[14]), .D(i0lo1_12[14]), .Y(OOOI1_2_Z[14]) ); defparam \OOOI1_2[14] .INIT=16'hBBBA; // @28:433051 CFG4 \OOOI1_7[22] ( .A(l0l11[2]), .B(o11I1), .C(o0Ol1), .D(o0o11), .Y(OOOI1_7_Z[22]) ); defparam \OOOI1_7[22] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_6[22] ( .A(I0o11), .B(oli11), .C(oIOI1[14]), .D(oIl11[6]), .Y(OOOI1_6_Z[22]) ); defparam \OOOI1_6[22] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_5[22] ( .A(O11I1[6]), .B(Io1I1[6]), .C(ilOl1), .D(O0Ol1), .Y(OOOI1_5_Z[22]) ); defparam \OOOI1_5[22] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_4[22] ( .A(il1I1[38]), .B(i11I1[6]), .C(l1Ol1), .D(I0Ol1), .Y(OOOI1_4_Z[22]) ); defparam \OOOI1_4[22] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_3[22] ( .A(O1Ol1), .B(O0i11), .C(oIoI1[22]), .D(oIOI1[46]), .Y(OOOI1_3_Z[22]) ); defparam \OOOI1_3[22] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_2[22] ( .A(oloI1[22]), .B(oIoI1[38]), .C(i0Ol1), .D(IoOl1), .Y(OOOI1_2_Z[22]) ); defparam \OOOI1_2[22] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_6[23] ( .A(o0o11), .B(oli11), .C(l0l11[3]), .D(oIOI1[15]), .Y(OOOI1_6_Z[23]) ); defparam \OOOI1_6[23] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_5[23] ( .A(O11I1[7]), .B(Io1I1[7]), .C(ilOl1), .D(O0Ol1), .Y(OOOI1_5_Z[23]) ); defparam \OOOI1_5[23] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_4[23] ( .A(il1I1[39]), .B(i11I1[7]), .C(l1Ol1), .D(I0Ol1), .Y(OOOI1_4_Z[23]) ); defparam \OOOI1_4[23] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_3[23] ( .A(O1Ol1), .B(O0i11), .C(oIoI1[23]), .D(oIOI1[47]), .Y(OOOI1_3_Z[23]) ); defparam \OOOI1_3[23] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_2[23] ( .A(oloI1[23]), .B(oIoI1[39]), .C(i0Ol1), .D(IoOl1), .Y(OOOI1_2_Z[23]) ); defparam \OOOI1_2[23] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_10[20] ( .A(l0l11[0]), .B(Oi1I1), .C(o0Ol1), .D(o0o11), .Y(OOOI1_10_Z[20]) ); defparam \OOOI1_10[20] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_8[20] ( .A(O11I1[4]), .B(Io1I1[4]), .C(ilOl1), .D(O0Ol1), .Y(OOOI1_8_Z[20]) ); defparam \OOOI1_8[20] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_7[20] ( .A(il1I1[36]), .B(i11I1[4]), .C(l1Ol1), .D(I0Ol1), .Y(OOOI1_7_Z[20]) ); defparam \OOOI1_7[20] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_6[20] ( .A(olOl1), .B(O0i11), .C(OI1I1), .D(oIOI1[44]), .Y(OOOI1_6_Z[20]) ); defparam \OOOI1_6[20] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_5[20] ( .A(oIoI1[36]), .B(oIoI1[20]), .C(i0Ol1), .D(O1Ol1), .Y(OOOI1_5_Z[20]) ); defparam \OOOI1_5[20] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_3[20] ( .A(N_16), .B(OoOl1), .C(oloI1_1[36]), .D(Iolo1[20]), .Y(OOOI1_3_Z[20]) ); defparam \OOOI1_3[20] .INIT=16'hD5C0; // @28:433051 CFG4 \OOOI1_2[20] ( .A(i0lo1[20]), .B(OOOI1_0_Z[20]), .C(un137_OOOI1[20]), .D(N_133), .Y(OOOI1_2_Z[20]) ); defparam \OOOI1_2[20] .INIT=16'hFCFE; // @28:433051 CFG4 \OOOI1_10[19] ( .A(OO011), .B(l11I1), .C(Ilo11), .D(o0Ol1), .Y(OOOI1_10_Z[19]) ); defparam \OOOI1_10[19] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_9[19] ( .A(I0o11), .B(oli11), .C(oIOI1[11]), .D(oIl11[3]), .Y(OOOI1_9_Z[19]) ); defparam \OOOI1_9[19] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_8[19] ( .A(O11I1[3]), .B(Io1I1[3]), .C(ilOl1), .D(O0Ol1), .Y(OOOI1_8_Z[19]) ); defparam \OOOI1_8[19] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_7[19] ( .A(il1I1[35]), .B(i11I1[3]), .C(l1Ol1), .D(I0Ol1), .Y(OOOI1_7_Z[19]) ); defparam \OOOI1_7[19] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_6[19] ( .A(olOl1), .B(un1_OOOI1[19]), .C(oool1), .D(lIol1[0]), .Y(OOOI1_6_Z[19]) ); defparam \OOOI1_6[19] .INIT=16'hECEE; // @28:433051 CFG4 \OOOI1_5[19] ( .A(oIoI1[35]), .B(oIoI1[19]), .C(i0Ol1), .D(O1Ol1), .Y(OOOI1_5_Z[19]) ); defparam \OOOI1_5[19] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_3[19] ( .A(N_16), .B(OoOl1), .C(Iolo1[19]), .D(oloI1[35]), .Y(OOOI1_3_Z[19]) ); defparam \OOOI1_3[19] .INIT=16'hDC50; // @28:433051 CFG4 \OOOI1_2[19] ( .A(i0lo1[19]), .B(OOOI1_0_Z[19]), .C(un137_OOOI1[19]), .D(N_133), .Y(OOOI1_2_Z[19]) ); defparam \OOOI1_2[19] .INIT=16'hFCFE; // @28:433051 CFG4 \OOOI1_5[31] ( .A(lO011), .B(IO011), .C(Iio11), .D(Ioo11), .Y(OOOI1_5_Z[31]) ); defparam \OOOI1_5[31] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_3[31] ( .A(O1Ol1), .B(O0i11), .C(oIoI1[31]), .D(oIOI1[39]), .Y(OOOI1_3_Z[31]) ); defparam \OOOI1_3[31] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_2[31] ( .A(oloI1[31]), .B(lIoI1), .C(i0Ol1), .D(IoOl1), .Y(OOOI1_2_Z[31]) ); defparam \OOOI1_2[31] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_5[30] ( .A(lIl11[6]), .B(l1l11), .C(Ilo11), .D(I0o11), .Y(OOOI1_5_Z[30]) ); defparam \OOOI1_5[30] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_4[30] ( .A(l1Ol1), .B(oli11), .C(ol1I1), .D(oIOI1[6]), .Y(OOOI1_4_Z[30]) ); defparam \OOOI1_4[30] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_3[30] ( .A(O1Ol1), .B(O0i11), .C(oIoI1[30]), .D(oIOI1[38]), .Y(OOOI1_3_Z[30]) ); defparam \OOOI1_3[30] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_2[30] ( .A(oloI1[30]), .B(Il1I1), .C(i0Ol1), .D(IoOl1), .Y(OOOI1_2_Z[30]) ); defparam \OOOI1_2[30] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_5[26] ( .A(liII1), .B(lIl11[2]), .C(Ioo11), .D(I0o11), .Y(OOOI1_5_Z[26]) ); defparam \OOOI1_5[26] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_3[26] ( .A(O11I1[10]), .B(i11I1[10]), .C(O0Ol1), .D(I0Ol1), .Y(OOOI1_3_Z[26]) ); defparam \OOOI1_3[26] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_2[26] ( .A(O1Ol1), .B(O0i11), .C(oIoI1[26]), .D(oIOI1[34]), .Y(OOOI1_2_Z[26]) ); defparam \OOOI1_2[26] .INIT=16'hECA0; // @28:433051 CFG3 \OOOI1_1[26] ( .A(IoOl1), .B(oloI1[26]), .C(OOOI1_0_Z[26]), .Y(OOOI1_1_Z[26]) ); defparam \OOOI1_1[26] .INIT=8'hF8; // @28:433051 CFG4 \OOOI1_5[27] ( .A(IiII1), .B(lIl11[3]), .C(Ioo11), .D(I0o11), .Y(OOOI1_5_Z[27]) ); defparam \OOOI1_5[27] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_4[27] ( .A(ilOl1), .B(oli11), .C(Io1I1[11]), .D(oIOI1[3]), .Y(OOOI1_4_Z[27]) ); defparam \OOOI1_4[27] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_3[27] ( .A(O11I1[11]), .B(i11I1[11]), .C(O0Ol1), .D(I0Ol1), .Y(OOOI1_3_Z[27]) ); defparam \OOOI1_3[27] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_2[27] ( .A(O1Ol1), .B(O0i11), .C(oIoI1[27]), .D(oIOI1[35]), .Y(OOOI1_2_Z[27]) ); defparam \OOOI1_2[27] .INIT=16'hECA0; // @28:433051 CFG3 \OOOI1_1[27] ( .A(IoOl1), .B(oloI1[27]), .C(OOOI1_0_Z[27]), .Y(OOOI1_1_Z[27]) ); defparam \OOOI1_1[27] .INIT=8'hF8; // @28:433051 CFG4 \OOOI1_5[25] ( .A(oiII1), .B(lIl11[1]), .C(Ioo11), .D(I0o11), .Y(OOOI1_5_Z[25]) ); defparam \OOOI1_5[25] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_4[25] ( .A(ilOl1), .B(oli11), .C(Io1I1[9]), .D(oIOI1[1]), .Y(OOOI1_4_Z[25]) ); defparam \OOOI1_4[25] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_3[25] ( .A(O11I1[9]), .B(i11I1[9]), .C(O0Ol1), .D(I0Ol1), .Y(OOOI1_3_Z[25]) ); defparam \OOOI1_3[25] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_2[25] ( .A(O1Ol1), .B(O0i11), .C(oIoI1[25]), .D(oIOI1[33]), .Y(OOOI1_2_Z[25]) ); defparam \OOOI1_2[25] .INIT=16'hECA0; // @28:433051 CFG3 \OOOI1_1[25] ( .A(IoOl1), .B(oloI1[25]), .C(OOOI1_0_Z[25]), .Y(OOOI1_1_Z[25]) ); defparam \OOOI1_1[25] .INIT=8'hF8; // @28:433051 CFG4 \OOOI1_9[21] ( .A(oIl11[5]), .B(Ol1I1), .C(o0Ol1), .D(I0o11), .Y(OOOI1_9_Z[21]) ); defparam \OOOI1_9[21] .INIT=16'hEAC0; // @28:433051 CFG4 \OOOI1_7[21] ( .A(O11I1[5]), .B(i11I1[5]), .C(O0Ol1), .D(I0Ol1), .Y(OOOI1_7_Z[21]) ); defparam \OOOI1_7[21] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_6[21] ( .A(l1Ol1), .B(O0i11), .C(il1I1[37]), .D(oIOI1[45]), .Y(OOOI1_6_Z[21]) ); defparam \OOOI1_6[21] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_5[21] ( .A(oIoI1[37]), .B(oIoI1[21]), .C(i0Ol1), .D(O1Ol1), .Y(OOOI1_5_Z[21]) ); defparam \OOOI1_5[21] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_3[21] ( .A(N_16), .B(OoOl1), .C(oloI1_1[37]), .D(Iolo1[21]), .Y(OOOI1_3_Z[21]) ); defparam \OOOI1_3[21] .INIT=16'hD5C0; // @28:433051 CFG4 \OOOI1_17[10] ( .A(un45_OOOI1[10]), .B(oo1I1[10]), .C(OOOI1_12_Z[10]), .D(o0Ol1), .Y(OOOI1_17_Z[10]) ); defparam \OOOI1_17[10] .INIT=16'hFEFA; // @28:433051 CFG4 \OOOI1_13[11] ( .A(oloI1[11]), .B(IoOl1), .C(un59_OOOI1[11]), .D(OOOI1_5_Z[11]), .Y(OOOI1_13_Z[11]) ); defparam \OOOI1_13[11] .INIT=16'hFFF8; // @28:433051 CFG3 \OOOI1_4[9] ( .A(I01I1[9]), .B(OoOl1), .C(OOOI1_3_Z[9]), .Y(OOOI1_4_Z[9]) ); defparam \OOOI1_4[9] .INIT=8'hF8; // @28:433051 CFG3 \OOOI1_16[1] ( .A(iIl11[1]), .B(o0o11), .C(OOOI1_4_Z[1]), .Y(OOOI1_16_Z[1]) ); defparam \OOOI1_16[1] .INIT=8'hF8; // @28:433051 CFG3 \OOOI1_16[0] ( .A(iIl11[0]), .B(o0o11), .C(OOOI1_4_Z[0]), .Y(OOOI1_16_Z[0]) ); defparam \OOOI1_16[0] .INIT=8'hF8; // @28:433051 CFG4 \OOOI1_25[2] ( .A(un52_OilI1), .B(un80_OilI1_0_a2), .C(o0Io1[35]), .D(Oolo1[2]), .Y(OOOI1_25_Z[2]) ); defparam \OOOI1_25[2] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_4[2] ( .A(ooOl1), .B(un1_OilI1[2]), .C(iloI1[2]), .D(OOOI1_2_Z[2]), .Y(OOOI1_4_Z[2]) ); defparam \OOOI1_4[2] .INIT=16'hFFEC; // @28:433051 CFG4 \OOOI1_24[4] ( .A(un18_OilI1_0_a2), .B(un80_OilI1_0_a2), .C(o0Io1[19]), .D(Oolo1[4]), .Y(OOOI1_24_Z[4]) ); defparam \OOOI1_24[4] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_19[4] ( .A(I11I1[4]), .B(un12_OOOI1[4]), .C(O0Ol1), .D(OOOI1_10_Z[4]), .Y(OOOI1_19_Z[4]) ); defparam \OOOI1_19[4] .INIT=16'hFFEC; // @28:433051 CFG4 \OOOI1_3[4] ( .A(ooOl1), .B(un1_OilI1[4]), .C(iloI1[4]), .D(OOOI1_1_Z[4]), .Y(OOOI1_3_Z[4]) ); defparam \OOOI1_3[4] .INIT=16'hFFEC; // @28:433051 CFG4 \OOOI1_24[3] ( .A(un18_OilI1_0_a2), .B(un80_OilI1_0_a2), .C(o0Io1[20]), .D(Oolo1[3]), .Y(OOOI1_24_Z[3]) ); defparam \OOOI1_24[3] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_4[3] ( .A(ooOl1), .B(un1_OilI1[3]), .C(iloI1[3]), .D(OOOI1_2_Z[3]), .Y(OOOI1_4_Z[3]) ); defparam \OOOI1_4[3] .INIT=16'hFFEC; // @28:433051 CFG4 \OOOI1_3[7] ( .A(ooOl1), .B(un1_OilI1[7]), .C(iloI1[7]), .D(OOOI1_1_Z[7]), .Y(OOOI1_3_Z[7]) ); defparam \OOOI1_3[7] .INIT=16'hFFEC; // @28:433051 CFG4 \OOOI1_21[6] ( .A(un18_OilI1_0_a2), .B(un80_OilI1_0_a2), .C(o0Io1[17]), .D(Oolo1[6]), .Y(OOOI1_21_Z[6]) ); defparam \OOOI1_21[6] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_20[12] ( .A(un18_OilI1_0_a2), .B(un80_OilI1_0_a2), .C(o0Io1[11]), .D(Oolo1[12]), .Y(OOOI1_20_Z[12]) ); defparam \OOOI1_20[12] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_3[12] ( .A(iloI1[12]), .B(OOOI1_1_Z[12]), .C(ooOl1), .D(un1_OilI1[12]), .Y(OOOI1_3_Z[12]) ); defparam \OOOI1_3[12] .INIT=16'hFFEC; // @28:433051 CFG3 \OOOI1_11[18] ( .A(ill11), .B(o0o11), .C(OOOI1_3_Z[18]), .Y(OOOI1_11_Z[18]) ); defparam \OOOI1_11[18] .INIT=8'hF8; // @28:433051 CFG4 \OOOI1_16[16] ( .A(un52_OilI1), .B(un80_OilI1_0_a2), .C(o0Io1[41]), .D(Oolo1[16]), .Y(OOOI1_16_Z[16]) ); defparam \OOOI1_16[16] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_14[16] ( .A(OOOI1_9_Z[16]), .B(un8_OOOI1[16]), .C(Io1I1[0]), .D(ilOl1), .Y(OOOI1_14_Z[16]) ); defparam \OOOI1_14[16] .INIT=16'hFEEE; // @28:433051 CFG4 \OOOI1_12[16] ( .A(O0i11), .B(oIOI1[40]), .C(OOOI1_4_Z[16]), .D(un1_OOOI1[16]), .Y(OOOI1_12_Z[16]) ); defparam \OOOI1_12[16] .INIT=16'hFFF8; // @28:433051 CFG3 \OOOI1_11[16] ( .A(lll11), .B(o0o11), .C(OOOI1_3_Z[16]), .Y(OOOI1_11_Z[16]) ); defparam \OOOI1_11[16] .INIT=8'hF8; // @28:433051 CFG3 \OOOI1_11[17] ( .A(Ill11), .B(o0o11), .C(OOOI1_3_Z[17]), .Y(OOOI1_11_Z[17]) ); defparam \OOOI1_11[17] .INIT=8'hF8; // @28:433051 CFG4 \OOOI1_6[17] ( .A(il1I1[33]), .B(un86_OilI1[17]), .C(l1Ol1), .D(OOOI1_1_Z[17]), .Y(OOOI1_6_Z[17]) ); defparam \OOOI1_6[17] .INIT=16'hFFEC; // @28:433051 CFG4 \OOOI1_16[13] ( .A(un18_OilI1_0_a2), .B(un80_OilI1_0_a2), .C(o0Io1[10]), .D(Oolo1[13]), .Y(OOOI1_16_Z[13]) ); defparam \OOOI1_16[13] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_14[13] ( .A(OOl11[13]), .B(un45_OOOI1[13]), .C(i1o11), .D(OOOI1_10_Z[13]), .Y(OOOI1_14_Z[13]) ); defparam \OOOI1_14[13] .INIT=16'hFFEC; // @28:433051 CFG3 \OOOI1_11[13] ( .A(Oll11[1]), .B(o0o11), .C(OOOI1_4_Z[13]), .Y(OOOI1_11_Z[13]) ); defparam \OOOI1_11[13] .INIT=8'hF8; // @28:433051 CFG4 \OOOI1_15[15] ( .A(un18_OilI1_0_a2), .B(un80_OilI1_0_a2), .C(o0Io1[8]), .D(Oolo1[15]), .Y(OOOI1_15_Z[15]) ); defparam \OOOI1_15[15] .INIT=16'hECA0; // @28:433051 CFG3 \OOOI1_14[15] ( .A(un52_OilI1), .B(o0Io1[42]), .C(OOOI1_10_Z[15]), .Y(OOOI1_14_Z[15]) ); defparam \OOOI1_14[15] .INIT=8'hF8; // @28:433051 CFG4 \OOOI1_3[15] ( .A(OOOI1_1_Z[15]), .B(N_133), .C(i0lo1[15]), .D(un86_OilI1[15]), .Y(OOOI1_3_Z[15]) ); defparam \OOOI1_3[15] .INIT=16'hFFBA; // @28:433051 CFG4 \OOOI1_15[14] ( .A(un18_OilI1_0_a2), .B(un80_OilI1_0_a2), .C(o0Io1[9]), .D(Oolo1[14]), .Y(OOOI1_15_Z[14]) ); defparam \OOOI1_15[14] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_8[22] ( .A(OoOl1), .B(OOOI1_2_Z[22]), .C(oloI1_1[38]), .D(OOOI1_0_Z[22]), .Y(OOOI1_8_Z[22]) ); defparam \OOOI1_8[22] .INIT=16'hFFEC; // @28:433051 CFG4 \OOOI1_7[23] ( .A(OoOl1), .B(OOOI1_2_Z[23]), .C(oloI1_1[39]), .D(OOOI1_0_Z[23]), .Y(OOOI1_7_Z[23]) ); defparam \OOOI1_7[23] .INIT=16'hFFEC; // @28:433051 CFG4 \OOOI1_14[20] ( .A(un112_OOOI1[20]), .B(oIOI1[12]), .C(OOOI1_10_Z[20]), .D(oli11), .Y(OOOI1_14_Z[20]) ); defparam \OOOI1_14[20] .INIT=16'hFEFA; // @28:433051 CFG3 \OOOI1_11[19] ( .A(o0l11), .B(o0o11), .C(OOOI1_3_Z[19]), .Y(OOOI1_11_Z[19]) ); defparam \OOOI1_11[19] .INIT=8'hF8; // @28:433051 CFG4 \OOOI1_8[31] ( .A(OOOI1_5_Z[31]), .B(un8_OOOI1[31]), .C(OloI1), .D(l1Ol1), .Y(OOOI1_8_Z[31]) ); defparam \OOOI1_8[31] .INIT=16'hFEEE; // @28:433051 CFG4 \OOOI1_6[31] ( .A(Ilo11), .B(un114_OOOI1[31]), .C(III11), .D(OOOI1_0_Z[31]), .Y(OOOI1_6_Z[31]) ); defparam \OOOI1_6[31] .INIT=16'hFFEC; // @28:433051 CFG4 \OOOI1_9[30] ( .A(un18_OilI1_0_a2), .B(un80_OilI1_0_a2), .C(o0Io1[1]), .D(Oolo1[24]), .Y(OOOI1_9_Z[30]) ); defparam \OOOI1_9[30] .INIT=16'hECA0; // @28:433051 CFG4 \OOOI1_6[30] ( .A(OoOl1), .B(OOOI1_2_Z[30]), .C(O01I1), .D(OOOI1_0_Z[30]), .Y(OOOI1_6_Z[30]) ); defparam \OOOI1_6[30] .INIT=16'hFFEC; // @28:433051 CFG3 \OOOI1_8[26] ( .A(OOOI1_5_Z[26]), .B(un80_OilI1_0_a2), .C(Oolo1[20]), .Y(OOOI1_8_Z[26]) ); defparam \OOOI1_8[26] .INIT=8'hEA; // @28:433051 CFG4 \OOOI1_7[26] ( .A(OOOI1_3_Z[26]), .B(un8_OOOI1[26]), .C(Io1I1[10]), .D(ilOl1), .Y(OOOI1_7_Z[26]) ); defparam \OOOI1_7[26] .INIT=16'hFEEE; // @28:433051 CFG4 \OOOI1_13[21] ( .A(OOOI1_9_Z[21]), .B(un8_OOOI1[21]), .C(Io1I1[5]), .D(ilOl1), .Y(OOOI1_13_Z[21]) ); defparam \OOOI1_13[21] .INIT=16'hFEEE; // @28:433051 CFG3 \OOOI1_10[21] ( .A(l0l11[1]), .B(o0o11), .C(OOOI1_3_Z[21]), .Y(OOOI1_10_Z[21]) ); defparam \OOOI1_10[21] .INIT=8'hF8; // @28:433051 CFG4 \OOOI1_19[10] ( .A(OOOI1_8_Z[10]), .B(OOOI1_9_Z[10]), .C(OOOI1_7_Z[10]), .D(OOOI1_10_Z[10]), .Y(OOOI1_19_Z[10]) ); defparam \OOOI1_19[10] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_13[10] ( .A(un114_OOOI1[10]), .B(i1o11), .C(OOl11[10]), .D(OOOI1_3_Z[10]), .Y(OOOI1_13_Z[10]) ); defparam \OOOI1_13[10] .INIT=16'hFFEA; // @28:433051 CFG4 \OOOI1_18[11] ( .A(OOOI1_7_Z[11]), .B(OOOI1_8_Z[11]), .C(OOOI1_6_Z[11]), .D(OOOI1_9_Z[11]), .Y(OOOI1_18_Z[11]) ); defparam \OOOI1_18[11] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_12[11] ( .A(oiI11[11]), .B(l1o11), .C(un114_OOOI1[11]), .D(OOOI1_2_Z[11]), .Y(OOOI1_12_Z[11]) ); defparam \OOOI1_12[11] .INIT=16'hFFF8; // @28:433051 CFG4 \OOOI1_21[9] ( .A(OOOI1_9_Z[9]), .B(OOOI1_12_Z[9]), .C(OOOI1_10_Z[9]), .D(OOOI1_11_Z[9]), .Y(OOOI1_21_Z[9]) ); defparam \OOOI1_21[9] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_20[9] ( .A(OOOI1_5_Z[9]), .B(OOOI1_7_Z[9]), .C(OOOI1_6_Z[9]), .D(OOOI1_8_Z[9]), .Y(OOOI1_20_Z[9]) ); defparam \OOOI1_20[9] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_24[1] ( .A(OOOI1_11_Z[1]), .B(OOOI1_12_Z[1]), .C(OOOI1_9_Z[1]), .D(OOOI1_10_Z[1]), .Y(OOOI1_24_Z[1]) ); defparam \OOOI1_24[1] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_17[1] ( .A(IoOl1), .B(oloI1[1]), .C(OOOI1_6_Z[1]), .D(OOOI1_3_Z[1]), .Y(OOOI1_17_Z[1]) ); defparam \OOOI1_17[1] .INIT=16'hFFF8; // @28:433051 CFG4 \OOOI1_24[0] ( .A(OOOI1_11_Z[0]), .B(OOOI1_9_Z[0]), .C(OOOI1_12_Z[0]), .D(OOOI1_10_Z[0]), .Y(OOOI1_24_Z[0]) ); defparam \OOOI1_24[0] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_17[0] ( .A(IoOl1), .B(oloI1[0]), .C(OOOI1_6_Z[0]), .D(OOOI1_3_Z[0]), .Y(OOOI1_17_Z[0]) ); defparam \OOOI1_17[0] .INIT=16'hFFF8; // @28:433051 CFG4 \OOOI1_28[2] ( .A(OOOI1_14_Z[2]), .B(OOOI1_13_Z[2]), .C(OOOI1_15_Z[2]), .D(OOOI1_16_Z[2]), .Y(OOOI1_28_Z[2]) ); defparam \OOOI1_28[2] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_27[2] ( .A(OOOI1_10_Z[2]), .B(OOOI1_11_Z[2]), .C(OOOI1_9_Z[2]), .D(OOOI1_12_Z[2]), .Y(OOOI1_27_Z[2]) ); defparam \OOOI1_27[2] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_26[4] ( .A(OOOI1_11_Z[4]), .B(OOOI1_13_Z[4]), .C(OOOI1_12_Z[4]), .D(OOOI1_14_Z[4]), .Y(OOOI1_26_Z[4]) ); defparam \OOOI1_26[4] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_22[4] ( .A(o0o11), .B(iIl11[4]), .C(OOOI1_15_Z[4]), .D(OOOI1_4_Z[4]), .Y(OOOI1_22_Z[4]) ); defparam \OOOI1_22[4] .INIT=16'hFFF8; // @28:433051 CFG4 \OOOI1_24[8] ( .A(OOOI1_11_Z[8]), .B(OOOI1_12_Z[8]), .C(OOOI1_10_Z[8]), .D(OOOI1_9_Z[8]), .Y(OOOI1_24_Z[8]) ); defparam \OOOI1_24[8] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_23[8] ( .A(OOOI1_8_Z[8]), .B(un18_OilI1_0_a2), .C(o0Io1[15]), .D(OOOI1_7_Z[8]), .Y(OOOI1_23_Z[8]) ); defparam \OOOI1_23[8] .INIT=16'hFFEA; // @28:433051 CFG4 \OOOI1_21[8] ( .A(o0Io1[29]), .B(OOOI1_4_Z[8]), .C(un103_OOOI1[8]), .D(un52_OilI1), .Y(OOOI1_21_Z[8]) ); defparam \OOOI1_21[8] .INIT=16'hFEFC; // @28:433051 CFG4 \OOOI1_6[8] ( .A(ooOl1), .B(iloI1[8]), .C(un73_OOOI1[8]), .D(OOOI1_2_Z[8]), .Y(OOOI1_6_Z[8]) ); defparam \OOOI1_6[8] .INIT=16'hFFF8; // @28:433051 CFG4 \OOOI1_24[5] ( .A(OOOI1_12_Z[5]), .B(OOOI1_10_Z[5]), .C(OOOI1_9_Z[5]), .D(OOOI1_11_Z[5]), .Y(OOOI1_24_Z[5]) ); defparam \OOOI1_24[5] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_23[5] ( .A(OOOI1_8_Z[5]), .B(un18_OilI1_0_a2), .C(o0Io1[18]), .D(OOOI1_7_Z[5]), .Y(OOOI1_23_Z[5]) ); defparam \OOOI1_23[5] .INIT=16'hFFEA; // @28:433051 CFG4 \OOOI1_21[5] ( .A(o0Io1[32]), .B(OOOI1_4_Z[5]), .C(un103_OOOI1[5]), .D(un52_OilI1), .Y(OOOI1_21_Z[5]) ); defparam \OOOI1_21[5] .INIT=16'hFEFC; // @28:433051 CFG4 \OOOI1_6[5] ( .A(ooOl1), .B(iloI1[5]), .C(un73_OOOI1[5]), .D(OOOI1_2_Z[5]), .Y(OOOI1_6_Z[5]) ); defparam \OOOI1_6[5] .INIT=16'hFFF8; // @28:433051 CFG4 \OOOI1_26[3] ( .A(OOOI1_11_Z[3]), .B(OOOI1_14_Z[3]), .C(OOOI1_12_Z[3]), .D(OOOI1_13_Z[3]), .Y(OOOI1_26_Z[3]) ); defparam \OOOI1_26[3] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_23[3] ( .A(OOOI1_6_Z[3]), .B(un52_OilI1), .C(o0Io1[34]), .D(OOOI1_5_Z[3]), .Y(OOOI1_23_Z[3]) ); defparam \OOOI1_23[3] .INIT=16'hFFEA; // @28:433051 CFG4 \OOOI1_21[7] ( .A(OOOI1_9_Z[7]), .B(OOOI1_12_Z[7]), .C(OOOI1_10_Z[7]), .D(OOOI1_11_Z[7]), .Y(OOOI1_21_Z[7]) ); defparam \OOOI1_21[7] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_20[7] ( .A(OOOI1_8_Z[7]), .B(un18_OilI1_0_a2), .C(o0Io1[16]), .D(OOOI1_7_Z[7]), .Y(OOOI1_20_Z[7]) ); defparam \OOOI1_20[7] .INIT=16'hFFEA; // @28:433051 CFG4 \OOOI1_18[7] ( .A(o0Io1[30]), .B(OOOI1_4_Z[7]), .C(un103_OOOI1[7]), .D(un52_OilI1), .Y(OOOI1_18_Z[7]) ); defparam \OOOI1_18[7] .INIT=16'hFEFC; // @28:433051 CFG4 \OOOI1_22[6] ( .A(OOOI1_8_Z[6]), .B(OOOI1_9_Z[6]), .C(OOOI1_10_Z[6]), .D(OOOI1_7_Z[6]), .Y(OOOI1_22_Z[6]) ); defparam \OOOI1_22[6] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_19[6] ( .A(iIl11[6]), .B(o0o11), .C(OOOI1_4_Z[6]), .D(OOOI1_13_Z[6]), .Y(OOOI1_19_Z[6]) ); defparam \OOOI1_19[6] .INIT=16'hFFF8; // @28:433051 CFG4 \OOOI1_6[6] ( .A(ooOl1), .B(iloI1[6]), .C(un73_OOOI1[6]), .D(OOOI1_2_Z[6]), .Y(OOOI1_6_Z[6]) ); defparam \OOOI1_6[6] .INIT=16'hFFF8; // @28:433051 CFG4 \OOOI1_22[12] ( .A(OOOI1_12_Z[12]), .B(OOOI1_11_Z[12]), .C(OOOI1_13_Z[12]), .D(OOOI1_10_Z[12]), .Y(OOOI1_22_Z[12]) ); defparam \OOOI1_22[12] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_21[12] ( .A(OOOI1_6_Z[12]), .B(OOOI1_7_Z[12]), .C(OOOI1_9_Z[12]), .D(OOOI1_8_Z[12]), .Y(OOOI1_21_Z[12]) ); defparam \OOOI1_21[12] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_17[18] ( .A(OOOI1_6_Z[18]), .B(Oolo1[18]), .C(un80_OilI1_0_a2), .D(OOOI1_7_Z[18]), .Y(OOOI1_17_Z[18]) ); defparam \OOOI1_17[18] .INIT=16'hFFEA; // @28:433051 CFG4 \OOOI1_12[18] ( .A(IoOl1), .B(oloI1[18]), .C(OOOI1_5_Z[18]), .D(OOOI1_2_Z[18]), .Y(OOOI1_12_Z[18]) ); defparam \OOOI1_12[18] .INIT=16'hFFF8; // @28:433051 CFG4 \OOOI1_5[13] ( .A(ooOl1), .B(iloI1[13]), .C(un73_OOOI1[13]), .D(OOOI1_2_Z[13]), .Y(OOOI1_5_Z[13]) ); defparam \OOOI1_5[13] .INIT=16'hFFF8; // @28:433051 CFG4 \OOOI1_17[14] ( .A(un50_OilI1[14]), .B(OOOI1_10_Z[14]), .C(OOOI1_9_Z[14]), .D(OOOI1_8_Z[14]), .Y(OOOI1_17_Z[14]) ); defparam \OOOI1_17[14] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_5[14] ( .A(un12_OOOI1[14]), .B(Iolo1[14]), .C(OOOI1_2_Z[14]), .D(N_16), .Y(OOOI1_5_Z[14]) ); defparam \OOOI1_5[14] .INIT=16'hFAFE; // @28:433051 CFG4 \OOOI1_12[22] ( .A(N_1147), .B(cnt07[22]), .C(OOOI1_4_Z[22]), .D(OOOI1_3_Z[22]), .Y(OOOI1_12_Z[22]) ); defparam \OOOI1_12[22] .INIT=16'hFFF8; // @28:433051 CFG4 \OOOI1_11[23] ( .A(OOOI1_3_Z[23]), .B(OOOI1_4_Z[23]), .C(OOOI1_5_Z[23]), .D(OOOI1_6_Z[23]), .Y(OOOI1_11_Z[23]) ); defparam \OOOI1_11[23] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_16[20] ( .A(OOOI1_5_Z[20]), .B(OOOI1_6_Z[20]), .C(OOOI1_8_Z[20]), .D(OOOI1_7_Z[20]), .Y(OOOI1_16_Z[20]) ); defparam \OOOI1_16[20] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_11[20] ( .A(oloI1[20]), .B(IoOl1), .C(OOOI1_3_Z[20]), .D(OOOI1_2_Z[20]), .Y(OOOI1_11_Z[20]) ); defparam \OOOI1_11[20] .INIT=16'hFFF8; // @28:433051 CFG4 \OOOI1_17[19] ( .A(OOOI1_9_Z[19]), .B(OOOI1_6_Z[19]), .C(OOOI1_7_Z[19]), .D(OOOI1_8_Z[19]), .Y(OOOI1_17_Z[19]) ); defparam \OOOI1_17[19] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_12[19] ( .A(IoOl1), .B(oloI1[19]), .C(OOOI1_5_Z[19]), .D(OOOI1_2_Z[19]), .Y(OOOI1_12_Z[19]) ); defparam \OOOI1_12[19] .INIT=16'hFFF8; // @28:433051 CFG4 \OOOI1_10[31] ( .A(OOOI1_3_Z[31]), .B(un18_OilI1_0_a2), .C(o0Io1[0]), .D(OOOI1_2_Z[31]), .Y(OOOI1_10_Z[31]) ); defparam \OOOI1_10[31] .INIT=16'hFFEA; // @28:433051 CFG4 \OOOI1_9[26] ( .A(OOOI1_2_Z[26]), .B(un18_OilI1_0_a2), .C(o0Io1[5]), .D(OOOI1_1_Z[26]), .Y(OOOI1_9_Z[26]) ); defparam \OOOI1_9[26] .INIT=16'hFFEA; // @28:433051 CFG4 \OOOI1_10[27] ( .A(OOOI1_5_Z[27]), .B(N_675), .C(OOOI1_4_Z[27]), .D(OOOI1_3_Z[27]), .Y(OOOI1_10_Z[27]) ); defparam \OOOI1_10[27] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_9[27] ( .A(OOOI1_2_Z[27]), .B(un18_OilI1_0_a2), .C(o0Io1[4]), .D(OOOI1_1_Z[27]), .Y(OOOI1_9_Z[27]) ); defparam \OOOI1_9[27] .INIT=16'hFFEA; // @28:433051 CFG4 \OOOI1_10[25] ( .A(OOOI1_5_Z[25]), .B(N_679), .C(OOOI1_4_Z[25]), .D(OOOI1_3_Z[25]), .Y(OOOI1_10_Z[25]) ); defparam \OOOI1_10[25] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_9[25] ( .A(OOOI1_2_Z[25]), .B(un18_OilI1_0_a2), .C(o0Io1[6]), .D(OOOI1_1_Z[25]), .Y(OOOI1_9_Z[25]) ); defparam \OOOI1_9[25] .INIT=16'hFFEA; // @28:433051 CFG4 \OOOI1_19[9] ( .A(iIl11[9]), .B(o0o11), .C(OOOI1_4_Z[9]), .D(OOOI1_13_Z[9]), .Y(OOOI1_19_Z[9]) ); defparam \OOOI1_19[9] .INIT=16'hFFF8; // @28:433051 CFG4 \OOOI1_25[1] ( .A(OOOI1_14_Z[1]), .B(OOOI1_13_Z[1]), .C(OOOI1_15_Z[1]), .D(OOOI1_16_Z[1]), .Y(OOOI1_25_Z[1]) ); defparam \OOOI1_25[1] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_25[0] ( .A(OOOI1_15_Z[0]), .B(OOOI1_13_Z[0]), .C(OOOI1_14_Z[0]), .D(OOOI1_16_Z[0]), .Y(OOOI1_25_Z[0]) ); defparam \OOOI1_25[0] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_29[2] ( .A(OOOI1_5_Z[2]), .B(OOOI1_6_Z[2]), .C(OOOI1_17_Z[2]), .D(OOOI1_25_Z[2]), .Y(OOOI1_29_Z[2]) ); defparam \OOOI1_29[2] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_19[2] ( .A(oIoI1[2]), .B(O1Ol1), .C(OOOI1_8_Z[2]), .D(OOOI1_4_Z[2]), .Y(OOOI1_19_Z[2]) ); defparam \OOOI1_19[2] .INIT=16'hFFF8; // @28:433051 CFG4 \OOOI1_28[4] ( .A(OOOI1_7_Z[4]), .B(OOOI1_8_Z[4]), .C(OOOI1_19_Z[4]), .D(OOOI1_24_Z[4]), .Y(OOOI1_28_Z[4]) ); defparam \OOOI1_28[4] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_17[4] ( .A(oIoI1[4]), .B(O1Ol1), .C(OOOI1_5_Z[4]), .D(OOOI1_3_Z[4]), .Y(OOOI1_17_Z[4]) ); defparam \OOOI1_17[4] .INIT=16'hFFF8; // @28:433051 CFG3 \OOOI1_27[3] ( .A(OOOI1_15_Z[3]), .B(OOOI1_23_Z[3]), .C(OOOI1_16_Z[3]), .Y(OOOI1_27_Z[3]) ); defparam \OOOI1_27[3] .INIT=8'hFE; // @28:433051 CFG4 \OOOI1_18[3] ( .A(oIoI1[3]), .B(O1Ol1), .C(OOOI1_8_Z[3]), .D(OOOI1_4_Z[3]), .Y(OOOI1_18_Z[3]) ); defparam \OOOI1_18[3] .INIT=16'hFFF8; // @28:433051 CFG4 \OOOI1_14[7] ( .A(oIoI1[7]), .B(O1Ol1), .C(OOOI1_5_Z[7]), .D(OOOI1_3_Z[7]), .Y(OOOI1_14_Z[7]) ); defparam \OOOI1_14[7] .INIT=16'hFFF8; // @28:433051 CFG4 \OOOI1_14[12] ( .A(oloI1[12]), .B(IoOl1), .C(OOOI1_4_Z[12]), .D(OOOI1_3_Z[12]), .Y(OOOI1_14_Z[12]) ); defparam \OOOI1_14[12] .INIT=16'hFFF8; // @28:433051 CFG4 \OOOI1_18[18] ( .A(OOOI1_10_Z[18]), .B(OOOI1_11_Z[18]), .C(OOOI1_8_Z[18]), .D(OOOI1_9_Z[18]), .Y(OOOI1_18_Z[18]) ); defparam \OOOI1_18[18] .INIT=16'hFFFE; // @28:433051 CFG3 \OOOI1_19[16] ( .A(OOOI1_10_Z[16]), .B(OOOI1_11_Z[16]), .C(OOOI1_16_Z[16]), .Y(OOOI1_19_Z[16]) ); defparam \OOOI1_19[16] .INIT=8'hFE; // @28:433051 CFG4 \OOOI1_18[17] ( .A(OOOI1_8_Z[17]), .B(OOOI1_11_Z[17]), .C(OOOI1_9_Z[17]), .D(OOOI1_10_Z[17]), .Y(OOOI1_18_Z[17]) ); defparam \OOOI1_18[17] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_17[17] ( .A(OOOI1_4_Z[17]), .B(OOOI1_7_Z[17]), .C(OOOI1_5_Z[17]), .D(OOOI1_6_Z[17]), .Y(OOOI1_17_Z[17]) ); defparam \OOOI1_17[17] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_18[13] ( .A(un52_OilI1), .B(OOOI1_14_Z[13]), .C(o0Io1[24]), .D(OOOI1_11_Z[13]), .Y(OOOI1_18_Z[13]) ); defparam \OOOI1_18[13] .INIT=16'hFFEC; // @28:433051 CFG4 \OOOI1_11[15] ( .A(ilOl1), .B(OOOI1_4_Z[15]), .C(i01I1[15]), .D(OOOI1_3_Z[15]), .Y(OOOI1_11_Z[15]) ); defparam \OOOI1_11[15] .INIT=16'hFFEC; // @28:433051 CFG3 \OOOI1_14[22] ( .A(cnt24[22]), .B(N_1146), .C(OOOI1_12_Z[22]), .Y(OOOI1_14_Z[22]) ); defparam \OOOI1_14[22] .INIT=8'hF8; // @28:433051 CFG4 \OOOI1_13[22] ( .A(OOOI1_5_Z[22]), .B(OOOI1_7_Z[22]), .C(OOOI1_8_Z[22]), .D(OOOI1_6_Z[22]), .Y(OOOI1_13_Z[22]) ); defparam \OOOI1_13[22] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_12[23] ( .A(N_1147), .B(cnt07[23]), .C(OOOI1_11_Z[23]), .D(OOOI1_7_Z[23]), .Y(OOOI1_12_Z[23]) ); defparam \OOOI1_12[23] .INIT=16'hFFF8; // @28:433051 CFG3 \OOOI1_16[19] ( .A(o0Io1[38]), .B(un52_OilI1), .C(OOOI1_12_Z[19]), .Y(OOOI1_16_Z[19]) ); defparam \OOOI1_16[19] .INIT=8'hF8; // @28:433051 CFG4 \OOOI1_11[31] ( .A(OOOI1_6_Z[31]), .B(Oolo1[25]), .C(un80_OilI1_0_a2), .D(OOOI1_8_Z[31]), .Y(OOOI1_11_Z[31]) ); defparam \OOOI1_11[31] .INIT=16'hFFEA; // @28:433051 CFG4 \OOOI1_10[30] ( .A(OOOI1_3_Z[30]), .B(OOOI1_5_Z[30]), .C(OOOI1_4_Z[30]), .D(OOOI1_6_Z[30]), .Y(OOOI1_10_Z[30]) ); defparam \OOOI1_10[30] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_16[21] ( .A(OOOI1_10_Z[21]), .B(oO0i0_2z), .C(OOOI1_13_Z[21]), .D(un52_OilI1), .Y(OOOI1_16_Z[21]) ); defparam \OOOI1_16[21] .INIT=16'hFEFA; // @28:433051 CFG4 \OOOI1_15[21] ( .A(OOOI1_4_Z[21]), .B(OOOI1_6_Z[21]), .C(OOOI1_5_Z[21]), .D(OOOI1_7_Z[21]), .Y(OOOI1_15_Z[21]) ); defparam \OOOI1_15[21] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_20[10] ( .A(OOOI1_5_Z[10]), .B(OOOI1_6_Z[10]), .C(OOOI1_13_Z[10]), .D(OOOI1_17_Z[10]), .Y(OOOI1_20_Z[10]) ); defparam \OOOI1_20[10] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_19[11] ( .A(OOOI1_12_Z[11]), .B(OOOI1_10_Z[11]), .C(OOOI1_13_Z[11]), .D(OOOI1_11_Z[11]), .Y(OOOI1_19_Z[11]) ); defparam \OOOI1_19[11] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_26[1] ( .A(OOOI1_7_Z[1]), .B(OOOI1_8_Z[1]), .C(OOOI1_24_Z[1]), .D(OOOI1_17_Z[1]), .Y(OOOI1_26_Z[1]) ); defparam \OOOI1_26[1] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_26[0] ( .A(OOOI1_7_Z[0]), .B(OOOI1_8_Z[0]), .C(OOOI1_24_Z[0]), .D(OOOI1_17_Z[0]), .Y(OOOI1_26_Z[0]) ); defparam \OOOI1_26[0] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_27[8] ( .A(OOOI1_24_Z[8]), .B(OOOI1_14_Z[8]), .C(OOOI1_13_Z[8]), .D(OOOI1_21_Z[8]), .Y(OOOI1_27_Z[8]) ); defparam \OOOI1_27[8] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_22[8] ( .A(OOOI1_5_Z[8]), .B(Oolo1[8]), .C(un80_OilI1_0_a2), .D(OOOI1_6_Z[8]), .Y(OOOI1_22_Z[8]) ); defparam \OOOI1_22[8] .INIT=16'hFFEA; // @28:433051 CFG4 \OOOI1_27[5] ( .A(OOOI1_24_Z[5]), .B(OOOI1_14_Z[5]), .C(OOOI1_13_Z[5]), .D(OOOI1_21_Z[5]), .Y(OOOI1_27_Z[5]) ); defparam \OOOI1_27[5] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_22[5] ( .A(OOOI1_5_Z[5]), .B(Oolo1[5]), .C(un80_OilI1_0_a2), .D(OOOI1_6_Z[5]), .Y(OOOI1_22_Z[5]) ); defparam \OOOI1_22[5] .INIT=16'hFFEA; // @28:433051 CFG4 \OOOI1_25[6] ( .A(OOOI1_19_Z[6]), .B(OOOI1_12_Z[6]), .C(OOOI1_11_Z[6]), .D(OOOI1_22_Z[6]), .Y(OOOI1_25_Z[6]) ); defparam \OOOI1_25[6] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_20[6] ( .A(un52_OilI1), .B(OOOI1_6_Z[6]), .C(o0Io1[31]), .D(OOOI1_5_Z[6]), .Y(OOOI1_20_Z[6]) ); defparam \OOOI1_20[6] .INIT=16'hFFEC; // @28:433051 CFG4 \OOOI1_19[18] ( .A(un52_OilI1), .B(o0Io1[39]), .C(OOOI1_17_Z[18]), .D(OOOI1_12_Z[18]), .Y(OOOI1_19_Z[18]) ); defparam \OOOI1_19[18] .INIT=16'hFFF8; // @28:433051 CFG4 \OOOI1_20[16] ( .A(un18_OilI1_0_a2), .B(o0Io1[7]), .C(OOOI1_18_Z[16]), .D(OOOI1_12_Z[16]), .Y(OOOI1_20_Z[16]) ); defparam \OOOI1_20[16] .INIT=16'hFFF8; // @28:433051 CFG4 \OOOI1_19[17] ( .A(o0Io1[40]), .B(un78_OilI1[17]), .C(un52_OilI1), .D(OOOI1_17_Z[17]), .Y(OOOI1_19_Z[17]) ); defparam \OOOI1_19[17] .INIT=16'hFFEC; // @28:433051 CFG4 \OOOI1_17[13] ( .A(OOOI1_8_Z[13]), .B(OOOI1_7_Z[13]), .C(OOOI1_5_Z[13]), .D(OOOI1_6_Z[13]), .Y(OOOI1_17_Z[13]) ); defparam \OOOI1_17[13] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_16[14] ( .A(OOOI1_5_Z[14]), .B(OOOI1_4_Z[14]), .C(OOOI1_7_Z[14]), .D(OOOI1_6_Z[14]), .Y(OOOI1_16_Z[14]) ); defparam \OOOI1_16[14] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_17[20] ( .A(OOOI1_11_Z[20]), .B(iO0i0_2z), .C(OOOI1_14_Z[20]), .D(un52_OilI1), .Y(OOOI1_17_Z[20]) ); defparam \OOOI1_17[20] .INIT=16'hFEFA; // @28:433051 CFG4 \OOOI1_30[2] ( .A(o0Io1[21]), .B(un18_OilI1_0_a2), .C(OOOI1_27_Z[2]), .D(OOOI1_19_Z[2]), .Y(OOOI1_30_Z[2]) ); defparam \OOOI1_30[2] .INIT=16'hFFF8; // @28:433051 CFG4 \OOOI1_27[4] ( .A(un52_OilI1), .B(o0Io1[33]), .C(OOOI1_22_Z[4]), .D(OOOI1_17_Z[4]), .Y(OOOI1_27_Z[4]) ); defparam \OOOI1_27[4] .INIT=16'hFFF8; // @28:433051 CFG4 \OOOI1_28[3] ( .A(OOOI1_9_Z[3]), .B(OOOI1_10_Z[3]), .C(OOOI1_18_Z[3]), .D(OOOI1_24_Z[3]), .Y(OOOI1_28_Z[3]) ); defparam \OOOI1_28[3] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1_22[7] ( .A(Oolo1[7]), .B(un80_OilI1_0_a2), .C(OOOI1_14_Z[7]), .D(OOOI1_18_Z[7]), .Y(OOOI1_22_Z[7]) ); defparam \OOOI1_22[7] .INIT=16'hFFF8; // @28:433051 CFG4 \OOOI1_23[12] ( .A(un52_OilI1), .B(o0Io1[25]), .C(OOOI1_20_Z[12]), .D(OOOI1_14_Z[12]), .Y(OOOI1_23_Z[12]) ); defparam \OOOI1_23[12] .INIT=16'hFFF8; // @28:433051 CFG4 \OOOI1_18[15] ( .A(OOOI1_6_Z[15]), .B(OOOI1_7_Z[15]), .C(OOOI1_15_Z[15]), .D(OOOI1_11_Z[15]), .Y(OOOI1_18_Z[15]) ); defparam \OOOI1_18[15] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1[19] ( .A(OOOI1_11_Z[19]), .B(OOOI1_10_Z[19]), .C(OOOI1_16_Z[19]), .D(OOOI1_17_Z[19]), .Y(OOOI1_Z[19]) ); defparam \OOOI1[19] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1[15] ( .A(OOOI1_8_Z[15]), .B(OOOI1_18_Z[15]), .C(OOOI1_9_Z[15]), .D(OOOI1_14_Z[15]), .Y(OOOI1_Z[15]) ); defparam \OOOI1[15] .INIT=16'hFFFE; // @28:433051 CFG4 \OOOI1[9] ( .A(OOOI1_19_Z[9]), .B(N_161), .C(OOOI1_21_Z[9]), .D(OOOI1_20_Z[9]), .Y(OOOI1_Z[9]) ); defparam \OOOI1[9] .INIT=16'hFFFB; // @28:431138 CTSE_MAPBE_HST_CNV_26s_0s_1s_0s_16s apb_hst_cnv ( .wrdata_0(wrdata_0), .o0OI1(o0OI1[31:0]), .CoreAPB3_0_0_APBmslave0_PWDATA(CoreAPB3_0_0_APBmslave0_PWDATA[31:1]), .i0OI1(i0OI1[31:0]), .O1OI1(O1OI1[31:0]), .l0OI1(l0OI1[5:0]), .I1OI1(I1OI1[31:0]), .CoreAPB3_0_0_APBmslave0_PADDR_5(CoreAPB3_0_0_APBmslave0_PADDR_5), .CoreAPB3_0_0_APBmslave0_PADDR_3(CoreAPB3_0_0_APBmslave0_PADDR_3), .CoreAPB3_0_0_APBmslave0_PADDR_7(CoreAPB3_0_0_APBmslave0_PADDR_7), .CoreAPB3_0_0_APBmslave0_PADDR_6(CoreAPB3_0_0_APBmslave0_PADDR_6), .CoreAPB3_0_0_APBmslave0_PADDR_0(CoreAPB3_0_0_APBmslave0_PADDR_0), .CoreAPB3_0_0_APBmslave0_PADDR_1(CoreAPB3_0_0_APBmslave0_PADDR_1), .io0O1_m(io0O1_m[15:0]), .il1I1_0(il1I1[29]), .un149_OOOI1_0(un149_OOOI1[29]), .o01I1_4(o01I1[28]), .o01I1_0(o01I1[24]), .un105_OOOI1_4(un105_OOOI1[28]), .un105_OOOI1_0(un105_OOOI1[24]), .Io1I1_0(Io1I1[8]), .O11I1_4(O11I1[12]), .O11I1_0(O11I1[8]), .i11I1_0(i11I1[8]), .oIoI1_4(oIoI1[28]), .oIoI1_5(oIoI1[29]), .oIoI1_0(oIoI1[24]), .oIOI1_1z_4(oIOI1[4]), .oIOI1_1z_36(oIOI1[36]), .oIOI1_1z_5(oIOI1[5]), .oIOI1_1z_37(oIOI1[37]), .oIOI1_1z_0(oIOI1[0]), .oIOI1_1z_32(oIOI1[32]), .oloI1_0(oloI1[29]), .lIl11_5(lIl11[5]), .lIl11_4(lIl11[4]), .lIl11_0(lIl11[0]), .un128_OOOI1_4(un128_OOOI1[28]), .un128_OOOI1_0(un128_OOOI1[24]), .Oolo1(Oolo1[23:22]), .o0Io1(o0Io1[3:2]), .OOOI1_8_0(OOOI1_8_Z[26]), .OOOI1_7_0(OOOI1_7_Z[26]), .OOOI1_12_0(OOOI1_12_Z[23]), .OOOI1_9_1(OOOI1_9_Z[26]), .OOOI1_9_0(OOOI1_9_Z[25]), .OOOI1_9_2(OOOI1_9_Z[27]), .OOOI1_9_5(OOOI1_9_Z[30]), .OOOI1_10_0(OOOI1_10_Z[25]), .OOOI1_10_2(OOOI1_10_Z[27]), .OOOI1_10_5(OOOI1_10_Z[30]), .OOOI1_10_6(OOOI1_10_Z[31]), .OOOI1_11_0(OOOI1_11_Z[31]), .OOOI1_13_0(OOOI1_13_Z[22]), .OOOI1_14_0(OOOI1_14_Z[22]), .OOOI1_21_0(OOOI1_21_Z[6]), .OOOI1_21_1(OOOI1_21_Z[7]), .OOOI1_21_6(OOOI1_21_Z[12]), .OOOI1_15_7(OOOI1_15_Z[21]), .OOOI1_15_0(OOOI1_15_Z[14]), .OOOI1_30_0(OOOI1_30_Z[2]), .OOOI1_29_0(OOOI1_29_Z[2]), .OOOI1_23_3(OOOI1_23_Z[8]), .OOOI1_23_7(OOOI1_23_Z[12]), .OOOI1_23_0(OOOI1_23_Z[5]), .OOOI1_22_2(OOOI1_22_Z[7]), .OOOI1_22_3(OOOI1_22_Z[8]), .OOOI1_22_7(OOOI1_22_Z[12]), .OOOI1_22_0(OOOI1_22_Z[5]), .OOOI1_16_8(OOOI1_16_Z[21]), .OOOI1_16_1(OOOI1_16_Z[14]), .OOOI1_16_0(OOOI1_16_Z[13]), .OOOI1_16_7(OOOI1_16_Z[20]), .OOOI1_17_1(OOOI1_17_Z[14]), .OOOI1_17_0(OOOI1_17_Z[13]), .OOOI1_17_7(OOOI1_17_Z[20]), .io0O1(io0O1[31:16]), .OOOI1_28(OOOI1_28_Z[4:2]), .OOOI1_27_0(OOOI1_27_Z[3]), .OOOI1_27_5(OOOI1_27_Z[8]), .OOOI1_27_2(OOOI1_27_Z[5]), .OOOI1_27_1(OOOI1_27_Z[4]), .OOOI1_20_0(OOOI1_20_Z[6]), .OOOI1_20_1(OOOI1_20_Z[7]), .OOOI1_20_10(OOOI1_20_Z[16]), .OOOI1_20_4(OOOI1_20_Z[10]), .OOOI1_19_6(OOOI1_19_Z[16]), .OOOI1_19_7(OOOI1_19_Z[17]), .OOOI1_19_8(OOOI1_19_Z[18]), .OOOI1_19_0(OOOI1_19_Z[10]), .OOOI1_19_1(OOOI1_19_Z[11]), .OOOI1_18_6(OOOI1_18_Z[17]), .OOOI1_18_2(OOOI1_18_Z[13]), .OOOI1_18_7(OOOI1_18_Z[18]), .OOOI1_18_0(OOOI1_18_Z[11]), .OOOI1_26({OOOI1_26_Z[4:3], N_14982, OOOI1_26_Z[1:0]}), .OOOI1_25_6(OOOI1_25_Z[6]), .OOOI1_25_1(OOOI1_25_Z[1]), .OOOI1_25_0(OOOI1_25_Z[0]), .OOOI1_10_d0(OOOI1_Z[19]), .OOOI1_6(OOOI1_Z[15]), .OOOI1_0(OOOI1_Z[9]), .paddr_0(paddr_1z_0), .PADDR_1z_0(PADDR_0), .un5_l0iIo_1(un5_l0iIo_1), .un5_l0iIo_2(un5_l0iIo_2), .N_82_2(N_82_2), .un5_l1iIo_2(un5_l1iIo_2), .N_1214(N_1214), .un1_IIOO1_2_1(un1_IIOO1_2_1), .un1_IIOO1_3_1(un1_IIOO1_3_1), .tx_fifo_write_sig14_i_2(tx_fifo_write_sig14_i_2), .liO0110_i_1(liO0110_i_1), .un1_IIOO1_1_2(un1_IIOO1_1_2), .o1Ol1_2(o1Ol1_2), .un5_O1iIo_3(un5_O1iIo_3), .liO019_i_1(liO019_i_1), .un1_ooiO1(un1_ooiO1), .Oi0O1(Oi0O1), .un1_o01O1_0(un1_o01O1_0), .iPRDATA_0_sqmuxa(iPRDATA_0_sqmuxa), .CoreAPB3_0_0_APBmslave0_PWRITE_s0(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .ioOl1(ioOl1), .o1Ol1(o1Ol1), .O0Ol1(O0Ol1), .oli11(oli11), .O1Ol1_1z(O1Ol1), .O0i11(O0i11), .I0o11(I0o11), .ilOl1(ilOl1), .I0Ol1(I0Ol1), .un80_OilI1_0_a2(un80_OilI1_0_a2), .IoOl1_1z(IoOl1), .un18_OilI1_0_a2(un18_OilI1_0_a2), .N_829(N_829), .N_159(N_159), .N_404(N_404), .N_402(N_402), .N_280(N_280), .un1_Ii0O1(un1_Ii0O1), .CoreAPB3_0_0_APBmslave0_PSELx(CoreAPB3_0_0_APBmslave0_PSELx), .CoreAPB3_0_0_APBmslave0_PENABLE(CoreAPB3_0_0_APBmslave0_PENABLE), .OiO01(OiO01), .IiO01(IiO01), .CoreAPB3_0_0_APBmslave0_PWRITE(CoreAPB3_0_0_APBmslave0_PWRITE), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:431415 OiOI1_26s_11s_12s_32s_2s_0s amcxfif_U0 ( .ooIO1_0(ooIO1[1]), .wrdata_0(wrdata_0), .CoreAPB3_0_0_APBmslave0_PWDATA(CoreAPB3_0_0_APBmslave0_PWDATA[31:1]), .i11I1(i11I1[11:0]), .Oo1I1(Oo1I1[11:0]), .iloI1(iloI1[13:0]), .oloI1_1(oloI1_1[39:36]), .paddr_0(paddr_1z_0), .PADDR_1z_0(PADDR_0), .rx_fifo_data_out(rx_fifo_data_out[15:8]), .CoreAPB3_0_0_APBmslave2_PRDATA_m(CoreAPB3_0_0_APBmslave2_PRDATA_m[15:8]), .CoreAPB3_0_0_APBmslave0_PADDR_3(CoreAPB3_0_0_APBmslave0_PADDR_3), .CoreAPB3_0_0_APBmslave0_PADDR_5(CoreAPB3_0_0_APBmslave0_PADDR_5), .CoreAPB3_0_0_APBmslave0_PADDR_0(CoreAPB3_0_0_APBmslave0_PADDR_0), .CoreAPB3_0_0_APBmslave0_PADDR_1(CoreAPB3_0_0_APBmslave0_PADDR_1), .un105_OOOI1_0(un105_OOOI1[24]), .un105_OOOI1_4(un105_OOOI1[28]), .un149_OOOI1_0(un149_OOOI1[29]), .un137_OOOI1(un137_OOOI1[20:18]), .un59_OOOI1_0(un59_OOOI1[11]), .un73_OOOI1_8(un73_OOOI1[13]), .un73_OOOI1_1(un73_OOOI1[6]), .un73_OOOI1_0(un73_OOOI1[5]), .un73_OOOI1_3(un73_OOOI1[8]), .un114_OOOI1_0(un114_OOOI1[10]), .un114_OOOI1_1(un114_OOOI1[11]), .un114_OOOI1_21(un114_OOOI1[31]), .un128_OOOI1_0(un128_OOOI1[24]), .un128_OOOI1_4(un128_OOOI1[28]), .un1_OOOI1_0(un1_OOOI1[16]), .un12_OOOI1_0(un12_OOOI1[4]), .un12_OOOI1_10(un12_OOOI1[14]), .o0il1(o0il1[2:0]), .i01I1({i01I1[15], N_14985, i01I1[13:5], N_14984, i01I1[3:0]}), .I11I1_1z(I11I1[12:0]), .O11I1_1z(O11I1[12:0]), .lliO1(lliO1[7:0]), .I01I1_1z({I01I1[12], N_14987, N_14986, I01I1[9:0]}), .Oo0i0(Oo0i0_1z[11:0]), .Io0i0(Io0i0_1z[35:0]), .Io1I1_1z(Io1I1[11:0]), .o0iO1_1z(o0iO1[32:6]), .oo1I1_1z(oo1I1[17:0]), .lo1I1(lo1I1[17:0]), .oloI1({oloI1[35:29], N_14989, oloI1[27:25], N_14988, oloI1[23:0]}), .O0Il1_2z_0(O0Il1_1z_0), .un2_O1Il1_0(un2_O1Il1_0), .o01I1_1z({o01I1[31:30], N_14990, o01I1[28:0]}), .io0i0_1z(io0i0[34:0]), .CORETSE_0_MRXDAT(CORETSE_0_MRXDAT[31:0]), .oo0i0_1z(oo0i0[11:0]), .lIol1_0(lIol1[0]), .il1I1({il1I1[39:29], N_14992, il1I1[27:25], N_14991, il1I1[23:0]}), .O10i0(O10i0[10:0]), .IioO1_1z(IioO1[7:0]), .I10i0(I10i0[39:0]), .iIoI1_1z(iIoI1[12:0]), .ll1I1(ll1I1[10:0]), .l00i0(l00i0[10:0]), .o00i0(o00i0[39:0]), .oIoI1_1z({oIoI1[39:14], N_14996, oIoI1[12:9], N_14995, oIoI1[7], N_14994, N_14993, oIoI1[4:0]}), .IoOI1(IoOI1), .Olli0_i(Olli0_i), .iIli0_i(iIli0_i), .oIli0_i(oIli0_i), .lIli0_i(lIli0_i), .hstrst_i(hstrst_i), .li1I1(li1I1), .Ii1I1(Ii1I1), .OOoI1(OOoI1), .oi1I1(oi1I1), .ii1I1_1z(ii1I1), .o1Ol1_2(o1Ol1_2), .un4_I1o11_4(un4_I1o11_4), .lOi11_4(lOi11_4), .CoreAPB3_0_0_APBmslave0_PWRITE(CoreAPB3_0_0_APBmslave0_PWRITE), .tx_fifo_write_sig_0_sqmuxa_i_1(tx_fifo_write_sig_0_sqmuxa_i_1), .un5_O1iIo_3(un5_O1iIo_3), .liO019_i_1(liO019_i_1), .ioOl1_3_0(ioOl1_3_0), .o1Ol1_3_0(o1Ol1_3_0), .un1_PADDR(un1_PADDR), .iPRDATA28(iPRDATA28), .un4_Ooo11_1(un4_Ooo11_1), .un1_ooiO1(un1_ooiO1), .un1_Ii0O1(un1_Ii0O1), .un1_o01O1_0(un1_o01O1_0), .ioOl1(ioOl1), .o1Ol1(o1Ol1), .ooOl1(ooOl1), .un5_l0iIo_1(un5_l0iIo_1), .OoOl1_1z(OoOl1), .N_82_2(N_82_2), .un5_l1iIo_2(un5_l1iIo_2), .O1Ol1_1z(O1Ol1), .tx_fifo_write_sig14_i_2(tx_fifo_write_sig14_i_2), .un4_I1o11_4_RNI4IU79(un4_I1o11_4_RNI4IU79), .un1_IIOO1_3_1(un1_IIOO1_3_1), .olOl1(olOl1), .liO0110_i_1(liO0110_i_1), .I0Ol1(I0Ol1), .l0Ol1(l0Ol1), .IoOl1_1z(IoOl1), .N_1214(N_1214), .o0Ol1(o0Ol1), .un1_IIOO1_1_2(un1_IIOO1_1_2), .i0Ol1_1z(i0Ol1), .O0Ol1_1z(O0Ol1), .ilOl1(ilOl1), .tx_fifo_write_sig14_i_1(tx_fifo_write_sig14_i_1), .l1Ol1(l1Ol1), .OIoI1(OIoI1), .iiOI1(iiOI1), .l11I1(l11I1), .IliO1(IliO1), .o11I1(o11I1), .iOiO1(iOiO1), .o10i0_i(o10i0_i), .PF_IOD_CDR_C0_0_RX_CLK_R(PF_IOD_CDR_C0_0_RX_CLK_R), .iOoI1_1z(iOoI1), .Oi1I1_1z(Oi1I1), .l0iO1(l0iO1), .oliO1(oliO1), .O0iO1(O0iO1), .O01I1(O01I1), .iliO1_1z(iliO1), .oI1I1_2z(oI1I1), .Ol1I1(Ol1I1), .io1I1(io1I1), .o1iO1(o1iO1), .i1iO1(i1iO1), .I1iO1_1z(I1iO1), .O0OI1(O0OI1), .o0oI1_i(o0oI1_i), .lI1I1_1z(lI1I1), .oOoI1_1z(oOoI1), .o0Il1_1z(o0Il1), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .oIiO1(oIiO1), .oool1_2z(oool1), .lOoI1(lOoI1), .OloI1_1z(OloI1), .IIiO1(IIiO1), .iIiO1_1z(iIiO1), .lOiO1(lOiO1), .OOiO1_1z(OOiO1), .ol1I1_1z(ol1I1), .oOiO1_2z(oOiO1), .iioO1(iioO1), .oioO1(oioO1), .lioO1(lioO1), .IOiO1_1z(IOiO1), .O00i0_i(O00i0_i), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .IOoI1_2z(IOoI1), .OI1I1_3z(OI1I1), .Il1I1_1z(Il1I1), .lIoI1(lIoI1) ); // @28:431894 CTSE_PE_MCXMAC_26s_0_0s_0s pe_mcxmac_U0 ( .wrdata_0(wrdata_0), .ooIO1(ooIO1[1:0]), .lIl11_1z(lIl11[6:0]), .IIl11_1z(IIl11[6:0]), .O0l11(O0l11[7:0]), .oIl11_1z({oIl11[6:5], N_15022, oIl11[3:0]}), .iIl11_2z_0(iIl11[0]), .iIl11_2z_1(iIl11[1]), .iIl11_2z_2(iIl11[2]), .iIl11_2z_3(iIl11[3]), .iIl11_2z_4(iIl11[4]), .iIl11_2z_6(iIl11[6]), .iIl11_2z_9(iIl11[9]), .CoreAPB3_0_0_APBmslave0_PWDATA(CoreAPB3_0_0_APBmslave0_PWDATA[31:1]), .PADDR_0(PADDR_0), .CoreAPB3_0_0_APBmslave0_PADDR_1(CoreAPB3_0_0_APBmslave0_PADDR_1), .CoreAPB3_0_0_APBmslave0_PADDR_3(CoreAPB3_0_0_APBmslave0_PADDR_3), .CoreAPB3_0_0_APBmslave0_PADDR_0(CoreAPB3_0_0_APBmslave0_PADDR_0), .CoreAPB3_0_0_APBmslave0_PADDR_5(CoreAPB3_0_0_APBmslave0_PADDR_5), .CoreAPB3_0_0_APBmslave0_PADDR_6(CoreAPB3_0_0_APBmslave0_PADDR_6), .CoreAPB3_0_0_APBmslave0_PADDR_7(CoreAPB3_0_0_APBmslave0_PADDR_7), .paddr_1z_0(paddr_1z_0), .un39_OOOI1_0(un39_OOOI1[2]), .un39_OOOI1_9(un39_OOOI1[11]), .un39_OOOI1_1(un39_OOOI1[3]), .un45_OOOI1_0(un45_OOOI1[10]), .un45_OOOI1_3(un45_OOOI1[13]), .un103_OOOI1_0(un103_OOOI1[5]), .un103_OOOI1_3(un103_OOOI1[8]), .un103_OOOI1_2(un103_OOOI1[7]), .un8_OOOI1_15(un8_OOOI1[31]), .un8_OOOI1_0(un8_OOOI1[16]), .un8_OOOI1_5(un8_OOOI1[21]), .un8_OOOI1_10(un8_OOOI1[26]), .un1_OOOI1_0(un1_OOOI1[19]), .un112_OOOI1_0(un112_OOOI1[20]), .oIOI1(oIOI1[47:0]), .IioO1_1z(IioO1[7:0]), .oiI11_1z(oiI11[15:0]), .I0l11_1z(I0l11[3:0]), .l0l11(l0l11[3:0]), .Oll11(Oll11[3:0]), .OOlI1(OOlI1[15:0]), .O1iO1_1z({O1iO1[51], N_15029, N_15028, O1iO1[48:32], N_15027, N_15026, O1iO1[29:24], N_15025, N_15024, N_15023, O1iO1[20:0]}), .Oi0i0_1z(Oi0i0_1z[7:0]), .ii0i0_1z(ii0i0_1z[7:0]), .OoiO1_3z(OoiO1[8:2]), .o0iO1_1z(o0iO1[32:0]), .lliO1(lliO1[7:0]), .OoI11_3z({OoI11[15:12], N_15032, OoI11[10:4], N_15031, N_15030, OoI11[1:0]}), .Iol11_1z(Iol11[4:0]), .lol11_1z(lol11[4:0]), .iol11_2z({iol11[15:14], N_15034, iol11[12:11], N_15033, iol11[9:0]}), .o1l11_1z(o1l11[2:0]), .OOl11_2z(OOl11[15:0]), .o0il1(o0il1[2:0]), .Olli0_i(Olli0_i), .iIli0_i(iIli0_i), .hstrst_i(hstrst_i), .loo11(loo11), .o1II1(o1II1), .oiII1(oiII1), .olOI1(olOI1), .IO011(IO011), .IiII1(IiII1), .OlOI1_1z(OlOI1), .i1II1(i1II1), .iIOI1(iIOI1), .l1II1(l1II1), .lO011(lO011), .liII1(liII1), .lil11(lil11), .oil11(oil11), .III11(III11), .IoOI1(IoOI1), .iOi11(iOi11), .OO011(OO011), .iil11(iil11), .un4_Ooo11_1(un4_Ooo11_1), .lOi11_4(lOi11_4), .N_1112(N_1112), .un4_I1o11_4(un4_I1o11_4), .CoreAPB3_0_0_APBmslave0_PWRITE(CoreAPB3_0_0_APBmslave0_PWRITE), .liO0110_i_1(liO0110_i_1), .liO019_i_1(liO019_i_1), .rx_fifo_read_1(rx_fifo_read_1), .N_1206(N_1206), .un1_ooiO1(un1_ooiO1), .oOi11(oOi11), .lOi11(lOi11), .tx_fifo_write_sig_0_sqmuxa_i_1(tx_fifo_write_sig_0_sqmuxa_i_1), .un4_I1o11_4_RNI4IU79(un4_I1o11_4_RNI4IU79), .un1_PADDR_2(un1_PADDR_2), .O1o11(O1o11), .un5_l0iIo_2(un5_l0iIo_2), .Iio11(Iio11), .IOi11_1z(IOi11), .olo11(olo11), .o0o11(o0o11), .l1o11(l1o11), .i1o11(i1o11), .N_82_2(N_82_2), .oio11(oio11), .ioo11(ioo11), .un1_IIOO1_1_2(un1_IIOO1_1_2), .Ilo11(Ilo11), .un1_IIOO1_2_1(un1_IIOO1_2_1), .O0i11(O0i11), .tx_fifo_write_sig14_i_1(tx_fifo_write_sig14_i_1), .tx_fifo_write_sig14_i_2(tx_fifo_write_sig14_i_2), .OOi11_1z(OOi11), .un5_l0iIo_1(un5_l0iIo_1), .oli11(oli11), .un1_PADDR_3(un1_PADDR_3), .I0o11(I0o11), .Ioo11_1z(Ioo11), .li0i0(li0i0), .Ol1i0(Ol1i0), .OO1i0(OO1i0), .IOiO1(IOiO1), .oOiO1_1z(oOiO1), .iOiO1_1z(iOiO1), .lOiO1(lOiO1), .OOiO1_2z(OOiO1), .iIl0112(iIl0112), .IliO1(IliO1), .iIiO1(iIiO1), .oIiO1(oIiO1), .IIiO1_1z(IIiO1), .ooI11_2z(ooI11), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .OIl11_2z(OIl11), .lll11(lll11), .lioO1(lioO1), .l1l11(l1l11), .liI11(liI11), .iioO1(iioO1), .oioO1(oioO1), .lOl11(lOl11), .oOl11(oOl11), .IOI11_2z(IOI11), .o0l11_1z(o0l11), .Ill11(Ill11), .ilo11_1z(ilo11), .iiOI1_1z(iiOI1), .ill11_1z(ill11), .l1I11(l1I11), .Ii0i0(Ii0i0), .i1_i_12(i1_i_12), .i0iO1(i0iO1), .O1l11(O1l11), .lO1i0(lO1i0), .IO1i0(IO1i0), .iOlI1_i(iOlI1_i), .iOl11(iOl11), .oi0i0(oi0i0), .I1I11(I1I11), .o1iO1(o1iO1), .IoiO1_2z(IoiO1), .i1iO1(i1iO1), .i0l11(i0l11), .PF_IOD_CDR_C0_0_RX_CLK_R(PF_IOD_CDR_C0_0_RX_CLK_R), .OIlI1_i(OIlI1_i), .IiI11_1z(IiI11), .OiI11(OiI11), .ioI11_3z(ioI11), .I1iO1_1z(I1iO1), .O0iO1(O0iO1), .l0iO1(l0iO1), .oliO1(oliO1), .iliO1_1z(iliO1), .loI11_1z(loI11), .i1I11_1z(i1I11), .iI1i0(iI1i0), .PHY_MDC_c(PHY_MDC_c), .CORETSE_0_MDOEN(CORETSE_0_MDOEN), .CORETSE_0_MDO(CORETSE_0_MDO), .OOOO1(OOOO1), .Iil11_3z(Iil11), .Oil11_3z(Oil11), .Ool11_1z(Ool11), .i1l11(i1l11), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0) ); // @28:432682 CTSE_SIB_SYNC_PULSE_26s_1s_0s_16 \STATS_INSTANCE.sib_sync_pulse_U0 ( .i0iO1(i0iO1), .OllI1(OllI1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .iOlI1_i(iOlI1_i) ); // @28:432737 CTSE_SIB_SYNC_PULSE_26s_1s_0s_0 \STATS_INSTANCE.sib_sync_pulse_U1 ( .l0iO1(l0iO1), .IllI1(IllI1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i), .PF_IOD_CDR_C0_0_RX_CLK_R(PF_IOD_CDR_C0_0_RX_CLK_R), .OIlI1_i(OIlI1_i) ); // @28:432792 CTSE_PEMSTAT_26s \STATS_INSTANCE.pemstat_U0 ( .Iolo1_12(Iolo1[14]), .Iolo1_11(Iolo1[13]), .Iolo1_10(Iolo1[12]), .Iolo1_6(Iolo1[8]), .Iolo1_5(Iolo1[7]), .Iolo1_4(Iolo1[6]), .Iolo1_3(Iolo1[5]), .Iolo1_2(Iolo1[4]), .Iolo1_1(Iolo1[3]), .Iolo1_0(Iolo1[2]), .Iolo1_19(Iolo1[21]), .Iolo1_18(Iolo1[20]), .Iolo1_17(Iolo1[19]), .Iolo1_16(Iolo1[18]), .Iolo1_14(Iolo1[16]), .Oolo1_5(Oolo1[7]), .Oolo1_4(Oolo1[6]), .Oolo1_3(Oolo1[5]), .Oolo1_2(Oolo1[4]), .Oolo1_1(Oolo1[3]), .Oolo1_0(Oolo1[2]), .Oolo1_20(Oolo1[22]), .Oolo1_18(Oolo1[20]), .Oolo1_16(Oolo1[18]), .Oolo1_14(Oolo1[16]), .Oolo1_13(Oolo1[15]), .Oolo1_12(Oolo1[14]), .Oolo1_11(Oolo1[13]), .Oolo1_10(Oolo1[12]), .Oolo1_6(Oolo1[8]), .Oolo1_23(Oolo1[25]), .Oolo1_22(Oolo1[24]), .Oolo1_21(Oolo1[23]), .CoreAPB3_0_0_APBmslave0_PWDATA({CoreAPB3_0_0_APBmslave0_PWDATA[31:25], N_15071, N_15070, N_15069, CoreAPB3_0_0_APBmslave0_PWDATA[21:1]}), .paddr_0(paddr_1z_0), .PADDR_1z_0(PADDR_0), .CoreAPB3_0_0_APBmslave0_PADDR_5(CoreAPB3_0_0_APBmslave0_PADDR_5), .CoreAPB3_0_0_APBmslave0_PADDR_6(CoreAPB3_0_0_APBmslave0_PADDR_6), .CoreAPB3_0_0_APBmslave0_PADDR_0(CoreAPB3_0_0_APBmslave0_PADDR_0), .CoreAPB3_0_0_APBmslave0_PADDR_3(CoreAPB3_0_0_APBmslave0_PADDR_3), .CoreAPB3_0_0_APBmslave0_PADDR_1(CoreAPB3_0_0_APBmslave0_PADDR_1), .i0lo1_11({i0lo1_11[17:16], N_15072, i0lo1_11[14:13]}), .i0lo1_12({i0lo1_12[17:16], N_15073, i0lo1_12[14:13]}), .i0lo1_41_3(i0lo1_41[8]), .i0lo1_41_0(i0lo1_41[5]), .i0lo1_41_1(i0lo1_41[6]), .i0lo1_40_3(i0lo1_40[8]), .i0lo1_40_0(i0lo1_40[5]), .i0lo1_40_1(i0lo1_40[6]), .i0lo1_3(i0lo1[18]), .i0lo1_6(i0lo1[21]), .i0lo1_4(i0lo1[19]), .i0lo1_5(i0lo1[20]), .i0lo1_0(i0lo1[15]), .un86_OilI1_0(un86_OilI1[15]), .un86_OilI1_2(un86_OilI1[17]), .un1_OilI1_1(un1_OilI1[3]), .un1_OilI1_2(un1_OilI1[4]), .un1_OilI1_5(un1_OilI1[7]), .un1_OilI1_10(un1_OilI1[12]), .un1_OilI1_0(un1_OilI1[2]), .un50_OilI1_0(un50_OilI1[14]), .un78_OilI1_0(un78_OilI1[17]), .cnt07(cnt07[23:22]), .wrdata_0(wrdata_0), .cnt24_0(cnt24[22]), .o0Io1_0(o0Io1[0]), .o0Io1_1(o0Io1[1]), .o0Io1_2(o0Io1[2]), .o0Io1_3(o0Io1[3]), .o0Io1_4(o0Io1[4]), .o0Io1_5(o0Io1[5]), .o0Io1_6(o0Io1[6]), .o0Io1_7(o0Io1[7]), .o0Io1_8(o0Io1[8]), .o0Io1_9(o0Io1[9]), .o0Io1_10(o0Io1[10]), .o0Io1_11(o0Io1[11]), .o0Io1_15(o0Io1[15]), .o0Io1_16(o0Io1[16]), .o0Io1_17(o0Io1[17]), .o0Io1_18(o0Io1[18]), .o0Io1_19(o0Io1[19]), .o0Io1_20(o0Io1[20]), .o0Io1_21(o0Io1[21]), .o0Io1_24(o0Io1[24]), .o0Io1_25(o0Io1[25]), .o0Io1_29(o0Io1[29]), .o0Io1_30(o0Io1[30]), .o0Io1_31(o0Io1[31]), .o0Io1_32(o0Io1[32]), .o0Io1_33(o0Io1[33]), .o0Io1_34(o0Io1[34]), .o0Io1_35(o0Io1[35]), .o0Io1_38(o0Io1[38]), .o0Io1_39(o0Io1[39]), .o0Io1_40(o0Io1[40]), .o0Io1_41(o0Io1[41]), .o0Io1_42(o0Io1[42]), .O1iO1({O1iO1[51], N_15080, N_15079, O1iO1[48:32], N_15078, N_15077, O1iO1[29:24], N_15076, N_15075, N_15074, O1iO1[20:0]}), .o0iO1_1z({o0iO1[30:24], N_15084, N_15083, o0iO1[21:18], N_15082, N_15081, o0iO1[15:0]}), .o1II1(o1II1), .un80_OilI1_0_a2(un80_OilI1_0_a2), .rx_fifo_read_0(rx_fifo_read_0), .tx_fifo_write_sig14_i_2(tx_fifo_write_sig14_i_2), .N_1206(N_1206), .liO019_i_1(liO019_i_1), .N_1112(N_1112), .N_82_2(N_82_2), .un4_Ooo11_1(un4_Ooo11_1), .un1_o01O1_0(un1_o01O1_0), .un1_Ii0O1(un1_Ii0O1), .N_133(N_133), .N_16(N_16), .un52_OilI1(un52_OilI1), .N_1147(N_1147), .un18_OilI1_0_a2(un18_OilI1_0_a2), .N_675(N_675), .N_679(N_679), .N_1146(N_1146), .N_829(N_829), .N_404(N_404), .N_159(N_159), .N_402(N_402), .N_161(N_161), .N_280(N_280), .l1II1(l1II1), .un1_ooiO1(un1_ooiO1), .CoreAPB3_0_0_APBmslave0_PWRITE(CoreAPB3_0_0_APBmslave0_PWRITE), .hstrst_i(hstrst_i), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .IllI1(IllI1), .OllI1(OllI1), .i1II1(i1II1), .I0OI1(I0OI1) ); // @28:433143 CTSE_MMCXWOL_1s_26s \lilI1.mmcxwol_U0 ( .oIOI1(oIOI1[47:0]), .o0iO1(o0iO1[22:20]), .lliO1(lliO1[7:0]), .OlOI1(OlOI1), .iIOI1(iIOI1), .IlOI1_1z(IlOI1), .oliO1(oliO1), .iliO1(iliO1), .O0iO1_1z(O0iO1), .l0iO1(l0iO1), .i1iO1(i1iO1), .o1iO1(o1iO1), .I1iO1_1z(I1iO1), .olOI1_1z(olOI1), .PF_IOD_CDR_C0_0_RX_CLK_R(PF_IOD_CDR_C0_0_RX_CLK_R), .OIlI1_i(OIlI1_i) ); // @28:433289 CTSE_SIB_SYNC_2FLP_1s_26s_1s_10_1 woldtctd_sync_U0 ( .IlOI1(IlOI1), .PF_IOD_CDR_C0_0_RX_CLK_R(PF_IOD_CDR_C0_0_RX_CLK_R), .OIlI1_i(OIlI1_i), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i), .llOI1(llOI1) ); // @28:433348 CTSE_SI_SAL_26s \II0I1.si_sal_U0 ( .OoiO1(OoiO1[8:2]), .O1OI1(O1OI1[31:0]), .i0OI1(i0OI1[31:0]), .I1OI1(I1OI1[31:0]), .o0OI1(o0OI1[31:0]), .l0OI1(l0OI1[5:0]), .i1iO1(i1iO1), .I1iO1_1z(I1iO1), .o1iO1(o1iO1), .IoiO1(IoiO1), .l0iO1(l0iO1), .I0OI1_1z(I0OI1), .PF_IOD_CDR_C0_0_RX_CLK_R(PF_IOD_CDR_C0_0_RX_CLK_R), .OIlI1_i(OIlI1_i), .O0OI1_1z(O0OI1) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_TSMAC_TOP_Z9 */ module CTSE_TX2048X40_11s_26s_1s_1s_4s ( o00i0, I10i0, l00i0, O10i0, O00i0_i, PF_CCC_0_0_OUT0_FABCLK_0, PF_IOD_CDR_CCC_C0_0_TX_CLK_G ) ; input [39:0] o00i0 ; output [39:0] I10i0 ; input [10:0] l00i0 ; input [10:0] O10i0 ; input O00i0_i ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire O00i0_i ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire [4:0] oi0Io_oi0Io_0_0_B_DOUT_0; wire [9:5] oi0Io_oi0Io_0_0_B_DOUT; wire [4:0] oi0Io_oi0Io_0_1_B_DOUT_0; wire [9:5] oi0Io_oi0Io_0_1_B_DOUT; wire [4:0] oi0Io_oi0Io_0_2_B_DOUT_0; wire [9:5] oi0Io_oi0Io_0_2_B_DOUT; wire [4:0] oi0Io_oi0Io_0_3_B_DOUT_0; wire [9:5] oi0Io_oi0Io_0_3_B_DOUT; wire GND ; wire VCC ; wire NC0 ; wire NC1 ; wire NC2 ; wire NC3 ; wire NC4 ; wire NC5 ; wire NC6 ; wire NC7 ; wire NC8 ; wire NC9 ; wire NC10 ; wire NC11 ; wire NC12 ; wire NC13 ; wire NC14 ; wire NC15 ; wire NC16 ; wire NC17 ; wire NC18 ; wire NC19 ; wire NC20 ; wire NC21 ; wire NC22 ; wire NC23 ; wire NC24 ; wire NC25 ; wire NC26 ; wire NC27 ; wire NC28 ; wire NC29 ; wire NC30 ; wire NC31 ; wire NC32 ; wire NC33 ; wire NC34 ; wire NC35 ; wire NC36 ; wire NC37 ; wire NC38 ; wire NC39 ; wire NC40 ; wire NC41 ; wire NC42 ; wire NC43 ; wire NC44 ; wire NC45 ; wire NC46 ; wire NC47 ; wire NC48 ; wire NC49 ; wire NC50 ; wire NC51 ; wire NC52 ; wire NC53 ; wire NC54 ; wire NC55 ; wire NC56 ; wire NC57 ; wire NC58 ; wire NC59 ; wire NC60 ; wire NC61 ; wire NC62 ; wire NC63 ; wire NC64 ; wire NC65 ; wire NC66 ; wire NC67 ; wire NC68 ; wire NC69 ; wire NC70 ; wire NC71 ; wire NC72 ; wire NC73 ; wire NC74 ; wire NC75 ; wire NC76 ; wire NC77 ; wire NC78 ; wire NC79 ; wire NC80 ; wire NC81 ; wire NC82 ; wire NC83 ; wire NC84 ; wire NC85 ; wire NC86 ; wire NC87 ; wire NC88 ; wire NC89 ; wire NC90 ; wire NC91 ; // @28:549017 RAM1K20 oi0Io_oi0Io_0_0 ( .A_ADDR({O10i0[10:0], GND, GND, GND}), .A_BLK_EN({VCC, VCC, VCC}), .A_CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .A_DIN({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND}), .A_DOUT({NC9, NC8, NC7, NC6, NC5, NC4, NC3, NC2, NC1, NC0, I10i0[9:0]}), .A_WEN({GND, GND}), .A_REN(VCC), .A_WIDTH({GND, VCC, VCC}), .A_WMODE({GND, VCC}), .A_BYPASS(VCC), .A_DOUT_EN(VCC), .A_DOUT_SRST_N(VCC), .A_DOUT_ARST_N(VCC), .B_ADDR({l00i0[10:0], GND, GND, GND}), .B_BLK_EN({VCC, VCC, VCC}), .B_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .B_DIN({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, o00i0[9:0]}), .B_DOUT({NC19, NC18, NC17, NC16, NC15, NC14, NC13, NC12, NC11, NC10, oi0Io_oi0Io_0_0_B_DOUT[9:5], oi0Io_oi0Io_0_0_B_DOUT_0[4:0]}), .B_WEN({GND, O00i0_i}), .B_REN(VCC), .B_WIDTH({GND, VCC, VCC}), .B_WMODE({GND, VCC}), .B_BYPASS(VCC), .B_DOUT_EN(VCC), .B_DOUT_SRST_N(VCC), .B_DOUT_ARST_N(VCC), .ECC_EN(GND), .ECC_BYPASS(VCC), .SB_CORRECT(NC20), .DB_DETECT(NC21), .BUSY_FB(GND), .ACCESS_BUSY(NC22) ); defparam oi0Io_oi0Io_0_0.RAMINDEX="oi0Io[39:0]%2048-2048%40-40%SPEED%0%0%DUAL-PORT%ECC_EN-0"; // @28:549017 RAM1K20 oi0Io_oi0Io_0_1 ( .A_ADDR({O10i0[10:0], GND, GND, GND}), .A_BLK_EN({VCC, VCC, VCC}), .A_CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .A_DIN({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND}), .A_DOUT({NC32, NC31, NC30, NC29, NC28, NC27, NC26, NC25, NC24, NC23, I10i0[19:10]}), .A_WEN({GND, GND}), .A_REN(VCC), .A_WIDTH({GND, VCC, VCC}), .A_WMODE({GND, VCC}), .A_BYPASS(VCC), .A_DOUT_EN(VCC), .A_DOUT_SRST_N(VCC), .A_DOUT_ARST_N(VCC), .B_ADDR({l00i0[10:0], GND, GND, GND}), .B_BLK_EN({VCC, VCC, VCC}), .B_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .B_DIN({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, o00i0[19:10]}), .B_DOUT({NC42, NC41, NC40, NC39, NC38, NC37, NC36, NC35, NC34, NC33, oi0Io_oi0Io_0_1_B_DOUT[9:5], oi0Io_oi0Io_0_1_B_DOUT_0[4:0]}), .B_WEN({GND, O00i0_i}), .B_REN(VCC), .B_WIDTH({GND, VCC, VCC}), .B_WMODE({GND, VCC}), .B_BYPASS(VCC), .B_DOUT_EN(VCC), .B_DOUT_SRST_N(VCC), .B_DOUT_ARST_N(VCC), .ECC_EN(GND), .ECC_BYPASS(VCC), .SB_CORRECT(NC43), .DB_DETECT(NC44), .BUSY_FB(GND), .ACCESS_BUSY(NC45) ); defparam oi0Io_oi0Io_0_1.RAMINDEX="oi0Io[39:0]%2048-2048%40-40%SPEED%0%1%DUAL-PORT%ECC_EN-0"; // @28:549017 RAM1K20 oi0Io_oi0Io_0_2 ( .A_ADDR({O10i0[10:0], GND, GND, GND}), .A_BLK_EN({VCC, VCC, VCC}), .A_CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .A_DIN({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND}), .A_DOUT({NC55, NC54, NC53, NC52, NC51, NC50, NC49, NC48, NC47, NC46, I10i0[29:20]}), .A_WEN({GND, GND}), .A_REN(VCC), .A_WIDTH({GND, VCC, VCC}), .A_WMODE({GND, VCC}), .A_BYPASS(VCC), .A_DOUT_EN(VCC), .A_DOUT_SRST_N(VCC), .A_DOUT_ARST_N(VCC), .B_ADDR({l00i0[10:0], GND, GND, GND}), .B_BLK_EN({VCC, VCC, VCC}), .B_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .B_DIN({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, o00i0[29:20]}), .B_DOUT({NC65, NC64, NC63, NC62, NC61, NC60, NC59, NC58, NC57, NC56, oi0Io_oi0Io_0_2_B_DOUT[9:5], oi0Io_oi0Io_0_2_B_DOUT_0[4:0]}), .B_WEN({GND, O00i0_i}), .B_REN(VCC), .B_WIDTH({GND, VCC, VCC}), .B_WMODE({GND, VCC}), .B_BYPASS(VCC), .B_DOUT_EN(VCC), .B_DOUT_SRST_N(VCC), .B_DOUT_ARST_N(VCC), .ECC_EN(GND), .ECC_BYPASS(VCC), .SB_CORRECT(NC66), .DB_DETECT(NC67), .BUSY_FB(GND), .ACCESS_BUSY(NC68) ); defparam oi0Io_oi0Io_0_2.RAMINDEX="oi0Io[39:0]%2048-2048%40-40%SPEED%0%2%DUAL-PORT%ECC_EN-0"; // @28:549017 RAM1K20 oi0Io_oi0Io_0_3 ( .A_ADDR({O10i0[10:0], GND, GND, GND}), .A_BLK_EN({VCC, VCC, VCC}), .A_CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .A_DIN({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND}), .A_DOUT({NC78, NC77, NC76, NC75, NC74, NC73, NC72, NC71, NC70, NC69, I10i0[39:30]}), .A_WEN({GND, GND}), .A_REN(VCC), .A_WIDTH({GND, VCC, VCC}), .A_WMODE({GND, VCC}), .A_BYPASS(VCC), .A_DOUT_EN(VCC), .A_DOUT_SRST_N(VCC), .A_DOUT_ARST_N(VCC), .B_ADDR({l00i0[10:0], GND, GND, GND}), .B_BLK_EN({VCC, VCC, VCC}), .B_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .B_DIN({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, o00i0[39:30]}), .B_DOUT({NC88, NC87, NC86, NC85, NC84, NC83, NC82, NC81, NC80, NC79, oi0Io_oi0Io_0_3_B_DOUT[9:5], oi0Io_oi0Io_0_3_B_DOUT_0[4:0]}), .B_WEN({GND, O00i0_i}), .B_REN(VCC), .B_WIDTH({GND, VCC, VCC}), .B_WMODE({GND, VCC}), .B_BYPASS(VCC), .B_DOUT_EN(VCC), .B_DOUT_SRST_N(VCC), .B_DOUT_ARST_N(VCC), .ECC_EN(GND), .ECC_BYPASS(VCC), .SB_CORRECT(NC89), .DB_DETECT(NC90), .BUSY_FB(GND), .ACCESS_BUSY(NC91) ); defparam oi0Io_oi0Io_0_3.RAMINDEX="oi0Io[39:0]%2048-2048%40-40%SPEED%0%3%DUAL-PORT%ECC_EN-0"; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_TX2048X40_11s_26s_1s_1s_4s */ module CTSE_RX4096X36_12s_26s_1s_1s_4s ( Io0i0, un2_O1Il1_0, o01I1_0, io0i0_1z, Oo0i0, oo0i0_1z, o0oI1_i, o0Il1, o10i0_i, PF_IOD_CDR_C0_0_RX_CLK_R, PF_CCC_0_0_OUT0_FABCLK_0 ) ; input [35:0] Io0i0 ; input un2_O1Il1_0 ; output o01I1_0 ; output [34:0] io0i0_1z ; input [11:0] Oo0i0 ; input [11:0] oo0i0_1z ; input o0oI1_i ; input o0Il1 ; input o10i0_i ; input PF_IOD_CDR_C0_0_RX_CLK_R ; input PF_CCC_0_0_OUT0_FABCLK_0 ; wire un2_O1Il1_0 ; wire o01I1_0 ; wire o0oI1_i ; wire o0Il1 ; wire o10i0_i ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire [4:0] oi0Io_oi0Io_0_0_B_DOUT; wire [4:0] oi0Io_oi0Io_0_1_B_DOUT; wire [4:0] oi0Io_oi0Io_0_2_B_DOUT; wire [4:0] oi0Io_oi0Io_0_3_B_DOUT; wire [4:0] oi0Io_oi0Io_0_4_B_DOUT; wire [4:0] oi0Io_oi0Io_0_5_B_DOUT; wire [4:0] oi0Io_oi0Io_0_6_B_DOUT; wire [4:0] oi0Io_oi0Io_0_7_B_DOUT; wire GND ; wire VCC ; wire NC0 ; wire NC1 ; wire NC2 ; wire NC3 ; wire NC4 ; wire NC5 ; wire NC6 ; wire NC7 ; wire NC8 ; wire NC9 ; wire NC10 ; wire NC11 ; wire NC12 ; wire NC13 ; wire NC14 ; wire NC15 ; wire NC16 ; wire NC17 ; wire NC18 ; wire NC19 ; wire NC20 ; wire NC21 ; wire NC22 ; wire NC23 ; wire NC24 ; wire NC25 ; wire NC26 ; wire NC27 ; wire NC28 ; wire NC29 ; wire NC30 ; wire NC31 ; wire NC32 ; wire NC33 ; wire NC34 ; wire NC35 ; wire NC36 ; wire NC37 ; wire NC38 ; wire NC39 ; wire NC40 ; wire NC41 ; wire NC42 ; wire NC43 ; wire NC44 ; wire NC45 ; wire NC46 ; wire NC47 ; wire NC48 ; wire NC49 ; wire NC50 ; wire NC51 ; wire NC52 ; wire NC53 ; wire NC54 ; wire NC55 ; wire NC56 ; wire NC57 ; wire NC58 ; wire NC59 ; wire NC60 ; wire NC61 ; wire NC62 ; wire NC63 ; wire NC64 ; wire NC65 ; wire NC66 ; wire NC67 ; wire NC68 ; wire NC69 ; wire NC70 ; wire NC71 ; wire NC72 ; wire NC73 ; wire NC74 ; wire NC75 ; wire NC76 ; wire NC77 ; wire NC78 ; wire NC79 ; wire NC80 ; wire NC81 ; wire NC82 ; wire NC83 ; wire NC84 ; wire NC85 ; wire NC86 ; wire NC87 ; wire NC88 ; wire NC89 ; wire NC90 ; wire NC91 ; wire NC92 ; wire NC93 ; wire NC94 ; wire NC95 ; wire NC96 ; wire NC97 ; wire NC98 ; wire NC99 ; wire NC100 ; wire NC101 ; wire NC102 ; wire NC103 ; wire NC104 ; wire NC105 ; wire NC106 ; wire NC107 ; wire NC108 ; wire NC109 ; wire NC110 ; wire NC111 ; wire NC112 ; wire NC113 ; wire NC114 ; wire NC115 ; wire NC116 ; wire NC117 ; wire NC118 ; wire NC119 ; wire NC120 ; wire NC121 ; wire NC122 ; wire NC123 ; wire NC124 ; wire NC125 ; wire NC126 ; wire NC127 ; wire NC128 ; wire NC129 ; wire NC130 ; wire NC131 ; wire NC132 ; wire NC133 ; wire NC134 ; wire NC135 ; wire NC136 ; wire NC137 ; wire NC138 ; wire NC139 ; wire NC140 ; wire NC141 ; wire NC142 ; wire NC143 ; wire NC144 ; wire NC145 ; wire NC146 ; wire NC147 ; wire NC148 ; wire NC149 ; wire NC150 ; wire NC151 ; wire NC152 ; wire NC153 ; wire NC154 ; wire NC155 ; wire NC156 ; wire NC157 ; wire NC158 ; wire NC159 ; wire NC160 ; wire NC161 ; wire NC162 ; wire NC163 ; wire NC164 ; wire NC165 ; wire NC166 ; wire NC167 ; wire NC168 ; wire NC169 ; wire NC170 ; wire NC171 ; wire NC172 ; wire NC173 ; wire NC174 ; wire NC175 ; wire NC176 ; wire NC177 ; wire NC178 ; wire NC179 ; wire NC180 ; wire NC181 ; wire NC182 ; wire NC183 ; wire NC184 ; wire NC185 ; wire NC186 ; wire NC187 ; wire NC188 ; wire NC189 ; wire NC190 ; wire NC191 ; wire NC192 ; wire NC193 ; wire NC194 ; wire NC195 ; wire NC196 ; wire NC197 ; wire NC198 ; wire NC199 ; wire NC200 ; wire NC201 ; wire NC202 ; wire NC203 ; wire NC204 ; wire NC205 ; wire NC206 ; wire NC207 ; wire NC208 ; wire NC209 ; wire NC210 ; wire NC211 ; wire NC212 ; wire NC213 ; wire NC214 ; wire NC215 ; wire NC216 ; wire NC217 ; wire NC218 ; wire NC219 ; wire NC220 ; wire NC221 ; wire NC222 ; wire NC223 ; wire NC224 ; wire NC225 ; wire NC226 ; wire NC227 ; wire NC228 ; wire NC229 ; wire NC230 ; wire NC231 ; wire NC232 ; wire NC233 ; wire NC234 ; wire NC235 ; wire NC236 ; wire NC237 ; wire NC238 ; wire NC239 ; wire NC240 ; wire NC241 ; wire NC242 ; wire NC243 ; wire NC244 ; wire NC245 ; wire NC246 ; wire NC247 ; wire NC248 ; wire NC249 ; wire NC250 ; wire NC251 ; wire NC252 ; wire NC253 ; wire NC254 ; wire NC255 ; wire NC256 ; wire NC257 ; wire NC258 ; wire NC259 ; wire NC260 ; wire NC261 ; wire NC262 ; wire NC263 ; wire NC264 ; wire NC265 ; wire NC266 ; wire NC267 ; // @28:542626 RAM1K20 oi0Io_oi0Io_0_0 ( .A_ADDR({oo0i0_1z[11:0], GND, GND}), .A_BLK_EN({VCC, VCC, VCC}), .A_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .A_DIN({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND}), .A_DOUT({NC14, NC13, NC12, NC11, NC10, NC9, NC8, NC7, NC6, NC5, NC4, NC3, NC2, NC1, NC0, io0i0_1z[4:0]}), .A_WEN({GND, GND}), .A_REN(VCC), .A_WIDTH({GND, VCC, GND}), .A_WMODE({GND, VCC}), .A_BYPASS(VCC), .A_DOUT_EN(VCC), .A_DOUT_SRST_N(VCC), .A_DOUT_ARST_N(VCC), .B_ADDR({Oo0i0[11:0], GND, GND}), .B_BLK_EN({VCC, VCC, VCC}), .B_CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .B_DIN({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, Io0i0[4:0]}), .B_DOUT({NC29, NC28, NC27, NC26, NC25, NC24, NC23, NC22, NC21, NC20, NC19, NC18, NC17, NC16, NC15, oi0Io_oi0Io_0_0_B_DOUT[4:0]}), .B_WEN({GND, o10i0_i}), .B_REN(VCC), .B_WIDTH({GND, VCC, GND}), .B_WMODE({GND, VCC}), .B_BYPASS(VCC), .B_DOUT_EN(VCC), .B_DOUT_SRST_N(VCC), .B_DOUT_ARST_N(VCC), .ECC_EN(GND), .ECC_BYPASS(VCC), .SB_CORRECT(NC30), .DB_DETECT(NC31), .BUSY_FB(GND), .ACCESS_BUSY(NC32) ); defparam oi0Io_oi0Io_0_0.RAMINDEX="oi0Io[35:0]%4096-4096%36-36%SPEED%0%0%DUAL-PORT%ECC_EN-0"; // @28:542626 RAM1K20 oi0Io_oi0Io_0_1 ( .A_ADDR({oo0i0_1z[11:0], GND, GND}), .A_BLK_EN({VCC, VCC, VCC}), .A_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .A_DIN({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND}), .A_DOUT({NC47, NC46, NC45, NC44, NC43, NC42, NC41, NC40, NC39, NC38, NC37, NC36, NC35, NC34, NC33, io0i0_1z[9:5]}), .A_WEN({GND, GND}), .A_REN(VCC), .A_WIDTH({GND, VCC, GND}), .A_WMODE({GND, VCC}), .A_BYPASS(VCC), .A_DOUT_EN(VCC), .A_DOUT_SRST_N(VCC), .A_DOUT_ARST_N(VCC), .B_ADDR({Oo0i0[11:0], GND, GND}), .B_BLK_EN({VCC, VCC, VCC}), .B_CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .B_DIN({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, Io0i0[9:5]}), .B_DOUT({NC62, NC61, NC60, NC59, NC58, NC57, NC56, NC55, NC54, NC53, NC52, NC51, NC50, NC49, NC48, oi0Io_oi0Io_0_1_B_DOUT[4:0]}), .B_WEN({GND, o10i0_i}), .B_REN(VCC), .B_WIDTH({GND, VCC, GND}), .B_WMODE({GND, VCC}), .B_BYPASS(VCC), .B_DOUT_EN(VCC), .B_DOUT_SRST_N(VCC), .B_DOUT_ARST_N(VCC), .ECC_EN(GND), .ECC_BYPASS(VCC), .SB_CORRECT(NC63), .DB_DETECT(NC64), .BUSY_FB(GND), .ACCESS_BUSY(NC65) ); defparam oi0Io_oi0Io_0_1.RAMINDEX="oi0Io[35:0]%4096-4096%36-36%SPEED%0%1%DUAL-PORT%ECC_EN-0"; // @28:542626 RAM1K20 oi0Io_oi0Io_0_2 ( .A_ADDR({oo0i0_1z[11:0], GND, GND}), .A_BLK_EN({VCC, VCC, VCC}), .A_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .A_DIN({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND}), .A_DOUT({NC80, NC79, NC78, NC77, NC76, NC75, NC74, NC73, NC72, NC71, NC70, NC69, NC68, NC67, NC66, io0i0_1z[14:10]}), .A_WEN({GND, GND}), .A_REN(VCC), .A_WIDTH({GND, VCC, GND}), .A_WMODE({GND, VCC}), .A_BYPASS(VCC), .A_DOUT_EN(VCC), .A_DOUT_SRST_N(VCC), .A_DOUT_ARST_N(VCC), .B_ADDR({Oo0i0[11:0], GND, GND}), .B_BLK_EN({VCC, VCC, VCC}), .B_CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .B_DIN({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, Io0i0[14:10]}), .B_DOUT({NC95, NC94, NC93, NC92, NC91, NC90, NC89, NC88, NC87, NC86, NC85, NC84, NC83, NC82, NC81, oi0Io_oi0Io_0_2_B_DOUT[4:0]}), .B_WEN({GND, o10i0_i}), .B_REN(VCC), .B_WIDTH({GND, VCC, GND}), .B_WMODE({GND, VCC}), .B_BYPASS(VCC), .B_DOUT_EN(VCC), .B_DOUT_SRST_N(VCC), .B_DOUT_ARST_N(VCC), .ECC_EN(GND), .ECC_BYPASS(VCC), .SB_CORRECT(NC96), .DB_DETECT(NC97), .BUSY_FB(GND), .ACCESS_BUSY(NC98) ); defparam oi0Io_oi0Io_0_2.RAMINDEX="oi0Io[35:0]%4096-4096%36-36%SPEED%0%2%DUAL-PORT%ECC_EN-0"; // @28:542626 RAM1K20 oi0Io_oi0Io_0_3 ( .A_ADDR({oo0i0_1z[11:0], GND, GND}), .A_BLK_EN({VCC, VCC, VCC}), .A_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .A_DIN({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND}), .A_DOUT({NC113, NC112, NC111, NC110, NC109, NC108, NC107, NC106, NC105, NC104, NC103, NC102, NC101, NC100, NC99, io0i0_1z[19:15]}), .A_WEN({GND, GND}), .A_REN(VCC), .A_WIDTH({GND, VCC, GND}), .A_WMODE({GND, VCC}), .A_BYPASS(VCC), .A_DOUT_EN(VCC), .A_DOUT_SRST_N(VCC), .A_DOUT_ARST_N(VCC), .B_ADDR({Oo0i0[11:0], GND, GND}), .B_BLK_EN({VCC, VCC, VCC}), .B_CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .B_DIN({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, Io0i0[19:15]}), .B_DOUT({NC128, NC127, NC126, NC125, NC124, NC123, NC122, NC121, NC120, NC119, NC118, NC117, NC116, NC115, NC114, oi0Io_oi0Io_0_3_B_DOUT[4:0]}), .B_WEN({GND, o10i0_i}), .B_REN(VCC), .B_WIDTH({GND, VCC, GND}), .B_WMODE({GND, VCC}), .B_BYPASS(VCC), .B_DOUT_EN(VCC), .B_DOUT_SRST_N(VCC), .B_DOUT_ARST_N(VCC), .ECC_EN(GND), .ECC_BYPASS(VCC), .SB_CORRECT(NC129), .DB_DETECT(NC130), .BUSY_FB(GND), .ACCESS_BUSY(NC131) ); defparam oi0Io_oi0Io_0_3.RAMINDEX="oi0Io[35:0]%4096-4096%36-36%SPEED%0%3%DUAL-PORT%ECC_EN-0"; // @28:542626 RAM1K20 oi0Io_oi0Io_0_4 ( .A_ADDR({oo0i0_1z[11:0], GND, GND}), .A_BLK_EN({VCC, VCC, VCC}), .A_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .A_DIN({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND}), .A_DOUT({NC146, NC145, NC144, NC143, NC142, NC141, NC140, NC139, NC138, NC137, NC136, NC135, NC134, NC133, NC132, io0i0_1z[24:20]}), .A_WEN({GND, GND}), .A_REN(VCC), .A_WIDTH({GND, VCC, GND}), .A_WMODE({GND, VCC}), .A_BYPASS(VCC), .A_DOUT_EN(VCC), .A_DOUT_SRST_N(VCC), .A_DOUT_ARST_N(VCC), .B_ADDR({Oo0i0[11:0], GND, GND}), .B_BLK_EN({VCC, VCC, VCC}), .B_CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .B_DIN({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, Io0i0[24:20]}), .B_DOUT({NC161, NC160, NC159, NC158, NC157, NC156, NC155, NC154, NC153, NC152, NC151, NC150, NC149, NC148, NC147, oi0Io_oi0Io_0_4_B_DOUT[4:0]}), .B_WEN({GND, o10i0_i}), .B_REN(VCC), .B_WIDTH({GND, VCC, GND}), .B_WMODE({GND, VCC}), .B_BYPASS(VCC), .B_DOUT_EN(VCC), .B_DOUT_SRST_N(VCC), .B_DOUT_ARST_N(VCC), .ECC_EN(GND), .ECC_BYPASS(VCC), .SB_CORRECT(NC162), .DB_DETECT(NC163), .BUSY_FB(GND), .ACCESS_BUSY(NC164) ); defparam oi0Io_oi0Io_0_4.RAMINDEX="oi0Io[35:0]%4096-4096%36-36%SPEED%0%4%DUAL-PORT%ECC_EN-0"; // @28:542626 RAM1K20 oi0Io_oi0Io_0_5 ( .A_ADDR({oo0i0_1z[11:0], GND, GND}), .A_BLK_EN({VCC, VCC, VCC}), .A_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .A_DIN({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND}), .A_DOUT({NC179, NC178, NC177, NC176, NC175, NC174, NC173, NC172, NC171, NC170, NC169, NC168, NC167, NC166, NC165, io0i0_1z[29:25]}), .A_WEN({GND, GND}), .A_REN(VCC), .A_WIDTH({GND, VCC, GND}), .A_WMODE({GND, VCC}), .A_BYPASS(VCC), .A_DOUT_EN(VCC), .A_DOUT_SRST_N(VCC), .A_DOUT_ARST_N(VCC), .B_ADDR({Oo0i0[11:0], GND, GND}), .B_BLK_EN({VCC, VCC, VCC}), .B_CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .B_DIN({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, Io0i0[29:25]}), .B_DOUT({NC194, NC193, NC192, NC191, NC190, NC189, NC188, NC187, NC186, NC185, NC184, NC183, NC182, NC181, NC180, oi0Io_oi0Io_0_5_B_DOUT[4:0]}), .B_WEN({GND, o10i0_i}), .B_REN(VCC), .B_WIDTH({GND, VCC, GND}), .B_WMODE({GND, VCC}), .B_BYPASS(VCC), .B_DOUT_EN(VCC), .B_DOUT_SRST_N(VCC), .B_DOUT_ARST_N(VCC), .ECC_EN(GND), .ECC_BYPASS(VCC), .SB_CORRECT(NC195), .DB_DETECT(NC196), .BUSY_FB(GND), .ACCESS_BUSY(NC197) ); defparam oi0Io_oi0Io_0_5.RAMINDEX="oi0Io[35:0]%4096-4096%36-36%SPEED%0%5%DUAL-PORT%ECC_EN-0"; // @28:542626 RAM1K20 oi0Io_oi0Io_0_6 ( .A_ADDR({oo0i0_1z[11:0], GND, GND}), .A_BLK_EN({VCC, VCC, VCC}), .A_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .A_DIN({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND}), .A_DOUT({NC212, NC211, NC210, NC209, NC208, NC207, NC206, NC205, NC204, NC203, NC202, NC201, NC200, NC199, NC198, io0i0_1z[34:30]}), .A_WEN({GND, GND}), .A_REN(VCC), .A_WIDTH({GND, VCC, GND}), .A_WMODE({GND, VCC}), .A_BYPASS(VCC), .A_DOUT_EN(VCC), .A_DOUT_SRST_N(VCC), .A_DOUT_ARST_N(VCC), .B_ADDR({Oo0i0[11:0], GND, GND}), .B_BLK_EN({VCC, VCC, VCC}), .B_CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .B_DIN({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, Io0i0[34:30]}), .B_DOUT({NC227, NC226, NC225, NC224, NC223, NC222, NC221, NC220, NC219, NC218, NC217, NC216, NC215, NC214, NC213, oi0Io_oi0Io_0_6_B_DOUT[4:0]}), .B_WEN({GND, o10i0_i}), .B_REN(VCC), .B_WIDTH({GND, VCC, GND}), .B_WMODE({GND, VCC}), .B_BYPASS(VCC), .B_DOUT_EN(VCC), .B_DOUT_SRST_N(VCC), .B_DOUT_ARST_N(VCC), .ECC_EN(GND), .ECC_BYPASS(VCC), .SB_CORRECT(NC228), .DB_DETECT(NC229), .BUSY_FB(GND), .ACCESS_BUSY(NC230) ); defparam oi0Io_oi0Io_0_6.RAMINDEX="oi0Io[35:0]%4096-4096%36-36%SPEED%0%6%DUAL-PORT%ECC_EN-0"; // @28:542626 RAM1K20 oi0Io_oi0Io_0_7 ( .A_ADDR({oo0i0_1z[11:0], GND, GND}), .A_BLK_EN({VCC, VCC, VCC}), .A_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .A_DIN({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND}), .A_DOUT({NC249, NC248, NC247, NC246, NC245, NC244, NC243, NC242, NC241, NC240, NC239, NC238, NC237, NC236, NC235, NC234, NC233, NC232, NC231, o01I1_0}), .A_WEN({GND, GND}), .A_REN(VCC), .A_WIDTH({GND, VCC, GND}), .A_WMODE({GND, VCC}), .A_BYPASS(GND), .A_DOUT_EN(un2_O1Il1_0), .A_DOUT_SRST_N(o0Il1), .A_DOUT_ARST_N(o0oI1_i), .B_ADDR({Oo0i0[11:0], GND, GND}), .B_BLK_EN({VCC, VCC, VCC}), .B_CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .B_DIN({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, Io0i0[35]}), .B_DOUT({NC264, NC263, NC262, NC261, NC260, NC259, NC258, NC257, NC256, NC255, NC254, NC253, NC252, NC251, NC250, oi0Io_oi0Io_0_7_B_DOUT[4:0]}), .B_WEN({GND, o10i0_i}), .B_REN(VCC), .B_WIDTH({GND, VCC, GND}), .B_WMODE({GND, VCC}), .B_BYPASS(VCC), .B_DOUT_EN(VCC), .B_DOUT_SRST_N(VCC), .B_DOUT_ARST_N(VCC), .ECC_EN(GND), .ECC_BYPASS(VCC), .SB_CORRECT(NC265), .DB_DETECT(NC266), .BUSY_FB(GND), .ACCESS_BUSY(NC267) ); defparam oi0Io_oi0Io_0_7.RAMINDEX="oi0Io[35:0]%4096-4096%36-36%SPEED%0%7%DUAL-PORT%ECC_EN-0"; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_RX4096X36_12s_26s_1s_1s_4s */ module CTSE_MSGMII_CNVTXI_26s ( iO001, oO001, Oi0i0, oI001_1z, II001, OI001, iIl0112, Ii0i0, li0i0, PF_IOD_CDR_CCC_C0_0_TX_CLK_G, iIli0_i, lI001_1z ) ; output [7:0] iO001 ; input [2:0] oO001 ; input [7:0] Oi0i0 ; output [2:0] oI001_1z ; output II001 ; output OI001 ; input iIl0112 ; input Ii0i0 ; input li0i0 ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; input iIli0_i ; output lI001_1z ; wire II001 ; wire OI001 ; wire iIl0112 ; wire Ii0i0 ; wire li0i0 ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire iIli0_i ; wire lI001_1z ; wire [9:0] l0001_Z; wire [9:0] O0001_Z; wire [9:0] i0001_Z; wire [9:0] I1001_Z; wire [9:0] O1001_Z; wire [9:0] i1001_Z; wire [9:0] o1001_Z; wire [9:0] l1001_Z; wire [9:0] o0001_Z; wire [7:0] iI001_Z; wire [3:0] il001_Z; wire [3:1] il001_3; wire [2:0] lo001_Z; wire [1:0] ol001_Z; wire [2:0] ll001_Z; wire [3:0] Ol001_Z; wire [8:0] un7_ool01_Z; wire [8:0] ool01_4_Z; wire [5:5] ool01_1_0_Z; wire [9:0] ool01_3_Z; wire [2:2] ool01_5_1_Z; wire [2:2] un31_ool01_Z; wire [2:2] ool01_5_Z; wire [2:0] I0001_Z; wire [9:0] ool01_2_Z; wire [9:0] ool01_1_Z; wire [9:1] ool01_0_Z; wire VCC ; wire N_263 ; wire un2_Oo001_2_i ; wire GND ; wire l00015_Z ; wire l00017_Z ; wire l00019_Z ; wire N_285_i ; wire l00018_Z ; wire N_296_i ; wire l000112_Z ; wire l000111_Z ; wire N_710_i ; wire un2_Oo001_4_Z ; wire N_4 ; wire N_711_i ; wire N_307_i ; wire N_318_i ; wire l000110_Z ; wire N_329_i ; wire l00016_Z ; wire N_340_i ; wire N_712_i ; wire N_351_i ; wire N_362_i ; wire un29_ool01_Z ; wire un17_ool01_Z ; wire un5_ool01_Z ; wire un18_Oo001_1_Z ; wire un47_ool01_1_Z ; wire un11_ool01_Z ; wire un41_ool01_Z ; wire un35_ool01_Z ; wire un9_Io001_Z ; wire un12_O0001_Z ; wire Oo001_0_Z ; wire un18_Oo001_3_Z ; wire un2_Oo001_2_1_Z ; wire un18_Oo001_Z ; // @28:464870 SLE lI001 ( .Q(lI001_1z), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_263), .EN(un2_Oo001_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \l0001[0] ( .Q(l0001_Z[0]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[0]), .EN(l00015_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \i0001[5] ( .Q(i0001_Z[5]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[5]), .EN(l00017_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \i0001[4] ( .Q(i0001_Z[4]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[4]), .EN(l00017_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \i0001[3] ( .Q(i0001_Z[3]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[3]), .EN(l00017_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \i0001[2] ( .Q(i0001_Z[2]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[2]), .EN(l00017_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \i0001[1] ( .Q(i0001_Z[1]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[1]), .EN(l00017_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \i0001[0] ( .Q(i0001_Z[0]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[0]), .EN(l00017_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \l0001[9] ( .Q(l0001_Z[9]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[9]), .EN(l00015_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \l0001[8] ( .Q(l0001_Z[8]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[8]), .EN(l00015_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \l0001[7] ( .Q(l0001_Z[7]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[7]), .EN(l00015_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \l0001[6] ( .Q(l0001_Z[6]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[6]), .EN(l00015_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \l0001[5] ( .Q(l0001_Z[5]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[5]), .EN(l00015_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \l0001[4] ( .Q(l0001_Z[4]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[4]), .EN(l00015_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \l0001[3] ( .Q(l0001_Z[3]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[3]), .EN(l00015_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \l0001[2] ( .Q(l0001_Z[2]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[2]), .EN(l00015_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \l0001[1] ( .Q(l0001_Z[1]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[1]), .EN(l00015_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \I1001[0] ( .Q(I1001_Z[0]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[0]), .EN(l00019_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \O1001[9] ( .Q(O1001_Z[9]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_285_i), .EN(l00018_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \O1001[8] ( .Q(O1001_Z[8]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_296_i), .EN(l00018_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \O1001[7] ( .Q(O1001_Z[7]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[7]), .EN(l00018_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \O1001[6] ( .Q(O1001_Z[6]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[6]), .EN(l00018_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \O1001[5] ( .Q(O1001_Z[5]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[5]), .EN(l00018_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \O1001[4] ( .Q(O1001_Z[4]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[4]), .EN(l00018_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \O1001[3] ( .Q(O1001_Z[3]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[3]), .EN(l00018_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \O1001[2] ( .Q(O1001_Z[2]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[2]), .EN(l00018_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \O1001[1] ( .Q(O1001_Z[1]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[1]), .EN(l00018_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \O1001[0] ( .Q(O1001_Z[0]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[0]), .EN(l00018_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \i0001[9] ( .Q(i0001_Z[9]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[9]), .EN(l00017_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \i0001[8] ( .Q(i0001_Z[8]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[8]), .EN(l00017_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \i0001[7] ( .Q(i0001_Z[7]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[7]), .EN(l00017_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \i0001[6] ( .Q(i0001_Z[6]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[6]), .EN(l00017_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \i1001[5] ( .Q(i1001_Z[5]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[5]), .EN(l000112_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \i1001[4] ( .Q(i1001_Z[4]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[4]), .EN(l000112_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \i1001[3] ( .Q(i1001_Z[3]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[3]), .EN(l000112_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \i1001[2] ( .Q(i1001_Z[2]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[2]), .EN(l000112_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \i1001[1] ( .Q(i1001_Z[1]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[1]), .EN(l000112_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \i1001[0] ( .Q(i1001_Z[0]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[0]), .EN(l000112_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \I1001[9] ( .Q(I1001_Z[9]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[9]), .EN(l00019_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \I1001[8] ( .Q(I1001_Z[8]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[8]), .EN(l00019_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \I1001[7] ( .Q(I1001_Z[7]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[7]), .EN(l00019_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \I1001[6] ( .Q(I1001_Z[6]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[6]), .EN(l00019_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \I1001[5] ( .Q(I1001_Z[5]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[5]), .EN(l00019_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \I1001[4] ( .Q(I1001_Z[4]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[4]), .EN(l00019_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \I1001[3] ( .Q(I1001_Z[3]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[3]), .EN(l00019_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \I1001[2] ( .Q(I1001_Z[2]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[2]), .EN(l00019_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \I1001[1] ( .Q(I1001_Z[1]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[1]), .EN(l00019_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \o1001[7] ( .Q(o1001_Z[7]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[7]), .EN(l000111_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \o1001[6] ( .Q(o1001_Z[6]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[6]), .EN(l000111_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \o1001[5] ( .Q(o1001_Z[5]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[5]), .EN(l000111_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \o1001[4] ( .Q(o1001_Z[4]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[4]), .EN(l000111_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \o1001[3] ( .Q(o1001_Z[3]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[3]), .EN(l000111_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \o1001[2] ( .Q(o1001_Z[2]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[2]), .EN(l000111_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \o1001[1] ( .Q(o1001_Z[1]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[1]), .EN(l000111_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \o1001[0] ( .Q(o1001_Z[0]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[0]), .EN(l000111_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464957 SLE \oI001[2] ( .Q(oI001_1z[2]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_710_i), .EN(un2_Oo001_4_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464957 SLE \oI001[1] ( .Q(oI001_1z[1]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_4), .EN(un2_Oo001_4_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464957 SLE \oI001[0] ( .Q(oI001_1z[0]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_711_i), .EN(un2_Oo001_4_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \i1001[9] ( .Q(i1001_Z[9]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_307_i), .EN(l000112_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \i1001[8] ( .Q(i1001_Z[8]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_318_i), .EN(l000112_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \i1001[7] ( .Q(i1001_Z[7]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[7]), .EN(l000112_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \i1001[6] ( .Q(i1001_Z[6]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[6]), .EN(l000112_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \l1001[2] ( .Q(l1001_Z[2]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[2]), .EN(l000110_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \l1001[1] ( .Q(l1001_Z[1]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[1]), .EN(l000110_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \l1001[0] ( .Q(l1001_Z[0]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[0]), .EN(l000110_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \o0001[9] ( .Q(o0001_Z[9]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_329_i), .EN(l00016_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \o0001[8] ( .Q(o0001_Z[8]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_340_i), .EN(l00016_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \o0001[7] ( .Q(o0001_Z[7]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[7]), .EN(l00016_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \o0001[6] ( .Q(o0001_Z[6]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[6]), .EN(l00016_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \o0001[5] ( .Q(o0001_Z[5]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[5]), .EN(l00016_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \o0001[4] ( .Q(o0001_Z[4]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[4]), .EN(l00016_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \o0001[3] ( .Q(o0001_Z[3]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[3]), .EN(l00016_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \o0001[2] ( .Q(o0001_Z[2]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[2]), .EN(l00016_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \o0001[1] ( .Q(o0001_Z[1]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[1]), .EN(l00016_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \o0001[0] ( .Q(o0001_Z[0]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[0]), .EN(l00016_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \o1001[9] ( .Q(o1001_Z[9]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[9]), .EN(l000111_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \o1001[8] ( .Q(o1001_Z[8]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[8]), .EN(l000111_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464210 SLE \iI001[3] ( .Q(iI001_Z[3]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Oi0i0[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464210 SLE \iI001[2] ( .Q(iI001_Z[2]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Oi0i0[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464210 SLE \iI001[1] ( .Q(iI001_Z[1]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Oi0i0[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464210 SLE \iI001[0] ( .Q(iI001_Z[0]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Oi0i0[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464381 SLE \il001[3] ( .Q(il001_Z[3]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il001_3[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464381 SLE \il001[2] ( .Q(il001_Z[2]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il001_3[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464381 SLE \il001[1] ( .Q(il001_Z[1]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il001_3[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464381 SLE \il001[0] ( .Q(il001_Z[0]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_712_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \l1001[9] ( .Q(l1001_Z[9]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_351_i), .EN(l000110_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \l1001[8] ( .Q(l1001_Z[8]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_362_i), .EN(l000110_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \l1001[7] ( .Q(l1001_Z[7]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[7]), .EN(l000110_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \l1001[6] ( .Q(l1001_Z[6]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[6]), .EN(l000110_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \l1001[5] ( .Q(l1001_Z[5]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[5]), .EN(l000110_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \l1001[4] ( .Q(l1001_Z[4]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[4]), .EN(l000110_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464581 SLE \l1001[3] ( .Q(l1001_Z[3]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0001_Z[3]), .EN(l000110_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464918 SLE \lo001[1] ( .Q(lo001_Z[1]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lo001_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464918 SLE \lo001[0] ( .Q(lo001_Z[0]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lI001_1z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464344 SLE \ol001[1] ( .Q(ol001_Z[1]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ol001_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464344 SLE \ol001[0] ( .Q(ol001_Z[0]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(li0i0), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464305 SLE \ll001[2] ( .Q(ll001_Z[2]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ll001_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464305 SLE \ll001[1] ( .Q(ll001_Z[1]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ll001_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464305 SLE \ll001[0] ( .Q(ll001_Z[0]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Ii0i0), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464240 SLE \Ol001[3] ( .Q(Ol001_Z[3]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iI001_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464240 SLE \Ol001[2] ( .Q(Ol001_Z[2]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iI001_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464240 SLE \Ol001[1] ( .Q(Ol001_Z[1]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iI001_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464240 SLE \Ol001[0] ( .Q(Ol001_Z[0]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iI001_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464210 SLE \iI001[7] ( .Q(iI001_Z[7]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Oi0i0[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464210 SLE \iI001[6] ( .Q(iI001_Z[6]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Oi0i0[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464210 SLE \iI001[5] ( .Q(iI001_Z[5]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Oi0i0[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464210 SLE \iI001[4] ( .Q(iI001_Z[4]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Oi0i0[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464918 SLE \lo001[2] ( .Q(lo001_Z[2]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lo001_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:464449 CFG4 \O0001[3] ( .A(iIl0112), .B(Ol001_Z[3]), .C(iI001_Z[3]), .D(il001_Z[0]), .Y(O0001_Z[3]) ); defparam \O0001[3] .INIT=16'hE4A0; // @28:464449 CFG4 \O0001[4] ( .A(iIl0112), .B(iI001_Z[4]), .C(iI001_Z[0]), .D(il001_Z[0]), .Y(O0001_Z[4]) ); defparam \O0001[4] .INIT=16'hD888; // @28:464449 CFG4 \O0001[5] ( .A(iIl0112), .B(iI001_Z[5]), .C(iI001_Z[1]), .D(il001_Z[0]), .Y(O0001_Z[5]) ); defparam \O0001[5] .INIT=16'hD888; // @28:464449 CFG4 \O0001[6] ( .A(iIl0112), .B(iI001_Z[6]), .C(iI001_Z[2]), .D(il001_Z[0]), .Y(O0001_Z[6]) ); defparam \O0001[6] .INIT=16'hD888; // @28:464449 CFG4 \O0001[2] ( .A(iIl0112), .B(Ol001_Z[2]), .C(iI001_Z[2]), .D(il001_Z[0]), .Y(O0001_Z[2]) ); defparam \O0001[2] .INIT=16'hE4A0; // @28:464449 CFG4 \O0001[0] ( .A(iIl0112), .B(Ol001_Z[0]), .C(iI001_Z[0]), .D(il001_Z[0]), .Y(O0001_Z[0]) ); defparam \O0001[0] .INIT=16'hE4A0; // @28:464449 CFG4 \O0001[7] ( .A(iIl0112), .B(iI001_Z[7]), .C(iI001_Z[3]), .D(il001_Z[0]), .Y(O0001_Z[7]) ); defparam \O0001[7] .INIT=16'hD888; // @28:464449 CFG4 \O0001[1] ( .A(iIl0112), .B(Ol001_Z[1]), .C(iI001_Z[1]), .D(il001_Z[0]), .Y(O0001_Z[1]) ); defparam \O0001[1] .INIT=16'hE4A0; // @28:465046 CFG4 \un7_ool01[8] ( .A(oO001[1]), .B(oO001[2]), .C(o0001_Z[8]), .D(oO001[0]), .Y(un7_ool01_Z[8]) ); defparam \un7_ool01[8] .INIT=16'h1000; // @28:465031 CFG4 \ool01[5] ( .A(ool01_4_Z[5]), .B(ool01_1_0_Z[5]), .C(I1001_Z[5]), .D(un29_ool01_Z), .Y(iO001[5]) ); defparam \ool01[5] .INIT=16'hFBBB; // @28:465031 CFG3 \ool01_1_0[5] ( .A(ool01_3_Z[5]), .B(i0001_Z[5]), .C(un17_ool01_Z), .Y(ool01_1_0_Z[5]) ); defparam \ool01_1_0[5] .INIT=8'h15; // @28:465031 CFG4 \ool01_5[2] ( .A(un17_ool01_Z), .B(i0001_Z[2]), .C(ool01_5_1_Z[2]), .D(un31_ool01_Z[2]), .Y(ool01_5_Z[2]) ); defparam \ool01_5[2] .INIT=16'hFF8F; // @28:465031 CFG4 \ool01_5_1[2] ( .A(l0001_Z[2]), .B(I1001_Z[2]), .C(un29_ool01_Z), .D(un5_ool01_Z), .Y(ool01_5_1_Z[2]) ); defparam \ool01_5_1[2] .INIT=16'h153F; // @28:464789 CFG2 un18_Oo001_1 ( .A(lo001_Z[0]), .B(ll001_Z[2]), .Y(un18_Oo001_1_Z) ); defparam un18_Oo001_1.INIT=4'h1; // @28:465139 CFG2 un47_ool01_1 ( .A(oO001[0]), .B(oO001[1]), .Y(un47_ool01_1_Z) ); defparam un47_ool01_1.INIT=4'h8; // @28:465049 CFG3 un11_ool01 ( .A(oO001[0]), .B(oO001[2]), .C(oO001[1]), .Y(un11_ool01_Z) ); defparam un11_ool01.INIT=8'h02; // @28:465124 CFG3 un41_ool01 ( .A(oO001[0]), .B(oO001[2]), .C(oO001[1]), .Y(un41_ool01_Z) ); defparam un41_ool01.INIT=8'h40; // @28:465064 CFG3 un17_ool01 ( .A(oO001[0]), .B(oO001[2]), .C(oO001[1]), .Y(un17_ool01_Z) ); defparam un17_ool01.INIT=8'h10; // @28:465094 CFG3 un29_ool01 ( .A(oO001[0]), .B(oO001[2]), .C(oO001[1]), .Y(un29_ool01_Z) ); defparam un29_ool01.INIT=8'h04; // @28:465020 CFG3 un35_ool01 ( .A(oO001[0]), .B(oO001[2]), .C(oO001[1]), .Y(un35_ool01_Z) ); defparam un35_ool01.INIT=8'h08; // @28:465034 CFG3 un5_ool01 ( .A(oO001[0]), .B(oO001[2]), .C(oO001[1]), .Y(un5_ool01_Z) ); defparam un5_ool01.INIT=8'h01; // @28:464839 CFG2 un9_Io001 ( .A(ll001_Z[2]), .B(iIl0112), .Y(un9_Io001_Z) ); defparam un9_Io001.INIT=4'h2; // @28:464479 CFG2 un12_O0001 ( .A(il001_Z[0]), .B(iIl0112), .Y(un12_O0001_Z) ); defparam un12_O0001.INIT=4'h2; // @28:464747 CFG3 Oo001_0 ( .A(iIl0112), .B(ll001_Z[1]), .C(ll001_Z[0]), .Y(Oo001_0_Z) ); defparam Oo001_0.INIT=8'hE4; // @28:464789 CFG4 un18_Oo001_3 ( .A(lo001_Z[2]), .B(lo001_Z[1]), .C(ll001_Z[1]), .D(il001_Z[0]), .Y(un18_Oo001_3_Z) ); defparam un18_Oo001_3.INIT=16'h0100; // @28:465046 CFG2 \un7_ool01[5] ( .A(un11_ool01_Z), .B(o0001_Z[5]), .Y(un7_ool01_Z[5]) ); defparam \un7_ool01[5] .INIT=4'h8; // @28:465046 CFG2 \un7_ool01[0] ( .A(un11_ool01_Z), .B(o0001_Z[0]), .Y(un7_ool01_Z[0]) ); defparam \un7_ool01[0] .INIT=4'h8; // @28:465106 CFG2 \un31_ool01[2] ( .A(un35_ool01_Z), .B(l1001_Z[2]), .Y(un31_ool01_Z[2]) ); defparam \un31_ool01[2] .INIT=4'h8; // @28:465046 CFG2 \un7_ool01[7] ( .A(un11_ool01_Z), .B(o0001_Z[7]), .Y(un7_ool01_Z[7]) ); defparam \un7_ool01[7] .INIT=4'h8; // @28:465046 CFG2 \un7_ool01[4] ( .A(un11_ool01_Z), .B(o0001_Z[4]), .Y(un7_ool01_Z[4]) ); defparam \un7_ool01[4] .INIT=4'h8; // @28:464539 CFG3 \I0001[1] ( .A(iIl0112), .B(il001_Z[2]), .C(il001_Z[1]), .Y(I0001_Z[1]) ); defparam \I0001[1] .INIT=8'hE4; // @28:464539 CFG3 \I0001[2] ( .A(iIl0112), .B(il001_Z[3]), .C(il001_Z[2]), .Y(I0001_Z[2]) ); defparam \I0001[2] .INIT=8'hE4; // @28:464539 CFG3 \I0001[0] ( .A(iIl0112), .B(il001_Z[1]), .C(il001_Z[0]), .Y(I0001_Z[0]) ); defparam \I0001[0] .INIT=8'hE4; // @28:464870 CFG4 lI001_RNO ( .A(ll001_Z[1]), .B(iIl0112), .C(un18_Oo001_1_Z), .D(ll001_Z[0]), .Y(N_263) ); defparam lI001_RNO.INIT=16'hFE72; // @28:465031 CFG4 \ool01_3[8] ( .A(l1001_Z[8]), .B(l0001_Z[8]), .C(un35_ool01_Z), .D(un5_ool01_Z), .Y(ool01_3_Z[8]) ); defparam \ool01_3[8] .INIT=16'hECA0; // @28:465031 CFG4 \ool01_2[8] ( .A(i0001_Z[8]), .B(I1001_Z[8]), .C(un29_ool01_Z), .D(un17_ool01_Z), .Y(ool01_2_Z[8]) ); defparam \ool01_2[8] .INIT=16'hEAC0; // @28:465031 CFG4 \ool01_1[8] ( .A(i1001_Z[8]), .B(O1001_Z[8]), .C(oO001[2]), .D(un47_ool01_1_Z), .Y(ool01_1_Z[8]) ); defparam \ool01_1[8] .INIT=16'hAC00; // @28:465031 CFG4 \ool01_3[0] ( .A(l1001_Z[0]), .B(l0001_Z[0]), .C(un35_ool01_Z), .D(un5_ool01_Z), .Y(ool01_3_Z[0]) ); defparam \ool01_3[0] .INIT=16'hECA0; // @28:465031 CFG4 \ool01_2[0] ( .A(i0001_Z[0]), .B(I1001_Z[0]), .C(un29_ool01_Z), .D(un17_ool01_Z), .Y(ool01_2_Z[0]) ); defparam \ool01_2[0] .INIT=16'hEAC0; // @28:465031 CFG4 \ool01_1[0] ( .A(i1001_Z[0]), .B(O1001_Z[0]), .C(oO001[2]), .D(un47_ool01_1_Z), .Y(ool01_1_Z[0]) ); defparam \ool01_1[0] .INIT=16'hAC00; // @28:465031 CFG4 \ool01_3[6] ( .A(l1001_Z[6]), .B(l0001_Z[6]), .C(un35_ool01_Z), .D(un5_ool01_Z), .Y(ool01_3_Z[6]) ); defparam \ool01_3[6] .INIT=16'hECA0; // @28:465031 CFG4 \ool01_2[6] ( .A(i0001_Z[6]), .B(I1001_Z[6]), .C(un29_ool01_Z), .D(un17_ool01_Z), .Y(ool01_2_Z[6]) ); defparam \ool01_2[6] .INIT=16'hEAC0; // @28:465031 CFG4 \ool01_1[6] ( .A(i1001_Z[6]), .B(O1001_Z[6]), .C(oO001[2]), .D(un47_ool01_1_Z), .Y(ool01_1_Z[6]) ); defparam \ool01_1[6] .INIT=16'hAC00; // @28:465031 CFG4 \ool01_0[6] ( .A(o0001_Z[6]), .B(o1001_Z[6]), .C(un41_ool01_Z), .D(un11_ool01_Z), .Y(ool01_0_Z[6]) ); defparam \ool01_0[6] .INIT=16'hEAC0; // @28:465031 CFG4 \ool01_3[5] ( .A(l1001_Z[5]), .B(l0001_Z[5]), .C(un35_ool01_Z), .D(un5_ool01_Z), .Y(ool01_3_Z[5]) ); defparam \ool01_3[5] .INIT=16'hECA0; // @28:465031 CFG4 \ool01_1[5] ( .A(i1001_Z[5]), .B(O1001_Z[5]), .C(oO001[2]), .D(un47_ool01_1_Z), .Y(ool01_1_Z[5]) ); defparam \ool01_1[5] .INIT=16'hAC00; // @28:465031 CFG4 \ool01_3[9] ( .A(l1001_Z[9]), .B(l0001_Z[9]), .C(un35_ool01_Z), .D(un5_ool01_Z), .Y(ool01_3_Z[9]) ); defparam \ool01_3[9] .INIT=16'hECA0; // @28:465031 CFG4 \ool01_2[9] ( .A(i0001_Z[9]), .B(I1001_Z[9]), .C(un29_ool01_Z), .D(un17_ool01_Z), .Y(ool01_2_Z[9]) ); defparam \ool01_2[9] .INIT=16'hEAC0; // @28:465031 CFG4 \ool01_1[9] ( .A(i1001_Z[9]), .B(O1001_Z[9]), .C(oO001[2]), .D(un47_ool01_1_Z), .Y(ool01_1_Z[9]) ); defparam \ool01_1[9] .INIT=16'hAC00; // @28:465031 CFG4 \ool01_0[9] ( .A(o0001_Z[9]), .B(o1001_Z[9]), .C(un41_ool01_Z), .D(un11_ool01_Z), .Y(ool01_0_Z[9]) ); defparam \ool01_0[9] .INIT=16'hEAC0; // @28:465031 CFG4 \ool01_3[7] ( .A(l1001_Z[7]), .B(l0001_Z[7]), .C(un35_ool01_Z), .D(un5_ool01_Z), .Y(ool01_3_Z[7]) ); defparam \ool01_3[7] .INIT=16'hECA0; // @28:465031 CFG4 \ool01_2[7] ( .A(i0001_Z[7]), .B(I1001_Z[7]), .C(un29_ool01_Z), .D(un17_ool01_Z), .Y(ool01_2_Z[7]) ); defparam \ool01_2[7] .INIT=16'hEAC0; // @28:465031 CFG4 \ool01_1[7] ( .A(i1001_Z[7]), .B(O1001_Z[7]), .C(oO001[2]), .D(un47_ool01_1_Z), .Y(ool01_1_Z[7]) ); defparam \ool01_1[7] .INIT=16'hAC00; // @28:465031 CFG4 \ool01_3[4] ( .A(l1001_Z[4]), .B(l0001_Z[4]), .C(un35_ool01_Z), .D(un5_ool01_Z), .Y(ool01_3_Z[4]) ); defparam \ool01_3[4] .INIT=16'hECA0; // @28:465031 CFG4 \ool01_2[4] ( .A(i0001_Z[4]), .B(I1001_Z[4]), .C(un29_ool01_Z), .D(un17_ool01_Z), .Y(ool01_2_Z[4]) ); defparam \ool01_2[4] .INIT=16'hEAC0; // @28:465031 CFG4 \ool01_1[4] ( .A(i1001_Z[4]), .B(O1001_Z[4]), .C(oO001[2]), .D(un47_ool01_1_Z), .Y(ool01_1_Z[4]) ); defparam \ool01_1[4] .INIT=16'hAC00; // @28:465031 CFG4 \ool01_1[2] ( .A(i1001_Z[2]), .B(O1001_Z[2]), .C(oO001[2]), .D(un47_ool01_1_Z), .Y(ool01_1_Z[2]) ); defparam \ool01_1[2] .INIT=16'hAC00; // @28:465031 CFG4 \ool01_0[2] ( .A(o0001_Z[2]), .B(o1001_Z[2]), .C(un41_ool01_Z), .D(un11_ool01_Z), .Y(ool01_0_Z[2]) ); defparam \ool01_0[2] .INIT=16'hEAC0; // @28:465031 CFG4 \ool01_3[3] ( .A(l1001_Z[3]), .B(l0001_Z[3]), .C(un35_ool01_Z), .D(un5_ool01_Z), .Y(ool01_3_Z[3]) ); defparam \ool01_3[3] .INIT=16'hECA0; // @28:465031 CFG4 \ool01_2[3] ( .A(i0001_Z[3]), .B(I1001_Z[3]), .C(un29_ool01_Z), .D(un17_ool01_Z), .Y(ool01_2_Z[3]) ); defparam \ool01_2[3] .INIT=16'hEAC0; // @28:465031 CFG4 \ool01_1[3] ( .A(i1001_Z[3]), .B(O1001_Z[3]), .C(oO001[2]), .D(un47_ool01_1_Z), .Y(ool01_1_Z[3]) ); defparam \ool01_1[3] .INIT=16'hAC00; // @28:465031 CFG4 \ool01_0[3] ( .A(o0001_Z[3]), .B(o1001_Z[3]), .C(un41_ool01_Z), .D(un11_ool01_Z), .Y(ool01_0_Z[3]) ); defparam \ool01_0[3] .INIT=16'hEAC0; // @28:465031 CFG4 \ool01_3[1] ( .A(l1001_Z[1]), .B(l0001_Z[1]), .C(un35_ool01_Z), .D(un5_ool01_Z), .Y(ool01_3_Z[1]) ); defparam \ool01_3[1] .INIT=16'hECA0; // @28:465031 CFG4 \ool01_2[1] ( .A(i0001_Z[1]), .B(I1001_Z[1]), .C(un29_ool01_Z), .D(un17_ool01_Z), .Y(ool01_2_Z[1]) ); defparam \ool01_2[1] .INIT=16'hEAC0; // @28:465031 CFG4 \ool01_1[1] ( .A(i1001_Z[1]), .B(O1001_Z[1]), .C(oO001[2]), .D(un47_ool01_1_Z), .Y(ool01_1_Z[1]) ); defparam \ool01_1[1] .INIT=16'hAC00; // @28:465031 CFG4 \ool01_0[1] ( .A(o0001_Z[1]), .B(o1001_Z[1]), .C(un41_ool01_Z), .D(un11_ool01_Z), .Y(ool01_0_Z[1]) ); defparam \ool01_0[1] .INIT=16'hEAC0; // @28:464158 CFG4 un2_Oo001_2_1 ( .A(lo001_Z[0]), .B(un9_Io001_Z), .C(ll001_Z[1]), .D(lI001_1z), .Y(un2_Oo001_2_1_Z) ); defparam un2_Oo001_2_1.INIT=16'h0103; // @28:464789 CFG4 un18_Oo001 ( .A(lI001_1z), .B(ll001_Z[0]), .C(un18_Oo001_1_Z), .D(un18_Oo001_3_Z), .Y(un18_Oo001_Z) ); defparam un18_Oo001.INIT=16'h1000; // @28:464449 CFG4 \O0001[8] ( .A(ll001_Z[1]), .B(iIl0112), .C(un12_O0001_Z), .D(ll001_Z[0]), .Y(O0001_Z[8]) ); defparam \O0001[8] .INIT=16'hFCA0; // @28:465020 CFG3 \oI001_RNO[1] ( .A(iIl0112), .B(il001_Z[1]), .C(I0001_Z[1]), .Y(N_4) ); defparam \oI001_RNO[1] .INIT=8'hB4; // @28:464449 CFG4 \O0001[9] ( .A(ol001_Z[1]), .B(iIl0112), .C(un12_O0001_Z), .D(ol001_Z[0]), .Y(O0001_Z[9]) ); defparam \O0001[9] .INIT=16'hFCA0; // @28:464391 CFG4 \il001_3_1.SUM[0] ( .A(iIl0112), .B(ll001_Z[1]), .C(ll001_Z[0]), .D(il001_Z[0]), .Y(N_712_i) ); defparam \il001_3_1.SUM[0] .INIT=16'h10FF; // @28:464581 CFG4 \O1001_RNO[9] ( .A(ol001_Z[1]), .B(ol001_Z[0]), .C(il001_Z[2]), .D(il001_Z[0]), .Y(N_285_i) ); defparam \O1001_RNO[9] .INIT=16'hEC00; // @28:464581 CFG4 \O1001_RNO[8] ( .A(ll001_Z[1]), .B(il001_Z[2]), .C(il001_Z[0]), .D(ll001_Z[0]), .Y(N_296_i) ); defparam \O1001_RNO[8] .INIT=16'hF080; // @28:464581 CFG4 \o0001_RNO[9] ( .A(ol001_Z[1]), .B(ol001_Z[0]), .C(il001_Z[1]), .D(il001_Z[0]), .Y(N_329_i) ); defparam \o0001_RNO[9] .INIT=16'hEC00; // @28:464581 CFG4 \o0001_RNO[8] ( .A(ll001_Z[1]), .B(il001_Z[1]), .C(il001_Z[0]), .D(ll001_Z[0]), .Y(N_340_i) ); defparam \o0001_RNO[8] .INIT=16'hF080; // @28:464581 CFG4 \l1001_RNO[9] ( .A(ol001_Z[1]), .B(ol001_Z[0]), .C(il001_Z[2]), .D(il001_Z[0]), .Y(N_351_i) ); defparam \l1001_RNO[9] .INIT=16'hCE00; // @28:464581 CFG4 \l1001_RNO[8] ( .A(ll001_Z[1]), .B(il001_Z[2]), .C(il001_Z[0]), .D(ll001_Z[0]), .Y(N_362_i) ); defparam \l1001_RNO[8] .INIT=16'hF020; // @28:465031 CFG4 \ool01_4[8] ( .A(un7_ool01_Z[8]), .B(o1001_Z[8]), .C(ool01_1_Z[8]), .D(un41_ool01_Z), .Y(ool01_4_Z[8]) ); defparam \ool01_4[8] .INIT=16'hFEFA; // @28:465031 CFG4 \ool01_4[0] ( .A(un7_ool01_Z[0]), .B(ool01_1_Z[0]), .C(o1001_Z[0]), .D(un41_ool01_Z), .Y(ool01_4_Z[0]) ); defparam \ool01_4[0] .INIT=16'hFEEE; // @28:465031 CFG4 \ool01_4[5] ( .A(un7_ool01_Z[5]), .B(ool01_1_Z[5]), .C(o1001_Z[5]), .D(un41_ool01_Z), .Y(ool01_4_Z[5]) ); defparam \ool01_4[5] .INIT=16'hFEEE; // @28:465031 CFG4 \ool01_4[7] ( .A(un7_ool01_Z[7]), .B(ool01_1_Z[7]), .C(o1001_Z[7]), .D(un41_ool01_Z), .Y(ool01_4_Z[7]) ); defparam \ool01_4[7] .INIT=16'hFEEE; // @28:465031 CFG4 \ool01_4[4] ( .A(un7_ool01_Z[4]), .B(ool01_1_Z[4]), .C(o1001_Z[4]), .D(un41_ool01_Z), .Y(ool01_4_Z[4]) ); defparam \ool01_4[4] .INIT=16'hFEEE; // @28:464678 CFG3 l00017 ( .A(I0001_Z[2]), .B(I0001_Z[1]), .C(I0001_Z[0]), .Y(l00017_Z) ); defparam l00017.INIT=8'h04; // @28:464714 CFG3 l000111 ( .A(I0001_Z[2]), .B(I0001_Z[1]), .C(I0001_Z[0]), .Y(l000111_Z) ); defparam l000111.INIT=8'h08; // @28:464696 CFG3 l00019 ( .A(I0001_Z[2]), .B(I0001_Z[1]), .C(I0001_Z[0]), .Y(l00019_Z) ); defparam l00019.INIT=8'h02; // @28:464705 CFG3 l000110 ( .A(I0001_Z[2]), .B(I0001_Z[1]), .C(I0001_Z[0]), .Y(l000110_Z) ); defparam l000110.INIT=8'h20; // @28:464660 CFG3 l00015 ( .A(I0001_Z[2]), .B(I0001_Z[1]), .C(I0001_Z[0]), .Y(l00015_Z) ); defparam l00015.INIT=8'h01; // @28:464669 CFG3 l00016 ( .A(I0001_Z[2]), .B(I0001_Z[1]), .C(I0001_Z[0]), .Y(l00016_Z) ); defparam l00016.INIT=8'h10; // @28:464391 CFG2 \il001_3_1.SUM[1] ( .A(N_712_i), .B(il001_Z[1]), .Y(il001_3[1]) ); defparam \il001_3_1.SUM[1] .INIT=4'h9; // @28:464687 CFG3 l00018 ( .A(I0001_Z[2]), .B(I0001_Z[1]), .C(I0001_Z[0]), .Y(l00018_Z) ); defparam l00018.INIT=8'h40; // @28:464723 CFG3 l000112 ( .A(I0001_Z[2]), .B(I0001_Z[1]), .C(I0001_Z[0]), .Y(l000112_Z) ); defparam l000112.INIT=8'h80; // @28:464957 CFG2 \oI001_RNO[0] ( .A(I0001_Z[0]), .B(iIl0112), .Y(N_711_i) ); defparam \oI001_RNO[0] .INIT=4'h9; // @28:464581 CFG4 \i1001_RNO[9] ( .A(iIl0112), .B(ol001_Z[1]), .C(ol001_Z[0]), .D(il001_Z[0]), .Y(N_307_i) ); defparam \i1001_RNO[9] .INIT=16'hF400; // @28:464581 CFG4 \i1001_RNO[8] ( .A(iIl0112), .B(ll001_Z[1]), .C(ll001_Z[0]), .D(il001_Z[0]), .Y(N_318_i) ); defparam \i1001_RNO[8] .INIT=16'hF400; // @28:465031 CFG4 \ool01[1] ( .A(ool01_1_Z[1]), .B(ool01_0_Z[1]), .C(ool01_3_Z[1]), .D(ool01_2_Z[1]), .Y(iO001[1]) ); defparam \ool01[1] .INIT=16'hFFFE; // @28:465031 CFG3 \ool01[8] ( .A(ool01_2_Z[8]), .B(ool01_4_Z[8]), .C(ool01_3_Z[8]), .Y(OI001) ); defparam \ool01[8] .INIT=8'hFE; // @28:465031 CFG3 \ool01[0] ( .A(ool01_2_Z[0]), .B(ool01_4_Z[0]), .C(ool01_3_Z[0]), .Y(iO001[0]) ); defparam \ool01[0] .INIT=8'hFE; // @28:465031 CFG3 \ool01[7] ( .A(ool01_2_Z[7]), .B(ool01_4_Z[7]), .C(ool01_3_Z[7]), .Y(iO001[7]) ); defparam \ool01[7] .INIT=8'hFE; // @28:465031 CFG3 \ool01[4] ( .A(ool01_2_Z[4]), .B(ool01_4_Z[4]), .C(ool01_3_Z[4]), .Y(iO001[4]) ); defparam \ool01[4] .INIT=8'hFE; // @28:465031 CFG3 \ool01[2] ( .A(ool01_0_Z[2]), .B(ool01_5_Z[2]), .C(ool01_1_Z[2]), .Y(iO001[2]) ); defparam \ool01[2] .INIT=8'hFE; // @28:465031 CFG4 \ool01[9] ( .A(ool01_1_Z[9]), .B(ool01_0_Z[9]), .C(ool01_3_Z[9]), .D(ool01_2_Z[9]), .Y(II001) ); defparam \ool01[9] .INIT=16'hFFFE; // @28:465031 CFG4 \ool01[6] ( .A(ool01_1_Z[6]), .B(ool01_0_Z[6]), .C(ool01_3_Z[6]), .D(ool01_2_Z[6]), .Y(iO001[6]) ); defparam \ool01[6] .INIT=16'hFFFE; // @28:465031 CFG4 \ool01[3] ( .A(ool01_1_Z[3]), .B(ool01_0_Z[3]), .C(ool01_3_Z[3]), .D(ool01_2_Z[3]), .Y(iO001[3]) ); defparam \ool01[3] .INIT=16'hFFFE; // @28:464967 CFG3 un2_Oo001_4 ( .A(lI001_1z), .B(Oo001_0_Z), .C(un18_Oo001_Z), .Y(un2_Oo001_4_Z) ); defparam un2_Oo001_4.INIT=8'h54; // @28:464391 CFG3 \il001_3_1.SUM[2] ( .A(il001_Z[1]), .B(N_712_i), .C(il001_Z[2]), .Y(il001_3[2]) ); defparam \il001_3_1.SUM[2] .INIT=8'hD2; // @28:464957 CFG4 \oI001_RNO[2] ( .A(iIl0112), .B(il001_Z[1]), .C(I0001_Z[2]), .D(I0001_Z[1]), .Y(N_710_i) ); defparam \oI001_RNO[2] .INIT=16'hE1A5; // @28:464391 CFG4 \il001_3_1.SUM[3] ( .A(il001_Z[1]), .B(N_712_i), .C(il001_Z[3]), .D(il001_Z[2]), .Y(il001_3[3]) ); defparam \il001_3_1.SUM[3] .INIT=16'hD2F0; // @28:464870 CFG4 lI001_RNO_0 ( .A(un2_Oo001_2_1_Z), .B(un18_Oo001_Z), .C(iIl0112), .D(ll001_Z[0]), .Y(un2_Oo001_2_i) ); defparam lI001_RNO_0.INIT=16'hFDDD; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_MSGMII_CNVTXI_26s */ module CTSE_MSGMII_CNVTXO_26s ( oI001, ooIO1, oO001, iO001, oo001_1z, iIl0112_1z, lI001, OI001_1z, liI01_1z, II001, io001_1z, PF_IOD_CDR_CCC_C0_0_TX_CLK_G, Illi0_i ) ; input [2:0] oI001 ; input [1:0] ooIO1 ; output [2:0] oO001 ; input [7:0] iO001 ; output [7:0] oo001_1z ; output iIl0112_1z ; input lI001 ; input OI001_1z ; output liI01_1z ; input II001 ; output io001_1z ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; input Illi0_i ; wire iIl0112_1z ; wire lI001 ; wire OI001_1z ; wire liI01_1z ; wire II001 ; wire io001_1z ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire Illi0_i ; wire [6:0] iIl01_Z; wire [6:0] iIl01_s; wire [2:0] lo001_Z; wire [2:0] oO001_4_Z; wire [5:0] iIl01_cry; wire [0:0] iIl01_RNIV05U81_Y; wire [1:1] iIl01_RNIUDNJV1_Y; wire [1:1] iIl01_3; wire [2:2] iIl01_RNI37GEL2_Y; wire [3:3] iIl01_RNISUGJF3_Y; wire [4:4] iIl01_RNI3Q9E54_Y; wire [6:6] iIl01_RNO_FCO; wire [6:6] iIl01_RNO_Y; wire [5:5] iIl01_RNI6BS3S4_Y; wire VCC ; wire GND ; wire Oi001_Z ; wire li001_Z ; wire un2_li001_1_Z ; wire iIl01_cry_cy ; wire li001_RNIS9C3J_S ; wire li001_RNIS9C3J_Y ; wire un5_Ii001_Z ; wire CO0 ; wire li001_4_Z ; wire CO1 ; wire oO0018_Z ; wire N_7 ; // @28:465487 SLE \iIl01[6] ( .Q(iIl01_Z[6]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIl01_s[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:465487 SLE \iIl01[5] ( .Q(iIl01_Z[5]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIl01_s[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:465487 SLE \iIl01[4] ( .Q(iIl01_Z[4]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIl01_s[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:465487 SLE \iIl01[3] ( .Q(iIl01_Z[3]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIl01_s[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:465487 SLE \iIl01[2] ( .Q(iIl01_Z[2]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIl01_s[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:465487 SLE \iIl01[1] ( .Q(iIl01_Z[1]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIl01_s[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:465487 SLE \iIl01[0] ( .Q(iIl01_Z[0]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIl01_s[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:465729 SLE io001 ( .Q(io001_1z), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(II001), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:465699 SLE liI01 ( .Q(liI01_1z), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OI001_1z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:465368 SLE \lo001[0] ( .Q(lo001_Z[0]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lI001), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:465669 SLE \oo001[7] ( .Q(oo001_1z[7]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iO001[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:465669 SLE \oo001[6] ( .Q(oo001_1z[6]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iO001[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:465669 SLE \oo001[5] ( .Q(oo001_1z[5]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iO001[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:465669 SLE \oo001[4] ( .Q(oo001_1z[4]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iO001[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:465669 SLE \oo001[3] ( .Q(oo001_1z[3]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iO001[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:465669 SLE \oo001[2] ( .Q(oo001_1z[2]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iO001[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:465669 SLE \oo001[1] ( .Q(oo001_1z[1]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iO001[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:465669 SLE \oo001[0] ( .Q(oo001_1z[0]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iO001[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:465407 SLE Oi001 ( .Q(Oi001_Z), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(li001_Z), .EN(un2_li001_1_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:465588 SLE \oO001_Z[2] ( .Q(oO001[2]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oO001_4_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:465588 SLE \oO001_Z[1] ( .Q(oO001[1]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oO001_4_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:465588 SLE \oO001_Z[0] ( .Q(oO001[0]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oO001_4_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:465368 SLE \lo001[2] ( .Q(lo001_Z[2]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lo001_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:465368 SLE \lo001[1] ( .Q(lo001_Z[1]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lo001_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:465514 ARI1 li001_RNIS9C3J ( .FCO(iIl01_cry_cy), .S(li001_RNIS9C3J_S), .Y(li001_RNIS9C3J_Y), .B(iIl0112_1z), .C(li001_Z), .D(ooIO1[1]), .A(VCC), .FCI(VCC) ); defparam li001_RNIS9C3J.INIT=20'h4AB00; // @28:465514 ARI1 \iIl01_RNIV05U81[0] ( .FCO(iIl01_cry[0]), .S(iIl01_s[0]), .Y(iIl01_RNIV05U81_Y[0]), .B(ooIO1[1]), .C(iIl01_Z[0]), .D(li001_Z), .A(iIl0112_1z), .FCI(iIl01_cry_cy) ); defparam \iIl01_RNIV05U81[0] .INIT=20'h6AA32; // @28:465514 ARI1 \iIl01_RNIUDNJV1[1] ( .FCO(iIl01_cry[1]), .S(iIl01_s[1]), .Y(iIl01_RNIUDNJV1_Y[1]), .B(li001_RNIS9C3J_Y), .C(iIl01_Z[1]), .D(iIl01_3[1]), .A(VCC), .FCI(iIl01_cry[0]) ); defparam \iIl01_RNIUDNJV1[1] .INIT=20'h61B00; // @28:465514 ARI1 \iIl01_RNI37GEL2[2] ( .FCO(iIl01_cry[2]), .S(iIl01_s[2]), .Y(iIl01_RNI37GEL2_Y[2]), .B(li001_RNIS9C3J_Y), .C(iIl01_Z[2]), .D(GND), .A(VCC), .FCI(iIl01_cry[1]) ); defparam \iIl01_RNI37GEL2[2] .INIT=20'h6BB00; // @28:465514 ARI1 \iIl01_RNISUGJF3[3] ( .FCO(iIl01_cry[3]), .S(iIl01_s[3]), .Y(iIl01_RNISUGJF3_Y[3]), .B(li001_RNIS9C3J_Y), .C(iIl01_Z[3]), .D(ooIO1[0]), .A(VCC), .FCI(iIl01_cry[2]) ); defparam \iIl01_RNISUGJF3[3] .INIT=20'h61B00; // @28:465514 ARI1 \iIl01_RNI3Q9E54[4] ( .FCO(iIl01_cry[4]), .S(iIl01_s[4]), .Y(iIl01_RNI3Q9E54_Y[4]), .B(li001_RNIS9C3J_Y), .C(iIl01_Z[4]), .D(GND), .A(VCC), .FCI(iIl01_cry[3]) ); defparam \iIl01_RNI3Q9E54[4] .INIT=20'h6BB00; // @28:465514 ARI1 \iIl01_RNO[6] ( .FCO(iIl01_RNO_FCO[6]), .S(iIl01_s[6]), .Y(iIl01_RNO_Y[6]), .B(li001_RNIS9C3J_Y), .C(iIl01_Z[6]), .D(iIl01_3[1]), .A(VCC), .FCI(iIl01_cry[5]) ); defparam \iIl01_RNO[6] .INIT=20'h41B00; // @28:465514 ARI1 \iIl01_RNI6BS3S4[5] ( .FCO(iIl01_cry[5]), .S(iIl01_s[5]), .Y(iIl01_RNI6BS3S4_Y[5]), .B(li001_RNIS9C3J_Y), .C(iIl01_Z[5]), .D(iIl01_3[1]), .A(VCC), .FCI(iIl01_cry[4]) ); defparam \iIl01_RNI6BS3S4[5] .INIT=20'h61B00; // @28:465469 CFG2 un5_Ii001 ( .A(lo001_Z[1]), .B(lo001_Z[2]), .Y(un5_Ii001_Z) ); defparam un5_Ii001.INIT=4'h2; // @28:465514 CFG2 iIl0112 ( .A(ooIO1[0]), .B(ooIO1[1]), .Y(iIl0112_1z) ); defparam iIl0112.INIT=4'h4; // @28:465497 CFG2 \iIl01_3_0_a2[1] ( .A(ooIO1[0]), .B(ooIO1[1]), .Y(iIl01_3[1]) ); defparam \iIl01_3_0_a2[1] .INIT=4'h1; // @28:465631 CFG2 li001_RNIT3VA9 ( .A(li001_Z), .B(oO001[0]), .Y(CO0) ); defparam li001_RNIT3VA9.INIT=4'h4; // @28:465581 CFG4 li001_4 ( .A(iIl01_Z[6]), .B(iIl01_Z[5]), .C(iIl01_Z[4]), .D(iIl01_Z[3]), .Y(li001_4_Z) ); defparam li001_4.INIT=16'h0001; // @28:465327 CFG2 un2_li001_1 ( .A(li001_Z), .B(un5_Ii001_Z), .Y(un2_li001_1_Z) ); defparam un2_li001_1.INIT=4'hD; // @28:465631 CFG2 \oO001_4_RNO[2] ( .A(CO0), .B(oO001[1]), .Y(CO1) ); defparam \oO001_4_RNO[2] .INIT=4'h8; // @28:465581 CFG4 li001 ( .A(iIl01_Z[0]), .B(li001_4_Z), .C(iIl01_Z[2]), .D(iIl01_Z[1]), .Y(li001_Z) ); defparam li001.INIT=16'hFFFB; // @28:465614 CFG4 oO0018 ( .A(un5_Ii001_Z), .B(Oi001_Z), .C(OI001_1z), .D(li001_Z), .Y(oO0018_Z) ); defparam oO0018.INIT=16'h000E; // @28:465598 CFG4 \oO001_4[0] ( .A(oI001[0]), .B(oO001[0]), .C(li001_Z), .D(oO0018_Z), .Y(oO001_4_Z[0]) ); defparam \oO001_4[0] .INIT=16'hAAC3; // @28:465598 CFG4 \oO001_4[2] ( .A(oI001[2]), .B(oO001[2]), .C(CO1), .D(oO0018_Z), .Y(oO001_4_Z[2]) ); defparam \oO001_4[2] .INIT=16'hAA3C; // @28:465598 CFG4 \oO001_4[1] ( .A(oI001[1]), .B(oO001[1]), .C(CO0), .D(oO0018_Z), .Y(oO001_4_Z[1]) ); defparam \oO001_4[1] .INIT=16'hAA3C; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_MSGMII_CNVTXO_26s */ module CTSE_T8B10B ( IIlOo_0, IIlOo_7, IIlOo_5, IIlOo_8, IIlOo_6, IIlOo_2, IioO1, IOlOo, N_55, N_60_i, N_129_i, N_89_i, N_25_0_2, N_25_0_1, lOlOo ) ; output IIlOo_0 ; output IIlOo_7 ; output IIlOo_5 ; output IIlOo_8 ; output IIlOo_6 ; output IIlOo_2 ; input [7:0] IioO1 ; input [3:0] IOlOo ; output N_55 ; output N_60_i ; output N_129_i ; output N_89_i ; output N_25_0_2 ; output N_25_0_1 ; input lOlOo ; wire IIlOo_0 ; wire IIlOo_7 ; wire IIlOo_5 ; wire IIlOo_8 ; wire IIlOo_6 ; wire IIlOo_2 ; wire N_55 ; wire N_60_i ; wire N_129_i ; wire N_89_i ; wire N_25_0_2 ; wire N_25_0_1 ; wire lOlOo ; wire [5:0] lioIo_21; wire [0:0] i0lIo_i_a2_0_Z; wire [4:2] i1oIo; wire [1:0] IooIo; wire [3:3] lioIo_1_iv_i_2_1_0_Z; wire [3:3] lioIo_1_iv_i_2_Z; wire [2:2] i1oIo_1; wire [3:3] lioIo_1_iv_i_a8_0_0_Z; wire [4:4] lioIo_1_iv_0_1_Z; wire [4:4] lioIo_1_iv_0_0_Z; wire [0:0] lioIo_1_iv_i_1_Z; wire [4:4] lioIo_1_iv_0_a7_0_2; wire [0:0] i0lIo_i_o3_0_Z; wire [6:6] IIlOo_2_Z; wire m21_1_0_co1 ; wire m21_1_0_wmux_0_S ; wire i11_mux ; wire i0lIo_1 ; wire N_20_0_i_Z ; wire m21_1_0_y0 ; wire m21_1_0_co0 ; wire m21_1_0_wmux_S ; wire N_17_0_i_Z ; wire VCC ; wire m10_1_0_co1 ; wire m10_1_0_wmux_0_S ; wire N_14 ; wire N_9 ; wire m10_1_0_y0 ; wire m10_1_0_co0 ; wire m10_1_0_wmux_S ; wire N_27 ; wire N_5 ; wire N_94_2 ; wire N_11_i ; wire m40_2_0_1 ; wire N_47 ; wire N_74_mux_1 ; wire lioIo_m9_i_0_Z ; wire m28_2_1 ; wire m31_1 ; wire N_41_2 ; wire m30_2_0_1 ; wire N_72 ; wire N_57_2 ; wire N_13 ; wire OioIo90_Z ; wire lioIo_m9_i_1_Z ; wire lioIo_N_7 ; wire lioIo_sn_N_2 ; wire m37_1 ; wire N_8 ; wire N_3 ; wire N_9_0 ; wire N_16 ; wire N_14_0 ; wire lioIo267_Z ; wire lioIo263_Z ; wire N_31_mux_1 ; wire N_90 ; wire m67_1_1 ; wire m64_0_Z ; wire N_98 ; wire N_10_0_i_Z ; wire N_148 ; wire N_151 ; wire N_13_0 ; wire N_39_mux ; wire N_8_0 ; wire N_46 ; wire N_69_mux ; wire N_70_mux ; wire N_93 ; wire N_18 ; wire m16_0_1 ; wire un1_m9_0_1_Z ; wire lioIo263_2_1_Z ; wire N_139 ; wire N_23 ; wire N_25 ; wire un1_m9_0_3 ; wire N_94 ; wire lioIo279 ; wire N_27_0 ; wire N_57_1 ; wire N_59 ; wire i2_mux ; wire N_41_1 ; wire N_15_2 ; wire OioIo90_RNIS43M53_Z ; wire N_147 ; wire N_29 ; wire N_81 ; wire N_30 ; wire N_80 ; wire N_145 ; wire N_15 ; wire N_146 ; wire N_20 ; wire N_74_mux_2 ; wire N_137 ; wire N_134 ; wire N_51 ; wire GND ; // @28:466506 ARI1 m21_1_0_wmux_0 ( .FCO(m21_1_0_co1), .S(m21_1_0_wmux_0_S), .Y(i11_mux), .B(i0lIo_1), .C(IOlOo[2]), .D(N_20_0_i_Z), .A(m21_1_0_y0), .FCI(m21_1_0_co0) ); defparam m21_1_0_wmux_0.INIT=20'h0F522; // @28:466506 ARI1 m21_1_0_wmux ( .FCO(m21_1_0_co0), .S(m21_1_0_wmux_S), .Y(m21_1_0_y0), .B(i0lIo_1), .C(IOlOo[2]), .D(N_17_0_i_Z), .A(IOlOo[0]), .FCI(VCC) ); defparam m21_1_0_wmux.INIT=20'h0FA11; // @28:545706 ARI1 \i1oIo_5_0_.m10_1_0_wmux_0 ( .FCO(m10_1_0_co1), .S(m10_1_0_wmux_0_S), .Y(lioIo_21[0]), .B(IioO1[4]), .C(N_14), .D(N_9), .A(m10_1_0_y0), .FCI(m10_1_0_co0) ); defparam \i1oIo_5_0_.m10_1_0_wmux_0 .INIT=20'h0F588; // @28:545706 ARI1 \i1oIo_5_0_.m10_1_0_wmux ( .FCO(m10_1_0_co0), .S(m10_1_0_wmux_S), .Y(m10_1_0_y0), .B(IioO1[4]), .C(N_27), .D(N_5), .A(IioO1[3]), .FCI(VCC) ); defparam \i1oIo_5_0_.m10_1_0_wmux .INIT=20'h0FA44; // @28:466506 CFG3 \i0lIo_i_RNIMI94D[0] ( .A(lOlOo), .B(N_94_2), .C(N_11_i), .Y(m40_2_0_1) ); defparam \i0lIo_i_RNIMI94D[0] .INIT=8'h91; // @28:466506 CFG3 \i0lIo_i_RNI44QTM1[0] ( .A(N_47), .B(N_11_i), .C(lOlOo), .Y(N_74_mux_1) ); defparam \i0lIo_i_RNI44QTM1[0] .INIT=8'h85; // @28:547510 CFG4 lioIo_m9_i_0 ( .A(IOlOo[1]), .B(IOlOo[0]), .C(IOlOo[3]), .D(IOlOo[2]), .Y(lioIo_m9_i_0_Z) ); defparam lioIo_m9_i_0.INIT=16'hBFFF; // @28:545706 CFG4 \i1oIo_5_0_.m31 ( .A(m28_2_1), .B(IioO1[1]), .C(i0lIo_i_a2_0_Z[0]), .D(m31_1), .Y(i1oIo[4]) ); defparam \i1oIo_5_0_.m31 .INIT=16'h66B8; // @28:545706 CFG4 \i1oIo_5_0_.m31_1 ( .A(IioO1[1]), .B(m28_2_1), .C(IioO1[4]), .D(IioO1[3]), .Y(m31_1) ); defparam \i1oIo_5_0_.m31_1 .INIT=16'h022F; // @28:545706 CFG4 \i1oIo_5_0_.m28_2_1 ( .A(IioO1[2]), .B(IioO1[4]), .C(IioO1[0]), .D(IioO1[1]), .Y(m28_2_1) ); defparam \i1oIo_5_0_.m28_2_1 .INIT=16'h4D12; // @28:466506 CFG4 \i0lIo_i_RNID0CK42[0] ( .A(IOlOo[3]), .B(N_94_2), .C(i1oIo[2]), .D(m40_2_0_1), .Y(N_41_2) ); defparam \i0lIo_i_RNID0CK42[0] .INIT=16'h2A80; // @28:466506 CFG4 \i0lIo_i_RNI83P6N1[0] ( .A(lOlOo), .B(IOlOo[3]), .C(m30_2_0_1), .D(N_72), .Y(N_57_2) ); defparam \i0lIo_i_RNI83P6N1[0] .INIT=16'hC048; // @28:466506 CFG4 \i0lIo_i_RNIMV0B71[0] ( .A(IioO1[4]), .B(N_94_2), .C(N_13), .D(N_72), .Y(m30_2_0_1) ); defparam \i0lIo_i_RNIMV0B71[0] .INIT=16'h7340; // @28:547510 CFG4 OioIo90_RNI9AKVB3 ( .A(lioIo_m9_i_0_Z), .B(OioIo90_Z), .C(lioIo_m9_i_1_Z), .D(lioIo_N_7), .Y(lioIo_sn_N_2) ); defparam OioIo90_RNI9AKVB3.INIT=16'hFFEA; // @28:547510 CFG3 lioIo_m9_i_1 ( .A(lOlOo), .B(IooIo[1]), .C(IooIo[0]), .Y(lioIo_m9_i_1_Z) ); defparam lioIo_m9_i_1.INIT=8'h24; // @28:545706 CFG4 \i1oIo_5_0_.m37 ( .A(IioO1[0]), .B(IioO1[4]), .C(m37_1), .D(IioO1[3]), .Y(lioIo_21[5]) ); defparam \i1oIo_5_0_.m37 .INIT=16'h0765; // @28:545706 CFG4 \i1oIo_5_0_.m37_1 ( .A(IioO1[2]), .B(IioO1[0]), .C(IioO1[3]), .D(IioO1[1]), .Y(m37_1) ); defparam \i1oIo_5_0_.m37_1 .INIT=16'h41D7; // @28:546863 CFG4 \lioIo_1_iv_i_2[3] ( .A(IOlOo[0]), .B(IOlOo[3]), .C(lOlOo), .D(lioIo_1_iv_i_2_1_0_Z[3]), .Y(lioIo_1_iv_i_2_Z[3]) ); defparam \lioIo_1_iv_i_2[3] .INIT=16'h60B3; // @28:546863 CFG4 \lioIo_1_iv_i_2_1_0[3] ( .A(IOlOo[1]), .B(IOlOo[0]), .C(IOlOo[3]), .D(IOlOo[2]), .Y(lioIo_1_iv_i_2_1_0_Z[3]) ); defparam \lioIo_1_iv_i_2_1_0[3] .INIT=16'h5027; // @28:545706 CFG3 \i1oIo_5_0_.m16 ( .A(i1oIo_1[2]), .B(IioO1[3]), .C(N_9), .Y(i1oIo[2]) ); defparam \i1oIo_5_0_.m16 .INIT=8'hEA; // @28:547495 CFG4 \lioIo_cnst_9_6_.m8 ( .A(IOlOo[2]), .B(IOlOo[3]), .C(N_8), .D(N_3), .Y(N_9_0) ); defparam \lioIo_cnst_9_6_.m8 .INIT=16'hE2F3; // @28:545706 CFG2 \i0lIo_i_a2_0_0[0] ( .A(IioO1[0]), .B(IioO1[2]), .Y(i0lIo_i_a2_0_Z[0]) ); defparam \i0lIo_i_a2_0_0[0] .INIT=4'h1; // @28:545706 CFG2 \i0lIo_i_o2[1] ( .A(IioO1[3]), .B(IioO1[4]), .Y(N_16) ); defparam \i0lIo_i_o2[1] .INIT=4'hE; // @28:466506 CFG2 m13 ( .A(IOlOo[2]), .B(IOlOo[0]), .Y(N_14_0) ); defparam m13.INIT=4'h4; // @28:466506 CFG2 \i0lIo_i_RNI4TN4A[0] ( .A(N_11_i), .B(lOlOo), .Y(N_72) ); defparam \i0lIo_i_RNI4TN4A[0] .INIT=4'h4; // @28:466506 CFG2 m2 ( .A(IOlOo[2]), .B(IOlOo[0]), .Y(N_94_2) ); defparam m2.INIT=4'h8; // @28:547495 CFG2 \lioIo_cnst_9_6_.m21_1 ( .A(lioIo267_Z), .B(lioIo263_Z), .Y(N_31_mux_1) ); defparam \lioIo_cnst_9_6_.m21_1 .INIT=4'h1; // @28:546863 CFG2 \lioIo_1_iv_i_o7[0] ( .A(lOlOo), .B(IOlOo[1]), .Y(N_90) ); defparam \lioIo_1_iv_i_o7[0] .INIT=4'hE; // @28:466506 CFG2 \lioIo_1_iv_i_a7_0_RNO[0] ( .A(N_94_2), .B(IOlOo[1]), .Y(m67_1_1) ); defparam \lioIo_1_iv_i_a7_0_RNO[0] .INIT=4'h2; // @28:546863 CFG3 \lioIo_1_iv_i_a8_0_0[3] ( .A(IOlOo[0]), .B(IOlOo[2]), .C(IOlOo[1]), .Y(lioIo_1_iv_i_a8_0_0_Z[3]) ); defparam \lioIo_1_iv_i_a8_0_0[3] .INIT=8'h08; // @28:466506 CFG3 m64_0 ( .A(N_94_2), .B(IOlOo[1]), .C(lOlOo), .Y(m64_0_Z) ); defparam m64_0.INIT=8'h20; // @28:546863 CFG4 \lioIo_1_iv_i_a7_4[0] ( .A(lOlOo), .B(IOlOo[2]), .C(N_11_i), .D(lioIo_21[0]), .Y(N_98) ); defparam \lioIo_1_iv_i_a7_4[0] .INIT=16'h0080; // @28:547510 CFG4 OioIo90_RNIADN2U ( .A(OioIo90_Z), .B(i0lIo_1), .C(N_10_0_i_Z), .D(lOlOo), .Y(lioIo_N_7) ); defparam OioIo90_RNIADN2U.INIT=16'hA020; // @28:545706 CFG3 \i0lIo_i_a2_0[0] ( .A(IioO1[1]), .B(IioO1[2]), .C(IioO1[0]), .Y(N_27) ); defparam \i0lIo_i_a2_0[0] .INIT=8'h80; // @28:546863 CFG2 \lioIo_1_iv_0_a7_1[4] ( .A(N_14_0), .B(lOlOo), .Y(N_148) ); defparam \lioIo_1_iv_0_a7_1[4] .INIT=4'h2; // @28:546863 CFG4 \lioIo_1_iv_0_a7_4[4] ( .A(IOlOo[0]), .B(IOlOo[1]), .C(lOlOo), .D(IOlOo[2]), .Y(N_151) ); defparam \lioIo_1_iv_0_a7_4[4] .INIT=16'h0040; // @28:546493 CFG3 OioIo90 ( .A(IioO1[7]), .B(IioO1[6]), .C(IioO1[5]), .Y(OioIo90_Z) ); defparam OioIo90.INIT=8'h80; // @28:547495 CFG3 \lioIo_cnst_9_6_.m12 ( .A(IOlOo[0]), .B(lOlOo), .C(IOlOo[1]), .Y(N_13_0) ); defparam \lioIo_cnst_9_6_.m12 .INIT=8'h51; // @28:547495 CFG3 \lioIo_cnst_9_6_.m2 ( .A(IOlOo[0]), .B(lOlOo), .C(IOlOo[1]), .Y(N_3) ); defparam \lioIo_cnst_9_6_.m2 .INIT=8'h2A; // @28:547495 CFG2 N_10_0_i ( .A(IioO1[5]), .B(IioO1[6]), .Y(N_10_0_i_Z) ); defparam N_10_0_i.INIT=4'h6; // @28:545706 CFG3 \i1oIo_5_0_.m4 ( .A(IioO1[1]), .B(IioO1[2]), .C(IioO1[0]), .Y(N_5) ); defparam \i1oIo_5_0_.m4 .INIT=8'h68; // @28:545706 CFG3 \i1oIo_5_0_.m8 ( .A(IioO1[1]), .B(IioO1[2]), .C(IioO1[0]), .Y(N_9) ); defparam \i1oIo_5_0_.m8 .INIT=8'h7E; // @28:545706 CFG4 \i1oIo_5_0_.m24 ( .A(IioO1[2]), .B(IioO1[0]), .C(IioO1[3]), .D(IioO1[1]), .Y(N_39_mux) ); defparam \i1oIo_5_0_.m24 .INIT=16'h5554; // @28:545706 CFG3 \IooIo_1_0_.m7 ( .A(IioO1[1]), .B(IioO1[2]), .C(IioO1[0]), .Y(N_8_0) ); defparam \IooIo_1_0_.m7 .INIT=8'h16; // @28:466506 CFG3 m45 ( .A(IOlOo[0]), .B(IOlOo[2]), .C(lOlOo), .Y(N_46) ); defparam m45.INIT=8'h31; // @28:466506 CFG4 m43 ( .A(IOlOo[0]), .B(IOlOo[3]), .C(IOlOo[2]), .D(lOlOo), .Y(N_69_mux) ); defparam m43.INIT=16'h0A86; // @28:466506 CFG4 m53 ( .A(IOlOo[0]), .B(IOlOo[3]), .C(IOlOo[2]), .D(lOlOo), .Y(N_70_mux) ); defparam m53.INIT=16'h40CC; // @28:546863 CFG4 \lioIo_1_iv_i_a7[0] ( .A(IOlOo[0]), .B(IOlOo[3]), .C(IOlOo[2]), .D(N_90), .Y(N_93) ); defparam \lioIo_1_iv_i_a7[0] .INIT=16'h7200; // @28:547495 CFG3 \lioIo_cnst_9_6_.m17 ( .A(IOlOo[0]), .B(lOlOo), .C(IOlOo[1]), .Y(N_18) ); defparam \lioIo_cnst_9_6_.m17 .INIT=8'h2F; // @28:545706 CFG3 \i1oIo_5_0_.m16_1_1 ( .A(IioO1[1]), .B(i0lIo_i_a2_0_Z[0]), .C(IioO1[3]), .Y(m16_0_1) ); defparam \i1oIo_5_0_.m16_1_1 .INIT=8'hB0; // @28:546863 CFG4 \lioIo_1_iv_0_1[4] ( .A(IOlOo[3]), .B(IOlOo[2]), .C(N_151), .D(N_90), .Y(lioIo_1_iv_0_1_Z[4]) ); defparam \lioIo_1_iv_0_1[4] .INIT=16'hF0F2; // @28:546863 CFG4 \lioIo_1_iv_0_0[4] ( .A(IOlOo[1]), .B(IOlOo[3]), .C(IOlOo[2]), .D(N_148), .Y(lioIo_1_iv_0_0_Z[4]) ); defparam \lioIo_1_iv_0_0[4] .INIT=16'hFF02; // @28:547495 CFG4 un1_m9_0_1 ( .A(IOlOo[1]), .B(IOlOo[3]), .C(N_10_0_i_Z), .D(N_94_2), .Y(un1_m9_0_1_Z) ); defparam un1_m9_0_1.INIT=16'hFBFF; // @28:546891 CFG4 lioIo263_2_1 ( .A(N_94_2), .B(N_90), .C(IOlOo[3]), .D(OioIo90_Z), .Y(lioIo263_2_1_Z) ); defparam lioIo263_2_1.INIT=16'h2000; // @28:546863 CFG4 \lioIo_1_iv_i_a8_5[3] ( .A(IOlOo[0]), .B(IOlOo[3]), .C(IOlOo[2]), .D(N_90), .Y(N_139) ); defparam \lioIo_1_iv_i_a8_5[3] .INIT=16'h0004; // @28:545706 CFG3 \IooIo_1_0_.m9 ( .A(IioO1[3]), .B(N_8_0), .C(IioO1[4]), .Y(IooIo[1]) ); defparam \IooIo_1_0_.m9 .INIT=8'h40; // @28:545706 CFG3 \IooIo_1_0_.m5 ( .A(IioO1[3]), .B(N_5), .C(IioO1[4]), .Y(IooIo[0]) ); defparam \IooIo_1_0_.m5 .INIT=8'h08; // @28:545706 CFG3 \i0lIo_i_a2_1[0] ( .A(IioO1[3]), .B(N_8_0), .C(IioO1[4]), .Y(N_23) ); defparam \i0lIo_i_a2_1[0] .INIT=8'h20; // @28:545706 CFG4 \i1oIo_5_0_.m12 ( .A(IioO1[3]), .B(IioO1[1]), .C(i0lIo_i_a2_0_Z[0]), .D(N_27), .Y(N_13) ); defparam \i1oIo_5_0_.m12 .INIT=16'h45EF; // @28:545706 CFG3 \i0lIo_i_o2_0[0] ( .A(IioO1[1]), .B(IioO1[2]), .C(IioO1[0]), .Y(N_14) ); defparam \i0lIo_i_o2_0[0] .INIT=8'hE8; // @28:547495 CFG4 \lioIo_cnst_9_6_.m24 ( .A(IOlOo[0]), .B(IOlOo[1]), .C(lOlOo), .D(IOlOo[2]), .Y(N_25) ); defparam \lioIo_cnst_9_6_.m24 .INIT=16'h004C; // @28:466506 CFG4 m24_1_0 ( .A(IOlOo[1]), .B(IOlOo[3]), .C(N_14_0), .D(i11_mux), .Y(N_25_0_1) ); defparam m24_1_0.INIT=16'h4501; // @28:546863 CFG4 \lioIo_1_iv_i_1[0] ( .A(IOlOo[1]), .B(IOlOo[3]), .C(IOlOo[2]), .D(lOlOo), .Y(lioIo_1_iv_i_1_Z[0]) ); defparam \lioIo_1_iv_i_1[0] .INIT=16'hB03C; // @28:547495 CFG4 OioIo90_RNIOQ2K92 ( .A(IooIo[0]), .B(i0lIo_1), .C(OioIo90_Z), .D(IooIo[1]), .Y(un1_m9_0_3) ); defparam OioIo90_RNIOQ2K92.INIT=16'h1080; // @28:546863 CFG4 \lioIo_1_iv_i_a7_0[0] ( .A(m67_1_1), .B(lOlOo), .C(N_11_i), .D(lioIo_21[0]), .Y(N_94) ); defparam \lioIo_1_iv_i_a7_0[0] .INIT=16'h2A00; // @28:466506 CFG4 N_20_0_i ( .A(IioO1[7]), .B(IioO1[6]), .C(IioO1[5]), .D(IOlOo[2]), .Y(N_20_0_i_Z) ); defparam N_20_0_i.INIT=16'h83FF; // @28:466506 CFG4 N_17_0_i ( .A(IioO1[7]), .B(IioO1[6]), .C(IioO1[5]), .D(IOlOo[2]), .Y(N_17_0_i_Z) ); defparam N_17_0_i.INIT=16'h7CFF; // @28:546863 CFG4 \lioIo_1_iv_0_a7_0_3[4] ( .A(IOlOo[0]), .B(IOlOo[1]), .C(i1oIo[4]), .D(IOlOo[3]), .Y(lioIo_1_iv_0_a7_0_2[4]) ); defparam \lioIo_1_iv_0_a7_0_3[4] .INIT=16'h2000; // @28:545706 CFG4 \i0lIo_i_o3_0[0] ( .A(IioO1[0]), .B(IioO1[2]), .C(N_16), .D(IioO1[1]), .Y(i0lIo_i_o3_0_Z[0]) ); defparam \i0lIo_i_o3_0[0] .INIT=16'h0117; // @28:547495 CFG4 \lioIo_cnst_9_6_.m26 ( .A(lOlOo), .B(IOlOo[2]), .C(lioIo279), .D(N_13_0), .Y(N_27_0) ); defparam \lioIo_cnst_9_6_.m26 .INIT=16'h020E; // @28:466506 CFG3 m24_2_0 ( .A(IOlOo[1]), .B(IOlOo[3]), .C(N_94_2), .Y(N_25_0_2) ); defparam m24_2_0.INIT=8'h2A; // @28:466506 CFG2 \lioIo_1_iv_0_a7_1_RNIBAC46[4] ( .A(N_148), .B(IOlOo[3]), .Y(N_57_1) ); defparam \lioIo_1_iv_0_a7_1_RNIBAC46[4] .INIT=4'h1; // @28:466506 CFG4 m32 ( .A(IOlOo[0]), .B(IOlOo[3]), .C(IOlOo[2]), .D(lOlOo), .Y(N_59) ); defparam m32.INIT=16'h3DB1; // @28:545706 CFG4 \i1oIo_5_0_.m21 ( .A(IioO1[2]), .B(IioO1[0]), .C(IioO1[3]), .D(IioO1[1]), .Y(i2_mux) ); defparam \i1oIo_5_0_.m21 .INIT=16'h2BBC; // @28:466506 CFG3 m40_1_0 ( .A(IOlOo[3]), .B(lOlOo), .C(N_14_0), .Y(N_41_1) ); defparam m40_1_0.INIT=8'h40; // @28:547495 CFG4 \lioIo_cnst_9_6_.m14_2_0 ( .A(IOlOo[2]), .B(IOlOo[3]), .C(N_13_0), .D(lOlOo), .Y(N_15_2) ); defparam \lioIo_cnst_9_6_.m14_2_0 .INIT=16'hC480; // @28:466506 CFG4 OioIo90_RNI404DC2 ( .A(IooIo[0]), .B(m64_0_Z), .C(OioIo90_Z), .D(IooIo[1]), .Y(lioIo279) ); defparam OioIo90_RNI404DC2.INIT=16'h0080; // @28:547495 CFG4 OioIo90_RNIS43M53 ( .A(i0lIo_1), .B(un1_m9_0_3), .C(lOlOo), .D(un1_m9_0_1_Z), .Y(OioIo90_RNIS43M53_Z) ); defparam OioIo90_RNIS43M53.INIT=16'hFFDE; // @28:546863 CFG4 \lioIo_1_iv_0_a7_0[4] ( .A(lOlOo), .B(IOlOo[2]), .C(N_11_i), .D(lioIo_1_iv_0_a7_0_2[4]), .Y(N_147) ); defparam \lioIo_1_iv_0_a7_0[4] .INIT=16'h5D00; // @28:545706 CFG3 \i0lIo_i[0] ( .A(N_27), .B(i0lIo_i_o3_0_Z[0]), .C(N_23), .Y(N_11_i) ); defparam \i0lIo_i[0] .INIT=8'hFE; // @28:545706 CFG4 \i0lIo_i[1] ( .A(N_23), .B(N_27), .C(N_16), .D(i0lIo_i_o3_0_Z[0]), .Y(i0lIo_1) ); defparam \i0lIo_i[1] .INIT=16'hFFEA; // @28:466506 CFG4 m67 ( .A(IOlOo[0]), .B(IOlOo[1]), .C(lOlOo), .D(IOlOo[2]), .Y(N_8) ); defparam m67.INIT=16'h670F; // @28:547495 CFG4 \lioIo_0[7] ( .A(IioO1[5]), .B(OioIo90_RNIS43M53_Z), .C(IioO1[7]), .D(IioO1[6]), .Y(N_29) ); defparam \lioIo_0[7] .INIT=16'h69C3; // @28:546891 CFG4 lioIo267 ( .A(IooIo[1]), .B(IooIo[0]), .C(lioIo263_2_1_Z), .D(i0lIo_1), .Y(lioIo267_Z) ); defparam lioIo267.INIT=16'h0020; // @28:546891 CFG4 lioIo263 ( .A(IooIo[1]), .B(IooIo[0]), .C(lioIo263_2_1_Z), .D(i0lIo_1), .Y(lioIo263_Z) ); defparam lioIo263.INIT=16'h2000; // @28:547495 CFG3 \lioIo_0[9] ( .A(IioO1[5]), .B(OioIo90_RNIS43M53_Z), .C(IioO1[6]), .Y(N_81) ); defparam \lioIo_0[9] .INIT=8'h39; // @28:547495 CFG4 \lioIo_0[6] ( .A(IioO1[5]), .B(OioIo90_RNIS43M53_Z), .C(IioO1[7]), .D(IioO1[6]), .Y(N_30) ); defparam \lioIo_0[6] .INIT=16'h63C6; // @28:547495 CFG4 \lioIo_0[8] ( .A(IioO1[5]), .B(OioIo90_RNIS43M53_Z), .C(IioO1[7]), .D(IioO1[6]), .Y(N_80) ); defparam \lioIo_0[8] .INIT=16'h6636; // @28:545706 CFG4 \i1oIo_5_0_.m16_1_0 ( .A(IioO1[3]), .B(IioO1[4]), .C(m16_0_1), .D(N_14), .Y(i1oIo_1[2]) ); defparam \i1oIo_5_0_.m16_1_0 .INIT=16'h3031; // @28:545706 CFG3 \i1oIo_5_0_.m25 ( .A(IioO1[4]), .B(N_39_mux), .C(i2_mux), .Y(lioIo_21[3]) ); defparam \i1oIo_5_0_.m25 .INIT=8'h8D; // @28:466506 CFG3 m46 ( .A(IOlOo[0]), .B(IOlOo[2]), .C(lioIo_21[5]), .Y(N_47) ); defparam m46.INIT=8'h19; // @28:546863 CFG4 \lioIo_1_iv_0_o7_0[4] ( .A(IOlOo[1]), .B(IOlOo[0]), .C(i1oIo[4]), .D(N_11_i), .Y(N_145) ); defparam \lioIo_1_iv_0_o7_0[4] .INIT=16'h9D99; // @28:547495 CFG4 \lioIo_cnst_9_6_.m14 ( .A(IOlOo[2]), .B(IOlOo[3]), .C(N_15_2), .D(N_3), .Y(N_15) ); defparam \lioIo_cnst_9_6_.m14 .INIT=16'hF0F1; // @28:546863 CFG4 \lioIo_1_iv_0_a7[4] ( .A(IOlOo[3]), .B(IOlOo[2]), .C(lOlOo), .D(N_145), .Y(N_146) ); defparam \lioIo_1_iv_0_a7[4] .INIT=16'h8000; // @28:547495 CFG4 \lioIo_cnst_9_6_.m19 ( .A(IOlOo[3]), .B(IOlOo[2]), .C(N_18), .D(N_8), .Y(N_20) ); defparam \lioIo_cnst_9_6_.m19 .INIT=16'hEF45; // @28:547495 CFG4 \lioIo_2[9] ( .A(IOlOo[3]), .B(N_25), .C(N_27_0), .D(lioIo_sn_N_2), .Y(IIlOo_2_Z[6]) ); defparam \lioIo_2[9] .INIT=16'h4E00; // @28:466506 CFG4 \i0lIo_i_RNI44QTM1_0[0] ( .A(IOlOo[0]), .B(IOlOo[2]), .C(lioIo_21[5]), .D(N_72), .Y(N_74_mux_2) ); defparam \i0lIo_i_RNI44QTM1_0[0] .INIT=16'h9100; // @28:524245 CFG4 \lioIo_1_iv_i_a7_4_RNIF9BRG[0] ( .A(N_94), .B(N_98), .C(lioIo_1_iv_i_1_Z[0]), .D(N_93), .Y(N_89_i) ); defparam \lioIo_1_iv_i_a7_4_RNIF9BRG[0] .INIT=16'h0001; // @28:546863 CFG4 \lioIo_1_iv_i_a8_3[3] ( .A(lOlOo), .B(IOlOo[0]), .C(N_11_i), .D(lioIo_21[3]), .Y(N_137) ); defparam \lioIo_1_iv_i_a8_3[3] .INIT=16'h0080; // @28:546863 CFG4 \lioIo_1_iv_i_a8_0[3] ( .A(lioIo_21[3]), .B(N_11_i), .C(lioIo_1_iv_i_a8_0_0_Z[3]), .D(lOlOo), .Y(N_134) ); defparam \lioIo_1_iv_i_a8_0[3] .INIT=16'h20A0; // @28:546863 CFG4 \lioIo_1_iv_0[4] ( .A(lioIo_1_iv_0_1_Z[4]), .B(lioIo_1_iv_0_0_Z[4]), .C(N_146), .D(N_147), .Y(IIlOo_0) ); defparam \lioIo_1_iv_0[4] .INIT=16'hFFFE; // @28:547495 CFG4 \lioIo[7] ( .A(N_15), .B(N_31_mux_1), .C(lioIo_sn_N_2), .D(N_29), .Y(IIlOo_7) ); defparam \lioIo[7] .INIT=16'hBFB0; // @28:547495 CFG3 \lioIo[9] ( .A(lioIo_sn_N_2), .B(N_81), .C(IIlOo_2_Z[6]), .Y(IIlOo_5) ); defparam \lioIo[9] .INIT=8'hF4; // @28:547495 CFG4 \lioIo[6] ( .A(N_9_0), .B(N_31_mux_1), .C(lioIo_sn_N_2), .D(N_30), .Y(IIlOo_8) ); defparam \lioIo[6] .INIT=16'h707F; // @28:547495 CFG4 \lioIo[8] ( .A(lioIo_sn_N_2), .B(N_80), .C(N_20), .D(N_31_mux_1), .Y(IIlOo_6) ); defparam \lioIo[8] .INIT=16'h4EEE; // @28:524245 CFG4 \lioIo_1_iv_i_a8_0_RNIIUHQL[3] ( .A(N_139), .B(lioIo_1_iv_i_2_Z[3]), .C(N_137), .D(N_134), .Y(N_129_i) ); defparam \lioIo_1_iv_i_a8_0_RNIIUHQL[3] .INIT=16'h0001; // @28:466506 CFG4 \i0lIo_i_RNI846IM3[0] ( .A(IOlOo[3]), .B(N_46), .C(N_74_mux_1), .D(N_74_mux_2), .Y(N_51) ); defparam \i0lIo_i_RNI846IM3[0] .INIT=16'hBBB1; // @28:524245 CFG4 \lioIo_1_iv_0_a7_1_RNIC4GH72[4] ( .A(N_57_1), .B(N_57_2), .C(IOlOo[1]), .D(N_59), .Y(N_60_i) ); defparam \lioIo_1_iv_0_a7_1_RNIC4GH72[4] .INIT=16'h01F1; // @28:466506 CFG3 \i0lIo_i_RNI1RGO04[0] ( .A(N_51), .B(IOlOo[1]), .C(N_70_mux), .Y(N_55) ); defparam \i0lIo_i_RNI1RGO04[0] .INIT=8'hD1; // @28:466506 CFG4 \i0lIo_i_RNI6J8HN2[0] ( .A(N_41_1), .B(N_41_2), .C(IOlOo[1]), .D(N_69_mux), .Y(IIlOo_2) ); defparam \i0lIo_i_RNI6J8HN2[0] .INIT=16'hFE0E; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_T8B10B */ module CTSE_PETEX_TOP_26s_0s_1s ( OII11, iO1i0, iOI11, oo001, OOo01, IOo01, lOo01, iII11, liI01, io001, oII11_1z, PF_IOD_CDR_CCC_C0_0_TX_CLK_G, oi001_i ) ; input [9:0] OII11 ; output [9:0] iO1i0 ; input [2:0] iOI11 ; input [7:0] oo001 ; input [1:0] OOo01 ; input [15:0] IOo01 ; input lOo01 ; input iII11 ; input liI01 ; input io001 ; input oII11_1z ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; input oi001_i ; wire lOo01 ; wire iII11 ; wire liI01 ; wire io001 ; wire oII11_1z ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire oi001_i ; wire [0:0] un1_iOIOo_Z; wire [0:0] un1_IoOOo_Z; wire [3:0] IOlOo_Z; wire [15:0] l1lOo_Z; wire [7:0] IioO1_Z; wire [7:0] o0OOo_Z; wire [9:0] lllOo_Z; wire [9:2] IllOo; wire [1:1] I0lOo_Z; wire [1:1] I0lOo_RNO_Z; wire [9:0] lIlOo_Z; wire [9:1] IIlOo; wire [1:0] ilOOo_Z; wire [7:0] OllOo_Z; wire [8:0] IllOo_i_0_1_Z; wire [7:0] IllOo_i_0_0_Z; wire [9:2] IllOo_0_0_0_Z; wire [8:8] IllOo_i_0_2_Z; wire olOOo_Z ; wire olOOo_i ; wire CO0 ; wire CO0_i ; wire oIIOo_Z ; wire VCC ; wire N_95_mux ; wire GND ; wire IIIOo_Z ; wire OIIOo_Z ; wire o1lOo_Z ; wire i1lOo_Z ; wire OlIOo_Z ; wire l1OOo_Z ; wire O1OOo_Z ; wire I1IOo_Z ; wire O1IOo ; wire i0IOo_Z ; wire o0IOo ; wire iioo1_Z ; wire oioo1 ; wire OoIOo_Z ; wire i1IOo ; wire llIOo_Z ; wire OIlOo_Z ; wire iOlOo_Z ; wire loIOo_Z ; wire IoIOo_Z ; wire l0IOo_Z ; wire I0IOo_Z ; wire ilIOo_Z ; wire olIOo_Z ; wire o1IOo_Z ; wire l1IOo_Z ; wire iOIOo_Z ; wire oOIOo_Z ; wire illOo_Z ; wire ollOo_Z ; wire iiOOo_Z ; wire IiOOo_Z ; wire oiOOo_Z ; wire OiOOo_Z ; wire liOOo_Z ; wire ioOOo_Z ; wire loOOo_Z ; wire lOIOo_Z ; wire IOIOo_Z ; wire iiIOo_Z ; wire oiIOo ; wire liIOo_Z ; wire IiIOo ; wire OiIOo_Z ; wire ioIOo ; wire N_140_mux_i ; wire N_62_i ; wire N_127_mux_i ; wire N_136_mux_i ; wire OOIOo_Z ; wire N_122_mux_i ; wire N_121_mux_i ; wire N_120_mux_i ; wire N_119_mux_i ; wire N_118_mux_i ; wire N_117_mux_i ; wire N_213_i ; wire N_211_i ; wire N_226_i ; wire N_224_i ; wire N_221_i ; wire N_218_i ; wire N_216_i ; wire N_124_mux_i ; wire N_123_mux_i ; wire N_89_i ; wire N_60_i ; wire N_129_i ; wire N_55 ; wire N_846 ; wire N_942 ; wire N_288 ; wire N_168_2 ; wire m26_1 ; wire un9_IOIOo_1_Z ; wire un5_IlIOo_0_Z ; wire lOlOo_Z ; wire N_97 ; wire N_941 ; wire N_936 ; wire un3_IOIOo_Z ; wire N_63 ; wire un3_I0IOo_1_Z ; wire N_847 ; wire un7_ioOOo_2_0_Z ; wire un10_ioOOo_2_Z ; wire IOIOo_0_Z ; wire un1_ioOOo_2_Z ; wire ooOOo_6_Z ; wire ooOOo_5_Z ; wire m20_e_1 ; wire m60_0 ; wire m55_0 ; wire m75_0 ; wire m65_0 ; wire m50_0 ; wire m80_0 ; wire m70_0 ; wire m45_0 ; wire N_890 ; wire un13_IOIOo_Z ; wire N_96_mux ; wire m17_2 ; wire un4_IoOOo_NE_Z ; wire N_944 ; wire N_298 ; wire N_899 ; wire N_937 ; wire IOIOo_2_Z ; wire IOIOo_1_0_Z ; wire m35_2 ; wire ooOOo_7_Z ; wire m26_4 ; wire N_110_mux ; wire N_939 ; wire N_882 ; wire N_885 ; wire un9_IOIOo_Z ; wire un3_ooOOo_Z ; wire N_943 ; wire N_883 ; wire N_113_mux ; wire N_889 ; wire N_221_2 ; wire ooOOo_9_Z ; wire N_898 ; wire IOIOo_5_Z ; wire ooOOo_Z ; wire N_886 ; wire un1_ioOOo_Z ; wire un7_ioOOo_Z ; wire un10_ioOOo_Z ; wire un7_IoOOo_0_Z ; wire N_25_0_2 ; wire N_25_0_1 ; CFG1 olOOo_RNO ( .A(olOOo_Z), .Y(olOOo_i) ); defparam olOOo_RNO.INIT=2'h1; CFG1 \I0lOo_RNO[0] ( .A(CO0), .Y(CO0_i) ); defparam \I0lOo_RNO[0] .INIT=2'h1; // @28:523031 SLE oIIOo ( .Q(oIIOo_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_95_mux), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:522992 SLE IIIOo ( .Q(IIIOo_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OIIOo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:522285 SLE olOOo ( .Q(olOOo_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(olOOo_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:524117 SLE o1lOo ( .Q(o1lOo_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oII11_1z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:524117 SLE i1lOo ( .Q(i1lOo_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o1lOo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523068 SLE OlIOo ( .Q(OlIOo_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oIIOo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:522253 SLE l1OOo ( .Q(l1OOo_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(io001), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:522216 SLE O1OOo ( .Q(O1OOo_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(liI01), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523400 SLE I1IOo ( .Q(I1IOo_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O1IOo), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523345 SLE i0IOo ( .Q(i0IOo_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o0IOo), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523227 SLE iioo1 ( .Q(iioo1_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oioo1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523495 SLE OoIOo ( .Q(OoIOo_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i1IOo), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523119 SLE llIOo ( .Q(llIOo_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un1_iOIOo_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:524179 SLE OIlOo ( .Q(OIlOo_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iOlOo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523540 SLE loIOo ( .Q(loIOo_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IoIOo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523280 SLE l0IOo ( .Q(l0IOo_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0IOo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523162 SLE ilIOo ( .Q(ilIOo_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(olIOo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523444 SLE o1IOo ( .Q(o1IOo_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l1IOo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:522951 SLE iOIOo ( .Q(iOIOo_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oOIOo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:522765 SLE illOo ( .Q(illOo_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ollOo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:522718 SLE iiOOo ( .Q(iiOOo_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IiOOo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:522638 SLE oiOOo ( .Q(oiOOo_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OiOOo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:522558 SLE liOOo ( .Q(liOOo_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ioOOo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:522478 SLE loOOo ( .Q(loOOo_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un1_IoOOo_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:522909 SLE lOIOo ( .Q(lOIOo_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOIOo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523718 SLE iiIOo ( .Q(iiIOo_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oiIOo), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523665 SLE liIOo ( .Q(liIOo_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IiIOo), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523610 SLE OiIOo ( .Q(OiIOo_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ioIOo), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:524085 SLE \IOlOo[3] ( .Q(IOlOo_Z[3]), .ADn(GND), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_140_mux_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:524085 SLE \IOlOo[2] ( .Q(IOlOo_Z[2]), .ADn(GND), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_62_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:524085 SLE \IOlOo[1] ( .Q(IOlOo_Z[1]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_127_mux_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:524085 SLE \IOlOo[0] ( .Q(IOlOo_Z[0]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_136_mux_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:522797 SLE OOIOo ( .Q(OOIOo_Z), .ADn(GND), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(GND), .EN(lOIOo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523787 SLE \l1lOo[6] ( .Q(l1lOo_Z[6]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOo01[6]), .EN(iOIOo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523787 SLE \l1lOo[5] ( .Q(l1lOo_Z[5]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOo01[5]), .EN(iOIOo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523787 SLE \l1lOo[4] ( .Q(l1lOo_Z[4]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOo01[4]), .EN(iOIOo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523787 SLE \l1lOo[3] ( .Q(l1lOo_Z[3]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOo01[3]), .EN(iOIOo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523787 SLE \l1lOo[2] ( .Q(l1lOo_Z[2]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOo01[2]), .EN(iOIOo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523787 SLE \l1lOo[1] ( .Q(l1lOo_Z[1]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOo01[1]), .EN(iOIOo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523787 SLE \l1lOo[0] ( .Q(l1lOo_Z[0]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOo01[0]), .EN(iOIOo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523876 SLE \IioO1[5] ( .Q(IioO1_Z[5]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_122_mux_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523876 SLE \IioO1[4] ( .Q(IioO1_Z[4]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_121_mux_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523876 SLE \IioO1[3] ( .Q(IioO1_Z[3]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_120_mux_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523876 SLE \IioO1[2] ( .Q(IioO1_Z[2]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_119_mux_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523876 SLE \IioO1[1] ( .Q(IioO1_Z[1]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_118_mux_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523876 SLE \IioO1[0] ( .Q(IioO1_Z[0]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_117_mux_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523787 SLE \l1lOo[15] ( .Q(l1lOo_Z[15]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOo01[15]), .EN(iOIOo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523787 SLE \l1lOo[14] ( .Q(l1lOo_Z[14]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOo01[14]), .EN(iOIOo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523787 SLE \l1lOo[13] ( .Q(l1lOo_Z[13]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOo01[13]), .EN(iOIOo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523787 SLE \l1lOo[12] ( .Q(l1lOo_Z[12]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOo01[12]), .EN(iOIOo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523787 SLE \l1lOo[11] ( .Q(l1lOo_Z[11]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOo01[11]), .EN(iOIOo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523787 SLE \l1lOo[10] ( .Q(l1lOo_Z[10]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOo01[10]), .EN(iOIOo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523787 SLE \l1lOo[9] ( .Q(l1lOo_Z[9]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOo01[9]), .EN(iOIOo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523787 SLE \l1lOo[8] ( .Q(l1lOo_Z[8]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOo01[8]), .EN(iOIOo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523787 SLE \l1lOo[7] ( .Q(l1lOo_Z[7]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOo01[7]), .EN(iOIOo_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:522179 SLE \o0OOo[0] ( .Q(o0OOo_Z[0]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oo001[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:524317 SLE \lllOo[9] ( .Q(lllOo_Z[9]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IllOo[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:524317 SLE \lllOo[8] ( .Q(lllOo_Z[8]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_213_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:524317 SLE \lllOo[7] ( .Q(lllOo_Z[7]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_211_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:524317 SLE \lllOo[6] ( .Q(lllOo_Z[6]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_226_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:524317 SLE \lllOo[5] ( .Q(lllOo_Z[5]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_224_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:524317 SLE \lllOo[4] ( .Q(lllOo_Z[4]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IllOo[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:524317 SLE \lllOo[3] ( .Q(lllOo_Z[3]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_221_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:524317 SLE \lllOo[2] ( .Q(lllOo_Z[2]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IllOo[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:524317 SLE \lllOo[1] ( .Q(lllOo_Z[1]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_218_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:524317 SLE \lllOo[0] ( .Q(lllOo_Z[0]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_216_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:524392 SLE \I0lOo[1] ( .Q(I0lOo_Z[1]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0lOo_RNO_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:524392 SLE \I0lOo[0] ( .Q(CO0), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(CO0_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523876 SLE \IioO1[7] ( .Q(IioO1_Z[7]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_124_mux_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523876 SLE \IioO1[6] ( .Q(IioO1_Z[6]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_123_mux_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:524245 SLE \lIlOo[5] ( .Q(lIlOo_Z[5]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_89_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:524245 SLE \lIlOo[4] ( .Q(lIlOo_Z[4]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_60_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:524245 SLE \lIlOo[3] ( .Q(lIlOo_Z[3]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IIlOo[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:524245 SLE \lIlOo[2] ( .Q(lIlOo_Z[2]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_129_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:524245 SLE \lIlOo[1] ( .Q(lIlOo_Z[1]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IIlOo[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:524245 SLE \lIlOo[0] ( .Q(lIlOo_Z[0]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_55), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:522318 SLE \ilOOo[1] ( .Q(ilOOo_Z[1]), .ADn(GND), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OOo01[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:522318 SLE \ilOOo[0] ( .Q(ilOOo_Z[0]), .ADn(GND), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OOo01[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:522179 SLE \o0OOo[7] ( .Q(o0OOo_Z[7]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oo001[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:522179 SLE \o0OOo[6] ( .Q(o0OOo_Z[6]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oo001[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:522179 SLE \o0OOo[5] ( .Q(o0OOo_Z[5]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oo001[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:522179 SLE \o0OOo[4] ( .Q(o0OOo_Z[4]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oo001[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:522179 SLE \o0OOo[3] ( .Q(o0OOo_Z[3]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oo001[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:522179 SLE \o0OOo[2] ( .Q(o0OOo_Z[2]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oo001[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:522179 SLE \o0OOo[1] ( .Q(o0OOo_Z[1]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oo001[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523755 SLE \OllOo[7] ( .Q(OllOo_Z[7]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o0OOo_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523755 SLE \OllOo[6] ( .Q(OllOo_Z[6]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o0OOo_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523755 SLE \OllOo[5] ( .Q(OllOo_Z[5]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o0OOo_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523755 SLE \OllOo[4] ( .Q(OllOo_Z[4]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o0OOo_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523755 SLE \OllOo[3] ( .Q(OllOo_Z[3]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o0OOo_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523755 SLE \OllOo[2] ( .Q(OllOo_Z[2]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o0OOo_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523755 SLE \OllOo[1] ( .Q(OllOo_Z[1]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o0OOo_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:523755 SLE \OllOo[0] ( .Q(OllOo_Z[0]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o0OOo_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:524245 SLE \lIlOo[9] ( .Q(lIlOo_Z[9]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IIlOo[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:524245 SLE \lIlOo[8] ( .Q(lIlOo_Z[8]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IIlOo[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:524245 SLE \lIlOo[7] ( .Q(lIlOo_Z[7]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IIlOo[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:524245 SLE \lIlOo[6] ( .Q(lIlOo_Z[6]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IIlOo[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:524281 CFG4 \IllOo_i_0_o3[3] ( .A(iOI11[2]), .B(iII11), .C(iOI11[1]), .D(lOo01), .Y(N_846) ); defparam \IllOo_i_0_o3[3] .INIT=16'hA0CC; // @28:524281 CFG3 \IllOo_i_0_1[7] ( .A(iOI11[1]), .B(N_942), .C(N_288), .Y(IllOo_i_0_1_Z[7]) ); defparam \IllOo_i_0_1[7] .INIT=8'h58; // @28:524281 CFG4 \IllOo_i_0_0[1] ( .A(N_168_2), .B(N_288), .C(lIlOo_Z[1]), .D(lOo01), .Y(IllOo_i_0_0_Z[1]) ); defparam \IllOo_i_0_0[1] .INIT=16'hDDCD; // @28:466506 CFG2 o1IOo_RNI4E64A ( .A(I1IOo_Z), .B(o1IOo_Z), .Y(m26_1) ); defparam o1IOo_RNI4E64A.INIT=4'h1; // @28:522867 CFG2 un9_IOIOo_1 ( .A(l1OOo_Z), .B(OOIOo_Z), .Y(un9_IOIOo_1_Z) ); defparam un9_IOIOo_1.INIT=4'h4; // @28:523112 CFG2 un5_IlIOo_0 ( .A(oiOOo_Z), .B(IIIOo_Z), .Y(un5_IlIOo_0_Z) ); defparam un5_IlIOo_0.INIT=4'hE; // @28:524163 CFG2 lOlOo ( .A(OIlOo_Z), .B(i1lOo_Z), .Y(lOlOo_Z) ); defparam lOlOo.INIT=4'h2; // @28:466506 CFG2 liIOo_RNIHMIO6 ( .A(iiIOo_Z), .B(liIOo_Z), .Y(N_97) ); defparam liIOo_RNIHMIO6.INIT=4'h1; // @28:524281 CFG2 \IllOo_0_0_a2_1[4] ( .A(lOo01), .B(iII11), .Y(N_941) ); defparam \IllOo_0_0_a2_1[4] .INIT=4'h1; // @28:524281 CFG2 \IllOo_0_0_a2[2] ( .A(lOo01), .B(iOI11[2]), .Y(N_936) ); defparam \IllOo_0_0_a2[2] .INIT=4'h8; // @28:522845 CFG2 un3_IOIOo ( .A(OlIOo_Z), .B(liOOo_Z), .Y(un3_IOIOo_Z) ); defparam un3_IOIOo.INIT=4'h8; // @28:466506 CFG2 O1OOo_RNI8G024 ( .A(iiOOo_Z), .B(O1OOo_Z), .Y(N_63) ); defparam O1OOo_RNI8G024.INIT=4'h2; // @28:523274 CFG2 un3_I0IOo_1 ( .A(iiOOo_Z), .B(O1OOo_Z), .Y(un3_I0IOo_1_Z) ); defparam un3_I0IOo_1.INIT=4'h8; // @28:466506 CFG2 IIIOo_RNIKP865 ( .A(iOIOo_Z), .B(IIIOo_Z), .Y(N_95_mux) ); defparam IIIOo_RNIKP865.INIT=4'hE; // @28:524281 CFG2 \IllOo_i_0_a2[1] ( .A(lOo01), .B(iOI11[0]), .Y(N_288) ); defparam \IllOo_i_0_a2[1] .INIT=4'h8; // @28:524281 CFG2 \IllOo_i_0_o2[0] ( .A(iOI11[1]), .B(iOI11[2]), .Y(N_847) ); defparam \IllOo_i_0_o2[0] .INIT=4'hE; // @28:524421 CFG2 \I0lOo_RNO[1] ( .A(CO0), .B(I0lOo_Z[1]), .Y(I0lOo_RNO_Z[1]) ); defparam \I0lOo_RNO[1] .INIT=4'h6; // @28:522531 CFG4 un7_ioOOo_2_0 ( .A(oiOOo_Z), .B(loOOo_Z), .C(OOo01[0]), .D(OOo01[1]), .Y(un7_ioOOo_2_0_Z) ); defparam un7_ioOOo_2_0.INIT=16'h0040; // @28:522545 CFG4 un10_ioOOo_2 ( .A(OOo01[1]), .B(loOOo_Z), .C(iiOOo_Z), .D(OOo01[0]), .Y(un10_ioOOo_2_Z) ); defparam un10_ioOOo_2.INIT=16'h0008; // @28:522838 CFG3 IOIOo_0 ( .A(ilIOo_Z), .B(oiOOo_Z), .C(o1IOo_Z), .Y(IOIOo_0_Z) ); defparam IOIOo_0.INIT=8'hF8; // @28:522514 CFG3 un1_ioOOo_2 ( .A(olOOo_Z), .B(loOOo_Z), .C(OOo01[0]), .Y(un1_ioOOo_2_Z) ); defparam un1_ioOOo_2.INIT=8'h04; // @28:524035 CFG4 ooOOo_6 ( .A(iioo1_Z), .B(o1IOo_Z), .C(loIOo_Z), .D(I1IOo_Z), .Y(ooOOo_6_Z) ); defparam ooOOo_6.INIT=16'hFFFE; // @28:524035 CFG3 ooOOo_5 ( .A(l0IOo_Z), .B(liIOo_Z), .C(i0IOo_Z), .Y(ooOOo_5_Z) ); defparam ooOOo_5.INIT=8'hFE; // @28:466506 CFG3 \IOlOo_RNO_0[0] ( .A(ilIOo_Z), .B(IOlOo_Z[1]), .C(IOlOo_Z[0]), .Y(m20_e_1) ); defparam \IOlOo_RNO_0[0] .INIT=8'h02; // @28:466506 CFG4 \IioO1_RNO_0[3] ( .A(OlIOo_Z), .B(oIIOo_Z), .C(l1lOo_Z[11]), .D(l1lOo_Z[3]), .Y(m60_0) ); defparam \IioO1_RNO_0[3] .INIT=16'h135F; // @28:466506 CFG4 \IioO1_RNO_0[2] ( .A(OlIOo_Z), .B(oIIOo_Z), .C(l1lOo_Z[10]), .D(l1lOo_Z[2]), .Y(m55_0) ); defparam \IioO1_RNO_0[2] .INIT=16'h135F; // @28:466506 CFG4 \IioO1_RNO_0[6] ( .A(OlIOo_Z), .B(oIIOo_Z), .C(l1lOo_Z[14]), .D(l1lOo_Z[6]), .Y(m75_0) ); defparam \IioO1_RNO_0[6] .INIT=16'h135F; // @28:466506 CFG4 \IioO1_RNO_0[4] ( .A(OlIOo_Z), .B(oIIOo_Z), .C(l1lOo_Z[12]), .D(l1lOo_Z[4]), .Y(m65_0) ); defparam \IioO1_RNO_0[4] .INIT=16'h135F; // @28:466506 CFG4 \IioO1_RNO_0[1] ( .A(OlIOo_Z), .B(oIIOo_Z), .C(l1lOo_Z[9]), .D(l1lOo_Z[1]), .Y(m50_0) ); defparam \IioO1_RNO_0[1] .INIT=16'h135F; // @28:466506 CFG4 \IioO1_RNO_0[7] ( .A(OlIOo_Z), .B(oIIOo_Z), .C(l1lOo_Z[15]), .D(l1lOo_Z[7]), .Y(m80_0) ); defparam \IioO1_RNO_0[7] .INIT=16'h135F; // @28:466506 CFG4 \IioO1_RNO_0[5] ( .A(OlIOo_Z), .B(oIIOo_Z), .C(l1lOo_Z[13]), .D(l1lOo_Z[5]), .Y(m70_0) ); defparam \IioO1_RNO_0[5] .INIT=16'h135F; // @28:466506 CFG4 \IioO1_RNO_0[0] ( .A(OlIOo_Z), .B(oIIOo_Z), .C(l1lOo_Z[8]), .D(l1lOo_Z[0]), .Y(m45_0) ); defparam \IioO1_RNO_0[0] .INIT=16'h135F; // @28:524281 CFG3 \IllOo_0_0_a3_0[2] ( .A(N_936), .B(iOI11[1]), .C(CO0), .Y(N_890) ); defparam \IllOo_0_0_a3_0[2] .INIT=8'h02; // @28:523435 CFG4 l1IOo ( .A(O1OOo_Z), .B(I1IOo_Z), .C(iiOOo_Z), .D(olOOo_Z), .Y(l1IOo_Z) ); defparam l1IOo.INIT=16'h4000; // @28:522880 CFG4 un13_IOIOo ( .A(ilIOo_Z), .B(O1OOo_Z), .C(iiOOo_Z), .D(l1OOo_Z), .Y(un13_IOIOo_Z) ); defparam un13_IOIOo.INIT=16'h0020; // @28:466506 CFG3 IIIOo_RNI4555G ( .A(IIIOo_Z), .B(OlIOo_Z), .C(oIIOo_Z), .Y(N_96_mux) ); defparam IIIOo_RNI4555G.INIT=8'h01; // @28:466506 CFG3 i0IOo_RNIV2N4M ( .A(OiIOo_Z), .B(m26_1), .C(i0IOo_Z), .Y(m17_2) ); defparam i0IOo_RNIV2N4M.INIT=8'h04; // @28:523154 CFG3 olIOo ( .A(oiOOo_Z), .B(iiOOo_Z), .C(lOIOo_Z), .Y(olIOo_Z) ); defparam olIOo.INIT=8'hE0; // @28:522448 CFG4 un4_IoOOo_NE ( .A(ilOOo_Z[1]), .B(ilOOo_Z[0]), .C(OOo01[1]), .D(OOo01[0]), .Y(un4_IoOOo_NE_Z) ); defparam un4_IoOOo_NE.INIT=16'h7BDE; // @28:524281 CFG3 \IllOo_0_0_a2_2[4] ( .A(CO0), .B(N_936), .C(I0lOo_Z[1]), .Y(N_944) ); defparam \IllOo_0_0_a2_2[4] .INIT=8'h04; // @28:524281 CFG3 \IllOo_i_0_a2[0] ( .A(CO0), .B(lOo01), .C(iOI11[1]), .Y(N_942) ); defparam \IllOo_i_0_a2[0] .INIT=8'h40; // @28:524281 CFG3 \IllOo_i_0_a2_0[3] ( .A(CO0), .B(lOo01), .C(iOI11[1]), .Y(N_298) ); defparam \IllOo_i_0_a2_0[3] .INIT=8'h80; // @28:524281 CFG3 \IllOo_i_0_a3[8] ( .A(CO0), .B(N_936), .C(I0lOo_Z[1]), .Y(N_899) ); defparam \IllOo_i_0_a3[8] .INIT=8'hC8; // @28:522986 CFG3 OIIOo ( .A(liOOo_Z), .B(llIOo_Z), .C(lOIOo_Z), .Y(OIIOo_Z) ); defparam OIIOo.INIT=8'h80; // @28:522944 CFG3 oOIOo ( .A(liOOo_Z), .B(llIOo_Z), .C(lOIOo_Z), .Y(oOIOo_Z) ); defparam oOIOo.INIT=8'h20; // @28:524281 CFG2 \IllOo_i_0_a2_1[6] ( .A(lOo01), .B(N_847), .Y(N_937) ); defparam \IllOo_i_0_a2_1[6] .INIT=4'h2; // @28:524353 CFG4 \I1IO1_i_m2_i_m2[9] ( .A(iII11), .B(lllOo_Z[9]), .C(io001), .D(lOo01), .Y(iO1i0[9]) ); defparam \I1IO1_i_m2_i_m2[9] .INIT=16'hCCE4; // @28:524353 CFG4 \I1IO1_i_m2_i_m2[8] ( .A(iII11), .B(lllOo_Z[8]), .C(liI01), .D(lOo01), .Y(iO1i0[8]) ); defparam \I1IO1_i_m2_i_m2[8] .INIT=16'hCCE4; // @28:524353 CFG4 \I1IO1_i_m2_i_m2[7] ( .A(iII11), .B(lllOo_Z[7]), .C(oo001[7]), .D(lOo01), .Y(iO1i0[7]) ); defparam \I1IO1_i_m2_i_m2[7] .INIT=16'hCCE4; // @28:524353 CFG4 \I1IO1_i_m2_i_m2[6] ( .A(iII11), .B(lllOo_Z[6]), .C(oo001[6]), .D(lOo01), .Y(iO1i0[6]) ); defparam \I1IO1_i_m2_i_m2[6] .INIT=16'hCCE4; // @28:524353 CFG4 \I1IO1_i_m2_i_m2[5] ( .A(iII11), .B(lllOo_Z[5]), .C(oo001[5]), .D(lOo01), .Y(iO1i0[5]) ); defparam \I1IO1_i_m2_i_m2[5] .INIT=16'hCCE4; // @28:524353 CFG4 \I1IO1_i_m2_i_m2[4] ( .A(iII11), .B(lllOo_Z[4]), .C(oo001[4]), .D(lOo01), .Y(iO1i0[4]) ); defparam \I1IO1_i_m2_i_m2[4] .INIT=16'hCCE4; // @28:524353 CFG4 \I1IO1_i_m2_i_m2[3] ( .A(iII11), .B(lllOo_Z[3]), .C(oo001[3]), .D(lOo01), .Y(iO1i0[3]) ); defparam \I1IO1_i_m2_i_m2[3] .INIT=16'hCCE4; // @28:524353 CFG4 \I1IO1_i_m2_i_m2[2] ( .A(iII11), .B(lllOo_Z[2]), .C(oo001[2]), .D(lOo01), .Y(iO1i0[2]) ); defparam \I1IO1_i_m2_i_m2[2] .INIT=16'hCCE4; // @28:524353 CFG4 \I1IO1_i_m2_i_m2[1] ( .A(iII11), .B(lllOo_Z[1]), .C(oo001[1]), .D(lOo01), .Y(iO1i0[1]) ); defparam \I1IO1_i_m2_i_m2[1] .INIT=16'hCCE4; // @28:524353 CFG4 \I1IO1_i_m2_i_m2[0] ( .A(iII11), .B(lllOo_Z[0]), .C(oo001[0]), .D(lOo01), .Y(iO1i0[0]) ); defparam \I1IO1_i_m2_i_m2[0] .INIT=16'hCCE4; // @28:522838 CFG4 IOIOo_2 ( .A(illOo_Z), .B(I1IOo_Z), .C(olOOo_Z), .D(IOIOo_0_Z), .Y(IOIOo_2_Z) ); defparam IOIOo_2.INIT=16'hFF0E; // @28:522838 CFG4 IOIOo_1_0 ( .A(OOIOo_Z), .B(oiOOo_Z), .C(olOOo_Z), .D(un3_IOIOo_Z), .Y(IOIOo_1_0_Z) ); defparam IOIOo_1_0.INIT=16'hFF08; // @28:524281 CFG4 \IllOo_i_0_0[0] ( .A(N_847), .B(lIlOo_Z[0]), .C(lOo01), .D(N_288), .Y(IllOo_i_0_0_Z[0]) ); defparam \IllOo_i_0_0[0] .INIT=16'hAB03; // @28:466506 CFG4 \IOlOo_RNO_0[3] ( .A(OoIOo_Z), .B(iioo1_Z), .C(loIOo_Z), .D(N_97), .Y(m35_2) ); defparam \IOlOo_RNO_0[3] .INIT=16'h0100; // @28:524035 CFG4 ooOOo_7 ( .A(OiIOo_Z), .B(ilIOo_Z), .C(iiIOo_Z), .D(ooOOo_5_Z), .Y(ooOOo_7_Z) ); defparam ooOOo_7.INIT=16'hFFFE; // @28:524281 CFG3 \IllOo_0_0_0[2] ( .A(N_890), .B(lIlOo_Z[2]), .C(N_941), .Y(IllOo_0_0_0_Z[2]) ); defparam \IllOo_0_0_0[2] .INIT=8'hEA; // @28:466506 CFG4 \IOlOo_RNO_1[0] ( .A(l0IOo_Z), .B(loIOo_Z), .C(N_97), .D(m26_1), .Y(m26_4) ); defparam \IOlOo_RNO_1[0] .INIT=16'h1000; // @28:466506 CFG4 I1IOo_RNO ( .A(i0IOo_Z), .B(liIOo_Z), .C(N_63), .D(l1OOo_Z), .Y(O1IOo) ); defparam I1IOo_RNO.INIT=16'h00E0; // @28:466506 CFG4 OOIOo_RNIKB7HO ( .A(OOIOo_Z), .B(iOIOo_Z), .C(lOIOo_Z), .D(N_96_mux), .Y(N_110_mux) ); defparam OOIOo_RNIKB7HO.INIT=16'h0100; // @28:524281 CFG4 \IllOo_0_0_a2[4] ( .A(iOI11[2]), .B(iOI11[1]), .C(iOI11[0]), .D(CO0), .Y(N_939) ); defparam \IllOo_0_0_a2[4] .INIT=16'h0004; // @28:524281 CFG3 \IllOo_i_0_a3_0[6] ( .A(iOI11[0]), .B(OII11[6]), .C(N_937), .Y(N_882) ); defparam \IllOo_i_0_a3_0[6] .INIT=8'h10; // @28:524281 CFG4 \IllOo_i_0_a3_1[5] ( .A(I0lOo_Z[1]), .B(iOI11[0]), .C(N_936), .D(CO0), .Y(N_885) ); defparam \IllOo_i_0_a3_1[5] .INIT=16'h1000; // @28:522867 CFG4 un9_IOIOo ( .A(O1OOo_Z), .B(olOOo_Z), .C(iiOOo_Z), .D(un9_IOIOo_1_Z), .Y(un9_IOIOo_Z) ); defparam un9_IOIOo.INIT=16'h1000; // @28:524042 CFG4 un3_ooOOo ( .A(lOIOo_Z), .B(liOOo_Z), .C(oIIOo_Z), .D(N_95_mux), .Y(un3_ooOOo_Z) ); defparam un3_ooOOo.INIT=16'h0004; // @28:524281 CFG4 \IllOo_i_0_a2_0[6] ( .A(I0lOo_Z[1]), .B(iOI11[0]), .C(N_936), .D(CO0), .Y(N_943) ); defparam \IllOo_i_0_a2_0[6] .INIT=16'h2000; // @28:523262 CFG4 I0IOo ( .A(iioo1_Z), .B(loIOo_Z), .C(l0IOo_Z), .D(un3_I0IOo_1_Z), .Y(I0IOo_Z) ); defparam I0IOo.INIT=16'hFE00; // @28:524281 CFG3 \IllOo_i_0_a3[5] ( .A(iOI11[0]), .B(OII11[5]), .C(N_937), .Y(N_883) ); defparam \IllOo_i_0_a3[5] .INIT=8'hB0; // @28:523530 CFG4 IoIOo ( .A(OoIOo_Z), .B(l1OOo_Z), .C(iiOOo_Z), .D(un3_I0IOo_1_Z), .Y(IoIOo_Z) ); defparam IoIOo.INIT=16'hECA0; // @28:466506 CFG4 iiIOo_RNO ( .A(OiIOo_Z), .B(iiIOo_Z), .C(l1OOo_Z), .D(N_63), .Y(oiIOo) ); defparam iiIOo_RNO.INIT=16'hE000; // @28:466506 CFG4 liIOo_RNO ( .A(OiIOo_Z), .B(iiIOo_Z), .C(l1OOo_Z), .D(N_63), .Y(IiIOo) ); defparam liIOo_RNO.INIT=16'h0E00; // @28:466506 CFG4 iioo1_RNO ( .A(iiIOo_Z), .B(ilIOo_Z), .C(un3_I0IOo_1_Z), .D(l1OOo_Z), .Y(oioo1) ); defparam iioo1_RNO.INIT=16'h00E0; // @28:466506 CFG4 OoIOo_RNO ( .A(iiIOo_Z), .B(ilIOo_Z), .C(un3_I0IOo_1_Z), .D(l1OOo_Z), .Y(i1IOo) ); defparam OoIOo_RNO.INIT=16'hE000; // @28:466506 CFG4 iioo1_RNIO9H6E ( .A(iioo1_Z), .B(loIOo_Z), .C(l0IOo_Z), .D(N_63), .Y(N_113_mux) ); defparam iioo1_RNIO9H6E.INIT=16'hFE00; // @28:524281 CFG3 \IllOo_i_0_a3_1[3] ( .A(N_936), .B(iOI11[0]), .C(I0lOo_Z[1]), .Y(N_889) ); defparam \IllOo_i_0_a3_1[3] .INIT=8'h20; // @28:524281 CFG3 \IllOo_i_0_2[3] ( .A(N_298), .B(iOI11[2]), .C(N_288), .Y(N_221_2) ); defparam \IllOo_i_0_2[3] .INIT=8'hBA; // @28:508774 CFG4 \un1_iOIOo[0] ( .A(iOIOo_Z), .B(llIOo_Z), .C(un5_IlIOo_0_Z), .D(iiOOo_Z), .Y(un1_iOIOo_Z[0]) ); defparam \un1_iOIOo[0] .INIT=16'h222E; // @28:524281 CFG4 \IllOo_i_0_m2_2[1] ( .A(CO0), .B(lOo01), .C(OII11[1]), .D(N_847), .Y(N_168_2) ); defparam \IllOo_i_0_m2_2[1] .INIT=16'h88C0; // @28:524281 CFG4 \IllOo_i_0_1[8] ( .A(OII11[8]), .B(iOI11[1]), .C(N_937), .D(N_288), .Y(IllOo_i_0_1_Z[8]) ); defparam \IllOo_i_0_1[8] .INIT=16'h7350; // @28:524281 CFG4 \IllOo_i_0_0[7] ( .A(OII11[7]), .B(lIlOo_Z[7]), .C(lOo01), .D(N_937), .Y(IllOo_i_0_0_Z[7]) ); defparam \IllOo_i_0_0[7] .INIT=16'h5703; // @28:524281 CFG4 \IllOo_i_0_1[0] ( .A(iOI11[0]), .B(OII11[0]), .C(N_942), .D(N_937), .Y(IllOo_i_0_1_Z[0]) ); defparam \IllOo_i_0_1[0] .INIT=16'hF1F0; // @28:524281 CFG4 \IllOo_0_0_0[9] ( .A(N_941), .B(N_937), .C(OII11[9]), .D(lIlOo_Z[9]), .Y(IllOo_0_0_0_Z[9]) ); defparam \IllOo_0_0_0[9] .INIT=16'hEAC0; // @28:524281 CFG4 \IllOo_i_0_0[3] ( .A(OII11[3]), .B(lIlOo_Z[3]), .C(lOo01), .D(N_937), .Y(IllOo_i_0_0_Z[3]) ); defparam \IllOo_i_0_0[3] .INIT=16'h5703; // @28:524281 CFG4 \IllOo_0_0_0[4] ( .A(N_941), .B(N_937), .C(OII11[4]), .D(lIlOo_Z[4]), .Y(IllOo_0_0_0_Z[4]) ); defparam \IllOo_0_0_0[4] .INIT=16'hEAC0; // @28:524035 CFG4 ooOOo_9 ( .A(iiOOo_Z), .B(ooOOo_7_Z), .C(oiOOo_Z), .D(liOOo_Z), .Y(ooOOo_9_Z) ); defparam ooOOo_9.INIT=16'hCCCD; // @28:466506 CFG2 OiIOo_RNO ( .A(N_113_mux), .B(l1OOo_Z), .Y(ioIOo) ); defparam OiIOo_RNO.INIT=4'h8; // @28:466506 CFG2 i0IOo_RNO ( .A(N_113_mux), .B(l1OOo_Z), .Y(o0IOo) ); defparam i0IOo_RNO.INIT=4'h2; // @28:524281 CFG2 \IllOo_0_0_a3_2[9] ( .A(N_943), .B(iOI11[1]), .Y(N_898) ); defparam \IllOo_0_0_a3_2[9] .INIT=4'h2; // @28:524085 CFG3 \IOlOo_RNO[1] ( .A(m17_2), .B(N_95_mux), .C(N_97), .Y(N_127_mux_i) ); defparam \IOlOo_RNO[1] .INIT=8'hDF; // @28:523876 CFG3 \IioO1_RNO[5] ( .A(OllOo_Z[5]), .B(l0IOo_Z), .C(m70_0), .Y(N_122_mux_i) ); defparam \IioO1_RNO[5] .INIT=8'h8F; // @28:523876 CFG3 \IioO1_RNO[4] ( .A(OllOo_Z[4]), .B(l0IOo_Z), .C(m65_0), .Y(N_121_mux_i) ); defparam \IioO1_RNO[4] .INIT=8'h8F; // @28:523876 CFG3 \IioO1_RNO[3] ( .A(OllOo_Z[3]), .B(l0IOo_Z), .C(m60_0), .Y(N_120_mux_i) ); defparam \IioO1_RNO[3] .INIT=8'h8F; // @28:523876 CFG3 \IioO1_RNO[2] ( .A(OllOo_Z[2]), .B(l0IOo_Z), .C(m55_0), .Y(N_119_mux_i) ); defparam \IioO1_RNO[2] .INIT=8'h8F; // @28:523876 CFG3 \IioO1_RNO[1] ( .A(OllOo_Z[1]), .B(l0IOo_Z), .C(m50_0), .Y(N_118_mux_i) ); defparam \IioO1_RNO[1] .INIT=8'h8F; // @28:523876 CFG3 \IioO1_RNO[0] ( .A(OllOo_Z[0]), .B(l0IOo_Z), .C(m45_0), .Y(N_117_mux_i) ); defparam \IioO1_RNO[0] .INIT=8'h8F; // @28:523876 CFG3 \IioO1_RNO[7] ( .A(OllOo_Z[7]), .B(l0IOo_Z), .C(m80_0), .Y(N_124_mux_i) ); defparam \IioO1_RNO[7] .INIT=8'h8F; // @28:523876 CFG3 \IioO1_RNO[6] ( .A(OllOo_Z[6]), .B(l0IOo_Z), .C(m75_0), .Y(N_123_mux_i) ); defparam \IioO1_RNO[6] .INIT=8'h8F; // @28:522838 CFG4 IOIOo_5 ( .A(IOIOo_2_Z), .B(un13_IOIOo_Z), .C(un9_IOIOo_Z), .D(IOIOo_1_0_Z), .Y(IOIOo_5_Z) ); defparam IOIOo_5.INIT=16'hFFFE; // @28:524281 CFG4 \IllOo_i_0_2[8] ( .A(lOo01), .B(lIlOo_Z[8]), .C(IllOo_i_0_1_Z[8]), .D(N_899), .Y(IllOo_i_0_2_Z[8]) ); defparam \IllOo_i_0_2[8] .INIT=16'hFFF1; // @28:524281 CFG4 \IllOo_i_0_1[6] ( .A(N_943), .B(N_882), .C(lIlOo_Z[6]), .D(lOo01), .Y(IllOo_i_0_1_Z[6]) ); defparam \IllOo_i_0_1[6] .INIT=16'hEEEF; // @28:524281 CFG4 \IllOo_i_0_1[5] ( .A(N_885), .B(N_883), .C(lIlOo_Z[5]), .D(lOo01), .Y(IllOo_i_0_1_Z[5]) ); defparam \IllOo_i_0_1[5] .INIT=16'hEEEF; // @28:524035 CFG4 ooOOo ( .A(ooOOo_6_Z), .B(un3_IOIOo_Z), .C(un3_ooOOo_Z), .D(ooOOo_9_Z), .Y(ooOOo_Z) ); defparam ooOOo.INIT=16'hFFFE; // @28:524281 CFG4 \IllOo_0_0_a3[4] ( .A(lOo01), .B(N_939), .C(iOI11[1]), .D(iOI11[0]), .Y(N_886) ); defparam \IllOo_0_0_a3[4] .INIT=16'h8A88; // @28:522514 CFG4 un1_ioOOo ( .A(un1_ioOOo_2_Z), .B(ooOOo_Z), .C(OOo01[1]), .D(liOOo_Z), .Y(un1_ioOOo_Z) ); defparam un1_ioOOo.INIT=16'h0008; // @28:524281 CFG4 \IllOo_0_0[2] ( .A(OII11[2]), .B(N_886), .C(N_937), .D(IllOo_0_0_0_Z[2]), .Y(IllOo[2]) ); defparam \IllOo_0_0[2] .INIT=16'hFFEC; // @28:524281 CFG4 \IllOo_0_0[9] ( .A(N_221_2), .B(N_898), .C(iOI11[2]), .D(IllOo_0_0_0_Z[9]), .Y(IllOo[9]) ); defparam \IllOo_0_0[9] .INIT=16'hFFCE; // @28:524085 CFG4 \IOlOo_RNO[3] ( .A(m17_2), .B(l0IOo_Z), .C(m35_2), .D(N_110_mux), .Y(N_140_mux_i) ); defparam \IOlOo_RNO[3] .INIT=16'hDFFF; // @28:524085 CFG4 \IOlOo_RNO[0] ( .A(m20_e_1), .B(N_96_mux), .C(m26_4), .D(lOlOo_Z), .Y(N_136_mux_i) ); defparam \IOlOo_RNO[0] .INIT=16'h3FBF; // @28:524085 CFG3 \IOlOo_RNO[2] ( .A(l0IOo_Z), .B(N_110_mux), .C(loIOo_Z), .Y(N_62_i) ); defparam \IOlOo_RNO[2] .INIT=8'h3B; // @28:522531 CFG3 un7_ioOOo ( .A(ooOOo_Z), .B(olOOo_Z), .C(un7_ioOOo_2_0_Z), .Y(un7_ioOOo_Z) ); defparam un7_ioOOo.INIT=8'h20; // @28:524281 CFG4 \IllOo_0_0[4] ( .A(N_886), .B(iOI11[1]), .C(N_944), .D(IllOo_0_0_0_Z[4]), .Y(IllOo[4]) ); defparam \IllOo_0_0[4] .INIT=16'hFFBA; // @28:522545 CFG3 un10_ioOOo ( .A(ooOOo_Z), .B(olOOo_Z), .C(un10_ioOOo_2_Z), .Y(un10_ioOOo_Z) ); defparam un10_ioOOo.INIT=8'h20; // @28:522838 CFG4 IOIOo ( .A(IOIOo_5_Z), .B(ooOOo_Z), .C(liOOo_Z), .D(olOOo_Z), .Y(IOIOo_Z) ); defparam IOIOo.INIT=16'hAAEA; // @28:524317 CFG4 \lllOo_RNO[8] ( .A(iOI11[0]), .B(N_298), .C(N_846), .D(IllOo_i_0_2_Z[8]), .Y(N_213_i) ); defparam \lllOo_RNO[8] .INIT=16'h000B; // @28:524317 CFG4 \lllOo_RNO[7] ( .A(IllOo_i_0_0_Z[7]), .B(N_944), .C(N_846), .D(IllOo_i_0_1_Z[7]), .Y(N_211_i) ); defparam \lllOo_RNO[7] .INIT=16'h0001; // @28:524317 CFG4 \lllOo_RNO[6] ( .A(iOI11[0]), .B(N_298), .C(N_846), .D(IllOo_i_0_1_Z[6]), .Y(N_226_i) ); defparam \lllOo_RNO[6] .INIT=16'h000B; // @28:524317 CFG4 \lllOo_RNO[5] ( .A(iOI11[0]), .B(N_298), .C(N_846), .D(IllOo_i_0_1_Z[5]), .Y(N_224_i) ); defparam \lllOo_RNO[5] .INIT=16'h000B; // @28:524317 CFG4 \lllOo_RNO[3] ( .A(N_889), .B(N_846), .C(N_221_2), .D(IllOo_i_0_0_Z[3]), .Y(N_221_i) ); defparam \lllOo_RNO[3] .INIT=16'h0001; // @28:524317 CFG4 \lllOo_RNO[0] ( .A(IllOo_i_0_0_Z[0]), .B(N_846), .C(N_944), .D(IllOo_i_0_1_Z[0]), .Y(N_216_i) ); defparam \lllOo_RNO[0] .INIT=16'h0001; // @28:522457 CFG2 un7_IoOOo_0 ( .A(un1_ioOOo_Z), .B(un7_ioOOo_Z), .Y(un7_IoOOo_0_Z) ); defparam un7_IoOOo_0.INIT=4'hE; // @28:524171 CFG4 iOlOo ( .A(i1lOo_Z), .B(OIlOo_Z), .C(N_25_0_2), .D(N_25_0_1), .Y(iOlOo_Z) ); defparam iOlOo.INIT=16'h4441; // @28:522594 CFG4 OiOOo ( .A(un7_ioOOo_Z), .B(un1_ioOOo_Z), .C(oiOOo_Z), .D(un10_ioOOo_Z), .Y(OiOOo_Z) ); defparam OiOOo.INIT=16'hAABA; // @28:522674 CFG4 IiOOo ( .A(un7_ioOOo_Z), .B(un1_ioOOo_Z), .C(iiOOo_Z), .D(un10_ioOOo_Z), .Y(IiOOo_Z) ); defparam IiOOo.INIT=16'hFF10; // @28:524317 CFG4 \lllOo_RNO[1] ( .A(IllOo_i_0_0_Z[1]), .B(N_846), .C(I0lOo_Z[1]), .D(N_936), .Y(N_218_i) ); defparam \lllOo_RNO[1] .INIT=16'h1011; // @28:522514 CFG4 ioOOo ( .A(un7_ioOOo_Z), .B(un1_ioOOo_Z), .C(liOOo_Z), .D(un10_ioOOo_Z), .Y(ioOOo_Z) ); defparam ioOOo.INIT=16'hCCDC; // @28:508774 CFG4 \un1_IoOOo[0] ( .A(un4_IoOOo_NE_Z), .B(loOOo_Z), .C(un7_IoOOo_0_Z), .D(un10_ioOOo_Z), .Y(un1_IoOOo_Z[0]) ); defparam \un1_IoOOo[0] .INIT=16'h222E; // @28:522754 CFG4 ollOo ( .A(lOIOo_Z), .B(illOo_Z), .C(OiOOo_Z), .D(iiOOo_Z), .Y(ollOo_Z) ); defparam ollOo.INIT=16'h7444; // @28:524212 CTSE_T8B10B OolOo ( .IIlOo_0(IIlOo[1]), .IIlOo_7(IIlOo[8]), .IIlOo_5(IIlOo[6]), .IIlOo_8(IIlOo[9]), .IIlOo_6(IIlOo[7]), .IIlOo_2(IIlOo[3]), .IioO1(IioO1_Z[7:0]), .IOlOo(IOlOo_Z[3:0]), .N_55(N_55), .N_60_i(N_60_i), .N_129_i(N_129_i), .N_89_i(N_89_i), .N_25_0_2(N_25_0_2), .N_25_0_1(N_25_0_1), .lOlOo(lOlOo_Z) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PETEX_TOP_26s_0s_1s */ module CTSE_PEREX_PMA_26s_0s_1s_0_1_2_3_4 ( OI1i0, iO1i0, OlI11_i_12, OlI11_i_0, OlI11_i_2, OlI11_i_10, OlI11_3, OlI11_16, OlI11_7, OlI11_5, OlI11_2, OlI11_15, OlI11_10, OlI11_0, OlI11_13, OlI11_6, OlI11_12, OlI11_9, OlI11_19, OlI11_17, Oiio1_RNI7H0P9_0, Oiio1_RNI1B0P9_0, Oiio1, i1Oi1_9, i1Oi1_6, i1Oi1_5, i1Oi1_2, i1Oi1_0, iII11, N_147_i, N_24_i, N_146_i_0, N_146, N_145, iOl01_i, iOl01, IOOi1_1z, ilI11, OOI11, PF_IOD_CDR_C0_0_RX_CLK_R, ooI01_i ) ; input [9:0] OI1i0 ; input [9:0] iO1i0 ; output OlI11_i_12 ; output OlI11_i_0 ; output OlI11_i_2 ; output OlI11_i_10 ; output OlI11_3 ; output OlI11_16 ; output OlI11_7 ; output OlI11_5 ; output OlI11_2 ; output OlI11_15 ; output OlI11_10 ; output OlI11_0 ; output OlI11_13 ; output OlI11_6 ; output OlI11_12 ; output OlI11_9 ; output OlI11_19 ; output OlI11_17 ; output Oiio1_RNI7H0P9_0 ; output Oiio1_RNI1B0P9_0 ; output [19:0] Oiio1 ; output i1Oi1_9 ; output i1Oi1_6 ; output i1Oi1_5 ; output i1Oi1_2 ; output i1Oi1_0 ; input iII11 ; output N_147_i ; output N_24_i ; output N_146_i_0 ; output N_146 ; output N_145 ; input iOl01_i ; input iOl01 ; output IOOi1_1z ; output ilI11 ; input OOI11 ; input PF_IOD_CDR_C0_0_RX_CLK_R ; input ooI01_i ; wire OlI11_i_12 ; wire OlI11_i_0 ; wire OlI11_i_2 ; wire OlI11_i_10 ; wire OlI11_3 ; wire OlI11_16 ; wire OlI11_7 ; wire OlI11_5 ; wire OlI11_2 ; wire OlI11_15 ; wire OlI11_10 ; wire OlI11_0 ; wire OlI11_13 ; wire OlI11_6 ; wire OlI11_12 ; wire OlI11_9 ; wire OlI11_19 ; wire OlI11_17 ; wire Oiio1_RNI7H0P9_0 ; wire Oiio1_RNI1B0P9_0 ; wire i1Oi1_9 ; wire i1Oi1_6 ; wire i1Oi1_5 ; wire i1Oi1_2 ; wire i1Oi1_0 ; wire iII11 ; wire N_147_i ; wire N_24_i ; wire N_146_i_0 ; wire N_146 ; wire N_145 ; wire iOl01_i ; wire iOl01 ; wire IOOi1_1z ; wire ilI11 ; wire OOI11 ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire ooI01_i ; wire [9:0] l1Oi1; wire [9:0] I1Oi1_Z; wire [19:1] i1Oi1; wire [19:0] o1Oi1_Z; wire [19:0] O1Oi1_Z; wire [19:0] ioio1_Z; wire [9:0] ooio1_Z; wire [19:10] ioio1_5_i_m2_i_m2_Z; wire [19:0] o1Oi1_2_Z; wire [19:0] o1Oi1_3_Z; wire [19:0] o1Oi1_4_Z; wire [19:0] o1Oi1_1_Z; wire [4:0] I1Oi1_0_Z; wire [9:3] I1Oi1_1_Z; wire [19:0] o1Oi1_0_Z; wire [19:0] un67_o1Oi1; wire [16:8] o1Oi1_7_Z; wire o0Oi1_Z ; wire VCC ; wire GND ; wire l1Oi14 ; wire N_301_i ; wire IOOi1_RNO_0_Z ; wire NN_1 ; wire NN_2 ; wire NN_3 ; wire NN_4 ; wire un67_I1Oi1_2_0 ; wire un99_I1Oi1_1 ; wire un99_I1Oi1 ; wire un147_I1Oi1_0 ; wire un99_I1Oi1_3 ; wire un147_I1Oi1 ; wire un51_I1Oi1_1 ; wire un12_I1Oi1_2 ; wire un51_I1Oi1 ; wire un159_I1Oi1_1 ; wire un62_o1Oi1 ; wire un42_o1Oi1_1 ; wire un42_o1Oi1 ; wire un5_o1Oi1 ; wire un22_o1Oi1 ; wire un31_I1Oi1_2 ; wire un67_I1Oi1 ; wire un71_I1Oi1_2 ; wire un32_o1Oi1_0 ; wire un155_I1Oi1_0 ; wire un171_I1Oi1_0 ; wire un8_I1Oi1_1 ; wire un27_I1Oi1_1 ; wire un4_I1Oi1_1 ; wire un12_I1Oi1_1 ; wire un23_I1Oi1_1 ; wire un31_I1Oi1_1 ; wire un35_I1Oi1_1 ; wire un51_I1Oi1_2 ; wire un75_I1Oi1_3 ; wire un107_I1Oi1_2 ; wire un111_I1Oi1_2 ; wire un123_I1Oi1_3 ; wire un165_I1Oi1_3 ; wire un12_o1Oi1_4 ; wire un12_o1Oi1_3 ; wire un5_o1Oi1_5 ; wire un5_o1Oi1_2 ; wire un22_o1Oi1_1 ; wire un87_I1Oi1_1 ; wire Iiio1_0_a3_4_Z ; wire Iiio1_0_a3_0_4_Z ; wire un179_I1Oi1_1 ; wire un135_I1Oi1_1 ; wire un189_I1Oi1_1 ; wire un117_I1Oi1_2 ; wire un219_I1Oi1_2 ; wire un195_I1Oi1_0 ; wire un141_I1Oi1_1 ; wire un16_I1Oi1_1_0 ; wire un35_I1Oi1_1_0 ; wire un75_I1Oi1_0 ; wire un131_I1Oi1_1 ; wire un93_I1Oi1_1 ; wire un55_I1Oi1_1 ; wire un107_I1Oi1_0 ; wire un83_I1Oi1_1 ; wire un63_I1Oi1_1 ; wire un43_I1Oi1_1 ; wire un47_I1Oi1_1 ; wire un165_I1Oi1_2 ; wire m50_0_a3_0_5 ; wire m50_0_a3_0_4 ; wire m50_0_a3_5 ; wire m50_0_a3_4 ; wire un5_o1Oi1_3_0 ; wire un12_o1Oi1_4_0 ; wire Iiio1_0_a3_5_Z ; wire Iiio1_0_a3_0_5_Z ; wire un31_I1Oi1_2_0 ; wire un12_I1Oi1_2_0 ; wire un207_I1Oi1_2 ; wire un203_I1Oi1_2 ; wire un213_I1Oi1_2 ; wire un27_I1Oi1_2 ; wire un8_I1Oi1_2 ; wire un23_I1Oi1_2_0 ; wire un4_I1Oi1_2_0 ; wire un16_I1Oi1 ; wire un35_I1Oi1 ; wire un43_I1Oi1 ; wire un47_I1Oi1 ; wire un55_I1Oi1 ; wire un75_I1Oi1 ; wire un83_I1Oi1 ; wire un107_I1Oi1 ; wire un111_I1Oi1 ; wire un123_I1Oi1 ; wire un131_I1Oi1 ; wire un141_I1Oi1 ; wire un155_I1Oi1 ; wire un159_I1Oi1 ; wire un165_I1Oi1 ; wire un171_I1Oi1 ; wire un183_I1Oi1 ; wire un195_I1Oi1 ; wire un52_o1Oi1 ; wire N_559 ; wire N_558 ; wire N_930 ; wire N_931 ; wire un117_I1Oi1 ; wire un135_I1Oi1 ; wire un179_I1Oi1 ; wire un189_I1Oi1 ; wire un219_I1Oi1 ; wire un12_o1Oi1 ; wire un32_o1Oi1 ; wire N_946 ; wire un1_I1Oi1_4 ; wire un1_I1Oi1_6 ; wire un1_I1Oi1_5 ; // @28:507842 SLE o0Oi1 ( .Q(o0Oi1_Z), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OOI11), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507842 SLE i0Oi1 ( .Q(ilI11), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(o0Oi1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:508774 SLE \genblk1.l1Oi1[0] ( .Q(l1Oi1[0]), .ADn(GND), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I1Oi1_Z[0]), .EN(l1Oi14), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509549 SLE IOOi1 ( .Q(IOOi1_1z), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_301_i), .EN(IOOi1_RNO_0_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:508774 SLE \genblk1.l1Oi1[9] ( .Q(l1Oi1[9]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I1Oi1_Z[9]), .EN(l1Oi14), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:508774 SLE \genblk1.l1Oi1[8] ( .Q(l1Oi1[8]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I1Oi1_Z[8]), .EN(l1Oi14), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:508774 SLE \genblk1.l1Oi1[7] ( .Q(l1Oi1[7]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I1Oi1_Z[7]), .EN(l1Oi14), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:508774 SLE \genblk1.l1Oi1[6] ( .Q(l1Oi1[6]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I1Oi1_Z[6]), .EN(l1Oi14), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:508774 SLE \genblk1.l1Oi1[5] ( .Q(l1Oi1[5]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I1Oi1_Z[5]), .EN(l1Oi14), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:508774 SLE \genblk1.l1Oi1[4] ( .Q(l1Oi1[4]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I1Oi1_Z[4]), .EN(l1Oi14), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:508774 SLE \genblk1.l1Oi1[3] ( .Q(l1Oi1[3]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I1Oi1_Z[3]), .EN(l1Oi14), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:508774 SLE \genblk1.l1Oi1[2] ( .Q(l1Oi1[2]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I1Oi1_Z[2]), .EN(l1Oi14), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:508774 SLE \genblk1.l1Oi1[1] ( .Q(l1Oi1[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I1Oi1_Z[1]), .EN(l1Oi14), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509197 SLE \Oiio1_Z[9] ( .Q(Oiio1[9]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Oi1_9), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509197 SLE \Oiio1_Z[8] ( .Q(NN_1), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Oi1[8]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509197 SLE \Oiio1_Z[7] ( .Q(Oiio1[7]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Oi1[7]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509197 SLE \Oiio1_Z[6] ( .Q(Oiio1[6]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Oi1_6), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509197 SLE \Oiio1_Z[5] ( .Q(Oiio1[5]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Oi1_5), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509197 SLE \Oiio1_Z[4] ( .Q(Oiio1[4]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Oi1[4]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509197 SLE \Oiio1_Z[3] ( .Q(Oiio1[3]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Oi1[3]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509197 SLE \Oiio1_Z[2] ( .Q(Oiio1[2]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Oi1_2), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509197 SLE \Oiio1_Z[1] ( .Q(NN_2), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Oi1[1]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509197 SLE \Oiio1_Z[0] ( .Q(Oiio1[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Oi1_0), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509113 SLE \genblk1.i1Oi1[4] ( .Q(i1Oi1[4]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(o1Oi1_Z[4]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509113 SLE \genblk1.i1Oi1[3] ( .Q(i1Oi1[3]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(o1Oi1_Z[3]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509113 SLE \genblk1.i1Oi1[2] ( .Q(i1Oi1_2), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(o1Oi1_Z[2]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509113 SLE \genblk1.i1Oi1[1] ( .Q(i1Oi1[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(o1Oi1_Z[1]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509113 SLE \genblk1.i1Oi1[0] ( .Q(i1Oi1_0), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(o1Oi1_Z[0]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509197 SLE \Oiio1_Z[19] ( .Q(Oiio1[19]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Oi1[19]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509197 SLE \Oiio1_Z[18] ( .Q(NN_3), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Oi1[18]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509197 SLE \Oiio1_Z[17] ( .Q(Oiio1[17]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Oi1[17]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509197 SLE \Oiio1_Z[16] ( .Q(Oiio1[16]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Oi1[16]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509197 SLE \Oiio1_Z[15] ( .Q(Oiio1[15]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Oi1[15]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509197 SLE \Oiio1_Z[14] ( .Q(Oiio1[14]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Oi1[14]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509197 SLE \Oiio1_Z[13] ( .Q(Oiio1[13]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Oi1[13]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509197 SLE \Oiio1_Z[12] ( .Q(Oiio1[12]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Oi1[12]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509197 SLE \Oiio1_Z[11] ( .Q(NN_4), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Oi1[11]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509197 SLE \Oiio1_Z[10] ( .Q(Oiio1[10]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i1Oi1[10]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509113 SLE \genblk1.i1Oi1[19] ( .Q(i1Oi1[19]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(o1Oi1_Z[19]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509113 SLE \genblk1.i1Oi1[18] ( .Q(i1Oi1[18]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(o1Oi1_Z[18]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509113 SLE \genblk1.i1Oi1[17] ( .Q(i1Oi1[17]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(o1Oi1_Z[17]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509113 SLE \genblk1.i1Oi1[16] ( .Q(i1Oi1[16]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(o1Oi1_Z[16]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509113 SLE \genblk1.i1Oi1[15] ( .Q(i1Oi1[15]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(o1Oi1_Z[15]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509113 SLE \genblk1.i1Oi1[14] ( .Q(i1Oi1[14]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(o1Oi1_Z[14]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509113 SLE \genblk1.i1Oi1[13] ( .Q(i1Oi1[13]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(o1Oi1_Z[13]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509113 SLE \genblk1.i1Oi1[12] ( .Q(i1Oi1[12]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(o1Oi1_Z[12]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509113 SLE \genblk1.i1Oi1[11] ( .Q(i1Oi1[11]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(o1Oi1_Z[11]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509113 SLE \genblk1.i1Oi1[10] ( .Q(i1Oi1[10]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(o1Oi1_Z[10]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509113 SLE \genblk1.i1Oi1[9] ( .Q(i1Oi1_9), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(o1Oi1_Z[9]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509113 SLE \genblk1.i1Oi1[8] ( .Q(i1Oi1[8]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(o1Oi1_Z[8]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509113 SLE \genblk1.i1Oi1[7] ( .Q(i1Oi1[7]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(o1Oi1_Z[7]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509113 SLE \genblk1.i1Oi1[6] ( .Q(i1Oi1_6), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(o1Oi1_Z[6]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:509113 SLE \genblk1.i1Oi1[5] ( .Q(i1Oi1_5), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(o1Oi1_Z[5]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:508030 SLE \O1Oi1[14] ( .Q(O1Oi1_Z[14]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_Z[14]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:508030 SLE \O1Oi1[13] ( .Q(O1Oi1_Z[13]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_Z[13]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:508030 SLE \O1Oi1[12] ( .Q(O1Oi1_Z[12]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_Z[12]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:508030 SLE \O1Oi1[11] ( .Q(O1Oi1_Z[11]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_Z[11]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:508030 SLE \O1Oi1[10] ( .Q(O1Oi1_Z[10]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_Z[10]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:508030 SLE \O1Oi1[9] ( .Q(O1Oi1_Z[9]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_Z[9]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:508030 SLE \O1Oi1[8] ( .Q(O1Oi1_Z[8]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_Z[8]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:508030 SLE \O1Oi1[7] ( .Q(O1Oi1_Z[7]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_Z[7]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:508030 SLE \O1Oi1[6] ( .Q(O1Oi1_Z[6]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_Z[6]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:508030 SLE \O1Oi1[5] ( .Q(O1Oi1_Z[5]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_Z[5]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:508030 SLE \O1Oi1[4] ( .Q(O1Oi1_Z[4]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_Z[4]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:508030 SLE \O1Oi1[3] ( .Q(O1Oi1_Z[3]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_Z[3]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:508030 SLE \O1Oi1[2] ( .Q(O1Oi1_Z[2]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_Z[2]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:508030 SLE \O1Oi1[1] ( .Q(O1Oi1_Z[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_Z[1]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:508030 SLE \O1Oi1[0] ( .Q(O1Oi1_Z[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_Z[0]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507935 SLE \ioio1[9] ( .Q(ioio1_Z[9]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ooio1_Z[9]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507935 SLE \ioio1[8] ( .Q(ioio1_Z[8]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ooio1_Z[8]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507935 SLE \ioio1[7] ( .Q(ioio1_Z[7]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ooio1_Z[7]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507935 SLE \ioio1[6] ( .Q(ioio1_Z[6]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ooio1_Z[6]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507935 SLE \ioio1[5] ( .Q(ioio1_Z[5]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ooio1_Z[5]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507935 SLE \ioio1[4] ( .Q(ioio1_Z[4]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ooio1_Z[4]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507935 SLE \ioio1[3] ( .Q(ioio1_Z[3]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ooio1_Z[3]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507935 SLE \ioio1[2] ( .Q(ioio1_Z[2]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ooio1_Z[2]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507935 SLE \ioio1[1] ( .Q(ioio1_Z[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ooio1_Z[1]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507935 SLE \ioio1[0] ( .Q(ioio1_Z[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ooio1_Z[0]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:508030 SLE \O1Oi1[19] ( .Q(O1Oi1_Z[19]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_Z[19]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:508030 SLE \O1Oi1[18] ( .Q(O1Oi1_Z[18]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_Z[18]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:508030 SLE \O1Oi1[17] ( .Q(O1Oi1_Z[17]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_Z[17]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:508030 SLE \O1Oi1[16] ( .Q(O1Oi1_Z[16]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_Z[16]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:508030 SLE \O1Oi1[15] ( .Q(O1Oi1_Z[15]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_Z[15]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507887 SLE \ooio1[4] ( .Q(ooio1_Z[4]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_5_i_m2_i_m2_Z[14]), .EN(iOl01_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507887 SLE \ooio1[3] ( .Q(ooio1_Z[3]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_5_i_m2_i_m2_Z[13]), .EN(iOl01_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507887 SLE \ooio1[2] ( .Q(ooio1_Z[2]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_5_i_m2_i_m2_Z[12]), .EN(iOl01_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507887 SLE \ooio1[1] ( .Q(ooio1_Z[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_5_i_m2_i_m2_Z[11]), .EN(iOl01_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507887 SLE \ooio1[0] ( .Q(ooio1_Z[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_5_i_m2_i_m2_Z[10]), .EN(iOl01_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507935 SLE \ioio1[19] ( .Q(ioio1_Z[19]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_5_i_m2_i_m2_Z[19]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507935 SLE \ioio1[18] ( .Q(ioio1_Z[18]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_5_i_m2_i_m2_Z[18]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507935 SLE \ioio1[17] ( .Q(ioio1_Z[17]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_5_i_m2_i_m2_Z[17]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507935 SLE \ioio1[16] ( .Q(ioio1_Z[16]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_5_i_m2_i_m2_Z[16]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507935 SLE \ioio1[15] ( .Q(ioio1_Z[15]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_5_i_m2_i_m2_Z[15]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507935 SLE \ioio1[14] ( .Q(ioio1_Z[14]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_5_i_m2_i_m2_Z[14]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507935 SLE \ioio1[13] ( .Q(ioio1_Z[13]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_5_i_m2_i_m2_Z[13]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507935 SLE \ioio1[12] ( .Q(ioio1_Z[12]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_5_i_m2_i_m2_Z[12]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507935 SLE \ioio1[11] ( .Q(ioio1_Z[11]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_5_i_m2_i_m2_Z[11]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507935 SLE \ioio1[10] ( .Q(ioio1_Z[10]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_5_i_m2_i_m2_Z[10]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507887 SLE \ooio1[9] ( .Q(ooio1_Z[9]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_5_i_m2_i_m2_Z[19]), .EN(iOl01_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507887 SLE \ooio1[8] ( .Q(ooio1_Z[8]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_5_i_m2_i_m2_Z[18]), .EN(iOl01_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507887 SLE \ooio1[7] ( .Q(ooio1_Z[7]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_5_i_m2_i_m2_Z[17]), .EN(iOl01_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507887 SLE \ooio1[6] ( .Q(ooio1_Z[6]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_5_i_m2_i_m2_Z[16]), .EN(iOl01_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507887 SLE \ooio1[5] ( .Q(ooio1_Z[5]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioio1_5_i_m2_i_m2_Z[15]), .EN(iOl01_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:508095 CFG3 \genblk1.un111_I1Oi1_2_0 ( .A(O1Oi1_Z[8]), .B(O1Oi1_Z[7]), .C(O1Oi1_Z[9]), .Y(un67_I1Oi1_2_0) ); defparam \genblk1.un111_I1Oi1_2_0 .INIT=8'h01; // @28:508095 CFG4 \genblk1.un99_I1Oi1 ( .A(O1Oi1_Z[15]), .B(un99_I1Oi1_1), .C(ioio1_Z[0]), .D(O1Oi1_Z[14]), .Y(un99_I1Oi1) ); defparam \genblk1.un99_I1Oi1 .INIT=16'h0800; // @28:508095 CFG4 \genblk1.un147_I1Oi1 ( .A(O1Oi1_Z[16]), .B(O1Oi1_Z[17]), .C(un147_I1Oi1_0), .D(un99_I1Oi1_3), .Y(un147_I1Oi1) ); defparam \genblk1.un147_I1Oi1 .INIT=16'h8000; // @28:508082 CFG4 \genblk1.un51_I1Oi1 ( .A(O1Oi1_Z[16]), .B(O1Oi1_Z[17]), .C(un51_I1Oi1_1), .D(un12_I1Oi1_2), .Y(un51_I1Oi1) ); defparam \genblk1.un51_I1Oi1 .INIT=16'h8000; // @28:508095 CFG4 \genblk1.un99_I1Oi1_1 ( .A(O1Oi1_Z[19]), .B(O1Oi1_Z[18]), .C(O1Oi1_Z[16]), .D(O1Oi1_Z[17]), .Y(un99_I1Oi1_1) ); defparam \genblk1.un99_I1Oi1_1 .INIT=16'h0001; // @28:508095 CFG4 \genblk1.un159_I1Oi1_1 ( .A(O1Oi1_Z[12]), .B(O1Oi1_Z[13]), .C(O1Oi1_Z[10]), .D(O1Oi1_Z[11]), .Y(un159_I1Oi1_1) ); defparam \genblk1.un159_I1Oi1_1 .INIT=16'h0001; // @28:508990 CFG4 \genblk1.un62_o1Oi1 ( .A(l1Oi1[6]), .B(l1Oi1[7]), .C(l1Oi1[8]), .D(l1Oi1[9]), .Y(un62_o1Oi1) ); defparam \genblk1.un62_o1Oi1 .INIT=16'h0002; // @28:508926 CFG3 \genblk1.un42_o1Oi1 ( .A(l1Oi1[8]), .B(l1Oi1[9]), .C(un42_o1Oi1_1), .Y(un42_o1Oi1) ); defparam \genblk1.un42_o1Oi1 .INIT=8'h10; // @28:508817 CFG4 \o1Oi1[0] ( .A(o1Oi1_2_Z[0]), .B(o1Oi1_3_Z[0]), .C(o1Oi1_4_Z[0]), .D(o1Oi1_1_Z[0]), .Y(o1Oi1_Z[0]) ); defparam \o1Oi1[0] .INIT=16'hFEFF; // @28:508817 CFG4 \o1Oi1_1[0] ( .A(O1Oi1_Z[2]), .B(O1Oi1_Z[0]), .C(un5_o1Oi1), .D(un22_o1Oi1), .Y(o1Oi1_1_Z[0]) ); defparam \o1Oi1_1[0] .INIT=16'h153F; // @28:508817 CFG4 \o1Oi1[1] ( .A(o1Oi1_2_Z[1]), .B(o1Oi1_3_Z[1]), .C(o1Oi1_4_Z[1]), .D(o1Oi1_1_Z[1]), .Y(o1Oi1_Z[1]) ); defparam \o1Oi1[1] .INIT=16'hFEFF; // @28:508817 CFG4 \o1Oi1_1[1] ( .A(O1Oi1_Z[3]), .B(O1Oi1_Z[1]), .C(un5_o1Oi1), .D(un22_o1Oi1), .Y(o1Oi1_1_Z[1]) ); defparam \o1Oi1_1[1] .INIT=16'h153F; // @28:508817 CFG4 \o1Oi1[2] ( .A(o1Oi1_2_Z[2]), .B(o1Oi1_3_Z[2]), .C(o1Oi1_4_Z[2]), .D(o1Oi1_1_Z[2]), .Y(o1Oi1_Z[2]) ); defparam \o1Oi1[2] .INIT=16'hFEFF; // @28:508817 CFG4 \o1Oi1_1[2] ( .A(O1Oi1_Z[4]), .B(O1Oi1_Z[2]), .C(un5_o1Oi1), .D(un22_o1Oi1), .Y(o1Oi1_1_Z[2]) ); defparam \o1Oi1_1[2] .INIT=16'h153F; // @28:508817 CFG4 \o1Oi1[3] ( .A(o1Oi1_2_Z[3]), .B(o1Oi1_3_Z[3]), .C(o1Oi1_4_Z[3]), .D(o1Oi1_1_Z[3]), .Y(o1Oi1_Z[3]) ); defparam \o1Oi1[3] .INIT=16'hFEFF; // @28:508817 CFG4 \o1Oi1_1[3] ( .A(O1Oi1_Z[5]), .B(O1Oi1_Z[3]), .C(un5_o1Oi1), .D(un22_o1Oi1), .Y(o1Oi1_1_Z[3]) ); defparam \o1Oi1_1[3] .INIT=16'h153F; // @28:508817 CFG4 \o1Oi1[4] ( .A(o1Oi1_2_Z[4]), .B(o1Oi1_3_Z[4]), .C(o1Oi1_4_Z[4]), .D(o1Oi1_1_Z[4]), .Y(o1Oi1_Z[4]) ); defparam \o1Oi1[4] .INIT=16'hFEFF; // @28:508817 CFG4 \o1Oi1_1[4] ( .A(O1Oi1_Z[6]), .B(O1Oi1_Z[4]), .C(un5_o1Oi1), .D(un22_o1Oi1), .Y(o1Oi1_1_Z[4]) ); defparam \o1Oi1_1[4] .INIT=16'h153F; // @28:508817 CFG4 \o1Oi1[5] ( .A(o1Oi1_2_Z[5]), .B(o1Oi1_3_Z[5]), .C(o1Oi1_4_Z[5]), .D(o1Oi1_1_Z[5]), .Y(o1Oi1_Z[5]) ); defparam \o1Oi1[5] .INIT=16'hFEFF; // @28:508817 CFG4 \o1Oi1_1[5] ( .A(O1Oi1_Z[7]), .B(O1Oi1_Z[5]), .C(un5_o1Oi1), .D(un22_o1Oi1), .Y(o1Oi1_1_Z[5]) ); defparam \o1Oi1_1[5] .INIT=16'h153F; // @28:508817 CFG4 \o1Oi1[6] ( .A(o1Oi1_2_Z[6]), .B(o1Oi1_3_Z[6]), .C(o1Oi1_4_Z[6]), .D(o1Oi1_1_Z[6]), .Y(o1Oi1_Z[6]) ); defparam \o1Oi1[6] .INIT=16'hFEFF; // @28:508817 CFG4 \o1Oi1_1[6] ( .A(O1Oi1_Z[8]), .B(O1Oi1_Z[6]), .C(un5_o1Oi1), .D(un22_o1Oi1), .Y(o1Oi1_1_Z[6]) ); defparam \o1Oi1_1[6] .INIT=16'h153F; // @28:508817 CFG4 \o1Oi1[7] ( .A(o1Oi1_2_Z[7]), .B(o1Oi1_3_Z[7]), .C(o1Oi1_4_Z[7]), .D(o1Oi1_1_Z[7]), .Y(o1Oi1_Z[7]) ); defparam \o1Oi1[7] .INIT=16'hFEFF; // @28:508817 CFG4 \o1Oi1_1[7] ( .A(O1Oi1_Z[9]), .B(O1Oi1_Z[7]), .C(un22_o1Oi1), .D(un5_o1Oi1), .Y(o1Oi1_1_Z[7]) ); defparam \o1Oi1_1[7] .INIT=16'h135F; // @28:508817 CFG4 \o1Oi1[10] ( .A(o1Oi1_2_Z[10]), .B(o1Oi1_3_Z[10]), .C(o1Oi1_4_Z[10]), .D(o1Oi1_1_Z[10]), .Y(o1Oi1_Z[10]) ); defparam \o1Oi1[10] .INIT=16'hFEFF; // @28:508817 CFG4 \o1Oi1_1[10] ( .A(O1Oi1_Z[12]), .B(O1Oi1_Z[10]), .C(un22_o1Oi1), .D(un5_o1Oi1), .Y(o1Oi1_1_Z[10]) ); defparam \o1Oi1_1[10] .INIT=16'h135F; // @28:508817 CFG4 \o1Oi1[11] ( .A(o1Oi1_2_Z[11]), .B(o1Oi1_3_Z[11]), .C(o1Oi1_4_Z[11]), .D(o1Oi1_1_Z[11]), .Y(o1Oi1_Z[11]) ); defparam \o1Oi1[11] .INIT=16'hFEFF; // @28:508817 CFG4 \o1Oi1_1[11] ( .A(O1Oi1_Z[13]), .B(O1Oi1_Z[11]), .C(un22_o1Oi1), .D(un5_o1Oi1), .Y(o1Oi1_1_Z[11]) ); defparam \o1Oi1_1[11] .INIT=16'h135F; // @28:508817 CFG4 \o1Oi1[13] ( .A(o1Oi1_2_Z[13]), .B(o1Oi1_3_Z[13]), .C(o1Oi1_4_Z[13]), .D(o1Oi1_1_Z[13]), .Y(o1Oi1_Z[13]) ); defparam \o1Oi1[13] .INIT=16'hFEFF; // @28:508817 CFG4 \o1Oi1_1[13] ( .A(O1Oi1_Z[15]), .B(O1Oi1_Z[13]), .C(un5_o1Oi1), .D(un22_o1Oi1), .Y(o1Oi1_1_Z[13]) ); defparam \o1Oi1_1[13] .INIT=16'h153F; // @28:508817 CFG4 \o1Oi1[14] ( .A(o1Oi1_2_Z[14]), .B(o1Oi1_3_Z[14]), .C(o1Oi1_4_Z[14]), .D(o1Oi1_1_Z[14]), .Y(o1Oi1_Z[14]) ); defparam \o1Oi1[14] .INIT=16'hFEFF; // @28:508817 CFG4 \o1Oi1_1[14] ( .A(O1Oi1_Z[16]), .B(O1Oi1_Z[14]), .C(un5_o1Oi1), .D(un22_o1Oi1), .Y(o1Oi1_1_Z[14]) ); defparam \o1Oi1_1[14] .INIT=16'h153F; // @28:508817 CFG4 \o1Oi1[15] ( .A(o1Oi1_2_Z[15]), .B(o1Oi1_3_Z[15]), .C(o1Oi1_4_Z[15]), .D(o1Oi1_1_Z[15]), .Y(o1Oi1_Z[15]) ); defparam \o1Oi1[15] .INIT=16'hFEFF; // @28:508817 CFG4 \o1Oi1_1[15] ( .A(O1Oi1_Z[17]), .B(O1Oi1_Z[15]), .C(un22_o1Oi1), .D(un5_o1Oi1), .Y(o1Oi1_1_Z[15]) ); defparam \o1Oi1_1[15] .INIT=16'h135F; // @28:508817 CFG4 \o1Oi1[17] ( .A(o1Oi1_2_Z[17]), .B(o1Oi1_3_Z[17]), .C(o1Oi1_4_Z[17]), .D(o1Oi1_1_Z[17]), .Y(o1Oi1_Z[17]) ); defparam \o1Oi1[17] .INIT=16'hFEFF; // @28:508817 CFG4 \o1Oi1_1[17] ( .A(O1Oi1_Z[19]), .B(O1Oi1_Z[17]), .C(un22_o1Oi1), .D(un5_o1Oi1), .Y(o1Oi1_1_Z[17]) ); defparam \o1Oi1_1[17] .INIT=16'h135F; // @28:508817 CFG4 \o1Oi1[18] ( .A(o1Oi1_2_Z[18]), .B(o1Oi1_3_Z[18]), .C(o1Oi1_4_Z[18]), .D(o1Oi1_1_Z[18]), .Y(o1Oi1_Z[18]) ); defparam \o1Oi1[18] .INIT=16'hFEFF; // @28:508817 CFG4 \o1Oi1_1[18] ( .A(un22_o1Oi1), .B(un5_o1Oi1), .C(ioio1_Z[0]), .D(O1Oi1_Z[18]), .Y(o1Oi1_1_Z[18]) ); defparam \o1Oi1_1[18] .INIT=16'h135F; // @28:508817 CFG4 \o1Oi1[19] ( .A(o1Oi1_2_Z[19]), .B(o1Oi1_3_Z[19]), .C(o1Oi1_4_Z[19]), .D(o1Oi1_1_Z[19]), .Y(o1Oi1_Z[19]) ); defparam \o1Oi1[19] .INIT=16'hFEFF; // @28:508817 CFG4 \o1Oi1_1[19] ( .A(un22_o1Oi1), .B(un5_o1Oi1), .C(ioio1_Z[1]), .D(O1Oi1_Z[19]), .Y(o1Oi1_1_Z[19]) ); defparam \o1Oi1_1[19] .INIT=16'h135F; // @28:508262 CFG4 \I1Oi1[3] ( .A(I1Oi1_0_Z[3]), .B(un31_I1Oi1_2), .C(un67_I1Oi1), .D(I1Oi1_1_Z[3]), .Y(I1Oi1_Z[3]) ); defparam \I1Oi1[3] .INIT=16'hFEFA; // @28:508262 CFG4 \I1Oi1_1[3] ( .A(O1Oi1_Z[13]), .B(O1Oi1_Z[19]), .C(O1Oi1_Z[14]), .D(un71_I1Oi1_2), .Y(I1Oi1_1_Z[3]) ); defparam \I1Oi1_1[3] .INIT=16'h0400; // @28:508894 CFG2 \genblk1.un32_o1Oi1_0 ( .A(l1Oi1[4]), .B(l1Oi1[3]), .Y(un32_o1Oi1_0) ); defparam \genblk1.un32_o1Oi1_0 .INIT=4'h4; // @28:508082 CFG2 \genblk1.un155_I1Oi1_0 ( .A(O1Oi1_Z[8]), .B(O1Oi1_Z[7]), .Y(un155_I1Oi1_0) ); defparam \genblk1.un155_I1Oi1_0 .INIT=4'h1; // @28:508095 CFG2 \genblk1.un171_I1Oi1_0 ( .A(ioio1_Z[2]), .B(ioio1_Z[3]), .Y(un171_I1Oi1_0) ); defparam \genblk1.un171_I1Oi1_0 .INIT=4'h1; // @28:508082 CFG2 \genblk1.un43_I1Oi1_0 ( .A(O1Oi1_Z[3]), .B(O1Oi1_Z[2]), .Y(un8_I1Oi1_1) ); defparam \genblk1.un43_I1Oi1_0 .INIT=4'h1; // @28:508095 CFG2 \genblk1.un27_I1Oi1_1 ( .A(O1Oi1_Z[4]), .B(O1Oi1_Z[3]), .Y(un27_I1Oi1_1) ); defparam \genblk1.un27_I1Oi1_1 .INIT=4'h1; // @28:508082 CFG2 \genblk1.un4_I1Oi1_1 ( .A(O1Oi1_Z[3]), .B(O1Oi1_Z[2]), .Y(un4_I1Oi1_1) ); defparam \genblk1.un4_I1Oi1_1 .INIT=4'h8; // @28:508082 CFG2 \genblk1.un12_I1Oi1_1 ( .A(O1Oi1_Z[12]), .B(O1Oi1_Z[13]), .Y(un12_I1Oi1_1) ); defparam \genblk1.un12_I1Oi1_1 .INIT=4'h8; // @28:508082 CFG2 \genblk1.un12_I1Oi1_2 ( .A(O1Oi1_Z[14]), .B(O1Oi1_Z[15]), .Y(un12_I1Oi1_2) ); defparam \genblk1.un12_I1Oi1_2 .INIT=4'h8; // @28:508082 CFG2 \genblk1.un23_I1Oi1_1 ( .A(O1Oi1_Z[4]), .B(O1Oi1_Z[3]), .Y(un23_I1Oi1_1) ); defparam \genblk1.un23_I1Oi1_1 .INIT=4'h8; // @28:508082 CFG2 \genblk1.un203_I1Oi1_2 ( .A(O1Oi1_Z[14]), .B(O1Oi1_Z[13]), .Y(un31_I1Oi1_1) ); defparam \genblk1.un203_I1Oi1_2 .INIT=4'h8; // @28:508082 CFG2 \genblk1.un31_I1Oi1_2 ( .A(O1Oi1_Z[16]), .B(O1Oi1_Z[15]), .Y(un31_I1Oi1_2) ); defparam \genblk1.un31_I1Oi1_2 .INIT=4'h8; // @28:508082 CFG2 \genblk1.un155_I1Oi1_2 ( .A(O1Oi1_Z[11]), .B(O1Oi1_Z[12]), .Y(un35_I1Oi1_1) ); defparam \genblk1.un155_I1Oi1_2 .INIT=4'h8; // @28:508082 CFG2 \genblk1.un51_I1Oi1_2 ( .A(O1Oi1_Z[16]), .B(O1Oi1_Z[17]), .Y(un51_I1Oi1_2) ); defparam \genblk1.un51_I1Oi1_2 .INIT=4'h8; // @28:508082 CFG2 \genblk1.un71_I1Oi1_2 ( .A(O1Oi1_Z[17]), .B(O1Oi1_Z[18]), .Y(un71_I1Oi1_2) ); defparam \genblk1.un71_I1Oi1_2 .INIT=4'h8; // @28:508095 CFG2 \genblk1.un123_I1Oi1_2 ( .A(O1Oi1_Z[17]), .B(O1Oi1_Z[18]), .Y(un75_I1Oi1_3) ); defparam \genblk1.un123_I1Oi1_2 .INIT=4'h1; // @28:508095 CFG2 \genblk1.un147_I1Oi1_2 ( .A(O1Oi1_Z[19]), .B(O1Oi1_Z[18]), .Y(un99_I1Oi1_3) ); defparam \genblk1.un147_I1Oi1_2 .INIT=4'h1; // @28:508082 CFG2 \genblk1.un107_I1Oi1_2 ( .A(O1Oi1_Z[9]), .B(O1Oi1_Z[10]), .Y(un107_I1Oi1_2) ); defparam \genblk1.un107_I1Oi1_2 .INIT=4'h8; // @28:508095 CFG2 \genblk1.un111_I1Oi1_2 ( .A(O1Oi1_Z[10]), .B(O1Oi1_Z[11]), .Y(un111_I1Oi1_2) ); defparam \genblk1.un111_I1Oi1_2 .INIT=4'h1; // @28:508095 CFG2 \genblk1.un123_I1Oi1_3 ( .A(O1Oi1_Z[19]), .B(ioio1_Z[0]), .Y(un123_I1Oi1_3) ); defparam \genblk1.un123_I1Oi1_3 .INIT=4'h1; // @28:508082 CFG2 \genblk1.un165_I1Oi1_3 ( .A(ioio1_Z[1]), .B(ioio1_Z[2]), .Y(un165_I1Oi1_3) ); defparam \genblk1.un165_I1Oi1_3 .INIT=4'h8; // @28:508832 CFG2 \genblk1.un12_o1Oi1_4 ( .A(l1Oi1[8]), .B(l1Oi1[7]), .Y(un12_o1Oi1_4) ); defparam \genblk1.un12_o1Oi1_4 .INIT=4'h1; // @28:508832 CFG2 \genblk1.un12_o1Oi1_3 ( .A(l1Oi1[6]), .B(l1Oi1[5]), .Y(un12_o1Oi1_3) ); defparam \genblk1.un12_o1Oi1_3 .INIT=4'h1; // @28:508862 CFG2 \genblk1.un22_o1Oi1_4 ( .A(l1Oi1[9]), .B(l1Oi1[8]), .Y(un5_o1Oi1_5) ); defparam \genblk1.un22_o1Oi1_4 .INIT=4'h1; // @28:466506 CFG3 \Oiio1_RNIRD2R7[14] ( .A(i1Oi1[4]), .B(IOOi1_1z), .C(Oiio1[14]), .Y(N_145) ); defparam \Oiio1_RNIRD2R7[14] .INIT=8'h1D; // @28:466506 CFG3 \Oiio1_RNIL72R7_0[11] ( .A(i1Oi1[1]), .B(IOOi1_1z), .C(NN_4), .Y(N_146) ); defparam \Oiio1_RNIL72R7_0[11] .INIT=8'h1D; // @28:466506 CFG3 \Oiio1_RNI1B0P9[1] ( .A(NN_4), .B(IOOi1_1z), .C(NN_2), .Y(Oiio1_RNI1B0P9_0) ); defparam \Oiio1_RNI1B0P9[1] .INIT=8'h1D; // @28:466506 CFG3 \Oiio1_RNI7H0P9[4] ( .A(Oiio1[14]), .B(IOOi1_1z), .C(Oiio1[4]), .Y(Oiio1_RNI7H0P9_0) ); defparam \Oiio1_RNI7H0P9[4] .INIT=8'h1D; // @28:508819 CFG4 \genblk1.un5_o1Oi1_2 ( .A(l1Oi1[0]), .B(l1Oi1[1]), .C(l1Oi1[2]), .D(l1Oi1[3]), .Y(un5_o1Oi1_2) ); defparam \genblk1.un5_o1Oi1_2 .INIT=16'h0002; // @28:508862 CFG4 \genblk1.un22_o1Oi1_1 ( .A(l1Oi1[3]), .B(l1Oi1[2]), .C(l1Oi1[4]), .D(l1Oi1[5]), .Y(un22_o1Oi1_1) ); defparam \genblk1.un22_o1Oi1_1 .INIT=16'h0004; // @28:508095 CFG4 \genblk1.un87_I1Oi1_1 ( .A(O1Oi1_Z[5]), .B(O1Oi1_Z[4]), .C(O1Oi1_Z[6]), .D(O1Oi1_Z[10]), .Y(un87_I1Oi1_1) ); defparam \genblk1.un87_I1Oi1_1 .INIT=16'h0008; // @28:508926 CFG4 \genblk1.un42_o1Oi1_1 ( .A(l1Oi1[4]), .B(l1Oi1[5]), .C(l1Oi1[7]), .D(l1Oi1[6]), .Y(un42_o1Oi1_1) ); defparam \genblk1.un42_o1Oi1_1 .INIT=16'h0002; // @28:509348 CFG4 Iiio1_0_a3_4 ( .A(i1Oi1_6), .B(i1Oi1[3]), .C(i1Oi1_2), .D(i1Oi1_5), .Y(Iiio1_0_a3_4_Z) ); defparam Iiio1_0_a3_4.INIT=16'h0001; // @28:509348 CFG4 Iiio1_0_a3_0_4 ( .A(i1Oi1[7]), .B(i1Oi1[3]), .C(i1Oi1_5), .D(i1Oi1_2), .Y(Iiio1_0_a3_0_4_Z) ); defparam Iiio1_0_a3_0_4.INIT=16'h4000; // @28:508082 CFG3 \genblk1.un179_I1Oi1_1 ( .A(O1Oi1_Z[14]), .B(O1Oi1_Z[8]), .C(O1Oi1_Z[9]), .Y(un179_I1Oi1_1) ); defparam \genblk1.un179_I1Oi1_1 .INIT=8'h02; // @28:508082 CFG3 \genblk1.un51_I1Oi1_1 ( .A(O1Oi1_Z[12]), .B(O1Oi1_Z[18]), .C(O1Oi1_Z[13]), .Y(un51_I1Oi1_1) ); defparam \genblk1.un51_I1Oi1_1 .INIT=8'h04; // @28:508095 CFG3 \genblk1.un135_I1Oi1_1 ( .A(O1Oi1_Z[12]), .B(O1Oi1_Z[9]), .C(O1Oi1_Z[8]), .Y(un135_I1Oi1_1) ); defparam \genblk1.un135_I1Oi1_1 .INIT=8'h01; // @28:508082 CFG3 \genblk1.un189_I1Oi1_1 ( .A(ioio1_Z[4]), .B(ioio1_Z[3]), .C(ioio1_Z[2]), .Y(un189_I1Oi1_1) ); defparam \genblk1.un189_I1Oi1_1 .INIT=8'h80; // @28:508082 CFG3 \genblk1.un117_I1Oi1_2 ( .A(ioio1_Z[1]), .B(O1Oi1_Z[19]), .C(O1Oi1_Z[15]), .Y(un117_I1Oi1_2) ); defparam \genblk1.un117_I1Oi1_2 .INIT=8'h08; // @28:508095 CFG3 \genblk1.un219_I1Oi1_2 ( .A(ioio1_Z[5]), .B(ioio1_Z[4]), .C(O1Oi1_Z[19]), .Y(un219_I1Oi1_2) ); defparam \genblk1.un219_I1Oi1_2 .INIT=8'h10; // @28:508095 CFG3 \genblk1.un147_I1Oi1_0 ( .A(ioio1_Z[2]), .B(ioio1_Z[1]), .C(ioio1_Z[0]), .Y(un147_I1Oi1_0) ); defparam \genblk1.un147_I1Oi1_0 .INIT=8'h01; // @28:508095 CFG3 \genblk1.un195_I1Oi1_0 ( .A(ioio1_Z[4]), .B(ioio1_Z[1]), .C(ioio1_Z[0]), .Y(un195_I1Oi1_0) ); defparam \genblk1.un195_I1Oi1_0 .INIT=8'h01; // @28:508082 CFG4 \genblk1.un141_I1Oi1_1 ( .A(O1Oi1_Z[19]), .B(O1Oi1_Z[18]), .C(O1Oi1_Z[16]), .D(O1Oi1_Z[17]), .Y(un141_I1Oi1_1) ); defparam \genblk1.un141_I1Oi1_1 .INIT=16'h0008; // @28:508095 CFG4 \genblk1.un16_I1Oi1_1 ( .A(O1Oi1_Z[11]), .B(O1Oi1_Z[10]), .C(O1Oi1_Z[15]), .D(O1Oi1_Z[14]), .Y(un16_I1Oi1_1_0) ); defparam \genblk1.un16_I1Oi1_1 .INIT=16'h0008; // @28:508095 CFG3 \genblk1.un35_I1Oi1_1 ( .A(O1Oi1_Z[13]), .B(O1Oi1_Z[14]), .C(un35_I1Oi1_1), .Y(un35_I1Oi1_1_0) ); defparam \genblk1.un35_I1Oi1_1 .INIT=8'h10; // @28:508095 CFG3 \genblk1.un75_I1Oi1_0 ( .A(O1Oi1_Z[16]), .B(O1Oi1_Z[19]), .C(O1Oi1_Z[15]), .Y(un75_I1Oi1_0) ); defparam \genblk1.un75_I1Oi1_0 .INIT=8'h01; // @28:508082 CFG4 \genblk1.un131_I1Oi1_1 ( .A(O1Oi1_Z[11]), .B(O1Oi1_Z[10]), .C(O1Oi1_Z[9]), .D(O1Oi1_Z[8]), .Y(un131_I1Oi1_1) ); defparam \genblk1.un131_I1Oi1_1 .INIT=16'h8000; // @28:508082 CFG4 \genblk1.un93_I1Oi1_1 ( .A(O1Oi1_Z[19]), .B(O1Oi1_Z[18]), .C(O1Oi1_Z[14]), .D(O1Oi1_Z[15]), .Y(un93_I1Oi1_1) ); defparam \genblk1.un93_I1Oi1_1 .INIT=16'h0008; // @28:508095 CFG4 \genblk1.un55_I1Oi1_1 ( .A(O1Oi1_Z[15]), .B(O1Oi1_Z[17]), .C(O1Oi1_Z[16]), .D(O1Oi1_Z[14]), .Y(un55_I1Oi1_1) ); defparam \genblk1.un55_I1Oi1_1 .INIT=16'h0001; // @28:508082 CFG3 \genblk1.un107_I1Oi1_0_0 ( .A(O1Oi1_Z[8]), .B(O1Oi1_Z[11]), .C(O1Oi1_Z[7]), .Y(un107_I1Oi1_0) ); defparam \genblk1.un107_I1Oi1_0_0 .INIT=8'h80; // @28:508082 CFG4 \genblk1.un83_I1Oi1_1 ( .A(O1Oi1_Z[7]), .B(O1Oi1_Z[9]), .C(O1Oi1_Z[8]), .D(O1Oi1_Z[6]), .Y(un83_I1Oi1_1) ); defparam \genblk1.un83_I1Oi1_1 .INIT=16'h8000; // @28:508082 CFG4 \genblk1.un63_I1Oi1_1 ( .A(O1Oi1_Z[5]), .B(O1Oi1_Z[7]), .C(O1Oi1_Z[6]), .D(O1Oi1_Z[8]), .Y(un63_I1Oi1_1) ); defparam \genblk1.un63_I1Oi1_1 .INIT=16'h8000; // @28:508082 CFG4 \genblk1.un43_I1Oi1_1 ( .A(O1Oi1_Z[5]), .B(O1Oi1_Z[4]), .C(O1Oi1_Z[6]), .D(O1Oi1_Z[7]), .Y(un43_I1Oi1_1) ); defparam \genblk1.un43_I1Oi1_1 .INIT=16'h8000; // @28:508095 CFG4 \genblk1.un47_I1Oi1_1 ( .A(O1Oi1_Z[5]), .B(O1Oi1_Z[4]), .C(O1Oi1_Z[6]), .D(O1Oi1_Z[7]), .Y(un47_I1Oi1_1) ); defparam \genblk1.un47_I1Oi1_1 .INIT=16'h0001; // @28:508082 CFG3 \genblk1.un165_I1Oi1_2 ( .A(ioio1_Z[3]), .B(O1Oi1_Z[19]), .C(O1Oi1_Z[17]), .Y(un165_I1Oi1_2) ); defparam \genblk1.un165_I1Oi1_2 .INIT=8'h08; // @28:466506 CFG4 IOOi1_RNO_6 ( .A(i1Oi1[16]), .B(i1Oi1[15]), .C(i1Oi1[14]), .D(i1Oi1[10]), .Y(m50_0_a3_0_5) ); defparam IOOi1_RNO_6.INIT=16'h0100; // @28:466506 CFG4 IOOi1_RNO_7 ( .A(i1Oi1[19]), .B(i1Oi1[18]), .C(i1Oi1[13]), .D(i1Oi1[11]), .Y(m50_0_a3_0_4) ); defparam IOOi1_RNO_7.INIT=16'h0600; // @28:466506 CFG4 IOOi1_RNO_4 ( .A(i1Oi1[16]), .B(i1Oi1[15]), .C(i1Oi1[14]), .D(i1Oi1[10]), .Y(m50_0_a3_5) ); defparam IOOi1_RNO_4.INIT=16'h0080; // @28:466506 CFG4 IOOi1_RNO_5 ( .A(i1Oi1[19]), .B(i1Oi1[18]), .C(i1Oi1[13]), .D(i1Oi1[11]), .Y(m50_0_a3_4) ); defparam IOOi1_RNO_5.INIT=16'h0060; // @28:509629 CFG3 \OlI11[3] ( .A(Oiio1[13]), .B(IOOi1_1z), .C(Oiio1[3]), .Y(OlI11_3) ); defparam \OlI11[3] .INIT=8'hE2; // @28:509629 CFG3 \OlI11[16] ( .A(i1Oi1_6), .B(IOOi1_1z), .C(Oiio1[16]), .Y(OlI11_16) ); defparam \OlI11[16] .INIT=8'hE2; // @28:509629 CFG3 \OlI11[7] ( .A(Oiio1[17]), .B(IOOi1_1z), .C(Oiio1[7]), .Y(OlI11_7) ); defparam \OlI11[7] .INIT=8'hE2; // @28:509629 CFG3 \OlI11[5] ( .A(Oiio1[15]), .B(IOOi1_1z), .C(Oiio1[5]), .Y(OlI11_5) ); defparam \OlI11[5] .INIT=8'hE2; // @28:509629 CFG3 \OlI11[2] ( .A(Oiio1[12]), .B(IOOi1_1z), .C(Oiio1[2]), .Y(OlI11_2) ); defparam \OlI11[2] .INIT=8'hE2; // @28:509629 CFG3 \OlI11[15] ( .A(i1Oi1_5), .B(Oiio1[15]), .C(IOOi1_1z), .Y(OlI11_15) ); defparam \OlI11[15] .INIT=8'hCA; // @28:509629 CFG3 \OlI11[10] ( .A(i1Oi1_0), .B(Oiio1[10]), .C(IOOi1_1z), .Y(OlI11_10) ); defparam \OlI11[10] .INIT=8'hCA; // @28:509629 CFG3 \OlI11[0] ( .A(Oiio1[10]), .B(IOOi1_1z), .C(Oiio1[0]), .Y(OlI11_0) ); defparam \OlI11[0] .INIT=8'hE2; // @28:509629 CFG3 \OlI11[13] ( .A(i1Oi1[3]), .B(Oiio1[13]), .C(IOOi1_1z), .Y(OlI11_13) ); defparam \OlI11[13] .INIT=8'hCA; // @28:509629 CFG3 \OlI11[6] ( .A(Oiio1[16]), .B(IOOi1_1z), .C(Oiio1[6]), .Y(OlI11_6) ); defparam \OlI11[6] .INIT=8'hE2; // @28:509629 CFG3 \OlI11[12] ( .A(i1Oi1_2), .B(Oiio1[12]), .C(IOOi1_1z), .Y(OlI11_12) ); defparam \OlI11[12] .INIT=8'hCA; // @28:509629 CFG3 \OlI11[9] ( .A(Oiio1[19]), .B(IOOi1_1z), .C(Oiio1[9]), .Y(OlI11_9) ); defparam \OlI11[9] .INIT=8'hE2; // @28:509629 CFG3 \OlI11[19] ( .A(i1Oi1_9), .B(IOOi1_1z), .C(Oiio1[19]), .Y(OlI11_19) ); defparam \OlI11[19] .INIT=8'hE2; // @28:509629 CFG3 \OlI11[17] ( .A(i1Oi1[7]), .B(IOOi1_1z), .C(Oiio1[17]), .Y(OlI11_17) ); defparam \OlI11[17] .INIT=8'hE2; // @28:537806 CFG3 \Oiio1_RNIL72R7[11] ( .A(i1Oi1[1]), .B(IOOi1_1z), .C(NN_4), .Y(N_146_i_0) ); defparam \Oiio1_RNIL72R7[11] .INIT=8'hE2; // @28:507173 CFG3 \Oiio1_RNI3M2R7[18] ( .A(i1Oi1[8]), .B(IOOi1_1z), .C(NN_3), .Y(N_24_i) ); defparam \Oiio1_RNI3M2R7[18] .INIT=8'hE2; // @28:507173 CFG3 \Oiio1_RNIFP0P9[8] ( .A(NN_3), .B(IOOi1_1z), .C(NN_1), .Y(N_147_i) ); defparam \Oiio1_RNIFP0P9[8] .INIT=8'hE2; // @28:537806 CFG3 \genblk1.i1Oi1_RNIN92R7[2] ( .A(i1Oi1_2), .B(Oiio1[12]), .C(IOOi1_1z), .Y(OlI11_i_12) ); defparam \genblk1.i1Oi1_RNIN92R7[2] .INIT=8'h35; // @28:537806 CFG3 \Oiio1_RNIV80P9[0] ( .A(Oiio1[10]), .B(IOOi1_1z), .C(Oiio1[0]), .Y(OlI11_i_0) ); defparam \Oiio1_RNIV80P9[0] .INIT=8'h1D; // @28:537806 CFG3 \Oiio1_RNI3D0P9[2] ( .A(Oiio1[12]), .B(IOOi1_1z), .C(Oiio1[2]), .Y(OlI11_i_2) ); defparam \Oiio1_RNI3D0P9[2] .INIT=8'h1D; // @28:537806 CFG3 \genblk1.i1Oi1_RNIJ52R7[0] ( .A(i1Oi1_0), .B(Oiio1[10]), .C(IOOi1_1z), .Y(OlI11_i_10) ); defparam \genblk1.i1Oi1_RNIJ52R7[0] .INIT=8'h35; // @28:508817 CFG4 \o1Oi1_0[6] ( .A(O1Oi1_Z[14]), .B(O1Oi1_Z[15]), .C(l1Oi1[9]), .D(l1Oi1[8]), .Y(o1Oi1_0_Z[6]) ); defparam \o1Oi1_0[6] .INIT=16'hCAC0; // @28:508817 CFG4 \o1Oi1_0[0] ( .A(O1Oi1_Z[8]), .B(O1Oi1_Z[9]), .C(l1Oi1[9]), .D(l1Oi1[8]), .Y(o1Oi1_0_Z[0]) ); defparam \o1Oi1_0[0] .INIT=16'hCAC0; // @28:508817 CFG4 \o1Oi1_0[8] ( .A(O1Oi1_Z[16]), .B(O1Oi1_Z[17]), .C(l1Oi1[9]), .D(l1Oi1[8]), .Y(o1Oi1_0_Z[8]) ); defparam \o1Oi1_0[8] .INIT=16'hCAC0; // @28:508817 CFG4 \o1Oi1_0[16] ( .A(ioio1_Z[4]), .B(ioio1_Z[5]), .C(l1Oi1[9]), .D(l1Oi1[8]), .Y(o1Oi1_0_Z[16]) ); defparam \o1Oi1_0[16] .INIT=16'hCAC0; // @28:508817 CFG4 \o1Oi1_0[13] ( .A(ioio1_Z[1]), .B(ioio1_Z[2]), .C(l1Oi1[9]), .D(l1Oi1[8]), .Y(o1Oi1_0_Z[13]) ); defparam \o1Oi1_0[13] .INIT=16'hCAC0; // @28:508817 CFG4 \o1Oi1_0[12] ( .A(ioio1_Z[0]), .B(ioio1_Z[1]), .C(l1Oi1[9]), .D(l1Oi1[8]), .Y(o1Oi1_0_Z[12]) ); defparam \o1Oi1_0[12] .INIT=16'hCAC0; // @28:508817 CFG4 \o1Oi1_0[15] ( .A(ioio1_Z[3]), .B(ioio1_Z[4]), .C(l1Oi1[9]), .D(l1Oi1[8]), .Y(o1Oi1_0_Z[15]) ); defparam \o1Oi1_0[15] .INIT=16'hCAC0; // @28:508817 CFG4 \o1Oi1_0[5] ( .A(O1Oi1_Z[13]), .B(O1Oi1_Z[14]), .C(l1Oi1[8]), .D(l1Oi1[9]), .Y(o1Oi1_0_Z[5]) ); defparam \o1Oi1_0[5] .INIT=16'hCCA0; // @28:508817 CFG4 \o1Oi1_0[14] ( .A(ioio1_Z[2]), .B(ioio1_Z[3]), .C(l1Oi1[9]), .D(l1Oi1[8]), .Y(o1Oi1_0_Z[14]) ); defparam \o1Oi1_0[14] .INIT=16'hCAC0; // @28:508817 CFG4 \o1Oi1_0[4] ( .A(O1Oi1_Z[12]), .B(O1Oi1_Z[13]), .C(l1Oi1[9]), .D(l1Oi1[8]), .Y(o1Oi1_0_Z[4]) ); defparam \o1Oi1_0[4] .INIT=16'hCAC0; // @28:508817 CFG4 \o1Oi1_0[19] ( .A(ioio1_Z[7]), .B(ioio1_Z[8]), .C(l1Oi1[9]), .D(l1Oi1[8]), .Y(o1Oi1_0_Z[19]) ); defparam \o1Oi1_0[19] .INIT=16'hCAC0; // @28:508817 CFG4 \o1Oi1_0[17] ( .A(ioio1_Z[5]), .B(ioio1_Z[6]), .C(l1Oi1[9]), .D(l1Oi1[8]), .Y(o1Oi1_0_Z[17]) ); defparam \o1Oi1_0[17] .INIT=16'hCAC0; // @28:508817 CFG4 \o1Oi1_0[18] ( .A(ioio1_Z[6]), .B(ioio1_Z[7]), .C(l1Oi1[9]), .D(l1Oi1[8]), .Y(o1Oi1_0_Z[18]) ); defparam \o1Oi1_0[18] .INIT=16'hCAC0; // @28:508817 CFG4 \o1Oi1_0[7] ( .A(O1Oi1_Z[15]), .B(O1Oi1_Z[16]), .C(l1Oi1[8]), .D(l1Oi1[9]), .Y(o1Oi1_0_Z[7]) ); defparam \o1Oi1_0[7] .INIT=16'hCCA0; // @28:508817 CFG4 \o1Oi1_0[11] ( .A(l1Oi1[8]), .B(l1Oi1[9]), .C(ioio1_Z[0]), .D(O1Oi1_Z[19]), .Y(o1Oi1_0_Z[11]) ); defparam \o1Oi1_0[11] .INIT=16'hE2C0; // @28:508817 CFG4 \o1Oi1_0[10] ( .A(O1Oi1_Z[18]), .B(O1Oi1_Z[19]), .C(l1Oi1[8]), .D(l1Oi1[9]), .Y(o1Oi1_0_Z[10]) ); defparam \o1Oi1_0[10] .INIT=16'hCCA0; // @28:508817 CFG4 \o1Oi1_0[9] ( .A(O1Oi1_Z[17]), .B(O1Oi1_Z[18]), .C(l1Oi1[9]), .D(l1Oi1[8]), .Y(o1Oi1_0_Z[9]) ); defparam \o1Oi1_0[9] .INIT=16'hCAC0; // @28:508817 CFG4 \o1Oi1_0[2] ( .A(O1Oi1_Z[10]), .B(O1Oi1_Z[11]), .C(l1Oi1[9]), .D(l1Oi1[8]), .Y(o1Oi1_0_Z[2]) ); defparam \o1Oi1_0[2] .INIT=16'hCAC0; // @28:508817 CFG4 \o1Oi1_0[1] ( .A(O1Oi1_Z[9]), .B(O1Oi1_Z[10]), .C(l1Oi1[9]), .D(l1Oi1[8]), .Y(o1Oi1_0_Z[1]) ); defparam \o1Oi1_0[1] .INIT=16'hCAC0; // @28:508817 CFG4 \o1Oi1_0[3] ( .A(O1Oi1_Z[11]), .B(O1Oi1_Z[12]), .C(l1Oi1[9]), .D(l1Oi1[8]), .Y(o1Oi1_0_Z[3]) ); defparam \o1Oi1_0[3] .INIT=16'hCAC0; // @28:508819 CFG3 \genblk1.un5_o1Oi1_3_0 ( .A(l1Oi1[4]), .B(un5_o1Oi1_2), .C(l1Oi1[5]), .Y(un5_o1Oi1_3_0) ); defparam \genblk1.un5_o1Oi1_3_0 .INIT=8'h04; // @28:508832 CFG4 \genblk1.un12_o1Oi1_4_0 ( .A(l1Oi1[1]), .B(l1Oi1[2]), .C(l1Oi1[9]), .D(un12_o1Oi1_4), .Y(un12_o1Oi1_4_0) ); defparam \genblk1.un12_o1Oi1_4_0 .INIT=16'h0200; // @28:509348 CFG4 Iiio1_0_a3_5 ( .A(i1Oi1[4]), .B(i1Oi1[1]), .C(i1Oi1_0), .D(Iiio1_0_a3_4_Z), .Y(Iiio1_0_a3_5_Z) ); defparam Iiio1_0_a3_5.INIT=16'h4000; // @28:509348 CFG4 Iiio1_0_a3_0_5 ( .A(i1Oi1[4]), .B(i1Oi1[1]), .C(i1Oi1_0), .D(Iiio1_0_a3_0_4_Z), .Y(Iiio1_0_a3_0_5_Z) ); defparam Iiio1_0_a3_0_5.INIT=16'h0200; // @28:508082 CFG4 \genblk1.un31_I1Oi1_2_0 ( .A(O1Oi1_Z[11]), .B(O1Oi1_Z[12]), .C(un31_I1Oi1_2), .D(O1Oi1_Z[17]), .Y(un31_I1Oi1_2_0) ); defparam \genblk1.un31_I1Oi1_2_0 .INIT=16'h1000; // @28:508082 CFG4 \genblk1.un12_I1Oi1_2_0 ( .A(O1Oi1_Z[10]), .B(O1Oi1_Z[11]), .C(un12_I1Oi1_1), .D(O1Oi1_Z[16]), .Y(un12_I1Oi1_2_0) ); defparam \genblk1.un12_I1Oi1_2_0 .INIT=16'h1000; // @28:508095 CFG4 \genblk1.un207_I1Oi1_2 ( .A(O1Oi1_Z[11]), .B(O1Oi1_Z[12]), .C(un107_I1Oi1_2), .D(O1Oi1_Z[15]), .Y(un207_I1Oi1_2) ); defparam \genblk1.un207_I1Oi1_2 .INIT=16'h0010; // @28:508082 CFG4 \genblk1.un203_I1Oi1_2_0 ( .A(O1Oi1_Z[9]), .B(O1Oi1_Z[10]), .C(un35_I1Oi1_1), .D(O1Oi1_Z[15]), .Y(un203_I1Oi1_2) ); defparam \genblk1.un203_I1Oi1_2_0 .INIT=16'h1000; // @28:508082 CFG4 \genblk1.un213_I1Oi1_2 ( .A(ioio1_Z[5]), .B(ioio1_Z[4]), .C(ioio1_Z[3]), .D(un165_I1Oi1_3), .Y(un213_I1Oi1_2) ); defparam \genblk1.un213_I1Oi1_2 .INIT=16'h8000; // @28:508095 CFG4 \genblk1.un27_I1Oi1_2 ( .A(O1Oi1_Z[1]), .B(O1Oi1_Z[2]), .C(O1Oi1_Z[7]), .D(un27_I1Oi1_1), .Y(un27_I1Oi1_2) ); defparam \genblk1.un27_I1Oi1_2 .INIT=16'h0800; // @28:508095 CFG4 \genblk1.un8_I1Oi1_2 ( .A(O1Oi1_Z[0]), .B(O1Oi1_Z[1]), .C(O1Oi1_Z[6]), .D(un8_I1Oi1_1), .Y(un8_I1Oi1_2) ); defparam \genblk1.un8_I1Oi1_2 .INIT=16'h0800; // @28:508082 CFG4 \genblk1.un23_I1Oi1_2 ( .A(O1Oi1_Z[1]), .B(O1Oi1_Z[2]), .C(O1Oi1_Z[7]), .D(un23_I1Oi1_1), .Y(un23_I1Oi1_2_0) ); defparam \genblk1.un23_I1Oi1_2 .INIT=16'h1000; // @28:508082 CFG4 \genblk1.un4_I1Oi1_2_0 ( .A(O1Oi1_Z[0]), .B(O1Oi1_Z[1]), .C(O1Oi1_Z[6]), .D(un4_I1Oi1_1), .Y(un4_I1Oi1_2_0) ); defparam \genblk1.un4_I1Oi1_2_0 .INIT=16'h1000; // @28:508095 CFG4 \genblk1.un16_I1Oi1 ( .A(O1Oi1_Z[12]), .B(O1Oi1_Z[13]), .C(un16_I1Oi1_1_0), .D(O1Oi1_Z[16]), .Y(un16_I1Oi1) ); defparam \genblk1.un16_I1Oi1 .INIT=16'h0010; // @28:508095 CFG4 \genblk1.un35_I1Oi1 ( .A(O1Oi1_Z[15]), .B(O1Oi1_Z[17]), .C(un35_I1Oi1_1_0), .D(O1Oi1_Z[16]), .Y(un35_I1Oi1) ); defparam \genblk1.un35_I1Oi1 .INIT=16'h0010; // @28:508082 CFG3 \genblk1.un43_I1Oi1 ( .A(O1Oi1_Z[8]), .B(un8_I1Oi1_1), .C(un43_I1Oi1_1), .Y(un43_I1Oi1) ); defparam \genblk1.un43_I1Oi1 .INIT=8'h80; // @28:508095 CFG3 \genblk1.un47_I1Oi1 ( .A(O1Oi1_Z[8]), .B(un4_I1Oi1_1), .C(un47_I1Oi1_1), .Y(un47_I1Oi1) ); defparam \genblk1.un47_I1Oi1 .INIT=8'h40; // @28:508095 CFG3 \genblk1.un55_I1Oi1 ( .A(un12_I1Oi1_1), .B(O1Oi1_Z[18]), .C(un55_I1Oi1_1), .Y(un55_I1Oi1) ); defparam \genblk1.un55_I1Oi1 .INIT=8'h20; // @28:508095 CFG4 \genblk1.un67_I1Oi1 ( .A(O1Oi1_Z[5]), .B(O1Oi1_Z[6]), .C(un23_I1Oi1_1), .D(un67_I1Oi1_2_0), .Y(un67_I1Oi1) ); defparam \genblk1.un67_I1Oi1 .INIT=16'h1000; // @28:508095 CFG3 \genblk1.un75_I1Oi1 ( .A(un75_I1Oi1_0), .B(un31_I1Oi1_1), .C(un75_I1Oi1_3), .Y(un75_I1Oi1) ); defparam \genblk1.un75_I1Oi1 .INIT=8'h80; // @28:508082 CFG4 \genblk1.un83_I1Oi1 ( .A(O1Oi1_Z[4]), .B(O1Oi1_Z[5]), .C(O1Oi1_Z[10]), .D(un83_I1Oi1_1), .Y(un83_I1Oi1) ); defparam \genblk1.un83_I1Oi1 .INIT=16'h1000; // @28:508082 CFG4 \genblk1.un107_I1Oi1 ( .A(O1Oi1_Z[5]), .B(O1Oi1_Z[6]), .C(un107_I1Oi1_0), .D(un107_I1Oi1_2), .Y(un107_I1Oi1) ); defparam \genblk1.un107_I1Oi1 .INIT=16'h1000; // @28:508095 CFG4 \genblk1.un111_I1Oi1 ( .A(O1Oi1_Z[6]), .B(O1Oi1_Z[5]), .C(un67_I1Oi1_2_0), .D(un111_I1Oi1_2), .Y(un111_I1Oi1) ); defparam \genblk1.un111_I1Oi1 .INIT=16'h8000; // @28:508095 CFG4 \genblk1.un123_I1Oi1 ( .A(ioio1_Z[1]), .B(un75_I1Oi1_3), .C(un123_I1Oi1_3), .D(un31_I1Oi1_2), .Y(un123_I1Oi1) ); defparam \genblk1.un123_I1Oi1 .INIT=16'h4000; // @28:508082 CFG4 \genblk1.un131_I1Oi1 ( .A(O1Oi1_Z[6]), .B(un131_I1Oi1_1), .C(O1Oi1_Z[12]), .D(O1Oi1_Z[7]), .Y(un131_I1Oi1) ); defparam \genblk1.un131_I1Oi1 .INIT=16'h0040; // @28:508082 CFG4 \genblk1.un141_I1Oi1 ( .A(ioio1_Z[2]), .B(ioio1_Z[1]), .C(ioio1_Z[0]), .D(un141_I1Oi1_1), .Y(un141_I1Oi1) ); defparam \genblk1.un141_I1Oi1 .INIT=16'h8000; // @28:508082 CFG4 \genblk1.un155_I1Oi1 ( .A(un35_I1Oi1_1), .B(un107_I1Oi1_2), .C(O1Oi1_Z[13]), .D(un155_I1Oi1_0), .Y(un155_I1Oi1) ); defparam \genblk1.un155_I1Oi1 .INIT=16'h8000; // @28:508095 CFG4 \genblk1.un159_I1Oi1 ( .A(O1Oi1_Z[7]), .B(O1Oi1_Z[9]), .C(un159_I1Oi1_1), .D(O1Oi1_Z[8]), .Y(un159_I1Oi1) ); defparam \genblk1.un159_I1Oi1 .INIT=16'h2000; // @28:508082 CFG4 \genblk1.un165_I1Oi1 ( .A(un165_I1Oi1_3), .B(un165_I1Oi1_2), .C(ioio1_Z[0]), .D(O1Oi1_Z[18]), .Y(un165_I1Oi1) ); defparam \genblk1.un165_I1Oi1 .INIT=16'h0080; // @28:508095 CFG4 \genblk1.un171_I1Oi1 ( .A(un171_I1Oi1_0), .B(ioio1_Z[1]), .C(un123_I1Oi1_3), .D(un71_I1Oi1_2), .Y(un171_I1Oi1) ); defparam \genblk1.un171_I1Oi1 .INIT=16'h2000; // @28:508095 CFG4 \genblk1.un183_I1Oi1 ( .A(O1Oi1_Z[8]), .B(un159_I1Oi1_1), .C(O1Oi1_Z[9]), .D(O1Oi1_Z[14]), .Y(un183_I1Oi1) ); defparam \genblk1.un183_I1Oi1 .INIT=16'h0080; // @28:508095 CFG4 \genblk1.un195_I1Oi1 ( .A(O1Oi1_Z[19]), .B(O1Oi1_Z[18]), .C(un171_I1Oi1_0), .D(un195_I1Oi1_0), .Y(un195_I1Oi1) ); defparam \genblk1.un195_I1Oi1 .INIT=16'h8000; // @28:508958 CFG4 \genblk1.un52_o1Oi1 ( .A(l1Oi1[5]), .B(l1Oi1[6]), .C(l1Oi1[9]), .D(un12_o1Oi1_4), .Y(un52_o1Oi1) ); defparam \genblk1.un52_o1Oi1 .INIT=16'h0200; // @28:509020 CFG4 \genblk1.un67_o1Oi1[19] ( .A(l1Oi1[8]), .B(l1Oi1[9]), .C(ioio1_Z[6]), .D(l1Oi1[7]), .Y(un67_o1Oi1[19]) ); defparam \genblk1.un67_o1Oi1[19] .INIT=16'h1000; // @28:509020 CFG4 \genblk1.un67_o1Oi1[18] ( .A(l1Oi1[8]), .B(l1Oi1[9]), .C(ioio1_Z[5]), .D(l1Oi1[7]), .Y(un67_o1Oi1[18]) ); defparam \genblk1.un67_o1Oi1[18] .INIT=16'h1000; // @28:509020 CFG4 \genblk1.un67_o1Oi1[17] ( .A(l1Oi1[8]), .B(l1Oi1[9]), .C(ioio1_Z[4]), .D(l1Oi1[7]), .Y(un67_o1Oi1[17]) ); defparam \genblk1.un67_o1Oi1[17] .INIT=16'h1000; // @28:509020 CFG4 \genblk1.un67_o1Oi1[16] ( .A(l1Oi1[8]), .B(l1Oi1[9]), .C(ioio1_Z[3]), .D(l1Oi1[7]), .Y(un67_o1Oi1[16]) ); defparam \genblk1.un67_o1Oi1[16] .INIT=16'h1000; // @28:509020 CFG4 \genblk1.un67_o1Oi1[15] ( .A(l1Oi1[8]), .B(l1Oi1[9]), .C(ioio1_Z[2]), .D(l1Oi1[7]), .Y(un67_o1Oi1[15]) ); defparam \genblk1.un67_o1Oi1[15] .INIT=16'h1000; // @28:509020 CFG4 \genblk1.un67_o1Oi1[14] ( .A(l1Oi1[8]), .B(l1Oi1[9]), .C(ioio1_Z[1]), .D(l1Oi1[7]), .Y(un67_o1Oi1[14]) ); defparam \genblk1.un67_o1Oi1[14] .INIT=16'h1000; // @28:509020 CFG4 \genblk1.un67_o1Oi1[13] ( .A(l1Oi1[8]), .B(l1Oi1[9]), .C(ioio1_Z[0]), .D(l1Oi1[7]), .Y(un67_o1Oi1[13]) ); defparam \genblk1.un67_o1Oi1[13] .INIT=16'h1000; // @28:509020 CFG4 \genblk1.un67_o1Oi1[12] ( .A(O1Oi1_Z[19]), .B(l1Oi1[7]), .C(l1Oi1[8]), .D(l1Oi1[9]), .Y(un67_o1Oi1[12]) ); defparam \genblk1.un67_o1Oi1[12] .INIT=16'h0008; // @28:509020 CFG4 \genblk1.un67_o1Oi1[11] ( .A(O1Oi1_Z[18]), .B(l1Oi1[7]), .C(l1Oi1[8]), .D(l1Oi1[9]), .Y(un67_o1Oi1[11]) ); defparam \genblk1.un67_o1Oi1[11] .INIT=16'h0008; // @28:509020 CFG4 \genblk1.un67_o1Oi1[10] ( .A(O1Oi1_Z[17]), .B(l1Oi1[7]), .C(l1Oi1[8]), .D(l1Oi1[9]), .Y(un67_o1Oi1[10]) ); defparam \genblk1.un67_o1Oi1[10] .INIT=16'h0008; // @28:509020 CFG4 \genblk1.un67_o1Oi1[9] ( .A(O1Oi1_Z[16]), .B(l1Oi1[7]), .C(l1Oi1[8]), .D(l1Oi1[9]), .Y(un67_o1Oi1[9]) ); defparam \genblk1.un67_o1Oi1[9] .INIT=16'h0008; // @28:509020 CFG4 \genblk1.un67_o1Oi1[8] ( .A(O1Oi1_Z[15]), .B(l1Oi1[7]), .C(l1Oi1[8]), .D(l1Oi1[9]), .Y(un67_o1Oi1[8]) ); defparam \genblk1.un67_o1Oi1[8] .INIT=16'h0008; // @28:509020 CFG4 \genblk1.un67_o1Oi1[7] ( .A(O1Oi1_Z[14]), .B(l1Oi1[7]), .C(l1Oi1[8]), .D(l1Oi1[9]), .Y(un67_o1Oi1[7]) ); defparam \genblk1.un67_o1Oi1[7] .INIT=16'h0008; // @28:509020 CFG4 \genblk1.un67_o1Oi1[6] ( .A(O1Oi1_Z[13]), .B(l1Oi1[7]), .C(l1Oi1[8]), .D(l1Oi1[9]), .Y(un67_o1Oi1[6]) ); defparam \genblk1.un67_o1Oi1[6] .INIT=16'h0008; // @28:509020 CFG4 \genblk1.un67_o1Oi1[5] ( .A(O1Oi1_Z[12]), .B(l1Oi1[7]), .C(l1Oi1[8]), .D(l1Oi1[9]), .Y(un67_o1Oi1[5]) ); defparam \genblk1.un67_o1Oi1[5] .INIT=16'h0008; // @28:509020 CFG4 \genblk1.un67_o1Oi1[4] ( .A(O1Oi1_Z[11]), .B(l1Oi1[7]), .C(l1Oi1[8]), .D(l1Oi1[9]), .Y(un67_o1Oi1[4]) ); defparam \genblk1.un67_o1Oi1[4] .INIT=16'h0008; // @28:509020 CFG4 \genblk1.un67_o1Oi1[3] ( .A(O1Oi1_Z[10]), .B(l1Oi1[7]), .C(l1Oi1[8]), .D(l1Oi1[9]), .Y(un67_o1Oi1[3]) ); defparam \genblk1.un67_o1Oi1[3] .INIT=16'h0008; // @28:509020 CFG4 \genblk1.un67_o1Oi1[2] ( .A(O1Oi1_Z[9]), .B(l1Oi1[7]), .C(l1Oi1[8]), .D(l1Oi1[9]), .Y(un67_o1Oi1[2]) ); defparam \genblk1.un67_o1Oi1[2] .INIT=16'h0008; // @28:509020 CFG4 \genblk1.un67_o1Oi1[1] ( .A(O1Oi1_Z[8]), .B(l1Oi1[7]), .C(l1Oi1[8]), .D(l1Oi1[9]), .Y(un67_o1Oi1[1]) ); defparam \genblk1.un67_o1Oi1[1] .INIT=16'h0008; // @28:509020 CFG4 \genblk1.un67_o1Oi1[0] ( .A(O1Oi1_Z[7]), .B(l1Oi1[7]), .C(l1Oi1[8]), .D(l1Oi1[9]), .Y(un67_o1Oi1[0]) ); defparam \genblk1.un67_o1Oi1[0] .INIT=16'h0008; // @28:508262 CFG4 \I1Oi1_0[3] ( .A(O1Oi1_Z[9]), .B(un27_I1Oi1_1), .C(un63_I1Oi1_1), .D(un75_I1Oi1), .Y(I1Oi1_0_Z[3]) ); defparam \I1Oi1_0[3] .INIT=16'hFF80; // @28:508322 CFG4 \I1Oi1_0[4] ( .A(un93_I1Oi1_1), .B(un83_I1Oi1), .C(ioio1_Z[0]), .D(un51_I1Oi1_2), .Y(I1Oi1_0_Z[4]) ); defparam \I1Oi1_0[4] .INIT=16'hECCC; // @28:509348 CFG4 Iiio1_0_a3_0 ( .A(i1Oi1_9), .B(Iiio1_0_a3_0_5_Z), .C(i1Oi1[8]), .D(i1Oi1_6), .Y(N_559) ); defparam Iiio1_0_a3_0.INIT=16'h4800; // @28:509348 CFG4 Iiio1_0_a3 ( .A(i1Oi1_9), .B(Iiio1_0_a3_5_Z), .C(i1Oi1[8]), .D(i1Oi1[7]), .Y(N_558) ); defparam Iiio1_0_a3.INIT=16'h4800; // @28:466506 CFG4 IOOi1_RNO_2 ( .A(i1Oi1[17]), .B(i1Oi1[12]), .C(m50_0_a3_5), .D(m50_0_a3_4), .Y(N_930) ); defparam IOOi1_RNO_2.INIT=16'h4000; // @28:466506 CFG4 IOOi1_RNO_3 ( .A(i1Oi1[17]), .B(i1Oi1[12]), .C(m50_0_a3_0_5), .D(m50_0_a3_0_4), .Y(N_931) ); defparam IOOi1_RNO_3.INIT=16'h2000; // @28:508082 CFG4 \genblk1.un117_I1Oi1 ( .A(un117_I1Oi1_2), .B(un71_I1Oi1_2), .C(ioio1_Z[0]), .D(O1Oi1_Z[16]), .Y(un117_I1Oi1) ); defparam \genblk1.un117_I1Oi1 .INIT=16'h0080; // @28:508095 CFG4 \genblk1.un135_I1Oi1 ( .A(O1Oi1_Z[6]), .B(O1Oi1_Z[7]), .C(un135_I1Oi1_1), .D(un111_I1Oi1_2), .Y(un135_I1Oi1) ); defparam \genblk1.un135_I1Oi1 .INIT=16'h8000; // @28:508082 CFG4 \genblk1.un179_I1Oi1 ( .A(O1Oi1_Z[11]), .B(O1Oi1_Z[10]), .C(un179_I1Oi1_1), .D(un12_I1Oi1_1), .Y(un179_I1Oi1) ); defparam \genblk1.un179_I1Oi1 .INIT=16'h8000; // @28:508082 CFG4 \genblk1.un189_I1Oi1 ( .A(ioio1_Z[1]), .B(ioio1_Z[0]), .C(un189_I1Oi1_1), .D(un99_I1Oi1_3), .Y(un189_I1Oi1) ); defparam \genblk1.un189_I1Oi1 .INIT=16'h8000; // @28:508095 CFG4 \genblk1.un219_I1Oi1 ( .A(ioio1_Z[1]), .B(ioio1_Z[0]), .C(un219_I1Oi1_2), .D(un171_I1Oi1_0), .Y(un219_I1Oi1) ); defparam \genblk1.un219_I1Oi1 .INIT=16'h4000; // @28:508862 CFG4 \genblk1.un22_o1Oi1 ( .A(l1Oi1[7]), .B(l1Oi1[6]), .C(un5_o1Oi1_5), .D(un22_o1Oi1_1), .Y(un22_o1Oi1) ); defparam \genblk1.un22_o1Oi1 .INIT=16'h1000; // @28:508832 CFG4 \genblk1.un12_o1Oi1 ( .A(l1Oi1[3]), .B(l1Oi1[4]), .C(un12_o1Oi1_3), .D(un12_o1Oi1_4_0), .Y(un12_o1Oi1) ); defparam \genblk1.un12_o1Oi1 .INIT=16'h1000; // @28:508894 CFG4 \genblk1.un32_o1Oi1 ( .A(un12_o1Oi1_3), .B(un32_o1Oi1_0), .C(un12_o1Oi1_4), .D(l1Oi1[9]), .Y(un32_o1Oi1) ); defparam \genblk1.un32_o1Oi1 .INIT=16'h0080; // @28:507917 CFG3 \ioio1_5_i_m2_i_m2[10] ( .A(ilI11), .B(iO1i0[0]), .C(OI1i0[0]), .Y(ioio1_5_i_m2_i_m2_Z[10]) ); defparam \ioio1_5_i_m2_i_m2[10] .INIT=8'hD8; // @28:507917 CFG3 \ioio1_5_i_m2_i_m2[11] ( .A(ilI11), .B(iO1i0[1]), .C(OI1i0[1]), .Y(ioio1_5_i_m2_i_m2_Z[11]) ); defparam \ioio1_5_i_m2_i_m2[11] .INIT=8'hD8; // @28:507917 CFG3 \ioio1_5_i_m2_i_m2[12] ( .A(ilI11), .B(iO1i0[2]), .C(OI1i0[2]), .Y(ioio1_5_i_m2_i_m2_Z[12]) ); defparam \ioio1_5_i_m2_i_m2[12] .INIT=8'hD8; // @28:507917 CFG3 \ioio1_5_i_m2_i_m2[13] ( .A(ilI11), .B(iO1i0[3]), .C(OI1i0[3]), .Y(ioio1_5_i_m2_i_m2_Z[13]) ); defparam \ioio1_5_i_m2_i_m2[13] .INIT=8'hD8; // @28:507917 CFG3 \ioio1_5_i_m2_i_m2[14] ( .A(ilI11), .B(iO1i0[4]), .C(OI1i0[4]), .Y(ioio1_5_i_m2_i_m2_Z[14]) ); defparam \ioio1_5_i_m2_i_m2[14] .INIT=8'hD8; // @28:507917 CFG3 \ioio1_5_i_m2_i_m2[15] ( .A(ilI11), .B(iO1i0[5]), .C(OI1i0[5]), .Y(ioio1_5_i_m2_i_m2_Z[15]) ); defparam \ioio1_5_i_m2_i_m2[15] .INIT=8'hD8; // @28:507917 CFG3 \ioio1_5_i_m2_i_m2[16] ( .A(ilI11), .B(iO1i0[6]), .C(OI1i0[6]), .Y(ioio1_5_i_m2_i_m2_Z[16]) ); defparam \ioio1_5_i_m2_i_m2[16] .INIT=8'hD8; // @28:507917 CFG3 \ioio1_5_i_m2_i_m2[17] ( .A(ilI11), .B(iO1i0[7]), .C(OI1i0[7]), .Y(ioio1_5_i_m2_i_m2_Z[17]) ); defparam \ioio1_5_i_m2_i_m2[17] .INIT=8'hD8; // @28:507917 CFG3 \ioio1_5_i_m2_i_m2[18] ( .A(ilI11), .B(iO1i0[8]), .C(OI1i0[8]), .Y(ioio1_5_i_m2_i_m2_Z[18]) ); defparam \ioio1_5_i_m2_i_m2[18] .INIT=8'hD8; // @28:507917 CFG3 \ioio1_5_i_m2_i_m2[19] ( .A(ilI11), .B(iO1i0[9]), .C(OI1i0[9]), .Y(ioio1_5_i_m2_i_m2_Z[19]) ); defparam \ioio1_5_i_m2_i_m2[19] .INIT=8'hD8; // @28:508817 CFG4 \o1Oi1_4[6] ( .A(O1Oi1_Z[12]), .B(O1Oi1_Z[10]), .C(un62_o1Oi1), .D(un42_o1Oi1), .Y(o1Oi1_4_Z[6]) ); defparam \o1Oi1_4[6] .INIT=16'hECA0; // @28:508817 CFG4 \o1Oi1_2[6] ( .A(un67_o1Oi1[6]), .B(un52_o1Oi1), .C(O1Oi1_Z[11]), .D(o1Oi1_0_Z[6]), .Y(o1Oi1_2_Z[6]) ); defparam \o1Oi1_2[6] .INIT=16'hFFEA; // @28:508817 CFG4 \o1Oi1_4[0] ( .A(O1Oi1_Z[6]), .B(O1Oi1_Z[4]), .C(un42_o1Oi1), .D(un62_o1Oi1), .Y(o1Oi1_4_Z[0]) ); defparam \o1Oi1_4[0] .INIT=16'hEAC0; // @28:508817 CFG4 \o1Oi1_2[0] ( .A(un67_o1Oi1[0]), .B(un52_o1Oi1), .C(O1Oi1_Z[5]), .D(o1Oi1_0_Z[0]), .Y(o1Oi1_2_Z[0]) ); defparam \o1Oi1_2[0] .INIT=16'hFFEA; // @28:508817 CFG4 \o1Oi1_4[8] ( .A(O1Oi1_Z[14]), .B(O1Oi1_Z[12]), .C(un42_o1Oi1), .D(un62_o1Oi1), .Y(o1Oi1_4_Z[8]) ); defparam \o1Oi1_4[8] .INIT=16'hEAC0; // @28:508817 CFG4 \o1Oi1_2[8] ( .A(un67_o1Oi1[8]), .B(un52_o1Oi1), .C(O1Oi1_Z[13]), .D(o1Oi1_0_Z[8]), .Y(o1Oi1_2_Z[8]) ); defparam \o1Oi1_2[8] .INIT=16'hFFEA; // @28:508817 CFG4 \o1Oi1_4[16] ( .A(ioio1_Z[2]), .B(ioio1_Z[0]), .C(un62_o1Oi1), .D(un42_o1Oi1), .Y(o1Oi1_4_Z[16]) ); defparam \o1Oi1_4[16] .INIT=16'hECA0; // @28:508817 CFG4 \o1Oi1_2[16] ( .A(o1Oi1_0_Z[16]), .B(un52_o1Oi1), .C(ioio1_Z[1]), .D(un67_o1Oi1[16]), .Y(o1Oi1_2_Z[16]) ); defparam \o1Oi1_2[16] .INIT=16'hFFEA; // @28:508817 CFG4 \o1Oi1_4[13] ( .A(O1Oi1_Z[19]), .B(O1Oi1_Z[17]), .C(un62_o1Oi1), .D(un42_o1Oi1), .Y(o1Oi1_4_Z[13]) ); defparam \o1Oi1_4[13] .INIT=16'hECA0; // @28:508817 CFG4 \o1Oi1_2[13] ( .A(un67_o1Oi1[13]), .B(O1Oi1_Z[18]), .C(un52_o1Oi1), .D(o1Oi1_0_Z[13]), .Y(o1Oi1_2_Z[13]) ); defparam \o1Oi1_2[13] .INIT=16'hFFEA; // @28:508817 CFG4 \o1Oi1_4[12] ( .A(O1Oi1_Z[18]), .B(O1Oi1_Z[16]), .C(un62_o1Oi1), .D(un42_o1Oi1), .Y(o1Oi1_4_Z[12]) ); defparam \o1Oi1_4[12] .INIT=16'hECA0; // @28:508817 CFG4 \o1Oi1_2[12] ( .A(un67_o1Oi1[12]), .B(un52_o1Oi1), .C(O1Oi1_Z[17]), .D(o1Oi1_0_Z[12]), .Y(o1Oi1_2_Z[12]) ); defparam \o1Oi1_2[12] .INIT=16'hFFEA; // @28:508817 CFG4 \o1Oi1_4[15] ( .A(un62_o1Oi1), .B(un42_o1Oi1), .C(ioio1_Z[1]), .D(O1Oi1_Z[19]), .Y(o1Oi1_4_Z[15]) ); defparam \o1Oi1_4[15] .INIT=16'hECA0; // @28:508817 CFG4 \o1Oi1_2[15] ( .A(o1Oi1_0_Z[15]), .B(un52_o1Oi1), .C(ioio1_Z[0]), .D(un67_o1Oi1[15]), .Y(o1Oi1_2_Z[15]) ); defparam \o1Oi1_2[15] .INIT=16'hFFEA; // @28:508817 CFG4 \o1Oi1_4[5] ( .A(O1Oi1_Z[11]), .B(O1Oi1_Z[9]), .C(un62_o1Oi1), .D(un42_o1Oi1), .Y(o1Oi1_4_Z[5]) ); defparam \o1Oi1_4[5] .INIT=16'hECA0; // @28:508817 CFG4 \o1Oi1_2[5] ( .A(un67_o1Oi1[5]), .B(O1Oi1_Z[10]), .C(un52_o1Oi1), .D(o1Oi1_0_Z[5]), .Y(o1Oi1_2_Z[5]) ); defparam \o1Oi1_2[5] .INIT=16'hFFEA; // @28:508817 CFG4 \o1Oi1_4[14] ( .A(un62_o1Oi1), .B(un42_o1Oi1), .C(ioio1_Z[0]), .D(O1Oi1_Z[18]), .Y(o1Oi1_4_Z[14]) ); defparam \o1Oi1_4[14] .INIT=16'hECA0; // @28:508817 CFG4 \o1Oi1_2[14] ( .A(un67_o1Oi1[14]), .B(O1Oi1_Z[19]), .C(un52_o1Oi1), .D(o1Oi1_0_Z[14]), .Y(o1Oi1_2_Z[14]) ); defparam \o1Oi1_2[14] .INIT=16'hFFEA; // @28:508817 CFG4 \o1Oi1_4[4] ( .A(O1Oi1_Z[10]), .B(O1Oi1_Z[8]), .C(un62_o1Oi1), .D(un42_o1Oi1), .Y(o1Oi1_4_Z[4]) ); defparam \o1Oi1_4[4] .INIT=16'hECA0; // @28:508817 CFG4 \o1Oi1_2[4] ( .A(un67_o1Oi1[4]), .B(un52_o1Oi1), .C(O1Oi1_Z[9]), .D(o1Oi1_0_Z[4]), .Y(o1Oi1_2_Z[4]) ); defparam \o1Oi1_2[4] .INIT=16'hFFEA; // @28:508817 CFG4 \o1Oi1_4[19] ( .A(ioio1_Z[5]), .B(ioio1_Z[3]), .C(un62_o1Oi1), .D(un42_o1Oi1), .Y(o1Oi1_4_Z[19]) ); defparam \o1Oi1_4[19] .INIT=16'hECA0; // @28:508817 CFG4 \o1Oi1_2[19] ( .A(o1Oi1_0_Z[19]), .B(un52_o1Oi1), .C(ioio1_Z[4]), .D(un67_o1Oi1[19]), .Y(o1Oi1_2_Z[19]) ); defparam \o1Oi1_2[19] .INIT=16'hFFEA; // @28:508817 CFG4 \o1Oi1_4[17] ( .A(ioio1_Z[3]), .B(ioio1_Z[1]), .C(un62_o1Oi1), .D(un42_o1Oi1), .Y(o1Oi1_4_Z[17]) ); defparam \o1Oi1_4[17] .INIT=16'hECA0; // @28:508817 CFG4 \o1Oi1_2[17] ( .A(o1Oi1_0_Z[17]), .B(un52_o1Oi1), .C(ioio1_Z[2]), .D(un67_o1Oi1[17]), .Y(o1Oi1_2_Z[17]) ); defparam \o1Oi1_2[17] .INIT=16'hFFEA; // @28:508817 CFG4 \o1Oi1_4[18] ( .A(ioio1_Z[4]), .B(ioio1_Z[2]), .C(un62_o1Oi1), .D(un42_o1Oi1), .Y(o1Oi1_4_Z[18]) ); defparam \o1Oi1_4[18] .INIT=16'hECA0; // @28:508817 CFG4 \o1Oi1_2[18] ( .A(o1Oi1_0_Z[18]), .B(un52_o1Oi1), .C(ioio1_Z[3]), .D(un67_o1Oi1[18]), .Y(o1Oi1_2_Z[18]) ); defparam \o1Oi1_2[18] .INIT=16'hFFEA; // @28:508817 CFG4 \o1Oi1_4[7] ( .A(O1Oi1_Z[13]), .B(O1Oi1_Z[11]), .C(un62_o1Oi1), .D(un42_o1Oi1), .Y(o1Oi1_4_Z[7]) ); defparam \o1Oi1_4[7] .INIT=16'hECA0; // @28:508817 CFG4 \o1Oi1_2[7] ( .A(un67_o1Oi1[7]), .B(O1Oi1_Z[12]), .C(un52_o1Oi1), .D(o1Oi1_0_Z[7]), .Y(o1Oi1_2_Z[7]) ); defparam \o1Oi1_2[7] .INIT=16'hFFEA; // @28:508817 CFG4 \o1Oi1_4[11] ( .A(O1Oi1_Z[17]), .B(O1Oi1_Z[15]), .C(un62_o1Oi1), .D(un42_o1Oi1), .Y(o1Oi1_4_Z[11]) ); defparam \o1Oi1_4[11] .INIT=16'hECA0; // @28:508817 CFG4 \o1Oi1_2[11] ( .A(un67_o1Oi1[11]), .B(un52_o1Oi1), .C(O1Oi1_Z[16]), .D(o1Oi1_0_Z[11]), .Y(o1Oi1_2_Z[11]) ); defparam \o1Oi1_2[11] .INIT=16'hFFEA; // @28:508817 CFG4 \o1Oi1_4[10] ( .A(O1Oi1_Z[16]), .B(O1Oi1_Z[14]), .C(un42_o1Oi1), .D(un62_o1Oi1), .Y(o1Oi1_4_Z[10]) ); defparam \o1Oi1_4[10] .INIT=16'hEAC0; // @28:508817 CFG4 \o1Oi1_2[10] ( .A(un67_o1Oi1[10]), .B(O1Oi1_Z[15]), .C(un52_o1Oi1), .D(o1Oi1_0_Z[10]), .Y(o1Oi1_2_Z[10]) ); defparam \o1Oi1_2[10] .INIT=16'hFFEA; // @28:508817 CFG4 \o1Oi1_4[9] ( .A(O1Oi1_Z[15]), .B(O1Oi1_Z[13]), .C(un42_o1Oi1), .D(un62_o1Oi1), .Y(o1Oi1_4_Z[9]) ); defparam \o1Oi1_4[9] .INIT=16'hEAC0; // @28:508817 CFG4 \o1Oi1_2[9] ( .A(un67_o1Oi1[9]), .B(un52_o1Oi1), .C(O1Oi1_Z[14]), .D(o1Oi1_0_Z[9]), .Y(o1Oi1_2_Z[9]) ); defparam \o1Oi1_2[9] .INIT=16'hFFEA; // @28:508817 CFG4 \o1Oi1_4[2] ( .A(O1Oi1_Z[8]), .B(O1Oi1_Z[6]), .C(un42_o1Oi1), .D(un62_o1Oi1), .Y(o1Oi1_4_Z[2]) ); defparam \o1Oi1_4[2] .INIT=16'hEAC0; // @28:508817 CFG4 \o1Oi1_2[2] ( .A(un67_o1Oi1[2]), .B(un52_o1Oi1), .C(O1Oi1_Z[7]), .D(o1Oi1_0_Z[2]), .Y(o1Oi1_2_Z[2]) ); defparam \o1Oi1_2[2] .INIT=16'hFFEA; // @28:508817 CFG4 \o1Oi1_4[1] ( .A(O1Oi1_Z[7]), .B(O1Oi1_Z[5]), .C(un42_o1Oi1), .D(un62_o1Oi1), .Y(o1Oi1_4_Z[1]) ); defparam \o1Oi1_4[1] .INIT=16'hEAC0; // @28:508817 CFG4 \o1Oi1_2[1] ( .A(un67_o1Oi1[1]), .B(un52_o1Oi1), .C(O1Oi1_Z[6]), .D(o1Oi1_0_Z[1]), .Y(o1Oi1_2_Z[1]) ); defparam \o1Oi1_2[1] .INIT=16'hFFEA; // @28:508817 CFG4 \o1Oi1_4[3] ( .A(O1Oi1_Z[9]), .B(O1Oi1_Z[7]), .C(un62_o1Oi1), .D(un42_o1Oi1), .Y(o1Oi1_4_Z[3]) ); defparam \o1Oi1_4[3] .INIT=16'hECA0; // @28:508817 CFG4 \o1Oi1_2[3] ( .A(un67_o1Oi1[3]), .B(un52_o1Oi1), .C(O1Oi1_Z[8]), .D(o1Oi1_0_Z[3]), .Y(o1Oi1_2_Z[3]) ); defparam \o1Oi1_2[3] .INIT=16'hFFEA; // @28:508708 CFG4 \I1Oi1_1[9] ( .A(O1Oi1_Z[13]), .B(O1Oi1_Z[14]), .C(un203_I1Oi1_2), .D(un207_I1Oi1_2), .Y(I1Oi1_1_Z[9]) ); defparam \I1Oi1_1[9] .INIT=16'h9180; // @28:508142 CFG4 \I1Oi1_0[1] ( .A(O1Oi1_Z[5]), .B(O1Oi1_Z[6]), .C(un23_I1Oi1_2_0), .D(un27_I1Oi1_2), .Y(I1Oi1_0_Z[1]) ); defparam \I1Oi1_0[1] .INIT=16'h9180; // @28:508082 CFG4 \I1Oi1_0[0] ( .A(O1Oi1_Z[4]), .B(O1Oi1_Z[5]), .C(un4_I1Oi1_2_0), .D(un8_I1Oi1_2), .Y(I1Oi1_0_Z[0]) ); defparam \I1Oi1_0[0] .INIT=16'h9180; // @28:508322 CFG4 \I1Oi1[4] ( .A(un99_I1Oi1), .B(un87_I1Oi1_1), .C(I1Oi1_0_Z[4]), .D(un67_I1Oi1_2_0), .Y(I1Oi1_Z[4]) ); defparam \I1Oi1[4] .INIT=16'hFEFA; // @28:508552 CFG4 \I1Oi1[7] ( .A(un155_I1Oi1), .B(un171_I1Oi1), .C(un165_I1Oi1), .D(un159_I1Oi1), .Y(I1Oi1_Z[7]) ); defparam \I1Oi1[7] .INIT=16'hFFFE; // @28:508819 CFG4 \genblk1.un5_o1Oi1 ( .A(l1Oi1[6]), .B(l1Oi1[7]), .C(un5_o1Oi1_3_0), .D(un5_o1Oi1_5), .Y(un5_o1Oi1) ); defparam \genblk1.un5_o1Oi1 .INIT=16'h1000; // @28:508817 CFG4 \o1Oi1_3[6] ( .A(O1Oi1_Z[9]), .B(O1Oi1_Z[7]), .C(un32_o1Oi1), .D(un12_o1Oi1), .Y(o1Oi1_3_Z[6]) ); defparam \o1Oi1_3[6] .INIT=16'hECA0; // @28:508817 CFG4 \o1Oi1_3[0] ( .A(O1Oi1_Z[3]), .B(O1Oi1_Z[1]), .C(un12_o1Oi1), .D(un32_o1Oi1), .Y(o1Oi1_3_Z[0]) ); defparam \o1Oi1_3[0] .INIT=16'hEAC0; // @28:508817 CFG4 \o1Oi1_3[8] ( .A(O1Oi1_Z[11]), .B(O1Oi1_Z[9]), .C(un32_o1Oi1), .D(un12_o1Oi1), .Y(o1Oi1_3_Z[8]) ); defparam \o1Oi1_3[8] .INIT=16'hECA0; // @28:508817 CFG4 \o1Oi1_3[16] ( .A(O1Oi1_Z[19]), .B(O1Oi1_Z[17]), .C(un32_o1Oi1), .D(un12_o1Oi1), .Y(o1Oi1_3_Z[16]) ); defparam \o1Oi1_3[16] .INIT=16'hECA0; // @28:508817 CFG4 \o1Oi1_3[13] ( .A(O1Oi1_Z[16]), .B(O1Oi1_Z[14]), .C(un12_o1Oi1), .D(un32_o1Oi1), .Y(o1Oi1_3_Z[13]) ); defparam \o1Oi1_3[13] .INIT=16'hEAC0; // @28:508817 CFG4 \o1Oi1_3[12] ( .A(O1Oi1_Z[15]), .B(O1Oi1_Z[13]), .C(un12_o1Oi1), .D(un32_o1Oi1), .Y(o1Oi1_3_Z[12]) ); defparam \o1Oi1_3[12] .INIT=16'hEAC0; // @28:508817 CFG4 \o1Oi1_3[15] ( .A(O1Oi1_Z[18]), .B(O1Oi1_Z[16]), .C(un32_o1Oi1), .D(un12_o1Oi1), .Y(o1Oi1_3_Z[15]) ); defparam \o1Oi1_3[15] .INIT=16'hECA0; // @28:508817 CFG4 \o1Oi1_3[5] ( .A(O1Oi1_Z[8]), .B(O1Oi1_Z[6]), .C(un12_o1Oi1), .D(un32_o1Oi1), .Y(o1Oi1_3_Z[5]) ); defparam \o1Oi1_3[5] .INIT=16'hEAC0; // @28:508817 CFG4 \o1Oi1_3[14] ( .A(O1Oi1_Z[17]), .B(O1Oi1_Z[15]), .C(un32_o1Oi1), .D(un12_o1Oi1), .Y(o1Oi1_3_Z[14]) ); defparam \o1Oi1_3[14] .INIT=16'hECA0; // @28:508817 CFG4 \o1Oi1_3[4] ( .A(O1Oi1_Z[7]), .B(O1Oi1_Z[5]), .C(un12_o1Oi1), .D(un32_o1Oi1), .Y(o1Oi1_3_Z[4]) ); defparam \o1Oi1_3[4] .INIT=16'hEAC0; // @28:508817 CFG4 \o1Oi1_3[19] ( .A(ioio1_Z[2]), .B(ioio1_Z[0]), .C(un32_o1Oi1), .D(un12_o1Oi1), .Y(o1Oi1_3_Z[19]) ); defparam \o1Oi1_3[19] .INIT=16'hECA0; // @28:508817 CFG4 \o1Oi1_3[17] ( .A(un32_o1Oi1), .B(un12_o1Oi1), .C(ioio1_Z[0]), .D(O1Oi1_Z[18]), .Y(o1Oi1_3_Z[17]) ); defparam \o1Oi1_3[17] .INIT=16'hECA0; // @28:508817 CFG4 \o1Oi1_3[18] ( .A(un32_o1Oi1), .B(un12_o1Oi1), .C(ioio1_Z[1]), .D(O1Oi1_Z[19]), .Y(o1Oi1_3_Z[18]) ); defparam \o1Oi1_3[18] .INIT=16'hECA0; // @28:508817 CFG4 \o1Oi1_3[7] ( .A(O1Oi1_Z[10]), .B(O1Oi1_Z[8]), .C(un32_o1Oi1), .D(un12_o1Oi1), .Y(o1Oi1_3_Z[7]) ); defparam \o1Oi1_3[7] .INIT=16'hECA0; // @28:508817 CFG4 \o1Oi1_3[11] ( .A(O1Oi1_Z[14]), .B(O1Oi1_Z[12]), .C(un12_o1Oi1), .D(un32_o1Oi1), .Y(o1Oi1_3_Z[11]) ); defparam \o1Oi1_3[11] .INIT=16'hEAC0; // @28:508817 CFG4 \o1Oi1_3[10] ( .A(O1Oi1_Z[13]), .B(O1Oi1_Z[11]), .C(un32_o1Oi1), .D(un12_o1Oi1), .Y(o1Oi1_3_Z[10]) ); defparam \o1Oi1_3[10] .INIT=16'hECA0; // @28:508817 CFG4 \o1Oi1_3[9] ( .A(O1Oi1_Z[12]), .B(O1Oi1_Z[10]), .C(un32_o1Oi1), .D(un12_o1Oi1), .Y(o1Oi1_3_Z[9]) ); defparam \o1Oi1_3[9] .INIT=16'hECA0; // @28:508817 CFG4 \o1Oi1_3[2] ( .A(O1Oi1_Z[5]), .B(O1Oi1_Z[3]), .C(un12_o1Oi1), .D(un32_o1Oi1), .Y(o1Oi1_3_Z[2]) ); defparam \o1Oi1_3[2] .INIT=16'hEAC0; // @28:508817 CFG4 \o1Oi1_3[1] ( .A(O1Oi1_Z[4]), .B(O1Oi1_Z[2]), .C(un12_o1Oi1), .D(un32_o1Oi1), .Y(o1Oi1_3_Z[1]) ); defparam \o1Oi1_3[1] .INIT=16'hEAC0; // @28:508817 CFG4 \o1Oi1_3[3] ( .A(O1Oi1_Z[6]), .B(O1Oi1_Z[4]), .C(un12_o1Oi1), .D(un32_o1Oi1), .Y(o1Oi1_3_Z[3]) ); defparam \o1Oi1_3[3] .INIT=16'hEAC0; // @28:508082 CFG4 \I1Oi1[0] ( .A(un12_I1Oi1_2), .B(un16_I1Oi1), .C(I1Oi1_0_Z[0]), .D(un12_I1Oi1_2_0), .Y(I1Oi1_Z[0]) ); defparam \I1Oi1[0] .INIT=16'hFEFC; // @28:508142 CFG4 \I1Oi1[1] ( .A(I1Oi1_0_Z[1]), .B(un31_I1Oi1_1), .C(un35_I1Oi1), .D(un31_I1Oi1_2_0), .Y(I1Oi1_Z[1]) ); defparam \I1Oi1[1] .INIT=16'hFEFA; // @28:508202 CFG4 \I1Oi1[2] ( .A(un43_I1Oi1), .B(un51_I1Oi1), .C(un55_I1Oi1), .D(un47_I1Oi1), .Y(I1Oi1_Z[2]) ); defparam \I1Oi1[2] .INIT=16'hFFFE; // @28:508396 CFG4 \I1Oi1[5] ( .A(un117_I1Oi1), .B(un107_I1Oi1), .C(un123_I1Oi1), .D(un111_I1Oi1), .Y(I1Oi1_Z[5]) ); defparam \I1Oi1[5] .INIT=16'hFFFE; // @28:508474 CFG4 \I1Oi1[6] ( .A(un135_I1Oi1), .B(un141_I1Oi1), .C(un131_I1Oi1), .D(un147_I1Oi1), .Y(I1Oi1_Z[6]) ); defparam \I1Oi1[6] .INIT=16'hFFFE; // @28:508630 CFG4 \I1Oi1[8] ( .A(un195_I1Oi1), .B(un179_I1Oi1), .C(un189_I1Oi1), .D(un183_I1Oi1), .Y(I1Oi1_Z[8]) ); defparam \I1Oi1[8] .INIT=16'hFFFE; // @28:508708 CFG4 \I1Oi1[9] ( .A(un219_I1Oi1), .B(I1Oi1_1_Z[9]), .C(un213_I1Oi1_2), .D(un123_I1Oi1_3), .Y(I1Oi1_Z[9]) ); defparam \I1Oi1[9] .INIT=16'hFEEE; // @28:466506 CFG4 IOOi1_RNO_1 ( .A(N_930), .B(N_931), .C(N_559), .D(N_558), .Y(N_946) ); defparam IOOi1_RNO_1.INIT=16'h111E; // @28:508802 CFG2 \genblk1.un1_I1Oi1_4 ( .A(I1Oi1_Z[7]), .B(I1Oi1_Z[8]), .Y(un1_I1Oi1_4) ); defparam \genblk1.un1_I1Oi1_4 .INIT=4'hE; // @28:508817 CFG4 \o1Oi1_7[8] ( .A(un22_o1Oi1), .B(O1Oi1_Z[10]), .C(o1Oi1_2_Z[8]), .D(o1Oi1_4_Z[8]), .Y(o1Oi1_7_Z[8]) ); defparam \o1Oi1_7[8] .INIT=16'hFFF8; // @28:508817 CFG4 \o1Oi1_7[16] ( .A(un22_o1Oi1), .B(O1Oi1_Z[18]), .C(o1Oi1_2_Z[16]), .D(o1Oi1_4_Z[16]), .Y(o1Oi1_7_Z[16]) ); defparam \o1Oi1_7[16] .INIT=16'hFFF8; // @28:508817 CFG4 \o1Oi1_7[12] ( .A(un22_o1Oi1), .B(O1Oi1_Z[14]), .C(o1Oi1_2_Z[12]), .D(o1Oi1_4_Z[12]), .Y(o1Oi1_7_Z[12]) ); defparam \o1Oi1_7[12] .INIT=16'hFFF8; // @28:508817 CFG4 \o1Oi1_7[9] ( .A(un22_o1Oi1), .B(O1Oi1_Z[11]), .C(o1Oi1_2_Z[9]), .D(o1Oi1_4_Z[9]), .Y(o1Oi1_7_Z[9]) ); defparam \o1Oi1_7[9] .INIT=16'hFFF8; // @28:509549 CFG3 IOOi1_RNO ( .A(N_559), .B(iII11), .C(N_558), .Y(N_301_i) ); defparam IOOi1_RNO.INIT=8'hFE; // @28:508802 CFG4 \genblk1.un1_I1Oi1_6 ( .A(I1Oi1_Z[6]), .B(I1Oi1_Z[4]), .C(I1Oi1_Z[5]), .D(I1Oi1_Z[3]), .Y(un1_I1Oi1_6) ); defparam \genblk1.un1_I1Oi1_6 .INIT=16'hFFFE; // @28:508802 CFG4 \genblk1.un1_I1Oi1_5 ( .A(I1Oi1_Z[2]), .B(I1Oi1_Z[0]), .C(I1Oi1_Z[9]), .D(I1Oi1_Z[1]), .Y(un1_I1Oi1_5) ); defparam \genblk1.un1_I1Oi1_5 .INIT=16'hFFFE; // @28:508817 CFG4 \o1Oi1[16] ( .A(un5_o1Oi1), .B(O1Oi1_Z[16]), .C(o1Oi1_3_Z[16]), .D(o1Oi1_7_Z[16]), .Y(o1Oi1_Z[16]) ); defparam \o1Oi1[16] .INIT=16'hFFF8; // @28:508817 CFG4 \o1Oi1[12] ( .A(un5_o1Oi1), .B(O1Oi1_Z[12]), .C(o1Oi1_3_Z[12]), .D(o1Oi1_7_Z[12]), .Y(o1Oi1_Z[12]) ); defparam \o1Oi1[12] .INIT=16'hFFF8; // @28:508817 CFG4 \o1Oi1[9] ( .A(un5_o1Oi1), .B(O1Oi1_Z[9]), .C(o1Oi1_3_Z[9]), .D(o1Oi1_7_Z[9]), .Y(o1Oi1_Z[9]) ); defparam \o1Oi1[9] .INIT=16'hFFF8; // @28:508817 CFG4 \o1Oi1[8] ( .A(un5_o1Oi1), .B(O1Oi1_Z[8]), .C(o1Oi1_3_Z[8]), .D(o1Oi1_7_Z[8]), .Y(o1Oi1_Z[8]) ); defparam \o1Oi1[8] .INIT=16'hFFF8; // @28:466506 CFG3 IOOi1_RNO_0 ( .A(iOl01), .B(N_946), .C(iII11), .Y(IOOi1_RNO_0_Z) ); defparam IOOi1_RNO_0.INIT=8'hA8; // @28:508802 CFG4 \genblk1.l1Oi14 ( .A(un1_I1Oi1_6), .B(un1_I1Oi1_5), .C(iOl01), .D(un1_I1Oi1_4), .Y(l1Oi14) ); defparam \genblk1.l1Oi14 .INIT=16'hF0E0; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEREX_PMA_26s_0s_1s_0_1_2_3_4 */ module CTSE_R10B8B_1 ( I0lIo_m_2, I0lIo_m_0, ol0o1_0, lliO1_1_iv_0_0, I1lIo_0, I1lIo_2, lliO1_1_iv_1_0, Oiio1, Il0o1, I0lIo_0, OlI11_5, OlI11_0, OlI11_2, OlI11_3, OlI11_7, OlI11_6, OlI11_9, lI0o1_0, OlI11_i_2, OlI11_i_0, Oiio1_RNI1B0P9_0, Oiio1_RNI7H0P9_0, i5_mux, IoIO1, oO0Io, un8_l00o1_1, i2_mux_0, un1_lilIo56_i_2, lilIo52_RNIDMMEA_1z, O00o1_N_3_mux_i_1z, un8_l00o1_3, un8_l00o1_2, N_66, lilIo53_1z, lilIo54_1z, lilIo55_1z, lilIo56_1z, lilIo52_1z, un1_lilIo56_i, lilIo56_1_1z, lilIo51_1z, lolIo_1z, OO0Io_1z, IO0Io, IOOi1, N_7211_2, N_147_i, IilIo, N_7215_1, N_57 ) ; output I0lIo_m_2 ; output I0lIo_m_0 ; output ol0o1_0 ; output lliO1_1_iv_0_0 ; output I1lIo_0 ; output I1lIo_2 ; output lliO1_1_iv_1_0 ; input [19:0] Oiio1 ; output [2:1] Il0o1 ; output I0lIo_0 ; input OlI11_5 ; input OlI11_0 ; input OlI11_2 ; input OlI11_3 ; input OlI11_7 ; input OlI11_6 ; input OlI11_9 ; input lI0o1_0 ; input OlI11_i_2 ; input OlI11_i_0 ; input Oiio1_RNI1B0P9_0 ; input Oiio1_RNI7H0P9_0 ; output i5_mux ; input IoIO1 ; output oO0Io ; input un8_l00o1_1 ; output i2_mux_0 ; output un1_lilIo56_i_2 ; output lilIo52_RNIDMMEA_1z ; output O00o1_N_3_mux_i_1z ; output un8_l00o1_3 ; output un8_l00o1_2 ; output N_66 ; output lilIo53_1z ; output lilIo54_1z ; output lilIo55_1z ; output lilIo56_1z ; output lilIo52_1z ; output un1_lilIo56_i ; output lilIo56_1_1z ; output lilIo51_1z ; output lolIo_1z ; output OO0Io_1z ; output IO0Io ; input IOOi1 ; output N_7211_2 ; input N_147_i ; output IilIo ; output N_7215_1 ; output N_57 ; wire I0lIo_m_2 ; wire I0lIo_m_0 ; wire ol0o1_0 ; wire lliO1_1_iv_0_0 ; wire I1lIo_0 ; wire I1lIo_2 ; wire lliO1_1_iv_1_0 ; wire I0lIo_0 ; wire OlI11_5 ; wire OlI11_0 ; wire OlI11_2 ; wire OlI11_3 ; wire OlI11_7 ; wire OlI11_6 ; wire OlI11_9 ; wire lI0o1_0 ; wire OlI11_i_2 ; wire OlI11_i_0 ; wire Oiio1_RNI1B0P9_0 ; wire Oiio1_RNI7H0P9_0 ; wire i5_mux ; wire IoIO1 ; wire oO0Io ; wire un8_l00o1_1 ; wire i2_mux_0 ; wire un1_lilIo56_i_2 ; wire lilIo52_RNIDMMEA_1z ; wire O00o1_N_3_mux_i_1z ; wire un8_l00o1_3 ; wire un8_l00o1_2 ; wire N_66 ; wire lilIo53_1z ; wire lilIo54_1z ; wire lilIo55_1z ; wire lilIo56_1z ; wire lilIo52_1z ; wire un1_lilIo56_i ; wire lilIo56_1_1z ; wire lilIo51_1z ; wire lolIo_1z ; wire OO0Io_1z ; wire IO0Io ; wire IOOi1 ; wire N_7211_2 ; wire N_147_i ; wire IilIo ; wire N_7215_1 ; wire N_57 ; wire [2:0] OolIo; wire [1:1] oolIo_0_1_Z; wire [1:1] oolIo; wire [1:1] I0lIo; wire [2:2] oolIo_Z; wire [0:0] oolIo_i_a4_1_0_Z; wire [2:2] oolIo_0_a4_0_1_Z; wire [0:0] oolIo_i_a4_0_1_Z; wire [1:1] I1lIo; wire [0:0] oolIo_i_a2_2_Z; wire [0:0] O1lIo; wire [0:0] o0lIo; wire m13_1_0_co1 ; wire m13_1_0_wmux_0_S ; wire m13_1_0_wmux_0_Y ; wire N_11_i ; wire m7_0 ; wire m13_1_0_y0 ; wire m13_1_0_co0 ; wire m13_1_0_wmux_S ; wire m3_0 ; wire m4_1 ; wire VCC ; wire m7_1_0_co1 ; wire m7_1_0_wmux_0_S ; wire N_64_mux ; wire N_65 ; wire N_5 ; wire m7_1_0_y0 ; wire m7_1_0_co0 ; wire m7_1_0_wmux_S ; wire N_2_i ; wire m56_1_0_co1 ; wire m56_1_0_wmux_0_S ; wire N_12_i ; wire N_24 ; wire m56_1_0_y0 ; wire m56_1_0_co0 ; wire m56_1_0_wmux_S ; wire N_2_i_i ; wire N_12 ; wire m34_1_0_co1 ; wire m34_1_0_wmux_0_S ; wire N_65_mux ; wire N_14 ; wire m34_1_0_y0 ; wire m34_1_0_co0 ; wire m34_1_0_wmux_S ; wire m41_1 ; wire un13_lolIo_1_0_Z ; wire un13_lolIo_1_Z ; wire un13_lolIo_Z ; wire N_5_0 ; wire IilIo_1_1_Z ; wire IilIo_1_RNO_Z ; wire N_40_mux ; wire IilIo_i_tz ; wire m13_2_0 ; wire i0lIo ; wire un12_lolIo_1_Z ; wire un12_lolIo_Z ; wire i2_mux ; wire N_149 ; wire N_150 ; wire l1lIo ; wire lolIo_2_Z ; wire lolIo_5_1_Z ; wire lolIo_5_Z ; wire N_7211_1 ; wire m16_1 ; wire i5_mux_1 ; wire m51_2_1_0 ; wire N_19 ; wire m51_2 ; wire m51_2_0_1 ; wire N_48 ; wire m51_2_0 ; wire N_29 ; wire m30_2_1_1_0 ; wire N_27 ; wire m30_2_1_1_1 ; wire N_20_i ; wire m12 ; wire m41_2 ; wire m41_2_0_0 ; wire N_42 ; wire m41_1_0 ; wire i3_mux ; wire i5_mux_0 ; wire m5_0 ; wire i5_mux_0_0 ; wire m5 ; wire I00o1_1_a2_0 ; wire I00o1_1_a6_1_1_Z ; wire lilIo52_0_Z ; wire lilIo55_0_Z ; wire lilIo53_0_0_Z ; wire N_99_i ; wire m28 ; wire d_m3_0 ; wire N_137 ; wire N_7 ; wire N_24_0 ; wire un1_lilIo56_0 ; wire I00o1_1_a6_2_0_Z ; wire m2 ; wire m4 ; wire I00o1_1_a2_1 ; wire I00o1_1_a2_0_1_Z ; wire I00o1_1_a2_0_0_Z ; wire N_142 ; wire N_141 ; wire N_146 ; wire N_31 ; wire m3 ; wire N_4 ; wire N_25 ; wire m8_1_0 ; wire I00o1_1_a6_0_1_Z ; wire N_36_mux ; wire d_m5_0_1 ; wire N_279 ; wire N_280 ; wire IilIo_1_RNO_1_Z ; wire i2_mux_0_0 ; wire i2_mux_2 ; wire N_48_1 ; wire N_27_1 ; wire i2_mux_0_2 ; wire i2_mux_0_1 ; wire N_126 ; wire N_132 ; wire N_129 ; wire N_298 ; wire N_299 ; wire N_281 ; wire N_282 ; wire i6_mux_1 ; wire un37_lolIo_Z ; wire i5_mux_2 ; wire N_11 ; wire I00o1_1_0_Z ; wire N_274 ; wire i5_mux_1_0 ; wire un28_lolIo_Z ; wire I00o1_1_1_Z ; wire N_124 ; wire N_17 ; wire un1_lolIo_Z ; wire lolIo_7_Z ; wire N_7277 ; wire N_7276 ; wire N_7273 ; wire N_7272 ; wire GND ; // @28:537806 ARI1 \i0lIo_1_0_0_.m13_1_0_wmux_0 ( .FCO(m13_1_0_co1), .S(m13_1_0_wmux_0_S), .Y(m13_1_0_wmux_0_Y), .B(Oiio1_RNI7H0P9_0), .C(N_11_i), .D(m7_0), .A(m13_1_0_y0), .FCI(m13_1_0_co0) ); defparam \i0lIo_1_0_0_.m13_1_0_wmux_0 .INIT=20'h0F588; // @28:537806 ARI1 \i0lIo_1_0_0_.m13_1_0_wmux ( .FCO(m13_1_0_co0), .S(m13_1_0_wmux_S), .Y(m13_1_0_y0), .B(Oiio1_RNI7H0P9_0), .C(m3_0), .D(m4_1), .A(OlI11_5), .FCI(VCC) ); defparam \i0lIo_1_0_0_.m13_1_0_wmux .INIT=20'h0FA44; // @28:537806 ARI1 \I0lIo_4_0_.m7_1_0_wmux_0 ( .FCO(m7_1_0_co1), .S(m7_1_0_wmux_0_S), .Y(N_64_mux), .B(N_65), .C(N_5), .D(OlI11_i_2), .A(m7_1_0_y0), .FCI(m7_1_0_co0) ); defparam \I0lIo_4_0_.m7_1_0_wmux_0 .INIT=20'h0F588; // @28:537806 ARI1 \I0lIo_4_0_.m7_1_0_wmux ( .FCO(m7_1_0_co0), .S(m7_1_0_wmux_S), .Y(m7_1_0_y0), .B(N_65), .C(OlI11_0), .D(N_2_i), .A(Oiio1_RNI7H0P9_0), .FCI(VCC) ); defparam \I0lIo_4_0_.m7_1_0_wmux .INIT=20'h0FA44; // @28:537806 ARI1 \I0lIo_4_0_.m56_1_0_wmux_0 ( .FCO(m56_1_0_co1), .S(m56_1_0_wmux_0_S), .Y(N_57), .B(Oiio1_RNI1B0P9_0), .C(N_12_i), .D(N_24), .A(m56_1_0_y0), .FCI(m56_1_0_co0) ); defparam \I0lIo_4_0_.m56_1_0_wmux_0 .INIT=20'h0F588; // @28:537806 ARI1 \I0lIo_4_0_.m56_1_0_wmux ( .FCO(m56_1_0_co0), .S(m56_1_0_wmux_S), .Y(m56_1_0_y0), .B(Oiio1_RNI1B0P9_0), .C(N_2_i_i), .D(N_12), .A(Oiio1_RNI7H0P9_0), .FCI(VCC) ); defparam \I0lIo_4_0_.m56_1_0_wmux .INIT=20'h0FA44; // @28:537806 ARI1 \I0lIo_4_0_.m34_1_0_wmux_0 ( .FCO(m34_1_0_co1), .S(m34_1_0_wmux_0_S), .Y(N_65_mux), .B(N_65), .C(N_14), .D(OlI11_i_0), .A(m34_1_0_y0), .FCI(m34_1_0_co0) ); defparam \I0lIo_4_0_.m34_1_0_wmux_0 .INIT=20'h0F588; // @28:537806 ARI1 \I0lIo_4_0_.m34_1_0_wmux ( .FCO(m34_1_0_co0), .S(m34_1_0_wmux_S), .Y(m34_1_0_y0), .B(N_65), .C(OlI11_2), .D(N_2_i), .A(Oiio1_RNI7H0P9_0), .FCI(VCC) ); defparam \I0lIo_4_0_.m34_1_0_wmux .INIT=20'h0FA44; // @28:537806 CFG3 \I0lIo_4_0_.m41_1 ( .A(Oiio1_RNI1B0P9_0), .B(Oiio1_RNI7H0P9_0), .C(OlI11_2), .Y(m41_1) ); defparam \I0lIo_4_0_.m41_1 .INIT=8'hA8; // @28:539188 CFG4 un13_lolIo ( .A(OolIo[1]), .B(un13_lolIo_1_0_Z), .C(un13_lolIo_1_Z), .D(N_7215_1), .Y(un13_lolIo_Z) ); defparam un13_lolIo.INIT=16'h1D55; // @28:539188 CFG3 un13_lolIo_1_0 ( .A(N_5_0), .B(lI0o1_0), .C(OlI11_3), .Y(un13_lolIo_1_0_Z) ); defparam un13_lolIo_1_0.INIT=8'h02; // @28:539753 CFG4 IilIo_1 ( .A(IilIo_1_1_Z), .B(OlI11_7), .C(IilIo_1_RNO_Z), .D(N_40_mux), .Y(IilIo) ); defparam IilIo_1.INIT=16'h1908; // @28:539753 CFG4 IilIo_1_1 ( .A(OlI11_7), .B(OlI11_6), .C(IilIo_i_tz), .D(Oiio1_RNI7H0P9_0), .Y(IilIo_1_1_Z) ); defparam IilIo_1_1.INIT=16'h2505; // @28:537806 CFG3 \i0lIo_1_0_0_.m13_2_0 ( .A(OlI11_5), .B(m7_0), .C(m3_0), .Y(m13_2_0) ); defparam \i0lIo_1_0_0_.m13_2_0 .INIT=8'hE4; // @28:539167 CFG4 un12_lolIo ( .A(OlI11_6), .B(lI0o1_0), .C(i0lIo), .D(un12_lolIo_1_Z), .Y(un12_lolIo_Z) ); defparam un12_lolIo.INIT=16'h9600; // @28:539167 CFG4 un12_lolIo_1 ( .A(N_147_i), .B(OlI11_9), .C(OlI11_6), .D(OlI11_7), .Y(un12_lolIo_1_Z) ); defparam un12_lolIo_1.INIT=16'h718E; // @28:539188 CFG4 un13_lolIo_1 ( .A(OolIo[1]), .B(OolIo[2]), .C(N_147_i), .D(OlI11_9), .Y(un13_lolIo_1_Z) ); defparam un13_lolIo_1.INIT=16'h0EEE; // @28:539488 CFG4 \oolIo_0[1] ( .A(i2_mux), .B(OlI11_2), .C(oolIo_0_1_Z[1]), .D(N_149), .Y(oolIo[1]) ); defparam \oolIo_0[1] .INIT=16'h2E0C; // @28:539488 CFG4 \oolIo_0_1[1] ( .A(OlI11_3), .B(OlI11_0), .C(N_150), .D(Oiio1_RNI1B0P9_0), .Y(oolIo_0_1_Z[1]) ); defparam \oolIo_0_1[1] .INIT=16'h7F9F; // @28:539134 CFG3 lolIo_5 ( .A(l1lIo), .B(lolIo_2_Z), .C(lolIo_5_1_Z), .Y(lolIo_5_Z) ); defparam lolIo_5.INIT=8'h08; // @28:539134 CFG4 lolIo_5_1 ( .A(OlI11_3), .B(OlI11_2), .C(N_7211_2), .D(N_7211_1), .Y(lolIo_5_1_Z) ); defparam lolIo_5_1.INIT=16'h7110; // @28:537806 CFG4 \o0lIo_1_0_.m16 ( .A(OlI11_3), .B(OlI11_0), .C(m16_1), .D(OlI11_2), .Y(i5_mux_1) ); defparam \o0lIo_1_0_.m16 .INIT=16'h344A; // @28:537806 CFG4 \o0lIo_1_0_.m16_1 ( .A(OlI11_5), .B(OlI11_0), .C(OlI11_3), .D(Oiio1_RNI1B0P9_0), .Y(m16_1) ); defparam \o0lIo_1_0_.m16_1 .INIT=16'h10CB; // @28:537806 CFG4 \I0lIo_4_0_.m51_2 ( .A(OlI11_3), .B(Oiio1_RNI1B0P9_0), .C(m51_2_1_0), .D(N_19), .Y(m51_2) ); defparam \I0lIo_4_0_.m51_2 .INIT=16'h4E0A; // @28:537806 CFG4 \I0lIo_4_0_.m51_2_1_1 ( .A(OlI11_2), .B(Oiio1_RNI7H0P9_0), .C(N_2_i_i), .D(Oiio1_RNI1B0P9_0), .Y(m51_2_1_0) ); defparam \I0lIo_4_0_.m51_2_1_1 .INIT=16'h440F; // @28:537806 CFG3 \I0lIo_4_0_.m51_2_0 ( .A(OlI11_3), .B(m51_2_0_1), .C(N_48), .Y(m51_2_0) ); defparam \I0lIo_4_0_.m51_2_0 .INIT=8'h72; // @28:537806 CFG4 \I0lIo_4_0_.m51_2_0_1 ( .A(Oiio1_RNI1B0P9_0), .B(Oiio1_RNI7H0P9_0), .C(N_12), .D(N_24), .Y(m51_2_0_1) ); defparam \I0lIo_4_0_.m51_2_0_1 .INIT=16'h27AF; CFG4 \I0lIo_4_0_.m30_2_1 ( .A(N_29), .B(OlI11_5), .C(m30_2_1_1_0), .D(N_27), .Y(I0lIo[1]) ); defparam \I0lIo_4_0_.m30_2_1 .INIT=16'hF838; CFG4 \I0lIo_4_0_.m30_2_1_1_0 ( .A(OlI11_3), .B(OlI11_5), .C(m30_2_1_1_1), .D(N_2_i), .Y(m30_2_1_1_0) ); defparam \I0lIo_4_0_.m30_2_1_1_0 .INIT=16'h4565; CFG4 \I0lIo_4_0_.m30_2_1_1_1 ( .A(OlI11_3), .B(Oiio1_RNI1B0P9_0), .C(N_20_i), .D(N_19), .Y(m30_2_1_1_1) ); defparam \I0lIo_4_0_.m30_2_1_1_1 .INIT=16'h2367; CFG3 \i0lIo_1_0_0_.m13_2_1 ( .A(m13_1_0_wmux_0_Y), .B(m12), .C(m13_2_0), .Y(i0lIo) ); defparam \i0lIo_1_0_0_.m13_2_1 .INIT=8'hE2; CFG3 \I0lIo_4_0_.m51_2_1 ( .A(OlI11_5), .B(m51_2), .C(m51_2_0), .Y(I0lIo_0) ); defparam \I0lIo_4_0_.m51_2_1 .INIT=8'hE4; CFG3 \I0lIo_4_0_.m41_2_1 ( .A(OlI11_3), .B(m41_2), .C(m41_2_0_0), .Y(N_42) ); defparam \I0lIo_4_0_.m41_2_1 .INIT=8'hE4; // @28:537806 CFG4 \I0lIo_4_0_.m41_2_0 ( .A(N_5), .B(m41_1_0), .C(OlI11_i_0), .D(Oiio1_RNI7H0P9_0), .Y(m41_2_0_0) ); defparam \I0lIo_4_0_.m41_2_0 .INIT=16'hE2CC; // @28:537806 CFG3 \I0lIo_4_0_.m41_1_0 ( .A(Oiio1_RNI1B0P9_0), .B(N_12), .C(Oiio1_RNI7H0P9_0), .Y(m41_1_0) ); defparam \I0lIo_4_0_.m41_1_0 .INIT=8'hAC; // @28:537806 CFG3 \I0lIo_4_0_.m41_2 ( .A(i3_mux), .B(m41_1), .C(Oiio1_RNI7H0P9_0), .Y(m41_2) ); defparam \I0lIo_4_0_.m41_2 .INIT=8'hAC; // @28:537806 CFG4 \I0lIo_4_0_.m11_i ( .A(IOOi1), .B(OlI11_0), .C(Oiio1[2]), .D(Oiio1[12]), .Y(N_12_i) ); defparam \I0lIo_4_0_.m11_i .INIT=16'hFDEC; // @28:540010 CFG3 \IO0Io_2_0_0_.m10 ( .A(i5_mux_0), .B(OlI11_5), .C(m5_0), .Y(IO0Io) ); defparam \IO0Io_2_0_0_.m10 .INIT=8'hB2; // @28:541223 CFG3 \OO0Io_2_0_0_.i4_mux_i ( .A(i5_mux_0_0), .B(OlI11_5), .C(m5), .Y(OO0Io_1z) ); defparam \OO0Io_2_0_0_.i4_mux_i .INIT=8'h4D; // @28:539274 CFG4 I00o1_1_a6_1_1 ( .A(I00o1_1_a2_0), .B(N_7215_1), .C(OlI11_3), .D(OlI11_2), .Y(I00o1_1_a6_1_1_Z) ); defparam I00o1_1_a6_1_1.INIT=16'h8000; // @28:539833 CFG2 lilIo52_0 ( .A(oolIo_Z[2]), .B(oolIo[1]), .Y(lilIo52_0_Z) ); defparam lilIo52_0.INIT=4'h1; // @28:539905 CFG2 lilIo55_0 ( .A(oolIo_Z[2]), .B(oolIo[1]), .Y(lilIo55_0_Z) ); defparam lilIo55_0.INIT=4'h2; // @28:539857 CFG2 lilIo53_0_0 ( .A(oolIo_Z[2]), .B(oolIo[1]), .Y(lilIo53_0_0_Z) ); defparam lilIo53_0_0.INIT=4'h4; // @28:539783 CFG2 lilIo51 ( .A(lolIo_1z), .B(IilIo), .Y(lilIo51_1z) ); defparam lilIo51.INIT=4'h2; // @28:539929 CFG4 lilIo56_1 ( .A(oolIo_Z[2]), .B(oolIo[1]), .C(IilIo), .D(N_99_i), .Y(lilIo56_1_1z) ); defparam lilIo56_1.INIT=16'h0080; // @28:539783 CFG3 \oolIo_0_RNI9T465[1] ( .A(IilIo), .B(un1_lilIo56_i), .C(oolIo[1]), .Y(Il0o1[1]) ); defparam \oolIo_0_RNI9T465[1] .INIT=8'h80; // @28:537806 CFG4 \i0lIo_1_0_0_.m12 ( .A(IOOi1), .B(Oiio1_RNI1B0P9_0), .C(Oiio1[4]), .D(Oiio1[14]), .Y(m12) ); defparam \i0lIo_1_0_0_.m12 .INIT=16'hC693; // @28:537806 CFG2 \I0lIo_4_0_.m28_0 ( .A(Oiio1_RNI1B0P9_0), .B(Oiio1_RNI7H0P9_0), .Y(m28) ); defparam \I0lIo_4_0_.m28_0 .INIT=4'h8; // @28:539488 CFG4 \oolIo_i_a4_1_0[0] ( .A(IOOi1), .B(OlI11_0), .C(Oiio1[3]), .D(Oiio1[13]), .Y(oolIo_i_a4_1_0_Z[0]) ); defparam \oolIo_i_a4_1_0[0] .INIT=16'hC480; // @28:539753 CFG4 IilIo_1_RNO_0 ( .A(IOOi1), .B(OlI11_9), .C(Oiio1[5]), .D(Oiio1[15]), .Y(d_m3_0) ); defparam IilIo_1_RNO_0.INIT=16'hC480; // @28:539833 CFG4 lilIo52 ( .A(IilIo), .B(N_99_i), .C(lolIo_1z), .D(lilIo52_0_Z), .Y(lilIo52_1z) ); defparam lilIo52.INIT=16'h0800; // @28:539929 CFG2 lilIo56 ( .A(lilIo56_1_1z), .B(lolIo_1z), .Y(lilIo56_1z) ); defparam lilIo56.INIT=4'h2; // @28:539905 CFG4 lilIo55 ( .A(IilIo), .B(N_99_i), .C(lolIo_1z), .D(lilIo55_0_Z), .Y(lilIo55_1z) ); defparam lilIo55.INIT=16'h0800; // @28:539783 CFG4 \O00o1_f0[2] ( .A(IilIo), .B(oolIo_Z[2]), .C(un1_lilIo56_i), .D(lolIo_1z), .Y(Il0o1[2]) ); defparam \O00o1_f0[2] .INIT=16'hD080; // @28:537806 CFG4 \O1lIo_1_0_.m6_0 ( .A(IOOi1), .B(Oiio1_RNI7H0P9_0), .C(Oiio1[5]), .D(Oiio1[15]), .Y(N_7211_2) ); defparam \O1lIo_1_0_.m6_0 .INIT=16'h084C; // @28:539881 CFG4 lilIo54 ( .A(IilIo), .B(N_99_i), .C(lolIo_1z), .D(lilIo53_0_0_Z), .Y(lilIo54_1z) ); defparam lilIo54.INIT=16'h0200; // @28:539857 CFG4 lilIo53 ( .A(IilIo), .B(N_99_i), .C(lolIo_1z), .D(lilIo53_0_0_Z), .Y(lilIo53_1z) ); defparam lilIo53.INIT=16'h0800; // @28:539488 CFG4 \oolIo_i_a2_9[0] ( .A(IOOi1), .B(Oiio1_RNI7H0P9_0), .C(Oiio1[6]), .D(Oiio1[16]), .Y(N_137) ); defparam \oolIo_i_a2_9[0] .INIT=16'h3120; // @28:537806 CFG2 \I0lIo_4_0_.m60 ( .A(OlI11_3), .B(OlI11_5), .Y(N_66) ); defparam \I0lIo_4_0_.m60 .INIT=4'h6; // @28:539274 CFG4 I00o1_1_a2_17 ( .A(IOOi1), .B(Oiio1_RNI7H0P9_0), .C(Oiio1[5]), .D(Oiio1[15]), .Y(N_7215_1) ); defparam I00o1_1_a2_17.INIT=16'h3120; // @28:538799 CFG4 \OolIo_2_0_.m6_1 ( .A(Oiio1[17]), .B(Oiio1[7]), .C(N_147_i), .D(IOOi1), .Y(un8_l00o1_2) ); defparam \OolIo_2_0_.m6_1 .INIT=16'hC0A0; // @28:540956 CFG4 \lO0Io.m3 ( .A(Oiio1[19]), .B(Oiio1[9]), .C(N_147_i), .D(IOOi1), .Y(N_7) ); defparam \lO0Io.m3 .INIT=16'h3C5A; // @28:537806 CFG4 \o0lIo_1_0_.m10 ( .A(IOOi1), .B(Oiio1_RNI7H0P9_0), .C(Oiio1[5]), .D(Oiio1[15]), .Y(N_24_0) ); defparam \o0lIo_1_0_.m10 .INIT=16'hC693; // @28:539274 CFG4 I00o1_1_a2_14 ( .A(IOOi1), .B(OlI11_2), .C(Oiio1[3]), .D(Oiio1[13]), .Y(un8_l00o1_3) ); defparam I00o1_1_a2_14.INIT=16'h0213; // @28:539488 CFG4 \iolIo_1_0_.m7 ( .A(IOOi1), .B(Oiio1_RNI1B0P9_0), .C(Oiio1[0]), .D(Oiio1[10]), .Y(N_7211_1) ); defparam \iolIo_1_0_.m7 .INIT=16'h084C; // @28:539488 CFG4 \iolIo_1_0_.m6 ( .A(IOOi1), .B(Oiio1_RNI1B0P9_0), .C(Oiio1[0]), .D(Oiio1[10]), .Y(i3_mux) ); defparam \iolIo_1_0_.m6 .INIT=16'hC693; // @28:537806 CFG4 \I0lIo_4_0_.m23 ( .A(IOOi1), .B(OlI11_0), .C(Oiio1[2]), .D(Oiio1[12]), .Y(N_24) ); defparam \I0lIo_4_0_.m23 .INIT=16'h396C; // @28:537806 CFG2 \I0lIo_4_0_.m34_e ( .A(Oiio1_RNI1B0P9_0), .B(OlI11_3), .Y(N_65) ); defparam \I0lIo_4_0_.m34_e .INIT=4'h4; // @28:537806 CFG4 \I0lIo_4_0_.m13 ( .A(IOOi1), .B(OlI11_0), .C(Oiio1[2]), .D(Oiio1[12]), .Y(N_14) ); defparam \I0lIo_4_0_.m13 .INIT=16'h3120; // @28:537806 CFG4 \I0lIo_4_0_.m11 ( .A(IOOi1), .B(OlI11_0), .C(Oiio1[2]), .D(Oiio1[12]), .Y(N_12) ); defparam \I0lIo_4_0_.m11 .INIT=16'h0213; // @28:537806 CFG2 \I0lIo_4_0_.m4 ( .A(OlI11_2), .B(OlI11_0), .Y(N_5) ); defparam \I0lIo_4_0_.m4 .INIT=4'h4; // @28:537806 CFG4 \I0lIo_4_0_.m1 ( .A(IOOi1), .B(OlI11_0), .C(Oiio1[2]), .D(Oiio1[12]), .Y(N_2_i) ); defparam \I0lIo_4_0_.m1 .INIT=16'hC480; // @28:503491 CFG3 O00o1_N_3_mux_i ( .A(IilIo), .B(un1_lilIo56_i), .C(N_99_i), .Y(O00o1_N_3_mux_i_1z) ); defparam O00o1_N_3_mux_i.INIT=8'h7F; // @28:537806 CFG4 \I0lIo_4_0_.N_2_i_i ( .A(IOOi1), .B(OlI11_0), .C(Oiio1[2]), .D(Oiio1[12]), .Y(N_2_i_i) ); defparam \I0lIo_4_0_.N_2_i_i .INIT=16'h3B7F; // @28:539783 CFG3 un1_lilIo56_0_0 ( .A(lilIo56_1_1z), .B(IilIo), .C(lolIo_1z), .Y(un1_lilIo56_0) ); defparam un1_lilIo56_0_0.INIT=8'h3B; // @28:539488 CFG4 \oolIo_0_a4_0_1[2] ( .A(OlI11_3), .B(OlI11_0), .C(Oiio1_RNI1B0P9_0), .D(OlI11_2), .Y(oolIo_0_a4_0_1_Z[2]) ); defparam \oolIo_0_a4_0_1[2] .INIT=16'h0200; // @28:539488 CFG4 \oolIo_i_a4_0_1[0] ( .A(OlI11_3), .B(OlI11_0), .C(Oiio1_RNI1B0P9_0), .D(OlI11_2), .Y(oolIo_i_a4_0_1_Z[0]) ); defparam \oolIo_i_a4_0_1[0] .INIT=16'h1001; // @28:539274 CFG2 I00o1_1_a6_2_0 ( .A(N_7211_2), .B(lI0o1_0), .Y(I00o1_1_a6_2_0_Z) ); defparam I00o1_1_a6_2_0.INIT=4'h8; // @28:538799 CFG4 \OolIo_2_0_.m3 ( .A(N_147_i), .B(OlI11_9), .C(OlI11_6), .D(OlI11_7), .Y(OolIo[0]) ); defparam \OolIo_2_0_.m3 .INIT=16'h0010; // @28:540010 CFG3 \OO0Io_2_0_0_.m2 ( .A(OlI11_2), .B(Oiio1_RNI1B0P9_0), .C(OlI11_0), .Y(m2) ); defparam \OO0Io_2_0_0_.m2 .INIT=8'h20; // @28:540010 CFG3 \IO0Io_2_0_0_.m4 ( .A(OlI11_2), .B(Oiio1_RNI1B0P9_0), .C(OlI11_0), .Y(m4) ); defparam \IO0Io_2_0_0_.m4 .INIT=8'h04; // @28:537806 CFG3 \i0lIo_1_0_0_.m10 ( .A(OlI11_2), .B(OlI11_0), .C(OlI11_3), .Y(N_11_i) ); defparam \i0lIo_1_0_0_.m10 .INIT=8'h80; // @28:537806 CFG3 \i0lIo_1_0_0_.m4 ( .A(OlI11_2), .B(OlI11_0), .C(OlI11_3), .Y(m4_1) ); defparam \i0lIo_1_0_0_.m4 .INIT=8'h01; // @28:539274 CFG4 I00o1_1_a2_1_0 ( .A(OlI11_9), .B(OlI11_7), .C(Oiio1_RNI1B0P9_0), .D(OlI11_0), .Y(I00o1_1_a2_1) ); defparam I00o1_1_a2_1_0.INIT=16'h0010; // @28:539274 CFG3 I00o1_1_a2_0_3 ( .A(OlI11_6), .B(N_147_i), .C(lI0o1_0), .Y(I00o1_1_a2_0) ); defparam I00o1_1_a2_0_3.INIT=8'h08; // @28:539274 CFG4 I00o1_1_a2_0_1 ( .A(OlI11_9), .B(OlI11_7), .C(Oiio1_RNI1B0P9_0), .D(OlI11_0), .Y(I00o1_1_a2_0_1_Z) ); defparam I00o1_1_a2_0_1.INIT=16'h0800; // @28:539274 CFG3 I00o1_1_a2_0_0 ( .A(OlI11_6), .B(N_147_i), .C(lI0o1_0), .Y(I00o1_1_a2_0_0_Z) ); defparam I00o1_1_a2_0_0.INIT=8'h10; CFG2 lilIo52_RNIDMMEA ( .A(lilIo52_1z), .B(lilIo53_1z), .Y(lilIo52_RNIDMMEA_1z) ); defparam lilIo52_RNIDMMEA.INIT=4'hE; // @28:539488 CFG3 \oolIo_i_a2_6[0] ( .A(OlI11_7), .B(Oiio1_RNI7H0P9_0), .C(OlI11_6), .Y(N_142) ); defparam \oolIo_i_a2_6[0] .INIT=8'h10; // @28:539488 CFG3 \oolIo_i_a2_5[0] ( .A(OlI11_7), .B(Oiio1_RNI7H0P9_0), .C(OlI11_6), .Y(N_141) ); defparam \oolIo_i_a2_5[0] .INIT=8'h08; // @28:539488 CFG3 \oolIo_0_a2_2[1] ( .A(OlI11_3), .B(Oiio1_RNI1B0P9_0), .C(OlI11_0), .Y(N_146) ); defparam \oolIo_0_a2_2[1] .INIT=8'h10; // @28:537806 CFG4 \o0lIo_1_0_.m15 ( .A(OlI11_3), .B(OlI11_0), .C(Oiio1_RNI1B0P9_0), .D(OlI11_2), .Y(N_31) ); defparam \o0lIo_1_0_.m15 .INIT=16'h9669; // @28:538799 CFG4 \OolIo_2_0_.m10 ( .A(N_147_i), .B(OlI11_9), .C(OlI11_6), .D(OlI11_7), .Y(OolIo[2]) ); defparam \OolIo_2_0_.m10 .INIT=16'h2814; // @28:538799 CFG3 \OolIo_2_0_.m6 ( .A(N_147_i), .B(OlI11_9), .C(OlI11_7), .Y(OolIo[1]) ); defparam \OolIo_2_0_.m6 .INIT=8'h80; // @28:539783 CFG2 un1_lilIo56_2 ( .A(lilIo54_1z), .B(lilIo55_1z), .Y(un1_lilIo56_i_2) ); defparam un1_lilIo56_2.INIT=4'hE; // @28:537806 CFG2 \I0lIo_4_0_.m18 ( .A(N_2_i), .B(Oiio1_RNI7H0P9_0), .Y(N_19) ); defparam \I0lIo_4_0_.m18 .INIT=4'h8; // @28:540010 CFG3 \IO0Io_2_0_0_.m3 ( .A(OlI11_2), .B(Oiio1_RNI1B0P9_0), .C(OlI11_0), .Y(m3) ); defparam \IO0Io_2_0_0_.m3 .INIT=8'h4D; // @28:537806 CFG3 \i0lIo_1_0_0_.m7 ( .A(OlI11_2), .B(OlI11_0), .C(OlI11_3), .Y(m7_0) ); defparam \i0lIo_1_0_0_.m7 .INIT=8'h68; // @28:537806 CFG3 \i0lIo_1_0_0_.m3 ( .A(OlI11_2), .B(OlI11_0), .C(OlI11_3), .Y(m3_0) ); defparam \i0lIo_1_0_0_.m3 .INIT=8'h16; // @28:538799 CFG4 \I1lIo_2_0_.m5 ( .A(N_147_i), .B(OlI11_9), .C(OlI11_6), .D(OlI11_7), .Y(I1lIo[1]) ); defparam \I1lIo_2_0_.m5 .INIT=16'h3E1C; // @28:537806 CFG3 \o0lIo_1_0_.m4 ( .A(OlI11_2), .B(Oiio1_RNI1B0P9_0), .C(OlI11_0), .Y(N_5_0) ); defparam \o0lIo_1_0_.m4 .INIT=8'h49; // @28:540956 CFG4 \lO0Io.m4 ( .A(N_147_i), .B(OlI11_9), .C(OlI11_6), .D(OlI11_7), .Y(i2_mux_0) ); defparam \lO0Io.m4 .INIT=16'h1777; // @28:537806 CFG3 \O1lIo_1_0_.m3 ( .A(OlI11_2), .B(Oiio1_RNI1B0P9_0), .C(OlI11_0), .Y(N_4) ); defparam \O1lIo_1_0_.m3 .INIT=8'h92; // @28:538799 CFG4 \I1lIo_2_0_.m3 ( .A(N_147_i), .B(OlI11_9), .C(OlI11_6), .D(OlI11_7), .Y(I1lIo_0) ); defparam \I1lIo_2_0_.m3 .INIT=16'h387C; // @28:539783 CFG4 lilIo51_RNIP1IIG6 ( .A(N_65_mux), .B(lilIo51_1z), .C(OlI11_5), .D(N_42), .Y(I0lIo_m_2) ); defparam lilIo51_RNIP1IIG6.INIT=16'hC808; // @28:537806 CFG3 \I0lIo_4_0_.m28 ( .A(m28), .B(N_24), .C(N_12), .Y(N_29) ); defparam \I0lIo_4_0_.m28 .INIT=8'h72; // @28:537806 CFG3 \I0lIo_4_0_.m24 ( .A(Oiio1_RNI7H0P9_0), .B(OlI11_0), .C(OlI11_2), .Y(N_25) ); defparam \I0lIo_4_0_.m24 .INIT=8'h97; // @28:537806 CFG3 \o0lIo_1_0_.m8_0_1 ( .A(OlI11_3), .B(OlI11_2), .C(i3_mux), .Y(m8_1_0) ); defparam \o0lIo_1_0_.m8_0_1 .INIT=8'h40; // @28:537806 CFG2 \I0lIo_4_0_.N_20_i ( .A(N_2_i), .B(Oiio1_RNI7H0P9_0), .Y(N_20_i) ); defparam \I0lIo_4_0_.N_20_i .INIT=4'hB; // @28:539783 CFG4 \lliO1_1_iv_1[1] ( .A(I0lIo[1]), .B(lilIo51_1z), .C(lilIo52_1z), .D(lilIo56_1z), .Y(lliO1_1_iv_1_0) ); defparam \lliO1_1_iv_1[1] .INIT=16'hFFF8; // @28:539274 CFG3 I00o1_1_a6_0_1 ( .A(un8_l00o1_3), .B(I00o1_1_a2_0_0_Z), .C(N_7211_2), .Y(I00o1_1_a6_0_1_Z) ); defparam I00o1_1_a6_0_1.INIT=8'h80; // @28:539488 CFG4 \oolIo_i_a2_2_0[0] ( .A(OlI11_2), .B(N_7211_1), .C(OlI11_5), .D(OlI11_3), .Y(oolIo_i_a2_2_Z[0]) ); defparam \oolIo_i_a2_2_0[0] .INIT=16'h8000; // @28:539488 CFG4 \oolIo_i_a2_1[0] ( .A(OlI11_5), .B(N_147_i), .C(OlI11_9), .D(N_141), .Y(N_149) ); defparam \oolIo_i_a2_1[0] .INIT=16'h8000; // @28:539488 CFG4 \iolIo_1_0_.m23 ( .A(OlI11_2), .B(N_7211_1), .C(OlI11_5), .D(OlI11_3), .Y(N_36_mux) ); defparam \iolIo_1_0_.m23 .INIT=16'h8000; // @28:539488 CFG4 \iolIo_1_0_.m4 ( .A(OlI11_5), .B(OlI11_3), .C(OlI11_2), .D(un8_l00o1_1), .Y(d_m5_0_1) ); defparam \iolIo_1_0_.m4 .INIT=16'h0100; // @28:539488 CFG4 \oolIo_i_a2_2[0] ( .A(OlI11_5), .B(N_147_i), .C(OlI11_9), .D(N_142), .Y(N_150) ); defparam \oolIo_i_a2_2[0] .INIT=16'h0100; // @28:539274 CFG4 I00o1_1_o6_0 ( .A(OlI11_3), .B(OlI11_2), .C(OlI11_6), .D(N_147_i), .Y(N_279) ); defparam I00o1_1_o6_0.INIT=16'h6880; // @28:539274 CFG4 I00o1_1_o6_1 ( .A(OlI11_3), .B(OlI11_2), .C(OlI11_6), .D(N_147_i), .Y(N_280) ); defparam I00o1_1_o6_1.INIT=16'h0116; // @28:540956 CFG4 oO0Io_0 ( .A(N_147_i), .B(OlI11_9), .C(OlI11_6), .D(OlI11_7), .Y(oO0Io) ); defparam oO0Io_0.INIT=16'h1117; // @28:537806 CFG3 \O1lIo_1_0_.m6 ( .A(N_4), .B(N_7211_2), .C(OlI11_3), .Y(O1lIo[0]) ); defparam \O1lIo_1_0_.m6 .INIT=8'h80; // @28:539753 CFG4 IilIo_1_RNO_1 ( .A(OlI11_3), .B(OlI11_0), .C(Oiio1_RNI1B0P9_0), .D(OlI11_2), .Y(IilIo_1_RNO_1_Z) ); defparam IilIo_1_RNO_1.INIT=16'hEF9E; // @28:539488 CFG4 \iolIo_1_0_.m10 ( .A(OlI11_3), .B(OlI11_0), .C(Oiio1_RNI1B0P9_0), .D(OlI11_2), .Y(i2_mux) ); defparam \iolIo_1_0_.m10 .INIT=16'h1061; // @28:538799 CFG4 \l1lIo.m5 ( .A(N_147_i), .B(OlI11_9), .C(OlI11_6), .D(OlI11_7), .Y(l1lIo) ); defparam \l1lIo.m5 .INIT=16'h7FFE; // @28:539488 CFG4 \iolIo_1_0_.m19 ( .A(OlI11_3), .B(OlI11_0), .C(Oiio1_RNI1B0P9_0), .D(OlI11_2), .Y(i2_mux_0_0) ); defparam \iolIo_1_0_.m19 .INIT=16'h8608; // @28:537806 CFG4 \I0lIo_4_0_.m54 ( .A(Oiio1_RNI7H0P9_0), .B(Oiio1_RNI1B0P9_0), .C(N_2_i), .D(N_12), .Y(i2_mux_2) ); defparam \I0lIo_4_0_.m54 .INIT=16'h4051; // @28:537806 CFG4 \I0lIo_4_0_.m47_1_0 ( .A(Oiio1_RNI7H0P9_0), .B(Oiio1_RNI1B0P9_0), .C(N_5), .D(N_24), .Y(N_48_1) ); defparam \I0lIo_4_0_.m47_1_0 .INIT=16'h1032; // @28:537806 CFG4 \I0lIo_4_0_.m26_1_0 ( .A(Oiio1_RNI1B0P9_0), .B(Oiio1_RNI7H0P9_0), .C(N_12), .D(N_24), .Y(N_27_1) ); defparam \I0lIo_4_0_.m26_1_0 .INIT=16'h5410; // @28:537806 CFG4 \I0lIo_4_0_.m15_2_0 ( .A(OlI11_2), .B(Oiio1_RNI7H0P9_0), .C(N_14), .D(Oiio1_RNI1B0P9_0), .Y(i2_mux_0_2) ); defparam \I0lIo_4_0_.m15_2_0 .INIT=16'h44C0; // @28:537806 CFG2 \I0lIo_4_0_.m15_1_0 ( .A(N_12), .B(Oiio1_RNI7H0P9_0), .Y(i2_mux_0_1) ); defparam \I0lIo_4_0_.m15_1_0 .INIT=4'h2; // @28:539134 CFG4 lolIo_2 ( .A(N_7215_1), .B(un8_l00o1_1), .C(OlI11_3), .D(OlI11_2), .Y(lolIo_2_Z) ); defparam lolIo_2.INIT=16'h177F; // @28:539488 CFG4 \oolIo_i_a4_1[0] ( .A(OlI11_2), .B(Oiio1_RNI1B0P9_0), .C(oolIo_i_a4_1_0_Z[0]), .D(N_150), .Y(N_126) ); defparam \oolIo_i_a4_1[0] .INIT=16'h9000; // @28:539488 CFG4 \oolIo_i_a2_0[0] ( .A(OlI11_2), .B(OlI11_5), .C(N_146), .D(N_141), .Y(N_132) ); defparam \oolIo_i_a2_0[0] .INIT=16'h1000; // @28:539488 CFG4 \oolIo_0_a4[2] ( .A(OlI11_0), .B(Oiio1_RNI1B0P9_0), .C(un8_l00o1_3), .D(N_149), .Y(N_129) ); defparam \oolIo_0_a4[2] .INIT=16'h8000; // @28:539274 CFG4 I00o1_1_a6_3 ( .A(I00o1_1_a2_1), .B(N_7215_1), .C(lI0o1_0), .D(N_279), .Y(N_298) ); defparam I00o1_1_a6_3.INIT=16'h0800; // @28:539274 CFG4 I00o1_1_a2 ( .A(OlI11_2), .B(OlI11_3), .C(I00o1_1_a2_1), .D(I00o1_1_a2_0), .Y(N_299) ); defparam I00o1_1_a2.INIT=16'h8000; // @28:540010 CFG4 \OO0Io_2_0_0_.m5 ( .A(OlI11_3), .B(OlI11_0), .C(Oiio1_RNI1B0P9_0), .D(OlI11_2), .Y(m5) ); defparam \OO0Io_2_0_0_.m5 .INIT=16'h71F7; // @28:540010 CFG4 \IO0Io_2_0_0_.m5 ( .A(OlI11_3), .B(OlI11_0), .C(Oiio1_RNI1B0P9_0), .D(OlI11_2), .Y(m5_0) ); defparam \IO0Io_2_0_0_.m5 .INIT=16'h1071; // @28:539753 CFG4 IilIo_tz ( .A(IoIO1), .B(lI0o1_0), .C(OlI11_7), .D(N_137), .Y(IilIo_i_tz) ); defparam IilIo_tz.INIT=16'hD7DD; // @28:539274 CFG4 I00o1_1_o6_2 ( .A(OlI11_9), .B(OlI11_7), .C(Oiio1_RNI1B0P9_0), .D(OlI11_0), .Y(N_281) ); defparam I00o1_1_o6_2.INIT=16'h1061; // @28:539274 CFG4 I00o1_1_o6_3 ( .A(OlI11_9), .B(OlI11_7), .C(Oiio1_RNI1B0P9_0), .D(OlI11_0), .Y(N_282) ); defparam I00o1_1_o6_3.INIT=16'h8608; // @28:538799 CFG4 \I1lIo_2_0_.m11 ( .A(N_147_i), .B(OlI11_9), .C(OlI11_6), .D(OlI11_7), .Y(I1lIo_2) ); defparam \I1lIo_2_0_.m11 .INIT=16'h6A36; // @28:539783 CFG3 \lliO1_1_iv_0[6] ( .A(I1lIo[1]), .B(lilIo51_1z), .C(lilIo54_1z), .Y(lliO1_1_iv_0_0) ); defparam \lliO1_1_iv_0[6] .INIT=8'hF8; // @28:539488 CFG3 \iolIo_1_0_.m24 ( .A(OlI11_9), .B(i2_mux_0_0), .C(OlI11_5), .Y(i6_mux_1) ); defparam \iolIo_1_0_.m24 .INIT=8'h04; // @28:539252 CFG4 un37_lolIo ( .A(lI0o1_0), .B(N_147_i), .C(OlI11_9), .D(O1lIo[0]), .Y(un37_lolIo_Z) ); defparam un37_lolIo.INIT=16'h0200; // @28:537806 CFG4 \o0lIo_1_0_.m8_2_0 ( .A(OlI11_2), .B(N_7211_1), .C(OlI11_5), .D(OlI11_3), .Y(i5_mux_2) ); defparam \o0lIo_1_0_.m8_2_0 .INIT=16'h4000; // @28:537806 CFG4 \I0lIo_4_0_.m10 ( .A(OlI11_0), .B(Oiio1_RNI7H0P9_0), .C(Oiio1_RNI1B0P9_0), .D(OlI11_2), .Y(N_11) ); defparam \I0lIo_4_0_.m10 .INIT=16'hE02C; // @28:539274 CFG4 I00o1_1_0 ( .A(I00o1_1_a2_0_1_Z), .B(N_280), .C(N_298), .D(I00o1_1_a6_2_0_Z), .Y(I00o1_1_0_Z) ); defparam I00o1_1_0.INIT=16'hF8F0; // @28:539783 CFG4 un1_lilIo56 ( .A(lilIo52_1z), .B(un1_lilIo56_i_2), .C(un1_lilIo56_0), .D(lilIo53_1z), .Y(un1_lilIo56_i) ); defparam un1_lilIo56.INIT=16'hFFFE; // @28:540010 CFG4 \OO0Io_2_0_0_.m9 ( .A(Oiio1_RNI7H0P9_0), .B(OlI11_3), .C(m3), .D(m2), .Y(i5_mux_0_0) ); defparam \OO0Io_2_0_0_.m9 .INIT=16'h32BA; // @28:540010 CFG4 \IO0Io_2_0_0_.m9 ( .A(OlI11_3), .B(Oiio1_RNI7H0P9_0), .C(m3), .D(m4), .Y(i5_mux_0) ); defparam \IO0Io_2_0_0_.m9 .INIT=16'hD5C4; // @28:539274 CFG4 I00o1_1_o6 ( .A(I00o1_1_a2_0_0_Z), .B(I00o1_1_a2_0_1_Z), .C(N_299), .D(un8_l00o1_3), .Y(N_274) ); defparam I00o1_1_o6.INIT=16'hF8F0; // @28:537806 CFG4 \I0lIo_4_0_.m57 ( .A(m28), .B(OlI11_5), .C(i2_mux_2), .D(N_12), .Y(i5_mux) ); defparam \I0lIo_4_0_.m57 .INIT=16'hB830; // @28:537806 CFG4 \o0lIo_1_0_.m8_1_0 ( .A(OlI11_3), .B(OlI11_5), .C(m8_1_0), .D(N_5_0), .Y(i5_mux_1_0) ); defparam \o0lIo_1_0_.m8_1_0 .INIT=16'h3230; // @28:539230 CFG4 un28_lolIo ( .A(lI0o1_0), .B(OolIo[0]), .C(OolIo[2]), .D(O1lIo[0]), .Y(un28_lolIo_Z) ); defparam un28_lolIo.INIT=16'h1333; // @28:539274 CFG4 I00o1_1_1 ( .A(N_282), .B(N_281), .C(I00o1_1_a6_1_1_Z), .D(I00o1_1_a6_0_1_Z), .Y(I00o1_1_1_Z) ); defparam I00o1_1_1.INIT=16'hEAC0; // @28:539753 CFG4 IilIo_1_RNO ( .A(N_7), .B(d_m5_0_1), .C(d_m3_0), .D(IilIo_1_RNO_1_Z), .Y(IilIo_1_RNO_Z) ); defparam IilIo_1_RNO.INIT=16'h7727; // @28:539488 CFG4 \oolIo_i_a4[0] ( .A(N_132), .B(N_142), .C(oolIo_i_a2_2_Z[0]), .D(N_7), .Y(N_124) ); defparam \oolIo_i_a4[0] .INIT=16'hEA00; // @28:537806 CFG3 \I0lIo_4_0_.m47 ( .A(N_48_1), .B(Oiio1_RNI1B0P9_0), .C(N_25), .Y(N_48) ); defparam \I0lIo_4_0_.m47 .INIT=8'hAE; // @28:537806 CFG3 \I0lIo_4_0_.m26 ( .A(N_27_1), .B(Oiio1_RNI1B0P9_0), .C(N_25), .Y(N_27) ); defparam \I0lIo_4_0_.m26 .INIT=8'hAE; // @28:537806 CFG4 \I0lIo_4_0_.m16 ( .A(i2_mux_0_2), .B(i2_mux_0_1), .C(OlI11_3), .D(N_11), .Y(N_17) ); defparam \I0lIo_4_0_.m16 .INIT=16'hEFE0; // @28:539488 CFG4 \oolIo_i[0] ( .A(N_149), .B(oolIo_i_a4_0_1_Z[0]), .C(N_126), .D(N_124), .Y(N_99_i) ); defparam \oolIo_i[0] .INIT=16'hFFF8; // @28:539488 CFG4 \oolIo[2] ( .A(N_150), .B(oolIo_0_a4_0_1_Z[2]), .C(N_129), .D(N_124), .Y(oolIo_Z[2]) ); defparam \oolIo[2] .INIT=16'hFFF8; // @28:539488 CFG4 \iolIo_1_0_.m28 ( .A(i6_mux_1), .B(N_137), .C(N_36_mux), .D(N_7), .Y(N_40_mux) ); defparam \iolIo_1_0_.m28 .INIT=16'hC088; // @28:539274 CFG4 I00o1_1 ( .A(N_274), .B(N_24_0), .C(I00o1_1_1_Z), .D(I00o1_1_0_Z), .Y(ol0o1_0) ); defparam I00o1_1.INIT=16'hFFF8; // @28:539140 CFG4 un1_lolIo ( .A(N_24_0), .B(i5_mux_1), .C(lI0o1_0), .D(N_31), .Y(un1_lolIo_Z) ); defparam un1_lolIo.INIT=16'hE040; // @28:537806 CFG4 \o0lIo_1_0_.m11 ( .A(i2_mux), .B(N_24_0), .C(i5_mux_1_0), .D(i5_mux_2), .Y(o0lIo[0]) ); defparam \o0lIo_1_0_.m11 .INIT=16'hBBB8; // @28:539134 CFG4 lolIo_7 ( .A(un37_lolIo_Z), .B(un13_lolIo_Z), .C(lolIo_5_Z), .D(un28_lolIo_Z), .Y(lolIo_7_Z) ); defparam lolIo_7.INIT=16'hC080; // @28:539783 CFG4 lilIo51_RNI3DGUB5 ( .A(N_64_mux), .B(lilIo51_1z), .C(OlI11_5), .D(N_17), .Y(I0lIo_m_0) ); defparam lilIo51_RNI3DGUB5.INIT=16'hC808; // @28:539134 CFG4 lolIo ( .A(un12_lolIo_Z), .B(lolIo_7_Z), .C(un1_lolIo_Z), .D(o0lIo[0]), .Y(lolIo_1z) ); defparam lolIo.INIT=16'h4004; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_R10B8B_1 */ module CTSE_R10B8B_0 ( lliO1_0_iv_i_0, lliO1_0_iv_i_1, lliO1_0_iv_i_3, Ol0o1_3, Ol0o1_0, Ol0o1_2, Ol0o1_1, Ol0o1_6, i1Oi1_9, i1Oi1_5, i1Oi1_2, i1Oi1_0, i1Oi1_6, Oiio1_9, Oiio1_5, Oiio1_2, Oiio1_0, Oiio1_6, Il0o1, OlI11_0, OlI11_3, OlI11_2, OlI11_5, OlI11_6, OlI11_9, OlI11_7, lI0o1_0, OlI11_i_0, OlI11_i_2, IoIO1, IO0Io, N_5_i, oO0Io, O00o1_N_3_mux_i_1z, IOOi1, OO0Io_1z, N_146_i_0, N_146, N_24_i, N_145 ) ; output lliO1_0_iv_i_0 ; output lliO1_0_iv_i_1 ; output lliO1_0_iv_i_3 ; output Ol0o1_3 ; output Ol0o1_0 ; output Ol0o1_2 ; output Ol0o1_1 ; output Ol0o1_6 ; input i1Oi1_9 ; input i1Oi1_5 ; input i1Oi1_2 ; input i1Oi1_0 ; input i1Oi1_6 ; input Oiio1_9 ; input Oiio1_5 ; input Oiio1_2 ; input Oiio1_0 ; input Oiio1_6 ; output [5:4] Il0o1 ; input OlI11_0 ; input OlI11_3 ; input OlI11_2 ; input OlI11_5 ; input OlI11_6 ; input OlI11_9 ; input OlI11_7 ; input lI0o1_0 ; input OlI11_i_0 ; input OlI11_i_2 ; input IoIO1 ; output IO0Io ; output N_5_i ; output oO0Io ; output O00o1_N_3_mux_i_1z ; input IOOi1 ; output OO0Io_1z ; input N_146_i_0 ; input N_146 ; input N_24_i ; input N_145 ; wire lliO1_0_iv_i_0 ; wire lliO1_0_iv_i_1 ; wire lliO1_0_iv_i_3 ; wire Ol0o1_3 ; wire Ol0o1_0 ; wire Ol0o1_2 ; wire Ol0o1_1 ; wire Ol0o1_6 ; wire i1Oi1_9 ; wire i1Oi1_5 ; wire i1Oi1_2 ; wire i1Oi1_0 ; wire i1Oi1_6 ; wire Oiio1_9 ; wire Oiio1_5 ; wire Oiio1_2 ; wire Oiio1_0 ; wire Oiio1_6 ; wire OlI11_0 ; wire OlI11_3 ; wire OlI11_2 ; wire OlI11_5 ; wire OlI11_6 ; wire OlI11_9 ; wire OlI11_7 ; wire lI0o1_0 ; wire OlI11_i_0 ; wire OlI11_i_2 ; wire IoIO1 ; wire IO0Io ; wire N_5_i ; wire oO0Io ; wire O00o1_N_3_mux_i_1z ; wire IOOi1 ; wire OO0Io_1z ; wire N_146_i_0 ; wire N_146 ; wire N_24_i ; wire N_145 ; wire [4:1] I0lIo; wire [2:0] OolIo; wire [1:0] O1lIo; wire [1:1] oolIo_0_1_Z; wire [1:1] oolIo; wire [0:0] oolIo_i_0_1_Z; wire [0:0] oolIo_i_0_Z; wire [2:2] oolIo_0_0_1_Z; wire [2:2] oolIo_0; wire [2:2] oolIo_Z; wire [0:0] oolIo_i_a2_0; wire [1:1] lliO1_1_iv_1_tz_Z; wire [6:3] lliO1_1_iv_0_Z; wire [2:0] I1lIo; wire [0:0] oolIo_i_a2_0_0_0; wire [1:1] o0lIo; wire [0:0] o0lIo_2; wire [0:0] o0lIo_1; wire m13_1_0_0_co1 ; wire m13_1_0_0_wmux_0_S ; wire m13_1_0_0_wmux_0_Y ; wire m20_2_1 ; wire N_4_i ; wire m13_1_0_0_y0 ; wire m13_1_0_0_co0 ; wire m13_1_0_0_wmux_S ; wire m5_2 ; wire m7_1 ; wire VCC ; wire m29_1_0_0_co1 ; wire m29_1_0_0_wmux_0_S ; wire m29_1_0_0_wmux_0_Y ; wire N_85_mux ; wire N_84_mux ; wire m29_1_0_0_y0 ; wire m29_1_0_0_co0 ; wire m29_1_0_0_wmux_S ; wire m41_1_0_co1 ; wire m41_1_0_wmux_0_S ; wire m41_1_0_wmux_0_Y ; wire N_2_i ; wire m41_1_0_y0 ; wire m41_1_0_co0 ; wire m41_1_0_wmux_S ; wire N_11 ; wire N_84 ; wire m17_1_0_co1 ; wire m17_1_0_wmux_0_S ; wire m17_1_0_wmux_0_Y ; wire m17_1_0_y0 ; wire m17_1_0_co0 ; wire m17_1_0_wmux_S ; wire N_6 ; wire m55_1_0_co1 ; wire m55_1_0_wmux_0_S ; wire N_54 ; wire N_51 ; wire m55_1_0_y0 ; wire m55_1_0_co0 ; wire m55_1_0_wmux_S ; wire N_88_mux ; wire i2_mux_1 ; wire m65_1_0_co1 ; wire m65_1_0_wmux_0_S ; wire N_64 ; wire i2_mux ; wire m65_1_0_y0 ; wire m65_1_0_co0 ; wire m65_1_0_wmux_S ; wire N_60 ; wire N_57 ; wire m13_2 ; wire m17_2_0 ; wire IilIo_Z ; wire I0lIo_m1_e_0_0 ; wire lolIo_2_1_Z ; wire un12_lolIo_Z ; wire lolIo_2_Z ; wire N_2 ; wire un12_lolIo_1_Z ; wire i0lIo ; wire N_164 ; wire N_163 ; wire m17_2_0_1 ; wire N_16 ; wire m41_2_0_1 ; wire N_40 ; wire m41_2_0 ; wire m29_2_1 ; wire m29_2 ; wire m18 ; wire m75_2 ; wire m75_2_0 ; wire i5_mux_1 ; wire N_50 ; wire m75_1_0 ; wire m75_1 ; wire N_15 ; wire N_77 ; wire N_13_1 ; wire m8 ; wire N_113_i ; wire lilIo54_1_0_Z ; wire lliO1_m1_e_1 ; wire lilIo56_1_Z ; wire lilIo55_1_Z ; wire un1_N_3_mux_1_i ; wire lliO1_m2_Z ; wire un1_m3_i_0 ; wire lolIo_Z ; wire N_2_i_0 ; wire N_8 ; wire N_24 ; wire N_3 ; wire N_39 ; wire N_70 ; wire m6 ; wire m4_0 ; wire N_156 ; wire N_36_mux ; wire N_35_mux ; wire N_75 ; wire m14 ; wire l1lIo ; wire i2_mux_0 ; wire N_68_1 ; wire N_54_1 ; wire N_145_0 ; wire m7 ; wire m5_1 ; wire i6_mux_1 ; wire i6_mux ; wire N_116 ; wire i5_mux_0 ; wire i5_mux ; wire m20 ; wire m17 ; wire N_68 ; wire un28_lolIo_Z ; wire IO0Io_i_2 ; wire N_40_mux ; wire un27_lolIo_Z ; wire i5_mux_2 ; wire iolIo ; wire lolIo_0 ; wire un4_lolIo_Z ; wire N_7275 ; wire N_7274 ; wire N_7271 ; wire N_7270 ; wire GND ; // @28:537806 ARI1 \l0lIo_0_0_1_0_.m13_1_0_0_wmux_0 ( .FCO(m13_1_0_0_co1), .S(m13_1_0_0_wmux_0_S), .Y(m13_1_0_0_wmux_0_Y), .B(N_145), .C(m20_2_1), .D(N_4_i), .A(m13_1_0_0_y0), .FCI(m13_1_0_0_co0) ); defparam \l0lIo_0_0_1_0_.m13_1_0_0_wmux_0 .INIT=20'h0F588; // @28:537806 ARI1 \l0lIo_0_0_1_0_.m13_1_0_0_wmux ( .FCO(m13_1_0_0_co0), .S(m13_1_0_0_wmux_S), .Y(m13_1_0_0_y0), .B(N_145), .C(m5_2), .D(m7_1), .A(OlI11_0), .FCI(VCC) ); defparam \l0lIo_0_0_1_0_.m13_1_0_0_wmux .INIT=20'h0FA44; // @28:537806 ARI1 \o0lIo_6_0_.m29_1_0_0_wmux_0 ( .FCO(m29_1_0_0_co1), .S(m29_1_0_0_wmux_0_S), .Y(m29_1_0_0_wmux_0_Y), .B(OlI11_3), .C(N_85_mux), .D(N_84_mux), .A(m29_1_0_0_y0), .FCI(m29_1_0_0_co0) ); defparam \o0lIo_6_0_.m29_1_0_0_wmux_0 .INIT=20'h0F588; // @28:537806 ARI1 \o0lIo_6_0_.m29_1_0_0_wmux ( .FCO(m29_1_0_0_co0), .S(m29_1_0_0_wmux_S), .Y(m29_1_0_0_y0), .B(OlI11_3), .C(N_85_mux), .D(N_84_mux), .A(N_145), .FCI(VCC) ); defparam \o0lIo_6_0_.m29_1_0_0_wmux .INIT=20'h0FA44; // @28:537806 ARI1 \o0lIo_6_0_.m41_1_0_wmux_0 ( .FCO(m41_1_0_co1), .S(m41_1_0_wmux_0_S), .Y(m41_1_0_wmux_0_Y), .B(N_145), .C(N_2_i), .D(OlI11_i_0), .A(m41_1_0_y0), .FCI(m41_1_0_co0) ); defparam \o0lIo_6_0_.m41_1_0_wmux_0 .INIT=20'h0F588; // @28:537806 ARI1 \o0lIo_6_0_.m41_1_0_wmux ( .FCO(m41_1_0_co0), .S(m41_1_0_wmux_S), .Y(m41_1_0_y0), .B(N_145), .C(OlI11_2), .D(N_11), .A(N_84), .FCI(VCC) ); defparam \o0lIo_6_0_.m41_1_0_wmux .INIT=20'h0FA44; // @28:537806 ARI1 \o0lIo_6_0_.m17_1_0_wmux_0 ( .FCO(m17_1_0_co1), .S(m17_1_0_wmux_0_S), .Y(m17_1_0_wmux_0_Y), .B(N_145), .C(N_2_i), .D(OlI11_i_2), .A(m17_1_0_y0), .FCI(m17_1_0_co0) ); defparam \o0lIo_6_0_.m17_1_0_wmux_0 .INIT=20'h0F588; // @28:537806 ARI1 \o0lIo_6_0_.m17_1_0_wmux ( .FCO(m17_1_0_co0), .S(m17_1_0_wmux_S), .Y(m17_1_0_y0), .B(N_145), .C(OlI11_0), .D(N_6), .A(N_84), .FCI(VCC) ); defparam \o0lIo_6_0_.m17_1_0_wmux .INIT=20'h0FA44; // @28:537806 ARI1 \o0lIo_6_0_.m55_1_0_wmux_0 ( .FCO(m55_1_0_co1), .S(m55_1_0_wmux_0_S), .Y(I0lIo[3]), .B(OlI11_5), .C(N_54), .D(N_51), .A(m55_1_0_y0), .FCI(m55_1_0_co0) ); defparam \o0lIo_6_0_.m55_1_0_wmux_0 .INIT=20'h0F588; // @28:537806 ARI1 \o0lIo_6_0_.m55_1_0_wmux ( .FCO(m55_1_0_co0), .S(m55_1_0_wmux_S), .Y(m55_1_0_y0), .B(OlI11_5), .C(N_88_mux), .D(i2_mux_1), .A(N_145), .FCI(VCC) ); defparam \o0lIo_6_0_.m55_1_0_wmux .INIT=20'h0FA44; // @28:537806 ARI1 \o0lIo_6_0_.m65_1_0_wmux_0 ( .FCO(m65_1_0_co1), .S(m65_1_0_wmux_0_S), .Y(I0lIo[4]), .B(OlI11_5), .C(N_64), .D(i2_mux), .A(m65_1_0_y0), .FCI(m65_1_0_co0) ); defparam \o0lIo_6_0_.m65_1_0_wmux_0 .INIT=20'h0F588; // @28:537806 ARI1 \o0lIo_6_0_.m65_1_0_wmux ( .FCO(m65_1_0_co0), .S(m65_1_0_wmux_S), .Y(m65_1_0_y0), .B(OlI11_5), .C(N_60), .D(N_57), .A(N_145), .FCI(VCC) ); defparam \o0lIo_6_0_.m65_1_0_wmux .INIT=20'h0FA44; // @28:537806 CFG3 \l0lIo_0_0_1_0_.m13_2 ( .A(OlI11_0), .B(N_4_i), .C(m5_2), .Y(m13_2) ); defparam \l0lIo_0_0_1_0_.m13_2 .INIT=8'hE4; // @28:539783 CFG4 \lliO1_1_iv_RNO[0] ( .A(m17_2_0), .B(OlI11_5), .C(IilIo_Z), .D(m17_1_0_wmux_0_Y), .Y(I0lIo_m1_e_0_0) ); defparam \lliO1_1_iv_RNO[0] .INIT=16'h0B08; // @28:539134 CFG4 lolIo_2 ( .A(OolIo[1]), .B(lolIo_2_1_Z), .C(lI0o1_0), .D(un12_lolIo_Z), .Y(lolIo_2_Z) ); defparam lolIo_2.INIT=16'h0053; // @28:539134 CFG4 lolIo_2_1 ( .A(N_2), .B(O1lIo[1]), .C(OolIo[1]), .D(OolIo[2]), .Y(lolIo_2_1_Z) ); defparam lolIo_2_1.INIT=16'h7470; // @28:539167 CFG4 un12_lolIo ( .A(un12_lolIo_1_Z), .B(OlI11_6), .C(lI0o1_0), .D(i0lIo), .Y(un12_lolIo_Z) ); defparam un12_lolIo.INIT=16'h8228; // @28:539167 CFG4 un12_lolIo_1 ( .A(OlI11_9), .B(OlI11_6), .C(OlI11_7), .D(N_24_i), .Y(un12_lolIo_1_Z) ); defparam un12_lolIo_1.INIT=16'h4BD2; // @28:539488 CFG4 \oolIo_0[1] ( .A(OlI11_2), .B(oolIo_0_1_Z[1]), .C(N_164), .D(N_163), .Y(oolIo[1]) ); defparam \oolIo_0[1] .INIT=16'h6420; // @28:539488 CFG4 \oolIo_0_1[1] ( .A(N_146), .B(OlI11_0), .C(OlI11_3), .D(OlI11_2), .Y(oolIo_0_1_Z[1]) ); defparam \oolIo_0_1[1] .INIT=16'h6B29; // @28:539488 CFG4 \oolIo_i_0[0] ( .A(OlI11_3), .B(oolIo_i_0_1_Z[0]), .C(N_164), .D(N_163), .Y(oolIo_i_0_Z[0]) ); defparam \oolIo_i_0[0] .INIT=16'h6420; // @28:539488 CFG4 \oolIo_i_0_1[0] ( .A(N_146), .B(OlI11_0), .C(OlI11_3), .D(OlI11_2), .Y(oolIo_i_0_1_Z[0]) ); defparam \oolIo_i_0_1[0] .INIT=16'h72B1; // @28:539488 CFG4 \oolIo_0_0[2] ( .A(OlI11_3), .B(oolIo_0_0_1_Z[2]), .C(N_164), .D(N_163), .Y(oolIo_0[2]) ); defparam \oolIo_0_0[2] .INIT=16'hC480; // @28:539488 CFG4 \oolIo_0_0_1[2] ( .A(N_146), .B(OlI11_0), .C(OlI11_3), .D(OlI11_2), .Y(oolIo_0_0_1_Z[2]) ); defparam \oolIo_0_0_1[2] .INIT=16'h1008; // @28:537806 CFG3 \o0lIo_6_0_.m17_2_0 ( .A(N_145), .B(m17_2_0_1), .C(N_16), .Y(m17_2_0) ); defparam \o0lIo_6_0_.m17_2_0 .INIT=8'hD8; // @28:537806 CFG4 \o0lIo_6_0_.m17_2_0_1 ( .A(OlI11_3), .B(N_11), .C(N_146), .D(OlI11_2), .Y(m17_2_0_1) ); defparam \o0lIo_6_0_.m17_2_0_1 .INIT=16'h58AD; // @28:537806 CFG3 \o0lIo_6_0_.m41_2_0 ( .A(N_145), .B(m41_2_0_1), .C(N_40), .Y(m41_2_0) ); defparam \o0lIo_6_0_.m41_2_0 .INIT=8'hD8; // @28:537806 CFG4 \o0lIo_6_0_.m41_2_0_1 ( .A(OlI11_3), .B(N_6), .C(OlI11_0), .D(N_146), .Y(m41_2_0_1) ); defparam \o0lIo_6_0_.m41_2_0_1 .INIT=16'h5A8D; // @28:537806 CFG4 \o0lIo_6_0_.m29_2 ( .A(OlI11_3), .B(N_146_i_0), .C(N_2_i), .D(m29_2_1), .Y(m29_2) ); defparam \o0lIo_6_0_.m29_2 .INIT=16'h4E50; // @28:537806 CFG3 \o0lIo_6_0_.m29_2_1_0 ( .A(N_145), .B(N_146), .C(OlI11_3), .Y(m29_2_1) ); defparam \o0lIo_6_0_.m29_2_1_0 .INIT=8'h35; CFG3 \l0lIo_0_0_1_0_.m13_2_1 ( .A(m18), .B(m13_2), .C(m13_1_0_0_wmux_0_Y), .Y(i0lIo) ); defparam \l0lIo_0_0_1_0_.m13_2_1 .INIT=8'hE4; CFG3 \o0lIo_6_0_.m29_2_1 ( .A(OlI11_5), .B(m29_2), .C(m29_1_0_0_wmux_0_Y), .Y(I0lIo[1]) ); defparam \o0lIo_6_0_.m29_2_1 .INIT=8'hE4; CFG3 \o0lIo_6_0_.m41_2_1 ( .A(m41_1_0_wmux_0_Y), .B(OlI11_5), .C(m41_2_0), .Y(I0lIo[2]) ); defparam \o0lIo_6_0_.m41_2_1 .INIT=8'hE2; CFG3 \o0lIo_6_0_.m75_2_1 ( .A(N_145), .B(m75_2), .C(m75_2_0), .Y(i5_mux_1) ); defparam \o0lIo_6_0_.m75_2_1 .INIT=8'hE4; // @28:537806 CFG3 \o0lIo_6_0_.m75_2_0 ( .A(N_50), .B(m75_1_0), .C(OlI11_3), .Y(m75_2_0) ); defparam \o0lIo_6_0_.m75_2_0 .INIT=8'hAC; // @28:537806 CFG4 \o0lIo_6_0_.m75_1_0 ( .A(OlI11_3), .B(N_2_i), .C(N_146), .D(OlI11_2), .Y(m75_1_0) ); defparam \o0lIo_6_0_.m75_1_0 .INIT=16'hE5E0; // @28:537806 CFG4 \o0lIo_6_0_.m75_2 ( .A(m75_1), .B(N_15), .C(OlI11_i_2), .D(OlI11_3), .Y(m75_2) ); defparam \o0lIo_6_0_.m75_2 .INIT=16'hE4AA; // @28:537806 CFG3 \o0lIo_6_0_.m75_1 ( .A(OlI11_3), .B(N_77), .C(N_146), .Y(m75_1) ); defparam \o0lIo_6_0_.m75_1 .INIT=8'hE4; // @28:541223 CFG2 \OO0Io_0_0_1_0_.N_13_i ( .A(N_13_1), .B(m8), .Y(OO0Io_1z) ); defparam \OO0Io_0_0_1_0_.N_13_i .INIT=4'h1; // @28:539881 CFG4 lilIo54_1_0 ( .A(oolIo_Z[2]), .B(oolIo[1]), .C(IilIo_Z), .D(N_113_i), .Y(lilIo54_1_0_Z) ); defparam lilIo54_1_0.INIT=16'h0040; CFG3 \oolIo_i_RNITOT59[0] ( .A(oolIo_Z[2]), .B(N_113_i), .C(IilIo_Z), .Y(lliO1_m1_e_1) ); defparam \oolIo_i_RNITOT59[0] .INIT=8'h40; // @28:539929 CFG4 lilIo56_1 ( .A(oolIo_Z[2]), .B(oolIo[1]), .C(IilIo_Z), .D(N_113_i), .Y(lilIo56_1_Z) ); defparam lilIo56_1.INIT=16'h0080; // @28:539905 CFG4 lilIo55_1 ( .A(oolIo_Z[2]), .B(oolIo[1]), .C(IilIo_Z), .D(N_113_i), .Y(lilIo55_1_Z) ); defparam lilIo55_1.INIT=16'h2000; // @28:539783 CFG3 \oolIo_0_RNII9A0H[1] ( .A(IilIo_Z), .B(un1_N_3_mux_1_i), .C(oolIo[1]), .Y(Il0o1[4]) ); defparam \oolIo_0_RNII9A0H[1] .INIT=8'h80; // @28:539783 CFG3 lliO1_m2 ( .A(oolIo_Z[2]), .B(N_113_i), .C(oolIo[1]), .Y(lliO1_m2_Z) ); defparam lliO1_m2.INIT=8'h78; // @28:539783 CFG3 \oolIo_0_RNI1SM77[1] ( .A(oolIo_Z[2]), .B(N_113_i), .C(oolIo[1]), .Y(un1_m3_i_0) ); defparam \oolIo_0_RNI1SM77[1] .INIT=8'h83; // @28:538799 CFG4 \OolIo_2_0_.m6_0 ( .A(i1Oi1_9), .B(Oiio1_9), .C(N_24_i), .D(IOOi1), .Y(N_2) ); defparam \OolIo_2_0_.m6_0 .INIT=16'hC0A0; // @28:539783 CFG4 \O00o1_f0[2] ( .A(IilIo_Z), .B(oolIo_Z[2]), .C(un1_N_3_mux_1_i), .D(lolIo_Z), .Y(Il0o1[5]) ); defparam \O00o1_f0[2] .INIT=16'hD080; // @28:537806 CFG4 \l0lIo_0_0_1_0_.m18 ( .A(IOOi1), .B(N_145), .C(i1Oi1_5), .D(Oiio1_5), .Y(m18) ); defparam \l0lIo_0_0_1_0_.m18 .INIT=16'h369C; // @28:539488 CFG4 \iolIo_1_0_.m23_0 ( .A(IOOi1), .B(OlI11_5), .C(i1Oi1_2), .D(Oiio1_2), .Y(oolIo_i_a2_0[0]) ); defparam \iolIo_1_0_.m23_0 .INIT=16'hC840; // @28:539783 CFG4 \lliO1_1_iv_1_tz[1] ( .A(oolIo_Z[2]), .B(oolIo[1]), .C(IilIo_Z), .D(N_113_i), .Y(lliO1_1_iv_1_tz_Z[1]) ); defparam \lliO1_1_iv_1_tz[1] .INIT=16'h10C0; // @28:537806 CFG4 \o0lIo_6_0_.m1 ( .A(IOOi1), .B(OlI11_0), .C(i1Oi1_2), .D(Oiio1_2), .Y(N_2_i) ); defparam \o0lIo_6_0_.m1 .INIT=16'hC840; // @28:537806 CFG4 \o0lIo_6_0_.m5 ( .A(IOOi1), .B(OlI11_0), .C(i1Oi1_2), .D(Oiio1_2), .Y(N_6) ); defparam \o0lIo_6_0_.m5 .INIT=16'h048C; // @28:537806 CFG4 \o0lIo_6_0_.m10 ( .A(IOOi1), .B(OlI11_0), .C(i1Oi1_2), .D(Oiio1_2), .Y(N_11) ); defparam \o0lIo_6_0_.m10 .INIT=16'h3210; // @28:537806 CFG4 \o0lIo_6_0_.m14 ( .A(IOOi1), .B(OlI11_0), .C(i1Oi1_2), .D(Oiio1_2), .Y(N_15) ); defparam \o0lIo_6_0_.m14 .INIT=16'h0123; // @28:537806 CFG2 \o0lIo_6_0_.m25_e ( .A(OlI11_3), .B(N_146), .Y(N_84) ); defparam \o0lIo_6_0_.m25_e .INIT=4'h2; // @28:539488 CFG4 \iolIo_1_0_.m1 ( .A(IOOi1), .B(N_146), .C(i1Oi1_0), .D(Oiio1_0), .Y(N_2_i_0) ); defparam \iolIo_1_0_.m1 .INIT=16'h3210; // @28:539488 CFG4 \iolIo_1_0_.m7 ( .A(IOOi1), .B(N_146), .C(i1Oi1_0), .D(Oiio1_0), .Y(N_8) ); defparam \iolIo_1_0_.m7 .INIT=16'h048C; // @28:537806 CFG4 \o0lIo_6_0_.m48_i_o3 ( .A(IOOi1), .B(OlI11_0), .C(i1Oi1_2), .D(Oiio1_2), .Y(N_24) ); defparam \o0lIo_6_0_.m48_i_o3 .INIT=16'h369C; // @28:540956 CFG4 \oO0Io_1_0_.m2 ( .A(i1Oi1_9), .B(Oiio1_9), .C(N_24_i), .D(IOOi1), .Y(N_3) ); defparam \oO0Io_1_0_.m2 .INIT=16'h0305; // @28:539488 CFG4 \iolIo_1_0_.m15_e ( .A(IOOi1), .B(N_145), .C(Oiio1_6), .D(i1Oi1_6), .Y(N_39) ); defparam \iolIo_1_0_.m15_e .INIT=16'h084C; // @28:503491 CFG3 O00o1_N_3_mux_i ( .A(IilIo_Z), .B(un1_N_3_mux_1_i), .C(N_113_i), .Y(O00o1_N_3_mux_i_1z) ); defparam O00o1_N_3_mux_i.INIT=8'h7F; // @28:539783 CFG4 \lliO1_1_iv_0[3] ( .A(I0lIo[3]), .B(IilIo_Z), .C(lilIo55_1_Z), .D(lolIo_Z), .Y(lliO1_1_iv_0_Z[3]) ); defparam \lliO1_1_iv_0[3] .INIT=16'h22F0; // @28:537806 CFG4 \o0lIo_6_0_.m69 ( .A(N_146), .B(OlI11_0), .C(OlI11_3), .D(OlI11_2), .Y(N_70) ); defparam \o0lIo_6_0_.m69 .INIT=16'h0020; // @28:538799 CFG4 \OolIo_2_0_.m6 ( .A(OlI11_9), .B(OlI11_6), .C(OlI11_7), .D(N_24_i), .Y(OolIo[1]) ); defparam \OolIo_2_0_.m6 .INIT=16'h2000; // @28:538799 CFG4 \OolIo_2_0_.m3 ( .A(OlI11_9), .B(OlI11_6), .C(OlI11_7), .D(N_24_i), .Y(OolIo[0]) ); defparam \OolIo_2_0_.m3 .INIT=16'h0004; // @28:540010 CFG3 \OO0Io_0_0_1_0_.m6 ( .A(OlI11_3), .B(N_145), .C(OlI11_5), .Y(m6) ); defparam \OO0Io_0_0_1_0_.m6 .INIT=8'h20; // @28:540010 CFG3 \OO0Io_0_0_1_0_.m4 ( .A(OlI11_3), .B(N_145), .C(OlI11_5), .Y(m4_0) ); defparam \OO0Io_0_0_1_0_.m4 .INIT=8'h04; // @28:537806 CFG3 \l0lIo_0_0_1_0_.m10 ( .A(N_146), .B(OlI11_2), .C(OlI11_3), .Y(m20_2_1) ); defparam \l0lIo_0_0_1_0_.m10 .INIT=8'h40; // @28:537806 CFG3 \l0lIo_0_0_1_0_.m7 ( .A(N_146), .B(OlI11_2), .C(OlI11_3), .Y(m7_1) ); defparam \l0lIo_0_0_1_0_.m7 .INIT=8'h02; // @28:538799 CFG4 \OolIo_2_0_.m10 ( .A(OlI11_9), .B(OlI11_6), .C(OlI11_7), .D(N_24_i), .Y(OolIo[2]) ); defparam \OolIo_2_0_.m10 .INIT=16'h6006; // @28:539488 CFG3 \oolIo_i_a2_6[0] ( .A(OlI11_7), .B(N_145), .C(OlI11_6), .Y(N_156) ); defparam \oolIo_i_a2_6[0] .INIT=8'h10; // @28:503431 CFG4 lolIo_RNI4KONQ4 ( .A(I0lIo[4]), .B(IilIo_Z), .C(lolIo_Z), .D(un1_N_3_mux_1_i), .Y(lliO1_0_iv_i_0) ); defparam lolIo_RNI4KONQ4.INIT=16'hEC20; // @28:537806 CFG3 \l0lIo_0_0_1_0_.m5 ( .A(N_146), .B(OlI11_2), .C(OlI11_3), .Y(m5_2) ); defparam \l0lIo_0_0_1_0_.m5 .INIT=8'h29; // @28:538799 CFG4 \I1lIo_2_0_.m3 ( .A(OlI11_9), .B(OlI11_6), .C(OlI11_7), .D(N_24_i), .Y(I1lIo[0]) ); defparam \I1lIo_2_0_.m3 .INIT=16'h664E; // @28:537806 CFG3 \o0lIo_6_0_.m46 ( .A(OlI11_3), .B(N_84), .C(N_2_i), .Y(N_88_mux) ); defparam \o0lIo_6_0_.m46 .INIT=8'h2E; // @28:538799 CFG4 \I1lIo_2_0_.m5 ( .A(OlI11_9), .B(OlI11_6), .C(OlI11_7), .D(N_24_i), .Y(I1lIo[1]) ); defparam \I1lIo_2_0_.m5 .INIT=16'h7266; // @28:537806 CFG4 \o0lIo_6_0_.m27 ( .A(OlI11_3), .B(N_146), .C(N_2_i), .D(N_15), .Y(N_85_mux) ); defparam \o0lIo_6_0_.m27 .INIT=16'hFB40; // @28:537806 CFG4 \o0lIo_6_0_.m15 ( .A(OlI11_3), .B(N_15), .C(OlI11_0), .D(N_146), .Y(N_16) ); defparam \o0lIo_6_0_.m15 .INIT=16'hD888; // @28:537806 CFG4 \o0lIo_6_0_.m39 ( .A(OlI11_3), .B(N_15), .C(N_146), .D(OlI11_2), .Y(N_40) ); defparam \o0lIo_6_0_.m39 .INIT=16'hD888; // @28:537806 CFG3 \o0lIo_6_0_.m49 ( .A(N_146), .B(OlI11_2), .C(OlI11_0), .Y(N_50) ); defparam \o0lIo_6_0_.m49 .INIT=8'h29; // @28:537806 CFG3 \o0lIo_6_0_.m76 ( .A(N_146), .B(OlI11_2), .C(OlI11_0), .Y(N_77) ); defparam \o0lIo_6_0_.m76 .INIT=8'h94; // @28:540956 CFG4 \oO0Io_1_0_.m5 ( .A(OlI11_7), .B(OlI11_6), .C(N_2), .D(N_3), .Y(oO0Io) ); defparam \oO0Io_1_0_.m5 .INIT=16'hEF01; // @28:540956 CFG4 \oO0Io_1_0_.m4 ( .A(OlI11_7), .B(OlI11_6), .C(N_2), .D(N_3), .Y(N_5_i) ); defparam \oO0Io_1_0_.m4 .INIT=16'h8F07; // @28:539488 CFG4 \oolIo_i_a2_0_0[0] ( .A(OlI11_7), .B(OlI11_5), .C(OlI11_2), .D(N_39), .Y(oolIo_i_a2_0_0_0[0]) ); defparam \oolIo_i_a2_0_0[0] .INIT=16'h0200; // @28:539783 CFG4 \lliO1_1_iv[3] ( .A(lliO1_m1_e_1), .B(lliO1_1_iv_0_Z[3]), .C(lilIo56_1_Z), .D(lolIo_Z), .Y(Ol0o1_3) ); defparam \lliO1_1_iv[3] .INIT=16'hCCFE; // @28:539783 CFG4 \lliO1_1_iv[0] ( .A(lilIo54_1_0_Z), .B(I0lIo_m1_e_0_0), .C(lliO1_m1_e_1), .D(lolIo_Z), .Y(Ol0o1_0) ); defparam \lliO1_1_iv[0] .INIT=16'hCCFA; // @28:539488 CFG4 \iolIo_1_0_.m23 ( .A(OlI11_3), .B(oolIo_i_a2_0[0]), .C(OlI11_0), .D(N_146), .Y(N_36_mux) ); defparam \iolIo_1_0_.m23 .INIT=16'h0800; // @28:539488 CFG4 \iolIo_1_0_.m4 ( .A(OlI11_5), .B(OlI11_2), .C(OlI11_3), .D(N_2_i_0), .Y(N_35_mux) ); defparam \iolIo_1_0_.m4 .INIT=16'h0100; // @28:539488 CFG4 \oolIo_i_a2_1[0] ( .A(OlI11_7), .B(OlI11_5), .C(N_2), .D(N_39), .Y(N_163) ); defparam \oolIo_i_a2_1[0] .INIT=16'h8000; // @28:539488 CFG3 \oolIo_i_a2_2[0] ( .A(N_3), .B(OlI11_5), .C(N_156), .Y(N_164) ); defparam \oolIo_i_a2_2[0] .INIT=8'h20; // @28:539783 CFG4 \lliO1_1_iv[2] ( .A(I0lIo[2]), .B(lliO1_m2_Z), .C(IilIo_Z), .D(lolIo_Z), .Y(Ol0o1_2) ); defparam \lliO1_1_iv[2] .INIT=16'h0AC0; // @28:539783 CFG4 \lliO1_1_iv[1] ( .A(I0lIo[1]), .B(IilIo_Z), .C(lliO1_1_iv_1_tz_Z[1]), .D(lolIo_Z), .Y(Ol0o1_1) ); defparam \lliO1_1_iv[1] .INIT=16'h22F0; // @28:537806 CFG4 \o0lIo_6_0_.m74_0_a3 ( .A(N_146), .B(OlI11_0), .C(OlI11_3), .D(OlI11_2), .Y(N_75) ); defparam \o0lIo_6_0_.m74_0_a3 .INIT=16'h9669; CFG3 \l0lIo_0_0_1_0_.N_4_i ( .A(N_146), .B(OlI11_2), .C(OlI11_3), .Y(N_4_i) ); defparam \l0lIo_0_0_1_0_.N_4_i .INIT=8'h94; // @28:537806 CFG4 \O1lIo_1_0_.m6 ( .A(OlI11_5), .B(N_145), .C(N_77), .D(OlI11_3), .Y(O1lIo[0]) ); defparam \O1lIo_1_0_.m6 .INIT=16'h4000; // @28:537806 CFG4 \O1lIo_1_0_.m11 ( .A(OlI11_5), .B(N_145), .C(N_50), .D(OlI11_3), .Y(O1lIo[1]) ); defparam \O1lIo_1_0_.m11 .INIT=16'h0020; // @28:537806 CFG4 \l0lIo_0_0_1_0_.m14 ( .A(N_146), .B(OlI11_0), .C(OlI11_3), .D(OlI11_2), .Y(m14) ); defparam \l0lIo_0_0_1_0_.m14 .INIT=16'h4002; // @28:537806 CFG4 \o0lIo_6_0_.m25 ( .A(N_24), .B(OlI11_3), .C(N_84), .D(N_15), .Y(N_84_mux) ); defparam \o0lIo_6_0_.m25 .INIT=16'hF606; // @28:537806 CFG2 \o0lIo_6_0_.m56 ( .A(N_50), .B(OlI11_3), .Y(N_57) ); defparam \o0lIo_6_0_.m56 .INIT=4'h8; // @28:539488 CFG4 \iolIo_1_0_.m10 ( .A(N_146), .B(OlI11_0), .C(OlI11_3), .D(OlI11_2), .Y(i2_mux) ); defparam \iolIo_1_0_.m10 .INIT=16'h0229; // @28:537806 CFG4 \o0lIo_6_0_.m63 ( .A(OlI11_3), .B(N_146), .C(N_2_i), .D(N_15), .Y(N_64) ); defparam \o0lIo_6_0_.m63 .INIT=16'h0145; // @28:538799 CFG4 \l1lIo.m5 ( .A(OlI11_9), .B(OlI11_6), .C(OlI11_7), .D(N_24_i), .Y(l1lIo) ); defparam \l1lIo.m5 .INIT=16'h7FFE; // @28:539488 CFG4 \iolIo_1_0_.m19 ( .A(N_146), .B(OlI11_0), .C(OlI11_3), .D(OlI11_2), .Y(i2_mux_0) ); defparam \iolIo_1_0_.m19 .INIT=16'h9440; // @28:537806 CFG4 \o0lIo_6_0_.m67_1_0 ( .A(OlI11_3), .B(N_146), .C(N_2_i), .D(N_11), .Y(N_68_1) ); defparam \o0lIo_6_0_.m67_1_0 .INIT=16'h5140; // @28:537806 CFG4 \o0lIo_6_0_.m53_1_0 ( .A(OlI11_3), .B(N_146), .C(N_2_i), .D(N_6), .Y(N_54_1) ); defparam \o0lIo_6_0_.m53_1_0 .INIT=16'h5140; // @28:539488 CFG4 \oolIo_i_a2[0] ( .A(oolIo_i_a2_0[0]), .B(N_8), .C(OlI11_3), .D(N_156), .Y(N_145_0) ); defparam \oolIo_i_a2[0] .INIT=16'h8000; // @28:540010 CFG4 \OO0Io_0_0_1_0_.m7 ( .A(OlI11_0), .B(OlI11_3), .C(N_145), .D(OlI11_5), .Y(m7) ); defparam \OO0Io_0_0_1_0_.m7 .INIT=16'h71F7; // @28:540010 CFG4 \OO0Io_0_0_1_0_.m5 ( .A(OlI11_0), .B(OlI11_3), .C(N_145), .D(OlI11_5), .Y(m5_1) ); defparam \OO0Io_0_0_1_0_.m5 .INIT=16'h1071; // @28:538799 CFG4 \I1lIo_2_0_.m11 ( .A(OlI11_9), .B(OlI11_6), .C(OlI11_7), .D(N_24_i), .Y(I1lIo[2]) ); defparam \I1lIo_2_0_.m11 .INIT=16'h7586; // @28:537806 CFG4 \o0lIo_6_0_.m50 ( .A(N_146), .B(OlI11_0), .C(OlI11_3), .D(OlI11_2), .Y(N_51) ); defparam \o0lIo_6_0_.m50 .INIT=16'h2699; // @28:539783 CFG3 lolIo_RNISGOVC ( .A(lolIo_Z), .B(un1_m3_i_0), .C(IilIo_Z), .Y(un1_N_3_mux_1_i) ); defparam lolIo_RNISGOVC.INIT=8'h1F; // @28:539488 CFG3 \iolIo_1_0_.m24 ( .A(i2_mux_0), .B(N_24_i), .C(OlI11_5), .Y(i6_mux_1) ); defparam \iolIo_1_0_.m24 .INIT=8'h02; // @28:539488 CFG3 \iolIo_1_0_.m5 ( .A(i2_mux), .B(N_24_i), .C(OlI11_5), .Y(i6_mux) ); defparam \iolIo_1_0_.m5 .INIT=8'h80; // @28:537806 CFG4 \o0lIo_6_0_.m80 ( .A(N_145), .B(OlI11_5), .C(N_75), .D(i5_mux_1), .Y(o0lIo[1]) ); defparam \o0lIo_6_0_.m80 .INIT=16'hF690; // @28:539488 CFG4 \oolIo_i_o4[0] ( .A(N_2_i_0), .B(OlI11_3), .C(oolIo_i_a2_0_0_0[0]), .D(N_145_0), .Y(N_116) ); defparam \oolIo_i_o4[0] .INIT=16'hFF20; // @28:539783 CFG4 \lliO1_1_iv_0[6] ( .A(I1lIo[1]), .B(IilIo_Z), .C(lilIo54_1_0_Z), .D(lolIo_Z), .Y(lliO1_1_iv_0_Z[6]) ); defparam \lliO1_1_iv_0[6] .INIT=16'h22F0; // @28:540010 CFG3 \OO0Io_0_0_1_0_.m8 ( .A(N_146), .B(m7), .C(m5_1), .Y(m8) ); defparam \OO0Io_0_0_1_0_.m8 .INIT=8'hD8; // @28:537806 CFG4 \o0lIo_6_0_.m53 ( .A(N_146), .B(OlI11_3), .C(N_15), .D(N_54_1), .Y(N_54) ); defparam \o0lIo_6_0_.m53 .INIT=16'hFF40; // @28:537806 CFG4 \o0lIo_6_0_.m44 ( .A(OlI11_3), .B(N_2_i), .C(N_146), .D(OlI11_2), .Y(i2_mux_1) ); defparam \o0lIo_6_0_.m44 .INIT=16'hE242; // @28:539488 CFG4 \iolIo_1_0_.m26 ( .A(N_36_mux), .B(i6_mux_1), .C(OlI11_9), .D(N_24_i), .Y(i5_mux_0) ); defparam \iolIo_1_0_.m26 .INIT=16'hCAAC; // @28:539488 CFG4 \iolIo_1_0_.m13 ( .A(N_35_mux), .B(i6_mux), .C(OlI11_9), .D(N_24_i), .Y(i5_mux) ); defparam \iolIo_1_0_.m13 .INIT=16'hCAAC; // @28:537806 CFG3 \o0lIo_6_0_.m71_2_0 ( .A(OlI11_5), .B(i2_mux), .C(N_145), .Y(o0lIo_2[0]) ); defparam \o0lIo_6_0_.m71_2_0 .INIT=8'h84; // @28:537806 CFG4 \l0lIo_0_0_1_0_.m20 ( .A(N_146), .B(OlI11_0), .C(OlI11_3), .D(OlI11_2), .Y(m20) ); defparam \l0lIo_0_0_1_0_.m20 .INIT=16'h422F; // @28:537806 CFG4 \l0lIo_0_0_1_0_.m17 ( .A(N_146), .B(OlI11_0), .C(OlI11_3), .D(OlI11_2), .Y(m17) ); defparam \l0lIo_0_0_1_0_.m17 .INIT=16'h0BBD; // @28:537806 CFG3 \o0lIo_6_0_.m67 ( .A(N_68_1), .B(OlI11_3), .C(N_50), .Y(N_68) ); defparam \o0lIo_6_0_.m67 .INIT=8'hEA; // @28:537806 CFG4 \o0lIo_6_0_.m59 ( .A(OlI11_3), .B(N_146), .C(N_2_i), .D(N_15), .Y(N_60) ); defparam \o0lIo_6_0_.m59 .INIT=16'h42DB; // @28:539783 CFG4 \lliO1_1_iv[6] ( .A(lliO1_m1_e_1), .B(lliO1_1_iv_0_Z[6]), .C(lilIo56_1_Z), .D(lolIo_Z), .Y(Ol0o1_6) ); defparam \lliO1_1_iv[6] .INIT=16'hCCFE; // @28:539230 CFG4 un28_lolIo ( .A(O1lIo[0]), .B(lI0o1_0), .C(OolIo[0]), .D(OolIo[2]), .Y(un28_lolIo_Z) ); defparam un28_lolIo.INIT=16'h070F; // @28:503431 CFG4 lolIo_RNI8EFAU ( .A(I1lIo[0]), .B(IilIo_Z), .C(lolIo_Z), .D(un1_N_3_mux_1_i), .Y(lliO1_0_iv_i_1) ); defparam lolIo_RNI8EFAU.INIT=16'hEC20; // @28:540010 CFG4 \OO0Io_0_0_1_0_.m12_1_0 ( .A(N_146), .B(OlI11_2), .C(m6), .D(m7), .Y(N_13_1) ); defparam \OO0Io_0_0_1_0_.m12_1_0 .INIT=16'h1302; // @28:540010 CFG4 \OO0Io_0_0_1_0_.m10_2_0 ( .A(N_146), .B(OlI11_2), .C(m4_0), .D(m5_1), .Y(IO0Io_i_2) ); defparam \OO0Io_0_0_1_0_.m10_2_0 .INIT=16'hC840; // @28:539488 CFG4 \oolIo[2] ( .A(N_116), .B(oolIo_0[2]), .C(OlI11_9), .D(N_24_i), .Y(oolIo_Z[2]) ); defparam \oolIo[2] .INIT=16'hCEEC; // @28:539488 CFG4 \oolIo_i[0] ( .A(N_116), .B(oolIo_i_0_Z[0]), .C(OlI11_9), .D(N_24_i), .Y(N_113_i) ); defparam \oolIo_i[0] .INIT=16'hCEEC; // @28:539488 CFG3 \iolIo_1_0_.m28 ( .A(OlI11_6), .B(N_145), .C(i5_mux_0), .Y(N_40_mux) ); defparam \iolIo_1_0_.m28 .INIT=8'h20; // @28:539230 CFG4 un27_lolIo ( .A(O1lIo[0]), .B(N_3), .C(lI0o1_0), .D(un28_lolIo_Z), .Y(un27_lolIo_Z) ); defparam un27_lolIo.INIT=16'hFF80; // @28:537806 CFG3 \l0lIo_0_0_1_0_.m21 ( .A(N_145), .B(m20), .C(m17), .Y(i5_mux_2) ); defparam \l0lIo_0_0_1_0_.m21 .INIT=8'h8D; // @28:503431 CFG4 lolIo_RNI8EFAU_0 ( .A(I1lIo[2]), .B(IilIo_Z), .C(lolIo_Z), .D(un1_N_3_mux_1_i), .Y(lliO1_0_iv_i_3) ); defparam lolIo_RNI8EFAU_0.INIT=16'hEC20; // @28:539488 CFG4 \iolIo_1_0_.m29 ( .A(N_40_mux), .B(i5_mux), .C(OlI11_7), .D(N_39), .Y(iolIo) ); defparam \iolIo_1_0_.m29 .INIT=16'hCA0A; // @28:537806 CFG4 \o0lIo_6_0_.m71_1_0 ( .A(OlI11_5), .B(N_145), .C(N_68), .D(N_70), .Y(o0lIo_1[0]) ); defparam \o0lIo_6_0_.m71_1_0 .INIT=16'h6240; // @28:540010 CFG3 \OO0Io_0_0_1_0_.m10 ( .A(OlI11_2), .B(m8), .C(IO0Io_i_2), .Y(IO0Io) ); defparam \OO0Io_0_0_1_0_.m10 .INIT=8'hF4; // @28:539753 CFG4 IilIo ( .A(OlI11_7), .B(IoIO1), .C(lI0o1_0), .D(iolIo), .Y(IilIo_Z) ); defparam IilIo.INIT=16'hB700; // @28:539134 CFG4 lolIo_0_0 ( .A(m18), .B(l1lIo), .C(m14), .D(i5_mux_2), .Y(lolIo_0) ); defparam lolIo_0_0.INIT=16'h048C; // @28:539140 CFG4 un4_lolIo ( .A(o0lIo_2[0]), .B(o0lIo_1[0]), .C(o0lIo[1]), .D(lI0o1_0), .Y(un4_lolIo_Z) ); defparam un4_lolIo.INIT=16'h1EEE; // @28:539134 CFG4 lolIo ( .A(un4_lolIo_Z), .B(lolIo_0), .C(lolIo_2_Z), .D(un27_lolIo_Z), .Y(lolIo_Z) ); defparam lolIo.INIT=16'h4000; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_R10B8B_0 */ module CTSE_PEREX_PCS_0s_26s_1s ( OlI11_i_2, OlI11_i_0, OlI11_i_10, OlI11_i_12, i1Oi1_9, i1Oi1_5, i1Oi1_2, i1Oi1_0, i1Oi1_6, Oiio1, OlI11_7, OlI11_3, OlI11_15, OlI11_17, OlI11_16, OlI11_6, OlI11_9, OlI11_0, OlI11_2, OlI11_13, OlI11_12, OlI11_10, OlI11_5, OlI11_19, Oiio1_RNI7H0P9_0, Oiio1_RNI1B0P9_0, ioI01, IiI01, il101, OOo01, OiI01, N_146_i_0, N_24_i, N_146, N_147_i, N_145, IOOi1, iII11, ilI11, O0I11, OO101, RD_BC_ERROR_c, IoIO1_1z, ll101, iOl01, O0101, lII11, PF_IOD_CDR_C0_0_RX_CLK_R, ooI01_i ) ; input OlI11_i_2 ; input OlI11_i_0 ; input OlI11_i_10 ; input OlI11_i_12 ; input i1Oi1_9 ; input i1Oi1_5 ; input i1Oi1_2 ; input i1Oi1_0 ; input i1Oi1_6 ; input [19:0] Oiio1 ; input OlI11_7 ; input OlI11_3 ; input OlI11_15 ; input OlI11_17 ; input OlI11_16 ; input OlI11_6 ; input OlI11_9 ; input OlI11_0 ; input OlI11_2 ; input OlI11_13 ; input OlI11_12 ; input OlI11_10 ; input OlI11_5 ; input OlI11_19 ; input Oiio1_RNI7H0P9_0 ; input Oiio1_RNI1B0P9_0 ; output [15:0] ioI01 ; output [1:0] IiI01 ; output [15:0] il101 ; input [1:0] OOo01 ; output [1:0] OiI01 ; input N_146_i_0 ; input N_24_i ; input N_146 ; input N_147_i ; input N_145 ; input IOOi1 ; input iII11 ; input ilI11 ; input O0I11 ; output OO101 ; output RD_BC_ERROR_c ; output IoIO1_1z ; output ll101 ; input iOl01 ; input O0101 ; input lII11 ; input PF_IOD_CDR_C0_0_RX_CLK_R ; input ooI01_i ; wire OlI11_i_2 ; wire OlI11_i_0 ; wire OlI11_i_10 ; wire OlI11_i_12 ; wire i1Oi1_9 ; wire i1Oi1_5 ; wire i1Oi1_2 ; wire i1Oi1_0 ; wire i1Oi1_6 ; wire OlI11_7 ; wire OlI11_3 ; wire OlI11_15 ; wire OlI11_17 ; wire OlI11_16 ; wire OlI11_6 ; wire OlI11_9 ; wire OlI11_0 ; wire OlI11_2 ; wire OlI11_13 ; wire OlI11_12 ; wire OlI11_10 ; wire OlI11_5 ; wire OlI11_19 ; wire Oiio1_RNI7H0P9_0 ; wire Oiio1_RNI1B0P9_0 ; wire N_146_i_0 ; wire N_24_i ; wire N_146 ; wire N_147_i ; wire N_145 ; wire IOOi1 ; wire iII11 ; wire ilI11 ; wire O0I11 ; wire OO101 ; wire RD_BC_ERROR_c ; wire IoIO1_1z ; wire ll101 ; wire iOl01 ; wire O0101 ; wire lII11 ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire ooI01_i ; wire [0:0] un1_oi1o1_0_m2_Z; wire [0:0] un1_oi1o1_i; wire [2:0] I00o1_Z; wire [0:0] ol0o1; wire [11:0] O00o1_Z; wire [5:1] Il0o1; wire [1:0] l11o1_Z; wire [1:0] OI0o1_Z; wire [15:0] lioo1_Z; wire [1:0] II0o1_Z; wire [31:0] il0o1_Z; wire [10:10] il101ce_Z; wire [7:7] un5_Ol0o1; wire [6:0] un5_Ol0o1_Z; wire [14:4] Ol0o1; wire [3:2] Ol0o1_Z; wire [15:0] OIoO1_Z; wire [7:5] OIoO1; wire [7:4] lliO1_0_iv_i; wire [0:0] un6_I0io1_Z; wire [0:0] un6_I0io1_1_Z; wire [1:0] lI0o1_Z; wire [1:1] lI0o1_1_Z; wire [1:1] I11o1_i_a2_1_Z; wire [15:1] un64_OIoO1_Z; wire [14:2] OIoO1_0_Z; wire [0:0] I11o1_i_1_Z; wire [2:0] I1lIo; wire [5:4] Ol0o1_0_RNO_Z; wire [8:0] OIoO1_1_Z; wire [1:1] I0io1_2_0_tz_Z; wire [6:4] un13_OIoO1_Z; wire [11:2] OIoO1_2_Z; wire [2:2] Ol0o1_0_Z; wire [7:7] un5_Ol0o1_0_Z; wire [2:2] OIoO1_1; wire [1:1] lliO1_1_iv_1; wire [6:6] lliO1_1_iv_0; wire [3:3] I0lIo; wire [3:3] Ol0o1_1_Z; wire [1:0] I0io1_1_Z; wire [0:0] OIoO1_3_0; wire [3:0] OIoO1_3_Z; wire [0:0] I0io1_2_Z; wire [2:0] I0lIo_m; wire [0:0] I0io1_5_Z; wire [0:0] I0io1_4_Z; wire [1:1] I0io1_Z; wire O1io1_Z ; wire VCC ; wire GND ; wire I1io1_Z ; wire i0io1_Z ; wire o0io1_Z ; wire Oloo1_Z ; wire N_176_i ; wire O1oo1_Z ; wire i0oo1_Z ; wire Olio1_Z ; wire iIio1_Z ; wire oo1o1_Z ; wire lo1o1_i_0_o2_Z ; wire oIio1_Z ; wire lIio1 ; wire I1oo1_Z ; wire Iooo1_Z ; wire Oooo1_Z ; wire iooo1_Z ; wire o0oo1_Z ; wire lOio1_Z ; wire IOio1_Z ; wire N_5_i ; wire N_8_i ; wire iI0o1_Z ; wire oI0o1_Z ; wire iO0o1_Z ; wire iO0o1_2 ; wire ilio1_Z ; wire olio1_Z ; wire looo1_Z ; wire OOio1_Z ; wire OOio1_2_Z ; wire llio1_Z ; wire Ilio1_Z ; wire Ii1o1_Z ; wire N_180_i ; wire li1o1_Z ; wire Oi1o1_Z ; wire ii1o1_Z ; wire N_184 ; wire lIoo1_Z ; wire N_179_i ; wire iIoo1_Z ; wire N_178_i ; wire Iloo1_Z ; wire N_44_i ; wire IIoo1_Z ; wire OOoo1_Z ; wire i1oo1_Z ; wire N_177_i ; wire oIoo1_Z ; wire N_40_i ; wire IO0o1_Z ; wire lO0o1_Z ; wire oO0o1_Z ; wire O00o1_N_3_mux_i ; wire N_174_i ; wire N_175_i ; wire O00o1_N_3_mux_i_0 ; wire N_358 ; wire N_234 ; wire N_196 ; wire N_364_1 ; wire N_201 ; wire N_254 ; wire N_200 ; wire N_225_2 ; wire N_1930 ; wire N_362 ; wire N_188 ; wire N_258 ; wire N_309 ; wire io0o1 ; wire N_281 ; wire N_193 ; wire N_178_i_1 ; wire N_205 ; wire OOoo1_1_Z ; wire N_524 ; wire N_212 ; wire un2_Ilio1_2_Z ; wire un4_Ilio1_Z ; wire Ilio1_1_Z ; wire un2_Ilio1_0_Z ; wire lO1o1_Z ; wire Oo0o1_Z ; wire un8_l00o1_1_Z ; wire N_7211_2 ; wire un8_l00o1_3_0 ; wire l00o1_1_Z ; wire l00o1_Z ; wire un4_l00o1_3_Z ; wire N_7215_1 ; wire N_195 ; wire Oi1o1_1_Z ; wire N_6 ; wire oi1o1_i_o2_1_Z ; wire N_198 ; wire N_5_i_0 ; wire OO0Io ; wire oI0o1_1_Z ; wire oO0Io ; wire IO0Io ; wire i2_mux ; wire IO0Io_0 ; wire oO0Io_0 ; wire OO0Io_0 ; wire un12_I1oo1_4_RNI9891A_Z ; wire un1_I1oo1_1_tz_1_Z ; wire un1_I1oo1_1_Z ; wire un1_oioo1_0_Z ; wire io0o1_0_a2_0_3_Z ; wire un7_I1oo1_3_Z ; wire il1o1_0_a2_0_1_Z ; wire un1_i0oo1_tz_0_Z ; wire OIio1_0_Z ; wire N_206 ; wire N_370 ; wire N_197 ; wire Io1o1_Z ; wire N_190 ; wire un3_I0io1_5_Z ; wire un3_I0io1_4_Z ; wire un10_I0io1_0_0_Z ; wire lIio1_0_a2_0_9_3_Z ; wire lIio1_0_a2_4_0_Z ; wire un5_OOio1_2_1_Z ; wire io0o1_0_a2_0_4_Z ; wire un12_I1oo1_5_Z ; wire un12_I1oo1_4_Z ; wire un7_I1oo1_4_Z ; wire un1_Oooo1_tz_tz_1_Z ; wire Ii0o1_Z ; wire l01o1_Z ; wire IO1o1_Z ; wire N_230_6 ; wire un2_I0io1_1_Z ; wire O0oo1_Z ; wire oi0o1_Z ; wire Io0o1_Z ; wire i00o1 ; wire Ol1o1_Z ; wire un3_I0io1_8_Z ; wire un1_OIio1_0_Z ; wire IOoo1_i_a2_0_Z ; wire OIoo1_i_a2_0 ; wire un1_olio1_0_Z ; wire un4_Ilio1_0_Z ; wire o1oo1_i_0_tz_1_Z ; wire N_225 ; wire N_228 ; wire un7_I1oo1_Z ; wire un4_OOio1_1_Z ; wire N_308 ; wire un5_OOio1_2_Z ; wire lo1o1_i_0_o2_0_Z ; wire un1_olio1_2_Z ; wire oioo1_Z ; wire N_214 ; wire un7_O0io1_i_0 ; wire N_8_1 ; wire un19_O0io1_i_0 ; wire N_5_1 ; wire Oooo1_0_Z ; wire lo1o1_i_0_o2_1 ; wire lo1o1_i_0_o2_0_0_Z ; wire un4_l00o1_1_0 ; wire lIio1_0_a2_0_9_5_Z ; wire iOoo1_i_1_Z ; wire il1o1 ; wire un60_OIoO1_Z ; wire oOio1_Z ; wire un3_iIio1_1_Z ; wire un5_Oooo1_Z ; wire N_199 ; wire N_222 ; wire un3_I0io1_10_Z ; wire un8_l00o1_2 ; wire un8_l00o1_3_Z ; wire N_245 ; wire un3_olio1_Z ; wire lIio1_0_a2_4_Z ; wire un1_looo1_Z ; wire un25_I1oo1_Z ; wire un15_OIoO1_Z ; wire lolIo ; wire un3_I0io1_11_Z ; wire lo1o1_i_0_o2_4_Z ; wire un3_iooo1_Z ; wire iIio1_RNO_Z ; wire N_177 ; wire un7_iooo1_Z ; wire OIoO1_1775_0_0_Z ; wire OIoO1_1776_0_0_Z ; wire un2_iooo1_0_Z ; wire lIio1_0_a2_0_9_Z ; wire un1_I1oo1_3_tz_Z ; wire un3_OIoO1_Z ; wire N_365 ; wire lilIo56_1 ; wire lOoo1_i_1_Z ; wire un38_OIoO1_Z ; wire IilIo ; wire N_236 ; wire lilIo54 ; wire lilIo52_RNIDMMEA ; wire lilIo56 ; wire lilIo55 ; wire lilIo51 ; wire un19_O0io1_1 ; wire un19_O0io1_0 ; wire un7_O0io1_1_Z ; wire N_57 ; wire N_66 ; wire i5_mux ; wire un1_lilIo56_i ; wire un2_OIio1_1_Z ; wire lilIo53 ; wire lilIo52 ; wire un1_lilIo56_i_2 ; wire Ilio1_RNICD455_Z ; wire un19_O0io1_3_Z ; wire OIio1_Z ; wire un3_IOio1_Z ; wire un30_OIoO1_Z ; wire un22_OIoO1_Z ; wire N_6_0 ; wire N_5 ; wire N_4 ; wire N_3 ; wire N_15089 ; wire N_15090 ; wire N_15091 ; wire N_15092 ; // @28:503110 SLE O1io1 ( .Q(O1io1_Z), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lII11), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503110 SLE I1io1 ( .Q(I1io1_Z), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O1io1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507534 SLE i0io1 ( .Q(i0io1_Z), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(o0io1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507502 SLE o0io1 ( .Q(o0io1_Z), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O0101), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:505266 SLE Oloo1 ( .Q(Oloo1_Z), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_176_i), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:505557 SLE O1oo1 ( .Q(O1oo1_Z), .ADn(GND), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(i0oo1_Z), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:506724 SLE Olio1 ( .Q(Olio1_Z), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIio1_Z), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:504582 SLE oo1o1 ( .Q(oo1o1_Z), .ADn(GND), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lo1o1_i_0_o2_Z), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:506661 SLE oIio1 ( .Q(oIio1_Z), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIio1), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:505734 SLE l1oo1 ( .Q(ll101), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I1oo1_Z), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:505967 SLE Iooo1 ( .Q(Iooo1_Z), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Oooo1_Z), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:505399 SLE IoIO1 ( .Q(IoIO1_1z), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(un1_oi1o1_0_m2_Z[0]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:506230 SLE Oioo1 ( .Q(RD_BC_ERROR_c), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iooo1_Z), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:505502 SLE o0oo1 ( .Q(o0oo1_Z), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(un1_oi1o1_i[0]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:506461 SLE lOio1 ( .Q(lOio1_Z), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IOio1_Z), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507173 SLE \lI101_1[0] ( .Q(OiI01[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_5_i), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507173 SLE \lI101_1[1] ( .Q(OiI01[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_8_i), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503188 SLE iI0o1 ( .Q(iI0o1_Z), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oI0o1_Z), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:502968 SLE iO0o1 ( .Q(iO0o1_Z), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iO0o1_2), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:506861 SLE ilio1 ( .Q(ilio1_Z), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(olio1_Z), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:506061 SLE ol101 ( .Q(OO101), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(looo1_Z), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:506385 SLE OOio1 ( .Q(OOio1_Z), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OOio1_2_Z), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:506797 SLE llio1 ( .Q(llio1_Z), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Ilio1_Z), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:504646 SLE Ii1o1 ( .Q(Ii1o1_Z), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_180_i), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:504710 SLE li1o1 ( .Q(li1o1_Z), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Oi1o1_Z), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:504788 SLE ii1o1 ( .Q(ii1o1_Z), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_184), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:504956 SLE lIoo1 ( .Q(lIoo1_Z), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_179_i), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:505158 SLE iIoo1 ( .Q(iIoo1_Z), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_178_i), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:505350 SLE Iloo1 ( .Q(Iloo1_Z), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_44_i), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:504870 SLE IIoo1 ( .Q(IIoo1_Z), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OOoo1_Z), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:506292 SLE i1oo1 ( .Q(i1oo1_Z), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_177_i), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:505064 SLE oIoo1 ( .Q(oIoo1_Z), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_40_i), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:502860 SLE IO0o1 ( .Q(IO0o1_Z), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(VCC), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503551 SLE \I00o1[0] ( .Q(I00o1_Z[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(I00o1_Z[2]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503551 SLE \I00o1[2] ( .Q(I00o1_Z[2]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ol0o1[0]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:502896 SLE lO0o1 ( .Q(lO0o1_Z), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IO0o1_Z), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:502932 SLE oO0o1 ( .Q(oO0o1_Z), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lO0o1_Z), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503491 SLE \O00o1[8] ( .Q(O00o1_Z[8]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Il0o1[2]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503491 SLE \O00o1[7] ( .Q(O00o1_Z[7]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Il0o1[1]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503491 SLE \O00o1[6] ( .Q(O00o1_Z[6]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O00o1_N_3_mux_i), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503491 SLE \O00o1[5] ( .Q(O00o1_Z[5]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O00o1_Z[11]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503491 SLE \O00o1[4] ( .Q(O00o1_Z[4]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O00o1_Z[10]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503491 SLE \O00o1[3] ( .Q(O00o1_Z[3]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O00o1_Z[9]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503491 SLE \O00o1[2] ( .Q(O00o1_Z[2]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O00o1_Z[8]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503491 SLE \O00o1[1] ( .Q(O00o1_Z[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O00o1_Z[7]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503491 SLE \O00o1[0] ( .Q(O00o1_Z[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O00o1_Z[6]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:504412 SLE \l11o1[1] ( .Q(l11o1_Z[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_174_i), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:504412 SLE \l11o1[0] ( .Q(l11o1_Z[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_175_i), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503008 SLE \OI0o1[1] ( .Q(OI0o1_Z[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OOo01[1]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503008 SLE \OI0o1[0] ( .Q(OI0o1_Z[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OOo01[0]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:506138 SLE \il101_Z[9] ( .Q(il101[9]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lioo1_Z[9]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:506138 SLE \il101_Z[8] ( .Q(il101[8]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lioo1_Z[8]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:506138 SLE \il101_Z[7] ( .Q(il101[7]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lioo1_Z[7]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:506138 SLE \il101_Z[6] ( .Q(il101[6]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lioo1_Z[6]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:506138 SLE \il101_Z[5] ( .Q(il101[5]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lioo1_Z[5]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:506138 SLE \il101_Z[4] ( .Q(il101[4]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lioo1_Z[4]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:506138 SLE \il101_Z[3] ( .Q(il101[3]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lioo1_Z[3]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:506138 SLE \il101_Z[2] ( .Q(il101[2]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lioo1_Z[2]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:506138 SLE \il101_Z[1] ( .Q(il101[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lioo1_Z[1]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:506138 SLE \il101_Z[0] ( .Q(il101[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lioo1_Z[0]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503059 SLE \II0o1[1] ( .Q(II0o1_Z[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OI0o1_Z[1]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503059 SLE \II0o1[0] ( .Q(II0o1_Z[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OI0o1_Z[0]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503491 SLE \O00o1[11] ( .Q(O00o1_Z[11]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Il0o1[5]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503491 SLE \O00o1[10] ( .Q(O00o1_Z[10]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Il0o1[4]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503491 SLE \O00o1[9] ( .Q(O00o1_Z[9]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(O00o1_N_3_mux_i_0), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503431 SLE \il0o1[8] ( .Q(il0o1_Z[8]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(il0o1_Z[24]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503431 SLE \il0o1[7] ( .Q(il0o1_Z[7]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(il0o1_Z[23]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503431 SLE \il0o1[6] ( .Q(il0o1_Z[6]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(il0o1_Z[22]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503431 SLE \il0o1[5] ( .Q(il0o1_Z[5]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(il0o1_Z[21]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503431 SLE \il0o1[4] ( .Q(il0o1_Z[4]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(il0o1_Z[20]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503431 SLE \il0o1[3] ( .Q(il0o1_Z[3]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(il0o1_Z[19]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503431 SLE \il0o1[2] ( .Q(il0o1_Z[2]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(il0o1_Z[18]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503431 SLE \il0o1[1] ( .Q(il0o1_Z[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(il0o1_Z[17]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503431 SLE \il0o1[0] ( .Q(il0o1_Z[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(il0o1_Z[16]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:506138 SLE \il101_Z[15] ( .Q(il101[15]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lioo1_Z[15]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:506138 SLE \il101_Z[14] ( .Q(il101[14]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(il0o1_Z[14]), .EN(il101ce_Z[10]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:506138 SLE \il101_Z[13] ( .Q(il101[13]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lioo1_Z[13]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:506138 SLE \il101_Z[12] ( .Q(il101[12]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lioo1_Z[12]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:506138 SLE \il101_Z[11] ( .Q(il101[11]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lioo1_Z[11]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:506138 SLE \il101_Z[10] ( .Q(il101[10]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(il0o1_Z[10]), .EN(il101ce_Z[10]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503431 SLE \il0o1[23] ( .Q(il0o1_Z[23]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(un5_Ol0o1[7]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503431 SLE \il0o1[22] ( .Q(il0o1_Z[22]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(un5_Ol0o1_Z[6]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503431 SLE \il0o1[21] ( .Q(il0o1_Z[21]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Ol0o1[5]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503431 SLE \il0o1[20] ( .Q(il0o1_Z[20]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Ol0o1[4]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503431 SLE \il0o1[19] ( .Q(il0o1_Z[19]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Ol0o1_Z[3]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503431 SLE \il0o1[18] ( .Q(il0o1_Z[18]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Ol0o1_Z[2]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503431 SLE \il0o1[17] ( .Q(il0o1_Z[17]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(un5_Ol0o1_Z[1]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503431 SLE \il0o1[16] ( .Q(il0o1_Z[16]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(un5_Ol0o1_Z[0]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503431 SLE \il0o1[15] ( .Q(il0o1_Z[15]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(il0o1_Z[31]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503431 SLE \il0o1[14] ( .Q(il0o1_Z[14]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(il0o1_Z[30]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503431 SLE \il0o1[13] ( .Q(il0o1_Z[13]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(il0o1_Z[29]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503431 SLE \il0o1[12] ( .Q(il0o1_Z[12]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(il0o1_Z[28]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503431 SLE \il0o1[11] ( .Q(il0o1_Z[11]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(il0o1_Z[27]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503431 SLE \il0o1[10] ( .Q(il0o1_Z[10]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(il0o1_Z[26]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503431 SLE \il0o1[9] ( .Q(il0o1_Z[9]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(il0o1_Z[25]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507451 SLE \IIoO1[6] ( .Q(ioI01[6]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIoO1_Z[6]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507451 SLE \IIoO1[5] ( .Q(ioI01[5]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIoO1[5]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507451 SLE \IIoO1[4] ( .Q(ioI01[4]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIoO1_Z[4]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507451 SLE \IIoO1[3] ( .Q(ioI01[3]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIoO1_Z[3]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507451 SLE \IIoO1[2] ( .Q(ioI01[2]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIoO1_Z[2]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507451 SLE \IIoO1[1] ( .Q(ioI01[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIoO1_Z[1]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507451 SLE \IIoO1[0] ( .Q(ioI01[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIoO1_Z[0]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503431 SLE \il0o1[31] ( .Q(il0o1_Z[31]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lliO1_0_iv_i[7]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503431 SLE \il0o1[30] ( .Q(il0o1_Z[30]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Ol0o1[14]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503431 SLE \il0o1[29] ( .Q(il0o1_Z[29]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lliO1_0_iv_i[5]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503431 SLE \il0o1[28] ( .Q(il0o1_Z[28]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lliO1_0_iv_i[4]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503431 SLE \il0o1[27] ( .Q(il0o1_Z[27]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Ol0o1[11]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503431 SLE \il0o1[26] ( .Q(il0o1_Z[26]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Ol0o1[10]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503431 SLE \il0o1[25] ( .Q(il0o1_Z[25]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Ol0o1[9]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:503431 SLE \il0o1[24] ( .Q(il0o1_Z[24]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Ol0o1[8]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507020 SLE \oI101[1] ( .Q(IiI01[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(un6_I0io1_Z[0]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507020 SLE \oI101[0] ( .Q(IiI01[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(un6_I0io1_1_Z[0]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507451 SLE \IIoO1[15] ( .Q(ioI01[15]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIoO1_Z[15]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507451 SLE \IIoO1[14] ( .Q(ioI01[14]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIoO1_Z[14]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507451 SLE \IIoO1[13] ( .Q(ioI01[13]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIoO1_Z[13]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507451 SLE \IIoO1[12] ( .Q(ioI01[12]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIoO1_Z[12]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507451 SLE \IIoO1[11] ( .Q(ioI01[11]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIoO1_Z[11]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507451 SLE \IIoO1[10] ( .Q(ioI01[10]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIoO1_Z[10]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507451 SLE \IIoO1[9] ( .Q(ioI01[9]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIoO1_Z[9]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507451 SLE \IIoO1[8] ( .Q(ioI01[8]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIoO1_Z[8]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:507451 SLE \IIoO1[7] ( .Q(ioI01[7]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIoO1[7]), .EN(iOl01), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:504996 CFG3 lOoo1_i_o2_2_1 ( .A(N_358), .B(N_234), .C(N_196), .Y(N_364_1) ); defparam lOoo1_i_o2_2_1.INIT=8'hFE; // @28:504485 CFG4 lo1o1_i_0_a2 ( .A(Ii1o1_Z), .B(li1o1_Z), .C(Oloo1_Z), .D(N_201), .Y(N_254) ); defparam lo1o1_i_0_a2.INIT=16'hFE00; // @28:505198 CFG4 iOoo1_i_a2_0 ( .A(iO0o1_Z), .B(O0I11), .C(ilI11), .D(lO0o1_Z), .Y(N_234) ); defparam iOoo1_i_a2_0.INIT=16'h0203; // @28:504182 CFG3 \I11o1_i_a2_0_2[1] ( .A(IIoo1_Z), .B(lIoo1_Z), .C(N_200), .Y(N_225_2) ); defparam \I11o1_i_a2_0_2[1] .INIT=8'h01; // @28:504996 CFG3 lOoo1_i_a2_4 ( .A(IIoo1_Z), .B(lIoo1_Z), .C(N_1930), .Y(N_362) ); defparam lOoo1_i_a2_4.INIT=8'h10; // @28:504485 CFG4 lo1o1_i_0_a2_3 ( .A(oIoo1_Z), .B(iIoo1_Z), .C(N_196), .D(N_188), .Y(N_258) ); defparam lo1o1_i_0_a2_3.INIT=16'h000E; CFG4 iIoo1_RNIS235T ( .A(l11o1_Z[0]), .B(iIoo1_Z), .C(N_188), .D(l11o1_Z[1]), .Y(N_1930) ); defparam iIoo1_RNIS235T.INIT=16'h70F0; // @28:503726 CFG4 io0o1_0_a2 ( .A(O00o1_Z[0]), .B(O00o1_Z[1]), .C(O00o1_Z[2]), .D(N_309), .Y(io0o1) ); defparam io0o1_0_a2.INIT=16'h1000; // @28:505158 CFG4 iIoo1_RNO ( .A(N_188), .B(N_281), .C(N_193), .D(N_178_i_1), .Y(N_178_i) ); defparam iIoo1_RNO.INIT=16'h010B; // @28:505158 CFG4 iIoo1_RNO_0 ( .A(oIoo1_Z), .B(l11o1_Z[1]), .C(N_205), .D(N_200), .Y(N_178_i_1) ); defparam iIoo1_RNO_0.INIT=16'h5073; // @28:504828 CFG4 OOoo1 ( .A(OOoo1_1_Z), .B(N_524), .C(N_234), .D(N_196), .Y(OOoo1_Z) ); defparam OOoo1.INIT=16'h0C0D; // @28:504828 CFG4 OOoo1_1 ( .A(lIoo1_Z), .B(ii1o1_Z), .C(N_188), .D(N_212), .Y(OOoo1_1_Z) ); defparam OOoo1_1.INIT=16'h3F1F; // @28:506763 CFG4 Ilio1 ( .A(IoIO1_1z), .B(un2_Ilio1_2_Z), .C(un4_Ilio1_Z), .D(Ilio1_1_Z), .Y(Ilio1_Z) ); defparam Ilio1.INIT=16'hA0A8; // @28:506763 CFG3 Ilio1_1 ( .A(un2_Ilio1_0_Z), .B(lO1o1_Z), .C(Oo0o1_Z), .Y(Ilio1_1_Z) ); defparam Ilio1_1.INIT=8'h15; // @28:503368 CFG4 l00o1 ( .A(un8_l00o1_1_Z), .B(N_7211_2), .C(un8_l00o1_3_0), .D(l00o1_1_Z), .Y(l00o1_Z) ); defparam l00o1.INIT=16'hFF80; // @28:503368 CFG4 l00o1_1 ( .A(un4_l00o1_3_Z), .B(N_7215_1), .C(OlI11_7), .D(Oiio1_RNI1B0P9_0), .Y(l00o1_1_Z) ); defparam l00o1_1.INIT=16'h0800; // @28:504686 CFG4 Oi1o1 ( .A(N_234), .B(N_195), .C(Oi1o1_1_Z), .D(N_196), .Y(Oi1o1_Z) ); defparam Oi1o1.INIT=16'h1410; // @28:504686 CFG4 Oi1o1_1 ( .A(Ii1o1_Z), .B(li1o1_Z), .C(N_195), .D(N_6), .Y(Oi1o1_1_Z) ); defparam Oi1o1_1.INIT=16'h303A; // @28:504750 CFG4 oi1o1_i_o2 ( .A(N_188), .B(ii1o1_Z), .C(oi1o1_i_o2_1_Z), .D(N_193), .Y(N_184) ); defparam oi1o1_i_o2.INIT=16'h008A; // @28:504750 CFG4 oi1o1_i_o2_1 ( .A(l11o1_Z[1]), .B(N_198), .C(li1o1_Z), .D(lIoo1_Z), .Y(oi1o1_i_o2_1_Z) ); defparam oi1o1_i_o2_1.INIT=16'h45CF; // @28:503181 CFG4 oI0o1 ( .A(N_5_i_0), .B(OO0Io), .C(lI0o1_Z[1]), .D(oI0o1_1_Z), .Y(oI0o1_Z) ); defparam oI0o1.INIT=16'hFD00; // @28:503181 CFG4 oI0o1_1 ( .A(oO0Io), .B(I1io1_Z), .C(IO0Io), .D(N_5_i_0), .Y(oI0o1_1_Z) ); defparam oI0o1_1.INIT=16'h0111; // @28:503170 CFG4 \lI0o1[1] ( .A(I1io1_Z), .B(i2_mux), .C(IO0Io_0), .D(lI0o1_1_Z[1]), .Y(lI0o1_Z[1]) ); defparam \lI0o1[1] .INIT=16'h1500; // @28:503170 CFG4 \lI0o1_1[1] ( .A(oO0Io_0), .B(lI0o1_Z[0]), .C(OO0Io_0), .D(i2_mux), .Y(lI0o1_1_Z[1]) ); defparam \lI0o1_1[1] .INIT=16'h5455; // @28:477703 CFG3 \un1_oi1o1_0_m2_i[0] ( .A(lo1o1_i_0_o2_Z), .B(IoIO1_1z), .C(N_184), .Y(un1_oi1o1_i[0]) ); defparam \un1_oi1o1_0_m2_i[0] .INIT=8'h8B; // @28:505599 CFG3 un1_I1oo1_1 ( .A(un12_I1oo1_4_RNI9891A_Z), .B(un1_I1oo1_1_tz_1_Z), .C(io0o1), .Y(un1_I1oo1_1_Z) ); defparam un1_I1oo1_1.INIT=8'hE0; // @28:506332 CFG2 un1_oioo1_0 ( .A(ll101), .B(I00o1_Z[0]), .Y(un1_oioo1_0_Z) ); defparam un1_oioo1_0.INIT=4'h2; // @28:503726 CFG2 io0o1_0_a2_0_3 ( .A(il0o1_Z[1]), .B(il0o1_Z[0]), .Y(io0o1_0_a2_0_3_Z) ); defparam io0o1_0_a2_0_3.INIT=4'h1; // @28:505605 CFG2 un7_I1oo1_3 ( .A(il0o1_Z[11]), .B(il0o1_Z[13]), .Y(un7_I1oo1_3_Z) ); defparam un7_I1oo1_3.INIT=4'h4; // @28:504064 CFG2 il1o1_0_a2_0_1 ( .A(O00o1_Z[8]), .B(il0o1_Z[16]), .Y(il1o1_0_a2_0_1_Z) ); defparam il1o1_0_a2_0_1.INIT=4'h2; // @28:505544 CFG2 un1_i0oo1_tz_0 ( .A(O1oo1_Z), .B(o0oo1_Z), .Y(un1_i0oo1_tz_0_Z) ); defparam un1_i0oo1_tz_0.INIT=4'hE; // @28:506547 CFG2 OIio1_0 ( .A(IoIO1_1z), .B(lOio1_Z), .Y(OIio1_0_Z) ); defparam OIio1_0.INIT=4'h8; // @28:504485 CFG2 lo1o1_i_0_o2_0 ( .A(Ii1o1_Z), .B(li1o1_Z), .Y(N_206) ); defparam lo1o1_i_0_o2_0.INIT=4'hE; // @28:504996 CFG2 lOoo1_i_x2 ( .A(l11o1_Z[1]), .B(l11o1_Z[0]), .Y(N_370) ); defparam lOoo1_i_x2.INIT=4'h6; // @28:504182 CFG2 \I11o1_i_o2[1] ( .A(l11o1_Z[1]), .B(l11o1_Z[0]), .Y(N_197) ); defparam \I11o1_i_o2[1] .INIT=4'hB; // @28:504478 CFG2 Io1o1 ( .A(ilI11), .B(O0I11), .Y(Io1o1_Z) ); defparam Io1o1.INIT=4'hE; // @28:504182 CFG2 \I11o1_i_a2_1[1] ( .A(lIoo1_Z), .B(IIoo1_Z), .Y(N_281) ); defparam \I11o1_i_a2_1[1] .INIT=4'h1; // @28:504182 CFG2 \I11o1_i_o2_0[1] ( .A(iIoo1_Z), .B(oIoo1_Z), .Y(N_200) ); defparam \I11o1_i_o2_0[1] .INIT=4'hE; // @28:504469 CFG2 Oo1o1_i_o2 ( .A(l11o1_Z[1]), .B(l11o1_Z[0]), .Y(N_212) ); defparam Oo1o1_i_o2.INIT=4'h7; // @28:503776 CFG2 oI1o1_i_0_o2 ( .A(O00o1_Z[3]), .B(O00o1_Z[4]), .Y(N_190) ); defparam oI1o1_i_0_o2.INIT=4'hD; // @28:503001 CFG2 un3_iO0o1 ( .A(lO0o1_Z), .B(oO0o1_Z), .Y(iO0o1_2) ); defparam un3_iO0o1.INIT=4'h6; // @28:503159 CFG2 \lI0o1[0] ( .A(I1io1_Z), .B(iI0o1_Z), .Y(lI0o1_Z[0]) ); defparam \lI0o1[0] .INIT=4'h4; // @28:506913 CFG4 un3_I0io1_5 ( .A(il0o1_Z[29]), .B(il0o1_Z[28]), .C(il0o1_Z[27]), .D(il0o1_Z[26]), .Y(un3_I0io1_5_Z) ); defparam un3_I0io1_5.INIT=16'h8000; // @28:506913 CFG3 un3_I0io1_4 ( .A(il0o1_Z[31]), .B(il0o1_Z[24]), .C(O00o1_Z[11]), .Y(un3_I0io1_4_Z) ); defparam un3_I0io1_4.INIT=8'h20; // @28:506951 CFG3 un10_I0io1_0_0 ( .A(O00o1_Z[8]), .B(O00o1_Z[7]), .C(O00o1_Z[6]), .Y(un10_I0io1_0_0_Z) ); defparam un10_I0io1_0_0.INIT=8'h10; // @28:506608 CFG4 lIio1_0_a2_0_9_3 ( .A(il0o1_Z[19]), .B(il0o1_Z[23]), .C(il0o1_Z[21]), .D(il0o1_Z[18]), .Y(lIio1_0_a2_0_9_3_Z) ); defparam lIio1_0_a2_0_9_3.INIT=16'h0001; // @28:506608 CFG4 lIio1_0_a2_4_0 ( .A(il0o1_Z[20]), .B(IoIO1_1z), .C(lOio1_Z), .D(il0o1_Z[21]), .Y(lIio1_0_a2_4_0_Z) ); defparam lIio1_0_a2_4_0.INIT=16'h8000; // @28:506431 CFG3 un5_OOio1_2_1 ( .A(O00o1_Z[11]), .B(O00o1_Z[10]), .C(O00o1_Z[9]), .Y(un5_OOio1_2_1_Z) ); defparam un5_OOio1_2_1.INIT=8'h01; // @28:503726 CFG4 io0o1_0_a2_0_4 ( .A(il0o1_Z[7]), .B(il0o1_Z[5]), .C(il0o1_Z[3]), .D(il0o1_Z[2]), .Y(io0o1_0_a2_0_4_Z) ); defparam io0o1_0_a2_0_4.INIT=16'h8000; // @28:505616 CFG4 un12_I1oo1_5 ( .A(il0o1_Z[11]), .B(il0o1_Z[10]), .C(il0o1_Z[9]), .D(il0o1_Z[8]), .Y(un12_I1oo1_5_Z) ); defparam un12_I1oo1_5.INIT=16'h0010; // @28:505616 CFG4 un12_I1oo1_4 ( .A(il0o1_Z[15]), .B(il0o1_Z[14]), .C(il0o1_Z[13]), .D(il0o1_Z[12]), .Y(un12_I1oo1_4_Z) ); defparam un12_I1oo1_4.INIT=16'h0004; // @28:505605 CFG4 un7_I1oo1_4 ( .A(il0o1_Z[15]), .B(il0o1_Z[14]), .C(il0o1_Z[10]), .D(il0o1_Z[9]), .Y(un7_I1oo1_4_Z) ); defparam un7_I1oo1_4.INIT=16'h0020; // @28:504182 CFG3 \I11o1_i_a2_1_0[1] ( .A(oIoo1_Z), .B(IIoo1_Z), .C(Oloo1_Z), .Y(I11o1_i_a2_1_Z[1]) ); defparam \I11o1_i_a2_1_0[1] .INIT=8'h01; // @28:505781 CFG3 un1_Oooo1_tz_tz_1 ( .A(O1oo1_Z), .B(OO101), .C(Olio1_Z), .Y(un1_Oooo1_tz_tz_1_Z) ); defparam un1_Oooo1_tz_tz_1.INIT=8'hFE; // @28:503670 CFG3 Oo0o1 ( .A(O00o1_Z[2]), .B(O00o1_Z[1]), .C(O00o1_Z[0]), .Y(Oo0o1_Z) ); defparam Oo0o1.INIT=8'h04; // @28:503776 CFG3 Ii0o1 ( .A(O00o1_Z[2]), .B(O00o1_Z[1]), .C(O00o1_Z[0]), .Y(Ii0o1_Z) ); defparam Ii0o1.INIT=8'h20; // @28:503698 CFG3 lo0o1_0_o2 ( .A(O00o1_Z[2]), .B(O00o1_Z[1]), .C(O00o1_Z[0]), .Y(N_195) ); defparam lo0o1_0_o2.INIT=8'hFD; // @28:503684 CFG3 l01o1 ( .A(O00o1_Z[11]), .B(O00o1_Z[10]), .C(O00o1_Z[9]), .Y(l01o1_Z) ); defparam l01o1.INIT=8'h40; // @28:503670 CFG3 IO1o1 ( .A(O00o1_Z[3]), .B(O00o1_Z[5]), .C(O00o1_Z[4]), .Y(IO1o1_Z) ); defparam IO1o1.INIT=8'h10; // @28:504064 CFG4 il1o1_0_a2_4 ( .A(il0o1_Z[23]), .B(il0o1_Z[19]), .C(il0o1_Z[18]), .D(O00o1_Z[6]), .Y(N_230_6) ); defparam il1o1_0_a2_4.INIT=16'h0080; // @28:506909 CFG3 un2_I0io1_1 ( .A(O00o1_Z[11]), .B(O00o1_Z[10]), .C(O00o1_Z[9]), .Y(un2_I0io1_1_Z) ); defparam un2_I0io1_1.INIT=8'h10; // @28:505467 CFG3 O0oo1 ( .A(i0io1_Z), .B(II0o1_Z[1]), .C(II0o1_Z[0]), .Y(O0oo1_Z) ); defparam O0oo1.INIT=8'h5D; // @28:504182 CFG3 \I11o1_i_o2_0[0] ( .A(Iloo1_Z), .B(l11o1_Z[0]), .C(l11o1_Z[1]), .Y(N_205) ); defparam \I11o1_i_o2_0[0] .INIT=8'h73; // @28:503776 CFG3 oI1o1_i_0 ( .A(O00o1_Z[3]), .B(O00o1_Z[5]), .C(O00o1_Z[4]), .Y(N_6) ); defparam oI1o1_i_0.INIT=8'hF7; // @28:503804 CFG3 oi0o1 ( .A(O00o1_Z[2]), .B(O00o1_Z[1]), .C(O00o1_Z[0]), .Y(oi0o1_Z) ); defparam oi0o1.INIT=8'h80; // @28:503684 CFG3 Io0o1 ( .A(O00o1_Z[2]), .B(O00o1_Z[1]), .C(O00o1_Z[0]), .Y(Io0o1_Z) ); defparam Io0o1.INIT=8'h40; // @28:504396 CFG3 \O00o1_RNIRNGTI[0] ( .A(O00o1_Z[2]), .B(O00o1_Z[1]), .C(O00o1_Z[0]), .Y(N_188) ); defparam \O00o1_RNIRNGTI[0] .INIT=8'hEF; // @28:503614 CFG3 i00o1_0_a2 ( .A(O00o1_Z[2]), .B(O00o1_Z[1]), .C(O00o1_Z[0]), .Y(i00o1) ); defparam i00o1_0_a2.INIT=8'h01; // @28:503804 CFG3 Ol1o1 ( .A(O00o1_Z[3]), .B(O00o1_Z[5]), .C(O00o1_Z[4]), .Y(Ol1o1_Z) ); defparam Ol1o1.INIT=8'h80; // @28:503684 CFG3 lO1o1 ( .A(O00o1_Z[3]), .B(O00o1_Z[5]), .C(O00o1_Z[4]), .Y(lO1o1_Z) ); defparam lO1o1.INIT=8'h20; // @28:505198 CFG3 iOoo1_i_o2 ( .A(O00o1_Z[3]), .B(O00o1_Z[5]), .C(O00o1_Z[4]), .Y(N_196) ); defparam iOoo1_i_o2.INIT=8'hF9; // @28:507429 CFG2 \un64_OIoO1[1] ( .A(Oiio1_RNI1B0P9_0), .B(iII11), .Y(un64_OIoO1_Z[1]) ); defparam \un64_OIoO1[1] .INIT=4'h4; // @28:506913 CFG4 un3_I0io1_8 ( .A(un3_I0io1_5_Z), .B(O00o1_Z[9]), .C(il0o1_Z[30]), .D(il0o1_Z[25]), .Y(un3_I0io1_8_Z) ); defparam un3_I0io1_8.INIT=16'h0002; // @28:506553 CFG4 un1_OIio1_0 ( .A(O00o1_Z[0]), .B(Ol1o1_Z), .C(O00o1_Z[2]), .D(O00o1_Z[1]), .Y(un1_OIio1_0_Z) ); defparam un1_OIio1_0.INIT=16'hECCC; // @28:504910 CFG3 IOoo1_i_a2_0 ( .A(IIoo1_Z), .B(lIoo1_Z), .C(N_197), .Y(IOoo1_i_a2_0_Z) ); defparam IOoo1_i_a2_0.INIT=8'h51; // @28:505306 CFG3 OIoo1_i_a2_0_0 ( .A(Iloo1_Z), .B(N_197), .C(Oloo1_Z), .Y(OIoo1_i_a2_0) ); defparam OIoo1_i_a2_0_0.INIT=8'h0D; // @28:506836 CFG4 un1_olio1_0 ( .A(O00o1_Z[6]), .B(IoIO1_1z), .C(O00o1_Z[8]), .D(O00o1_Z[7]), .Y(un1_olio1_0_Z) ); defparam un1_olio1_0.INIT=16'h0800; // @28:506787 CFG4 un4_Ilio1_0 ( .A(llio1_Z), .B(O00o1_Z[8]), .C(O00o1_Z[7]), .D(O00o1_Z[6]), .Y(un4_Ilio1_0_Z) ); defparam un4_Ilio1_0.INIT=16'h2000; // @28:506274 CFG3 o1oo1_i_0_tz_1 ( .A(O0oo1_Z), .B(I00o1_Z[0]), .C(ll101), .Y(o1oo1_i_0_tz_1_Z) ); defparam o1oo1_i_0_tz_1.INIT=8'hDF; // @28:504182 CFG3 \I11o1_i_a2_0[1] ( .A(Iloo1_Z), .B(N_225_2), .C(Oloo1_Z), .Y(N_225) ); defparam \I11o1_i_a2_0[1] .INIT=8'h04; // @28:504182 CFG4 \I11o1_i_a2_0[0] ( .A(Iloo1_Z), .B(N_188), .C(iIoo1_Z), .D(lIoo1_Z), .Y(N_228) ); defparam \I11o1_i_a2_0[0] .INIT=16'h0004; // @28:503726 CFG4 io0o1_0_a2_0 ( .A(il0o1_Z[4]), .B(il0o1_Z[6]), .C(io0o1_0_a2_0_4_Z), .D(io0o1_0_a2_0_3_Z), .Y(N_309) ); defparam io0o1_0_a2_0.INIT=16'h2000; // @28:505605 CFG4 un7_I1oo1 ( .A(il0o1_Z[8]), .B(il0o1_Z[12]), .C(un7_I1oo1_4_Z), .D(un7_I1oo1_3_Z), .Y(un7_I1oo1_Z) ); defparam un7_I1oo1.INIT=16'h8000; // @28:506423 CFG4 un4_OOio1_1 ( .A(O00o1_Z[8]), .B(O00o1_Z[7]), .C(O00o1_Z[6]), .D(Io0o1_Z), .Y(un4_OOio1_1_Z) ); defparam un4_OOio1_1.INIT=16'h0100; // @28:504064 CFG4 il1o1_0_a2_0 ( .A(O00o1_Z[7]), .B(il1o1_0_a2_0_1_Z), .C(il0o1_Z[22]), .D(il0o1_Z[17]), .Y(N_308) ); defparam il1o1_0_a2_0.INIT=16'h0004; // @28:506431 CFG4 un5_OOio1_2 ( .A(O00o1_Z[6]), .B(un5_OOio1_2_1_Z), .C(O00o1_Z[8]), .D(O00o1_Z[7]), .Y(un5_OOio1_2_Z) ); defparam un5_OOio1_2.INIT=16'h0800; // @28:506767 CFG4 un2_Ilio1_0 ( .A(O00o1_Z[3]), .B(O00o1_Z[4]), .C(l01o1_Z), .D(O00o1_Z[5]), .Y(un2_Ilio1_0_Z) ); defparam un2_Ilio1_0.INIT=16'h0040; // @28:504485 CFG4 lo1o1_i_0_o2_0_0 ( .A(oo1o1_Z), .B(iO0o1_Z), .C(Io1o1_Z), .D(lO0o1_Z), .Y(lo1o1_i_0_o2_0_Z) ); defparam lo1o1_i_0_o2_0_0.INIT=16'h0C0E; // @28:504182 CFG2 \I11o1_i_a2_3[0] ( .A(N_188), .B(ii1o1_Z), .Y(N_358) ); defparam \I11o1_i_a2_3[0] .INIT=4'h1; // @28:504859 CFG2 un9_OOoo1_3_i_o2 ( .A(N_188), .B(N_196), .Y(N_201) ); defparam un9_OOoo1_3_i_o2.INIT=4'h7; // @28:505306 CFG2 OIoo1_i_o2 ( .A(N_196), .B(N_234), .Y(N_193) ); defparam OIoo1_i_o2.INIT=4'hD; // @28:507429 CFG2 \un64_OIoO1[3] ( .A(OlI11_3), .B(iII11), .Y(un64_OIoO1_Z[3]) ); defparam \un64_OIoO1[3] .INIT=4'h8; // @28:506608 CFG4 lIio1_0_o2_0 ( .A(O00o1_Z[0]), .B(N_190), .C(O00o1_Z[2]), .D(O00o1_Z[1]), .Y(N_198) ); defparam lIio1_0_o2_0.INIT=16'hFFEF; // @28:507429 CFG2 \un64_OIoO1[13] ( .A(OlI11_15), .B(iII11), .Y(un64_OIoO1_Z[13]) ); defparam \un64_OIoO1[13] .INIT=4'h8; // @28:506767 CFG4 un2_Ilio1_2 ( .A(lOio1_Z), .B(O00o1_Z[8]), .C(O00o1_Z[7]), .D(O00o1_Z[6]), .Y(un2_Ilio1_2_Z) ); defparam un2_Ilio1_2.INIT=16'h2000; // @28:506836 CFG4 un1_olio1_2 ( .A(O00o1_Z[4]), .B(lOio1_Z), .C(O00o1_Z[5]), .D(O00o1_Z[3]), .Y(un1_olio1_2_Z) ); defparam un1_olio1_2.INIT=16'h0800; // @28:507429 CFG2 \un64_OIoO1[15] ( .A(OlI11_17), .B(iII11), .Y(un64_OIoO1_Z[15]) ); defparam \un64_OIoO1[15] .INIT=4'h8; // @28:503381 CFG4 un8_l00o1_1 ( .A(IOOi1), .B(Oiio1_RNI1B0P9_0), .C(Oiio1[0]), .D(Oiio1[10]), .Y(un8_l00o1_1_Z) ); defparam un8_l00o1_1.INIT=16'h3120; // @28:507233 CFG3 \OIoO1_0[12] ( .A(oioo1_Z), .B(iII11), .C(N_145), .Y(OIoO1_0_Z[12]) ); defparam \OIoO1_0[12] .INIT=8'h2E; // @28:504622 CFG3 io1o1_i_m2 ( .A(Ii1o1_Z), .B(N_190), .C(N_195), .Y(N_214) ); defparam io1o1_i_m2.INIT=8'hA3; // @28:507173 CFG4 \lI101_1_ns_1_0_.m7_1_0 ( .A(oioo1_Z), .B(un7_O0io1_i_0), .C(iII11), .D(OiI01[0]), .Y(N_8_1) ); defparam \lI101_1_ns_1_0_.m7_1_0 .INIT=16'h0405; // @28:507173 CFG4 \lI101_1_ns_1_0_.m4_1_0 ( .A(oioo1_Z), .B(un19_O0io1_i_0), .C(iII11), .D(OiI01[0]), .Y(N_5_1) ); defparam \lI101_1_ns_1_0_.m4_1_0 .INIT=16'h0405; // @28:507233 CFG3 \OIoO1_0[14] ( .A(oioo1_Z), .B(iII11), .C(OlI11_16), .Y(OIoO1_0_Z[14]) ); defparam \OIoO1_0[14] .INIT=8'hE2; // @28:505778 CFG4 Oooo1_0 ( .A(ll101), .B(IoIO1_1z), .C(un1_Oooo1_tz_tz_1_Z), .D(RD_BC_ERROR_c), .Y(Oooo1_0_Z) ); defparam Oooo1_0.INIT=16'hCCC8; // @28:504485 CFG4 lo1o1_i_0_o2_1_0 ( .A(N_196), .B(N_188), .C(Iloo1_Z), .D(N_370), .Y(lo1o1_i_0_o2_1) ); defparam lo1o1_i_0_o2_1_0.INIT=16'h7030; // @28:504485 CFG4 lo1o1_i_0_o2_0_1 ( .A(N_190), .B(N_195), .C(N_206), .D(lo1o1_i_0_o2_0_Z), .Y(lo1o1_i_0_o2_0_0_Z) ); defparam lo1o1_i_0_o2_0_1.INIT=16'hFF20; // @28:503368 CFG4 un4_l00o1_1 ( .A(OlI11_6), .B(N_147_i), .C(OlI11_9), .D(OlI11_0), .Y(un4_l00o1_1_0) ); defparam un4_l00o1_1.INIT=16'h0020; // @28:506608 CFG4 lIio1_0_a2_0_9_5 ( .A(il0o1_Z[20]), .B(O00o1_Z[6]), .C(lIio1_0_a2_0_9_3_Z), .D(OIio1_0_Z), .Y(lIio1_0_a2_0_9_5_Z) ); defparam lIio1_0_a2_0_9_5.INIT=16'h4000; // @28:505198 CFG4 iOoo1_i_1 ( .A(N_281), .B(N_234), .C(N_196), .D(N_188), .Y(iOoo1_i_1_Z) ); defparam iOoo1_i_1.INIT=16'hFCFE; // @28:504064 CFG4 il1o1_0_a2 ( .A(il0o1_Z[20]), .B(il0o1_Z[21]), .C(N_308), .D(N_230_6), .Y(il1o1) ); defparam il1o1_0_a2.INIT=16'h8000; // @28:507406 CFG4 un60_OIoO1 ( .A(iII11), .B(llio1_Z), .C(lO1o1_Z), .D(un4_OOio1_1_Z), .Y(un60_OIoO1_Z) ); defparam un60_OIoO1.INIT=16'h4000; // @28:506787 CFG3 un4_Ilio1 ( .A(lO1o1_Z), .B(un4_Ilio1_0_Z), .C(Io0o1_Z), .Y(un4_Ilio1_Z) ); defparam un4_Ilio1.INIT=8'h80; // @28:504837 CFG4 un4_OOoo1_0_a3 ( .A(iIoo1_Z), .B(l11o1_Z[0]), .C(l11o1_Z[1]), .D(N_201), .Y(N_524) ); defparam un4_OOoo1_0_a3.INIT=16'h0020; // @28:506500 CFG4 oOio1 ( .A(N_190), .B(O00o1_Z[5]), .C(Ii0o1_Z), .D(OIio1_0_Z), .Y(oOio1_Z) ); defparam oOio1.INIT=16'h4000; // @28:506711 CFG3 un3_iIio1_1 ( .A(lO1o1_Z), .B(llio1_Z), .C(Io0o1_Z), .Y(un3_iIio1_1_Z) ); defparam un3_iIio1_1.INIT=8'h80; // @28:505795 CFG3 un5_Oooo1 ( .A(un12_I1oo1_5_Z), .B(un7_I1oo1_Z), .C(un12_I1oo1_4_Z), .Y(un5_Oooo1_Z) ); defparam un5_Oooo1.INIT=8'hEC; // @28:504996 CFG2 lOoo1_i_o2 ( .A(N_358), .B(N_234), .Y(N_199) ); defparam lOoo1_i_o2.INIT=4'hE; // @28:505198 CFG4 iOoo1_i_o2_1 ( .A(Iloo1_Z), .B(iIoo1_Z), .C(l11o1_Z[1]), .D(l11o1_Z[0]), .Y(N_222) ); defparam iOoo1_i_o2_1.INIT=16'h533F; // @28:507233 CFG3 \OIoO1_0[2] ( .A(un60_OIoO1_Z), .B(iII11), .C(OlI11_2), .Y(OIoO1_0_Z[2]) ); defparam \OIoO1_0[2] .INIT=8'hEA; // @28:507233 CFG3 \OIoO1_0[11] ( .A(un60_OIoO1_Z), .B(iII11), .C(OlI11_13), .Y(OIoO1_0_Z[11]) ); defparam \OIoO1_0[11] .INIT=8'hEA; // @28:507233 CFG3 \OIoO1_0[9] ( .A(un60_OIoO1_Z), .B(iII11), .C(N_146), .Y(OIoO1_0_Z[9]) ); defparam \OIoO1_0[9] .INIT=8'hAE; // @28:507233 CFG3 \OIoO1_0[10] ( .A(un60_OIoO1_Z), .B(iII11), .C(OlI11_12), .Y(OIoO1_0_Z[10]) ); defparam \OIoO1_0[10] .INIT=8'hEA; // @28:506913 CFG4 un3_I0io1_10 ( .A(un3_I0io1_8_Z), .B(O00o1_Z[10]), .C(IO1o1_Z), .D(un3_I0io1_4_Z), .Y(un3_I0io1_10_Z) ); defparam un3_I0io1_10.INIT=16'h2000; // @28:504182 CFG4 \I11o1_i_1[0] ( .A(N_196), .B(N_225_2), .C(N_228), .D(N_358), .Y(I11o1_i_1_Z[0]) ); defparam \I11o1_i_1[0] .INIT=16'hFDF5; // @28:503368 CFG3 un4_l00o1_3 ( .A(OlI11_3), .B(OlI11_2), .C(un4_l00o1_1_0), .Y(un4_l00o1_3_Z) ); defparam un4_l00o1_3.INIT=8'h80; // @28:503381 CFG4 un8_l00o1_3 ( .A(OlI11_6), .B(OlI11_9), .C(un8_l00o1_2), .D(un8_l00o1_3_Z), .Y(un8_l00o1_3_0) ); defparam un8_l00o1_3.INIT=16'h1000; // @28:505541 CFG4 i0oo1 ( .A(IoIO1_1z), .B(un1_i0oo1_tz_0_Z), .C(io0o1), .D(RD_BC_ERROR_c), .Y(i0oo1_Z) ); defparam i0oo1.INIT=16'h0A08; // @28:506419 CFG4 OOio1_2 ( .A(llio1_Z), .B(un5_OOio1_2_Z), .C(lO1o1_Z), .D(un4_OOio1_1_Z), .Y(OOio1_2_Z) ); defparam OOio1_2.INIT=16'hA080; // @28:505306 CFG4 OIoo1_i_a2 ( .A(N_196), .B(N_200), .C(N_188), .D(OIoo1_i_a2_0), .Y(N_245) ); defparam OIoo1_i_a2.INIT=16'hF700; // @28:506849 CFG4 un3_olio1 ( .A(un2_Ilio1_2_Z), .B(l01o1_Z), .C(Oo0o1_Z), .D(lO1o1_Z), .Y(un3_olio1_Z) ); defparam un3_olio1.INIT=16'h0800; CFG4 un12_I1oo1_4_RNI9891A ( .A(un7_I1oo1_Z), .B(N_6), .C(un12_I1oo1_4_Z), .D(un12_I1oo1_5_Z), .Y(un12_I1oo1_4_RNI9891A_Z) ); defparam un12_I1oo1_4_RNI9891A.INIT=16'h0111; // @28:506608 CFG4 lIio1_0_a2_4 ( .A(lIio1_0_a2_4_0_Z), .B(N_230_6), .C(N_308), .D(N_309), .Y(lIio1_0_a2_4_Z) ); defparam lIio1_0_a2_4.INIT=16'h8000; // @28:506332 CFG4 oioo1 ( .A(OOio1_Z), .B(un1_oioo1_0_Z), .C(O0oo1_Z), .D(i00o1), .Y(oioo1_Z) ); defparam oioo1.INIT=16'hEAAA; // @28:506009 CFG4 un1_looo1 ( .A(Ii0o1_Z), .B(N_6), .C(Iooo1_Z), .D(oIio1_Z), .Y(un1_looo1_Z) ); defparam un1_looo1.INIT=16'hAA20; // @28:505658 CFG3 un25_I1oo1 ( .A(I00o1_Z[0]), .B(N_195), .C(N_309), .Y(un25_I1oo1_Z) ); defparam un25_I1oo1.INIT=8'hBA; // @28:507264 CFG2 un15_OIoO1 ( .A(oOio1_Z), .B(iII11), .Y(un15_OIoO1_Z) ); defparam un15_OIoO1.INIT=4'h2; // @28:503403 CFG2 \Ol0o1_0_RNO[5] ( .A(lolIo), .B(I1lIo[0]), .Y(Ol0o1_0_RNO_Z[5]) ); defparam \Ol0o1_0_RNO[5] .INIT=4'h8; // @28:507233 CFG4 \OIoO1_1[0] ( .A(oioo1_Z), .B(un60_OIoO1_Z), .C(iII11), .D(OlI11_0), .Y(OIoO1_1_Z[0]) ); defparam \OIoO1_1[0] .INIT=16'hFECE; // @28:507233 CFG4 \OIoO1_1[8] ( .A(oioo1_Z), .B(un60_OIoO1_Z), .C(iII11), .D(OlI11_10), .Y(OIoO1_1_Z[8]) ); defparam \OIoO1_1[8] .INIT=16'hFECE; // @28:506913 CFG4 un3_I0io1_11 ( .A(O00o1_Z[6]), .B(un3_I0io1_10_Z), .C(O00o1_Z[8]), .D(O00o1_Z[7]), .Y(un3_I0io1_11_Z) ); defparam un3_I0io1_11.INIT=16'h0800; // @28:504485 CFG4 lo1o1_i_0_o2_4 ( .A(O00o1_Z[5]), .B(oo1o1_Z), .C(N_254), .D(N_198), .Y(lo1o1_i_0_o2_4_Z) ); defparam lo1o1_i_0_o2_4.INIT=16'hFCF4; // @28:505599 CFG4 un1_I1oo1_1_tz_1 ( .A(O0oo1_Z), .B(un5_Oooo1_Z), .C(i1oo1_Z), .D(oIio1_Z), .Y(un1_I1oo1_1_tz_1_Z) ); defparam un1_I1oo1_1_tz_1.INIT=16'hFFF2; // @28:506903 CFG4 \I0io1_2_0_tz[1] ( .A(un2_I0io1_1_Z), .B(un2_Ilio1_0_Z), .C(Oo0o1_Z), .D(il1o1), .Y(I0io1_2_0_tz_Z[1]) ); defparam \I0io1_2_0_tz[1] .INIT=16'hFEEE; // @28:506197 CFG4 un3_iooo1 ( .A(N_6), .B(io0o1), .C(ll101), .D(O0oo1_Z), .Y(un3_iooo1_Z) ); defparam un3_iooo1.INIT=16'h00B0; CFG4 iIio1_RNO ( .A(un1_olio1_2_Z), .B(Oo0o1_Z), .C(un3_iIio1_1_Z), .D(il1o1), .Y(iIio1_RNO_Z) ); defparam iIio1_RNO.INIT=16'hF800; // @28:506274 CFG4 o1oo1_i ( .A(i1oo1_Z), .B(o1oo1_i_0_tz_1_Z), .C(i00o1), .D(io0o1), .Y(N_177) ); defparam o1oo1_i.INIT=16'hFF54; // @28:506006 CFG2 looo1 ( .A(un1_looo1_Z), .B(IoIO1_1z), .Y(looo1_Z) ); defparam looo1.INIT=4'h8; // @28:506219 CFG4 un7_iooo1 ( .A(N_190), .B(io0o1), .C(OO101), .D(O00o1_Z[5]), .Y(un7_iooo1_Z) ); defparam un7_iooo1.INIT=16'h3070; // @28:507261 CFG2 \un13_OIoO1[4] ( .A(un15_OIoO1_Z), .B(il0o1_Z[4]), .Y(un13_OIoO1_Z[4]) ); defparam \un13_OIoO1[4] .INIT=4'h8; // @28:507261 CFG2 \un13_OIoO1[6] ( .A(un15_OIoO1_Z), .B(il0o1_Z[6]), .Y(un13_OIoO1_Z[6]) ); defparam \un13_OIoO1[6] .INIT=4'h8; // @28:506836 CFG4 olio1 ( .A(Io0o1_Z), .B(un3_olio1_Z), .C(un1_olio1_2_Z), .D(un1_olio1_0_Z), .Y(olio1_Z) ); defparam olio1.INIT=16'hECCC; // @28:507173 CFG3 \lI101_1_ns_1_0_.N_5_i ( .A(N_147_i), .B(N_5_1), .C(iII11), .Y(N_5_i) ); defparam \lI101_1_ns_1_0_.N_5_i .INIT=8'h23; // @28:507173 CFG3 \lI101_1_ns_1_0_.N_8_i ( .A(N_24_i), .B(N_8_1), .C(iII11), .Y(N_8_i) ); defparam \lI101_1_ns_1_0_.N_8_i .INIT=8'h23; // @28:504412 CFG4 \l11o1_RNO[1] ( .A(N_197), .B(I11o1_i_a2_1_Z[1]), .C(N_201), .D(N_225), .Y(N_174_i) ); defparam \l11o1_RNO[1] .INIT=16'h0007; // @28:504646 CFG4 Ii1o1_RNO ( .A(N_195), .B(oo1o1_Z), .C(N_193), .D(N_214), .Y(N_180_i) ); defparam Ii1o1_RNO.INIT=16'h0E00; // @28:507233 CFG4 \OIoO1_1[4] ( .A(oioo1_Z), .B(un13_OIoO1_Z[4]), .C(iII11), .D(Oiio1_RNI7H0P9_0), .Y(OIoO1_1_Z[4]) ); defparam \OIoO1_1[4] .INIT=16'hCEFE; // @28:507233 CFG4 \OIoO1_1[1] ( .A(un60_OIoO1_Z), .B(un15_OIoO1_Z), .C(il0o1_Z[1]), .D(un64_OIoO1_Z[1]), .Y(OIoO1_1_Z[1]) ); defparam \OIoO1_1[1] .INIT=16'hFFEA; // @28:507233 CFG4 \OIoO1_1[6] ( .A(oioo1_Z), .B(un13_OIoO1_Z[6]), .C(iII11), .D(OlI11_6), .Y(OIoO1_1_Z[6]) ); defparam \OIoO1_1[6] .INIT=16'hFECE; // @28:507233 CFG4 \OIoO1_1[3] ( .A(un60_OIoO1_Z), .B(un15_OIoO1_Z), .C(il0o1_Z[3]), .D(un64_OIoO1_Z[3]), .Y(OIoO1_1_Z[3]) ); defparam \OIoO1_1[3] .INIT=16'hFFEA; // @28:507233 CFG3 \OIoO1_2[8] ( .A(OIoO1_1_Z[8]), .B(un15_OIoO1_Z), .C(il0o1_Z[8]), .Y(OIoO1_2_Z[8]) ); defparam \OIoO1_2[8] .INIT=8'hEA; // @28:507233 CFG4 OIoO1_1775_0_0 ( .A(il0o1_Z[7]), .B(iII11), .C(un15_OIoO1_Z), .D(OlI11_7), .Y(OIoO1_1775_0_0_Z) ); defparam OIoO1_1775_0_0.INIT=16'hECA0; // @28:507233 CFG4 OIoO1_1776_0_0 ( .A(il0o1_Z[5]), .B(iII11), .C(un15_OIoO1_Z), .D(OlI11_5), .Y(OIoO1_1776_0_0_Z) ); defparam OIoO1_1776_0_0.INIT=16'hECA0; // @28:506903 CFG4 i1oo1_RNO ( .A(i1oo1_Z), .B(o1oo1_i_0_tz_1_Z), .C(i00o1), .D(io0o1), .Y(N_177_i) ); defparam i1oo1_RNO.INIT=16'h00AB; // @28:506197 CFG4 un2_iooo1_0 ( .A(Iooo1_Z), .B(Ii0o1_Z), .C(N_6), .D(un7_iooo1_Z), .Y(un2_iooo1_0_Z) ); defparam un2_iooo1_0.INIT=16'hFFA2; // @28:505778 CFG4 Oooo1 ( .A(un5_Oooo1_Z), .B(un25_I1oo1_Z), .C(Oooo1_0_Z), .D(N_6), .Y(Oooo1_Z) ); defparam Oooo1.INIT=16'h0080; // @28:504485 CFG4 lo1o1_i_0_o2 ( .A(lo1o1_i_0_o2_1), .B(lo1o1_i_0_o2_0_0_Z), .C(lo1o1_i_0_o2_4_Z), .D(N_258), .Y(lo1o1_i_0_o2_Z) ); defparam lo1o1_i_0_o2.INIT=16'hFFFE; // @28:506608 CFG4 lIio1_0_a2_0_9 ( .A(N_308), .B(N_309), .C(lIio1_0_a2_0_9_5_Z), .D(un5_Oooo1_Z), .Y(lIio1_0_a2_0_9_Z) ); defparam lIio1_0_a2_0_9.INIT=16'h8000; // @28:505599 CFG4 un1_I1oo1_3_tz ( .A(ll101), .B(O0oo1_Z), .C(un12_I1oo1_4_RNI9891A_Z), .D(un5_Oooo1_Z), .Y(un1_I1oo1_3_tz_Z) ); defparam un1_I1oo1_3_tz.INIT=16'h20A8; // @28:506138 CFG2 \il101ce[10] ( .A(looo1_Z), .B(iOl01), .Y(il101ce_Z[10]) ); defparam \il101ce[10] .INIT=4'h8; // @28:507236 CFG2 un3_OIoO1 ( .A(N_177), .B(iII11), .Y(un3_OIoO1_Z) ); defparam un3_OIoO1.INIT=4'h1; // @28:504996 CFG3 lOoo1_i_o2_3 ( .A(N_364_1), .B(IIoo1_Z), .C(N_1930), .Y(N_365) ); defparam lOoo1_i_o2_3.INIT=8'hBA; // @28:505266 CFG4 Oloo1_RNO ( .A(N_222), .B(oIoo1_Z), .C(iOoo1_i_1_Z), .D(N_188), .Y(N_176_i) ); defparam Oloo1_RNO.INIT=16'h0D0F; // @28:505350 CFG4 Iloo1_RNO ( .A(N_200), .B(N_188), .C(N_245), .D(N_193), .Y(N_44_i) ); defparam Iloo1_RNO.INIT=16'h000E; // @28:507233 CFG4 \OIoO1_2[11] ( .A(il0o1_Z[11]), .B(OIoO1_0_Z[11]), .C(un15_OIoO1_Z), .D(un3_OIoO1_Z), .Y(OIoO1_2_Z[11]) ); defparam \OIoO1_2[11] .INIT=16'hFFEC; // @28:507233 CFG4 \OIoO1_2[9] ( .A(il0o1_Z[9]), .B(OIoO1_0_Z[9]), .C(un15_OIoO1_Z), .D(un3_OIoO1_Z), .Y(OIoO1_2_Z[9]) ); defparam \OIoO1_2[9] .INIT=16'hFFEC; // @28:503403 CFG3 \Ol0o1_0[2] ( .A(l00o1_Z), .B(lolIo), .C(lilIo56_1), .Y(Ol0o1_0_Z[2]) ); defparam \Ol0o1_0[2] .INIT=8'hBA; // @28:504996 CFG4 lOoo1_i_1 ( .A(N_188), .B(N_196), .C(N_362), .D(N_199), .Y(lOoo1_i_1_Z) ); defparam lOoo1_i_1.INIT=16'hFF74; // @28:507333 CFG3 un38_OIoO1 ( .A(Ilio1_Z), .B(iII11), .C(IO1o1_Z), .Y(un38_OIoO1_Z) ); defparam un38_OIoO1.INIT=8'h20; // @28:503416 CFG3 \un5_Ol0o1_0[7] ( .A(IilIo), .B(I1lIo[2]), .C(l00o1_Z), .Y(un5_Ol0o1_0_Z[7]) ); defparam \un5_Ol0o1_0[7] .INIT=8'h0E; // @28:506700 CFG4 iIio1 ( .A(iIio1_RNO_Z), .B(io0o1), .C(Olio1_Z), .D(IoIO1_1z), .Y(iIio1_Z) ); defparam iIio1.INIT=16'hBA00; // @28:506106 CFG3 \lioo1[0] ( .A(looo1_Z), .B(il0o1_Z[0]), .C(il101[0]), .Y(lioo1_Z[0]) ); defparam \lioo1[0] .INIT=8'hD8; // @28:506106 CFG3 \lioo1[1] ( .A(looo1_Z), .B(il0o1_Z[1]), .C(il101[1]), .Y(lioo1_Z[1]) ); defparam \lioo1[1] .INIT=8'hD8; // @28:506106 CFG3 \lioo1[4] ( .A(looo1_Z), .B(il0o1_Z[4]), .C(il101[4]), .Y(lioo1_Z[4]) ); defparam \lioo1[4] .INIT=8'hD8; // @28:506106 CFG3 \lioo1[5] ( .A(looo1_Z), .B(il0o1_Z[5]), .C(il101[5]), .Y(lioo1_Z[5]) ); defparam \lioo1[5] .INIT=8'hD8; // @28:506106 CFG3 \lioo1[6] ( .A(looo1_Z), .B(il0o1_Z[6]), .C(il101[6]), .Y(lioo1_Z[6]) ); defparam \lioo1[6] .INIT=8'hD8; // @28:506106 CFG3 \lioo1[7] ( .A(looo1_Z), .B(il0o1_Z[7]), .C(il101[7]), .Y(lioo1_Z[7]) ); defparam \lioo1[7] .INIT=8'hD8; // @28:506106 CFG3 \lioo1[9] ( .A(looo1_Z), .B(il0o1_Z[9]), .C(il101[9]), .Y(lioo1_Z[9]) ); defparam \lioo1[9] .INIT=8'hD8; // @28:506106 CFG3 \lioo1[11] ( .A(looo1_Z), .B(il0o1_Z[11]), .C(il101[11]), .Y(lioo1_Z[11]) ); defparam \lioo1[11] .INIT=8'hD8; // @28:506106 CFG3 \lioo1[12] ( .A(looo1_Z), .B(il0o1_Z[12]), .C(il101[12]), .Y(lioo1_Z[12]) ); defparam \lioo1[12] .INIT=8'hD8; // @28:507233 CFG3 \OIoO1_1[10] ( .A(iII11), .B(oioo1_Z), .C(N_177), .Y(OIoO1_1[2]) ); defparam \OIoO1_1[10] .INIT=8'h45; // @28:504996 CFG4 lOoo1_i_a2 ( .A(l11o1_Z[0]), .B(Iloo1_Z), .C(N_362), .D(N_364_1), .Y(N_236) ); defparam lOoo1_i_a2.INIT=16'hBBB0; // @28:506106 CFG3 \lioo1[15] ( .A(looo1_Z), .B(il0o1_Z[15]), .C(il101[15]), .Y(lioo1_Z[15]) ); defparam \lioo1[15] .INIT=8'hD8; // @28:506106 CFG3 \lioo1[13] ( .A(looo1_Z), .B(il0o1_Z[13]), .C(il101[13]), .Y(lioo1_Z[13]) ); defparam \lioo1[13] .INIT=8'hD8; // @28:506106 CFG3 \lioo1[8] ( .A(looo1_Z), .B(il0o1_Z[8]), .C(il101[8]), .Y(lioo1_Z[8]) ); defparam \lioo1[8] .INIT=8'hD8; // @28:506106 CFG3 \lioo1[3] ( .A(looo1_Z), .B(il0o1_Z[3]), .C(il101[3]), .Y(lioo1_Z[3]) ); defparam \lioo1[3] .INIT=8'hD8; // @28:506106 CFG3 \lioo1[2] ( .A(looo1_Z), .B(il0o1_Z[2]), .C(il101[2]), .Y(lioo1_Z[2]) ); defparam \lioo1[2] .INIT=8'hD8; // @28:503416 CFG3 \un5_Ol0o1[1] ( .A(lliO1_1_iv_1[1]), .B(l00o1_Z), .C(lilIo54), .Y(un5_Ol0o1_Z[1]) ); defparam \un5_Ol0o1[1] .INIT=8'h32; // @28:504956 CFG4 lIoo1_RNO ( .A(IOoo1_i_a2_0_Z), .B(N_193), .C(N_358), .D(N_1930), .Y(N_179_i) ); defparam lIoo1_RNO.INIT=16'h0103; // @28:504412 CFG3 \l11o1_RNO[0] ( .A(N_1930), .B(I11o1_i_1_Z[0]), .C(N_205), .Y(N_175_i) ); defparam \l11o1_RNO[0] .INIT=8'h13; // @28:477703 CFG3 \un1_oi1o1_0_m2[0] ( .A(lo1o1_i_0_o2_Z), .B(IoIO1_1z), .C(N_184), .Y(un1_oi1o1_0_m2_Z[0]) ); defparam \un1_oi1o1_0_m2[0] .INIT=8'h74; // @28:503416 CFG4 \un5_Ol0o1[6] ( .A(lilIo52_RNIDMMEA), .B(l00o1_Z), .C(lilIo56), .D(lliO1_1_iv_0[6]), .Y(un5_Ol0o1_Z[6]) ); defparam \un5_Ol0o1[6] .INIT=16'h3332; // @28:507233 CFG4 \OIoO1_2[2] ( .A(il0o1_Z[2]), .B(OIoO1_0_Z[2]), .C(un15_OIoO1_Z), .D(OIoO1_1[2]), .Y(OIoO1_2_Z[2]) ); defparam \OIoO1_2[2] .INIT=16'hFFEC; // @28:507233 CFG4 \OIoO1_2[10] ( .A(il0o1_Z[10]), .B(OIoO1_0_Z[10]), .C(un15_OIoO1_Z), .D(OIoO1_1[2]), .Y(OIoO1_2_Z[10]) ); defparam \OIoO1_2[10] .INIT=16'hFFEC; // @28:503403 CFG4 \Ol0o1_1[3] ( .A(lilIo55), .B(lilIo51), .C(I0lIo[3]), .D(l00o1_Z), .Y(Ol0o1_1_Z[3]) ); defparam \Ol0o1_1[3] .INIT=16'hFFEA; // @28:506945 CFG4 \I0io1_1[0] ( .A(Ilio1_Z), .B(N_177), .C(llio1_Z), .D(olio1_Z), .Y(I0io1_1_Z[0]) ); defparam \I0io1_1[0] .INIT=16'hFFB3; // @28:507132 CFG4 un19_O0io1_1_0 ( .A(Ilio1_Z), .B(i0oo1_Z), .C(Oo0o1_Z), .D(Oooo1_Z), .Y(un19_O0io1_1) ); defparam un19_O0io1_1_0.INIT=16'hFFEC; // @28:507132 CFG3 un19_O0io1_0_0 ( .A(looo1_Z), .B(Ilio1_Z), .C(llio1_Z), .Y(un19_O0io1_0) ); defparam un19_O0io1_0_0.INIT=8'hEA; // @28:507090 CFG4 un7_O0io1_1 ( .A(Oooo1_Z), .B(looo1_Z), .C(i0oo1_Z), .D(Ilio1_Z), .Y(un7_O0io1_1_Z) ); defparam un7_O0io1_1.INIT=16'hFFFE; // @28:506608 CFG4 lIio1_0_0 ( .A(lIio1_0_a2_4_Z), .B(O00o1_Z[5]), .C(lIio1_0_a2_0_9_Z), .D(N_198), .Y(lIio1) ); defparam lIio1_0_0.INIT=16'h00C8; // @28:503403 CFG4 \Ol0o1_0_RNO[4] ( .A(N_57), .B(lolIo), .C(N_66), .D(i5_mux), .Y(Ol0o1_0_RNO_Z[4]) ); defparam \Ol0o1_0_RNO[4] .INIT=16'h8C80; // @28:503403 CFG4 \Ol0o1_0[5] ( .A(l00o1_Z), .B(IilIo), .C(Ol0o1_0_RNO_Z[5]), .D(un1_lilIo56_i), .Y(Ol0o1[5]) ); defparam \Ol0o1_0[5] .INIT=16'hFEBA; // @28:507233 CFG4 \OIoO1_3[0] ( .A(OIoO1_1_Z[0]), .B(il0o1_Z[0]), .C(un38_OIoO1_Z), .D(un15_OIoO1_Z), .Y(OIoO1_3_0[0]) ); defparam \OIoO1_3[0] .INIT=16'hEEEA; // @28:507233 CFG3 \OIoO1_3[2] ( .A(un38_OIoO1_Z), .B(OIoO1_2_Z[2]), .C(il0o1_Z[2]), .Y(OIoO1_3_Z[2]) ); defparam \OIoO1_3[2] .INIT=8'hEC; // @28:507233 CFG4 \OIoO1_3[1] ( .A(il0o1_Z[1]), .B(OIoO1_1_Z[1]), .C(un38_OIoO1_Z), .D(un3_OIoO1_Z), .Y(OIoO1_3_Z[1]) ); defparam \OIoO1_3[1] .INIT=16'hFFEC; // @28:507233 CFG4 \OIoO1_3[3] ( .A(il0o1_Z[3]), .B(OIoO1_1_Z[3]), .C(un38_OIoO1_Z), .D(un3_OIoO1_Z), .Y(OIoO1_3_Z[3]) ); defparam \OIoO1_3[3] .INIT=16'hFFEC; // @28:506553 CFG3 un2_OIio1_1 ( .A(lIio1), .B(oOio1_Z), .C(Ilio1_Z), .Y(un2_OIio1_1_Z) ); defparam un2_OIio1_1.INIT=8'h01; // @28:503403 CFG4 \Ol0o1[3] ( .A(Ol0o1_1_Z[3]), .B(lilIo56), .C(lilIo53), .D(lilIo52), .Y(Ol0o1_Z[3]) ); defparam \Ol0o1[3] .INIT=16'hFFFE; CFG4 IO1o1_RNI5IQ17 ( .A(Oo0o1_Z), .B(Ilio1_Z), .C(iII11), .D(IO1o1_Z), .Y(OIoO1_3_Z[0]) ); defparam IO1o1_RNI5IQ17.INIT=16'h080C; // @28:505596 CFG4 I1oo1 ( .A(IoIO1_1z), .B(un25_I1oo1_Z), .C(un1_I1oo1_3_tz_Z), .D(un1_I1oo1_1_Z), .Y(I1oo1_Z) ); defparam I1oo1.INIT=16'hAA80; // @28:506192 CFG4 iooo1 ( .A(un3_iooo1_Z), .B(un2_iooo1_0_Z), .C(o0oo1_Z), .D(IoIO1_1z), .Y(iooo1_Z) ); defparam iooo1.INIT=16'hFEF0; // @28:503416 CFG4 \un5_Ol0o1_1[7] ( .A(lolIo), .B(un1_lilIo56_i), .C(IilIo), .D(un5_Ol0o1_0_Z[7]), .Y(un5_Ol0o1[7]) ); defparam \un5_Ol0o1_1[7] .INIT=16'hCA00; // @28:506945 CFG4 \I0io1_2[0] ( .A(Oo0o1_Z), .B(oIio1_Z), .C(lIio1), .D(Ilio1_Z), .Y(I0io1_2_Z[0]) ); defparam \I0io1_2[0] .INIT=16'hBA30; // @28:503403 CFG4 \Ol0o1[2] ( .A(Ol0o1_0_Z[2]), .B(lilIo53), .C(un1_lilIo56_i_2), .D(I0lIo_m[2]), .Y(Ol0o1_Z[2]) ); defparam \Ol0o1[2] .INIT=16'hFFFE; CFG2 Ilio1_RNICD455 ( .A(Ilio1_Z), .B(iII11), .Y(Ilio1_RNICD455_Z) ); defparam Ilio1_RNICD455.INIT=4'h2; // @28:505064 CFG4 oIoo1_RNO ( .A(N_370), .B(N_365), .C(N_236), .D(lOoo1_i_1_Z), .Y(N_40_i) ); defparam oIoo1_RNO.INIT=16'h000B; // @28:507132 CFG4 un19_O0io1_3 ( .A(un19_O0io1_1), .B(I1oo1_Z), .C(oIio1_Z), .D(lIio1), .Y(un19_O0io1_3_Z) ); defparam un19_O0io1_3.INIT=16'hEAEE; // @28:507090 CFG4 un7_O0io1 ( .A(un7_O0io1_1_Z), .B(I1oo1_Z), .C(ilio1_Z), .D(iIio1_Z), .Y(un7_O0io1_i_0) ); defparam un7_O0io1.INIT=16'hFFFE; // @28:503403 CFG4 \Ol0o1_0[4] ( .A(l00o1_Z), .B(IilIo), .C(Ol0o1_0_RNO_Z[4]), .D(un1_lilIo56_i), .Y(Ol0o1[4]) ); defparam \Ol0o1_0[4] .INIT=16'hFEBA; // @28:507132 CFG4 un19_O0io1 ( .A(iIio1_Z), .B(un19_O0io1_3_Z), .C(ilio1_Z), .D(un19_O0io1_0), .Y(un19_O0io1_i_0) ); defparam un19_O0io1.INIT=16'hFFFE; // @28:506547 CFG4 OIio1 ( .A(un1_OIio1_0_Z), .B(OIio1_0_Z), .C(un2_OIio1_1_Z), .D(iIio1_Z), .Y(OIio1_Z) ); defparam OIio1.INIT=16'h88C8; // @28:503416 CFG4 \un5_Ol0o1[0] ( .A(I0lIo_m[0]), .B(lilIo52_RNIDMMEA), .C(l00o1_Z), .D(lilIo54), .Y(un5_Ol0o1_Z[0]) ); defparam \un5_Ol0o1[0] .INIT=16'h0F0E; // @28:506452 CFG2 un3_IOio1 ( .A(OIio1_Z), .B(oOio1_Z), .Y(un3_IOio1_Z) ); defparam un3_IOio1.INIT=4'hE; // @28:506903 CFG4 \I0io1_1[1] ( .A(Ilio1_Z), .B(I0io1_2_0_tz_Z[1]), .C(OIio1_Z), .D(N_177), .Y(I0io1_1_Z[1]) ); defparam \I0io1_1[1] .INIT=16'hEAFF; // @28:506945 CFG3 \I0io1_5[0] ( .A(un3_I0io1_11_Z), .B(OIio1_Z), .C(oi0o1_Z), .Y(I0io1_5_Z[0]) ); defparam \I0io1_5[0] .INIT=8'hC8; // @28:506945 CFG4 \I0io1_4[0] ( .A(I0io1_2_Z[0]), .B(un10_I0io1_0_0_Z), .C(OIio1_Z), .D(I0io1_1_Z[0]), .Y(I0io1_4_Z[0]) ); defparam \I0io1_4[0] .INIT=16'hFFEA; // @28:506903 CFG4 \I0io1[1] ( .A(un3_I0io1_11_Z), .B(Ol1o1_Z), .C(I0io1_1_Z[1]), .D(OIio1_Z), .Y(I0io1_Z[1]) ); defparam \I0io1[1] .INIT=16'hFEF0; // @28:507282 CFG3 un30_OIoO1 ( .A(iII11), .B(OIio1_Z), .C(I0io1_Z[1]), .Y(un30_OIoO1_Z) ); defparam un30_OIoO1.INIT=8'h04; // @28:507307 CFG4 un22_OIoO1 ( .A(iII11), .B(OIio1_Z), .C(I0io1_5_Z[0]), .D(I0io1_4_Z[0]), .Y(un22_OIoO1_Z) ); defparam un22_OIoO1.INIT=16'h0004; // @28:506444 CFG4 IOio1 ( .A(olio1_Z), .B(un3_IOio1_Z), .C(IoIO1_1z), .D(oioo1_Z), .Y(IOio1_Z) ); defparam IOio1.INIT=16'hF040; // @28:477703 CFG4 \un6_I0io1_1[0] ( .A(OlI11_9), .B(iII11), .C(I0io1_4_Z[0]), .D(I0io1_5_Z[0]), .Y(un6_I0io1_1_Z[0]) ); defparam \un6_I0io1_1[0] .INIT=16'hBBB8; // @28:477703 CFG3 \un6_I0io1[0] ( .A(OlI11_19), .B(I0io1_Z[1]), .C(iII11), .Y(un6_I0io1_Z[0]) ); defparam \un6_I0io1[0] .INIT=8'hAC; // @28:507233 CFG4 OIoO1_1775_0 ( .A(il0o1_Z[7]), .B(OIoO1_1775_0_0_Z), .C(un38_OIoO1_Z), .D(un22_OIoO1_Z), .Y(OIoO1[7]) ); defparam OIoO1_1775_0.INIT=16'hEEEC; // @28:507233 CFG4 \OIoO1[0] ( .A(OIoO1_3_Z[0]), .B(il0o1_Z[0]), .C(un22_OIoO1_Z), .D(OIoO1_3_0[0]), .Y(OIoO1_Z[0]) ); defparam \OIoO1[0] .INIT=16'hFFEA; // @28:507233 CFG4 \OIoO1[1] ( .A(OIoO1_3_Z[0]), .B(il0o1_Z[1]), .C(un22_OIoO1_Z), .D(OIoO1_3_Z[1]), .Y(OIoO1_Z[1]) ); defparam \OIoO1[1] .INIT=16'hFFEA; // @28:507233 CFG4 \OIoO1[8] ( .A(il0o1_Z[8]), .B(OIoO1_2_Z[8]), .C(Ilio1_RNICD455_Z), .D(un30_OIoO1_Z), .Y(OIoO1_Z[8]) ); defparam \OIoO1[8] .INIT=16'hFEFC; // @28:507233 CFG4 \OIoO1[9] ( .A(il0o1_Z[9]), .B(Ilio1_RNICD455_Z), .C(OIoO1_2_Z[9]), .D(un30_OIoO1_Z), .Y(OIoO1_Z[9]) ); defparam \OIoO1[9] .INIT=16'hFEFC; // @28:507233 CFG4 \OIoO1[14] ( .A(OIoO1_0_Z[14]), .B(il0o1_Z[14]), .C(un30_OIoO1_Z), .D(un15_OIoO1_Z), .Y(OIoO1_Z[14]) ); defparam \OIoO1[14] .INIT=16'hEEEA; // @28:507233 CFG4 \OIoO1[4] ( .A(il0o1_Z[4]), .B(OIoO1_1_Z[4]), .C(un38_OIoO1_Z), .D(un22_OIoO1_Z), .Y(OIoO1_Z[4]) ); defparam \OIoO1[4] .INIT=16'hEEEC; // @28:507233 CFG4 \OIoO1[6] ( .A(il0o1_Z[6]), .B(OIoO1_1_Z[6]), .C(un38_OIoO1_Z), .D(un22_OIoO1_Z), .Y(OIoO1_Z[6]) ); defparam \OIoO1[6] .INIT=16'hEEEC; // @28:507233 CFG4 \OIoO1[3] ( .A(OIoO1_3_Z[0]), .B(il0o1_Z[3]), .C(un22_OIoO1_Z), .D(OIoO1_3_Z[3]), .Y(OIoO1_Z[3]) ); defparam \OIoO1[3] .INIT=16'hFFEA; // @28:507233 CFG4 \OIoO1[13] ( .A(un15_OIoO1_Z), .B(un30_OIoO1_Z), .C(il0o1_Z[13]), .D(un64_OIoO1_Z[13]), .Y(OIoO1_Z[13]) ); defparam \OIoO1[13] .INIT=16'hFFE0; // @28:507233 CFG4 \OIoO1[12] ( .A(OIoO1_0_Z[12]), .B(il0o1_Z[12]), .C(un30_OIoO1_Z), .D(un15_OIoO1_Z), .Y(OIoO1_Z[12]) ); defparam \OIoO1[12] .INIT=16'hEEEA; // @28:507233 CFG4 \OIoO1[11] ( .A(il0o1_Z[11]), .B(Ilio1_RNICD455_Z), .C(OIoO1_2_Z[11]), .D(un30_OIoO1_Z), .Y(OIoO1_Z[11]) ); defparam \OIoO1[11] .INIT=16'hFEFC; // @28:507233 CFG4 \OIoO1[2] ( .A(OIoO1_3_Z[0]), .B(il0o1_Z[2]), .C(un22_OIoO1_Z), .D(OIoO1_3_Z[2]), .Y(OIoO1_Z[2]) ); defparam \OIoO1[2] .INIT=16'hFFEA; // @28:507233 CFG4 \OIoO1[10] ( .A(il0o1_Z[10]), .B(Ilio1_RNICD455_Z), .C(OIoO1_2_Z[10]), .D(un30_OIoO1_Z), .Y(OIoO1_Z[10]) ); defparam \OIoO1[10] .INIT=16'hFEFC; // @28:507233 CFG4 \OIoO1[15] ( .A(un15_OIoO1_Z), .B(un30_OIoO1_Z), .C(il0o1_Z[15]), .D(un64_OIoO1_Z[15]), .Y(OIoO1_Z[15]) ); defparam \OIoO1[15] .INIT=16'hFFE0; // @28:507233 CFG4 OIoO1_1776_0 ( .A(il0o1_Z[5]), .B(OIoO1_1776_0_0_Z), .C(un38_OIoO1_Z), .D(un22_OIoO1_Z), .Y(OIoO1[5]) ); defparam OIoO1_1776_0.INIT=16'hEEEC; // @28:503225 CTSE_R10B8B_1 Ooio1 ( .I0lIo_m_2(I0lIo_m[2]), .I0lIo_m_0(I0lIo_m[0]), .ol0o1_0(ol0o1[0]), .lliO1_1_iv_0_0(lliO1_1_iv_0[6]), .I1lIo_0(I1lIo[0]), .I1lIo_2(I1lIo[2]), .lliO1_1_iv_1_0(lliO1_1_iv_1[1]), .Oiio1({Oiio1[19], N_15092, Oiio1[17:12], N_15091, Oiio1[10:9], N_15090, Oiio1[7:2], N_15089, Oiio1[0]}), .Il0o1(Il0o1[2:1]), .I0lIo_0(I0lIo[3]), .OlI11_5(OlI11_5), .OlI11_0(OlI11_0), .OlI11_2(OlI11_2), .OlI11_3(OlI11_3), .OlI11_7(OlI11_7), .OlI11_6(OlI11_6), .OlI11_9(OlI11_9), .lI0o1_0(lI0o1_Z[0]), .OlI11_i_2(OlI11_i_2), .OlI11_i_0(OlI11_i_0), .Oiio1_RNI1B0P9_0(Oiio1_RNI1B0P9_0), .Oiio1_RNI7H0P9_0(Oiio1_RNI7H0P9_0), .i5_mux(i5_mux), .IoIO1(IoIO1_1z), .oO0Io(oO0Io_0), .un8_l00o1_1(un8_l00o1_1_Z), .i2_mux_0(i2_mux), .un1_lilIo56_i_2(un1_lilIo56_i_2), .lilIo52_RNIDMMEA_1z(lilIo52_RNIDMMEA), .O00o1_N_3_mux_i_1z(O00o1_N_3_mux_i), .un8_l00o1_3(un8_l00o1_3_Z), .un8_l00o1_2(un8_l00o1_2), .N_66(N_66), .lilIo53_1z(lilIo53), .lilIo54_1z(lilIo54), .lilIo55_1z(lilIo55), .lilIo56_1z(lilIo56), .lilIo52_1z(lilIo52), .un1_lilIo56_i(un1_lilIo56_i), .lilIo56_1_1z(lilIo56_1), .lilIo51_1z(lilIo51), .lolIo_1z(lolIo), .OO0Io_1z(OO0Io_0), .IO0Io(IO0Io_0), .IOOi1(IOOi1), .N_7211_2(N_7211_2), .N_147_i(N_147_i), .IilIo(IilIo), .N_7215_1(N_7215_1), .N_57(N_57) ); // @28:503295 CTSE_R10B8B_0 loio1 ( .lliO1_0_iv_i_0(lliO1_0_iv_i[4]), .lliO1_0_iv_i_1(lliO1_0_iv_i[5]), .lliO1_0_iv_i_3(lliO1_0_iv_i[7]), .Ol0o1_3(Ol0o1[11]), .Ol0o1_0(Ol0o1[8]), .Ol0o1_2(Ol0o1[10]), .Ol0o1_1(Ol0o1[9]), .Ol0o1_6(Ol0o1[14]), .i1Oi1_9(i1Oi1_9), .i1Oi1_5(i1Oi1_5), .i1Oi1_2(i1Oi1_2), .i1Oi1_0(i1Oi1_0), .i1Oi1_6(i1Oi1_6), .Oiio1_9(Oiio1[19]), .Oiio1_5(Oiio1[15]), .Oiio1_2(Oiio1[12]), .Oiio1_0(Oiio1[10]), .Oiio1_6(Oiio1[16]), .Il0o1(Il0o1[5:4]), .OlI11_0(OlI11_10), .OlI11_3(OlI11_13), .OlI11_2(OlI11_12), .OlI11_5(OlI11_15), .OlI11_6(OlI11_16), .OlI11_9(OlI11_19), .OlI11_7(OlI11_17), .lI0o1_0(lI0o1_Z[1]), .OlI11_i_0(OlI11_i_10), .OlI11_i_2(OlI11_i_12), .IoIO1(IoIO1_1z), .IO0Io(IO0Io), .N_5_i(N_5_i_0), .oO0Io(oO0Io), .O00o1_N_3_mux_i_1z(O00o1_N_3_mux_i_0), .IOOi1(IOOi1), .OO0Io_1z(OO0Io), .N_146_i_0(N_146_i_0), .N_146(N_146), .N_24_i(N_24_i), .N_145(N_145) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEREX_PCS_0s_26s_1s */ module CTSE_PEANX_SYNC_1s_26s ( ii001_0, l0101, OiO11, i0101, IiO11, N_265, iio01_2_i, OOi01lde_i_a2_13, OOi01lde_i_a2_14, OOi01lde_i_a2_18, Illi0_i, i1o01_1z, Ooo01_1z, ioO11_1z, Ioo01_1z, lOo01_1z, loo01_2z, ooo01_2z, ioo01_2z, Oio01_1z, Iio01_1z, lio01_1z, oio01_2z, o1o01_1z, IOi01_1z, lOi01_1z, O0101, I0101_1z, Oo101, Io101, i1101, o1101, I1101_1z, l1101, lOI11, oOI11, IoIO1, ll101, RD_BC_ERROR_c, OO101_1z, PF_IOD_CDR_CCC_C0_0_TX_CLK_G, oi001_i, l1o01_1z ) ; input ii001_0 ; input [15:0] l0101 ; output [15:0] OiO11 ; input [15:0] i0101 ; output [15:0] IiO11 ; output N_265 ; output iio01_2_i ; input OOi01lde_i_a2_13 ; input OOi01lde_i_a2_14 ; input OOi01lde_i_a2_18 ; input Illi0_i ; output i1o01_1z ; output Ooo01_1z ; output ioO11_1z ; output Ioo01_1z ; output lOo01_1z ; output loo01_2z ; output ooo01_2z ; output ioo01_2z ; output Oio01_1z ; output Iio01_1z ; output lio01_1z ; output oio01_2z ; output o1o01_1z ; output IOi01_1z ; output lOi01_1z ; input O0101 ; input I0101_1z ; input Oo101 ; input Io101 ; input i1101 ; input o1101 ; input I1101_1z ; input l1101 ; input lOI11 ; input oOI11 ; input IoIO1 ; input ll101 ; input RD_BC_ERROR_c ; input OO101_1z ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; input oi001_i ; output l1o01_1z ; wire ii001_0 ; wire N_265 ; wire iio01_2_i ; wire OOi01lde_i_a2_13 ; wire OOi01lde_i_a2_14 ; wire OOi01lde_i_a2_18 ; wire Illi0_i ; wire i1o01_1z ; wire Ooo01_1z ; wire ioO11_1z ; wire Ioo01_1z ; wire lOo01_1z ; wire loo01_2z ; wire ooo01_2z ; wire ioo01_2z ; wire Oio01_1z ; wire Iio01_1z ; wire lio01_1z ; wire oio01_2z ; wire o1o01_1z ; wire IOi01_1z ; wire lOi01_1z ; wire O0101 ; wire I0101_1z ; wire Oo101 ; wire Io101 ; wire i1101 ; wire o1101 ; wire I1101_1z ; wire l1101 ; wire lOI11 ; wire oOI11 ; wire IoIO1 ; wire ll101 ; wire RD_BC_ERROR_c ; wire OO101_1z ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire oi001_i ; wire l1o01_1z ; wire VCC ; wire Ol111_Z ; wire GND ; wire o1111_Z ; wire l1111_Z ; wire I1111_Z ; wire O1111_Z ; wire i0111_Z ; wire o0111_Z ; wire l0111_Z ; wire I0111_Z ; wire O0111_Z ; wire il111_Z ; wire ol111_Z ; wire ll111_Z ; wire Il111_Z ; wire N_90 ; wire N_89 ; // @28:476739 SLE l1o01 ( .Q(l1o01_1z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Ol111_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477639 SLE o1111 ( .Q(o1111_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OO101_1z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477575 SLE l1111 ( .Q(l1111_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(RD_BC_ERROR_c), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477511 SLE I1111 ( .Q(I1111_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ll101), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477447 SLE O1111 ( .Q(O1111_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IoIO1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477349 SLE i0111 ( .Q(i0111_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oOI11), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477251 SLE o0111 ( .Q(o0111_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lOI11), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477187 SLE l0111 ( .Q(l0111_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l1101), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477123 (* cdc_synchronizer=1 *) SLE I0111 ( .Q(I0111_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I1101_1z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477059 SLE O0111 ( .Q(O0111_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o1101), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:476995 SLE il111 ( .Q(il111_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i1101), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:476931 SLE ol111 ( .Q(ol111_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Io101), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:476867 SLE ll111 ( .Q(ll111_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Oo101), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:476803 SLE Il111 ( .Q(Il111_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0101_1z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:476707 SLE Ol111 ( .Q(Ol111_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0101), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477703 SLE lOi01 ( .Q(lOi01_1z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOi01_1z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:476771 SLE o1o01 ( .Q(o1o01_1z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l1o01_1z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477671 SLE IOi01 ( .Q(IOi01_1z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o1111_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477607 SLE oio01 ( .Q(oio01_2z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l1111_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477543 SLE lio01 ( .Q(lio01_1z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I1111_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477479 SLE Iio01 ( .Q(Iio01_1z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O1111_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477381 SLE Oio01 ( .Q(Oio01_1z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0111_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477283 SLE ioo01 ( .Q(ioo01_2z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o0111_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477219 SLE ooo01 ( .Q(ooo01_2z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l0111_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477155 (* cdc_synchronizer=1 *) SLE loo01 ( .Q(loo01_2z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I0111_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477091 SLE lOo01 ( .Q(lOo01_1z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0111_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477027 SLE Ioo01 ( .Q(Ioo01_1z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il111_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:476963 SLE ioO11 ( .Q(ioO11_1z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ol111_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:476899 SLE Ooo01 ( .Q(Ooo01_1z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ll111_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:476835 SLE i1o01 ( .Q(i1o01_1z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Il111_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477413 SLE \IiO11_Z[8] ( .Q(IiO11[8]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0101[8]), .EN(Oio01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477413 SLE \IiO11_Z[7] ( .Q(IiO11[7]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0101[7]), .EN(Oio01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477413 SLE \IiO11_Z[6] ( .Q(IiO11[6]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0101[6]), .EN(Oio01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477413 SLE \IiO11_Z[5] ( .Q(IiO11[5]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0101[5]), .EN(Oio01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477413 SLE \IiO11_Z[4] ( .Q(IiO11[4]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0101[4]), .EN(Oio01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477413 SLE \IiO11_Z[3] ( .Q(IiO11[3]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0101[3]), .EN(Oio01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477413 SLE \IiO11_Z[2] ( .Q(IiO11[2]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0101[2]), .EN(Oio01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477413 SLE \IiO11_Z[1] ( .Q(IiO11[1]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0101[1]), .EN(Oio01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477413 SLE \IiO11_Z[0] ( .Q(IiO11[0]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0101[0]), .EN(Oio01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477315 SLE \OiO11_Z[9] ( .Q(OiO11[9]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l0101[9]), .EN(ioo01_2z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477315 SLE \OiO11_Z[8] ( .Q(OiO11[8]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l0101[8]), .EN(ioo01_2z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477315 SLE \OiO11_Z[7] ( .Q(OiO11[7]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l0101[7]), .EN(ioo01_2z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477315 SLE \OiO11_Z[6] ( .Q(OiO11[6]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l0101[6]), .EN(ioo01_2z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477315 SLE \OiO11_Z[5] ( .Q(OiO11[5]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l0101[5]), .EN(ioo01_2z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477315 SLE \OiO11_Z[4] ( .Q(OiO11[4]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l0101[4]), .EN(ioo01_2z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477315 SLE \OiO11_Z[3] ( .Q(OiO11[3]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l0101[3]), .EN(ioo01_2z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477315 SLE \OiO11_Z[2] ( .Q(OiO11[2]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l0101[2]), .EN(ioo01_2z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477315 SLE \OiO11_Z[1] ( .Q(OiO11[1]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l0101[1]), .EN(ioo01_2z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477315 SLE \OiO11_Z[0] ( .Q(OiO11[0]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l0101[0]), .EN(ioo01_2z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477413 SLE \IiO11_Z[15] ( .Q(IiO11[15]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0101[15]), .EN(Oio01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477413 SLE \IiO11_Z[13] ( .Q(IiO11[13]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0101[13]), .EN(Oio01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477413 SLE \IiO11_Z[12] ( .Q(IiO11[12]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0101[12]), .EN(Oio01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477413 SLE \IiO11_Z[10] ( .Q(IiO11[10]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0101[10]), .EN(Oio01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477413 SLE \IiO11_Z[9] ( .Q(IiO11[9]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0101[9]), .EN(Oio01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477315 SLE \OiO11_Z[15] ( .Q(OiO11[15]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l0101[15]), .EN(ioo01_2z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477315 SLE \OiO11_Z[14] ( .Q(OiO11[14]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l0101[14]), .EN(ioo01_2z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477315 SLE \OiO11_Z[13] ( .Q(OiO11[13]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l0101[13]), .EN(ioo01_2z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477315 SLE \OiO11_Z[12] ( .Q(OiO11[12]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l0101[12]), .EN(ioo01_2z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477315 SLE \OiO11_Z[11] ( .Q(OiO11[11]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l0101[11]), .EN(ioo01_2z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:477315 SLE \OiO11_Z[10] ( .Q(OiO11[10]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l0101[10]), .EN(ioo01_2z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:471666 CFG4 Iio01_RNIU8EJP1 ( .A(OOi01lde_i_a2_18), .B(Iio01_1z), .C(OOi01lde_i_a2_14), .D(OOi01lde_i_a2_13), .Y(iio01_2_i) ); defparam Iio01_RNIU8EJP1.INIT=16'hDFFF; // @28:469020 CFG2 l1o01_RNII47I8 ( .A(ii001_0), .B(l1o01_1z), .Y(N_265) ); defparam l1o01_RNII47I8.INIT=4'h7; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PEANX_SYNC_1s_26s */ module CTSE_MSGMII_PEANX_TOP_1s_26s ( i0101_1z, l0101, il101, Ii101, OOo01, li101, IOo01, ii001_0, OO101, ll101, IoIO1, oOI11, lOI11, l1101, I1101, o1101, i1101_1z, Io101, Oo101_1z, I0101, O0101, Illi0_i, lOo01, RD_BC_ERROR_c, N_277, io101_1z, oi101_1z, ii101_1z, oo101_2z, PF_IOD_CDR_CCC_C0_0_TX_CLK_G, oi001_i ) ; input [15:0] i0101_1z ; input [15:0] l0101 ; input [15:0] il101 ; output [15:0] Ii101 ; output [1:0] OOo01 ; output [15:0] li101 ; output [15:0] IOo01 ; output ii001_0 ; input OO101 ; input ll101 ; input IoIO1 ; input oOI11 ; input lOI11 ; input l1101 ; input I1101 ; input o1101 ; input i1101_1z ; input Io101 ; input Oo101_1z ; input I0101 ; input O0101 ; input Illi0_i ; output lOo01 ; input RD_BC_ERROR_c ; output N_277 ; output io101_1z ; output oi101_1z ; output ii101_1z ; output oo101_2z ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; input oi001_i ; wire ii001_0 ; wire OO101 ; wire ll101 ; wire IoIO1 ; wire oOI11 ; wire lOI11 ; wire l1101 ; wire I1101 ; wire o1101 ; wire i1101_1z ; wire Io101 ; wire Oo101_1z ; wire I0101 ; wire O0101 ; wire Illi0_i ; wire lOo01 ; wire RD_BC_ERROR_c ; wire N_277 ; wire io101_1z ; wire oi101_1z ; wire ii101_1z ; wire oo101_2z ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire oi001_i ; wire [20:0] OOi01_Z; wire [20:20] OOi01_s_Z; wire [19:0] OOi01_s; wire [0:0] un1_l0o01_0_Z; wire [7:0] ii001; wire [15:0] ooi01_Z; wire [15:0] olO11_Z; wire [14:0] ili01_Z; wire [15:5] ili01; wire [20:0] O1O11_Z; wire [20:4] i0O11; wire [19:0] un19_i0O11_Z; wire [1:1] iii01_Z; wire [1:0] oii01_Z; wire [9:3] loi01_Z; wire [2:1] l0O11_Z; wire [1:1] iIO11_Z; wire [1:0] oIO11_Z; wire [4:3] iIi01_Z; wire [3:3] oIi01_Z; wire [13:3] llO11_Z; wire [1:0] oli01; wire [15:0] oOO11_Z; wire [15:0] lOO11_Z; wire [11:2] lOO11; wire [6:0] un7_ilO11_0_data_tmp; wire [1:1] olO11_RNIM931E_S; wire [1:1] olO11_RNIM931E_Y; wire [2:2] olO11_RNIKR62S_S; wire [2:2] olO11_RNIKR62S_Y; wire [4:4] olO11_RNIQLA3A1_S; wire [4:4] olO11_RNIQLA3A1_Y; wire [6:6] olO11_RNI8OE4O1_S; wire [6:6] olO11_RNI8OE4O1_Y; wire [8:8] olO11_RNIU2J562_S; wire [8:8] olO11_RNIU2J562_Y; wire [10:10] olO11_RNIOQS9L2_S; wire [10:10] olO11_RNIOQS9L2_Y; wire [12:12] olO11_RNIQQ6E43_S; wire [12:12] olO11_RNIQQ6E43_Y; wire [15:15] olO11_RNI00C0C3_FCO; wire [15:15] olO11_RNI00C0C3_S; wire [15:15] olO11_RNI00C0C3_Y; wire [7:0] iOO11_0_data_tmp; wire [0:0] oOO11_RNI6F57F_S; wire [0:0] oOO11_RNI6F57F_Y; wire [2:2] oOO11_RNIK6BEU_S; wire [2:2] oOO11_RNIK6BEU_Y; wire [4:4] oOO11_RNIA6HLD1_S; wire [4:4] oOO11_RNIA6HLD1_Y; wire [6:6] oOO11_RNI8ENSS1_S; wire [6:6] oOO11_RNI8ENSS1_Y; wire [8:8] oOO11_RNIEUT3C2_S; wire [8:8] oOO11_RNIEUT3C2_Y; wire [10:10] oOO11_RNIOBFGI2_S; wire [10:10] oOO11_RNIOBFGI2_Y; wire [12:12] oOO11_RNIA11TO2_S; wire [12:12] oOO11_RNIA11TO2_Y; wire [15:15] oOO11_RNI4VI9V2_S; wire [15:15] oOO11_RNI4VI9V2_Y; wire [6:0] ioi01_0_data_tmp; wire [19:0] OOi01_cry_Z; wire [19:0] OOi01_cry_Y; wire [20:20] OOi01_s_FCO; wire [20:20] OOi01_s_Y; wire [13:0] ili01_1_Z; wire [15:0] OiO11; wire [15:0] IiO11; wire [7:7] ili01_0_a2_2_3_1_Z; wire [15:5] ili01_0_0_Z; wire [14:14] ili01_0_Z; wire VCC ; wire iio01_2_i ; wire GND ; wire N_319_i ; wire iOi01_Z ; wire oOi01_Z ; wire N_700_i ; wire o0i01_Z ; wire N_304_i ; wire Ili01_Z ; wire N_318_i ; wire N_711_i ; wire N_372_i ; wire IIo01 ; wire OIo01 ; wire llo01 ; wire iio01_Z ; wire iio01_2 ; wire i1i01_Z ; wire o1i01 ; wire i1O11_Z ; wire l1O11 ; wire o1O11_Z ; wire I1O11 ; wire ooO11_Z ; wire loO11 ; wire IlO11_Z ; wire OlO11_Z ; wire oIo01 ; wire IOO11_Z ; wire OOO11_Z ; wire N_22_i ; wire IoO11_Z ; wire OoO11 ; wire N_371_i ; wire Ilo01 ; wire Olo01 ; wire un3_loi01_Z ; wire un3_llO11_i_0 ; wire Ioi01_Z ; wire O1i01_Z ; wire N_3_i ; wire N_732_i ; wire N_733_i ; wire CO0 ; wire N_734_i ; wire N_1_i ; wire un3_iIi01_i_0_i ; wire N_239_i ; wire N_502_i ; wire un26_i0O11_cry_0_Z ; wire un26_i0O11_cry_0_S ; wire un26_i0O11_cry_0_Y ; wire un26_i0O11_cry_1_Z ; wire un26_i0O11_cry_1_S ; wire un26_i0O11_cry_1_Y ; wire un26_i0O11_cry_2_Z ; wire un26_i0O11_cry_2_S ; wire un26_i0O11_cry_2_Y ; wire un26_i0O11_cry_3_Z ; wire un26_i0O11_cry_3_S ; wire un26_i0O11_cry_3_Y ; wire un26_i0O11_cry_4_Z ; wire un26_i0O11_cry_4_S ; wire un26_i0O11_cry_4_Y ; wire un26_i0O11_cry_5_Z ; wire un26_i0O11_cry_5_S ; wire un26_i0O11_cry_5_Y ; wire un26_i0O11_cry_6_Z ; wire un26_i0O11_cry_6_S ; wire un26_i0O11_cry_6_Y ; wire un26_i0O11_cry_7_Z ; wire un26_i0O11_cry_7_S ; wire un26_i0O11_cry_7_Y ; wire un26_i0O11_cry_8_Z ; wire un26_i0O11_cry_8_S ; wire un26_i0O11_cry_8_Y ; wire un26_i0O11_cry_9_Z ; wire un26_i0O11_cry_9_S ; wire un26_i0O11_cry_9_Y ; wire un26_i0O11_cry_10_Z ; wire un26_i0O11_cry_10_S ; wire un26_i0O11_cry_10_Y ; wire un26_i0O11_cry_11_Z ; wire un26_i0O11_cry_11_S ; wire un26_i0O11_cry_11_Y ; wire un26_i0O11_cry_12_Z ; wire un26_i0O11_cry_12_S ; wire un26_i0O11_cry_12_Y ; wire un26_i0O11_cry_13_Z ; wire un26_i0O11_cry_13_S ; wire un26_i0O11_cry_13_Y ; wire un26_i0O11_cry_14_Z ; wire un26_i0O11_cry_14_S ; wire un26_i0O11_cry_14_Y ; wire un26_i0O11_cry_15_Z ; wire un26_i0O11_cry_15_S ; wire un26_i0O11_cry_15_Y ; wire un26_i0O11_cry_16_Z ; wire un26_i0O11_cry_16_S ; wire un26_i0O11_cry_16_Y ; wire un26_i0O11_cry_17_Z ; wire un26_i0O11_cry_17_S ; wire un26_i0O11_cry_17_Y ; wire un26_i0O11_cry_18_Z ; wire un26_i0O11_cry_18_S ; wire un26_i0O11_cry_18_Y ; wire un26_i0O11_s_20_FCO ; wire un26_i0O11_s_20_S ; wire un26_i0O11_s_20_Y ; wire un26_i0O11_cry_19_Z ; wire un26_i0O11_cry_19_S ; wire un26_i0O11_cry_19_Y ; wire ioi01_0_I_1_S ; wire ioi01_0_I_1_Y ; wire ioi01_0_I_9_S ; wire ioi01_0_I_9_Y ; wire ioi01_0_I_15_S ; wire ioi01_0_I_15_Y ; wire ioi01_0_I_21_S ; wire ioi01_0_I_21_Y ; wire ioi01_0_I_27_S ; wire ioi01_0_I_27_Y ; wire ioi01_0_I_33_S ; wire ioi01_0_I_33_Y ; wire ioi01_0_I_39_S ; wire ioi01_0_I_39_Y ; wire ioi01_0_I_45_FCO ; wire ioi01_0_I_45_S ; wire ioi01_0_I_45_Y ; wire OOi01_s_4128_FCO ; wire OOi01_s_4128_S ; wire OOi01_s_4128_Y ; wire Iio01 ; wire Ooo01 ; wire OOi019 ; wire N_752 ; wire N_764 ; wire lii01_Z ; wire un18_oii01_Z ; wire N_604 ; wire N_642 ; wire N_724 ; wire N_45 ; wire l1o01 ; wire N_26 ; wire N_50_i ; wire N_10_i ; wire N_606 ; wire N_601 ; wire Olo01_0_o3_1_Z ; wire ioo01 ; wire N_736 ; wire OOi01lde_i_a2_12 ; wire OOi01lde_i_a2_11 ; wire OOi01lde_i_a2_18_1 ; wire OOi01lde_i_a2_18 ; wire iOo01_i_a2_0_0_Z ; wire un18_oii01_1_Z ; wire lio01 ; wire Ioo01 ; wire un11_IIo01 ; wire N_725 ; wire N_125_i ; wire N_789 ; wire N_739 ; wire IOi01 ; wire lOi01 ; wire N_279 ; wire Oio01 ; wire N_594 ; wire o1o01 ; wire oio01 ; wire un18_oii01_1_0_Z ; wire lIO11_1_Z ; wire OOi01lde_i_a2_14 ; wire OOi01lde_i_a2_13 ; wire N_265 ; wire un3_ili01_0_a3_1_Z ; wire iIo01_i_0_a2_2_4_Z ; wire ooo01 ; wire iIo01_i_0_a2_2_3_Z ; wire l1O11_0_a2_0_19_11_Z ; wire l1O11_0_a2_0_19_10_Z ; wire l1O11_0_a2_0_19_9_Z ; wire l1O11_0_a2_0_19_8_Z ; wire un2_lIo01_i_0_a2_9_Z ; wire un2_lIo01_i_0_a2_8_Z ; wire un2_lIo01_i_0_a2_7_Z ; wire N_764_15 ; wire un1_oOo01_Z ; wire un11_lOO11_Z ; wire iOo01_i_a2_0_3_Z ; wire iOo01_i_a2_0 ; wire un2_lIo01_i_0_a2_10_Z ; wire i1o01 ; wire oOo01_Z ; wire N_509 ; wire N_510 ; wire OIO11_3_Z ; wire loo01 ; wire oIo01_0_a2_1 ; wire Ilo01_0_0_Z ; wire N_764_19 ; wire N_603 ; wire IIO11_Z ; wire lIO11_Z ; wire OIO11_Z ; wire N_779 ; wire N_43 ; wire N_741 ; wire N_731 ; wire lIo01_i_0_Z ; wire iIo01_i_0_0_Z ; wire Olo01_0_a2_1_Z ; wire un15_ili01_3 ; wire IIo01_0_0_tz_Z ; wire I1O11_0_a2_0_Z ; wire N_589 ; wire l1O11_0_a2_1_Z ; wire ioO11 ; wire oIo01_0_a2_3_Z ; wire N_15097 ; wire N_15098 ; wire N_15099 ; wire N_15100 ; // @28:470516 SLE \OOi01[20] ( .Q(OOi01_Z[20]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OOi01_s_Z[20]), .EN(iio01_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470516 SLE \OOi01[19] ( .Q(OOi01_Z[19]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OOi01_s[19]), .EN(iio01_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470516 SLE \OOi01[18] ( .Q(OOi01_Z[18]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OOi01_s[18]), .EN(iio01_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470516 SLE \OOi01[17] ( .Q(OOi01_Z[17]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OOi01_s[17]), .EN(iio01_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470516 SLE \OOi01[16] ( .Q(OOi01_Z[16]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OOi01_s[16]), .EN(iio01_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470516 SLE \OOi01[15] ( .Q(OOi01_Z[15]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OOi01_s[15]), .EN(iio01_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470516 SLE \OOi01[14] ( .Q(OOi01_Z[14]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OOi01_s[14]), .EN(iio01_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470516 SLE \OOi01[13] ( .Q(OOi01_Z[13]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OOi01_s[13]), .EN(iio01_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470516 SLE \OOi01[12] ( .Q(OOi01_Z[12]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OOi01_s[12]), .EN(iio01_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470516 SLE \OOi01[11] ( .Q(OOi01_Z[11]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OOi01_s[11]), .EN(iio01_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470516 SLE \OOi01[10] ( .Q(OOi01_Z[10]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OOi01_s[10]), .EN(iio01_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470516 SLE \OOi01[9] ( .Q(OOi01_Z[9]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OOi01_s[9]), .EN(iio01_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470516 SLE \OOi01[8] ( .Q(OOi01_Z[8]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OOi01_s[8]), .EN(iio01_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470516 SLE \OOi01[7] ( .Q(OOi01_Z[7]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OOi01_s[7]), .EN(iio01_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470516 SLE \OOi01[6] ( .Q(OOi01_Z[6]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OOi01_s[6]), .EN(iio01_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470516 SLE \OOi01[5] ( .Q(OOi01_Z[5]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OOi01_s[5]), .EN(iio01_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470516 SLE \OOi01[4] ( .Q(OOi01_Z[4]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OOi01_s[4]), .EN(iio01_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470516 SLE \OOi01[3] ( .Q(OOi01_Z[3]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OOi01_s[3]), .EN(iio01_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470516 SLE \OOi01[2] ( .Q(OOi01_Z[2]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OOi01_s[2]), .EN(iio01_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470516 SLE \OOi01[1] ( .Q(OOi01_Z[1]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OOi01_s[1]), .EN(iio01_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470516 SLE \OOi01[0] ( .Q(OOi01_Z[0]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OOi01_s[0]), .EN(iio01_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:468730 SLE oo101 ( .Q(oo101_2z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_319_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:468544 SLE iOi01 ( .Q(iOi01_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oOi01_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469195 SLE ii101 ( .Q(ii101_1z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_700_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:468638 SLE oi101 ( .Q(oi101_1z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un1_l0o01_0_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:468589 SLE o0i01 ( .Q(o0i01_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_304_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470712 SLE Ili01 ( .Q(Ili01_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_318_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:468773 SLE io101 ( .Q(io101_1z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_711_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:468149 SLE I0o01 ( .Q(ii001[4]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_372_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:468071 SLE O0o01 ( .Q(ii001[3]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IIo01), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:467960 SLE ilo01 ( .Q(ii001[2]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OIo01), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:468008 SLE I1o01 ( .Q(ii001[0]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(llo01), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470613 SLE iio01 ( .Q(iio01_Z), .ADn(GND), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iio01_2), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469329 SLE i1i01 ( .Q(i1i01_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(o1i01), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470347 SLE i1O11 ( .Q(i1O11_Z), .ADn(GND), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(l1O11), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470296 SLE o1O11 ( .Q(o1O11_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(I1O11), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470667 SLE ooO11 ( .Q(ooO11_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(loO11), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469965 SLE IlO11 ( .Q(IlO11_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OlO11_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:468208 SLE l0o01 ( .Q(ii001[6]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oIo01), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469661 SLE IOO11 ( .Q(IOO11_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OOO11_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:467909 SLE olo01 ( .Q(ii001[1]), .ADn(GND), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_22_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:468937 SLE IoO11 ( .Q(IoO11_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OoO11), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:468504 SLE o0o01 ( .Q(ii001[5]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_371_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:468378 SLE O1o01 ( .Q(ii001_0), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Ilo01), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:468316 SLE i0o01 ( .Q(ii001[7]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(Olo01), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469445 SLE \ooi01[15] ( .Q(ooi01_Z[15]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[15]), .EN(un3_loi01_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470049 SLE \olO11[15] ( .Q(olO11_Z[15]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ooi01_Z[15]), .EN(un3_llO11_i_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469266 SLE Ioi01 ( .Q(Ioi01_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[11]), .EN(loO11), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:468685 SLE O1i01 ( .Q(O1i01_Z), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[15]), .EN(ooO11_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469156 SLE \IOo01_Z[8] ( .Q(IOo01[8]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ili01_Z[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469156 SLE \IOo01_Z[7] ( .Q(IOo01[7]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ili01[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469156 SLE \IOo01_Z[6] ( .Q(IOo01[6]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ili01[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469156 SLE \IOo01_Z[5] ( .Q(IOo01[5]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ili01[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469156 SLE \IOo01_Z[4] ( .Q(IOo01[4]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ili01_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469156 SLE \IOo01_Z[3] ( .Q(IOo01[3]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ili01_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469156 SLE \IOo01_Z[2] ( .Q(IOo01[2]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ili01_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469156 SLE \IOo01_Z[1] ( .Q(IOo01[1]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ili01_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469156 SLE \IOo01_Z[0] ( .Q(IOo01[0]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ili01_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470469 SLE \O1O11[7] ( .Q(O1O11_Z[7]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0O11[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470469 SLE \O1O11[6] ( .Q(O1O11_Z[6]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0O11[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470469 SLE \O1O11[5] ( .Q(O1O11_Z[5]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un19_i0O11_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470469 SLE \O1O11[4] ( .Q(O1O11_Z[4]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0O11[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470469 SLE \O1O11[3] ( .Q(O1O11_Z[3]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un19_i0O11_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470469 SLE \O1O11[2] ( .Q(O1O11_Z[2]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un19_i0O11_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470469 SLE \O1O11[1] ( .Q(O1O11_Z[1]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un19_i0O11_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470469 SLE \O1O11[0] ( .Q(O1O11_Z[0]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un19_i0O11_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469156 SLE \IOo01_Z[15] ( .Q(IOo01[15]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ili01[15]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469156 SLE \IOo01_Z[14] ( .Q(IOo01[14]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ili01_Z[14]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469156 SLE \IOo01_Z[13] ( .Q(IOo01[13]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ili01_Z[13]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469156 SLE \IOo01_Z[12] ( .Q(IOo01[12]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ili01[12]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469156 SLE \IOo01_Z[11] ( .Q(IOo01[11]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ili01_Z[11]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469156 SLE \IOo01_Z[10] ( .Q(IOo01[10]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ili01_Z[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469156 SLE \IOo01_Z[9] ( .Q(IOo01[9]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ili01_Z[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469620 SLE \iii01[1] ( .Q(iii01_Z[1]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oii01_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469620 SLE \iii01[0] ( .Q(N_3_i), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oii01_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470469 SLE \O1O11[20] ( .Q(O1O11_Z[20]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0O11[20]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470469 SLE \O1O11[19] ( .Q(O1O11_Z[19]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un19_i0O11_Z[19]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470469 SLE \O1O11[18] ( .Q(O1O11_Z[18]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un19_i0O11_Z[18]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470469 SLE \O1O11[17] ( .Q(O1O11_Z[17]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0O11[17]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470469 SLE \O1O11[16] ( .Q(O1O11_Z[16]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0O11[16]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470469 SLE \O1O11[15] ( .Q(O1O11_Z[15]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un19_i0O11_Z[15]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470469 SLE \O1O11[14] ( .Q(O1O11_Z[14]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un19_i0O11_Z[14]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470469 SLE \O1O11[13] ( .Q(O1O11_Z[13]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(un19_i0O11_Z[13]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470469 SLE \O1O11[12] ( .Q(O1O11_Z[12]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0O11[12]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470469 SLE \O1O11[11] ( .Q(O1O11_Z[11]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0O11[11]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470469 SLE \O1O11[10] ( .Q(O1O11_Z[10]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0O11[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470469 SLE \O1O11[9] ( .Q(O1O11_Z[9]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0O11[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470469 SLE \O1O11[8] ( .Q(O1O11_Z[8]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(i0O11[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469445 SLE \ooi01[9] ( .Q(ooi01_Z[9]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(loi01_Z[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469445 SLE \ooi01[8] ( .Q(ooi01_Z[8]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[8]), .EN(un3_loi01_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469445 SLE \ooi01[7] ( .Q(ooi01_Z[7]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[7]), .EN(un3_loi01_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469445 SLE \ooi01[6] ( .Q(ooi01_Z[6]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[6]), .EN(un3_loi01_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469445 SLE \ooi01[5] ( .Q(ooi01_Z[5]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[5]), .EN(un3_loi01_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469445 SLE \ooi01[4] ( .Q(ooi01_Z[4]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[4]), .EN(un3_loi01_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469445 SLE \ooi01[3] ( .Q(ooi01_Z[3]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(loi01_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469445 SLE \ooi01[2] ( .Q(ooi01_Z[2]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[2]), .EN(un3_loi01_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469445 SLE \ooi01[1] ( .Q(ooi01_Z[1]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[1]), .EN(un3_loi01_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469445 SLE \ooi01[0] ( .Q(ooi01_Z[0]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[0]), .EN(un3_loi01_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470217 SLE \l0O11[2] ( .Q(l0O11_Z[2]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_732_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470217 SLE \l0O11[1] ( .Q(l0O11_Z[1]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_733_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470217 SLE \l0O11[0] ( .Q(CO0), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_734_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469909 SLE \iIO11[1] ( .Q(iIO11_Z[1]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oIO11_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469909 SLE \iIO11[0] ( .Q(N_1_i), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oIO11_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470859 SLE \li101_Z[10] ( .Q(li101[10]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[10]), .EN(un3_iIi01_i_0_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470859 SLE \li101_Z[9] ( .Q(li101[9]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[9]), .EN(un3_iIi01_i_0_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470859 SLE \li101_Z[8] ( .Q(li101[8]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[8]), .EN(un3_iIi01_i_0_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470859 SLE \li101_Z[7] ( .Q(li101[7]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[7]), .EN(un3_iIi01_i_0_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470859 SLE \li101_Z[6] ( .Q(li101[6]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[6]), .EN(un3_iIi01_i_0_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470859 SLE \li101_Z[5] ( .Q(li101[5]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[5]), .EN(un3_iIi01_i_0_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470859 SLE \li101_Z[4] ( .Q(li101[4]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIi01_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470859 SLE \li101_Z[3] ( .Q(li101[3]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iIi01_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470859 SLE \li101_Z[2] ( .Q(li101[2]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[2]), .EN(un3_iIi01_i_0_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470859 SLE \li101_Z[1] ( .Q(li101[1]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[1]), .EN(un3_iIi01_i_0_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470859 SLE \li101_Z[0] ( .Q(li101[0]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[0]), .EN(un3_iIi01_i_0_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469445 SLE \ooi01[13] ( .Q(ooi01_Z[13]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[13]), .EN(un3_loi01_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469445 SLE \ooi01[12] ( .Q(ooi01_Z[12]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[12]), .EN(un3_loi01_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469445 SLE \ooi01[11] ( .Q(ooi01_Z[11]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[11]), .EN(un3_loi01_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469445 SLE \ooi01[10] ( .Q(ooi01_Z[10]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[10]), .EN(un3_loi01_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470784 SLE \Ii101_Z[9] ( .Q(Ii101[9]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[9]), .EN(N_239_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470784 SLE \Ii101_Z[8] ( .Q(Ii101[8]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[8]), .EN(N_239_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470784 SLE \Ii101_Z[7] ( .Q(Ii101[7]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[7]), .EN(N_239_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470784 SLE \Ii101_Z[6] ( .Q(Ii101[6]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[6]), .EN(N_239_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470784 SLE \Ii101_Z[5] ( .Q(Ii101[5]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[5]), .EN(N_239_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470784 SLE \Ii101_Z[4] ( .Q(Ii101[4]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[4]), .EN(N_239_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470784 SLE \Ii101_Z[3] ( .Q(Ii101[3]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oIi01_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470784 SLE \Ii101_Z[2] ( .Q(Ii101[2]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[2]), .EN(N_239_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470784 SLE \Ii101_Z[1] ( .Q(Ii101[1]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[1]), .EN(N_239_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470784 SLE \Ii101_Z[0] ( .Q(Ii101[0]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[0]), .EN(N_239_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470859 SLE \li101_Z[15] ( .Q(li101[15]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[15]), .EN(un3_iIi01_i_0_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470859 SLE \li101_Z[14] ( .Q(li101[14]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[14]), .EN(un3_iIi01_i_0_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470859 SLE \li101_Z[13] ( .Q(li101[13]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[13]), .EN(un3_iIi01_i_0_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470859 SLE \li101_Z[12] ( .Q(li101[12]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[12]), .EN(un3_iIi01_i_0_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470859 SLE \li101_Z[11] ( .Q(li101[11]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[11]), .EN(un3_iIi01_i_0_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470049 SLE \olO11[6] ( .Q(olO11_Z[6]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ooi01_Z[6]), .EN(un3_llO11_i_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470049 SLE \olO11[5] ( .Q(olO11_Z[5]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ooi01_Z[5]), .EN(un3_llO11_i_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470049 SLE \olO11[4] ( .Q(olO11_Z[4]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ooi01_Z[4]), .EN(un3_llO11_i_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470049 SLE \olO11[3] ( .Q(olO11_Z[3]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(llO11_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470049 SLE \olO11[2] ( .Q(olO11_Z[2]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ooi01_Z[2]), .EN(un3_llO11_i_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470049 SLE \olO11[1] ( .Q(olO11_Z[1]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ooi01_Z[1]), .EN(un3_llO11_i_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470049 SLE \olO11[0] ( .Q(olO11_Z[0]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_502_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:468882 SLE \OOo01_Z[1] ( .Q(OOo01[1]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oli01[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:468882 SLE \OOo01_Z[0] ( .Q(OOo01[0]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(oli01[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470784 SLE \Ii101_Z[15] ( .Q(Ii101[15]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[15]), .EN(N_239_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470784 SLE \Ii101_Z[14] ( .Q(Ii101[14]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[14]), .EN(N_239_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470784 SLE \Ii101_Z[13] ( .Q(Ii101[13]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[13]), .EN(N_239_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470784 SLE \Ii101_Z[12] ( .Q(Ii101[12]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[12]), .EN(N_239_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470784 SLE \Ii101_Z[11] ( .Q(Ii101[11]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[11]), .EN(N_239_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470784 SLE \Ii101_Z[10] ( .Q(Ii101[10]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(il101[10]), .EN(N_239_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469737 SLE \oOO11[7] ( .Q(oOO11_Z[7]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lOO11_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469737 SLE \oOO11[6] ( .Q(oOO11_Z[6]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lOO11[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469737 SLE \oOO11[5] ( .Q(oOO11_Z[5]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lOO11_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469737 SLE \oOO11[4] ( .Q(oOO11_Z[4]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lOO11_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469737 SLE \oOO11[3] ( .Q(oOO11_Z[3]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lOO11_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469737 SLE \oOO11[2] ( .Q(oOO11_Z[2]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lOO11[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469737 SLE \oOO11[1] ( .Q(oOO11_Z[1]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lOO11_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469737 SLE \oOO11[0] ( .Q(oOO11_Z[0]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lOO11_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470049 SLE \olO11[13] ( .Q(olO11_Z[13]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(llO11_Z[13]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470049 SLE \olO11[12] ( .Q(olO11_Z[12]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ooi01_Z[12]), .EN(un3_llO11_i_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470049 SLE \olO11[11] ( .Q(olO11_Z[11]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ooi01_Z[11]), .EN(un3_llO11_i_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470049 SLE \olO11[10] ( .Q(olO11_Z[10]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ooi01_Z[10]), .EN(un3_llO11_i_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470049 SLE \olO11[9] ( .Q(olO11_Z[9]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ooi01_Z[9]), .EN(un3_llO11_i_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470049 SLE \olO11[8] ( .Q(olO11_Z[8]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ooi01_Z[8]), .EN(un3_llO11_i_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470049 SLE \olO11[7] ( .Q(olO11_Z[7]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ooi01_Z[7]), .EN(un3_llO11_i_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469737 SLE \oOO11[15] ( .Q(oOO11_Z[15]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lOO11_Z[15]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469737 SLE \oOO11[14] ( .Q(oOO11_Z[14]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lOO11_Z[14]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469737 SLE \oOO11[13] ( .Q(oOO11_Z[13]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lOO11_Z[13]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469737 SLE \oOO11[12] ( .Q(oOO11_Z[12]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lOO11_Z[12]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469737 SLE \oOO11[11] ( .Q(oOO11_Z[11]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lOO11[11]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469737 SLE \oOO11[10] ( .Q(oOO11_Z[10]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lOO11[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469737 SLE \oOO11[9] ( .Q(oOO11_Z[9]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lOO11[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:469737 SLE \oOO11[8] ( .Q(oOO11_Z[8]), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lOO11[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:470463 ARI1 un26_i0O11_cry_0 ( .FCO(un26_i0O11_cry_0_Z), .S(un26_i0O11_cry_0_S), .Y(un26_i0O11_cry_0_Y), .B(O1O11_Z[0]), .C(GND), .D(GND), .A(VCC), .FCI(GND) ); defparam un26_i0O11_cry_0.INIT=20'h65500; // @28:470463 ARI1 un26_i0O11_cry_1 ( .FCO(un26_i0O11_cry_1_Z), .S(un26_i0O11_cry_1_S), .Y(un26_i0O11_cry_1_Y), .B(O1O11_Z[1]), .C(GND), .D(GND), .A(VCC), .FCI(un26_i0O11_cry_0_Z) ); defparam un26_i0O11_cry_1.INIT=20'h65500; // @28:470463 ARI1 un26_i0O11_cry_2 ( .FCO(un26_i0O11_cry_2_Z), .S(un26_i0O11_cry_2_S), .Y(un26_i0O11_cry_2_Y), .B(O1O11_Z[2]), .C(GND), .D(GND), .A(VCC), .FCI(un26_i0O11_cry_1_Z) ); defparam un26_i0O11_cry_2.INIT=20'h65500; // @28:470463 ARI1 un26_i0O11_cry_3 ( .FCO(un26_i0O11_cry_3_Z), .S(un26_i0O11_cry_3_S), .Y(un26_i0O11_cry_3_Y), .B(O1O11_Z[3]), .C(GND), .D(GND), .A(VCC), .FCI(un26_i0O11_cry_2_Z) ); defparam un26_i0O11_cry_3.INIT=20'h65500; // @28:470463 ARI1 un26_i0O11_cry_4 ( .FCO(un26_i0O11_cry_4_Z), .S(un26_i0O11_cry_4_S), .Y(un26_i0O11_cry_4_Y), .B(O1O11_Z[4]), .C(GND), .D(GND), .A(VCC), .FCI(un26_i0O11_cry_3_Z) ); defparam un26_i0O11_cry_4.INIT=20'h65500; // @28:470463 ARI1 un26_i0O11_cry_5 ( .FCO(un26_i0O11_cry_5_Z), .S(un26_i0O11_cry_5_S), .Y(un26_i0O11_cry_5_Y), .B(O1O11_Z[5]), .C(GND), .D(GND), .A(VCC), .FCI(un26_i0O11_cry_4_Z) ); defparam un26_i0O11_cry_5.INIT=20'h65500; // @28:470463 ARI1 un26_i0O11_cry_6 ( .FCO(un26_i0O11_cry_6_Z), .S(un26_i0O11_cry_6_S), .Y(un26_i0O11_cry_6_Y), .B(O1O11_Z[6]), .C(GND), .D(GND), .A(VCC), .FCI(un26_i0O11_cry_5_Z) ); defparam un26_i0O11_cry_6.INIT=20'h65500; // @28:470463 ARI1 un26_i0O11_cry_7 ( .FCO(un26_i0O11_cry_7_Z), .S(un26_i0O11_cry_7_S), .Y(un26_i0O11_cry_7_Y), .B(O1O11_Z[7]), .C(GND), .D(GND), .A(VCC), .FCI(un26_i0O11_cry_6_Z) ); defparam un26_i0O11_cry_7.INIT=20'h65500; // @28:470463 ARI1 un26_i0O11_cry_8 ( .FCO(un26_i0O11_cry_8_Z), .S(un26_i0O11_cry_8_S), .Y(un26_i0O11_cry_8_Y), .B(O1O11_Z[8]), .C(GND), .D(GND), .A(VCC), .FCI(un26_i0O11_cry_7_Z) ); defparam un26_i0O11_cry_8.INIT=20'h65500; // @28:470463 ARI1 un26_i0O11_cry_9 ( .FCO(un26_i0O11_cry_9_Z), .S(un26_i0O11_cry_9_S), .Y(un26_i0O11_cry_9_Y), .B(O1O11_Z[9]), .C(GND), .D(GND), .A(VCC), .FCI(un26_i0O11_cry_8_Z) ); defparam un26_i0O11_cry_9.INIT=20'h65500; // @28:470463 ARI1 un26_i0O11_cry_10 ( .FCO(un26_i0O11_cry_10_Z), .S(un26_i0O11_cry_10_S), .Y(un26_i0O11_cry_10_Y), .B(O1O11_Z[10]), .C(GND), .D(GND), .A(VCC), .FCI(un26_i0O11_cry_9_Z) ); defparam un26_i0O11_cry_10.INIT=20'h65500; // @28:470463 ARI1 un26_i0O11_cry_11 ( .FCO(un26_i0O11_cry_11_Z), .S(un26_i0O11_cry_11_S), .Y(un26_i0O11_cry_11_Y), .B(O1O11_Z[11]), .C(GND), .D(GND), .A(VCC), .FCI(un26_i0O11_cry_10_Z) ); defparam un26_i0O11_cry_11.INIT=20'h65500; // @28:470463 ARI1 un26_i0O11_cry_12 ( .FCO(un26_i0O11_cry_12_Z), .S(un26_i0O11_cry_12_S), .Y(un26_i0O11_cry_12_Y), .B(O1O11_Z[12]), .C(GND), .D(GND), .A(VCC), .FCI(un26_i0O11_cry_11_Z) ); defparam un26_i0O11_cry_12.INIT=20'h65500; // @28:470463 ARI1 un26_i0O11_cry_13 ( .FCO(un26_i0O11_cry_13_Z), .S(un26_i0O11_cry_13_S), .Y(un26_i0O11_cry_13_Y), .B(O1O11_Z[13]), .C(GND), .D(GND), .A(VCC), .FCI(un26_i0O11_cry_12_Z) ); defparam un26_i0O11_cry_13.INIT=20'h65500; // @28:470463 ARI1 un26_i0O11_cry_14 ( .FCO(un26_i0O11_cry_14_Z), .S(un26_i0O11_cry_14_S), .Y(un26_i0O11_cry_14_Y), .B(O1O11_Z[14]), .C(GND), .D(GND), .A(VCC), .FCI(un26_i0O11_cry_13_Z) ); defparam un26_i0O11_cry_14.INIT=20'h65500; // @28:470463 ARI1 un26_i0O11_cry_15 ( .FCO(un26_i0O11_cry_15_Z), .S(un26_i0O11_cry_15_S), .Y(un26_i0O11_cry_15_Y), .B(O1O11_Z[15]), .C(GND), .D(GND), .A(VCC), .FCI(un26_i0O11_cry_14_Z) ); defparam un26_i0O11_cry_15.INIT=20'h65500; // @28:470463 ARI1 un26_i0O11_cry_16 ( .FCO(un26_i0O11_cry_16_Z), .S(un26_i0O11_cry_16_S), .Y(un26_i0O11_cry_16_Y), .B(O1O11_Z[16]), .C(GND), .D(GND), .A(VCC), .FCI(un26_i0O11_cry_15_Z) ); defparam un26_i0O11_cry_16.INIT=20'h65500; // @28:470463 ARI1 un26_i0O11_cry_17 ( .FCO(un26_i0O11_cry_17_Z), .S(un26_i0O11_cry_17_S), .Y(un26_i0O11_cry_17_Y), .B(O1O11_Z[17]), .C(GND), .D(GND), .A(VCC), .FCI(un26_i0O11_cry_16_Z) ); defparam un26_i0O11_cry_17.INIT=20'h65500; // @28:470463 ARI1 un26_i0O11_cry_18 ( .FCO(un26_i0O11_cry_18_Z), .S(un26_i0O11_cry_18_S), .Y(un26_i0O11_cry_18_Y), .B(O1O11_Z[18]), .C(GND), .D(GND), .A(VCC), .FCI(un26_i0O11_cry_17_Z) ); defparam un26_i0O11_cry_18.INIT=20'h65500; // @28:470463 ARI1 un26_i0O11_s_20 ( .FCO(un26_i0O11_s_20_FCO), .S(un26_i0O11_s_20_S), .Y(un26_i0O11_s_20_Y), .B(O1O11_Z[20]), .C(GND), .D(GND), .A(VCC), .FCI(un26_i0O11_cry_19_Z) ); defparam un26_i0O11_s_20.INIT=20'h45500; // @28:470463 ARI1 un26_i0O11_cry_19 ( .FCO(un26_i0O11_cry_19_Z), .S(un26_i0O11_cry_19_S), .Y(un26_i0O11_cry_19_Y), .B(O1O11_Z[19]), .C(GND), .D(GND), .A(VCC), .FCI(un26_i0O11_cry_18_Z) ); defparam un26_i0O11_cry_19.INIT=20'h65500; // @28:469481 ARI1 \olO11_RNIM931E[1] ( .FCO(un7_ilO11_0_data_tmp[0]), .S(olO11_RNIM931E_S[1]), .Y(olO11_RNIM931E_Y[1]), .B(olO11_Z[0]), .C(olO11_Z[1]), .D(ooi01_Z[0]), .A(ooi01_Z[1]), .FCI(GND) ); defparam \olO11_RNIM931E[1] .INIT=20'h68421; // @28:469481 ARI1 \olO11_RNIKR62S[2] ( .FCO(un7_ilO11_0_data_tmp[1]), .S(olO11_RNIKR62S_S[2]), .Y(olO11_RNIKR62S_Y[2]), .B(olO11_Z[2]), .C(olO11_Z[3]), .D(ooi01_Z[2]), .A(ooi01_Z[3]), .FCI(un7_ilO11_0_data_tmp[0]) ); defparam \olO11_RNIKR62S[2] .INIT=20'h68421; // @28:469481 ARI1 \olO11_RNIQLA3A1[4] ( .FCO(un7_ilO11_0_data_tmp[2]), .S(olO11_RNIQLA3A1_S[4]), .Y(olO11_RNIQLA3A1_Y[4]), .B(olO11_Z[4]), .C(olO11_Z[5]), .D(ooi01_Z[4]), .A(ooi01_Z[5]), .FCI(un7_ilO11_0_data_tmp[1]) ); defparam \olO11_RNIQLA3A1[4] .INIT=20'h68421; // @28:469481 ARI1 \olO11_RNI8OE4O1[6] ( .FCO(un7_ilO11_0_data_tmp[3]), .S(olO11_RNI8OE4O1_S[6]), .Y(olO11_RNI8OE4O1_Y[6]), .B(olO11_Z[6]), .C(olO11_Z[7]), .D(ooi01_Z[6]), .A(ooi01_Z[7]), .FCI(un7_ilO11_0_data_tmp[2]) ); defparam \olO11_RNI8OE4O1[6] .INIT=20'h68421; // @28:469481 ARI1 \olO11_RNIU2J562[8] ( .FCO(un7_ilO11_0_data_tmp[4]), .S(olO11_RNIU2J562_S[8]), .Y(olO11_RNIU2J562_Y[8]), .B(olO11_Z[8]), .C(olO11_Z[9]), .D(ooi01_Z[8]), .A(ooi01_Z[9]), .FCI(un7_ilO11_0_data_tmp[3]) ); defparam \olO11_RNIU2J562[8] .INIT=20'h68421; // @28:469481 ARI1 \olO11_RNIOQS9L2[10] ( .FCO(un7_ilO11_0_data_tmp[5]), .S(olO11_RNIOQS9L2_S[10]), .Y(olO11_RNIOQS9L2_Y[10]), .B(olO11_Z[10]), .C(olO11_Z[11]), .D(ooi01_Z[10]), .A(ooi01_Z[11]), .FCI(un7_ilO11_0_data_tmp[4]) ); defparam \olO11_RNIOQS9L2[10] .INIT=20'h68421; // @28:469481 ARI1 \olO11_RNIQQ6E43[12] ( .FCO(un7_ilO11_0_data_tmp[6]), .S(olO11_RNIQQ6E43_S[12]), .Y(olO11_RNIQQ6E43_Y[12]), .B(olO11_Z[12]), .C(olO11_Z[13]), .D(ooi01_Z[12]), .A(ooi01_Z[13]), .FCI(un7_ilO11_0_data_tmp[5]) ); defparam \olO11_RNIQQ6E43[12] .INIT=20'h68421; // @28:469481 ARI1 \olO11_RNI00C0C3[15] ( .FCO(olO11_RNI00C0C3_FCO[15]), .S(olO11_RNI00C0C3_S[15]), .Y(olO11_RNI00C0C3_Y[15]), .B(olO11_Z[15]), .C(ooi01_Z[15]), .D(GND), .A(VCC), .FCI(un7_ilO11_0_data_tmp[6]) ); defparam \olO11_RNI00C0C3[15] .INIT=20'h69900; // @28:534549 ARI1 \oOO11_RNI6F57F[0] ( .FCO(iOO11_0_data_tmp[0]), .S(oOO11_RNI6F57F_S[0]), .Y(oOO11_RNI6F57F_Y[0]), .B(oOO11_Z[0]), .C(oOO11_Z[1]), .D(il101[0]), .A(il101[1]), .FCI(GND) ); defparam \oOO11_RNI6F57F[0] .INIT=20'h68421; // @28:534549 ARI1 \oOO11_RNIK6BEU[2] ( .FCO(iOO11_0_data_tmp[1]), .S(oOO11_RNIK6BEU_S[2]), .Y(oOO11_RNIK6BEU_Y[2]), .B(oOO11_Z[2]), .C(oOO11_Z[3]), .D(il101[2]), .A(il101[3]), .FCI(iOO11_0_data_tmp[0]) ); defparam \oOO11_RNIK6BEU[2] .INIT=20'h68421; // @28:534549 ARI1 \oOO11_RNIA6HLD1[4] ( .FCO(iOO11_0_data_tmp[2]), .S(oOO11_RNIA6HLD1_S[4]), .Y(oOO11_RNIA6HLD1_Y[4]), .B(oOO11_Z[4]), .C(oOO11_Z[5]), .D(il101[4]), .A(il101[5]), .FCI(iOO11_0_data_tmp[1]) ); defparam \oOO11_RNIA6HLD1[4] .INIT=20'h68421; // @28:534549 ARI1 \oOO11_RNI8ENSS1[6] ( .FCO(iOO11_0_data_tmp[3]), .S(oOO11_RNI8ENSS1_S[6]), .Y(oOO11_RNI8ENSS1_Y[6]), .B(oOO11_Z[6]), .C(oOO11_Z[7]), .D(il101[6]), .A(il101[7]), .FCI(iOO11_0_data_tmp[2]) ); defparam \oOO11_RNI8ENSS1[6] .INIT=20'h68421; // @28:534549 ARI1 \oOO11_RNIEUT3C2[8] ( .FCO(iOO11_0_data_tmp[4]), .S(oOO11_RNIEUT3C2_S[8]), .Y(oOO11_RNIEUT3C2_Y[8]), .B(oOO11_Z[8]), .C(oOO11_Z[9]), .D(il101[8]), .A(il101[9]), .FCI(iOO11_0_data_tmp[3]) ); defparam \oOO11_RNIEUT3C2[8] .INIT=20'h68421; // @28:534549 ARI1 \oOO11_RNIOBFGI2[10] ( .FCO(iOO11_0_data_tmp[5]), .S(oOO11_RNIOBFGI2_S[10]), .Y(oOO11_RNIOBFGI2_Y[10]), .B(oOO11_Z[10]), .C(oOO11_Z[11]), .D(il101[10]), .A(il101[11]), .FCI(iOO11_0_data_tmp[4]) ); defparam \oOO11_RNIOBFGI2[10] .INIT=20'h68421; // @28:534549 ARI1 \oOO11_RNIA11TO2[12] ( .FCO(iOO11_0_data_tmp[6]), .S(oOO11_RNIA11TO2_S[12]), .Y(oOO11_RNIA11TO2_Y[12]), .B(oOO11_Z[12]), .C(oOO11_Z[13]), .D(il101[12]), .A(il101[13]), .FCI(iOO11_0_data_tmp[5]) ); defparam \oOO11_RNIA11TO2[12] .INIT=20'h68421; // @28:534549 ARI1 \oOO11_RNI4VI9V2[15] ( .FCO(iOO11_0_data_tmp[7]), .S(oOO11_RNI4VI9V2_S[15]), .Y(oOO11_RNI4VI9V2_Y[15]), .B(oOO11_Z[14]), .C(oOO11_Z[15]), .D(il101[14]), .A(il101[15]), .FCI(iOO11_0_data_tmp[6]) ); defparam \oOO11_RNI4VI9V2[15] .INIT=20'h68421; // @28:469481 ARI1 ioi01_0_I_1 ( .FCO(ioi01_0_data_tmp[0]), .S(ioi01_0_I_1_S), .Y(ioi01_0_I_1_Y), .B(ooi01_Z[0]), .C(ooi01_Z[1]), .D(il101[0]), .A(il101[1]), .FCI(GND) ); defparam ioi01_0_I_1.INIT=20'h68421; // @28:469481 ARI1 ioi01_0_I_9 ( .FCO(ioi01_0_data_tmp[1]), .S(ioi01_0_I_9_S), .Y(ioi01_0_I_9_Y), .B(ooi01_Z[2]), .C(ooi01_Z[3]), .D(il101[2]), .A(il101[3]), .FCI(ioi01_0_data_tmp[0]) ); defparam ioi01_0_I_9.INIT=20'h68421; // @28:469481 ARI1 ioi01_0_I_15 ( .FCO(ioi01_0_data_tmp[2]), .S(ioi01_0_I_15_S), .Y(ioi01_0_I_15_Y), .B(ooi01_Z[4]), .C(ooi01_Z[5]), .D(il101[4]), .A(il101[5]), .FCI(ioi01_0_data_tmp[1]) ); defparam ioi01_0_I_15.INIT=20'h68421; // @28:469481 ARI1 ioi01_0_I_21 ( .FCO(ioi01_0_data_tmp[3]), .S(ioi01_0_I_21_S), .Y(ioi01_0_I_21_Y), .B(ooi01_Z[6]), .C(ooi01_Z[7]), .D(il101[6]), .A(il101[7]), .FCI(ioi01_0_data_tmp[2]) ); defparam ioi01_0_I_21.INIT=20'h68421; // @28:469481 ARI1 ioi01_0_I_27 ( .FCO(ioi01_0_data_tmp[4]), .S(ioi01_0_I_27_S), .Y(ioi01_0_I_27_Y), .B(ooi01_Z[8]), .C(ooi01_Z[9]), .D(il101[8]), .A(il101[9]), .FCI(ioi01_0_data_tmp[3]) ); defparam ioi01_0_I_27.INIT=20'h68421; // @28:469481 ARI1 ioi01_0_I_33 ( .FCO(ioi01_0_data_tmp[5]), .S(ioi01_0_I_33_S), .Y(ioi01_0_I_33_Y), .B(ooi01_Z[10]), .C(ooi01_Z[11]), .D(il101[10]), .A(il101[11]), .FCI(ioi01_0_data_tmp[4]) ); defparam ioi01_0_I_33.INIT=20'h68421; // @28:469481 ARI1 ioi01_0_I_39 ( .FCO(ioi01_0_data_tmp[6]), .S(ioi01_0_I_39_S), .Y(ioi01_0_I_39_Y), .B(ooi01_Z[12]), .C(ooi01_Z[13]), .D(il101[12]), .A(il101[13]), .FCI(ioi01_0_data_tmp[5]) ); defparam ioi01_0_I_39.INIT=20'h68421; // @28:469481 ARI1 ioi01_0_I_45 ( .FCO(ioi01_0_I_45_FCO), .S(ioi01_0_I_45_S), .Y(ioi01_0_I_45_Y), .B(ooi01_Z[15]), .C(il101[15]), .D(GND), .A(VCC), .FCI(ioi01_0_data_tmp[6]) ); defparam ioi01_0_I_45.INIT=20'h69900; // @28:470516 ARI1 OOi01_s_4128 ( .FCO(OOi01_s_4128_FCO), .S(OOi01_s_4128_S), .Y(OOi01_s_4128_Y), .B(Iio01), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam OOi01_s_4128.INIT=20'h4AA00; // @28:470516 ARI1 \OOi01_cry[0] ( .FCO(OOi01_cry_Z[0]), .S(OOi01_s[0]), .Y(OOi01_cry_Y[0]), .B(Iio01), .C(OOi01_Z[0]), .D(GND), .A(VCC), .FCI(OOi01_s_4128_FCO) ); defparam \OOi01_cry[0] .INIT=20'h6BB00; // @28:470516 ARI1 \OOi01_cry[1] ( .FCO(OOi01_cry_Z[1]), .S(OOi01_s[1]), .Y(OOi01_cry_Y[1]), .B(Iio01), .C(OOi01_Z[1]), .D(GND), .A(VCC), .FCI(OOi01_cry_Z[0]) ); defparam \OOi01_cry[1] .INIT=20'h6BB00; // @28:470516 ARI1 \OOi01_cry[2] ( .FCO(OOi01_cry_Z[2]), .S(OOi01_s[2]), .Y(OOi01_cry_Y[2]), .B(Iio01), .C(OOi01_Z[2]), .D(GND), .A(VCC), .FCI(OOi01_cry_Z[1]) ); defparam \OOi01_cry[2] .INIT=20'h6BB00; // @28:470516 ARI1 \OOi01_cry[3] ( .FCO(OOi01_cry_Z[3]), .S(OOi01_s[3]), .Y(OOi01_cry_Y[3]), .B(Iio01), .C(OOi01_Z[3]), .D(GND), .A(VCC), .FCI(OOi01_cry_Z[2]) ); defparam \OOi01_cry[3] .INIT=20'h6BB00; // @28:470516 ARI1 \OOi01_cry[4] ( .FCO(OOi01_cry_Z[4]), .S(OOi01_s[4]), .Y(OOi01_cry_Y[4]), .B(OOi01_Z[4]), .C(Iio01), .D(Ooo01), .A(VCC), .FCI(OOi01_cry_Z[3]) ); defparam \OOi01_cry[4] .INIT=20'h6D100; // @28:470516 ARI1 \OOi01_cry[5] ( .FCO(OOi01_cry_Z[5]), .S(OOi01_s[5]), .Y(OOi01_cry_Y[5]), .B(Iio01), .C(OOi01_Z[5]), .D(GND), .A(VCC), .FCI(OOi01_cry_Z[4]) ); defparam \OOi01_cry[5] .INIT=20'h6BB00; // @28:470516 ARI1 \OOi01_cry[6] ( .FCO(OOi01_cry_Z[6]), .S(OOi01_s[6]), .Y(OOi01_cry_Y[6]), .B(Iio01), .C(OOi01_Z[6]), .D(GND), .A(VCC), .FCI(OOi01_cry_Z[5]) ); defparam \OOi01_cry[6] .INIT=20'h61100; // @28:470516 ARI1 \OOi01_cry[7] ( .FCO(OOi01_cry_Z[7]), .S(OOi01_s[7]), .Y(OOi01_cry_Y[7]), .B(Iio01), .C(OOi01_Z[7]), .D(OOi019), .A(VCC), .FCI(OOi01_cry_Z[6]) ); defparam \OOi01_cry[7] .INIT=20'h61B00; // @28:470516 ARI1 \OOi01_cry[8] ( .FCO(OOi01_cry_Z[8]), .S(OOi01_s[8]), .Y(OOi01_cry_Y[8]), .B(Iio01), .C(OOi01_Z[8]), .D(GND), .A(VCC), .FCI(OOi01_cry_Z[7]) ); defparam \OOi01_cry[8] .INIT=20'h6BB00; // @28:470516 ARI1 \OOi01_cry[9] ( .FCO(OOi01_cry_Z[9]), .S(OOi01_s[9]), .Y(OOi01_cry_Y[9]), .B(Iio01), .C(OOi01_Z[9]), .D(OOi019), .A(VCC), .FCI(OOi01_cry_Z[8]) ); defparam \OOi01_cry[9] .INIT=20'h61B00; // @28:470516 ARI1 \OOi01_cry[10] ( .FCO(OOi01_cry_Z[10]), .S(OOi01_s[10]), .Y(OOi01_cry_Y[10]), .B(Iio01), .C(OOi01_Z[10]), .D(GND), .A(VCC), .FCI(OOi01_cry_Z[9]) ); defparam \OOi01_cry[10] .INIT=20'h6BB00; // @28:470516 ARI1 \OOi01_cry[11] ( .FCO(OOi01_cry_Z[11]), .S(OOi01_s[11]), .Y(OOi01_cry_Y[11]), .B(Iio01), .C(OOi01_Z[11]), .D(GND), .A(VCC), .FCI(OOi01_cry_Z[10]) ); defparam \OOi01_cry[11] .INIT=20'h6BB00; // @28:470516 ARI1 \OOi01_cry[12] ( .FCO(OOi01_cry_Z[12]), .S(OOi01_s[12]), .Y(OOi01_cry_Y[12]), .B(Iio01), .C(OOi01_Z[12]), .D(OOi019), .A(VCC), .FCI(OOi01_cry_Z[11]) ); defparam \OOi01_cry[12] .INIT=20'h61B00; // @28:470516 ARI1 \OOi01_cry[13] ( .FCO(OOi01_cry_Z[13]), .S(OOi01_s[13]), .Y(OOi01_cry_Y[13]), .B(Iio01), .C(OOi01_Z[13]), .D(GND), .A(VCC), .FCI(OOi01_cry_Z[12]) ); defparam \OOi01_cry[13] .INIT=20'h6BB00; // @28:470516 ARI1 \OOi01_cry[14] ( .FCO(OOi01_cry_Z[14]), .S(OOi01_s[14]), .Y(OOi01_cry_Y[14]), .B(Iio01), .C(OOi01_Z[14]), .D(GND), .A(VCC), .FCI(OOi01_cry_Z[13]) ); defparam \OOi01_cry[14] .INIT=20'h6BB00; // @28:470516 ARI1 \OOi01_cry[15] ( .FCO(OOi01_cry_Z[15]), .S(OOi01_s[15]), .Y(OOi01_cry_Y[15]), .B(Iio01), .C(OOi01_Z[15]), .D(GND), .A(VCC), .FCI(OOi01_cry_Z[14]) ); defparam \OOi01_cry[15] .INIT=20'h6BB00; // @28:470516 ARI1 \OOi01_cry[16] ( .FCO(OOi01_cry_Z[16]), .S(OOi01_s[16]), .Y(OOi01_cry_Y[16]), .B(Iio01), .C(OOi01_Z[16]), .D(OOi019), .A(VCC), .FCI(OOi01_cry_Z[15]) ); defparam \OOi01_cry[16] .INIT=20'h61B00; // @28:470516 ARI1 \OOi01_cry[17] ( .FCO(OOi01_cry_Z[17]), .S(OOi01_s[17]), .Y(OOi01_cry_Y[17]), .B(Iio01), .C(OOi01_Z[17]), .D(OOi019), .A(VCC), .FCI(OOi01_cry_Z[16]) ); defparam \OOi01_cry[17] .INIT=20'h61B00; // @28:470516 ARI1 \OOi01_cry[18] ( .FCO(OOi01_cry_Z[18]), .S(OOi01_s[18]), .Y(OOi01_cry_Y[18]), .B(Iio01), .C(OOi01_Z[18]), .D(GND), .A(VCC), .FCI(OOi01_cry_Z[17]) ); defparam \OOi01_cry[18] .INIT=20'h6BB00; // @28:470516 ARI1 \OOi01_s[20] ( .FCO(OOi01_s_FCO[20]), .S(OOi01_s_Z[20]), .Y(OOi01_s_Y[20]), .B(Iio01), .C(OOi01_Z[20]), .D(OOi019), .A(VCC), .FCI(OOi01_cry_Z[19]) ); defparam \OOi01_s[20] .INIT=20'h41B00; // @28:470516 ARI1 \OOi01_cry[19] ( .FCO(OOi01_cry_Z[19]), .S(OOi01_s[19]), .Y(OOi01_cry_Y[19]), .B(Iio01), .C(OOi01_Z[19]), .D(GND), .A(VCC), .FCI(OOi01_cry_Z[18]) ); defparam \OOi01_cry[19] .INIT=20'h6BB00; // @28:470446 CFG4 \un19_i0O11[0] ( .A(N_752), .B(N_764), .C(O1O11_Z[0]), .D(o1O11_Z), .Y(un19_i0O11_Z[0]) ); defparam \un19_i0O11[0] .INIT=16'h0001; // @28:470446 CFG4 \un19_i0O11[1] ( .A(N_752), .B(N_764), .C(o1O11_Z), .D(un26_i0O11_cry_1_S), .Y(un19_i0O11_Z[1]) ); defparam \un19_i0O11[1] .INIT=16'h0100; // @28:470446 CFG4 \un19_i0O11[2] ( .A(N_752), .B(N_764), .C(o1O11_Z), .D(un26_i0O11_cry_2_S), .Y(un19_i0O11_Z[2]) ); defparam \un19_i0O11[2] .INIT=16'h0100; // @28:470446 CFG4 \un19_i0O11[3] ( .A(N_752), .B(N_764), .C(o1O11_Z), .D(un26_i0O11_cry_3_S), .Y(un19_i0O11_Z[3]) ); defparam \un19_i0O11[3] .INIT=16'h0100; // @28:470446 CFG4 \un19_i0O11[5] ( .A(N_752), .B(N_764), .C(o1O11_Z), .D(un26_i0O11_cry_5_S), .Y(un19_i0O11_Z[5]) ); defparam \un19_i0O11[5] .INIT=16'h0100; // @28:470446 CFG4 \un19_i0O11[13] ( .A(N_752), .B(N_764), .C(o1O11_Z), .D(un26_i0O11_cry_13_S), .Y(un19_i0O11_Z[13]) ); defparam \un19_i0O11[13] .INIT=16'h0100; // @28:470446 CFG4 \un19_i0O11[14] ( .A(N_752), .B(N_764), .C(o1O11_Z), .D(un26_i0O11_cry_14_S), .Y(un19_i0O11_Z[14]) ); defparam \un19_i0O11[14] .INIT=16'h0100; // @28:470446 CFG4 \un19_i0O11[15] ( .A(N_752), .B(N_764), .C(o1O11_Z), .D(un26_i0O11_cry_15_S), .Y(un19_i0O11_Z[15]) ); defparam \un19_i0O11[15] .INIT=16'h0100; // @28:470446 CFG4 \un19_i0O11[18] ( .A(N_752), .B(N_764), .C(o1O11_Z), .D(un26_i0O11_cry_18_S), .Y(un19_i0O11_Z[18]) ); defparam \un19_i0O11[18] .INIT=16'h0100; // @28:470446 CFG4 \un19_i0O11[19] ( .A(N_752), .B(N_764), .C(o1O11_Z), .D(un26_i0O11_cry_19_S), .Y(un19_i0O11_Z[19]) ); defparam \un19_i0O11[19] .INIT=16'h0100; // @28:469655 CFG4 OOO11 ( .A(iii01_Z[1]), .B(lii01_Z), .C(un18_oii01_Z), .D(oii01_Z[0]), .Y(OOO11_Z) ); defparam OOO11.INIT=16'hEC00; // @28:468436 CFG3 iIo01_i_0_o2_1 ( .A(Ioi01_Z), .B(N_604), .C(il101[11]), .Y(N_642) ); defparam iIo01_i_0_o2_1.INIT=8'hED; // @28:468436 CFG3 iIo01_i_0_a2_1_i_o2 ( .A(N_724), .B(iOi01_Z), .C(IOO11_Z), .Y(N_45) ); defparam iIo01_i_0_a2_1_i_o2.INIT=8'h7F; // @28:468816 CFG3 O0i01_0 ( .A(l1o01), .B(ii001[1]), .C(ii001[2]), .Y(N_26) ); defparam O0i01_0.INIT=8'hF8; // @28:469018 CFG4 \ili01[9] ( .A(N_50_i), .B(IOo01[9]), .C(ili01_1_Z[9]), .D(N_10_i), .Y(ili01_Z[9]) ); defparam \ili01[9] .INIT=16'hCF8F; // @28:469018 CFG4 \ili01_1[9] ( .A(OiO11[9]), .B(IiO11[9]), .C(N_606), .D(N_601), .Y(ili01_1_Z[9]) ); defparam \ili01_1[9] .INIT=16'h51F3; // @28:469018 CFG4 \ili01[11] ( .A(N_50_i), .B(IOo01[11]), .C(ili01_1_Z[11]), .D(N_10_i), .Y(ili01_Z[11]) ); defparam \ili01[11] .INIT=16'hCF8F; // @28:469018 CFG4 \ili01_1[11] ( .A(i1i01_Z), .B(OiO11[11]), .C(N_606), .D(N_601), .Y(ili01_1_Z[11]) ); defparam \ili01_1[11] .INIT=16'h31F5; // @28:469018 CFG4 \ili01[1] ( .A(N_50_i), .B(IOo01[1]), .C(ili01_1_Z[1]), .D(N_10_i), .Y(ili01_Z[1]) ); defparam \ili01[1] .INIT=16'hCF8F; // @28:469018 CFG4 \ili01_1[1] ( .A(OiO11[1]), .B(IiO11[1]), .C(N_606), .D(N_601), .Y(ili01_1_Z[1]) ); defparam \ili01_1[1] .INIT=16'h51F3; // @28:469018 CFG4 \ili01[3] ( .A(N_50_i), .B(IOo01[3]), .C(ili01_1_Z[3]), .D(N_10_i), .Y(ili01_Z[3]) ); defparam \ili01[3] .INIT=16'hCF8F; // @28:469018 CFG4 \ili01_1[3] ( .A(OiO11[3]), .B(IiO11[3]), .C(N_606), .D(N_601), .Y(ili01_1_Z[3]) ); defparam \ili01_1[3] .INIT=16'h51F3; // @28:469018 CFG4 \ili01[8] ( .A(N_50_i), .B(IOo01[8]), .C(ili01_1_Z[8]), .D(N_10_i), .Y(ili01_Z[8]) ); defparam \ili01[8] .INIT=16'hCF8F; // @28:469018 CFG4 \ili01_1[8] ( .A(OiO11[8]), .B(IiO11[8]), .C(N_606), .D(N_601), .Y(ili01_1_Z[8]) ); defparam \ili01_1[8] .INIT=16'h51F3; // @28:469018 CFG4 \ili01[0] ( .A(N_50_i), .B(IOo01[0]), .C(ili01_1_Z[0]), .D(N_10_i), .Y(ili01_Z[0]) ); defparam \ili01[0] .INIT=16'hCF8F; // @28:469018 CFG4 \ili01_1[0] ( .A(OiO11[0]), .B(IiO11[0]), .C(N_606), .D(N_601), .Y(ili01_1_Z[0]) ); defparam \ili01_1[0] .INIT=16'h51F3; // @28:469018 CFG4 \ili01[2] ( .A(N_50_i), .B(IOo01[2]), .C(ili01_1_Z[2]), .D(N_10_i), .Y(ili01_Z[2]) ); defparam \ili01[2] .INIT=16'hCF8F; // @28:469018 CFG4 \ili01_1[2] ( .A(OiO11[2]), .B(IiO11[2]), .C(N_606), .D(N_601), .Y(ili01_1_Z[2]) ); defparam \ili01_1[2] .INIT=16'h51F3; // @28:469018 CFG4 \ili01[4] ( .A(N_50_i), .B(IOo01[4]), .C(ili01_1_Z[4]), .D(N_10_i), .Y(ili01_Z[4]) ); defparam \ili01[4] .INIT=16'hCF8F; // @28:469018 CFG4 \ili01_1[4] ( .A(OiO11[4]), .B(IiO11[4]), .C(N_606), .D(N_601), .Y(ili01_1_Z[4]) ); defparam \ili01_1[4] .INIT=16'h51F3; // @28:469018 CFG4 \ili01[13] ( .A(N_50_i), .B(IOo01[13]), .C(ili01_1_Z[13]), .D(N_10_i), .Y(ili01_Z[13]) ); defparam \ili01[13] .INIT=16'hCF8F; // @28:469018 CFG4 \ili01_1[13] ( .A(OiO11[13]), .B(IiO11[13]), .C(N_606), .D(N_601), .Y(ili01_1_Z[13]) ); defparam \ili01_1[13] .INIT=16'h51F3; // @28:469018 CFG4 \ili01[10] ( .A(N_50_i), .B(IOo01[10]), .C(ili01_1_Z[10]), .D(N_10_i), .Y(ili01_Z[10]) ); defparam \ili01[10] .INIT=16'hCF8F; // @28:469018 CFG4 \ili01_1[10] ( .A(OiO11[10]), .B(IiO11[10]), .C(N_606), .D(N_601), .Y(ili01_1_Z[10]) ); defparam \ili01_1[10] .INIT=16'h51F3; // @28:468243 CFG4 Olo01_0_o3 ( .A(ii001[6]), .B(Olo01_0_o3_1_Z), .C(Ii101[15]), .D(ioo01), .Y(N_736) ); defparam Olo01_0_o3.INIT=16'hF575; // @28:468243 CFG3 Olo01_0_o3_1 ( .A(O1i01_Z), .B(OiO11[15]), .C(IOo01[15]), .Y(Olo01_0_o3_1_Z) ); defparam Olo01_0_o3_1.INIT=8'h37; // @28:471666 CFG4 \OOi01_RNITOG631[20] ( .A(OOi01lde_i_a2_12), .B(OOi01lde_i_a2_11), .C(OOi01_Z[20]), .D(OOi01lde_i_a2_18_1), .Y(OOi01lde_i_a2_18) ); defparam \OOi01_RNITOG631[20] .INIT=16'h0800; // @28:471666 CFG4 \OOi01_RNI6UE88[14] ( .A(OOi01_Z[17]), .B(OOi01_Z[16]), .C(OOi01_Z[15]), .D(OOi01_Z[14]), .Y(OOi01lde_i_a2_18_1) ); defparam \OOi01_RNI6UE88[14] .INIT=16'h0001; // @28:467848 CFG2 iOo01_i_a2_0_0_0 ( .A(ii001[7]), .B(ii001[4]), .Y(iOo01_i_a2_0_0_Z) ); defparam iOo01_i_a2_0_0_0.INIT=4'h1; // @28:469603 CFG2 un18_oii01_1 ( .A(ii001[2]), .B(ii001[1]), .Y(un18_oii01_1_Z) ); defparam un18_oii01_1.INIT=4'h1; // @28:468352 CFG2 Ilo01_0_a3_1_0 ( .A(lio01), .B(Ioo01), .Y(un11_IIo01) ); defparam Ilo01_0_a3_1_0.INIT=4'h8; // @28:470548 CFG2 OOi019_0_a2 ( .A(Iio01), .B(Ooo01), .Y(OOi019) ); defparam OOi019_0_a2.INIT=4'h2; // @28:468766 CFG2 lli01_i_a2 ( .A(il101[12]), .B(il101[13]), .Y(N_711_i) ); defparam lli01_i_a2.INIT=4'hE; // @28:468184 CFG2 oIo01_0_a2_2 ( .A(ii001[4]), .B(IlO11_Z), .Y(N_725) ); defparam oIo01_0_a2_2.INIT=4'h8; // @28:468106 CFG2 lIo01_i_x2 ( .A(Ioi01_Z), .B(il101[11]), .Y(N_125_i) ); defparam lIo01_i_x2.INIT=4'h6; // @28:468043 CFG2 IIo01_0_o2 ( .A(IOO11_Z), .B(iOi01_Z), .Y(N_604) ); defparam IIo01_0_o2.INIT=4'h7; // @28:470400 CFG2 \i0O11_0_a2_0[16] ( .A(o1O11_Z), .B(Ooo01), .Y(N_789) ); defparam \i0O11_0_a2_0[16] .INIT=4'h2; // @28:469655 CFG2 o0O11_i_o2 ( .A(l0O11_Z[1]), .B(l0O11_Z[2]), .Y(N_739) ); defparam o0O11_i_o2.INIT=4'h7; // @28:468539 CFG2 oOi01 ( .A(IOi01), .B(lOi01), .Y(oOi01_Z) ); defparam oOi01.INIT=4'h2; // @28:468814 CFG2 \oli01_0_o3[1] ( .A(ii001_0), .B(ii001[0]), .Y(N_277) ); defparam \oli01_0_o3[1] .INIT=4'hE; // @28:469301 CFG2 o1i01_0_o2 ( .A(ii001[3]), .B(ioo01), .Y(N_279) ); defparam o1i01_0_o2.INIT=4'hD; // @28:469148 CFG2 IoO11_RNIB91PE ( .A(Oio01), .B(IoO11_Z), .Y(N_594) ); defparam IoO11_RNIB91PE.INIT=4'hB; // @28:468579 CFG2 l0i01_0_x2 ( .A(l1o01), .B(o1o01), .Y(N_304_i) ); defparam l0i01_0_x2.INIT=4'h6; // @28:469603 CFG3 un18_oii01_1_0 ( .A(lio01), .B(un18_oii01_1_Z), .C(oio01), .Y(un18_oii01_1_0_Z) ); defparam un18_oii01_1_0.INIT=8'h04; // @28:469836 CFG4 lIO11_1 ( .A(oOO11_Z[14]), .B(il101[14]), .C(iIO11_Z[1]), .D(N_1_i), .Y(lIO11_1_Z) ); defparam lIO11_1.INIT=16'h0880; // @28:471666 CFG4 \OOi01_RNIMDE88[10] ( .A(OOi01_Z[13]), .B(OOi01_Z[12]), .C(OOi01_Z[11]), .D(OOi01_Z[10]), .Y(OOi01lde_i_a2_14) ); defparam \OOi01_RNIMDE88[10] .INIT=16'h0001; // @28:471666 CFG4 \OOi01_RNIA0FQD[6] ( .A(OOi01_Z[9]), .B(OOi01_Z[8]), .C(OOi01_Z[7]), .D(OOi01_Z[6]), .Y(OOi01lde_i_a2_13) ); defparam \OOi01_RNIA0FQD[6] .INIT=16'h0001; // @28:471666 CFG4 \OOi01_RNIQFEQD[2] ( .A(OOi01_Z[5]), .B(OOi01_Z[4]), .C(OOi01_Z[3]), .D(OOi01_Z[2]), .Y(OOi01lde_i_a2_12) ); defparam \OOi01_RNIQFEQD[2] .INIT=16'h0001; // @28:471666 CFG4 \OOi01_RNI0NE1B[18] ( .A(OOi01_Z[19]), .B(OOi01_Z[18]), .C(OOi01_Z[1]), .D(OOi01_Z[0]), .Y(OOi01lde_i_a2_11) ); defparam \OOi01_RNI0NE1B[18] .INIT=16'h0001; // @28:469020 CFG3 un3_ili01_0_a3_1 ( .A(N_265), .B(ii001[2]), .C(IOO11_Z), .Y(un3_ili01_0_a3_1_Z) ); defparam un3_ili01_0_a3_1.INIT=8'h02; // @28:468436 CFG4 iIo01_i_0_a2_2_4 ( .A(ioo01), .B(OiO11[15]), .C(i1O11_Z), .D(ii001[6]), .Y(iIo01_i_0_a2_2_4_Z) ); defparam iIo01_i_0_a2_2_4.INIT=16'h4000; // @28:468436 CFG4 iIo01_i_0_a2_2_3 ( .A(ooo01), .B(O1i01_Z), .C(Ii101[15]), .D(IOo01[15]), .Y(iIo01_i_0_a2_2_3_Z) ); defparam iIo01_i_0_a2_2_3.INIT=16'hA080; // @28:470331 CFG4 l1O11_0_a2_0_19_11 ( .A(O1O11_Z[17]), .B(O1O11_Z[15]), .C(O1O11_Z[14]), .D(O1O11_Z[12]), .Y(l1O11_0_a2_0_19_11_Z) ); defparam l1O11_0_a2_0_19_11.INIT=16'h0001; // @28:470331 CFG4 l1O11_0_a2_0_19_10 ( .A(O1O11_Z[19]), .B(O1O11_Z[18]), .C(O1O11_Z[16]), .D(O1O11_Z[7]), .Y(l1O11_0_a2_0_19_10_Z) ); defparam l1O11_0_a2_0_19_10.INIT=16'h0001; // @28:470331 CFG4 l1O11_0_a2_0_19_9 ( .A(O1O11_Z[11]), .B(O1O11_Z[9]), .C(O1O11_Z[6]), .D(O1O11_Z[4]), .Y(l1O11_0_a2_0_19_9_Z) ); defparam l1O11_0_a2_0_19_9.INIT=16'h0001; // @28:470331 CFG4 l1O11_0_a2_0_19_8 ( .A(O1O11_Z[20]), .B(O1O11_Z[13]), .C(O1O11_Z[10]), .D(O1O11_Z[8]), .Y(l1O11_0_a2_0_19_8_Z) ); defparam l1O11_0_a2_0_19_8.INIT=16'h0001; // @28:468111 CFG4 un2_lIo01_i_0_a2_9 ( .A(il101[6]), .B(il101[3]), .C(il101[2]), .D(il101[1]), .Y(un2_lIo01_i_0_a2_9_Z) ); defparam un2_lIo01_i_0_a2_9.INIT=16'h0001; // @28:468111 CFG4 un2_lIo01_i_0_a2_8 ( .A(il101[14]), .B(il101[11]), .C(il101[9]), .D(il101[8]), .Y(un2_lIo01_i_0_a2_8_Z) ); defparam un2_lIo01_i_0_a2_8.INIT=16'h0001; // @28:468111 CFG3 un2_lIo01_i_0_a2_7 ( .A(il101[15]), .B(il101[10]), .C(il101[5]), .Y(un2_lIo01_i_0_a2_7_Z) ); defparam un2_lIo01_i_0_a2_7.INIT=8'h01; // @28:470331 CFG4 l1O11_0_a2_0_15 ( .A(O1O11_Z[5]), .B(O1O11_Z[3]), .C(O1O11_Z[2]), .D(O1O11_Z[1]), .Y(N_764_15) ); defparam l1O11_0_a2_0_15.INIT=16'h0001; // @28:470449 CFG3 un21_i0O11_i_a2 ( .A(ii001[7]), .B(ii001[6]), .C(ii001[2]), .Y(N_752) ); defparam un21_i0O11_i_a2.INIT=8'h01; // @28:469407 CFG3 un3_loi01 ( .A(N_3_i), .B(iii01_Z[1]), .C(oOi01_Z), .Y(un3_loi01_Z) ); defparam un3_loi01.INIT=8'h10; // @28:470001 CFG3 \llO11_i_0_tz[0] ( .A(ii001[5]), .B(IOO11_Z), .C(ii001[3]), .Y(un3_llO11_i_0) ); defparam \llO11_i_0_tz[0] .INIT=8'hC8; // @28:467834 CFG3 un1_oOo01 ( .A(RD_BC_ERROR_c), .B(OOo01[1]), .C(OOo01[0]), .Y(un1_oOo01_Z) ); defparam un1_oOo01.INIT=8'hA2; // @28:470825 CFG2 Ili01_RNI42K8A ( .A(Ili01_Z), .B(ooO11_Z), .Y(un3_iIi01_i_0_i) ); defparam Ili01_RNI42K8A.INIT=4'h8; // @28:469720 CFG3 un11_lOO11 ( .A(N_1_i), .B(iIO11_Z[1]), .C(oOi01_Z), .Y(un11_lOO11_Z) ); defparam un11_lOO11.INIT=8'hEF; // @28:470748 CFG2 Ili01_RNI42K8A_0 ( .A(Ili01_Z), .B(ooO11_Z), .Y(N_239_i) ); defparam Ili01_RNI42K8A_0.INIT=4'h4; // @28:469195 CFG2 ii101_RNO ( .A(ii001[2]), .B(ii001[5]), .Y(N_700_i) ); defparam ii101_RNO.INIT=4'hE; // @28:468730 CFG3 oo101_RNO ( .A(ii001[1]), .B(oo101_2z), .C(ii001_0), .Y(N_319_i) ); defparam oo101_RNO.INIT=8'h74; // @28:470712 CFG3 Ili01_RNO ( .A(ii001[1]), .B(Ili01_Z), .C(ii001[5]), .Y(N_318_i) ); defparam Ili01_RNO.INIT=8'h74; // @28:467848 CFG4 iOo01_i_a2_0_3 ( .A(ii001_0), .B(iOo01_i_a2_0_0_Z), .C(ii001[6]), .D(ii001[5]), .Y(iOo01_i_a2_0_3_Z) ); defparam iOo01_i_a2_0_3.INIT=16'h0004; // @28:467848 CFG4 iOo01_i_a2_0_0 ( .A(N_725), .B(olO11_RNI00C0C3_FCO[15]), .C(ii001_0), .D(IOO11_Z), .Y(iOo01_i_a2_0) ); defparam iOo01_i_a2_0_0.INIT=16'h0777; // @28:469018 CFG4 \ili01_0_a2_2_3_1[7] ( .A(N_594), .B(IOO11_Z), .C(N_279), .D(lOo01), .Y(ili01_0_a2_2_3_1_Z[7]) ); defparam \ili01_0_a2_2_3_1[7] .INIT=16'h00A8; // @28:468111 CFG4 un2_lIo01_i_0_a2_10 ( .A(il101[7]), .B(il101[4]), .C(il101[0]), .D(N_711_i), .Y(un2_lIo01_i_0_a2_10_Z) ); defparam un2_lIo01_i_0_a2_10.INIT=16'h0001; // @28:467827 CFG4 oOo01 ( .A(i1o01), .B(un1_oOo01_Z), .C(o0i01_Z), .D(iio01_Z), .Y(oOo01_Z) ); defparam oOo01.INIT=16'hFFFE; // @28:468814 CFG4 \oli01_0_a3_0[0] ( .A(ii001[2]), .B(N_277), .C(OOo01[0]), .D(ii001[1]), .Y(N_509) ); defparam \oli01_0_a3_0[0] .INIT=16'h0010; // @28:469542 CFG4 lii01 ( .A(iii01_Z[1]), .B(N_3_i), .C(ioi01_0_I_45_FCO), .D(oOi01_Z), .Y(lii01_Z) ); defparam lii01.INIT=16'h0600; // @28:468352 CFG4 Ilo01_0_a3 ( .A(ii001[7]), .B(i1O11_Z), .C(ii001_0), .D(N_739), .Y(N_510) ); defparam Ilo01_0_a3.INIT=16'h0008; // @28:469789 CFG4 OIO11_3 ( .A(lio01), .B(ii001[2]), .C(il101[14]), .D(oio01), .Y(OIO11_3_Z) ); defparam OIO11_3.INIT=16'hFFEF; // @28:469240 CFG3 loO11_0_a2 ( .A(ii001[6]), .B(N_725), .C(olO11_RNI00C0C3_FCO[15]), .Y(loO11) ); defparam loO11_0_a2.INIT=8'h04; // @28:470825 CFG4 \iIi01[4] ( .A(li101[4]), .B(il101[4]), .C(Ili01_Z), .D(ooO11_Z), .Y(iIi01_Z[4]) ); defparam \iIi01[4] .INIT=16'hCAAA; // @28:519611 CFG4 \un1_l0o01_0[0] ( .A(oi101_1z), .B(loo01), .C(ii001[1]), .D(ii001[6]), .Y(un1_l0o01_0_Z[0]) ); defparam \un1_l0o01_0[0] .INIT=16'h5702; // @28:470748 CFG4 \oIi01[3] ( .A(il101[3]), .B(Ii101[3]), .C(ooO11_Z), .D(Ili01_Z), .Y(oIi01_Z[3]) ); defparam \oIi01[3] .INIT=16'hCCAC; // @28:470825 CFG4 \iIi01[3] ( .A(li101[3]), .B(il101[3]), .C(Ili01_Z), .D(ooO11_Z), .Y(iIi01_Z[3]) ); defparam \iIi01[3] .INIT=16'hCAAA; // @28:468814 CFG4 \oli01_0[1] ( .A(OOo01[1]), .B(ii001[7]), .C(N_277), .D(un18_oii01_1_Z), .Y(oli01[1]) ); defparam \oli01_0[1] .INIT=16'hF2F0; // @28:469098 CFG2 un27_ili01_i_o2 ( .A(N_26), .B(N_594), .Y(N_606) ); defparam un27_ili01_i_o2.INIT=4'hE; // @28:468184 CFG3 oIo01_0_a2_1_0 ( .A(ii001[5]), .B(N_642), .C(oOo01_Z), .Y(oIo01_0_a2_1) ); defparam oIo01_0_a2_1_0.INIT=8'h07; // @28:468352 CFG4 Ilo01_0_0 ( .A(ii001[3]), .B(ii001_0), .C(un11_IIo01), .D(N_510), .Y(Ilo01_0_0_Z) ); defparam Ilo01_0_0.INIT=16'hFF20; // @28:470331 CFG4 l1O11_0_a2_0_19 ( .A(l1O11_0_a2_0_19_11_Z), .B(l1O11_0_a2_0_19_10_Z), .C(l1O11_0_a2_0_19_9_Z), .D(l1O11_0_a2_0_19_8_Z), .Y(N_764_19) ); defparam l1O11_0_a2_0_19.INIT=16'h8000; // @28:468106 CFG3 lIo01_i_o2 ( .A(oOo01_Z), .B(IlO11_Z), .C(ii001[4]), .Y(N_603) ); defparam lIo01_i_o2.INIT=8'hEF; // @28:468814 CFG4 \oli01_0[0] ( .A(ii001[1]), .B(N_509), .C(l1o01), .D(ii001[7]), .Y(oli01[0]) ); defparam \oli01_0[0] .INIT=16'hFFCE; // @28:469821 CFG4 IIO11 ( .A(iIO11_Z[1]), .B(N_1_i), .C(OIO11_3_Z), .D(oOi01_Z), .Y(IIO11_Z) ); defparam IIO11.INIT=16'h0100; // @28:469836 CFG3 lIO11 ( .A(oOi01_Z), .B(lIO11_1_Z), .C(iOO11_0_data_tmp[7]), .Y(lIO11_Z) ); defparam lIO11.INIT=8'h08; // @28:469603 CFG4 un18_oii01 ( .A(oOi01_Z), .B(un18_oii01_1_0_Z), .C(ioi01_0_I_45_FCO), .D(lii01_Z), .Y(un18_oii01_Z) ); defparam un18_oii01.INIT=16'h004C; // @28:469301 CFG4 o1i01_0 ( .A(OiO11[11]), .B(i1i01_Z), .C(N_279), .D(ooO11_Z), .Y(o1i01) ); defparam o1i01_0.INIT=16'h3BCA; // @28:469018 CFG4 \ili01_0_tz[0] ( .A(lOo01), .B(N_279), .C(N_26), .D(un3_ili01_0_a3_1_Z), .Y(N_601) ); defparam \ili01_0_tz[0] .INIT=16'h3B0A; // @28:467995 CFG4 llo01_0 ( .A(ii001[0]), .B(l1o01), .C(ii001[1]), .D(oOo01_Z), .Y(llo01) ); defparam llo01_0.INIT=16'h00BA; // @28:470001 CFG3 \llO11[13] ( .A(olO11_Z[13]), .B(ooi01_Z[13]), .C(un3_llO11_i_0), .Y(llO11_Z[13]) ); defparam \llO11[13] .INIT=8'hCA; // @28:469697 CFG3 \lOO11[0] ( .A(un11_lOO11_Z), .B(il101[0]), .C(oOO11_Z[0]), .Y(lOO11_Z[0]) ); defparam \lOO11[0] .INIT=8'hE4; // @28:469697 CFG3 \lOO11[1] ( .A(un11_lOO11_Z), .B(il101[1]), .C(oOO11_Z[1]), .Y(lOO11_Z[1]) ); defparam \lOO11[1] .INIT=8'hE4; // @28:469697 CFG3 \lOO11[5] ( .A(un11_lOO11_Z), .B(il101[5]), .C(oOO11_Z[5]), .Y(lOO11_Z[5]) ); defparam \lOO11[5] .INIT=8'hE4; // @28:469697 CFG3 \lOO11[15] ( .A(un11_lOO11_Z), .B(il101[15]), .C(oOO11_Z[15]), .Y(lOO11_Z[15]) ); defparam \lOO11[15] .INIT=8'hE4; // @28:469697 CFG3 \lOO11[12] ( .A(un11_lOO11_Z), .B(il101[12]), .C(oOO11_Z[12]), .Y(lOO11_Z[12]) ); defparam \lOO11[12] .INIT=8'hE4; // @28:469697 CFG3 \lOO11[7] ( .A(un11_lOO11_Z), .B(il101[7]), .C(oOO11_Z[7]), .Y(lOO11_Z[7]) ); defparam \lOO11[7] .INIT=8'hE4; // @28:469697 CFG3 \lOO11[4] ( .A(un11_lOO11_Z), .B(il101[4]), .C(oOO11_Z[4]), .Y(lOO11_Z[4]) ); defparam \lOO11[4] .INIT=8'hE4; // @28:469697 CFG3 \lOO11_0[11] ( .A(un11_lOO11_Z), .B(il101[11]), .C(oOO11_Z[11]), .Y(lOO11[11]) ); defparam \lOO11_0[11] .INIT=8'hE4; // @28:469697 CFG3 \lOO11_0[9] ( .A(un11_lOO11_Z), .B(il101[9]), .C(oOO11_Z[9]), .Y(lOO11[9]) ); defparam \lOO11_0[9] .INIT=8'hE4; // @28:469697 CFG3 \lOO11[13] ( .A(un11_lOO11_Z), .B(il101[13]), .C(oOO11_Z[13]), .Y(lOO11_Z[13]) ); defparam \lOO11[13] .INIT=8'hE4; // @28:469405 CFG3 \loi01[9] ( .A(un3_loi01_Z), .B(il101[9]), .C(ooi01_Z[9]), .Y(loi01_Z[9]) ); defparam \loi01[9] .INIT=8'hD8; // @28:469789 CFG3 OIO11 ( .A(iOO11_0_data_tmp[7]), .B(oOi01_Z), .C(OIO11_3_Z), .Y(OIO11_Z) ); defparam OIO11.INIT=8'hF8; // @28:469405 CFG3 \loi01[3] ( .A(un3_loi01_Z), .B(il101[3]), .C(ooi01_Z[3]), .Y(loi01_Z[3]) ); defparam \loi01[3] .INIT=8'hD8; // @28:469697 CFG3 \lOO11[14] ( .A(un11_lOO11_Z), .B(il101[14]), .C(oOO11_Z[14]), .Y(lOO11_Z[14]) ); defparam \lOO11[14] .INIT=8'hE4; // @28:469697 CFG3 \lOO11[3] ( .A(un11_lOO11_Z), .B(il101[3]), .C(oOO11_Z[3]), .Y(lOO11_Z[3]) ); defparam \lOO11[3] .INIT=8'hE4; // @28:470001 CFG3 \llO11[3] ( .A(olO11_Z[3]), .B(ooi01_Z[3]), .C(un3_llO11_i_0), .Y(llO11_Z[3]) ); defparam \llO11[3] .INIT=8'hCA; // @28:469697 CFG3 \lOO11_0[6] ( .A(un11_lOO11_Z), .B(il101[6]), .C(oOO11_Z[6]), .Y(lOO11[6]) ); defparam \lOO11_0[6] .INIT=8'hE4; // @28:469697 CFG3 \lOO11_0[8] ( .A(un11_lOO11_Z), .B(il101[8]), .C(oOO11_Z[8]), .Y(lOO11[8]) ); defparam \lOO11_0[8] .INIT=8'hE4; // @28:469697 CFG3 \lOO11_0[10] ( .A(un11_lOO11_Z), .B(il101[10]), .C(oOO11_Z[10]), .Y(lOO11[10]) ); defparam \lOO11_0[10] .INIT=8'hE4; // @28:469697 CFG3 \lOO11_0[2] ( .A(un11_lOO11_Z), .B(il101[2]), .C(oOO11_Z[2]), .Y(lOO11[2]) ); defparam \lOO11_0[2] .INIT=8'hE4; // @28:470217 CFG4 \l0O11_RNO[2] ( .A(CO0), .B(lio01), .C(l0O11_Z[2]), .D(l0O11_Z[1]), .Y(N_732_i) ); defparam \l0O11_RNO[2] .INIT=16'hC8C0; // @28:470217 CFG4 \l0O11_RNO[1] ( .A(CO0), .B(lio01), .C(l0O11_Z[2]), .D(l0O11_Z[1]), .Y(N_733_i) ); defparam \l0O11_RNO[1] .INIT=16'hC488; // @28:470217 CFG3 \l0O11_RNO[0] ( .A(CO0), .B(lio01), .C(N_739), .Y(N_734_i) ); defparam \l0O11_RNO[0] .INIT=8'h4C; // @28:471666 CFG4 iio01_RNO ( .A(OOi01lde_i_a2_18), .B(Iio01), .C(OOi01lde_i_a2_14), .D(OOi01lde_i_a2_13), .Y(iio01_2) ); defparam iio01_RNO.INIT=16'h2000; // @28:468111 CFG4 un2_lIo01_i_0_a2 ( .A(un2_lIo01_i_0_a2_10_Z), .B(un2_lIo01_i_0_a2_9_Z), .C(un2_lIo01_i_0_a2_8_Z), .D(un2_lIo01_i_0_a2_7_Z), .Y(N_724) ); defparam un2_lIo01_i_0_a2.INIT=16'h8000; // @28:470331 CFG3 l1O11_0_a2_0 ( .A(O1O11_Z[0]), .B(N_764_19), .C(N_764_15), .Y(N_779) ); defparam l1O11_0_a2_0.INIT=8'h80; // @28:470449 CFG3 un21_i0O11_i_a2_0 ( .A(O1O11_Z[0]), .B(N_764_19), .C(N_764_15), .Y(N_764) ); defparam un21_i0O11_i_a2_0.INIT=8'h40; // @28:468352 CFG4 Ilo01_0 ( .A(oOo01_Z), .B(Ilo01_0_0_Z), .C(ii001_0), .D(IOO11_Z), .Y(Ilo01) ); defparam Ilo01_0.INIT=16'hCCDC; // @28:467944 CFG4 OIo01_0 ( .A(N_265), .B(oOo01_Z), .C(i1O11_Z), .D(ii001[2]), .Y(OIo01) ); defparam OIo01_0.INIT=16'h1311; // @28:470281 CFG2 I1O11_0_o3 ( .A(N_736), .B(ii001[7]), .Y(N_43) ); defparam I1O11_0_o3.INIT=4'hE; // @28:470281 CFG3 I1O11_0_o2 ( .A(ii001[2]), .B(N_265), .C(oOo01_Z), .Y(N_741) ); defparam I1O11_0_o2.INIT=8'hFE; // @28:470049 CFG3 \olO11_RNO[0] ( .A(olO11_Z[0]), .B(ooi01_Z[0]), .C(un3_llO11_i_0), .Y(N_502_i) ); defparam \olO11_RNO[0] .INIT=8'hCA; // @28:469018 CFG4 \ili01_0_0[5] ( .A(OiO11[5]), .B(IiO11[5]), .C(N_606), .D(N_601), .Y(ili01_0_0_Z[5]) ); defparam \ili01_0_0[5] .INIT=16'hAE0C; // @28:469018 CFG4 \ili01_0_0[15] ( .A(OiO11[15]), .B(IiO11[15]), .C(N_601), .D(N_606), .Y(ili01_0_0_Z[15]) ); defparam \ili01_0_0[15] .INIT=16'hA0EC; // @28:469018 CFG4 \ili01_0_0[12] ( .A(OiO11[12]), .B(IiO11[12]), .C(N_606), .D(N_601), .Y(ili01_0_0_Z[12]) ); defparam \ili01_0_0[12] .INIT=16'hAE0C; // @28:469018 CFG4 \ili01_0_0[7] ( .A(OiO11[7]), .B(IiO11[7]), .C(N_606), .D(N_601), .Y(ili01_0_0_Z[7]) ); defparam \ili01_0_0[7] .INIT=16'hAE0C; // @28:469018 CFG4 \ili01_0_0[6] ( .A(OiO11[6]), .B(IiO11[6]), .C(N_606), .D(N_601), .Y(ili01_0_0_Z[6]) ); defparam \ili01_0_0[6] .INIT=16'hAE0C; // @28:470449 CFG3 un21_i0O11_i ( .A(o1O11_Z), .B(N_752), .C(N_764), .Y(N_731) ); defparam un21_i0O11_i.INIT=8'hFE; // @28:469560 CFG4 \oii01[0] ( .A(N_3_i), .B(un3_loi01_Z), .C(lii01_Z), .D(un18_oii01_Z), .Y(oii01_Z[0]) ); defparam \oii01[0] .INIT=16'hFEDC; // @28:469859 CFG3 \oIO11[1] ( .A(OIO11_Z), .B(lIO11_Z), .C(iIO11_Z[1]), .Y(oIO11_Z[1]) ); defparam \oIO11[1] .INIT=8'hDC; // @28:469560 CFG3 \oii01[1] ( .A(iii01_Z[1]), .B(lii01_Z), .C(un18_oii01_Z), .Y(oii01_Z[1]) ); defparam \oii01[1] .INIT=8'hEC; // @28:468106 CFG4 lIo01_i_0 ( .A(N_125_i), .B(ii001[3]), .C(N_45), .D(N_603), .Y(lIo01_i_0_Z) ); defparam lIo01_i_0.INIT=16'h1F0F; // @28:468436 CFG4 iIo01_i_0_0 ( .A(iIo01_i_0_a2_2_4_Z), .B(iIo01_i_0_a2_2_3_Z), .C(N_45), .D(N_642), .Y(iIo01_i_0_0_Z) ); defparam iIo01_i_0_0.INIT=16'h0F7F; // @28:468243 CFG4 Olo01_0_a2_1 ( .A(N_739), .B(N_45), .C(ii001[7]), .D(i1O11_Z), .Y(Olo01_0_a2_1_Z) ); defparam Olo01_0_a2_1.INIT=16'h80C0; // @28:468995 CFG4 un5_I0i01_0_a3 ( .A(ii001[3]), .B(IOO11_Z), .C(N_724), .D(IlO11_Z), .Y(un15_ili01_3) ); defparam un5_I0i01_0_a3.INIT=16'h0800; // @28:469859 CFG4 \oIO11[0] ( .A(IIO11_Z), .B(N_1_i), .C(lIO11_Z), .D(OIO11_Z), .Y(oIO11_Z[0]) ); defparam \oIO11[0] .INIT=16'hBABE; // @28:468043 CFG4 IIo01_0_0_tz ( .A(N_724), .B(ii001[3]), .C(un11_IIo01), .D(N_604), .Y(IIo01_0_0_tz_Z) ); defparam IIo01_0_0_tz.INIT=16'h0C08; // @28:470281 CFG3 I1O11_0_a2_0 ( .A(N_724), .B(i1O11_Z), .C(IOO11_Z), .Y(I1O11_0_a2_0_Z) ); defparam I1O11_0_a2_0.INIT=8'h4C; // @28:468436 CFG4 iIo01_i_0_o2 ( .A(iIo01_i_0_a2_2_3_Z), .B(iIo01_i_0_a2_2_4_Z), .C(N_724), .D(IOO11_Z), .Y(N_589) ); defparam iIo01_i_0_o2.INIT=16'hF777; // @28:470400 CFG4 \i0O11_0[6] ( .A(o1O11_Z), .B(un26_i0O11_cry_6_S), .C(N_752), .D(N_764), .Y(i0O11[6]) ); defparam \i0O11_0[6] .INIT=16'hAAAE; // @28:470331 CFG4 l1O11_0_a2_1 ( .A(IOO11_Z), .B(N_724), .C(N_741), .D(N_43), .Y(l1O11_0_a2_1_Z) ); defparam l1O11_0_a2_1.INIT=16'hF080; // @28:468932 CFG2 OoO11_0_a2 ( .A(N_589), .B(ii001[5]), .Y(OoO11) ); defparam OoO11_0_a2.INIT=4'h1; // @28:470400 CFG3 \i0O11_0[16] ( .A(N_731), .B(N_789), .C(un26_i0O11_cry_16_S), .Y(i0O11[16]) ); defparam \i0O11_0[16] .INIT=8'hDC; // @28:470400 CFG3 \i0O11_0[17] ( .A(N_731), .B(N_789), .C(un26_i0O11_cry_17_S), .Y(i0O11[17]) ); defparam \i0O11_0[17] .INIT=8'hDC; // @28:470400 CFG4 \i0O11_0[12] ( .A(un26_i0O11_cry_12_S), .B(N_731), .C(ioO11), .D(N_789), .Y(i0O11[12]) ); defparam \i0O11_0[12] .INIT=16'hF222; // @28:470400 CFG4 \i0O11_0[11] ( .A(un26_i0O11_cry_11_S), .B(N_731), .C(ioO11), .D(N_789), .Y(i0O11[11]) ); defparam \i0O11_0[11] .INIT=16'h2F22; // @28:470400 CFG4 \i0O11_0[10] ( .A(un26_i0O11_cry_10_S), .B(ioO11), .C(N_731), .D(N_789), .Y(i0O11[10]) ); defparam \i0O11_0[10] .INIT=16'h3B0A; // @28:470400 CFG4 \i0O11_0[9] ( .A(un26_i0O11_cry_9_S), .B(ioO11), .C(N_731), .D(N_789), .Y(i0O11[9]) ); defparam \i0O11_0[9] .INIT=16'hCE0A; // @28:470400 CFG4 \i0O11_0[8] ( .A(un26_i0O11_cry_8_S), .B(ioO11), .C(N_731), .D(N_789), .Y(i0O11[8]) ); defparam \i0O11_0[8] .INIT=16'h3B0A; // @28:470400 CFG4 \i0O11_0[7] ( .A(un26_i0O11_cry_7_S), .B(ioO11), .C(N_731), .D(N_789), .Y(i0O11[7]) ); defparam \i0O11_0[7] .INIT=16'hCE0A; // @28:470400 CFG4 \i0O11_0[20] ( .A(un26_i0O11_s_20_S), .B(N_731), .C(ioO11), .D(N_789), .Y(i0O11[20]) ); defparam \i0O11_0[20] .INIT=16'hF222; // @28:470400 CFG4 \i0O11_0[4] ( .A(un26_i0O11_cry_4_S), .B(ioO11), .C(N_731), .D(N_789), .Y(i0O11[4]) ); defparam \i0O11_0[4] .INIT=16'hCE0A; // @28:469655 CFG2 OlO11 ( .A(oIO11_Z[0]), .B(iIO11_Z[1]), .Y(OlO11_Z) ); defparam OlO11.INIT=4'h8; // @28:468184 CFG4 oIo01_0_a2_3 ( .A(ii001[6]), .B(N_45), .C(N_589), .D(oIo01_0_a2_1), .Y(oIo01_0_a2_3_Z) ); defparam oIo01_0_a2_3.INIT=16'h8000; // @28:468043 CFG4 IIo01_0 ( .A(i1O11_Z), .B(ii001[2]), .C(IIo01_0_0_tz_Z), .D(oOo01_Z), .Y(IIo01) ); defparam IIo01_0.INIT=16'h00F8; // @28:468243 CFG4 Olo01_0 ( .A(Olo01_0_a2_1_Z), .B(oOo01_Z), .C(I1O11_0_a2_0_Z), .D(N_736), .Y(Olo01) ); defparam Olo01_0.INIT=16'h22F2; // @28:469018 CFG4 \ili01_0_a2_2[7] ( .A(ii001[4]), .B(un15_ili01_3), .C(N_26), .D(ili01_0_a2_2_3_1_Z[7]), .Y(N_10_i) ); defparam \ili01_0_a2_2[7] .INIT=16'h0100; // @28:469018 CFG3 \ili01_0_a2_3[7] ( .A(N_26), .B(ii001[4]), .C(un15_ili01_3), .Y(N_50_i) ); defparam \ili01_0_a2_3[7] .INIT=8'h54; // @28:468149 CFG4 I0o01_RNO ( .A(un3_llO11_i_0), .B(iOi01_Z), .C(lIo01_i_0_Z), .D(N_603), .Y(N_372_i) ); defparam I0o01_RNO.INIT=16'h080F; // @28:469018 CFG4 \ili01_0[14] ( .A(N_26), .B(N_50_i), .C(OiO11[14]), .D(lOo01), .Y(ili01_0_Z[14]) ); defparam \ili01_0[14] .INIT=16'hDCCC; // @28:470281 CFG4 I1O11_0 ( .A(N_43), .B(I1O11_0_a2_0_Z), .C(loO11), .D(N_741), .Y(I1O11) ); defparam I1O11_0.INIT=16'hF4FF; // @28:470331 CFG4 l1O11_0 ( .A(l1O11_0_a2_1_Z), .B(loO11), .C(i1O11_Z), .D(N_779), .Y(l1O11) ); defparam l1O11_0.INIT=16'hFF20; // @28:467909 CFG4 olo01_RNO ( .A(N_45), .B(iOo01_i_a2_0_3_Z), .C(iOo01_i_a2_0), .D(oOo01_Z), .Y(N_22_i) ); defparam olo01_RNO.INIT=16'hFF13; // @28:468504 CFG4 o0o01_RNO ( .A(ii001[5]), .B(N_589), .C(oOo01_Z), .D(iIo01_i_0_0_Z), .Y(N_371_i) ); defparam o0o01_RNO.INIT=16'h003B; // @28:469018 CFG4 \ili01[14] ( .A(N_26), .B(IOo01[14]), .C(ili01_0_Z[14]), .D(ili01_0_a2_2_3_1_Z[7]), .Y(ili01_Z[14]) ); defparam \ili01[14] .INIT=16'hF4F0; // @28:468184 CFG4 oIo01_0 ( .A(olO11_RNI00C0C3_FCO[15]), .B(N_725), .C(oIo01_0_a2_3_Z), .D(Olo01), .Y(oIo01) ); defparam oIo01_0.INIT=16'h44F4; // @28:469018 CFG4 \ili01_0[12] ( .A(N_50_i), .B(IOo01[12]), .C(ili01_0_0_Z[12]), .D(N_10_i), .Y(ili01[12]) ); defparam \ili01_0[12] .INIT=16'hFCF8; // @28:469018 CFG4 \ili01_0[7] ( .A(N_50_i), .B(IOo01[7]), .C(ili01_0_0_Z[7]), .D(N_10_i), .Y(ili01[7]) ); defparam \ili01_0[7] .INIT=16'hFCF8; // @28:469018 CFG4 \ili01_0[6] ( .A(N_50_i), .B(IOo01[6]), .C(ili01_0_0_Z[6]), .D(N_10_i), .Y(ili01[6]) ); defparam \ili01_0[6] .INIT=16'hFCF8; // @28:469018 CFG4 \ili01_0[5] ( .A(N_50_i), .B(IOo01[5]), .C(ili01_0_0_Z[5]), .D(N_10_i), .Y(ili01[5]) ); defparam \ili01_0[5] .INIT=16'hFCF8; // @28:469018 CFG4 \ili01_0[15] ( .A(N_50_i), .B(IOo01[15]), .C(ili01_0_0_Z[15]), .D(N_10_i), .Y(ili01[15]) ); defparam \ili01_0[15] .INIT=16'hFCF8; // @28:467599 CTSE_PEANX_SYNC_1s_26s CTSE_PEANX_SYNC_1 ( .ii001_0(ii001[1]), .l0101(l0101[15:0]), .OiO11(OiO11[15:0]), .i0101({i0101_1z[15], N_15098, i0101_1z[13:12], N_15097, i0101_1z[10:0]}), .IiO11({IiO11[15], N_15100, IiO11[13:12], N_15099, IiO11[10:0]}), .N_265(N_265), .iio01_2_i(iio01_2_i), .OOi01lde_i_a2_13(OOi01lde_i_a2_13), .OOi01lde_i_a2_14(OOi01lde_i_a2_14), .OOi01lde_i_a2_18(OOi01lde_i_a2_18), .Illi0_i(Illi0_i), .i1o01_1z(i1o01), .Ooo01_1z(Ooo01), .ioO11_1z(ioO11), .Ioo01_1z(Ioo01), .lOo01_1z(lOo01), .loo01_2z(loo01), .ooo01_2z(ooo01), .ioo01_2z(ioo01), .Oio01_1z(Oio01), .Iio01_1z(Iio01), .lio01_1z(lio01), .oio01_2z(oio01), .o1o01_1z(o1o01), .IOi01_1z(IOi01), .lOi01_1z(lOi01), .O0101(O0101), .I0101_1z(I0101), .Oo101(Oo101_1z), .Io101(Io101), .i1101(i1101_1z), .o1101(o1101), .I1101_1z(I1101), .l1101(l1101), .lOI11(lOI11), .oOI11(oOI11), .IoIO1(IoIO1), .ll101(ll101), .RD_BC_ERROR_c(RD_BC_ERROR_c), .OO101_1z(OO101), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .oi001_i(oi001_i), .l1o01_1z(l1o01) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_MSGMII_PEANX_TOP_1s_26s */ module CTSE_PETBM_26s_0s_1s ( Ii101, li101, l0101, i0101, OII11, iOI11, N_277, oo101, io101, lOI11, OOOO1, BIBUF_0_Y, CORETSE_0_MDOEN, oOI11, ii101_1z, oi101, I0101_1z, iiO11_1z, CORETSE_0_MDO, O0I11_1z, Io101_1z, III11_1z, o1101_1z, OOI11_1z, O0101_1z, I1101_1z, iI1i0, l1101_1z, oII11_1z, lII11_1z, iII11_2z, i1101_2z, Oo101_1z, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input [15:0] Ii101 ; input [15:0] li101 ; output [15:0] l0101 ; output [15:0] i0101 ; output [9:0] OII11 ; output [2:0] iOI11 ; input N_277 ; input oo101 ; input io101 ; output lOI11 ; output OOOO1 ; input BIBUF_0_Y ; input CORETSE_0_MDOEN ; output oOI11 ; input ii101_1z ; input oi101 ; output I0101_1z ; output iiO11_1z ; input CORETSE_0_MDO ; output O0I11_1z ; output Io101_1z ; output III11_1z ; output o1101_1z ; output OOI11_1z ; output O0101_1z ; output I1101_1z ; input iI1i0 ; output l1101_1z ; output oII11_1z ; output lII11_1z ; output iII11_2z ; output i1101_2z ; output Oo101_1z ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire N_277 ; wire oo101 ; wire io101 ; wire lOI11 ; wire OOOO1 ; wire BIBUF_0_Y ; wire CORETSE_0_MDOEN ; wire oOI11 ; wire ii101_1z ; wire oi101 ; wire I0101_1z ; wire iiO11_1z ; wire CORETSE_0_MDO ; wire O0I11_1z ; wire Io101_1z ; wire III11_1z ; wire o1101_1z ; wire OOI11_1z ; wire O0101_1z ; wire I1101_1z ; wire iI1i0 ; wire l1101_1z ; wire oII11_1z ; wire lII11_1z ; wire iII11_2z ; wire i1101_2z ; wire Oo101_1z ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire [15:0] olii1_Z; wire [15:1] llii1_Z; wire [1:0] o_Z; wire [15:0] l1ii1_Z; wire [15:1] I1ii1; wire [0:0] un1_I1ii1_0_Z; wire [4:0] iIii1_Z; wire [0:0] iIii1ce_Z; wire [4:0] iioi1_Z; wire [4:0] oioi1_Z; wire [4:0] IIii1_Z; wire [4:0] OIii1_Z; wire [14:12] I1ii1_0_3_1_Z; wire [14:2] I1ii1_0_0_Z; wire [14:4] I1ii1_0_3_Z; wire [0:0] un1_I1ii1_0_2_1_Z; wire [0:0] un1_I1ii1_0_2_Z; wire [3:3] I1ii1_0_2_1_Z; wire [10:2] I1ii1_0_2_Z; wire [8:8] I1ii1_0_a2_1_Z; wire [0:0] iIii1ce_0_Z; wire [0:0] oioi1_tz_Z; wire [11:4] I1ii1_0_1_Z; wire [15:1] I1ii1_0_0_0_Z; wire [15:13] I1ii1_0_0_1_Z; wire [14:2] I1ii1_0_5_Z; wire [15:13] I1ii1_0_0_6_Z; wire [0:0] un1_I1ii1_0_4_Z; wire [9:3] I1ii1_0_4_Z; wire [15:1] I1ii1_0_0_4_Z; wire [1:1] I1ii1_0_0_2_Z; wire [8:6] I1ii1_0_6_Z; wire [15:1] I1ii1_0_0_3_Z; wire Oioi1_Z ; wire VCC ; wire oooi146_Z ; wire GND ; wire iooi1_Z ; wire oooi1_Z ; wire l1101_2 ; wire IOii1_Z ; wire OOii1_Z ; wire oOii1_Z ; wire lOii1 ; wire OlOOo ; wire Ilii1_Z ; wire Olii1_Z ; wire ilii1_Z ; wire ilii1_2 ; wire l0ii1_Z ; wire l0ii1_2 ; wire O0ii1_Z ; wire o0ii1_Z ; wire IOI11_Z ; wire o25 ; wire OII1118_Z ; wire Iioi1_Z ; wire I0ii1_Z ; wire I0ii1_2_Z ; wire i0ii1_Z ; wire i0ii1_2_Z ; wire IlOo1_Z ; wire lioi1_Z ; wire N_85_i ; wire N_84_i ; wire N_86_i ; wire l01015 ; wire NN_1 ; wire NN_2 ; wire N_570 ; wire N_580 ; wire iOOOo_2_Z ; wire N_439 ; wire N_430 ; wire N_481 ; wire N_453 ; wire un7_Iiii1_Z ; wire un6_I1ii1 ; wire N_848 ; wire N_867 ; wire un7_liii1_Z ; wire N_587 ; wire l0ii1_2_0_a2_0_0_Z ; wire N_560 ; wire N_614 ; wire N_583 ; wire N_660 ; wire N_865 ; wire un1_OOii1_0_Z ; wire un5_ioIO1_NE_1_Z ; wire IOOOo_4 ; wire N_572 ; wire iiii1_3_Z ; wire N_504_1 ; wire OlOOo_0_a3_1_Z ; wire iOii1_0_Z ; wire un1_Olii1_5_Z ; wire N_562 ; wire un10_o1ii1_3_Z ; wire un9_iOii1lt4 ; wire lOii1_0_a3_0_2_Z ; wire un5_ioIO1_NE_Z ; wire un1_Olii1_Z ; wire un9_Olii1 ; wire un4_llii1 ; wire iOii1_2_Z ; wire OII1118_0_Z ; wire un9_ioIO1_1_Z ; wire un1_OOii1_Z ; wire iOii1_Z ; wire N_845 ; wire N_616 ; wire un1_ioIO1_Z ; wire N_934 ; wire N_759 ; wire un17_ioIO1_Z ; wire N_914 ; wire N_455 ; wire N_908 ; wire N_578 ; wire N_766 ; wire N_582 ; wire N_577 ; wire N_478 ; // @28:521237 SLE Oioi1 ( .Q(Oioi1_Z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[6]), .EN(oooi146_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:521237 SLE Oo101 ( .Q(Oo101_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[14]), .EN(oooi146_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:521237 SLE i1101 ( .Q(i1101_2z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[8]), .EN(oooi146_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:521237 SLE iII11 ( .Q(iII11_2z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[4]), .EN(oooi146_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:521237 SLE iooi1 ( .Q(iooi1_Z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[5]), .EN(oooi146_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:521237 SLE lII11 ( .Q(lII11_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[13]), .EN(oooi146_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:521237 SLE oII11 ( .Q(oII11_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[12]), .EN(oooi146_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:521237 SLE oooi1 ( .Q(oooi1_Z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[0]), .EN(oooi146_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520427 SLE l1101 ( .Q(l1101_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(l1101_2), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:518812 SLE IOii1 ( .Q(IOii1_Z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(OOii1_Z), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:518869 SLE oOii1 ( .Q(oOii1_Z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lOii1), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520683 (* cdc_synchronizer=1 *) SLE I1101 ( .Q(I1101_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(OlOOo), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519172 SLE Ilii1 ( .Q(Ilii1_Z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(Olii1_Z), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519810 SLE ilii1 ( .Q(ilii1_Z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilii1_2), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519943 SLE l0ii1 ( .Q(l0ii1_Z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(l0ii1_2), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519989 SLE O0ii1 ( .Q(O0ii1_Z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ilii1_Z), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520099 SLE o0ii1 ( .Q(o0ii1_Z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(l0ii1_Z), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519856 SLE IOI11 ( .Q(IOI11_Z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[8]), .EN(o25), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519856 SLE O0101 ( .Q(O0101_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[12]), .EN(o25), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519856 SLE OOI11 ( .Q(OOI11_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[14]), .EN(o25), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:521096 SLE o1101 ( .Q(o1101_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[15]), .EN(OII1118_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:521237 SLE III11 ( .Q(III11_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[15]), .EN(oooi146_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:521237 SLE Io101 ( .Q(Io101_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[11]), .EN(oooi146_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:521237 SLE O0I11 ( .Q(O0I11_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[1]), .EN(oooi146_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:518606 SLE Iioi1 ( .Q(Iioi1_Z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CORETSE_0_MDO), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520025 SLE I0ii1 ( .Q(I0ii1_Z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(I0ii1_2_Z), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520135 SLE i0ii1 ( .Q(i0ii1_Z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(i0ii1_2_Z), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520063 SLE iiO11 ( .Q(iiO11_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(I0ii1_Z), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520173 SLE I0101 ( .Q(I0101_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(i0ii1_Z), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:518659 SLE IlOo1 ( .Q(IlOo1_Z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lioi1_Z), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519237 SLE \olii1[4] ( .Q(olii1_Z[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(llii1_Z[4]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519237 SLE \olii1[3] ( .Q(olii1_Z[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(llii1_Z[3]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519237 SLE \olii1[2] ( .Q(olii1_Z[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(llii1_Z[2]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519237 SLE \olii1[1] ( .Q(olii1_Z[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(llii1_Z[1]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519237 SLE \olii1[0] ( .Q(olii1_Z[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_85_i), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:521096 SLE \OII11_Z[1] ( .Q(OII11[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[1]), .EN(OII1118_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:521096 SLE \OII11_Z[0] ( .Q(OII11[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[0]), .EN(OII1118_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519856 SLE \o[1] ( .Q(o_Z[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[6]), .EN(o25), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519856 SLE \o[0] ( .Q(o_Z[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[13]), .EN(o25), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519237 SLE \olii1[15] ( .Q(olii1_Z[15]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(llii1_Z[15]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519237 SLE \olii1[14] ( .Q(olii1_Z[14]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(llii1_Z[14]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519237 SLE \olii1[13] ( .Q(olii1_Z[13]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(llii1_Z[13]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519237 SLE \olii1[12] ( .Q(olii1_Z[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(llii1_Z[12]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519237 SLE \olii1[11] ( .Q(olii1_Z[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(llii1_Z[11]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519237 SLE \olii1[10] ( .Q(olii1_Z[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_84_i), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519237 SLE \olii1[9] ( .Q(olii1_Z[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(llii1_Z[9]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519237 SLE \olii1[8] ( .Q(olii1_Z[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(llii1_Z[8]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519237 SLE \olii1[7] ( .Q(olii1_Z[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(llii1_Z[7]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519237 SLE \olii1[6] ( .Q(olii1_Z[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(llii1_Z[6]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519237 SLE \olii1[5] ( .Q(olii1_Z[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(llii1_Z[5]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520827 SLE \i0101_Z[3] ( .Q(i0101[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[3]), .EN(N_86_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520827 SLE \i0101_Z[2] ( .Q(i0101[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[2]), .EN(N_86_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520827 SLE \i0101_Z[1] ( .Q(i0101[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[1]), .EN(N_86_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520827 SLE \i0101_Z[0] ( .Q(i0101[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[0]), .EN(N_86_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:521096 SLE \iOI11_Z[2] ( .Q(iOI11[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[14]), .EN(OII1118_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:521096 SLE \iOI11_Z[1] ( .Q(iOI11[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[13]), .EN(OII1118_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:521096 SLE \iOI11_Z[0] ( .Q(iOI11[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[12]), .EN(OII1118_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:521096 SLE \OII11_Z[9] ( .Q(OII11[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[9]), .EN(OII1118_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:521096 SLE \OII11_Z[8] ( .Q(OII11[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[8]), .EN(OII1118_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:521096 SLE \OII11_Z[7] ( .Q(OII11[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[7]), .EN(OII1118_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:521096 SLE \OII11_Z[6] ( .Q(OII11[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[6]), .EN(OII1118_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:521096 SLE \OII11_Z[5] ( .Q(OII11[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[5]), .EN(OII1118_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:521096 SLE \OII11_Z[4] ( .Q(OII11[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[4]), .EN(OII1118_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:521096 SLE \OII11_Z[3] ( .Q(OII11[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[3]), .EN(OII1118_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:521096 SLE \OII11_Z[2] ( .Q(OII11[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[2]), .EN(OII1118_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520389 SLE \l0101_Z[2] ( .Q(l0101[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[2]), .EN(l01015), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520389 SLE \l0101_Z[1] ( .Q(l0101[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[1]), .EN(l01015), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520389 SLE \l0101_Z[0] ( .Q(l0101[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[0]), .EN(l01015), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520827 SLE \i0101_Z[15] ( .Q(i0101[15]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[15]), .EN(N_86_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520827 SLE \i0101_Z[14] ( .Q(NN_1), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[14]), .EN(N_86_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520827 SLE \i0101_Z[13] ( .Q(i0101[13]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[13]), .EN(N_86_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520827 SLE \i0101_Z[12] ( .Q(i0101[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[12]), .EN(N_86_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520827 SLE \i0101_Z[11] ( .Q(NN_2), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[11]), .EN(N_86_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520827 SLE \i0101_Z[10] ( .Q(i0101[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[10]), .EN(N_86_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520827 SLE \i0101_Z[9] ( .Q(i0101[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[9]), .EN(N_86_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520827 SLE \i0101_Z[8] ( .Q(i0101[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[8]), .EN(N_86_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520827 SLE \i0101_Z[7] ( .Q(i0101[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[7]), .EN(N_86_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520827 SLE \i0101_Z[6] ( .Q(i0101[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[6]), .EN(N_86_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520827 SLE \i0101_Z[5] ( .Q(i0101[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[5]), .EN(N_86_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520827 SLE \i0101_Z[4] ( .Q(i0101[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[4]), .EN(N_86_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519611 SLE \l1ii1[1] ( .Q(l1ii1_Z[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(I1ii1[1]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519611 SLE \l1ii1[0] ( .Q(l1ii1_Z[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un1_I1ii1_0_Z[0]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520389 SLE \l0101_Z[15] ( .Q(l0101[15]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[15]), .EN(l01015), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520389 SLE \l0101_Z[14] ( .Q(l0101[14]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[14]), .EN(l01015), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520389 SLE \l0101_Z[13] ( .Q(l0101[13]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[13]), .EN(l01015), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520389 SLE \l0101_Z[12] ( .Q(l0101[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[12]), .EN(l01015), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520389 SLE \l0101_Z[11] ( .Q(l0101[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[11]), .EN(l01015), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520389 SLE \l0101_Z[10] ( .Q(l0101[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[10]), .EN(l01015), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520389 SLE \l0101_Z[9] ( .Q(l0101[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[9]), .EN(l01015), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520389 SLE \l0101_Z[8] ( .Q(l0101[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[8]), .EN(l01015), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520389 SLE \l0101_Z[7] ( .Q(l0101[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[7]), .EN(l01015), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520389 SLE \l0101_Z[6] ( .Q(l0101[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[6]), .EN(l01015), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520389 SLE \l0101_Z[5] ( .Q(l0101[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[5]), .EN(l01015), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520389 SLE \l0101_Z[4] ( .Q(l0101[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[4]), .EN(l01015), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:520389 SLE \l0101_Z[3] ( .Q(l0101[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(olii1_Z[3]), .EN(l01015), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519090 SLE \iIii1[0] ( .Q(iIii1_Z[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CORETSE_0_MDO), .EN(iIii1ce_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519611 SLE \l1ii1[15] ( .Q(l1ii1_Z[15]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(I1ii1[15]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519611 SLE \l1ii1[14] ( .Q(l1ii1_Z[14]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(I1ii1[14]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519611 SLE \l1ii1[13] ( .Q(l1ii1_Z[13]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(I1ii1[13]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519611 SLE \l1ii1[12] ( .Q(l1ii1_Z[12]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(I1ii1[12]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519611 SLE \l1ii1[11] ( .Q(l1ii1_Z[11]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(I1ii1[11]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519611 SLE \l1ii1[10] ( .Q(l1ii1_Z[10]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(I1ii1[10]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519611 SLE \l1ii1[9] ( .Q(l1ii1_Z[9]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(I1ii1[9]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519611 SLE \l1ii1[8] ( .Q(l1ii1_Z[8]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(I1ii1[8]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519611 SLE \l1ii1[7] ( .Q(l1ii1_Z[7]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(I1ii1[7]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519611 SLE \l1ii1[6] ( .Q(l1ii1_Z[6]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(I1ii1[6]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519611 SLE \l1ii1[5] ( .Q(l1ii1_Z[5]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(I1ii1[5]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519611 SLE \l1ii1[4] ( .Q(l1ii1_Z[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(I1ii1[4]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519611 SLE \l1ii1[3] ( .Q(l1ii1_Z[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(I1ii1[3]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519611 SLE \l1ii1[2] ( .Q(l1ii1_Z[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(I1ii1[2]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:518736 SLE \iioi1[4] ( .Q(iioi1_Z[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(oioi1_Z[4]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:518736 SLE \iioi1[3] ( .Q(iioi1_Z[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(oioi1_Z[3]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:518736 SLE \iioi1[2] ( .Q(iioi1_Z[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(oioi1_Z[2]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:518736 SLE \iioi1[1] ( .Q(iioi1_Z[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(oioi1_Z[1]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:518736 SLE \iioi1[0] ( .Q(iioi1_Z[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(oioi1_Z[0]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:518972 SLE \IIii1[4] ( .Q(IIii1_Z[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(OIii1_Z[4]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:518972 SLE \IIii1[3] ( .Q(IIii1_Z[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(OIii1_Z[3]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:518972 SLE \IIii1[2] ( .Q(IIii1_Z[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(OIii1_Z[2]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:518972 SLE \IIii1[1] ( .Q(IIii1_Z[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(OIii1_Z[1]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:518972 SLE \IIii1[0] ( .Q(IIii1_Z[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(OIii1_Z[0]), .EN(iI1i0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519090 SLE \iIii1[4] ( .Q(iIii1_Z[4]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(iIii1_Z[3]), .EN(iIii1ce_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519090 SLE \iIii1[3] ( .Q(iIii1_Z[3]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(iIii1_Z[2]), .EN(iIii1ce_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519090 SLE \iIii1[2] ( .Q(iIii1_Z[2]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(iIii1_Z[1]), .EN(iIii1ce_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519090 SLE \iIii1[1] ( .Q(iIii1_Z[1]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(iIii1_Z[0]), .EN(iIii1ce_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:519564 CFG4 \I1ii1_0_a3_6[8] ( .A(N_570), .B(li101[8]), .C(N_580), .D(iOOOo_2_Z), .Y(N_439) ); defparam \I1ii1_0_a3_6[8] .INIT=16'h8000; // @28:519564 CFG4 \I1ii1_0_a3_4[9] ( .A(N_570), .B(li101[9]), .C(N_580), .D(iOOOo_2_Z), .Y(N_430) ); defparam \I1ii1_0_a3_4[9] .INIT=16'h8000; // @28:519564 CFG4 \I1ii1_0_a3_4[2] ( .A(N_570), .B(li101[2]), .C(N_580), .D(iOOOo_2_Z), .Y(N_481) ); defparam \I1ii1_0_a3_4[2] .INIT=16'h8000; // @28:519564 CFG4 \I1ii1_0_a3_6[6] ( .A(N_570), .B(li101[6]), .C(N_580), .D(iOOOo_2_Z), .Y(N_453) ); defparam \I1ii1_0_a3_6[6] .INIT=16'h8000; // @28:519564 CFG4 \I1ii1_0_a2_2_i_o3[15] ( .A(Ilii1_Z), .B(un7_Iiii1_Z), .C(un6_I1ii1), .D(N_848), .Y(N_867) ); defparam \I1ii1_0_a2_2_i_o3[15] .INIT=16'hFF7F; // @28:519564 CFG4 \I1ii1_0_a2_5_0_a2[15] ( .A(Ilii1_Z), .B(un7_liii1_Z), .C(un6_I1ii1), .D(N_848), .Y(N_587) ); defparam \I1ii1_0_a2_5_0_a2[15] .INIT=16'h0080; // @28:519976 CFG3 l0ii1_2_0_a2_0_0 ( .A(iIii1_Z[3]), .B(oOii1_Z), .C(iIii1_Z[4]), .Y(l0ii1_2_0_a2_0_0_Z) ); defparam l0ii1_2_0_a2_0_0.INIT=8'h04; // @28:519566 CFG4 un6_I1ii1_0_a2 ( .A(iioi1_Z[0]), .B(N_560), .C(iioi1_Z[4]), .D(iioi1_Z[1]), .Y(un6_I1ii1) ); defparam un6_I1ii1_0_a2.INIT=16'h0008; // @28:519564 CFG4 \I1ii1_0_3[12] ( .A(N_614), .B(I1ii1_0_3_1_Z[12]), .C(O0101_1z), .D(I1ii1_0_0_Z[12]), .Y(I1ii1_0_3_Z[12]) ); defparam \I1ii1_0_3[12] .INIT=16'hFFB3; // @28:519564 CFG4 \I1ii1_0_3_1[12] ( .A(oII11_1z), .B(li101[12]), .C(N_583), .D(N_587), .Y(I1ii1_0_3_1_Z[12]) ); defparam \I1ii1_0_3_1[12] .INIT=16'h153F; // @28:519564 CFG4 \I1ii1_0_3[14] ( .A(N_614), .B(I1ii1_0_3_1_Z[14]), .C(OOI11_1z), .D(I1ii1_0_0_Z[14]), .Y(I1ii1_0_3_Z[14]) ); defparam \I1ii1_0_3[14] .INIT=16'hFFB3; // @28:519564 CFG4 \I1ii1_0_3_1[14] ( .A(li101[14]), .B(Oo101_1z), .C(N_587), .D(N_583), .Y(I1ii1_0_3_1_Z[14]) ); defparam \I1ii1_0_3_1[14] .INIT=16'h153F; // @28:519564 CFG4 \un1_I1ii1_0_2[0] ( .A(N_660), .B(N_583), .C(li101[0]), .D(un1_I1ii1_0_2_1_Z[0]), .Y(un1_I1ii1_0_2_Z[0]) ); defparam \un1_I1ii1_0_2[0] .INIT=16'hEAFF; // @28:519564 CFG4 \un1_I1ii1_0_2_1[0] ( .A(N_867), .B(N_587), .C(oooi1_Z), .D(OII11[0]), .Y(un1_I1ii1_0_2_1_Z[0]) ); defparam \un1_I1ii1_0_2_1[0] .INIT=16'h2A3F; // @28:519564 CFG4 \I1ii1_0_2[3] ( .A(N_660), .B(N_583), .C(li101[3]), .D(I1ii1_0_2_1_Z[3]), .Y(I1ii1_0_2_Z[3]) ); defparam \I1ii1_0_2[3] .INIT=16'hFFEA; // @28:519564 CFG4 \I1ii1_0_2_1[3] ( .A(N_865), .B(N_867), .C(l1ii1_Z[2]), .D(OII11[3]), .Y(I1ii1_0_2_1_Z[3]) ); defparam \I1ii1_0_2_1[3] .INIT=16'h7350; // @28:518791 CFG2 un1_OOii1_0 ( .A(IOii1_Z), .B(Iioi1_Z), .Y(un1_OOii1_0_Z) ); defparam un1_OOii1_0.INIT=4'h4; // @28:519652 CFG2 un5_ioIO1_NE_1 ( .A(IIii1_Z[1]), .B(IIii1_Z[3]), .Y(un5_ioIO1_NE_1_Z) ); defparam un5_ioIO1_NE_1.INIT=4'hD; // @28:519145 CFG2 un1_Olii1_1 ( .A(iioi1_Z[2]), .B(iioi1_Z[3]), .Y(N_560) ); defparam un1_Olii1_1.INIT=4'h8; // @28:520058 CFG2 I0ii1_2 ( .A(ilii1_Z), .B(O0ii1_Z), .Y(I0ii1_2_Z) ); defparam I0ii1_2.INIT=4'hE; // @28:520523 CFG2 IOOOo_4_0_a2 ( .A(iIii1_Z[3]), .B(iIii1_Z[4]), .Y(IOOOo_4) ); defparam IOOOo_4_0_a2.INIT=4'h1; // @28:520722 CFG2 oOI11_0_a2 ( .A(iIii1_Z[0]), .B(iIii1_Z[1]), .Y(N_572) ); defparam oOI11_0_a2.INIT=4'h8; // @28:520248 CFG2 iiii1_3 ( .A(iIii1_Z[2]), .B(iIii1_Z[1]), .Y(iiii1_3_Z) ); defparam iiii1_3.INIT=4'h1; // @28:518852 CFG2 lOii1_0_a3_0_1 ( .A(iioi1_Z[2]), .B(iioi1_Z[3]), .Y(N_504_1) ); defparam lOii1_0_a3_0_1.INIT=4'h1; // @28:520168 CFG2 i0ii1_2 ( .A(l0ii1_Z), .B(o0ii1_Z), .Y(i0ii1_2_Z) ); defparam i0ii1_2.INIT=4'hE; // @28:519564 CFG3 \I1ii1_0_a2_1[8] ( .A(iIii1_Z[0]), .B(IOOOo_4), .C(IOii1_Z), .Y(I1ii1_0_a2_1_Z[8]) ); defparam \I1ii1_0_a2_1[8] .INIT=8'h80; // @28:519090 CFG3 \iIii1ce_0[0] ( .A(IOii1_Z), .B(iioi1_Z[4]), .C(oOii1_Z), .Y(iIii1ce_0_Z[0]) ); defparam \iIii1ce_0[0] .INIT=8'h32; // @28:520631 CFG4 OlOOo_0_a3_1 ( .A(oi101), .B(iIii1_Z[1]), .C(iIii1_Z[2]), .D(iIii1_Z[0]), .Y(OlOOo_0_a3_1_Z) ); defparam OlOOo_0_a3_1.INIT=16'h0080; // @28:518909 CFG3 iOii1_0 ( .A(iioi1_Z[4]), .B(iioi1_Z[1]), .C(iioi1_Z[2]), .Y(iOii1_0_Z) ); defparam iOii1_0.INIT=8'h54; // @28:519145 CFG4 un1_Olii1_5 ( .A(iioi1_Z[4]), .B(iioi1_Z[1]), .C(iioi1_Z[0]), .D(Ilii1_Z), .Y(un1_Olii1_5_Z) ); defparam un1_Olii1_5.INIT=16'h0001; // @22:211 CFG3 un5_OOii1_0_a2 ( .A(iioi1_Z[4]), .B(iioi1_Z[1]), .C(iioi1_Z[0]), .Y(N_562) ); defparam un5_OOii1_0_a2.INIT=8'h10; // @28:519768 CFG4 un10_o1ii1_3 ( .A(iioi1_Z[4]), .B(iioi1_Z[1]), .C(iioi1_Z[3]), .D(iioi1_Z[2]), .Y(un10_o1ii1_3_Z) ); defparam un10_o1ii1_3.INIT=16'h8000; // @28:520457 CFG3 l1101_2_iv_0_0 ( .A(ii101_1z), .B(l1101_1z), .C(oOI11), .Y(l1101_2) ); defparam l1101_2_iv_0_0.INIT=8'hF4; // @28:519564 CFG3 \I1ii1_0_a2_10_0_a2[15] ( .A(iIii1_Z[2]), .B(iIii1_Z[0]), .C(iIii1_Z[1]), .Y(N_570) ); defparam \I1ii1_0_a2_10_0_a2[15] .INIT=8'h01; // @28:518925 CFG3 un9_iOii1lto2 ( .A(iioi1_Z[2]), .B(iioi1_Z[1]), .C(iioi1_Z[0]), .Y(un9_iOii1lt4) ); defparam un9_iOii1lto2.INIT=8'h80; // @28:520827 CFG2 oOI11_0_a3_RNIFORSC ( .A(oOI11), .B(iI1i0), .Y(N_86_i) ); defparam oOI11_0_a3_RNIFORSC.INIT=4'h8; // @28:518852 CFG4 lOii1_0_a3_0_2 ( .A(N_504_1), .B(CORETSE_0_MDO), .C(Iioi1_Z), .D(oOii1_Z), .Y(lOii1_0_a3_0_2_Z) ); defparam lOii1_0_a3_0_2.INIT=16'h0008; // @28:521041 CFG4 un7_Iiii1 ( .A(iIii1_Z[0]), .B(iiii1_3_Z), .C(iIii1_Z[4]), .D(iIii1_Z[3]), .Y(un7_Iiii1_Z) ); defparam un7_Iiii1.INIT=16'h0040; // @28:521182 CFG4 un7_liii1 ( .A(iIii1_Z[0]), .B(iiii1_3_Z), .C(iIii1_Z[4]), .D(iIii1_Z[3]), .Y(un7_liii1_Z) ); defparam un7_liii1.INIT=16'h0080; // @28:519652 CFG4 un5_ioIO1_NE ( .A(IIii1_Z[0]), .B(un5_ioIO1_NE_1_Z), .C(IIii1_Z[4]), .D(IIii1_Z[2]), .Y(un5_ioIO1_NE_Z) ); defparam un5_ioIO1_NE.INIT=16'hFFEF; // @28:519145 CFG4 un1_Olii1 ( .A(CORETSE_0_MDOEN), .B(IOii1_Z), .C(N_560), .D(un1_Olii1_5_Z), .Y(un1_Olii1_Z) ); defparam un1_Olii1.INIT=16'h4000; // @28:519160 CFG4 un9_Olii1lto4_0 ( .A(iioi1_Z[0]), .B(N_560), .C(iioi1_Z[4]), .D(iioi1_Z[1]), .Y(un9_Olii1) ); defparam un9_Olii1lto4_0.INIT=16'hFCF8; // @28:519214 CFG4 un4_llii1lto4 ( .A(iioi1_Z[4]), .B(iioi1_Z[1]), .C(iioi1_Z[3]), .D(iioi1_Z[2]), .Y(un4_llii1) ); defparam un4_llii1lto4.INIT=16'hEAAA; // @28:518909 CFG2 iOii1_2 ( .A(un9_iOii1lt4), .B(iioi1_Z[3]), .Y(iOii1_2_Z) ); defparam iOii1_2.INIT=4'h1; // @28:518646 CFG4 lioi1 ( .A(IlOo1_Z), .B(Iioi1_Z), .C(CORETSE_0_MDOEN), .D(CORETSE_0_MDO), .Y(lioi1_Z) ); defparam lioi1.INIT=16'hB0A0; // @28:521129 CFG3 OII1118_0 ( .A(oOii1_Z), .B(un5_ioIO1_NE_Z), .C(iI1i0), .Y(OII1118_0_Z) ); defparam OII1118_0.INIT=8'h20; // @28:519680 CFG3 un9_ioIO1_1 ( .A(Ilii1_Z), .B(un5_ioIO1_NE_Z), .C(l1ii1_Z[15]), .Y(un9_ioIO1_1_Z) ); defparam un9_ioIO1_1.INIT=8'h20; // @28:518791 CFG4 un1_OOii1 ( .A(N_562), .B(CORETSE_0_MDO), .C(un1_OOii1_0_Z), .D(N_504_1), .Y(un1_OOii1_Z) ); defparam un1_OOii1.INIT=16'h2000; // @28:518909 CFG4 iOii1 ( .A(iOii1_0_Z), .B(iOii1_2_Z), .C(IOii1_Z), .D(oOii1_Z), .Y(iOii1_Z) ); defparam iOii1.INIT=16'h8880; // @28:518699 CFG3 \oioi1_tz[0] ( .A(IlOo1_Z), .B(Ilii1_Z), .C(un10_o1ii1_3_Z), .Y(oioi1_tz_Z[0]) ); defparam \oioi1_tz[0] .INIT=8'h0E; // @28:521063 CFG2 IIOOo_1_i_o3 ( .A(un5_ioIO1_NE_Z), .B(IOii1_Z), .Y(N_848) ); defparam IIOOo_1_i_o3.INIT=4'hB; // @28:519588 CFG2 un12_I1ii1_i_o3 ( .A(un4_llii1), .B(Ilii1_Z), .Y(N_865) ); defparam un12_I1ii1_i_o3.INIT=4'h7; // @28:519564 CFG2 \I1ii1_0_a2_0_i_o3[8] ( .A(un6_I1ii1), .B(Ilii1_Z), .Y(N_845) ); defparam \I1ii1_0_a2_0_i_o3[8] .INIT=4'h7; // @28:520919 CFG2 iOOOo_2 ( .A(un6_I1ii1), .B(un5_ioIO1_NE_Z), .Y(iOOOo_2_Z) ); defparam iOOOo_2.INIT=4'h2; // @28:520631 CFG4 OlOOo_0_a3 ( .A(IOOOo_4), .B(OlOOo_0_a3_1_Z), .C(un6_I1ii1), .D(N_848), .Y(OlOOo) ); defparam OlOOo_0_a3.INIT=16'h0080; // @28:519976 CFG4 l0ii1_2_0_a2_0 ( .A(l0ii1_2_0_a2_0_0_Z), .B(iioi1_Z[0]), .C(un5_ioIO1_NE_Z), .D(un10_o1ii1_3_Z), .Y(N_616) ); defparam l0ii1_2_0_a2_0.INIT=16'h0200; // @28:519652 CFG3 un1_ioIO1 ( .A(CORETSE_0_MDOEN), .B(iOOOo_2_Z), .C(Ilii1_Z), .Y(un1_ioIO1_Z) ); defparam un1_ioIO1.INIT=8'h80; // @28:519090 CFG4 \iIii1ce[0] ( .A(iIii1ce_0_Z[0]), .B(N_560), .C(iOii1_2_Z), .D(iI1i0), .Y(iIii1ce_Z[0]) ); defparam \iIii1ce[0] .INIT=16'h0200; // @28:518699 CFG4 \oioi1[4] ( .A(iioi1_Z[4]), .B(iioi1_Z[3]), .C(oioi1_tz_Z[0]), .D(un9_iOii1lt4), .Y(oioi1_Z[4]) ); defparam \oioi1[4] .INIT=16'h60A0; // @28:518699 CFG2 \oioi1[0] ( .A(oioi1_tz_Z[0]), .B(iioi1_Z[0]), .Y(oioi1_Z[0]) ); defparam \oioi1[0] .INIT=4'h2; // @28:518699 CFG4 \oioi1[2] ( .A(iioi1_Z[0]), .B(oioi1_tz_Z[0]), .C(iioi1_Z[2]), .D(iioi1_Z[1]), .Y(oioi1_Z[2]) ); defparam \oioi1[2] .INIT=16'h48C0; // @28:518699 CFG3 \oioi1[3] ( .A(oioi1_tz_Z[0]), .B(iioi1_Z[3]), .C(un9_iOii1lt4), .Y(oioi1_Z[3]) ); defparam \oioi1[3] .INIT=8'h28; // @28:518699 CFG3 \oioi1[1] ( .A(iioi1_Z[0]), .B(oioi1_tz_Z[0]), .C(iioi1_Z[1]), .Y(oioi1_Z[1]) ); defparam \oioi1[1] .INIT=8'h48; // @28:518791 CFG4 OOii1 ( .A(IOii1_Z), .B(IlOo1_Z), .C(un1_OOii1_Z), .D(Ilii1_Z), .Y(OOii1_Z) ); defparam OOii1.INIT=16'hFAF8; // @28:519212 CFG4 \llii1[1] ( .A(CORETSE_0_MDOEN), .B(un4_llii1), .C(olii1_Z[0]), .D(oOii1_Z), .Y(llii1_Z[1]) ); defparam \llii1[1] .INIT=16'h8000; // @28:519212 CFG4 \llii1[3] ( .A(CORETSE_0_MDOEN), .B(un4_llii1), .C(olii1_Z[2]), .D(oOii1_Z), .Y(llii1_Z[3]) ); defparam \llii1[3] .INIT=16'h8000; // @28:519212 CFG4 \llii1[5] ( .A(CORETSE_0_MDOEN), .B(un4_llii1), .C(olii1_Z[4]), .D(oOii1_Z), .Y(llii1_Z[5]) ); defparam \llii1[5] .INIT=16'h8000; // @28:519212 CFG4 \llii1[7] ( .A(CORETSE_0_MDOEN), .B(un4_llii1), .C(olii1_Z[6]), .D(oOii1_Z), .Y(llii1_Z[7]) ); defparam \llii1[7] .INIT=16'h8000; // @28:519212 CFG4 \llii1[8] ( .A(CORETSE_0_MDOEN), .B(un4_llii1), .C(olii1_Z[7]), .D(oOii1_Z), .Y(llii1_Z[8]) ); defparam \llii1[8] .INIT=16'h8000; // @28:519212 CFG4 \llii1[9] ( .A(CORETSE_0_MDOEN), .B(un4_llii1), .C(olii1_Z[8]), .D(oOii1_Z), .Y(llii1_Z[9]) ); defparam \llii1[9] .INIT=16'h8000; // @28:519212 CFG4 \llii1[11] ( .A(CORETSE_0_MDOEN), .B(un4_llii1), .C(olii1_Z[10]), .D(oOii1_Z), .Y(llii1_Z[11]) ); defparam \llii1[11] .INIT=16'h8000; // @28:519212 CFG4 \llii1[12] ( .A(CORETSE_0_MDOEN), .B(un4_llii1), .C(olii1_Z[11]), .D(oOii1_Z), .Y(llii1_Z[12]) ); defparam \llii1[12] .INIT=16'h8000; // @28:519212 CFG4 \llii1[13] ( .A(CORETSE_0_MDOEN), .B(un4_llii1), .C(olii1_Z[12]), .D(oOii1_Z), .Y(llii1_Z[13]) ); defparam \llii1[13] .INIT=16'h8000; // @28:519212 CFG4 \llii1[14] ( .A(CORETSE_0_MDOEN), .B(un4_llii1), .C(olii1_Z[13]), .D(oOii1_Z), .Y(llii1_Z[14]) ); defparam \llii1[14] .INIT=16'h8000; // @28:519212 CFG4 \llii1[15] ( .A(CORETSE_0_MDOEN), .B(un4_llii1), .C(olii1_Z[14]), .D(oOii1_Z), .Y(llii1_Z[15]) ); defparam \llii1[15] .INIT=16'h8000; // @28:518852 CFG4 lOii1_0_0 ( .A(oOii1_Z), .B(N_562), .C(CORETSE_0_MDOEN), .D(lOii1_0_a3_0_2_Z), .Y(lOii1) ); defparam lOii1_0_0.INIT=16'hECA0; // @28:519145 CFG4 Olii1 ( .A(un9_Olii1), .B(un1_Olii1_Z), .C(Ilii1_Z), .D(un10_o1ii1_3_Z), .Y(Olii1_Z) ); defparam Olii1.INIT=16'hCCEC; // @28:519212 CFG4 \llii1[6] ( .A(CORETSE_0_MDOEN), .B(un4_llii1), .C(olii1_Z[5]), .D(oOii1_Z), .Y(llii1_Z[6]) ); defparam \llii1[6] .INIT=16'h8000; // @28:519212 CFG4 \llii1[4] ( .A(CORETSE_0_MDOEN), .B(un4_llii1), .C(olii1_Z[3]), .D(oOii1_Z), .Y(llii1_Z[4]) ); defparam \llii1[4] .INIT=16'h8000; // @28:519212 CFG4 \llii1[2] ( .A(CORETSE_0_MDOEN), .B(un4_llii1), .C(olii1_Z[1]), .D(oOii1_Z), .Y(llii1_Z[2]) ); defparam \llii1[2] .INIT=16'h8000; // @28:519564 CFG4 \I1ii1_0_a2[8] ( .A(iiii1_3_Z), .B(I1ii1_0_a2_1_Z[8]), .C(iOOOo_2_Z), .D(N_845), .Y(N_660) ); defparam \I1ii1_0_a2[8] .INIT=16'h0080; // @28:521286 CFG4 oooi146 ( .A(un10_o1ii1_3_Z), .B(iioi1_Z[0]), .C(OII1118_0_Z), .D(un7_liii1_Z), .Y(oooi146_Z) ); defparam oooi146.INIT=16'h2000; // @28:519564 CFG4 \I1ii1_0_a2_1[15] ( .A(IOii1_Z), .B(N_845), .C(iIii1_Z[4]), .D(iIii1_Z[3]), .Y(N_580) ); defparam \I1ii1_0_a2_1[15] .INIT=16'h0200; // @28:519564 CFG4 \I1ii1_0_a2_6_0_a2_0[15] ( .A(iIii1_Z[4]), .B(iIii1_Z[3]), .C(N_848), .D(N_845), .Y(N_934) ); defparam \I1ii1_0_a2_6_0_a2_0[15] .INIT=16'h0001; // @28:521129 CFG4 OII1118 ( .A(un10_o1ii1_3_Z), .B(iioi1_Z[0]), .C(OII1118_0_Z), .D(un7_Iiii1_Z), .Y(OII1118_Z) ); defparam OII1118.INIT=16'h2000; // @28:519976 CFG2 l0ii1_2_0_a2 ( .A(N_616), .B(N_570), .Y(N_759) ); defparam l0ii1_2_0_a2.INIT=4'h8; // @28:518940 CFG3 \OIii1[4] ( .A(IIii1_Z[3]), .B(iOii1_Z), .C(IIii1_Z[4]), .Y(OIii1_Z[4]) ); defparam \OIii1[4] .INIT=8'hB8; // @28:518940 CFG3 \OIii1[3] ( .A(IIii1_Z[2]), .B(iOii1_Z), .C(IIii1_Z[3]), .Y(OIii1_Z[3]) ); defparam \OIii1[3] .INIT=8'hB8; // @28:518940 CFG3 \OIii1[2] ( .A(IIii1_Z[1]), .B(iOii1_Z), .C(IIii1_Z[2]), .Y(OIii1_Z[2]) ); defparam \OIii1[2] .INIT=8'hB8; // @28:519712 CFG4 un17_ioIO1 ( .A(BIBUF_0_Y), .B(Ilii1_Z), .C(un5_ioIO1_NE_Z), .D(un9_Olii1), .Y(un17_ioIO1_Z) ); defparam un17_ioIO1.INIT=16'hA2AA; // @28:518940 CFG3 \OIii1[1] ( .A(IIii1_Z[0]), .B(iOii1_Z), .C(IIii1_Z[1]), .Y(OIii1_Z[1]) ); defparam \OIii1[1] .INIT=8'hB8; // @28:518940 CFG3 \OIii1[0] ( .A(CORETSE_0_MDO), .B(iOii1_Z), .C(IIii1_Z[0]), .Y(OIii1_Z[0]) ); defparam \OIii1[0] .INIT=8'hB8; // @28:519237 CFG4 \olii1_RNO[0] ( .A(CORETSE_0_MDO), .B(un4_llii1), .C(oOii1_Z), .D(CORETSE_0_MDOEN), .Y(N_85_i) ); defparam \olii1_RNO[0] .INIT=16'h8000; // @28:519237 CFG4 \olii1_RNO[10] ( .A(CORETSE_0_MDOEN), .B(un4_llii1), .C(olii1_Z[9]), .D(oOii1_Z), .Y(N_84_i) ); defparam \olii1_RNO[10] .INIT=16'h8000; // @28:519564 CFG3 \I1ii1_0_a2_4[15] ( .A(iOOOo_2_Z), .B(N_580), .C(N_570), .Y(N_583) ); defparam \I1ii1_0_a2_4[15] .INIT=8'h80; // @28:519652 CFG4 ioIO1 ( .A(un17_ioIO1_Z), .B(un1_ioIO1_Z), .C(un4_llii1), .D(un9_ioIO1_1_Z), .Y(OOOO1) ); defparam ioIO1.INIT=16'hFEEE; // @28:519564 CFG4 \I1ii1_0_0_a3_0[13] ( .A(iIii1_Z[2]), .B(N_572), .C(un5_ioIO1_NE_Z), .D(N_580), .Y(N_914) ); defparam \I1ii1_0_0_a3_0[13] .INIT=16'h0800; // @28:520722 CFG3 oOI11_0_a3 ( .A(iIii1_Z[2]), .B(N_572), .C(N_616), .Y(oOI11) ); defparam oOI11_0_a3.INIT=8'h80; // @28:519564 CFG2 \I1ii1_0_a3_0[5] ( .A(N_867), .B(OII11[5]), .Y(N_455) ); defparam \I1ii1_0_a3_0[5] .INIT=4'h4; // @28:519899 CFG2 o25_0_a3 ( .A(N_759), .B(iI1i0), .Y(o25) ); defparam o25_0_a3.INIT=4'h8; // @28:520284 CFG4 lOI11_0_a2 ( .A(iIii1_Z[0]), .B(N_616), .C(iIii1_Z[1]), .D(iIii1_Z[2]), .Y(lOI11) ); defparam lOI11_0_a2.INIT=16'h0400; // @28:519564 CFG2 \I1ii1_0_a2_6_0_a2[15] ( .A(N_934), .B(N_570), .Y(N_614) ); defparam \I1ii1_0_a2_6_0_a2[15] .INIT=4'h8; // @28:519564 CFG2 \I1ii1_0_0_a3_2[1] ( .A(N_587), .B(O0I11_1z), .Y(N_908) ); defparam \I1ii1_0_0_a3_2[1] .INIT=4'h8; // @28:519564 CFG4 \I1ii1_0_0[14] ( .A(N_865), .B(N_867), .C(l1ii1_Z[13]), .D(iOI11[2]), .Y(I1ii1_0_0_Z[14]) ); defparam \I1ii1_0_0[14] .INIT=16'h7350; // @28:519564 CFG4 \I1ii1_0_1[4] ( .A(iII11_2z), .B(io101), .C(N_660), .D(N_587), .Y(I1ii1_0_1_Z[4]) ); defparam \I1ii1_0_1[4] .INIT=16'hEAC0; // @28:519564 CFG4 \I1ii1_0_0[4] ( .A(N_865), .B(N_867), .C(l1ii1_Z[3]), .D(OII11[4]), .Y(I1ii1_0_0_Z[4]) ); defparam \I1ii1_0_0[4] .INIT=16'h7350; // @28:519564 CFG4 \I1ii1_0_0_0[13] ( .A(N_865), .B(N_587), .C(l1ii1_Z[12]), .D(lII11_1z), .Y(I1ii1_0_0_0_Z[13]) ); defparam \I1ii1_0_0_0[13] .INIT=16'hDC50; // @28:519564 CFG4 \I1ii1_0_0[2] ( .A(N_865), .B(N_867), .C(l1ii1_Z[1]), .D(OII11[2]), .Y(I1ii1_0_0_Z[2]) ); defparam \I1ii1_0_0[2] .INIT=16'h7350; // @28:519564 CFG4 \I1ii1_0_0[9] ( .A(N_865), .B(N_867), .C(l1ii1_Z[8]), .D(OII11[9]), .Y(I1ii1_0_0_Z[9]) ); defparam \I1ii1_0_0[9] .INIT=16'h7350; // @28:519564 CFG4 \I1ii1_0_0_0[15] ( .A(III11_1z), .B(l1ii1_Z[14]), .C(N_587), .D(N_865), .Y(I1ii1_0_0_0_Z[15]) ); defparam \I1ii1_0_0_0[15] .INIT=16'hA0EC; // @28:519564 CFG4 \I1ii1_0_0[11] ( .A(Io101_1z), .B(l1ii1_Z[10]), .C(N_587), .D(N_865), .Y(I1ii1_0_0_Z[11]) ); defparam \I1ii1_0_0[11] .INIT=16'hA0EC; // @28:519564 CFG4 \I1ii1_0_0_0[1] ( .A(N_865), .B(N_867), .C(l1ii1_Z[0]), .D(OII11[1]), .Y(I1ii1_0_0_0_Z[1]) ); defparam \I1ii1_0_0_0[1] .INIT=16'h7350; // @28:519564 CFG4 \I1ii1_0_0[7] ( .A(N_865), .B(N_867), .C(l1ii1_Z[6]), .D(OII11[7]), .Y(I1ii1_0_0_Z[7]) ); defparam \I1ii1_0_0[7] .INIT=16'h7350; // @28:519564 CFG4 \I1ii1_0_0[12] ( .A(N_865), .B(N_867), .C(l1ii1_Z[11]), .D(iOI11[0]), .Y(I1ii1_0_0_Z[12]) ); defparam \I1ii1_0_0[12] .INIT=16'h7350; // @28:519564 CFG4 \I1ii1_0_1[8] ( .A(i1101_2z), .B(OII11[8]), .C(N_867), .D(N_587), .Y(I1ii1_0_1_Z[8]) ); defparam \I1ii1_0_1[8] .INIT=16'hAE0C; // @28:519564 CFG4 \I1ii1_0_1[5] ( .A(N_587), .B(N_660), .C(oo101), .D(iooi1_Z), .Y(I1ii1_0_1_Z[5]) ); defparam \I1ii1_0_1[5] .INIT=16'hEAC0; // @28:519564 CFG4 \I1ii1_0_1[6] ( .A(N_867), .B(N_587), .C(Oioi1_Z), .D(OII11[6]), .Y(I1ii1_0_1_Z[6]) ); defparam \I1ii1_0_1[6] .INIT=16'hD5C0; // @28:519564 CFG4 \I1ii1_0_a2_0_0_a2[15] ( .A(iIii1_Z[0]), .B(N_934), .C(iIii1_Z[1]), .D(iIii1_Z[2]), .Y(N_578) ); defparam \I1ii1_0_a2_0_0_a2[15] .INIT=16'h0800; // @28:520416 CFG2 l01015_0_a3 ( .A(lOI11), .B(iI1i0), .Y(l01015) ); defparam l01015_0_a3.INIT=4'h8; // @28:519976 CFG4 l0ii1_2_0_0 ( .A(l0ii1_Z), .B(I0101_1z), .C(N_759), .D(olii1_Z[9]), .Y(l0ii1_2) ); defparam l0ii1_2_0_0.INIT=16'hF222; // @28:519564 CFG4 \I1ii1_0_a2_2_a2[2] ( .A(iIii1_Z[0]), .B(N_934), .C(iIii1_Z[1]), .D(iIii1_Z[2]), .Y(N_766) ); defparam \I1ii1_0_a2_2_a2[2] .INIT=16'h4000; // @28:519564 CFG3 \I1ii1_0_a2_3_0_a2[15] ( .A(iIii1_Z[2]), .B(N_572), .C(N_934), .Y(N_582) ); defparam \I1ii1_0_a2_3_0_a2[15] .INIT=8'h80; // @28:519564 CFG4 \I1ii1_0_a2_1_a2[15] ( .A(iIii1_Z[0]), .B(N_934), .C(iIii1_Z[1]), .D(iIii1_Z[2]), .Y(N_577) ); defparam \I1ii1_0_a2_1_a2[15] .INIT=16'h0400; // @28:519843 CFG4 ilii1_2_0_0 ( .A(olii1_Z[15]), .B(N_759), .C(iiO11_1z), .D(ilii1_Z), .Y(ilii1_2) ); defparam ilii1_2_0_0.INIT=16'h8F88; // @28:519564 CFG3 \I1ii1_0_0_1[13] ( .A(iOI11[1]), .B(N_867), .C(I1ii1_0_0_0_Z[13]), .Y(I1ii1_0_0_1_Z[13]) ); defparam \I1ii1_0_0_1[13] .INIT=8'hF2; // @28:519564 CFG4 \I1ii1_0_0[10] ( .A(N_865), .B(N_583), .C(li101[10]), .D(l1ii1_Z[9]), .Y(I1ii1_0_0_Z[10]) ); defparam \I1ii1_0_0[10] .INIT=16'hD5C0; // @28:519564 CFG3 \I1ii1_0_0_1[15] ( .A(o1101_1z), .B(N_867), .C(I1ii1_0_0_0_Z[15]), .Y(I1ii1_0_0_1_Z[15]) ); defparam \I1ii1_0_0_1[15] .INIT=8'hF2; // @28:519564 CFG3 \I1ii1_0_1[11] ( .A(N_583), .B(li101[11]), .C(I1ii1_0_0_Z[11]), .Y(I1ii1_0_1_Z[11]) ); defparam \I1ii1_0_1[11] .INIT=8'hF8; // @28:519564 CFG3 \I1ii1_0_1[7] ( .A(N_583), .B(li101[7]), .C(I1ii1_0_0_Z[7]), .Y(I1ii1_0_1_Z[7]) ); defparam \I1ii1_0_1[7] .INIT=8'hF8; // @28:519564 CFG4 \I1ii1_0_2[8] ( .A(l1ii1_Z[7]), .B(N_865), .C(I1ii1_0_1_Z[8]), .D(N_660), .Y(I1ii1_0_2_Z[8]) ); defparam \I1ii1_0_2[8] .INIT=16'hFFF2; // @28:519564 CFG4 \I1ii1_0_2[5] ( .A(N_865), .B(l1ii1_Z[4]), .C(I1ii1_0_1_Z[5]), .D(N_455), .Y(I1ii1_0_2_Z[5]) ); defparam \I1ii1_0_2[5] .INIT=16'hFFF4; // @28:519564 CFG4 \I1ii1_0_2[6] ( .A(l1ii1_Z[5]), .B(N_865), .C(I1ii1_0_1_Z[6]), .D(N_660), .Y(I1ii1_0_2_Z[6]) ); defparam \I1ii1_0_2[6] .INIT=16'hFFF2; // @28:519564 CFG2 \I1ii1_0_a3_1[2] ( .A(N_578), .B(Ii101[2]), .Y(N_478) ); defparam \I1ii1_0_a3_1[2] .INIT=4'h8; // @28:519564 CFG4 \I1ii1_0_5[14] ( .A(NN_1), .B(l0101[14]), .C(N_577), .D(N_582), .Y(I1ii1_0_5_Z[14]) ); defparam \I1ii1_0_5[14] .INIT=16'hEAC0; // @28:519564 CFG4 \I1ii1_0_5[4] ( .A(i0101[4]), .B(l0101[4]), .C(N_582), .D(N_577), .Y(I1ii1_0_5_Z[4]) ); defparam \I1ii1_0_5[4] .INIT=16'hECA0; // @28:519564 CFG4 \I1ii1_0_3[4] ( .A(I1ii1_0_1_Z[4]), .B(N_583), .C(li101[4]), .D(I1ii1_0_0_Z[4]), .Y(I1ii1_0_3_Z[4]) ); defparam \I1ii1_0_3[4] .INIT=16'hFFEA; // @28:519564 CFG4 \I1ii1_0_0_6[13] ( .A(i0101[13]), .B(l0101[13]), .C(N_582), .D(N_577), .Y(I1ii1_0_0_6_Z[13]) ); defparam \I1ii1_0_0_6[13] .INIT=16'hECA0; // @28:519564 CFG4 \un1_I1ii1_0_4[0] ( .A(i0101[0]), .B(l0101[0]), .C(N_582), .D(N_577), .Y(un1_I1ii1_0_4_Z[0]) ); defparam \un1_I1ii1_0_4[0] .INIT=16'hECA0; // @28:519564 CFG4 \I1ii1_0_2[10] ( .A(i0101[10]), .B(l0101[10]), .C(N_582), .D(N_577), .Y(I1ii1_0_2_Z[10]) ); defparam \I1ii1_0_2[10] .INIT=16'hECA0; // @28:519564 CFG4 \I1ii1_0_5[2] ( .A(i0101[2]), .B(l0101[2]), .C(N_582), .D(N_577), .Y(I1ii1_0_5_Z[2]) ); defparam \I1ii1_0_5[2] .INIT=16'hECA0; // @28:519564 CFG4 \I1ii1_0_2[2] ( .A(N_277), .B(I1ii1_0_0_Z[2]), .C(N_660), .D(N_481), .Y(I1ii1_0_2_Z[2]) ); defparam \I1ii1_0_2[2] .INIT=16'hFFEC; // @28:519564 CFG4 \I1ii1_0_4[3] ( .A(i0101[3]), .B(l0101[3]), .C(N_582), .D(N_577), .Y(I1ii1_0_4_Z[3]) ); defparam \I1ii1_0_4[3] .INIT=16'hECA0; // @28:519564 CFG4 \I1ii1_0_4[9] ( .A(i0101[9]), .B(l0101[9]), .C(N_582), .D(N_577), .Y(I1ii1_0_4_Z[9]) ); defparam \I1ii1_0_4[9] .INIT=16'hECA0; // @28:519564 CFG4 \I1ii1_0_2[9] ( .A(I1ii1_0_0_Z[9]), .B(I0101_1z), .C(N_614), .D(N_430), .Y(I1ii1_0_2_Z[9]) ); defparam \I1ii1_0_2[9] .INIT=16'hFFEA; // @28:519564 CFG4 \I1ii1_0_0_6[15] ( .A(i0101[15]), .B(l0101[15]), .C(N_582), .D(N_577), .Y(I1ii1_0_0_6_Z[15]) ); defparam \I1ii1_0_0_6[15] .INIT=16'hECA0; // @28:519564 CFG4 \I1ii1_0_3[11] ( .A(NN_2), .B(l0101[11]), .C(N_577), .D(N_582), .Y(I1ii1_0_3_Z[11]) ); defparam \I1ii1_0_3[11] .INIT=16'hEAC0; // @28:519564 CFG4 \I1ii1_0_0_4[1] ( .A(N_578), .B(N_577), .C(Ii101[1]), .D(l0101[1]), .Y(I1ii1_0_0_4_Z[1]) ); defparam \I1ii1_0_0_4[1] .INIT=16'hECA0; // @28:519564 CFG4 \I1ii1_0_0_2[1] ( .A(N_908), .B(li101[1]), .C(N_583), .D(I1ii1_0_0_0_Z[1]), .Y(I1ii1_0_0_2_Z[1]) ); defparam \I1ii1_0_0_2[1] .INIT=16'hFFEA; // @28:519564 CFG4 \I1ii1_0_3[7] ( .A(i0101[7]), .B(l0101[7]), .C(N_582), .D(N_577), .Y(I1ii1_0_3_Z[7]) ); defparam \I1ii1_0_3[7] .INIT=16'hECA0; // @28:519564 CFG4 \I1ii1_0_5[12] ( .A(i0101[12]), .B(l0101[12]), .C(N_582), .D(N_577), .Y(I1ii1_0_5_Z[12]) ); defparam \I1ii1_0_5[12] .INIT=16'hECA0; // @28:519564 CFG4 \I1ii1_0_6[8] ( .A(i0101[8]), .B(l0101[8]), .C(N_582), .D(N_577), .Y(I1ii1_0_6_Z[8]) ); defparam \I1ii1_0_6[8] .INIT=16'hECA0; // @28:519564 CFG4 \I1ii1_0_5[5] ( .A(i0101[5]), .B(l0101[5]), .C(N_582), .D(N_577), .Y(I1ii1_0_5_Z[5]) ); defparam \I1ii1_0_5[5] .INIT=16'hECA0; // @28:519564 CFG3 \I1ii1_0_3[5] ( .A(N_583), .B(li101[5]), .C(I1ii1_0_2_Z[5]), .Y(I1ii1_0_3_Z[5]) ); defparam \I1ii1_0_3[5] .INIT=8'hF8; // @28:519564 CFG4 \I1ii1_0_6[6] ( .A(i0101[6]), .B(l0101[6]), .C(N_582), .D(N_577), .Y(I1ii1_0_6_Z[6]) ); defparam \I1ii1_0_6[6] .INIT=16'hECA0; // @28:519564 CFG4 \I1ii1_0_0_3[13] ( .A(N_914), .B(N_583), .C(li101[13]), .D(I1ii1_0_0_1_Z[13]), .Y(I1ii1_0_0_3_Z[13]) ); defparam \I1ii1_0_0_3[13] .INIT=16'hFFEA; // @28:519564 CFG4 \I1ii1_0_0_3[15] ( .A(N_914), .B(N_583), .C(li101[15]), .D(I1ii1_0_0_1_Z[15]), .Y(I1ii1_0_0_3_Z[15]) ); defparam \I1ii1_0_0_3[15] .INIT=16'hFFEA; // @28:519564 CFG3 \I1ii1_0_0_3[1] ( .A(oi101), .B(N_766), .C(I1ii1_0_0_2_Z[1]), .Y(I1ii1_0_0_3_Z[1]) ); defparam \I1ii1_0_0_3[1] .INIT=8'hF8; // @28:519564 CFG4 \I1ii1_0_4[8] ( .A(I1ii1_0_2_Z[8]), .B(N_614), .C(IOI11_Z), .D(N_439), .Y(I1ii1_0_4_Z[8]) ); defparam \I1ii1_0_4[8] .INIT=16'hFFEA; // @28:519564 CFG4 \I1ii1_0_4[6] ( .A(I1ii1_0_2_Z[6]), .B(N_614), .C(o_Z[1]), .D(N_453), .Y(I1ii1_0_4_Z[6]) ); defparam \I1ii1_0_4[6] .INIT=16'hFFEA; // @28:519564 CFG4 \I1ii1_0[3] ( .A(Ii101[3]), .B(N_578), .C(I1ii1_0_2_Z[3]), .D(I1ii1_0_4_Z[3]), .Y(I1ii1[3]) ); defparam \I1ii1_0[3] .INIT=16'hFFF8; // @28:519564 CFG4 \I1ii1_0[10] ( .A(Ii101[10]), .B(N_578), .C(I1ii1_0_0_Z[10]), .D(I1ii1_0_2_Z[10]), .Y(I1ii1[10]) ); defparam \I1ii1_0[10] .INIT=16'hFFF8; // @28:519564 CFG4 \I1ii1_0[11] ( .A(Ii101[11]), .B(I1ii1_0_1_Z[11]), .C(N_578), .D(I1ii1_0_3_Z[11]), .Y(I1ii1[11]) ); defparam \I1ii1_0[11] .INIT=16'hFFEC; // @28:519564 CFG4 \I1ii1_0[7] ( .A(Ii101[7]), .B(I1ii1_0_1_Z[7]), .C(N_578), .D(I1ii1_0_3_Z[7]), .Y(I1ii1[7]) ); defparam \I1ii1_0[7] .INIT=16'hFFEC; // @28:519564 CFG3 \I1ii1_0_0_4[13] ( .A(N_614), .B(I1ii1_0_0_3_Z[13]), .C(o_Z[0]), .Y(I1ii1_0_0_4_Z[13]) ); defparam \I1ii1_0_0_4[13] .INIT=8'hEC; // @28:519564 CFG3 \I1ii1_0_0_4[15] ( .A(iiO11_1z), .B(N_614), .C(I1ii1_0_0_3_Z[15]), .Y(I1ii1_0_0_4_Z[15]) ); defparam \I1ii1_0_0_4[15] .INIT=8'hF8; // @28:519564 CFG4 \un1_I1ii1_0[0] ( .A(Ii101[0]), .B(N_578), .C(un1_I1ii1_0_2_Z[0]), .D(un1_I1ii1_0_4_Z[0]), .Y(un1_I1ii1_0_Z[0]) ); defparam \un1_I1ii1_0[0] .INIT=16'hFFF8; // @28:519564 CFG4 \I1ii1_0[4] ( .A(Ii101[4]), .B(N_578), .C(I1ii1_0_3_Z[4]), .D(I1ii1_0_5_Z[4]), .Y(I1ii1[4]) ); defparam \I1ii1_0[4] .INIT=16'hFFF8; // @28:519564 CFG4 \I1ii1_0[5] ( .A(Ii101[5]), .B(I1ii1_0_3_Z[5]), .C(N_578), .D(I1ii1_0_5_Z[5]), .Y(I1ii1[5]) ); defparam \I1ii1_0[5] .INIT=16'hFFEC; // @28:519564 CFG4 \I1ii1_0[9] ( .A(Ii101[9]), .B(N_578), .C(I1ii1_0_2_Z[9]), .D(I1ii1_0_4_Z[9]), .Y(I1ii1[9]) ); defparam \I1ii1_0[9] .INIT=16'hFFF8; // @28:519564 CFG4 \I1ii1_0[6] ( .A(Ii101[6]), .B(N_578), .C(I1ii1_0_4_Z[6]), .D(I1ii1_0_6_Z[6]), .Y(I1ii1[6]) ); defparam \I1ii1_0[6] .INIT=16'hFFF8; // @28:519564 CFG4 \I1ii1_0[8] ( .A(Ii101[8]), .B(N_578), .C(I1ii1_0_4_Z[8]), .D(I1ii1_0_6_Z[8]), .Y(I1ii1[8]) ); defparam \I1ii1_0[8] .INIT=16'hFFF8; // @28:519564 CFG4 \I1ii1_0[2] ( .A(N_478), .B(I1ii1_0_5_Z[2]), .C(N_766), .D(I1ii1_0_2_Z[2]), .Y(I1ii1[2]) ); defparam \I1ii1_0[2] .INIT=16'hFFFE; // @28:519564 CFG4 \I1ii1_0[12] ( .A(Ii101[12]), .B(N_578), .C(I1ii1_0_3_Z[12]), .D(I1ii1_0_5_Z[12]), .Y(I1ii1[12]) ); defparam \I1ii1_0[12] .INIT=16'hFFF8; // @28:519564 CFG4 \I1ii1_0_0[1] ( .A(i0101[1]), .B(N_582), .C(I1ii1_0_0_4_Z[1]), .D(I1ii1_0_0_3_Z[1]), .Y(I1ii1[1]) ); defparam \I1ii1_0_0[1] .INIT=16'hFFF8; // @28:519564 CFG4 \I1ii1_0[14] ( .A(N_578), .B(Ii101[14]), .C(I1ii1_0_3_Z[14]), .D(I1ii1_0_5_Z[14]), .Y(I1ii1[14]) ); defparam \I1ii1_0[14] .INIT=16'hFFF8; // @28:519564 CFG4 \I1ii1_0_0[13] ( .A(Ii101[13]), .B(N_578), .C(I1ii1_0_0_4_Z[13]), .D(I1ii1_0_0_6_Z[13]), .Y(I1ii1[13]) ); defparam \I1ii1_0_0[13] .INIT=16'hFFF8; // @28:519564 CFG4 \I1ii1_0_0[15] ( .A(Ii101[15]), .B(N_578), .C(I1ii1_0_0_4_Z[15]), .D(I1ii1_0_0_6_Z[15]), .Y(I1ii1[15]) ); defparam \I1ii1_0_0[15] .INIT=16'hFFF8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PETBM_26s_0s_1s */ module CTSE_PETCR_26s_1s ( III11, iiO11, PF_IOD_CDR_CCC_C0_0_TX_CLK_G, Illi0_i, PF_IOD_CDR_C0_0_RX_CLK_R, llli0_i, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i, ooI01_i, oi001_i ) ; input III11 ; input iiO11 ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; input Illi0_i ; input PF_IOD_CDR_C0_0_RX_CLK_R ; input llli0_i ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; output ooI01_i ; output oi001_i ; wire III11 ; wire iiO11 ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire Illi0_i ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire llli0_i ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire ooI01_i ; wire oi001_i ; wire oi001 ; wire ooI01 ; wire lIlI1_Z ; wire GND ; wire N_376_i ; wire VCC ; wire rrex_1_Z ; wire rtex_1_Z ; CFG1 IlOOo_4_RNIR7SQ2 ( .A(oi001), .Y(oi001_i) ); defparam IlOOo_4_RNIR7SQ2.INIT=2'h1; CFG1 llOOo_4_RNIUQF76 ( .A(ooI01), .Y(ooI01_i) ); defparam llOOo_4_RNIUQF76.INIT=2'h1; // @28:521536 SLE lIlI1 ( .Q(lIlI1_Z), .ADn(GND), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_376_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:521658 SLE llOOo ( .Q(ooI01), .ADn(GND), .ALn(llli0_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(rrex_1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:521598 SLE IlOOo ( .Q(oi001), .ADn(GND), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(rtex_1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:521628 SLE rrex_1 ( .Q(rrex_1_Z), .ADn(GND), .ALn(llli0_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lIlI1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:521568 SLE rtex_1 ( .Q(rtex_1_Z), .ADn(GND), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lIlI1_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:521536 CFG2 lIlI1_RNO ( .A(iiO11), .B(III11), .Y(N_376_i) ); defparam lIlI1_RNO.INIT=4'hE; //@28:521658 //@28:521598 GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_PETCR_26s_1s */ module CTSE_MSGMII_TBI_26s_0s_0s_1s ( ii001_0, OiI01, IiI01, ioI01, OI1i0, oo001, iO1i0, llli0_i, hstrst_i, PF_CCC_0_0_OUT0_FABCLK_0, iI1i0, CORETSE_0_MDO, CORETSE_0_MDOEN, BIBUF_0_Y, OOOO1, Illi0_i, RD_BC_ERROR_c, ooI01_i, PF_IOD_CDR_C0_0_RX_CLK_R, iOl01, iOl01_i, oi001_i, PF_IOD_CDR_CCC_C0_0_TX_CLK_G, io001, liI01 ) ; output ii001_0 ; output [1:0] OiI01 ; output [1:0] IiI01 ; output [15:0] ioI01 ; input [9:0] OI1i0 ; input [7:0] oo001 ; output [9:0] iO1i0 ; input llli0_i ; input hstrst_i ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input iI1i0 ; input CORETSE_0_MDO ; input CORETSE_0_MDOEN ; input BIBUF_0_Y ; output OOOO1 ; input Illi0_i ; output RD_BC_ERROR_c ; output ooI01_i ; input PF_IOD_CDR_C0_0_RX_CLK_R ; input iOl01 ; input iOl01_i ; output oi001_i ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; input io001 ; input liI01 ; wire ii001_0 ; wire llli0_i ; wire hstrst_i ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire iI1i0 ; wire CORETSE_0_MDO ; wire CORETSE_0_MDOEN ; wire BIBUF_0_Y ; wire OOOO1 ; wire Illi0_i ; wire RD_BC_ERROR_c ; wire ooI01_i ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire iOl01 ; wire iOl01_i ; wire oi001_i ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire io001 ; wire liI01 ; wire [9:0] OII11; wire [2:0] iOI11; wire [1:0] OOo01; wire [15:0] IOo01; wire [12:0] OlI11_i; wire [19:0] OlI11; wire [4:4] Oiio1_RNI7H0P9; wire [1:1] Oiio1_RNI1B0P9; wire [19:0] Oiio1; wire [9:0] i1Oi1; wire [15:0] il101; wire [15:0] i0101; wire [15:0] l0101; wire [15:0] Ii101; wire [15:0] li101; wire lOo01 ; wire iII11 ; wire oII11 ; wire N_15085 ; wire N_15086 ; wire N_15087 ; wire N_15088 ; wire N_147_i ; wire N_24_i ; wire N_146_i_0 ; wire N_146 ; wire N_145 ; wire IOOi1 ; wire ilI11 ; wire OOI11 ; wire N_15093 ; wire N_15094 ; wire N_15095 ; wire N_15096 ; wire O0I11 ; wire OO101 ; wire IoIO1 ; wire ll101 ; wire O0101 ; wire lII11 ; wire N_15101 ; wire N_15102 ; wire oOI11 ; wire lOI11 ; wire l1101 ; wire I1101 ; wire o1101 ; wire i1101 ; wire Io101 ; wire Oo101 ; wire I0101 ; wire N_277 ; wire io101 ; wire oi101 ; wire ii101 ; wire oo101 ; wire N_15103 ; wire N_15104 ; wire iiO11 ; wire III11 ; wire GND ; wire VCC ; // @28:471342 CTSE_PETEX_TOP_26s_0s_1s I0I11 ( .OII11(OII11[9:0]), .iO1i0(iO1i0[9:0]), .iOI11(iOI11[2:0]), .oo001(oo001[7:0]), .OOo01(OOo01[1:0]), .IOo01(IOo01[15:0]), .lOo01(lOo01), .iII11(iII11), .liI01(liI01), .io001(io001), .oII11_1z(oII11), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .oi001_i(oi001_i) ); // @28:471438 CTSE_PEREX_PMA_26s_0s_1s_0_1_2_3_4 CTSE_PEREX_PMA_1 ( .OI1i0(OI1i0[9:0]), .iO1i0(iO1i0[9:0]), .OlI11_i_12(OlI11_i[12]), .OlI11_i_0(OlI11_i[0]), .OlI11_i_2(OlI11_i[2]), .OlI11_i_10(OlI11_i[10]), .OlI11_3(OlI11[3]), .OlI11_16(OlI11[16]), .OlI11_7(OlI11[7]), .OlI11_5(OlI11[5]), .OlI11_2(OlI11[2]), .OlI11_15(OlI11[15]), .OlI11_10(OlI11[10]), .OlI11_0(OlI11[0]), .OlI11_13(OlI11[13]), .OlI11_6(OlI11[6]), .OlI11_12(OlI11[12]), .OlI11_9(OlI11[9]), .OlI11_19(OlI11[19]), .OlI11_17(OlI11[17]), .Oiio1_RNI7H0P9_0(Oiio1_RNI7H0P9[4]), .Oiio1_RNI1B0P9_0(Oiio1_RNI1B0P9[1]), .Oiio1({Oiio1[19], N_15088, Oiio1[17:12], N_15087, Oiio1[10:9], N_15086, Oiio1[7:2], N_15085, Oiio1[0]}), .i1Oi1_9(i1Oi1[9]), .i1Oi1_6(i1Oi1[6]), .i1Oi1_5(i1Oi1[5]), .i1Oi1_2(i1Oi1[2]), .i1Oi1_0(i1Oi1[0]), .iII11(iII11), .N_147_i(N_147_i), .N_24_i(N_24_i), .N_146_i_0(N_146_i_0), .N_146(N_146), .N_145(N_145), .iOl01_i(iOl01_i), .iOl01(iOl01), .IOOi1_1z(IOOi1), .ilI11(ilI11), .OOI11(OOI11), .PF_IOD_CDR_C0_0_RX_CLK_R(PF_IOD_CDR_C0_0_RX_CLK_R), .ooI01_i(ooI01_i) ); // @28:471534 CTSE_PEREX_PCS_0s_26s_1s CTSE_PEREX_PCS_1 ( .OlI11_i_2(OlI11_i[2]), .OlI11_i_0(OlI11_i[0]), .OlI11_i_10(OlI11_i[10]), .OlI11_i_12(OlI11_i[12]), .i1Oi1_9(i1Oi1[9]), .i1Oi1_5(i1Oi1[5]), .i1Oi1_2(i1Oi1[2]), .i1Oi1_0(i1Oi1[0]), .i1Oi1_6(i1Oi1[6]), .Oiio1({Oiio1[19], N_15096, Oiio1[17:12], N_15095, Oiio1[10:9], N_15094, Oiio1[7:2], N_15093, Oiio1[0]}), .OlI11_7(OlI11[7]), .OlI11_3(OlI11[3]), .OlI11_15(OlI11[15]), .OlI11_17(OlI11[17]), .OlI11_16(OlI11[16]), .OlI11_6(OlI11[6]), .OlI11_9(OlI11[9]), .OlI11_0(OlI11[0]), .OlI11_2(OlI11[2]), .OlI11_13(OlI11[13]), .OlI11_12(OlI11[12]), .OlI11_10(OlI11[10]), .OlI11_5(OlI11[5]), .OlI11_19(OlI11[19]), .Oiio1_RNI7H0P9_0(Oiio1_RNI7H0P9[4]), .Oiio1_RNI1B0P9_0(Oiio1_RNI1B0P9[1]), .ioI01(ioI01[15:0]), .IiI01(IiI01[1:0]), .il101(il101[15:0]), .OOo01(OOo01[1:0]), .OiI01(OiI01[1:0]), .N_146_i_0(N_146_i_0), .N_24_i(N_24_i), .N_146(N_146), .N_147_i(N_147_i), .N_145(N_145), .IOOi1(IOOi1), .iII11(iII11), .ilI11(ilI11), .O0I11(O0I11), .OO101(OO101), .RD_BC_ERROR_c(RD_BC_ERROR_c), .IoIO1_1z(IoIO1), .ll101(ll101), .iOl01(iOl01), .O0101(O0101), .lII11(lII11), .PF_IOD_CDR_C0_0_RX_CLK_R(PF_IOD_CDR_C0_0_RX_CLK_R), .ooI01_i(ooI01_i) ); // @28:471666 CTSE_MSGMII_PEANX_TOP_1s_26s CTSE_MSGMII_PEANX_TOP_1 ( .i0101_1z({i0101[15], N_15102, i0101[13:12], N_15101, i0101[10:0]}), .l0101(l0101[15:0]), .il101(il101[15:0]), .Ii101(Ii101[15:0]), .OOo01(OOo01[1:0]), .li101(li101[15:0]), .IOo01(IOo01[15:0]), .ii001_0(ii001_0), .OO101(OO101), .ll101(ll101), .IoIO1(IoIO1), .oOI11(oOI11), .lOI11(lOI11), .l1101(l1101), .I1101(I1101), .o1101(o1101), .i1101_1z(i1101), .Io101(Io101), .Oo101_1z(Oo101), .I0101(I0101), .O0101(O0101), .Illi0_i(Illi0_i), .lOo01(lOo01), .RD_BC_ERROR_c(RD_BC_ERROR_c), .N_277(N_277), .io101_1z(io101), .oi101_1z(oi101), .ii101_1z(ii101), .oo101_2z(oo101), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .oi001_i(oi001_i) ); // @28:471870 CTSE_PETBM_26s_0s_1s CTSE_PETBM_1 ( .Ii101(Ii101[15:0]), .li101(li101[15:0]), .l0101(l0101[15:0]), .i0101({i0101[15], N_15104, i0101[13:12], N_15103, i0101[10:0]}), .OII11(OII11[9:0]), .iOI11(iOI11[2:0]), .N_277(N_277), .oo101(oo101), .io101(io101), .lOI11(lOI11), .OOOO1(OOOO1), .BIBUF_0_Y(BIBUF_0_Y), .CORETSE_0_MDOEN(CORETSE_0_MDOEN), .oOI11(oOI11), .ii101_1z(ii101), .oi101(oi101), .I0101_1z(I0101), .iiO11_1z(iiO11), .CORETSE_0_MDO(CORETSE_0_MDO), .O0I11_1z(O0I11), .Io101_1z(Io101), .III11_1z(III11), .o1101_1z(o1101), .OOI11_1z(OOI11), .O0101_1z(O0101), .I1101_1z(I1101), .iI1i0(iI1i0), .l1101_1z(l1101), .oII11_1z(oII11), .lII11_1z(lII11), .iII11_2z(iII11), .i1101_2z(i1101), .Oo101_1z(Oo101), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:472110 CTSE_PETCR_26s_1s CTSE_PETCR_1 ( .III11(III11), .iiO11(iiO11), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .Illi0_i(Illi0_i), .PF_IOD_CDR_C0_0_RX_CLK_R(PF_IOD_CDR_C0_0_RX_CLK_R), .llli0_i(llli0_i), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i), .ooI01_i(ooI01_i), .oi001_i(oi001_i) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_MSGMII_TBI_26s_0s_0s_1s */ module CTSE_MSGMII_CNVRXI_26s ( iiI01, ooIO1, oiI01, ioI01, oOl01_1z, IiI01_1z, OiI01_1z, OOl01, IOl01, IO1i0, liI01, lO1i0, iIl0112, lOl01_1z, iOl01_1z, PF_IOD_CDR_C0_0_RX_CLK_R, ooI01_i ) ; output [7:0] iiI01 ; input [1:0] ooIO1 ; input [3:0] oiI01 ; input [15:0] ioI01 ; output [3:0] oOl01_1z ; input [1:0] IiI01_1z ; input [1:0] OiI01_1z ; output OOl01 ; output IOl01 ; output IO1i0 ; input liI01 ; output lO1i0 ; input iIl0112 ; output lOl01_1z ; input iOl01_1z ; input PF_IOD_CDR_C0_0_RX_CLK_R ; input ooI01_i ; wire OOl01 ; wire IOl01 ; wire IO1i0 ; wire liI01 ; wire lO1i0 ; wire iIl0112 ; wire lOl01_1z ; wire iOl01_1z ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire ooI01_i ; wire [5:0] iIl01_Z; wire [5:5] iIl01_s_Z; wire [4:0] iIl01_s; wire [9:0] O1l01_Z; wire [1:0] IIl01_Z; wire [15:0] OIl01_Z; wire [9:0] o0l01_Z; wire [9:0] i0l01_Z; wire [1:0] oIl01_Z; wire [9:0] l0l01_Z; wire [9:0] O0l01_Z; wire [9:0] I0l01_Z; wire [9:0] ill01_Z; wire [9:0] oll01_Z; wire [9:0] lol01_Z; wire [9:0] Iol01_Z; wire [9:0] lll01_Z; wire [9:0] Ool01_Z; wire [9:0] o1l01_Z; wire [9:0] i1l01_Z; wire [9:0] l1l01_Z; wire [5:0] oil01_Z; wire [3:0] Ill01_Z; wire [3:0] Ill01_3; wire [9:0] I1l01_Z; wire [5:0] iil01_Z; wire [0:0] iIl01_cry_cy_S; wire [0:0] iIl01_cry_cy_Y; wire [4:0] iIl01_cry_Z; wire [4:0] iIl01_cry_Y; wire [5:5] iIl01_s_FCO; wire [5:5] iIl01_s_Y; wire [9:0] un13_ool01_Z; wire [8:1] un25_ool01_Z; wire [9:0] ool01_7_Z; wire [9:0] ool01_5_Z; wire [9:0] ool01_4_Z; wire [9:0] ool01_3_Z; wire [9:0] ool01_2_Z; wire [9:0] ool01_1_Z; wire [9:0] ool01_0_Z; wire [3:3] SUM_0_0; wire [9:0] ool01_11_Z; wire [8:1] ool01_9_Z; wire [9:0] ool01_12_Z; wire VCC ; wire GND ; wire lOl01_2_iv_i_Z ; wire Iil01_Z ; wire N_3_i ; wire O1l01_0_sqmuxa ; wire o0l01_0_sqmuxa ; wire i0l01_0_sqmuxa ; wire l0l01_0_sqmuxa ; wire N_32_i ; wire I0l01_0_sqmuxa ; wire N_34_i_0 ; wire N_933_i ; wire lol01_0_sqmuxa ; wire N_715_i ; wire un1_OIl014_i ; wire N_392 ; wire N_11 ; wire N_45_i ; wire Iol01_0_sqmuxa ; wire N_19_i ; wire Ool01_0_sqmuxa ; wire o1l01_0_sqmuxa ; wire i1l01_0_sqmuxa ; wire l1l01_0_sqmuxa ; wire N_53_i_i ; wire I1l01_0_sqmuxa ; wire iIl01_cry_cy ; wire iIl018_0_a5_0_4_Z ; wire iIl018_0_a5_0_5_Z ; wire N_962 ; wire N_943 ; wire Iol01_0_sqmuxa_0_a5_0_0_Z ; wire N_100 ; wire N_107 ; wire I1l01_0_sqmuxa_0_a5_0_Z ; wire N_99 ; wire N_939 ; wire N_937 ; wire un2_Oil01_i ; wire iIl018_0_a5_4_Z ; wire un3_Oll01_3_Z ; wire un17_ool01_Z ; wire un11_ool01_Z ; wire un65_ool01_Z ; wire un59_ool01_Z ; wire un47_ool01_Z ; wire un41_ool01_Z ; wire un29_ool01_Z ; wire un83_ool01_Z ; wire un71_ool01_Z ; wire N_44_i ; wire N_944 ; wire N_954_1 ; wire Oll01_Z ; wire un23_ool01_Z ; wire un5_ool01_Z ; wire un95_ool01_Z ; wire un89_ool01_Z ; wire un77_ool01_Z ; wire un53_ool01_Z ; wire un35_ool01_Z ; wire Iol01_0_sqmuxa_0_a5_0 ; wire N_87 ; wire N_90 ; wire Oil01_Z ; wire N_108 ; wire N_80_1 ; wire N_84 ; // @28:461261 SLE \iIl01[5] ( .Q(iIl01_Z[5]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIl01_s_Z[5]), .EN(iOl01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461261 SLE \iIl01[4] ( .Q(iIl01_Z[4]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIl01_s[4]), .EN(iOl01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461261 SLE \iIl01[3] ( .Q(iIl01_Z[3]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIl01_s[3]), .EN(iOl01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461261 SLE \iIl01[2] ( .Q(iIl01_Z[2]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIl01_s[2]), .EN(iOl01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461261 SLE \iIl01[1] ( .Q(iIl01_Z[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIl01_s[1]), .EN(iOl01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461261 SLE \iIl01[0] ( .Q(iIl01_Z[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIl01_s[0]), .EN(iOl01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461512 SLE lOl01 ( .Q(lOl01_1z), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lOl01_2_iv_i_Z), .EN(iOl01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461638 SLE Iil01 ( .Q(Iil01_Z), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lOl01_1z), .EN(N_3_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462661 SLE \O1l01[8] ( .Q(O1l01_Z[8]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IIl01_Z[0]), .EN(O1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462661 SLE \O1l01[7] ( .Q(O1l01_Z[7]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[7]), .EN(O1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462661 SLE \O1l01[6] ( .Q(O1l01_Z[6]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[6]), .EN(O1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462661 SLE \O1l01[5] ( .Q(O1l01_Z[5]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[5]), .EN(O1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462661 SLE \O1l01[4] ( .Q(O1l01_Z[4]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[4]), .EN(O1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462661 SLE \O1l01[3] ( .Q(O1l01_Z[3]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[3]), .EN(O1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462661 SLE \O1l01[2] ( .Q(O1l01_Z[2]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[2]), .EN(O1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462661 SLE \O1l01[1] ( .Q(O1l01_Z[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[1]), .EN(O1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462661 SLE \O1l01[0] ( .Q(O1l01_Z[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[0]), .EN(O1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462485 SLE \o0l01[3] ( .Q(o0l01_Z[3]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[3]), .EN(o0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462485 SLE \o0l01[2] ( .Q(o0l01_Z[2]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[2]), .EN(o0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462485 SLE \o0l01[1] ( .Q(o0l01_Z[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[1]), .EN(o0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462485 SLE \o0l01[0] ( .Q(o0l01_Z[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[0]), .EN(o0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462573 SLE \i0l01[9] ( .Q(i0l01_Z[9]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oIl01_Z[1]), .EN(i0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462573 SLE \i0l01[8] ( .Q(i0l01_Z[8]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IIl01_Z[1]), .EN(i0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462573 SLE \i0l01[7] ( .Q(i0l01_Z[7]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[15]), .EN(i0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462573 SLE \i0l01[6] ( .Q(i0l01_Z[6]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[14]), .EN(i0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462573 SLE \i0l01[5] ( .Q(i0l01_Z[5]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[13]), .EN(i0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462573 SLE \i0l01[4] ( .Q(i0l01_Z[4]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[12]), .EN(i0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462573 SLE \i0l01[3] ( .Q(i0l01_Z[3]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[11]), .EN(i0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462573 SLE \i0l01[2] ( .Q(i0l01_Z[2]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[10]), .EN(i0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462573 SLE \i0l01[1] ( .Q(i0l01_Z[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[9]), .EN(i0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462573 SLE \i0l01[0] ( .Q(i0l01_Z[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[8]), .EN(i0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462661 SLE \O1l01[9] ( .Q(O1l01_Z[9]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oIl01_Z[0]), .EN(O1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462397 SLE \l0l01[8] ( .Q(l0l01_Z[8]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IIl01_Z[1]), .EN(l0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462397 SLE \l0l01[7] ( .Q(l0l01_Z[7]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[15]), .EN(l0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462397 SLE \l0l01[6] ( .Q(l0l01_Z[6]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[14]), .EN(l0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462397 SLE \l0l01[5] ( .Q(l0l01_Z[5]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[13]), .EN(l0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462397 SLE \l0l01[4] ( .Q(l0l01_Z[4]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[12]), .EN(l0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462397 SLE \l0l01[3] ( .Q(l0l01_Z[3]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[11]), .EN(l0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462397 SLE \l0l01[2] ( .Q(l0l01_Z[2]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[10]), .EN(l0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462397 SLE \l0l01[1] ( .Q(l0l01_Z[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[9]), .EN(l0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462397 SLE \l0l01[0] ( .Q(l0l01_Z[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[8]), .EN(l0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462485 SLE \o0l01[9] ( .Q(o0l01_Z[9]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oIl01_Z[0]), .EN(o0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462485 SLE \o0l01[8] ( .Q(o0l01_Z[8]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IIl01_Z[0]), .EN(o0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462485 SLE \o0l01[7] ( .Q(o0l01_Z[7]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[7]), .EN(o0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462485 SLE \o0l01[6] ( .Q(o0l01_Z[6]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[6]), .EN(o0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462485 SLE \o0l01[5] ( .Q(o0l01_Z[5]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[5]), .EN(o0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462485 SLE \o0l01[4] ( .Q(o0l01_Z[4]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[4]), .EN(o0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462221 SLE \O0l01[3] ( .Q(O0l01_Z[3]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[11]), .EN(N_32_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462221 SLE \O0l01[2] ( .Q(O0l01_Z[2]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[10]), .EN(N_32_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462221 SLE \O0l01[1] ( .Q(O0l01_Z[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[9]), .EN(N_32_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462221 SLE \O0l01[0] ( .Q(O0l01_Z[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[8]), .EN(N_32_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462309 SLE \I0l01[9] ( .Q(I0l01_Z[9]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oIl01_Z[0]), .EN(I0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462309 SLE \I0l01[8] ( .Q(I0l01_Z[8]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IIl01_Z[0]), .EN(I0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462309 SLE \I0l01[7] ( .Q(I0l01_Z[7]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[7]), .EN(I0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462309 SLE \I0l01[6] ( .Q(I0l01_Z[6]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[6]), .EN(I0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462309 SLE \I0l01[5] ( .Q(I0l01_Z[5]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[5]), .EN(I0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462309 SLE \I0l01[4] ( .Q(I0l01_Z[4]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[4]), .EN(I0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462309 SLE \I0l01[3] ( .Q(I0l01_Z[3]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[3]), .EN(I0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462309 SLE \I0l01[2] ( .Q(I0l01_Z[2]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[2]), .EN(I0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462309 SLE \I0l01[1] ( .Q(I0l01_Z[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[1]), .EN(I0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462309 SLE \I0l01[0] ( .Q(I0l01_Z[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[0]), .EN(I0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462397 SLE \l0l01[9] ( .Q(l0l01_Z[9]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oIl01_Z[1]), .EN(l0l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462133 SLE \ill01[8] ( .Q(ill01_Z[8]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IIl01_Z[0]), .EN(N_34_i_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462133 SLE \ill01[7] ( .Q(ill01_Z[7]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[7]), .EN(N_34_i_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462133 SLE \ill01[6] ( .Q(ill01_Z[6]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[6]), .EN(N_34_i_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462133 SLE \ill01[5] ( .Q(ill01_Z[5]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[5]), .EN(N_34_i_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462133 SLE \ill01[4] ( .Q(ill01_Z[4]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[4]), .EN(N_34_i_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462133 SLE \ill01[3] ( .Q(ill01_Z[3]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[3]), .EN(N_34_i_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462133 SLE \ill01[2] ( .Q(ill01_Z[2]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[2]), .EN(N_34_i_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462133 SLE \ill01[1] ( .Q(ill01_Z[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[1]), .EN(N_34_i_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462133 SLE \ill01[0] ( .Q(ill01_Z[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[0]), .EN(N_34_i_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462221 SLE \O0l01[9] ( .Q(O0l01_Z[9]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oIl01_Z[1]), .EN(N_32_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462221 SLE \O0l01[8] ( .Q(O0l01_Z[8]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IIl01_Z[1]), .EN(N_32_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462221 SLE \O0l01[7] ( .Q(O0l01_Z[7]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[15]), .EN(N_32_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462221 SLE \O0l01[6] ( .Q(O0l01_Z[6]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[14]), .EN(N_32_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462221 SLE \O0l01[5] ( .Q(O0l01_Z[5]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[13]), .EN(N_32_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462221 SLE \O0l01[4] ( .Q(O0l01_Z[4]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[12]), .EN(N_32_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461150 SLE \IIl01[1] ( .Q(IIl01_Z[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OiI01_1z[1]), .EN(iOl01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461150 SLE \IIl01[0] ( .Q(IIl01_Z[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OiI01_1z[0]), .EN(iOl01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461184 SLE \oIl01[1] ( .Q(oIl01_Z[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IiI01_1z[1]), .EN(iOl01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461184 SLE \oIl01[0] ( .Q(oIl01_Z[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IiI01_1z[0]), .EN(iOl01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462045 SLE \oll01[9] ( .Q(oll01_Z[9]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oIl01_Z[1]), .EN(N_933_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462045 SLE \oll01[8] ( .Q(oll01_Z[8]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IIl01_Z[1]), .EN(N_933_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462045 SLE \oll01[7] ( .Q(oll01_Z[7]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[15]), .EN(N_933_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462045 SLE \oll01[6] ( .Q(oll01_Z[6]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[14]), .EN(N_933_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462045 SLE \oll01[5] ( .Q(oll01_Z[5]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[13]), .EN(N_933_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462045 SLE \oll01[4] ( .Q(oll01_Z[4]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[12]), .EN(N_933_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462045 SLE \oll01[3] ( .Q(oll01_Z[3]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[11]), .EN(N_933_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462045 SLE \oll01[2] ( .Q(oll01_Z[2]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[10]), .EN(N_933_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462045 SLE \oll01[1] ( .Q(oll01_Z[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[9]), .EN(N_933_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462045 SLE \oll01[0] ( .Q(oll01_Z[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[8]), .EN(N_933_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462133 SLE \ill01[9] ( .Q(ill01_Z[9]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oIl01_Z[0]), .EN(N_34_i_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461116 SLE \OIl01[14] ( .Q(OIl01_Z[14]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioI01[14]), .EN(iOl01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461116 SLE \OIl01[13] ( .Q(OIl01_Z[13]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioI01[13]), .EN(iOl01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461116 SLE \OIl01[12] ( .Q(OIl01_Z[12]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioI01[12]), .EN(iOl01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461116 SLE \OIl01[11] ( .Q(OIl01_Z[11]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioI01[11]), .EN(iOl01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461116 SLE \OIl01[10] ( .Q(OIl01_Z[10]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioI01[10]), .EN(iOl01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461116 SLE \OIl01[9] ( .Q(OIl01_Z[9]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioI01[9]), .EN(iOl01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461116 SLE \OIl01[8] ( .Q(OIl01_Z[8]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioI01[8]), .EN(iOl01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461116 SLE \OIl01[7] ( .Q(OIl01_Z[7]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioI01[7]), .EN(iOl01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461116 SLE \OIl01[6] ( .Q(OIl01_Z[6]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioI01[6]), .EN(iOl01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461116 SLE \OIl01[5] ( .Q(OIl01_Z[5]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioI01[5]), .EN(iOl01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461116 SLE \OIl01[4] ( .Q(OIl01_Z[4]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioI01[4]), .EN(iOl01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461116 SLE \OIl01[3] ( .Q(OIl01_Z[3]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioI01[3]), .EN(iOl01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461116 SLE \OIl01[2] ( .Q(OIl01_Z[2]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioI01[2]), .EN(iOl01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461116 SLE \OIl01[1] ( .Q(OIl01_Z[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioI01[1]), .EN(iOl01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461116 SLE \OIl01[0] ( .Q(OIl01_Z[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioI01[0]), .EN(iOl01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463277 SLE \lol01[9] ( .Q(lol01_Z[9]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oIl01_Z[1]), .EN(lol01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463277 SLE \lol01[8] ( .Q(lol01_Z[8]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IIl01_Z[1]), .EN(lol01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463277 SLE \lol01[7] ( .Q(lol01_Z[7]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[15]), .EN(lol01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463277 SLE \lol01[6] ( .Q(lol01_Z[6]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[14]), .EN(lol01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463277 SLE \lol01[5] ( .Q(lol01_Z[5]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[13]), .EN(lol01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463277 SLE \lol01[4] ( .Q(lol01_Z[4]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[12]), .EN(lol01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463277 SLE \lol01[3] ( .Q(lol01_Z[3]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[11]), .EN(lol01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463277 SLE \lol01[2] ( .Q(lol01_Z[2]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[10]), .EN(lol01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463277 SLE \lol01[1] ( .Q(lol01_Z[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[9]), .EN(lol01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463277 SLE \lol01[0] ( .Q(lol01_Z[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[8]), .EN(lol01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461566 SLE \oOl01[3] ( .Q(oOl01_1z[3]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_715_i), .EN(un1_OIl014_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461566 SLE \oOl01[2] ( .Q(oOl01_1z[2]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_392), .EN(un1_OIl014_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461566 SLE \oOl01[1] ( .Q(oOl01_1z[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_11), .EN(un1_OIl014_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461566 SLE \oOl01[0] ( .Q(oOl01_1z[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_45_i), .EN(un1_OIl014_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461116 SLE \OIl01[15] ( .Q(OIl01_Z[15]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(ioI01[15]), .EN(iOl01_1z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463189 SLE \Iol01[4] ( .Q(Iol01_Z[4]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[4]), .EN(Iol01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463189 SLE \Iol01[3] ( .Q(Iol01_Z[3]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[3]), .EN(Iol01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463189 SLE \Iol01[2] ( .Q(Iol01_Z[2]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[2]), .EN(Iol01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463189 SLE \Iol01[1] ( .Q(Iol01_Z[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[1]), .EN(Iol01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463189 SLE \Iol01[0] ( .Q(Iol01_Z[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[0]), .EN(Iol01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461957 SLE \lll01[9] ( .Q(lll01_Z[9]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oIl01_Z[0]), .EN(N_19_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461957 SLE \lll01[8] ( .Q(lll01_Z[8]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IIl01_Z[0]), .EN(N_19_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461957 SLE \lll01[7] ( .Q(lll01_Z[7]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[7]), .EN(N_19_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461957 SLE \lll01[6] ( .Q(lll01_Z[6]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[6]), .EN(N_19_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461957 SLE \lll01[5] ( .Q(lll01_Z[5]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[5]), .EN(N_19_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461957 SLE \lll01[4] ( .Q(lll01_Z[4]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[4]), .EN(N_19_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461957 SLE \lll01[3] ( .Q(lll01_Z[3]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[3]), .EN(N_19_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461957 SLE \lll01[2] ( .Q(lll01_Z[2]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[2]), .EN(N_19_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461957 SLE \lll01[1] ( .Q(lll01_Z[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[1]), .EN(N_19_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461957 SLE \lll01[0] ( .Q(lll01_Z[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[0]), .EN(N_19_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463101 SLE \Ool01[9] ( .Q(Ool01_Z[9]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oIl01_Z[1]), .EN(Ool01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463101 SLE \Ool01[8] ( .Q(Ool01_Z[8]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IIl01_Z[1]), .EN(Ool01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463101 SLE \Ool01[7] ( .Q(Ool01_Z[7]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[15]), .EN(Ool01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463101 SLE \Ool01[6] ( .Q(Ool01_Z[6]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[14]), .EN(Ool01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463101 SLE \Ool01[5] ( .Q(Ool01_Z[5]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[13]), .EN(Ool01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463101 SLE \Ool01[4] ( .Q(Ool01_Z[4]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[12]), .EN(Ool01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463101 SLE \Ool01[3] ( .Q(Ool01_Z[3]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[11]), .EN(Ool01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463101 SLE \Ool01[2] ( .Q(Ool01_Z[2]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[10]), .EN(Ool01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463101 SLE \Ool01[1] ( .Q(Ool01_Z[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[9]), .EN(Ool01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463101 SLE \Ool01[0] ( .Q(Ool01_Z[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[8]), .EN(Ool01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463189 SLE \Iol01[9] ( .Q(Iol01_Z[9]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oIl01_Z[0]), .EN(Iol01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463189 SLE \Iol01[8] ( .Q(Iol01_Z[8]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IIl01_Z[0]), .EN(Iol01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463189 SLE \Iol01[7] ( .Q(Iol01_Z[7]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[7]), .EN(Iol01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463189 SLE \Iol01[6] ( .Q(Iol01_Z[6]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[6]), .EN(Iol01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463189 SLE \Iol01[5] ( .Q(Iol01_Z[5]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[5]), .EN(Iol01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462925 SLE \o1l01[4] ( .Q(o1l01_Z[4]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[12]), .EN(o1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462925 SLE \o1l01[3] ( .Q(o1l01_Z[3]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[11]), .EN(o1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462925 SLE \o1l01[2] ( .Q(o1l01_Z[2]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[10]), .EN(o1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462925 SLE \o1l01[1] ( .Q(o1l01_Z[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[9]), .EN(o1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462925 SLE \o1l01[0] ( .Q(o1l01_Z[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[8]), .EN(o1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463013 SLE \i1l01[9] ( .Q(i1l01_Z[9]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oIl01_Z[0]), .EN(i1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463013 SLE \i1l01[8] ( .Q(i1l01_Z[8]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IIl01_Z[0]), .EN(i1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463013 SLE \i1l01[7] ( .Q(i1l01_Z[7]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[7]), .EN(i1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463013 SLE \i1l01[6] ( .Q(i1l01_Z[6]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[6]), .EN(i1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463013 SLE \i1l01[5] ( .Q(i1l01_Z[5]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[5]), .EN(i1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463013 SLE \i1l01[4] ( .Q(i1l01_Z[4]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[4]), .EN(i1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463013 SLE \i1l01[3] ( .Q(i1l01_Z[3]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[3]), .EN(i1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463013 SLE \i1l01[2] ( .Q(i1l01_Z[2]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[2]), .EN(i1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463013 SLE \i1l01[1] ( .Q(i1l01_Z[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[1]), .EN(i1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463013 SLE \i1l01[0] ( .Q(i1l01_Z[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[0]), .EN(i1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462837 SLE \l1l01[9] ( .Q(l1l01_Z[9]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oIl01_Z[0]), .EN(l1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462837 SLE \l1l01[8] ( .Q(l1l01_Z[8]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IIl01_Z[0]), .EN(l1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462837 SLE \l1l01[7] ( .Q(l1l01_Z[7]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[7]), .EN(l1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462837 SLE \l1l01[6] ( .Q(l1l01_Z[6]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[6]), .EN(l1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462837 SLE \l1l01[5] ( .Q(l1l01_Z[5]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[5]), .EN(l1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462837 SLE \l1l01[4] ( .Q(l1l01_Z[4]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[4]), .EN(l1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462837 SLE \l1l01[3] ( .Q(l1l01_Z[3]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[3]), .EN(l1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462837 SLE \l1l01[2] ( .Q(l1l01_Z[2]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[2]), .EN(l1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462837 SLE \l1l01[1] ( .Q(l1l01_Z[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[1]), .EN(l1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462837 SLE \l1l01[0] ( .Q(l1l01_Z[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[0]), .EN(l1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462925 SLE \o1l01[9] ( .Q(o1l01_Z[9]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oIl01_Z[1]), .EN(o1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462925 SLE \o1l01[8] ( .Q(o1l01_Z[8]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IIl01_Z[1]), .EN(o1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462925 SLE \o1l01[7] ( .Q(o1l01_Z[7]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[15]), .EN(o1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462925 SLE \o1l01[6] ( .Q(o1l01_Z[6]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[14]), .EN(o1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462925 SLE \o1l01[5] ( .Q(o1l01_Z[5]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[13]), .EN(o1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461349 SLE \oil01[0] ( .Q(oil01_Z[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIl01_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461420 SLE \Ill01[3] ( .Q(Ill01_Z[3]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Ill01_3[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461420 SLE \Ill01[2] ( .Q(Ill01_Z[2]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Ill01_3[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461420 SLE \Ill01[1] ( .Q(Ill01_Z[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(N_53_i_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461420 SLE \Ill01[0] ( .Q(Ill01_Z[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Ill01_3[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462749 SLE \I1l01[9] ( .Q(I1l01_Z[9]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oIl01_Z[1]), .EN(I1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462749 SLE \I1l01[8] ( .Q(I1l01_Z[8]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IIl01_Z[1]), .EN(I1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462749 SLE \I1l01[7] ( .Q(I1l01_Z[7]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[15]), .EN(I1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462749 SLE \I1l01[6] ( .Q(I1l01_Z[6]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[14]), .EN(I1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462749 SLE \I1l01[5] ( .Q(I1l01_Z[5]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[13]), .EN(I1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462749 SLE \I1l01[4] ( .Q(I1l01_Z[4]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[12]), .EN(I1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462749 SLE \I1l01[3] ( .Q(I1l01_Z[3]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[11]), .EN(I1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462749 SLE \I1l01[2] ( .Q(I1l01_Z[2]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[10]), .EN(I1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462749 SLE \I1l01[1] ( .Q(I1l01_Z[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[9]), .EN(I1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:462749 SLE \I1l01[0] ( .Q(I1l01_Z[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OIl01_Z[8]), .EN(I1l01_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461378 SLE \iil01[5] ( .Q(iil01_Z[5]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oil01_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461378 SLE \iil01[4] ( .Q(iil01_Z[4]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oil01_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461378 SLE \iil01[3] ( .Q(iil01_Z[3]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oil01_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461378 SLE \iil01[2] ( .Q(iil01_Z[2]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oil01_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461378 SLE \iil01[1] ( .Q(iil01_Z[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oil01_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461378 SLE \iil01[0] ( .Q(iil01_Z[0]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oil01_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461349 SLE \oil01[5] ( .Q(oil01_Z[5]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIl01_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461349 SLE \oil01[4] ( .Q(oil01_Z[4]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIl01_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461349 SLE \oil01[3] ( .Q(oil01_Z[3]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIl01_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461349 SLE \oil01[2] ( .Q(oil01_Z[2]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIl01_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461349 SLE \oil01[1] ( .Q(oil01_Z[1]), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iIl01_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:461261 ARI1 \iIl01_cry_cy[0] ( .FCO(iIl01_cry_cy), .S(iIl01_cry_cy_S[0]), .Y(iIl01_cry_cy_Y[0]), .B(iIl018_0_a5_0_4_Z), .C(iIl018_0_a5_0_5_Z), .D(iIl0112), .A(N_962), .FCI(VCC) ); defparam \iIl01_cry_cy[0] .INIT=20'h40007; // @28:461261 ARI1 \iIl01_cry[0] ( .FCO(iIl01_cry_Z[0]), .S(iIl01_s[0]), .Y(iIl01_cry_Y[0]), .B(iIl01_cry_cy_Y[0]), .C(iIl01_Z[0]), .D(GND), .A(VCC), .FCI(iIl01_cry_cy) ); defparam \iIl01_cry[0] .INIT=20'h48800; // @28:461261 ARI1 \iIl01_cry[1] ( .FCO(iIl01_cry_Z[1]), .S(iIl01_s[1]), .Y(iIl01_cry_Y[1]), .B(iIl01_cry_cy_Y[0]), .C(iIl01_Z[1]), .D(GND), .A(VCC), .FCI(iIl01_cry_Z[0]) ); defparam \iIl01_cry[1] .INIT=20'h48800; // @28:461261 ARI1 \iIl01_cry[2] ( .FCO(iIl01_cry_Z[2]), .S(iIl01_s[2]), .Y(iIl01_cry_Y[2]), .B(iIl01_cry_cy_Y[0]), .C(iIl01_Z[2]), .D(GND), .A(VCC), .FCI(iIl01_cry_Z[1]) ); defparam \iIl01_cry[2] .INIT=20'h48800; // @28:461261 ARI1 \iIl01_cry[3] ( .FCO(iIl01_cry_Z[3]), .S(iIl01_s[3]), .Y(iIl01_cry_Y[3]), .B(iIl01_cry_cy_Y[0]), .C(iIl01_Z[3]), .D(GND), .A(VCC), .FCI(iIl01_cry_Z[2]) ); defparam \iIl01_cry[3] .INIT=20'h48800; // @28:461261 ARI1 \iIl01_s[5] ( .FCO(iIl01_s_FCO[5]), .S(iIl01_s_Z[5]), .Y(iIl01_s_Y[5]), .B(iIl01_cry_cy_Y[0]), .C(iIl01_Z[5]), .D(GND), .A(VCC), .FCI(iIl01_cry_Z[4]) ); defparam \iIl01_s[5] .INIT=20'h48800; // @28:461261 ARI1 \iIl01_cry[4] ( .FCO(iIl01_cry_Z[4]), .S(iIl01_s[4]), .Y(iIl01_cry_Y[4]), .B(iIl01_cry_cy_Y[0]), .C(iIl01_Z[4]), .D(GND), .A(VCC), .FCI(iIl01_cry_Z[3]) ); defparam \iIl01_cry[4] .INIT=20'h48800; // @28:461988 CFG3 lll01_0_sqmuxa_i_o5 ( .A(Ill01_Z[3]), .B(Ill01_Z[2]), .C(iIl0112), .Y(N_943) ); defparam lll01_0_sqmuxa_i_o5.INIT=8'hCE; // @28:463220 CFG3 Iol01_0_sqmuxa_0_a5_0_1 ( .A(iIl0112), .B(Ill01_Z[2]), .C(Ill01_Z[1]), .Y(Iol01_0_sqmuxa_0_a5_0_0_Z) ); defparam Iol01_0_sqmuxa_0_a5_0_1.INIT=8'h80; // @28:461576 CFG3 \un1_Ill01_40_1.SUM_0_a4[3] ( .A(Ill01_Z[3]), .B(Ill01_Z[2]), .C(Ill01_Z[1]), .Y(N_100) ); defparam \un1_Ill01_40_1.SUM_0_a4[3] .INIT=8'h40; // @28:463132 CFG4 Ool01_0_sqmuxa_0_a2 ( .A(Ill01_Z[1]), .B(iOl01_1z), .C(Ill01_Z[0]), .D(Ill01_Z[2]), .Y(N_107) ); defparam Ool01_0_sqmuxa_0_a2.INIT=16'h4000; // @28:462780 CFG2 I1l01_0_sqmuxa_0_a5_0_0 ( .A(Ill01_Z[1]), .B(Ill01_Z[2]), .Y(I1l01_0_sqmuxa_0_a5_0_Z) ); defparam I1l01_0_sqmuxa_0_a5_0_0.INIT=4'h1; // @28:461678 CFG2 i0IO1 ( .A(OiI01_1z[0]), .B(OiI01_1z[1]), .Y(lO1i0) ); defparam i0IO1.INIT=4'hE; // @28:463220 CFG2 Iol01_0_sqmuxa_0_a2_0 ( .A(iOl01_1z), .B(Ill01_Z[0]), .Y(N_99) ); defparam Iol01_0_sqmuxa_0_a2_0.INIT=4'h2; // @28:461576 CFG2 \un1_Ill01_40_1.SUM_0_o4_0[3] ( .A(Ill01_Z[1]), .B(Ill01_Z[2]), .Y(N_939) ); defparam \un1_Ill01_40_1.SUM_0_o4_0[3] .INIT=4'h7; // @28:462252 CFG2 O0l01_0_sqmuxa_i_o5 ( .A(iOl01_1z), .B(Ill01_Z[0]), .Y(N_937) ); defparam O0l01_0_sqmuxa_i_o5.INIT=4'h7; // @28:461466 CFG2 un2_Oil01 ( .A(IIl01_Z[0]), .B(IIl01_Z[1]), .Y(un2_Oil01_i) ); defparam un2_Oil01.INIT=4'hE; // @28:461292 CFG4 iIl018_0_a5_0_5 ( .A(iIl01_Z[5]), .B(iIl01_Z[4]), .C(iIl01_Z[3]), .D(iIl01_Z[0]), .Y(iIl018_0_a5_0_5_Z) ); defparam iIl018_0_a5_0_5.INIT=16'h0001; // @28:461292 CFG4 iIl018_0_a5_4 ( .A(iIl01_Z[5]), .B(iIl01_Z[4]), .C(iIl01_Z[1]), .D(iIl01_Z[0]), .Y(iIl018_0_a5_4_Z) ); defparam iIl018_0_a5_4.INIT=16'h0800; // @28:461413 CFG4 un3_Oll01_3 ( .A(iil01_Z[5]), .B(iil01_Z[4]), .C(iil01_Z[1]), .D(iil01_Z[0]), .Y(un3_Oll01_3_Z) ); defparam un3_Oll01_3.INIT=16'h0010; // @28:461725 CFG4 un17_ool01 ( .A(oiI01[2]), .B(oiI01[3]), .C(oiI01[1]), .D(oiI01[0]), .Y(un17_ool01_Z) ); defparam un17_ool01.INIT=16'h0010; // @28:529420 CFG4 un11_ool01 ( .A(oiI01[2]), .B(oiI01[3]), .C(oiI01[1]), .D(oiI01[0]), .Y(un11_ool01_Z) ); defparam un11_ool01.INIT=16'h0100; // @28:461630 CFG4 un65_ool01 ( .A(oiI01[2]), .B(oiI01[3]), .C(oiI01[1]), .D(oiI01[0]), .Y(un65_ool01_Z) ); defparam un65_ool01.INIT=16'h0040; // @28:461830 CFG4 un59_ool01 ( .A(oiI01[2]), .B(oiI01[3]), .C(oiI01[1]), .D(oiI01[0]), .Y(un59_ool01_Z) ); defparam un59_ool01.INIT=16'h0400; // @28:461800 CFG4 un47_ool01 ( .A(oiI01[2]), .B(oiI01[3]), .C(oiI01[1]), .D(oiI01[0]), .Y(un47_ool01_Z) ); defparam un47_ool01.INIT=16'h2000; // @28:461785 CFG4 un41_ool01 ( .A(oiI01[2]), .B(oiI01[3]), .C(oiI01[1]), .D(oiI01[0]), .Y(un41_ool01_Z) ); defparam un41_ool01.INIT=16'h0020; // @28:461755 CFG4 un29_ool01 ( .A(oiI01[2]), .B(oiI01[3]), .C(oiI01[1]), .D(oiI01[0]), .Y(un29_ool01_Z) ); defparam un29_ool01.INIT=16'h0002; // @28:461890 CFG4 un83_ool01 ( .A(oiI01[2]), .B(oiI01[3]), .C(oiI01[1]), .D(oiI01[0]), .Y(un83_ool01_Z) ); defparam un83_ool01.INIT=16'h0800; // @28:461860 CFG4 un71_ool01 ( .A(oiI01[2]), .B(oiI01[3]), .C(oiI01[1]), .D(oiI01[0]), .Y(un71_ool01_Z) ); defparam un71_ool01.INIT=16'h4000; // @28:461684 CFG2 O1IO1 ( .A(liI01), .B(lO1i0), .Y(IO1i0) ); defparam O1IO1.INIT=4'h8; // @28:462252 CFG2 O0l01_0_sqmuxa_i_x2 ( .A(Ill01_Z[1]), .B(iIl0112), .Y(N_44_i) ); defparam O0l01_0_sqmuxa_i_x2.INIT=4'h9; // @28:462164 CFG2 ill01_0_sqmuxa_i_x4 ( .A(Ill01_Z[0]), .B(iIl0112), .Y(N_45_i) ); defparam ill01_0_sqmuxa_i_x4.INIT=4'h6; // @28:461576 CFG3 \un1_Ill01_40_1.SUM_0_o4_1[3] ( .A(Ill01_Z[1]), .B(Ill01_Z[0]), .C(Ill01_Z[2]), .Y(N_944) ); defparam \un1_Ill01_40_1.SUM_0_o4_1[3] .INIT=8'hFE; // @28:461576 CFG2 \un1_Ill01_40_1.SUM_0_a5_0_1[3] ( .A(Ill01_Z[3]), .B(iIl0112), .Y(N_954_1) ); defparam \un1_Ill01_40_1.SUM_0_a5_0_1[3] .INIT=4'h2; // @28:461430 CFG3 \Ill01_3_1.SUM[0] ( .A(Oll01_Z), .B(Ill01_Z[0]), .C(iOl01_1z), .Y(Ill01_3[0]) ); defparam \Ill01_3_1.SUM[0] .INIT=8'h6C; // @28:461430 CFG2 Iil01_RNO ( .A(Oll01_Z), .B(iOl01_1z), .Y(N_3_i) ); defparam Iil01_RNO.INIT=4'h8; // @28:461740 CFG4 un23_ool01 ( .A(oiI01[2]), .B(oiI01[3]), .C(oiI01[1]), .D(oiI01[0]), .Y(un23_ool01_Z) ); defparam un23_ool01.INIT=16'h1000; // @28:461695 CFG4 un5_ool01 ( .A(oiI01[2]), .B(oiI01[3]), .C(oiI01[1]), .D(oiI01[0]), .Y(un5_ool01_Z) ); defparam un5_ool01.INIT=16'h0001; // @28:528683 CFG4 un95_ool01 ( .A(oiI01[2]), .B(oiI01[3]), .C(oiI01[1]), .D(oiI01[0]), .Y(un95_ool01_Z) ); defparam un95_ool01.INIT=16'h8000; // @28:461905 CFG4 un89_ool01 ( .A(oiI01[2]), .B(oiI01[3]), .C(oiI01[1]), .D(oiI01[0]), .Y(un89_ool01_Z) ); defparam un89_ool01.INIT=16'h0080; // @28:461875 CFG4 un77_ool01 ( .A(oiI01[2]), .B(oiI01[3]), .C(oiI01[1]), .D(oiI01[0]), .Y(un77_ool01_Z) ); defparam un77_ool01.INIT=16'h0008; // @28:461815 CFG4 un53_ool01 ( .A(oiI01[2]), .B(oiI01[3]), .C(oiI01[1]), .D(oiI01[0]), .Y(un53_ool01_Z) ); defparam un53_ool01.INIT=16'h0004; // @28:461770 CFG4 un35_ool01 ( .A(oiI01[2]), .B(oiI01[3]), .C(oiI01[1]), .D(oiI01[0]), .Y(un35_ool01_Z) ); defparam un35_ool01.INIT=16'h0200; // @28:463220 CFG2 Iol01_0_sqmuxa_0_a5_0_0 ( .A(N_939), .B(N_954_1), .Y(Iol01_0_sqmuxa_0_a5_0) ); defparam Iol01_0_sqmuxa_0_a5_0_0.INIT=4'h4; // @28:461292 CFG4 iIl018_0_a5_0_4 ( .A(ooIO1[1]), .B(ooIO1[0]), .C(iIl01_Z[2]), .D(iIl01_Z[1]), .Y(iIl018_0_a5_0_4_Z) ); defparam iIl018_0_a5_0_4.INIT=16'h0040; // @28:461292 CFG4 iIl018_0_a5 ( .A(iIl01_Z[3]), .B(ooIO1[0]), .C(iIl018_0_a5_4_Z), .D(iIl01_Z[2]), .Y(N_962) ); defparam iIl018_0_a5.INIT=16'h0010; // @28:462604 CFG4 i0l01_0_sqmuxa_0_a5_0 ( .A(Ill01_Z[1]), .B(N_937), .C(iIl0112), .D(Ill01_Z[2]), .Y(N_87) ); defparam i0l01_0_sqmuxa_0_a5_0.INIT=16'h0020; // @28:462428 CFG4 l0l01_0_sqmuxa_0_a5_0 ( .A(Ill01_Z[1]), .B(N_99), .C(iIl0112), .D(Ill01_Z[2]), .Y(N_90) ); defparam l0l01_0_sqmuxa_0_a5_0.INIT=16'h0080; // @28:461466 CFG4 Oil01 ( .A(un2_Oil01_i), .B(Oll01_Z), .C(Iil01_Z), .D(lOl01_1z), .Y(Oil01_Z) ); defparam Oil01.INIT=16'h888C; // @28:463044 CFG4 i1l01_0_sqmuxa_0_a2 ( .A(Ill01_Z[0]), .B(Ill01_Z[2]), .C(Ill01_Z[1]), .D(iOl01_1z), .Y(N_108) ); defparam i1l01_0_sqmuxa_0_a2.INIT=16'h0400; // @28:462956 CFG3 o1l01_0_sqmuxa_0_a5_1 ( .A(Ill01_Z[1]), .B(N_954_1), .C(Ill01_Z[2]), .Y(N_80_1) ); defparam o1l01_0_sqmuxa_0_a5_1.INIT=8'h08; // @28:461722 CFG2 \un13_ool01[4] ( .A(un17_ool01_Z), .B(ill01_Z[4]), .Y(un13_ool01_Z[4]) ); defparam \un13_ool01[4] .INIT=4'h8; // @28:461722 CFG2 \un13_ool01[6] ( .A(un17_ool01_Z), .B(ill01_Z[6]), .Y(un13_ool01_Z[6]) ); defparam \un13_ool01[6] .INIT=4'h8; // @28:461722 CFG2 \un13_ool01[7] ( .A(un17_ool01_Z), .B(ill01_Z[7]), .Y(un13_ool01_Z[7]) ); defparam \un13_ool01[7] .INIT=4'h8; // @28:461722 CFG2 \un13_ool01[5] ( .A(un17_ool01_Z), .B(ill01_Z[5]), .Y(un13_ool01_Z[5]) ); defparam \un13_ool01[5] .INIT=4'h8; // @28:461752 CFG2 \un25_ool01[8] ( .A(un29_ool01_Z), .B(I0l01_Z[8]), .Y(un25_ool01_Z[8]) ); defparam \un25_ool01[8] .INIT=4'h8; // @28:461722 CFG2 \un13_ool01[9] ( .A(un17_ool01_Z), .B(ill01_Z[9]), .Y(un13_ool01_Z[9]) ); defparam \un13_ool01[9] .INIT=4'h8; // @28:461722 CFG2 \un13_ool01[8] ( .A(un17_ool01_Z), .B(ill01_Z[8]), .Y(un13_ool01_Z[8]) ); defparam \un13_ool01[8] .INIT=4'h8; // @28:461722 CFG2 \un13_ool01[3] ( .A(un17_ool01_Z), .B(ill01_Z[3]), .Y(un13_ool01_Z[3]) ); defparam \un13_ool01[3] .INIT=4'h8; // @28:461722 CFG2 \un13_ool01[0] ( .A(un17_ool01_Z), .B(ill01_Z[0]), .Y(un13_ool01_Z[0]) ); defparam \un13_ool01[0] .INIT=4'h8; // @28:461722 CFG2 \un13_ool01[2] ( .A(un17_ool01_Z), .B(ill01_Z[2]), .Y(un13_ool01_Z[2]) ); defparam \un13_ool01[2] .INIT=4'h8; // @28:461722 CFG2 \un13_ool01[1] ( .A(un17_ool01_Z), .B(ill01_Z[1]), .Y(un13_ool01_Z[1]) ); defparam \un13_ool01[1] .INIT=4'h8; // @28:461752 CFG2 \un25_ool01[1] ( .A(un29_ool01_Z), .B(I0l01_Z[1]), .Y(un25_ool01_Z[1]) ); defparam \un25_ool01[1] .INIT=4'h8; // @28:461692 CFG4 \ool01_7[5] ( .A(oll01_Z[5]), .B(lll01_Z[5]), .C(un11_ool01_Z), .D(un5_ool01_Z), .Y(ool01_7_Z[5]) ); defparam \ool01_7[5] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_5[5] ( .A(o1l01_Z[5]), .B(i0l01_Z[5]), .C(un71_ool01_Z), .D(un47_ool01_Z), .Y(ool01_5_Z[5]) ); defparam \ool01_5[5] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_4[5] ( .A(lol01_Z[5]), .B(Iol01_Z[5]), .C(un95_ool01_Z), .D(un89_ool01_Z), .Y(ool01_4_Z[5]) ); defparam \ool01_4[5] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_3[5] ( .A(i1l01_Z[5]), .B(O1l01_Z[5]), .C(un77_ool01_Z), .D(un53_ool01_Z), .Y(ool01_3_Z[5]) ); defparam \ool01_3[5] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_2[5] ( .A(I1l01_Z[5]), .B(I0l01_Z[5]), .C(un59_ool01_Z), .D(un29_ool01_Z), .Y(ool01_2_Z[5]) ); defparam \ool01_2[5] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_1[5] ( .A(o0l01_Z[5]), .B(Ool01_Z[5]), .C(un83_ool01_Z), .D(un41_ool01_Z), .Y(ool01_1_Z[5]) ); defparam \ool01_1[5] .INIT=16'hEAC0; // @28:461692 CFG4 \ool01_0[5] ( .A(l0l01_Z[5]), .B(l1l01_Z[5]), .C(un65_ool01_Z), .D(un35_ool01_Z), .Y(ool01_0_Z[5]) ); defparam \ool01_0[5] .INIT=16'hEAC0; // @28:461692 CFG4 \ool01_7[8] ( .A(oll01_Z[8]), .B(lll01_Z[8]), .C(un11_ool01_Z), .D(un5_ool01_Z), .Y(ool01_7_Z[8]) ); defparam \ool01_7[8] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_5[8] ( .A(o1l01_Z[8]), .B(i0l01_Z[8]), .C(un71_ool01_Z), .D(un47_ool01_Z), .Y(ool01_5_Z[8]) ); defparam \ool01_5[8] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_4[8] ( .A(lol01_Z[8]), .B(Iol01_Z[8]), .C(un95_ool01_Z), .D(un89_ool01_Z), .Y(ool01_4_Z[8]) ); defparam \ool01_4[8] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_3[8] ( .A(i1l01_Z[8]), .B(O1l01_Z[8]), .C(un77_ool01_Z), .D(un53_ool01_Z), .Y(ool01_3_Z[8]) ); defparam \ool01_3[8] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_1[8] ( .A(o0l01_Z[8]), .B(Ool01_Z[8]), .C(un83_ool01_Z), .D(un41_ool01_Z), .Y(ool01_1_Z[8]) ); defparam \ool01_1[8] .INIT=16'hEAC0; // @28:461692 CFG4 \ool01_0[8] ( .A(l0l01_Z[8]), .B(l1l01_Z[8]), .C(un65_ool01_Z), .D(un35_ool01_Z), .Y(ool01_0_Z[8]) ); defparam \ool01_0[8] .INIT=16'hEAC0; // @28:461692 CFG4 \ool01_7[4] ( .A(oll01_Z[4]), .B(lll01_Z[4]), .C(un11_ool01_Z), .D(un5_ool01_Z), .Y(ool01_7_Z[4]) ); defparam \ool01_7[4] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_5[4] ( .A(o1l01_Z[4]), .B(i0l01_Z[4]), .C(un71_ool01_Z), .D(un47_ool01_Z), .Y(ool01_5_Z[4]) ); defparam \ool01_5[4] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_4[4] ( .A(lol01_Z[4]), .B(Iol01_Z[4]), .C(un95_ool01_Z), .D(un89_ool01_Z), .Y(ool01_4_Z[4]) ); defparam \ool01_4[4] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_3[4] ( .A(i1l01_Z[4]), .B(O1l01_Z[4]), .C(un77_ool01_Z), .D(un53_ool01_Z), .Y(ool01_3_Z[4]) ); defparam \ool01_3[4] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_2[4] ( .A(I1l01_Z[4]), .B(I0l01_Z[4]), .C(un59_ool01_Z), .D(un29_ool01_Z), .Y(ool01_2_Z[4]) ); defparam \ool01_2[4] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_1[4] ( .A(o0l01_Z[4]), .B(Ool01_Z[4]), .C(un83_ool01_Z), .D(un41_ool01_Z), .Y(ool01_1_Z[4]) ); defparam \ool01_1[4] .INIT=16'hEAC0; // @28:461692 CFG4 \ool01_0[4] ( .A(l0l01_Z[4]), .B(l1l01_Z[4]), .C(un65_ool01_Z), .D(un35_ool01_Z), .Y(ool01_0_Z[4]) ); defparam \ool01_0[4] .INIT=16'hEAC0; // @28:461692 CFG4 \ool01_7[6] ( .A(oll01_Z[6]), .B(lll01_Z[6]), .C(un11_ool01_Z), .D(un5_ool01_Z), .Y(ool01_7_Z[6]) ); defparam \ool01_7[6] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_5[6] ( .A(o1l01_Z[6]), .B(i0l01_Z[6]), .C(un71_ool01_Z), .D(un47_ool01_Z), .Y(ool01_5_Z[6]) ); defparam \ool01_5[6] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_4[6] ( .A(lol01_Z[6]), .B(Iol01_Z[6]), .C(un95_ool01_Z), .D(un89_ool01_Z), .Y(ool01_4_Z[6]) ); defparam \ool01_4[6] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_3[6] ( .A(i1l01_Z[6]), .B(O1l01_Z[6]), .C(un77_ool01_Z), .D(un53_ool01_Z), .Y(ool01_3_Z[6]) ); defparam \ool01_3[6] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_2[6] ( .A(I1l01_Z[6]), .B(I0l01_Z[6]), .C(un59_ool01_Z), .D(un29_ool01_Z), .Y(ool01_2_Z[6]) ); defparam \ool01_2[6] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_1[6] ( .A(o0l01_Z[6]), .B(Ool01_Z[6]), .C(un83_ool01_Z), .D(un41_ool01_Z), .Y(ool01_1_Z[6]) ); defparam \ool01_1[6] .INIT=16'hEAC0; // @28:461692 CFG4 \ool01_0[6] ( .A(l0l01_Z[6]), .B(l1l01_Z[6]), .C(un65_ool01_Z), .D(un35_ool01_Z), .Y(ool01_0_Z[6]) ); defparam \ool01_0[6] .INIT=16'hEAC0; // @28:461692 CFG4 \ool01_7[7] ( .A(oll01_Z[7]), .B(lll01_Z[7]), .C(un11_ool01_Z), .D(un5_ool01_Z), .Y(ool01_7_Z[7]) ); defparam \ool01_7[7] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_5[7] ( .A(o1l01_Z[7]), .B(i0l01_Z[7]), .C(un71_ool01_Z), .D(un47_ool01_Z), .Y(ool01_5_Z[7]) ); defparam \ool01_5[7] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_4[7] ( .A(lol01_Z[7]), .B(Iol01_Z[7]), .C(un95_ool01_Z), .D(un89_ool01_Z), .Y(ool01_4_Z[7]) ); defparam \ool01_4[7] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_3[7] ( .A(i1l01_Z[7]), .B(O1l01_Z[7]), .C(un77_ool01_Z), .D(un53_ool01_Z), .Y(ool01_3_Z[7]) ); defparam \ool01_3[7] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_2[7] ( .A(I1l01_Z[7]), .B(I0l01_Z[7]), .C(un59_ool01_Z), .D(un29_ool01_Z), .Y(ool01_2_Z[7]) ); defparam \ool01_2[7] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_1[7] ( .A(o0l01_Z[7]), .B(Ool01_Z[7]), .C(un83_ool01_Z), .D(un41_ool01_Z), .Y(ool01_1_Z[7]) ); defparam \ool01_1[7] .INIT=16'hEAC0; // @28:461692 CFG4 \ool01_0[7] ( .A(l0l01_Z[7]), .B(l1l01_Z[7]), .C(un65_ool01_Z), .D(un35_ool01_Z), .Y(ool01_0_Z[7]) ); defparam \ool01_0[7] .INIT=16'hEAC0; // @28:461692 CFG4 \ool01_7[2] ( .A(oll01_Z[2]), .B(lll01_Z[2]), .C(un11_ool01_Z), .D(un5_ool01_Z), .Y(ool01_7_Z[2]) ); defparam \ool01_7[2] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_5[2] ( .A(o1l01_Z[2]), .B(i0l01_Z[2]), .C(un71_ool01_Z), .D(un47_ool01_Z), .Y(ool01_5_Z[2]) ); defparam \ool01_5[2] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_4[2] ( .A(lol01_Z[2]), .B(Iol01_Z[2]), .C(un95_ool01_Z), .D(un89_ool01_Z), .Y(ool01_4_Z[2]) ); defparam \ool01_4[2] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_3[2] ( .A(i1l01_Z[2]), .B(O1l01_Z[2]), .C(un77_ool01_Z), .D(un53_ool01_Z), .Y(ool01_3_Z[2]) ); defparam \ool01_3[2] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_2[2] ( .A(I1l01_Z[2]), .B(I0l01_Z[2]), .C(un59_ool01_Z), .D(un29_ool01_Z), .Y(ool01_2_Z[2]) ); defparam \ool01_2[2] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_1[2] ( .A(o0l01_Z[2]), .B(Ool01_Z[2]), .C(un83_ool01_Z), .D(un41_ool01_Z), .Y(ool01_1_Z[2]) ); defparam \ool01_1[2] .INIT=16'hEAC0; // @28:461692 CFG4 \ool01_0[2] ( .A(l0l01_Z[2]), .B(l1l01_Z[2]), .C(un65_ool01_Z), .D(un35_ool01_Z), .Y(ool01_0_Z[2]) ); defparam \ool01_0[2] .INIT=16'hEAC0; // @28:461692 CFG4 \ool01_7[0] ( .A(oll01_Z[0]), .B(lll01_Z[0]), .C(un11_ool01_Z), .D(un5_ool01_Z), .Y(ool01_7_Z[0]) ); defparam \ool01_7[0] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_5[0] ( .A(o1l01_Z[0]), .B(i0l01_Z[0]), .C(un71_ool01_Z), .D(un47_ool01_Z), .Y(ool01_5_Z[0]) ); defparam \ool01_5[0] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_4[0] ( .A(lol01_Z[0]), .B(Iol01_Z[0]), .C(un95_ool01_Z), .D(un89_ool01_Z), .Y(ool01_4_Z[0]) ); defparam \ool01_4[0] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_3[0] ( .A(i1l01_Z[0]), .B(O1l01_Z[0]), .C(un77_ool01_Z), .D(un53_ool01_Z), .Y(ool01_3_Z[0]) ); defparam \ool01_3[0] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_2[0] ( .A(I1l01_Z[0]), .B(I0l01_Z[0]), .C(un59_ool01_Z), .D(un29_ool01_Z), .Y(ool01_2_Z[0]) ); defparam \ool01_2[0] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_1[0] ( .A(o0l01_Z[0]), .B(Ool01_Z[0]), .C(un83_ool01_Z), .D(un41_ool01_Z), .Y(ool01_1_Z[0]) ); defparam \ool01_1[0] .INIT=16'hEAC0; // @28:461692 CFG4 \ool01_0[0] ( .A(l0l01_Z[0]), .B(l1l01_Z[0]), .C(un65_ool01_Z), .D(un35_ool01_Z), .Y(ool01_0_Z[0]) ); defparam \ool01_0[0] .INIT=16'hEAC0; // @28:461692 CFG4 \ool01_7[9] ( .A(oll01_Z[9]), .B(lll01_Z[9]), .C(un11_ool01_Z), .D(un5_ool01_Z), .Y(ool01_7_Z[9]) ); defparam \ool01_7[9] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_5[9] ( .A(o1l01_Z[9]), .B(i0l01_Z[9]), .C(un71_ool01_Z), .D(un47_ool01_Z), .Y(ool01_5_Z[9]) ); defparam \ool01_5[9] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_4[9] ( .A(lol01_Z[9]), .B(Iol01_Z[9]), .C(un95_ool01_Z), .D(un89_ool01_Z), .Y(ool01_4_Z[9]) ); defparam \ool01_4[9] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_3[9] ( .A(i1l01_Z[9]), .B(O1l01_Z[9]), .C(un77_ool01_Z), .D(un53_ool01_Z), .Y(ool01_3_Z[9]) ); defparam \ool01_3[9] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_2[9] ( .A(I1l01_Z[9]), .B(I0l01_Z[9]), .C(un59_ool01_Z), .D(un29_ool01_Z), .Y(ool01_2_Z[9]) ); defparam \ool01_2[9] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_1[9] ( .A(o0l01_Z[9]), .B(Ool01_Z[9]), .C(un83_ool01_Z), .D(un41_ool01_Z), .Y(ool01_1_Z[9]) ); defparam \ool01_1[9] .INIT=16'hEAC0; // @28:461692 CFG4 \ool01_0[9] ( .A(l0l01_Z[9]), .B(l1l01_Z[9]), .C(un65_ool01_Z), .D(un35_ool01_Z), .Y(ool01_0_Z[9]) ); defparam \ool01_0[9] .INIT=16'hEAC0; // @28:461692 CFG4 \ool01_7[1] ( .A(oll01_Z[1]), .B(lll01_Z[1]), .C(un11_ool01_Z), .D(un5_ool01_Z), .Y(ool01_7_Z[1]) ); defparam \ool01_7[1] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_5[1] ( .A(o1l01_Z[1]), .B(i0l01_Z[1]), .C(un71_ool01_Z), .D(un47_ool01_Z), .Y(ool01_5_Z[1]) ); defparam \ool01_5[1] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_4[1] ( .A(lol01_Z[1]), .B(Iol01_Z[1]), .C(un95_ool01_Z), .D(un89_ool01_Z), .Y(ool01_4_Z[1]) ); defparam \ool01_4[1] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_3[1] ( .A(i1l01_Z[1]), .B(O1l01_Z[1]), .C(un77_ool01_Z), .D(un53_ool01_Z), .Y(ool01_3_Z[1]) ); defparam \ool01_3[1] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_1[1] ( .A(o0l01_Z[1]), .B(Ool01_Z[1]), .C(un83_ool01_Z), .D(un41_ool01_Z), .Y(ool01_1_Z[1]) ); defparam \ool01_1[1] .INIT=16'hEAC0; // @28:461692 CFG4 \ool01_0[1] ( .A(l0l01_Z[1]), .B(l1l01_Z[1]), .C(un65_ool01_Z), .D(un35_ool01_Z), .Y(ool01_0_Z[1]) ); defparam \ool01_0[1] .INIT=16'hEAC0; // @28:461692 CFG4 \ool01_7[3] ( .A(oll01_Z[3]), .B(lll01_Z[3]), .C(un11_ool01_Z), .D(un5_ool01_Z), .Y(ool01_7_Z[3]) ); defparam \ool01_7[3] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_5[3] ( .A(o1l01_Z[3]), .B(i0l01_Z[3]), .C(un71_ool01_Z), .D(un47_ool01_Z), .Y(ool01_5_Z[3]) ); defparam \ool01_5[3] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_4[3] ( .A(lol01_Z[3]), .B(Iol01_Z[3]), .C(un95_ool01_Z), .D(un89_ool01_Z), .Y(ool01_4_Z[3]) ); defparam \ool01_4[3] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_3[3] ( .A(i1l01_Z[3]), .B(O1l01_Z[3]), .C(un77_ool01_Z), .D(un53_ool01_Z), .Y(ool01_3_Z[3]) ); defparam \ool01_3[3] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_2[3] ( .A(I1l01_Z[3]), .B(I0l01_Z[3]), .C(un59_ool01_Z), .D(un29_ool01_Z), .Y(ool01_2_Z[3]) ); defparam \ool01_2[3] .INIT=16'hECA0; // @28:461692 CFG4 \ool01_1[3] ( .A(o0l01_Z[3]), .B(Ool01_Z[3]), .C(un83_ool01_Z), .D(un41_ool01_Z), .Y(ool01_1_Z[3]) ); defparam \ool01_1[3] .INIT=16'hEAC0; // @28:461692 CFG4 \ool01_0[3] ( .A(l0l01_Z[3]), .B(l1l01_Z[3]), .C(un65_ool01_Z), .D(un35_ool01_Z), .Y(ool01_0_Z[3]) ); defparam \ool01_0[3] .INIT=16'hEAC0; // @28:461576 CFG3 \un1_Ill01_40_1.SUM_0_0[3] ( .A(N_954_1), .B(N_939), .C(N_100), .Y(SUM_0_0[3]) ); defparam \un1_Ill01_40_1.SUM_0_0[3] .INIT=8'hF8; // @28:463308 CFG4 lol01_0_sqmuxa_0_a5 ( .A(iIl0112), .B(Ill01_Z[3]), .C(N_939), .D(N_937), .Y(lol01_0_sqmuxa) ); defparam lol01_0_sqmuxa_0_a5.INIT=16'h000E; // @28:461410 CFG4 Oll01 ( .A(iil01_Z[3]), .B(iIl0112), .C(un3_Oll01_3_Z), .D(iil01_Z[2]), .Y(Oll01_Z) ); defparam Oll01.INIT=16'hCCDC; // @28:462780 CFG2 I1l01_0_sqmuxa_0_a5_0 ( .A(N_108), .B(iIl0112), .Y(N_84) ); defparam I1l01_0_sqmuxa_0_a5_0.INIT=4'h8; // @28:463132 CFG4 Ool01_0_sqmuxa_0 ( .A(N_99), .B(N_107), .C(N_954_1), .D(Iol01_0_sqmuxa_0_a5_0_0_Z), .Y(Ool01_0_sqmuxa) ); defparam Ool01_0_sqmuxa_0.INIT=16'hEAC0; // @28:462516 CFG4 o0l01_0_sqmuxa_0 ( .A(N_99), .B(N_87), .C(iIl0112), .D(N_100), .Y(o0l01_0_sqmuxa) ); defparam o0l01_0_sqmuxa_0.INIT=16'hCECC; // @28:462604 CFG4 i0l01_0_sqmuxa_0 ( .A(N_100), .B(iIl0112), .C(N_87), .D(N_937), .Y(i0l01_0_sqmuxa) ); defparam i0l01_0_sqmuxa_0.INIT=16'hF0F2; // @28:462428 CFG4 l0l01_0_sqmuxa_0 ( .A(iIl0112), .B(Ill01_Z[3]), .C(N_107), .D(N_90), .Y(l0l01_0_sqmuxa) ); defparam l0l01_0_sqmuxa_0.INIT=16'hFF10; // @28:461420 CFG3 \Ill01_3_1.N_53_i_i ( .A(Ill01_Z[1]), .B(Oll01_Z), .C(N_937), .Y(N_53_i_i) ); defparam \Ill01_3_1.N_53_i_i .INIT=8'hA6; // @28:461692 CFG4 \ool01_11[5] ( .A(un13_ool01_Z[5]), .B(ool01_7_Z[5]), .C(O0l01_Z[5]), .D(un23_ool01_Z), .Y(ool01_11_Z[5]) ); defparam \ool01_11[5] .INIT=16'hFEEE; // @28:461692 CFG4 \ool01_11[8] ( .A(un13_ool01_Z[8]), .B(ool01_7_Z[8]), .C(O0l01_Z[8]), .D(un23_ool01_Z), .Y(ool01_11_Z[8]) ); defparam \ool01_11[8] .INIT=16'hFEEE; // @28:461692 CFG4 \ool01_9[8] ( .A(un25_ool01_Z[8]), .B(ool01_3_Z[8]), .C(I1l01_Z[8]), .D(un59_ool01_Z), .Y(ool01_9_Z[8]) ); defparam \ool01_9[8] .INIT=16'hFEEE; // @28:461692 CFG4 \ool01_11[4] ( .A(un13_ool01_Z[4]), .B(ool01_7_Z[4]), .C(O0l01_Z[4]), .D(un23_ool01_Z), .Y(ool01_11_Z[4]) ); defparam \ool01_11[4] .INIT=16'hFEEE; // @28:461692 CFG4 \ool01_11[6] ( .A(un13_ool01_Z[6]), .B(ool01_7_Z[6]), .C(O0l01_Z[6]), .D(un23_ool01_Z), .Y(ool01_11_Z[6]) ); defparam \ool01_11[6] .INIT=16'hFEEE; // @28:461692 CFG4 \ool01_11[7] ( .A(un13_ool01_Z[7]), .B(ool01_7_Z[7]), .C(O0l01_Z[7]), .D(un23_ool01_Z), .Y(ool01_11_Z[7]) ); defparam \ool01_11[7] .INIT=16'hFEEE; // @28:461692 CFG4 \ool01_11[2] ( .A(un13_ool01_Z[2]), .B(ool01_7_Z[2]), .C(O0l01_Z[2]), .D(un23_ool01_Z), .Y(ool01_11_Z[2]) ); defparam \ool01_11[2] .INIT=16'hFEEE; // @28:461692 CFG4 \ool01_11[0] ( .A(un13_ool01_Z[0]), .B(ool01_7_Z[0]), .C(O0l01_Z[0]), .D(un23_ool01_Z), .Y(ool01_11_Z[0]) ); defparam \ool01_11[0] .INIT=16'hFEEE; // @28:461692 CFG4 \ool01_11[9] ( .A(un13_ool01_Z[9]), .B(ool01_7_Z[9]), .C(O0l01_Z[9]), .D(un23_ool01_Z), .Y(ool01_11_Z[9]) ); defparam \ool01_11[9] .INIT=16'hFEEE; // @28:461692 CFG4 \ool01_11[1] ( .A(un13_ool01_Z[1]), .B(ool01_7_Z[1]), .C(O0l01_Z[1]), .D(un23_ool01_Z), .Y(ool01_11_Z[1]) ); defparam \ool01_11[1] .INIT=16'hFEEE; // @28:461692 CFG4 \ool01_9[1] ( .A(un25_ool01_Z[1]), .B(ool01_3_Z[1]), .C(I1l01_Z[1]), .D(un59_ool01_Z), .Y(ool01_9_Z[1]) ); defparam \ool01_9[1] .INIT=16'hFEEE; // @28:461692 CFG4 \ool01_11[3] ( .A(un13_ool01_Z[3]), .B(ool01_7_Z[3]), .C(O0l01_Z[3]), .D(un23_ool01_Z), .Y(ool01_11_Z[3]) ); defparam \ool01_11[3] .INIT=16'hFEEE; // @28:461576 CFG3 \un1_Ill01_40_1.SUM_i[1] ( .A(Ill01_Z[1]), .B(iIl0112), .C(Ill01_Z[0]), .Y(N_11) ); defparam \un1_Ill01_40_1.SUM_i[1] .INIT=8'h95; // @28:461576 CFG4 \un1_Ill01_40_1.SUM_0[2] ( .A(Ill01_Z[2]), .B(Ill01_Z[1]), .C(iIl0112), .D(Ill01_Z[0]), .Y(N_392) ); defparam \un1_Ill01_40_1.SUM_0[2] .INIT=16'hA696; // @28:461430 CFG4 \Ill01_3_1.SUM_0[2] ( .A(Ill01_Z[1]), .B(Ill01_Z[2]), .C(N_937), .D(Oll01_Z), .Y(Ill01_3[2]) ); defparam \Ill01_3_1.SUM_0[2] .INIT=16'hC6CC; // @28:463044 CFG4 i1l01_0_sqmuxa_0 ( .A(N_99), .B(N_108), .C(N_954_1), .D(Iol01_0_sqmuxa_0_a5_0_0_Z), .Y(i1l01_0_sqmuxa) ); defparam i1l01_0_sqmuxa_0.INIT=16'hEAC0; // @28:462780 CFG4 I1l01_0_sqmuxa_0 ( .A(N_937), .B(N_84), .C(I1l01_0_sqmuxa_0_a5_0_Z), .D(N_954_1), .Y(I1l01_0_sqmuxa) ); defparam I1l01_0_sqmuxa_0.INIT=16'hDCCC; // @28:462692 CFG4 O1l01_0_sqmuxa_0 ( .A(N_944), .B(iOl01_1z), .C(N_954_1), .D(N_84), .Y(O1l01_0_sqmuxa) ); defparam O1l01_0_sqmuxa_0.INIT=16'hFF40; // @28:463220 CFG4 Iol01_0_sqmuxa_0 ( .A(Iol01_0_sqmuxa_0_a5_0), .B(Iol01_0_sqmuxa_0_a5_0_0_Z), .C(N_937), .D(N_99), .Y(Iol01_0_sqmuxa) ); defparam Iol01_0_sqmuxa_0.INIT=16'hAE0C; // @28:462956 CFG4 o1l01_0_sqmuxa_0 ( .A(iIl0112), .B(N_80_1), .C(N_107), .D(N_937), .Y(o1l01_0_sqmuxa) ); defparam o1l01_0_sqmuxa_0.INIT=16'hA0EC; // @28:462868 CFG4 l1l01_0_sqmuxa_0 ( .A(iIl0112), .B(N_80_1), .C(N_99), .D(N_107), .Y(l1l01_0_sqmuxa) ); defparam l1l01_0_sqmuxa_0.INIT=16'hEAC0; // @28:461430 CFG4 \Ill01_3_1.SUM_0[3] ( .A(Oll01_Z), .B(Ill01_Z[3]), .C(N_937), .D(N_939), .Y(Ill01_3[3]) ); defparam \Ill01_3_1.SUM_0[3] .INIT=16'hCCC6; // @28:462340 CFG4 I0l01_0_sqmuxa_0 ( .A(iIl0112), .B(Ill01_Z[3]), .C(N_108), .D(N_90), .Y(I0l01_0_sqmuxa) ); defparam I0l01_0_sqmuxa_0.INIT=16'hFF10; // @28:462221 CFG3 O0l01_0_sqmuxa_i_x2_RNIGOTPC ( .A(N_937), .B(N_44_i), .C(N_943), .Y(N_32_i) ); defparam O0l01_0_sqmuxa_i_x2_RNIGOTPC.INIT=8'h01; // @28:462045 CFG4 ill01_0_sqmuxa_i_x4_RNI0KISI ( .A(Ill01_Z[1]), .B(iOl01_1z), .C(N_45_i), .D(N_943), .Y(N_933_i) ); defparam ill01_0_sqmuxa_i_x4_RNI0KISI.INIT=16'h0040; // @28:461566 CFG3 Oil01_RNIC3T3J ( .A(lOl01_1z), .B(iOl01_1z), .C(Oil01_Z), .Y(un1_OIl014_i) ); defparam Oil01_RNIC3T3J.INIT=8'h40; // @28:461957 CFG4 lll01_0_sqmuxa_i_o5_RNI86JQL ( .A(Ill01_Z[0]), .B(Ill01_Z[1]), .C(iOl01_1z), .D(N_943), .Y(N_19_i) ); defparam lll01_0_sqmuxa_i_o5_RNI86JQL.INIT=16'h0010; // @28:461692 CFG4 \ool01_12[5] ( .A(ool01_2_Z[5]), .B(ool01_1_Z[5]), .C(ool01_0_Z[5]), .D(ool01_3_Z[5]), .Y(ool01_12_Z[5]) ); defparam \ool01_12[5] .INIT=16'hFFFE; // @28:461692 CFG3 \ool01_12[8] ( .A(ool01_0_Z[8]), .B(ool01_1_Z[8]), .C(ool01_9_Z[8]), .Y(ool01_12_Z[8]) ); defparam \ool01_12[8] .INIT=8'hFE; // @28:461692 CFG4 \ool01_12[4] ( .A(ool01_2_Z[4]), .B(ool01_1_Z[4]), .C(ool01_0_Z[4]), .D(ool01_3_Z[4]), .Y(ool01_12_Z[4]) ); defparam \ool01_12[4] .INIT=16'hFFFE; // @28:461692 CFG4 \ool01_12[6] ( .A(ool01_2_Z[6]), .B(ool01_1_Z[6]), .C(ool01_0_Z[6]), .D(ool01_3_Z[6]), .Y(ool01_12_Z[6]) ); defparam \ool01_12[6] .INIT=16'hFFFE; // @28:461692 CFG4 \ool01_12[7] ( .A(ool01_2_Z[7]), .B(ool01_1_Z[7]), .C(ool01_0_Z[7]), .D(ool01_3_Z[7]), .Y(ool01_12_Z[7]) ); defparam \ool01_12[7] .INIT=16'hFFFE; // @28:461692 CFG4 \ool01_12[2] ( .A(ool01_2_Z[2]), .B(ool01_1_Z[2]), .C(ool01_0_Z[2]), .D(ool01_3_Z[2]), .Y(ool01_12_Z[2]) ); defparam \ool01_12[2] .INIT=16'hFFFE; // @28:461692 CFG4 \ool01_12[0] ( .A(ool01_2_Z[0]), .B(ool01_1_Z[0]), .C(ool01_0_Z[0]), .D(ool01_3_Z[0]), .Y(ool01_12_Z[0]) ); defparam \ool01_12[0] .INIT=16'hFFFE; // @28:461692 CFG4 \ool01_12[9] ( .A(ool01_2_Z[9]), .B(ool01_1_Z[9]), .C(ool01_0_Z[9]), .D(ool01_3_Z[9]), .Y(ool01_12_Z[9]) ); defparam \ool01_12[9] .INIT=16'hFFFE; // @28:461692 CFG3 \ool01_12[1] ( .A(ool01_0_Z[1]), .B(ool01_1_Z[1]), .C(ool01_9_Z[1]), .Y(ool01_12_Z[1]) ); defparam \ool01_12[1] .INIT=8'hFE; // @28:461692 CFG4 \ool01_12[3] ( .A(ool01_2_Z[3]), .B(ool01_1_Z[3]), .C(ool01_0_Z[3]), .D(ool01_3_Z[3]), .Y(ool01_12_Z[3]) ); defparam \ool01_12[3] .INIT=16'hFFFE; // @28:462133 CFG4 O0l01_0_sqmuxa_i_x2_RNIVDP1I ( .A(iOl01_1z), .B(N_44_i), .C(N_943), .D(N_45_i), .Y(N_34_i_0) ); defparam O0l01_0_sqmuxa_i_x2_RNIVDP1I.INIT=16'h0002; // @28:461566 CFG4 \un1_Ill01_40_1.N_715_i ( .A(iIl0112), .B(Ill01_Z[3]), .C(N_944), .D(SUM_0_0[3]), .Y(N_715_i) ); defparam \un1_Ill01_40_1.N_715_i .INIT=16'h00D3; // @28:461692 CFG4 \ool01[3] ( .A(ool01_4_Z[3]), .B(ool01_5_Z[3]), .C(ool01_12_Z[3]), .D(ool01_11_Z[3]), .Y(iiI01[3]) ); defparam \ool01[3] .INIT=16'hFFFE; // @28:461692 CFG4 \ool01[2] ( .A(ool01_4_Z[2]), .B(ool01_5_Z[2]), .C(ool01_12_Z[2]), .D(ool01_11_Z[2]), .Y(iiI01[2]) ); defparam \ool01[2] .INIT=16'hFFFE; // @28:461692 CFG4 \ool01[1] ( .A(ool01_4_Z[1]), .B(ool01_5_Z[1]), .C(ool01_12_Z[1]), .D(ool01_11_Z[1]), .Y(iiI01[1]) ); defparam \ool01[1] .INIT=16'hFFFE; // @28:461692 CFG4 \ool01[0] ( .A(ool01_4_Z[0]), .B(ool01_5_Z[0]), .C(ool01_12_Z[0]), .D(ool01_11_Z[0]), .Y(iiI01[0]) ); defparam \ool01[0] .INIT=16'hFFFE; // @28:461692 CFG4 \ool01[9] ( .A(ool01_4_Z[9]), .B(ool01_5_Z[9]), .C(ool01_12_Z[9]), .D(ool01_11_Z[9]), .Y(IOl01) ); defparam \ool01[9] .INIT=16'hFFFE; // @28:461692 CFG4 \ool01[8] ( .A(ool01_4_Z[8]), .B(ool01_5_Z[8]), .C(ool01_12_Z[8]), .D(ool01_11_Z[8]), .Y(OOl01) ); defparam \ool01[8] .INIT=16'hFFFE; // @28:461692 CFG4 \ool01[7] ( .A(ool01_4_Z[7]), .B(ool01_5_Z[7]), .C(ool01_12_Z[7]), .D(ool01_11_Z[7]), .Y(iiI01[7]) ); defparam \ool01[7] .INIT=16'hFFFE; // @28:461692 CFG4 \ool01[6] ( .A(ool01_4_Z[6]), .B(ool01_5_Z[6]), .C(ool01_12_Z[6]), .D(ool01_11_Z[6]), .Y(iiI01[6]) ); defparam \ool01[6] .INIT=16'hFFFE; // @28:461692 CFG4 \ool01[5] ( .A(ool01_4_Z[5]), .B(ool01_5_Z[5]), .C(ool01_12_Z[5]), .D(ool01_11_Z[5]), .Y(iiI01[5]) ); defparam \ool01[5] .INIT=16'hFFFE; // @28:461692 CFG4 \ool01[4] ( .A(ool01_4_Z[4]), .B(ool01_5_Z[4]), .C(ool01_12_Z[4]), .D(ool01_11_Z[4]), .Y(iiI01[4]) ); defparam \ool01[4] .INIT=16'hFFFE; // @28:461512 CFG4 lOl01_2_iv_i ( .A(un2_Oil01_i), .B(Oll01_Z), .C(Iil01_Z), .D(lOl01_1z), .Y(lOl01_2_iv_i_Z) ); defparam lOl01_2_iv_i.INIT=16'hBB8C; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_MSGMII_CNVRXI_26s */ module CTSE_MSGMII_CNVRXO_26s ( iiI01, oOl01, ii0i0, oiI01, iIl0112, lOl01, OOl01_1z, oi0i0, IOl01, OO1i0, PF_IOD_CDR_C0_0_RX_CLK_R, Olli0_i ) ; input [7:0] iiI01 ; input [3:0] oOl01 ; output [7:0] ii0i0 ; output [3:0] oiI01 ; input iIl0112 ; input lOl01 ; input OOl01_1z ; output oi0i0 ; input IOl01 ; output OO1i0 ; input PF_IOD_CDR_C0_0_RX_CLK_R ; input Olli0_i ; wire iIl0112 ; wire lOl01 ; wire OOl01_1z ; wire oi0i0 ; wire IOl01 ; wire OO1i0 ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire Olli0_i ; wire [3:0] lO001_Z; wire [2:0] Iil01_Z; wire [3:0] oiI01_5_Z; wire [7:4] un1_lO001_Z; wire [3:1] oiI01_5_2_Z; wire OO001_Z ; wire VCC ; wire OO001_3_Z ; wire GND ; wire CO0 ; wire OO0015_Z ; wire IO001_Z ; wire N_13 ; wire N_15 ; wire N_16 ; // @28:463599 SLE OO001 ( .Q(OO001_Z), .ADn(VCC), .ALn(Olli0_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OO001_3_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463882 SLE o0IO1 ( .Q(OO1i0), .ADn(VCC), .ALn(Olli0_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(IOl01), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463852 SLE l0IO1 ( .Q(oi0i0), .ADn(VCC), .ALn(Olli0_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(OOl01_1z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463822 SLE \I0IO1[1] ( .Q(ii0i0[1]), .ADn(VCC), .ALn(Olli0_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lO001_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463822 SLE \I0IO1[0] ( .Q(ii0i0[0]), .ADn(VCC), .ALn(Olli0_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lO001_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463546 SLE \Iil01[2] ( .Q(Iil01_Z[2]), .ADn(VCC), .ALn(Olli0_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Iil01_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463546 SLE \Iil01[1] ( .Q(Iil01_Z[1]), .ADn(VCC), .ALn(Olli0_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(Iil01_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463546 SLE \Iil01[0] ( .Q(Iil01_Z[0]), .ADn(VCC), .ALn(Olli0_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lOl01), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463645 SLE \oiI01_Z[3] ( .Q(oiI01[3]), .ADn(VCC), .ALn(Olli0_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oiI01_5_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463645 SLE \oiI01_Z[2] ( .Q(oiI01[2]), .ADn(GND), .ALn(Olli0_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oiI01_5_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463645 SLE \oiI01_Z[1] ( .Q(oiI01[1]), .ADn(VCC), .ALn(Olli0_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oiI01_5_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463645 SLE \oiI01_Z[0] ( .Q(oiI01[0]), .ADn(VCC), .ALn(Olli0_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(oiI01_5_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463822 SLE \I0IO1[7] ( .Q(ii0i0[7]), .ADn(VCC), .ALn(Olli0_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(un1_lO001_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463822 SLE \I0IO1[6] ( .Q(ii0i0[6]), .ADn(VCC), .ALn(Olli0_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(un1_lO001_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463822 SLE \I0IO1[5] ( .Q(ii0i0[5]), .ADn(VCC), .ALn(Olli0_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(un1_lO001_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463822 SLE \I0IO1[4] ( .Q(ii0i0[4]), .ADn(VCC), .ALn(Olli0_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(un1_lO001_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463822 SLE \I0IO1[3] ( .Q(ii0i0[3]), .ADn(VCC), .ALn(Olli0_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lO001_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463822 SLE \I0IO1[2] ( .Q(ii0i0[2]), .ADn(VCC), .ALn(Olli0_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(lO001_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:463655 CFG4 \oiI01_5[1] ( .A(CO0), .B(oiI01[1]), .C(oiI01_5_2_Z[1]), .D(OO0015_Z), .Y(oiI01_5_Z[1]) ); defparam \oiI01_5[1] .INIT=16'hF0F6; // @28:463625 CFG2 OO0015 ( .A(OOl01_1z), .B(IO001_Z), .Y(OO0015_Z) ); defparam OO0015.INIT=4'h4; // @28:463588 CFG2 IO001 ( .A(Iil01_Z[1]), .B(Iil01_Z[2]), .Y(IO001_Z) ); defparam IO001.INIT=4'h2; // @28:463740 CFG3 \un1_oiI01_1.SUM[0] ( .A(OO001_Z), .B(oiI01[0]), .C(iIl0112), .Y(N_13) ); defparam \un1_oiI01_1.SUM[0] .INIT=8'h39; // @28:463740 CFG3 \un1_oiI01_1.CO0 ( .A(OO001_Z), .B(oiI01[0]), .C(iIl0112), .Y(CO0) ); defparam \un1_oiI01_1.CO0 .INIT=8'hC4; // @28:463609 CFG2 OO001_3 ( .A(OO0015_Z), .B(OO001_Z), .Y(OO001_3_Z) ); defparam OO001_3.INIT=4'hB; // @28:463655 CFG4 \oiI01_5_2[1] ( .A(oOl01[1]), .B(iIl0112), .C(OO0015_Z), .D(oOl01[0]), .Y(oiI01_5_2_Z[1]) ); defparam \oiI01_5_2[1] .INIT=16'hE020; // @28:463655 CFG4 \oiI01_5_2[2] ( .A(oOl01[2]), .B(iIl0112), .C(OO0015_Z), .D(oOl01[1]), .Y(oiI01_5_2_Z[2]) ); defparam \oiI01_5_2[2] .INIT=16'hE020; // @28:463655 CFG4 \oiI01_5_2[3] ( .A(oOl01[3]), .B(iIl0112), .C(OO0015_Z), .D(oOl01[2]), .Y(oiI01_5_2_Z[3]) ); defparam \oiI01_5_2[3] .INIT=16'hE020; // @28:463655 CFG4 \oiI01_5[0] ( .A(iIl0112), .B(oOl01[0]), .C(N_13), .D(OO0015_Z), .Y(oiI01_5_Z[0]) ); defparam \oiI01_5[0] .INIT=16'h44F0; // @28:463740 CFG3 \un1_oiI01_1.SUM[2] ( .A(oiI01[2]), .B(oiI01[1]), .C(CO0), .Y(N_15) ); defparam \un1_oiI01_1.SUM[2] .INIT=8'h6A; // @28:463740 CFG4 \un1_oiI01_1.SUM[3] ( .A(oiI01[3]), .B(oiI01[2]), .C(oiI01[1]), .D(CO0), .Y(N_16) ); defparam \un1_oiI01_1.SUM[3] .INIT=16'h6AAA; // @28:463655 CFG3 \oiI01_5[2] ( .A(N_15), .B(OO0015_Z), .C(oiI01_5_2_Z[2]), .Y(oiI01_5_Z[2]) ); defparam \oiI01_5[2] .INIT=8'hF2; // @28:463751 CFG2 \un1_lO001[7] ( .A(iiI01[7]), .B(iIl0112), .Y(un1_lO001_Z[7]) ); defparam \un1_lO001[7] .INIT=4'h8; // @28:463751 CFG2 \un1_lO001[6] ( .A(iiI01[6]), .B(iIl0112), .Y(un1_lO001_Z[6]) ); defparam \un1_lO001[6] .INIT=4'h8; // @28:463751 CFG2 \un1_lO001[5] ( .A(iiI01[5]), .B(iIl0112), .Y(un1_lO001_Z[5]) ); defparam \un1_lO001[5] .INIT=4'h8; // @28:463751 CFG2 \un1_lO001[4] ( .A(iiI01[4]), .B(iIl0112), .Y(un1_lO001_Z[4]) ); defparam \un1_lO001[4] .INIT=4'h8; // @28:463655 CFG3 \oiI01_5[3] ( .A(N_16), .B(OO0015_Z), .C(oiI01_5_2_Z[3]), .Y(oiI01_5_Z[3]) ); defparam \oiI01_5[3] .INIT=8'hF2; // @28:463751 CFG4 \lO001[2] ( .A(OO001_Z), .B(iIl0112), .C(iiI01[6]), .D(iiI01[2]), .Y(lO001_Z[2]) ); defparam \lO001[2] .INIT=16'hFE10; // @28:463751 CFG4 \lO001[3] ( .A(OO001_Z), .B(iIl0112), .C(iiI01[7]), .D(iiI01[3]), .Y(lO001_Z[3]) ); defparam \lO001[3] .INIT=16'hFE10; // @28:463751 CFG4 \lO001[0] ( .A(OO001_Z), .B(iIl0112), .C(iiI01[4]), .D(iiI01[0]), .Y(lO001_Z[0]) ); defparam \lO001[0] .INIT=16'hFE10; // @28:463751 CFG4 \lO001[1] ( .A(iIl0112), .B(OO001_Z), .C(iiI01[5]), .D(iiI01[1]), .Y(lO001_Z[1]) ); defparam \lO001[1] .INIT=16'hFE10; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_MSGMII_CNVRXO_26s */ module CTSE_MSGMII_CORE_26s_0s_18s_0s ( ii0i0, iO1i0_1z, OI1i0, ooIO1, Oi0i0_1z, Olli0_i, OO1i0, oi0i0, lO1i0, IO1i0, RD_BC_ERROR_c, OOOO1, BIBUF_0_Y, CORETSE_0_MDOEN, CORETSE_0_MDO, iI1i0, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i, llli0_i, Illi0_i, iIli0_i, li0i0, Ii0i0_1z, iIl0112, PF_IOD_CDR_CCC_C0_0_TX_CLK_G, LINK_OK_c, PF_IOD_CDR_C0_0_RX_CLK_R ) ; output [7:0] ii0i0 ; output [9:0] iO1i0_1z ; input [9:0] OI1i0 ; input [1:0] ooIO1 ; input [7:0] Oi0i0_1z ; input Olli0_i ; output OO1i0 ; output oi0i0 ; output lO1i0 ; output IO1i0 ; output RD_BC_ERROR_c ; output OOOO1 ; input BIBUF_0_Y ; input CORETSE_0_MDOEN ; input CORETSE_0_MDO ; input iI1i0 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; input llli0_i ; input Illi0_i ; input iIli0_i ; input li0i0 ; input Ii0i0_1z ; output iIl0112 ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; output LINK_OK_c ; input PF_IOD_CDR_C0_0_RX_CLK_R ; wire Olli0_i ; wire OO1i0 ; wire oi0i0 ; wire lO1i0 ; wire IO1i0 ; wire RD_BC_ERROR_c ; wire OOOO1 ; wire BIBUF_0_Y ; wire CORETSE_0_MDOEN ; wire CORETSE_0_MDO ; wire iI1i0 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire llli0_i ; wire Illi0_i ; wire iIli0_i ; wire li0i0 ; wire Ii0i0_1z ; wire iIl0112 ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire LINK_OK_c ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire [8:8] ii001; wire [7:0] iO001; wire [2:0] oO001; wire [2:0] oI001; wire [7:0] oo001; wire [1:0] OiI01; wire [1:0] IiI01; wire [15:0] ioI01; wire [7:0] iiI01; wire [3:0] oiI01; wire [3:0] oOl01; wire iOl01_Z ; wire iOl01_i ; wire VCC ; wire ooI01_i ; wire GND ; wire oi001_i ; wire N_726 ; wire N_725 ; wire N_724 ; wire N_723 ; wire N_722 ; wire N_721 ; wire N_720 ; wire N_719 ; wire N_718 ; wire II001 ; wire OI001 ; wire lI001 ; wire liI01 ; wire io001 ; wire OOl01 ; wire IOl01 ; wire lOl01 ; CFG1 iOl01_RNIHP2B7 ( .A(iOl01_Z), .Y(iOl01_i) ); defparam iOl01_RNIHP2B7.INIT=2'h1; // @28:466245 SLE iOl01 ( .Q(iOl01_Z), .ADn(VCC), .ALn(ooI01_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(iOl01_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:466276 SLE \loIO1[8] ( .Q(LINK_OK_c), .ADn(VCC), .ALn(oi001_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ii001[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:466320 CTSE_MSGMII_CNVTXI_26s msgmii_convtxi_1 ( .iO001(iO001[7:0]), .oO001(oO001[2:0]), .Oi0i0(Oi0i0_1z[7:0]), .oI001_1z(oI001[2:0]), .II001(II001), .OI001(OI001), .iIl0112(iIl0112), .Ii0i0(Ii0i0_1z), .li0i0(li0i0), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .iIli0_i(iIli0_i), .lI001_1z(lI001) ); // @28:466404 CTSE_MSGMII_CNVTXO_26s msgmii_convtxo_1 ( .oI001(oI001[2:0]), .ooIO1(ooIO1[1:0]), .oO001(oO001[2:0]), .iO001(iO001[7:0]), .oo001_1z(oo001[7:0]), .iIl0112_1z(iIl0112), .lI001(lI001), .OI001_1z(OI001), .liI01_1z(liI01), .II001(II001), .io001_1z(io001), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .Illi0_i(Illi0_i) ); // @28:466506 CTSE_MSGMII_TBI_26s_0s_0s_1s CTSE_MSGMII_TBI_1 ( .ii001_0(ii001[8]), .OiI01(OiI01[1:0]), .IiI01(IiI01[1:0]), .ioI01(ioI01[15:0]), .OI1i0(OI1i0[9:0]), .oo001(oo001[7:0]), .iO1i0(iO1i0_1z[9:0]), .llli0_i(llli0_i), .hstrst_i(hstrst_i), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .iI1i0(iI1i0), .CORETSE_0_MDO(CORETSE_0_MDO), .CORETSE_0_MDOEN(CORETSE_0_MDOEN), .BIBUF_0_Y(BIBUF_0_Y), .OOOO1(OOOO1), .Illi0_i(Illi0_i), .RD_BC_ERROR_c(RD_BC_ERROR_c), .ooI01_i(ooI01_i), .PF_IOD_CDR_C0_0_RX_CLK_R(PF_IOD_CDR_C0_0_RX_CLK_R), .iOl01(iOl01_Z), .iOl01_i(iOl01_i), .oi001_i(oi001_i), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .io001(io001), .liI01(liI01) ); // @28:466739 CTSE_MSGMII_CNVRXI_26s CTSE_MSGMII_CNVRXI_1 ( .iiI01(iiI01[7:0]), .ooIO1(ooIO1[1:0]), .oiI01(oiI01[3:0]), .ioI01(ioI01[15:0]), .oOl01_1z(oOl01[3:0]), .IiI01_1z(IiI01[1:0]), .OiI01_1z(OiI01[1:0]), .OOl01(OOl01), .IOl01(IOl01), .IO1i0(IO1i0), .liI01(liI01), .lO1i0(lO1i0), .iIl0112(iIl0112), .lOl01_1z(lOl01), .iOl01_1z(iOl01_Z), .PF_IOD_CDR_C0_0_RX_CLK_R(PF_IOD_CDR_C0_0_RX_CLK_R), .ooI01_i(ooI01_i) ); // @28:466847 CTSE_MSGMII_CNVRXO_26s CTSE_MSGMII_CNVRXO_1 ( .iiI01(iiI01[7:0]), .oOl01(oOl01[3:0]), .ii0i0(ii0i0[7:0]), .oiI01(oiI01[3:0]), .iIl0112(iIl0112), .lOl01(lOl01), .OOl01_1z(OOl01), .oi0i0(oi0i0), .IOl01(IOl01), .OO1i0(OO1i0), .PF_IOD_CDR_C0_0_RX_CLK_R(PF_IOD_CDR_C0_0_RX_CLK_R), .Olli0_i(Olli0_i) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_MSGMII_CORE_26s_0s_18s_0s */ module CTSE_CLKRST_26s_1s ( PF_CCC_0_0_OUT0_FABCLK_0, PF_IOD_CDR_C0_0_RX_CLK_R, PF_IOD_CDR_CCC_C0_0_TX_CLK_G, l_i_i, lIli0_i, oIli0_i, llli0_i, Illi0_i, Olli0_i, iIli0_i, hstrst_i ) ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input PF_IOD_CDR_C0_0_RX_CLK_R ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; input l_i_i ; output lIli0_i ; output oIli0_i ; output llli0_i ; output Illi0_i ; output Olli0_i ; output iIli0_i ; output hstrst_i ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire l_i_i ; wire lIli0_i ; wire oIli0_i ; wire llli0_i ; wire Illi0_i ; wire Olli0_i ; wire iIli0_i ; wire hstrst_i ; wire hstrst ; wire iIli0 ; wire Olli0 ; wire Illi0 ; wire llli0 ; wire oIli0 ; wire lIli0 ; wire hstrst_tbi_tx_1 ; wire GND ; wire VCC ; wire hstrst_rx_1 ; wire hstrst_tx_1 ; wire hstrst_fr_1 ; wire hstrst_ft_1 ; wire illi0 ; wire hstrst_tbi_rx_1 ; CFG1 \ASYNC_RESET.O0li0_RNIO0FC5 ( .A(hstrst), .Y(hstrst_i) ); defparam \ASYNC_RESET.O0li0_RNIO0FC5 .INIT=2'h1; CFG1 \ASYNC_RESET.o0li0_RNIO1JI1 ( .A(iIli0), .Y(iIli0_i) ); defparam \ASYNC_RESET.o0li0_RNIO1JI1 .INIT=2'h1; CFG1 \ASYNC_RESET.i0li0_RNII9EP2 ( .A(Olli0), .Y(Olli0_i) ); defparam \ASYNC_RESET.i0li0_RNII9EP2 .INIT=2'h1; CFG1 \ASYNC_RESET.O1li0_RNIP3ID5 ( .A(Illi0), .Y(Illi0_i) ); defparam \ASYNC_RESET.O1li0_RNIP3ID5 .INIT=2'h1; CFG1 \ASYNC_RESET.I1li0_RNIJBDK6 ( .A(llli0), .Y(llli0_i) ); defparam \ASYNC_RESET.I1li0_RNIJBDK6 .INIT=2'h1; CFG1 \ASYNC_RESET.l0li0_RNILL066 ( .A(oIli0), .Y(oIli0_i) ); defparam \ASYNC_RESET.l0li0_RNILL066 .INIT=2'h1; CFG1 \ASYNC_RESET.I0li0_RNII8AJ6 ( .A(lIli0), .Y(lIli0_i) ); defparam \ASYNC_RESET.I0li0_RNII8AJ6 .INIT=2'h1; // @28:424844 SLE \ASYNC_RESET.hstrst_tbi_tx_1 ( .Q(hstrst_tbi_tx_1), .ADn(GND), .ALn(l_i_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(GND), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:424786 SLE \ASYNC_RESET.hstrst_rx_1 ( .Q(hstrst_rx_1), .ADn(GND), .ALn(l_i_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(GND), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:424728 SLE \ASYNC_RESET.hstrst_tx_1 ( .Q(hstrst_tx_1), .ADn(GND), .ALn(l_i_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(GND), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:424670 SLE \ASYNC_RESET.hstrst_fr_1 ( .Q(hstrst_fr_1), .ADn(GND), .ALn(l_i_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(GND), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:424612 SLE \ASYNC_RESET.hstrst_ft_1 ( .Q(hstrst_ft_1), .ADn(GND), .ALn(l_i_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(GND), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:424554 SLE \ASYNC_RESET.illi0 ( .Q(illi0), .ADn(GND), .ALn(l_i_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(GND), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:424932 SLE \ASYNC_RESET.I1li0 ( .Q(llli0), .ADn(GND), .ALn(l_i_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(hstrst_tbi_rx_1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:424874 SLE \ASYNC_RESET.O1li0 ( .Q(Illi0), .ADn(GND), .ALn(l_i_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(hstrst_tbi_tx_1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:424816 SLE \ASYNC_RESET.i0li0 ( .Q(Olli0), .ADn(GND), .ALn(l_i_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(hstrst_rx_1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:424758 SLE \ASYNC_RESET.o0li0 ( .Q(iIli0), .ADn(GND), .ALn(l_i_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(hstrst_tx_1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:424700 SLE \ASYNC_RESET.l0li0 ( .Q(oIli0), .ADn(GND), .ALn(l_i_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(hstrst_fr_1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:424642 SLE \ASYNC_RESET.I0li0 ( .Q(lIli0), .ADn(GND), .ALn(l_i_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(hstrst_ft_1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:424584 SLE \ASYNC_RESET.O0li0 ( .Q(hstrst), .ADn(GND), .ALn(l_i_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(illi0), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:424902 SLE \ASYNC_RESET.hstrst_tbi_rx_1 ( .Q(hstrst_tbi_rx_1), .ADn(GND), .ALn(l_i_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(GND), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_CLKRST_26s_1s */ module CTSE_SIB_SYNC_2FLP_1s_26s_1s_0 ( PF_IOD_CDR_CCC_C0_0_TX_CLK_G, iIli0_i, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i, oO0i0 ) ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; input iIli0_i ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; output oO0i0 ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire iIli0_i ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire oO0i0 ; wire [0:0] ii1Io; wire [0:0] IOoIo; wire VCC ; wire GND ; // @28:545090 (* cdc_synchronizer=1 *) SLE \IIoIo.OOoIo[0] ( .Q(oO0i0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ii1Io[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545090 (* cdc_synchronizer=1 *) SLE \IIoIo.ii1Io[0] ( .Q(ii1Io[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOoIo[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545058 (* cdc_synchronizer=1 *) SLE \IIoIo.IOoIo[0] ( .Q(IOoIo[0]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(GND), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_SIB_SYNC_2FLP_1s_26s_1s_0 */ module CTSE_SIB_SYNC_2FLP_1s_26s_1s_1 ( PF_IOD_CDR_CCC_C0_0_TX_CLK_G, iIli0_i, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i, iO0i0 ) ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; input iIli0_i ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; output iO0i0 ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire iIli0_i ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire iO0i0 ; wire [0:0] ii1Io; wire [0:0] IOoIo; wire VCC ; wire GND ; // @28:545090 (* cdc_synchronizer=1 *) SLE \IIoIo.OOoIo[0] ( .Q(iO0i0), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ii1Io[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545090 (* cdc_synchronizer=1 *) SLE \IIoIo.ii1Io[0] ( .Q(ii1Io[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOoIo[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545058 (* cdc_synchronizer=1 *) SLE \IIoIo.IOoIo[0] ( .Q(IOoIo[0]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(GND), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_SIB_SYNC_2FLP_1s_26s_1s_1 */ module CTSE_SIB_SYNC_2FLP_1s_26s_1s_2 ( lloIo, PF_IOD_CDR_CCC_C0_0_TX_CLK_G, iIli0_i, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i, iloIo ) ; input lloIo ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; input iIli0_i ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; output iloIo ; wire lloIo ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire iIli0_i ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire iloIo ; wire [0:0] ii1Io; wire [0:0] IOoIo; wire VCC ; wire GND ; // @28:545090 (* cdc_synchronizer=1 *) SLE \IIoIo.OOoIo[0] ( .Q(iloIo), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ii1Io[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545090 (* cdc_synchronizer=1 *) SLE \IIoIo.ii1Io[0] ( .Q(ii1Io[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOoIo[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545058 (* cdc_synchronizer=1 *) SLE \IIoIo.IOoIo[0] ( .Q(IOoIo[0]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lloIo), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_SIB_SYNC_2FLP_1s_26s_1s_2 */ module CTSE_SIB_SYNC_2FLP_1s_26s_1s_12_1 ( IloIo, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i, PF_IOD_CDR_CCC_C0_0_TX_CLK_G, iIli0_i, O0oIo ) ; input IloIo ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; input iIli0_i ; output O0oIo ; wire IloIo ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire iIli0_i ; wire O0oIo ; wire [0:0] ii1Io; wire [0:0] IOoIo; wire VCC ; wire GND ; // @28:545090 (* cdc_synchronizer=1 *) SLE \IIoIo.OOoIo[0] ( .Q(O0oIo), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ii1Io[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545090 (* cdc_synchronizer=1 *) SLE \IIoIo.ii1Io[0] ( .Q(ii1Io[0]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOoIo[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545058 (* cdc_synchronizer=1 *) SLE \IIoIo.IOoIo[0] ( .Q(IOoIo[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IloIo), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_SIB_SYNC_2FLP_1s_26s_1s_12_1 */ module CTSE_SIB_SYNC_PULSE_26s_1s_0s ( i1O01, IoO01, PF_IOD_CDR_CCC_C0_0_TX_CLK_G, iIli0_i, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input i1O01 ; output IoO01 ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; input iIli0_i ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire i1O01 ; wire IoO01 ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire iIli0_i ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire IloIo ; wire VCC ; wire OloIo_Z ; wire GND ; wire lloIo ; wire O0oIo ; wire iloIo ; wire N_1 ; // @28:545461 SLE \O1oIo.IloIo ( .Q(IloIo), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(OloIo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545507 SLE \O1oIo.lloIo ( .Q(lloIo), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(O0oIo), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545337 CFG2 O0lI1 ( .A(O0oIo), .B(lloIo), .Y(IoO01) ); defparam O0lI1.INIT=4'h6; // @28:545311 CFG3 OloIo ( .A(IloIo), .B(iloIo), .C(i1O01), .Y(OloIo_Z) ); defparam OloIo.INIT=8'h3A; // @28:545362 CTSE_SIB_SYNC_2FLP_1s_26s_1s_2 \O1oIo.CTSE_SIB_SYNC_2FLP_u0 ( .lloIo(lloIo), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .iIli0_i(iIli0_i), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i), .iloIo(iloIo) ); // @28:545422 CTSE_SIB_SYNC_2FLP_1s_26s_1s_12_1 \O1oIo.CTSE_SIB_SYNC_2FLP_u1 ( .IloIo(IloIo), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .iIli0_i(iIli0_i), .O0oIo(O0oIo) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_SIB_SYNC_PULSE_26s_1s_0s */ module CTSE_SIB_SYNC_2FLP_1s_26s_1s_13_2 ( lloIo, oIli0_i, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i, iloIo ) ; input lloIo ; input oIli0_i ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; output iloIo ; wire lloIo ; wire oIli0_i ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire iloIo ; wire [0:0] ii1Io; wire [0:0] IOoIo; wire VCC ; wire GND ; // @28:545090 SLE \IIoIo.OOoIo[0] ( .Q(iloIo), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ii1Io[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545090 SLE \IIoIo.ii1Io[0] ( .Q(ii1Io[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOoIo[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545058 SLE \IIoIo.IOoIo[0] ( .Q(IOoIo[0]), .ADn(VCC), .ALn(oIli0_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lloIo), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_SIB_SYNC_2FLP_1s_26s_1s_13_2 */ module CTSE_SIB_SYNC_2FLP_1s_26s_1s_13_3 ( IloIo, hstrst_i, PF_CCC_0_0_OUT0_FABCLK_0, oIli0_i, O0oIo ) ; input IloIo ; input hstrst_i ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input oIli0_i ; output O0oIo ; wire IloIo ; wire hstrst_i ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire oIli0_i ; wire O0oIo ; wire [0:0] ii1Io; wire [0:0] IOoIo; wire VCC ; wire GND ; // @28:545090 SLE \IIoIo.OOoIo[0] ( .Q(O0oIo), .ADn(VCC), .ALn(oIli0_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ii1Io[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545090 SLE \IIoIo.ii1Io[0] ( .Q(ii1Io[0]), .ADn(VCC), .ALn(oIli0_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOoIo[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545058 SLE \IIoIo.IOoIo[0] ( .Q(IOoIo[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IloIo), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_SIB_SYNC_2FLP_1s_26s_1s_13_3 */ module CTSE_SIB_SYNC_PULSE_26s_1s_0s_17 ( OoO01, loO01, oIli0_i, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i ) ; input OoO01 ; output loO01 ; input oIli0_i ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; wire OoO01 ; wire loO01 ; wire oIli0_i ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire IloIo ; wire VCC ; wire OloIo_Z ; wire GND ; wire lloIo ; wire O0oIo ; wire iloIo ; wire N_1 ; // @28:545461 SLE \O1oIo.IloIo ( .Q(IloIo), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(OloIo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545507 SLE \O1oIo.lloIo ( .Q(lloIo), .ADn(VCC), .ALn(oIli0_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O0oIo), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545337 CFG2 O0lI1 ( .A(O0oIo), .B(lloIo), .Y(loO01) ); defparam O0lI1.INIT=4'h6; // @28:545311 CFG3 OloIo ( .A(IloIo), .B(iloIo), .C(OoO01), .Y(OloIo_Z) ); defparam OloIo.INIT=8'h3A; // @28:545362 CTSE_SIB_SYNC_2FLP_1s_26s_1s_13_2 \O1oIo.CTSE_SIB_SYNC_2FLP_u0 ( .lloIo(lloIo), .oIli0_i(oIli0_i), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i), .iloIo(iloIo) ); // @28:545422 CTSE_SIB_SYNC_2FLP_1s_26s_1s_13_3 \O1oIo.CTSE_SIB_SYNC_2FLP_u1 ( .IloIo(IloIo), .hstrst_i(hstrst_i), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .oIli0_i(oIli0_i), .O0oIo(O0oIo) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_SIB_SYNC_PULSE_26s_1s_0s_17 */ module CTSE_SIB_SYNC_2FLP_1s_26s_1s_12_2 ( lloIo, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i, PF_IOD_CDR_CCC_C0_0_TX_CLK_G, iIli0_i, iloIo ) ; input lloIo ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; input iIli0_i ; output iloIo ; wire lloIo ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire iIli0_i ; wire iloIo ; wire [0:0] ii1Io; wire [0:0] IOoIo; wire VCC ; wire GND ; // @28:545090 (* cdc_synchronizer=1 *) SLE \IIoIo.OOoIo[0] ( .Q(iloIo), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(ii1Io[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545090 (* cdc_synchronizer=1 *) SLE \IIoIo.ii1Io[0] ( .Q(ii1Io[0]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IOoIo[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545058 (* cdc_synchronizer=1 *) SLE \IIoIo.IOoIo[0] ( .Q(IOoIo[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lloIo), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_SIB_SYNC_2FLP_1s_26s_1s_12_2 */ module CTSE_SIB_SYNC_2FLP_1s_26s_1s_3 ( IloIo, PF_IOD_CDR_CCC_C0_0_TX_CLK_G, iIli0_i, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i, O0oIo ) ; input IloIo ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; input iIli0_i ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; output O0oIo ; wire IloIo ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire iIli0_i ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire O0oIo ; wire [0:0] ii1Io; wire [0:0] IOoIo; wire VCC ; wire GND ; // @28:545090 (* cdc_synchronizer=1 *) SLE \IIoIo.OOoIo[0] ( .Q(O0oIo), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ii1Io[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545090 (* cdc_synchronizer=1 *) SLE \IIoIo.ii1Io[0] ( .Q(ii1Io[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOoIo[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545058 (* cdc_synchronizer=1 *) SLE \IIoIo.IOoIo[0] ( .Q(IOoIo[0]), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IloIo), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_SIB_SYNC_2FLP_1s_26s_1s_3 */ module CTSE_SIB_SYNC_PULSE_26s_1s_0s_16_0 ( ooO01, ooli0, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i, PF_IOD_CDR_CCC_C0_0_TX_CLK_G, iIli0_i ) ; input ooO01 ; output ooli0 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; input iIli0_i ; wire ooO01 ; wire ooli0 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire iIli0_i ; wire IloIo ; wire VCC ; wire OloIo_Z ; wire GND ; wire lloIo ; wire O0oIo ; wire iloIo ; wire N_1 ; // @28:545461 SLE \O1oIo.IloIo ( .Q(IloIo), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(OloIo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545507 SLE \O1oIo.lloIo ( .Q(lloIo), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O0oIo), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545337 CFG2 O0lI1 ( .A(O0oIo), .B(lloIo), .Y(ooli0) ); defparam O0lI1.INIT=4'h6; // @28:545311 CFG3 OloIo ( .A(IloIo), .B(iloIo), .C(ooO01), .Y(OloIo_Z) ); defparam OloIo.INIT=8'h3A; // @28:545362 CTSE_SIB_SYNC_2FLP_1s_26s_1s_12_2 \O1oIo.CTSE_SIB_SYNC_2FLP_u0 ( .lloIo(lloIo), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .iIli0_i(iIli0_i), .iloIo(iloIo) ); // @28:545422 CTSE_SIB_SYNC_2FLP_1s_26s_1s_3 \O1oIo.CTSE_SIB_SYNC_2FLP_u1 ( .IloIo(IloIo), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .iIli0_i(iIli0_i), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i), .O0oIo(O0oIo) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_SIB_SYNC_PULSE_26s_1s_0s_16_0 */ module CTSE_SIB_SYNC_2FLP_1s_26s_1s_13_4 ( lloIo, hstrst_i, PF_CCC_0_0_OUT0_FABCLK_0, oIli0_i, iloIo ) ; input lloIo ; input hstrst_i ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input oIli0_i ; output iloIo ; wire lloIo ; wire hstrst_i ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire oIli0_i ; wire iloIo ; wire [0:0] ii1Io; wire [0:0] IOoIo; wire VCC ; wire GND ; // @28:545090 SLE \IIoIo.OOoIo[0] ( .Q(iloIo), .ADn(VCC), .ALn(oIli0_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ii1Io[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545090 SLE \IIoIo.ii1Io[0] ( .Q(ii1Io[0]), .ADn(VCC), .ALn(oIli0_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOoIo[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545058 SLE \IIoIo.IOoIo[0] ( .Q(IOoIo[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lloIo), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_SIB_SYNC_2FLP_1s_26s_1s_13_4 */ module CTSE_SIB_SYNC_2FLP_1s_26s_1s_13_5 ( IloIo, oIli0_i, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i, O0oIo ) ; input IloIo ; input oIli0_i ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; output O0oIo ; wire IloIo ; wire oIli0_i ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire O0oIo ; wire [0:0] ii1Io; wire [0:0] IOoIo; wire VCC ; wire GND ; // @28:545090 SLE \IIoIo.OOoIo[0] ( .Q(O0oIo), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ii1Io[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545090 SLE \IIoIo.ii1Io[0] ( .Q(ii1Io[0]), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IOoIo[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545058 SLE \IIoIo.IOoIo[0] ( .Q(IOoIo[0]), .ADn(VCC), .ALn(oIli0_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(IloIo), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_SIB_SYNC_2FLP_1s_26s_1s_13_5 */ module CTSE_SIB_SYNC_PULSE_26s_1s_0s_17_0 ( ioO01, ioli0, hstrst_i, PF_CCC_0_0_OUT0_FABCLK_0, oIli0_i ) ; input ioO01 ; output ioli0 ; input hstrst_i ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input oIli0_i ; wire ioO01 ; wire ioli0 ; wire hstrst_i ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire oIli0_i ; wire IloIo ; wire VCC ; wire OloIo_Z ; wire GND ; wire lloIo ; wire O0oIo ; wire iloIo ; wire N_1 ; // @28:545461 SLE \O1oIo.IloIo ( .Q(IloIo), .ADn(VCC), .ALn(oIli0_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(OloIo_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545507 SLE \O1oIo.lloIo ( .Q(lloIo), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(O0oIo), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:545337 CFG2 O0lI1 ( .A(O0oIo), .B(lloIo), .Y(ioli0) ); defparam O0lI1.INIT=4'h6; // @28:545311 CFG3 OloIo ( .A(IloIo), .B(iloIo), .C(ioO01), .Y(OloIo_Z) ); defparam OloIo.INIT=8'h3A; // @28:545362 CTSE_SIB_SYNC_2FLP_1s_26s_1s_13_4 \O1oIo.CTSE_SIB_SYNC_2FLP_u0 ( .lloIo(lloIo), .hstrst_i(hstrst_i), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .oIli0_i(oIli0_i), .iloIo(iloIo) ); // @28:545422 CTSE_SIB_SYNC_2FLP_1s_26s_1s_13_5 \O1oIo.CTSE_SIB_SYNC_2FLP_u1 ( .IloIo(IloIo), .oIli0_i(oIli0_i), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i), .O0oIo(O0oIo) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_SIB_SYNC_PULSE_26s_1s_0s_17_0 */ module CTSE_ECC_0s_26s_16s ( CoreAPB3_0_0_APBmslave0_PADDR_1, CoreAPB3_0_0_APBmslave0_PADDR_3, CoreAPB3_0_0_APBmslave0_PADDR_0, CoreAPB3_0_0_APBmslave0_PADDR_6, CoreAPB3_0_0_APBmslave0_PADDR_5, PADDR_0, paddr_1z_0, iO0i0, oO0i0, un1_PADDR_2, CoreAPB3_0_0_APBmslave0_PENABLE, CoreAPB3_0_0_APBmslave0_PWRITE, CoreAPB3_0_0_APBmslave0_PSELx, tx_fifo_write_sig_0_sqmuxa_i_1, un1_IIOO1_1_2_1z, liO0110_i_1, un1_IIOO1_3_1_1z, un1_IIOO1_2_1_1z, liO019_i_1, N_1206, PF_IOD_CDR_CCC_C0_0_TX_CLK_G, iIli0_i, oIli0_i, IiO01_1z, PF_CCC_0_0_OUT0_FABCLK_0, hstrst_i, OiO01_1z ) ; input CoreAPB3_0_0_APBmslave0_PADDR_1 ; input CoreAPB3_0_0_APBmslave0_PADDR_3 ; input CoreAPB3_0_0_APBmslave0_PADDR_0 ; input CoreAPB3_0_0_APBmslave0_PADDR_6 ; input CoreAPB3_0_0_APBmslave0_PADDR_5 ; input PADDR_0 ; input paddr_1z_0 ; output iO0i0 ; output oO0i0 ; input un1_PADDR_2 ; input CoreAPB3_0_0_APBmslave0_PENABLE ; input CoreAPB3_0_0_APBmslave0_PWRITE ; input CoreAPB3_0_0_APBmslave0_PSELx ; input tx_fifo_write_sig_0_sqmuxa_i_1 ; output un1_IIOO1_1_2_1z ; output liO0110_i_1 ; output un1_IIOO1_3_1_1z ; output un1_IIOO1_2_1_1z ; output liO019_i_1 ; output N_1206 ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; input iIli0_i ; input oIli0_i ; output IiO01_1z ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input hstrst_i ; output OiO01_1z ; wire CoreAPB3_0_0_APBmslave0_PADDR_1 ; wire CoreAPB3_0_0_APBmslave0_PADDR_3 ; wire CoreAPB3_0_0_APBmslave0_PADDR_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_6 ; wire CoreAPB3_0_0_APBmslave0_PADDR_5 ; wire PADDR_0 ; wire paddr_1z_0 ; wire iO0i0 ; wire oO0i0 ; wire un1_PADDR_2 ; wire CoreAPB3_0_0_APBmslave0_PENABLE ; wire CoreAPB3_0_0_APBmslave0_PWRITE ; wire CoreAPB3_0_0_APBmslave0_PSELx ; wire tx_fifo_write_sig_0_sqmuxa_i_1 ; wire un1_IIOO1_1_2_1z ; wire liO0110_i_1 ; wire un1_IIOO1_3_1_1z ; wire un1_IIOO1_2_1_1z ; wire liO019_i_1 ; wire N_1206 ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire iIli0_i ; wire oIli0_i ; wire IiO01_1z ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hstrst_i ; wire OiO01_1z ; wire VCC ; wire ooli0 ; wire GND ; wire ioli0 ; wire ioO01_Z ; wire loO01 ; wire ooO01_Z ; wire IoO01 ; wire OoO01_Z ; wire i1O0115_Z ; wire OoO01_0_sqmuxa_i_Z ; wire i1O01_Z ; wire i1O01_1_sqmuxa_i_Z ; wire un1_IIOO1_3_1_0_Z ; wire un1_IIOO1_1_0_Z ; wire N_5328_tz ; wire N_5323_tz ; wire N_7431 ; wire N_7430 ; wire N_7429 ; wire N_7428 ; wire N_728 ; wire N_727 ; wire N_62 ; wire N_61 ; wire N_60 ; wire N_59 ; wire N_9 ; wire N_8 ; wire N_7 ; wire N_6 ; wire N_5 ; // @28:455674 SLE OiO01 ( .Q(OiO01_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ooli0), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:455674 SLE IiO01 ( .Q(IiO01_1z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ioli0), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:457326 SLE ioO01 ( .Q(ioO01_Z), .ADn(VCC), .ALn(oIli0_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(loO01), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:457300 SLE ooO01 ( .Q(ooO01_Z), .ADn(VCC), .ALn(iIli0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(IoO01), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:455950 SLE OoO01 ( .Q(OoO01_Z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(i1O0115_Z), .EN(OoO01_0_sqmuxa_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:455950 SLE i1O01 ( .Q(i1O01_Z), .ADn(VCC), .ALn(hstrst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(i1O0115_Z), .EN(i1O01_1_sqmuxa_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:457809 CFG2 liO019_4 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_1), .B(paddr_1z_0), .Y(N_1206) ); defparam liO019_4.INIT=4'h1; // @28:457809 CFG2 liO019_1 ( .A(PADDR_0), .B(CoreAPB3_0_0_APBmslave0_PADDR_3), .Y(liO019_i_1) ); defparam liO019_1.INIT=4'h8; // @28:457943 CFG2 un1_IIOO1_2_1 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_0), .B(paddr_1z_0), .Y(un1_IIOO1_2_1_1z) ); defparam un1_IIOO1_2_1.INIT=4'h8; // @28:457975 CFG2 un1_IIOO1_3_1 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_1), .B(paddr_1z_0), .Y(un1_IIOO1_3_1_1z) ); defparam un1_IIOO1_3_1.INIT=4'h8; // @28:457809 CFG2 liO0110_1 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_0), .B(PADDR_0), .Y(liO0110_i_1) ); defparam liO0110_1.INIT=4'h8; // @28:457911 CFG2 un1_IIOO1_1_2 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_1), .B(CoreAPB3_0_0_APBmslave0_PADDR_0), .Y(un1_IIOO1_1_2_1z) ); defparam un1_IIOO1_1_2.INIT=4'h1; // @28:457975 CFG3 un1_IIOO1_3_1_0 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_6), .B(CoreAPB3_0_0_APBmslave0_PADDR_0), .C(un1_IIOO1_3_1_1z), .Y(un1_IIOO1_3_1_0_Z) ); defparam un1_IIOO1_3_1_0.INIT=8'h20; // @28:457911 CFG3 un1_IIOO1_1_0 ( .A(un1_IIOO1_1_2_1z), .B(CoreAPB3_0_0_APBmslave0_PADDR_6), .C(paddr_1z_0), .Y(un1_IIOO1_1_0_Z) ); defparam un1_IIOO1_1_0.INIT=8'h80; CFG4 i1O01_1_sqmuxa_i_RNO ( .A(CoreAPB3_0_0_APBmslave0_PADDR_6), .B(CoreAPB3_0_0_APBmslave0_PADDR_1), .C(un1_IIOO1_2_1_1z), .D(un1_IIOO1_1_0_Z), .Y(N_5328_tz) ); defparam i1O01_1_sqmuxa_i_RNO.INIT=16'h00DF; CFG4 OoO01_0_sqmuxa_i_RNO ( .A(paddr_1z_0), .B(CoreAPB3_0_0_APBmslave0_PADDR_6), .C(un1_IIOO1_3_1_0_Z), .D(tx_fifo_write_sig_0_sqmuxa_i_1), .Y(N_5323_tz) ); defparam OoO01_0_sqmuxa_i_RNO.INIT=16'h070F; // @28:455979 CFG3 i1O0115 ( .A(CoreAPB3_0_0_APBmslave0_PSELx), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .C(CoreAPB3_0_0_APBmslave0_PENABLE), .Y(i1O0115_Z) ); defparam i1O0115.INIT=8'h02; // @28:455950 CFG4 OoO01_0_sqmuxa_i ( .A(CoreAPB3_0_0_APBmslave0_PADDR_5), .B(un1_PADDR_2), .C(N_5323_tz), .D(i1O0115_Z), .Y(OoO01_0_sqmuxa_i_Z) ); defparam OoO01_0_sqmuxa_i.INIT=16'h04FF; // @28:455950 CFG4 i1O01_1_sqmuxa_i ( .A(CoreAPB3_0_0_APBmslave0_PADDR_5), .B(un1_PADDR_2), .C(N_5328_tz), .D(i1O0115_Z), .Y(i1O01_1_sqmuxa_i_Z) ); defparam i1O01_1_sqmuxa_i.INIT=16'h04FF; // @28:457095 CTSE_SIB_SYNC_2FLP_1s_26s_1s_0 tsbecc_carry_sync_1 ( .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .iIli0_i(iIli0_i), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i), .oO0i0(oO0i0) ); // @28:457150 CTSE_SIB_SYNC_2FLP_1s_26s_1s_1 tdbedc_carry_sync_1 ( .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .iIli0_i(iIli0_i), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i), .iO0i0(iO0i0) ); // @28:457361 CTSE_SIB_SYNC_PULSE_26s_1s_0s tx_ecc_cnt_rd_sync_pulse_U0 ( .i1O01(i1O01_Z), .IoO01(IoO01), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .iIli0_i(iIli0_i), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:457415 CTSE_SIB_SYNC_PULSE_26s_1s_0s_17 rx_ecc_cnt_rd_sync_pulse_U0 ( .OoO01(OoO01_Z), .loO01(loO01), .oIli0_i(oIli0_i), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i) ); // @28:457469 CTSE_SIB_SYNC_PULSE_26s_1s_0s_16_0 pclk_tx_sb_cnt_sync_pulse_U0 ( .ooO01(ooO01_Z), .ooli0(ooli0), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .iIli0_i(iIli0_i) ); // @28:457523 CTSE_SIB_SYNC_PULSE_26s_1s_0s_17_0 pclk_rx_sb_cnt_sync_pulse_U0 ( .ioO01(ioO01_Z), .ioli0(ioli0), .hstrst_i(hstrst_i), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .oIli0_i(oIli0_i) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_ECC_0s_26s_16s */ module CTSE_CORETSE_TOP_Z10 ( wrdata_0, CoreAPB3_0_0_APBmslave0_PWDATA, CoreAPB3_0_0_APBmslave0_PADDR_5, CoreAPB3_0_0_APBmslave0_PADDR_3, CoreAPB3_0_0_APBmslave0_PADDR_7, CoreAPB3_0_0_APBmslave0_PADDR_6, CoreAPB3_0_0_APBmslave0_PADDR_0, CoreAPB3_0_0_APBmslave0_PADDR_1, io0O1_m, io0O1, paddr_0, PADDR_1z_0, rx_fifo_data_out, CoreAPB3_0_0_APBmslave2_PRDATA_m, O0Il1_0, CORETSE_0_MRXDAT, PF_IOD_CDR_C0_0_RX_DATA, CORETSE_0_TCG, l_i_i, LINK_OK_c, BIBUF_0_Y, RD_BC_ERROR_c, N_1214, tx_fifo_write_sig14_i_2, Oi0O1, iPRDATA_0_sqmuxa, CoreAPB3_0_0_APBmslave0_PWRITE_s0, un1_Ii0O1, CoreAPB3_0_0_APBmslave0_PSELx, CoreAPB3_0_0_APBmslave0_PENABLE, CoreAPB3_0_0_APBmslave0_PWRITE, PF_CCC_0_0_OUT0_FABCLK_0, tx_fifo_write_sig_0_sqmuxa_i_1, un1_PADDR, iPRDATA28, tx_fifo_write_sig14_i_1, rx_fifo_read_1, N_1206, un1_PADDR_2, un1_PADDR_3, PHY_MDC_c, CORETSE_0_MDOEN, CORETSE_0_MDO, rx_fifo_read_0, PF_IOD_CDR_C0_0_RX_CLK_R, PF_IOD_CDR_CCC_C0_0_TX_CLK_G ) ; input wrdata_0 ; input [31:1] CoreAPB3_0_0_APBmslave0_PWDATA ; input CoreAPB3_0_0_APBmslave0_PADDR_5 ; input CoreAPB3_0_0_APBmslave0_PADDR_3 ; input CoreAPB3_0_0_APBmslave0_PADDR_7 ; input CoreAPB3_0_0_APBmslave0_PADDR_6 ; input CoreAPB3_0_0_APBmslave0_PADDR_0 ; input CoreAPB3_0_0_APBmslave0_PADDR_1 ; output [15:0] io0O1_m ; output [31:16] io0O1 ; input paddr_0 ; input PADDR_1z_0 ; input [15:8] rx_fifo_data_out ; output [15:8] CoreAPB3_0_0_APBmslave2_PRDATA_m ; output O0Il1_0 ; output [31:0] CORETSE_0_MRXDAT ; input [9:0] PF_IOD_CDR_C0_0_RX_DATA ; output [9:0] CORETSE_0_TCG ; input l_i_i ; output LINK_OK_c ; input BIBUF_0_Y ; output RD_BC_ERROR_c ; output N_1214 ; input tx_fifo_write_sig14_i_2 ; output Oi0O1 ; input iPRDATA_0_sqmuxa ; output CoreAPB3_0_0_APBmslave0_PWRITE_s0 ; output un1_Ii0O1 ; input CoreAPB3_0_0_APBmslave0_PSELx ; input CoreAPB3_0_0_APBmslave0_PENABLE ; input CoreAPB3_0_0_APBmslave0_PWRITE ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input tx_fifo_write_sig_0_sqmuxa_i_1 ; input un1_PADDR ; input iPRDATA28 ; input tx_fifo_write_sig14_i_1 ; input rx_fifo_read_1 ; output N_1206 ; input un1_PADDR_2 ; input un1_PADDR_3 ; output PHY_MDC_c ; output CORETSE_0_MDOEN ; output CORETSE_0_MDO ; input rx_fifo_read_0 ; input PF_IOD_CDR_C0_0_RX_CLK_R ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire wrdata_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_5 ; wire CoreAPB3_0_0_APBmslave0_PADDR_3 ; wire CoreAPB3_0_0_APBmslave0_PADDR_7 ; wire CoreAPB3_0_0_APBmslave0_PADDR_6 ; wire CoreAPB3_0_0_APBmslave0_PADDR_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_1 ; wire paddr_0 ; wire PADDR_1z_0 ; wire O0Il1_0 ; wire l_i_i ; wire LINK_OK_c ; wire BIBUF_0_Y ; wire RD_BC_ERROR_c ; wire N_1214 ; wire tx_fifo_write_sig14_i_2 ; wire Oi0O1 ; wire iPRDATA_0_sqmuxa ; wire CoreAPB3_0_0_APBmslave0_PWRITE_s0 ; wire un1_Ii0O1 ; wire CoreAPB3_0_0_APBmslave0_PSELx ; wire CoreAPB3_0_0_APBmslave0_PENABLE ; wire CoreAPB3_0_0_APBmslave0_PWRITE ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire tx_fifo_write_sig_0_sqmuxa_i_1 ; wire un1_PADDR ; wire iPRDATA28 ; wire tx_fifo_write_sig14_i_1 ; wire rx_fifo_read_1 ; wire N_1206 ; wire un1_PADDR_2 ; wire un1_PADDR_3 ; wire PHY_MDC_c ; wire CORETSE_0_MDOEN ; wire CORETSE_0_MDO ; wire rx_fifo_read_0 ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire [9:0] iO1i0; wire [9:0] OI1i0; wire [7:0] ii0i0; wire [7:0] Oi0i0; wire [39:0] o00i0; wire [10:0] l00i0; wire [39:0] I10i0; wire [10:0] O10i0; wire [11:0] oo0i0; wire [34:0] io0i0; wire [0:0] un2_O1Il1; wire [35:0] Io0i0; wire [11:0] Oo0i0; wire [1:0] ooIO1; wire [35:35] o01I1; wire VCC ; wire Illi0_i ; wire GND ; wire llli0_i ; wire OOOO1 ; wire iI1i0 ; wire oi0i0 ; wire IO1i0 ; wire lO1i0 ; wire Ii0i0 ; wire iIl0112 ; wire OO1i0 ; wire li0i0 ; wire O00i0_i ; wire o0Il1 ; wire o0oI1_i ; wire o10i0_i ; wire lIli0_i ; wire oIli0_i ; wire iIli0_i ; wire Olli0_i ; wire hstrst_i ; wire IiO01 ; wire OiO01 ; wire liO019_i_1 ; wire un1_IIOO1_1_2 ; wire liO0110_i_1 ; wire un1_IIOO1_3_1 ; wire un1_IIOO1_2_1 ; wire iO0i0 ; wire oO0i0 ; // @28:427327 SLE \SGMII_INSTANCE.TCG[1] ( .Q(CORETSE_0_TCG[1]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iO1i0[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:427327 SLE \SGMII_INSTANCE.TCG[0] ( .Q(CORETSE_0_TCG[0]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iO1i0[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:427353 SLE \SGMII_INSTANCE.OI1i0[6] ( .Q(OI1i0[6]), .ADn(VCC), .ALn(llli0_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(PF_IOD_CDR_C0_0_RX_DATA[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:427353 SLE \SGMII_INSTANCE.OI1i0[5] ( .Q(OI1i0[5]), .ADn(VCC), .ALn(llli0_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(PF_IOD_CDR_C0_0_RX_DATA[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:427353 SLE \SGMII_INSTANCE.OI1i0[4] ( .Q(OI1i0[4]), .ADn(VCC), .ALn(llli0_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(PF_IOD_CDR_C0_0_RX_DATA[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:427353 SLE \SGMII_INSTANCE.OI1i0[3] ( .Q(OI1i0[3]), .ADn(VCC), .ALn(llli0_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(PF_IOD_CDR_C0_0_RX_DATA[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:427353 SLE \SGMII_INSTANCE.OI1i0[2] ( .Q(OI1i0[2]), .ADn(VCC), .ALn(llli0_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(PF_IOD_CDR_C0_0_RX_DATA[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:427353 SLE \SGMII_INSTANCE.OI1i0[1] ( .Q(OI1i0[1]), .ADn(VCC), .ALn(llli0_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(PF_IOD_CDR_C0_0_RX_DATA[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:427353 SLE \SGMII_INSTANCE.OI1i0[0] ( .Q(OI1i0[0]), .ADn(VCC), .ALn(llli0_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(PF_IOD_CDR_C0_0_RX_DATA[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:427327 SLE \SGMII_INSTANCE.TCG[9] ( .Q(CORETSE_0_TCG[9]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iO1i0[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:427327 SLE \SGMII_INSTANCE.TCG[8] ( .Q(CORETSE_0_TCG[8]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iO1i0[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:427327 SLE \SGMII_INSTANCE.TCG[7] ( .Q(CORETSE_0_TCG[7]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iO1i0[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:427327 SLE \SGMII_INSTANCE.TCG[6] ( .Q(CORETSE_0_TCG[6]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iO1i0[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:427327 SLE \SGMII_INSTANCE.TCG[5] ( .Q(CORETSE_0_TCG[5]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iO1i0[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:427327 SLE \SGMII_INSTANCE.TCG[4] ( .Q(CORETSE_0_TCG[4]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iO1i0[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:427327 SLE \SGMII_INSTANCE.TCG[3] ( .Q(CORETSE_0_TCG[3]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iO1i0[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:427327 SLE \SGMII_INSTANCE.TCG[2] ( .Q(CORETSE_0_TCG[2]), .ADn(VCC), .ALn(Illi0_i), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(iO1i0[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:427353 SLE \SGMII_INSTANCE.OI1i0[9] ( .Q(OI1i0[9]), .ADn(VCC), .ALn(llli0_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(PF_IOD_CDR_C0_0_RX_DATA[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:427353 SLE \SGMII_INSTANCE.OI1i0[8] ( .Q(OI1i0[8]), .ADn(VCC), .ALn(llli0_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(PF_IOD_CDR_C0_0_RX_DATA[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:427353 SLE \SGMII_INSTANCE.OI1i0[7] ( .Q(OI1i0[7]), .ADn(VCC), .ALn(llli0_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(PF_IOD_CDR_C0_0_RX_DATA[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @28:426025 CTSE_TSMAC_TOP_Z9 tsmac_top_U0 ( .ii0i0_1z(ii0i0[7:0]), .Oi0i0_1z(Oi0i0[7:0]), .o00i0(o00i0[39:0]), .l00i0(l00i0[10:0]), .I10i0(I10i0[39:0]), .O10i0(O10i0[10:0]), .oo0i0(oo0i0[11:0]), .CORETSE_0_MRXDAT(CORETSE_0_MRXDAT[31:0]), .io0i0(io0i0[34:0]), .un2_O1Il1_0(un2_O1Il1[0]), .O0Il1_1z_0(O0Il1_0), .Io0i0_1z(Io0i0[35:0]), .Oo0i0_1z(Oo0i0[11:0]), .CoreAPB3_0_0_APBmslave2_PRDATA_m(CoreAPB3_0_0_APBmslave2_PRDATA_m[15:8]), .rx_fifo_data_out(rx_fifo_data_out[15:8]), .PADDR_0(PADDR_1z_0), .paddr_1z_0(paddr_0), .io0O1(io0O1[31:16]), .io0O1_m(io0O1_m[15:0]), .CoreAPB3_0_0_APBmslave0_PADDR_5(CoreAPB3_0_0_APBmslave0_PADDR_5), .CoreAPB3_0_0_APBmslave0_PADDR_3(CoreAPB3_0_0_APBmslave0_PADDR_3), .CoreAPB3_0_0_APBmslave0_PADDR_7(CoreAPB3_0_0_APBmslave0_PADDR_7), .CoreAPB3_0_0_APBmslave0_PADDR_6(CoreAPB3_0_0_APBmslave0_PADDR_6), .CoreAPB3_0_0_APBmslave0_PADDR_0(CoreAPB3_0_0_APBmslave0_PADDR_0), .CoreAPB3_0_0_APBmslave0_PADDR_1(CoreAPB3_0_0_APBmslave0_PADDR_1), .CoreAPB3_0_0_APBmslave0_PWDATA(CoreAPB3_0_0_APBmslave0_PWDATA[31:1]), .wrdata_0(wrdata_0), .ooIO1(ooIO1[1:0]), .o01I1_0(o01I1[35]), .rx_fifo_read_0(rx_fifo_read_0), .OOOO1(OOOO1), .CORETSE_0_MDO(CORETSE_0_MDO), .CORETSE_0_MDOEN(CORETSE_0_MDOEN), .PHY_MDC_c(PHY_MDC_c), .iI1i0(iI1i0), .oi0i0(oi0i0), .IO1i0(IO1i0), .lO1i0(lO1i0), .Ii0i0(Ii0i0), .iIl0112(iIl0112), .OO1i0(OO1i0), .li0i0(li0i0), .un1_PADDR_3(un1_PADDR_3), .un1_PADDR_2(un1_PADDR_2), .N_1206(N_1206), .rx_fifo_read_1(rx_fifo_read_1), .O00i0_i(O00i0_i), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .o0Il1(o0Il1), .o0oI1_i(o0oI1_i), .PF_IOD_CDR_C0_0_RX_CLK_R(PF_IOD_CDR_C0_0_RX_CLK_R), .o10i0_i(o10i0_i), .tx_fifo_write_sig14_i_1(tx_fifo_write_sig14_i_1), .iPRDATA28(iPRDATA28), .un1_PADDR(un1_PADDR), .tx_fifo_write_sig_0_sqmuxa_i_1(tx_fifo_write_sig_0_sqmuxa_i_1), .lIli0_i(lIli0_i), .oIli0_i(oIli0_i), .iIli0_i(iIli0_i), .Olli0_i(Olli0_i), .hstrst_i(hstrst_i), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .CoreAPB3_0_0_APBmslave0_PWRITE(CoreAPB3_0_0_APBmslave0_PWRITE), .IiO01(IiO01), .OiO01(OiO01), .CoreAPB3_0_0_APBmslave0_PENABLE(CoreAPB3_0_0_APBmslave0_PENABLE), .CoreAPB3_0_0_APBmslave0_PSELx(CoreAPB3_0_0_APBmslave0_PSELx), .un1_Ii0O1(un1_Ii0O1), .CoreAPB3_0_0_APBmslave0_PWRITE_s0(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .iPRDATA_0_sqmuxa(iPRDATA_0_sqmuxa), .Oi0O1(Oi0O1), .liO019_i_1(liO019_i_1), .un1_IIOO1_1_2(un1_IIOO1_1_2), .liO0110_i_1(liO0110_i_1), .tx_fifo_write_sig14_i_2(tx_fifo_write_sig14_i_2), .un1_IIOO1_3_1(un1_IIOO1_3_1), .un1_IIOO1_2_1(un1_IIOO1_2_1), .N_1214(N_1214), .iO0i0_2z(iO0i0), .oO0i0_2z(oO0i0) ); // @28:427107 CTSE_TX2048X40_11s_26s_1s_1s_4s \lOIO1.tx2048x40_1 ( .o00i0(o00i0[39:0]), .I10i0(I10i0[39:0]), .l00i0(l00i0[10:0]), .O10i0(O10i0[10:0]), .O00i0_i(O00i0_i), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G) ); // @28:427167 CTSE_RX4096X36_12s_26s_1s_1s_4s \lOIO1.rx4096x36_1 ( .Io0i0(Io0i0[35:0]), .un2_O1Il1_0(un2_O1Il1[0]), .o01I1_0(o01I1[35]), .io0i0_1z(io0i0[34:0]), .Oo0i0(Oo0i0[11:0]), .oo0i0_1z(oo0i0[11:0]), .o0oI1_i(o0oI1_i), .o0Il1(o0Il1), .o10i0_i(o10i0_i), .PF_IOD_CDR_C0_0_RX_CLK_R(PF_IOD_CDR_C0_0_RX_CLK_R), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0) ); // @28:427406 CTSE_MSGMII_CORE_26s_0s_18s_0s \SGMII_INSTANCE.msgmii_core_u0 ( .ii0i0(ii0i0[7:0]), .iO1i0_1z(iO1i0[9:0]), .OI1i0(OI1i0[9:0]), .ooIO1(ooIO1[1:0]), .Oi0i0_1z(Oi0i0[7:0]), .Olli0_i(Olli0_i), .OO1i0(OO1i0), .oi0i0(oi0i0), .lO1i0(lO1i0), .IO1i0(IO1i0), .RD_BC_ERROR_c(RD_BC_ERROR_c), .OOOO1(OOOO1), .BIBUF_0_Y(BIBUF_0_Y), .CORETSE_0_MDOEN(CORETSE_0_MDOEN), .CORETSE_0_MDO(CORETSE_0_MDO), .iI1i0(iI1i0), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i), .llli0_i(llli0_i), .Illi0_i(Illi0_i), .iIli0_i(iIli0_i), .li0i0(li0i0), .Ii0i0_1z(Ii0i0), .iIl0112(iIl0112), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .LINK_OK_c(LINK_OK_c), .PF_IOD_CDR_C0_0_RX_CLK_R(PF_IOD_CDR_C0_0_RX_CLK_R) ); // @28:427746 CTSE_CLKRST_26s_1s CLKRST_U ( .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .PF_IOD_CDR_C0_0_RX_CLK_R(PF_IOD_CDR_C0_0_RX_CLK_R), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .l_i_i(l_i_i), .lIli0_i(lIli0_i), .oIli0_i(oIli0_i), .llli0_i(llli0_i), .Illi0_i(Illi0_i), .Olli0_i(Olli0_i), .iIli0_i(iIli0_i), .hstrst_i(hstrst_i) ); // @28:427867 CTSE_ECC_0s_26s_16s ecc_feature ( .CoreAPB3_0_0_APBmslave0_PADDR_1(CoreAPB3_0_0_APBmslave0_PADDR_1), .CoreAPB3_0_0_APBmslave0_PADDR_3(CoreAPB3_0_0_APBmslave0_PADDR_3), .CoreAPB3_0_0_APBmslave0_PADDR_0(CoreAPB3_0_0_APBmslave0_PADDR_0), .CoreAPB3_0_0_APBmslave0_PADDR_6(CoreAPB3_0_0_APBmslave0_PADDR_6), .CoreAPB3_0_0_APBmslave0_PADDR_5(CoreAPB3_0_0_APBmslave0_PADDR_5), .PADDR_0(PADDR_1z_0), .paddr_1z_0(paddr_0), .iO0i0(iO0i0), .oO0i0(oO0i0), .un1_PADDR_2(un1_PADDR_2), .CoreAPB3_0_0_APBmslave0_PENABLE(CoreAPB3_0_0_APBmslave0_PENABLE), .CoreAPB3_0_0_APBmslave0_PWRITE(CoreAPB3_0_0_APBmslave0_PWRITE), .CoreAPB3_0_0_APBmslave0_PSELx(CoreAPB3_0_0_APBmslave0_PSELx), .tx_fifo_write_sig_0_sqmuxa_i_1(tx_fifo_write_sig_0_sqmuxa_i_1), .un1_IIOO1_1_2_1z(un1_IIOO1_1_2), .liO0110_i_1(liO0110_i_1), .un1_IIOO1_3_1_1z(un1_IIOO1_3_1), .un1_IIOO1_2_1_1z(un1_IIOO1_2_1), .liO019_i_1(liO019_i_1), .N_1206(N_1206), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .iIli0_i(iIli0_i), .oIli0_i(oIli0_i), .IiO01_1z(IiO01), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hstrst_i(hstrst_i), .OiO01_1z(OiO01) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CTSE_CORETSE_TOP_Z10 */ module CORETSE_Z11 ( CORETSE_0_TCG, PF_IOD_CDR_C0_0_RX_DATA, CORETSE_0_MRXDAT, O0Il1_0, CoreAPB3_0_0_APBmslave2_PRDATA_m, rx_fifo_data_out, PADDR_0, paddr_1z_0, io0O1, io0O1_m, CoreAPB3_0_0_APBmslave0_PADDR_5, CoreAPB3_0_0_APBmslave0_PADDR_3, CoreAPB3_0_0_APBmslave0_PADDR_7, CoreAPB3_0_0_APBmslave0_PADDR_6, CoreAPB3_0_0_APBmslave0_PADDR_0, CoreAPB3_0_0_APBmslave0_PADDR_1, CoreAPB3_0_0_APBmslave0_PWDATA, wrdata_0, PF_IOD_CDR_C0_0_RX_CLK_R, rx_fifo_read_0, CORETSE_0_MDO, CORETSE_0_MDOEN, PHY_MDC_c, un1_PADDR_3, un1_PADDR_2, N_1206, rx_fifo_read_1, tx_fifo_write_sig14_i_1, iPRDATA28, un1_PADDR, tx_fifo_write_sig_0_sqmuxa_i_1, PF_CCC_0_0_OUT0_FABCLK_0, CoreAPB3_0_0_APBmslave0_PWRITE, CoreAPB3_0_0_APBmslave0_PENABLE, CoreAPB3_0_0_APBmslave0_PSELx, un1_Ii0O1, CoreAPB3_0_0_APBmslave0_PWRITE_s0, iPRDATA_0_sqmuxa, Oi0O1, tx_fifo_write_sig14_i_2, N_1214, RD_BC_ERROR_c, BIBUF_0_Y, LINK_OK_c, PF_IOD_CDR_CCC_C0_0_TX_CLK_G, AND2_2_Y ) ; output [9:0] CORETSE_0_TCG ; input [9:0] PF_IOD_CDR_C0_0_RX_DATA ; output [31:0] CORETSE_0_MRXDAT ; output O0Il1_0 ; output [15:8] CoreAPB3_0_0_APBmslave2_PRDATA_m ; input [15:8] rx_fifo_data_out ; input PADDR_0 ; input paddr_1z_0 ; output [31:16] io0O1 ; output [15:0] io0O1_m ; input CoreAPB3_0_0_APBmslave0_PADDR_5 ; input CoreAPB3_0_0_APBmslave0_PADDR_3 ; input CoreAPB3_0_0_APBmslave0_PADDR_7 ; input CoreAPB3_0_0_APBmslave0_PADDR_6 ; input CoreAPB3_0_0_APBmslave0_PADDR_0 ; input CoreAPB3_0_0_APBmslave0_PADDR_1 ; input [31:1] CoreAPB3_0_0_APBmslave0_PWDATA ; input wrdata_0 ; input PF_IOD_CDR_C0_0_RX_CLK_R ; input rx_fifo_read_0 ; output CORETSE_0_MDO ; output CORETSE_0_MDOEN ; output PHY_MDC_c ; input un1_PADDR_3 ; input un1_PADDR_2 ; output N_1206 ; input rx_fifo_read_1 ; input tx_fifo_write_sig14_i_1 ; input iPRDATA28 ; input un1_PADDR ; input tx_fifo_write_sig_0_sqmuxa_i_1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input CoreAPB3_0_0_APBmslave0_PWRITE ; input CoreAPB3_0_0_APBmslave0_PENABLE ; input CoreAPB3_0_0_APBmslave0_PSELx ; output un1_Ii0O1 ; output CoreAPB3_0_0_APBmslave0_PWRITE_s0 ; input iPRDATA_0_sqmuxa ; output Oi0O1 ; input tx_fifo_write_sig14_i_2 ; output N_1214 ; output RD_BC_ERROR_c ; input BIBUF_0_Y ; output LINK_OK_c ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; input AND2_2_Y ; wire O0Il1_0 ; wire PADDR_0 ; wire paddr_1z_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_5 ; wire CoreAPB3_0_0_APBmslave0_PADDR_3 ; wire CoreAPB3_0_0_APBmslave0_PADDR_7 ; wire CoreAPB3_0_0_APBmslave0_PADDR_6 ; wire CoreAPB3_0_0_APBmslave0_PADDR_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_1 ; wire wrdata_0 ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire rx_fifo_read_0 ; wire CORETSE_0_MDO ; wire CORETSE_0_MDOEN ; wire PHY_MDC_c ; wire un1_PADDR_3 ; wire un1_PADDR_2 ; wire N_1206 ; wire rx_fifo_read_1 ; wire tx_fifo_write_sig14_i_1 ; wire iPRDATA28 ; wire un1_PADDR ; wire tx_fifo_write_sig_0_sqmuxa_i_1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire CoreAPB3_0_0_APBmslave0_PWRITE ; wire CoreAPB3_0_0_APBmslave0_PENABLE ; wire CoreAPB3_0_0_APBmslave0_PSELx ; wire un1_Ii0O1 ; wire CoreAPB3_0_0_APBmslave0_PWRITE_s0 ; wire iPRDATA_0_sqmuxa ; wire Oi0O1 ; wire tx_fifo_write_sig14_i_2 ; wire N_1214 ; wire RD_BC_ERROR_c ; wire BIBUF_0_Y ; wire LINK_OK_c ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire AND2_2_Y ; wire l_i_i ; wire GND ; wire VCC ; // @28:372 CTSE_SELF_DESTRUCT_26s_1s_125000000s_25000000s_2500000s_4s_14400s_18446744072277895850_27s_14s_Z12 \i.OI ( .l_i_i(l_i_i), .AND2_2_Y(AND2_2_Y), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G) ); // @28:506 CTSE_CORETSE_TOP_Z10 CoreTSE_TOP_INST ( .wrdata_0(wrdata_0), .CoreAPB3_0_0_APBmslave0_PWDATA(CoreAPB3_0_0_APBmslave0_PWDATA[31:1]), .CoreAPB3_0_0_APBmslave0_PADDR_5(CoreAPB3_0_0_APBmslave0_PADDR_5), .CoreAPB3_0_0_APBmslave0_PADDR_3(CoreAPB3_0_0_APBmslave0_PADDR_3), .CoreAPB3_0_0_APBmslave0_PADDR_7(CoreAPB3_0_0_APBmslave0_PADDR_7), .CoreAPB3_0_0_APBmslave0_PADDR_6(CoreAPB3_0_0_APBmslave0_PADDR_6), .CoreAPB3_0_0_APBmslave0_PADDR_0(CoreAPB3_0_0_APBmslave0_PADDR_0), .CoreAPB3_0_0_APBmslave0_PADDR_1(CoreAPB3_0_0_APBmslave0_PADDR_1), .io0O1_m(io0O1_m[15:0]), .io0O1(io0O1[31:16]), .paddr_0(paddr_1z_0), .PADDR_1z_0(PADDR_0), .rx_fifo_data_out(rx_fifo_data_out[15:8]), .CoreAPB3_0_0_APBmslave2_PRDATA_m(CoreAPB3_0_0_APBmslave2_PRDATA_m[15:8]), .O0Il1_0(O0Il1_0), .CORETSE_0_MRXDAT(CORETSE_0_MRXDAT[31:0]), .PF_IOD_CDR_C0_0_RX_DATA(PF_IOD_CDR_C0_0_RX_DATA[9:0]), .CORETSE_0_TCG(CORETSE_0_TCG[9:0]), .l_i_i(l_i_i), .LINK_OK_c(LINK_OK_c), .BIBUF_0_Y(BIBUF_0_Y), .RD_BC_ERROR_c(RD_BC_ERROR_c), .N_1214(N_1214), .tx_fifo_write_sig14_i_2(tx_fifo_write_sig14_i_2), .Oi0O1(Oi0O1), .iPRDATA_0_sqmuxa(iPRDATA_0_sqmuxa), .CoreAPB3_0_0_APBmslave0_PWRITE_s0(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .un1_Ii0O1(un1_Ii0O1), .CoreAPB3_0_0_APBmslave0_PSELx(CoreAPB3_0_0_APBmslave0_PSELx), .CoreAPB3_0_0_APBmslave0_PENABLE(CoreAPB3_0_0_APBmslave0_PENABLE), .CoreAPB3_0_0_APBmslave0_PWRITE(CoreAPB3_0_0_APBmslave0_PWRITE), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .tx_fifo_write_sig_0_sqmuxa_i_1(tx_fifo_write_sig_0_sqmuxa_i_1), .un1_PADDR(un1_PADDR), .iPRDATA28(iPRDATA28), .tx_fifo_write_sig14_i_1(tx_fifo_write_sig14_i_1), .rx_fifo_read_1(rx_fifo_read_1), .N_1206(N_1206), .un1_PADDR_2(un1_PADDR_2), .un1_PADDR_3(un1_PADDR_3), .PHY_MDC_c(PHY_MDC_c), .CORETSE_0_MDOEN(CORETSE_0_MDOEN), .CORETSE_0_MDO(CORETSE_0_MDO), .rx_fifo_read_0(rx_fifo_read_0), .PF_IOD_CDR_C0_0_RX_CLK_R(PF_IOD_CDR_C0_0_RX_CLK_R), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CORETSE_Z11 */ module CORETSE_0 ( wrdata_0, CoreAPB3_0_0_APBmslave0_PWDATA, CoreAPB3_0_0_APBmslave0_PADDR_5, CoreAPB3_0_0_APBmslave0_PADDR_3, CoreAPB3_0_0_APBmslave0_PADDR_7, CoreAPB3_0_0_APBmslave0_PADDR_6, CoreAPB3_0_0_APBmslave0_PADDR_0, CoreAPB3_0_0_APBmslave0_PADDR_1, io0O1_m, io0O1, paddr_0, PADDR_1z_0, rx_fifo_data_out, CoreAPB3_0_0_APBmslave2_PRDATA_m, O0Il1_0, CORETSE_0_MRXDAT, PF_IOD_CDR_C0_0_RX_DATA, CORETSE_0_TCG, AND2_2_Y, PF_IOD_CDR_CCC_C0_0_TX_CLK_G, LINK_OK_c, BIBUF_0_Y, RD_BC_ERROR_c, N_1214, tx_fifo_write_sig14_i_2, Oi0O1, iPRDATA_0_sqmuxa, CoreAPB3_0_0_APBmslave0_PWRITE_s0, un1_Ii0O1, CoreAPB3_0_0_APBmslave0_PSELx, CoreAPB3_0_0_APBmslave0_PENABLE, CoreAPB3_0_0_APBmslave0_PWRITE, PF_CCC_0_0_OUT0_FABCLK_0, tx_fifo_write_sig_0_sqmuxa_i_1, un1_PADDR, iPRDATA28, tx_fifo_write_sig14_i_1, rx_fifo_read_1, N_1206, un1_PADDR_2, un1_PADDR_3, PHY_MDC_c, CORETSE_0_MDOEN, CORETSE_0_MDO, rx_fifo_read_0, PF_IOD_CDR_C0_0_RX_CLK_R ) ; input wrdata_0 ; input [31:1] CoreAPB3_0_0_APBmslave0_PWDATA ; input CoreAPB3_0_0_APBmslave0_PADDR_5 ; input CoreAPB3_0_0_APBmslave0_PADDR_3 ; input CoreAPB3_0_0_APBmslave0_PADDR_7 ; input CoreAPB3_0_0_APBmslave0_PADDR_6 ; input CoreAPB3_0_0_APBmslave0_PADDR_0 ; input CoreAPB3_0_0_APBmslave0_PADDR_1 ; output [15:0] io0O1_m ; output [31:16] io0O1 ; input paddr_0 ; input PADDR_1z_0 ; input [15:8] rx_fifo_data_out ; output [15:8] CoreAPB3_0_0_APBmslave2_PRDATA_m ; output O0Il1_0 ; output [31:0] CORETSE_0_MRXDAT ; input [9:0] PF_IOD_CDR_C0_0_RX_DATA ; output [9:0] CORETSE_0_TCG ; input AND2_2_Y ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; output LINK_OK_c ; input BIBUF_0_Y ; output RD_BC_ERROR_c ; output N_1214 ; input tx_fifo_write_sig14_i_2 ; output Oi0O1 ; input iPRDATA_0_sqmuxa ; output CoreAPB3_0_0_APBmslave0_PWRITE_s0 ; output un1_Ii0O1 ; input CoreAPB3_0_0_APBmslave0_PSELx ; input CoreAPB3_0_0_APBmslave0_PENABLE ; input CoreAPB3_0_0_APBmslave0_PWRITE ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input tx_fifo_write_sig_0_sqmuxa_i_1 ; input un1_PADDR ; input iPRDATA28 ; input tx_fifo_write_sig14_i_1 ; input rx_fifo_read_1 ; output N_1206 ; input un1_PADDR_2 ; input un1_PADDR_3 ; output PHY_MDC_c ; output CORETSE_0_MDOEN ; output CORETSE_0_MDO ; input rx_fifo_read_0 ; input PF_IOD_CDR_C0_0_RX_CLK_R ; wire wrdata_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_5 ; wire CoreAPB3_0_0_APBmslave0_PADDR_3 ; wire CoreAPB3_0_0_APBmslave0_PADDR_7 ; wire CoreAPB3_0_0_APBmslave0_PADDR_6 ; wire CoreAPB3_0_0_APBmslave0_PADDR_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_1 ; wire paddr_0 ; wire PADDR_1z_0 ; wire O0Il1_0 ; wire AND2_2_Y ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire LINK_OK_c ; wire BIBUF_0_Y ; wire RD_BC_ERROR_c ; wire N_1214 ; wire tx_fifo_write_sig14_i_2 ; wire Oi0O1 ; wire iPRDATA_0_sqmuxa ; wire CoreAPB3_0_0_APBmslave0_PWRITE_s0 ; wire un1_Ii0O1 ; wire CoreAPB3_0_0_APBmslave0_PSELx ; wire CoreAPB3_0_0_APBmslave0_PENABLE ; wire CoreAPB3_0_0_APBmslave0_PWRITE ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire tx_fifo_write_sig_0_sqmuxa_i_1 ; wire un1_PADDR ; wire iPRDATA28 ; wire tx_fifo_write_sig14_i_1 ; wire rx_fifo_read_1 ; wire N_1206 ; wire un1_PADDR_2 ; wire un1_PADDR_3 ; wire PHY_MDC_c ; wire CORETSE_0_MDOEN ; wire CORETSE_0_MDO ; wire rx_fifo_read_0 ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire GND ; wire VCC ; // @30:270 CORETSE_Z11 CORETSE_0_0 ( .CORETSE_0_TCG(CORETSE_0_TCG[9:0]), .PF_IOD_CDR_C0_0_RX_DATA(PF_IOD_CDR_C0_0_RX_DATA[9:0]), .CORETSE_0_MRXDAT(CORETSE_0_MRXDAT[31:0]), .O0Il1_0(O0Il1_0), .CoreAPB3_0_0_APBmslave2_PRDATA_m(CoreAPB3_0_0_APBmslave2_PRDATA_m[15:8]), .rx_fifo_data_out(rx_fifo_data_out[15:8]), .PADDR_0(PADDR_1z_0), .paddr_1z_0(paddr_0), .io0O1(io0O1[31:16]), .io0O1_m(io0O1_m[15:0]), .CoreAPB3_0_0_APBmslave0_PADDR_5(CoreAPB3_0_0_APBmslave0_PADDR_5), .CoreAPB3_0_0_APBmslave0_PADDR_3(CoreAPB3_0_0_APBmslave0_PADDR_3), .CoreAPB3_0_0_APBmslave0_PADDR_7(CoreAPB3_0_0_APBmslave0_PADDR_7), .CoreAPB3_0_0_APBmslave0_PADDR_6(CoreAPB3_0_0_APBmslave0_PADDR_6), .CoreAPB3_0_0_APBmslave0_PADDR_0(CoreAPB3_0_0_APBmslave0_PADDR_0), .CoreAPB3_0_0_APBmslave0_PADDR_1(CoreAPB3_0_0_APBmslave0_PADDR_1), .CoreAPB3_0_0_APBmslave0_PWDATA(CoreAPB3_0_0_APBmslave0_PWDATA[31:1]), .wrdata_0(wrdata_0), .PF_IOD_CDR_C0_0_RX_CLK_R(PF_IOD_CDR_C0_0_RX_CLK_R), .rx_fifo_read_0(rx_fifo_read_0), .CORETSE_0_MDO(CORETSE_0_MDO), .CORETSE_0_MDOEN(CORETSE_0_MDOEN), .PHY_MDC_c(PHY_MDC_c), .un1_PADDR_3(un1_PADDR_3), .un1_PADDR_2(un1_PADDR_2), .N_1206(N_1206), .rx_fifo_read_1(rx_fifo_read_1), .tx_fifo_write_sig14_i_1(tx_fifo_write_sig14_i_1), .iPRDATA28(iPRDATA28), .un1_PADDR(un1_PADDR), .tx_fifo_write_sig_0_sqmuxa_i_1(tx_fifo_write_sig_0_sqmuxa_i_1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .CoreAPB3_0_0_APBmslave0_PWRITE(CoreAPB3_0_0_APBmslave0_PWRITE), .CoreAPB3_0_0_APBmslave0_PENABLE(CoreAPB3_0_0_APBmslave0_PENABLE), .CoreAPB3_0_0_APBmslave0_PSELx(CoreAPB3_0_0_APBmslave0_PSELx), .un1_Ii0O1(un1_Ii0O1), .CoreAPB3_0_0_APBmslave0_PWRITE_s0(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .iPRDATA_0_sqmuxa(iPRDATA_0_sqmuxa), .Oi0O1(Oi0O1), .tx_fifo_write_sig14_i_2(tx_fifo_write_sig14_i_2), .N_1214(N_1214), .RD_BC_ERROR_c(RD_BC_ERROR_c), .BIBUF_0_Y(BIBUF_0_Y), .LINK_OK_c(LINK_OK_c), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .AND2_2_Y(AND2_2_Y) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CORETSE_0 */ module CoreUARTapb_0_CoreUARTapb_0_0_Clock_gen_0s_0s ( controlReg2, controlReg1, xmit_pulse_1z, xmit_clock_1z, baud_clock, PF_CCC_0_0_OUT0_FABCLK_0, dff ) ; input [7:3] controlReg2 ; input [7:0] controlReg1 ; output xmit_pulse_1z ; output xmit_clock_1z ; output baud_clock ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input dff ; wire xmit_pulse_1z ; wire xmit_clock_1z ; wire baud_clock ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire dff ; wire [12:0] baud_cntr; wire [12:0] baud_cntr_s; wire [3:0] xmit_cntr_Z; wire [3:0] xmit_cntr_3; wire [11:0] baud_cntr_cry; wire [0:0] baud_cntr_RNI3KL472_Y; wire [1:1] baud_cntr_RNI5FRFG3_Y; wire [2:2] baud_cntr_RNI9C1RP4_Y; wire [3:3] baud_cntr_RNIFB7636_Y; wire [4:4] baud_cntr_RNINCDHC7_Y; wire [5:5] baud_cntr_RNI1GJSL8_Y; wire [6:6] baud_cntr_RNIDLP7V9_Y; wire [7:7] baud_cntr_RNIRSVI8B_Y; wire [8:8] baud_cntr_RNI749VHC_Y; wire [9:9] baud_cntr_RNILDIBRD_Y; wire [10:10] baud_cntr_RNIC59F2F_Y; wire [12:12] baud_cntr_RNO_FCO; wire [12:12] baud_cntr_RNO_Y; wire [11:11] baud_cntr_RNI5VVI9G_Y; wire VCC ; wire GND ; wire baud_cntr7_1_RNI3RFPT_Y ; wire xmit_clock8 ; wire baud_cntr_cry_cy ; wire baud_cntr7_1_RNI3RFPT_S ; wire baud_cntr7_1 ; wire baud_cntr7_7 ; wire baud_cntr7_8 ; wire CO0 ; // @35:283 SLE \genblk1.baud_cntr[12] ( .Q(baud_cntr[12]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(baud_cntr_s[12]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @35:283 SLE \genblk1.baud_cntr[11] ( .Q(baud_cntr[11]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(baud_cntr_s[11]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @35:283 SLE \genblk1.baud_cntr[10] ( .Q(baud_cntr[10]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(baud_cntr_s[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @35:283 SLE \genblk1.baud_cntr[9] ( .Q(baud_cntr[9]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(baud_cntr_s[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @35:283 SLE \genblk1.baud_cntr[8] ( .Q(baud_cntr[8]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(baud_cntr_s[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @35:283 SLE \genblk1.baud_cntr[7] ( .Q(baud_cntr[7]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(baud_cntr_s[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @35:283 SLE \genblk1.baud_cntr[6] ( .Q(baud_cntr[6]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(baud_cntr_s[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @35:283 SLE \genblk1.baud_cntr[5] ( .Q(baud_cntr[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(baud_cntr_s[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @35:283 SLE \genblk1.baud_cntr[4] ( .Q(baud_cntr[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(baud_cntr_s[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @35:283 SLE \genblk1.baud_cntr[3] ( .Q(baud_cntr[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(baud_cntr_s[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @35:283 SLE \genblk1.baud_cntr[2] ( .Q(baud_cntr[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(baud_cntr_s[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @35:283 SLE \genblk1.baud_cntr[1] ( .Q(baud_cntr[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(baud_cntr_s[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @35:283 SLE \genblk1.baud_cntr[0] ( .Q(baud_cntr[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(baud_cntr_s[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @35:283 SLE \genblk1.baud_clock_int ( .Q(baud_clock), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(baud_cntr7_1_RNI3RFPT_Y), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @35:310 SLE \xmit_cntr[3] ( .Q(xmit_cntr_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(xmit_cntr_3[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @35:310 SLE \xmit_cntr[2] ( .Q(xmit_cntr_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(xmit_cntr_3[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @35:310 SLE \xmit_cntr[1] ( .Q(xmit_cntr_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(xmit_cntr_3[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @35:310 SLE \xmit_cntr[0] ( .Q(xmit_cntr_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(xmit_cntr_3[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @35:310 SLE xmit_clock ( .Q(xmit_clock_1z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(xmit_clock8), .EN(baud_clock), .LAT(GND), .SD(GND), .SLn(VCC) ); // @35:292 ARI1 \genblk1.make_baud_cntr.baud_cntr7_1_RNI3RFPT ( .FCO(baud_cntr_cry_cy), .S(baud_cntr7_1_RNI3RFPT_S), .Y(baud_cntr7_1_RNI3RFPT_Y), .B(baud_cntr[2]), .C(baud_cntr7_1), .D(baud_cntr7_7), .A(baud_cntr7_8), .FCI(VCC) ); defparam \genblk1.make_baud_cntr.baud_cntr7_1_RNI3RFPT .INIT=20'h44000; // @35:292 ARI1 \genblk1.baud_cntr_RNI3KL472[0] ( .FCO(baud_cntr_cry[0]), .S(baud_cntr_s[0]), .Y(baud_cntr_RNI3KL472_Y[0]), .B(controlReg1[0]), .C(baud_cntr7_1_RNI3RFPT_Y), .D(baud_cntr[0]), .A(VCC), .FCI(baud_cntr_cry_cy) ); defparam \genblk1.baud_cntr_RNI3KL472[0] .INIT=20'h64700; // @35:292 ARI1 \genblk1.baud_cntr_RNI5FRFG3[1] ( .FCO(baud_cntr_cry[1]), .S(baud_cntr_s[1]), .Y(baud_cntr_RNI5FRFG3_Y[1]), .B(controlReg1[1]), .C(baud_cntr7_1_RNI3RFPT_Y), .D(baud_cntr[1]), .A(VCC), .FCI(baud_cntr_cry[0]) ); defparam \genblk1.baud_cntr_RNI5FRFG3[1] .INIT=20'h64700; // @35:292 ARI1 \genblk1.baud_cntr_RNI9C1RP4[2] ( .FCO(baud_cntr_cry[2]), .S(baud_cntr_s[2]), .Y(baud_cntr_RNI9C1RP4_Y[2]), .B(controlReg1[2]), .C(baud_cntr7_1_RNI3RFPT_Y), .D(baud_cntr[2]), .A(VCC), .FCI(baud_cntr_cry[1]) ); defparam \genblk1.baud_cntr_RNI9C1RP4[2] .INIT=20'h64700; // @35:292 ARI1 \genblk1.baud_cntr_RNIFB7636[3] ( .FCO(baud_cntr_cry[3]), .S(baud_cntr_s[3]), .Y(baud_cntr_RNIFB7636_Y[3]), .B(controlReg1[3]), .C(baud_cntr7_1_RNI3RFPT_Y), .D(baud_cntr[3]), .A(VCC), .FCI(baud_cntr_cry[2]) ); defparam \genblk1.baud_cntr_RNIFB7636[3] .INIT=20'h64700; // @35:292 ARI1 \genblk1.baud_cntr_RNINCDHC7[4] ( .FCO(baud_cntr_cry[4]), .S(baud_cntr_s[4]), .Y(baud_cntr_RNINCDHC7_Y[4]), .B(controlReg1[4]), .C(baud_cntr7_1_RNI3RFPT_Y), .D(baud_cntr[4]), .A(VCC), .FCI(baud_cntr_cry[3]) ); defparam \genblk1.baud_cntr_RNINCDHC7[4] .INIT=20'h64700; // @35:292 ARI1 \genblk1.baud_cntr_RNI1GJSL8[5] ( .FCO(baud_cntr_cry[5]), .S(baud_cntr_s[5]), .Y(baud_cntr_RNI1GJSL8_Y[5]), .B(controlReg1[5]), .C(baud_cntr7_1_RNI3RFPT_Y), .D(baud_cntr[5]), .A(VCC), .FCI(baud_cntr_cry[4]) ); defparam \genblk1.baud_cntr_RNI1GJSL8[5] .INIT=20'h64700; // @35:292 ARI1 \genblk1.baud_cntr_RNIDLP7V9[6] ( .FCO(baud_cntr_cry[6]), .S(baud_cntr_s[6]), .Y(baud_cntr_RNIDLP7V9_Y[6]), .B(controlReg1[6]), .C(baud_cntr7_1_RNI3RFPT_Y), .D(baud_cntr[6]), .A(VCC), .FCI(baud_cntr_cry[5]) ); defparam \genblk1.baud_cntr_RNIDLP7V9[6] .INIT=20'h64700; // @35:292 ARI1 \genblk1.baud_cntr_RNIRSVI8B[7] ( .FCO(baud_cntr_cry[7]), .S(baud_cntr_s[7]), .Y(baud_cntr_RNIRSVI8B_Y[7]), .B(controlReg1[7]), .C(baud_cntr7_1_RNI3RFPT_Y), .D(baud_cntr[7]), .A(VCC), .FCI(baud_cntr_cry[6]) ); defparam \genblk1.baud_cntr_RNIRSVI8B[7] .INIT=20'h64700; // @35:292 ARI1 \genblk1.baud_cntr_RNI749VHC[8] ( .FCO(baud_cntr_cry[8]), .S(baud_cntr_s[8]), .Y(baud_cntr_RNI749VHC_Y[8]), .B(controlReg2[3]), .C(baud_cntr7_1_RNI3RFPT_Y), .D(baud_cntr[8]), .A(VCC), .FCI(baud_cntr_cry[7]) ); defparam \genblk1.baud_cntr_RNI749VHC[8] .INIT=20'h64700; // @35:292 ARI1 \genblk1.baud_cntr_RNILDIBRD[9] ( .FCO(baud_cntr_cry[9]), .S(baud_cntr_s[9]), .Y(baud_cntr_RNILDIBRD_Y[9]), .B(controlReg2[4]), .C(baud_cntr7_1_RNI3RFPT_Y), .D(baud_cntr[9]), .A(VCC), .FCI(baud_cntr_cry[8]) ); defparam \genblk1.baud_cntr_RNILDIBRD[9] .INIT=20'h64700; // @35:292 ARI1 \genblk1.baud_cntr_RNIC59F2F[10] ( .FCO(baud_cntr_cry[10]), .S(baud_cntr_s[10]), .Y(baud_cntr_RNIC59F2F_Y[10]), .B(controlReg2[5]), .C(baud_cntr7_1_RNI3RFPT_Y), .D(baud_cntr[10]), .A(VCC), .FCI(baud_cntr_cry[9]) ); defparam \genblk1.baud_cntr_RNIC59F2F[10] .INIT=20'h64700; // @35:292 ARI1 \genblk1.baud_cntr_RNO[12] ( .FCO(baud_cntr_RNO_FCO[12]), .S(baud_cntr_s[12]), .Y(baud_cntr_RNO_Y[12]), .B(controlReg2[7]), .C(baud_cntr7_1_RNI3RFPT_Y), .D(baud_cntr[12]), .A(VCC), .FCI(baud_cntr_cry[11]) ); defparam \genblk1.baud_cntr_RNO[12] .INIT=20'h44700; // @35:292 ARI1 \genblk1.baud_cntr_RNI5VVI9G[11] ( .FCO(baud_cntr_cry[11]), .S(baud_cntr_s[11]), .Y(baud_cntr_RNI5VVI9G_Y[11]), .B(controlReg2[6]), .C(baud_cntr7_1_RNI3RFPT_Y), .D(baud_cntr[11]), .A(VCC), .FCI(baud_cntr_cry[10]) ); defparam \genblk1.baud_cntr_RNI5VVI9G[11] .INIT=20'h64700; // @35:292 CFG4 \genblk1.make_baud_cntr.baud_cntr7_1 ( .A(baud_cntr[4]), .B(baud_cntr[3]), .C(baud_cntr[1]), .D(baud_cntr[0]), .Y(baud_cntr7_1) ); defparam \genblk1.make_baud_cntr.baud_cntr7_1 .INIT=16'h0001; // @35:334 CFG2 xmit_pulse ( .A(baud_clock), .B(xmit_clock_1z), .Y(xmit_pulse_1z) ); defparam xmit_pulse.INIT=4'h8; // @35:319 CFG2 \make_xmit_clock.xmit_cntr_3_1.CO0 ( .A(baud_clock), .B(xmit_cntr_Z[0]), .Y(CO0) ); defparam \make_xmit_clock.xmit_cntr_3_1.CO0 .INIT=4'h8; // @35:319 CFG2 \make_xmit_clock.xmit_cntr_3_1.SUM[0] ( .A(baud_clock), .B(xmit_cntr_Z[0]), .Y(xmit_cntr_3[0]) ); defparam \make_xmit_clock.xmit_cntr_3_1.SUM[0] .INIT=4'h6; // @35:292 CFG4 \genblk1.make_baud_cntr.baud_cntr7_8 ( .A(baud_cntr[12]), .B(baud_cntr[7]), .C(baud_cntr[6]), .D(baud_cntr[5]), .Y(baud_cntr7_8) ); defparam \genblk1.make_baud_cntr.baud_cntr7_8 .INIT=16'h0001; // @35:292 CFG4 \genblk1.make_baud_cntr.baud_cntr7_7 ( .A(baud_cntr[11]), .B(baud_cntr[10]), .C(baud_cntr[9]), .D(baud_cntr[8]), .Y(baud_cntr7_7) ); defparam \genblk1.make_baud_cntr.baud_cntr7_7 .INIT=16'h0001; // @35:322 CFG4 \make_xmit_clock.xmit_clock8 ( .A(xmit_cntr_Z[2]), .B(xmit_cntr_Z[3]), .C(xmit_cntr_Z[1]), .D(xmit_cntr_Z[0]), .Y(xmit_clock8) ); defparam \make_xmit_clock.xmit_clock8 .INIT=16'h8000; // @35:319 CFG2 \make_xmit_clock.xmit_cntr_3_1.SUM[1] ( .A(CO0), .B(xmit_cntr_Z[1]), .Y(xmit_cntr_3[1]) ); defparam \make_xmit_clock.xmit_cntr_3_1.SUM[1] .INIT=4'h6; // @35:319 CFG3 \make_xmit_clock.xmit_cntr_3_1.SUM[2] ( .A(xmit_cntr_Z[2]), .B(xmit_cntr_Z[1]), .C(CO0), .Y(xmit_cntr_3[2]) ); defparam \make_xmit_clock.xmit_cntr_3_1.SUM[2] .INIT=8'h6A; // @35:319 CFG4 \make_xmit_clock.xmit_cntr_3_1.SUM[3] ( .A(xmit_cntr_Z[3]), .B(xmit_cntr_Z[2]), .C(xmit_cntr_Z[1]), .D(CO0), .Y(xmit_cntr_3[3]) ); defparam \make_xmit_clock.xmit_cntr_3_1.SUM[3] .INIT=16'h6AAA; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CoreUARTapb_0_CoreUARTapb_0_0_Clock_gen_0s_0s */ module CoreUARTapb_0_CoreUARTapb_0_0_Tx_async_0s_0s_0s_1s_2s_3s_4s_5s_6s ( controlReg2, tx_hold_reg, tx_hold_reg4, baud_clock, xmit_clock, xmit_pulse, TX_c, tx_hold_reg4_i, TXRDY, PF_CCC_0_0_OUT0_FABCLK_0, dff ) ; input [2:0] controlReg2 ; input [7:0] tx_hold_reg ; input tx_hold_reg4 ; input baud_clock ; input xmit_clock ; input xmit_pulse ; output TX_c ; input tx_hold_reg4_i ; output TXRDY ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input dff ; wire tx_hold_reg4 ; wire baud_clock ; wire xmit_clock ; wire xmit_pulse ; wire TX_c ; wire tx_hold_reg4_i ; wire TXRDY ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire dff ; wire [5:0] xmit_state_Z; wire [5:0] xmit_state_ns_Z; wire [1:1] xmit_state_ns; wire [7:0] tx_byte_Z; wire [3:1] xmit_bit_sel_Z; wire [0:0] xmit_bit_sel_3; wire [3:3] xmit_state_ns_i_a2_0_Z; wire VCC ; wire GND ; wire N_75_i ; wire tx_parity_Z ; wire tx_parity_5 ; wire un1_tx_parity_1_sqmuxa_0_Z ; wire txrdy_int_1_sqmuxa_i_Z ; wire tx_4 ; wire N_106_i ; wire N_94_i ; wire N_88_i ; wire N_86_i ; wire N_84_i ; wire CO0 ; wire tx_2_u_2_1_wmux_3_FCO ; wire tx_2_u_2_1_wmux_3_S ; wire tx_2 ; wire tx_2_u_2_1_0_y1 ; wire tx_2_u_2_1_0_y3 ; wire tx_2_u_2_1_co1_0 ; wire tx_2_u_2_1_wmux_2_S ; wire tx_2_u_2_1_y0_0 ; wire tx_2_u_2_1_co0_0 ; wire tx_2_u_2_1_wmux_1_S ; wire tx_2_u_2_1_0_co1 ; wire tx_2_u_2_1_wmux_0_S ; wire tx_2_u_2_1_0_y0 ; wire tx_2_u_2_1_0_co0 ; wire tx_2_u_2_1_0_wmux_S ; wire N_136 ; wire N_91 ; wire tx_3 ; wire N_134 ; wire tx_4_1 ; wire N_116 ; wire N_22 ; wire N_21 ; wire N_20 ; wire N_19 ; wire N_18 ; wire N_17 ; // @37:119 SLE \xmit_state[5] ( .Q(xmit_state_Z[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(xmit_state_ns_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @37:119 SLE \xmit_state[4] ( .Q(xmit_state_Z[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(xmit_state_ns_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @37:119 SLE \xmit_state[3] ( .Q(xmit_state_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_75_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @37:119 SLE \xmit_state[2] ( .Q(xmit_state_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(xmit_state_ns_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @37:119 SLE \xmit_state[1] ( .Q(xmit_state_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(xmit_state_ns[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @37:119 SLE \xmit_state[0] ( .Q(xmit_state_Z[0]), .ADn(GND), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(xmit_state_ns_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @37:339 SLE tx_parity ( .Q(tx_parity_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(tx_parity_5), .EN(un1_tx_parity_1_sqmuxa_0_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @37:87 SLE txrdy_int ( .Q(TXRDY), .ADn(GND), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(tx_hold_reg4_i), .EN(txrdy_int_1_sqmuxa_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @37:290 SLE tx ( .Q(TX_c), .ADn(GND), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(tx_4), .EN(N_106_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @37:119 SLE \tx_byte[7] ( .Q(tx_byte_Z[7]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(tx_hold_reg[7]), .EN(N_94_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @37:119 SLE \tx_byte[6] ( .Q(tx_byte_Z[6]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(tx_hold_reg[6]), .EN(N_94_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @37:119 SLE \tx_byte[5] ( .Q(tx_byte_Z[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(tx_hold_reg[5]), .EN(N_94_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @37:119 SLE \tx_byte[4] ( .Q(tx_byte_Z[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(tx_hold_reg[4]), .EN(N_94_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @37:119 SLE \tx_byte[3] ( .Q(tx_byte_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(tx_hold_reg[3]), .EN(N_94_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @37:119 SLE \tx_byte[2] ( .Q(tx_byte_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(tx_hold_reg[2]), .EN(N_94_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @37:119 SLE \tx_byte[1] ( .Q(tx_byte_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(tx_hold_reg[1]), .EN(N_94_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @37:119 SLE \tx_byte[0] ( .Q(tx_byte_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(tx_hold_reg[0]), .EN(N_94_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @37:268 SLE \xmit_bit_sel[3] ( .Q(xmit_bit_sel_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_88_i), .EN(xmit_pulse), .LAT(GND), .SD(GND), .SLn(VCC) ); // @37:268 SLE \xmit_bit_sel[2] ( .Q(xmit_bit_sel_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_86_i), .EN(xmit_pulse), .LAT(GND), .SD(GND), .SLn(VCC) ); // @37:268 SLE \xmit_bit_sel[1] ( .Q(xmit_bit_sel_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_84_i), .EN(xmit_pulse), .LAT(GND), .SD(GND), .SLn(VCC) ); // @37:268 SLE \xmit_bit_sel[0] ( .Q(CO0), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(xmit_bit_sel_3[0]), .EN(xmit_pulse), .LAT(GND), .SD(GND), .SLn(VCC) ); ARI1 \xmit_sel.tx_2_u_2_1_wmux_3 ( .FCO(tx_2_u_2_1_wmux_3_FCO), .S(tx_2_u_2_1_wmux_3_S), .Y(tx_2), .B(tx_2_u_2_1_0_y1), .C(xmit_bit_sel_Z[2]), .D(VCC), .A(tx_2_u_2_1_0_y3), .FCI(tx_2_u_2_1_co1_0) ); defparam \xmit_sel.tx_2_u_2_1_wmux_3 .INIT=20'h0EC2C; ARI1 \xmit_sel.tx_2_u_2_1_wmux_2 ( .FCO(tx_2_u_2_1_co1_0), .S(tx_2_u_2_1_wmux_2_S), .Y(tx_2_u_2_1_0_y3), .B(xmit_bit_sel_Z[1]), .C(tx_byte_Z[6]), .D(tx_byte_Z[7]), .A(tx_2_u_2_1_y0_0), .FCI(tx_2_u_2_1_co0_0) ); defparam \xmit_sel.tx_2_u_2_1_wmux_2 .INIT=20'h0F588; ARI1 \xmit_sel.tx_2_u_2_1_wmux_1 ( .FCO(tx_2_u_2_1_co0_0), .S(tx_2_u_2_1_wmux_1_S), .Y(tx_2_u_2_1_y0_0), .B(xmit_bit_sel_Z[1]), .C(tx_byte_Z[4]), .D(tx_byte_Z[5]), .A(CO0), .FCI(tx_2_u_2_1_0_co1) ); defparam \xmit_sel.tx_2_u_2_1_wmux_1 .INIT=20'h0FA44; ARI1 \xmit_sel.tx_2_u_2_1_wmux_0 ( .FCO(tx_2_u_2_1_0_co1), .S(tx_2_u_2_1_wmux_0_S), .Y(tx_2_u_2_1_0_y1), .B(xmit_bit_sel_Z[1]), .C(tx_byte_Z[2]), .D(tx_byte_Z[3]), .A(tx_2_u_2_1_0_y0), .FCI(tx_2_u_2_1_0_co0) ); defparam \xmit_sel.tx_2_u_2_1_wmux_0 .INIT=20'h0F588; ARI1 \xmit_sel.tx_2_u_2_1_0_wmux ( .FCO(tx_2_u_2_1_0_co0), .S(tx_2_u_2_1_0_wmux_S), .Y(tx_2_u_2_1_0_y0), .B(xmit_bit_sel_Z[1]), .C(tx_byte_Z[0]), .D(tx_byte_Z[1]), .A(CO0), .FCI(VCC) ); defparam \xmit_sel.tx_2_u_2_1_0_wmux .INIT=20'h0FA44; // @37:134 CFG4 un1_tx_parity_1_sqmuxa_0_a2 ( .A(xmit_clock), .B(xmit_state_Z[3]), .C(baud_clock), .D(controlReg2[1]), .Y(N_136) ); defparam un1_tx_parity_1_sqmuxa_0_a2.INIT=16'h8000; // @37:119 CFG2 \xmit_state_ns_i_a2_0[3] ( .A(xmit_bit_sel_Z[1]), .B(xmit_bit_sel_Z[3]), .Y(xmit_state_ns_i_a2_0_Z[3]) ); defparam \xmit_state_ns_i_a2_0[3] .INIT=4'h2; // @37:278 CFG2 \xmit_cnt.xmit_bit_sel_3_a3[0] ( .A(xmit_state_Z[3]), .B(CO0), .Y(xmit_bit_sel_3[0]) ); defparam \xmit_cnt.xmit_bit_sel_3_a3[0] .INIT=4'h2; // @37:278 CFG2 \xmit_cnt.xmit_bit_sel_3_i_o2[1] ( .A(xmit_bit_sel_Z[1]), .B(CO0), .Y(N_91) ); defparam \xmit_cnt.xmit_bit_sel_3_i_o2[1] .INIT=4'h7; // @37:323 CFG2 \xmit_sel.tx_3 ( .A(controlReg2[2]), .B(tx_parity_Z), .Y(tx_3) ); defparam \xmit_sel.tx_3 .INIT=4'h6; // @37:119 CFG2 \xmit_state_ns_a3[1] ( .A(TXRDY), .B(xmit_state_Z[0]), .Y(xmit_state_ns[1]) ); defparam \xmit_state_ns_a3[1] .INIT=4'h4; // @37:359 CFG3 \xmit_par_calc.tx_parity_5 ( .A(tx_2), .B(tx_parity_Z), .C(xmit_state_Z[5]), .Y(tx_parity_5) ); defparam \xmit_par_calc.tx_parity_5 .INIT=8'h06; // @37:119 CFG4 \xmit_state_ns_i_a2[3] ( .A(controlReg2[0]), .B(xmit_state_ns_i_a2_0_Z[3]), .C(xmit_bit_sel_Z[2]), .D(CO0), .Y(N_134) ); defparam \xmit_state_ns_i_a2[3] .INIT=16'h8040; // @37:119 CFG3 \xmit_state_ns[2] ( .A(xmit_state_Z[1]), .B(xmit_state_Z[2]), .C(xmit_pulse), .Y(xmit_state_ns_Z[2]) ); defparam \xmit_state_ns[2] .INIT=8'hAE; // @37:119 CFG4 \xmit_state_ns[0] ( .A(TXRDY), .B(xmit_state_Z[0]), .C(xmit_pulse), .D(xmit_state_Z[5]), .Y(xmit_state_ns_Z[0]) ); defparam \xmit_state_ns[0] .INIT=16'hF888; // @37:290 CFG3 tx_RNO ( .A(xmit_state_Z[0]), .B(xmit_pulse), .C(xmit_state_Z[1]), .Y(N_106_i) ); defparam tx_RNO.INIT=8'hFE; // @37:119 CFG2 \xmit_state_RNI5PDQ7[2] ( .A(xmit_pulse), .B(xmit_state_Z[2]), .Y(N_94_i) ); defparam \xmit_state_RNI5PDQ7[2] .INIT=4'h8; // @37:303 CFG4 \xmit_sel.tx_4_u_1_0 ( .A(xmit_state_Z[4]), .B(xmit_state_Z[3]), .C(tx_3), .D(tx_2), .Y(tx_4_1) ); defparam \xmit_sel.tx_4_u_1_0 .INIT=16'hE4A0; // @37:134 CFG2 un1_tx_parity_1_sqmuxa_0 ( .A(N_136), .B(xmit_state_Z[5]), .Y(un1_tx_parity_1_sqmuxa_0_Z) ); defparam un1_tx_parity_1_sqmuxa_0.INIT=4'hE; // @37:268 CFG3 \xmit_bit_sel_RNO[2] ( .A(xmit_state_Z[3]), .B(N_91), .C(xmit_bit_sel_Z[2]), .Y(N_86_i) ); defparam \xmit_bit_sel_RNO[2] .INIT=8'h82; // @37:268 CFG3 \xmit_bit_sel_RNO[1] ( .A(CO0), .B(xmit_bit_sel_Z[1]), .C(xmit_state_Z[3]), .Y(N_84_i) ); defparam \xmit_bit_sel_RNO[1] .INIT=8'h60; // @37:303 CFG4 \xmit_sel.tx_4_u ( .A(xmit_state_Z[4]), .B(xmit_state_Z[2]), .C(xmit_state_Z[3]), .D(tx_4_1), .Y(tx_4) ); defparam \xmit_sel.tx_4_u .INIT=16'hFF01; // @37:119 CFG4 \xmit_state_ns_a3[5] ( .A(xmit_state_Z[3]), .B(controlReg2[1]), .C(xmit_pulse), .D(N_134), .Y(N_116) ); defparam \xmit_state_ns_a3[5] .INIT=16'h2000; // @37:119 CFG4 \xmit_state_ns[4] ( .A(xmit_pulse), .B(N_134), .C(xmit_state_Z[4]), .D(N_136), .Y(xmit_state_ns_Z[4]) ); defparam \xmit_state_ns[4] .INIT=16'hDC50; // @37:268 CFG4 \xmit_bit_sel_RNO[3] ( .A(xmit_state_Z[3]), .B(N_91), .C(xmit_bit_sel_Z[3]), .D(xmit_bit_sel_Z[2]), .Y(N_88_i) ); defparam \xmit_bit_sel_RNO[3] .INIT=16'h82A0; // @37:119 CFG4 \xmit_state_ns[5] ( .A(xmit_pulse), .B(N_116), .C(xmit_state_Z[5]), .D(xmit_state_Z[4]), .Y(xmit_state_ns_Z[5]) ); defparam \xmit_state_ns[5] .INIT=16'hFEDC; // @37:119 CFG4 \xmit_state_RNO[3] ( .A(xmit_pulse), .B(N_134), .C(xmit_state_Z[2]), .D(xmit_state_Z[3]), .Y(N_75_i) ); defparam \xmit_state_RNO[3] .INIT=16'hF7A0; // @37:87 CFG3 txrdy_int_1_sqmuxa_i ( .A(tx_hold_reg4), .B(xmit_state_Z[2]), .C(xmit_pulse), .Y(txrdy_int_1_sqmuxa_i_Z) ); defparam txrdy_int_1_sqmuxa_i.INIT=8'hEA; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CoreUARTapb_0_CoreUARTapb_0_0_Tx_async_0s_0s_0s_1s_2s_3s_4s_5s_6s */ module CoreUARTapb_0_CoreUARTapb_0_0_Rx_async_0s_0s_0s_1s_2s_3s ( controlReg2, data_out, RX_c, receive_full, PARITY_ERR, baud_clock, stop_strobe_1z, FRAMING_ERR, read_rx_byte, OVERFLOW, PF_CCC_0_0_OUT0_FABCLK_0, dff ) ; input [2:0] controlReg2 ; output [7:0] data_out ; input RX_c ; output receive_full ; output PARITY_ERR ; input baud_clock ; output stop_strobe_1z ; output FRAMING_ERR ; input read_rx_byte ; output OVERFLOW ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input dff ; wire RX_c ; wire receive_full ; wire PARITY_ERR ; wire baud_clock ; wire stop_strobe_1z ; wire FRAMING_ERR ; wire read_rx_byte ; wire OVERFLOW ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire dff ; wire [8:0] rx_shift_Z; wire [8:6] rx_shift_11_fast; wire [7:7] rx_shift_9_2; wire [7:7] rx_shift_9_1; wire [3:0] last_bit_Z; wire [1:0] rx_state_Z; wire [0:0] rx_state_ns; wire [1:1] rx_statece_Z; wire [7:7] rx_byte_2; wire [3:1] receive_count_Z; wire [3:0] rx_bit_cnt_Z; wire [3:0] rx_bit_cnt_4; wire [2:0] samples_Z; wire [2:2] rx_state_d; wire [0:0] receive_count_3_i_a2_0_1; wire rx_state_s0_0_a2_Z ; wire N_129_i ; wire rx_filtered_2 ; wire clear_parity_en_1_sqmuxa_Z ; wire clear_parity_en_0_sqmuxa_Z ; wire VCC ; wire rx_state_0_sqmuxa ; wire GND ; wire N_216_i ; wire overflow_1_sqmuxa_i_Z ; wire framing_error_0_sqmuxa_Z ; wire un1_framing_error15_i ; wire stop_strobe_1_sqmuxa ; wire overflow_int_Z ; wire overflow_int_4 ; wire framing_error_int_Z ; wire framing_error_int_0_sqmuxa ; wire rx_parity_calc_Z ; wire rx_parity_calc_4 ; wire parity_err_12 ; wire parity_err_1_sqmuxa_i_Z ; wire receive_full_int_1_sqmuxa_i_Z ; wire i9_mux_0 ; wire clear_parity_en_1_sqmuxa_i ; wire CO0 ; wire N_89_i ; wire un1_samples6_1_0_Z ; wire rx_byte_1_sqmuxa_Z ; wire N_95_i ; wire N_93_i ; wire N_91_i ; wire N_23_mux ; wire rx_bit_cnt_0_sqmuxa_0_a2_Z ; wire rx_state18_NE_i_1 ; wire rx_state18 ; wire m16_1_1 ; wire m16_1 ; wire framing_error_int_0_sqmuxa_0_a2_0_Z ; wire i5_mux ; wire fifo_write8_1 ; wire rx_state_19_d ; wire N_120_1 ; wire un1_parity_err_0_sqmuxa_i ; wire un1_parity_err_0_sqmuxa_1_i ; wire un1_parity_err_0_sqmuxa_2_Z ; wire parity_err5 ; wire parity_err15 ; wire N_24_mux ; wire fifo_write14 ; wire fifo_write_8_2 ; wire fifo_write29 ; wire fifo_write8 ; wire fifo_write_8_1 ; wire N_128 ; wire N_102_i ; wire rx_parity_calc_2 ; wire rx_bit_cnt_1_sqmuxa ; wire rx_parity_calc5 ; wire N_98 ; wire CO1 ; wire N_17 ; wire N_16 ; wire N_15 ; wire N_14 ; wire N_6 ; wire N_5 ; CFG1 rx_state_s0_0_a2_RNI6OCM1 ( .A(rx_state_s0_0_a2_Z), .Y(N_129_i) ); defparam rx_state_s0_0_a2_RNI6OCM1.INIT=2'h1; // @36:386 CFG3 \receive_shift.rx_shift_11_fast[6] ( .A(rx_filtered_2), .B(rx_shift_Z[7]), .C(clear_parity_en_1_sqmuxa_Z), .Y(rx_shift_11_fast[6]) ); defparam \receive_shift.rx_shift_11_fast[6] .INIT=8'hAC; // @36:386 CFG2 \receive_shift.rx_shift_11_fast[7] ( .A(rx_shift_9_2[7]), .B(rx_shift_9_1[7]), .Y(rx_shift_11_fast[7]) ); defparam \receive_shift.rx_shift_11_fast[7] .INIT=4'hE; // @36:386 CFG3 \receive_shift.rx_shift_11_fast[8] ( .A(rx_filtered_2), .B(rx_shift_Z[8]), .C(clear_parity_en_0_sqmuxa_Z), .Y(rx_shift_11_fast[8]) ); defparam \receive_shift.rx_shift_11_fast[8] .INIT=8'hAC; // @36:261 SLE \last_bit[1] ( .Q(last_bit_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(clear_parity_en_1_sqmuxa_Z), .EN(rx_state_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @36:261 SLE \last_bit[0] ( .Q(last_bit_Z[0]), .ADn(GND), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_216_i), .EN(rx_state_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @36:206 SLE overflow ( .Q(OVERFLOW), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(read_rx_byte), .EN(overflow_1_sqmuxa_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @36:231 SLE framing_error ( .Q(FRAMING_ERR), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(framing_error_0_sqmuxa_Z), .EN(un1_framing_error15_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @36:286 SLE stop_strobe ( .Q(stop_strobe_1z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(stop_strobe_1_sqmuxa), .EN(baud_clock), .LAT(GND), .SD(GND), .SLn(VCC) ); // @36:286 SLE overflow_int ( .Q(overflow_int_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(overflow_int_4), .EN(baud_clock), .LAT(GND), .SD(GND), .SLn(VCC) ); // @36:286 SLE framing_error_int ( .Q(framing_error_int_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(framing_error_int_0_sqmuxa), .EN(baud_clock), .LAT(GND), .SD(GND), .SLn(VCC) ); // @36:421 SLE rx_parity_calc ( .Q(rx_parity_calc_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rx_parity_calc_4), .EN(baud_clock), .LAT(GND), .SD(GND), .SLn(VCC) ); // @36:447 SLE parity_err ( .Q(PARITY_ERR), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(parity_err_12), .EN(parity_err_1_sqmuxa_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @36:501 SLE receive_full_int ( .Q(receive_full), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(read_rx_byte), .EN(receive_full_int_1_sqmuxa_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @36:286 SLE \rx_state[0] ( .Q(rx_state_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rx_state_ns[0]), .EN(baud_clock), .LAT(GND), .SD(GND), .SLn(VCC) ); // @36:286 SLE \rx_state[1] ( .Q(rx_state_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(i9_mux_0), .EN(rx_statece_Z[1]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @36:261 SLE \last_bit[3] ( .Q(last_bit_Z[3]), .ADn(GND), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(clear_parity_en_1_sqmuxa_i), .EN(rx_state_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @36:181 SLE \receive_count[0] ( .Q(CO0), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_89_i), .EN(baud_clock), .LAT(GND), .SD(GND), .SLn(VCC) ); // @36:377 SLE \rx_shift[8] ( .Q(rx_shift_Z[8]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rx_shift_11_fast[8]), .EN(un1_samples6_1_0_Z), .LAT(GND), .SD(GND), .SLn(N_129_i) ); // @36:377 SLE \rx_shift[7] ( .Q(rx_shift_Z[7]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rx_shift_11_fast[7]), .EN(un1_samples6_1_0_Z), .LAT(GND), .SD(GND), .SLn(N_129_i) ); // @36:377 SLE \rx_shift[6] ( .Q(rx_shift_Z[6]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rx_shift_11_fast[6]), .EN(un1_samples6_1_0_Z), .LAT(GND), .SD(GND), .SLn(N_129_i) ); // @36:377 SLE \rx_shift[5] ( .Q(rx_shift_Z[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rx_shift_Z[6]), .EN(un1_samples6_1_0_Z), .LAT(GND), .SD(GND), .SLn(N_129_i) ); // @36:377 SLE \rx_shift[4] ( .Q(rx_shift_Z[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rx_shift_Z[5]), .EN(un1_samples6_1_0_Z), .LAT(GND), .SD(GND), .SLn(N_129_i) ); // @36:377 SLE \rx_shift[3] ( .Q(rx_shift_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rx_shift_Z[4]), .EN(un1_samples6_1_0_Z), .LAT(GND), .SD(GND), .SLn(N_129_i) ); // @36:377 SLE \rx_shift[2] ( .Q(rx_shift_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rx_shift_Z[3]), .EN(un1_samples6_1_0_Z), .LAT(GND), .SD(GND), .SLn(N_129_i) ); // @36:377 SLE \rx_shift[1] ( .Q(rx_shift_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rx_shift_Z[2]), .EN(un1_samples6_1_0_Z), .LAT(GND), .SD(GND), .SLn(N_129_i) ); // @36:377 SLE \rx_shift[0] ( .Q(rx_shift_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rx_shift_Z[1]), .EN(un1_samples6_1_0_Z), .LAT(GND), .SD(GND), .SLn(N_129_i) ); // @36:286 SLE \rx_byte[7] ( .Q(data_out[7]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rx_byte_2[7]), .EN(rx_byte_1_sqmuxa_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @36:286 SLE \rx_byte[6] ( .Q(data_out[6]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rx_shift_Z[6]), .EN(rx_byte_1_sqmuxa_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @36:286 SLE \rx_byte[5] ( .Q(data_out[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rx_shift_Z[5]), .EN(rx_byte_1_sqmuxa_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @36:286 SLE \rx_byte[4] ( .Q(data_out[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rx_shift_Z[4]), .EN(rx_byte_1_sqmuxa_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @36:286 SLE \rx_byte[3] ( .Q(data_out[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rx_shift_Z[3]), .EN(rx_byte_1_sqmuxa_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @36:286 SLE \rx_byte[2] ( .Q(data_out[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rx_shift_Z[2]), .EN(rx_byte_1_sqmuxa_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @36:286 SLE \rx_byte[1] ( .Q(data_out[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rx_shift_Z[1]), .EN(rx_byte_1_sqmuxa_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @36:286 SLE \rx_byte[0] ( .Q(data_out[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rx_shift_Z[0]), .EN(rx_byte_1_sqmuxa_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @36:181 SLE \receive_count[3] ( .Q(receive_count_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_95_i), .EN(baud_clock), .LAT(GND), .SD(GND), .SLn(VCC) ); // @36:181 SLE \receive_count[2] ( .Q(receive_count_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_93_i), .EN(baud_clock), .LAT(GND), .SD(GND), .SLn(VCC) ); // @36:181 SLE \receive_count[1] ( .Q(receive_count_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_91_i), .EN(baud_clock), .LAT(GND), .SD(GND), .SLn(VCC) ); // @36:377 SLE \rx_bit_cnt[3] ( .Q(rx_bit_cnt_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rx_bit_cnt_4[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @36:377 SLE \rx_bit_cnt[2] ( .Q(rx_bit_cnt_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rx_bit_cnt_4[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @36:377 SLE \rx_bit_cnt[1] ( .Q(rx_bit_cnt_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rx_bit_cnt_4[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @36:377 SLE \rx_bit_cnt[0] ( .Q(rx_bit_cnt_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rx_bit_cnt_4[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @36:124 SLE \samples[2] ( .Q(samples_Z[2]), .ADn(GND), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(RX_c), .EN(baud_clock), .LAT(GND), .SD(GND), .SLn(VCC) ); // @36:124 SLE \samples[1] ( .Q(samples_Z[1]), .ADn(GND), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(samples_Z[2]), .EN(baud_clock), .LAT(GND), .SD(GND), .SLn(VCC) ); // @36:124 SLE \samples[0] ( .Q(samples_Z[0]), .ADn(GND), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(samples_Z[1]), .EN(baud_clock), .LAT(GND), .SD(GND), .SLn(VCC) ); // @36:298 CFG3 un1_samples6_1_0 ( .A(baud_clock), .B(N_23_mux), .C(rx_bit_cnt_0_sqmuxa_0_a2_Z), .Y(un1_samples6_1_0_Z) ); defparam un1_samples6_1_0.INIT=8'hF8; // @36:285 CFG3 rx_bit_cnt_0_sqmuxa_0_a2 ( .A(rx_state_Z[0]), .B(rx_state_Z[1]), .C(baud_clock), .Y(rx_bit_cnt_0_sqmuxa_0_a2_Z) ); defparam rx_bit_cnt_0_sqmuxa_0_a2.INIT=8'h10; // @36:286 CFG4 \rcv_sm.rx_state18_NE_i ( .A(rx_bit_cnt_Z[1]), .B(rx_state18_NE_i_1), .C(last_bit_Z[1]), .D(rx_bit_cnt_Z[2]), .Y(rx_state18) ); defparam \rcv_sm.rx_state18_NE_i .INIT=16'h2001; // @36:286 CFG4 \rcv_sm.rx_state18_NE_i_1 ( .A(last_bit_Z[3]), .B(last_bit_Z[0]), .C(rx_bit_cnt_Z[3]), .D(rx_bit_cnt_Z[0]), .Y(rx_state18_NE_i_1) ); defparam \rcv_sm.rx_state18_NE_i_1 .INIT=16'h7BDE; // @36:286 CFG4 \rx_state_ns_1_0_.m16_1 ( .A(m16_1_1), .B(rx_state18), .C(rx_state_Z[0]), .D(rx_state_Z[1]), .Y(m16_1) ); defparam \rx_state_ns_1_0_.m16_1 .INIT=16'hF03A; // @36:286 CFG3 \rx_state_ns_1_0_.m16_1_1 ( .A(receive_count_Z[2]), .B(receive_count_Z[1]), .C(framing_error_int_0_sqmuxa_0_a2_0_Z), .Y(m16_1_1) ); defparam \rx_state_ns_1_0_.m16_1_1 .INIT=8'h10; // @36:286 CFG4 \rx_state_ns_1_0_.m16_2 ( .A(rx_state_Z[1]), .B(N_23_mux), .C(i5_mux), .D(m16_1), .Y(rx_state_ns[0]) ); defparam \rx_state_ns_1_0_.m16_2 .INIT=16'hF588; // @36:66 CFG2 clear_parity_en_1_sqmuxa_i_0 ( .A(controlReg2[0]), .B(controlReg2[1]), .Y(clear_parity_en_1_sqmuxa_i) ); defparam clear_parity_en_1_sqmuxa_i_0.INIT=4'hE; // @36:522 CFG2 \receive_full_indicator.fifo_write8_1 ( .A(rx_bit_cnt_Z[0]), .B(rx_bit_cnt_Z[2]), .Y(fifo_write8_1) ); defparam \receive_full_indicator.fifo_write8_1 .INIT=4'h2; // @36:435 CFG2 framing_error_int_0_sqmuxa_0_a2_0 ( .A(CO0), .B(receive_count_Z[3]), .Y(framing_error_int_0_sqmuxa_0_a2_0_Z) ); defparam framing_error_int_0_sqmuxa_0_a2_0.INIT=4'h4; // @36:286 CFG2 \rx_statece[1] ( .A(baud_clock), .B(rx_state_Z[0]), .Y(rx_statece_Z[1]) ); defparam \rx_statece[1] .INIT=4'h8; // @36:325 CFG2 \rcv_sm.rx_byte_2[7] ( .A(controlReg2[0]), .B(rx_shift_Z[7]), .Y(rx_byte_2[7]) ); defparam \rcv_sm.rx_byte_2[7] .INIT=4'h8; // @36:286 CFG2 rx_state_s1_0_a2 ( .A(rx_state_Z[1]), .B(rx_state_Z[0]), .Y(rx_state_19_d) ); defparam rx_state_s1_0_a2.INIT=4'h4; // @36:286 CFG2 rx_state_s2_0_a2 ( .A(rx_state_Z[1]), .B(rx_state_Z[0]), .Y(rx_state_d[2]) ); defparam rx_state_s2_0_a2.INIT=4'h2; // @36:286 CFG2 rx_state_s0_0_a2 ( .A(rx_state_Z[1]), .B(rx_state_Z[0]), .Y(rx_state_s0_0_a2_Z) ); defparam rx_state_s0_0_a2.INIT=4'h1; // @36:101 CFG2 framing_error_0_sqmuxa ( .A(baud_clock), .B(framing_error_int_Z), .Y(framing_error_0_sqmuxa_Z) ); defparam framing_error_0_sqmuxa.INIT=4'h8; // @36:66 CFG2 clear_parity_en_1_sqmuxa ( .A(controlReg2[0]), .B(controlReg2[1]), .Y(clear_parity_en_1_sqmuxa_Z) ); defparam clear_parity_en_1_sqmuxa.INIT=4'h1; // @36:66 CFG2 clear_parity_en_0_sqmuxa ( .A(controlReg2[0]), .B(controlReg2[1]), .Y(clear_parity_en_0_sqmuxa_Z) ); defparam clear_parity_en_0_sqmuxa.INIT=4'h8; // @36:435 CFG2 framing_error_int_0_sqmuxa_0_a2_2 ( .A(receive_count_Z[1]), .B(receive_count_Z[2]), .Y(N_120_1) ); defparam framing_error_int_0_sqmuxa_0_a2_2.INIT=4'h8; // @36:457 CFG2 un1_parity_err_0_sqmuxa_2 ( .A(un1_parity_err_0_sqmuxa_i), .B(un1_parity_err_0_sqmuxa_1_i), .Y(un1_parity_err_0_sqmuxa_2_Z) ); defparam un1_parity_err_0_sqmuxa_2.INIT=4'hE; // @36:192 CFG3 \rcv_cnt.receive_count_3_i_a2_0_1[0] ( .A(receive_count_Z[3]), .B(rx_state_Z[0]), .C(rx_state_Z[1]), .Y(receive_count_3_i_a2_0_1[0]) ); defparam \rcv_cnt.receive_count_3_i_a2_0_1[0] .INIT=8'h40; // @36:460 CFG4 \make_parity_err.parity_err5 ( .A(rx_bit_cnt_Z[3]), .B(rx_bit_cnt_Z[2]), .C(rx_bit_cnt_Z[1]), .D(rx_bit_cnt_Z[0]), .Y(parity_err5) ); defparam \make_parity_err.parity_err5 .INIT=16'h4000; // @36:474 CFG4 \make_parity_err.parity_err15 ( .A(rx_bit_cnt_Z[3]), .B(rx_bit_cnt_Z[2]), .C(rx_bit_cnt_Z[1]), .D(rx_bit_cnt_Z[0]), .Y(parity_err15) ); defparam \make_parity_err.parity_err15 .INIT=16'h0002; // @36:286 CFG3 \rx_state_ns_1_0_.m10 ( .A(N_120_1), .B(receive_count_Z[3]), .C(CO0), .Y(N_24_mux) ); defparam \rx_state_ns_1_0_.m10 .INIT=8'h02; // @36:261 CFG2 \last_bit_RNO[0] ( .A(controlReg2[0]), .B(controlReg2[1]), .Y(N_216_i) ); defparam \last_bit_RNO[0] .INIT=4'h9; // @36:518 CFG3 \receive_full_indicator.fifo_write_8.m5_2_0 ( .A(controlReg2[0]), .B(fifo_write14), .C(controlReg2[1]), .Y(fifo_write_8_2) ); defparam \receive_full_indicator.fifo_write_8.m5_2_0 .INIT=8'h12; // @36:518 CFG4 \receive_full_indicator.fifo_write_8.m5_1_0 ( .A(controlReg2[0]), .B(controlReg2[1]), .C(fifo_write29), .D(fifo_write8), .Y(fifo_write_8_1) ); defparam \receive_full_indicator.fifo_write_8.m5_1_0 .INIT=16'h0189; // @36:397 CFG4 \receive_shift.rx_shift_9_u_1[7] ( .A(rx_shift_Z[8]), .B(rx_shift_Z[7]), .C(controlReg2[1]), .D(controlReg2[0]), .Y(rx_shift_9_1[7]) ); defparam \receive_shift.rx_shift_9_u_1[7] .INIT=16'hA00C; // @36:522 CFG4 \receive_full_indicator.fifo_write8 ( .A(fifo_write8_1), .B(rx_state_19_d), .C(rx_bit_cnt_Z[3]), .D(rx_bit_cnt_Z[1]), .Y(fifo_write8) ); defparam \receive_full_indicator.fifo_write8 .INIT=16'h0080; // @36:303 CFG4 rx_byte_1_sqmuxa ( .A(rx_state_19_d), .B(rx_state18), .C(receive_full), .D(baud_clock), .Y(rx_byte_1_sqmuxa_Z) ); defparam rx_byte_1_sqmuxa.INIT=16'h0800; // @36:192 CFG4 \rcv_cnt.receive_count_3_i_a2_0[3] ( .A(CO0), .B(rx_state_s0_0_a2_Z), .C(receive_count_Z[2]), .D(receive_count_Z[1]), .Y(N_128) ); defparam \rcv_cnt.receive_count_3_i_a2_0[3] .INIT=16'h0004; // @36:143 CFG3 \rcv_cnt.rx_filtered_2_i_o2 ( .A(samples_Z[1]), .B(samples_Z[0]), .C(samples_Z[2]), .Y(rx_filtered_2) ); defparam \rcv_cnt.rx_filtered_2_i_o2 .INIT=8'hE8; // @36:303 CFG3 \rcv_sm.overflow_int_4 ( .A(receive_full), .B(rx_state_19_d), .C(rx_state18), .Y(overflow_int_4) ); defparam \rcv_sm.overflow_int_4 .INIT=8'h80; // @36:564 CFG2 \receive_full_indicator.fifo_write29 ( .A(parity_err5), .B(rx_state_19_d), .Y(fifo_write29) ); defparam \receive_full_indicator.fifo_write29 .INIT=4'h8; // @36:535 CFG2 \receive_full_indicator.fifo_write14 ( .A(parity_err15), .B(rx_state_19_d), .Y(fifo_write14) ); defparam \receive_full_indicator.fifo_write14 .INIT=4'h8; // @36:286 CFG4 \rx_state_ns_1_0_.m8 ( .A(receive_count_Z[3]), .B(receive_count_Z[2]), .C(receive_count_Z[1]), .D(CO0), .Y(N_23_mux) ); defparam \rx_state_ns_1_0_.m8 .INIT=16'h8000; // @36:192 CFG4 \rcv_cnt.receive_count_3_i_x2[3] ( .A(receive_count_Z[3]), .B(receive_count_Z[2]), .C(receive_count_Z[1]), .D(CO0), .Y(N_102_i) ); defparam \rcv_cnt.receive_count_3_i_x2[3] .INIT=16'h9555; // @36:206 CFG3 overflow_1_sqmuxa_i ( .A(baud_clock), .B(read_rx_byte), .C(overflow_int_Z), .Y(overflow_1_sqmuxa_i_Z) ); defparam overflow_1_sqmuxa_i.INIT=8'hB3; // @36:231 CFG3 framing_error_RNO ( .A(baud_clock), .B(read_rx_byte), .C(framing_error_int_Z), .Y(un1_framing_error15_i) ); defparam framing_error_RNO.INIT=8'hB3; // @36:435 CFG4 framing_error_int_0_sqmuxa_0_a2 ( .A(framing_error_int_0_sqmuxa_0_a2_0_Z), .B(N_120_1), .C(rx_state_d[2]), .D(rx_filtered_2), .Y(framing_error_int_0_sqmuxa) ); defparam framing_error_int_0_sqmuxa_0_a2.INIT=16'h0080; // @36:457 CFG4 un1_parity_err_0_sqmuxa ( .A(controlReg2[2]), .B(controlReg2[0]), .C(parity_err5), .D(parity_err15), .Y(un1_parity_err_0_sqmuxa_i) ); defparam un1_parity_err_0_sqmuxa.INIT=16'hA820; // @36:457 CFG4 un1_parity_err_0_sqmuxa_1 ( .A(controlReg2[2]), .B(controlReg2[0]), .C(parity_err5), .D(parity_err15), .Y(un1_parity_err_0_sqmuxa_1_i) ); defparam un1_parity_err_0_sqmuxa_1.INIT=16'h5410; // @36:433 CFG2 \rx_par_calc.rx_parity_calc_2 ( .A(rx_filtered_2), .B(rx_parity_calc_Z), .Y(rx_parity_calc_2) ); defparam \rx_par_calc.rx_parity_calc_2 .INIT=4'h6; // @36:306 CFG2 rx_state_0_sqmuxa_0_a2 ( .A(N_128), .B(receive_count_Z[3]), .Y(rx_state_0_sqmuxa) ); defparam rx_state_0_sqmuxa_0_a2.INIT=4'h8; // @36:285 CFG2 rx_bit_cnt_1_sqmuxa_0_a2 ( .A(N_23_mux), .B(baud_clock), .Y(rx_bit_cnt_1_sqmuxa) ); defparam rx_bit_cnt_1_sqmuxa_0_a2.INIT=4'h8; // @36:431 CFG2 \rx_par_calc.rx_parity_calc5 ( .A(N_23_mux), .B(controlReg2[1]), .Y(rx_parity_calc5) ); defparam \rx_par_calc.rx_parity_calc5 .INIT=4'h8; // @36:435 CFG2 stop_strobe_1_sqmuxa_0_a2 ( .A(N_23_mux), .B(rx_state_d[2]), .Y(stop_strobe_1_sqmuxa) ); defparam stop_strobe_1_sqmuxa_0_a2.INIT=4'h8; // @36:286 CFG4 \rx_state_ns_1_0_.m14 ( .A(samples_Z[2]), .B(samples_Z[0]), .C(N_24_mux), .D(samples_Z[1]), .Y(i5_mux) ); defparam \rx_state_ns_1_0_.m14 .INIT=16'h0107; // @36:192 CFG4 \rcv_cnt.receive_count_3_i_o2[0] ( .A(receive_count_3_i_a2_0_1[0]), .B(N_120_1), .C(rx_state_s0_0_a2_Z), .D(rx_filtered_2), .Y(N_98) ); defparam \rcv_cnt.receive_count_3_i_o2[0] .INIT=16'hF888; // @36:397 CFG3 \receive_shift.rx_shift_9_u_2[7] ( .A(controlReg2[0]), .B(rx_filtered_2), .C(controlReg2[1]), .Y(rx_shift_9_2[7]) ); defparam \receive_shift.rx_shift_9_u_2[7] .INIT=8'h48; // @36:396 CFG3 \un1_rx_bit_cnt_1.CO1 ( .A(rx_bit_cnt_Z[0]), .B(rx_bit_cnt_1_sqmuxa), .C(rx_bit_cnt_Z[1]), .Y(CO1) ); defparam \un1_rx_bit_cnt_1.CO1 .INIT=8'h80; // @36:286 CFG3 \rx_state_ns_1_0_.m18 ( .A(rx_state18), .B(i5_mux), .C(rx_state_Z[1]), .Y(i9_mux_0) ); defparam \rx_state_ns_1_0_.m18 .INIT=8'hCA; // @36:386 CFG3 \receive_shift.rx_bit_cnt_4[0] ( .A(rx_bit_cnt_0_sqmuxa_0_a2_Z), .B(rx_bit_cnt_1_sqmuxa), .C(rx_bit_cnt_Z[0]), .Y(rx_bit_cnt_4[0]) ); defparam \receive_shift.rx_bit_cnt_4[0] .INIT=8'h14; // @36:181 CFG4 \receive_count_RNO[3] ( .A(rx_filtered_2), .B(N_128), .C(N_102_i), .D(rx_state_s0_0_a2_Z), .Y(N_95_i) ); defparam \receive_count_RNO[3] .INIT=16'h0103; // @36:435 CFG4 \rx_par_calc.rx_parity_calc_4_u ( .A(rx_state_d[2]), .B(rx_parity_calc_Z), .C(rx_parity_calc5), .D(rx_parity_calc_2), .Y(rx_parity_calc_4) ); defparam \rx_par_calc.rx_parity_calc_4_u .INIT=16'h5404; // @36:492 CFG4 \make_parity_err.parity_err_12_iv ( .A(un1_parity_err_0_sqmuxa_1_i), .B(rx_parity_calc_2), .C(read_rx_byte), .D(un1_parity_err_0_sqmuxa_i), .Y(parity_err_12) ); defparam \make_parity_err.parity_err_12_iv .INIT=16'hB080; // @36:386 CFG4 \receive_shift.rx_bit_cnt_4[1] ( .A(rx_bit_cnt_0_sqmuxa_0_a2_Z), .B(rx_bit_cnt_1_sqmuxa), .C(rx_bit_cnt_Z[1]), .D(rx_bit_cnt_Z[0]), .Y(rx_bit_cnt_4[1]) ); defparam \receive_shift.rx_bit_cnt_4[1] .INIT=16'h1450; // @36:447 CFG4 parity_err_1_sqmuxa_i ( .A(rx_bit_cnt_1_sqmuxa), .B(read_rx_byte), .C(controlReg2[1]), .D(un1_parity_err_0_sqmuxa_2_Z), .Y(parity_err_1_sqmuxa_i_Z) ); defparam parity_err_1_sqmuxa_i.INIT=16'hB333; // @36:501 CFG4 receive_full_int_1_sqmuxa_i ( .A(fifo_write_8_1), .B(read_rx_byte), .C(baud_clock), .D(fifo_write_8_2), .Y(receive_full_int_1_sqmuxa_i_Z) ); defparam receive_full_int_1_sqmuxa_i.INIT=16'h3373; // @36:181 CFG3 \receive_count_RNO[0] ( .A(N_98), .B(CO0), .C(rx_state_0_sqmuxa), .Y(N_89_i) ); defparam \receive_count_RNO[0] .INIT=8'h01; // @36:181 CFG4 \receive_count_RNO[2] ( .A(receive_count_Z[1]), .B(receive_count_Z[2]), .C(N_98), .D(CO0), .Y(N_93_i) ); defparam \receive_count_RNO[2] .INIT=16'h060C; // @36:181 CFG3 \receive_count_RNO[1] ( .A(N_98), .B(receive_count_Z[1]), .C(CO0), .Y(N_91_i) ); defparam \receive_count_RNO[1] .INIT=8'h14; // @36:386 CFG3 \receive_shift.rx_bit_cnt_4[2] ( .A(rx_bit_cnt_0_sqmuxa_0_a2_Z), .B(CO1), .C(rx_bit_cnt_Z[2]), .Y(rx_bit_cnt_4[2]) ); defparam \receive_shift.rx_bit_cnt_4[2] .INIT=8'h14; // @36:386 CFG4 \receive_shift.rx_bit_cnt_4[3] ( .A(rx_bit_cnt_0_sqmuxa_0_a2_Z), .B(CO1), .C(rx_bit_cnt_Z[3]), .D(rx_bit_cnt_Z[2]), .Y(rx_bit_cnt_4[3]) ); defparam \receive_shift.rx_bit_cnt_4[3] .INIT=16'h1450; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CoreUARTapb_0_CoreUARTapb_0_0_Rx_async_0s_0s_0s_1s_2s_3s */ module CoreUARTapb_0_CoreUARTapb_0_0_COREUART_0s_0s_0s_26s_0s_0s ( data_out, controlReg2, controlReg1, CoreAPB3_0_0_APBmslave0_PADDR, PADDR_0, CoreAPB3_0_0_APBmslave0_PWDATA, wrdata_0, OVERFLOW, FRAMING_ERR, PARITY_ERR, RX_c, TXRDY, TX_c, CoreAPB3_0_0_APBmslave0_PWRITE, CoreAPB3_0_0_APBmslave0_PENABLE, CoreAPB3_0_0_APBmslave1_PSELx, PF_CCC_0_0_OUT0_FABCLK_0, dff, RXRDY ) ; output [7:0] data_out ; input [7:0] controlReg2 ; input [7:0] controlReg1 ; input [3:2] CoreAPB3_0_0_APBmslave0_PADDR ; input PADDR_0 ; input [7:1] CoreAPB3_0_0_APBmslave0_PWDATA ; input wrdata_0 ; output OVERFLOW ; output FRAMING_ERR ; output PARITY_ERR ; input RX_c ; output TXRDY ; output TX_c ; input CoreAPB3_0_0_APBmslave0_PWRITE ; input CoreAPB3_0_0_APBmslave0_PENABLE ; input CoreAPB3_0_0_APBmslave1_PSELx ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input dff ; output RXRDY ; wire PADDR_0 ; wire wrdata_0 ; wire OVERFLOW ; wire FRAMING_ERR ; wire PARITY_ERR ; wire RX_c ; wire TXRDY ; wire TX_c ; wire CoreAPB3_0_0_APBmslave0_PWRITE ; wire CoreAPB3_0_0_APBmslave0_PENABLE ; wire CoreAPB3_0_0_APBmslave1_PSELx ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire dff ; wire RXRDY ; wire [7:0] tx_hold_reg_Z; wire VCC ; wire receive_full ; wire RXRDY5 ; wire GND ; wire tx_hold_reg4 ; wire tx_hold_reg4_0 ; wire tx_hold_reg4_i ; wire stop_strobe ; wire un1_read_rx_byte_1_Z ; wire read_rx_byte ; wire xmit_pulse ; wire xmit_clock ; wire baud_clock ; // @39:234 SLE \genblk1.RXRDY ( .Q(RXRDY), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(receive_full), .EN(RXRDY5), .LAT(GND), .SD(GND), .SLn(VCC) ); // @39:159 SLE \tx_hold_reg[6] ( .Q(tx_hold_reg_Z[6]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(tx_hold_reg4), .LAT(GND), .SD(GND), .SLn(VCC) ); // @39:159 SLE \tx_hold_reg[5] ( .Q(tx_hold_reg_Z[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(tx_hold_reg4), .LAT(GND), .SD(GND), .SLn(VCC) ); // @39:159 SLE \tx_hold_reg[4] ( .Q(tx_hold_reg_Z[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(tx_hold_reg4), .LAT(GND), .SD(GND), .SLn(VCC) ); // @39:159 SLE \tx_hold_reg[3] ( .Q(tx_hold_reg_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(tx_hold_reg4), .LAT(GND), .SD(GND), .SLn(VCC) ); // @39:159 SLE \tx_hold_reg[2] ( .Q(tx_hold_reg_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(tx_hold_reg4), .LAT(GND), .SD(GND), .SLn(VCC) ); // @39:159 SLE \tx_hold_reg[1] ( .Q(tx_hold_reg_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(tx_hold_reg4), .LAT(GND), .SD(GND), .SLn(VCC) ); // @39:159 SLE \tx_hold_reg[0] ( .Q(tx_hold_reg_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(tx_hold_reg4), .LAT(GND), .SD(GND), .SLn(VCC) ); // @39:159 SLE \tx_hold_reg[7] ( .Q(tx_hold_reg_Z[7]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .EN(tx_hold_reg4), .LAT(GND), .SD(GND), .SLn(VCC) ); // @39:169 CFG3 \reg_write.tx_hold_reg4_i_0 ( .A(CoreAPB3_0_0_APBmslave1_PSELx), .B(tx_hold_reg4_0), .C(CoreAPB3_0_0_APBmslave0_PENABLE), .Y(tx_hold_reg4_i) ); defparam \reg_write.tx_hold_reg4_i_0 .INIT=8'h7F; // @39:242 CFG2 \genblk1.RXRDY5 ( .A(receive_full), .B(stop_strobe), .Y(RXRDY5) ); defparam \genblk1.RXRDY5 .INIT=4'hD; // @39:169 CFG4 \reg_write.tx_hold_reg4_0_0 ( .A(PADDR_0), .B(CoreAPB3_0_0_APBmslave0_PADDR[2]), .C(CoreAPB3_0_0_APBmslave0_PADDR[3]), .D(CoreAPB3_0_0_APBmslave0_PWRITE), .Y(tx_hold_reg4_0) ); defparam \reg_write.tx_hold_reg4_0_0 .INIT=16'h0100; // @39:204 CFG4 un1_read_rx_byte_1 ( .A(PADDR_0), .B(CoreAPB3_0_0_APBmslave0_PADDR[2]), .C(CoreAPB3_0_0_APBmslave0_PADDR[3]), .D(CoreAPB3_0_0_APBmslave0_PWRITE), .Y(un1_read_rx_byte_1_Z) ); defparam un1_read_rx_byte_1.INIT=16'h0004; // @39:204 CFG3 un1_read_rx_byte ( .A(CoreAPB3_0_0_APBmslave1_PSELx), .B(un1_read_rx_byte_1_Z), .C(CoreAPB3_0_0_APBmslave0_PENABLE), .Y(read_rx_byte) ); defparam un1_read_rx_byte.INIT=8'h7F; // @39:169 CFG3 \reg_write.tx_hold_reg4 ( .A(CoreAPB3_0_0_APBmslave1_PSELx), .B(tx_hold_reg4_0), .C(CoreAPB3_0_0_APBmslave0_PENABLE), .Y(tx_hold_reg4) ); defparam \reg_write.tx_hold_reg4 .INIT=8'h80; // @39:413 CoreUARTapb_0_CoreUARTapb_0_0_Clock_gen_0s_0s make_CLOCK_GEN ( .controlReg2(controlReg2[7:3]), .controlReg1(controlReg1[7:0]), .xmit_pulse_1z(xmit_pulse), .xmit_clock_1z(xmit_clock), .baud_clock(baud_clock), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .dff(dff) ); // @39:424 CoreUARTapb_0_CoreUARTapb_0_0_Tx_async_0s_0s_0s_1s_2s_3s_4s_5s_6s make_TX ( .controlReg2(controlReg2[2:0]), .tx_hold_reg(tx_hold_reg_Z[7:0]), .tx_hold_reg4(tx_hold_reg4), .baud_clock(baud_clock), .xmit_clock(xmit_clock), .xmit_pulse(xmit_pulse), .TX_c(TX_c), .tx_hold_reg4_i(tx_hold_reg4_i), .TXRDY(TXRDY), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .dff(dff) ); // @39:443 CoreUARTapb_0_CoreUARTapb_0_0_Rx_async_0s_0s_0s_1s_2s_3s make_RX ( .controlReg2(controlReg2[2:0]), .data_out(data_out[7:0]), .RX_c(RX_c), .receive_full(receive_full), .PARITY_ERR(PARITY_ERR), .baud_clock(baud_clock), .stop_strobe_1z(stop_strobe), .FRAMING_ERR(FRAMING_ERR), .read_rx_byte(read_rx_byte), .OVERFLOW(OVERFLOW), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .dff(dff) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CoreUARTapb_0_CoreUARTapb_0_0_COREUART_0s_0s_0s_26s_0s_0s */ module CoreUARTapb_0_CoreUARTapb_0_0_CoreUARTapb_Z13 ( PADDR_0, CoreAPB3_0_0_APBmslave0_PADDR, CoreAPB3_0_0_APBmslave1_PRDATA, CoreAPB3_0_0_APBmslave0_PWDATA, wrdata_0, TX_c, RX_c, CoreAPB3_0_0_APBmslave0_PENABLE, CoreAPB3_0_0_APBmslave1_PSELx, CoreAPB3_0_0_APBmslave0_PWRITE, PF_CCC_0_0_OUT0_FABCLK_0, dff ) ; input PADDR_0 ; input [3:2] CoreAPB3_0_0_APBmslave0_PADDR ; output [7:0] CoreAPB3_0_0_APBmslave1_PRDATA ; input [7:1] CoreAPB3_0_0_APBmslave0_PWDATA ; input wrdata_0 ; output TX_c ; input RX_c ; input CoreAPB3_0_0_APBmslave0_PENABLE ; input CoreAPB3_0_0_APBmslave1_PSELx ; input CoreAPB3_0_0_APBmslave0_PWRITE ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input dff ; wire PADDR_0 ; wire wrdata_0 ; wire TX_c ; wire RX_c ; wire CoreAPB3_0_0_APBmslave0_PENABLE ; wire CoreAPB3_0_0_APBmslave1_PSELx ; wire CoreAPB3_0_0_APBmslave0_PWRITE ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire dff ; wire [7:0] controlReg2_Z; wire [7:0] NxtPrdata; wire [7:0] controlReg1_Z; wire [7:0] NxtPrdata_5_1_Z; wire [7:0] data_out; wire [4:0] NxtPrdata_5_1_1_Z; wire VCC ; wire controlReg25 ; wire GND ; wire un1_NxtPrdata23_i ; wire controlReg15 ; wire TXRDY ; wire OVERFLOW ; wire FRAMING_ERR ; wire RXRDY ; wire PARITY_ERR ; wire controlReg15_0 ; wire un1_NxtPrdata23_0_Z ; wire controlReg15_1 ; // @40:267 SLE \controlReg2[1] ( .Q(controlReg2_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(controlReg25), .LAT(GND), .SD(GND), .SLn(VCC) ); // @40:267 SLE \controlReg2[0] ( .Q(controlReg2_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(controlReg25), .LAT(GND), .SD(GND), .SLn(VCC) ); // @40:231 SLE \iPRDATA[0] ( .Q(CoreAPB3_0_0_APBmslave1_PRDATA[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(NxtPrdata[0]), .EN(un1_NxtPrdata23_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @40:246 SLE \controlReg1[7] ( .Q(controlReg1_Z[7]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .EN(controlReg15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @40:246 SLE \controlReg1[6] ( .Q(controlReg1_Z[6]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(controlReg15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @40:246 SLE \controlReg1[5] ( .Q(controlReg1_Z[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(controlReg15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @40:246 SLE \controlReg1[4] ( .Q(controlReg1_Z[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(controlReg15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @40:246 SLE \controlReg1[3] ( .Q(controlReg1_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(controlReg15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @40:246 SLE \controlReg1[2] ( .Q(controlReg1_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(controlReg15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @40:246 SLE \controlReg1[1] ( .Q(controlReg1_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(controlReg15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @40:246 SLE \controlReg1[0] ( .Q(controlReg1_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(controlReg15), .LAT(GND), .SD(GND), .SLn(VCC) ); // @40:267 SLE \controlReg2[7] ( .Q(controlReg2_Z[7]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .EN(controlReg25), .LAT(GND), .SD(GND), .SLn(VCC) ); // @40:267 SLE \controlReg2[6] ( .Q(controlReg2_Z[6]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(controlReg25), .LAT(GND), .SD(GND), .SLn(VCC) ); // @40:267 SLE \controlReg2[5] ( .Q(controlReg2_Z[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(controlReg25), .LAT(GND), .SD(GND), .SLn(VCC) ); // @40:267 SLE \controlReg2[4] ( .Q(controlReg2_Z[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(controlReg25), .LAT(GND), .SD(GND), .SLn(VCC) ); // @40:267 SLE \controlReg2[3] ( .Q(controlReg2_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(controlReg25), .LAT(GND), .SD(GND), .SLn(VCC) ); // @40:267 SLE \controlReg2[2] ( .Q(controlReg2_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(controlReg25), .LAT(GND), .SD(GND), .SLn(VCC) ); // @40:231 SLE \iPRDATA[7] ( .Q(CoreAPB3_0_0_APBmslave1_PRDATA[7]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(NxtPrdata[7]), .EN(un1_NxtPrdata23_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @40:231 SLE \iPRDATA[6] ( .Q(CoreAPB3_0_0_APBmslave1_PRDATA[6]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(NxtPrdata[6]), .EN(un1_NxtPrdata23_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @40:231 SLE \iPRDATA[5] ( .Q(CoreAPB3_0_0_APBmslave1_PRDATA[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(NxtPrdata[5]), .EN(un1_NxtPrdata23_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @40:231 SLE \iPRDATA[4] ( .Q(CoreAPB3_0_0_APBmslave1_PRDATA[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(NxtPrdata[4]), .EN(un1_NxtPrdata23_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @40:231 SLE \iPRDATA[3] ( .Q(CoreAPB3_0_0_APBmslave1_PRDATA[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(NxtPrdata[3]), .EN(un1_NxtPrdata23_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @40:231 SLE \iPRDATA[2] ( .Q(CoreAPB3_0_0_APBmslave1_PRDATA[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(NxtPrdata[2]), .EN(un1_NxtPrdata23_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @40:231 SLE \iPRDATA[1] ( .Q(CoreAPB3_0_0_APBmslave1_PRDATA[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(NxtPrdata[1]), .EN(un1_NxtPrdata23_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @40:209 CFG4 \NxtPrdata_5[7] ( .A(controlReg2_Z[7]), .B(CoreAPB3_0_0_APBmslave0_PADDR[2]), .C(CoreAPB3_0_0_APBmslave0_PADDR[3]), .D(NxtPrdata_5_1_Z[7]), .Y(NxtPrdata[7]) ); defparam \NxtPrdata_5[7] .INIT=16'h8CB0; // @40:209 CFG4 \NxtPrdata_5_1[7] ( .A(data_out[7]), .B(controlReg1_Z[7]), .C(PADDR_0), .D(CoreAPB3_0_0_APBmslave0_PADDR[2]), .Y(NxtPrdata_5_1_Z[7]) ); defparam \NxtPrdata_5_1[7] .INIT=16'h0A33; // @40:209 CFG4 \NxtPrdata_5[5] ( .A(controlReg2_Z[5]), .B(CoreAPB3_0_0_APBmslave0_PADDR[2]), .C(CoreAPB3_0_0_APBmslave0_PADDR[3]), .D(NxtPrdata_5_1_Z[5]), .Y(NxtPrdata[5]) ); defparam \NxtPrdata_5[5] .INIT=16'h8CB0; // @40:209 CFG4 \NxtPrdata_5_1[5] ( .A(data_out[5]), .B(controlReg1_Z[5]), .C(PADDR_0), .D(CoreAPB3_0_0_APBmslave0_PADDR[2]), .Y(NxtPrdata_5_1_Z[5]) ); defparam \NxtPrdata_5_1[5] .INIT=16'h0A33; // @40:209 CFG4 \NxtPrdata_5[6] ( .A(controlReg2_Z[6]), .B(CoreAPB3_0_0_APBmslave0_PADDR[2]), .C(CoreAPB3_0_0_APBmslave0_PADDR[3]), .D(NxtPrdata_5_1_Z[6]), .Y(NxtPrdata[6]) ); defparam \NxtPrdata_5[6] .INIT=16'h8CB0; // @40:209 CFG4 \NxtPrdata_5_1[6] ( .A(data_out[6]), .B(controlReg1_Z[6]), .C(PADDR_0), .D(CoreAPB3_0_0_APBmslave0_PADDR[2]), .Y(NxtPrdata_5_1_Z[6]) ); defparam \NxtPrdata_5_1[6] .INIT=16'h0A33; // @40:209 CFG4 \NxtPrdata_5_1[0] ( .A(PADDR_0), .B(CoreAPB3_0_0_APBmslave0_PADDR[2]), .C(CoreAPB3_0_0_APBmslave0_PADDR[3]), .D(NxtPrdata_5_1_1_Z[0]), .Y(NxtPrdata_5_1_Z[0]) ); defparam \NxtPrdata_5_1[0] .INIT=16'hC0C6; // @40:209 CFG3 \NxtPrdata_5_1_1[0] ( .A(data_out[0]), .B(TXRDY), .C(PADDR_0), .Y(NxtPrdata_5_1_1_Z[0]) ); defparam \NxtPrdata_5_1_1[0] .INIT=8'h35; // @40:209 CFG4 \NxtPrdata_5_1[3] ( .A(PADDR_0), .B(CoreAPB3_0_0_APBmslave0_PADDR[2]), .C(CoreAPB3_0_0_APBmslave0_PADDR[3]), .D(NxtPrdata_5_1_1_Z[3]), .Y(NxtPrdata_5_1_Z[3]) ); defparam \NxtPrdata_5_1[3] .INIT=16'hC0C6; // @40:209 CFG3 \NxtPrdata_5_1_1[3] ( .A(PADDR_0), .B(data_out[3]), .C(OVERFLOW), .Y(NxtPrdata_5_1_1_Z[3]) ); defparam \NxtPrdata_5_1_1[3] .INIT=8'h1B; // @40:209 CFG4 \NxtPrdata_5_1[4] ( .A(PADDR_0), .B(CoreAPB3_0_0_APBmslave0_PADDR[2]), .C(CoreAPB3_0_0_APBmslave0_PADDR[3]), .D(NxtPrdata_5_1_1_Z[4]), .Y(NxtPrdata_5_1_Z[4]) ); defparam \NxtPrdata_5_1[4] .INIT=16'hC0C6; // @40:209 CFG3 \NxtPrdata_5_1_1[4] ( .A(PADDR_0), .B(data_out[4]), .C(FRAMING_ERR), .Y(NxtPrdata_5_1_1_Z[4]) ); defparam \NxtPrdata_5_1_1[4] .INIT=8'h1B; // @40:209 CFG4 \NxtPrdata_5_1[1] ( .A(PADDR_0), .B(CoreAPB3_0_0_APBmslave0_PADDR[2]), .C(CoreAPB3_0_0_APBmslave0_PADDR[3]), .D(NxtPrdata_5_1_1_Z[1]), .Y(NxtPrdata_5_1_Z[1]) ); defparam \NxtPrdata_5_1[1] .INIT=16'hC0C6; // @40:209 CFG3 \NxtPrdata_5_1_1[1] ( .A(data_out[1]), .B(RXRDY), .C(PADDR_0), .Y(NxtPrdata_5_1_1_Z[1]) ); defparam \NxtPrdata_5_1_1[1] .INIT=8'h35; // @40:209 CFG4 \NxtPrdata_5_1[2] ( .A(PADDR_0), .B(CoreAPB3_0_0_APBmslave0_PADDR[2]), .C(CoreAPB3_0_0_APBmslave0_PADDR[3]), .D(NxtPrdata_5_1_1_Z[2]), .Y(NxtPrdata_5_1_Z[2]) ); defparam \NxtPrdata_5_1[2] .INIT=16'hC0C6; // @40:209 CFG3 \NxtPrdata_5_1_1[2] ( .A(data_out[2]), .B(PARITY_ERR), .C(PADDR_0), .Y(NxtPrdata_5_1_1_Z[2]) ); defparam \NxtPrdata_5_1_1[2] .INIT=8'h35; // @40:209 CFG4 \NxtPrdata_5_2[2] ( .A(CoreAPB3_0_0_APBmslave0_PADDR[3]), .B(NxtPrdata_5_1_Z[2]), .C(controlReg1_Z[2]), .D(controlReg2_Z[2]), .Y(NxtPrdata[2]) ); defparam \NxtPrdata_5_2[2] .INIT=16'hEC64; // @40:209 CFG4 \NxtPrdata_5_2[1] ( .A(CoreAPB3_0_0_APBmslave0_PADDR[3]), .B(NxtPrdata_5_1_Z[1]), .C(controlReg1_Z[1]), .D(controlReg2_Z[1]), .Y(NxtPrdata[1]) ); defparam \NxtPrdata_5_2[1] .INIT=16'hEC64; // @40:209 CFG4 \NxtPrdata_5_2[4] ( .A(CoreAPB3_0_0_APBmslave0_PADDR[3]), .B(NxtPrdata_5_1_Z[4]), .C(controlReg2_Z[4]), .D(controlReg1_Z[4]), .Y(NxtPrdata[4]) ); defparam \NxtPrdata_5_2[4] .INIT=16'hE6C4; // @40:209 CFG4 \NxtPrdata_5_2[3] ( .A(CoreAPB3_0_0_APBmslave0_PADDR[3]), .B(NxtPrdata_5_1_Z[3]), .C(controlReg2_Z[3]), .D(controlReg1_Z[3]), .Y(NxtPrdata[3]) ); defparam \NxtPrdata_5_2[3] .INIT=16'hE6C4; // @40:209 CFG4 \NxtPrdata_5_2[0] ( .A(CoreAPB3_0_0_APBmslave0_PADDR[3]), .B(NxtPrdata_5_1_Z[0]), .C(controlReg1_Z[0]), .D(controlReg2_Z[0]), .Y(NxtPrdata[0]) ); defparam \NxtPrdata_5_2[0] .INIT=16'hEC64; // @40:251 CFG2 \p_CtrlReg1Seq.controlReg15_0 ( .A(CoreAPB3_0_0_APBmslave0_PADDR[3]), .B(PADDR_0), .Y(controlReg15_0) ); defparam \p_CtrlReg1Seq.controlReg15_0 .INIT=4'h2; // @40:209 CFG3 un1_NxtPrdata23_0 ( .A(PADDR_0), .B(CoreAPB3_0_0_APBmslave0_PADDR[3]), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .Y(un1_NxtPrdata23_0_Z) ); defparam un1_NxtPrdata23_0.INIT=8'hF8; // @40:251 CFG2 \p_CtrlReg1Seq.controlReg15_1 ( .A(CoreAPB3_0_0_APBmslave1_PSELx), .B(CoreAPB3_0_0_APBmslave0_PENABLE), .Y(controlReg15_1) ); defparam \p_CtrlReg1Seq.controlReg15_1 .INIT=4'h8; // @40:272 CFG4 \p_CtrlReg2Seq.controlReg25 ( .A(CoreAPB3_0_0_APBmslave0_PWRITE), .B(CoreAPB3_0_0_APBmslave0_PADDR[2]), .C(controlReg15_1), .D(controlReg15_0), .Y(controlReg25) ); defparam \p_CtrlReg2Seq.controlReg25 .INIT=16'h8000; // @40:251 CFG4 \p_CtrlReg1Seq.controlReg15 ( .A(CoreAPB3_0_0_APBmslave0_PWRITE), .B(CoreAPB3_0_0_APBmslave0_PADDR[2]), .C(controlReg15_1), .D(controlReg15_0), .Y(controlReg15) ); defparam \p_CtrlReg1Seq.controlReg15 .INIT=16'h2000; // @40:231 CFG4 un1_NxtPrdata23_0_RNI6GCHA ( .A(PARITY_ERR), .B(un1_NxtPrdata23_0_Z), .C(CoreAPB3_0_0_APBmslave0_PENABLE), .D(CoreAPB3_0_0_APBmslave1_PSELx), .Y(un1_NxtPrdata23_i) ); defparam un1_NxtPrdata23_0_RNI6GCHA.INIT=16'h2300; // @40:336 CoreUARTapb_0_CoreUARTapb_0_0_COREUART_0s_0s_0s_26s_0s_0s uUART ( .data_out(data_out[7:0]), .controlReg2(controlReg2_Z[7:0]), .controlReg1(controlReg1_Z[7:0]), .CoreAPB3_0_0_APBmslave0_PADDR(CoreAPB3_0_0_APBmslave0_PADDR[3:2]), .PADDR_0(PADDR_0), .CoreAPB3_0_0_APBmslave0_PWDATA(CoreAPB3_0_0_APBmslave0_PWDATA[7:1]), .wrdata_0(wrdata_0), .OVERFLOW(OVERFLOW), .FRAMING_ERR(FRAMING_ERR), .PARITY_ERR(PARITY_ERR), .RX_c(RX_c), .TXRDY(TXRDY), .TX_c(TX_c), .CoreAPB3_0_0_APBmslave0_PWRITE(CoreAPB3_0_0_APBmslave0_PWRITE), .CoreAPB3_0_0_APBmslave0_PENABLE(CoreAPB3_0_0_APBmslave0_PENABLE), .CoreAPB3_0_0_APBmslave1_PSELx(CoreAPB3_0_0_APBmslave1_PSELx), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .dff(dff), .RXRDY(RXRDY) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CoreUARTapb_0_CoreUARTapb_0_0_CoreUARTapb_Z13 */ module CoreUARTapb_0 ( wrdata_0, CoreAPB3_0_0_APBmslave0_PWDATA, CoreAPB3_0_0_APBmslave1_PRDATA, CoreAPB3_0_0_APBmslave0_PADDR, PADDR_0, dff, PF_CCC_0_0_OUT0_FABCLK_0, CoreAPB3_0_0_APBmslave0_PWRITE, CoreAPB3_0_0_APBmslave1_PSELx, CoreAPB3_0_0_APBmslave0_PENABLE, RX_c, TX_c ) ; input wrdata_0 ; input [7:1] CoreAPB3_0_0_APBmslave0_PWDATA ; output [7:0] CoreAPB3_0_0_APBmslave1_PRDATA ; input [3:2] CoreAPB3_0_0_APBmslave0_PADDR ; input PADDR_0 ; input dff ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input CoreAPB3_0_0_APBmslave0_PWRITE ; input CoreAPB3_0_0_APBmslave1_PSELx ; input CoreAPB3_0_0_APBmslave0_PENABLE ; input RX_c ; output TX_c ; wire wrdata_0 ; wire PADDR_0 ; wire dff ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire CoreAPB3_0_0_APBmslave0_PWRITE ; wire CoreAPB3_0_0_APBmslave1_PSELx ; wire CoreAPB3_0_0_APBmslave0_PENABLE ; wire RX_c ; wire TX_c ; wire GND ; wire VCC ; // @41:141 CoreUARTapb_0_CoreUARTapb_0_0_CoreUARTapb_Z13 CoreUARTapb_0_0 ( .PADDR_0(PADDR_0), .CoreAPB3_0_0_APBmslave0_PADDR(CoreAPB3_0_0_APBmslave0_PADDR[3:2]), .CoreAPB3_0_0_APBmslave1_PRDATA(CoreAPB3_0_0_APBmslave1_PRDATA[7:0]), .CoreAPB3_0_0_APBmslave0_PWDATA(CoreAPB3_0_0_APBmslave0_PWDATA[7:1]), .wrdata_0(wrdata_0), .TX_c(TX_c), .RX_c(RX_c), .CoreAPB3_0_0_APBmslave0_PENABLE(CoreAPB3_0_0_APBmslave0_PENABLE), .CoreAPB3_0_0_APBmslave1_PSELx(CoreAPB3_0_0_APBmslave1_PSELx), .CoreAPB3_0_0_APBmslave0_PWRITE(CoreAPB3_0_0_APBmslave0_PWRITE), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .dff(dff) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CoreUARTapb_0 */ module fifo_to_tpsram_bridge ( COREFIFO_C0_0_Q, fifo_to_tpsram_bridge_0_ram_w_addr_4, fifo_to_tpsram_bridge_0_ram_w_en, N_976_i, COREFIFO_C0_0_EMPTY, PF_CCC_0_0_OUT0_FABCLK_0, AND2_2_Y ) ; input [31:0] COREFIFO_C0_0_Q ; output [10:0] fifo_to_tpsram_bridge_0_ram_w_addr_4 ; output fifo_to_tpsram_bridge_0_ram_w_en ; output N_976_i ; input COREFIFO_C0_0_EMPTY ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input AND2_2_Y ; wire fifo_to_tpsram_bridge_0_ram_w_en ; wire N_976_i ; wire COREFIFO_C0_0_EMPTY ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire AND2_2_Y ; wire [10:0] ram_w_addr_s; wire [1:0] state_Z; wire [1:1] state_ns; wire [1:1] state_RNIL1B5B_S; wire [1:1] state_RNIL1B5B_Y; wire [9:0] ram_w_addr_cry; wire [0:0] ram_w_addr_RNIRNR271_Y; wire [1:1] ram_w_addr_RNIPDHRA1_Y; wire [2:2] ram_w_addr_RNIO47KE1_Y; wire [3:3] ram_w_addr_RNIOSSCI1_Y; wire [4:4] ram_w_addr_RNIPLI5M1_Y; wire [5:5] ram_w_addr_RNIRF8UP1_Y; wire [6:6] ram_w_addr_RNIUAUMT1_Y; wire [7:7] ram_w_addr_RNI27KF12_Y; wire [8:8] ram_w_addr_RNI74A852_Y; wire [10:10] ram_w_addr_RNO_FCO; wire [10:10] ram_w_addr_RNO_Y; wire [9:9] ram_w_addr_RNID20192_Y; wire VCC ; wire un1_fifo_data_out_1_i ; wire GND ; wire buffer_full_Z ; wire buffer_full_0_sqmuxa_Z ; wire N_55_i ; wire ram_w_addr_lcry_cy ; wire ram_w_addr ; wire buffer_full6_5_RNIU26A31_S ; wire buffer_full6_5_RNIU26A31_Y ; wire buffer_full6_5_Z ; wire buffer_full6_6_Z ; wire buffer_full6_7_Z ; wire N_964_i ; wire N_139 ; wire un1_fifo_data_out_1_23_Z ; wire un1_fifo_data_out_1_22_Z ; wire un1_fifo_data_out_1_21_Z ; wire un1_fifo_data_out_1_20_Z ; wire un1_fifo_data_out_1_19_Z ; wire un1_fifo_data_out_1_18_Z ; wire un1_fifo_data_out_1_17_Z ; wire un1_fifo_data_out_1_16_Z ; wire next_state11_23_Z ; wire next_state11_22_Z ; wire next_state11_21_Z ; wire next_state11_20_Z ; wire next_state11_19_Z ; wire next_state11_18_Z ; wire next_state11_17_Z ; wire next_state11_16_Z ; wire N_995 ; wire next_state11_Z ; wire un1_fifo_data_out_1_29_Z ; wire un1_fifo_data_out_1_28_Z ; wire next_state11_29_Z ; wire next_state11_28_Z ; wire N_6 ; wire N_5 ; wire N_4 ; // @72:49 SLE \ram_w_addr[10] ( .Q(fifo_to_tpsram_bridge_0_ram_w_addr_4[10]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ram_w_addr_s[10]), .EN(un1_fifo_data_out_1_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @72:49 SLE \ram_w_addr[9] ( .Q(fifo_to_tpsram_bridge_0_ram_w_addr_4[9]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ram_w_addr_s[9]), .EN(un1_fifo_data_out_1_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @72:49 SLE \ram_w_addr[8] ( .Q(fifo_to_tpsram_bridge_0_ram_w_addr_4[8]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ram_w_addr_s[8]), .EN(un1_fifo_data_out_1_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @72:49 SLE \ram_w_addr[7] ( .Q(fifo_to_tpsram_bridge_0_ram_w_addr_4[7]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ram_w_addr_s[7]), .EN(un1_fifo_data_out_1_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @72:49 SLE \ram_w_addr[6] ( .Q(fifo_to_tpsram_bridge_0_ram_w_addr_4[6]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ram_w_addr_s[6]), .EN(un1_fifo_data_out_1_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @72:49 SLE \ram_w_addr[5] ( .Q(fifo_to_tpsram_bridge_0_ram_w_addr_4[5]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ram_w_addr_s[5]), .EN(un1_fifo_data_out_1_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @72:49 SLE \ram_w_addr[4] ( .Q(fifo_to_tpsram_bridge_0_ram_w_addr_4[4]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ram_w_addr_s[4]), .EN(un1_fifo_data_out_1_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @72:49 SLE \ram_w_addr[3] ( .Q(fifo_to_tpsram_bridge_0_ram_w_addr_4[3]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ram_w_addr_s[3]), .EN(un1_fifo_data_out_1_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @72:49 SLE \ram_w_addr[2] ( .Q(fifo_to_tpsram_bridge_0_ram_w_addr_4[2]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ram_w_addr_s[2]), .EN(un1_fifo_data_out_1_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @72:49 SLE \ram_w_addr[1] ( .Q(fifo_to_tpsram_bridge_0_ram_w_addr_4[1]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ram_w_addr_s[1]), .EN(un1_fifo_data_out_1_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @72:49 SLE \ram_w_addr[0] ( .Q(fifo_to_tpsram_bridge_0_ram_w_addr_4[0]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ram_w_addr_s[0]), .EN(un1_fifo_data_out_1_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @72:49 SLE buffer_full ( .Q(buffer_full_Z), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(buffer_full_0_sqmuxa_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @72:65 SLE \state[1] ( .Q(state_Z[1]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_ns[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @72:65 SLE \state[0] ( .Q(state_Z[0]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_55_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @72:120 ARI1 \state_RNIL1B5B[1] ( .FCO(ram_w_addr_lcry_cy), .S(state_RNIL1B5B_S[1]), .Y(state_RNIL1B5B_Y[1]), .B(COREFIFO_C0_0_EMPTY), .C(buffer_full_Z), .D(state_Z[1]), .A(VCC), .FCI(VCC) ); defparam \state_RNIL1B5B[1] .INIT=20'h41000; // @72:120 ARI1 buffer_full6_5_RNIU26A31 ( .FCO(ram_w_addr), .S(buffer_full6_5_RNIU26A31_S), .Y(buffer_full6_5_RNIU26A31_Y), .B(buffer_full6_5_Z), .C(buffer_full6_6_Z), .D(buffer_full6_7_Z), .A(state_RNIL1B5B_Y[1]), .FCI(ram_w_addr_lcry_cy) ); defparam buffer_full6_5_RNIU26A31.INIT=20'h47FFF; // @72:120 ARI1 \ram_w_addr_RNIRNR271[0] ( .FCO(ram_w_addr_cry[0]), .S(ram_w_addr_s[0]), .Y(ram_w_addr_RNIRNR271_Y[0]), .B(fifo_to_tpsram_bridge_0_ram_w_addr_4[0]), .C(GND), .D(GND), .A(VCC), .FCI(ram_w_addr) ); defparam \ram_w_addr_RNIRNR271[0] .INIT=20'h4AA00; // @72:120 ARI1 \ram_w_addr_RNIPDHRA1[1] ( .FCO(ram_w_addr_cry[1]), .S(ram_w_addr_s[1]), .Y(ram_w_addr_RNIPDHRA1_Y[1]), .B(fifo_to_tpsram_bridge_0_ram_w_addr_4[1]), .C(GND), .D(GND), .A(VCC), .FCI(ram_w_addr_cry[0]) ); defparam \ram_w_addr_RNIPDHRA1[1] .INIT=20'h4AA00; // @72:120 ARI1 \ram_w_addr_RNIO47KE1[2] ( .FCO(ram_w_addr_cry[2]), .S(ram_w_addr_s[2]), .Y(ram_w_addr_RNIO47KE1_Y[2]), .B(fifo_to_tpsram_bridge_0_ram_w_addr_4[2]), .C(GND), .D(GND), .A(VCC), .FCI(ram_w_addr_cry[1]) ); defparam \ram_w_addr_RNIO47KE1[2] .INIT=20'h4AA00; // @72:120 ARI1 \ram_w_addr_RNIOSSCI1[3] ( .FCO(ram_w_addr_cry[3]), .S(ram_w_addr_s[3]), .Y(ram_w_addr_RNIOSSCI1_Y[3]), .B(fifo_to_tpsram_bridge_0_ram_w_addr_4[3]), .C(GND), .D(GND), .A(VCC), .FCI(ram_w_addr_cry[2]) ); defparam \ram_w_addr_RNIOSSCI1[3] .INIT=20'h4AA00; // @72:120 ARI1 \ram_w_addr_RNIPLI5M1[4] ( .FCO(ram_w_addr_cry[4]), .S(ram_w_addr_s[4]), .Y(ram_w_addr_RNIPLI5M1_Y[4]), .B(fifo_to_tpsram_bridge_0_ram_w_addr_4[4]), .C(GND), .D(GND), .A(VCC), .FCI(ram_w_addr_cry[3]) ); defparam \ram_w_addr_RNIPLI5M1[4] .INIT=20'h4AA00; // @72:120 ARI1 \ram_w_addr_RNIRF8UP1[5] ( .FCO(ram_w_addr_cry[5]), .S(ram_w_addr_s[5]), .Y(ram_w_addr_RNIRF8UP1_Y[5]), .B(fifo_to_tpsram_bridge_0_ram_w_addr_4[5]), .C(GND), .D(GND), .A(VCC), .FCI(ram_w_addr_cry[4]) ); defparam \ram_w_addr_RNIRF8UP1[5] .INIT=20'h4AA00; // @72:120 ARI1 \ram_w_addr_RNIUAUMT1[6] ( .FCO(ram_w_addr_cry[6]), .S(ram_w_addr_s[6]), .Y(ram_w_addr_RNIUAUMT1_Y[6]), .B(fifo_to_tpsram_bridge_0_ram_w_addr_4[6]), .C(GND), .D(GND), .A(VCC), .FCI(ram_w_addr_cry[5]) ); defparam \ram_w_addr_RNIUAUMT1[6] .INIT=20'h4AA00; // @72:120 ARI1 \ram_w_addr_RNI27KF12[7] ( .FCO(ram_w_addr_cry[7]), .S(ram_w_addr_s[7]), .Y(ram_w_addr_RNI27KF12_Y[7]), .B(fifo_to_tpsram_bridge_0_ram_w_addr_4[7]), .C(GND), .D(GND), .A(VCC), .FCI(ram_w_addr_cry[6]) ); defparam \ram_w_addr_RNI27KF12[7] .INIT=20'h4AA00; // @72:120 ARI1 \ram_w_addr_RNI74A852[8] ( .FCO(ram_w_addr_cry[8]), .S(ram_w_addr_s[8]), .Y(ram_w_addr_RNI74A852_Y[8]), .B(fifo_to_tpsram_bridge_0_ram_w_addr_4[8]), .C(GND), .D(GND), .A(VCC), .FCI(ram_w_addr_cry[7]) ); defparam \ram_w_addr_RNI74A852[8] .INIT=20'h4AA00; // @72:120 ARI1 \ram_w_addr_RNO[10] ( .FCO(ram_w_addr_RNO_FCO[10]), .S(ram_w_addr_s[10]), .Y(ram_w_addr_RNO_Y[10]), .B(fifo_to_tpsram_bridge_0_ram_w_addr_4[10]), .C(GND), .D(GND), .A(VCC), .FCI(ram_w_addr_cry[9]) ); defparam \ram_w_addr_RNO[10] .INIT=20'h4AA00; // @72:120 ARI1 \ram_w_addr_RNID20192[9] ( .FCO(ram_w_addr_cry[9]), .S(ram_w_addr_s[9]), .Y(ram_w_addr_RNID20192_Y[9]), .B(fifo_to_tpsram_bridge_0_ram_w_addr_4[9]), .C(GND), .D(GND), .A(VCC), .FCI(ram_w_addr_cry[8]) ); defparam \ram_w_addr_RNID20192[9] .INIT=20'h4AA00; // @72:65 CFG2 \state_ns_i_0_a2_1[0] ( .A(N_964_i), .B(state_Z[1]), .Y(N_139) ); defparam \state_ns_i_0_a2_1[0] .INIT=4'h4; // @72:120 CFG4 un1_fifo_data_out_1_23 ( .A(COREFIFO_C0_0_Q[6]), .B(COREFIFO_C0_0_Q[4]), .C(COREFIFO_C0_0_Q[2]), .D(COREFIFO_C0_0_Q[0]), .Y(un1_fifo_data_out_1_23_Z) ); defparam un1_fifo_data_out_1_23.INIT=16'h0001; // @72:120 CFG4 un1_fifo_data_out_1_22 ( .A(COREFIFO_C0_0_Q[20]), .B(COREFIFO_C0_0_Q[16]), .C(COREFIFO_C0_0_Q[14]), .D(COREFIFO_C0_0_Q[10]), .Y(un1_fifo_data_out_1_22_Z) ); defparam un1_fifo_data_out_1_22.INIT=16'h0001; // @72:120 CFG4 un1_fifo_data_out_1_21 ( .A(COREFIFO_C0_0_Q[26]), .B(COREFIFO_C0_0_Q[24]), .C(COREFIFO_C0_0_Q[23]), .D(COREFIFO_C0_0_Q[22]), .Y(un1_fifo_data_out_1_21_Z) ); defparam un1_fifo_data_out_1_21.INIT=16'h8000; // @72:120 CFG4 un1_fifo_data_out_1_20 ( .A(COREFIFO_C0_0_Q[19]), .B(COREFIFO_C0_0_Q[18]), .C(COREFIFO_C0_0_Q[15]), .D(COREFIFO_C0_0_Q[13]), .Y(un1_fifo_data_out_1_20_Z) ); defparam un1_fifo_data_out_1_20.INIT=16'h8000; // @72:120 CFG4 un1_fifo_data_out_1_19 ( .A(COREFIFO_C0_0_Q[12]), .B(COREFIFO_C0_0_Q[11]), .C(COREFIFO_C0_0_Q[9]), .D(COREFIFO_C0_0_Q[8]), .Y(un1_fifo_data_out_1_19_Z) ); defparam un1_fifo_data_out_1_19.INIT=16'h8000; // @72:120 CFG4 un1_fifo_data_out_1_18 ( .A(COREFIFO_C0_0_Q[7]), .B(COREFIFO_C0_0_Q[5]), .C(COREFIFO_C0_0_Q[3]), .D(COREFIFO_C0_0_Q[1]), .Y(un1_fifo_data_out_1_18_Z) ); defparam un1_fifo_data_out_1_18.INIT=16'h8000; // @72:120 CFG4 un1_fifo_data_out_1_17 ( .A(COREFIFO_C0_0_Q[29]), .B(COREFIFO_C0_0_Q[25]), .C(COREFIFO_C0_0_Q[21]), .D(COREFIFO_C0_0_Q[17]), .Y(un1_fifo_data_out_1_17_Z) ); defparam un1_fifo_data_out_1_17.INIT=16'h0001; // @72:120 CFG4 un1_fifo_data_out_1_16 ( .A(COREFIFO_C0_0_Q[31]), .B(COREFIFO_C0_0_Q[30]), .C(COREFIFO_C0_0_Q[28]), .D(COREFIFO_C0_0_Q[27]), .Y(un1_fifo_data_out_1_16_Z) ); defparam un1_fifo_data_out_1_16.INIT=16'h8000; // @72:85 CFG4 next_state11_23 ( .A(COREFIFO_C0_0_Q[14]), .B(COREFIFO_C0_0_Q[10]), .C(COREFIFO_C0_0_Q[2]), .D(COREFIFO_C0_0_Q[0]), .Y(next_state11_23_Z) ); defparam next_state11_23.INIT=16'h0001; // @72:85 CFG4 next_state11_22 ( .A(COREFIFO_C0_0_Q[31]), .B(COREFIFO_C0_0_Q[20]), .C(COREFIFO_C0_0_Q[19]), .D(COREFIFO_C0_0_Q[18]), .Y(next_state11_22_Z) ); defparam next_state11_22.INIT=16'h0001; // @72:85 CFG4 next_state11_21 ( .A(COREFIFO_C0_0_Q[30]), .B(COREFIFO_C0_0_Q[28]), .C(COREFIFO_C0_0_Q[27]), .D(COREFIFO_C0_0_Q[26]), .Y(next_state11_21_Z) ); defparam next_state11_21.INIT=16'h0004; // @72:85 CFG4 next_state11_20 ( .A(COREFIFO_C0_0_Q[29]), .B(COREFIFO_C0_0_Q[25]), .C(COREFIFO_C0_0_Q[24]), .D(COREFIFO_C0_0_Q[17]), .Y(next_state11_20_Z) ); defparam next_state11_20.INIT=16'h8000; // @72:85 CFG4 next_state11_19 ( .A(COREFIFO_C0_0_Q[21]), .B(COREFIFO_C0_0_Q[12]), .C(COREFIFO_C0_0_Q[8]), .D(COREFIFO_C0_0_Q[7]), .Y(next_state11_19_Z) ); defparam next_state11_19.INIT=16'h0080; // @72:85 CFG4 next_state11_18 ( .A(COREFIFO_C0_0_Q[15]), .B(COREFIFO_C0_0_Q[5]), .C(COREFIFO_C0_0_Q[3]), .D(COREFIFO_C0_0_Q[1]), .Y(next_state11_18_Z) ); defparam next_state11_18.INIT=16'h0001; // @72:85 CFG4 next_state11_17 ( .A(COREFIFO_C0_0_Q[23]), .B(COREFIFO_C0_0_Q[13]), .C(COREFIFO_C0_0_Q[11]), .D(COREFIFO_C0_0_Q[9]), .Y(next_state11_17_Z) ); defparam next_state11_17.INIT=16'h0001; // @72:85 CFG3 next_state11_16 ( .A(COREFIFO_C0_0_Q[16]), .B(COREFIFO_C0_0_EMPTY), .C(COREFIFO_C0_0_Q[22]), .Y(next_state11_16_Z) ); defparam next_state11_16.INIT=8'h01; // @72:54 CFG4 buffer_full6_7 ( .A(fifo_to_tpsram_bridge_0_ram_w_addr_4[7]), .B(fifo_to_tpsram_bridge_0_ram_w_addr_4[6]), .C(fifo_to_tpsram_bridge_0_ram_w_addr_4[5]), .D(fifo_to_tpsram_bridge_0_ram_w_addr_4[4]), .Y(buffer_full6_7_Z) ); defparam buffer_full6_7.INIT=16'h8000; // @72:54 CFG4 buffer_full6_6 ( .A(fifo_to_tpsram_bridge_0_ram_w_addr_4[3]), .B(fifo_to_tpsram_bridge_0_ram_w_addr_4[2]), .C(fifo_to_tpsram_bridge_0_ram_w_addr_4[1]), .D(fifo_to_tpsram_bridge_0_ram_w_addr_4[0]), .Y(buffer_full6_6_Z) ); defparam buffer_full6_6.INIT=16'h8000; // @72:54 CFG3 buffer_full6_5 ( .A(fifo_to_tpsram_bridge_0_ram_w_addr_4[10]), .B(fifo_to_tpsram_bridge_0_ram_w_addr_4[9]), .C(fifo_to_tpsram_bridge_0_ram_w_addr_4[8]), .Y(buffer_full6_5_Z) ); defparam buffer_full6_5.INIT=8'h80; // @72:65 CFG3 \state_ns_i_0_a2_0[0] ( .A(state_Z[1]), .B(state_Z[0]), .C(buffer_full_Z), .Y(N_995) ); defparam \state_ns_i_0_a2_0[0] .INIT=8'h10; // @72:108 CFG4 fifo_rd_en_u_i_o2 ( .A(state_Z[1]), .B(state_Z[0]), .C(buffer_full_Z), .D(COREFIFO_C0_0_EMPTY), .Y(N_976_i) ); defparam fifo_rd_en_u_i_o2.INIT=16'h004E; // @72:65 CFG4 \state_ns_0_0[1] ( .A(state_Z[0]), .B(buffer_full_Z), .C(next_state11_Z), .D(N_139), .Y(state_ns[1]) ); defparam \state_ns_0_0[1] .INIT=16'hB1A0; // @72:120 CFG4 un1_fifo_data_out_1_29 ( .A(un1_fifo_data_out_1_21_Z), .B(un1_fifo_data_out_1_20_Z), .C(un1_fifo_data_out_1_23_Z), .D(un1_fifo_data_out_1_22_Z), .Y(un1_fifo_data_out_1_29_Z) ); defparam un1_fifo_data_out_1_29.INIT=16'h8000; // @72:120 CFG4 un1_fifo_data_out_1_28 ( .A(un1_fifo_data_out_1_18_Z), .B(un1_fifo_data_out_1_19_Z), .C(un1_fifo_data_out_1_17_Z), .D(un1_fifo_data_out_1_16_Z), .Y(un1_fifo_data_out_1_28_Z) ); defparam un1_fifo_data_out_1_28.INIT=16'h8000; // @72:85 CFG4 next_state11_29 ( .A(next_state11_20_Z), .B(next_state11_19_Z), .C(next_state11_18_Z), .D(next_state11_17_Z), .Y(next_state11_29_Z) ); defparam next_state11_29.INIT=16'h8000; // @72:85 CFG4 next_state11_28 ( .A(COREFIFO_C0_0_Q[4]), .B(COREFIFO_C0_0_Q[6]), .C(next_state11_23_Z), .D(next_state11_16_Z), .Y(next_state11_28_Z) ); defparam next_state11_28.INIT=16'h1000; // @72:65 CFG4 \state_RNO[0] ( .A(state_Z[0]), .B(N_995), .C(next_state11_Z), .D(N_139), .Y(N_55_i) ); defparam \state_RNO[0] .INIT=16'h0013; // @72:85 CFG4 next_state11 ( .A(next_state11_21_Z), .B(next_state11_22_Z), .C(next_state11_29_Z), .D(next_state11_28_Z), .Y(next_state11_Z) ); defparam next_state11.INIT=16'h8000; // @72:49 CFG2 un1_fifo_data_out_1_28_RNIBQ235 ( .A(un1_fifo_data_out_1_29_Z), .B(un1_fifo_data_out_1_28_Z), .Y(un1_fifo_data_out_1_i) ); defparam un1_fifo_data_out_1_28_RNIBQ235.INIT=4'h7; // @72:120 CFG3 ram_w_en_0_a2 ( .A(state_RNIL1B5B_Y[1]), .B(un1_fifo_data_out_1_28_Z), .C(un1_fifo_data_out_1_29_Z), .Y(fifo_to_tpsram_bridge_0_ram_w_en) ); defparam ram_w_en_0_a2.INIT=8'h2A; // @72:108 CFG4 buffer_full_0_sqmuxa ( .A(buffer_full6_5_Z), .B(buffer_full6_7_Z), .C(buffer_full6_6_Z), .D(fifo_to_tpsram_bridge_0_ram_w_en), .Y(buffer_full_0_sqmuxa_Z) ); defparam buffer_full_0_sqmuxa.INIT=16'h8000; // @72:65 CFG3 \state_ns_i_0_a2_1_RNO[0] ( .A(COREFIFO_C0_0_EMPTY), .B(un1_fifo_data_out_1_28_Z), .C(un1_fifo_data_out_1_29_Z), .Y(N_964_i) ); defparam \state_ns_i_0_a2_1_RNO[0] .INIT=8'h40; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* fifo_to_tpsram_bridge */ module miv_rv32_ifu_iab_32s_2s_3s_2s_0s ( buff_resp_head_data_resp_compressed_4, buff_resp_head_data_resp_compressed_0, buff_resp_head_data_resp_compressed_13, ifu_expipe_resp_ireg_vaddr_net_5, ifu_expipe_resp_ireg_vaddr_net_13, ifu_expipe_resp_ireg_vaddr_net_3, ifu_expipe_resp_ireg_vaddr_net_4, ifu_expipe_resp_ireg_vaddr_net_8, ifu_expipe_resp_ireg_vaddr_net_6, ifu_expipe_resp_ireg_vaddr_net_1, ifu_expipe_resp_ireg_vaddr_net_7, ifu_expipe_resp_ireg_vaddr_net_2, ifu_expipe_resp_ireg_vaddr_net_28, ifu_expipe_resp_ireg_vaddr_net_0, ifu_expipe_resp_ireg_vaddr_net_29, buff_entry_data_resp_1, req_fetch_ptr_0, req_fetch_ptr_1, cpu_i_resp_rd_data_sel, num_emi_req_os, resp_count, buff_req_rd_ptr_0, buff_entry_addr_req_0__0, buff_resp_rd_ptr, apb_i_req_addr_net, buff_entry_addr_req_2_, buff_entry_addr_req_1__0, next_req_fetch_ptr_0, N_345, N_341, N_285, iab_resp_complete_1_1, N_329_i, iab_head_uncompressed_full, iab_head_compressed, N_329, N_306, N_292, un5_N_4_0_i, last_iab_rd_alignment, iab_resp_alloc, N_298, N_383, N_403, N_382, N_404, N_367, N_381, N_376, N_368, N_408, N_370, N_369, N_405, N_377, N_373, N_401, N_406, N_380, N_379, N_371, N_372, N_407, N_378, N_375, N_374, N_669, cpu_i_resp_valid_sel, N_670, N_418_1, N_417_1, N_422_1, N_416_1, N_415_1, ifu_expipe_req_branch_excpt_req_valid_net, lsu_flush, iab_req_empty, iab_resp_complete_u_0, N_290_i_1, N_676, iab_resp_empty, ifu_expipe_resp_ready_net, no_flush_req_os_1z, ifu_emi_req_accepted, ram2_9, ram2_10, ram2_11, ram2_12, ram2_13, ram2_1, ram2_3, ram2_4, ram2_5, ram2_7, ram2_8, ram1_10, ram1_11, ram1_12, ram1_13, ram2_0_0, ram1_3, ram1_4, ram1_5, ram1_7, ram1_8, ram1_9, ram0_11, ram0_12, ram0_13, ram0_14, ram0_15, ram1_0_0, ram1_1, ram0_4, ram0_5, ram0_6, ram0_7, ram0_8, ram0_9, ram0_10, ram0_0_0, ram0_1, ram0_2, ram0_3, ram0_0, ram1_0, ram2_0, cpu_i_resp_error_sel, ram3_0, un7_iab_readylt1, un7_iab_readylto1, dff, next_req_is_hword_high_only, PF_CCC_0_0_OUT0_FABCLK_0 ) ; output buff_resp_head_data_resp_compressed_4 ; output buff_resp_head_data_resp_compressed_0 ; output buff_resp_head_data_resp_compressed_13 ; output ifu_expipe_resp_ireg_vaddr_net_5 ; output ifu_expipe_resp_ireg_vaddr_net_13 ; output ifu_expipe_resp_ireg_vaddr_net_3 ; output ifu_expipe_resp_ireg_vaddr_net_4 ; output ifu_expipe_resp_ireg_vaddr_net_8 ; output ifu_expipe_resp_ireg_vaddr_net_6 ; output ifu_expipe_resp_ireg_vaddr_net_1 ; output ifu_expipe_resp_ireg_vaddr_net_7 ; output ifu_expipe_resp_ireg_vaddr_net_2 ; output ifu_expipe_resp_ireg_vaddr_net_28 ; output ifu_expipe_resp_ireg_vaddr_net_0 ; output ifu_expipe_resp_ireg_vaddr_net_29 ; output [25:16] buff_entry_data_resp_1 ; output req_fetch_ptr_0 ; output [31:2] req_fetch_ptr_1 ; input [31:0] cpu_i_resp_rd_data_sel ; output [1:0] num_emi_req_os ; output [1:0] resp_count ; output buff_req_rd_ptr_0 ; output buff_entry_addr_req_0__0 ; output [1:0] buff_resp_rd_ptr ; input [31:2] apb_i_req_addr_net ; output [31:0] buff_entry_addr_req_2_ ; output buff_entry_addr_req_1__0 ; input next_req_fetch_ptr_0 ; input N_345 ; input N_341 ; input N_285 ; input iab_resp_complete_1_1 ; output N_329_i ; output iab_head_uncompressed_full ; output iab_head_compressed ; output N_329 ; input N_306 ; output N_292 ; input un5_N_4_0_i ; input last_iab_rd_alignment ; input iab_resp_alloc ; output N_298 ; output N_383 ; output N_403 ; output N_382 ; output N_404 ; output N_367 ; output N_381 ; output N_376 ; output N_368 ; output N_408 ; output N_370 ; output N_369 ; output N_405 ; output N_377 ; output N_373 ; output N_401 ; output N_406 ; output N_380 ; output N_379 ; output N_371 ; output N_372 ; output N_407 ; output N_378 ; output N_375 ; output N_374 ; input N_669 ; input cpu_i_resp_valid_sel ; input N_670 ; output N_418_1 ; output N_417_1 ; output N_422_1 ; output N_416_1 ; output N_415_1 ; input ifu_expipe_req_branch_excpt_req_valid_net ; input lsu_flush ; output iab_req_empty ; input iab_resp_complete_u_0 ; output N_290_i_1 ; input N_676 ; output iab_resp_empty ; input ifu_expipe_resp_ready_net ; output no_flush_req_os_1z ; input ifu_emi_req_accepted ; output ram2_9 ; output ram2_10 ; output ram2_11 ; output ram2_12 ; output ram2_13 ; output ram2_1 ; output ram2_3 ; output ram2_4 ; output ram2_5 ; output ram2_7 ; output ram2_8 ; output ram1_10 ; output ram1_11 ; output ram1_12 ; output ram1_13 ; output ram2_0_0 ; output ram1_3 ; output ram1_4 ; output ram1_5 ; output ram1_7 ; output ram1_8 ; output ram1_9 ; output ram0_11 ; output ram0_12 ; output ram0_13 ; output ram0_14 ; output ram0_15 ; output ram1_0_0 ; output ram1_1 ; output ram0_4 ; output ram0_5 ; output ram0_6 ; output ram0_7 ; output ram0_8 ; output ram0_9 ; output ram0_10 ; output ram0_0_0 ; output ram0_1 ; output ram0_2 ; output ram0_3 ; output ram0_0 ; output ram1_0 ; output ram2_0 ; input cpu_i_resp_error_sel ; output ram3_0 ; output un7_iab_readylt1 ; output un7_iab_readylto1 ; input dff ; input next_req_is_hword_high_only ; input PF_CCC_0_0_OUT0_FABCLK_0 ; wire buff_resp_head_data_resp_compressed_4 ; wire buff_resp_head_data_resp_compressed_0 ; wire buff_resp_head_data_resp_compressed_13 ; wire ifu_expipe_resp_ireg_vaddr_net_5 ; wire ifu_expipe_resp_ireg_vaddr_net_13 ; wire ifu_expipe_resp_ireg_vaddr_net_3 ; wire ifu_expipe_resp_ireg_vaddr_net_4 ; wire ifu_expipe_resp_ireg_vaddr_net_8 ; wire ifu_expipe_resp_ireg_vaddr_net_6 ; wire ifu_expipe_resp_ireg_vaddr_net_1 ; wire ifu_expipe_resp_ireg_vaddr_net_7 ; wire ifu_expipe_resp_ireg_vaddr_net_2 ; wire ifu_expipe_resp_ireg_vaddr_net_28 ; wire ifu_expipe_resp_ireg_vaddr_net_0 ; wire ifu_expipe_resp_ireg_vaddr_net_29 ; wire req_fetch_ptr_0 ; wire buff_req_rd_ptr_0 ; wire buff_entry_addr_req_0__0 ; wire buff_entry_addr_req_1__0 ; wire next_req_fetch_ptr_0 ; wire N_345 ; wire N_341 ; wire N_285 ; wire iab_resp_complete_1_1 ; wire N_329_i ; wire iab_head_uncompressed_full ; wire iab_head_compressed ; wire N_329 ; wire N_306 ; wire N_292 ; wire un5_N_4_0_i ; wire last_iab_rd_alignment ; wire iab_resp_alloc ; wire N_298 ; wire N_383 ; wire N_403 ; wire N_382 ; wire N_404 ; wire N_367 ; wire N_381 ; wire N_376 ; wire N_368 ; wire N_408 ; wire N_370 ; wire N_369 ; wire N_405 ; wire N_377 ; wire N_373 ; wire N_401 ; wire N_406 ; wire N_380 ; wire N_379 ; wire N_371 ; wire N_372 ; wire N_407 ; wire N_378 ; wire N_375 ; wire N_374 ; wire N_669 ; wire cpu_i_resp_valid_sel ; wire N_670 ; wire N_418_1 ; wire N_417_1 ; wire N_422_1 ; wire N_416_1 ; wire N_415_1 ; wire ifu_expipe_req_branch_excpt_req_valid_net ; wire lsu_flush ; wire iab_req_empty ; wire iab_resp_complete_u_0 ; wire N_290_i_1 ; wire N_676 ; wire iab_resp_empty ; wire ifu_expipe_resp_ready_net ; wire no_flush_req_os_1z ; wire ifu_emi_req_accepted ; wire ram2_9 ; wire ram2_10 ; wire ram2_11 ; wire ram2_12 ; wire ram2_13 ; wire ram2_1 ; wire ram2_3 ; wire ram2_4 ; wire ram2_5 ; wire ram2_7 ; wire ram2_8 ; wire ram1_10 ; wire ram1_11 ; wire ram1_12 ; wire ram1_13 ; wire ram2_0_0 ; wire ram1_3 ; wire ram1_4 ; wire ram1_5 ; wire ram1_7 ; wire ram1_8 ; wire ram1_9 ; wire ram0_11 ; wire ram0_12 ; wire ram0_13 ; wire ram0_14 ; wire ram0_15 ; wire ram1_0_0 ; wire ram1_1 ; wire ram0_4 ; wire ram0_5 ; wire ram0_6 ; wire ram0_7 ; wire ram0_8 ; wire ram0_9 ; wire ram0_10 ; wire ram0_0_0 ; wire ram0_1 ; wire ram0_2 ; wire ram0_3 ; wire ram0_0 ; wire ram1_0 ; wire ram2_0 ; wire cpu_i_resp_error_sel ; wire ram3_0 ; wire un7_iab_readylt1 ; wire un7_iab_readylto1 ; wire dff ; wire next_req_is_hword_high_only ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire [2:0] buff_entry_hword_high_only_req; wire [31:1] buff_entry_addr_req_1_; wire [1:0] buff_resp_rd_ptr_4; wire [31:1] buff_entry_addr_req_0_; wire [1:0] buff_req_wr_ptr_Z; wire [0:0] buff_req_rd_ptr_Z; wire [1:1] req_count_RNO_Z; wire [0:0] un12_req_count_iv_i; wire [1:0] buff_resp_wr_ptr_Z; wire [1:0] buff_resp_wr_ptr_4_Z; wire [1:0] emi_req_os_count_RNO_Z; wire [1:0] emi_req_os_at_flush_Z; wire [1:0] un20_emi_req_os_at_flush_Z; wire [1:1] SUM_1_i_o2_0_1_0; wire [1:1] SUM_1_i_a2_2; wire [1:1] SUM_1_i_o2_0_0_1_0; wire [1:1] SUM_1_i_o2_0_0; wire [14:14] buff_resp_head_data_resp_compressed_Z; wire [1:1] resp_count_2_i_a2_0_2_Z; wire [0:0] un5; wire [1:0] un1_emi_req_os_at_flush_Z; wire [1:1] SUM_1_i_a2_1_1; wire [31:2] ifu_expipe_resp_ireg_vaddr_net_1_Z; wire [1:1] req_fetch_ptr_1_Z; wire [15:2] buff_entry_data_resp_1_2; wire [25:2] buff_entry_data_resp_1_1; wire [29:29] buff_resp_head_addr_i_0_Z; wire [1:1] SUM_1_i_a2_2_0; wire [1:1] resp_count_RNO_3_Z; wire [1:1] un12_req_count_2_1_1; wire [1:1] un12_req_count_2_1; wire VCC ; wire buff_entry_addr_req_1_2 ; wire GND ; wire buff_entry_addr_req_2_2 ; wire buff_entry_addr_req_0_2 ; wire NN_1 ; wire N_292_i ; wire un1_req_count_2_i ; wire buff_req_rd_ptr5_Z ; wire N_299_i ; wire N_300_i ; wire buff_req_wr_ptr4_Z ; wire un1_buff_req_wr_ptr_1 ; wire awe3 ; wire awe2 ; wire awe1 ; wire awe0 ; wire ram0_17 ; wire ram0_16 ; wire ram0_25 ; wire ram0_24 ; wire ram0_23 ; wire ram0_22 ; wire ram0_21 ; wire ram0_20 ; wire ram0_19 ; wire ram0_18 ; wire ram0_31 ; wire ram0_30 ; wire ram0_29 ; wire ram0_28 ; wire ram0_27 ; wire ram0_26 ; wire ram1_23 ; wire ram1_22 ; wire ram1_21 ; wire ram1_20 ; wire ram1_19 ; wire ram1_18 ; wire ram1_17 ; wire ram1_16 ; wire ram1_30 ; wire ram1_29 ; wire ram1_28 ; wire ram1_27 ; wire ram1_26 ; wire ram1_25 ; wire ram1_24 ; wire ram1_31 ; wire ram2_21 ; wire ram2_20 ; wire ram2_19 ; wire ram2_18 ; wire ram2_17 ; wire ram2_16 ; wire ram2_28 ; wire ram2_27 ; wire ram2_26 ; wire ram2_25 ; wire ram2_24 ; wire ram2_23 ; wire ram2_22 ; wire ram2_31 ; wire ram2_30 ; wire ram2_29 ; wire ram1_2 ; wire ram1_6 ; wire ram1_15 ; wire ram1_14 ; wire ram2_6 ; wire ram2_2 ; wire ram2_15 ; wire ram2_14 ; wire alloc_resp_qual_Z ; wire N_438 ; wire d_N_3_mux_8 ; wire N_299_i_1 ; wire N_654 ; wire resp_N_3_mux ; wire emi_req_os_count_at_flush_0_sqmuxa_Z ; wire d_N_5_mux_4 ; wire un12_N_5_mux ; wire ramout_2_1 ; wire ramout_1_0 ; wire N_330_i ; wire un1_req_count_i_Z ; wire wa2 ; wire CO0_3 ; wire N_662 ; wire req_flush_i_Z ; wire N_374_1 ; wire N_375_1 ; wire N_378_1 ; wire N_407_1 ; wire N_372_1 ; wire N_371_1 ; wire N_379_1 ; wire N_380_1 ; wire N_406_1 ; wire N_401_1 ; wire N_373_1 ; wire N_377_1 ; wire N_405_1 ; wire N_369_1 ; wire N_370_1 ; wire N_408_1 ; wire N_368_1 ; wire N_376_1 ; wire N_381_1 ; wire N_423_2 ; wire N_423_1 ; wire N_367_1 ; wire N_404_1 ; wire N_382_1 ; wire N_403_1 ; wire N_383_1 ; wire resp_m1_e_1 ; wire un15_buff_resp_head_compressed_0_0_Z ; wire un1_next_buff_resp_wr_ptr_1_sqmuxa_Z ; wire un15_buff_resp_head_compressed ; wire emi_req_os_count_at_flush20_Z ; wire N_396 ; wire N_397 ; wire un3_buff_resp_head_uncompressed_full_Z ; wire un10_buff_resp_head_compressed_Z ; wire N_202 ; wire resp_m1_0_a2_0 ; wire resp_complete_qual ; wire N_546 ; // @46:18726 SLE \gen_buff_loop[1].buff_entry_hword_high_only_req[1] ( .Q(buff_entry_hword_high_only_req[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_req_is_hword_high_only), .EN(buff_entry_addr_req_1_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[2].buff_entry_hword_high_only_req[2] ( .Q(buff_entry_hword_high_only_req[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_req_is_hword_high_only), .EN(buff_entry_addr_req_2_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[0].buff_entry_hword_high_only_req[0] ( .Q(buff_entry_hword_high_only_req[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_req_is_hword_high_only), .EN(buff_entry_addr_req_0_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[2].buff_entry_addr_req[2][5] ( .Q(buff_entry_addr_req_2_[5]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[5]), .EN(buff_entry_addr_req_2_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[2].buff_entry_addr_req[2][4] ( .Q(buff_entry_addr_req_2_[4]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[4]), .EN(buff_entry_addr_req_2_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[2].buff_entry_addr_req[2][3] ( .Q(buff_entry_addr_req_2_[3]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[3]), .EN(buff_entry_addr_req_2_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[2].buff_entry_addr_req[2][2] ( .Q(buff_entry_addr_req_2_[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[2]), .EN(buff_entry_addr_req_2_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[2].buff_entry_addr_req[2][1] ( .Q(NN_1), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_req_fetch_ptr_0), .EN(buff_entry_addr_req_2_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[2].buff_entry_addr_req[2][0] ( .Q(buff_entry_addr_req_2_[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_292_i), .EN(buff_entry_addr_req_2_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[2].buff_entry_addr_req[2][20] ( .Q(buff_entry_addr_req_2_[20]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[20]), .EN(buff_entry_addr_req_2_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[2].buff_entry_addr_req[2][19] ( .Q(buff_entry_addr_req_2_[19]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[19]), .EN(buff_entry_addr_req_2_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[2].buff_entry_addr_req[2][18] ( .Q(buff_entry_addr_req_2_[18]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[18]), .EN(buff_entry_addr_req_2_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[2].buff_entry_addr_req[2][17] ( .Q(buff_entry_addr_req_2_[17]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[17]), .EN(buff_entry_addr_req_2_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[2].buff_entry_addr_req[2][16] ( .Q(buff_entry_addr_req_2_[16]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[16]), .EN(buff_entry_addr_req_2_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[2].buff_entry_addr_req[2][15] ( .Q(buff_entry_addr_req_2_[15]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[15]), .EN(buff_entry_addr_req_2_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[2].buff_entry_addr_req[2][14] ( .Q(buff_entry_addr_req_2_[14]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[14]), .EN(buff_entry_addr_req_2_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[2].buff_entry_addr_req[2][13] ( .Q(buff_entry_addr_req_2_[13]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[13]), .EN(buff_entry_addr_req_2_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[2].buff_entry_addr_req[2][12] ( .Q(buff_entry_addr_req_2_[12]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[12]), .EN(buff_entry_addr_req_2_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[2].buff_entry_addr_req[2][11] ( .Q(buff_entry_addr_req_2_[11]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[11]), .EN(buff_entry_addr_req_2_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[2].buff_entry_addr_req[2][10] ( .Q(buff_entry_addr_req_2_[10]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[10]), .EN(buff_entry_addr_req_2_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[2].buff_entry_addr_req[2][9] ( .Q(buff_entry_addr_req_2_[9]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[9]), .EN(buff_entry_addr_req_2_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[2].buff_entry_addr_req[2][8] ( .Q(buff_entry_addr_req_2_[8]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[8]), .EN(buff_entry_addr_req_2_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[2].buff_entry_addr_req[2][7] ( .Q(buff_entry_addr_req_2_[7]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[7]), .EN(buff_entry_addr_req_2_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[2].buff_entry_addr_req[2][6] ( .Q(buff_entry_addr_req_2_[6]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[6]), .EN(buff_entry_addr_req_2_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[1].buff_entry_addr_req[1][3] ( .Q(buff_entry_addr_req_1_[3]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[3]), .EN(buff_entry_addr_req_1_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[1].buff_entry_addr_req[1][2] ( .Q(buff_entry_addr_req_1_[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[2]), .EN(buff_entry_addr_req_1_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[1].buff_entry_addr_req[1][1] ( .Q(buff_entry_addr_req_1_[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_req_fetch_ptr_0), .EN(buff_entry_addr_req_1_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[1].buff_entry_addr_req[1][0] ( .Q(buff_entry_addr_req_1__0), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_292_i), .EN(buff_entry_addr_req_1_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[2].buff_entry_addr_req[2][31] ( .Q(buff_entry_addr_req_2_[31]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[31]), .EN(buff_entry_addr_req_2_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[2].buff_entry_addr_req[2][30] ( .Q(buff_entry_addr_req_2_[30]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[30]), .EN(buff_entry_addr_req_2_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[2].buff_entry_addr_req[2][29] ( .Q(buff_entry_addr_req_2_[29]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[29]), .EN(buff_entry_addr_req_2_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[2].buff_entry_addr_req[2][28] ( .Q(buff_entry_addr_req_2_[28]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[28]), .EN(buff_entry_addr_req_2_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[2].buff_entry_addr_req[2][27] ( .Q(buff_entry_addr_req_2_[27]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[27]), .EN(buff_entry_addr_req_2_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[2].buff_entry_addr_req[2][26] ( .Q(buff_entry_addr_req_2_[26]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[26]), .EN(buff_entry_addr_req_2_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[2].buff_entry_addr_req[2][25] ( .Q(buff_entry_addr_req_2_[25]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[25]), .EN(buff_entry_addr_req_2_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[2].buff_entry_addr_req[2][24] ( .Q(buff_entry_addr_req_2_[24]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[24]), .EN(buff_entry_addr_req_2_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[2].buff_entry_addr_req[2][23] ( .Q(buff_entry_addr_req_2_[23]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[23]), .EN(buff_entry_addr_req_2_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[2].buff_entry_addr_req[2][22] ( .Q(buff_entry_addr_req_2_[22]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[22]), .EN(buff_entry_addr_req_2_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[2].buff_entry_addr_req[2][21] ( .Q(buff_entry_addr_req_2_[21]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[21]), .EN(buff_entry_addr_req_2_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[1].buff_entry_addr_req[1][18] ( .Q(buff_entry_addr_req_1_[18]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[18]), .EN(buff_entry_addr_req_1_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[1].buff_entry_addr_req[1][17] ( .Q(buff_entry_addr_req_1_[17]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[17]), .EN(buff_entry_addr_req_1_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[1].buff_entry_addr_req[1][16] ( .Q(buff_entry_addr_req_1_[16]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[16]), .EN(buff_entry_addr_req_1_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[1].buff_entry_addr_req[1][15] ( .Q(buff_entry_addr_req_1_[15]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[15]), .EN(buff_entry_addr_req_1_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[1].buff_entry_addr_req[1][14] ( .Q(buff_entry_addr_req_1_[14]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[14]), .EN(buff_entry_addr_req_1_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[1].buff_entry_addr_req[1][13] ( .Q(buff_entry_addr_req_1_[13]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[13]), .EN(buff_entry_addr_req_1_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[1].buff_entry_addr_req[1][12] ( .Q(buff_entry_addr_req_1_[12]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[12]), .EN(buff_entry_addr_req_1_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[1].buff_entry_addr_req[1][11] ( .Q(buff_entry_addr_req_1_[11]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[11]), .EN(buff_entry_addr_req_1_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[1].buff_entry_addr_req[1][10] ( .Q(buff_entry_addr_req_1_[10]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[10]), .EN(buff_entry_addr_req_1_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[1].buff_entry_addr_req[1][9] ( .Q(buff_entry_addr_req_1_[9]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[9]), .EN(buff_entry_addr_req_1_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[1].buff_entry_addr_req[1][8] ( .Q(buff_entry_addr_req_1_[8]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[8]), .EN(buff_entry_addr_req_1_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[1].buff_entry_addr_req[1][7] ( .Q(buff_entry_addr_req_1_[7]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[7]), .EN(buff_entry_addr_req_1_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[1].buff_entry_addr_req[1][6] ( .Q(buff_entry_addr_req_1_[6]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[6]), .EN(buff_entry_addr_req_1_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[1].buff_entry_addr_req[1][5] ( .Q(buff_entry_addr_req_1_[5]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[5]), .EN(buff_entry_addr_req_1_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[1].buff_entry_addr_req[1][4] ( .Q(buff_entry_addr_req_1_[4]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[4]), .EN(buff_entry_addr_req_1_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18641 SLE \buff_resp_rd_ptr_Z[1] ( .Q(buff_resp_rd_ptr[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(buff_resp_rd_ptr_4[1]), .EN(un1_req_count_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18641 SLE \buff_resp_rd_ptr_Z[0] ( .Q(buff_resp_rd_ptr[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(buff_resp_rd_ptr_4[0]), .EN(un1_req_count_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[1].buff_entry_addr_req[1][31] ( .Q(buff_entry_addr_req_1_[31]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[31]), .EN(buff_entry_addr_req_1_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[1].buff_entry_addr_req[1][30] ( .Q(buff_entry_addr_req_1_[30]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[30]), .EN(buff_entry_addr_req_1_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[1].buff_entry_addr_req[1][29] ( .Q(buff_entry_addr_req_1_[29]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[29]), .EN(buff_entry_addr_req_1_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[1].buff_entry_addr_req[1][28] ( .Q(buff_entry_addr_req_1_[28]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[28]), .EN(buff_entry_addr_req_1_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[1].buff_entry_addr_req[1][27] ( .Q(buff_entry_addr_req_1_[27]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[27]), .EN(buff_entry_addr_req_1_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[1].buff_entry_addr_req[1][26] ( .Q(buff_entry_addr_req_1_[26]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[26]), .EN(buff_entry_addr_req_1_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[1].buff_entry_addr_req[1][25] ( .Q(buff_entry_addr_req_1_[25]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[25]), .EN(buff_entry_addr_req_1_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[1].buff_entry_addr_req[1][24] ( .Q(buff_entry_addr_req_1_[24]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[24]), .EN(buff_entry_addr_req_1_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[1].buff_entry_addr_req[1][23] ( .Q(buff_entry_addr_req_1_[23]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[23]), .EN(buff_entry_addr_req_1_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[1].buff_entry_addr_req[1][22] ( .Q(buff_entry_addr_req_1_[22]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[22]), .EN(buff_entry_addr_req_1_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[1].buff_entry_addr_req[1][21] ( .Q(buff_entry_addr_req_1_[21]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[21]), .EN(buff_entry_addr_req_1_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[1].buff_entry_addr_req[1][20] ( .Q(buff_entry_addr_req_1_[20]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[20]), .EN(buff_entry_addr_req_1_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[1].buff_entry_addr_req[1][19] ( .Q(buff_entry_addr_req_1_[19]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[19]), .EN(buff_entry_addr_req_1_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[0].buff_entry_addr_req[0][12] ( .Q(buff_entry_addr_req_0_[12]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[12]), .EN(buff_entry_addr_req_0_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[0].buff_entry_addr_req[0][11] ( .Q(buff_entry_addr_req_0_[11]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[11]), .EN(buff_entry_addr_req_0_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[0].buff_entry_addr_req[0][10] ( .Q(buff_entry_addr_req_0_[10]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[10]), .EN(buff_entry_addr_req_0_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[0].buff_entry_addr_req[0][9] ( .Q(buff_entry_addr_req_0_[9]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[9]), .EN(buff_entry_addr_req_0_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[0].buff_entry_addr_req[0][8] ( .Q(buff_entry_addr_req_0_[8]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[8]), .EN(buff_entry_addr_req_0_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[0].buff_entry_addr_req[0][7] ( .Q(buff_entry_addr_req_0_[7]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[7]), .EN(buff_entry_addr_req_0_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[0].buff_entry_addr_req[0][6] ( .Q(buff_entry_addr_req_0_[6]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[6]), .EN(buff_entry_addr_req_0_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[0].buff_entry_addr_req[0][5] ( .Q(buff_entry_addr_req_0_[5]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[5]), .EN(buff_entry_addr_req_0_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[0].buff_entry_addr_req[0][4] ( .Q(buff_entry_addr_req_0_[4]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[4]), .EN(buff_entry_addr_req_0_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[0].buff_entry_addr_req[0][3] ( .Q(buff_entry_addr_req_0_[3]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[3]), .EN(buff_entry_addr_req_0_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[0].buff_entry_addr_req[0][2] ( .Q(buff_entry_addr_req_0_[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[2]), .EN(buff_entry_addr_req_0_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[0].buff_entry_addr_req[0][1] ( .Q(buff_entry_addr_req_0_[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_req_fetch_ptr_0), .EN(buff_entry_addr_req_0_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[0].buff_entry_addr_req[0][0] ( .Q(buff_entry_addr_req_0__0), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_292_i), .EN(buff_entry_addr_req_0_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18630 SLE \buff_req_rd_ptr[1] ( .Q(buff_req_rd_ptr_0), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(buff_req_wr_ptr_Z[1]), .EN(buff_req_rd_ptr5_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18630 SLE \buff_req_rd_ptr[0] ( .Q(buff_req_rd_ptr_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(buff_req_wr_ptr_Z[0]), .EN(buff_req_rd_ptr5_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[0].buff_entry_addr_req[0][27] ( .Q(buff_entry_addr_req_0_[27]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[27]), .EN(buff_entry_addr_req_0_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[0].buff_entry_addr_req[0][26] ( .Q(buff_entry_addr_req_0_[26]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[26]), .EN(buff_entry_addr_req_0_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[0].buff_entry_addr_req[0][25] ( .Q(buff_entry_addr_req_0_[25]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[25]), .EN(buff_entry_addr_req_0_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[0].buff_entry_addr_req[0][24] ( .Q(buff_entry_addr_req_0_[24]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[24]), .EN(buff_entry_addr_req_0_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[0].buff_entry_addr_req[0][23] ( .Q(buff_entry_addr_req_0_[23]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[23]), .EN(buff_entry_addr_req_0_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[0].buff_entry_addr_req[0][22] ( .Q(buff_entry_addr_req_0_[22]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[22]), .EN(buff_entry_addr_req_0_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[0].buff_entry_addr_req[0][21] ( .Q(buff_entry_addr_req_0_[21]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[21]), .EN(buff_entry_addr_req_0_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[0].buff_entry_addr_req[0][20] ( .Q(buff_entry_addr_req_0_[20]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[20]), .EN(buff_entry_addr_req_0_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[0].buff_entry_addr_req[0][19] ( .Q(buff_entry_addr_req_0_[19]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[19]), .EN(buff_entry_addr_req_0_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[0].buff_entry_addr_req[0][18] ( .Q(buff_entry_addr_req_0_[18]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[18]), .EN(buff_entry_addr_req_0_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[0].buff_entry_addr_req[0][17] ( .Q(buff_entry_addr_req_0_[17]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[17]), .EN(buff_entry_addr_req_0_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[0].buff_entry_addr_req[0][16] ( .Q(buff_entry_addr_req_0_[16]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[16]), .EN(buff_entry_addr_req_0_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[0].buff_entry_addr_req[0][15] ( .Q(buff_entry_addr_req_0_[15]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[15]), .EN(buff_entry_addr_req_0_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[0].buff_entry_addr_req[0][14] ( .Q(buff_entry_addr_req_0_[14]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[14]), .EN(buff_entry_addr_req_0_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[0].buff_entry_addr_req[0][13] ( .Q(buff_entry_addr_req_0_[13]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[13]), .EN(buff_entry_addr_req_0_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18664 SLE \req_count[1] ( .Q(un7_iab_readylto1), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_count_RNO_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18664 SLE \req_count[0] ( .Q(un7_iab_readylt1), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un12_req_count_iv_i[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18704 SLE \resp_count_Z[1] ( .Q(resp_count[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_299_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18704 SLE \resp_count_Z[0] ( .Q(resp_count[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_300_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18617 SLE \buff_resp_wr_ptr[1] ( .Q(buff_resp_wr_ptr_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(buff_resp_wr_ptr_4_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18617 SLE \buff_resp_wr_ptr[0] ( .Q(buff_resp_wr_ptr_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(buff_resp_wr_ptr_4_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18685 SLE \emi_req_os_count[1] ( .Q(num_emi_req_os[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(emi_req_os_count_RNO_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18685 SLE \emi_req_os_count[0] ( .Q(num_emi_req_os[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(emi_req_os_count_RNO_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18608 SLE \buff_req_wr_ptr[1] ( .Q(buff_req_wr_ptr_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(buff_req_wr_ptr_Z[0]), .EN(buff_req_wr_ptr4_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18608 SLE \buff_req_wr_ptr[0] ( .Q(buff_req_wr_ptr_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un1_buff_req_wr_ptr_1), .EN(buff_req_wr_ptr4_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[0].buff_entry_addr_req[0][31] ( .Q(buff_entry_addr_req_0_[31]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[31]), .EN(buff_entry_addr_req_0_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[0].buff_entry_addr_req[0][30] ( .Q(buff_entry_addr_req_0_[30]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[30]), .EN(buff_entry_addr_req_0_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[0].buff_entry_addr_req[0][29] ( .Q(buff_entry_addr_req_0_[29]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[29]), .EN(buff_entry_addr_req_0_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18726 SLE \gen_buff_loop[0].buff_entry_addr_req[0][28] ( .Q(buff_entry_addr_req_0_[28]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_addr_net[28]), .EN(buff_entry_addr_req_0_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18769 SLE \emi_req_os_at_flush[1] ( .Q(emi_req_os_at_flush_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un20_emi_req_os_at_flush_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18769 SLE \emi_req_os_at_flush[0] ( .Q(emi_req_os_at_flush_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un20_emi_req_os_at_flush_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_error_resp.gen_buff_loop[0].buff_entry_error_resp_ram3_[0] ( .Q(ram3_0), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_error_sel), .EN(awe3), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_error_resp.gen_buff_loop[0].buff_entry_error_resp_ram2_[0] ( .Q(ram2_0), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_error_sel), .EN(awe2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_error_resp.gen_buff_loop[0].buff_entry_error_resp_ram1_[0] ( .Q(ram1_0), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_error_sel), .EN(awe1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_error_resp.gen_buff_loop[0].buff_entry_error_resp_ram0_[0] ( .Q(ram0_0), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_error_sel), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram0_[17] ( .Q(ram0_17), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[17]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram0_[16] ( .Q(ram0_16), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[16]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram0_[25] ( .Q(ram0_25), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[25]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram0_[24] ( .Q(ram0_24), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[24]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram0_[23] ( .Q(ram0_23), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[23]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram0_[22] ( .Q(ram0_22), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[22]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram0_[21] ( .Q(ram0_21), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[21]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram0_[20] ( .Q(ram0_20), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[20]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram0_[19] ( .Q(ram0_19), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[19]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram0_[18] ( .Q(ram0_18), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[18]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram0_[31] ( .Q(ram0_31), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[31]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram0_[30] ( .Q(ram0_30), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[30]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram0_[29] ( .Q(ram0_29), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[29]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram0_[28] ( .Q(ram0_28), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[28]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram0_[27] ( .Q(ram0_27), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[27]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram0_[26] ( .Q(ram0_26), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[26]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1_[23] ( .Q(ram1_23), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[23]), .EN(awe1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1_[22] ( .Q(ram1_22), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[22]), .EN(awe1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1_[21] ( .Q(ram1_21), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[21]), .EN(awe1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1_[20] ( .Q(ram1_20), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[20]), .EN(awe1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1_[19] ( .Q(ram1_19), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[19]), .EN(awe1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1_[18] ( .Q(ram1_18), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[18]), .EN(awe1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1_[17] ( .Q(ram1_17), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[17]), .EN(awe1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1_[16] ( .Q(ram1_16), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[16]), .EN(awe1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1_[30] ( .Q(ram1_30), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[30]), .EN(awe1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1_[29] ( .Q(ram1_29), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[29]), .EN(awe1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1_[28] ( .Q(ram1_28), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[28]), .EN(awe1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1_[27] ( .Q(ram1_27), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[27]), .EN(awe1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1_[26] ( .Q(ram1_26), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[26]), .EN(awe1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1_[25] ( .Q(ram1_25), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[25]), .EN(awe1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1_[24] ( .Q(ram1_24), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[24]), .EN(awe1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1_[31] ( .Q(ram1_31), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[31]), .EN(awe1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2_[21] ( .Q(ram2_21), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[21]), .EN(awe2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2_[20] ( .Q(ram2_20), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[20]), .EN(awe2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2_[19] ( .Q(ram2_19), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[19]), .EN(awe2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2_[18] ( .Q(ram2_18), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[18]), .EN(awe2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2_[17] ( .Q(ram2_17), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[17]), .EN(awe2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2_[16] ( .Q(ram2_16), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[16]), .EN(awe2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2_[28] ( .Q(ram2_28), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[28]), .EN(awe2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2_[27] ( .Q(ram2_27), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[27]), .EN(awe2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2_[26] ( .Q(ram2_26), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[26]), .EN(awe2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2_[25] ( .Q(ram2_25), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[25]), .EN(awe2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2_[24] ( .Q(ram2_24), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[24]), .EN(awe2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2_[23] ( .Q(ram2_23), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[23]), .EN(awe2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2_[22] ( .Q(ram2_22), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[22]), .EN(awe2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram0_[3] ( .Q(ram0_3), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[3]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram0_[2] ( .Q(ram0_2), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[2]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram0_[1] ( .Q(ram0_1), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[1]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram0_[0] ( .Q(ram0_0_0), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[0]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2_[31] ( .Q(ram2_31), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[31]), .EN(awe2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2_[30] ( .Q(ram2_30), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[30]), .EN(awe2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2_[29] ( .Q(ram2_29), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[29]), .EN(awe2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram0_[10] ( .Q(ram0_10), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[10]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram0_[9] ( .Q(ram0_9), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[9]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram0_[8] ( .Q(ram0_8), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[8]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram0_[7] ( .Q(ram0_7), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[7]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram0_[6] ( .Q(ram0_6), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[6]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram0_[5] ( .Q(ram0_5), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[5]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram0_[4] ( .Q(ram0_4), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[4]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram1_[2] ( .Q(ram1_2), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[2]), .EN(awe1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram1_[1] ( .Q(ram1_1), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[1]), .EN(awe1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram1_[0] ( .Q(ram1_0_0), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[0]), .EN(awe1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram0_[15] ( .Q(ram0_15), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[15]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram0_[14] ( .Q(ram0_14), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[14]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram0_[13] ( .Q(ram0_13), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[13]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram0_[12] ( .Q(ram0_12), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[12]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram0_[11] ( .Q(ram0_11), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[11]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram1_[9] ( .Q(ram1_9), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[9]), .EN(awe1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram1_[8] ( .Q(ram1_8), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[8]), .EN(awe1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram1_[7] ( .Q(ram1_7), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[7]), .EN(awe1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram1_[6] ( .Q(ram1_6), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[6]), .EN(awe1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram1_[5] ( .Q(ram1_5), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[5]), .EN(awe1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram1_[4] ( .Q(ram1_4), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[4]), .EN(awe1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram1_[3] ( .Q(ram1_3), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[3]), .EN(awe1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram2_[0] ( .Q(ram2_0_0), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[0]), .EN(awe2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram1_[15] ( .Q(ram1_15), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[15]), .EN(awe1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram1_[14] ( .Q(ram1_14), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[14]), .EN(awe1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram1_[13] ( .Q(ram1_13), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[13]), .EN(awe1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram1_[12] ( .Q(ram1_12), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[12]), .EN(awe1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram1_[11] ( .Q(ram1_11), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[11]), .EN(awe1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram1_[10] ( .Q(ram1_10), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[10]), .EN(awe1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram2_[8] ( .Q(ram2_8), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[8]), .EN(awe2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram2_[7] ( .Q(ram2_7), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[7]), .EN(awe2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram2_[6] ( .Q(ram2_6), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[6]), .EN(awe2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram2_[5] ( .Q(ram2_5), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[5]), .EN(awe2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram2_[4] ( .Q(ram2_4), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[4]), .EN(awe2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram2_[3] ( .Q(ram2_3), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[3]), .EN(awe2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram2_[2] ( .Q(ram2_2), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[2]), .EN(awe2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram2_[1] ( .Q(ram2_1), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[1]), .EN(awe2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram2_[15] ( .Q(ram2_15), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[15]), .EN(awe2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram2_[14] ( .Q(ram2_14), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[14]), .EN(awe2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram2_[13] ( .Q(ram2_13), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[13]), .EN(awe2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram2_[12] ( .Q(ram2_12), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[12]), .EN(awe2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram2_[11] ( .Q(ram2_11), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[11]), .EN(awe2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram2_[10] ( .Q(ram2_10), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[10]), .EN(awe2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18735 SLE \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram2_[9] ( .Q(ram2_9), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_resp_rd_data_sel[9]), .EN(awe2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:18669 CFG2 \req_count_RNO_2[1] ( .A(ifu_emi_req_accepted), .B(un7_iab_readylt1), .Y(SUM_1_i_o2_0_1_0[1]) ); defparam \req_count_RNO_2[1] .INIT=4'h7; // @46:18735 CFG3 \gen_buff_loop[0].buff_entry_data_resp.awe1 ( .A(buff_resp_wr_ptr_Z[1]), .B(alloc_resp_qual_Z), .C(buff_resp_wr_ptr_Z[0]), .Y(awe1) ); defparam \gen_buff_loop[0].buff_entry_data_resp.awe1 .INIT=8'h40; // @46:18669 CFG4 \req_count_RNO_4[1] ( .A(ifu_emi_req_accepted), .B(SUM_1_i_a2_2[1]), .C(un7_iab_readylt1), .D(no_flush_req_os_1z), .Y(SUM_1_i_o2_0_0_1_0[1]) ); defparam \req_count_RNO_4[1] .INIT=16'hF3D3; // @46:18669 CFG4 \req_count_RNO_0[1] ( .A(SUM_1_i_o2_0_1_0[1]), .B(SUM_1_i_o2_0_0[1]), .C(SUM_1_i_o2_0_0_1_0[1]), .D(ifu_expipe_resp_ready_net), .Y(N_438) ); defparam \req_count_RNO_0[1] .INIT=16'hC088; // @46:8721 CFG4 \buff_resp_head_data_resp_compressed_RNIEIJ0C[14] ( .A(iab_resp_empty), .B(buff_resp_head_data_resp_compressed_Z[14]), .C(cpu_i_resp_rd_data_sel[14]), .D(N_676), .Y(N_290_i_1) ); defparam \buff_resp_head_data_resp_compressed_RNIEIJ0C[14] .INIT=16'h1F11; // @46:18704 CFG4 \resp_count_RNO[1] ( .A(d_N_3_mux_8), .B(N_299_i_1), .C(ifu_expipe_resp_ready_net), .D(N_654), .Y(N_299_i) ); defparam \resp_count_RNO[1] .INIT=16'h00CA; // @46:18704 CFG4 \resp_count_RNO_0[1] ( .A(iab_resp_complete_u_0), .B(resp_count_2_i_a2_0_2_Z[1]), .C(d_N_3_mux_8), .D(resp_N_3_mux), .Y(N_299_i_1) ); defparam \resp_count_RNO_0[1] .INIT=16'h0770; // @46:18774 CFG3 \un20_emi_req_os_at_flush[0] ( .A(un5[0]), .B(emi_req_os_count_at_flush_0_sqmuxa_Z), .C(un1_emi_req_os_at_flush_Z[0]), .Y(un20_emi_req_os_at_flush_Z[0]) ); defparam \un20_emi_req_os_at_flush[0] .INIT=8'hD2; // @46:18664 CFG3 \req_count_RNO[0] ( .A(d_N_5_mux_4), .B(ifu_expipe_resp_ready_net), .C(un12_N_5_mux), .Y(un12_req_count_iv_i[0]) ); defparam \req_count_RNO[0] .INIT=8'h6A; // @46:18735 CFG2 \gen_buff_loop[0].buff_entry_data_resp_1.ramout_2_1 ( .A(buff_resp_rd_ptr[0]), .B(ram2_2), .Y(ramout_2_1) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.ramout_2_1 .INIT=4'h8; // @46:18735 CFG2 \gen_buff_loop[0].buff_entry_data_resp_1.ramout_1_0 ( .A(buff_resp_rd_ptr[0]), .B(ram0_2), .Y(ramout_1_0) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.ramout_1_0 .INIT=4'h4; // @45:777 CFG2 buff_empty ( .A(un7_iab_readylt1), .B(un7_iab_readylto1), .Y(iab_req_empty) ); defparam buff_empty.INIT=4'h1; // @45:777 CFG2 buff_resp_empty_0_a2 ( .A(resp_count[0]), .B(resp_count[1]), .Y(iab_resp_empty) ); defparam buff_resp_empty_0_a2.INIT=4'h1; // @46:18669 CFG2 \req_count_RNO_2[0] ( .A(ifu_emi_req_accepted), .B(un7_iab_readylt1), .Y(N_330_i) ); defparam \req_count_RNO_2[0] .INIT=4'h9; // @45:777 CFG2 no_flush_req_os ( .A(emi_req_os_at_flush_Z[0]), .B(emi_req_os_at_flush_Z[1]), .Y(no_flush_req_os_1z) ); defparam no_flush_req_os.INIT=4'h1; // @46:18613 CFG2 buff_req_wr_ptr4 ( .A(ifu_emi_req_accepted), .B(lsu_flush), .Y(buff_req_wr_ptr4_Z) ); defparam buff_req_wr_ptr4.INIT=4'h2; // @45:777 CFG2 \gen_buff_loop[0].un1_buff_req_wr_ptr_1_0_a2 ( .A(buff_req_wr_ptr_Z[0]), .B(buff_req_wr_ptr_Z[1]), .Y(un1_buff_req_wr_ptr_1) ); defparam \gen_buff_loop[0].un1_buff_req_wr_ptr_1_0_a2 .INIT=4'h1; // @46:18588 CFG2 un1_req_count_i ( .A(ifu_expipe_req_branch_excpt_req_valid_net), .B(lsu_flush), .Y(un1_req_count_i_Z) ); defparam un1_req_count_i.INIT=4'hE; // @46:18597 CFG2 un10_next_buff_resp_wr_ptr ( .A(buff_resp_wr_ptr_Z[0]), .B(buff_resp_wr_ptr_Z[1]), .Y(wa2) ); defparam un10_next_buff_resp_wr_ptr.INIT=4'h4; // @46:18599 CFG2 \buff_resp_wr_ptr_RNIRTR73[0] ( .A(alloc_resp_qual_Z), .B(buff_resp_wr_ptr_Z[0]), .Y(CO0_3) ); defparam \buff_resp_wr_ptr_RNIRTR73[0] .INIT=4'h8; // @46:18735 CFG2 \gen_buff_loop[0].buff_entry_data_resp.awe2 ( .A(alloc_resp_qual_Z), .B(wa2), .Y(awe2) ); defparam \gen_buff_loop[0].buff_entry_data_resp.awe2 .INIT=4'h8; // @46:18735 CFG3 \gen_buff_loop[0].buff_entry_data_resp.awe0 ( .A(buff_resp_wr_ptr_Z[1]), .B(buff_resp_wr_ptr_Z[0]), .C(alloc_resp_qual_Z), .Y(awe0) ); defparam \gen_buff_loop[0].buff_entry_data_resp.awe0 .INIT=8'h10; // @46:18788 CFG4 un15_buff_resp_head_compressed_0_a2_1 ( .A(ram0_0_0), .B(ram0_1), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(N_662) ); defparam un15_buff_resp_head_compressed_0_a2_1.INIT=16'h0008; // @46:18669 CFG3 \req_count_RNIE5T6F[1] ( .A(un7_iab_readylto1), .B(un7_iab_readylt1), .C(ifu_emi_req_accepted), .Y(SUM_1_i_a2_1_1[1]) ); defparam \req_count_RNIE5T6F[1] .INIT=8'h80; // @46:18588 CFG2 req_flush_i ( .A(ifu_expipe_req_branch_excpt_req_valid_net), .B(lsu_flush), .Y(req_flush_i_Z) ); defparam req_flush_i.INIT=4'h1; // @46:18635 CFG2 buff_req_rd_ptr5 ( .A(ifu_emi_req_accepted), .B(un1_req_count_i_Z), .Y(buff_req_rd_ptr5_Z) ); defparam buff_req_rd_ptr5.INIT=4'hE; // @46:18735 CFG2 \gen_buff_loop[0].buff_entry_error_resp.gen_buff_loop[0].buff_entry_error_resp_ram3__RNO[0] ( .A(CO0_3), .B(buff_resp_wr_ptr_Z[1]), .Y(awe3) ); defparam \gen_buff_loop[0].buff_entry_error_resp.gen_buff_loop[0].buff_entry_error_resp_ram3__RNO[0] .INIT=4'h8; // @46:18774 CFG4 \un1_emi_req_os_at_flush[1] ( .A(emi_req_os_at_flush_Z[1]), .B(num_emi_req_os[1]), .C(lsu_flush), .D(ifu_expipe_req_branch_excpt_req_valid_net), .Y(un1_emi_req_os_at_flush_Z[1]) ); defparam \un1_emi_req_os_at_flush[1] .INIT=16'hCCCA; // @46:18774 CFG4 \un1_emi_req_os_at_flush[0] ( .A(emi_req_os_at_flush_Z[0]), .B(num_emi_req_os[0]), .C(lsu_flush), .D(ifu_expipe_req_branch_excpt_req_valid_net), .Y(un1_emi_req_os_at_flush_Z[0]) ); defparam \un1_emi_req_os_at_flush[0] .INIT=16'hCCCA; // @46:18812 CFG4 \buff_resp_head_addr_1[7] ( .A(buff_entry_addr_req_0_[7]), .B(buff_entry_addr_req_1_[7]), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(ifu_expipe_resp_ireg_vaddr_net_1_Z[7]) ); defparam \buff_resp_head_addr_1[7] .INIT=16'h0C0A; // @46:18812 CFG4 \buff_resp_head_addr_1[15] ( .A(buff_entry_addr_req_0_[15]), .B(buff_entry_addr_req_1_[15]), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(ifu_expipe_resp_ireg_vaddr_net_1_Z[15]) ); defparam \buff_resp_head_addr_1[15] .INIT=16'h0C0A; // @46:18812 CFG4 \buff_resp_head_addr_1[5] ( .A(buff_entry_addr_req_0_[5]), .B(buff_entry_addr_req_1_[5]), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(ifu_expipe_resp_ireg_vaddr_net_1_Z[5]) ); defparam \buff_resp_head_addr_1[5] .INIT=16'h0C0A; // @46:18812 CFG4 \buff_resp_head_addr_1[6] ( .A(buff_entry_addr_req_0_[6]), .B(buff_entry_addr_req_1_[6]), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(ifu_expipe_resp_ireg_vaddr_net_1_Z[6]) ); defparam \buff_resp_head_addr_1[6] .INIT=16'h0C0A; // @46:18812 CFG4 \buff_resp_head_addr_i_m2_1[21] ( .A(buff_entry_addr_req_0_[21]), .B(buff_entry_addr_req_1_[21]), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(N_374_1) ); defparam \buff_resp_head_addr_i_m2_1[21] .INIT=16'h0C0A; // @46:18812 CFG4 \buff_resp_head_addr_i_m2_1[20] ( .A(buff_entry_addr_req_0_[20]), .B(buff_entry_addr_req_1_[20]), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(N_375_1) ); defparam \buff_resp_head_addr_i_m2_1[20] .INIT=16'h0C0A; // @46:18812 CFG4 \buff_resp_head_addr_i_m2_1[17] ( .A(buff_entry_addr_req_0_[17]), .B(buff_entry_addr_req_1_[17]), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(N_378_1) ); defparam \buff_resp_head_addr_i_m2_1[17] .INIT=16'h0C0A; // @46:12143 CFG4 \gen_buff_loop[1].buff_entry_addr_req[1]_RNIBTFUI[4] ( .A(buff_entry_addr_req_0_[4]), .B(buff_entry_addr_req_1_[4]), .C(buff_req_rd_ptr_0), .D(buff_req_rd_ptr_Z[0]), .Y(req_fetch_ptr_1[4]) ); defparam \gen_buff_loop[1].buff_entry_addr_req[1]_RNIBTFUI[4] .INIT=16'h0C0A; // @46:12143 CFG4 \gen_buff_loop[1].buff_entry_addr_req[1]_RNIDVFUI[5] ( .A(buff_entry_addr_req_0_[5]), .B(buff_entry_addr_req_1_[5]), .C(buff_req_rd_ptr_0), .D(buff_req_rd_ptr_Z[0]), .Y(req_fetch_ptr_1[5]) ); defparam \gen_buff_loop[1].buff_entry_addr_req[1]_RNIDVFUI[5] .INIT=16'h0C0A; // @46:18812 CFG4 \buff_resp_head_addr_1[10] ( .A(buff_entry_addr_req_0_[10]), .B(buff_entry_addr_req_1_[10]), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(ifu_expipe_resp_ireg_vaddr_net_1_Z[10]) ); defparam \buff_resp_head_addr_1[10] .INIT=16'h0C0A; // @46:12143 CFG4 \gen_buff_loop[1].buff_entry_addr_req[1]_RNI586GO[10] ( .A(buff_entry_addr_req_0_[10]), .B(buff_entry_addr_req_1_[10]), .C(buff_req_rd_ptr_0), .D(buff_req_rd_ptr_Z[0]), .Y(req_fetch_ptr_1[10]) ); defparam \gen_buff_loop[1].buff_entry_addr_req[1]_RNI586GO[10] .INIT=16'h0C0A; // @46:18735 CFG4 \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1__RNI47S5C[27] ( .A(ram0_27), .B(ram1_27), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(N_407_1) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1__RNI47S5C[27] .INIT=16'h0C0A; // @46:18812 CFG4 \buff_resp_head_addr_i_m2_1[23] ( .A(buff_entry_addr_req_0_[23]), .B(buff_entry_addr_req_1_[23]), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(N_372_1) ); defparam \buff_resp_head_addr_i_m2_1[23] .INIT=16'h0C0A; // @46:18812 CFG4 \buff_resp_head_addr_i_m2_1[24] ( .A(buff_entry_addr_req_0_[24]), .B(buff_entry_addr_req_1_[24]), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(N_371_1) ); defparam \buff_resp_head_addr_i_m2_1[24] .INIT=16'h0C0A; // @46:18812 CFG4 \buff_resp_head_addr_i_m2_1[16] ( .A(buff_entry_addr_req_0_[16]), .B(buff_entry_addr_req_1_[16]), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(N_379_1) ); defparam \buff_resp_head_addr_i_m2_1[16] .INIT=16'h0C0A; // @46:18812 CFG4 \buff_resp_head_addr_i_m2_1[14] ( .A(buff_entry_addr_req_0_[14]), .B(buff_entry_addr_req_1_[14]), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(N_380_1) ); defparam \buff_resp_head_addr_i_m2_1[14] .INIT=16'h0C0A; // @46:18735 CFG4 \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1__RNI69S5C[28] ( .A(ram0_28), .B(ram1_28), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(N_406_1) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1__RNI69S5C[28] .INIT=16'h0C0A; // @46:12143 CFG4 \gen_buff_loop[1].buff_entry_addr_req[1]_RNINQ6GO[19] ( .A(buff_entry_addr_req_0_[19]), .B(buff_entry_addr_req_1_[19]), .C(buff_req_rd_ptr_0), .D(buff_req_rd_ptr_Z[0]), .Y(req_fetch_ptr_1[19]) ); defparam \gen_buff_loop[1].buff_entry_addr_req[1]_RNINQ6GO[19] .INIT=16'h0C0A; // @46:18747 CFG4 \buff_curr_fetch_ptr_1_0[1] ( .A(buff_entry_addr_req_0_[1]), .B(buff_entry_addr_req_1_[1]), .C(buff_req_rd_ptr_0), .D(buff_req_rd_ptr_Z[0]), .Y(req_fetch_ptr_1_Z[1]) ); defparam \buff_curr_fetch_ptr_1_0[1] .INIT=16'h0C0A; // @46:18735 CFG2 \gen_buff_loop[0].buff_entry_data_resp_1.ramout_2[2] ( .A(buff_resp_rd_ptr[1]), .B(ram2_2), .Y(buff_entry_data_resp_1_2[2]) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.ramout_2[2] .INIT=4'h8; // @46:18735 CFG4 \gen_buff_loop[0].buff_entry_data_resp_1.ramout_1[2] ( .A(buff_resp_rd_ptr[0]), .B(ram1_2), .C(ramout_1_0), .D(buff_resp_rd_ptr[1]), .Y(buff_entry_data_resp_1_1[2]) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.ramout_1[2] .INIT=16'h00F8; // @46:18812 CFG4 \buff_resp_head_addr_1[8] ( .A(buff_entry_addr_req_0_[8]), .B(buff_entry_addr_req_1_[8]), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(ifu_expipe_resp_ireg_vaddr_net_1_Z[8]) ); defparam \buff_resp_head_addr_1[8] .INIT=16'h0C0A; // @46:18812 CFG4 \buff_resp_head_addr_1[3] ( .A(buff_entry_addr_req_0_[3]), .B(buff_entry_addr_req_1_[3]), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(ifu_expipe_resp_ireg_vaddr_net_1_Z[3]) ); defparam \buff_resp_head_addr_1[3] .INIT=16'h0C0A; // @46:18814 CFG4 buff_resp_head_hword_high_only_u_i_m2_1_0 ( .A(buff_entry_hword_high_only_req[0]), .B(buff_entry_hword_high_only_req[1]), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(N_401_1) ); defparam buff_resp_head_hword_high_only_u_i_m2_1_0.INIT=16'h0C0A; // @46:18812 CFG4 \buff_resp_head_addr_i_m2_1[22] ( .A(buff_entry_addr_req_0_[22]), .B(buff_entry_addr_req_1_[22]), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(N_373_1) ); defparam \buff_resp_head_addr_i_m2_1[22] .INIT=16'h0C0A; // @46:18812 CFG4 \buff_resp_head_addr_i_m2_1[18] ( .A(buff_entry_addr_req_0_[18]), .B(buff_entry_addr_req_1_[18]), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(N_377_1) ); defparam \buff_resp_head_addr_i_m2_1[18] .INIT=16'h0C0A; // @46:18735 CFG4 \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1__RNI8BS5C[29] ( .A(ram0_29), .B(ram1_29), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(N_405_1) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1__RNI8BS5C[29] .INIT=16'h0C0A; // @46:18735 CFG4 \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1__RNI23Q5C[17] ( .A(ram0_17), .B(ram1_17), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(buff_entry_data_resp_1_1[17]) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1__RNI23Q5C[17] .INIT=16'h0C0A; // @46:12143 CFG4 \gen_buff_loop[1].buff_entry_addr_req[1]_RNIL7GUI[9] ( .A(buff_entry_addr_req_0_[9]), .B(buff_entry_addr_req_1_[9]), .C(buff_req_rd_ptr_0), .D(buff_req_rd_ptr_Z[0]), .Y(req_fetch_ptr_1[9]) ); defparam \gen_buff_loop[1].buff_entry_addr_req[1]_RNIL7GUI[9] .INIT=16'h0C0A; // @46:18735 CFG4 \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram2__RNI07RO5[15] ( .A(ram1_15), .B(ram2_15), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(N_415_1) ); defparam \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram2__RNI07RO5[15] .INIT=16'h0C0A; // @46:12143 CFG4 \gen_buff_loop[1].buff_entry_addr_req[1]_RNI7A6GO[11] ( .A(buff_entry_addr_req_0_[11]), .B(buff_entry_addr_req_1_[11]), .C(buff_req_rd_ptr_0), .D(buff_req_rd_ptr_Z[0]), .Y(req_fetch_ptr_1[11]) ); defparam \gen_buff_loop[1].buff_entry_addr_req[1]_RNI7A6GO[11] .INIT=16'h0C0A; // @46:18735 CFG4 \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1__RNI03S5C[25] ( .A(ram0_25), .B(ram1_25), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(buff_entry_data_resp_1_1[25]) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1__RNI03S5C[25] .INIT=16'h0C0A; // @46:12143 CFG4 \gen_buff_loop[1].buff_entry_addr_req[1]_RNIDI8GO[23] ( .A(buff_entry_addr_req_0_[23]), .B(buff_entry_addr_req_1_[23]), .C(buff_req_rd_ptr_0), .D(buff_req_rd_ptr_Z[0]), .Y(req_fetch_ptr_1[23]) ); defparam \gen_buff_loop[1].buff_entry_addr_req[1]_RNIDI8GO[23] .INIT=16'h0C0A; // @46:12143 CFG4 \gen_buff_loop[1].buff_entry_addr_req[1]_RNIBG8GO[22] ( .A(buff_entry_addr_req_0_[22]), .B(buff_entry_addr_req_1_[22]), .C(buff_req_rd_ptr_0), .D(buff_req_rd_ptr_Z[0]), .Y(req_fetch_ptr_1[22]) ); defparam \gen_buff_loop[1].buff_entry_addr_req[1]_RNIBG8GO[22] .INIT=16'h0C0A; // @46:12143 CFG4 \gen_buff_loop[1].buff_entry_addr_req[1]_RNI9E8GO[21] ( .A(buff_entry_addr_req_0_[21]), .B(buff_entry_addr_req_1_[21]), .C(buff_req_rd_ptr_0), .D(buff_req_rd_ptr_Z[0]), .Y(req_fetch_ptr_1[21]) ); defparam \gen_buff_loop[1].buff_entry_addr_req[1]_RNI9E8GO[21] .INIT=16'h0C0A; // @46:12143 CFG4 \gen_buff_loop[1].buff_entry_addr_req[1]_RNIJO8GO[26] ( .A(buff_entry_addr_req_0_[26]), .B(buff_entry_addr_req_1_[26]), .C(buff_req_rd_ptr_0), .D(buff_req_rd_ptr_Z[0]), .Y(req_fetch_ptr_1[26]) ); defparam \gen_buff_loop[1].buff_entry_addr_req[1]_RNIJO8GO[26] .INIT=16'h0C0A; // @46:12143 CFG4 \gen_buff_loop[1].buff_entry_addr_req[1]_RNIHM8GO[25] ( .A(buff_entry_addr_req_0_[25]), .B(buff_entry_addr_req_1_[25]), .C(buff_req_rd_ptr_0), .D(buff_req_rd_ptr_Z[0]), .Y(req_fetch_ptr_1[25]) ); defparam \gen_buff_loop[1].buff_entry_addr_req[1]_RNIHM8GO[25] .INIT=16'h0C0A; // @46:12143 CFG4 \gen_buff_loop[1].buff_entry_addr_req[1]_RNIFK8GO[24] ( .A(buff_entry_addr_req_0_[24]), .B(buff_entry_addr_req_1_[24]), .C(buff_req_rd_ptr_0), .D(buff_req_rd_ptr_Z[0]), .Y(req_fetch_ptr_1[24]) ); defparam \gen_buff_loop[1].buff_entry_addr_req[1]_RNIFK8GO[24] .INIT=16'h0C0A; // @46:12143 CFG4 \gen_buff_loop[1].buff_entry_addr_req[1]_RNIJ5GUI[8] ( .A(buff_entry_addr_req_0_[8]), .B(buff_entry_addr_req_1_[8]), .C(buff_req_rd_ptr_0), .D(buff_req_rd_ptr_Z[0]), .Y(req_fetch_ptr_1[8]) ); defparam \gen_buff_loop[1].buff_entry_addr_req[1]_RNIJ5GUI[8] .INIT=16'h0C0A; // @46:12143 CFG4 \gen_buff_loop[1].buff_entry_addr_req[1]_RNIH3GUI[7] ( .A(buff_entry_addr_req_0_[7]), .B(buff_entry_addr_req_1_[7]), .C(buff_req_rd_ptr_0), .D(buff_req_rd_ptr_Z[0]), .Y(req_fetch_ptr_1[7]) ); defparam \gen_buff_loop[1].buff_entry_addr_req[1]_RNIH3GUI[7] .INIT=16'h0C0A; // @46:12143 CFG4 \gen_buff_loop[1].buff_entry_addr_req[1]_RNIBIAGO[31] ( .A(buff_entry_addr_req_0_[31]), .B(buff_entry_addr_req_1_[31]), .C(buff_req_rd_ptr_0), .D(buff_req_rd_ptr_Z[0]), .Y(req_fetch_ptr_1[31]) ); defparam \gen_buff_loop[1].buff_entry_addr_req[1]_RNIBIAGO[31] .INIT=16'h0C0A; // @46:18812 CFG4 \buff_resp_head_addr_i_m2_1[26] ( .A(buff_entry_addr_req_0_[26]), .B(buff_entry_addr_req_1_[26]), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(N_369_1) ); defparam \buff_resp_head_addr_i_m2_1[26] .INIT=16'h0C0A; // @46:18812 CFG4 \buff_resp_head_addr_i_m2_1[25] ( .A(buff_entry_addr_req_0_[25]), .B(buff_entry_addr_req_1_[25]), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(N_370_1) ); defparam \buff_resp_head_addr_i_m2_1[25] .INIT=16'h0C0A; // @46:18735 CFG4 \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1__RNI25S5C[26] ( .A(ram0_26), .B(ram1_26), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(N_408_1) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1__RNI25S5C[26] .INIT=16'h0C0A; // @46:12143 CFG4 \gen_buff_loop[1].buff_entry_addr_req[1]_RNI7PFUI[2] ( .A(buff_entry_addr_req_0_[2]), .B(buff_entry_addr_req_1_[2]), .C(buff_req_rd_ptr_0), .D(buff_req_rd_ptr_Z[0]), .Y(req_fetch_ptr_1[2]) ); defparam \gen_buff_loop[1].buff_entry_addr_req[1]_RNI7PFUI[2] .INIT=16'h0C0A; // @46:18812 CFG4 \buff_resp_head_addr_i_m2_1[27] ( .A(buff_entry_addr_req_0_[27]), .B(buff_entry_addr_req_1_[27]), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(N_368_1) ); defparam \buff_resp_head_addr_i_m2_1[27] .INIT=16'h0C0A; // @46:18735 CFG4 \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1__RNIQSR5C[22] ( .A(ram0_22), .B(ram1_22), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(buff_entry_data_resp_1_1[22]) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1__RNIQSR5C[22] .INIT=16'h0C0A; // @46:18735 CFG4 \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1__RNIU0S5C[24] ( .A(ram0_24), .B(ram1_24), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(buff_entry_data_resp_1_1[24]) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1__RNIU0S5C[24] .INIT=16'h0C0A; // @46:18735 CFG4 \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1__RNIOQR5C[21] ( .A(ram0_21), .B(ram1_21), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(buff_entry_data_resp_1_1[21]) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1__RNIOQR5C[21] .INIT=16'h0C0A; // @46:12143 CFG4 \gen_buff_loop[1].buff_entry_addr_req[1]_RNILQ8GO[27] ( .A(buff_entry_addr_req_0_[27]), .B(buff_entry_addr_req_1_[27]), .C(buff_req_rd_ptr_0), .D(buff_req_rd_ptr_Z[0]), .Y(req_fetch_ptr_1[27]) ); defparam \gen_buff_loop[1].buff_entry_addr_req[1]_RNILQ8GO[27] .INIT=16'h0C0A; // @46:18735 CFG4 \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram2__RNIU4RO5[14] ( .A(ram1_14), .B(ram2_14), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(N_416_1) ); defparam \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram2__RNIU4RO5[14] .INIT=16'h0C0A; // @46:18735 CFG2 \gen_buff_loop[0].buff_entry_data_resp_1.ramout_2[15] ( .A(buff_resp_rd_ptr[1]), .B(ram2_15), .Y(buff_entry_data_resp_1_2[15]) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.ramout_2[15] .INIT=4'h8; // @46:18735 CFG4 \gen_buff_loop[0].buff_entry_data_resp_1.ramout_1[15] ( .A(ram0_15), .B(ram1_15), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(buff_entry_data_resp_1_1[15]) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.ramout_1[15] .INIT=16'h0C0A; // @46:18812 CFG4 \buff_resp_head_addr_i_m2_1[19] ( .A(buff_entry_addr_req_0_[19]), .B(buff_entry_addr_req_1_[19]), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(N_376_1) ); defparam \buff_resp_head_addr_i_m2_1[19] .INIT=16'h0C0A; // @46:18812 CFG4 \buff_resp_head_addr_i_m2_1[13] ( .A(buff_entry_addr_req_0_[13]), .B(buff_entry_addr_req_1_[13]), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(N_381_1) ); defparam \buff_resp_head_addr_i_m2_1[13] .INIT=16'h0C0A; // @46:18735 CFG2 \gen_buff_loop[0].buff_entry_data_resp_1.ramout_2[14] ( .A(buff_resp_rd_ptr[1]), .B(ram2_14), .Y(buff_entry_data_resp_1_2[14]) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.ramout_2[14] .INIT=4'h8; // @46:18735 CFG4 \gen_buff_loop[0].buff_entry_data_resp_1.ramout_1[14] ( .A(ram0_14), .B(ram1_14), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(buff_entry_data_resp_1_1[14]) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.ramout_1[14] .INIT=16'h0C0A; // @46:11924 CFG2 \gen_buff_loop[2].buff_entry_addr_req[2]_RNILPGP9[0] ( .A(buff_req_rd_ptr_0), .B(buff_entry_addr_req_2_[0]), .Y(N_423_2) ); defparam \gen_buff_loop[2].buff_entry_addr_req[2]_RNILPGP9[0] .INIT=4'h8; // @46:11924 CFG4 \gen_buff_loop[1].buff_entry_addr_req[1]_RNI3LFUI[0] ( .A(buff_entry_addr_req_0__0), .B(buff_entry_addr_req_1__0), .C(buff_req_rd_ptr_0), .D(buff_req_rd_ptr_Z[0]), .Y(N_423_1) ); defparam \gen_buff_loop[1].buff_entry_addr_req[1]_RNI3LFUI[0] .INIT=16'h0C0A; // @46:12143 CFG4 \gen_buff_loop[1].buff_entry_addr_req[1]_RNI9C6GO[12] ( .A(buff_entry_addr_req_0_[12]), .B(buff_entry_addr_req_1_[12]), .C(buff_req_rd_ptr_0), .D(buff_req_rd_ptr_Z[0]), .Y(req_fetch_ptr_1[12]) ); defparam \gen_buff_loop[1].buff_entry_addr_req[1]_RNI9C6GO[12] .INIT=16'h0C0A; // @46:12143 CFG4 \gen_buff_loop[1].buff_entry_addr_req[1]_RNILO6GO[18] ( .A(buff_entry_addr_req_0_[18]), .B(buff_entry_addr_req_1_[18]), .C(buff_req_rd_ptr_0), .D(buff_req_rd_ptr_Z[0]), .Y(req_fetch_ptr_1[18]) ); defparam \gen_buff_loop[1].buff_entry_addr_req[1]_RNILO6GO[18] .INIT=16'h0C0A; // @46:18735 CFG2 \gen_buff_loop[0].buff_entry_data_resp_1.ramout_2[6] ( .A(buff_resp_rd_ptr[1]), .B(ram2_6), .Y(buff_entry_data_resp_1_2[6]) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.ramout_2[6] .INIT=4'h8; // @46:18735 CFG4 \gen_buff_loop[0].buff_entry_data_resp_1.ramout_1[6] ( .A(ram0_6), .B(ram1_6), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(buff_entry_data_resp_1_1[6]) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.ramout_1[6] .INIT=16'h0C0A; // @46:18812 CFG4 \buff_resp_head_addr_1[9] ( .A(buff_entry_addr_req_0_[9]), .B(buff_entry_addr_req_1_[9]), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(ifu_expipe_resp_ireg_vaddr_net_1_Z[9]) ); defparam \buff_resp_head_addr_1[9] .INIT=16'h0C0A; // @46:18812 CFG4 \buff_resp_head_addr_1[4] ( .A(buff_entry_addr_req_0_[4]), .B(buff_entry_addr_req_1_[4]), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(ifu_expipe_resp_ireg_vaddr_net_1_Z[4]) ); defparam \buff_resp_head_addr_1[4] .INIT=16'h0C0A; // @46:18812 CFG4 \buff_resp_head_addr_i_m2_1[28] ( .A(buff_entry_addr_req_0_[28]), .B(buff_entry_addr_req_1_[28]), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(N_367_1) ); defparam \buff_resp_head_addr_i_m2_1[28] .INIT=16'h0C0A; // @46:12143 CFG4 \gen_buff_loop[1].buff_entry_addr_req[1]_RNIF1GUI[6] ( .A(buff_entry_addr_req_0_[6]), .B(buff_entry_addr_req_1_[6]), .C(buff_req_rd_ptr_0), .D(buff_req_rd_ptr_Z[0]), .Y(req_fetch_ptr_1[6]) ); defparam \gen_buff_loop[1].buff_entry_addr_req[1]_RNIF1GUI[6] .INIT=16'h0C0A; // @46:12143 CFG4 \gen_buff_loop[1].buff_entry_addr_req[1]_RNI9RFUI[3] ( .A(buff_entry_addr_req_0_[3]), .B(buff_entry_addr_req_1_[3]), .C(buff_req_rd_ptr_0), .D(buff_req_rd_ptr_Z[0]), .Y(req_fetch_ptr_1[3]) ); defparam \gen_buff_loop[1].buff_entry_addr_req[1]_RNI9RFUI[3] .INIT=16'h0C0A; // @46:18735 CFG4 \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1__RNI01Q5C[16] ( .A(ram0_16), .B(ram1_16), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(buff_entry_data_resp_1_1[16]) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1__RNI01Q5C[16] .INIT=16'h0C0A; // @46:12143 CFG4 \gen_buff_loop[1].buff_entry_addr_req[1]_RNIDG6GO[14] ( .A(buff_entry_addr_req_0_[14]), .B(buff_entry_addr_req_1_[14]), .C(buff_req_rd_ptr_0), .D(buff_req_rd_ptr_Z[0]), .Y(req_fetch_ptr_1[14]) ); defparam \gen_buff_loop[1].buff_entry_addr_req[1]_RNIDG6GO[14] .INIT=16'h0C0A; // @46:12143 CFG4 \gen_buff_loop[1].buff_entry_addr_req[1]_RNIBE6GO[13] ( .A(buff_entry_addr_req_0_[13]), .B(buff_entry_addr_req_1_[13]), .C(buff_req_rd_ptr_0), .D(buff_req_rd_ptr_Z[0]), .Y(req_fetch_ptr_1[13]) ); defparam \gen_buff_loop[1].buff_entry_addr_req[1]_RNIBE6GO[13] .INIT=16'h0C0A; // @46:12143 CFG4 \gen_buff_loop[1].buff_entry_addr_req[1]_RNIJM6GO[17] ( .A(buff_entry_addr_req_0_[17]), .B(buff_entry_addr_req_1_[17]), .C(buff_req_rd_ptr_0), .D(buff_req_rd_ptr_Z[0]), .Y(req_fetch_ptr_1[17]) ); defparam \gen_buff_loop[1].buff_entry_addr_req[1]_RNIJM6GO[17] .INIT=16'h0C0A; // @46:12143 CFG4 \gen_buff_loop[1].buff_entry_addr_req[1]_RNIHK6GO[16] ( .A(buff_entry_addr_req_0_[16]), .B(buff_entry_addr_req_1_[16]), .C(buff_req_rd_ptr_0), .D(buff_req_rd_ptr_Z[0]), .Y(req_fetch_ptr_1[16]) ); defparam \gen_buff_loop[1].buff_entry_addr_req[1]_RNIHK6GO[16] .INIT=16'h0C0A; // @46:12143 CFG4 \gen_buff_loop[1].buff_entry_addr_req[1]_RNI7C8GO[20] ( .A(buff_entry_addr_req_0_[20]), .B(buff_entry_addr_req_1_[20]), .C(buff_req_rd_ptr_0), .D(buff_req_rd_ptr_Z[0]), .Y(req_fetch_ptr_1[20]) ); defparam \gen_buff_loop[1].buff_entry_addr_req[1]_RNI7C8GO[20] .INIT=16'h0C0A; // @46:12143 CFG4 \gen_buff_loop[1].buff_entry_addr_req[1]_RNINS8GO[28] ( .A(buff_entry_addr_req_0_[28]), .B(buff_entry_addr_req_1_[28]), .C(buff_req_rd_ptr_0), .D(buff_req_rd_ptr_Z[0]), .Y(req_fetch_ptr_1[28]) ); defparam \gen_buff_loop[1].buff_entry_addr_req[1]_RNINS8GO[28] .INIT=16'h0C0A; // @46:18735 CFG4 \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1__RNIOST5C[30] ( .A(ram0_30), .B(ram1_30), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(N_404_1) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1__RNIOST5C[30] .INIT=16'h0C0A; // @46:18735 CFG4 \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1__RNISUR5C[23] ( .A(ram0_23), .B(ram1_23), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(buff_entry_data_resp_1_1[23]) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1__RNISUR5C[23] .INIT=16'h0C0A; // @46:18812 CFG4 \buff_resp_head_addr_1[30] ( .A(buff_entry_addr_req_0_[30]), .B(buff_entry_addr_req_1_[30]), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(ifu_expipe_resp_ireg_vaddr_net_1_Z[30]) ); defparam \buff_resp_head_addr_1[30] .INIT=16'h0C0A; // @46:12143 CFG4 \gen_buff_loop[1].buff_entry_addr_req[1]_RNIFI6GO[15] ( .A(buff_entry_addr_req_0_[15]), .B(buff_entry_addr_req_1_[15]), .C(buff_req_rd_ptr_0), .D(buff_req_rd_ptr_Z[0]), .Y(req_fetch_ptr_1[15]) ); defparam \gen_buff_loop[1].buff_entry_addr_req[1]_RNIFI6GO[15] .INIT=16'h0C0A; // @46:18735 CFG4 \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1__RNI67Q5C[19] ( .A(ram0_19), .B(ram1_19), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(buff_entry_data_resp_1_1[19]) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1__RNI67Q5C[19] .INIT=16'h0C0A; // @46:18735 CFG4 \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1__RNIMOR5C[20] ( .A(ram0_20), .B(ram1_20), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(buff_entry_data_resp_1_1[20]) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1__RNIMOR5C[20] .INIT=16'h0C0A; // @46:12143 CFG4 \gen_buff_loop[1].buff_entry_addr_req[1]_RNIPU8GO[29] ( .A(buff_entry_addr_req_0_[29]), .B(buff_entry_addr_req_1_[29]), .C(buff_req_rd_ptr_0), .D(buff_req_rd_ptr_Z[0]), .Y(N_422_1) ); defparam \gen_buff_loop[1].buff_entry_addr_req[1]_RNIPU8GO[29] .INIT=16'h0C0A; // @46:18735 CFG4 \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1__RNI45Q5C[18] ( .A(ram0_18), .B(ram1_18), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(buff_entry_data_resp_1_1[18]) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1__RNI45Q5C[18] .INIT=16'h0C0A; // @46:18735 CFG4 \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram1__RNI0980D[6] ( .A(ram1_6), .B(ram2_6), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(N_417_1) ); defparam \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram1__RNI0980D[6] .INIT=16'h0C0A; // @46:18812 CFG4 \buff_resp_head_addr_1[2] ( .A(buff_entry_addr_req_0_[2]), .B(buff_entry_addr_req_1_[2]), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(ifu_expipe_resp_ireg_vaddr_net_1_Z[2]) ); defparam \buff_resp_head_addr_1[2] .INIT=16'h0C0A; // @46:18812 CFG4 \buff_resp_head_addr_i_m2_1[12] ( .A(buff_entry_addr_req_0_[12]), .B(buff_entry_addr_req_1_[12]), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(N_382_1) ); defparam \buff_resp_head_addr_i_m2_1[12] .INIT=16'h0C0A; // @46:18735 CFG4 \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1__RNIQUT5C[31] ( .A(ram0_31), .B(ram1_31), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(N_403_1) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram1__RNIQUT5C[31] .INIT=16'h0C0A; // @46:18735 CFG4 \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram1__RNIOKV7D[2] ( .A(buff_resp_rd_ptr[0]), .B(ram1_2), .C(ramout_2_1), .D(buff_resp_rd_ptr[1]), .Y(N_418_1) ); defparam \gen_buff_loop[0].buff_entry_data_resp.gen_buff_loop[0].buff_entry_data_resp_ram1__RNIOKV7D[2] .INIT=16'h00F4; // @46:12143 CFG4 \gen_buff_loop[1].buff_entry_addr_req[1]_RNI9GAGO[30] ( .A(buff_entry_addr_req_0_[30]), .B(buff_entry_addr_req_1_[30]), .C(buff_req_rd_ptr_0), .D(buff_req_rd_ptr_Z[0]), .Y(req_fetch_ptr_1[30]) ); defparam \gen_buff_loop[1].buff_entry_addr_req[1]_RNI9GAGO[30] .INIT=16'h0C0A; // @46:18812 CFG4 \buff_resp_head_addr_i_m2_1[11] ( .A(buff_entry_addr_req_0_[11]), .B(buff_entry_addr_req_1_[11]), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(N_383_1) ); defparam \buff_resp_head_addr_i_m2_1[11] .INIT=16'h0C0A; // @46:18812 CFG4 \buff_resp_head_addr_1[31] ( .A(buff_entry_addr_req_0_[31]), .B(buff_entry_addr_req_1_[31]), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(ifu_expipe_resp_ireg_vaddr_net_1_Z[31]) ); defparam \buff_resp_head_addr_1[31] .INIT=16'h0C0A; // @46:18709 CFG4 \resp_count_2_i_a2_0_2[1] ( .A(resp_count[0]), .B(resp_count[1]), .C(alloc_resp_qual_Z), .D(no_flush_req_os_1z), .Y(resp_count_2_i_a2_0_2_Z[1]) ); defparam \resp_count_2_i_a2_0_2[1] .INIT=16'h0400; // @46:18709 CFG4 \resp_count_RNO_2[1] ( .A(resp_count[0]), .B(resp_count[1]), .C(alloc_resp_qual_Z), .D(no_flush_req_os_1z), .Y(resp_m1_e_1) ); defparam \resp_count_RNO_2[1] .INIT=16'h2100; // @46:18788 CFG4 un15_buff_resp_head_compressed_0_0 ( .A(ram2_1), .B(ram2_0_0), .C(buff_resp_rd_ptr[1]), .D(N_662), .Y(un15_buff_resp_head_compressed_0_0_Z) ); defparam un15_buff_resp_head_compressed_0_0.INIT=16'hFF80; // @46:18812 CFG4 \buff_resp_head_addr_i_0[29] ( .A(buff_entry_addr_req_2_[29]), .B(buff_entry_addr_req_0_[29]), .C(buff_resp_rd_ptr[1]), .D(N_670), .Y(buff_resp_head_addr_i_0_Z[29]) ); defparam \buff_resp_head_addr_i_0[29] .INIT=16'h7350; // @46:18709 CFG4 un1_req_count_i_RNIU964N ( .A(resp_count[1]), .B(resp_count[0]), .C(alloc_resp_qual_Z), .D(un1_req_count_i_Z), .Y(d_N_3_mux_8) ); defparam un1_req_count_i_RNIU964N.INIT=16'h00EA; // @46:18669 CFG4 \req_count_RNO_0[0] ( .A(un1_req_count_i_Z), .B(req_flush_i_Z), .C(buff_req_wr_ptr4_Z), .D(N_330_i), .Y(d_N_5_mux_4) ); defparam \req_count_RNO_0[0] .INIT=16'h31F5; // @48:797 CFG3 no_flush_req_os_RNIE15QF ( .A(cpu_i_resp_valid_sel), .B(req_flush_i_Z), .C(no_flush_req_os_1z), .Y(un5[0]) ); defparam no_flush_req_os_RNIE15QF.INIT=8'h3B; // @46:18643 CFG4 \buff_resp_rd_ptr_4_0[0] ( .A(buff_req_wr_ptr_Z[0]), .B(N_670), .C(lsu_flush), .D(ifu_expipe_req_branch_excpt_req_valid_net), .Y(buff_resp_rd_ptr_4[0]) ); defparam \buff_resp_rd_ptr_4_0[0] .INIT=16'hAAAC; // @46:18643 CFG4 \buff_resp_rd_ptr_4_0[1] ( .A(buff_req_wr_ptr_Z[1]), .B(N_669), .C(lsu_flush), .D(ifu_expipe_req_branch_excpt_req_valid_net), .Y(buff_resp_rd_ptr_4[1]) ); defparam \buff_resp_rd_ptr_4_0[1] .INIT=16'hAAAC; // @46:18619 CFG4 un1_next_buff_resp_wr_ptr_1_sqmuxa ( .A(alloc_resp_qual_Z), .B(lsu_flush), .C(ifu_expipe_req_branch_excpt_req_valid_net), .D(req_flush_i_Z), .Y(un1_next_buff_resp_wr_ptr_1_sqmuxa_Z) ); defparam un1_next_buff_resp_wr_ptr_1_sqmuxa.INIT=16'hAB01; // @46:18812 CFG3 \buff_resp_head_addr[7] ( .A(buff_entry_addr_req_2_[7]), .B(buff_resp_rd_ptr[1]), .C(ifu_expipe_resp_ireg_vaddr_net_1_Z[7]), .Y(ifu_expipe_resp_ireg_vaddr_net_5) ); defparam \buff_resp_head_addr[7] .INIT=8'hF8; // @46:18812 CFG3 \buff_resp_head_addr[15] ( .A(buff_entry_addr_req_2_[15]), .B(buff_resp_rd_ptr[1]), .C(ifu_expipe_resp_ireg_vaddr_net_1_Z[15]), .Y(ifu_expipe_resp_ireg_vaddr_net_13) ); defparam \buff_resp_head_addr[15] .INIT=8'hF8; // @46:18812 CFG3 \buff_resp_head_addr[5] ( .A(buff_entry_addr_req_2_[5]), .B(buff_resp_rd_ptr[1]), .C(ifu_expipe_resp_ireg_vaddr_net_1_Z[5]), .Y(ifu_expipe_resp_ireg_vaddr_net_3) ); defparam \buff_resp_head_addr[5] .INIT=8'hF8; // @46:18812 CFG3 \buff_resp_head_addr[6] ( .A(buff_entry_addr_req_2_[6]), .B(buff_resp_rd_ptr[1]), .C(ifu_expipe_resp_ireg_vaddr_net_1_Z[6]), .Y(ifu_expipe_resp_ireg_vaddr_net_4) ); defparam \buff_resp_head_addr[6] .INIT=8'hF8; // @46:18812 CFG3 \buff_resp_head_addr_i_m2[21] ( .A(buff_entry_addr_req_2_[21]), .B(buff_resp_rd_ptr[1]), .C(N_374_1), .Y(N_374) ); defparam \buff_resp_head_addr_i_m2[21] .INIT=8'hF8; // @46:18812 CFG3 \buff_resp_head_addr_i_m2[20] ( .A(buff_entry_addr_req_2_[20]), .B(buff_resp_rd_ptr[1]), .C(N_375_1), .Y(N_375) ); defparam \buff_resp_head_addr_i_m2[20] .INIT=8'hF8; // @46:18812 CFG3 \buff_resp_head_addr_i_m2[17] ( .A(buff_entry_addr_req_2_[17]), .B(buff_resp_rd_ptr[1]), .C(N_378_1), .Y(N_378) ); defparam \buff_resp_head_addr_i_m2[17] .INIT=8'hF8; // @46:18812 CFG3 \buff_resp_head_addr[10] ( .A(buff_entry_addr_req_2_[10]), .B(buff_resp_rd_ptr[1]), .C(ifu_expipe_resp_ireg_vaddr_net_1_Z[10]), .Y(ifu_expipe_resp_ireg_vaddr_net_8) ); defparam \buff_resp_head_addr[10] .INIT=8'hF8; // @46:18735 CFG3 \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2__RNIOI98E[27] ( .A(ram2_27), .B(buff_resp_rd_ptr[1]), .C(N_407_1), .Y(N_407) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2__RNIOI98E[27] .INIT=8'hF8; // @46:18812 CFG3 \buff_resp_head_addr_i_m2[23] ( .A(buff_entry_addr_req_2_[23]), .B(buff_resp_rd_ptr[1]), .C(N_372_1), .Y(N_372) ); defparam \buff_resp_head_addr_i_m2[23] .INIT=8'hF8; // @46:18812 CFG3 \buff_resp_head_addr_i_m2[24] ( .A(buff_entry_addr_req_2_[24]), .B(buff_resp_rd_ptr[1]), .C(N_371_1), .Y(N_371) ); defparam \buff_resp_head_addr_i_m2[24] .INIT=8'hF8; // @46:18812 CFG3 \buff_resp_head_addr_i_m2[16] ( .A(buff_entry_addr_req_2_[16]), .B(buff_resp_rd_ptr[1]), .C(N_379_1), .Y(N_379) ); defparam \buff_resp_head_addr_i_m2[16] .INIT=8'hF8; // @46:18812 CFG3 \buff_resp_head_addr_i_m2[14] ( .A(buff_entry_addr_req_2_[14]), .B(buff_resp_rd_ptr[1]), .C(N_380_1), .Y(N_380) ); defparam \buff_resp_head_addr_i_m2[14] .INIT=8'hF8; // @46:18735 CFG3 \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2__RNIRL98E[28] ( .A(ram2_28), .B(buff_resp_rd_ptr[1]), .C(N_406_1), .Y(N_406) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2__RNIRL98E[28] .INIT=8'hF8; // @46:18747 CFG3 \buff_curr_fetch_ptr[1] ( .A(NN_1), .B(buff_req_rd_ptr_0), .C(req_fetch_ptr_1_Z[1]), .Y(req_fetch_ptr_0) ); defparam \buff_curr_fetch_ptr[1] .INIT=8'hF8; // @46:18812 CFG3 \buff_resp_head_addr[8] ( .A(buff_entry_addr_req_2_[8]), .B(buff_resp_rd_ptr[1]), .C(ifu_expipe_resp_ireg_vaddr_net_1_Z[8]), .Y(ifu_expipe_resp_ireg_vaddr_net_6) ); defparam \buff_resp_head_addr[8] .INIT=8'hF8; // @46:18812 CFG3 \buff_resp_head_addr[3] ( .A(buff_entry_addr_req_2_[3]), .B(buff_resp_rd_ptr[1]), .C(ifu_expipe_resp_ireg_vaddr_net_1_Z[3]), .Y(ifu_expipe_resp_ireg_vaddr_net_1) ); defparam \buff_resp_head_addr[3] .INIT=8'hF8; // @46:18814 CFG3 buff_resp_head_hword_high_only_u_i_m2 ( .A(buff_entry_hword_high_only_req[2]), .B(buff_resp_rd_ptr[1]), .C(N_401_1), .Y(N_401) ); defparam buff_resp_head_hword_high_only_u_i_m2.INIT=8'hF8; // @46:18812 CFG3 \buff_resp_head_addr_i_m2[22] ( .A(buff_entry_addr_req_2_[22]), .B(buff_resp_rd_ptr[1]), .C(N_373_1), .Y(N_373) ); defparam \buff_resp_head_addr_i_m2[22] .INIT=8'hF8; // @46:18812 CFG3 \buff_resp_head_addr_i_m2[18] ( .A(buff_entry_addr_req_2_[18]), .B(buff_resp_rd_ptr[1]), .C(N_377_1), .Y(N_377) ); defparam \buff_resp_head_addr_i_m2[18] .INIT=8'hF8; // @46:18735 CFG3 \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2__RNIUO98E[29] ( .A(ram2_29), .B(buff_resp_rd_ptr[1]), .C(N_405_1), .Y(N_405) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2__RNIUO98E[29] .INIT=8'hF8; // @46:18735 CFG3 \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2__RNILC68E[17] ( .A(buff_resp_rd_ptr[1]), .B(buff_entry_data_resp_1_1[17]), .C(ram2_17), .Y(buff_entry_data_resp_1[17]) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2__RNILC68E[17] .INIT=8'hEC; // @46:18735 CFG3 \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2__RNIIC98E[25] ( .A(buff_resp_rd_ptr[1]), .B(buff_entry_data_resp_1_1[25]), .C(ram2_25), .Y(buff_entry_data_resp_1[25]) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2__RNIIC98E[25] .INIT=8'hEC; // @46:18812 CFG3 \buff_resp_head_addr_i_m2[26] ( .A(buff_entry_addr_req_2_[26]), .B(buff_resp_rd_ptr[1]), .C(N_369_1), .Y(N_369) ); defparam \buff_resp_head_addr_i_m2[26] .INIT=8'hF8; // @46:18812 CFG3 \buff_resp_head_addr_i_m2[25] ( .A(buff_entry_addr_req_2_[25]), .B(buff_resp_rd_ptr[1]), .C(N_370_1), .Y(N_370) ); defparam \buff_resp_head_addr_i_m2[25] .INIT=8'hF8; // @46:18735 CFG3 \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2__RNILF98E[26] ( .A(ram2_26), .B(buff_resp_rd_ptr[1]), .C(N_408_1), .Y(N_408) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2__RNILF98E[26] .INIT=8'hF8; // @46:18812 CFG3 \buff_resp_head_addr_i_m2[27] ( .A(buff_entry_addr_req_2_[27]), .B(buff_resp_rd_ptr[1]), .C(N_368_1), .Y(N_368) ); defparam \buff_resp_head_addr_i_m2[27] .INIT=8'hF8; // @46:18735 CFG3 \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2__RNI9398E[22] ( .A(buff_resp_rd_ptr[1]), .B(buff_entry_data_resp_1_1[22]), .C(ram2_22), .Y(buff_entry_data_resp_1[22]) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2__RNI9398E[22] .INIT=8'hEC; // @46:18735 CFG3 \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2__RNIF998E[24] ( .A(buff_resp_rd_ptr[1]), .B(buff_entry_data_resp_1_1[24]), .C(ram2_24), .Y(buff_entry_data_resp_1[24]) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2__RNIF998E[24] .INIT=8'hEC; // @46:18735 CFG3 \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2__RNI6098E[21] ( .A(buff_resp_rd_ptr[1]), .B(buff_entry_data_resp_1_1[21]), .C(ram2_21), .Y(buff_entry_data_resp_1[21]) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2__RNI6098E[21] .INIT=8'hEC; // @46:18812 CFG3 \buff_resp_head_addr_i_m2[19] ( .A(buff_entry_addr_req_2_[19]), .B(buff_resp_rd_ptr[1]), .C(N_376_1), .Y(N_376) ); defparam \buff_resp_head_addr_i_m2[19] .INIT=8'hF8; // @46:18812 CFG3 \buff_resp_head_addr_i_m2[13] ( .A(buff_entry_addr_req_2_[13]), .B(buff_resp_rd_ptr[1]), .C(N_381_1), .Y(N_381) ); defparam \buff_resp_head_addr_i_m2[13] .INIT=8'hF8; // @46:18812 CFG3 \buff_resp_head_addr[9] ( .A(buff_entry_addr_req_2_[9]), .B(buff_resp_rd_ptr[1]), .C(ifu_expipe_resp_ireg_vaddr_net_1_Z[9]), .Y(ifu_expipe_resp_ireg_vaddr_net_7) ); defparam \buff_resp_head_addr[9] .INIT=8'hF8; // @46:18812 CFG3 \buff_resp_head_addr[4] ( .A(buff_entry_addr_req_2_[4]), .B(buff_resp_rd_ptr[1]), .C(ifu_expipe_resp_ireg_vaddr_net_1_Z[4]), .Y(ifu_expipe_resp_ireg_vaddr_net_2) ); defparam \buff_resp_head_addr[4] .INIT=8'hF8; // @46:18812 CFG3 \buff_resp_head_addr_i_m2[28] ( .A(buff_entry_addr_req_2_[28]), .B(buff_resp_rd_ptr[1]), .C(N_367_1), .Y(N_367) ); defparam \buff_resp_head_addr_i_m2[28] .INIT=8'hF8; // @46:18735 CFG3 \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2__RNII968E[16] ( .A(buff_resp_rd_ptr[1]), .B(buff_entry_data_resp_1_1[16]), .C(ram2_16), .Y(buff_entry_data_resp_1[16]) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2__RNII968E[16] .INIT=8'hEC; // @46:18735 CFG3 \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2__RNI63C8E[30] ( .A(ram2_30), .B(buff_resp_rd_ptr[1]), .C(N_404_1), .Y(N_404) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2__RNI63C8E[30] .INIT=8'hF8; // @46:18735 CFG3 \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2__RNIC698E[23] ( .A(buff_resp_rd_ptr[1]), .B(buff_entry_data_resp_1_1[23]), .C(ram2_23), .Y(buff_entry_data_resp_1[23]) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2__RNIC698E[23] .INIT=8'hEC; // @46:18812 CFG3 \buff_resp_head_addr[30] ( .A(buff_entry_addr_req_2_[30]), .B(buff_resp_rd_ptr[1]), .C(ifu_expipe_resp_ireg_vaddr_net_1_Z[30]), .Y(ifu_expipe_resp_ireg_vaddr_net_28) ); defparam \buff_resp_head_addr[30] .INIT=8'hF8; // @46:18735 CFG3 \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2__RNIRI68E[19] ( .A(buff_resp_rd_ptr[1]), .B(buff_entry_data_resp_1_1[19]), .C(ram2_19), .Y(buff_entry_data_resp_1[19]) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2__RNIRI68E[19] .INIT=8'hEC; // @46:18735 CFG3 \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2__RNI3T88E[20] ( .A(buff_resp_rd_ptr[1]), .B(buff_entry_data_resp_1_1[20]), .C(ram2_20), .Y(buff_entry_data_resp_1[20]) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2__RNI3T88E[20] .INIT=8'hEC; // @46:18735 CFG3 \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2__RNIOF68E[18] ( .A(buff_resp_rd_ptr[1]), .B(buff_entry_data_resp_1_1[18]), .C(ram2_18), .Y(buff_entry_data_resp_1[18]) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2__RNIOF68E[18] .INIT=8'hEC; // @46:18812 CFG3 \buff_resp_head_addr[2] ( .A(buff_entry_addr_req_2_[2]), .B(buff_resp_rd_ptr[1]), .C(ifu_expipe_resp_ireg_vaddr_net_1_Z[2]), .Y(ifu_expipe_resp_ireg_vaddr_net_0) ); defparam \buff_resp_head_addr[2] .INIT=8'hF8; // @46:18812 CFG3 \buff_resp_head_addr_i_m2[12] ( .A(buff_entry_addr_req_2_[12]), .B(buff_resp_rd_ptr[1]), .C(N_382_1), .Y(N_382) ); defparam \buff_resp_head_addr_i_m2[12] .INIT=8'hF8; // @46:18735 CFG3 \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2__RNI96C8E[31] ( .A(ram2_31), .B(buff_resp_rd_ptr[1]), .C(N_403_1), .Y(N_403) ); defparam \gen_buff_loop[0].buff_entry_data_resp_1.gen_buff_loop[0].buff_entry_data_resp_1_ram2__RNI96C8E[31] .INIT=8'hF8; // @46:18812 CFG3 \buff_resp_head_addr_i_m2[11] ( .A(buff_entry_addr_req_2_[11]), .B(buff_resp_rd_ptr[1]), .C(N_383_1), .Y(N_383) ); defparam \buff_resp_head_addr_i_m2[11] .INIT=8'hF8; // @46:18812 CFG3 \buff_resp_head_addr[31] ( .A(buff_entry_addr_req_2_[31]), .B(buff_resp_rd_ptr[1]), .C(ifu_expipe_resp_ireg_vaddr_net_1_Z[31]), .Y(ifu_expipe_resp_ireg_vaddr_net_29) ); defparam \buff_resp_head_addr[31] .INIT=8'hF8; // @46:18812 CFG3 \buff_resp_head_addr_i[29] ( .A(buff_resp_head_addr_i_0_Z[29]), .B(buff_entry_addr_req_1_[29]), .C(N_669), .Y(N_298) ); defparam \buff_resp_head_addr_i[29] .INIT=8'hBA; // @46:18788 CFG4 un15_buff_resp_head_compressed_0 ( .A(un15_buff_resp_head_compressed_0_0_Z), .B(N_669), .C(ram1_1), .D(ram1_0_0), .Y(un15_buff_resp_head_compressed) ); defparam un15_buff_resp_head_compressed_0.INIT=16'hEAAA; // @46:18587 CFG2 alloc_resp_qual ( .A(iab_resp_alloc), .B(no_flush_req_os_1z), .Y(alloc_resp_qual_Z) ); defparam alloc_resp_qual.INIT=4'h8; // @46:18763 CFG3 emi_req_os_count_at_flush20 ( .A(ifu_emi_req_accepted), .B(iab_resp_alloc), .C(lsu_flush), .Y(emi_req_os_count_at_flush20_Z) ); defparam emi_req_os_count_at_flush20.INIT=8'h20; // @46:18619 CFG4 \buff_resp_wr_ptr_4_0[0] ( .A(alloc_resp_qual_Z), .B(un1_next_buff_resp_wr_ptr_1_sqmuxa_Z), .C(buff_resp_wr_ptr_Z[0]), .D(buff_req_wr_ptr_Z[0]), .Y(N_396) ); defparam \buff_resp_wr_ptr_4_0[0] .INIT=16'h7B48; // @46:18619 CFG4 \buff_resp_wr_ptr_4_0[1] ( .A(CO0_3), .B(un1_next_buff_resp_wr_ptr_1_sqmuxa_Z), .C(buff_resp_wr_ptr_Z[1]), .D(buff_req_wr_ptr_Z[1]), .Y(N_397) ); defparam \buff_resp_wr_ptr_4_0[1] .INIT=16'h7B48; // @46:18790 CFG4 un3_buff_resp_head_uncompressed_full ( .A(last_iab_rd_alignment), .B(iab_req_empty), .C(un15_buff_resp_head_compressed), .D(N_401), .Y(un3_buff_resp_head_uncompressed_full_Z) ); defparam un3_buff_resp_head_uncompressed_full.INIT=16'h0010; // @46:11924 CFG3 \gen_buff_loop[1].buff_entry_addr_req[1]_RNI91JD4P3_0[0] ( .A(N_423_1), .B(un5_N_4_0_i), .C(N_423_2), .Y(N_292) ); defparam \gen_buff_loop[1].buff_entry_addr_req[1]_RNI91JD4P3_0[0] .INIT=8'h37; // @46:18788 CFG2 un10_buff_resp_head_compressed ( .A(buff_entry_data_resp_1[16]), .B(buff_entry_data_resp_1[17]), .Y(un10_buff_resp_head_compressed_Z) ); defparam un10_buff_resp_head_compressed.INIT=4'h8; // @46:18794 CFG4 \buff_resp_head_data_resp_compressed[14] ( .A(buff_entry_data_resp_1_2[14]), .B(buff_entry_data_resp_1_1[14]), .C(N_404), .D(N_306), .Y(buff_resp_head_data_resp_compressed_Z[14]) ); defparam \buff_resp_head_data_resp_compressed[14] .INIT=16'hF0EE; // @46:18794 CFG4 \buff_resp_head_data_resp_compressed[6] ( .A(buff_entry_data_resp_1_2[6]), .B(buff_entry_data_resp_1_1[6]), .C(buff_entry_data_resp_1[22]), .D(N_306), .Y(buff_resp_head_data_resp_compressed_4) ); defparam \buff_resp_head_data_resp_compressed[6] .INIT=16'hF0EE; // @46:18794 CFG4 \buff_resp_head_data_resp_compressed[2] ( .A(buff_entry_data_resp_1_2[2]), .B(buff_entry_data_resp_1_1[2]), .C(buff_entry_data_resp_1[18]), .D(N_306), .Y(buff_resp_head_data_resp_compressed_0) ); defparam \buff_resp_head_data_resp_compressed[2] .INIT=16'hF0EE; // @46:18619 CFG4 \buff_resp_wr_ptr_4[0] ( .A(req_flush_i_Z), .B(N_396), .C(wa2), .D(alloc_resp_qual_Z), .Y(buff_resp_wr_ptr_4_Z[0]) ); defparam \buff_resp_wr_ptr_4[0] .INIT=16'h4CCC; // @46:18619 CFG4 \buff_resp_wr_ptr_4[1] ( .A(req_flush_i_Z), .B(N_397), .C(wa2), .D(alloc_resp_qual_Z), .Y(buff_resp_wr_ptr_4_Z[1]) ); defparam \buff_resp_wr_ptr_4[1] .INIT=16'h4CCC; // @46:18794 CFG4 \buff_resp_head_data_resp_compressed[15] ( .A(buff_entry_data_resp_1_2[15]), .B(buff_entry_data_resp_1_1[15]), .C(N_403), .D(N_306), .Y(buff_resp_head_data_resp_compressed_13) ); defparam \buff_resp_head_data_resp_compressed[15] .INIT=16'hF0EE; // @46:8776 CFG3 \gen_buff_loop[1].buff_entry_addr_req[1]_RNI91JD4P3[0] ( .A(N_423_1), .B(un5_N_4_0_i), .C(N_423_2), .Y(N_292_i) ); defparam \gen_buff_loop[1].buff_entry_addr_req[1]_RNI91JD4P3[0] .INIT=8'hC8; // @46:18774 CFG4 \un20_emi_req_os_at_flush_RNO[1] ( .A(un5[0]), .B(emi_req_os_count_at_flush20_Z), .C(un1_emi_req_os_at_flush_Z[1]), .D(un1_emi_req_os_at_flush_Z[0]), .Y(N_202) ); defparam \un20_emi_req_os_at_flush_RNO[1] .INIT=16'h872D; // @46:18676 CFG3 \emi_req_os_count_RNO[0] ( .A(iab_resp_alloc), .B(ifu_emi_req_accepted), .C(num_emi_req_os[0]), .Y(emi_req_os_count_RNO_Z[0]) ); defparam \emi_req_os_count_RNO[0] .INIT=8'h96; // @46:18814 CFG4 emi_req_os_count_at_flush_0_sqmuxa ( .A(un1_req_count_i_Z), .B(ifu_emi_req_accepted), .C(iab_resp_alloc), .D(lsu_flush), .Y(emi_req_os_count_at_flush_0_sqmuxa_Z) ); defparam emi_req_os_count_at_flush_0_sqmuxa.INIT=16'h820A; // @46:18676 CFG4 \emi_req_os_count_RNO[1] ( .A(iab_resp_alloc), .B(ifu_emi_req_accepted), .C(num_emi_req_os[1]), .D(num_emi_req_os[0]), .Y(emi_req_os_count_RNO_Z[1]) ); defparam \emi_req_os_count_RNO[1] .INIT=16'hB4D2; // @46:18792 CFG4 buff_resp_head_uncompressed_half_i_o2 ( .A(un10_buff_resp_head_compressed_Z), .B(N_306), .C(resp_count[1]), .D(resp_count[0]), .Y(N_329) ); defparam buff_resp_head_uncompressed_half_i_o2.INIT=16'hF7FF; // @46:18788 CFG4 buff_resp_head_compressed ( .A(un15_buff_resp_head_compressed), .B(iab_req_empty), .C(N_306), .D(un10_buff_resp_head_compressed_Z), .Y(iab_head_compressed) ); defparam buff_resp_head_compressed.INIT=16'h0131; // @46:18774 CFG3 \un20_emi_req_os_at_flush[1] ( .A(emi_req_os_count_at_flush_0_sqmuxa_Z), .B(N_202), .C(num_emi_req_os[1]), .Y(un20_emi_req_os_at_flush_Z[1]) ); defparam \un20_emi_req_os_at_flush[1] .INIT=8'hB1; // @46:18790 CFG4 buff_resp_head_uncompressed_full ( .A(un10_buff_resp_head_compressed_Z), .B(N_306), .C(resp_count[1]), .D(un3_buff_resp_head_uncompressed_full_Z), .Y(iab_head_uncompressed_full) ); defparam buff_resp_head_uncompressed_full.INIT=16'hFF80; // @46:12273 CFG4 un10_buff_resp_head_compressed_RNIF0SPP ( .A(un10_buff_resp_head_compressed_Z), .B(N_306), .C(resp_count[1]), .D(resp_count[0]), .Y(N_329_i) ); defparam un10_buff_resp_head_compressed_RNIF0SPP.INIT=16'h0800; // @46:18669 CFG3 no_flush_req_os_RNID148D ( .A(no_flush_req_os_1z), .B(iab_resp_empty), .C(iab_resp_complete_1_1), .Y(SUM_1_i_a2_2_0[1]) ); defparam no_flush_req_os_RNID148D.INIT=8'hA2; // @46:18709 CFG3 \resp_count_RNO_3[1] ( .A(iab_resp_complete_1_1), .B(iab_resp_empty), .C(N_285), .Y(resp_count_RNO_3_Z[1]) ); defparam \resp_count_RNO_3[1] .INIT=8'hB8; // @46:18669 CFG4 buff_resp_empty_0_a2_RNIA2LUU ( .A(N_285), .B(iab_resp_empty), .C(ifu_emi_req_accepted), .D(SUM_1_i_a2_2_0[1]), .Y(SUM_1_i_a2_2[1]) ); defparam buff_resp_empty_0_a2_RNIA2LUU.INIT=16'h0E00; // @46:18588 CFG4 no_flush_req_os_RNIK26RI ( .A(iab_resp_empty), .B(no_flush_req_os_1z), .C(iab_resp_complete_1_1), .D(N_285), .Y(resp_m1_0_a2_0) ); defparam no_flush_req_os_RNIK26RI.INIT=16'hC480; // @46:18709 CFG3 \resp_count_RNO_1[1] ( .A(resp_m1_e_1), .B(resp_count_RNO_3_Z[1]), .C(un1_req_count_i_Z), .Y(resp_N_3_mux) ); defparam \resp_count_RNO_1[1] .INIT=8'h08; // @46:18588 CFG2 no_flush_req_os_RNI6C8RFN ( .A(ifu_expipe_resp_ready_net), .B(resp_m1_0_a2_0), .Y(resp_complete_qual) ); defparam no_flush_req_os_RNI6C8RFN.INIT=4'h8; // @46:18669 CFG4 \req_count_RNO_3[1] ( .A(un7_iab_readylt1), .B(un7_iab_readylto1), .C(ifu_emi_req_accepted), .D(iab_resp_complete_u_0), .Y(SUM_1_i_o2_0_0[1]) ); defparam \req_count_RNO_3[1] .INIT=16'h3313; // @46:18588 CFG4 \req_count_RNO_5[1] ( .A(un7_iab_readylto1), .B(un7_iab_readylt1), .C(SUM_1_i_a2_2[1]), .D(ifu_expipe_resp_ready_net), .Y(un12_req_count_2_1_1[1]) ); defparam \req_count_RNO_5[1] .INIT=16'h2000; // @46:18709 CFG4 \resp_count_2_i_a2_1[1] ( .A(resp_count[0]), .B(resp_count[1]), .C(resp_complete_qual), .D(alloc_resp_qual_Z), .Y(N_654) ); defparam \resp_count_2_i_a2_1[1] .INIT=16'h0800; // @46:18669 CFG4 \req_count_RNO_1[0] ( .A(req_flush_i_Z), .B(resp_m1_0_a2_0), .C(buff_req_wr_ptr4_Z), .D(un1_req_count_i_Z), .Y(un12_N_5_mux) ); defparam \req_count_RNO_1[0] .INIT=16'h8088; // @46:18588 CFG4 \req_count_RNO_1[1] ( .A(SUM_1_i_a2_1_1[1]), .B(un12_req_count_2_1_1[1]), .C(resp_m1_0_a2_0), .D(req_flush_i_Z), .Y(un12_req_count_2_1[1]) ); defparam \req_count_RNO_1[1] .INIT=16'h3100; // @46:18641 CFG3 un1_req_count_i_RNI38RFLN ( .A(resp_m1_0_a2_0), .B(un1_req_count_i_Z), .C(ifu_expipe_resp_ready_net), .Y(un1_req_count_2_i) ); defparam un1_req_count_i_RNI38RFLN.INIT=8'hEC; // @46:18704 CFG4 \resp_count_RNO[0] ( .A(alloc_resp_qual_Z), .B(resp_count[0]), .C(resp_complete_qual), .D(un1_req_count_i_Z), .Y(N_300_i) ); defparam \resp_count_RNO[0] .INIT=16'h0096; // @46:18588 CFG4 \req_count_RNO[1] ( .A(N_438), .B(un12_req_count_2_1[1]), .C(SUM_1_i_a2_1_1[1]), .D(ifu_expipe_resp_ready_net), .Y(req_count_RNO_Z[1]) ); defparam \req_count_RNO[1] .INIT=16'h4404; // @46:18728 CFG4 \gen_buff_loop[0].buff_entry_addr_req[0]2_0 ( .A(un1_buff_req_wr_ptr_1), .B(lsu_flush), .C(N_341), .D(N_345), .Y(buff_entry_addr_req_0_2) ); defparam \gen_buff_loop[0].buff_entry_addr_req[0]2_0 .INIT=16'h0222; // @46:18728 CFG4 \gen_buff_loop[1].buff_entry_addr_req[1]2_0 ( .A(buff_req_wr_ptr_Z[0]), .B(lsu_flush), .C(N_341), .D(N_345), .Y(buff_entry_addr_req_1_2) ); defparam \gen_buff_loop[1].buff_entry_addr_req[1]2_0 .INIT=16'h0222; // @46:18728 CFG4 \gen_buff_loop[2].buff_entry_addr_req[2]2_0 ( .A(buff_req_wr_ptr_Z[1]), .B(lsu_flush), .C(N_341), .D(N_345), .Y(buff_entry_addr_req_2_2) ); defparam \gen_buff_loop[2].buff_entry_addr_req[2]2_0 .INIT=16'h0222; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_ifu_iab_32s_2s_3s_2s_0s */ module miv_rv32_fetch_unit_32s_18446744071562067968_0s_3s_2s_3s_2s_2s_0s_1s_Z14 ( ifu_expipe_resp_ireg_vaddr_net_5, ifu_expipe_resp_ireg_vaddr_net_13, ifu_expipe_resp_ireg_vaddr_net_3, ifu_expipe_resp_ireg_vaddr_net_4, ifu_expipe_resp_ireg_vaddr_net_8, ifu_expipe_resp_ireg_vaddr_net_6, ifu_expipe_resp_ireg_vaddr_net_1, ifu_expipe_resp_ireg_vaddr_net_7, ifu_expipe_resp_ireg_vaddr_net_2, ifu_expipe_resp_ireg_vaddr_net_28, ifu_expipe_resp_ireg_vaddr_net_0, ifu_expipe_resp_ireg_vaddr_net_29, exu_alu_result_iv_8_0_0, ifu_expipe_resp_ireg_net, apb_i_req_addr_net, cpu_d_req_addr_net, cpu_i_resp_rd_data_sel, next_req_fetch_ptr_yy_3, next_req_fetch_ptr_yy_2, next_req_fetch_ptr_yy_0, exu_alu_operand1_0, exu_alu_operand0_0, next_req_fetch_ptr_0, un3_branch_cond_ex_0, next_req_fetch_ptr_xx_0, N_374, N_375, N_378, N_372, N_371, N_379, N_380, N_373, N_377, N_369, N_370, N_368, N_376, N_381, N_367, N_382, N_383, N_298, N_292, i_trx_os_buff_ready, un1_cpu_i_req_ready, ifu_expipe_req_fenci_proceed_net, lsu_flush, un1_ifu_expipe_resp_next_vaddr_1z, ifu_expipe_req_branch_excpt_req_valid_net, ifu_expipe_req_branch_excpt_req_valid_1_0_0, N_133_i, N_131_i, N_129_i, N_121_i, N_119_i, N_117_i, N_115_i, N_289_i, N_141_i, N_139_i, N_137_i, N_291_i, N_123_i, N_127_i, N_125_i, N_125, N_123, N_127, N_108, ifu_expipe_resp_access_mem_error_net, cpu_i_resp_error_sel, ifu_expipe_resp_ready_net, exu_m4_0_1, exu_m3_0_2, exu_alu_result_iv_10_out, ifu_expipe_resp_access_misalign_error_i_1, un5_N_8, N_26_0, exu_alu_result192_1, N_424, ifu_emi_req_valid_i_0, trace_priv_i, iab_ready_1z, cpu_i_resp_valid_sel, N_306, ifu_expipe_req_branch_excpt_req_fenci_net, N_764, ifu_N_11, ifu_emi_req_valid_i_o2_1_0_1z, exu_result_valid_iv_1_0, ifu_expipe_req_branch_excpt_req_valid_1_0, un1_exu_alu_result212_3_i_0, exu_result_valid_iv_1, div_finish, un1_alu_op_sel_int, exu_m1_e_0, N_14_i, un128_exu_alu_result_cry_31_RNI01RTHF, exu_alu_result_int_cry_0_Y, exu_m4_1, N_290_i, un5_N_4_0_i, un3_next_req_fetch_ptr_s_29_S, un3_next_req_fetch_ptr_cry_27_S, un3_next_req_fetch_ptr_cry_26_S, un3_next_req_fetch_ptr_cry_25_S, un3_next_req_fetch_ptr_cry_23_S, un3_next_req_fetch_ptr_cry_22_S, un3_next_req_fetch_ptr_cry_21_S, un3_next_req_fetch_ptr_cry_18_S, un3_next_req_fetch_ptr_cry_16_S, un3_next_req_fetch_ptr_cry_15_S, sticky_reset_reg_1z, PF_CCC_0_0_OUT0_FABCLK_0, dff ) ; output ifu_expipe_resp_ireg_vaddr_net_5 ; output ifu_expipe_resp_ireg_vaddr_net_13 ; output ifu_expipe_resp_ireg_vaddr_net_3 ; output ifu_expipe_resp_ireg_vaddr_net_4 ; output ifu_expipe_resp_ireg_vaddr_net_8 ; output ifu_expipe_resp_ireg_vaddr_net_6 ; output ifu_expipe_resp_ireg_vaddr_net_1 ; output ifu_expipe_resp_ireg_vaddr_net_7 ; output ifu_expipe_resp_ireg_vaddr_net_2 ; output ifu_expipe_resp_ireg_vaddr_net_28 ; output ifu_expipe_resp_ireg_vaddr_net_0 ; output ifu_expipe_resp_ireg_vaddr_net_29 ; input exu_alu_result_iv_8_0_0 ; output [31:16] ifu_expipe_resp_ireg_net ; output [31:2] apb_i_req_addr_net ; input [31:1] cpu_d_req_addr_net ; input [31:0] cpu_i_resp_rd_data_sel ; output next_req_fetch_ptr_yy_3 ; output next_req_fetch_ptr_yy_2 ; output next_req_fetch_ptr_yy_0 ; input exu_alu_operand1_0 ; input exu_alu_operand0_0 ; output next_req_fetch_ptr_0 ; input un3_branch_cond_ex_0 ; output next_req_fetch_ptr_xx_0 ; output N_374 ; output N_375 ; output N_378 ; output N_372 ; output N_371 ; output N_379 ; output N_380 ; output N_373 ; output N_377 ; output N_369 ; output N_370 ; output N_368 ; output N_376 ; output N_381 ; output N_367 ; output N_382 ; output N_383 ; output N_298 ; output N_292 ; input i_trx_os_buff_ready ; input un1_cpu_i_req_ready ; input ifu_expipe_req_fenci_proceed_net ; input lsu_flush ; output un1_ifu_expipe_resp_next_vaddr_1z ; input ifu_expipe_req_branch_excpt_req_valid_net ; input ifu_expipe_req_branch_excpt_req_valid_1_0_0 ; output N_133_i ; output N_131_i ; output N_129_i ; output N_121_i ; output N_119_i ; output N_117_i ; output N_115_i ; output N_289_i ; output N_141_i ; output N_139_i ; output N_137_i ; output N_291_i ; output N_123_i ; output N_127_i ; output N_125_i ; output N_125 ; output N_123 ; output N_127 ; output N_108 ; output ifu_expipe_resp_access_mem_error_net ; input cpu_i_resp_error_sel ; input ifu_expipe_resp_ready_net ; input exu_m4_0_1 ; input exu_m3_0_2 ; input exu_alu_result_iv_10_out ; output ifu_expipe_resp_access_misalign_error_i_1 ; output un5_N_8 ; input N_26_0 ; input exu_alu_result192_1 ; output N_424 ; output ifu_emi_req_valid_i_0 ; input trace_priv_i ; output iab_ready_1z ; input cpu_i_resp_valid_sel ; output N_306 ; input ifu_expipe_req_branch_excpt_req_fenci_net ; input N_764 ; output ifu_N_11 ; output ifu_emi_req_valid_i_o2_1_0_1z ; input exu_result_valid_iv_1_0 ; input ifu_expipe_req_branch_excpt_req_valid_1_0 ; input un1_exu_alu_result212_3_i_0 ; input exu_result_valid_iv_1 ; input div_finish ; input un1_alu_op_sel_int ; input exu_m1_e_0 ; input N_14_i ; input un128_exu_alu_result_cry_31_RNI01RTHF ; input exu_alu_result_int_cry_0_Y ; input exu_m4_1 ; output N_290_i ; output un5_N_4_0_i ; output un3_next_req_fetch_ptr_s_29_S ; output un3_next_req_fetch_ptr_cry_27_S ; output un3_next_req_fetch_ptr_cry_26_S ; output un3_next_req_fetch_ptr_cry_25_S ; output un3_next_req_fetch_ptr_cry_23_S ; output un3_next_req_fetch_ptr_cry_22_S ; output un3_next_req_fetch_ptr_cry_21_S ; output un3_next_req_fetch_ptr_cry_18_S ; output un3_next_req_fetch_ptr_cry_16_S ; output un3_next_req_fetch_ptr_cry_15_S ; output sticky_reset_reg_1z ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input dff ; wire ifu_expipe_resp_ireg_vaddr_net_5 ; wire ifu_expipe_resp_ireg_vaddr_net_13 ; wire ifu_expipe_resp_ireg_vaddr_net_3 ; wire ifu_expipe_resp_ireg_vaddr_net_4 ; wire ifu_expipe_resp_ireg_vaddr_net_8 ; wire ifu_expipe_resp_ireg_vaddr_net_6 ; wire ifu_expipe_resp_ireg_vaddr_net_1 ; wire ifu_expipe_resp_ireg_vaddr_net_7 ; wire ifu_expipe_resp_ireg_vaddr_net_2 ; wire ifu_expipe_resp_ireg_vaddr_net_28 ; wire ifu_expipe_resp_ireg_vaddr_net_0 ; wire ifu_expipe_resp_ireg_vaddr_net_29 ; wire exu_alu_result_iv_8_0_0 ; wire next_req_fetch_ptr_yy_3 ; wire next_req_fetch_ptr_yy_2 ; wire next_req_fetch_ptr_yy_0 ; wire exu_alu_operand1_0 ; wire exu_alu_operand0_0 ; wire next_req_fetch_ptr_0 ; wire un3_branch_cond_ex_0 ; wire next_req_fetch_ptr_xx_0 ; wire N_374 ; wire N_375 ; wire N_378 ; wire N_372 ; wire N_371 ; wire N_379 ; wire N_380 ; wire N_373 ; wire N_377 ; wire N_369 ; wire N_370 ; wire N_368 ; wire N_376 ; wire N_381 ; wire N_367 ; wire N_382 ; wire N_383 ; wire N_298 ; wire N_292 ; wire i_trx_os_buff_ready ; wire un1_cpu_i_req_ready ; wire ifu_expipe_req_fenci_proceed_net ; wire lsu_flush ; wire un1_ifu_expipe_resp_next_vaddr_1z ; wire ifu_expipe_req_branch_excpt_req_valid_net ; wire ifu_expipe_req_branch_excpt_req_valid_1_0_0 ; wire N_133_i ; wire N_131_i ; wire N_129_i ; wire N_121_i ; wire N_119_i ; wire N_117_i ; wire N_115_i ; wire N_289_i ; wire N_141_i ; wire N_139_i ; wire N_137_i ; wire N_291_i ; wire N_123_i ; wire N_127_i ; wire N_125_i ; wire N_125 ; wire N_123 ; wire N_127 ; wire N_108 ; wire ifu_expipe_resp_access_mem_error_net ; wire cpu_i_resp_error_sel ; wire ifu_expipe_resp_ready_net ; wire exu_m4_0_1 ; wire exu_m3_0_2 ; wire exu_alu_result_iv_10_out ; wire ifu_expipe_resp_access_misalign_error_i_1 ; wire un5_N_8 ; wire N_26_0 ; wire exu_alu_result192_1 ; wire N_424 ; wire ifu_emi_req_valid_i_0 ; wire trace_priv_i ; wire iab_ready_1z ; wire cpu_i_resp_valid_sel ; wire N_306 ; wire ifu_expipe_req_branch_excpt_req_fenci_net ; wire N_764 ; wire ifu_N_11 ; wire ifu_emi_req_valid_i_o2_1_0_1z ; wire exu_result_valid_iv_1_0 ; wire ifu_expipe_req_branch_excpt_req_valid_1_0 ; wire un1_exu_alu_result212_3_i_0 ; wire exu_result_valid_iv_1 ; wire div_finish ; wire un1_alu_op_sel_int ; wire exu_m1_e_0 ; wire N_14_i ; wire un128_exu_alu_result_cry_31_RNI01RTHF ; wire exu_alu_result_int_cry_0_Y ; wire exu_m4_1 ; wire N_290_i ; wire un5_N_4_0_i ; wire un3_next_req_fetch_ptr_s_29_S ; wire un3_next_req_fetch_ptr_cry_27_S ; wire un3_next_req_fetch_ptr_cry_26_S ; wire un3_next_req_fetch_ptr_cry_25_S ; wire un3_next_req_fetch_ptr_cry_23_S ; wire un3_next_req_fetch_ptr_cry_22_S ; wire un3_next_req_fetch_ptr_cry_21_S ; wire un3_next_req_fetch_ptr_cry_18_S ; wire un3_next_req_fetch_ptr_cry_16_S ; wire un3_next_req_fetch_ptr_cry_15_S ; wire sticky_reset_reg_1z ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire dff ; wire [31:2] req_fetch_ptr_1; wire [1:1] buff_req_rd_ptr; wire [31:0] buff_entry_addr_req_2_; wire [31:16] ifu_expipe_resp_ireg_1_0_Z; wire [31:16] ifu_expipe_resp_ireg_1_1_Z; wire [1:0] buff_resp_rd_ptr; wire [25:16] buff_entry_data_resp_1; wire [1:0] ifu_expipe_resp_ireg_i_a2_0_0_Z; wire [1:0] num_emi_req_os; wire [0:0] buff_entry_addr_req_0_; wire [0:0] buff_entry_addr_req_1_; wire [13:0] ifu_expipe_resp_ireg_i_1_Z; wire [13:0] ifu_expipe_resp_ireg_i_0_Z; wire [1:0] resp_count; wire [1:1] req_fetch_ptr; wire [15:2] buff_resp_head_data_resp_compressed; wire [15:2] ifu_expipe_resp_ireg_i_3_0_Z; wire [13:0] ifu_expipe_resp_ireg_i_3_Z; wire [15:15] ifu_expipe_resp_ireg_i_o2_0_Z; wire [29:16] ifu_expipe_resp_ireg_1_3_Z; wire sticky_fence_reg_Z ; wire VCC ; wire sticky_fence_reg_2 ; wire GND ; wire sticky_branch_reg_Z ; wire N_294_i ; wire ifu_emi_req_accepted ; wire fence_i_hold_Z ; wire N_286_i ; wire last_iab_rd_alignment_Z ; wire last_iab_rd_alignment_4_iv_i_Z ; wire N_635_i ; wire un3_next_req_fetch_ptr_cry_1_cy_Z ; wire un3_next_req_fetch_ptr_cry_1_cy_S ; wire un3_next_req_fetch_ptr_cry_1_cy_Y ; wire un3_next_req_fetch_ptr_cry_1_Z ; wire un3_next_req_fetch_ptr_cry_1_S ; wire un3_next_req_fetch_ptr_cry_1_Y ; wire un3_next_req_fetch_ptr_cry_2_Z ; wire un3_next_req_fetch_ptr_cry_2_S ; wire un3_next_req_fetch_ptr_cry_2_Y ; wire un3_next_req_fetch_ptr_cry_3_Z ; wire un3_next_req_fetch_ptr_cry_3_S ; wire un3_next_req_fetch_ptr_cry_3_Y ; wire un3_next_req_fetch_ptr_cry_4_Z ; wire un3_next_req_fetch_ptr_cry_4_S ; wire un3_next_req_fetch_ptr_cry_4_Y ; wire un3_next_req_fetch_ptr_cry_5_Z ; wire un3_next_req_fetch_ptr_cry_5_S ; wire un3_next_req_fetch_ptr_cry_5_Y ; wire un3_next_req_fetch_ptr_cry_6_Z ; wire un3_next_req_fetch_ptr_cry_6_S ; wire un3_next_req_fetch_ptr_cry_6_Y ; wire un3_next_req_fetch_ptr_cry_7_Z ; wire un3_next_req_fetch_ptr_cry_7_S ; wire un3_next_req_fetch_ptr_cry_7_Y ; wire un3_next_req_fetch_ptr_cry_8_Z ; wire un3_next_req_fetch_ptr_cry_8_S ; wire un3_next_req_fetch_ptr_cry_8_Y ; wire un3_next_req_fetch_ptr_cry_9_Z ; wire un3_next_req_fetch_ptr_cry_9_S ; wire un3_next_req_fetch_ptr_cry_9_Y ; wire un3_next_req_fetch_ptr_cry_10_Z ; wire un3_next_req_fetch_ptr_cry_10_S ; wire un3_next_req_fetch_ptr_cry_10_Y ; wire un3_next_req_fetch_ptr_cry_11_Z ; wire un3_next_req_fetch_ptr_cry_11_S ; wire un3_next_req_fetch_ptr_cry_11_Y ; wire un3_next_req_fetch_ptr_cry_12_Z ; wire un3_next_req_fetch_ptr_cry_12_S ; wire un3_next_req_fetch_ptr_cry_12_Y ; wire un3_next_req_fetch_ptr_cry_13_Z ; wire un3_next_req_fetch_ptr_cry_13_S ; wire un3_next_req_fetch_ptr_cry_13_Y ; wire un3_next_req_fetch_ptr_cry_14_Z ; wire un3_next_req_fetch_ptr_cry_14_S ; wire un3_next_req_fetch_ptr_cry_14_Y ; wire un3_next_req_fetch_ptr_cry_15_Z ; wire un3_next_req_fetch_ptr_cry_15_Y ; wire un3_next_req_fetch_ptr_cry_16_Z ; wire un3_next_req_fetch_ptr_cry_16_Y ; wire un3_next_req_fetch_ptr_cry_17_Z ; wire un3_next_req_fetch_ptr_cry_17_S ; wire un3_next_req_fetch_ptr_cry_17_Y ; wire un3_next_req_fetch_ptr_cry_18_Z ; wire un3_next_req_fetch_ptr_cry_18_Y ; wire un3_next_req_fetch_ptr_cry_19_Z ; wire un3_next_req_fetch_ptr_cry_19_S ; wire un3_next_req_fetch_ptr_cry_19_Y ; wire un3_next_req_fetch_ptr_cry_20_Z ; wire un3_next_req_fetch_ptr_cry_20_S ; wire un3_next_req_fetch_ptr_cry_20_Y ; wire un3_next_req_fetch_ptr_cry_21_Z ; wire un3_next_req_fetch_ptr_cry_21_Y ; wire un3_next_req_fetch_ptr_cry_22_Z ; wire un3_next_req_fetch_ptr_cry_22_Y ; wire un3_next_req_fetch_ptr_cry_23_Z ; wire un3_next_req_fetch_ptr_cry_23_Y ; wire un3_next_req_fetch_ptr_cry_24_Z ; wire un3_next_req_fetch_ptr_cry_24_S ; wire un3_next_req_fetch_ptr_cry_24_Y ; wire un3_next_req_fetch_ptr_cry_25_Z ; wire un3_next_req_fetch_ptr_cry_25_Y ; wire un3_next_req_fetch_ptr_cry_26_Z ; wire un3_next_req_fetch_ptr_cry_26_Y ; wire un3_next_req_fetch_ptr_cry_27_Z ; wire un3_next_req_fetch_ptr_cry_27_Y ; wire N_422_1 ; wire un3_next_req_fetch_ptr_s_29_FCO ; wire un3_next_req_fetch_ptr_s_29_Y ; wire un3_next_req_fetch_ptr_cry_28_Z ; wire un3_next_req_fetch_ptr_cry_28_S ; wire un3_next_req_fetch_ptr_cry_28_Y ; wire N_311 ; wire N_290_i_1 ; wire N_674 ; wire ifu_m1_e_0_1_Z ; wire ifu_m1_e_0_Z ; wire un5_N_4_0_i_1_0_1 ; wire un5_N_4_0_i_1 ; wire un5_N_5_mux ; wire un5_m1_e_1_Z ; wire un5_fetch_ptr_sel_0_a2_0_a1_Z ; wire ifu_m7_i_m2_1 ; wire ifu_N_6 ; wire N_672 ; wire N_404 ; wire ram0_14 ; wire N_667 ; wire N_416_1 ; wire ram0_6 ; wire N_417_1 ; wire N_403 ; wire ram0_15 ; wire N_415_1 ; wire N_641_i_Z ; wire N_295_i ; wire last_iab_rd_alignment_4_iv_i_1_Z ; wire N_288_i ; wire N_287_i ; wire iab_resp_empty ; wire ram0_2 ; wire N_418_1 ; wire N_521 ; wire un5_m3_i_a3_0_Z ; wire N_401 ; wire N_329_i ; wire N_307 ; wire N_671 ; wire N_669 ; wire N_670 ; wire ram1_0 ; wire ram0_0 ; wire N_352 ; wire ram3_0 ; wire ram2_0 ; wire N_346 ; wire N_673 ; wire emi_resp_head_uncompressed_full ; wire N_676 ; wire N_683 ; wire un7_iab_readylto1 ; wire un7_iab_readylt1 ; wire N_675 ; wire N_297_i ; wire ifu_expipe_resp_access_misalign_error_i_o2_0_Z ; wire no_flush_req_os ; wire iab_resp_alloc_Z ; wire N_682 ; wire N_685 ; wire N_686 ; wire ifu_expipe_resp_access_mem_error_u_0_1559_tz_0 ; wire ifu_expipe_resp_access_mem_error_u_0_a2_0 ; wire ram1_7 ; wire ram2_7 ; wire ram1_9 ; wire ram2_9 ; wire ram1_8 ; wire ram2_8 ; wire ram1_5 ; wire ram2_5 ; wire ram1_10 ; wire ram2_10 ; wire ram1_3 ; wire ram2_3 ; wire ram1_11 ; wire ram2_11 ; wire ram1_4 ; wire ram2_4 ; wire ram1_12 ; wire ram2_12 ; wire ram1_13 ; wire ram2_13 ; wire ifu_expipe_resp_access_mem_error_u_0_1559_0 ; wire N_447 ; wire ram0_7 ; wire ram0_9 ; wire ram0_8 ; wire ram0_5 ; wire ram0_10 ; wire N_408 ; wire ram0_3 ; wire ram0_11 ; wire N_407 ; wire ram0_4 ; wire ram0_12 ; wire N_406 ; wire ram0_13 ; wire N_405 ; wire N_308 ; wire iab_resp_complete_1_1_0_Z ; wire N_344 ; wire N_284_i ; wire next_req_is_hword_high_only ; wire iab_resp_complete_1_1_Z ; wire iab_head_uncompressed_full ; wire iab_head_compressed ; wire N_320 ; wire N_342 ; wire un5_m1_e_0_Z ; wire ram2_0_0 ; wire N_629 ; wire ram2_1 ; wire N_623 ; wire ifu_expipe_resp_valid_3_0_i_0_Z ; wire ram1_0_0 ; wire ram0_0_0 ; wire ram1_1 ; wire ram0_1 ; wire N_329 ; wire ifu_expipe_resp_access_mem_error_u_0_0_RNO_Z ; wire N_285 ; wire ifu_expipe_resp_access_mem_error_u_0_0_Z ; wire N_687 ; wire N_681 ; wire N_684 ; wire iab_resp_complete_u_0 ; wire N_319 ; wire iab_req_empty ; wire N_341 ; wire N_356 ; wire N_345 ; wire N_15105 ; wire N_15106 ; // @46:12105 SLE sticky_fence_reg ( .Q(sticky_fence_reg_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sticky_fence_reg_2), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:12076 SLE sticky_branch_reg ( .Q(sticky_branch_reg_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_294_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:12060 SLE sticky_reset_reg ( .Q(sticky_reset_reg_1z), .ADn(GND), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(GND), .EN(ifu_emi_req_accepted), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:12096 SLE fence_i_hold ( .Q(fence_i_hold_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_286_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:12199 SLE last_iab_rd_alignment ( .Q(last_iab_rd_alignment_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(last_iab_rd_alignment_4_iv_i_Z), .EN(N_635_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:12143 ARI1 un3_next_req_fetch_ptr_cry_1_cy ( .FCO(un3_next_req_fetch_ptr_cry_1_cy_Z), .S(un3_next_req_fetch_ptr_cry_1_cy_S), .Y(un3_next_req_fetch_ptr_cry_1_cy_Y), .B(req_fetch_ptr_1[2]), .C(buff_req_rd_ptr[1]), .D(buff_entry_addr_req_2_[2]), .A(VCC), .FCI(VCC) ); defparam un3_next_req_fetch_ptr_cry_1_cy.INIT=20'h4EA00; // @46:12143 ARI1 un3_next_req_fetch_ptr_cry_1 ( .FCO(un3_next_req_fetch_ptr_cry_1_Z), .S(un3_next_req_fetch_ptr_cry_1_S), .Y(un3_next_req_fetch_ptr_cry_1_Y), .B(req_fetch_ptr_1[3]), .C(buff_req_rd_ptr[1]), .D(buff_entry_addr_req_2_[3]), .A(VCC), .FCI(un3_next_req_fetch_ptr_cry_1_cy_Z) ); defparam un3_next_req_fetch_ptr_cry_1.INIT=20'h4EA00; // @46:12143 ARI1 un3_next_req_fetch_ptr_cry_2 ( .FCO(un3_next_req_fetch_ptr_cry_2_Z), .S(un3_next_req_fetch_ptr_cry_2_S), .Y(un3_next_req_fetch_ptr_cry_2_Y), .B(req_fetch_ptr_1[4]), .C(buff_req_rd_ptr[1]), .D(buff_entry_addr_req_2_[4]), .A(VCC), .FCI(un3_next_req_fetch_ptr_cry_1_Z) ); defparam un3_next_req_fetch_ptr_cry_2.INIT=20'h4EA00; // @46:12143 ARI1 un3_next_req_fetch_ptr_cry_3 ( .FCO(un3_next_req_fetch_ptr_cry_3_Z), .S(un3_next_req_fetch_ptr_cry_3_S), .Y(un3_next_req_fetch_ptr_cry_3_Y), .B(req_fetch_ptr_1[5]), .C(buff_req_rd_ptr[1]), .D(buff_entry_addr_req_2_[5]), .A(VCC), .FCI(un3_next_req_fetch_ptr_cry_2_Z) ); defparam un3_next_req_fetch_ptr_cry_3.INIT=20'h4EA00; // @46:12143 ARI1 un3_next_req_fetch_ptr_cry_4 ( .FCO(un3_next_req_fetch_ptr_cry_4_Z), .S(un3_next_req_fetch_ptr_cry_4_S), .Y(un3_next_req_fetch_ptr_cry_4_Y), .B(req_fetch_ptr_1[6]), .C(buff_req_rd_ptr[1]), .D(buff_entry_addr_req_2_[6]), .A(VCC), .FCI(un3_next_req_fetch_ptr_cry_3_Z) ); defparam un3_next_req_fetch_ptr_cry_4.INIT=20'h4EA00; // @46:12143 ARI1 un3_next_req_fetch_ptr_cry_5 ( .FCO(un3_next_req_fetch_ptr_cry_5_Z), .S(un3_next_req_fetch_ptr_cry_5_S), .Y(un3_next_req_fetch_ptr_cry_5_Y), .B(req_fetch_ptr_1[7]), .C(buff_req_rd_ptr[1]), .D(buff_entry_addr_req_2_[7]), .A(VCC), .FCI(un3_next_req_fetch_ptr_cry_4_Z) ); defparam un3_next_req_fetch_ptr_cry_5.INIT=20'h4EA00; // @46:12143 ARI1 un3_next_req_fetch_ptr_cry_6 ( .FCO(un3_next_req_fetch_ptr_cry_6_Z), .S(un3_next_req_fetch_ptr_cry_6_S), .Y(un3_next_req_fetch_ptr_cry_6_Y), .B(req_fetch_ptr_1[8]), .C(buff_req_rd_ptr[1]), .D(buff_entry_addr_req_2_[8]), .A(VCC), .FCI(un3_next_req_fetch_ptr_cry_5_Z) ); defparam un3_next_req_fetch_ptr_cry_6.INIT=20'h4EA00; // @46:12143 ARI1 un3_next_req_fetch_ptr_cry_7 ( .FCO(un3_next_req_fetch_ptr_cry_7_Z), .S(un3_next_req_fetch_ptr_cry_7_S), .Y(un3_next_req_fetch_ptr_cry_7_Y), .B(req_fetch_ptr_1[9]), .C(buff_req_rd_ptr[1]), .D(buff_entry_addr_req_2_[9]), .A(VCC), .FCI(un3_next_req_fetch_ptr_cry_6_Z) ); defparam un3_next_req_fetch_ptr_cry_7.INIT=20'h4EA00; // @46:12143 ARI1 un3_next_req_fetch_ptr_cry_8 ( .FCO(un3_next_req_fetch_ptr_cry_8_Z), .S(un3_next_req_fetch_ptr_cry_8_S), .Y(un3_next_req_fetch_ptr_cry_8_Y), .B(req_fetch_ptr_1[10]), .C(buff_req_rd_ptr[1]), .D(buff_entry_addr_req_2_[10]), .A(VCC), .FCI(un3_next_req_fetch_ptr_cry_7_Z) ); defparam un3_next_req_fetch_ptr_cry_8.INIT=20'h4EA00; // @46:12143 ARI1 un3_next_req_fetch_ptr_cry_9 ( .FCO(un3_next_req_fetch_ptr_cry_9_Z), .S(un3_next_req_fetch_ptr_cry_9_S), .Y(un3_next_req_fetch_ptr_cry_9_Y), .B(req_fetch_ptr_1[11]), .C(buff_req_rd_ptr[1]), .D(buff_entry_addr_req_2_[11]), .A(VCC), .FCI(un3_next_req_fetch_ptr_cry_8_Z) ); defparam un3_next_req_fetch_ptr_cry_9.INIT=20'h4EA00; // @46:12143 ARI1 un3_next_req_fetch_ptr_cry_10 ( .FCO(un3_next_req_fetch_ptr_cry_10_Z), .S(un3_next_req_fetch_ptr_cry_10_S), .Y(un3_next_req_fetch_ptr_cry_10_Y), .B(req_fetch_ptr_1[12]), .C(buff_req_rd_ptr[1]), .D(buff_entry_addr_req_2_[12]), .A(VCC), .FCI(un3_next_req_fetch_ptr_cry_9_Z) ); defparam un3_next_req_fetch_ptr_cry_10.INIT=20'h4EA00; // @46:12143 ARI1 un3_next_req_fetch_ptr_cry_11 ( .FCO(un3_next_req_fetch_ptr_cry_11_Z), .S(un3_next_req_fetch_ptr_cry_11_S), .Y(un3_next_req_fetch_ptr_cry_11_Y), .B(req_fetch_ptr_1[13]), .C(buff_req_rd_ptr[1]), .D(buff_entry_addr_req_2_[13]), .A(VCC), .FCI(un3_next_req_fetch_ptr_cry_10_Z) ); defparam un3_next_req_fetch_ptr_cry_11.INIT=20'h4EA00; // @46:12143 ARI1 un3_next_req_fetch_ptr_cry_12 ( .FCO(un3_next_req_fetch_ptr_cry_12_Z), .S(un3_next_req_fetch_ptr_cry_12_S), .Y(un3_next_req_fetch_ptr_cry_12_Y), .B(req_fetch_ptr_1[14]), .C(buff_req_rd_ptr[1]), .D(buff_entry_addr_req_2_[14]), .A(VCC), .FCI(un3_next_req_fetch_ptr_cry_11_Z) ); defparam un3_next_req_fetch_ptr_cry_12.INIT=20'h4EA00; // @46:12143 ARI1 un3_next_req_fetch_ptr_cry_13 ( .FCO(un3_next_req_fetch_ptr_cry_13_Z), .S(un3_next_req_fetch_ptr_cry_13_S), .Y(un3_next_req_fetch_ptr_cry_13_Y), .B(req_fetch_ptr_1[15]), .C(buff_req_rd_ptr[1]), .D(buff_entry_addr_req_2_[15]), .A(VCC), .FCI(un3_next_req_fetch_ptr_cry_12_Z) ); defparam un3_next_req_fetch_ptr_cry_13.INIT=20'h4EA00; // @46:12143 ARI1 un3_next_req_fetch_ptr_cry_14 ( .FCO(un3_next_req_fetch_ptr_cry_14_Z), .S(un3_next_req_fetch_ptr_cry_14_S), .Y(un3_next_req_fetch_ptr_cry_14_Y), .B(req_fetch_ptr_1[16]), .C(buff_req_rd_ptr[1]), .D(buff_entry_addr_req_2_[16]), .A(VCC), .FCI(un3_next_req_fetch_ptr_cry_13_Z) ); defparam un3_next_req_fetch_ptr_cry_14.INIT=20'h4EA00; // @46:12143 ARI1 un3_next_req_fetch_ptr_cry_15 ( .FCO(un3_next_req_fetch_ptr_cry_15_Z), .S(un3_next_req_fetch_ptr_cry_15_S), .Y(un3_next_req_fetch_ptr_cry_15_Y), .B(req_fetch_ptr_1[17]), .C(buff_req_rd_ptr[1]), .D(buff_entry_addr_req_2_[17]), .A(VCC), .FCI(un3_next_req_fetch_ptr_cry_14_Z) ); defparam un3_next_req_fetch_ptr_cry_15.INIT=20'h4EA00; // @46:12143 ARI1 un3_next_req_fetch_ptr_cry_16 ( .FCO(un3_next_req_fetch_ptr_cry_16_Z), .S(un3_next_req_fetch_ptr_cry_16_S), .Y(un3_next_req_fetch_ptr_cry_16_Y), .B(req_fetch_ptr_1[18]), .C(buff_req_rd_ptr[1]), .D(buff_entry_addr_req_2_[18]), .A(VCC), .FCI(un3_next_req_fetch_ptr_cry_15_Z) ); defparam un3_next_req_fetch_ptr_cry_16.INIT=20'h4EA00; // @46:12143 ARI1 un3_next_req_fetch_ptr_cry_17 ( .FCO(un3_next_req_fetch_ptr_cry_17_Z), .S(un3_next_req_fetch_ptr_cry_17_S), .Y(un3_next_req_fetch_ptr_cry_17_Y), .B(req_fetch_ptr_1[19]), .C(buff_req_rd_ptr[1]), .D(buff_entry_addr_req_2_[19]), .A(VCC), .FCI(un3_next_req_fetch_ptr_cry_16_Z) ); defparam un3_next_req_fetch_ptr_cry_17.INIT=20'h4EA00; // @46:12143 ARI1 un3_next_req_fetch_ptr_cry_18 ( .FCO(un3_next_req_fetch_ptr_cry_18_Z), .S(un3_next_req_fetch_ptr_cry_18_S), .Y(un3_next_req_fetch_ptr_cry_18_Y), .B(req_fetch_ptr_1[20]), .C(buff_req_rd_ptr[1]), .D(buff_entry_addr_req_2_[20]), .A(VCC), .FCI(un3_next_req_fetch_ptr_cry_17_Z) ); defparam un3_next_req_fetch_ptr_cry_18.INIT=20'h4EA00; // @46:12143 ARI1 un3_next_req_fetch_ptr_cry_19 ( .FCO(un3_next_req_fetch_ptr_cry_19_Z), .S(un3_next_req_fetch_ptr_cry_19_S), .Y(un3_next_req_fetch_ptr_cry_19_Y), .B(req_fetch_ptr_1[21]), .C(buff_req_rd_ptr[1]), .D(buff_entry_addr_req_2_[21]), .A(VCC), .FCI(un3_next_req_fetch_ptr_cry_18_Z) ); defparam un3_next_req_fetch_ptr_cry_19.INIT=20'h4EA00; // @46:12143 ARI1 un3_next_req_fetch_ptr_cry_20 ( .FCO(un3_next_req_fetch_ptr_cry_20_Z), .S(un3_next_req_fetch_ptr_cry_20_S), .Y(un3_next_req_fetch_ptr_cry_20_Y), .B(req_fetch_ptr_1[22]), .C(buff_req_rd_ptr[1]), .D(buff_entry_addr_req_2_[22]), .A(VCC), .FCI(un3_next_req_fetch_ptr_cry_19_Z) ); defparam un3_next_req_fetch_ptr_cry_20.INIT=20'h4EA00; // @46:12143 ARI1 un3_next_req_fetch_ptr_cry_21 ( .FCO(un3_next_req_fetch_ptr_cry_21_Z), .S(un3_next_req_fetch_ptr_cry_21_S), .Y(un3_next_req_fetch_ptr_cry_21_Y), .B(req_fetch_ptr_1[23]), .C(buff_req_rd_ptr[1]), .D(buff_entry_addr_req_2_[23]), .A(VCC), .FCI(un3_next_req_fetch_ptr_cry_20_Z) ); defparam un3_next_req_fetch_ptr_cry_21.INIT=20'h4EA00; // @46:12143 ARI1 un3_next_req_fetch_ptr_cry_22 ( .FCO(un3_next_req_fetch_ptr_cry_22_Z), .S(un3_next_req_fetch_ptr_cry_22_S), .Y(un3_next_req_fetch_ptr_cry_22_Y), .B(req_fetch_ptr_1[24]), .C(buff_req_rd_ptr[1]), .D(buff_entry_addr_req_2_[24]), .A(VCC), .FCI(un3_next_req_fetch_ptr_cry_21_Z) ); defparam un3_next_req_fetch_ptr_cry_22.INIT=20'h4EA00; // @46:12143 ARI1 un3_next_req_fetch_ptr_cry_23 ( .FCO(un3_next_req_fetch_ptr_cry_23_Z), .S(un3_next_req_fetch_ptr_cry_23_S), .Y(un3_next_req_fetch_ptr_cry_23_Y), .B(req_fetch_ptr_1[25]), .C(buff_req_rd_ptr[1]), .D(buff_entry_addr_req_2_[25]), .A(VCC), .FCI(un3_next_req_fetch_ptr_cry_22_Z) ); defparam un3_next_req_fetch_ptr_cry_23.INIT=20'h4EA00; // @46:12143 ARI1 un3_next_req_fetch_ptr_cry_24 ( .FCO(un3_next_req_fetch_ptr_cry_24_Z), .S(un3_next_req_fetch_ptr_cry_24_S), .Y(un3_next_req_fetch_ptr_cry_24_Y), .B(req_fetch_ptr_1[26]), .C(buff_req_rd_ptr[1]), .D(buff_entry_addr_req_2_[26]), .A(VCC), .FCI(un3_next_req_fetch_ptr_cry_23_Z) ); defparam un3_next_req_fetch_ptr_cry_24.INIT=20'h4EA00; // @46:12143 ARI1 un3_next_req_fetch_ptr_cry_25 ( .FCO(un3_next_req_fetch_ptr_cry_25_Z), .S(un3_next_req_fetch_ptr_cry_25_S), .Y(un3_next_req_fetch_ptr_cry_25_Y), .B(req_fetch_ptr_1[27]), .C(buff_req_rd_ptr[1]), .D(buff_entry_addr_req_2_[27]), .A(VCC), .FCI(un3_next_req_fetch_ptr_cry_24_Z) ); defparam un3_next_req_fetch_ptr_cry_25.INIT=20'h4EA00; // @46:12143 ARI1 un3_next_req_fetch_ptr_cry_26 ( .FCO(un3_next_req_fetch_ptr_cry_26_Z), .S(un3_next_req_fetch_ptr_cry_26_S), .Y(un3_next_req_fetch_ptr_cry_26_Y), .B(req_fetch_ptr_1[28]), .C(buff_req_rd_ptr[1]), .D(buff_entry_addr_req_2_[28]), .A(VCC), .FCI(un3_next_req_fetch_ptr_cry_25_Z) ); defparam un3_next_req_fetch_ptr_cry_26.INIT=20'h4EA00; // @46:12143 ARI1 un3_next_req_fetch_ptr_cry_27 ( .FCO(un3_next_req_fetch_ptr_cry_27_Z), .S(un3_next_req_fetch_ptr_cry_27_S), .Y(un3_next_req_fetch_ptr_cry_27_Y), .B(N_422_1), .C(buff_req_rd_ptr[1]), .D(buff_entry_addr_req_2_[29]), .A(VCC), .FCI(un3_next_req_fetch_ptr_cry_26_Z) ); defparam un3_next_req_fetch_ptr_cry_27.INIT=20'h4EA00; // @46:12143 ARI1 un3_next_req_fetch_ptr_s_29 ( .FCO(un3_next_req_fetch_ptr_s_29_FCO), .S(un3_next_req_fetch_ptr_s_29_S), .Y(un3_next_req_fetch_ptr_s_29_Y), .B(req_fetch_ptr_1[31]), .C(buff_req_rd_ptr[1]), .D(buff_entry_addr_req_2_[31]), .A(VCC), .FCI(un3_next_req_fetch_ptr_cry_28_Z) ); defparam un3_next_req_fetch_ptr_s_29.INIT=20'h4EA00; // @46:12143 ARI1 un3_next_req_fetch_ptr_cry_28 ( .FCO(un3_next_req_fetch_ptr_cry_28_Z), .S(un3_next_req_fetch_ptr_cry_28_S), .Y(un3_next_req_fetch_ptr_cry_28_Y), .B(req_fetch_ptr_1[30]), .C(buff_req_rd_ptr[1]), .D(buff_entry_addr_req_2_[30]), .A(VCC), .FCI(un3_next_req_fetch_ptr_cry_27_Z) ); defparam un3_next_req_fetch_ptr_cry_28.INIT=20'h4EA00; CFG4 un3_next_req_fetch_ptr_cry_17_RNIQM1QJO3 ( .A(un3_next_req_fetch_ptr_cry_17_S), .B(sticky_reset_reg_1z), .C(un5_N_4_0_i), .D(next_req_fetch_ptr_xx_0), .Y(apb_i_req_addr_net[19]) ); defparam un3_next_req_fetch_ptr_cry_17_RNIQM1QJO3.INIT=16'h2F20; // @46:8721 CFG4 \ifu_expipe_resp_ireg_i_a2_5_RNI8CGEL[15] ( .A(cpu_i_resp_rd_data_sel[30]), .B(N_311), .C(N_290_i_1), .D(N_674), .Y(N_290_i) ); defparam \ifu_expipe_resp_ireg_i_a2_5_RNI8CGEL[15] .INIT=16'h0203; // @46:12163 CFG4 ifu_m1_e_0 ( .A(exu_m4_1), .B(exu_alu_result_int_cry_0_Y), .C(un128_exu_alu_result_cry_31_RNI01RTHF), .D(ifu_m1_e_0_1_Z), .Y(ifu_m1_e_0_Z) ); defparam ifu_m1_e_0.INIT=16'h20A0; // @46:12163 CFG3 ifu_m1_e_0_1 ( .A(N_14_i), .B(exu_m1_e_0), .C(un1_alu_op_sel_int), .Y(ifu_m1_e_0_1_Z) ); defparam ifu_m1_e_0_1.INIT=8'h54; // @46:12126 CFG4 sticky_branch_reg_RNI3CI9AB1 ( .A(div_finish), .B(exu_result_valid_iv_1), .C(un1_exu_alu_result212_3_i_0), .D(un5_N_4_0_i_1_0_1), .Y(un5_N_4_0_i_1) ); defparam sticky_branch_reg_RNI3CI9AB1.INIT=16'hFF01; // @46:12126 CFG4 sticky_branch_reg_RNI97KDL ( .A(un5_N_5_mux), .B(ifu_expipe_req_branch_excpt_req_valid_1_0), .C(exu_result_valid_iv_1_0), .D(exu_result_valid_iv_1), .Y(un5_N_4_0_i_1_0_1) ); defparam sticky_branch_reg_RNI97KDL.INIT=16'h777F; // @46:12126 CFG4 un5_fetch_ptr_sel_0_a2_0_a1_RNIHIIL7O3 ( .A(un5_N_4_0_i_1), .B(un5_m1_e_1_Z), .C(un5_fetch_ptr_sel_0_a2_0_a1_Z), .D(ifu_m1_e_0_Z), .Y(un5_N_4_0_i) ); defparam un5_fetch_ptr_sel_0_a2_0_a1_RNIHIIL7O3.INIT=16'h0E0A; // @46:12163 CFG4 ifu_emi_req_valid_i_o2_1_0_RNIO1BB7S1 ( .A(ifu_emi_req_valid_i_o2_1_0_1z), .B(un3_branch_cond_ex_0), .C(ifu_m7_i_m2_1), .D(ifu_N_6), .Y(ifu_N_11) ); defparam ifu_emi_req_valid_i_o2_1_0_RNIO1BB7S1.INIT=16'hE2F0; // @46:12163 CFG4 ifu_emi_req_valid_i_o2_1_0_RNI6BA8F ( .A(un3_branch_cond_ex_0), .B(ifu_emi_req_valid_i_o2_1_0_1z), .C(N_764), .D(ifu_expipe_req_branch_excpt_req_fenci_net), .Y(ifu_m7_i_m2_1) ); defparam ifu_emi_req_valid_i_o2_1_0_RNI6BA8F.INIT=16'h08FD; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1[30] ( .A(N_672), .B(N_404), .C(ifu_expipe_resp_ireg_1_0_Z[30]), .D(ifu_expipe_resp_ireg_1_1_Z[30]), .Y(ifu_expipe_resp_ireg_net[30]) ); defparam \ifu_expipe_resp_ireg_1[30] .INIT=16'hF8FF; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1_1[30] ( .A(buff_resp_rd_ptr[1]), .B(ram0_14), .C(N_667), .D(N_416_1), .Y(ifu_expipe_resp_ireg_1_1_Z[30]) ); defparam \ifu_expipe_resp_ireg_1_1[30] .INIT=16'h0F7F; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1[22] ( .A(ifu_expipe_resp_ireg_1_1_Z[22]), .B(ifu_expipe_resp_ireg_1_0_Z[22]), .C(buff_entry_data_resp_1[22]), .D(N_672), .Y(ifu_expipe_resp_ireg_net[22]) ); defparam \ifu_expipe_resp_ireg_1[22] .INIT=16'hFDDD; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1_1[22] ( .A(buff_resp_rd_ptr[1]), .B(ram0_6), .C(N_667), .D(N_417_1), .Y(ifu_expipe_resp_ireg_1_1_Z[22]) ); defparam \ifu_expipe_resp_ireg_1_1[22] .INIT=16'h0F7F; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1[31] ( .A(N_672), .B(N_403), .C(ifu_expipe_resp_ireg_1_0_Z[31]), .D(ifu_expipe_resp_ireg_1_1_Z[31]), .Y(ifu_expipe_resp_ireg_net[31]) ); defparam \ifu_expipe_resp_ireg_1[31] .INIT=16'hF8FF; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1_1[31] ( .A(buff_resp_rd_ptr[1]), .B(ram0_15), .C(N_667), .D(N_415_1), .Y(ifu_expipe_resp_ireg_1_1_Z[31]) ); defparam \ifu_expipe_resp_ireg_1_1[31] .INIT=16'h0F7F; // @46:12199 CFG4 last_iab_rd_alignment_4_iv_i ( .A(next_req_fetch_ptr_0), .B(N_641_i_Z), .C(N_295_i), .D(last_iab_rd_alignment_4_iv_i_1_Z), .Y(last_iab_rd_alignment_4_iv_i_Z) ); defparam last_iab_rd_alignment_4_iv_i.INIT=16'hBB0B; // @46:12199 CFG3 last_iab_rd_alignment_4_iv_i_1 ( .A(N_288_i), .B(N_306), .C(N_287_i), .Y(last_iab_rd_alignment_4_iv_i_1_Z) ); defparam last_iab_rd_alignment_4_iv_i_1.INIT=8'h0E; // @46:12273 CFG3 \ifu_expipe_resp_ireg_i_a2_0_0[0] ( .A(buff_entry_data_resp_1[16]), .B(N_306), .C(iab_resp_empty), .Y(ifu_expipe_resp_ireg_i_a2_0_0_Z[0]) ); defparam \ifu_expipe_resp_ireg_i_a2_0_0[0] .INIT=8'h04; // @46:12273 CFG3 \ifu_expipe_resp_ireg_i_a2_0_0[1] ( .A(buff_entry_data_resp_1[17]), .B(N_306), .C(iab_resp_empty), .Y(ifu_expipe_resp_ireg_i_a2_0_0_Z[1]) ); defparam \ifu_expipe_resp_ireg_i_a2_0_0[1] .INIT=8'h04; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1_a2_0[18] ( .A(buff_resp_rd_ptr[1]), .B(ram0_2), .C(N_667), .D(N_418_1), .Y(N_521) ); defparam \ifu_expipe_resp_ireg_1_a2_0[18] .INIT=16'hF080; CFG4 \next_req_fetch_ptr_yy_RNID5KKIO3[22] ( .A(sticky_reset_reg_1z), .B(next_req_fetch_ptr_yy_3), .C(cpu_d_req_addr_net[22]), .D(un5_N_4_0_i), .Y(apb_i_req_addr_net[22]) ); defparam \next_req_fetch_ptr_yy_RNID5KKIO3[22] .INIT=16'hCC50; CFG4 \next_req_fetch_ptr_yy_RNIB2JKIO3[21] ( .A(sticky_reset_reg_1z), .B(next_req_fetch_ptr_yy_2), .C(cpu_d_req_addr_net[21]), .D(un5_N_4_0_i), .Y(apb_i_req_addr_net[21]) ); defparam \next_req_fetch_ptr_yy_RNIB2JKIO3[21] .INIT=16'hCC50; // @46:11924 CFG2 un5_m3_i_a3_0 ( .A(exu_alu_operand0_0), .B(exu_alu_operand1_0), .Y(un5_m3_i_a3_0_Z) ); defparam un5_m3_i_a3_0.INIT=4'h1; // @46:12126 CFG2 \next_req_fetch_ptr_yy[19] ( .A(un3_next_req_fetch_ptr_cry_17_S), .B(sticky_reset_reg_1z), .Y(next_req_fetch_ptr_yy_0) ); defparam \next_req_fetch_ptr_yy[19] .INIT=4'h2; // @46:12126 CFG2 \next_req_fetch_ptr_xx[19] ( .A(cpu_d_req_addr_net[19]), .B(sticky_reset_reg_1z), .Y(next_req_fetch_ptr_xx_0) ); defparam \next_req_fetch_ptr_xx[19] .INIT=4'h2; // @46:12126 CFG2 \next_req_fetch_ptr_yy[21] ( .A(un3_next_req_fetch_ptr_cry_19_S), .B(sticky_reset_reg_1z), .Y(next_req_fetch_ptr_yy_2) ); defparam \next_req_fetch_ptr_yy[21] .INIT=4'h2; // @46:12126 CFG2 \next_req_fetch_ptr_yy[22] ( .A(un3_next_req_fetch_ptr_cry_20_S), .B(sticky_reset_reg_1z), .Y(next_req_fetch_ptr_yy_3) ); defparam \next_req_fetch_ptr_yy[22] .INIT=4'h2; // @46:12163 CFG2 ifu_emi_req_valid_i_o2_1_0 ( .A(sticky_reset_reg_1z), .B(sticky_branch_reg_Z), .Y(ifu_emi_req_valid_i_o2_1_0_1z) ); defparam ifu_emi_req_valid_i_o2_1_0.INIT=4'hB; // @46:12218 CFG2 un1_next_iab_rd_alignment_0_sqmuxa_i_o2 ( .A(N_401), .B(last_iab_rd_alignment_Z), .Y(N_306) ); defparam un1_next_iab_rd_alignment_0_sqmuxa_i_o2.INIT=4'hE; // @46:12273 CFG2 ifu_expipe_resp_access_mem_error_u_0_o2_1 ( .A(N_329_i), .B(cpu_i_resp_valid_sel), .Y(N_307) ); defparam ifu_expipe_resp_access_mem_error_u_0_o2_1.INIT=4'h7; // @46:12273 CFG2 ifu_expipe_resp_access_mem_error_u_0_a2_9 ( .A(cpu_i_resp_valid_sel), .B(iab_resp_empty), .Y(N_671) ); defparam ifu_expipe_resp_access_mem_error_u_0_a2_9.INIT=4'h8; // @46:12273 CFG2 ifu_expipe_resp_access_mem_error_u_0_a2_5 ( .A(buff_resp_rd_ptr[1]), .B(buff_resp_rd_ptr[0]), .Y(N_669) ); defparam ifu_expipe_resp_access_mem_error_u_0_a2_5.INIT=4'h4; // @46:12273 CFG2 ifu_expipe_resp_access_mem_error_u_0_a2_6 ( .A(buff_resp_rd_ptr[1]), .B(buff_resp_rd_ptr[0]), .Y(N_670) ); defparam ifu_expipe_resp_access_mem_error_u_0_a2_6.INIT=4'h1; // @46:12273 CFG3 ifu_expipe_resp_access_mem_error_u_0_m2_0 ( .A(ram1_0), .B(ram0_0), .C(buff_resp_rd_ptr[1]), .Y(N_352) ); defparam ifu_expipe_resp_access_mem_error_u_0_m2_0.INIT=8'hCA; // @46:12273 CFG3 ifu_expipe_resp_access_mem_error_u_0_m2 ( .A(ram3_0), .B(ram2_0), .C(buff_resp_rd_ptr[0]), .Y(N_346) ); defparam ifu_expipe_resp_access_mem_error_u_0_m2.INIT=8'hAC; // @46:11924 CFG3 sticky_branch_reg_RNIBTPAB ( .A(sticky_reset_reg_1z), .B(un3_branch_cond_ex_0), .C(sticky_branch_reg_Z), .Y(un5_N_5_mux) ); defparam sticky_branch_reg_RNIBTPAB.INIT=8'h01; // @46:12273 CFG3 \ifu_expipe_resp_ireg_1_a2_5[31] ( .A(cpu_i_resp_valid_sel), .B(N_329_i), .C(iab_resp_empty), .Y(N_673) ); defparam \ifu_expipe_resp_ireg_1_a2_5[31] .INIT=8'h08; // @46:12273 CFG3 \ifu_expipe_resp_ireg_i_a2_5[15] ( .A(N_401), .B(emi_resp_head_uncompressed_full), .C(iab_resp_empty), .Y(N_674) ); defparam \ifu_expipe_resp_ireg_i_a2_5[15] .INIT=8'h20; // @46:12273 CFG3 \ifu_expipe_resp_ireg_i_a2_6[15] ( .A(N_401), .B(emi_resp_head_uncompressed_full), .C(iab_resp_empty), .Y(N_676) ); defparam \ifu_expipe_resp_ireg_i_a2_6[15] .INIT=8'hD0; // @46:12273 CFG3 \ifu_expipe_resp_ireg_i_a2_6[13] ( .A(N_401), .B(last_iab_rd_alignment_Z), .C(iab_resp_empty), .Y(N_683) ); defparam \ifu_expipe_resp_ireg_i_a2_6[13] .INIT=8'h0E; // @46:12161 CFG4 iab_ready ( .A(num_emi_req_os[1]), .B(un7_iab_readylto1), .C(un7_iab_readylt1), .D(num_emi_req_os[0]), .Y(iab_ready_1z) ); defparam iab_ready.INIT=16'h153F; // @46:12273 CFG2 \ifu_expipe_resp_ireg_1_a2_6[31] ( .A(emi_resp_head_uncompressed_full), .B(N_671), .Y(N_675) ); defparam \ifu_expipe_resp_ireg_1_a2_6[31] .INIT=4'h8; // @46:12199 CFG2 last_iab_rd_alignment_RNO ( .A(N_295_i), .B(N_641_i_Z), .Y(N_635_i) ); defparam last_iab_rd_alignment_RNO.INIT=4'hE; // @46:12126 CFG2 next_req_is_hword_high_only_u_RNO ( .A(un5_N_4_0_i), .B(sticky_fence_reg_Z), .Y(N_297_i) ); defparam next_req_is_hword_high_only_u_RNO.INIT=4'h8; CFG4 un3_next_req_fetch_ptr_cry_10_RNI1UMUEO3 ( .A(sticky_reset_reg_1z), .B(un3_next_req_fetch_ptr_cry_10_S), .C(cpu_d_req_addr_net[12]), .D(un5_N_4_0_i), .Y(apb_i_req_addr_net[12]) ); defparam un3_next_req_fetch_ptr_cry_10_RNI1UMUEO3.INIT=16'h4450; CFG4 un3_next_req_fetch_ptr_cry_25_RNIDCVVEO3 ( .A(sticky_reset_reg_1z), .B(un3_next_req_fetch_ptr_cry_25_S), .C(cpu_d_req_addr_net[27]), .D(un5_N_4_0_i), .Y(apb_i_req_addr_net[27]) ); defparam un3_next_req_fetch_ptr_cry_25_RNIDCVVEO3.INIT=16'h4450; CFG4 un3_next_req_fetch_ptr_cry_3_RNI5HQPJO3 ( .A(sticky_reset_reg_1z), .B(un3_next_req_fetch_ptr_cry_3_S), .C(cpu_d_req_addr_net[5]), .D(un5_N_4_0_i), .Y(apb_i_req_addr_net[5]) ); defparam un3_next_req_fetch_ptr_cry_3_RNI5HQPJO3.INIT=16'h4450; CFG4 un3_next_req_fetch_ptr_cry_2_RNI3FPPJO3 ( .A(sticky_reset_reg_1z), .B(un3_next_req_fetch_ptr_cry_2_S), .C(cpu_d_req_addr_net[4]), .D(un5_N_4_0_i), .Y(apb_i_req_addr_net[4]) ); defparam un3_next_req_fetch_ptr_cry_2_RNI3FPPJO3.INIT=16'h4450; CFG4 un3_next_req_fetch_ptr_cry_28_RNIA1R0FO3 ( .A(sticky_reset_reg_1z), .B(un3_next_req_fetch_ptr_cry_28_S), .C(cpu_d_req_addr_net[30]), .D(un5_N_4_0_i), .Y(apb_i_req_addr_net[30]) ); defparam un3_next_req_fetch_ptr_cry_28_RNIA1R0FO3.INIT=16'h4450; CFG4 un3_next_req_fetch_ptr_cry_22_RNI76SVEO3 ( .A(sticky_reset_reg_1z), .B(un3_next_req_fetch_ptr_cry_22_S), .C(cpu_d_req_addr_net[24]), .D(un5_N_4_0_i), .Y(apb_i_req_addr_net[24]) ); defparam un3_next_req_fetch_ptr_cry_22_RNI76SVEO3.INIT=16'h4450; CFG4 un3_next_req_fetch_ptr_cry_21_RNI54RVEO3 ( .A(sticky_reset_reg_1z), .B(un3_next_req_fetch_ptr_cry_21_S), .C(cpu_d_req_addr_net[23]), .D(un5_N_4_0_i), .Y(apb_i_req_addr_net[23]) ); defparam un3_next_req_fetch_ptr_cry_21_RNI54RVEO3.INIT=16'h4450; CFG4 un3_next_req_fetch_ptr_cry_15_RNIB8SUEO3 ( .A(sticky_reset_reg_1z), .B(un3_next_req_fetch_ptr_cry_15_S), .C(cpu_d_req_addr_net[17]), .D(un5_N_4_0_i), .Y(apb_i_req_addr_net[17]) ); defparam un3_next_req_fetch_ptr_cry_15_RNIB8SUEO3.INIT=16'h4450; CFG4 un3_next_req_fetch_ptr_cry_16_RNIDATUEO3 ( .A(sticky_reset_reg_1z), .B(un3_next_req_fetch_ptr_cry_16_S), .C(cpu_d_req_addr_net[18]), .D(un5_N_4_0_i), .Y(apb_i_req_addr_net[18]) ); defparam un3_next_req_fetch_ptr_cry_16_RNIDATUEO3.INIT=16'h4450; CFG4 un3_next_req_fetch_ptr_cry_1_RNI1DOPJO3 ( .A(sticky_reset_reg_1z), .B(un3_next_req_fetch_ptr_cry_1_S), .C(cpu_d_req_addr_net[3]), .D(un5_N_4_0_i), .Y(apb_i_req_addr_net[3]) ); defparam un3_next_req_fetch_ptr_cry_1_RNI1DOPJO3.INIT=16'h4450; CFG4 un3_next_req_fetch_ptr_cry_5_RNI9LSPJO3 ( .A(sticky_reset_reg_1z), .B(un3_next_req_fetch_ptr_cry_5_S), .C(cpu_d_req_addr_net[7]), .D(un5_N_4_0_i), .Y(apb_i_req_addr_net[7]) ); defparam un3_next_req_fetch_ptr_cry_5_RNI9LSPJO3.INIT=16'h4450; CFG4 un3_next_req_fetch_ptr_cry_7_RNIDPUPJO3 ( .A(sticky_reset_reg_1z), .B(un3_next_req_fetch_ptr_cry_7_S), .C(cpu_d_req_addr_net[9]), .D(un5_N_4_0_i), .Y(apb_i_req_addr_net[9]) ); defparam un3_next_req_fetch_ptr_cry_7_RNIDPUPJO3.INIT=16'h4450; CFG4 un3_next_req_fetch_ptr_cry_14_RNI96RUEO3 ( .A(sticky_reset_reg_1z), .B(un3_next_req_fetch_ptr_cry_14_S), .C(cpu_d_req_addr_net[16]), .D(un5_N_4_0_i), .Y(apb_i_req_addr_net[16]) ); defparam un3_next_req_fetch_ptr_cry_14_RNI96RUEO3.INIT=16'h4450; CFG4 un3_next_req_fetch_ptr_cry_27_RNIHG10FO3 ( .A(sticky_reset_reg_1z), .B(un3_next_req_fetch_ptr_cry_27_S), .C(cpu_d_req_addr_net[29]), .D(un5_N_4_0_i), .Y(apb_i_req_addr_net[29]) ); defparam un3_next_req_fetch_ptr_cry_27_RNIHG10FO3.INIT=16'h4450; CFG4 un3_next_req_fetch_ptr_cry_26_RNIFE00FO3 ( .A(sticky_reset_reg_1z), .B(un3_next_req_fetch_ptr_cry_26_S), .C(cpu_d_req_addr_net[28]), .D(un5_N_4_0_i), .Y(apb_i_req_addr_net[28]) ); defparam un3_next_req_fetch_ptr_cry_26_RNIFE00FO3.INIT=16'h4450; CFG4 un3_next_req_fetch_ptr_cry_24_RNIBAUVEO3 ( .A(sticky_reset_reg_1z), .B(un3_next_req_fetch_ptr_cry_24_S), .C(cpu_d_req_addr_net[26]), .D(un5_N_4_0_i), .Y(apb_i_req_addr_net[26]) ); defparam un3_next_req_fetch_ptr_cry_24_RNIBAUVEO3.INIT=16'h4450; CFG4 un3_next_req_fetch_ptr_cry_6_RNIBNTPJO3 ( .A(sticky_reset_reg_1z), .B(un3_next_req_fetch_ptr_cry_6_S), .C(cpu_d_req_addr_net[8]), .D(un5_N_4_0_i), .Y(apb_i_req_addr_net[8]) ); defparam un3_next_req_fetch_ptr_cry_6_RNIBNTPJO3.INIT=16'h4450; CFG4 un3_next_req_fetch_ptr_cry_4_RNI7JRPJO3 ( .A(sticky_reset_reg_1z), .B(un3_next_req_fetch_ptr_cry_4_S), .C(cpu_d_req_addr_net[6]), .D(un5_N_4_0_i), .Y(apb_i_req_addr_net[6]) ); defparam un3_next_req_fetch_ptr_cry_4_RNI7JRPJO3.INIT=16'h4450; CFG4 un3_next_req_fetch_ptr_cry_23_RNI98TVEO3 ( .A(sticky_reset_reg_1z), .B(un3_next_req_fetch_ptr_cry_23_S), .C(cpu_d_req_addr_net[25]), .D(un5_N_4_0_i), .Y(apb_i_req_addr_net[25]) ); defparam un3_next_req_fetch_ptr_cry_23_RNI98TVEO3.INIT=16'h4450; CFG4 un3_next_req_fetch_ptr_cry_9_RNIO9Q5HO3 ( .A(sticky_reset_reg_1z), .B(un3_next_req_fetch_ptr_cry_9_S), .C(cpu_d_req_addr_net[11]), .D(un5_N_4_0_i), .Y(apb_i_req_addr_net[11]) ); defparam un3_next_req_fetch_ptr_cry_9_RNIO9Q5HO3.INIT=16'h4450; CFG4 un3_next_req_fetch_ptr_cry_8_RNIM7P5HO3 ( .A(sticky_reset_reg_1z), .B(un3_next_req_fetch_ptr_cry_8_S), .C(cpu_d_req_addr_net[10]), .D(un5_N_4_0_i), .Y(apb_i_req_addr_net[10]) ); defparam un3_next_req_fetch_ptr_cry_8_RNIM7P5HO3.INIT=16'h4450; CFG4 un3_next_req_fetch_ptr_cry_11_RNI30OUEO3 ( .A(sticky_reset_reg_1z), .B(un3_next_req_fetch_ptr_cry_11_S), .C(cpu_d_req_addr_net[13]), .D(un5_N_4_0_i), .Y(apb_i_req_addr_net[13]) ); defparam un3_next_req_fetch_ptr_cry_11_RNI30OUEO3.INIT=16'h4450; CFG4 un3_next_req_fetch_ptr_cry_12_RNI52PUEO3 ( .A(sticky_reset_reg_1z), .B(un3_next_req_fetch_ptr_cry_12_S), .C(cpu_d_req_addr_net[14]), .D(un5_N_4_0_i), .Y(apb_i_req_addr_net[14]) ); defparam un3_next_req_fetch_ptr_cry_12_RNI52PUEO3.INIT=16'h4450; CFG4 un3_next_req_fetch_ptr_cry_13_RNI74QUEO3 ( .A(sticky_reset_reg_1z), .B(un3_next_req_fetch_ptr_cry_13_S), .C(cpu_d_req_addr_net[15]), .D(un5_N_4_0_i), .Y(apb_i_req_addr_net[15]) ); defparam un3_next_req_fetch_ptr_cry_13_RNI74QUEO3.INIT=16'h4450; CFG4 un3_next_req_fetch_ptr_s_29_RNI7ST9PO3 ( .A(sticky_reset_reg_1z), .B(un3_next_req_fetch_ptr_s_29_S), .C(cpu_d_req_addr_net[31]), .D(un5_N_4_0_i), .Y(apb_i_req_addr_net[31]) ); defparam un3_next_req_fetch_ptr_s_29_RNI7ST9PO3.INIT=16'hEEFA; CFG4 un3_next_req_fetch_ptr_cry_18_RNI8TNVEO3 ( .A(sticky_reset_reg_1z), .B(un3_next_req_fetch_ptr_cry_18_S), .C(cpu_d_req_addr_net[20]), .D(un5_N_4_0_i), .Y(apb_i_req_addr_net[20]) ); defparam un3_next_req_fetch_ptr_cry_18_RNI8TNVEO3.INIT=16'h4450; // @46:12273 CFG4 ifu_expipe_resp_access_misalign_error_i_o2_0 ( .A(buff_entry_addr_req_0_[0]), .B(buff_entry_addr_req_2_[0]), .C(buff_resp_rd_ptr[1]), .D(buff_resp_rd_ptr[0]), .Y(ifu_expipe_resp_access_misalign_error_i_o2_0_Z) ); defparam ifu_expipe_resp_access_misalign_error_i_o2_0.INIT=16'h3035; // @46:12117 CFG3 ifu_emi_req_accepted_0_o2_0 ( .A(trace_priv_i), .B(iab_ready_1z), .C(fence_i_hold_Z), .Y(ifu_emi_req_valid_i_0) ); defparam ifu_emi_req_accepted_0_o2_0.INIT=8'hFB; // @46:12218 CFG4 iab_resp_alloc ( .A(num_emi_req_os[1]), .B(num_emi_req_os[0]), .C(no_flush_req_os), .D(cpu_i_resp_valid_sel), .Y(iab_resp_alloc_Z) ); defparam iab_resp_alloc.INIT=16'hEF00; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_a2_5[13] ( .A(iab_resp_empty), .B(last_iab_rd_alignment_Z), .C(N_401), .D(N_669), .Y(N_682) ); defparam \ifu_expipe_resp_ireg_i_a2_5[13] .INIT=16'h0100; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_a2_7[13] ( .A(iab_resp_empty), .B(last_iab_rd_alignment_Z), .C(N_401), .D(N_670), .Y(N_685) ); defparam \ifu_expipe_resp_ireg_i_a2_7[13] .INIT=16'h0100; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_a2_8[13] ( .A(last_iab_rd_alignment_Z), .B(buff_resp_rd_ptr[1]), .C(iab_resp_empty), .D(N_401), .Y(N_686) ); defparam \ifu_expipe_resp_ireg_i_a2_8[13] .INIT=16'h0004; CFG4 ifu_expipe_resp_access_mem_error_u_0_0_RNO_1 ( .A(ram0_0), .B(buff_resp_rd_ptr[0]), .C(buff_resp_rd_ptr[1]), .D(N_346), .Y(ifu_expipe_resp_access_mem_error_u_0_1559_tz_0) ); defparam ifu_expipe_resp_access_mem_error_u_0_0_RNO_1.INIT=16'hF202; // @46:12273 CFG4 ifu_expipe_resp_access_mem_error_u_0_a2_0_0 ( .A(ram2_0), .B(N_352), .C(N_669), .D(N_306), .Y(ifu_expipe_resp_access_mem_error_u_0_a2_0) ); defparam ifu_expipe_resp_access_mem_error_u_0_a2_0_0.INIT=16'hEC00; // @46:12273 CFG3 ifu_expipe_resp_access_misalign_error_i_o2 ( .A(buff_entry_addr_req_1_[0]), .B(ifu_expipe_resp_access_misalign_error_i_o2_0_Z), .C(N_669), .Y(N_424) ); defparam ifu_expipe_resp_access_misalign_error_i_o2.INIT=8'hDC; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_1[7] ( .A(ram1_7), .B(ram2_7), .C(N_686), .D(N_682), .Y(ifu_expipe_resp_ireg_i_1_Z[7]) ); defparam \ifu_expipe_resp_ireg_i_1[7] .INIT=16'h7530; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_1[9] ( .A(ram1_9), .B(ram2_9), .C(N_686), .D(N_682), .Y(ifu_expipe_resp_ireg_i_1_Z[9]) ); defparam \ifu_expipe_resp_ireg_i_1[9] .INIT=16'h7530; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_1[8] ( .A(ram1_8), .B(ram2_8), .C(N_686), .D(N_682), .Y(ifu_expipe_resp_ireg_i_1_Z[8]) ); defparam \ifu_expipe_resp_ireg_i_1[8] .INIT=16'h7530; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_1[5] ( .A(ram1_5), .B(ram2_5), .C(N_686), .D(N_682), .Y(ifu_expipe_resp_ireg_i_1_Z[5]) ); defparam \ifu_expipe_resp_ireg_i_1[5] .INIT=16'h7530; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_1[10] ( .A(ram1_10), .B(ram2_10), .C(N_686), .D(N_682), .Y(ifu_expipe_resp_ireg_i_1_Z[10]) ); defparam \ifu_expipe_resp_ireg_i_1[10] .INIT=16'h7530; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_1[3] ( .A(ram1_3), .B(ram2_3), .C(N_686), .D(N_682), .Y(ifu_expipe_resp_ireg_i_1_Z[3]) ); defparam \ifu_expipe_resp_ireg_i_1[3] .INIT=16'h7530; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_1[11] ( .A(ram1_11), .B(ram2_11), .C(N_686), .D(N_682), .Y(ifu_expipe_resp_ireg_i_1_Z[11]) ); defparam \ifu_expipe_resp_ireg_i_1[11] .INIT=16'h7530; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_1[4] ( .A(ram1_4), .B(ram2_4), .C(N_686), .D(N_682), .Y(ifu_expipe_resp_ireg_i_1_Z[4]) ); defparam \ifu_expipe_resp_ireg_i_1[4] .INIT=16'h7530; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_1[12] ( .A(ram1_12), .B(ram2_12), .C(N_686), .D(N_682), .Y(ifu_expipe_resp_ireg_i_1_Z[12]) ); defparam \ifu_expipe_resp_ireg_i_1[12] .INIT=16'h7530; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_1[13] ( .A(ram1_13), .B(ram2_13), .C(N_686), .D(N_682), .Y(ifu_expipe_resp_ireg_i_1_Z[13]) ); defparam \ifu_expipe_resp_ireg_i_1[13] .INIT=16'h7530; // @46:11924 CFG3 un5_m3_i_a3 ( .A(exu_alu_result192_1), .B(un5_m3_i_a3_0_Z), .C(N_26_0), .Y(un5_N_8) ); defparam un5_m3_i_a3.INIT=8'h08; // @46:12273 CFG3 ifu_expipe_resp_access_misalign_error_i ( .A(N_424), .B(cpu_i_resp_valid_sel), .C(iab_resp_empty), .Y(ifu_expipe_resp_access_misalign_error_i_1) ); defparam ifu_expipe_resp_access_misalign_error_i.INIT=8'h45; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1_0[25] ( .A(cpu_i_resp_rd_data_sel[9]), .B(N_673), .C(N_675), .D(cpu_i_resp_rd_data_sel[25]), .Y(ifu_expipe_resp_ireg_1_0_Z[25]) ); defparam \ifu_expipe_resp_ireg_1_0[25] .INIT=16'hF888; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1_0[20] ( .A(cpu_i_resp_rd_data_sel[4]), .B(N_673), .C(N_675), .D(cpu_i_resp_rd_data_sel[20]), .Y(ifu_expipe_resp_ireg_1_0_Z[20]) ); defparam \ifu_expipe_resp_ireg_1_0[20] .INIT=16'hF888; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1_0[21] ( .A(cpu_i_resp_rd_data_sel[5]), .B(N_673), .C(N_675), .D(cpu_i_resp_rd_data_sel[21]), .Y(ifu_expipe_resp_ireg_1_0_Z[21]) ); defparam \ifu_expipe_resp_ireg_1_0[21] .INIT=16'hF888; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1_0[28] ( .A(cpu_i_resp_rd_data_sel[12]), .B(N_673), .C(N_675), .D(cpu_i_resp_rd_data_sel[28]), .Y(ifu_expipe_resp_ireg_1_0_Z[28]) ); defparam \ifu_expipe_resp_ireg_1_0[28] .INIT=16'hF888; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1_0[29] ( .A(cpu_i_resp_rd_data_sel[13]), .B(N_673), .C(N_675), .D(cpu_i_resp_rd_data_sel[29]), .Y(ifu_expipe_resp_ireg_1_0_Z[29]) ); defparam \ifu_expipe_resp_ireg_1_0[29] .INIT=16'hF888; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1_0[24] ( .A(cpu_i_resp_rd_data_sel[8]), .B(N_673), .C(N_675), .D(cpu_i_resp_rd_data_sel[24]), .Y(ifu_expipe_resp_ireg_1_0_Z[24]) ); defparam \ifu_expipe_resp_ireg_1_0[24] .INIT=16'hF888; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1_0[23] ( .A(cpu_i_resp_rd_data_sel[7]), .B(N_673), .C(N_675), .D(cpu_i_resp_rd_data_sel[23]), .Y(ifu_expipe_resp_ireg_1_0_Z[23]) ); defparam \ifu_expipe_resp_ireg_1_0[23] .INIT=16'hF888; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1_0[27] ( .A(cpu_i_resp_rd_data_sel[11]), .B(N_673), .C(N_675), .D(cpu_i_resp_rd_data_sel[27]), .Y(ifu_expipe_resp_ireg_1_0_Z[27]) ); defparam \ifu_expipe_resp_ireg_1_0[27] .INIT=16'hF888; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1_0[19] ( .A(cpu_i_resp_rd_data_sel[3]), .B(N_673), .C(N_675), .D(cpu_i_resp_rd_data_sel[19]), .Y(ifu_expipe_resp_ireg_1_0_Z[19]) ); defparam \ifu_expipe_resp_ireg_1_0[19] .INIT=16'hF888; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1_0[17] ( .A(cpu_i_resp_rd_data_sel[1]), .B(N_673), .C(N_675), .D(cpu_i_resp_rd_data_sel[17]), .Y(ifu_expipe_resp_ireg_1_0_Z[17]) ); defparam \ifu_expipe_resp_ireg_1_0[17] .INIT=16'hF888; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1_0[16] ( .A(cpu_i_resp_rd_data_sel[0]), .B(N_673), .C(N_675), .D(cpu_i_resp_rd_data_sel[16]), .Y(ifu_expipe_resp_ireg_1_0_Z[16]) ); defparam \ifu_expipe_resp_ireg_1_0[16] .INIT=16'hF888; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1_0[26] ( .A(cpu_i_resp_rd_data_sel[10]), .B(N_673), .C(N_675), .D(cpu_i_resp_rd_data_sel[26]), .Y(ifu_expipe_resp_ireg_1_0_Z[26]) ); defparam \ifu_expipe_resp_ireg_1_0[26] .INIT=16'hF888; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1_0[30] ( .A(cpu_i_resp_rd_data_sel[14]), .B(N_673), .C(N_675), .D(cpu_i_resp_rd_data_sel[30]), .Y(ifu_expipe_resp_ireg_1_0_Z[30]) ); defparam \ifu_expipe_resp_ireg_1_0[30] .INIT=16'hF888; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1_0[22] ( .A(cpu_i_resp_rd_data_sel[6]), .B(N_673), .C(N_675), .D(cpu_i_resp_rd_data_sel[22]), .Y(ifu_expipe_resp_ireg_1_0_Z[22]) ); defparam \ifu_expipe_resp_ireg_1_0[22] .INIT=16'hF888; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1_0[31] ( .A(cpu_i_resp_rd_data_sel[15]), .B(N_673), .C(N_675), .D(cpu_i_resp_rd_data_sel[31]), .Y(ifu_expipe_resp_ireg_1_0_Z[31]) ); defparam \ifu_expipe_resp_ireg_1_0[31] .INIT=16'hF888; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1_0[18] ( .A(cpu_i_resp_rd_data_sel[2]), .B(N_673), .C(N_675), .D(cpu_i_resp_rd_data_sel[18]), .Y(ifu_expipe_resp_ireg_1_0_Z[18]) ); defparam \ifu_expipe_resp_ireg_1_0[18] .INIT=16'hF888; CFG4 ifu_expipe_resp_access_mem_error_u_0_0_RNO_0 ( .A(ram1_0), .B(ifu_expipe_resp_access_mem_error_u_0_1559_tz_0), .C(iab_resp_empty), .D(N_669), .Y(ifu_expipe_resp_access_mem_error_u_0_1559_0) ); defparam ifu_expipe_resp_access_mem_error_u_0_0_RNO_0.INIT=16'h0E0C; // @46:12218 CFG3 un1_next_iab_rd_alignment_0_sqmuxa_i_a2 ( .A(iab_resp_empty), .B(cpu_i_resp_rd_data_sel[1]), .C(cpu_i_resp_rd_data_sel[0]), .Y(N_447) ); defparam un1_next_iab_rd_alignment_0_sqmuxa_i_a2.INIT=8'h80; // @46:12172 CFG4 emi_resp_head_uncompressed_full_0_a2 ( .A(last_iab_rd_alignment_Z), .B(N_401), .C(cpu_i_resp_rd_data_sel[1]), .D(cpu_i_resp_rd_data_sel[0]), .Y(emi_resp_head_uncompressed_full) ); defparam emi_resp_head_uncompressed_full_0_a2.INIT=16'h1000; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_0[7] ( .A(ram0_7), .B(buff_entry_data_resp_1[23]), .C(N_683), .D(N_685), .Y(ifu_expipe_resp_ireg_i_0_Z[7]) ); defparam \ifu_expipe_resp_ireg_i_0[7] .INIT=16'h7530; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_0[9] ( .A(ram0_9), .B(buff_entry_data_resp_1[25]), .C(N_683), .D(N_685), .Y(ifu_expipe_resp_ireg_i_0_Z[9]) ); defparam \ifu_expipe_resp_ireg_i_0[9] .INIT=16'h7530; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_0[8] ( .A(ram0_8), .B(buff_entry_data_resp_1[24]), .C(N_683), .D(N_685), .Y(ifu_expipe_resp_ireg_i_0_Z[8]) ); defparam \ifu_expipe_resp_ireg_i_0[8] .INIT=16'h7530; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_0[5] ( .A(ram0_5), .B(buff_entry_data_resp_1[21]), .C(N_683), .D(N_685), .Y(ifu_expipe_resp_ireg_i_0_Z[5]) ); defparam \ifu_expipe_resp_ireg_i_0[5] .INIT=16'h7530; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_0[10] ( .A(N_683), .B(N_685), .C(ram0_10), .D(N_408), .Y(ifu_expipe_resp_ireg_i_0_Z[10]) ); defparam \ifu_expipe_resp_ireg_i_0[10] .INIT=16'h0CAE; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_0[3] ( .A(ram0_3), .B(buff_entry_data_resp_1[19]), .C(N_683), .D(N_685), .Y(ifu_expipe_resp_ireg_i_0_Z[3]) ); defparam \ifu_expipe_resp_ireg_i_0[3] .INIT=16'h7530; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_0[11] ( .A(N_683), .B(N_685), .C(ram0_11), .D(N_407), .Y(ifu_expipe_resp_ireg_i_0_Z[11]) ); defparam \ifu_expipe_resp_ireg_i_0[11] .INIT=16'h0CAE; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_0[4] ( .A(ram0_4), .B(buff_entry_data_resp_1[20]), .C(N_683), .D(N_685), .Y(ifu_expipe_resp_ireg_i_0_Z[4]) ); defparam \ifu_expipe_resp_ireg_i_0[4] .INIT=16'h7530; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_0[12] ( .A(N_683), .B(N_685), .C(ram0_12), .D(N_406), .Y(ifu_expipe_resp_ireg_i_0_Z[12]) ); defparam \ifu_expipe_resp_ireg_i_0[12] .INIT=16'h0CAE; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_0[13] ( .A(N_683), .B(N_685), .C(ram0_13), .D(N_405), .Y(ifu_expipe_resp_ireg_i_0_Z[13]) ); defparam \ifu_expipe_resp_ireg_i_0[13] .INIT=16'h0CAE; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_o2[1] ( .A(resp_count[1]), .B(resp_count[0]), .C(buff_entry_data_resp_1[17]), .D(buff_entry_data_resp_1[16]), .Y(N_308) ); defparam \ifu_expipe_resp_ireg_i_o2[1] .INIT=16'hBFFF; // @46:12218 CFG4 iab_resp_complete_1_1_0 ( .A(cpu_i_resp_valid_sel), .B(N_306), .C(cpu_i_resp_rd_data_sel[1]), .D(cpu_i_resp_rd_data_sel[0]), .Y(iab_resp_complete_1_1_0_Z) ); defparam iab_resp_complete_1_1_0.INIT=16'hA888; // @46:12273 CFG4 ifu_expipe_resp_valid_3_0_i_o2_0 ( .A(cpu_i_resp_valid_sel), .B(N_306), .C(cpu_i_resp_rd_data_sel[17]), .D(cpu_i_resp_rd_data_sel[16]), .Y(N_344) ); defparam ifu_expipe_resp_valid_3_0_i_o2_0.INIT=16'hD555; // @46:12126 CFG4 next_req_is_hword_high_only_u ( .A(N_297_i), .B(N_284_i), .C(req_fetch_ptr[1]), .D(cpu_d_req_addr_net[1]), .Y(next_req_is_hword_high_only) ); defparam next_req_is_hword_high_only_u.INIT=16'hE4A0; // @46:12126 CFG4 \next_req_fetch_ptr[1] ( .A(cpu_d_req_addr_net[1]), .B(un5_N_4_0_i), .C(sticky_reset_reg_1z), .D(req_fetch_ptr[1]), .Y(next_req_fetch_ptr_0) ); defparam \next_req_fetch_ptr[1] .INIT=16'h0E02; // @46:12126 CFG4 \next_req_fetch_ptr[2] ( .A(cpu_d_req_addr_net[2]), .B(un5_N_4_0_i), .C(sticky_reset_reg_1z), .D(un3_next_req_fetch_ptr_cry_1_cy_Y), .Y(apb_i_req_addr_net[2]) ); defparam \next_req_fetch_ptr[2] .INIT=16'h020E; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_3_0[2] ( .A(iab_resp_empty), .B(buff_resp_head_data_resp_compressed[2]), .C(cpu_i_resp_rd_data_sel[18]), .D(N_674), .Y(ifu_expipe_resp_ireg_i_3_0_Z[2]) ); defparam \ifu_expipe_resp_ireg_i_3_0[2] .INIT=16'h1F11; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_3_0[15] ( .A(iab_resp_empty), .B(buff_resp_head_data_resp_compressed[15]), .C(cpu_i_resp_rd_data_sel[31]), .D(N_674), .Y(ifu_expipe_resp_ireg_i_3_0_Z[15]) ); defparam \ifu_expipe_resp_ireg_i_3_0[15] .INIT=16'h1F11; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_3_0[6] ( .A(iab_resp_empty), .B(buff_resp_head_data_resp_compressed[6]), .C(cpu_i_resp_rd_data_sel[22]), .D(N_674), .Y(ifu_expipe_resp_ireg_i_3_0_Z[6]) ); defparam \ifu_expipe_resp_ireg_i_3_0[6] .INIT=16'h1F11; // @46:12218 CFG4 iab_resp_complete_1_1 ( .A(iab_resp_complete_1_1_0_Z), .B(N_306), .C(cpu_i_resp_rd_data_sel[16]), .D(cpu_i_resp_rd_data_sel[17]), .Y(iab_resp_complete_1_1_Z) ); defparam iab_resp_complete_1_1.INIT=16'h2AAA; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_3[7] ( .A(ifu_expipe_resp_ireg_i_0_Z[7]), .B(ifu_expipe_resp_ireg_i_1_Z[7]), .C(cpu_i_resp_rd_data_sel[7]), .D(N_676), .Y(ifu_expipe_resp_ireg_i_3_Z[7]) ); defparam \ifu_expipe_resp_ireg_i_3[7] .INIT=16'hEFEE; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_3[9] ( .A(ifu_expipe_resp_ireg_i_0_Z[9]), .B(ifu_expipe_resp_ireg_i_1_Z[9]), .C(cpu_i_resp_rd_data_sel[9]), .D(N_676), .Y(ifu_expipe_resp_ireg_i_3_Z[9]) ); defparam \ifu_expipe_resp_ireg_i_3[9] .INIT=16'hEFEE; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_3[8] ( .A(ifu_expipe_resp_ireg_i_0_Z[8]), .B(ifu_expipe_resp_ireg_i_1_Z[8]), .C(cpu_i_resp_rd_data_sel[8]), .D(N_676), .Y(ifu_expipe_resp_ireg_i_3_Z[8]) ); defparam \ifu_expipe_resp_ireg_i_3[8] .INIT=16'hEFEE; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_3[5] ( .A(ifu_expipe_resp_ireg_i_0_Z[5]), .B(ifu_expipe_resp_ireg_i_1_Z[5]), .C(cpu_i_resp_rd_data_sel[5]), .D(N_676), .Y(ifu_expipe_resp_ireg_i_3_Z[5]) ); defparam \ifu_expipe_resp_ireg_i_3[5] .INIT=16'hEFEE; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_3[10] ( .A(ifu_expipe_resp_ireg_i_0_Z[10]), .B(ifu_expipe_resp_ireg_i_1_Z[10]), .C(cpu_i_resp_rd_data_sel[10]), .D(N_676), .Y(ifu_expipe_resp_ireg_i_3_Z[10]) ); defparam \ifu_expipe_resp_ireg_i_3[10] .INIT=16'hEFEE; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_3[3] ( .A(ifu_expipe_resp_ireg_i_0_Z[3]), .B(ifu_expipe_resp_ireg_i_1_Z[3]), .C(cpu_i_resp_rd_data_sel[3]), .D(N_676), .Y(ifu_expipe_resp_ireg_i_3_Z[3]) ); defparam \ifu_expipe_resp_ireg_i_3[3] .INIT=16'hEFEE; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_3[11] ( .A(ifu_expipe_resp_ireg_i_0_Z[11]), .B(ifu_expipe_resp_ireg_i_1_Z[11]), .C(cpu_i_resp_rd_data_sel[11]), .D(N_676), .Y(ifu_expipe_resp_ireg_i_3_Z[11]) ); defparam \ifu_expipe_resp_ireg_i_3[11] .INIT=16'hEFEE; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_3[4] ( .A(ifu_expipe_resp_ireg_i_0_Z[4]), .B(ifu_expipe_resp_ireg_i_1_Z[4]), .C(cpu_i_resp_rd_data_sel[4]), .D(N_676), .Y(ifu_expipe_resp_ireg_i_3_Z[4]) ); defparam \ifu_expipe_resp_ireg_i_3[4] .INIT=16'hEFEE; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_3[12] ( .A(ifu_expipe_resp_ireg_i_0_Z[12]), .B(ifu_expipe_resp_ireg_i_1_Z[12]), .C(cpu_i_resp_rd_data_sel[12]), .D(N_676), .Y(ifu_expipe_resp_ireg_i_3_Z[12]) ); defparam \ifu_expipe_resp_ireg_i_3[12] .INIT=16'hEFEE; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_3[13] ( .A(ifu_expipe_resp_ireg_i_0_Z[13]), .B(ifu_expipe_resp_ireg_i_1_Z[13]), .C(cpu_i_resp_rd_data_sel[13]), .D(N_676), .Y(ifu_expipe_resp_ireg_i_3_Z[13]) ); defparam \ifu_expipe_resp_ireg_i_3[13] .INIT=16'hEFEE; // @46:12273 CFG2 \ifu_expipe_resp_ireg_i_o2_3[15] ( .A(iab_head_uncompressed_full), .B(iab_head_compressed), .Y(N_320) ); defparam \ifu_expipe_resp_ireg_i_o2_3[15] .INIT=4'hE; // @46:12218 CFG3 un1_next_iab_rd_alignment_1_sqmuxa_i_0_m2 ( .A(cpu_i_resp_valid_sel), .B(iab_head_compressed), .C(iab_resp_empty), .Y(N_342) ); defparam un1_next_iab_rd_alignment_1_sqmuxa_i_0_m2.INIT=8'hAC; // @46:11924 CFG4 un5_m1_e_0 ( .A(un1_alu_op_sel_int), .B(exu_alu_result_iv_10_out), .C(exu_m3_0_2), .D(exu_m4_0_1), .Y(un5_m1_e_0_Z) ); defparam un5_m1_e_0.INIT=16'h3222; // @46:12273 CFG3 \ifu_expipe_resp_ireg_i_a2_2[0] ( .A(iab_head_uncompressed_full), .B(ram2_0_0), .C(N_686), .Y(N_629) ); defparam \ifu_expipe_resp_ireg_i_a2_2[0] .INIT=8'h10; // @46:12273 CFG3 \ifu_expipe_resp_ireg_i_a2_2[1] ( .A(iab_head_uncompressed_full), .B(ram2_1), .C(N_686), .Y(N_623) ); defparam \ifu_expipe_resp_ireg_i_a2_2[1] .INIT=8'h10; // @46:12273 CFG4 ifu_expipe_resp_valid_3_0_i_0 ( .A(cpu_i_resp_valid_sel), .B(no_flush_req_os), .C(iab_head_uncompressed_full), .D(iab_head_compressed), .Y(ifu_expipe_resp_valid_3_0_i_0_Z) ); defparam ifu_expipe_resp_valid_3_0_i_0.INIT=16'h3337; // @46:11924 CFG4 un5_m1_e_1 ( .A(un5_m1_e_0_Z), .B(un5_m3_i_a3_0_Z), .C(exu_alu_result192_1), .D(N_26_0), .Y(un5_m1_e_1_Z) ); defparam un5_m1_e_1.INIT=16'hAA2A; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_1[0] ( .A(ram1_0_0), .B(N_682), .C(iab_head_uncompressed_full), .D(N_629), .Y(ifu_expipe_resp_ireg_i_1_Z[0]) ); defparam \ifu_expipe_resp_ireg_i_1[0] .INIT=16'hFF04; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_0[0] ( .A(ifu_expipe_resp_ireg_i_a2_0_0_Z[0]), .B(iab_head_uncompressed_full), .C(ram0_0_0), .D(N_685), .Y(ifu_expipe_resp_ireg_i_0_Z[0]) ); defparam \ifu_expipe_resp_ireg_i_0[0] .INIT=16'h2322; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_1[1] ( .A(ram1_1), .B(N_682), .C(iab_head_uncompressed_full), .D(N_623), .Y(ifu_expipe_resp_ireg_i_1_Z[1]) ); defparam \ifu_expipe_resp_ireg_i_1[1] .INIT=16'hFF04; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_0[1] ( .A(ifu_expipe_resp_ireg_i_a2_0_0_Z[1]), .B(iab_head_uncompressed_full), .C(ram0_1), .D(N_685), .Y(ifu_expipe_resp_ireg_i_0_Z[1]) ); defparam \ifu_expipe_resp_ireg_i_0[1] .INIT=16'h2322; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_o2_0[15] ( .A(iab_resp_empty), .B(cpu_i_resp_valid_sel), .C(N_306), .D(N_320), .Y(ifu_expipe_resp_ireg_i_o2_0_Z[15]) ); defparam \ifu_expipe_resp_ireg_i_o2_0[15] .INIT=16'h2227; CFG4 ifu_expipe_resp_access_mem_error_u_0_0_RNO ( .A(iab_head_compressed), .B(iab_head_uncompressed_full), .C(ifu_expipe_resp_access_mem_error_u_0_1559_0), .D(N_329), .Y(ifu_expipe_resp_access_mem_error_u_0_0_RNO_Z) ); defparam ifu_expipe_resp_access_mem_error_u_0_0_RNO.INIT=16'hE0F0; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1_a2_3[31] ( .A(iab_head_uncompressed_full), .B(N_307), .C(iab_resp_empty), .D(N_306), .Y(N_667) ); defparam \ifu_expipe_resp_ireg_1_a2_3[31] .INIT=16'h0800; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1_a2_4[31] ( .A(iab_head_uncompressed_full), .B(N_307), .C(iab_resp_empty), .D(N_306), .Y(N_672) ); defparam \ifu_expipe_resp_ireg_1_a2_4[31] .INIT=16'h0008; // @46:12218 CFG4 iab_resp_complete_0 ( .A(N_329_i), .B(iab_head_compressed), .C(cpu_i_resp_valid_sel), .D(N_306), .Y(N_285) ); defparam iab_resp_complete_0.INIT=16'hF531; // @46:12273 CFG4 ifu_expipe_resp_access_mem_error_u_0_0 ( .A(iab_head_uncompressed_full), .B(ifu_expipe_resp_access_mem_error_u_0_0_RNO_Z), .C(iab_resp_empty), .D(ifu_expipe_resp_access_mem_error_u_0_a2_0), .Y(ifu_expipe_resp_access_mem_error_u_0_0_Z) ); defparam ifu_expipe_resp_access_mem_error_u_0_0.INIT=16'hCECC; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_o2[15] ( .A(N_308), .B(iab_resp_empty), .C(ifu_expipe_resp_ireg_i_o2_0_Z[15]), .D(N_320), .Y(N_311) ); defparam \ifu_expipe_resp_ireg_i_o2[15] .INIT=16'hF0F2; // @46:12273 CFG2 \ifu_expipe_resp_ireg_1_a2_7[29] ( .A(N_667), .B(buff_resp_rd_ptr[1]), .Y(N_687) ); defparam \ifu_expipe_resp_ireg_1_a2_7[29] .INIT=4'h8; // @46:12273 CFG2 \ifu_expipe_resp_ireg_1_a2_5[29] ( .A(N_667), .B(N_670), .Y(N_681) ); defparam \ifu_expipe_resp_ireg_1_a2_5[29] .INIT=4'h8; // @46:12273 CFG2 \ifu_expipe_resp_ireg_1_a2_6[29] ( .A(N_667), .B(N_669), .Y(N_684) ); defparam \ifu_expipe_resp_ireg_1_a2_6[29] .INIT=4'h8; // @46:12201 CFG3 last_iab_rd_alignment_4_iv_i_1_RNO_0 ( .A(N_306), .B(N_342), .C(ifu_expipe_resp_ready_net), .Y(N_287_i) ); defparam last_iab_rd_alignment_4_iv_i_1_RNO_0.INIT=8'h80; // @46:12201 CFG4 last_iab_rd_alignment_4_iv_i_1_RNO ( .A(N_306), .B(N_342), .C(N_447), .D(ifu_expipe_resp_ready_net), .Y(N_288_i) ); defparam last_iab_rd_alignment_4_iv_i_1_RNO.INIT=16'h0400; // @46:12273 CFG3 \ifu_expipe_resp_ireg_1_1[25] ( .A(ifu_expipe_resp_ireg_1_0_Z[25]), .B(buff_entry_data_resp_1[25]), .C(N_672), .Y(ifu_expipe_resp_ireg_1_1_Z[25]) ); defparam \ifu_expipe_resp_ireg_1_1[25] .INIT=8'hEA; // @46:12273 CFG3 \ifu_expipe_resp_ireg_1_1[20] ( .A(ifu_expipe_resp_ireg_1_0_Z[20]), .B(buff_entry_data_resp_1[20]), .C(N_672), .Y(ifu_expipe_resp_ireg_1_1_Z[20]) ); defparam \ifu_expipe_resp_ireg_1_1[20] .INIT=8'hEA; // @46:12273 CFG3 \ifu_expipe_resp_ireg_1_1[21] ( .A(ifu_expipe_resp_ireg_1_0_Z[21]), .B(buff_entry_data_resp_1[21]), .C(N_672), .Y(ifu_expipe_resp_ireg_1_1_Z[21]) ); defparam \ifu_expipe_resp_ireg_1_1[21] .INIT=8'hEA; // @46:12273 CFG3 \ifu_expipe_resp_ireg_1_1[28] ( .A(N_406), .B(N_672), .C(ifu_expipe_resp_ireg_1_0_Z[28]), .Y(ifu_expipe_resp_ireg_1_1_Z[28]) ); defparam \ifu_expipe_resp_ireg_1_1[28] .INIT=8'hF8; // @46:12273 CFG3 \ifu_expipe_resp_ireg_1_1[29] ( .A(N_405), .B(N_672), .C(ifu_expipe_resp_ireg_1_0_Z[29]), .Y(ifu_expipe_resp_ireg_1_1_Z[29]) ); defparam \ifu_expipe_resp_ireg_1_1[29] .INIT=8'hF8; // @46:12273 CFG3 \ifu_expipe_resp_ireg_1_1[24] ( .A(ifu_expipe_resp_ireg_1_0_Z[24]), .B(buff_entry_data_resp_1[24]), .C(N_672), .Y(ifu_expipe_resp_ireg_1_1_Z[24]) ); defparam \ifu_expipe_resp_ireg_1_1[24] .INIT=8'hEA; // @46:12273 CFG3 \ifu_expipe_resp_ireg_1_1[23] ( .A(ifu_expipe_resp_ireg_1_0_Z[23]), .B(buff_entry_data_resp_1[23]), .C(N_672), .Y(ifu_expipe_resp_ireg_1_1_Z[23]) ); defparam \ifu_expipe_resp_ireg_1_1[23] .INIT=8'hEA; // @46:12273 CFG3 \ifu_expipe_resp_ireg_1_1[27] ( .A(N_407), .B(N_672), .C(ifu_expipe_resp_ireg_1_0_Z[27]), .Y(ifu_expipe_resp_ireg_1_1_Z[27]) ); defparam \ifu_expipe_resp_ireg_1_1[27] .INIT=8'hF8; // @46:12273 CFG3 \ifu_expipe_resp_ireg_1_1[19] ( .A(ifu_expipe_resp_ireg_1_0_Z[19]), .B(buff_entry_data_resp_1[19]), .C(N_672), .Y(ifu_expipe_resp_ireg_1_1_Z[19]) ); defparam \ifu_expipe_resp_ireg_1_1[19] .INIT=8'hEA; // @46:12273 CFG3 \ifu_expipe_resp_ireg_1_1[17] ( .A(ifu_expipe_resp_ireg_1_0_Z[17]), .B(buff_entry_data_resp_1[17]), .C(N_672), .Y(ifu_expipe_resp_ireg_1_1_Z[17]) ); defparam \ifu_expipe_resp_ireg_1_1[17] .INIT=8'hEA; // @46:12273 CFG3 \ifu_expipe_resp_ireg_1_1[16] ( .A(ifu_expipe_resp_ireg_1_0_Z[16]), .B(buff_entry_data_resp_1[16]), .C(N_672), .Y(ifu_expipe_resp_ireg_1_1_Z[16]) ); defparam \ifu_expipe_resp_ireg_1_1[16] .INIT=8'hEA; // @46:12273 CFG3 \ifu_expipe_resp_ireg_1_1[26] ( .A(N_408), .B(N_672), .C(ifu_expipe_resp_ireg_1_0_Z[26]), .Y(ifu_expipe_resp_ireg_1_1_Z[26]) ); defparam \ifu_expipe_resp_ireg_1_1[26] .INIT=8'hF8; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_3[0] ( .A(ifu_expipe_resp_ireg_i_0_Z[0]), .B(ifu_expipe_resp_ireg_i_1_Z[0]), .C(cpu_i_resp_rd_data_sel[0]), .D(N_676), .Y(ifu_expipe_resp_ireg_i_3_Z[0]) ); defparam \ifu_expipe_resp_ireg_i_3[0] .INIT=16'hEFEE; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i_3[1] ( .A(ifu_expipe_resp_ireg_i_0_Z[1]), .B(ifu_expipe_resp_ireg_i_1_Z[1]), .C(cpu_i_resp_rd_data_sel[1]), .D(N_676), .Y(ifu_expipe_resp_ireg_i_3_Z[1]) ); defparam \ifu_expipe_resp_ireg_i_3[1] .INIT=16'hEFEE; // @46:12273 CFG4 ifu_expipe_resp_access_mem_error_u_0 ( .A(N_671), .B(cpu_i_resp_error_sel), .C(N_307), .D(ifu_expipe_resp_access_mem_error_u_0_0_Z), .Y(ifu_expipe_resp_access_mem_error_net) ); defparam ifu_expipe_resp_access_mem_error_u_0.INIT=16'hFF8C; // @46:12273 CFG4 ifu_expipe_resp_valid_3_0_i ( .A(N_344), .B(N_641_i_Z), .C(iab_resp_empty), .D(ifu_expipe_resp_valid_3_0_i_0_Z), .Y(N_108) ); defparam ifu_expipe_resp_valid_3_0_i.INIT=16'hFFEC; // @46:12218 CFG3 iab_resp_complete_u_1 ( .A(iab_resp_complete_1_1_Z), .B(iab_resp_empty), .C(N_285), .Y(iab_resp_complete_u_0) ); defparam iab_resp_complete_u_1.INIT=8'hB8; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1_3[25] ( .A(ram2_9), .B(ram0_9), .C(N_687), .D(N_684), .Y(ifu_expipe_resp_ireg_1_3_Z[25]) ); defparam \ifu_expipe_resp_ireg_1_3[25] .INIT=16'hEAC0; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1_3[20] ( .A(ram2_4), .B(ram0_4), .C(N_687), .D(N_684), .Y(ifu_expipe_resp_ireg_1_3_Z[20]) ); defparam \ifu_expipe_resp_ireg_1_3[20] .INIT=16'hEAC0; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1_3[21] ( .A(ram2_5), .B(ram0_5), .C(N_687), .D(N_684), .Y(ifu_expipe_resp_ireg_1_3_Z[21]) ); defparam \ifu_expipe_resp_ireg_1_3[21] .INIT=16'hEAC0; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1_3[28] ( .A(ram2_12), .B(ram0_12), .C(N_687), .D(N_684), .Y(ifu_expipe_resp_ireg_1_3_Z[28]) ); defparam \ifu_expipe_resp_ireg_1_3[28] .INIT=16'hEAC0; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1_3[29] ( .A(ram2_13), .B(ram0_13), .C(N_687), .D(N_684), .Y(ifu_expipe_resp_ireg_1_3_Z[29]) ); defparam \ifu_expipe_resp_ireg_1_3[29] .INIT=16'hEAC0; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1_3[24] ( .A(ram2_8), .B(ram0_8), .C(N_687), .D(N_684), .Y(ifu_expipe_resp_ireg_1_3_Z[24]) ); defparam \ifu_expipe_resp_ireg_1_3[24] .INIT=16'hEAC0; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1_3[23] ( .A(ram2_7), .B(ram0_7), .C(N_687), .D(N_684), .Y(ifu_expipe_resp_ireg_1_3_Z[23]) ); defparam \ifu_expipe_resp_ireg_1_3[23] .INIT=16'hEAC0; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1_3[27] ( .A(ram2_11), .B(ram0_11), .C(N_687), .D(N_684), .Y(ifu_expipe_resp_ireg_1_3_Z[27]) ); defparam \ifu_expipe_resp_ireg_1_3[27] .INIT=16'hEAC0; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1_3[19] ( .A(ram2_3), .B(ram0_3), .C(N_687), .D(N_684), .Y(ifu_expipe_resp_ireg_1_3_Z[19]) ); defparam \ifu_expipe_resp_ireg_1_3[19] .INIT=16'hEAC0; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1_3[17] ( .A(ram2_1), .B(ram0_1), .C(N_687), .D(N_684), .Y(ifu_expipe_resp_ireg_1_3_Z[17]) ); defparam \ifu_expipe_resp_ireg_1_3[17] .INIT=16'hEAC0; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1_3[16] ( .A(ram2_0_0), .B(ram0_0_0), .C(N_687), .D(N_684), .Y(ifu_expipe_resp_ireg_1_3_Z[16]) ); defparam \ifu_expipe_resp_ireg_1_3[16] .INIT=16'hEAC0; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1_3[26] ( .A(ram2_10), .B(ram0_10), .C(N_687), .D(N_684), .Y(ifu_expipe_resp_ireg_1_3_Z[26]) ); defparam \ifu_expipe_resp_ireg_1_3[26] .INIT=16'hEAC0; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i[7] ( .A(cpu_i_resp_rd_data_sel[23]), .B(N_311), .C(ifu_expipe_resp_ireg_i_3_Z[7]), .D(N_674), .Y(N_127) ); defparam \ifu_expipe_resp_ireg_i[7] .INIT=16'hFDFC; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i[9] ( .A(cpu_i_resp_rd_data_sel[25]), .B(N_311), .C(ifu_expipe_resp_ireg_i_3_Z[9]), .D(N_674), .Y(N_123) ); defparam \ifu_expipe_resp_ireg_i[9] .INIT=16'hFDFC; // @46:12273 CFG4 \ifu_expipe_resp_ireg_i[8] ( .A(cpu_i_resp_rd_data_sel[24]), .B(N_311), .C(ifu_expipe_resp_ireg_i_3_Z[8]), .D(N_674), .Y(N_125) ); defparam \ifu_expipe_resp_ireg_i[8] .INIT=16'hFDFC; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1[18] ( .A(N_672), .B(buff_entry_data_resp_1[18]), .C(ifu_expipe_resp_ireg_1_0_Z[18]), .D(N_521), .Y(ifu_expipe_resp_ireg_net[18]) ); defparam \ifu_expipe_resp_ireg_1[18] .INIT=16'hFFF8; // @46:15460 CFG4 \ifu_expipe_resp_ireg_i_3_RNIFLM4C[8] ( .A(cpu_i_resp_rd_data_sel[24]), .B(N_311), .C(ifu_expipe_resp_ireg_i_3_Z[8]), .D(N_674), .Y(N_125_i) ); defparam \ifu_expipe_resp_ireg_i_3_RNIFLM4C[8] .INIT=16'h0203; // @46:15460 CFG4 \ifu_expipe_resp_ireg_i_3_RNIDJM4C[7] ( .A(cpu_i_resp_rd_data_sel[23]), .B(N_311), .C(ifu_expipe_resp_ireg_i_3_Z[7]), .D(N_674), .Y(N_127_i) ); defparam \ifu_expipe_resp_ireg_i_3_RNIDJM4C[7] .INIT=16'h0203; // @46:15460 CFG4 \ifu_expipe_resp_ireg_i_3_RNIHNM4C[9] ( .A(cpu_i_resp_rd_data_sel[25]), .B(N_311), .C(ifu_expipe_resp_ireg_i_3_Z[9]), .D(N_674), .Y(N_123_i) ); defparam \ifu_expipe_resp_ireg_i_3_RNIHNM4C[9] .INIT=16'h0203; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1[16] ( .A(ifu_expipe_resp_ireg_1_3_Z[16]), .B(ifu_expipe_resp_ireg_1_1_Z[16]), .C(ram1_0_0), .D(N_681), .Y(ifu_expipe_resp_ireg_net[16]) ); defparam \ifu_expipe_resp_ireg_1[16] .INIT=16'hFEEE; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1[17] ( .A(ifu_expipe_resp_ireg_1_3_Z[17]), .B(ifu_expipe_resp_ireg_1_1_Z[17]), .C(ram1_1), .D(N_681), .Y(ifu_expipe_resp_ireg_net[17]) ); defparam \ifu_expipe_resp_ireg_1[17] .INIT=16'hFEEE; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1[19] ( .A(ifu_expipe_resp_ireg_1_3_Z[19]), .B(ifu_expipe_resp_ireg_1_1_Z[19]), .C(ram1_3), .D(N_681), .Y(ifu_expipe_resp_ireg_net[19]) ); defparam \ifu_expipe_resp_ireg_1[19] .INIT=16'hFEEE; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1[21] ( .A(ifu_expipe_resp_ireg_1_3_Z[21]), .B(ifu_expipe_resp_ireg_1_1_Z[21]), .C(ram1_5), .D(N_681), .Y(ifu_expipe_resp_ireg_net[21]) ); defparam \ifu_expipe_resp_ireg_1[21] .INIT=16'hFEEE; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1[27] ( .A(ifu_expipe_resp_ireg_1_3_Z[27]), .B(ifu_expipe_resp_ireg_1_1_Z[27]), .C(ram1_11), .D(N_681), .Y(ifu_expipe_resp_ireg_net[27]) ); defparam \ifu_expipe_resp_ireg_1[27] .INIT=16'hFEEE; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1[29] ( .A(ifu_expipe_resp_ireg_1_3_Z[29]), .B(ifu_expipe_resp_ireg_1_1_Z[29]), .C(ram1_13), .D(N_681), .Y(ifu_expipe_resp_ireg_net[29]) ); defparam \ifu_expipe_resp_ireg_1[29] .INIT=16'hFEEE; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1[23] ( .A(ifu_expipe_resp_ireg_1_3_Z[23]), .B(ifu_expipe_resp_ireg_1_1_Z[23]), .C(ram1_7), .D(N_681), .Y(ifu_expipe_resp_ireg_net[23]) ); defparam \ifu_expipe_resp_ireg_1[23] .INIT=16'hFEEE; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1[20] ( .A(ifu_expipe_resp_ireg_1_3_Z[20]), .B(ifu_expipe_resp_ireg_1_1_Z[20]), .C(ram1_4), .D(N_681), .Y(ifu_expipe_resp_ireg_net[20]) ); defparam \ifu_expipe_resp_ireg_1[20] .INIT=16'hFEEE; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1[24] ( .A(ifu_expipe_resp_ireg_1_3_Z[24]), .B(ifu_expipe_resp_ireg_1_1_Z[24]), .C(ram1_8), .D(N_681), .Y(ifu_expipe_resp_ireg_net[24]) ); defparam \ifu_expipe_resp_ireg_1[24] .INIT=16'hFEEE; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1[28] ( .A(ifu_expipe_resp_ireg_1_3_Z[28]), .B(ifu_expipe_resp_ireg_1_1_Z[28]), .C(ram1_12), .D(N_681), .Y(ifu_expipe_resp_ireg_net[28]) ); defparam \ifu_expipe_resp_ireg_1[28] .INIT=16'hFEEE; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1[25] ( .A(ifu_expipe_resp_ireg_1_3_Z[25]), .B(ifu_expipe_resp_ireg_1_1_Z[25]), .C(ram1_9), .D(N_681), .Y(ifu_expipe_resp_ireg_net[25]) ); defparam \ifu_expipe_resp_ireg_1[25] .INIT=16'hFEEE; // @46:12273 CFG4 \ifu_expipe_resp_ireg_1[26] ( .A(ifu_expipe_resp_ireg_1_3_Z[26]), .B(ifu_expipe_resp_ireg_1_1_Z[26]), .C(ram1_10), .D(N_681), .Y(ifu_expipe_resp_ireg_net[26]) ); defparam \ifu_expipe_resp_ireg_1[26] .INIT=16'hFEEE; // @46:8721 CFG4 \ifu_expipe_resp_ireg_i_3_RNIEJL4C[3] ( .A(cpu_i_resp_rd_data_sel[19]), .B(N_311), .C(ifu_expipe_resp_ireg_i_3_Z[3]), .D(N_674), .Y(N_291_i) ); defparam \ifu_expipe_resp_ireg_i_3_RNIEJL4C[3] .INIT=16'h0203; // @46:8721 CFG4 \ifu_expipe_resp_ireg_i_3_0_RNI58O7J[2] ( .A(cpu_i_resp_rd_data_sel[2]), .B(N_311), .C(ifu_expipe_resp_ireg_i_3_0_Z[2]), .D(N_676), .Y(N_137_i) ); defparam \ifu_expipe_resp_ireg_i_3_0_RNI58O7J[2] .INIT=16'h0203; // @46:8721 CFG4 \ifu_expipe_resp_ireg_i_3_RNIAFL4C[1] ( .A(cpu_i_resp_rd_data_sel[17]), .B(N_311), .C(ifu_expipe_resp_ireg_i_3_Z[1]), .D(N_674), .Y(N_139_i) ); defparam \ifu_expipe_resp_ireg_i_3_RNIAFL4C[1] .INIT=16'h0203; // @46:8721 CFG4 \ifu_expipe_resp_ireg_i_3_RNI8DL4C[0] ( .A(cpu_i_resp_rd_data_sel[16]), .B(N_311), .C(ifu_expipe_resp_ireg_i_3_Z[0]), .D(N_674), .Y(N_141_i) ); defparam \ifu_expipe_resp_ireg_i_3_RNI8DL4C[0] .INIT=16'h0203; // @46:8721 CFG4 \ifu_expipe_resp_ireg_i_3_0_RNIDP5VF[15] ( .A(cpu_i_resp_rd_data_sel[15]), .B(N_311), .C(ifu_expipe_resp_ireg_i_3_0_Z[15]), .D(N_676), .Y(N_289_i) ); defparam \ifu_expipe_resp_ireg_i_3_0_RNIDP5VF[15] .INIT=16'h0203; // @46:8721 CFG4 \ifu_expipe_resp_ireg_i_3_RNI0M7VA[13] ( .A(cpu_i_resp_rd_data_sel[29]), .B(N_311), .C(ifu_expipe_resp_ireg_i_3_Z[13]), .D(N_674), .Y(N_115_i) ); defparam \ifu_expipe_resp_ireg_i_3_RNI0M7VA[13] .INIT=16'h0203; // @46:8721 CFG4 \ifu_expipe_resp_ireg_i_3_RNIUJ7VA[12] ( .A(cpu_i_resp_rd_data_sel[28]), .B(N_311), .C(ifu_expipe_resp_ireg_i_3_Z[12]), .D(N_674), .Y(N_117_i) ); defparam \ifu_expipe_resp_ireg_i_3_RNIUJ7VA[12] .INIT=16'h0203; // @46:8721 CFG4 \ifu_expipe_resp_ireg_i_3_RNISH7VA[11] ( .A(cpu_i_resp_rd_data_sel[27]), .B(N_311), .C(ifu_expipe_resp_ireg_i_3_Z[11]), .D(N_674), .Y(N_119_i) ); defparam \ifu_expipe_resp_ireg_i_3_RNISH7VA[11] .INIT=16'h0203; // @46:8721 CFG4 \ifu_expipe_resp_ireg_i_3_RNIQF7VA[10] ( .A(cpu_i_resp_rd_data_sel[26]), .B(N_311), .C(ifu_expipe_resp_ireg_i_3_Z[10]), .D(N_674), .Y(N_121_i) ); defparam \ifu_expipe_resp_ireg_i_3_RNIQF7VA[10] .INIT=16'h0203; // @46:8721 CFG4 \ifu_expipe_resp_ireg_i_3_0_RNIDGO7J[6] ( .A(cpu_i_resp_rd_data_sel[6]), .B(N_311), .C(ifu_expipe_resp_ireg_i_3_0_Z[6]), .D(N_676), .Y(N_129_i) ); defparam \ifu_expipe_resp_ireg_i_3_0_RNIDGO7J[6] .INIT=16'h0203; // @46:8721 CFG4 \ifu_expipe_resp_ireg_i_3_RNI9FM4C[5] ( .A(cpu_i_resp_rd_data_sel[21]), .B(N_311), .C(ifu_expipe_resp_ireg_i_3_Z[5]), .D(N_674), .Y(N_131_i) ); defparam \ifu_expipe_resp_ireg_i_3_RNI9FM4C[5] .INIT=16'h0203; // @46:8721 CFG4 \ifu_expipe_resp_ireg_i_3_RNI7DM4C[4] ( .A(cpu_i_resp_rd_data_sel[20]), .B(N_311), .C(ifu_expipe_resp_ireg_i_3_Z[4]), .D(N_674), .Y(N_133_i) ); defparam \ifu_expipe_resp_ireg_i_3_RNI7DM4C[4] .INIT=16'h0203; // @46:12201 CFG2 ifu_expipe_resp_valid_3_0_i_RNIC365VM ( .A(ifu_expipe_resp_ready_net), .B(N_108), .Y(N_295_i) ); defparam ifu_expipe_resp_valid_3_0_i_RNIC365VM.INIT=4'h2; // @46:11924 CFG4 un5_fetch_ptr_sel_0_a2_0_a1 ( .A(un5_N_5_mux), .B(N_764), .C(sticky_branch_reg_Z), .D(sticky_reset_reg_1z), .Y(un5_fetch_ptr_sel_0_a2_0_a1_Z) ); defparam un5_fetch_ptr_sel_0_a2_0_a1.INIT=16'h5554; // @46:12163 CFG4 ifu_m7_i_o4 ( .A(ifu_m1_e_0_Z), .B(exu_alu_result_iv_8_0_0), .C(ifu_expipe_req_branch_excpt_req_valid_1_0_0), .D(un5_N_8), .Y(ifu_N_6) ); defparam ifu_m7_i_o4.INIT=16'h0F2F; // @46:12163 CFG2 ifu_emi_req_valid_i_o2_1 ( .A(ifu_expipe_req_branch_excpt_req_valid_net), .B(ifu_emi_req_valid_i_o2_1_0_1z), .Y(N_319) ); defparam ifu_emi_req_valid_i_o2_1.INIT=4'hE; // @46:12333 CFG2 un1_ifu_expipe_resp_next_vaddr ( .A(ifu_expipe_req_branch_excpt_req_valid_net), .B(iab_req_empty), .Y(un1_ifu_expipe_resp_next_vaddr_1z) ); defparam un1_ifu_expipe_resp_next_vaddr.INIT=4'hE; // @46:12101 CFG2 fence_i_hold_2_i_o2 ( .A(ifu_expipe_req_branch_excpt_req_valid_net), .B(ifu_expipe_req_branch_excpt_req_fenci_net), .Y(N_341) ); defparam fence_i_hold_2_i_o2.INIT=4'h7; // @46:12081 CFG2 sticky_branch_reg_2_i_o2 ( .A(ifu_expipe_req_branch_excpt_req_valid_net), .B(ifu_expipe_req_branch_excpt_req_fenci_net), .Y(N_356) ); defparam sticky_branch_reg_2_i_o2.INIT=4'hD; // @46:12201 CFG2 N_641_i ( .A(ifu_expipe_req_branch_excpt_req_valid_net), .B(lsu_flush), .Y(N_641_i_Z) ); defparam N_641_i.INIT=4'hE; // @46:12126 CFG3 next_req_is_hword_high_only_u_RNO_0 ( .A(sticky_reset_reg_1z), .B(ifu_expipe_req_branch_excpt_req_valid_net), .C(sticky_branch_reg_Z), .Y(N_284_i) ); defparam next_req_is_hword_high_only_u_RNO_0.INIT=8'h54; // @46:12096 CFG4 fence_i_hold_RNO ( .A(fence_i_hold_Z), .B(ifu_expipe_req_fenci_proceed_net), .C(lsu_flush), .D(N_341), .Y(N_286_i) ); defparam fence_i_hold_RNO.INIT=16'h0203; // @46:12117 CFG4 ifu_emi_req_accepted_0_a2 ( .A(ifu_N_11), .B(un1_cpu_i_req_ready), .C(i_trx_os_buff_ready), .D(ifu_emi_req_valid_i_0), .Y(ifu_emi_req_accepted) ); defparam ifu_emi_req_accepted_0_a2.INIT=16'h0080; // @46:12110 CFG4 sticky_fence_reg_2_0_o2 ( .A(N_319), .B(un1_cpu_i_req_ready), .C(i_trx_os_buff_ready), .D(ifu_emi_req_valid_i_0), .Y(N_345) ); defparam sticky_fence_reg_2_0_o2.INIT=16'hFF7F; // @46:12110 CFG4 sticky_fence_reg_2_0 ( .A(lsu_flush), .B(sticky_fence_reg_Z), .C(N_345), .D(N_341), .Y(sticky_fence_reg_2) ); defparam sticky_fence_reg_2_0.INIT=16'h4055; // @46:12076 CFG4 sticky_branch_reg_RNO ( .A(lsu_flush), .B(sticky_branch_reg_Z), .C(ifu_emi_req_accepted), .D(N_356), .Y(N_294_i) ); defparam sticky_branch_reg_RNO.INIT=16'h0E0F; // @46:12355 miv_rv32_ifu_iab_32s_2s_3s_2s_0s u_miv_rv32_ifu_iab_0 ( .buff_resp_head_data_resp_compressed_4(buff_resp_head_data_resp_compressed[6]), .buff_resp_head_data_resp_compressed_0(buff_resp_head_data_resp_compressed[2]), .buff_resp_head_data_resp_compressed_13(buff_resp_head_data_resp_compressed[15]), .ifu_expipe_resp_ireg_vaddr_net_5(ifu_expipe_resp_ireg_vaddr_net_5), .ifu_expipe_resp_ireg_vaddr_net_13(ifu_expipe_resp_ireg_vaddr_net_13), .ifu_expipe_resp_ireg_vaddr_net_3(ifu_expipe_resp_ireg_vaddr_net_3), .ifu_expipe_resp_ireg_vaddr_net_4(ifu_expipe_resp_ireg_vaddr_net_4), .ifu_expipe_resp_ireg_vaddr_net_8(ifu_expipe_resp_ireg_vaddr_net_8), .ifu_expipe_resp_ireg_vaddr_net_6(ifu_expipe_resp_ireg_vaddr_net_6), .ifu_expipe_resp_ireg_vaddr_net_1(ifu_expipe_resp_ireg_vaddr_net_1), .ifu_expipe_resp_ireg_vaddr_net_7(ifu_expipe_resp_ireg_vaddr_net_7), .ifu_expipe_resp_ireg_vaddr_net_2(ifu_expipe_resp_ireg_vaddr_net_2), .ifu_expipe_resp_ireg_vaddr_net_28(ifu_expipe_resp_ireg_vaddr_net_28), .ifu_expipe_resp_ireg_vaddr_net_0(ifu_expipe_resp_ireg_vaddr_net_0), .ifu_expipe_resp_ireg_vaddr_net_29(ifu_expipe_resp_ireg_vaddr_net_29), .buff_entry_data_resp_1(buff_entry_data_resp_1[25:16]), .req_fetch_ptr_0(req_fetch_ptr[1]), .req_fetch_ptr_1({req_fetch_ptr_1[31:30], N_15105, req_fetch_ptr_1[28:2]}), .cpu_i_resp_rd_data_sel(cpu_i_resp_rd_data_sel[31:0]), .num_emi_req_os(num_emi_req_os[1:0]), .resp_count(resp_count[1:0]), .buff_req_rd_ptr_0(buff_req_rd_ptr[1]), .buff_entry_addr_req_0__0(buff_entry_addr_req_0_[0]), .buff_resp_rd_ptr(buff_resp_rd_ptr[1:0]), .apb_i_req_addr_net(apb_i_req_addr_net[31:2]), .buff_entry_addr_req_2_({buff_entry_addr_req_2_[31:2], N_15106, buff_entry_addr_req_2_[0]}), .buff_entry_addr_req_1__0(buff_entry_addr_req_1_[0]), .next_req_fetch_ptr_0(next_req_fetch_ptr_0), .N_345(N_345), .N_341(N_341), .N_285(N_285), .iab_resp_complete_1_1(iab_resp_complete_1_1_Z), .N_329_i(N_329_i), .iab_head_uncompressed_full(iab_head_uncompressed_full), .iab_head_compressed(iab_head_compressed), .N_329(N_329), .N_306(N_306), .N_292(N_292), .un5_N_4_0_i(un5_N_4_0_i), .last_iab_rd_alignment(last_iab_rd_alignment_Z), .iab_resp_alloc(iab_resp_alloc_Z), .N_298(N_298), .N_383(N_383), .N_403(N_403), .N_382(N_382), .N_404(N_404), .N_367(N_367), .N_381(N_381), .N_376(N_376), .N_368(N_368), .N_408(N_408), .N_370(N_370), .N_369(N_369), .N_405(N_405), .N_377(N_377), .N_373(N_373), .N_401(N_401), .N_406(N_406), .N_380(N_380), .N_379(N_379), .N_371(N_371), .N_372(N_372), .N_407(N_407), .N_378(N_378), .N_375(N_375), .N_374(N_374), .N_669(N_669), .cpu_i_resp_valid_sel(cpu_i_resp_valid_sel), .N_670(N_670), .N_418_1(N_418_1), .N_417_1(N_417_1), .N_422_1(N_422_1), .N_416_1(N_416_1), .N_415_1(N_415_1), .ifu_expipe_req_branch_excpt_req_valid_net(ifu_expipe_req_branch_excpt_req_valid_net), .lsu_flush(lsu_flush), .iab_req_empty(iab_req_empty), .iab_resp_complete_u_0(iab_resp_complete_u_0), .N_290_i_1(N_290_i_1), .N_676(N_676), .iab_resp_empty(iab_resp_empty), .ifu_expipe_resp_ready_net(ifu_expipe_resp_ready_net), .no_flush_req_os_1z(no_flush_req_os), .ifu_emi_req_accepted(ifu_emi_req_accepted), .ram2_9(ram2_9), .ram2_10(ram2_10), .ram2_11(ram2_11), .ram2_12(ram2_12), .ram2_13(ram2_13), .ram2_1(ram2_1), .ram2_3(ram2_3), .ram2_4(ram2_4), .ram2_5(ram2_5), .ram2_7(ram2_7), .ram2_8(ram2_8), .ram1_10(ram1_10), .ram1_11(ram1_11), .ram1_12(ram1_12), .ram1_13(ram1_13), .ram2_0_0(ram2_0_0), .ram1_3(ram1_3), .ram1_4(ram1_4), .ram1_5(ram1_5), .ram1_7(ram1_7), .ram1_8(ram1_8), .ram1_9(ram1_9), .ram0_11(ram0_11), .ram0_12(ram0_12), .ram0_13(ram0_13), .ram0_14(ram0_14), .ram0_15(ram0_15), .ram1_0_0(ram1_0_0), .ram1_1(ram1_1), .ram0_4(ram0_4), .ram0_5(ram0_5), .ram0_6(ram0_6), .ram0_7(ram0_7), .ram0_8(ram0_8), .ram0_9(ram0_9), .ram0_10(ram0_10), .ram0_0_0(ram0_0_0), .ram0_1(ram0_1), .ram0_2(ram0_2), .ram0_3(ram0_3), .ram0_0(ram0_0), .ram1_0(ram1_0), .ram2_0(ram2_0), .cpu_i_resp_error_sel(cpu_i_resp_error_sel), .ram3_0(ram3_0), .un7_iab_readylt1(un7_iab_readylt1), .un7_iab_readylto1(un7_iab_readylto1), .dff(dff), .next_req_is_hword_high_only(next_req_is_hword_high_only), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_fetch_unit_32s_18446744071562067968_0s_3s_2s_3s_2s_2s_0s_1s_Z14 */ module miv_rv32_lsu_32s_2s_1s_2s_2s ( lsu_expipe_resp_rd_data_net, cpu_d_req_wr_byte_en_net_2_2, cpu_d_req_wr_byte_en_net_2_0, cpu_d_req_rd_byte_en_net_1_0, cpu_d_resp_rd_data_net, lsu_emi_req_rd_byte_en_3_m_0, lsu_emi_req_rd_byte_en_iv_0_0, cpu_d_req_wr_byte_en_net_1_0, lsu_emi_req_rd_byte_en_2_0, req_buff_fence_os_0, un2_req_resp_str_req_buff_addr_misalign_0, lsu_expipe_req_op_net, debug_sysbus_resp_rd_data_0_0, un19_cpu_d_resp_rd_data_sig_0, cpu_d_req_addr_net_0, req_buff_resp_state_1_, req_buff_resp_fault_1__0, req_buff_resp_fault_0__0, buff_rd_ptr_0, req_buff_resp_state_valid, cpu_d_req_ready_sig, cpu_d_req_valid_net, alloc_req_buff_1_1_1z, lsu_expipe_req_valid_net, N_240, N_246_0, N_244, dealloc_resp_buff_10_1z, un1_lsu_resp_valid, un11_lsu_resp_ready_1_1, un11_lsu_resp_ready_d, lsu_expipe_resp_access_mem_error_net, cpu_d_resp_error_sig, trace_priv_i, N_188, alloc_exception_1z, N_194, lsu_expipe_resp_str_amo_addr_misalign_net, N_145, un24_lsu_emi_req_rd_byte_en_1z, un5_lsu_emi_req_rd_byte_en_1z, un6_req_buff_load_os, un1_lsu_expipe_req_op_4_1z, N_84, lsu_expipe_resp_valid_0_1z, lsu_resp_valid40_1z, lsu_expipe_resp_ld_addr_misalign_0_1z, un1_lsu_emi_req_valid46_1z, N_90, req_resp_state_valid_1z, un1_lsu_emi_req_valid46_1_1z, lsu_emi_req_valid47_1z, lsu_emi_req_valid49, lsu_expipe_resp_rd_data_sn_N_9_mux, alloc_req_buff_1_1_0_1z, un1_lsu_resp_valid38_1_i, un1_req_resp_state_1_i, N_192, bcu_result_cry_0_Y, lsu_flush, PF_CCC_0_0_OUT0_FABCLK_0, dff ) ; output [31:0] lsu_expipe_resp_rd_data_net ; output cpu_d_req_wr_byte_en_net_2_2 ; output cpu_d_req_wr_byte_en_net_2_0 ; output cpu_d_req_rd_byte_en_net_1_0 ; input [31:0] cpu_d_resp_rd_data_net ; output lsu_emi_req_rd_byte_en_3_m_0 ; output lsu_emi_req_rd_byte_en_iv_0_0 ; output cpu_d_req_wr_byte_en_net_1_0 ; output lsu_emi_req_rd_byte_en_2_0 ; output req_buff_fence_os_0 ; output un2_req_resp_str_req_buff_addr_misalign_0 ; input [3:0] lsu_expipe_req_op_net ; input debug_sysbus_resp_rd_data_0_0 ; input un19_cpu_d_resp_rd_data_sig_0 ; input cpu_d_req_addr_net_0 ; output [3:0] req_buff_resp_state_1_ ; output req_buff_resp_fault_1__0 ; output req_buff_resp_fault_0__0 ; output buff_rd_ptr_0 ; output [1:0] req_buff_resp_state_valid ; input cpu_d_req_ready_sig ; output cpu_d_req_valid_net ; output alloc_req_buff_1_1_1z ; input lsu_expipe_req_valid_net ; output N_240 ; output N_246_0 ; output N_244 ; output dealloc_resp_buff_10_1z ; input un1_lsu_resp_valid ; input un11_lsu_resp_ready_1_1 ; input un11_lsu_resp_ready_d ; output lsu_expipe_resp_access_mem_error_net ; input cpu_d_resp_error_sig ; input trace_priv_i ; output N_188 ; output alloc_exception_1z ; output N_194 ; output lsu_expipe_resp_str_amo_addr_misalign_net ; output N_145 ; output un24_lsu_emi_req_rd_byte_en_1z ; output un5_lsu_emi_req_rd_byte_en_1z ; output un6_req_buff_load_os ; output un1_lsu_expipe_req_op_4_1z ; output N_84 ; output lsu_expipe_resp_valid_0_1z ; output lsu_resp_valid40_1z ; output lsu_expipe_resp_ld_addr_misalign_0_1z ; output un1_lsu_emi_req_valid46_1z ; output N_90 ; output req_resp_state_valid_1z ; output un1_lsu_emi_req_valid46_1_1z ; output lsu_emi_req_valid47_1z ; output lsu_emi_req_valid49 ; output lsu_expipe_resp_rd_data_sn_N_9_mux ; output alloc_req_buff_1_1_0_1z ; output un1_lsu_resp_valid38_1_i ; output un1_req_resp_state_1_i ; output N_192 ; input bcu_result_cry_0_Y ; input lsu_flush ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input dff ; wire cpu_d_req_wr_byte_en_net_2_2 ; wire cpu_d_req_wr_byte_en_net_2_0 ; wire cpu_d_req_rd_byte_en_net_1_0 ; wire lsu_emi_req_rd_byte_en_3_m_0 ; wire lsu_emi_req_rd_byte_en_iv_0_0 ; wire cpu_d_req_wr_byte_en_net_1_0 ; wire lsu_emi_req_rd_byte_en_2_0 ; wire req_buff_fence_os_0 ; wire un2_req_resp_str_req_buff_addr_misalign_0 ; wire debug_sysbus_resp_rd_data_0_0 ; wire un19_cpu_d_resp_rd_data_sig_0 ; wire cpu_d_req_addr_net_0 ; wire req_buff_resp_fault_1__0 ; wire req_buff_resp_fault_0__0 ; wire buff_rd_ptr_0 ; wire cpu_d_req_ready_sig ; wire cpu_d_req_valid_net ; wire alloc_req_buff_1_1_1z ; wire lsu_expipe_req_valid_net ; wire N_240 ; wire N_246_0 ; wire N_244 ; wire dealloc_resp_buff_10_1z ; wire un1_lsu_resp_valid ; wire un11_lsu_resp_ready_1_1 ; wire un11_lsu_resp_ready_d ; wire lsu_expipe_resp_access_mem_error_net ; wire cpu_d_resp_error_sig ; wire trace_priv_i ; wire N_188 ; wire alloc_exception_1z ; wire N_194 ; wire lsu_expipe_resp_str_amo_addr_misalign_net ; wire N_145 ; wire un24_lsu_emi_req_rd_byte_en_1z ; wire un5_lsu_emi_req_rd_byte_en_1z ; wire un6_req_buff_load_os ; wire un1_lsu_expipe_req_op_4_1z ; wire N_84 ; wire lsu_expipe_resp_valid_0_1z ; wire lsu_resp_valid40_1z ; wire lsu_expipe_resp_ld_addr_misalign_0_1z ; wire un1_lsu_emi_req_valid46_1z ; wire N_90 ; wire req_resp_state_valid_1z ; wire un1_lsu_emi_req_valid46_1_1z ; wire lsu_emi_req_valid47_1z ; wire lsu_emi_req_valid49 ; wire lsu_expipe_resp_rd_data_sn_N_9_mux ; wire alloc_req_buff_1_1_0_1z ; wire un1_lsu_resp_valid38_1_i ; wire un1_req_resp_state_1_i ; wire N_192 ; wire bcu_result_cry_0_Y ; wire lsu_flush ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire dff ; wire [1:1] req_buff_resp_state_valid_9; wire [0:0] req_buff_resp_state_valid_3; wire [0:0] buff_rd_ptr_0_Z; wire [0:0] buff_wr_ptr_Z; wire [0:0] buff_wr_ptr_0_Z; wire [0:0] req_buff_resp_fault_0_; wire [1:0] buff_wr_strb_Z; wire [0:0] req_buff_resp_fault_1_; wire [1:0] req_buff_resp_drop; wire [1:0] req_buff_resp_addr_align_0_; wire [1:0] req_buff_resp_addr_align_0__3; wire [1:0] req_buff_resp_addr_align_1_; wire [3:0] req_buff_resp_state_0_; wire [3:0] req_buff_resp_state_0__3; wire [2:1] un1_lsu_expipe_resp_access_aborted_2_1_0_co1; wire [2:1] un1_lsu_expipe_resp_access_aborted_2_1_0_wmux_0_S; wire [1:0] req_resp_addr_align_Z; wire [2:1] un1_lsu_expipe_resp_access_aborted_2_1_0_y0; wire [2:1] un1_lsu_expipe_resp_access_aborted_2_1_0_co0; wire [2:1] un1_lsu_expipe_resp_access_aborted_2_1_0_wmux_S; wire [15:0] un1_lsu_emi_resp_rd_data_Z; wire [3:0] req_resp_state_Z; wire [13:13] lsu_expipe_resp_rd_data_net_1; wire [4:4] lsu_expipe_resp_rd_data_0_a2_0_0_Z; wire [0:0] req_buff_fence_os_1_Z; wire [3:3] lsu_expipe_resp_rd_data_0_a3_1_0_Z; wire [15:1] lsu_expipe_resp_rd_data_0_0_Z; wire [7:7] un1_lsu_emi_resp_rd_data_1; wire [1:1] lsu_emi_req_rd_byte_en_2_Z; wire [2:1] lsu_emi_req_rd_byte_en_3_Z; wire VCC ; wire GND ; wire alloc_str_req_buff_addr_misalign ; wire alloc_ld_req_buff_addr_misalign ; wire un1_lsu_flush ; wire un1_lsu_flush_0 ; wire N_320 ; wire N_319 ; wire un1_lsu_expipe_req_op_2_i ; wire lsu_emi_req_valid43_Z ; wire lsu_resp_valid36_Z ; wire N_111 ; wire N_249 ; wire N_278 ; wire lsu_resp_valid34_Z ; wire lsu_resp_valid33_Z ; wire N_112 ; wire un1_lsu_resp_valid38_1_1_Z ; wire alloc_req_buff_1_1_0_1_Z ; wire lsu_expipe_resp_rd_data_sn_N_6 ; wire N_242 ; wire N_93 ; wire lsu_expipe_resp_rd_data_3_0_Z ; wire lsu_expipe_resp_rd_data_3_12_Z ; wire lsu_expipe_resp_rd_data_3_28_Z ; wire lsu_expipe_resp_rd_data_3_24_Z ; wire lsu_expipe_resp_rd_data_3_32_Z ; wire lsu_expipe_resp_rd_data_3_36_Z ; wire lsu_expipe_resp_rd_data_3_48_Z ; wire lsu_expipe_resp_rd_data_3_56_Z ; wire lsu_resp_valid41_Z ; wire lsu_resp_valid32_Z ; wire un1_lsu_resp_access_parity_error_0_sqmuxa_i_0 ; wire lsu_emi_req_valid46_Z ; wire lsu_emi_req_valid48_Z ; wire dealloc_resp_buff_11_0_Z ; wire un1_lsu_emi_req_valid40_Z ; wire N_94_1 ; wire N_104 ; wire un1_lsu_resp_valid38_0_Z ; wire N_105 ; wire N_246 ; wire N_248 ; wire N_245 ; wire N_247 ; wire N_254 ; wire N_252 ; wire lsu_expipe_resp_rd_data_3_Z ; wire N_250 ; wire N_87 ; wire N_83 ; wire N_91 ; wire N_251 ; wire N_253 ; wire N_237_1 ; wire N_238_1 ; wire N_282 ; wire N_333 ; wire N_185 ; wire N_232_1 ; wire N_334 ; wire N_186 ; wire N_187 ; wire N_211 ; wire N_328 ; wire N_213 ; wire N_180 ; wire lsu_expipe_resp_rd_data_3_10_Z ; wire N_237_2 ; wire N_156 ; wire N_238_2 ; wire N_239_2 ; wire N_244_2 ; wire N_246_2 ; wire N_240_2 ; wire N_239 ; wire N_232_2 ; wire N_248_2 ; wire N_256 ; wire lsu_emi_req_valid_10_Z ; wire alloc_req_buff_1_Z ; wire alloc_req_buff_Z ; // @46:19360 SLE \gen_req_buff_loop[1].req_buff_resp_state_valid[1] ( .Q(req_buff_resp_state_valid[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_buff_resp_state_valid_9[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:19360 SLE \gen_req_buff_loop[0].req_buff_resp_state_valid[0] ( .Q(req_buff_resp_state_valid[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_buff_resp_state_valid_3[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:19293 SLE \buff_rd_ptr[0] ( .Q(buff_rd_ptr_0), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(buff_rd_ptr_0_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:19302 SLE \buff_wr_ptr[0] ( .Q(buff_wr_ptr_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(buff_wr_ptr_0_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:19324 SLE \gen_req_buff_loop[0].req_buff_resp_fault[0][0] ( .Q(req_buff_resp_fault_0_[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(alloc_str_req_buff_addr_misalign), .EN(buff_wr_strb_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:19324 SLE \gen_req_buff_loop[1].req_buff_resp_fault[1][0] ( .Q(req_buff_resp_fault_1_[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(alloc_str_req_buff_addr_misalign), .EN(buff_wr_strb_Z[1]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:19324 SLE \gen_req_buff_loop[0].req_buff_resp_fault[0][2] ( .Q(req_buff_resp_fault_0__0), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(alloc_ld_req_buff_addr_misalign), .EN(buff_wr_strb_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:19324 SLE \gen_req_buff_loop[1].req_buff_resp_fault[1][2] ( .Q(req_buff_resp_fault_1__0), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(alloc_ld_req_buff_addr_misalign), .EN(buff_wr_strb_Z[1]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:19337 SLE \gen_req_buff_loop[0].req_buff_resp_drop[0] ( .Q(req_buff_resp_drop[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lsu_flush), .EN(un1_lsu_flush), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:19337 SLE \gen_req_buff_loop[1].req_buff_resp_drop[1] ( .Q(req_buff_resp_drop[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lsu_flush), .EN(un1_lsu_flush_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:19337 SLE \gen_req_buff_loop[0].req_buff_resp_addr_align[0][0] ( .Q(req_buff_resp_addr_align_0_[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_buff_resp_addr_align_0__3[0]), .EN(un1_lsu_flush), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:19337 SLE \gen_req_buff_loop[1].req_buff_resp_addr_align[1][1] ( .Q(req_buff_resp_addr_align_1_[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_buff_resp_addr_align_0__3[1]), .EN(un1_lsu_flush_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:19337 SLE \gen_req_buff_loop[1].req_buff_resp_addr_align[1][0] ( .Q(req_buff_resp_addr_align_1_[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_buff_resp_addr_align_0__3[0]), .EN(un1_lsu_flush_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:19337 SLE \gen_req_buff_loop[0].req_buff_resp_state[0][3] ( .Q(req_buff_resp_state_0_[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_buff_resp_state_0__3[3]), .EN(un1_lsu_flush), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:19337 SLE \gen_req_buff_loop[0].req_buff_resp_state[0][2] ( .Q(req_buff_resp_state_0_[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_buff_resp_state_0__3[2]), .EN(un1_lsu_flush), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:19337 SLE \gen_req_buff_loop[0].req_buff_resp_state[0][1] ( .Q(req_buff_resp_state_0_[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_buff_resp_state_0__3[1]), .EN(un1_lsu_flush), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:19337 SLE \gen_req_buff_loop[0].req_buff_resp_state[0][0] ( .Q(req_buff_resp_state_0_[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_buff_resp_state_0__3[0]), .EN(un1_lsu_flush), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:19337 SLE \gen_req_buff_loop[1].req_buff_resp_state[1][3] ( .Q(req_buff_resp_state_1_[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_buff_resp_state_0__3[3]), .EN(un1_lsu_flush_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:19337 SLE \gen_req_buff_loop[1].req_buff_resp_state[1][2] ( .Q(req_buff_resp_state_1_[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_buff_resp_state_0__3[2]), .EN(un1_lsu_flush_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:19337 SLE \gen_req_buff_loop[1].req_buff_resp_state[1][1] ( .Q(req_buff_resp_state_1_[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_buff_resp_state_0__3[1]), .EN(un1_lsu_flush_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:19337 SLE \gen_req_buff_loop[1].req_buff_resp_state[1][0] ( .Q(req_buff_resp_state_1_[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_buff_resp_state_0__3[0]), .EN(un1_lsu_flush_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:19337 SLE \gen_req_buff_loop[0].req_buff_resp_addr_align[0][1] ( .Q(req_buff_resp_addr_align_0_[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_buff_resp_addr_align_0__3[1]), .EN(un1_lsu_flush), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:19412 ARI1 \un1_lsu_expipe_resp_access_aborted_2_1_0_wmux_0[2] ( .FCO(un1_lsu_expipe_resp_access_aborted_2_1_0_co1[2]), .S(un1_lsu_expipe_resp_access_aborted_2_1_0_wmux_0_S[2]), .Y(N_320), .B(req_resp_addr_align_Z[1]), .C(cpu_d_resp_rd_data_net[18]), .D(cpu_d_resp_rd_data_net[26]), .A(un1_lsu_expipe_resp_access_aborted_2_1_0_y0[2]), .FCI(un1_lsu_expipe_resp_access_aborted_2_1_0_co0[2]) ); defparam \un1_lsu_expipe_resp_access_aborted_2_1_0_wmux_0[2] .INIT=20'h0F588; // @46:19412 ARI1 \un1_lsu_expipe_resp_access_aborted_2_1_0_wmux[2] ( .FCO(un1_lsu_expipe_resp_access_aborted_2_1_0_co0[2]), .S(un1_lsu_expipe_resp_access_aborted_2_1_0_wmux_S[2]), .Y(un1_lsu_expipe_resp_access_aborted_2_1_0_y0[2]), .B(req_resp_addr_align_Z[1]), .C(cpu_d_resp_rd_data_net[2]), .D(cpu_d_resp_rd_data_net[10]), .A(req_resp_addr_align_Z[0]), .FCI(VCC) ); defparam \un1_lsu_expipe_resp_access_aborted_2_1_0_wmux[2] .INIT=20'h0FA44; // @46:19412 ARI1 \un1_lsu_expipe_resp_access_aborted_2_1_0_wmux_0[1] ( .FCO(un1_lsu_expipe_resp_access_aborted_2_1_0_co1[1]), .S(un1_lsu_expipe_resp_access_aborted_2_1_0_wmux_0_S[1]), .Y(N_319), .B(req_resp_addr_align_Z[1]), .C(cpu_d_resp_rd_data_net[17]), .D(cpu_d_resp_rd_data_net[25]), .A(un1_lsu_expipe_resp_access_aborted_2_1_0_y0[1]), .FCI(un1_lsu_expipe_resp_access_aborted_2_1_0_co0[1]) ); defparam \un1_lsu_expipe_resp_access_aborted_2_1_0_wmux_0[1] .INIT=20'h0F588; // @46:19412 ARI1 \un1_lsu_expipe_resp_access_aborted_2_1_0_wmux[1] ( .FCO(un1_lsu_expipe_resp_access_aborted_2_1_0_co0[1]), .S(un1_lsu_expipe_resp_access_aborted_2_1_0_wmux_S[1]), .Y(un1_lsu_expipe_resp_access_aborted_2_1_0_y0[1]), .B(req_resp_addr_align_Z[1]), .C(cpu_d_resp_rd_data_net[1]), .D(cpu_d_resp_rd_data_net[9]), .A(req_resp_addr_align_Z[0]), .FCI(VCC) ); defparam \un1_lsu_expipe_resp_access_aborted_2_1_0_wmux[1] .INIT=20'h0FA44; // @46:19089 CFG4 alloc_ld_req_buff_addr_misalign_iv ( .A(cpu_d_req_addr_net_0), .B(bcu_result_cry_0_Y), .C(un1_lsu_expipe_req_op_2_i), .D(lsu_emi_req_valid43_Z), .Y(alloc_ld_req_buff_addr_misalign) ); defparam alloc_ld_req_buff_addr_misalign_iv.INIT=16'hEEC0; // @46:19412 CFG4 \un1_lsu_emi_resp_rd_data[6] ( .A(un19_cpu_d_resp_rd_data_sig_0), .B(req_resp_addr_align_Z[1]), .C(cpu_d_resp_rd_data_net[22]), .D(debug_sysbus_resp_rd_data_0_0), .Y(un1_lsu_emi_resp_rd_data_Z[6]) ); defparam \un1_lsu_emi_resp_rd_data[6] .INIT=16'hF3E2; // @46:19412 CFG4 \lsu_expipe_resp_rd_data_1[12] ( .A(lsu_resp_valid36_Z), .B(req_resp_addr_align_Z[1]), .C(cpu_d_resp_rd_data_net[28]), .D(N_111), .Y(N_192) ); defparam \lsu_expipe_resp_rd_data_1[12] .INIT=16'hAA80; // @46:19412 CFG3 \lsu_expipe_resp_rd_data_0_a3_2[4] ( .A(N_249), .B(cpu_d_resp_rd_data_net[28]), .C(req_resp_addr_align_Z[1]), .Y(N_278) ); defparam \lsu_expipe_resp_rd_data_0_a3_2[4] .INIT=8'h80; // @46:19412 CFG3 \lsu_expipe_resp_rd_data_0_a2_1[15] ( .A(lsu_resp_valid34_Z), .B(lsu_resp_valid33_Z), .C(lsu_resp_valid36_Z), .Y(N_112) ); defparam \lsu_expipe_resp_rd_data_0_a2_1[15] .INIT=8'h10; // @46:19414 CFG4 un1_lsu_resp_valid38_1 ( .A(req_resp_state_Z[1]), .B(req_resp_state_Z[3]), .C(un1_lsu_resp_valid38_1_1_Z), .D(un1_req_resp_state_1_i), .Y(un1_lsu_resp_valid38_1_i) ); defparam un1_lsu_resp_valid38_1.INIT=16'hFF60; // @46:19414 CFG3 un1_lsu_resp_valid38_1_1 ( .A(req_resp_state_Z[0]), .B(req_resp_state_Z[2]), .C(req_resp_state_Z[3]), .Y(un1_lsu_resp_valid38_1_1_Z) ); defparam un1_lsu_resp_valid38_1_1.INIT=8'h34; // @46:19089 CFG4 alloc_req_buff_1_1_0 ( .A(req_buff_resp_state_valid[1]), .B(req_buff_resp_fault_1__0), .C(alloc_req_buff_1_1_0_1_Z), .D(req_buff_resp_state_valid[0]), .Y(alloc_req_buff_1_1_0_1z) ); defparam alloc_req_buff_1_1_0.INIT=16'h5075; // @46:19089 CFG4 alloc_req_buff_1_1_0_1 ( .A(req_buff_resp_fault_0__0), .B(req_buff_resp_state_valid[0]), .C(req_buff_resp_fault_1_[0]), .D(req_buff_resp_fault_0_[0]), .Y(alloc_req_buff_1_1_0_1_Z) ); defparam alloc_req_buff_1_1_0_1.INIT=16'h0347; // @46:19412 CFG2 \lsu_expipe_resp_rd_data_0_a2[2] ( .A(lsu_expipe_resp_rd_data_sn_N_6), .B(N_242), .Y(N_93) ); defparam \lsu_expipe_resp_rd_data_0_a2[2] .INIT=4'h2; // @46:19412 CFG2 lsu_expipe_resp_rd_data_3_0 ( .A(cpu_d_resp_rd_data_net[31]), .B(lsu_resp_valid34_Z), .Y(lsu_expipe_resp_rd_data_3_0_Z) ); defparam lsu_expipe_resp_rd_data_3_0.INIT=4'h8; // @46:19412 CFG2 lsu_expipe_resp_rd_data_3_12 ( .A(cpu_d_resp_rd_data_net[30]), .B(lsu_resp_valid34_Z), .Y(lsu_expipe_resp_rd_data_3_12_Z) ); defparam lsu_expipe_resp_rd_data_3_12.INIT=4'h8; // @46:19412 CFG2 lsu_expipe_resp_rd_data_3_28 ( .A(cpu_d_resp_rd_data_net[18]), .B(lsu_resp_valid34_Z), .Y(lsu_expipe_resp_rd_data_3_28_Z) ); defparam lsu_expipe_resp_rd_data_3_28.INIT=4'h8; // @46:19412 CFG2 lsu_expipe_resp_rd_data_3_24 ( .A(cpu_d_resp_rd_data_net[28]), .B(lsu_resp_valid34_Z), .Y(lsu_expipe_resp_rd_data_3_24_Z) ); defparam lsu_expipe_resp_rd_data_3_24.INIT=4'h8; // @46:19412 CFG2 lsu_expipe_resp_rd_data_3_32 ( .A(cpu_d_resp_rd_data_net[23]), .B(lsu_resp_valid34_Z), .Y(lsu_expipe_resp_rd_data_3_32_Z) ); defparam lsu_expipe_resp_rd_data_3_32.INIT=4'h8; // @46:19412 CFG2 lsu_expipe_resp_rd_data_3_36 ( .A(cpu_d_resp_rd_data_net[22]), .B(lsu_resp_valid34_Z), .Y(lsu_expipe_resp_rd_data_3_36_Z) ); defparam lsu_expipe_resp_rd_data_3_36.INIT=4'h8; // @46:19412 CFG2 lsu_expipe_resp_rd_data_3_48 ( .A(cpu_d_resp_rd_data_net[29]), .B(lsu_resp_valid34_Z), .Y(lsu_expipe_resp_rd_data_3_48_Z) ); defparam lsu_expipe_resp_rd_data_3_48.INIT=4'h8; // @46:19412 CFG2 lsu_expipe_resp_rd_data_3_56 ( .A(cpu_d_resp_rd_data_net[16]), .B(lsu_resp_valid34_Z), .Y(lsu_expipe_resp_rd_data_3_56_Z) ); defparam lsu_expipe_resp_rd_data_3_56.INIT=4'h8; // @46:19412 CFG4 \lsu_expipe_resp_rd_data[13] ( .A(un1_lsu_emi_resp_rd_data_Z[13]), .B(lsu_expipe_resp_rd_data_net_1[13]), .C(lsu_resp_valid36_Z), .D(lsu_expipe_resp_rd_data_sn_N_9_mux), .Y(lsu_expipe_resp_rd_data_net[13]) ); defparam \lsu_expipe_resp_rd_data[13] .INIT=16'hECCC; // @46:19541 CFG4 lsu_resp_valid41 ( .A(req_resp_state_Z[0]), .B(req_resp_state_Z[1]), .C(req_resp_state_Z[3]), .D(req_resp_state_Z[2]), .Y(lsu_resp_valid41_Z) ); defparam lsu_resp_valid41.INIT=16'h0001; // @46:19412 CFG2 \lsu_expipe_resp_rd_data_0_a2_0_0[4] ( .A(req_resp_addr_align_Z[1]), .B(req_resp_addr_align_Z[0]), .Y(lsu_expipe_resp_rd_data_0_a2_0_0_Z[4]) ); defparam \lsu_expipe_resp_rd_data_0_a2_0_0[4] .INIT=4'h2; // @46:19375 CFG2 \req_buff_fence_os_1[0] ( .A(req_buff_resp_state_0_[1]), .B(req_buff_resp_state_0_[2]), .Y(req_buff_fence_os_1_Z[0]) ); defparam \req_buff_fence_os_1[0] .INIT=4'h1; // @46:19412 CFG2 lsu_expipe_resp_rd_data_sn_m3_i_o3 ( .A(lsu_resp_valid33_Z), .B(req_resp_addr_align_Z[1]), .Y(N_242) ); defparam lsu_expipe_resp_rd_data_sn_m3_i_o3.INIT=4'h7; // @46:19412 CFG2 un1_lsu_resp_access_parity_error_0_sqmuxa ( .A(un1_req_resp_state_1_i), .B(lsu_resp_valid32_Z), .Y(un1_lsu_resp_access_parity_error_0_sqmuxa_i_0) ); defparam un1_lsu_resp_access_parity_error_0_sqmuxa.INIT=4'hD; // @46:19197 CFG2 lsu_emi_req_valid47_2 ( .A(lsu_expipe_req_op_net[1]), .B(lsu_expipe_req_op_net[2]), .Y(lsu_emi_req_valid49) ); defparam lsu_emi_req_valid47_2.INIT=4'h1; // @46:19339 CFG2 \gen_req_buff_loop[0].req_buff_resp_state[0]_3[3] ( .A(lsu_flush), .B(lsu_expipe_req_op_net[3]), .Y(req_buff_resp_state_0__3[3]) ); defparam \gen_req_buff_loop[0].req_buff_resp_state[0]_3[3] .INIT=4'h4; // @46:19089 CFG2 un1_lsu_emi_req_valid46_1 ( .A(lsu_emi_req_valid47_1z), .B(lsu_emi_req_valid46_Z), .Y(un1_lsu_emi_req_valid46_1_1z) ); defparam un1_lsu_emi_req_valid46_1.INIT=4'hE; // @46:19339 CFG2 \gen_req_buff_loop[0].req_buff_resp_state[0]_3[0] ( .A(lsu_flush), .B(lsu_expipe_req_op_net[0]), .Y(req_buff_resp_state_0__3[0]) ); defparam \gen_req_buff_loop[0].req_buff_resp_state[0]_3[0] .INIT=4'h4; // @46:19339 CFG2 \gen_req_buff_loop[0].req_buff_resp_state[0]_3[2] ( .A(lsu_flush), .B(lsu_expipe_req_op_net[2]), .Y(req_buff_resp_state_0__3[2]) ); defparam \gen_req_buff_loop[0].req_buff_resp_state[0]_3[2] .INIT=4'h4; // @46:19339 CFG2 \gen_req_buff_loop[0].req_buff_resp_state[0]_3[1] ( .A(lsu_flush), .B(lsu_expipe_req_op_net[1]), .Y(req_buff_resp_state_0__3[1]) ); defparam \gen_req_buff_loop[0].req_buff_resp_state[0]_3[1] .INIT=4'h4; // @46:19339 CFG2 \gen_req_buff_loop[0].req_buff_resp_addr_align[0]_3[1] ( .A(lsu_flush), .B(cpu_d_req_addr_net_0), .Y(req_buff_resp_addr_align_0__3[1]) ); defparam \gen_req_buff_loop[0].req_buff_resp_addr_align[0]_3[1] .INIT=4'h4; // @46:19384 CFG3 \req_resp_state[3] ( .A(req_buff_resp_state_1_[3]), .B(req_buff_resp_state_0_[3]), .C(buff_rd_ptr_0), .Y(req_resp_state_Z[3]) ); defparam \req_resp_state[3] .INIT=8'hAC; // @46:19384 CFG3 \req_resp_state[2] ( .A(req_buff_resp_state_1_[2]), .B(req_buff_resp_state_0_[2]), .C(buff_rd_ptr_0), .Y(req_resp_state_Z[2]) ); defparam \req_resp_state[2] .INIT=8'hAC; // @46:19384 CFG3 \req_resp_state[1] ( .A(req_buff_resp_state_1_[1]), .B(req_buff_resp_state_0_[1]), .C(buff_rd_ptr_0), .Y(req_resp_state_Z[1]) ); defparam \req_resp_state[1] .INIT=8'hAC; // @46:19384 CFG3 \req_resp_state[0] ( .A(req_buff_resp_state_1_[0]), .B(req_buff_resp_state_0_[0]), .C(buff_rd_ptr_0), .Y(req_resp_state_Z[0]) ); defparam \req_resp_state[0] .INIT=8'hAC; // @46:19390 CFG3 req_resp_state_valid ( .A(req_buff_resp_state_valid[1]), .B(req_buff_resp_state_valid[0]), .C(buff_rd_ptr_0), .Y(req_resp_state_valid_1z) ); defparam req_resp_state_valid.INIT=8'hAC; // @46:19389 CFG3 \un2_req_resp_str_req_buff_addr_misalign[0] ( .A(req_buff_resp_fault_1_[0]), .B(req_buff_resp_fault_0_[0]), .C(buff_rd_ptr_0), .Y(un2_req_resp_str_req_buff_addr_misalign_0) ); defparam \un2_req_resp_str_req_buff_addr_misalign[0] .INIT=8'hAC; // @46:19385 CFG3 \req_resp_addr_align[1] ( .A(req_buff_resp_addr_align_1_[1]), .B(req_buff_resp_addr_align_0_[1]), .C(buff_rd_ptr_0), .Y(req_resp_addr_align_Z[1]) ); defparam \req_resp_addr_align[1] .INIT=8'hAC; // @46:19385 CFG3 \req_resp_addr_align[0] ( .A(req_buff_resp_addr_align_1_[0]), .B(req_buff_resp_addr_align_0_[0]), .C(buff_rd_ptr_0), .Y(req_resp_addr_align_Z[0]) ); defparam \req_resp_addr_align[0] .INIT=8'hAC; // @46:19197 CFG4 lsu_emi_req_valid47 ( .A(lsu_expipe_req_op_net[2]), .B(lsu_expipe_req_op_net[1]), .C(lsu_expipe_req_op_net[0]), .D(lsu_expipe_req_op_net[3]), .Y(lsu_emi_req_valid47_1z) ); defparam lsu_emi_req_valid47.INIT=16'h0100; // @46:19180 CFG4 lsu_emi_req_valid46 ( .A(lsu_expipe_req_op_net[2]), .B(lsu_expipe_req_op_net[1]), .C(lsu_expipe_req_op_net[0]), .D(lsu_expipe_req_op_net[3]), .Y(lsu_emi_req_valid46_Z) ); defparam lsu_emi_req_valid46.INIT=16'h0008; // @46:19212 CFG4 lsu_emi_req_valid48 ( .A(lsu_expipe_req_op_net[2]), .B(lsu_expipe_req_op_net[1]), .C(lsu_expipe_req_op_net[0]), .D(lsu_expipe_req_op_net[3]), .Y(lsu_emi_req_valid48_Z) ); defparam lsu_emi_req_valid48.INIT=16'h0080; // @46:19412 CFG4 lsu_expipe_resp_rd_data_sn_m7 ( .A(lsu_resp_valid36_Z), .B(lsu_resp_valid33_Z), .C(lsu_resp_valid34_Z), .D(un1_lsu_resp_access_parity_error_0_sqmuxa_i_0), .Y(lsu_expipe_resp_rd_data_sn_N_9_mux) ); defparam lsu_expipe_resp_rd_data_sn_m7.INIT=16'h0203; // @46:19135 CFG4 lsu_emi_req_valid43 ( .A(lsu_expipe_req_op_net[2]), .B(lsu_expipe_req_op_net[1]), .C(lsu_expipe_req_op_net[0]), .D(lsu_expipe_req_op_net[3]), .Y(lsu_emi_req_valid43_Z) ); defparam lsu_emi_req_valid43.INIT=16'h0040; // @46:19089 CFG3 \lsu_emi_req_fence_1_0_a2[1] ( .A(lsu_expipe_req_op_net[3]), .B(lsu_expipe_req_op_net[2]), .C(lsu_expipe_req_op_net[1]), .Y(N_90) ); defparam \lsu_emi_req_fence_1_0_a2[1] .INIT=8'h40; // @46:19089 CFG3 un1_lsu_emi_req_valid46 ( .A(lsu_emi_req_valid46_Z), .B(lsu_emi_req_valid47_1z), .C(lsu_emi_req_valid48_Z), .Y(un1_lsu_emi_req_valid46_1z) ); defparam un1_lsu_emi_req_valid46.INIT=8'hFE; // @46:19551 CFG4 dealloc_resp_buff_11_0 ( .A(buff_rd_ptr_0), .B(req_resp_state_valid_1z), .C(req_buff_resp_drop[1]), .D(req_buff_resp_drop[0]), .Y(dealloc_resp_buff_11_0_Z) ); defparam dealloc_resp_buff_11_0.INIT=16'hC480; // @46:19412 CFG4 lsu_expipe_resp_ld_addr_misalign_0 ( .A(buff_rd_ptr_0), .B(req_resp_state_valid_1z), .C(req_buff_resp_fault_1__0), .D(req_buff_resp_fault_0__0), .Y(lsu_expipe_resp_ld_addr_misalign_0_1z) ); defparam lsu_expipe_resp_ld_addr_misalign_0.INIT=16'hC480; // @46:19412 CFG3 lsu_expipe_resp_valid_0 ( .A(lsu_resp_valid40_1z), .B(un1_lsu_resp_valid38_1_i), .C(req_resp_state_valid_1z), .Y(lsu_expipe_resp_valid_0_1z) ); defparam lsu_expipe_resp_valid_0.INIT=8'hE0; // @46:19412 CFG3 lsu_expipe_resp_rd_data_sn_m5 ( .A(lsu_resp_valid34_Z), .B(req_resp_addr_align_Z[1]), .C(lsu_resp_valid33_Z), .Y(lsu_expipe_resp_rd_data_sn_N_6) ); defparam lsu_expipe_resp_rd_data_sn_m5.INIT=8'h45; // @46:19375 CFG4 \req_buff_fence_os[0] ( .A(req_buff_resp_state_0_[0]), .B(req_buff_resp_state_0_[3]), .C(req_buff_fence_os_1_Z[0]), .D(req_buff_resp_state_valid[0]), .Y(req_buff_fence_os_0) ); defparam \req_buff_fence_os[0] .INIT=16'h8000; // @46:19089 CFG4 \lsu_emi_req_fence_1_i[0] ( .A(lsu_expipe_req_op_net[2]), .B(lsu_expipe_req_op_net[1]), .C(lsu_expipe_req_op_net[0]), .D(lsu_expipe_req_op_net[3]), .Y(N_84) ); defparam \lsu_emi_req_fence_1_i[0] .INIT=16'hFF89; // @46:19089 CFG4 un1_lsu_expipe_req_op_4 ( .A(lsu_expipe_req_op_net[2]), .B(lsu_expipe_req_op_net[1]), .C(lsu_expipe_req_op_net[0]), .D(lsu_expipe_req_op_net[3]), .Y(un1_lsu_expipe_req_op_4_1z) ); defparam un1_lsu_expipe_req_op_4.INIT=16'h0012; // @46:19089 CFG4 un1_lsu_emi_req_valid40 ( .A(lsu_expipe_req_op_net[2]), .B(lsu_expipe_req_op_net[1]), .C(lsu_expipe_req_op_net[0]), .D(lsu_expipe_req_op_net[3]), .Y(un1_lsu_emi_req_valid40_Z) ); defparam un1_lsu_emi_req_valid40.INIT=16'hEE01; // @46:19412 CFG3 \lsu_expipe_resp_rd_data_0_a2_0_1[2] ( .A(req_resp_addr_align_Z[0]), .B(lsu_resp_valid36_Z), .C(lsu_expipe_resp_rd_data_sn_N_9_mux), .Y(N_94_1) ); defparam \lsu_expipe_resp_rd_data_0_a2_0_1[2] .INIT=8'hD0; // @46:19412 CFG3 \lsu_expipe_resp_rd_data_0_a2_2[2] ( .A(req_resp_addr_align_Z[0]), .B(lsu_resp_valid36_Z), .C(lsu_expipe_resp_rd_data_sn_N_9_mux), .Y(N_104) ); defparam \lsu_expipe_resp_rd_data_0_a2_2[2] .INIT=8'h20; // @46:19474 CFG4 lsu_resp_valid36 ( .A(req_resp_state_Z[0]), .B(req_resp_state_Z[1]), .C(req_resp_state_Z[3]), .D(req_resp_state_Z[2]), .Y(lsu_resp_valid36_Z) ); defparam lsu_resp_valid36.INIT=16'h0200; // @46:19528 CFG4 lsu_resp_valid40 ( .A(req_resp_state_Z[0]), .B(req_resp_state_Z[1]), .C(req_resp_state_Z[3]), .D(req_resp_state_Z[2]), .Y(lsu_resp_valid40_1z) ); defparam lsu_resp_valid40.INIT=16'h0800; // @46:19414 CFG3 lsu_resp_valid32 ( .A(req_resp_state_Z[0]), .B(req_resp_state_Z[2]), .C(req_resp_state_Z[3]), .Y(lsu_resp_valid32_Z) ); defparam lsu_resp_valid32.INIT=8'h02; // @46:19432 CFG3 lsu_resp_valid33 ( .A(req_resp_state_Z[1]), .B(req_resp_state_Z[2]), .C(req_resp_state_Z[3]), .Y(lsu_resp_valid33_Z) ); defparam lsu_resp_valid33.INIT=8'h02; // @46:19447 CFG4 lsu_resp_valid34 ( .A(req_resp_state_Z[0]), .B(req_resp_state_Z[1]), .C(req_resp_state_Z[3]), .D(req_resp_state_Z[2]), .Y(lsu_resp_valid34_Z) ); defparam lsu_resp_valid34.INIT=16'h0008; // @46:19369 CFG4 \gen_req_buff_loop[0].un6_req_buff_load_os ( .A(req_buff_resp_state_0_[3]), .B(req_buff_resp_state_0_[2]), .C(req_buff_resp_state_0_[1]), .D(req_buff_resp_state_0_[0]), .Y(un6_req_buff_load_os) ); defparam \gen_req_buff_loop[0].un6_req_buff_load_os .INIT=16'h1514; // @46:19089 CFG4 un1_lsu_expipe_req_op_2 ( .A(lsu_expipe_req_op_net[2]), .B(lsu_expipe_req_op_net[1]), .C(lsu_expipe_req_op_net[0]), .D(lsu_expipe_req_op_net[3]), .Y(un1_lsu_expipe_req_op_2_i) ); defparam un1_lsu_expipe_req_op_2.INIT=16'h0024; // @46:19412 CFG4 un1_lsu_resp_valid38_0 ( .A(req_resp_state_Z[0]), .B(req_resp_state_Z[1]), .C(req_resp_state_Z[3]), .D(req_resp_state_Z[2]), .Y(un1_lsu_resp_valid38_0_Z) ); defparam un1_lsu_resp_valid38_0.INIT=16'h0410; // @46:19412 CFG3 \lsu_expipe_resp_rd_data_0_a2_2[11] ( .A(lsu_expipe_resp_rd_data_sn_N_9_mux), .B(lsu_resp_valid32_Z), .C(lsu_expipe_resp_rd_data_sn_N_6), .Y(N_105) ); defparam \lsu_expipe_resp_rd_data_0_a2_2[11] .INIT=8'h40; // @46:19106 CFG2 un5_lsu_emi_req_rd_byte_en ( .A(cpu_d_req_addr_net_0), .B(bcu_result_cry_0_Y), .Y(un5_lsu_emi_req_rd_byte_en_1z) ); defparam un5_lsu_emi_req_rd_byte_en.INIT=4'h1; // @46:19339 CFG2 \gen_req_buff_loop[0].req_buff_resp_addr_align[0]_3[0] ( .A(lsu_flush), .B(bcu_result_cry_0_Y), .Y(req_buff_resp_addr_align_0__3[0]) ); defparam \gen_req_buff_loop[0].req_buff_resp_addr_align[0]_3[0] .INIT=4'h4; // @46:19109 CFG2 un24_lsu_emi_req_rd_byte_en ( .A(cpu_d_req_addr_net_0), .B(bcu_result_cry_0_Y), .Y(un24_lsu_emi_req_rd_byte_en_1z) ); defparam un24_lsu_emi_req_rd_byte_en.INIT=4'h8; // @46:19412 CFG3 \lsu_expipe_resp_rd_data_0_o3_0[2] ( .A(req_resp_addr_align_Z[1]), .B(lsu_expipe_resp_rd_data_sn_N_6), .C(N_94_1), .Y(N_246) ); defparam \lsu_expipe_resp_rd_data_0_o3_0[2] .INIT=8'h73; // @46:19412 CFG3 \lsu_expipe_resp_rd_data_0_o3_0[11] ( .A(lsu_expipe_resp_rd_data_sn_N_6), .B(req_resp_addr_align_Z[1]), .C(N_112), .Y(N_248) ); defparam \lsu_expipe_resp_rd_data_0_o3_0[11] .INIT=8'h75; // @46:19412 CFG2 \lsu_expipe_resp_rd_data_0_a3_1_0[3] ( .A(cpu_d_resp_rd_data_net[11]), .B(req_resp_addr_align_Z[1]), .Y(lsu_expipe_resp_rd_data_0_a3_1_0_Z[3]) ); defparam \lsu_expipe_resp_rd_data_0_a3_1_0[3] .INIT=4'h2; // @46:19412 CFG4 un1_req_resp_state_1 ( .A(req_resp_state_Z[0]), .B(req_resp_state_Z[1]), .C(req_resp_state_Z[3]), .D(req_resp_state_Z[2]), .Y(un1_req_resp_state_1_i) ); defparam un1_req_resp_state_1.INIT=16'h030E; // @46:19412 CFG2 \lsu_expipe_resp_rd_data_0_a2_3[4] ( .A(cpu_d_resp_rd_data_net[12]), .B(req_resp_addr_align_Z[1]), .Y(N_111) ); defparam \lsu_expipe_resp_rd_data_0_a2_3[4] .INIT=4'h2; // @46:19089 CFG2 \lsu_emi_req_wr_byte_en_1[1] ( .A(lsu_emi_req_valid48_Z), .B(un5_lsu_emi_req_rd_byte_en_1z), .Y(N_145) ); defparam \lsu_emi_req_wr_byte_en_1[1] .INIT=4'h8; // @46:19412 CFG3 \lsu_expipe_resp_rd_data_0_o3[2] ( .A(N_94_1), .B(req_resp_addr_align_Z[1]), .C(N_93), .Y(N_245) ); defparam \lsu_expipe_resp_rd_data_0_o3[2] .INIT=8'hF8; // @46:19412 CFG3 \lsu_expipe_resp_rd_data_0_o3[11] ( .A(req_resp_addr_align_Z[1]), .B(N_112), .C(N_93), .Y(N_247) ); defparam \lsu_expipe_resp_rd_data_0_o3[11] .INIT=8'hF8; // @46:19412 CFG3 \lsu_expipe_resp_rd_data_0_m3[2] ( .A(cpu_d_resp_rd_data_net[26]), .B(req_resp_addr_align_Z[1]), .C(cpu_d_resp_rd_data_net[10]), .Y(N_254) ); defparam \lsu_expipe_resp_rd_data_0_m3[2] .INIT=8'hB8; // @46:19412 CFG3 \un1_lsu_emi_resp_rd_data[5] ( .A(cpu_d_resp_rd_data_net[21]), .B(req_resp_addr_align_Z[1]), .C(cpu_d_resp_rd_data_net[5]), .Y(un1_lsu_emi_resp_rd_data_Z[5]) ); defparam \un1_lsu_emi_resp_rd_data[5] .INIT=8'hB8; // @46:19412 CFG3 \un1_lsu_emi_resp_rd_data[13] ( .A(cpu_d_resp_rd_data_net[29]), .B(req_resp_addr_align_Z[1]), .C(cpu_d_resp_rd_data_net[13]), .Y(un1_lsu_emi_resp_rd_data_Z[13]) ); defparam \un1_lsu_emi_resp_rd_data[13] .INIT=8'hB8; // @46:19412 CFG3 \un1_lsu_emi_resp_rd_data[14] ( .A(cpu_d_resp_rd_data_net[30]), .B(req_resp_addr_align_Z[1]), .C(cpu_d_resp_rd_data_net[14]), .Y(un1_lsu_emi_resp_rd_data_Z[14]) ); defparam \un1_lsu_emi_resp_rd_data[14] .INIT=8'hB8; // @46:19412 CFG3 \un1_lsu_emi_resp_rd_data[15] ( .A(cpu_d_resp_rd_data_net[31]), .B(req_resp_addr_align_Z[1]), .C(cpu_d_resp_rd_data_net[15]), .Y(un1_lsu_emi_resp_rd_data_Z[15]) ); defparam \un1_lsu_emi_resp_rd_data[15] .INIT=8'hB8; // @46:19412 CFG4 \lsu_expipe_resp_rd_data_0_o3_2[4] ( .A(req_resp_addr_align_Z[1]), .B(req_resp_addr_align_Z[0]), .C(N_246), .D(lsu_resp_valid32_Z), .Y(N_252) ); defparam \lsu_expipe_resp_rd_data_0_o3_2[4] .INIT=16'hF1F0; // @46:19412 CFG3 lsu_expipe_resp_rd_data_3 ( .A(lsu_resp_valid34_Z), .B(lsu_expipe_resp_rd_data_sn_N_6), .C(cpu_d_resp_rd_data_net[15]), .Y(lsu_expipe_resp_rd_data_3_Z) ); defparam lsu_expipe_resp_rd_data_3.INIT=8'h10; // @46:19412 CFG4 lsu_expipe_resp_str_amo_addr_misalign ( .A(un2_req_resp_str_req_buff_addr_misalign_0), .B(req_resp_state_valid_1z), .C(un1_lsu_resp_valid38_0_Z), .D(lsu_resp_valid40_1z), .Y(lsu_expipe_resp_str_amo_addr_misalign_net) ); defparam lsu_expipe_resp_str_amo_addr_misalign.INIT=16'h8880; // @46:19412 CFG3 \lsu_expipe_resp_rd_data_0_o3_0[4] ( .A(req_resp_addr_align_Z[0]), .B(N_105), .C(N_104), .Y(N_250) ); defparam \lsu_expipe_resp_rd_data_0_o3_0[4] .INIT=8'hF8; // @46:19412 CFG3 \lsu_expipe_resp_rd_data_0_a3_2[1] ( .A(N_105), .B(N_319), .C(N_242), .Y(N_87) ); defparam \lsu_expipe_resp_rd_data_0_a3_2[1] .INIT=8'h80; // @46:19412 CFG3 \lsu_expipe_resp_rd_data_0_a3_2[2] ( .A(N_105), .B(N_320), .C(N_242), .Y(N_83) ); defparam \lsu_expipe_resp_rd_data_0_a3_2[2] .INIT=8'h80; // @46:19412 CFG3 \lsu_expipe_resp_rd_data_1_a2[27] ( .A(lsu_resp_valid34_Z), .B(lsu_expipe_resp_rd_data_sn_N_6), .C(cpu_d_resp_rd_data_net[15]), .Y(N_91) ); defparam \lsu_expipe_resp_rd_data_1_a2[27] .INIT=8'h10; // @46:19412 CFG4 \lsu_expipe_resp_rd_data_0_o3_1[4] ( .A(lsu_resp_valid32_Z), .B(lsu_expipe_resp_rd_data_0_a2_0_0_Z[4]), .C(N_245), .D(lsu_expipe_resp_rd_data_sn_N_6), .Y(N_251) ); defparam \lsu_expipe_resp_rd_data_0_o3_1[4] .INIT=16'hF8F0; // @46:19412 CFG3 \lsu_expipe_resp_rd_data_0_m3[1] ( .A(cpu_d_resp_rd_data_net[25]), .B(req_resp_addr_align_Z[1]), .C(cpu_d_resp_rd_data_net[9]), .Y(N_253) ); defparam \lsu_expipe_resp_rd_data_0_m3[1] .INIT=8'hB8; // @46:19412 CFG3 \un1_lsu_emi_resp_rd_data[8] ( .A(cpu_d_resp_rd_data_net[24]), .B(req_resp_addr_align_Z[1]), .C(cpu_d_resp_rd_data_net[8]), .Y(un1_lsu_emi_resp_rd_data_Z[8]) ); defparam \un1_lsu_emi_resp_rd_data[8] .INIT=8'hB8; // @46:19412 CFG2 \lsu_expipe_resp_rd_data_1[14] ( .A(un1_lsu_emi_resp_rd_data_Z[14]), .B(lsu_resp_valid36_Z), .Y(N_194) ); defparam \lsu_expipe_resp_rd_data_1[14] .INIT=4'h8; // @46:19089 CFG4 alloc_str_req_buff_addr_misalign_u ( .A(lsu_emi_req_valid47_1z), .B(lsu_emi_req_valid48_Z), .C(bcu_result_cry_0_Y), .D(un5_lsu_emi_req_rd_byte_en_1z), .Y(alloc_str_req_buff_addr_misalign) ); defparam alloc_str_req_buff_addr_misalign_u.INIT=16'h20EC; // @46:19412 CFG3 \un1_lsu_emi_resp_rd_data[7] ( .A(cpu_d_resp_rd_data_net[23]), .B(req_resp_addr_align_Z[1]), .C(cpu_d_resp_rd_data_net[7]), .Y(un1_lsu_emi_resp_rd_data_Z[7]) ); defparam \un1_lsu_emi_resp_rd_data[7] .INIT=8'hB8; // @46:19412 CFG2 \lsu_expipe_resp_rd_data_3_1[5] ( .A(cpu_d_resp_rd_data_net[5]), .B(lsu_expipe_resp_rd_data_sn_N_6), .Y(N_237_1) ); defparam \lsu_expipe_resp_rd_data_3_1[5] .INIT=4'h2; // @46:19412 CFG4 \lsu_expipe_resp_rd_data_0_0[10] ( .A(N_247), .B(N_248), .C(cpu_d_resp_rd_data_net[26]), .D(cpu_d_resp_rd_data_net[10]), .Y(lsu_expipe_resp_rd_data_0_0_Z[10]) ); defparam \lsu_expipe_resp_rd_data_0_0[10] .INIT=16'hECA0; // @46:19412 CFG4 \lsu_expipe_resp_rd_data_0_0[9] ( .A(N_247), .B(N_248), .C(cpu_d_resp_rd_data_net[25]), .D(cpu_d_resp_rd_data_net[9]), .Y(lsu_expipe_resp_rd_data_0_0_Z[9]) ); defparam \lsu_expipe_resp_rd_data_0_0[9] .INIT=16'hECA0; // @46:19412 CFG4 \lsu_expipe_resp_rd_data_0_0[11] ( .A(N_247), .B(N_248), .C(cpu_d_resp_rd_data_net[27]), .D(cpu_d_resp_rd_data_net[11]), .Y(lsu_expipe_resp_rd_data_0_0_Z[11]) ); defparam \lsu_expipe_resp_rd_data_0_0[11] .INIT=16'hECA0; // @48:797 CFG4 lsu_emi_req_valid48_RNI3O089 ( .A(cpu_d_req_addr_net_0), .B(bcu_result_cry_0_Y), .C(alloc_ld_req_buff_addr_misalign), .D(lsu_emi_req_valid48_Z), .Y(lsu_emi_req_rd_byte_en_2_0) ); defparam lsu_emi_req_valid48_RNI3O089.INIT=16'h0002; // @46:19412 CFG4 \lsu_expipe_resp_rd_data_0_o3[4] ( .A(req_resp_addr_align_Z[0]), .B(lsu_resp_valid33_Z), .C(N_105), .D(N_104), .Y(N_249) ); defparam \lsu_expipe_resp_rd_data_0_o3[4] .INIT=16'hFF20; // @46:19412 CFG4 \lsu_expipe_resp_rd_data_0_0[15] ( .A(cpu_d_resp_rd_data_net[15]), .B(un1_lsu_emi_resp_rd_data_Z[15]), .C(N_112), .D(lsu_expipe_resp_rd_data_sn_N_6), .Y(lsu_expipe_resp_rd_data_0_0_Z[15]) ); defparam \lsu_expipe_resp_rd_data_0_0[15] .INIT=16'hC0EA; // @46:19260 CFG2 alloc_exception ( .A(alloc_ld_req_buff_addr_misalign), .B(alloc_str_req_buff_addr_misalign), .Y(alloc_exception_1z) ); defparam alloc_exception.INIT=4'hE; // @46:19412 CFG3 \un1_lsu_emi_resp_rd_data[0] ( .A(cpu_d_resp_rd_data_net[16]), .B(req_resp_addr_align_Z[1]), .C(cpu_d_resp_rd_data_net[0]), .Y(un1_lsu_emi_resp_rd_data_Z[0]) ); defparam \un1_lsu_emi_resp_rd_data[0] .INIT=8'hB8; // @46:19412 CFG2 \lsu_expipe_resp_rd_data_1[8] ( .A(un1_lsu_emi_resp_rd_data_Z[8]), .B(lsu_resp_valid36_Z), .Y(N_188) ); defparam \lsu_expipe_resp_rd_data_1[8] .INIT=4'h8; // @46:19412 CFG2 \lsu_expipe_resp_rd_data_3_1[6] ( .A(cpu_d_resp_rd_data_net[6]), .B(lsu_expipe_resp_rd_data_sn_N_6), .Y(N_238_1) ); defparam \lsu_expipe_resp_rd_data_3_1[6] .INIT=4'h2; // @46:19089 CFG2 \lsu_emi_req_wr_byte_en_1[3] ( .A(un1_lsu_emi_req_valid46_1_1z), .B(N_145), .Y(cpu_d_req_wr_byte_en_net_1_0) ); defparam \lsu_emi_req_wr_byte_en_1[3] .INIT=4'h4; // @46:19412 CFG4 \lsu_expipe_resp_rd_data_0_0[3] ( .A(cpu_d_resp_rd_data_net[3]), .B(lsu_expipe_resp_rd_data_0_a3_1_0_Z[3]), .C(N_250), .D(N_252), .Y(lsu_expipe_resp_rd_data_0_0_Z[3]) ); defparam \lsu_expipe_resp_rd_data_0_0[3] .INIT=16'hEAC0; // @46:19412 CFG4 \lsu_expipe_resp_rd_data_0_0[4] ( .A(N_250), .B(N_252), .C(cpu_d_resp_rd_data_net[4]), .D(N_111), .Y(lsu_expipe_resp_rd_data_0_0_Z[4]) ); defparam \lsu_expipe_resp_rd_data_0_0[4] .INIT=16'hEAC0; // @46:19412 CFG4 \lsu_expipe_resp_rd_data_0_0[2] ( .A(cpu_d_resp_rd_data_net[2]), .B(N_254), .C(N_104), .D(N_246), .Y(lsu_expipe_resp_rd_data_0_0_Z[2]) ); defparam \lsu_expipe_resp_rd_data_0_0[2] .INIT=16'hEAC0; // @46:19412 CFG3 \lsu_expipe_resp_rd_data_0_a3_2[3] ( .A(req_resp_addr_align_Z[1]), .B(N_249), .C(cpu_d_resp_rd_data_net[27]), .Y(N_282) ); defparam \lsu_expipe_resp_rd_data_0_a3_2[3] .INIT=8'h80; // @46:19412 CFG4 lsu_expipe_resp_access_mem_error ( .A(trace_priv_i), .B(req_resp_state_valid_1z), .C(un1_req_resp_state_1_i), .D(cpu_d_resp_error_sig), .Y(lsu_expipe_resp_access_mem_error_net) ); defparam lsu_expipe_resp_access_mem_error.INIT=16'h4000; // @46:19412 CFG4 \un1_lsu_expipe_resp_access_aborted[5] ( .A(lsu_resp_valid32_Z), .B(req_resp_addr_align_Z[0]), .C(un1_lsu_emi_resp_rd_data_Z[13]), .D(un1_lsu_emi_resp_rd_data_Z[5]), .Y(N_333) ); defparam \un1_lsu_expipe_resp_access_aborted[5] .INIT=16'hA280; // @46:19412 CFG3 \un1_lsu_emi_resp_rd_data_1_3[7] ( .A(req_resp_addr_align_Z[0]), .B(un1_lsu_emi_resp_rd_data_Z[7]), .C(un1_lsu_emi_resp_rd_data_Z[15]), .Y(un1_lsu_emi_resp_rd_data_1[7]) ); defparam \un1_lsu_emi_resp_rd_data_1_3[7] .INIT=8'hE4; // @46:19412 CFG4 \lsu_expipe_resp_rd_data_0_0[1] ( .A(cpu_d_resp_rd_data_net[1]), .B(N_253), .C(N_104), .D(N_246), .Y(lsu_expipe_resp_rd_data_0_0_Z[1]) ); defparam \lsu_expipe_resp_rd_data_0_0[1] .INIT=16'hEAC0; // @46:19106 CFG4 \lsu_emi_req_rd_byte_en_2[1] ( .A(cpu_d_req_addr_net_0), .B(bcu_result_cry_0_Y), .C(alloc_ld_req_buff_addr_misalign), .D(alloc_str_req_buff_addr_misalign), .Y(lsu_emi_req_rd_byte_en_2_Z[1]) ); defparam \lsu_emi_req_rd_byte_en_2[1] .INIT=16'h0004; // @46:19412 CFG4 \lsu_expipe_resp_rd_data_1[5] ( .A(lsu_resp_valid36_Z), .B(req_resp_addr_align_Z[0]), .C(un1_lsu_emi_resp_rd_data_Z[13]), .D(un1_lsu_emi_resp_rd_data_Z[5]), .Y(N_185) ); defparam \lsu_expipe_resp_rd_data_1[5] .INIT=16'hFB40; // @46:19123 CFG3 \lsu_emi_req_rd_byte_en_3[2] ( .A(alloc_ld_req_buff_addr_misalign), .B(cpu_d_req_addr_net_0), .C(alloc_str_req_buff_addr_misalign), .Y(lsu_emi_req_rd_byte_en_3_Z[2]) ); defparam \lsu_emi_req_rd_byte_en_3[2] .INIT=8'h04; // @46:19123 CFG3 \lsu_emi_req_rd_byte_en_3[1] ( .A(alloc_ld_req_buff_addr_misalign), .B(cpu_d_req_addr_net_0), .C(alloc_str_req_buff_addr_misalign), .Y(lsu_emi_req_rd_byte_en_3_Z[1]) ); defparam \lsu_emi_req_rd_byte_en_3[1] .INIT=8'h01; // @46:19412 CFG2 \lsu_expipe_resp_rd_data_3_1[0] ( .A(cpu_d_resp_rd_data_net[0]), .B(lsu_expipe_resp_rd_data_sn_N_6), .Y(N_232_1) ); defparam \lsu_expipe_resp_rd_data_3_1[0] .INIT=4'h2; // @46:19089 CFG4 \lsu_emi_req_rd_byte_en_iv_0[2] ( .A(un5_lsu_emi_req_rd_byte_en_1z), .B(lsu_emi_req_valid43_Z), .C(un1_lsu_expipe_req_op_4_1z), .D(lsu_emi_req_rd_byte_en_2_0), .Y(lsu_emi_req_rd_byte_en_iv_0_0) ); defparam \lsu_emi_req_rd_byte_en_iv_0[2] .INIT=16'hF888; // @46:19412 CFG4 \un1_lsu_expipe_resp_access_aborted[6] ( .A(lsu_resp_valid32_Z), .B(req_resp_addr_align_Z[0]), .C(un1_lsu_emi_resp_rd_data_Z[14]), .D(un1_lsu_emi_resp_rd_data_Z[6]), .Y(N_334) ); defparam \un1_lsu_expipe_resp_access_aborted[6] .INIT=16'hA280; // @46:19412 CFG4 \lsu_expipe_resp_rd_data_1[6] ( .A(lsu_resp_valid36_Z), .B(req_resp_addr_align_Z[0]), .C(un1_lsu_emi_resp_rd_data_Z[14]), .D(un1_lsu_emi_resp_rd_data_Z[6]), .Y(N_186) ); defparam \lsu_expipe_resp_rd_data_1[6] .INIT=16'hFB40; // @46:19089 CFG4 \lsu_emi_req_rd_byte_en_3_m[2] ( .A(alloc_str_req_buff_addr_misalign), .B(alloc_ld_req_buff_addr_misalign), .C(cpu_d_req_addr_net_0), .D(un1_lsu_expipe_req_op_2_i), .Y(lsu_emi_req_rd_byte_en_3_m_0) ); defparam \lsu_emi_req_rd_byte_en_3_m[2] .INIT=16'h1000; // @46:19430 CFG4 dealloc_resp_buff_10 ( .A(un11_lsu_resp_ready_d), .B(un11_lsu_resp_ready_1_1), .C(un1_lsu_resp_valid), .D(lsu_expipe_resp_valid_0_1z), .Y(dealloc_resp_buff_10_1z) ); defparam dealloc_resp_buff_10.INIT=16'hE000; // @46:19412 CFG3 \lsu_expipe_resp_rd_data_1[7] ( .A(lsu_resp_valid36_Z), .B(un1_lsu_emi_resp_rd_data_Z[7]), .C(un1_lsu_emi_resp_rd_data_1[7]), .Y(N_187) ); defparam \lsu_expipe_resp_rd_data_1[7] .INIT=8'hD8; // @46:19412 CFG4 \lsu_expipe_resp_rd_data_0[3] ( .A(N_251), .B(lsu_expipe_resp_rd_data_0_0_Z[3]), .C(cpu_d_resp_rd_data_net[19]), .D(N_282), .Y(lsu_expipe_resp_rd_data_net[3]) ); defparam \lsu_expipe_resp_rd_data_0[3] .INIT=16'hFFEC; // @46:19412 CFG4 \lsu_expipe_resp_rd_data_0[2] ( .A(N_245), .B(cpu_d_resp_rd_data_net[18]), .C(lsu_expipe_resp_rd_data_0_0_Z[2]), .D(N_83), .Y(lsu_expipe_resp_rd_data_net[2]) ); defparam \lsu_expipe_resp_rd_data_0[2] .INIT=16'hFFF8; // @46:19412 CFG4 \lsu_expipe_resp_rd_data_0[11] ( .A(N_105), .B(N_242), .C(un1_lsu_emi_resp_rd_data_1[7]), .D(lsu_expipe_resp_rd_data_0_0_Z[11]), .Y(lsu_expipe_resp_rd_data_net[11]) ); defparam \lsu_expipe_resp_rd_data_0[11] .INIT=16'hFF80; // @46:19412 CFG4 \lsu_expipe_resp_rd_data_0[10] ( .A(N_105), .B(N_242), .C(un1_lsu_emi_resp_rd_data_1[7]), .D(lsu_expipe_resp_rd_data_0_0_Z[10]), .Y(lsu_expipe_resp_rd_data_net[10]) ); defparam \lsu_expipe_resp_rd_data_0[10] .INIT=16'hFF80; // @46:19412 CFG4 \lsu_expipe_resp_rd_data_0[9] ( .A(N_105), .B(N_242), .C(un1_lsu_emi_resp_rd_data_1[7]), .D(lsu_expipe_resp_rd_data_0_0_Z[9]), .Y(lsu_expipe_resp_rd_data_net[9]) ); defparam \lsu_expipe_resp_rd_data_0[9] .INIT=16'hFF80; // @46:19412 CFG4 \lsu_expipe_resp_rd_data_0[4] ( .A(N_251), .B(lsu_expipe_resp_rd_data_0_0_Z[4]), .C(cpu_d_resp_rd_data_net[20]), .D(N_278), .Y(lsu_expipe_resp_rd_data_net[4]) ); defparam \lsu_expipe_resp_rd_data_0[4] .INIT=16'hFFEC; // @46:19412 CFG4 \lsu_expipe_resp_rd_data_2_0[13] ( .A(cpu_d_resp_rd_data_net[29]), .B(un1_lsu_emi_resp_rd_data_1[7]), .C(lsu_resp_valid32_Z), .D(N_242), .Y(N_211) ); defparam \lsu_expipe_resp_rd_data_2_0[13] .INIT=16'hC0AA; // @46:19412 CFG4 \un1_lsu_expipe_resp_access_aborted[0] ( .A(lsu_resp_valid32_Z), .B(req_resp_addr_align_Z[0]), .C(un1_lsu_emi_resp_rd_data_Z[8]), .D(un1_lsu_emi_resp_rd_data_Z[0]), .Y(N_328) ); defparam \un1_lsu_expipe_resp_access_aborted[0] .INIT=16'hA280; // @46:19412 CFG4 \lsu_expipe_resp_rd_data_2_0_o3[15] ( .A(cpu_d_resp_rd_data_net[31]), .B(un1_lsu_emi_resp_rd_data_1[7]), .C(lsu_resp_valid32_Z), .D(N_242), .Y(N_213) ); defparam \lsu_expipe_resp_rd_data_2_0_o3[15] .INIT=16'hC0AA; // @46:19412 CFG4 \lsu_expipe_resp_rd_data_0[1] ( .A(N_245), .B(cpu_d_resp_rd_data_net[17]), .C(lsu_expipe_resp_rd_data_0_0_Z[1]), .D(N_87), .Y(lsu_expipe_resp_rd_data_net[1]) ); defparam \lsu_expipe_resp_rd_data_0[1] .INIT=16'hFFF8; // @46:19412 CFG4 \lsu_expipe_resp_rd_data_1[0] ( .A(lsu_resp_valid36_Z), .B(req_resp_addr_align_Z[0]), .C(un1_lsu_emi_resp_rd_data_Z[8]), .D(un1_lsu_emi_resp_rd_data_Z[0]), .Y(N_180) ); defparam \lsu_expipe_resp_rd_data_1[0] .INIT=16'hFB40; // @46:19089 CFG4 \lsu_emi_req_rd_byte_en_iv_1[1] ( .A(un1_lsu_expipe_req_op_4_1z), .B(un1_lsu_expipe_req_op_2_i), .C(lsu_emi_req_rd_byte_en_2_Z[1]), .D(alloc_exception_1z), .Y(cpu_d_req_rd_byte_en_net_1_0) ); defparam \lsu_emi_req_rd_byte_en_iv_1[1] .INIT=16'hA0EC; // @46:19412 CFG4 lsu_expipe_resp_rd_data_3_10 ( .A(N_242), .B(lsu_resp_valid32_Z), .C(un1_lsu_emi_resp_rd_data_1[7]), .D(lsu_expipe_resp_rd_data_sn_N_6), .Y(lsu_expipe_resp_rd_data_3_10_Z) ); defparam lsu_expipe_resp_rd_data_3_10.INIT=16'h8000; // @46:19412 CFG4 \lsu_expipe_resp_rd_data_3_2[5] ( .A(N_242), .B(lsu_expipe_resp_rd_data_sn_N_6), .C(cpu_d_resp_rd_data_net[21]), .D(N_333), .Y(N_237_2) ); defparam \lsu_expipe_resp_rd_data_3_2[5] .INIT=16'hC840; // @46:19412 CFG4 dealloc_resp_buff_0 ( .A(un1_lsu_resp_valid), .B(dealloc_resp_buff_10_1z), .C(dealloc_resp_buff_11_0_Z), .D(lsu_resp_valid41_Z), .Y(N_156) ); defparam dealloc_resp_buff_0.INIT=16'hA0CC; // @46:19089 CFG4 \lsu_emi_req_wr_byte_en_2[3] ( .A(un24_lsu_emi_req_rd_byte_en_1z), .B(lsu_emi_req_valid47_1z), .C(un1_lsu_emi_req_valid46_1_1z), .D(lsu_emi_req_rd_byte_en_3_Z[2]), .Y(cpu_d_req_wr_byte_en_net_2_2) ); defparam \lsu_emi_req_wr_byte_en_2[3] .INIT=16'hE020; // @46:19089 CFG4 \lsu_emi_req_wr_byte_en_2[1] ( .A(un1_lsu_emi_req_valid46_1_1z), .B(lsu_emi_req_valid47_1z), .C(lsu_emi_req_rd_byte_en_2_Z[1]), .D(lsu_emi_req_rd_byte_en_3_Z[1]), .Y(cpu_d_req_wr_byte_en_net_2_0) ); defparam \lsu_emi_req_wr_byte_en_2[1] .INIT=16'hA820; // @46:19412 CFG4 \lsu_expipe_resp_rd_data_3_2[6] ( .A(N_242), .B(lsu_expipe_resp_rd_data_sn_N_6), .C(cpu_d_resp_rd_data_net[22]), .D(N_334), .Y(N_238_2) ); defparam \lsu_expipe_resp_rd_data_3_2[6] .INIT=16'hC840; // @46:19412 CFG4 \lsu_expipe_resp_rd_data_3_2[7] ( .A(N_242), .B(lsu_expipe_resp_rd_data_sn_N_6), .C(cpu_d_resp_rd_data_net[23]), .D(lsu_expipe_resp_rd_data_3_10_Z), .Y(N_239_2) ); defparam \lsu_expipe_resp_rd_data_3_2[7] .INIT=16'hFF40; // @46:19412 CFG4 \lsu_expipe_resp_rd_data_3_2[12] ( .A(N_242), .B(lsu_expipe_resp_rd_data_sn_N_6), .C(cpu_d_resp_rd_data_net[28]), .D(lsu_expipe_resp_rd_data_3_10_Z), .Y(N_244_2) ); defparam \lsu_expipe_resp_rd_data_3_2[12] .INIT=16'hFF40; // @46:19412 CFG4 \lsu_expipe_resp_rd_data_3_2[14] ( .A(N_242), .B(lsu_expipe_resp_rd_data_sn_N_6), .C(cpu_d_resp_rd_data_net[30]), .D(lsu_expipe_resp_rd_data_3_10_Z), .Y(N_246_2) ); defparam \lsu_expipe_resp_rd_data_3_2[14] .INIT=16'hFF40; // @46:19412 CFG4 \lsu_expipe_resp_rd_data_3_2[8] ( .A(N_242), .B(lsu_expipe_resp_rd_data_sn_N_6), .C(cpu_d_resp_rd_data_net[24]), .D(lsu_expipe_resp_rd_data_3_10_Z), .Y(N_240_2) ); defparam \lsu_expipe_resp_rd_data_3_2[8] .INIT=16'hFF40; // @46:19412 CFG4 \lsu_expipe_resp_rd_data_0[15] ( .A(lsu_expipe_resp_rd_data_sn_N_9_mux), .B(lsu_expipe_resp_rd_data_sn_N_6), .C(N_213), .D(lsu_expipe_resp_rd_data_0_0_Z[15]), .Y(lsu_expipe_resp_rd_data_net[15]) ); defparam \lsu_expipe_resp_rd_data_0[15] .INIT=16'hFF40; // @46:19293 CFG2 \buff_rd_ptr_0[0] ( .A(N_156), .B(buff_rd_ptr_0), .Y(buff_rd_ptr_0_Z[0]) ); defparam \buff_rd_ptr_0[0] .INIT=4'h6; // @46:19412 CFG4 \lsu_expipe_resp_rd_data_1_0[13] ( .A(lsu_expipe_resp_rd_data_sn_N_6), .B(lsu_expipe_resp_rd_data_sn_N_9_mux), .C(cpu_d_resp_rd_data_net[13]), .D(N_211), .Y(lsu_expipe_resp_rd_data_net_1[13]) ); defparam \lsu_expipe_resp_rd_data_1_0[13] .INIT=16'h3210; // @46:19412 CFG3 \lsu_expipe_resp_rd_data_3[7] ( .A(N_239_2), .B(lsu_expipe_resp_rd_data_sn_N_6), .C(cpu_d_resp_rd_data_net[7]), .Y(N_239) ); defparam \lsu_expipe_resp_rd_data_3[7] .INIT=8'hBA; // @46:19412 CFG3 \lsu_expipe_resp_rd_data_3[12] ( .A(N_244_2), .B(lsu_expipe_resp_rd_data_sn_N_6), .C(cpu_d_resp_rd_data_net[12]), .Y(N_244) ); defparam \lsu_expipe_resp_rd_data_3[12] .INIT=8'hBA; // @46:19412 CFG3 \lsu_expipe_resp_rd_data_3[14] ( .A(N_246_2), .B(lsu_expipe_resp_rd_data_sn_N_6), .C(cpu_d_resp_rd_data_net[14]), .Y(N_246_0) ); defparam \lsu_expipe_resp_rd_data_3[14] .INIT=8'hBA; // @46:19412 CFG4 \lsu_expipe_resp_rd_data_3_2[0] ( .A(N_242), .B(lsu_expipe_resp_rd_data_sn_N_6), .C(cpu_d_resp_rd_data_net[16]), .D(N_328), .Y(N_232_2) ); defparam \lsu_expipe_resp_rd_data_3_2[0] .INIT=16'hC840; // @46:19412 CFG3 \lsu_expipe_resp_rd_data_3[8] ( .A(N_240_2), .B(lsu_expipe_resp_rd_data_sn_N_6), .C(cpu_d_resp_rd_data_net[8]), .Y(N_240) ); defparam \lsu_expipe_resp_rd_data_3[8] .INIT=8'hBA; // @46:19412 CFG2 \lsu_expipe_resp_rd_data_3_2[16] ( .A(N_213), .B(lsu_expipe_resp_rd_data_sn_N_6), .Y(N_248_2) ); defparam \lsu_expipe_resp_rd_data_3_2[16] .INIT=4'h8; // @46:19412 CFG4 \lsu_expipe_resp_rd_data_1_a3[27] ( .A(lsu_expipe_resp_rd_data_sn_N_6), .B(lsu_expipe_resp_rd_data_sn_N_9_mux), .C(N_91), .D(N_213), .Y(N_256) ); defparam \lsu_expipe_resp_rd_data_1_a3[27] .INIT=16'h3230; // @46:19412 CFG4 \lsu_expipe_resp_rd_data[5] ( .A(N_237_1), .B(lsu_expipe_resp_rd_data_sn_N_9_mux), .C(N_237_2), .D(N_185), .Y(lsu_expipe_resp_rd_data_net[5]) ); defparam \lsu_expipe_resp_rd_data[5] .INIT=16'hFE32; // @46:19412 CFG3 \lsu_expipe_resp_rd_data_1[17] ( .A(N_256), .B(lsu_resp_valid34_Z), .C(cpu_d_resp_rd_data_net[17]), .Y(lsu_expipe_resp_rd_data_net[17]) ); defparam \lsu_expipe_resp_rd_data_1[17] .INIT=8'hEA; // @46:19412 CFG3 \lsu_expipe_resp_rd_data_1[19] ( .A(N_256), .B(lsu_resp_valid34_Z), .C(cpu_d_resp_rd_data_net[19]), .Y(lsu_expipe_resp_rd_data_net[19]) ); defparam \lsu_expipe_resp_rd_data_1[19] .INIT=8'hEA; // @46:19412 CFG3 \lsu_expipe_resp_rd_data_1[20] ( .A(N_256), .B(lsu_resp_valid34_Z), .C(cpu_d_resp_rd_data_net[20]), .Y(lsu_expipe_resp_rd_data_net[20]) ); defparam \lsu_expipe_resp_rd_data_1[20] .INIT=8'hEA; // @46:19412 CFG3 \lsu_expipe_resp_rd_data_1[21] ( .A(N_256), .B(lsu_resp_valid34_Z), .C(cpu_d_resp_rd_data_net[21]), .Y(lsu_expipe_resp_rd_data_net[21]) ); defparam \lsu_expipe_resp_rd_data_1[21] .INIT=8'hEA; // @46:19412 CFG3 \lsu_expipe_resp_rd_data_1[24] ( .A(N_256), .B(lsu_resp_valid34_Z), .C(cpu_d_resp_rd_data_net[24]), .Y(lsu_expipe_resp_rd_data_net[24]) ); defparam \lsu_expipe_resp_rd_data_1[24] .INIT=8'hEA; // @46:19412 CFG3 \lsu_expipe_resp_rd_data_1[26] ( .A(N_256), .B(lsu_resp_valid34_Z), .C(cpu_d_resp_rd_data_net[26]), .Y(lsu_expipe_resp_rd_data_net[26]) ); defparam \lsu_expipe_resp_rd_data_1[26] .INIT=8'hEA; // @46:19412 CFG3 \lsu_expipe_resp_rd_data_1[25] ( .A(N_256), .B(lsu_resp_valid34_Z), .C(cpu_d_resp_rd_data_net[25]), .Y(lsu_expipe_resp_rd_data_net[25]) ); defparam \lsu_expipe_resp_rd_data_1[25] .INIT=8'hEA; // @46:19412 CFG3 \lsu_expipe_resp_rd_data_1[27] ( .A(N_256), .B(lsu_resp_valid34_Z), .C(cpu_d_resp_rd_data_net[27]), .Y(lsu_expipe_resp_rd_data_net[27]) ); defparam \lsu_expipe_resp_rd_data_1[27] .INIT=8'hEA; // @46:19412 CFG4 \lsu_expipe_resp_rd_data[6] ( .A(N_238_1), .B(lsu_expipe_resp_rd_data_sn_N_9_mux), .C(N_238_2), .D(N_186), .Y(lsu_expipe_resp_rd_data_net[6]) ); defparam \lsu_expipe_resp_rd_data[6] .INIT=16'hFE32; // @46:19412 CFG3 \lsu_expipe_resp_rd_data[7] ( .A(N_239), .B(lsu_expipe_resp_rd_data_sn_N_9_mux), .C(N_187), .Y(lsu_expipe_resp_rd_data_net[7]) ); defparam \lsu_expipe_resp_rd_data[7] .INIT=8'hE2; // @46:19412 CFG4 \lsu_expipe_resp_rd_data[16] ( .A(lsu_expipe_resp_rd_data_sn_N_9_mux), .B(lsu_expipe_resp_rd_data_3_Z), .C(lsu_expipe_resp_rd_data_3_56_Z), .D(N_248_2), .Y(lsu_expipe_resp_rd_data_net[16]) ); defparam \lsu_expipe_resp_rd_data[16] .INIT=16'h5554; // @46:19412 CFG4 \lsu_expipe_resp_rd_data[18] ( .A(lsu_expipe_resp_rd_data_sn_N_9_mux), .B(lsu_expipe_resp_rd_data_3_Z), .C(lsu_expipe_resp_rd_data_3_28_Z), .D(N_248_2), .Y(lsu_expipe_resp_rd_data_net[18]) ); defparam \lsu_expipe_resp_rd_data[18] .INIT=16'h5554; // @46:19412 CFG4 \lsu_expipe_resp_rd_data[28] ( .A(lsu_expipe_resp_rd_data_sn_N_9_mux), .B(lsu_expipe_resp_rd_data_3_Z), .C(lsu_expipe_resp_rd_data_3_24_Z), .D(N_248_2), .Y(lsu_expipe_resp_rd_data_net[28]) ); defparam \lsu_expipe_resp_rd_data[28] .INIT=16'h5554; // @46:19412 CFG4 \lsu_expipe_resp_rd_data[22] ( .A(lsu_expipe_resp_rd_data_sn_N_9_mux), .B(lsu_expipe_resp_rd_data_3_Z), .C(lsu_expipe_resp_rd_data_3_36_Z), .D(N_248_2), .Y(lsu_expipe_resp_rd_data_net[22]) ); defparam \lsu_expipe_resp_rd_data[22] .INIT=16'h5554; // @46:19412 CFG4 \lsu_expipe_resp_rd_data[23] ( .A(lsu_expipe_resp_rd_data_sn_N_9_mux), .B(lsu_expipe_resp_rd_data_3_Z), .C(lsu_expipe_resp_rd_data_3_32_Z), .D(N_248_2), .Y(lsu_expipe_resp_rd_data_net[23]) ); defparam \lsu_expipe_resp_rd_data[23] .INIT=16'h5554; // @46:19412 CFG4 \lsu_expipe_resp_rd_data[30] ( .A(lsu_expipe_resp_rd_data_sn_N_9_mux), .B(lsu_expipe_resp_rd_data_3_Z), .C(lsu_expipe_resp_rd_data_3_12_Z), .D(N_248_2), .Y(lsu_expipe_resp_rd_data_net[30]) ); defparam \lsu_expipe_resp_rd_data[30] .INIT=16'h5554; // @46:19412 CFG4 \lsu_expipe_resp_rd_data[29] ( .A(lsu_expipe_resp_rd_data_sn_N_9_mux), .B(lsu_expipe_resp_rd_data_3_Z), .C(lsu_expipe_resp_rd_data_3_48_Z), .D(N_248_2), .Y(lsu_expipe_resp_rd_data_net[29]) ); defparam \lsu_expipe_resp_rd_data[29] .INIT=16'h5554; // @46:19412 CFG4 \lsu_expipe_resp_rd_data[31] ( .A(lsu_expipe_resp_rd_data_sn_N_9_mux), .B(lsu_expipe_resp_rd_data_3_Z), .C(lsu_expipe_resp_rd_data_3_0_Z), .D(N_248_2), .Y(lsu_expipe_resp_rd_data_net[31]) ); defparam \lsu_expipe_resp_rd_data[31] .INIT=16'h5554; // @46:19412 CFG4 \lsu_expipe_resp_rd_data[0] ( .A(N_232_1), .B(lsu_expipe_resp_rd_data_sn_N_9_mux), .C(N_232_2), .D(N_180), .Y(lsu_expipe_resp_rd_data_net[0]) ); defparam \lsu_expipe_resp_rd_data[0] .INIT=16'hFE32; // @46:19105 CFG3 lsu_emi_req_valid_10 ( .A(alloc_req_buff_1_1_0_1z), .B(alloc_exception_1z), .C(lsu_expipe_req_valid_net), .Y(lsu_emi_req_valid_10_Z) ); defparam lsu_emi_req_valid_10.INIT=8'h20; // @46:19089 CFG2 alloc_req_buff_1_1 ( .A(lsu_expipe_req_valid_net), .B(alloc_req_buff_1_1_0_1z), .Y(alloc_req_buff_1_1_1z) ); defparam alloc_req_buff_1_1.INIT=4'h8; // @46:19089 CFG4 lsu_emi_req_valid ( .A(un1_lsu_emi_req_valid40_Z), .B(alloc_req_buff_1_1_0_1z), .C(lsu_expipe_req_valid_net), .D(alloc_exception_1z), .Y(cpu_d_req_valid_net) ); defparam lsu_emi_req_valid.INIT=16'h0040; // @46:19089 CFG4 alloc_req_buff_1 ( .A(lsu_emi_req_valid_10_Z), .B(alloc_req_buff_1_1_1z), .C(un1_lsu_emi_req_valid40_Z), .D(lsu_flush), .Y(alloc_req_buff_1_Z) ); defparam alloc_req_buff_1.INIT=16'h080C; // @46:19089 CFG4 alloc_req_buff ( .A(trace_priv_i), .B(alloc_exception_1z), .C(alloc_req_buff_1_Z), .D(cpu_d_req_ready_sig), .Y(alloc_req_buff_Z) ); defparam alloc_req_buff.INIT=16'hD0C0; // @46:19302 CFG2 \buff_wr_ptr_0[0] ( .A(alloc_req_buff_Z), .B(buff_wr_ptr_Z[0]), .Y(buff_wr_ptr_0_Z[0]) ); defparam \buff_wr_ptr_0[0] .INIT=4'h6; // @46:19320 CFG2 \buff_wr_strb[1] ( .A(alloc_req_buff_Z), .B(buff_wr_ptr_Z[0]), .Y(buff_wr_strb_Z[1]) ); defparam \buff_wr_strb[1] .INIT=4'h8; // @46:19320 CFG2 \buff_wr_strb[0] ( .A(alloc_req_buff_Z), .B(buff_wr_ptr_Z[0]), .Y(buff_wr_strb_Z[0]) ); defparam \buff_wr_strb[0] .INIT=4'h2; // @46:18933 CFG3 \gen_req_buff_loop[0].un1_lsu_flush ( .A(alloc_req_buff_Z), .B(buff_wr_ptr_Z[0]), .C(lsu_flush), .Y(un1_lsu_flush) ); defparam \gen_req_buff_loop[0].un1_lsu_flush .INIT=8'hF2; // @46:19365 CFG4 \gen_req_buff_loop[0].req_buff_resp_state_valid_3[0] ( .A(buff_rd_ptr_0), .B(req_buff_resp_state_valid[0]), .C(buff_wr_strb_Z[0]), .D(N_156), .Y(req_buff_resp_state_valid_3[0]) ); defparam \gen_req_buff_loop[0].req_buff_resp_state_valid_3[0] .INIT=16'hF8FC; // @46:19365 CFG4 \gen_req_buff_loop[1].req_buff_resp_state_valid_9[1] ( .A(buff_rd_ptr_0), .B(req_buff_resp_state_valid[1]), .C(buff_wr_strb_Z[1]), .D(N_156), .Y(req_buff_resp_state_valid_9[1]) ); defparam \gen_req_buff_loop[1].req_buff_resp_state_valid_9[1] .INIT=16'hF4FC; // @46:18933 CFG3 \gen_req_buff_loop[1].un1_lsu_flush ( .A(alloc_req_buff_Z), .B(buff_wr_ptr_Z[0]), .C(lsu_flush), .Y(un1_lsu_flush_0) ); defparam \gen_req_buff_loop[1].un1_lsu_flush .INIT=8'hF8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_lsu_32s_2s_1s_2s_2s */ module miv_rv32_idecode_1_1s_1s_0s ( un1_next_stage_state_ex_i_0, apb_i_req_addr_net_18, apb_i_req_addr_net_2, apb_i_req_addr_net_1, apb_i_req_addr_net_0, apb_i_req_addr_net_3, apb_i_req_addr_net_8, de_ex_pipe_operand0_mux_sel_ex_0, next_req_fetch_ptr_yy_0, next_req_fetch_ptr_xx_0, immediate_de, gpr_wr_sel_de, gpr_rs1_rd_sel_de, de_ex_pipe_gpr_rs2_rd_sel_ex_2, gpr_wr_data_retr, ex_retr_pipe_exu_result_retr, cpu_debug_csr_op_rd_data_net, lsu_expipe_resp_rd_data_net, un1_next_stage_state_retr_i_0, sw_csr_addr_de, ifu_expipe_resp_ireg_net, sw_csr_addr_de_1_0, bcu_operand0_mux_sel_1_iv_i_0, shifter_unit_places_sel_de, exu_result_mux_sel_de, operand1_mux_sel_de, lsu_op_de, gpr_wr_mux_sel_de, alu_op_sel_1_iv_0, rv32i_dec_shifter_unit_op_sel_m_0, branch_cond_iv_0_0, operand0_mux_sel_de_0, rv32c_dec_shifter_unit_op_sel_m_0, rv32c_dec_alu_op_sel_0_d0, ex_retr_pipe_curr_pc_retr_2, de_ex_pipe_curr_pc_ex, cpu_d_req_addr_net, shifter_unit_operand_sel_de_0, branch_cond_de_0, rv32c_dec_branch_cond_m_0, ex_retr_pipe_sw_csr_wr_op_retr_2, lsu_op_ex_pipe_reg, bcu_operand1_mux_sel_de, ex_retr_pipe_sw_csr_addr_retr, de_ex_pipe_trigger_ex, shifter_operand_sel, shifter_unit_places_sel_0, de_ex_pipe_shifter_unit_places_sel_ex_0, de_ex_pipe_alu_op_sel_ex, ex_retr_pipe_sw_csr_wr_op_retr, ex_retr_pipe_gpr_wr_mux_sel_retr_2_0, de_ex_pipe_gpr_wr_mux_sel_ex_0, ex_retr_pipe_gpr_wr_sel_retr, de_ex_pipe_gpr_rs2_rd_sel_ex, ex_retr_pipe_lsu_op_retr, ex_retr_pipe_gpr_wr_sel_retr_2, cpu_debug_gpr_op_addr_net, de_ex_pipe_gpr_wr_sel_ex, ex_retr_pipe_sw_csr_addr_retr_2, de_ex_pipe_sw_csr_addr_ex, cpu_debug_csr_op_addr_net, rv32m_dec_alu_op_sel_m_1_0, shifter_unit_op_sel, de_ex_pipe_shifter_unit_op_sel_ex, lsu_expipe_req_op_net, de_ex_pipe_lsu_op_ex, de_ex_pipe_sw_csr_wr_op_ex, rv32i_dec_alu_op_sel_m_0_0, rv32i_dec_alu_op_sel_m_0_2, rv32m_dec_alu_op_sel_m_0_0, req_buff_resp_state_1_, req_buff_resp_state_valid, req_buff_fence_os_0, rv32i_dec_shifter_unit_op_sel_0, de_ex_pipe_operand1_mux_sel_ex, rv32c_dec_alu_op_sel_0_0, un3_branch_cond_ex, req_masked, sw_csr_wr_op_de, ex_retr_pipe_gpr_wr_mux_sel_retr, un2_next_stage_state_de_1z, next_stage_state_de_1_sqmuxa_i, ifu_expipe_resp_ready_net, de_ex_pipe_gpr_rs1_rd_valid_ex6, de_ex_pipe_gpr_rs2_rd_valid_ex9, de_ex_pipe_gpr_rs3_rd_valid_ex9, de_ex_pipe_bcu_op_sel_ex7_1z, de_ex_pipe_alu_op_sel_ex7_0, un2_cpu_i_req_ready, de_ex_pipe_lsu_op_ex7_1z, cpu_i_req_is_tcm0_5, cpu_m1_e_1, un8_cpu_i_req_is_tcm0lt19_12, cpu_i_req_is_tcm0_4_2, gen_m3, ifu_expipe_req_branch_excpt_req_valid_net, exu_update_result_reg_1z, cmp_cond, exu_mux_result34, un5_N_4_0_i, lsu_op_completing_ex_a0_1z, ifu_expipe_req_branch_excpt_req_valid_1_0_0_1z, exu_result_valid_ex, alloc_exception, cpu_d_req_is_apb, alloc_req_buff_1_1, N_64, de_ex_pipe_gpr_rs1_rd_valid_ex_2, fence_de, lsu_align_result_valid_0, exu_shifter_places_valid, gpr_wr_en_de, N_26_i, N_1388_i, N_1387_i, iab_ready, N_764, lsu_req_addr_valid, de_ex_pipe_fence_ex, de_ex_pipe_bcu_op_sel_ex_2_1z, de_ex_pipe_gpr_rs2_rd_valid_ex_2, N_240, N_188, N_244, N_192, lsu_expipe_resp_rd_data_sn_N_9_mux, N_246, N_194, ifu_expipe_resp_access_mem_error_net, ifu_expipe_resp_access_misalign_error_i_1, gpr_wr_valid_retr, start_m1_e_1, de_ex_pipe_implicit_pseudo_instr_ex_2_1z, trigger_op_addr_valid_de_1z, force_debug_nop_de_1z, N_108_0, debug_enter_req_de, un1_rs2_rd_hzd_4, ex_retr_pipe_gpr_wr_en_retr10, interrupt_could_commit, i_trx_os_buff_ready, un1_instr_completing_retr_d_1z, interrupt_could_commit_0, un1_instr_completing_retr_c_1z, ex_retr_pipe_lsu_op_retr9_1z, un1_ex_retr_pipe_lsu_op_retr_i_0, ifu_expipe_req_branch_excpt_req_valid_1_0_1z, gpr_wr_valid_retr_2_0_0, ifu_expipe_req_fenci_proceed_net, dealloc_resp_buff_10, debug_mode_retire_mask_retr, gpr_rs2_rd_valid_dbgpipe, un1_lsu_resp_valid, lsu_expipe_resp_valid_0, de_ex_pipe_gpr_rs2_rd_valid_ex, sw_csr_rd_op_de, un1_instr_inhibit_ex_0_1z, de_ex_pipe_debug_enter_req_ex, de_ex_pipe_implicit_pseudo_instr_ex, lsu_op_complete_retr_0_0_0_1z, lsu_flush_net_i, gpr_wr_valid_retr_0, stage_state_de, lsu_flush_1z, N_14072_i, lsu_resp_valid40, un1_lsu_resp_valid38_1_i, req_resp_state_valid, exu_op_abort_ex_1z, un2_exception_taken, un11_gpr_rs1_stall_exu, un7_gpr_rs1_stall_exu_NE, rv32m_dec_mnemonic847, wfi_waiting_reg, set_wfi_waiting, ex_retr_pipe_sw_csr_wr_op_retr18, sw_csr_op_ready_retr, gpr_wr_completing_retr_3_0_d_1z, un8_cpu_i_req_is_tcm0lt18, exu_op_abort_ex_1_1z, un11_gpr_rs2_stall_exu, un5_instr_inhibit_ex_0_1z, un1_ex_retr_pipe_curr_pc_retr, dbreak_de, formal_trace_reset_taken, gpr_wr_valid_retr_1_1_1z, N_40, fence_i_de, ex_retr_pipe_sw_csr_rd_op_retr, un3_ex_retr_pipe_sw_csr_wr_op_retr, soft_reset_taken_retr_0, N_26, un1_instruction_27_1z, de_ex_pipe_m_env_call_ex, un3_instr_inhibit_ex_3, gpr_wr_valid_retr_1_1_0_1z, N_6_i_1z, N_4_i_1z, N_10_i_1z, N_8_i_1z, N_14_i_1z, N_1398_i_1z, N_1397_i_1z, de_ex_pipe_trap_ret_ex_2_1z, gpr_wr_en_retr_1z, ex_retr_pipe_gpr_wr_en_retr, ex_retr_pipe_exu_result_valid_retr, de_ex_pipe_gpr_rs3_rd_valid_ex, gpr_rs2_stall_csr_2_0_1z, gpr_rs2_stall_csr_2_1_1z, gpr_rs2_stall_csr_2_2_1z, N_1394_i, un1_instruction_33_i, de_ex_pipe_dbreak_ex, de_ex_pipe_i_access_mem_error_ex, de_ex_pipe_i_access_misalign_error_ex, un3_instr_inhibit_ex_8_1z, dbreak_retr_1z, ex_retr_pipe_dbreak_retr, N_167, de_ex_pipe_alu_op_sel_ex7_1z, un14_gpr_rs1_stall_lsu, ex_retr_pipe_fence_i_retr, trace_exception, N_164, de_ex_pipe_shifter_unit_op_sel_ex7_1z, de_ex_pipe_gpr_rs3_rd_valid_ex_2, cpu_debug_gpr_rd_en_net, i_access_mem_error_retr_1z, ex_retr_pipe_i_access_mem_error_retr, m_env_call_retr_1z, ex_retr_pipe_m_env_call_retr, un3_instr_inhibit_ex_6, ex_retr_pipe_i_access_misalign_error_retr, illegal_instr_retr_1z, ex_retr_pipe_illegal_instr_retr, stage_state_retr, de_ex_pipe_bcu_op_sel_ex, de_ex_pipe_fence_i_ex, stage_state_ex, un29_csr_trigger_wr_hzd_de_4, de_ex_pipe_gpr_rs2_rd_sel_ex5, wfi_de, debug_exit_retr, m_env_call_de, un1_gpr_wr_mux_sel_ex_i, un29_csr_trigger_wr_hzd_de_1, N_566_1, N_119_i, alloc_req_buff_1_1_0, lsu_expipe_req_valid_net, gpr_rs1_rd_valid_mux_1z, gpr_rs1_rd_valid_mux_0_1z, d_m5_a0_0, ifu_expipe_req_branch_excpt_req_fenci_net, ex_retr_pipe_fence_i_retr_2_1z, un1_instr_inhibit_ex_1z, N_117_i, un6_req_buff_load_os, un1_irq_stall_lsu_req, un3_irq_stall_lsu_req, N_115_i, N_121_i, N_133_i, un1_instruction_29_1_1z, cpu_debug_gpr_wr_en_net, cpu_debug_gpr_op_valid_net, N_12_i, de_ex_pipe_gpr_wr_en_ex, instr_accepted_retr_2, N_129_i, soft_reset_taken_retr_1z, machine_implicit_wr_mtval_tval_wr_en, debug_enter_retr, gpr_rs2_rd_data_valid_ex, gpr_rs2_rd_data_valid_7, gpr_N_10_mux_i_0_0_1z, N_125, N_289_i, N_123, N_127, case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z, un1_cpu_i_req_ready, bcu_op_completing_ex, apb_i_req_ready_net_tz, tcm0_i_req_ready_net_tz, tcm0_i_req_valid_1, case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z, g1_0, N_290_i, un1_lsu_resp_valid_1, un11_lsu_resp_ready_1_1, cpu_d_resp_valid_d, de_ex_pipe_illegal_instr_ex_2_1z, N_17, N_139_i, N_141_i, csr_wr_illegal_i_4, csr_rd_illegal_i_4, un1_cpu_i_req_ready_x, exu_result_valid_retr_1z, lsu_op_complete_retr_0, exu_csr_op_wr_data14, un6_instr_is_lsu_op_retr_1z, ex_retr_exu_res_accept_retr_3_1z, cpu_i_req_is_apb, instr_inhibit_ex, un3_bcu_op_sel_ex_1z, un2_cpu_i_req_ready_x, un3_cpu_i_req_ready, cpu_i_req_is_dummy_target, lsu_op_completing_ex_1_0_1z, cpu_m8_0_a3_0_3, cpu_i_req_is_tcm0_5_0, cpu_m8_0_a3_0_2, un8_cpu_i_req_is_tcm0lto18_12_1, N_88, N_72, N_84, N_58, N_42, N_137_i, N_131_i, N_291_i, un11_lsu_resp_ready_d_1z, trace_priv_i, cpu_N_6, instr_accepted_ex_2_1_RNISIFQHS3_1z, instr_accepted_ex, N_5927_i ) ; output un1_next_stage_state_ex_i_0 ; input apb_i_req_addr_net_18 ; input apb_i_req_addr_net_2 ; input apb_i_req_addr_net_1 ; input apb_i_req_addr_net_0 ; input apb_i_req_addr_net_3 ; input apb_i_req_addr_net_8 ; input de_ex_pipe_operand0_mux_sel_ex_0 ; input next_req_fetch_ptr_yy_0 ; input next_req_fetch_ptr_xx_0 ; output [31:0] immediate_de ; output [4:0] gpr_wr_sel_de ; output [4:0] gpr_rs1_rd_sel_de ; output [4:0] de_ex_pipe_gpr_rs2_rd_sel_ex_2 ; output [31:0] gpr_wr_data_retr ; input [31:0] ex_retr_pipe_exu_result_retr ; input [31:0] cpu_debug_csr_op_rd_data_net ; input [31:0] lsu_expipe_resp_rd_data_net ; output un1_next_stage_state_retr_i_0 ; output [11:0] sw_csr_addr_de ; input [31:16] ifu_expipe_resp_ireg_net ; output sw_csr_addr_de_1_0 ; output bcu_operand0_mux_sel_1_iv_i_0 ; output [2:0] shifter_unit_places_sel_de ; output [2:0] exu_result_mux_sel_de ; output [1:0] operand1_mux_sel_de ; output [3:0] lsu_op_de ; output [1:0] gpr_wr_mux_sel_de ; output [1:0] alu_op_sel_1_iv_0 ; output rv32i_dec_shifter_unit_op_sel_m_0 ; output branch_cond_iv_0_0 ; output operand0_mux_sel_de_0 ; output rv32c_dec_shifter_unit_op_sel_m_0 ; output rv32c_dec_alu_op_sel_0_d0 ; output [2:0] ex_retr_pipe_curr_pc_retr_2 ; input [2:0] de_ex_pipe_curr_pc_ex ; input [2:1] cpu_d_req_addr_net ; output shifter_unit_operand_sel_de_0 ; output branch_cond_de_0 ; output rv32c_dec_branch_cond_m_0 ; output [1:0] ex_retr_pipe_sw_csr_wr_op_retr_2 ; input [3:0] lsu_op_ex_pipe_reg ; output [1:0] bcu_operand1_mux_sel_de ; input [11:2] ex_retr_pipe_sw_csr_addr_retr ; input [1:0] de_ex_pipe_trigger_ex ; input [1:0] shifter_operand_sel ; input shifter_unit_places_sel_0 ; input de_ex_pipe_shifter_unit_places_sel_ex_0 ; input [4:0] de_ex_pipe_alu_op_sel_ex ; input [1:0] ex_retr_pipe_sw_csr_wr_op_retr ; output ex_retr_pipe_gpr_wr_mux_sel_retr_2_0 ; input de_ex_pipe_gpr_wr_mux_sel_ex_0 ; input [5:0] ex_retr_pipe_gpr_wr_sel_retr ; input [5:0] de_ex_pipe_gpr_rs2_rd_sel_ex ; input [3:0] ex_retr_pipe_lsu_op_retr ; output [4:0] ex_retr_pipe_gpr_wr_sel_retr_2 ; input [4:0] cpu_debug_gpr_op_addr_net ; input [4:0] de_ex_pipe_gpr_wr_sel_ex ; output [11:2] ex_retr_pipe_sw_csr_addr_retr_2 ; input [11:2] de_ex_pipe_sw_csr_addr_ex ; input [11:2] cpu_debug_csr_op_addr_net ; output rv32m_dec_alu_op_sel_m_1_0 ; output [1:0] shifter_unit_op_sel ; input [1:0] de_ex_pipe_shifter_unit_op_sel_ex ; output [3:0] lsu_expipe_req_op_net ; input [3:0] de_ex_pipe_lsu_op_ex ; input [1:0] de_ex_pipe_sw_csr_wr_op_ex ; output rv32i_dec_alu_op_sel_m_0_0 ; output rv32i_dec_alu_op_sel_m_0_2 ; output rv32m_dec_alu_op_sel_m_0_0 ; input [3:0] req_buff_resp_state_1_ ; input [1:0] req_buff_resp_state_valid ; input req_buff_fence_os_0 ; output rv32i_dec_shifter_unit_op_sel_0 ; input [1:0] de_ex_pipe_operand1_mux_sel_ex ; output rv32c_dec_alu_op_sel_0_0 ; input [1:0] un3_branch_cond_ex ; input [1:0] req_masked ; output [1:0] sw_csr_wr_op_de ; input [1:0] ex_retr_pipe_gpr_wr_mux_sel_retr ; output un2_next_stage_state_de_1z ; output next_stage_state_de_1_sqmuxa_i ; output ifu_expipe_resp_ready_net ; output de_ex_pipe_gpr_rs1_rd_valid_ex6 ; output de_ex_pipe_gpr_rs2_rd_valid_ex9 ; output de_ex_pipe_gpr_rs3_rd_valid_ex9 ; output de_ex_pipe_bcu_op_sel_ex7_1z ; output de_ex_pipe_alu_op_sel_ex7_0 ; input un2_cpu_i_req_ready ; output de_ex_pipe_lsu_op_ex7_1z ; input cpu_i_req_is_tcm0_5 ; input cpu_m1_e_1 ; input un8_cpu_i_req_is_tcm0lt19_12 ; input cpu_i_req_is_tcm0_4_2 ; input gen_m3 ; output ifu_expipe_req_branch_excpt_req_valid_net ; output exu_update_result_reg_1z ; input cmp_cond ; input exu_mux_result34 ; input un5_N_4_0_i ; output lsu_op_completing_ex_a0_1z ; output ifu_expipe_req_branch_excpt_req_valid_1_0_0_1z ; input exu_result_valid_ex ; input alloc_exception ; input cpu_d_req_is_apb ; input alloc_req_buff_1_1 ; input N_64 ; output de_ex_pipe_gpr_rs1_rd_valid_ex_2 ; output fence_de ; input lsu_align_result_valid_0 ; input exu_shifter_places_valid ; output gpr_wr_en_de ; output N_26_i ; output N_1388_i ; output N_1387_i ; input iab_ready ; output N_764 ; input lsu_req_addr_valid ; input de_ex_pipe_fence_ex ; output de_ex_pipe_bcu_op_sel_ex_2_1z ; output de_ex_pipe_gpr_rs2_rd_valid_ex_2 ; input N_240 ; input N_188 ; input N_244 ; input N_192 ; input lsu_expipe_resp_rd_data_sn_N_9_mux ; input N_246 ; input N_194 ; input ifu_expipe_resp_access_mem_error_net ; input ifu_expipe_resp_access_misalign_error_i_1 ; output gpr_wr_valid_retr ; input start_m1_e_1 ; output de_ex_pipe_implicit_pseudo_instr_ex_2_1z ; output trigger_op_addr_valid_de_1z ; output force_debug_nop_de_1z ; input N_108_0 ; input debug_enter_req_de ; input un1_rs2_rd_hzd_4 ; output ex_retr_pipe_gpr_wr_en_retr10 ; output interrupt_could_commit ; input i_trx_os_buff_ready ; output un1_instr_completing_retr_d_1z ; input interrupt_could_commit_0 ; output un1_instr_completing_retr_c_1z ; output ex_retr_pipe_lsu_op_retr9_1z ; output un1_ex_retr_pipe_lsu_op_retr_i_0 ; output ifu_expipe_req_branch_excpt_req_valid_1_0_1z ; output gpr_wr_valid_retr_2_0_0 ; output ifu_expipe_req_fenci_proceed_net ; input dealloc_resp_buff_10 ; input debug_mode_retire_mask_retr ; output gpr_rs2_rd_valid_dbgpipe ; input un1_lsu_resp_valid ; input lsu_expipe_resp_valid_0 ; input de_ex_pipe_gpr_rs2_rd_valid_ex ; output sw_csr_rd_op_de ; output un1_instr_inhibit_ex_0_1z ; input de_ex_pipe_debug_enter_req_ex ; input de_ex_pipe_implicit_pseudo_instr_ex ; output lsu_op_complete_retr_0_0_0_1z ; output lsu_flush_net_i ; output gpr_wr_valid_retr_0 ; input stage_state_de ; output lsu_flush_1z ; output N_14072_i ; input lsu_resp_valid40 ; input un1_lsu_resp_valid38_1_i ; input req_resp_state_valid ; output exu_op_abort_ex_1z ; input un2_exception_taken ; input un11_gpr_rs1_stall_exu ; input un7_gpr_rs1_stall_exu_NE ; output rv32m_dec_mnemonic847 ; input wfi_waiting_reg ; input set_wfi_waiting ; output ex_retr_pipe_sw_csr_wr_op_retr18 ; input sw_csr_op_ready_retr ; output gpr_wr_completing_retr_3_0_d_1z ; output un8_cpu_i_req_is_tcm0lt18 ; output exu_op_abort_ex_1_1z ; input un11_gpr_rs2_stall_exu ; output un5_instr_inhibit_ex_0_1z ; input un1_ex_retr_pipe_curr_pc_retr ; output dbreak_de ; input formal_trace_reset_taken ; output gpr_wr_valid_retr_1_1_1z ; input N_40 ; output fence_i_de ; input ex_retr_pipe_sw_csr_rd_op_retr ; input un3_ex_retr_pipe_sw_csr_wr_op_retr ; output soft_reset_taken_retr_0 ; output N_26 ; output un1_instruction_27_1z ; input de_ex_pipe_m_env_call_ex ; input un3_instr_inhibit_ex_3 ; output gpr_wr_valid_retr_1_1_0_1z ; output N_6_i_1z ; output N_4_i_1z ; output N_10_i_1z ; output N_8_i_1z ; output N_14_i_1z ; output N_1398_i_1z ; output N_1397_i_1z ; output de_ex_pipe_trap_ret_ex_2_1z ; output gpr_wr_en_retr_1z ; input ex_retr_pipe_gpr_wr_en_retr ; input ex_retr_pipe_exu_result_valid_retr ; input de_ex_pipe_gpr_rs3_rd_valid_ex ; output gpr_rs2_stall_csr_2_0_1z ; output gpr_rs2_stall_csr_2_1_1z ; output gpr_rs2_stall_csr_2_2_1z ; output N_1394_i ; output un1_instruction_33_i ; input de_ex_pipe_dbreak_ex ; input de_ex_pipe_i_access_mem_error_ex ; input de_ex_pipe_i_access_misalign_error_ex ; output un3_instr_inhibit_ex_8_1z ; output dbreak_retr_1z ; input ex_retr_pipe_dbreak_retr ; output N_167 ; output de_ex_pipe_alu_op_sel_ex7_1z ; output un14_gpr_rs1_stall_lsu ; input ex_retr_pipe_fence_i_retr ; input trace_exception ; output N_164 ; output de_ex_pipe_shifter_unit_op_sel_ex7_1z ; output de_ex_pipe_gpr_rs3_rd_valid_ex_2 ; input cpu_debug_gpr_rd_en_net ; output i_access_mem_error_retr_1z ; input ex_retr_pipe_i_access_mem_error_retr ; output m_env_call_retr_1z ; input ex_retr_pipe_m_env_call_retr ; output un3_instr_inhibit_ex_6 ; input ex_retr_pipe_i_access_misalign_error_retr ; output illegal_instr_retr_1z ; input ex_retr_pipe_illegal_instr_retr ; input stage_state_retr ; input de_ex_pipe_bcu_op_sel_ex ; input de_ex_pipe_fence_i_ex ; input stage_state_ex ; output un29_csr_trigger_wr_hzd_de_4 ; output de_ex_pipe_gpr_rs2_rd_sel_ex5 ; output wfi_de ; input debug_exit_retr ; output m_env_call_de ; input un1_gpr_wr_mux_sel_ex_i ; output un29_csr_trigger_wr_hzd_de_1 ; output N_566_1 ; input N_119_i ; input alloc_req_buff_1_1_0 ; output lsu_expipe_req_valid_net ; output gpr_rs1_rd_valid_mux_1z ; output gpr_rs1_rd_valid_mux_0_1z ; input d_m5_a0_0 ; output ifu_expipe_req_branch_excpt_req_fenci_net ; output ex_retr_pipe_fence_i_retr_2_1z ; output un1_instr_inhibit_ex_1z ; input N_117_i ; input un6_req_buff_load_os ; input un1_irq_stall_lsu_req ; input un3_irq_stall_lsu_req ; input N_115_i ; input N_121_i ; input N_133_i ; output un1_instruction_29_1_1z ; input cpu_debug_gpr_wr_en_net ; input cpu_debug_gpr_op_valid_net ; output N_12_i ; input de_ex_pipe_gpr_wr_en_ex ; output instr_accepted_retr_2 ; input N_129_i ; output soft_reset_taken_retr_1z ; input machine_implicit_wr_mtval_tval_wr_en ; input debug_enter_retr ; output gpr_rs2_rd_data_valid_ex ; input gpr_rs2_rd_data_valid_7 ; output gpr_N_10_mux_i_0_0_1z ; input N_125 ; input N_289_i ; input N_123 ; input N_127 ; output case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z ; input un1_cpu_i_req_ready ; output bcu_op_completing_ex ; input apb_i_req_ready_net_tz ; input tcm0_i_req_ready_net_tz ; input tcm0_i_req_valid_1 ; output case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z ; output g1_0 ; input N_290_i ; input un1_lsu_resp_valid_1 ; output un11_lsu_resp_ready_1_1 ; input cpu_d_resp_valid_d ; output de_ex_pipe_illegal_instr_ex_2_1z ; input N_17 ; input N_139_i ; input N_141_i ; input csr_wr_illegal_i_4 ; input csr_rd_illegal_i_4 ; input un1_cpu_i_req_ready_x ; output exu_result_valid_retr_1z ; output lsu_op_complete_retr_0 ; input exu_csr_op_wr_data14 ; output un6_instr_is_lsu_op_retr_1z ; output ex_retr_exu_res_accept_retr_3_1z ; input cpu_i_req_is_apb ; input instr_inhibit_ex ; output un3_bcu_op_sel_ex_1z ; input un2_cpu_i_req_ready_x ; input un3_cpu_i_req_ready ; input cpu_i_req_is_dummy_target ; output lsu_op_completing_ex_1_0_1z ; input cpu_m8_0_a3_0_3 ; input cpu_i_req_is_tcm0_5_0 ; input cpu_m8_0_a3_0_2 ; input un8_cpu_i_req_is_tcm0lto18_12_1 ; input N_88 ; input N_72 ; input N_84 ; input N_58 ; input N_42 ; input N_137_i ; input N_131_i ; input N_291_i ; output un11_lsu_resp_ready_d_1z ; input trace_priv_i ; input cpu_N_6 ; output instr_accepted_ex_2_1_RNISIFQHS3_1z ; output instr_accepted_ex ; output N_5927_i ; wire un1_next_stage_state_ex_i_0 ; wire apb_i_req_addr_net_18 ; wire apb_i_req_addr_net_2 ; wire apb_i_req_addr_net_1 ; wire apb_i_req_addr_net_0 ; wire apb_i_req_addr_net_3 ; wire apb_i_req_addr_net_8 ; wire de_ex_pipe_operand0_mux_sel_ex_0 ; wire next_req_fetch_ptr_yy_0 ; wire next_req_fetch_ptr_xx_0 ; wire un1_next_stage_state_retr_i_0 ; wire sw_csr_addr_de_1_0 ; wire bcu_operand0_mux_sel_1_iv_i_0 ; wire rv32i_dec_shifter_unit_op_sel_m_0 ; wire branch_cond_iv_0_0 ; wire operand0_mux_sel_de_0 ; wire rv32c_dec_shifter_unit_op_sel_m_0 ; wire rv32c_dec_alu_op_sel_0_d0 ; wire shifter_unit_operand_sel_de_0 ; wire branch_cond_de_0 ; wire rv32c_dec_branch_cond_m_0 ; wire shifter_unit_places_sel_0 ; wire de_ex_pipe_shifter_unit_places_sel_ex_0 ; wire ex_retr_pipe_gpr_wr_mux_sel_retr_2_0 ; wire de_ex_pipe_gpr_wr_mux_sel_ex_0 ; wire rv32m_dec_alu_op_sel_m_1_0 ; wire rv32i_dec_alu_op_sel_m_0_0 ; wire rv32i_dec_alu_op_sel_m_0_2 ; wire rv32m_dec_alu_op_sel_m_0_0 ; wire req_buff_fence_os_0 ; wire rv32i_dec_shifter_unit_op_sel_0 ; wire rv32c_dec_alu_op_sel_0_0 ; wire un2_next_stage_state_de_1z ; wire next_stage_state_de_1_sqmuxa_i ; wire ifu_expipe_resp_ready_net ; wire de_ex_pipe_gpr_rs1_rd_valid_ex6 ; wire de_ex_pipe_gpr_rs2_rd_valid_ex9 ; wire de_ex_pipe_gpr_rs3_rd_valid_ex9 ; wire de_ex_pipe_bcu_op_sel_ex7_1z ; wire de_ex_pipe_alu_op_sel_ex7_0 ; wire un2_cpu_i_req_ready ; wire de_ex_pipe_lsu_op_ex7_1z ; wire cpu_i_req_is_tcm0_5 ; wire cpu_m1_e_1 ; wire un8_cpu_i_req_is_tcm0lt19_12 ; wire cpu_i_req_is_tcm0_4_2 ; wire gen_m3 ; wire ifu_expipe_req_branch_excpt_req_valid_net ; wire exu_update_result_reg_1z ; wire cmp_cond ; wire exu_mux_result34 ; wire un5_N_4_0_i ; wire lsu_op_completing_ex_a0_1z ; wire ifu_expipe_req_branch_excpt_req_valid_1_0_0_1z ; wire exu_result_valid_ex ; wire alloc_exception ; wire cpu_d_req_is_apb ; wire alloc_req_buff_1_1 ; wire N_64 ; wire de_ex_pipe_gpr_rs1_rd_valid_ex_2 ; wire fence_de ; wire lsu_align_result_valid_0 ; wire exu_shifter_places_valid ; wire gpr_wr_en_de ; wire N_26_i ; wire N_1388_i ; wire N_1387_i ; wire iab_ready ; wire N_764 ; wire lsu_req_addr_valid ; wire de_ex_pipe_fence_ex ; wire de_ex_pipe_bcu_op_sel_ex_2_1z ; wire de_ex_pipe_gpr_rs2_rd_valid_ex_2 ; wire N_240 ; wire N_188 ; wire N_244 ; wire N_192 ; wire lsu_expipe_resp_rd_data_sn_N_9_mux ; wire N_246 ; wire N_194 ; wire ifu_expipe_resp_access_mem_error_net ; wire ifu_expipe_resp_access_misalign_error_i_1 ; wire gpr_wr_valid_retr ; wire start_m1_e_1 ; wire de_ex_pipe_implicit_pseudo_instr_ex_2_1z ; wire trigger_op_addr_valid_de_1z ; wire force_debug_nop_de_1z ; wire N_108_0 ; wire debug_enter_req_de ; wire un1_rs2_rd_hzd_4 ; wire ex_retr_pipe_gpr_wr_en_retr10 ; wire interrupt_could_commit ; wire i_trx_os_buff_ready ; wire un1_instr_completing_retr_d_1z ; wire interrupt_could_commit_0 ; wire un1_instr_completing_retr_c_1z ; wire ex_retr_pipe_lsu_op_retr9_1z ; wire un1_ex_retr_pipe_lsu_op_retr_i_0 ; wire ifu_expipe_req_branch_excpt_req_valid_1_0_1z ; wire gpr_wr_valid_retr_2_0_0 ; wire ifu_expipe_req_fenci_proceed_net ; wire dealloc_resp_buff_10 ; wire debug_mode_retire_mask_retr ; wire gpr_rs2_rd_valid_dbgpipe ; wire un1_lsu_resp_valid ; wire lsu_expipe_resp_valid_0 ; wire de_ex_pipe_gpr_rs2_rd_valid_ex ; wire sw_csr_rd_op_de ; wire un1_instr_inhibit_ex_0_1z ; wire de_ex_pipe_debug_enter_req_ex ; wire de_ex_pipe_implicit_pseudo_instr_ex ; wire lsu_op_complete_retr_0_0_0_1z ; wire lsu_flush_net_i ; wire gpr_wr_valid_retr_0 ; wire stage_state_de ; wire lsu_flush_1z ; wire N_14072_i ; wire lsu_resp_valid40 ; wire un1_lsu_resp_valid38_1_i ; wire req_resp_state_valid ; wire exu_op_abort_ex_1z ; wire un2_exception_taken ; wire un11_gpr_rs1_stall_exu ; wire un7_gpr_rs1_stall_exu_NE ; wire rv32m_dec_mnemonic847 ; wire wfi_waiting_reg ; wire set_wfi_waiting ; wire ex_retr_pipe_sw_csr_wr_op_retr18 ; wire sw_csr_op_ready_retr ; wire gpr_wr_completing_retr_3_0_d_1z ; wire un8_cpu_i_req_is_tcm0lt18 ; wire exu_op_abort_ex_1_1z ; wire un11_gpr_rs2_stall_exu ; wire un5_instr_inhibit_ex_0_1z ; wire un1_ex_retr_pipe_curr_pc_retr ; wire dbreak_de ; wire formal_trace_reset_taken ; wire gpr_wr_valid_retr_1_1_1z ; wire N_40 ; wire fence_i_de ; wire ex_retr_pipe_sw_csr_rd_op_retr ; wire un3_ex_retr_pipe_sw_csr_wr_op_retr ; wire soft_reset_taken_retr_0 ; wire N_26 ; wire un1_instruction_27_1z ; wire de_ex_pipe_m_env_call_ex ; wire un3_instr_inhibit_ex_3 ; wire gpr_wr_valid_retr_1_1_0_1z ; wire N_6_i_1z ; wire N_4_i_1z ; wire N_10_i_1z ; wire N_8_i_1z ; wire N_14_i_1z ; wire N_1398_i_1z ; wire N_1397_i_1z ; wire de_ex_pipe_trap_ret_ex_2_1z ; wire gpr_wr_en_retr_1z ; wire ex_retr_pipe_gpr_wr_en_retr ; wire ex_retr_pipe_exu_result_valid_retr ; wire de_ex_pipe_gpr_rs3_rd_valid_ex ; wire gpr_rs2_stall_csr_2_0_1z ; wire gpr_rs2_stall_csr_2_1_1z ; wire gpr_rs2_stall_csr_2_2_1z ; wire N_1394_i ; wire un1_instruction_33_i ; wire de_ex_pipe_dbreak_ex ; wire de_ex_pipe_i_access_mem_error_ex ; wire de_ex_pipe_i_access_misalign_error_ex ; wire un3_instr_inhibit_ex_8_1z ; wire dbreak_retr_1z ; wire ex_retr_pipe_dbreak_retr ; wire N_167 ; wire de_ex_pipe_alu_op_sel_ex7_1z ; wire un14_gpr_rs1_stall_lsu ; wire ex_retr_pipe_fence_i_retr ; wire trace_exception ; wire N_164 ; wire de_ex_pipe_shifter_unit_op_sel_ex7_1z ; wire de_ex_pipe_gpr_rs3_rd_valid_ex_2 ; wire cpu_debug_gpr_rd_en_net ; wire i_access_mem_error_retr_1z ; wire ex_retr_pipe_i_access_mem_error_retr ; wire m_env_call_retr_1z ; wire ex_retr_pipe_m_env_call_retr ; wire un3_instr_inhibit_ex_6 ; wire ex_retr_pipe_i_access_misalign_error_retr ; wire illegal_instr_retr_1z ; wire ex_retr_pipe_illegal_instr_retr ; wire stage_state_retr ; wire de_ex_pipe_bcu_op_sel_ex ; wire de_ex_pipe_fence_i_ex ; wire stage_state_ex ; wire un29_csr_trigger_wr_hzd_de_4 ; wire de_ex_pipe_gpr_rs2_rd_sel_ex5 ; wire wfi_de ; wire debug_exit_retr ; wire m_env_call_de ; wire un1_gpr_wr_mux_sel_ex_i ; wire un29_csr_trigger_wr_hzd_de_1 ; wire N_566_1 ; wire N_119_i ; wire alloc_req_buff_1_1_0 ; wire lsu_expipe_req_valid_net ; wire gpr_rs1_rd_valid_mux_1z ; wire gpr_rs1_rd_valid_mux_0_1z ; wire d_m5_a0_0 ; wire ifu_expipe_req_branch_excpt_req_fenci_net ; wire ex_retr_pipe_fence_i_retr_2_1z ; wire un1_instr_inhibit_ex_1z ; wire N_117_i ; wire un6_req_buff_load_os ; wire un1_irq_stall_lsu_req ; wire un3_irq_stall_lsu_req ; wire N_115_i ; wire N_121_i ; wire N_133_i ; wire un1_instruction_29_1_1z ; wire cpu_debug_gpr_wr_en_net ; wire cpu_debug_gpr_op_valid_net ; wire N_12_i ; wire de_ex_pipe_gpr_wr_en_ex ; wire instr_accepted_retr_2 ; wire N_129_i ; wire soft_reset_taken_retr_1z ; wire machine_implicit_wr_mtval_tval_wr_en ; wire debug_enter_retr ; wire gpr_rs2_rd_data_valid_ex ; wire gpr_rs2_rd_data_valid_7 ; wire gpr_N_10_mux_i_0_0_1z ; wire N_125 ; wire N_289_i ; wire N_123 ; wire N_127 ; wire case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z ; wire un1_cpu_i_req_ready ; wire bcu_op_completing_ex ; wire apb_i_req_ready_net_tz ; wire tcm0_i_req_ready_net_tz ; wire tcm0_i_req_valid_1 ; wire case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z ; wire g1_0 ; wire N_290_i ; wire un1_lsu_resp_valid_1 ; wire un11_lsu_resp_ready_1_1 ; wire cpu_d_resp_valid_d ; wire de_ex_pipe_illegal_instr_ex_2_1z ; wire N_17 ; wire N_139_i ; wire N_141_i ; wire csr_wr_illegal_i_4 ; wire csr_rd_illegal_i_4 ; wire un1_cpu_i_req_ready_x ; wire exu_result_valid_retr_1z ; wire lsu_op_complete_retr_0 ; wire exu_csr_op_wr_data14 ; wire un6_instr_is_lsu_op_retr_1z ; wire ex_retr_exu_res_accept_retr_3_1z ; wire cpu_i_req_is_apb ; wire instr_inhibit_ex ; wire un3_bcu_op_sel_ex_1z ; wire un2_cpu_i_req_ready_x ; wire un3_cpu_i_req_ready ; wire cpu_i_req_is_dummy_target ; wire lsu_op_completing_ex_1_0_1z ; wire cpu_m8_0_a3_0_3 ; wire cpu_i_req_is_tcm0_5_0 ; wire cpu_m8_0_a3_0_2 ; wire un8_cpu_i_req_is_tcm0lto18_12_1 ; wire N_88 ; wire N_72 ; wire N_84 ; wire N_58 ; wire N_42 ; wire N_137_i ; wire N_131_i ; wire N_291_i ; wire un11_lsu_resp_ready_d_1z ; wire trace_priv_i ; wire cpu_N_6 ; wire instr_accepted_ex_2_1_RNISIFQHS3_1z ; wire instr_accepted_ex ; wire N_5927_i ; wire [4:0] gpr_rs1_rd_sel_1_iv_0_Z; wire [2:0] gpr_rs1_rd_sel_1_iv_1_Z; wire [0:0] rv32i_dec_immediate_0_iv_1_Z; wire [16:0] rv32i_dec_immediate; wire [1:1] rv32c_dec_gpr_rs1_rd_sel_0_iv_2_1_Z; wire [1:1] rv32c_dec_gpr_rs1_rd_sel_0_iv_2_Z; wire [4:3] de_ex_pipe_gpr_rs2_rd_sel_ex_2_0_1; wire [3:3] rv32c_dec_gpr_wr_sel_m_1; wire [3:0] rv32c_dec_gpr_wr_sel_m; wire [2:1] rv32i_dec_shifter_unit_places_2; wire [2:2] rv32i_dec_shifter_unit_places_3; wire [0:0] rv32c_dec_lsu_op_1_iv_1_Z; wire [0:0] rv32c_dec_lsu_op_1_iv_0_tz_Z; wire [2:0] rv32c_dec_lsu_op; wire [0:0] rv32c_dec_lsu_op_1_iv_0_tz_0_1_Z; wire [0:0] rv32c_dec_lsu_op_1_iv_0_tz_1_Z; wire [16:9] rv32c_dec_immediate_13_m_Z; wire [2:1] rv32c_dec_gpr_wr_sel_1_Z; wire [2:2] rv32i_dec_alu_op_sel_0_a5_2_0_Z; wire [1:0] sw_csr_wr_op_ex_Z; wire [30:17] instruction_m_1; wire [12:12] rv32c_dec_mnemonic_m; wire [3:3] rv32c_dec_gpr_rs1_rd_sel_19_m_1; wire [3:1] un5_lsu_op_ex_pipe_Z; wire [0:0] rv32c_dec_alu_op_sel_1_iv_0_Z; wire [1:1] rv32i_dec_alu_op_sel_0_a5_0_0_Z; wire [1:1] rv32i_dec_alu_op_sel_0_a2_2_0_Z; wire [1:0] rv32c_dec_gpr_rs2_rd_sel_m; wire [1:1] rv32c_dec_gpr_wr_mux_sel_m_2; wire [0:0] rv32c_dec_operand0_mux_sel; wire [0:0] rv32c_dec_exu_result_mux_sel_m_1; wire [1:1] rv32i_dec_operand1_mux_sel_m_1; wire [0:0] rv32i_dec_gpr_wr_mux_sel_0_a6_1_Z; wire [5:5] rv32i_dec_immediate_tz; wire [31:8] instruction_m_0; wire [20:2] instruction_m_3; wire [2:2] de_ex_pipe_gpr_rs2_rd_sel_ex_2_0_0; wire [0:0] rv32c_dec_exu_result_mux_sel_m_0; wire [0:0] rv32c_dec_alu_op_sel_1_iv_3_Z; wire [1:1] rv32i_dec_exu_result_mux_sel_0_a4_1_Z; wire [5:5] rv32c_dec_immediate_1_Z; wire [1:1] rv32i_dec_gpr_wr_mux_sel_0_a6_1_0_Z; wire [0:0] rv32i_dec_operand1_mux_sel_0_a2_0_2_Z; wire [0:0] rv32i_dec_exu_result_mux_sel_0_a2_0_0_Z; wire [2:0] rv32i_dec_lsu_op; wire [4:4] rv32c_dec_immediate_0_Z; wire [1:0] rv32c_dec_immediate_tz; wire [1:1] rv32c_dec_operand1_mux_sel_m; wire [31:31] instruction_m_8; wire [12:12] rv32i_dec_immediate_Z; wire [6:4] rv32c_dec_immediate_1_iv_1_Z; wire [7:7] rv32c_dec_immediate_2_iv_0_Z; wire [0:0] rv32c_dec_operand1_mux_sel_1_iv_i_a3_0; wire [1:1] rv32c_dec_gpr_wr_mux_sel_m; wire [0:0] rv32c_dec_alu_op_sel; wire [2:2] rv32c_dec_exu_result_mux_sel_m; wire [1:0] rv32i_dec_gpr_wr_mux_sel; wire [12:7] instruction_m_5; wire [12:12] rv32c_dec_immediate_1; wire [1:1] rv32c_dec_shifter_unit_places; wire [0:0] rv32i_dec_branch_cond_1_Z; wire [0:0] rv32i_dec_operand0_mux_sel_Z; wire [4:4] rv32c_dec_gpr_rs1_rd_sel_tz; wire [17:5] rv32c_dec_immediate; wire [4:4] instruction_m; wire [22:12] instruction_m_2; wire [0:0] rv32i_dec_operand1_mux_sel_0_1_Z; wire [4:2] rv32c_dec_immediate_1_iv_0_Z; wire [1:1] rv32i_dec_gpr_wr_mux_sel_0_2_Z; wire [0:0] rv32c_dec_operand1_mux_sel_1_iv_i_a3_3_Z; wire [2:0] rv32i_dec_exu_result_mux_sel; wire [0:0] rv32i_dec_alu_op_sel; wire [2:2] rv32i_dec_shifter_unit_places; wire [3:3] rv32c_dec_gpr_rs1_rd_sel_0_iv_0_Z; wire [3:3] rv32c_dec_immediate_Z; wire [0:0] rv32i_dec_exu_result_mux_sel_0_0_Z; wire [1:1] rv32i_dec_alu_op_sel_m; wire [1:1] rv32i_dec_shifter_unit_places_1; wire [0:0] rv32c_dec_operand1_mux_sel_m_0; wire [0:0] rv32i_dec_operand1_mux_sel; wire [1:0] exu_result_mux_sel_1_iv_0_Z; wire [0:0] bcu_operand0_mux_sel_1_iv_2_Z; wire [31:0] gpr_wr_data_retr_2; wire [6:6] rv32c_dec_immediate_1_iv_2_Z; wire [10:10] rv32c_dec_immediate_0_iv_0_Z; wire [4:1] rv32i_dec_immediate_1_iv_0_0_Z; wire [7:7] rv32c_dec_immediate_2_iv_1_Z; wire [11:11] rv32i_dec_immediate_1_iv_0_Z; wire [3:0] rv32i_dec_gpr_wr_sel_m; wire [2:1] rv32c_dec_gpr_wr_sel_2_Z; wire [1:0] gpr_rs2_rd_sel_1_iv_0_Z; wire [4:1] gpr_wr_sel_1_iv_0_Z; wire [4:4] rv32c_dec_immediate_13_m_1; wire instr_accepted_ex_2_1_RNIEDMV8U3_Z ; wire lsu_op_completing_ex_a2_0_Z ; wire lsu_op_complete_ex_s_out ; wire un7_gpr_rd_rs1_completing_ex_1_0_d_0_a1_1 ; wire un11_lsu_resp_ready_d_0_Z ; wire ex_retr_pipe_fence_i_retr_2_RNIVDG1K92_Z ; wire ifu_m5_1 ; wire un7_gpr_rd_rs1_completing_ex_1_0_d_0 ; wire un3_bcu_op_sel_ex_RNIAJT66B2_Z ; wire gpr_rd_rs2_complete_ex_s_RNIE9L3621_Z ; wire ifu_m4_0 ; wire ifu_m1_e_1_0 ; wire ifu_m1_e_0 ; wire un4_m1_0_a2_0 ; wire instr_is_lsu_ldstr_ex_0_0_RNITU5E381_0_Z ; wire instr_m3_1 ; wire bcu_op_completing_ex_2 ; wire instr_is_lsu_ldstr_ex_0_0_RNICTBGR72_Z ; wire rv32i_dec_mnemonic4949_1_N_2L1 ; wire rv32m_dec_mnemonic853_0 ; wire N_32_mux_1 ; wire rv32i_dec_mnemonic4949_1_N_3L3 ; wire N_568_1_0 ; wire rv32i_dec_mnemonic4916_5 ; wire rv32i_dec_mnemonic4949_1 ; wire de_ex_pipe_illegal_instr_ex_2_1_N_5L8_1_0_Z ; wire de_ex_pipe_illegal_instr_ex_2_1_N_5L8_Z ; wire lsu_op_completing_ex_a1_2_Z ; wire lsu_op_completing_ex_1_2_1_Z ; wire lsu_op_completing_ex_1_0_N_2L1_Z ; wire lsu_op_completing_ex_1_0_N_3L3_Z ; wire d_N_7_0 ; wire un7_gpr_rd_rs3_completing_ex_1_2_1 ; wire gpr_rd_rs3_complete_ex_0_Z ; wire instr_m3_e_N_5L8_1_1 ; wire un7_gpr_rd_rs3_completing_ex_d_0 ; wire gpr_rd_rs3_complete_ex_0_RNICHBA5T_Z ; wire instr_m3_e_N_5L8_1 ; wire lsu_op_complete_ex_s_0_RNI1TBI281_Z ; wire instr_m3_e_1_0 ; wire instr_m3_e_1 ; wire instr_N_6_mux ; wire instr_valid_de_2_RNINIJB6_Z ; wire gpr_N_8_0 ; wire instr_m2_1_0_1_Z ; wire instr_N_3_1 ; wire un3_bcu_op_sel_ex_RNI4LNGA_0_Z ; wire un6_alu_op_complete_ex ; wire un6_alu_op_complete_ex_0_RNIE8JK3_Z ; wire bcu_op_completing_ex_1_0 ; wire bcu_op_completing_ex_2_0 ; wire alu_op_complete_ex ; wire csr_complete_retr_x_Z ; wire lsu_op_complete_retr_0_0_1_Z ; wire un3_csr_complete_retr_Z ; wire bcu_m5_i_a4_0_0 ; wire bcu_m5_i_a4_0_1_1 ; wire bcu_N_4 ; wire case_dec_gpr_rs2_rd_sel_3_sqmuxa_Z ; wire de_ex_pipe_illegal_instr_ex_2_1_Z ; wire rv32i_dec_mnemonic4948_i_15 ; wire lsu_N_13_mux ; wire un3_bcu_op_sel_ex_RNI16R57U3_Z ; wire rv32i_dec_mnemonic4949_i_24 ; wire rv32i_dec_mnemonic4949_i_25 ; wire rv32i_dec_mnemonic4949 ; wire rv32i_dec_illegal_instr_m ; wire rv32c_dec_illegal_instr_m ; wire rv32c_dec_mnemonic2131 ; wire un1_rv32c_dec_mnemonic2125_5_i_0 ; wire rv32c_dec_mnemonic2128 ; wire g1_1_2 ; wire rv32i_dec_mnemonic4915_3_0 ; wire N_210 ; wire g1_1_0 ; wire N_160 ; wire rv32i_dec_mnemonic4919_3 ; wire N_155 ; wire N_150_0 ; wire rv32m_dec_mnemonic849 ; wire rv32m_dec_mnemonic848 ; wire case_dec_gpr_rs2_rd_sel_1_sqmuxa_Z ; wire un1_rv32c_dec_mnemonic2124_2_s6 ; wire rv32c_dec_mnemonic2115 ; wire rv32c_dec_mnemonic2132 ; wire N_152 ; wire bcu_op_completing_ex_2_1 ; wire bcu_op_completing_ex_1 ; wire bcu_op_completing_ex_4_a0_2_Z ; wire d_N_5_1 ; wire instr_m4_1 ; wire gpr_rd_rs3_complete_ex_out ; wire un1_implicit_pseudo_instr_de ; wire instr_valid_de_2_Z ; wire bcu_op_completing_ex_4 ; wire bcu_op_completing_ex_a2_0 ; wire instr_completing_ex_1_Z ; wire instr_completing_ex_6_6_Z ; wire bcu_op_complete_ex_Z ; wire instr_completing_ex_Z ; wire un7_gpr_rd_rs3_completing_ex_1_2 ; wire N_1_48_2 ; wire gpr_m7_0_1_0 ; wire gpr_m7_0_5 ; wire gpr_rd_rs1_complete_ex_0_d ; wire instr_is_lsu_ldstr_ex_0_0_RNICTBGR72_0_Z ; wire un21_gpr_rd_rs2_completing_ex_Z ; wire un6_shift_op_complete_ex_Z ; wire un8_gpr_rd_rs2_completing_ex_0_1_Z ; wire un8_gpr_rd_rs2_completing_ex_0_Z ; wire N_397 ; wire un1_rv32c_dec_mnemonic2112_2_Z ; wire un1_instruction_13 ; wire un1_instruction_24_i ; wire un1_instruction_38_i ; wire un1_instruction_7_i ; wire un1_instruction_14_i ; wire un1_instruction_15_Z ; wire rv32c_dec_mnemonic2130 ; wire rv32c_dec_mnemonic2118 ; wire rv32c_dec_mnemonic2112 ; wire gpr_m7_0_a3_0 ; wire gpr_N_10_mux_i_0_1 ; wire un1_instruction_41_i ; wire N_71 ; wire N_72_0 ; wire N_12_i_1_Z ; wire m17_2_1 ; wire m17_1_0 ; wire N_24_mux ; wire i9_mux ; wire m19_1 ; wire N_32_mux ; wire N_7 ; wire rv32c_dec_gpr_wr_sel_sn_N_10_mux ; wire rv32c_dec_gpr_wr_sel_sn_N_6 ; wire un1_instruction_37_Z ; wire rv32c_dec_gpr_wr_sel_sn_N_7 ; wire N_168 ; wire m15_1 ; wire N_7_1 ; wire N_46_mux ; wire N_3 ; wire un1_rv32i_dec_mnemonic4960_1_i_a17_0_Z ; wire m12_1 ; wire N_13 ; wire N_24_mux_0 ; wire un83_rv32i_dec_gpr_wr_valid ; wire rv32c_dec_mnemonic2130_0 ; wire rv32c_dec_mnemonic2136_s24_0 ; wire un1_instruction_26_1 ; wire lsu_req_valid_3_1_Z ; wire lsu_req_valid_3_Z ; wire lsu_req_valid_1_1_Z ; wire N_596 ; wire un1_rv32c_dec_mnemonic2137_1_2_o2_1_Z ; wire N_587 ; wire N_582 ; wire un1_instruction_11_i ; wire rv32c_dec_gpr_rs2_rd_valid_m_1 ; wire rv32c_dec_mnemonic1881 ; wire rv32c_dec_gpr_rs2_rd_valid_m ; wire un1_rv32c_dec_mnemonic2125_4_i ; wire un1_rv32c_dec_mnemonic2115_4_Z ; wire un1_rv32c_dec_mnemonic2116_9_s1_1 ; wire un1_rv32c_dec_mnemonic2116_9_s1 ; wire N_130_i_Z ; wire un1_instruction_38_1_0_Z ; wire un1_instruction_22_i ; wire rv32c_dec_bcu_op_sel_iv_1_1_1_Z ; wire rv32c_dec_bcu_op_sel_iv_1_1_Z ; wire rv32c_dec_mnemonic2135_0 ; wire un1_rv32c_dec_mnemonic2114_1_0 ; wire un1_rv32c_dec_mnemonic2137_1_2_a2_8_1_Z ; wire rv32c_dec_mnemonic2126 ; wire rv32c_dec_mnemonic2123 ; wire un1_rv32c_dec_mnemonic2137_1_2_a2_8_Z ; wire rv32c_dec_mnemonic2124 ; wire rv32c_dec_mnemonic2125 ; wire rv32c_dec_mnemonic2122 ; wire un11_lsu_resp_ready_c_0_Z ; wire un11_lsu_resp_ready_c_1_Z ; wire rv32c_dec_mnemonic2114_3 ; wire rv32c_dec_mnemonic2133 ; wire N_2 ; wire N_6 ; wire gpr_rd_rs1_complete_ex_out ; wire ifu_m3_a0_1 ; wire gpr_rd_rs1_complete_ex_0_s_a0_2 ; wire bcu_op_completing_ex_2_0_a0_1 ; wire bcu_op_completing_ex_2_1_1_0 ; wire bcu_op_completing_ex_2_1_1 ; wire rv32c_dec_mnemonic2116 ; wire un1_rv32c_dec_mnemonic2114_1_i ; wire un1_rv32i_dec_mnemonic4960_1_i_a17_2_1_0 ; wire N_564_1 ; wire rv32m_dec_mnemonic848_1 ; wire rv32m_dec_mnemonic852 ; wire rv32m_dec_mnemonic850 ; wire rv32i_dec_mnemonic4948 ; wire rv32i_dec_mnemonic4956 ; wire un1_rv32i_dec_mnemonic4915_1_5_Z ; wire rv32m_dec_mnemonic848_0 ; wire rv32i_dec_mnemonic4954_0 ; wire rv32c_dec_mnemonic2124_1_0 ; wire rv32c_dec_fence_i_m_0 ; wire rv32m_dec_mnemonic847_0 ; wire rv32i_dec_mnemonic4954 ; wire rv32i_dec_mnemonic4951 ; wire N_527_1 ; wire un1_instruction_15_i ; wire N_482_2 ; wire N_95_2 ; wire rv32i_dec_mnemonic4917_3 ; wire rv32i_dec_mnemonic4957 ; wire rv32i_instr_decoded_4 ; wire rv32i_dec_mnemonic4958 ; wire rv32i_instr_decoded_8 ; wire rv32c_dec_mnemonic1725 ; wire N_28 ; wire un1_instruction_29_3_Z ; wire un1_instruction_29_5_Z ; wire un1_core_reset_1_i ; wire un1_debug_exit_Z ; wire rv32i_dec_mnemonic4960 ; wire N_206 ; wire un1_instruction ; wire rv32i_dec_mnemonic4913 ; wire N_482_1 ; wire rv32i_dec_mnemonic4953_5 ; wire rv32i_dec_mnemonic4952_5 ; wire rv32i_dec_mnemonic4951_i_3 ; wire rv32i_dec_mnemonic4950_3 ; wire un1_instruction_27_2_Z ; wire rv32c_dec_mnemonic2123_1 ; wire N_547 ; wire un1_rv32c_dec_mnemonic2123_2_s4_i_1_0 ; wire N_2_0 ; wire rv32c_dec_mnemonic2119_2 ; wire un1_instruction_14_2 ; wire rv32i_dec_mnemonic4926_4 ; wire rv32c_dec_mnemonic2124_i_2 ; wire rv32i_dec_gpr_rs2_rd_valid_m_3 ; wire N_1349 ; wire N_499_1 ; wire un1_instruction_14_3 ; wire un1_instruction_15_2 ; wire N_415 ; wire un1_rv32c_dec_mnemonic2119_1_i ; wire rv32c_dec_mnemonic_1_m_0 ; wire rv32m_dec_mnemonic851 ; wire rv32m_dec_gpr_wr_valid_1 ; wire rv32i_dec_mnemonic4959 ; wire N_25_mux_1 ; wire rv32c_dec_mnemonic2129_2 ; wire rv32c_dec_mnemonic2115_i_2 ; wire rv32c_dec_mnemonic2121_1 ; wire un1_rv32c_dec_mnemonic2112_2_1_Z ; wire rv32c_dec_bcu_op_sel_2 ; wire mnemonic537_Z ; wire rv32c_dec_mnemonic2117_2 ; wire rv32i_dec_fence_Z ; wire mnemonic536_Z ; wire fence_i_retr_Z ; wire rv32m_dec_mnemonic846 ; wire un1_instruction_11_i_1 ; wire N_130 ; wire un1_instruction_24_i_1 ; wire N_27 ; wire N_17_1 ; wire un1_instruction_14_i_1 ; wire N_46_1 ; wire N_100_1 ; wire un1_instruction_i_2 ; wire rv32i_dec_mnemonic4913_i_2 ; wire N_127_0 ; wire N_7_0 ; wire rv32m_dec_mnemonic850_i_3 ; wire rv32i_dec_mnemonic4947 ; wire un1_instruction_12_i_2 ; wire N_565_1 ; wire un1_rv32c_dec_mnemonic2112_4_1_Z ; wire rv32i_dec_mnemonic4959_3 ; wire m19_1_0 ; wire rv32i_dec_mnemonic4948_0 ; wire un1_rv32c_dec_mnemonic2112_2_5_Z ; wire rv32m_dec_mnemonic846_0 ; wire rv32m_dec_mnemonic851_2 ; wire rv32i_dec_mnemonic4914_1 ; wire rv32c_dec_mnemonic2122_1 ; wire rv32c_dec_mnemonic2123_1_0 ; wire rv32i_dec_mnemonic4928_2 ; wire rv32i_dec_mnemonic4919_0 ; wire rv32c_dec_mnemonic2124_1 ; wire rv32c_dec_mnemonic2125_0 ; wire rv32c_dec_mnemonic2127_0 ; wire m8_e_0 ; wire rv32c_dec_mnemonic2125_2_1 ; wire un11_csr_trigger_wr_hzd_de_6 ; wire un11_csr_trigger_wr_hzd_de_5 ; wire un6_instr_is_lsu_op_retr_0_Z ; wire un3_instr_inhibit_ex_4_Z ; wire un29_csr_trigger_wr_hzd_de_2 ; wire un6_alu_op_complete_ex_0_a3_2_Z ; wire un1_instruction_44_i ; wire N_96 ; wire N_28_mux_3 ; wire rv32c_dec_mnemonic2125_3_3 ; wire N_14_mux ; wire rv32c_dec_mnemonic2121 ; wire rv32c_dec_dbreakpoint_m_0 ; wire rv32i_dec_mnemonic4957_0 ; wire N_574 ; wire un1_instruction_29_1_1 ; wire rv32i_dec_mnemonic4950_0 ; wire ifu_m3_a2_0 ; wire N_5237_tz_tz ; wire N_4 ; wire rv32c_dec_mnemonic1725_m_1 ; wire rv32i_dec_mnemonic4948_i_18 ; wire rv32i_dec_mnemonic4959_i_22 ; wire N_103_2 ; wire rv32c_dec_mnemonic2121_1_0 ; wire un1_instruction_21_Z ; wire un1_instruction_8_Z ; wire un1_instruction_18_i ; wire un1_rv32c_dec_mnemonic2115_2_Z ; wire N_217 ; wire un1_instruction_20_Z ; wire un1_instruction_9_Z ; wire un18_lsu_op_str_ex_2_Z ; wire N_52 ; wire rv32m_dec_mnemonic846_i_12 ; wire un1_instruction_12_i ; wire un1_instruction_25_i ; wire un1_instruction_29_8 ; wire N_29 ; wire N_154 ; wire rv32i_dec_mnemonic4915_1_0 ; wire N_377 ; wire N_540 ; wire N_561 ; wire N_4_0 ; wire un1_rv32c_dec_mnemonic2123_2_s4 ; wire rv32c_dec_gpr_rs1_rd_valid_1_m_3 ; wire rv32i_dec_gpr_rs2_rd_valid_m_2 ; wire fence_0_2_Z ; wire un12_gpr_rd_rs3_completing_ex_0_Z ; wire un1_rv32i_dec_mnemonic4915_1_10_Z ; wire m15_1_0 ; wire rv32i_dec_mnemonic4956_3 ; wire rv32m_dec_mnemonic847_2 ; wire rv32m_dec_mnemonic853_2 ; wire rv32i_dec_mnemonic4952_1 ; wire rv32i_dec_mnemonic4920_1 ; wire rv32c_dec_mnemonic2121_2 ; wire un3_instr_inhibit_ex_5_Z ; wire un29_csr_trigger_wr_hzd_de_3 ; wire un1_instruction_29_1_0_Z ; wire i19_mux ; wire N_41_mux ; wire N_22 ; wire un6_lsu_op_complete_ex_Z ; wire rv32c_dec_mnemonic2129 ; wire un18_lsu_op_str_ex_Z ; wire un13_instr_is_lsu_ldstr_ex_Z ; wire rv32i_dec_mnemonic4912 ; wire N_51 ; wire un16_gpr_rd_rs1_completing_ex_1_Z ; wire de_m4_e_1 ; wire N_489_1 ; wire N_482 ; wire un1_rv32c_dec_mnemonic2123_1_0_Z ; wire N_4922_tz ; wire un1_instruction_40_Z ; wire N_134 ; wire un6_gpr_rs1_stall_exu ; wire rv32c_dec_gpr_wr_valid_m_1 ; wire N_490 ; wire un1_instruction_14_Z ; wire rv32c_dec_mnemonic2123_s5 ; wire N_144_2 ; wire N_16 ; wire N_73 ; wire N_23_mux ; wire i9_mux_0 ; wire N_19_2 ; wire i5_mux_2 ; wire N_21_mux_2 ; wire N_21_mux_1 ; wire m19_3 ; wire rv32i_dec_mnemonic4956_4 ; wire rv32i_dec_mnemonic4948_3 ; wire rv32m_dec_mnemonic852_2 ; wire rv32m_dec_mnemonic850_2 ; wire un1_rv32c_dec_mnemonic2112_2_0_Z ; wire rv32m_dec_mnemonic848_4 ; wire rv32m_dec_mnemonic849_2 ; wire rv32m_dec_mnemonic851_4 ; wire instr_is_lsu_ldstr_ex_0_0_Z ; wire un11_csr_trigger_wr_hzd_de_8 ; wire un11_lsu_resp_ready_1_1_0_Z ; wire rv32i_dec_mnemonic4928 ; wire un29_csr_trigger_wr_hzd_de ; wire un1_instruction_29_Z ; wire rv32i_dec_mnemonic4953 ; wire rv32i_dec_mnemonic4955 ; wire un83_rv32i_dec_gpr_wr_valid_m_1 ; wire N_143 ; wire N_211 ; wire gpr_rs1_stall_csr_1_Z ; wire instr_is_lsu_ldstr_reg_ex_Z ; wire N_162 ; wire N_95 ; wire rv32i_dec_mnemonic4914 ; wire lsu_op_str_ex_Z ; wire N_575 ; wire N_769 ; wire un1_rv32c_dec_mnemonic2124_1_Z ; wire un1_instruction_14_m ; wire N_491_2 ; wire N_147_2 ; wire N_573 ; wire N_123_0 ; wire N_170 ; wire N_30 ; wire N_566 ; wire i18_mux ; wire N_17_1_0 ; wire i5_mux_1 ; wire N_22_mux_1 ; wire un1_rv32i_dec_mnemonic4915_1_1_Z ; wire un1_rv32c_dec_mnemonic2114_1_2_Z ; wire un3_instr_inhibit_ex_9_Z ; wire un1_rv32c_dec_mnemonic2137_1_0 ; wire un1_rv32c_dec_mnemonic2112_4_i ; wire N_41 ; wire gpr_rs2_stall_csr_2_Z ; wire N_492 ; wire un1_rv32c_dec_mnemonic2115_3_Z ; wire N_89 ; wire N_144 ; wire N_565 ; wire N_146 ; wire N_495 ; wire rv32i_dec_mnemonic4926 ; wire N_563 ; wire un1_rv32i_dec_mnemonic4950_1_Z ; wire csr_complete_retr_Z ; wire N_18_mux ; wire N_163 ; wire N_6_0 ; wire un1_instruction_39 ; wire N_104 ; wire un1_rv32i_dec_mnemonic4915_1_2_Z ; wire un1_rv32i_dec_mnemonic4911_2_Z ; wire un1_rv32c_dec_mnemonic2112_2_4_Z ; wire un1_rv32i_dec_mnemonic4960_1_i_a17_3_1_0_Z ; wire N_90 ; wire rv32i_dec_sw_csr_rd_op_cnst_Z ; wire stall_retr_Z ; wire N_108 ; wire rv32m_dec_mnemonic853 ; wire gpr_rs1_rd_valid_mux_0_RNO_Z ; wire csr_trigger_wr_hzd_de_Z ; wire N_61 ; wire gpr_rs2_stall_csr_Z ; wire N_30_mux ; wire N_32_mux_0 ; wire N_22_mux_2 ; wire lsu_op_complete_retr_d_d ; wire N_387 ; wire un1_rv32i_dec_mnemonic4960_1_i_4_Z ; wire rv32m_dec_gpr_wr_valid ; wire N_147 ; wire gpr_rs2_rd_valid_dbgpipe_0_RNO_0_Z ; wire N_77 ; wire N_28_0 ; wire un1_rv32i_dec_mnemonic4960_1_i_6_Z ; wire rv32c_dec_bcu_op_sel ; wire next_N_7_mux ; wire un1_rv32i_dec_mnemonic4960_1_i_3_tz_Z ; wire rv32m_dec_gpr_wr_valid_m ; wire mnemonic538_Z ; wire un1_rv32c_dec_mnemonic2137_1_2_a2_7_Z ; wire un1_rv32i_dec_mnemonic4915_1_6_Z ; wire un1_rv32i_dec_mnemonic4911_6_Z ; wire gpr_N_5_mux_0 ; wire N_39 ; wire N_542 ; wire N_398_1 ; wire N_23_mux_m ; wire gpr_wr_completing_retr_2_Z ; wire un1_instruction_valid_i ; wire un1_rv32i_dec_mnemonic4960_1_i_5_Z ; wire gpr_wr_completing_retr ; wire rv32i_dec_gpr_rs2_rd_valid_m_3_0 ; wire gpr_rd_rs1_complete_ex_d_1_a2_0_Z ; wire gpr_rd_rs2_complete_ex_out ; wire instr_completing_retr_0_0 ; wire N_19_1 ; wire bcu_m5_i_a4_0_1_1_0 ; wire instr_completing_retr ; wire N_17_0 ; wire rv32i_instr_decoded ; wire N_767 ; wire instr_completing_ex_6_4_1_0_Z ; wire un291_rv32i_dec_sw_csr_wr_op_0 ; wire un1_rv32i_dec_mnemonic4915_1_Z ; wire un1_rv32i_dec_mnemonic4911_Z ; wire gpr_rs2_rd_valid_de ; wire bcu_op_sel_iv_0_Z ; wire N_20 ; wire N_29_0 ; wire rv32i_dec_mnemonic4958_2 ; wire rv32i_dec_mnemonic4960_1 ; wire un1_instruction_19_1_0 ; wire rv32i_dec_mnemonic4949_i_16 ; wire N_818_1 ; wire N_816_1 ; wire N_812_1 ; wire rv32i_dec_mnemonic4958_7 ; wire rv32i_dec_mnemonic4959_4 ; wire rv32i_dec_mnemonic4956_5 ; wire rv32i_dec_mnemonic4949_25_2 ; wire un291_rv32i_dec_sw_csr_wr_op ; wire un1_instruction_19 ; wire N_26_0 ; wire N_818 ; wire N_816 ; wire N_812 ; wire m35_0 ; wire rv32i_dec_mnemonic4958_8 ; wire rv32i_dec_mnemonic4959_6 ; wire rv32i_dec_mnemonic4960_5 ; wire rv32i_dec_mnemonic4958_1_0_2 ; wire rv32i_dec_mnemonic4957_1_0_2 ; wire un8_lsu_req_valid_Z ; wire un7_bcu_op_completing_ex_0_Z ; wire un1_instruction_19_m ; wire N_383_1 ; wire bcu_op_completing_ex_4_a1_0_Z ; wire rv32c_instr_decoded_iv_0_Z ; wire lsu_req_valid_6_Z ; wire rv32i_dec_mnemonic4958_10 ; wire rv32i_dec_mnemonic4957_2 ; wire rv32i_dec_mnemonic4956_8 ; wire rv32i_dec_gpr_wr_valid_cnst ; wire N_383 ; wire rv32c_dec_gpr_rs1_rd_valid_1_m_1 ; wire rv32i_dec_mnemonic4959_8 ; wire rv32i_dec_mnemonic4960_7 ; wire rv32c_dec_gpr_wr_valid_m_2 ; wire gpr_rs1_rd_valid_iv_0_Z ; wire rv32c_instr_decoded_iv_2_Z ; wire un7_bcu_op_completing_ex_0_RNIGTKL51_Z ; wire gpr_rd_rs1_complete_ex_d_1_Z ; wire rv32c_dec_gpr_wr_valid_m_4 ; wire gpr_rd_rs1_complete_ex_0_s_a2 ; wire rv32i_dec_gpr_wr_valid_m ; wire rv32c_dec_gpr_rs1_rd_valid_1_m ; wire rv32c_instr_decoded ; wire un1_rv32i_instr_decoded_1_Z ; wire lsu_op_completing_ex_a0_2_Z ; wire gpr_rd_rs3_completing_ex_0_a1_1_0 ; wire bcu_m8_0 ; wire shift_op_complete_ex_a0_Z ; wire un4_bcu_op_completing_ex_0_Z ; wire un7_gpr_rd_rs1_completing_ex_0_Z ; wire shift_op_complete_ex_0_1_Z ; wire bcu_m8_3 ; wire gpr_m7_0_0 ; wire bcu_N_7_0 ; wire gpr_rd_rs1_complete_ex_0_s_0_2_0 ; wire un7_gpr_rd_rs3_completing_ex_0_Z ; wire un7_m4_0_a2_1_Z ; wire instr_m2_e_0 ; wire gpr_m4_0_a2_2 ; wire lsu_m6_0_a2_2 ; wire gpr_rd_rs3_completing_ex_0_a0_2 ; wire instr_completing_ex_6_4_1_Z ; wire un7_gpr_rd_rs3_completing_ex_1_2_0 ; wire lsu_op_complete_ex_out ; wire lsu_op_complete_ex_s_0_RNIHPCED_Z ; wire instr_completing_ex_6_4_a0_Z ; wire gpr_rd_rs1_complete_ex_0_s_a0_3 ; wire un3_bcu_op_sel_ex_RNIEO6RBD1_Z ; wire gpr_rd_rs1_complete_ex_d_1_a0_Z ; wire un7_gpr_rd_rs1_completing_ex_0_0_Z ; wire gpr_rd_rs1_complete_ex_0_c_1 ; wire instr_m2_0_a2_4_tz_0_0 ; wire un7_shift_op_completing_ex_Z ; wire ifu_m3_0_2 ; wire shift_op_complete_ex ; wire gpr_m7_0_1 ; wire gpr_rd_rs1_complete_ex_0_c_2 ; wire instr_m2_0_a2_2_tz ; wire gpr_rd_rs1_complete_ex_0_s_0_2_1 ; wire instr_m2_0_a2_5_2 ; wire gpr_rd_rs1_complete_ex_d_1_a3_Z ; wire ifu_m3_0_3 ; wire gpr_rd_rs1_complete_ex_0_s_0_1_1 ; wire un3_bcu_op_sel_ex_RNI7HFK1R_Z ; wire instr_m2_e_0_2 ; wire gpr_rd_rs1_complete_ex_d_2_Z ; wire instr_m2_0_a2_2_1 ; wire gpr_m7_0_3 ; wire instr_N_5_mux ; wire instr_m2_0_a2_5_5 ; wire gpr_rd_rs1_complete_ex_0_c ; wire un7_gpr_rd_rs3_completing_ex_d_Z ; wire instr_m2_0_a2_5_4 ; wire gpr_rd_rs1_complete_ex_0_0_0 ; wire un8_gpr_rd_rs2_completing_ex_Z ; wire instr_accepted_de_out ; wire instr_accepted_de_Z ; wire GND ; wire VCC ; CFG1 instr_accepted_ex_2_1_RNIEDMV8U3_0 ( .A(instr_accepted_ex_2_1_RNIEDMV8U3_Z), .Y(N_5927_i) ); defparam instr_accepted_ex_2_1_RNIEDMV8U3_0.INIT=2'h1; CFG2 instr_accepted_ex_2_1_RNISIFQHS3 ( .A(instr_accepted_ex_2_1_RNIEDMV8U3_Z), .B(instr_accepted_ex), .Y(instr_accepted_ex_2_1_RNISIFQHS3_1z) ); defparam instr_accepted_ex_2_1_RNISIFQHS3.INIT=4'hE; // @46:9353 CFG3 lsu_op_completing_ex_a2_0_RNI6OE601 ( .A(lsu_op_completing_ex_a2_0_Z), .B(cpu_N_6), .C(lsu_op_complete_ex_s_out), .Y(un7_gpr_rd_rs1_completing_ex_1_0_d_0_a1_1) ); defparam lsu_op_completing_ex_a2_0_RNI6OE601.INIT=8'h0D; // @46:10369 CFG4 un11_lsu_resp_ready_d ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .C(un11_lsu_resp_ready_d_0_Z), .D(trace_priv_i), .Y(un11_lsu_resp_ready_d_1z) ); defparam un11_lsu_resp_ready_d.INIT=16'h0040; // @46:8177 CFG4 gpr_rd_rs2_complete_ex_s_RNIE9L3621 ( .A(ex_retr_pipe_fence_i_retr_2_RNIVDG1K92_Z), .B(ifu_m5_1), .C(un7_gpr_rd_rs1_completing_ex_1_0_d_0), .D(un3_bcu_op_sel_ex_RNIAJT66B2_Z), .Y(gpr_rd_rs2_complete_ex_s_RNIE9L3621_Z) ); defparam gpr_rd_rs2_complete_ex_s_RNIE9L3621.INIT=16'hCD33; // @46:8177 CFG4 instr_completing_ex_6_4_a0_RNITCNU673 ( .A(ifu_m4_0), .B(un3_bcu_op_sel_ex_RNIAJT66B2_Z), .C(ifu_m1_e_1_0), .D(ifu_m1_e_0), .Y(ifu_m5_1) ); defparam instr_completing_ex_6_4_a0_RNITCNU673.INIT=16'h4474; // @46:8666 CFG2 instr_is_lsu_ldstr_ex_0_0_RNITU5E381_0 ( .A(req_masked[0]), .B(un4_m1_0_a2_0), .Y(instr_is_lsu_ldstr_ex_0_0_RNITU5E381_0_Z) ); defparam instr_is_lsu_ldstr_ex_0_0_RNITU5E381_0.INIT=4'h4; // @46:8666 CFG4 instr_is_lsu_ldstr_ex_0_0_RNICTBGR72 ( .A(instr_m3_1), .B(bcu_op_completing_ex_2), .C(un3_branch_cond_ex[1]), .D(instr_is_lsu_ldstr_ex_0_0_RNITU5E381_0_Z), .Y(instr_is_lsu_ldstr_ex_0_0_RNICTBGR72_Z) ); defparam instr_is_lsu_ldstr_ex_0_0_RNICTBGR72.INIT=16'hA0A3; // @46:14564 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4949_1_N_2L1 ( .A(ifu_expipe_resp_ireg_net[30]), .B(N_291_i), .C(N_131_i), .D(N_137_i), .Y(rv32i_dec_mnemonic4949_1_N_2L1) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4949_1_N_2L1 .INIT=16'h0400; // @46:14564 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4949_1_N_3L3 ( .A(ifu_expipe_resp_ireg_net[29]), .B(ifu_expipe_resp_ireg_net[20]), .C(rv32m_dec_mnemonic853_0), .D(N_32_mux_1), .Y(rv32i_dec_mnemonic4949_1_N_3L3) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4949_1_N_3L3 .INIT=16'h1000; // @46:14564 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4949_1 ( .A(rv32i_dec_mnemonic4949_1_N_2L1), .B(rv32i_dec_mnemonic4949_1_N_3L3), .C(N_568_1_0), .D(rv32i_dec_mnemonic4916_5), .Y(rv32i_dec_mnemonic4949_1) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4949_1 .INIT=16'h8000; // @46:8387 CFG4 de_ex_pipe_illegal_instr_ex_2_1_N_5L8 ( .A(sw_csr_wr_op_de[1]), .B(sw_csr_wr_op_de[0]), .C(de_ex_pipe_illegal_instr_ex_2_1_N_5L8_1_0_Z), .D(N_42), .Y(de_ex_pipe_illegal_instr_ex_2_1_N_5L8_Z) ); defparam de_ex_pipe_illegal_instr_ex_2_1_N_5L8.INIT=16'h00E0; // @46:8387 CFG4 de_ex_pipe_illegal_instr_ex_2_1_N_5L8_1_0 ( .A(N_58), .B(N_84), .C(N_72), .D(N_88), .Y(de_ex_pipe_illegal_instr_ex_2_1_N_5L8_1_0_Z) ); defparam de_ex_pipe_illegal_instr_ex_2_1_N_5L8_1_0.INIT=16'h070F; // @46:9663 CFG3 lsu_op_completing_ex_1_0_N_2L1 ( .A(lsu_op_completing_ex_a1_2_Z), .B(req_masked[1]), .C(lsu_op_completing_ex_1_2_1_Z), .Y(lsu_op_completing_ex_1_0_N_2L1_Z) ); defparam lsu_op_completing_ex_1_0_N_2L1.INIT=8'h07; // @46:9663 CFG4 lsu_op_completing_ex_1_0_N_3L3 ( .A(apb_i_req_addr_net_18), .B(un8_cpu_i_req_is_tcm0lto18_12_1), .C(cpu_m8_0_a3_0_2), .D(cpu_i_req_is_tcm0_5_0), .Y(lsu_op_completing_ex_1_0_N_3L3_Z) ); defparam lsu_op_completing_ex_1_0_N_3L3.INIT=16'h1000; // @46:9663 CFG4 lsu_op_completing_ex_1_0 ( .A(lsu_op_completing_ex_1_0_N_3L3_Z), .B(cpu_m8_0_a3_0_3), .C(lsu_op_completing_ex_1_0_N_2L1_Z), .D(d_N_7_0), .Y(lsu_op_completing_ex_1_0_1z) ); defparam lsu_op_completing_ex_1_0.INIT=16'h7F0F; // @46:8666 CFG4 gpr_rd_rs3_complete_ex_0_RNICHBA5T ( .A(un7_gpr_rd_rs3_completing_ex_1_2_1), .B(gpr_rd_rs3_complete_ex_0_Z), .C(instr_m3_e_N_5L8_1_1), .D(un7_gpr_rd_rs3_completing_ex_d_0), .Y(gpr_rd_rs3_complete_ex_0_RNICHBA5T_Z) ); defparam gpr_rd_rs3_complete_ex_0_RNICHBA5T.INIT=16'h0F1F; // @46:8666 CFG4 lsu_op_complete_ex_s_0_RNI63HIUN ( .A(un3_branch_cond_ex[0]), .B(instr_is_lsu_ldstr_ex_0_0_RNICTBGR72_Z), .C(instr_m3_e_N_5L8_1), .D(lsu_op_complete_ex_s_0_RNI1TBI281_Z), .Y(instr_m3_e_N_5L8_1_1) ); defparam lsu_op_complete_ex_s_0_RNI63HIUN.INIT=16'h001F; // @46:8666 CFG4 gpr_rd_rs3_complete_ex_0_RNIE5PQ8U3 ( .A(ifu_m1_e_0), .B(instr_m3_e_1_0), .C(instr_m3_e_1), .D(gpr_rd_rs3_complete_ex_0_RNICHBA5T_Z), .Y(instr_accepted_ex) ); defparam gpr_rd_rs3_complete_ex_0_RNIE5PQ8U3.INIT=16'h50D0; // @46:8666 CFG4 gpr_rd_rs3_complete_ex_s_RNIPLN4VG ( .A(ifu_m4_0), .B(instr_N_6_mux), .C(ifu_m1_e_0), .D(instr_valid_de_2_RNINIJB6_Z), .Y(instr_m3_e_1) ); defparam gpr_rd_rs3_complete_ex_s_RNIPLN4VG.INIT=16'h0023; // @46:8666 CFG4 ex_retr_pipe_fence_i_retr_2_RNI4UQJGH3 ( .A(gpr_N_8_0), .B(un3_branch_cond_ex[0]), .C(instr_is_lsu_ldstr_ex_0_0_RNICTBGR72_Z), .D(instr_m2_1_0_1_Z), .Y(instr_N_3_1) ); defparam ex_retr_pipe_fence_i_retr_2_RNI4UQJGH3.INIT=16'h0145; // @46:8666 CFG4 instr_m2_1_0_1 ( .A(cpu_i_req_is_dummy_target), .B(un3_cpu_i_req_ready), .C(un2_cpu_i_req_ready_x), .D(req_masked[0]), .Y(instr_m2_1_0_1_Z) ); defparam instr_m2_1_0_1.INIT=16'h0111; // @46:9439 CFG3 un3_bcu_op_sel_ex_RNI4LNGA_0 ( .A(un3_bcu_op_sel_ex_1z), .B(un3_branch_cond_ex[0]), .C(un3_branch_cond_ex[1]), .Y(un3_bcu_op_sel_ex_RNI4LNGA_0_Z) ); defparam un3_bcu_op_sel_ex_RNI4LNGA_0.INIT=8'h20; // @46:9439 CFG2 un6_alu_op_complete_ex_0_RNIE8JK3 ( .A(un6_alu_op_complete_ex), .B(instr_inhibit_ex), .Y(un6_alu_op_complete_ex_0_RNIE8JK3_Z) ); defparam un6_alu_op_complete_ex_0_RNIE8JK3.INIT=4'h1; // @46:9439 CFG4 bcu_op_completing_ex_4_a0_2_RNI3SN3NQ_0 ( .A(bcu_op_completing_ex_1_0), .B(bcu_op_completing_ex_2_0), .C(cpu_i_req_is_apb), .D(req_masked[0]), .Y(instr_m3_1) ); defparam bcu_op_completing_ex_4_a0_2_RNI3SN3NQ_0.INIT=16'h2232; // @46:9439 CFG4 ex_retr_exu_res_accept_retr_3_RNI02H86R ( .A(un3_bcu_op_sel_ex_RNI4LNGA_0_Z), .B(un6_alu_op_complete_ex_0_RNIE8JK3_Z), .C(ex_retr_exu_res_accept_retr_3_1z), .D(instr_m3_1), .Y(alu_op_complete_ex) ); defparam ex_retr_exu_res_accept_retr_3_RNI02H86R.INIT=16'h73F3; // @46:10363 CFG4 lsu_op_complete_retr_0_0 ( .A(un6_instr_is_lsu_op_retr_1z), .B(csr_complete_retr_x_Z), .C(exu_csr_op_wr_data14), .D(lsu_op_complete_retr_0_0_1_Z), .Y(lsu_op_complete_retr_0) ); defparam lsu_op_complete_retr_0_0.INIT=16'hA8FC; // @46:10155 CFG3 csr_complete_retr_x ( .A(un3_csr_complete_retr_Z), .B(exu_result_valid_retr_1z), .C(trace_priv_i), .Y(csr_complete_retr_x_Z) ); defparam csr_complete_retr_x.INIT=8'hFE; // @46:9542 CFG4 ex_retr_pipe_fence_i_retr_2_RNI5ILFJ1 ( .A(bcu_m5_i_a4_0_0), .B(bcu_m5_i_a4_0_1_1), .C(cpu_i_req_is_dummy_target), .D(un1_cpu_i_req_ready_x), .Y(bcu_N_4) ); defparam ex_retr_pipe_fence_i_retr_2_RNI5ILFJ1.INIT=16'hCCCE; // @46:8387 CFG4 de_ex_pipe_illegal_instr_ex_2_1 ( .A(de_ex_pipe_illegal_instr_ex_2_1_N_5L8_Z), .B(csr_rd_illegal_i_4), .C(case_dec_gpr_rs2_rd_sel_3_sqmuxa_Z), .D(csr_wr_illegal_i_4), .Y(de_ex_pipe_illegal_instr_ex_2_1_Z) ); defparam de_ex_pipe_illegal_instr_ex_2_1.INIT=16'h0F0D; // @46:13195 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4948_15 ( .A(ifu_expipe_resp_ireg_net[18]), .B(ifu_expipe_resp_ireg_net[19]), .C(N_141_i), .D(N_139_i), .Y(rv32i_dec_mnemonic4948_i_15) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4948_15 .INIT=16'h1000; // @46:9353 CFG4 un3_bcu_op_sel_ex_RNI16R57U3 ( .A(lsu_N_13_mux), .B(cpu_m8_0_a3_0_3), .C(un3_bcu_op_sel_ex_1z), .D(un7_gpr_rd_rs1_completing_ex_1_0_d_0_a1_1), .Y(un3_bcu_op_sel_ex_RNI16R57U3_Z) ); defparam un3_bcu_op_sel_ex_RNI16R57U3.INIT=16'h0207; // @46:14564 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4949 ( .A(rv32i_dec_mnemonic4948_i_15), .B(rv32i_dec_mnemonic4949_i_24), .C(rv32i_dec_mnemonic4949_i_25), .D(rv32i_dec_mnemonic4949_1), .Y(rv32i_dec_mnemonic4949) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4949 .INIT=16'h8000; // @46:8387 CFG4 de_ex_pipe_illegal_instr_ex_2 ( .A(de_ex_pipe_illegal_instr_ex_2_1_Z), .B(N_17), .C(rv32i_dec_illegal_instr_m), .D(rv32c_dec_illegal_instr_m), .Y(de_ex_pipe_illegal_instr_ex_2_1z) ); defparam de_ex_pipe_illegal_instr_ex_2.INIT=16'hFFF7; // @46:10363 CFG4 lsu_op_complete_retr_0_0_1 ( .A(cpu_d_resp_valid_d), .B(un11_lsu_resp_ready_d_1z), .C(un11_lsu_resp_ready_1_1), .D(un1_lsu_resp_valid_1), .Y(lsu_op_complete_retr_0_0_1_Z) ); defparam lsu_op_complete_retr_0_0_1.INIT=16'h0357; CFG3 un1_rv32c_dec_mnemonic2125_5_RNIQDDH9 ( .A(rv32c_dec_mnemonic2131), .B(un1_rv32c_dec_mnemonic2125_5_i_0), .C(rv32c_dec_mnemonic2128), .Y(g1_1_2) ); defparam un1_rv32c_dec_mnemonic2125_5_RNIQDDH9.INIT=8'h54; CFG3 \gen_decode_rv32i.rv32i_dec_mnemonic4915_3_0_RNIHA5E01 ( .A(N_290_i), .B(rv32i_dec_mnemonic4915_3_0), .C(N_210), .Y(g1_1_0) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4915_3_0_RNIHA5E01 .INIT=8'hF4; // @46:13195 CFG4 \rv32i_dec_alu_op_sel_0_a2_2_RNICVMQQ[0] ( .A(N_131_i), .B(N_160), .C(rv32i_dec_mnemonic4919_3), .D(N_155), .Y(N_150_0) ); defparam \rv32i_dec_alu_op_sel_0_a2_2_RNICVMQQ[0] .INIT=16'h4000; // @46:18188 CFG3 \gen_decode_rv32m.rv32m_dec_mnemonic848_RNI13T1N ( .A(rv32m_dec_mnemonic849), .B(rv32m_dec_mnemonic848), .C(case_dec_gpr_rs2_rd_sel_1_sqmuxa_Z), .Y(g1_0) ); defparam \gen_decode_rv32m.rv32m_dec_mnemonic848_RNI13T1N .INIT=8'h10; // @46:15460 CFG4 \gen_decode_rv32c.rv32c_dec_mnemonic2115_RNIRF1VG1 ( .A(g1_1_2), .B(un1_rv32c_dec_mnemonic2124_2_s6), .C(rv32c_dec_mnemonic2115), .D(rv32c_dec_mnemonic2132), .Y(rv32c_dec_alu_op_sel_0_0) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2115_RNIRF1VG1 .INIT=16'hCCCE; // @46:18188 CFG4 \rv32i_dec_alu_op_sel_0_a5_2_RNIVCD062[2] ( .A(N_152), .B(N_150_0), .C(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .D(g1_1_0), .Y(rv32i_dec_alu_op_sel_m_0_0) ); defparam \rv32i_dec_alu_op_sel_0_a5_2_RNIVCD062[2] .INIT=16'hF0E0; // @46:9557 CFG4 bcu_op_completing_ex_4_a0_2_RNIVRV8HL1 ( .A(bcu_op_completing_ex_2_1), .B(bcu_op_completing_ex_1), .C(cpu_m8_0_a3_0_3), .D(tcm0_i_req_valid_1), .Y(bcu_op_completing_ex_2_0) ); defparam bcu_op_completing_ex_4_a0_2_RNIVRV8HL1.INIT=16'hDCCC; // @46:9557 CFG2 bcu_op_completing_ex_4_a0_2_RNIRK2V1 ( .A(tcm0_i_req_ready_net_tz), .B(bcu_op_completing_ex_4_a0_2_Z), .Y(bcu_op_completing_ex_2_1) ); defparam bcu_op_completing_ex_4_a0_2_RNIRK2V1.INIT=4'h7; // @46:8666 CFG4 gpr_rd_rs2_complete_ex_s_RNIRBKDT71 ( .A(un3_branch_cond_ex[0]), .B(bcu_m5_i_a4_0_1_1), .C(un7_gpr_rd_rs1_completing_ex_1_0_d_0), .D(d_N_5_1), .Y(instr_m3_e_N_5L8_1) ); defparam gpr_rd_rs2_complete_ex_s_RNIRBKDT71.INIT=16'h0F0D; // @46:8666 CFG4 gpr_rd_rs3_complete_ex_s_RNIJAVNRK3 ( .A(un3_bcu_op_sel_ex_1z), .B(instr_m4_1), .C(instr_N_3_1), .D(gpr_rd_rs3_complete_ex_out), .Y(instr_N_6_mux) ); defparam gpr_rd_rs3_complete_ex_s_RNIJAVNRK3.INIT=16'h0203; // @46:8666 CFG3 exu_op_abort_ex_1_RNII91C63 ( .A(gpr_N_8_0), .B(ifu_m1_e_0), .C(bcu_m5_i_a4_0_1_1), .Y(instr_m4_1) ); defparam exu_op_abort_ex_1_RNII91C63.INIT=8'h3B; // @46:8666 CFG3 instr_valid_de_2_RNINIJB6 ( .A(un1_implicit_pseudo_instr_de), .B(instr_valid_de_2_Z), .C(ifu_m1_e_1_0), .Y(instr_valid_de_2_RNINIJB6_Z) ); defparam instr_valid_de_2_RNINIJB6.INIT=8'h15; // @46:9557 CFG4 bcu_op_completing_ex_4_a0_2_RNI3SN3NQ ( .A(bcu_op_completing_ex_1_0), .B(bcu_op_completing_ex_2_0), .C(cpu_i_req_is_apb), .D(req_masked[0]), .Y(bcu_op_completing_ex_4) ); defparam bcu_op_completing_ex_4_a0_2_RNI3SN3NQ.INIT=16'hDDCD; // @46:9557 CFG4 bcu_op_completing_ex_4_a0_2_RNIA0I5CT1 ( .A(apb_i_req_ready_net_tz), .B(bcu_op_completing_ex_4_a0_2_Z), .C(cpu_i_req_is_apb), .D(bcu_op_completing_ex_a2_0), .Y(bcu_op_completing_ex_1_0) ); defparam bcu_op_completing_ex_4_a0_2_RNIA0I5CT1.INIT=16'h707F; // @46:8717 CFG4 instr_completing_ex ( .A(instr_completing_ex_1_Z), .B(instr_completing_ex_6_6_Z), .C(lsu_op_complete_ex_s_0_RNI1TBI281_Z), .D(bcu_op_complete_ex_Z), .Y(instr_completing_ex_Z) ); defparam instr_completing_ex.INIT=16'h0400; // @46:8717 CFG4 instr_completing_ex_1 ( .A(un7_gpr_rd_rs3_completing_ex_d_0), .B(gpr_rd_rs3_complete_ex_out), .C(bcu_op_completing_ex), .D(instr_m3_e_1_0), .Y(instr_completing_ex_1_Z) ); defparam instr_completing_ex_1.INIT=16'h13FF; // @46:8717 CFG4 un7_gpr_rd_rs3_completing_ex_d_1_RNIBU5HQA2 ( .A(un7_gpr_rd_rs3_completing_ex_1_2), .B(N_1_48_2), .C(gpr_m7_0_1_0), .D(gpr_m7_0_5), .Y(gpr_rd_rs1_complete_ex_0_d) ); defparam un7_gpr_rd_rs3_completing_ex_d_1_RNIBU5HQA2.INIT=16'h2300; // @46:8717 CFG4 ex_retr_pipe_fence_i_retr_2_RNIDEGQM92 ( .A(gpr_N_8_0), .B(un3_branch_cond_ex[0]), .C(instr_is_lsu_ldstr_ex_0_0_RNICTBGR72_0_Z), .D(un1_cpu_i_req_ready), .Y(gpr_m7_0_1_0) ); defparam ex_retr_pipe_fence_i_retr_2_RNIDEGQM92.INIT=16'h3074; // @46:9344 CFG4 un8_gpr_rd_rs2_completing_ex_0 ( .A(un21_gpr_rd_rs2_completing_ex_Z), .B(un6_shift_op_complete_ex_Z), .C(un8_gpr_rd_rs2_completing_ex_0_1_Z), .D(ex_retr_exu_res_accept_retr_3_1z), .Y(un8_gpr_rd_rs2_completing_ex_0_Z) ); defparam un8_gpr_rd_rs2_completing_ex_0.INIT=16'hFF0E; // @46:9344 CFG3 un8_gpr_rd_rs2_completing_ex_0_1 ( .A(de_ex_pipe_operand1_mux_sel_ex[0]), .B(un6_alu_op_complete_ex), .C(de_ex_pipe_operand1_mux_sel_ex[1]), .Y(un8_gpr_rd_rs2_completing_ex_0_1_Z) ); defparam un8_gpr_rd_rs2_completing_ex_0_1.INIT=8'h01; // @46:18188 CFG4 \gpr_rs1_rd_sel_1_iv[0] ( .A(gpr_rs1_rd_sel_1_iv_0_Z[0]), .B(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .C(N_127), .D(gpr_rs1_rd_sel_1_iv_1_Z[0]), .Y(gpr_rs1_rd_sel_de[0]) ); defparam \gpr_rs1_rd_sel_1_iv[0] .INIT=16'hAAAE; // @46:18188 CFG4 \gpr_rs1_rd_sel_1_iv_1[0] ( .A(N_397), .B(un1_rv32c_dec_mnemonic2112_2_Z), .C(un1_instruction_13), .D(rv32c_dec_mnemonic2131), .Y(gpr_rs1_rd_sel_1_iv_1_Z[0]) ); defparam \gpr_rs1_rd_sel_1_iv_1[0] .INIT=16'h0444; // @46:18188 CFG4 \gpr_rs1_rd_sel_1_iv[2] ( .A(gpr_rs1_rd_sel_1_iv_0_Z[2]), .B(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .C(N_123), .D(gpr_rs1_rd_sel_1_iv_1_Z[2]), .Y(gpr_rs1_rd_sel_de[2]) ); defparam \gpr_rs1_rd_sel_1_iv[2] .INIT=16'hAAAE; // @46:18188 CFG4 \gpr_rs1_rd_sel_1_iv_1[2] ( .A(N_397), .B(un1_rv32c_dec_mnemonic2112_2_Z), .C(un1_instruction_13), .D(rv32c_dec_mnemonic2131), .Y(gpr_rs1_rd_sel_1_iv_1_Z[2]) ); defparam \gpr_rs1_rd_sel_1_iv_1[2] .INIT=16'h0444; // @46:13195 CFG4 \rv32i_dec_immediate_0_iv[0] ( .A(ifu_expipe_resp_ireg_net[20]), .B(un1_instruction_24_i), .C(rv32i_dec_immediate_0_iv_1_Z[0]), .D(un1_instruction_38_i), .Y(rv32i_dec_immediate[0]) ); defparam \rv32i_dec_immediate_0_iv[0] .INIT=16'hAF8F; // @46:13195 CFG4 \rv32i_dec_immediate_0_iv_1[0] ( .A(N_289_i), .B(N_127), .C(un1_instruction_7_i), .D(un1_instruction_14_i), .Y(rv32i_dec_immediate_0_iv_1_Z[0]) ); defparam \rv32i_dec_immediate_0_iv_1[0] .INIT=16'h4C5F; // @46:15460 CFG4 \rv32c_dec_gpr_rs1_rd_sel_0_iv_2[1] ( .A(N_125), .B(un1_instruction_13), .C(rv32c_dec_mnemonic2131), .D(rv32c_dec_gpr_rs1_rd_sel_0_iv_2_1_Z[1]), .Y(rv32c_dec_gpr_rs1_rd_sel_0_iv_2_Z[1]) ); defparam \rv32c_dec_gpr_rs1_rd_sel_0_iv_2[1] .INIT=16'h40FF; // @46:15460 CFG4 \rv32c_dec_gpr_rs1_rd_sel_0_iv_2_1[1] ( .A(un1_instruction_15_Z), .B(rv32c_dec_mnemonic2130), .C(rv32c_dec_mnemonic2118), .D(rv32c_dec_mnemonic2112), .Y(rv32c_dec_gpr_rs1_rd_sel_0_iv_2_1_Z[1]) ); defparam \rv32c_dec_gpr_rs1_rd_sel_0_iv_2_1[1] .INIT=16'h0013; // @46:9335 CFG4 gpr_wr_valid_retr_1_1_RNI4ESAH1 ( .A(gpr_N_10_mux_i_0_0_1z), .B(gpr_rs2_rd_data_valid_7), .C(gpr_m7_0_a3_0), .D(gpr_N_10_mux_i_0_1), .Y(gpr_rs2_rd_data_valid_ex) ); defparam gpr_wr_valid_retr_1_1_RNI4ESAH1.INIT=16'h0888; // @46:9335 CFG4 soft_reset_taken_retr_RNIKQ2OL ( .A(debug_enter_retr), .B(trace_priv_i), .C(machine_implicit_wr_mtval_tval_wr_en), .D(soft_reset_taken_retr_1z), .Y(gpr_N_10_mux_i_0_1) ); defparam soft_reset_taken_retr_RNIKQ2OL.INIT=16'h0045; // @46:9236 CFG4 \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_sel_ex_2_0[4] ( .A(un1_instruction_41_i), .B(N_129_i), .C(N_71), .D(de_ex_pipe_gpr_rs2_rd_sel_ex_2_0_1[4]), .Y(de_ex_pipe_gpr_rs2_rd_sel_ex_2[4]) ); defparam \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_sel_ex_2_0[4] .INIT=16'h40FF; // @46:9236 CFG4 \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_sel_ex_2_0_1[4] ( .A(cpu_debug_gpr_op_addr_net[4]), .B(trace_priv_i), .C(ifu_expipe_resp_ireg_net[24]), .D(N_72_0), .Y(de_ex_pipe_gpr_rs2_rd_sel_ex_2_0_1[4]) ); defparam \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_sel_ex_2_0_1[4] .INIT=16'h0777; // @46:9236 CFG4 \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_sel_ex_2_0[3] ( .A(un1_instruction_41_i), .B(N_131_i), .C(N_71), .D(de_ex_pipe_gpr_rs2_rd_sel_ex_2_0_1[3]), .Y(de_ex_pipe_gpr_rs2_rd_sel_ex_2[3]) ); defparam \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_sel_ex_2_0[3] .INIT=16'hE0FF; // @46:9236 CFG4 \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_sel_ex_2_0_1[3] ( .A(cpu_debug_gpr_op_addr_net[3]), .B(trace_priv_i), .C(ifu_expipe_resp_ireg_net[23]), .D(N_72_0), .Y(de_ex_pipe_gpr_rs2_rd_sel_ex_2_0_1[3]) ); defparam \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_sel_ex_2_0_1[3] .INIT=16'h0777; // @46:9944 CFG4 gpr_rd_rs3_complete_ex_s_RNI623QO6 ( .A(instr_inhibit_ex), .B(instr_accepted_retr_2), .C(de_ex_pipe_gpr_wr_en_ex), .D(N_12_i_1_Z), .Y(N_12_i) ); defparam gpr_rd_rs3_complete_ex_s_RNI623QO6.INIT=16'h4073; // @46:9944 CFG3 N_12_i_1 ( .A(cpu_debug_gpr_op_valid_net), .B(cpu_debug_gpr_wr_en_net), .C(trace_priv_i), .Y(N_12_i_1_Z) ); defparam N_12_i_1.INIT=8'h7F; // @46:13195 CFG4 \rv32i_dec_bcu_op_sel.m17 ( .A(un1_instruction_29_1_1z), .B(m17_2_1), .C(m17_1_0), .D(rv32i_dec_mnemonic4949), .Y(N_24_mux) ); defparam \rv32i_dec_bcu_op_sel.m17 .INIT=16'h00DF; // @46:13195 CFG4 \rv32i_dec_bcu_op_sel.m17_1_1 ( .A(N_291_i), .B(N_133_i), .C(N_129_i), .D(i9_mux), .Y(m17_1_0) ); defparam \rv32i_dec_bcu_op_sel.m17_1_1 .INIT=16'h3130; // @46:13195 CFG4 \rv32i_dec_shifter_unit_op_sel_1_0_.m19 ( .A(N_133_i), .B(ifu_expipe_resp_ireg_net[30]), .C(m19_1), .D(N_32_mux), .Y(rv32i_dec_shifter_unit_op_sel_0) ); defparam \rv32i_dec_shifter_unit_op_sel_1_0_.m19 .INIT=16'h7850; // @46:13195 CFG4 \rv32i_dec_shifter_unit_op_sel_1_0_.m19_1 ( .A(N_133_i), .B(N_131_i), .C(N_290_i), .D(N_7), .Y(m19_1) ); defparam \rv32i_dec_shifter_unit_op_sel_1_0_.m19_1 .INIT=16'h0E0A; // @46:18188 CFG4 \gpr_wr_sel_1_iv_RNO_0[3] ( .A(rv32c_dec_gpr_wr_sel_sn_N_10_mux), .B(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .C(rv32c_dec_gpr_wr_sel_sn_N_6), .D(rv32c_dec_gpr_wr_sel_m_1[3]), .Y(rv32c_dec_gpr_wr_sel_m[3]) ); defparam \gpr_wr_sel_1_iv_RNO_0[3] .INIT=16'h40C8; // @46:18188 CFG4 \gpr_wr_sel_1_iv_RNO_1[3] ( .A(N_121_i), .B(un1_instruction_37_Z), .C(un1_instruction_13), .D(rv32c_dec_gpr_wr_sel_sn_N_7), .Y(rv32c_dec_gpr_wr_sel_m_1[3]) ); defparam \gpr_wr_sel_1_iv_RNO_1[3] .INIT=16'h44F5; // @46:13195 CFG4 \rv32i_dec_gpr_rs1_rd_valid.m15 ( .A(N_168), .B(ifu_expipe_resp_ireg_net[30]), .C(m15_1), .D(N_7_1), .Y(N_46_mux) ); defparam \rv32i_dec_gpr_rs1_rd_valid.m15 .INIT=16'hFAF2; // @46:13195 CFG4 \rv32i_dec_gpr_rs1_rd_valid.m15_1 ( .A(N_3), .B(N_168), .C(N_131_i), .D(N_115_i), .Y(m15_1) ); defparam \rv32i_dec_gpr_rs1_rd_valid.m15_1 .INIT=16'h0F22; // @46:13195 CFG4 \rv32i_dec_gpr_rs2_rd_valid.m12 ( .A(rv32i_dec_mnemonic4916_5), .B(N_133_i), .C(un1_rv32i_dec_mnemonic4960_1_i_a17_0_Z), .D(m12_1), .Y(N_13) ); defparam \rv32i_dec_gpr_rs2_rd_valid.m12 .INIT=16'hFEF2; // @46:13195 CFG4 \rv32i_dec_gpr_rs2_rd_valid.m12_1 ( .A(rv32i_dec_shifter_unit_places_2[2]), .B(ifu_expipe_resp_ireg_net[31]), .C(N_24_mux_0), .D(rv32i_dec_shifter_unit_places_3[2]), .Y(m12_1) ); defparam \rv32i_dec_gpr_rs2_rd_valid.m12_1 .INIT=16'h2000; // @46:15460 CFG4 \rv32c_dec_lsu_op_1_iv[0] ( .A(rv32c_dec_lsu_op_1_iv_1_Z[0]), .B(rv32c_dec_lsu_op_1_iv_0_tz_Z[0]), .C(un83_rv32i_dec_gpr_wr_valid), .D(rv32c_dec_mnemonic2130_0), .Y(rv32c_dec_lsu_op[0]) ); defparam \rv32c_dec_lsu_op_1_iv[0] .INIT=16'h0FEE; // @46:15460 CFG4 \rv32c_dec_lsu_op_1_iv_1[0] ( .A(N_141_i), .B(rv32c_dec_mnemonic2136_s24_0), .C(un1_instruction_26_1), .D(rv32i_dec_mnemonic4919_3), .Y(rv32c_dec_lsu_op_1_iv_1_Z[0]) ); defparam \rv32c_dec_lsu_op_1_iv_1[0] .INIT=16'h5444; // @46:9681 CFG4 lsu_req_valid_3 ( .A(req_buff_fence_os_0), .B(lsu_req_valid_3_1_Z), .C(un3_irq_stall_lsu_req), .D(un1_irq_stall_lsu_req), .Y(lsu_req_valid_3_Z) ); defparam lsu_req_valid_3.INIT=16'h0444; // @46:9681 CFG4 lsu_req_valid_3_1 ( .A(req_buff_resp_state_valid[0]), .B(un6_req_buff_load_os), .C(lsu_req_valid_1_1_Z), .D(req_buff_resp_state_valid[1]), .Y(lsu_req_valid_3_1_Z) ); defparam lsu_req_valid_3_1.INIT=16'h0777; // @46:14609 CFG4 un1_rv32c_dec_mnemonic2137_1_2_o2 ( .A(N_596), .B(un1_rv32c_dec_mnemonic2137_1_2_o2_1_Z), .C(N_289_i), .D(N_290_i), .Y(N_587) ); defparam un1_rv32c_dec_mnemonic2137_1_2_o2.INIT=16'hAEBB; // @46:14609 CFG4 un1_rv32c_dec_mnemonic2137_1_2_o2_1 ( .A(N_289_i), .B(N_139_i), .C(N_582), .D(N_115_i), .Y(un1_rv32c_dec_mnemonic2137_1_2_o2_1_Z) ); defparam un1_rv32c_dec_mnemonic2137_1_2_o2_1.INIT=16'h0046; // @46:18188 CFG4 gpr_rs2_rd_valid_iv_RNO_0 ( .A(un1_instruction_11_i), .B(rv32c_dec_gpr_rs2_rd_valid_m_1), .C(rv32c_dec_mnemonic1881), .D(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .Y(rv32c_dec_gpr_rs2_rd_valid_m) ); defparam gpr_rs2_rd_valid_iv_RNO_0.INIT=16'h1B00; // @46:18188 CFG3 gpr_rs2_rd_valid_iv_RNO_1 ( .A(un83_rv32i_dec_gpr_wr_valid), .B(un1_rv32c_dec_mnemonic2125_4_i), .C(rv32c_dec_mnemonic2115), .Y(rv32c_dec_gpr_rs2_rd_valid_m_1) ); defparam gpr_rs2_rd_valid_iv_RNO_1.INIT=8'h53; // @46:8300 CFG3 \rv32c_dec_alu_op_sel_1_iv_3_RNO[0] ( .A(un1_rv32c_dec_mnemonic2115_4_Z), .B(N_289_i), .C(un1_rv32c_dec_mnemonic2116_9_s1_1), .Y(un1_rv32c_dec_mnemonic2116_9_s1) ); defparam \rv32c_dec_alu_op_sel_1_iv_3_RNO[0] .INIT=8'h01; // @46:8300 CFG4 \rv32c_dec_alu_op_sel_1_iv_3_RNO_0[0] ( .A(N_141_i), .B(N_139_i), .C(N_290_i), .D(N_130_i_Z), .Y(un1_rv32c_dec_mnemonic2116_9_s1_1) ); defparam \rv32c_dec_alu_op_sel_1_iv_3_RNO_0[0] .INIT=16'h545E; // @46:9681 CFG4 lsu_req_valid_1_1 ( .A(req_buff_resp_state_1_[3]), .B(req_buff_resp_state_1_[2]), .C(req_buff_resp_state_1_[1]), .D(req_buff_resp_state_1_[0]), .Y(lsu_req_valid_1_1_Z) ); defparam lsu_req_valid_1_1.INIT=16'h1714; // @46:13195 CFG4 un1_instruction_38 ( .A(N_137_i), .B(N_291_i), .C(un1_instruction_38_1_0_Z), .D(N_129_i), .Y(un1_instruction_38_i) ); defparam un1_instruction_38.INIT=16'h3210; // @46:13195 CFG4 un1_instruction_38_1_0 ( .A(N_133_i), .B(N_131_i), .C(N_117_i), .D(N_115_i), .Y(un1_instruction_38_1_0_Z) ); defparam un1_instruction_38_1_0.INIT=16'h3313; // @46:15460 CFG4 rv32c_dec_bcu_op_sel_iv_1_1 ( .A(un1_instruction_22_i), .B(rv32c_dec_mnemonic2128), .C(N_289_i), .D(rv32c_dec_bcu_op_sel_iv_1_1_1_Z), .Y(rv32c_dec_bcu_op_sel_iv_1_1_Z) ); defparam rv32c_dec_bcu_op_sel_iv_1_1.INIT=16'hFCEE; // @46:15460 CFG4 rv32c_dec_bcu_op_sel_iv_1_1_1 ( .A(N_115_i), .B(N_290_i), .C(N_139_i), .D(N_289_i), .Y(rv32c_dec_bcu_op_sel_iv_1_1_1_Z) ); defparam rv32c_dec_bcu_op_sel_iv_1_1_1.INIT=16'h0450; // @46:15460 CFG4 \rv32c_dec_lsu_op_1_iv_0_tz_0[0] ( .A(rv32c_dec_mnemonic2135_0), .B(rv32c_dec_lsu_op_1_iv_0_tz_0_1_Z[0]), .C(N_141_i), .D(N_139_i), .Y(un1_rv32c_dec_mnemonic2114_1_0) ); defparam \rv32c_dec_lsu_op_1_iv_0_tz_0[0] .INIT=16'h2322; // @46:15460 CFG3 \rv32c_dec_lsu_op_1_iv_0_tz_0_1[0] ( .A(N_290_i), .B(N_289_i), .C(N_115_i), .Y(rv32c_dec_lsu_op_1_iv_0_tz_0_1_Z[0]) ); defparam \rv32c_dec_lsu_op_1_iv_0_tz_0_1[0] .INIT=8'h7F; // @46:14609 CFG4 un1_rv32c_dec_mnemonic2137_1_2_a2_8 ( .A(un1_rv32c_dec_mnemonic2137_1_2_a2_8_1_Z), .B(rv32c_dec_mnemonic2126), .C(rv32c_dec_mnemonic2123), .D(rv32c_dec_mnemonic2112), .Y(un1_rv32c_dec_mnemonic2137_1_2_a2_8_Z) ); defparam un1_rv32c_dec_mnemonic2137_1_2_a2_8.INIT=16'h0002; // @46:14609 CFG4 un1_rv32c_dec_mnemonic2137_1_2_a2_8_1 ( .A(rv32c_dec_mnemonic2124), .B(rv32c_dec_mnemonic2125), .C(rv32c_dec_mnemonic2122), .D(rv32c_dec_mnemonic2115), .Y(un1_rv32c_dec_mnemonic2137_1_2_a2_8_1_Z) ); defparam un1_rv32c_dec_mnemonic2137_1_2_a2_8_1.INIT=16'h0001; // @46:10369 CFG3 un11_lsu_resp_ready_c_1 ( .A(ex_retr_pipe_lsu_op_retr[1]), .B(un11_lsu_resp_ready_c_0_Z), .C(ex_retr_pipe_lsu_op_retr[2]), .Y(un11_lsu_resp_ready_c_1_Z) ); defparam un11_lsu_resp_ready_c_1.INIT=8'h04; // @46:15460 CFG3 \rv32c_dec_lsu_op_1_iv_0_tz[0] ( .A(rv32c_dec_mnemonic2114_3), .B(rv32c_dec_mnemonic2133), .C(rv32c_dec_lsu_op_1_iv_0_tz_1_Z[0]), .Y(rv32c_dec_lsu_op_1_iv_0_tz_Z[0]) ); defparam \rv32c_dec_lsu_op_1_iv_0_tz[0] .INIT=8'hFE; // @46:13195 CFG3 \rv32i_dec_bcu_op_sel.m4 ( .A(N_131_i), .B(N_2), .C(N_6), .Y(i9_mux) ); defparam \rv32i_dec_bcu_op_sel.m4 .INIT=8'hF4; // @46:8136 CFG2 ifu_expipe_req_branch_excpt_req_fenci ( .A(un1_instr_inhibit_ex_1z), .B(ex_retr_pipe_fence_i_retr_2_1z), .Y(ifu_expipe_req_branch_excpt_req_fenci_net) ); defparam ifu_expipe_req_branch_excpt_req_fenci.INIT=4'h4; // @46:9352 CFG2 gpr_rd_rs1_complete_ex_s ( .A(un1_instr_inhibit_ex_1z), .B(d_m5_a0_0), .Y(gpr_rd_rs1_complete_ex_out) ); defparam gpr_rd_rs1_complete_ex_s.INIT=4'hB; // @46:10024 CFG3 gpr_rs1_rd_valid_mux ( .A(un1_instr_inhibit_ex_1z), .B(d_m5_a0_0), .C(gpr_rs1_rd_valid_mux_0_1z), .Y(gpr_rs1_rd_valid_mux_1z) ); defparam gpr_rs1_rd_valid_mux.INIT=8'h40; // @46:8717 CFG3 un1_instr_inhibit_ex_RNINO19L ( .A(un1_instr_inhibit_ex_1z), .B(d_m5_a0_0), .C(ifu_m3_a0_1), .Y(gpr_rd_rs1_complete_ex_0_s_a0_2) ); defparam un1_instr_inhibit_ex_RNINO19L.INIT=8'h40; // @46:15460 CFG3 \rv32c_dec_immediate_13_m[9] ( .A(N_117_i), .B(un1_instruction_15_Z), .C(rv32c_dec_mnemonic2118), .Y(rv32c_dec_immediate_13_m_Z[9]) ); defparam \rv32c_dec_immediate_13_m[9] .INIT=8'h80; // @46:9663 CFG2 lsu_op_completing_ex_a2_0 ( .A(lsu_expipe_req_valid_net), .B(alloc_req_buff_1_1_0), .Y(lsu_op_completing_ex_a2_0_Z) ); defparam lsu_op_completing_ex_a2_0.INIT=4'h8; // @46:9546 CFG2 lsu_op_complete_ex_s_s_RNICNKKE3 ( .A(cpu_m8_0_a3_0_2), .B(lsu_op_complete_ex_s_out), .Y(bcu_op_completing_ex_2_0_a0_1) ); defparam lsu_op_complete_ex_s_s_RNICNKKE3.INIT=4'h2; // @46:9546 CFG3 lsu_op_completing_ex_a2_0_RNI8LD7F1 ( .A(lsu_op_completing_ex_a2_0_Z), .B(lsu_op_complete_ex_s_out), .C(bcu_op_completing_ex_2_1_1_0), .Y(bcu_op_completing_ex_2_1_1) ); defparam lsu_op_completing_ex_a2_0_RNI8LD7F1.INIT=8'hE0; // @46:15460 CFG4 \rv32c_dec_gpr_wr_sel_1[2] ( .A(N_133_i), .B(rv32c_dec_mnemonic2116), .C(un1_rv32c_dec_mnemonic2114_1_i), .D(rv32c_dec_gpr_wr_sel_sn_N_10_mux), .Y(rv32c_dec_gpr_wr_sel_1_Z[2]) ); defparam \rv32c_dec_gpr_wr_sel_1[2] .INIT=16'h0002; // @46:15460 CFG4 \rv32c_dec_gpr_wr_sel_1[1] ( .A(N_291_i), .B(rv32c_dec_mnemonic2116), .C(un1_rv32c_dec_mnemonic2114_1_i), .D(rv32c_dec_gpr_wr_sel_sn_N_10_mux), .Y(rv32c_dec_gpr_wr_sel_1_Z[1]) ); defparam \rv32c_dec_gpr_wr_sel_1[1] .INIT=16'h0002; // @46:13195 CFG2 \rv32i_dec_gpr_rs1_rd_valid.m6_2_1 ( .A(N_117_i), .B(N_131_i), .Y(N_3) ); defparam \rv32i_dec_gpr_rs1_rd_valid.m6_2_1 .INIT=4'h1; // @46:13195 CFG2 \rv32i_dec_gpr_rs1_rd_valid.m22_3_1 ( .A(N_131_i), .B(N_133_i), .Y(un1_rv32i_dec_mnemonic4960_1_i_a17_2_1_0) ); defparam \rv32i_dec_gpr_rs1_rd_valid.m22_3_1 .INIT=4'h4; // @46:13195 CFG2 \rv32i_dec_gpr_rs2_rd_valid.m12_0_1 ( .A(N_290_i), .B(N_117_i), .Y(N_564_1) ); defparam \rv32i_dec_gpr_rs2_rd_valid.m12_0_1 .INIT=4'h1; // @46:13195 CFG2 \rv32i_dec_bcu_op_sel.m11_2_1 ( .A(N_115_i), .B(N_117_i), .Y(rv32m_dec_mnemonic848_1) ); defparam \rv32i_dec_bcu_op_sel.m11_2_1 .INIT=4'h2; // @46:18188 CFG2 \gen_decode_rv32m.rv32m_dec_mnemonic850_RNIERC8F ( .A(rv32m_dec_mnemonic852), .B(rv32m_dec_mnemonic850), .Y(rv32m_dec_alu_op_sel_m_0_0) ); defparam \gen_decode_rv32m.rv32m_dec_mnemonic850_RNIERC8F .INIT=4'h1; // @46:13195 CFG2 un1_rv32i_dec_mnemonic4915_1_5 ( .A(rv32i_dec_mnemonic4948), .B(rv32i_dec_mnemonic4956), .Y(un1_rv32i_dec_mnemonic4915_1_5_Z) ); defparam un1_rv32i_dec_mnemonic4915_1_5.INIT=4'hE; // @46:15082 CFG2 \gen_decode_rv32m.rv32m_dec_mnemonic848_0_0 ( .A(N_290_i), .B(N_129_i), .Y(rv32m_dec_mnemonic848_0) ); defparam \gen_decode_rv32m.rv32m_dec_mnemonic848_0_0 .INIT=4'h1; // @46:13195 CFG2 \gen_decode_rv32i.rv32i_dec_mnemonic4954_0_0 ( .A(N_117_i), .B(N_291_i), .Y(rv32i_dec_mnemonic4954_0) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4954_0_0 .INIT=4'h1; // @46:15460 CFG2 \rv32c_dec_mnemonic2124.rv32c_dec_mnemonic2124_1_0 ( .A(N_131_i), .B(N_119_i), .Y(rv32c_dec_mnemonic2124_1_0) ); defparam \rv32c_dec_mnemonic2124.rv32c_dec_mnemonic2124_1_0 .INIT=4'h4; // @46:18188 CFG2 \rv32i_dec_alu_op_sel_m_1[4] ( .A(N_139_i), .B(N_141_i), .Y(un1_instruction_29_1_1z) ); defparam \rv32i_dec_alu_op_sel_m_1[4] .INIT=4'h8; // @46:18188 CFG2 \rv32i_dec_alu_op_sel_m_0[4] ( .A(N_137_i), .B(N_291_i), .Y(rv32i_dec_alu_op_sel_m_0_2) ); defparam \rv32i_dec_alu_op_sel_m_0[4] .INIT=4'h1; // @46:18188 CFG2 \gen_decode_rv32c.rv32c_dec_mnemonic2115_RNIMTARA ( .A(un83_rv32i_dec_gpr_wr_valid), .B(rv32c_dec_mnemonic2115), .Y(rv32c_dec_fence_i_m_0) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2115_RNIMTARA .INIT=4'h8; // @46:13195 CFG2 \rv32i_dec_shifter_unit_op_sel_1_0_.m15_0 ( .A(N_117_i), .B(ifu_expipe_resp_ireg_net[31]), .Y(rv32m_dec_mnemonic847_0) ); defparam \rv32i_dec_shifter_unit_op_sel_1_0_.m15_0 .INIT=4'h2; // @46:14564 CFG2 \gen_decode_rv32i.rv32i_dec_mnemonic4949_0_0 ( .A(N_129_i), .B(ifu_expipe_resp_ireg_net[31]), .Y(rv32m_dec_mnemonic853_0) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4949_0_0 .INIT=4'h1; // @46:13195 CFG2 \rv32i_dec_alu_op_sel_0_a5_2_0[2] ( .A(N_131_i), .B(N_133_i), .Y(rv32i_dec_alu_op_sel_0_a5_2_0_Z[2]) ); defparam \rv32i_dec_alu_op_sel_0_a5_2_0[2] .INIT=4'h8; // @46:13195 CFG2 rv32i_dec_sw_csr_rd_op_cnst_1 ( .A(rv32i_dec_mnemonic4954), .B(rv32i_dec_mnemonic4951), .Y(N_527_1) ); defparam rv32i_dec_sw_csr_rd_op_cnst_1.INIT=4'hE; // @46:13195 CFG2 \rv32i_dec_immediate_0[20] ( .A(un1_instruction_14_i), .B(un1_instruction_15_i), .Y(N_482_2) ); defparam \rv32i_dec_immediate_0[20] .INIT=4'hE; // @46:13195 CFG2 \rv32i_dec_alu_op_sel_4_.m8_e_0 ( .A(ifu_expipe_resp_ireg_net[26]), .B(ifu_expipe_resp_ireg_net[27]), .Y(rv32i_dec_shifter_unit_places_3[2]) ); defparam \rv32i_dec_alu_op_sel_4_.m8_e_0 .INIT=4'h1; // @46:13195 CFG2 \gen_decode_rv32i.rv32i_dec_mnemonic4912_0 ( .A(N_129_i), .B(N_291_i), .Y(N_95_2) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4912_0 .INIT=4'h1; // @46:15460 CFG2 rv32c_dec_bcu_op_sel_iv_1_a8_0_1 ( .A(N_290_i), .B(N_141_i), .Y(un1_instruction_22_i) ); defparam rv32c_dec_bcu_op_sel_iv_1_a8_0_1.INIT=4'h2; // @46:15460 CFG2 \gen_decode_rv32c.rv32c_dec_mnemonic2135_0 ( .A(N_139_i), .B(N_141_i), .Y(rv32c_dec_mnemonic2135_0) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2135_0 .INIT=4'h1; // @46:13195 CFG2 \gen_decode_rv32i.rv32i_dec_mnemonic4917_3 ( .A(N_290_i), .B(N_137_i), .Y(rv32i_dec_mnemonic4917_3) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4917_3 .INIT=4'h2; // @46:15460 CFG2 \gen_decode_rv32c.rv32c_dec_mnemonic2132_3 ( .A(N_290_i), .B(N_115_i), .Y(rv32i_dec_mnemonic4916_5) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2132_3 .INIT=4'h1; // @46:15460 CFG2 un1_rv32c_dec_mnemonic2114_1_RNI5AAK5 ( .A(un1_rv32c_dec_mnemonic2114_1_i), .B(rv32c_dec_mnemonic2116), .Y(rv32c_dec_gpr_wr_sel_sn_N_6) ); defparam un1_rv32c_dec_mnemonic2114_1_RNI5AAK5.INIT=4'h1; // @46:15460 CFG2 \gen_decode_rv32c.rv32c_dec_mnemonic2132_RNIPQTN7 ( .A(rv32c_dec_mnemonic2131), .B(rv32c_dec_mnemonic2132), .Y(rv32c_dec_gpr_wr_sel_sn_N_7) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2132_RNIPQTN7 .INIT=4'h1; // @46:13195 CFG2 \rv32i_dec_alu_op_sel_0_a2[2] ( .A(N_129_i), .B(N_131_i), .Y(N_566_1) ); defparam \rv32i_dec_alu_op_sel_0_a2[2] .INIT=4'h8; // @46:13195 CFG2 un1_rv32i_dec_mnemonic4911_5 ( .A(rv32i_dec_mnemonic4957), .B(rv32i_dec_mnemonic4956), .Y(rv32i_instr_decoded_4) ); defparam un1_rv32i_dec_mnemonic4911_5.INIT=4'hE; // @46:13195 CFG2 \rv32i_dec_branch_cond_2[0] ( .A(rv32i_dec_mnemonic4949), .B(rv32i_dec_mnemonic4958), .Y(rv32i_instr_decoded_8) ); defparam \rv32i_dec_branch_cond_2[0] .INIT=4'hE; // @46:8234 CFG2 \gen_trig_de.un29_csr_trigger_wr_hzd_de_1 ( .A(ex_retr_pipe_sw_csr_addr_retr[7]), .B(ex_retr_pipe_sw_csr_addr_retr[5]), .Y(un29_csr_trigger_wr_hzd_de_1) ); defparam \gen_trig_de.un29_csr_trigger_wr_hzd_de_1 .INIT=4'h8; // @46:9376 CFG2 \sw_csr_wr_op_ex[1] ( .A(un1_gpr_wr_mux_sel_ex_i), .B(de_ex_pipe_sw_csr_wr_op_ex[1]), .Y(sw_csr_wr_op_ex_Z[1]) ); defparam \sw_csr_wr_op_ex[1] .INIT=4'h8; // @46:16276 CFG2 \gen_decode_rv32c.rv32c_dec_mnemonic1725 ( .A(un83_rv32i_dec_gpr_wr_valid), .B(un1_instruction_13), .Y(rv32c_dec_mnemonic1725) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic1725 .INIT=4'h4; // @46:18188 CFG2 m_env_call ( .A(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .B(rv32i_dec_mnemonic4956), .Y(m_env_call_de) ); defparam m_env_call.INIT=4'h8; // @46:13195 CFG2 \rv32i_dec_lsu_op_0_o2[3] ( .A(N_115_i), .B(N_131_i), .Y(N_28) ); defparam \rv32i_dec_lsu_op_0_o2[3] .INIT=4'hB; // @46:13195 CFG2 \rv32i_dec_bcu_op_sel.m1 ( .A(N_115_i), .B(N_137_i), .Y(N_2) ); defparam \rv32i_dec_bcu_op_sel.m1 .INIT=4'h1; // @46:15082 CFG2 un1_instruction_29_3 ( .A(N_137_i), .B(ifu_expipe_resp_ireg_net[25]), .Y(un1_instruction_29_3_Z) ); defparam un1_instruction_29_3.INIT=4'h4; // @46:15082 CFG2 un1_instruction_29_5 ( .A(N_290_i), .B(ifu_expipe_resp_ireg_net[26]), .Y(un1_instruction_29_5_Z) ); defparam un1_instruction_29_5.INIT=4'h1; // @46:12789 CFG2 un1_debug_exit ( .A(debug_exit_retr), .B(un1_core_reset_1_i), .Y(un1_debug_exit_Z) ); defparam un1_debug_exit.INIT=4'hE; // @46:18188 CFG2 wfi ( .A(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .B(rv32i_dec_mnemonic4960), .Y(wfi_de) ); defparam wfi.INIT=4'h8; // @46:13195 CFG2 \rv32i_dec_gpr_wr_mux_sel_0_o6_1[1] ( .A(N_115_i), .B(N_117_i), .Y(N_206) ); defparam \rv32i_dec_gpr_wr_mux_sel_0_o6_1[1] .INIT=4'hB; // @46:13195 CFG2 \rv32i_dec_immediate[12] ( .A(un1_instruction), .B(rv32i_dec_mnemonic4913), .Y(N_482_1) ); defparam \rv32i_dec_immediate[12] .INIT=4'hE; // @46:13195 CFG2 \immediate_0_RNO[26] ( .A(un1_instruction), .B(ifu_expipe_resp_ireg_net[26]), .Y(instruction_m_1[26]) ); defparam \immediate_0_RNO[26] .INIT=4'h8; // @46:13195 CFG2 \immediate_0_RNO[28] ( .A(un1_instruction), .B(ifu_expipe_resp_ireg_net[28]), .Y(instruction_m_1[28]) ); defparam \immediate_0_RNO[28] .INIT=4'h8; // @46:13195 CFG2 \immediate_0_RNO[30] ( .A(un1_instruction), .B(ifu_expipe_resp_ireg_net[30]), .Y(instruction_m_1[30]) ); defparam \immediate_0_RNO[30] .INIT=4'h8; // @46:13195 CFG2 \gen_decode_rv32i.rv32i_dec_mnemonic4953_5 ( .A(N_115_i), .B(N_291_i), .Y(rv32i_dec_mnemonic4953_5) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4953_5 .INIT=4'h1; // @46:13195 CFG2 \gen_decode_rv32i.rv32i_dec_mnemonic4952_5 ( .A(N_290_i), .B(N_291_i), .Y(rv32i_dec_mnemonic4952_5) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4952_5 .INIT=4'h1; // @46:13195 CFG2 \gen_decode_rv32i.rv32i_dec_mnemonic4951_3 ( .A(N_115_i), .B(N_129_i), .Y(rv32i_dec_mnemonic4951_i_3) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4951_3 .INIT=4'h8; // @46:13195 CFG2 \gen_decode_rv32i.rv32i_dec_mnemonic4950_3 ( .A(N_129_i), .B(N_117_i), .Y(rv32i_dec_mnemonic4950_3) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4950_3 .INIT=4'h8; // @46:9235 CFG2 \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_sel_ex5 ( .A(instr_accepted_ex), .B(trace_priv_i), .Y(de_ex_pipe_gpr_rs2_rd_sel_ex5) ); defparam \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_sel_ex5 .INIT=4'hE; // @46:15460 CFG2 un1_instruction_27_2 ( .A(N_115_i), .B(N_289_i), .Y(un1_instruction_27_2_Z) ); defparam un1_instruction_27_2.INIT=4'h4; // @46:15460 CFG2 \rv32c_dec_mnemonic2123.rv32c_dec_mnemonic2123_1 ( .A(N_131_i), .B(N_139_i), .Y(rv32c_dec_mnemonic2123_1) ); defparam \rv32c_dec_mnemonic2123.rv32c_dec_mnemonic2123_1 .INIT=4'h2; // @46:9376 CFG2 \sw_csr_wr_op_ex[0] ( .A(un1_gpr_wr_mux_sel_ex_i), .B(de_ex_pipe_sw_csr_wr_op_ex[0]), .Y(sw_csr_wr_op_ex_Z[0]) ); defparam \sw_csr_wr_op_ex[0] .INIT=4'h8; // @46:8234 CFG2 \gen_trig_de.un29_csr_trigger_wr_hzd_de_4 ( .A(ex_retr_pipe_sw_csr_addr_retr[2]), .B(ex_retr_pipe_sw_csr_addr_retr[3]), .Y(un29_csr_trigger_wr_hzd_de_4) ); defparam \gen_trig_de.un29_csr_trigger_wr_hzd_de_4 .INIT=4'h1; // @46:13195 CFG2 \immediate_0_RNO[29] ( .A(un1_instruction), .B(ifu_expipe_resp_ireg_net[29]), .Y(instruction_m_1[29]) ); defparam \immediate_0_RNO[29] .INIT=4'h8; // @46:13195 CFG2 \immediate_0_RNO[27] ( .A(un1_instruction), .B(ifu_expipe_resp_ireg_net[27]), .Y(instruction_m_1[27]) ); defparam \immediate_0_RNO[27] .INIT=4'h8; // @46:13195 CFG2 \immediate_0_RNO[25] ( .A(un1_instruction), .B(ifu_expipe_resp_ireg_net[25]), .Y(instruction_m_1[25]) ); defparam \immediate_0_RNO[25] .INIT=4'h8; // @46:8808 CFG2 ex_retr_pipe_fence_i_retr_2 ( .A(stage_state_ex), .B(de_ex_pipe_fence_i_ex), .Y(ex_retr_pipe_fence_i_retr_2_1z) ); defparam ex_retr_pipe_fence_i_retr_2.INIT=4'h8; // @46:15460 CFG2 rv32c_dec_bcu_op_sel_iv_1_o3 ( .A(N_115_i), .B(N_289_i), .Y(N_547) ); defparam rv32c_dec_bcu_op_sel_iv_1_o3.INIT=4'hE; // @46:9530 CFG2 un3_bcu_op_sel_ex ( .A(stage_state_ex), .B(de_ex_pipe_bcu_op_sel_ex), .Y(un3_bcu_op_sel_ex_1z) ); defparam un3_bcu_op_sel_ex.INIT=4'h8; // @46:9871 CFG2 illegal_instr_retr ( .A(stage_state_retr), .B(ex_retr_pipe_illegal_instr_retr), .Y(illegal_instr_retr_1z) ); defparam illegal_instr_retr.INIT=4'h8; // @46:9870 CFG2 i_access_misalign_error_retr ( .A(stage_state_retr), .B(ex_retr_pipe_i_access_misalign_error_retr), .Y(un3_instr_inhibit_ex_6) ); defparam i_access_misalign_error_retr.INIT=4'h8; // @46:9872 CFG2 m_env_call_retr ( .A(stage_state_retr), .B(ex_retr_pipe_m_env_call_retr), .Y(m_env_call_retr_1z) ); defparam m_env_call_retr.INIT=4'h8; // @46:9868 CFG2 i_access_mem_error_retr ( .A(stage_state_retr), .B(ex_retr_pipe_i_access_mem_error_retr), .Y(i_access_mem_error_retr_1z) ); defparam i_access_mem_error_retr.INIT=4'h8; // @46:8300 CFG2 un1_rv32c_dec_mnemonic2123_2_s4_1 ( .A(N_289_i), .B(N_119_i), .Y(un1_rv32c_dec_mnemonic2123_2_s4_i_1_0) ); defparam un1_rv32c_dec_mnemonic2123_2_s4_1.INIT=4'h8; // @46:13195 CFG2 \rv32i_dec_bcu_operand0_mux_sel_0_.m1 ( .A(N_290_i), .B(N_131_i), .Y(N_2_0) ); defparam \rv32i_dec_bcu_operand0_mux_sel_0_.m1 .INIT=4'h8; // @46:15460 CFG2 \gen_decode_rv32c.rv32c_dec_mnemonic2119_2 ( .A(N_139_i), .B(N_141_i), .Y(rv32c_dec_mnemonic2119_2) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2119_2 .INIT=4'h4; // @46:9631 CFG2 \lsu_req_op[0] ( .A(un1_gpr_wr_mux_sel_ex_i), .B(de_ex_pipe_lsu_op_ex[0]), .Y(lsu_expipe_req_op_net[0]) ); defparam \lsu_req_op[0] .INIT=4'h8; // @46:9631 CFG2 \lsu_req_op[1] ( .A(un1_gpr_wr_mux_sel_ex_i), .B(de_ex_pipe_lsu_op_ex[1]), .Y(lsu_expipe_req_op_net[1]) ); defparam \lsu_req_op[1] .INIT=4'h8; // @46:9631 CFG2 \lsu_req_op[2] ( .A(un1_gpr_wr_mux_sel_ex_i), .B(de_ex_pipe_lsu_op_ex[2]), .Y(lsu_expipe_req_op_net[2]) ); defparam \lsu_req_op[2] .INIT=4'h8; // @46:9631 CFG2 \lsu_req_op[3] ( .A(un1_gpr_wr_mux_sel_ex_i), .B(de_ex_pipe_lsu_op_ex[3]), .Y(lsu_expipe_req_op_net[3]) ); defparam \lsu_req_op[3] .INIT=4'h8; // @46:14609 CFG2 \gen_decode_rv32c.un1_instruction_13_2 ( .A(N_131_i), .B(N_133_i), .Y(un1_instruction_14_2) ); defparam \gen_decode_rv32c.un1_instruction_13_2 .INIT=4'h1; // @46:15460 CFG2 \gen_decode_rv32c.rv32c_dec_mnemonic2122_4 ( .A(N_115_i), .B(N_129_i), .Y(rv32i_dec_mnemonic4926_4) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2122_4 .INIT=4'h1; // @46:15460 CFG2 \gen_decode_rv32c.rv32c_dec_mnemonic2124_2 ( .A(N_129_i), .B(N_121_i), .Y(rv32c_dec_mnemonic2124_i_2) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2124_2 .INIT=4'h8; // @46:16351 CFG2 \gen_decode_rv32c.rv32c_dec_mnemonic1881 ( .A(un83_rv32i_dec_gpr_wr_valid), .B(un1_instruction_13), .Y(rv32c_dec_mnemonic1881) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic1881 .INIT=4'h8; // @46:13195 CFG2 \rv32i_dec_bcu_operand0_mux_sel_0_.m13_e_2 ( .A(N_139_i), .B(N_291_i), .Y(rv32i_dec_gpr_rs2_rd_valid_m_3) ); defparam \rv32i_dec_bcu_operand0_mux_sel_0_.m13_e_2 .INIT=4'h2; // @46:10236 CFG2 \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs3_rd_valid_ex_2_0 ( .A(trace_priv_i), .B(cpu_debug_gpr_rd_en_net), .Y(de_ex_pipe_gpr_rs3_rd_valid_ex_2) ); defparam \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs3_rd_valid_ex_2_0 .INIT=4'h8; // @46:15460 CFG2 \rv32c_dec_shifter_unit_op_sel_0_.m9x ( .A(N_290_i), .B(N_141_i), .Y(N_1349) ); defparam \rv32c_dec_shifter_unit_op_sel_0_.m9x .INIT=4'h6; // @46:15460 CFG2 \rv32c_dec_immediate_1[6] ( .A(rv32c_dec_mnemonic2112), .B(N_130_i_Z), .Y(N_499_1) ); defparam \rv32c_dec_immediate_1[6] .INIT=4'hE; // @46:14761 CFG2 \gen_decode_rv32c.un1_instruction_14_3 ( .A(N_129_i), .B(N_117_i), .Y(un1_instruction_14_3) ); defparam \gen_decode_rv32c.un1_instruction_14_3 .INIT=4'h1; // @46:15793 CFG2 \gen_decode_rv32c.un1_instruction_15_2 ( .A(N_121_i), .B(N_119_i), .Y(un1_instruction_15_2) ); defparam \gen_decode_rv32c.un1_instruction_15_2 .INIT=4'h1; // @46:13195 CFG2 \rv32i_dec_immediate_0[1] ( .A(un1_instruction_38_i), .B(un1_instruction_24_i), .Y(N_415) ); defparam \rv32i_dec_immediate_0[1] .INIT=4'hE; // @46:15460 CFG2 rv32c_instr_decoded_iv_2_RNO ( .A(un1_rv32c_dec_mnemonic2119_1_i), .B(N_117_i), .Y(rv32c_dec_mnemonic_m[12]) ); defparam rv32c_instr_decoded_iv_2_RNO.INIT=4'h2; // @46:15460 CFG2 \gen_decode_rv32c.rv32c_dec_gpr_rs1_rd_sel_19_m_1[3] ( .A(rv32c_dec_mnemonic2131), .B(un1_instruction_13), .Y(rv32c_dec_gpr_rs1_rd_sel_19_m_1[3]) ); defparam \gen_decode_rv32c.rv32c_dec_gpr_rs1_rd_sel_19_m_1[3] .INIT=4'h8; // @46:15460 CFG2 \gen_decode_rv32c.rv32c_dec_mnemonic2133_1 ( .A(N_290_i), .B(N_139_i), .Y(rv32c_dec_mnemonic2130) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2133_1 .INIT=4'h8; // @46:925 CFG2 de_ex_pipe_shifter_unit_op_sel_ex7_RNI2Q7JDU3 ( .A(de_ex_pipe_shifter_unit_op_sel_ex7_1z), .B(instr_accepted_ex), .Y(N_164) ); defparam de_ex_pipe_shifter_unit_op_sel_ex7_RNI2Q7JDU3.INIT=4'h2; // @46:9432 CFG2 \un5_shifter_unit_op_sel_ex[0] ( .A(un1_gpr_wr_mux_sel_ex_i), .B(de_ex_pipe_shifter_unit_op_sel_ex[0]), .Y(shifter_unit_op_sel[0]) ); defparam \un5_shifter_unit_op_sel_ex[0] .INIT=4'h8; // @46:9432 CFG2 \un5_shifter_unit_op_sel_ex[1] ( .A(un1_gpr_wr_mux_sel_ex_i), .B(de_ex_pipe_shifter_unit_op_sel_ex[1]), .Y(shifter_unit_op_sel[1]) ); defparam \un5_shifter_unit_op_sel_ex[1] .INIT=4'h8; // @46:15460 CFG2 rv32c_dec_bcu_op_sel_iv_1_RNO ( .A(rv32c_dec_mnemonic2130_0), .B(un83_rv32i_dec_gpr_wr_valid), .Y(rv32c_dec_mnemonic_1_m_0) ); defparam rv32c_dec_bcu_op_sel_iv_1_RNO.INIT=4'h2; // @46:15082 CFG2 \gen_decode_rv32m.rv32m_dec_gpr_wr_valid_1 ( .A(rv32m_dec_mnemonic850), .B(rv32m_dec_mnemonic851), .Y(rv32m_dec_gpr_wr_valid_1) ); defparam \gen_decode_rv32m.rv32m_dec_gpr_wr_valid_1 .INIT=4'hE; // @46:13195 CFG2 \rv32i_dec_bcu_op_sel.m19_1 ( .A(rv32i_dec_mnemonic4959), .B(rv32i_dec_mnemonic4958), .Y(N_25_mux_1) ); defparam \rv32i_dec_bcu_op_sel.m19_1 .INIT=4'h1; // @46:14609 CFG2 \gen_decode_rv32c.rv32c_dec_mnemonic2112_2 ( .A(N_115_i), .B(N_141_i), .Y(rv32c_dec_mnemonic2129_2) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2112_2 .INIT=4'h1; // @46:15460 CFG2 \gen_decode_rv32c.rv32c_dec_mnemonic2115_2 ( .A(N_115_i), .B(N_141_i), .Y(rv32c_dec_mnemonic2115_i_2) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2115_2 .INIT=4'h4; // @46:15460 CFG2 \gen_decode_rv32c.rv32c_dec_mnemonic2121_1 ( .A(N_139_i), .B(N_121_i), .Y(rv32c_dec_mnemonic2121_1) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2121_1 .INIT=4'h1; // @46:15460 CFG2 un1_rv32c_dec_mnemonic2112_2_1 ( .A(rv32c_dec_mnemonic2112), .B(rv32c_dec_mnemonic2115), .Y(un1_rv32c_dec_mnemonic2112_2_1_Z) ); defparam un1_rv32c_dec_mnemonic2112_2_1.INIT=4'hE; // @46:15460 CFG2 rv32c_dec_bcu_op_sel_iv_1_2 ( .A(rv32c_dec_mnemonic2116), .B(rv32c_dec_mnemonic2126), .Y(rv32c_dec_bcu_op_sel_2) ); defparam rv32c_dec_bcu_op_sel_iv_1_2.INIT=4'hE; // @46:12789 CFG2 mnemonic537 ( .A(debug_exit_retr), .B(un1_core_reset_1_i), .Y(mnemonic537_Z) ); defparam mnemonic537.INIT=4'h2; // @46:15460 CFG2 \gen_decode_rv32c.rv32c_dec_mnemonic2117_2 ( .A(N_290_i), .B(N_141_i), .Y(rv32c_dec_mnemonic2117_2) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2117_2 .INIT=4'h8; // @46:13195 CFG2 rv32i_dec_fence ( .A(rv32i_dec_mnemonic4949), .B(rv32i_dec_mnemonic4948), .Y(rv32i_dec_fence_Z) ); defparam rv32i_dec_fence.INIT=4'hE; // @46:12789 CFG2 mnemonic536 ( .A(trace_exception), .B(soft_reset_taken_retr_1z), .Y(mnemonic536_Z) ); defparam mnemonic536.INIT=4'h2; // @46:12789 CFG2 un1_core_reset_1 ( .A(trace_exception), .B(soft_reset_taken_retr_1z), .Y(un1_core_reset_1_i) ); defparam un1_core_reset_1.INIT=4'hE; // @46:15460 CFG2 \gen_decode_rv32c.rv32c_dec_mnemonic2128_2 ( .A(N_290_i), .B(N_115_i), .Y(rv32i_dec_mnemonic4919_3) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2128_2 .INIT=4'h8; // @46:14609 CFG2 \gen_decode_rv32c.rv32c_dec_mnemonic2112_1 ( .A(N_289_i), .B(N_139_i), .Y(un1_instruction_26_1) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2112_1 .INIT=4'h1; // @46:9630 CFG2 \un5_lsu_op_ex_pipe[3] ( .A(un1_gpr_wr_mux_sel_ex_i), .B(lsu_op_ex_pipe_reg[3]), .Y(un5_lsu_op_ex_pipe_Z[3]) ); defparam \un5_lsu_op_ex_pipe[3] .INIT=4'h8; // @46:9630 CFG2 \un5_lsu_op_ex_pipe[2] ( .A(un1_gpr_wr_mux_sel_ex_i), .B(lsu_op_ex_pipe_reg[2]), .Y(un5_lsu_op_ex_pipe_Z[2]) ); defparam \un5_lsu_op_ex_pipe[2] .INIT=4'h8; // @46:9630 CFG2 \un5_lsu_op_ex_pipe[1] ( .A(un1_gpr_wr_mux_sel_ex_i), .B(lsu_op_ex_pipe_reg[1]), .Y(un5_lsu_op_ex_pipe_Z[1]) ); defparam \un5_lsu_op_ex_pipe[1] .INIT=4'h8; // @46:9865 CFG2 fence_i_retr ( .A(stage_state_retr), .B(ex_retr_pipe_fence_i_retr), .Y(fence_i_retr_Z) ); defparam fence_i_retr.INIT=4'h8; // @46:8879 CFG2 \gen_read_gpr_rs1_ex.gen_rs1_lsu_stall.un14_gpr_rs1_stall_lsu ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .Y(un14_gpr_rs1_stall_lsu) ); defparam \gen_read_gpr_rs1_ex.gen_rs1_lsu_stall.un14_gpr_rs1_stall_lsu .INIT=4'h2; // @46:925 CFG2 de_ex_pipe_alu_op_sel_ex7_RNIGHJJAU3 ( .A(de_ex_pipe_alu_op_sel_ex7_1z), .B(instr_accepted_ex), .Y(N_167) ); defparam de_ex_pipe_alu_op_sel_ex7_RNIGHJJAU3.INIT=4'h2; // @46:18188 CFG2 \gen_decode_rv32m.rv32m_dec_mnemonic846_RNI1MMDF ( .A(case_dec_gpr_rs2_rd_sel_1_sqmuxa_Z), .B(rv32m_dec_mnemonic846), .Y(rv32m_dec_alu_op_sel_m_1_0) ); defparam \gen_decode_rv32m.rv32m_dec_mnemonic846_RNI1MMDF .INIT=4'h2; // @46:15460 CFG2 un1_instruction_11_1 ( .A(N_289_i), .B(N_141_i), .Y(un1_instruction_11_i_1) ); defparam un1_instruction_11_1.INIT=4'h2; // @46:13195 CFG2 \rv32i_dec_alu_op_sel_0_a2_2[0] ( .A(N_129_i), .B(N_133_i), .Y(N_160) ); defparam \rv32i_dec_alu_op_sel_0_a2_2[0] .INIT=4'h4; // @46:13195 CFG2 \rv32i_dec_alu_op_sel_0_o5[1] ( .A(N_290_i), .B(N_115_i), .Y(N_130) ); defparam \rv32i_dec_alu_op_sel_0_o5[1] .INIT=4'hB; // @46:13195 CFG2 un1_instruction_24_1 ( .A(N_117_i), .B(N_133_i), .Y(un1_instruction_24_i_1) ); defparam un1_instruction_24_1.INIT=4'h8; // @46:13195 CFG2 \rv32i_dec_lsu_op_0_o2[1] ( .A(N_115_i), .B(N_131_i), .Y(N_27) ); defparam \rv32i_dec_lsu_op_0_o2[1] .INIT=4'hE; // @46:15460 CFG2 \rv32c_dec_shifter_unit_op_sel_0_.m8_e_1 ( .A(N_117_i), .B(N_119_i), .Y(N_17_1) ); defparam \rv32c_dec_shifter_unit_op_sel_0_.m8_e_1 .INIT=4'h1; // @46:13195 CFG2 un1_instruction_14_1 ( .A(N_131_i), .B(N_133_i), .Y(un1_instruction_14_i_1) ); defparam un1_instruction_14_1.INIT=4'h2; // @46:13195 CFG2 \rv32i_dec_lsu_op_0_a2_1[2] ( .A(N_117_i), .B(N_131_i), .Y(N_46_1) ); defparam \rv32i_dec_lsu_op_0_a2_1[2] .INIT=4'h4; // @46:13195 CFG2 \rv32i_dec_exu_result_mux_sel_0_a2_10_1[0] ( .A(N_137_i), .B(N_133_i), .Y(N_100_1) ); defparam \rv32i_dec_exu_result_mux_sel_0_a2_10_1[0] .INIT=4'h1; // @46:13195 CFG2 \rv32i_dec_shifter_unit_places_2_0_.m21_1 ( .A(N_117_i), .B(N_133_i), .Y(N_32_mux_1) ); defparam \rv32i_dec_shifter_unit_places_2_0_.m21_1 .INIT=4'h2; // @46:13195 CFG2 \gen_decode_rv32i.un1_instruction_2 ( .A(N_137_i), .B(N_133_i), .Y(un1_instruction_i_2) ); defparam \gen_decode_rv32i.un1_instruction_2 .INIT=4'h8; // @46:13195 CFG2 \gen_decode_rv32i.rv32i_dec_mnemonic4913_2 ( .A(N_137_i), .B(N_291_i), .Y(rv32i_dec_mnemonic4913_i_2) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4913_2 .INIT=4'h8; // @46:13195 CFG2 \rv32i_dec_alu_op_sel_0_o5[2] ( .A(N_115_i), .B(N_117_i), .Y(N_127_0) ); defparam \rv32i_dec_alu_op_sel_0_o5[2] .INIT=4'hE; // @46:13195 CFG2 \rv32i_dec_gpr_wr_mux_sel_0_a6_0_3_i[0] ( .A(N_129_i), .B(N_137_i), .Y(N_7_0) ); defparam \rv32i_dec_gpr_wr_mux_sel_0_a6_0_3_i[0] .INIT=4'hD; // @46:13195 CFG2 \rv32i_dec_alu_op_sel_4_.m8_e_2 ( .A(ifu_expipe_resp_ireg_net[28]), .B(ifu_expipe_resp_ireg_net[29]), .Y(rv32i_dec_shifter_unit_places_2[2]) ); defparam \rv32i_dec_alu_op_sel_4_.m8_e_2 .INIT=4'h1; // @46:15082 CFG2 \gen_decode_rv32m.rv32m_dec_mnemonic850_3 ( .A(N_290_i), .B(ifu_expipe_resp_ireg_net[25]), .Y(rv32m_dec_mnemonic850_i_3) ); defparam \gen_decode_rv32m.rv32m_dec_mnemonic850_3 .INIT=4'h8; // @46:13195 CFG2 \rv32i_dec_shifter_unit_op_sel_1_0_.m4_2 ( .A(N_129_i), .B(N_137_i), .Y(rv32i_dec_mnemonic4947) ); defparam \rv32i_dec_shifter_unit_op_sel_1_0_.m4_2 .INIT=4'h1; // @46:13195 CFG2 un1_instruction_12_2 ( .A(N_115_i), .B(N_117_i), .Y(un1_instruction_12_i_2) ); defparam un1_instruction_12_2.INIT=4'h8; // @46:13195 CFG2 un1_rv32i_dec_mnemonic4960_1_i_a17_0_1 ( .A(N_115_i), .B(N_133_i), .Y(N_565_1) ); defparam un1_rv32i_dec_mnemonic4960_1_i_a17_0_1.INIT=4'h1; // @46:9874 CFG2 dbreak_retr ( .A(stage_state_retr), .B(ex_retr_pipe_dbreak_retr), .Y(dbreak_retr_1z) ); defparam dbreak_retr.INIT=4'h8; // @46:10196 CFG3 \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_addr_retr_2[2] ( .A(trace_priv_i), .B(cpu_debug_csr_op_addr_net[2]), .C(de_ex_pipe_sw_csr_addr_ex[2]), .Y(ex_retr_pipe_sw_csr_addr_retr_2[2]) ); defparam \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_addr_retr_2[2] .INIT=8'hD8; // @46:10196 CFG3 \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_addr_retr_2[3] ( .A(trace_priv_i), .B(cpu_debug_csr_op_addr_net[3]), .C(de_ex_pipe_sw_csr_addr_ex[3]), .Y(ex_retr_pipe_sw_csr_addr_retr_2[3]) ); defparam \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_addr_retr_2[3] .INIT=8'hD8; // @46:10196 CFG3 \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_addr_retr_2[4] ( .A(trace_priv_i), .B(cpu_debug_csr_op_addr_net[4]), .C(de_ex_pipe_sw_csr_addr_ex[4]), .Y(ex_retr_pipe_sw_csr_addr_retr_2[4]) ); defparam \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_addr_retr_2[4] .INIT=8'hD8; // @46:10196 CFG3 \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_addr_retr_2[5] ( .A(trace_priv_i), .B(cpu_debug_csr_op_addr_net[5]), .C(de_ex_pipe_sw_csr_addr_ex[5]), .Y(ex_retr_pipe_sw_csr_addr_retr_2[5]) ); defparam \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_addr_retr_2[5] .INIT=8'hD8; // @46:10196 CFG3 \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_addr_retr_2[6] ( .A(trace_priv_i), .B(cpu_debug_csr_op_addr_net[6]), .C(de_ex_pipe_sw_csr_addr_ex[6]), .Y(ex_retr_pipe_sw_csr_addr_retr_2[6]) ); defparam \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_addr_retr_2[6] .INIT=8'hD8; // @46:10196 CFG3 \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_addr_retr_2[7] ( .A(trace_priv_i), .B(cpu_debug_csr_op_addr_net[7]), .C(de_ex_pipe_sw_csr_addr_ex[7]), .Y(ex_retr_pipe_sw_csr_addr_retr_2[7]) ); defparam \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_addr_retr_2[7] .INIT=8'hD8; // @46:10196 CFG3 \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_addr_retr_2[8] ( .A(trace_priv_i), .B(cpu_debug_csr_op_addr_net[8]), .C(de_ex_pipe_sw_csr_addr_ex[8]), .Y(ex_retr_pipe_sw_csr_addr_retr_2[8]) ); defparam \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_addr_retr_2[8] .INIT=8'hD8; // @46:10196 CFG3 \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_addr_retr_2[9] ( .A(trace_priv_i), .B(cpu_debug_csr_op_addr_net[9]), .C(de_ex_pipe_sw_csr_addr_ex[9]), .Y(ex_retr_pipe_sw_csr_addr_retr_2[9]) ); defparam \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_addr_retr_2[9] .INIT=8'hD8; // @46:10196 CFG3 \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_addr_retr_2[10] ( .A(trace_priv_i), .B(cpu_debug_csr_op_addr_net[10]), .C(de_ex_pipe_sw_csr_addr_ex[10]), .Y(ex_retr_pipe_sw_csr_addr_retr_2[10]) ); defparam \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_addr_retr_2[10] .INIT=8'hD8; // @46:10196 CFG3 \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_addr_retr_2[11] ( .A(trace_priv_i), .B(cpu_debug_csr_op_addr_net[11]), .C(de_ex_pipe_sw_csr_addr_ex[11]), .Y(ex_retr_pipe_sw_csr_addr_retr_2[11]) ); defparam \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_addr_retr_2[11] .INIT=8'hD8; // @46:9957 CFG3 \gen_debug_gpr_ctrl_pipeline.ex_retr_pipe_gpr_wr_sel_retr_2_0_m2[3] ( .A(trace_priv_i), .B(de_ex_pipe_gpr_wr_sel_ex[3]), .C(cpu_debug_gpr_op_addr_net[3]), .Y(ex_retr_pipe_gpr_wr_sel_retr_2[3]) ); defparam \gen_debug_gpr_ctrl_pipeline.ex_retr_pipe_gpr_wr_sel_retr_2_0_m2[3] .INIT=8'hE4; // @46:9957 CFG3 \gen_debug_gpr_ctrl_pipeline.ex_retr_pipe_gpr_wr_sel_retr_2[0] ( .A(trace_priv_i), .B(de_ex_pipe_gpr_wr_sel_ex[0]), .C(cpu_debug_gpr_op_addr_net[0]), .Y(ex_retr_pipe_gpr_wr_sel_retr_2[0]) ); defparam \gen_debug_gpr_ctrl_pipeline.ex_retr_pipe_gpr_wr_sel_retr_2[0] .INIT=8'hE4; // @46:9957 CFG3 \gen_debug_gpr_ctrl_pipeline.ex_retr_pipe_gpr_wr_sel_retr_2[1] ( .A(trace_priv_i), .B(de_ex_pipe_gpr_wr_sel_ex[1]), .C(cpu_debug_gpr_op_addr_net[1]), .Y(ex_retr_pipe_gpr_wr_sel_retr_2[1]) ); defparam \gen_debug_gpr_ctrl_pipeline.ex_retr_pipe_gpr_wr_sel_retr_2[1] .INIT=8'hE4; // @46:9957 CFG3 \gen_debug_gpr_ctrl_pipeline.ex_retr_pipe_gpr_wr_sel_retr_2_0_m2[4] ( .A(trace_priv_i), .B(de_ex_pipe_gpr_wr_sel_ex[4]), .C(cpu_debug_gpr_op_addr_net[4]), .Y(ex_retr_pipe_gpr_wr_sel_retr_2[4]) ); defparam \gen_debug_gpr_ctrl_pipeline.ex_retr_pipe_gpr_wr_sel_retr_2_0_m2[4] .INIT=8'hE4; // @46:9957 CFG3 \gen_debug_gpr_ctrl_pipeline.ex_retr_pipe_gpr_wr_sel_retr_2_0_m2[2] ( .A(trace_priv_i), .B(de_ex_pipe_gpr_wr_sel_ex[2]), .C(cpu_debug_gpr_op_addr_net[2]), .Y(ex_retr_pipe_gpr_wr_sel_retr_2[2]) ); defparam \gen_debug_gpr_ctrl_pipeline.ex_retr_pipe_gpr_wr_sel_retr_2_0_m2[2] .INIT=8'hE4; // @46:13195 CFG2 \rv32i_dec_gpr_rs2_rd_valid.m12_0 ( .A(N_564_1), .B(N_133_i), .Y(un1_rv32i_dec_mnemonic4960_1_i_a17_0_Z) ); defparam \rv32i_dec_gpr_rs2_rd_valid.m12_0 .INIT=4'h2; // @46:15460 CFG3 un1_rv32c_dec_mnemonic2112_4_1 ( .A(rv32c_dec_mnemonic2112), .B(rv32c_dec_mnemonic2130_0), .C(rv32c_dec_mnemonic2131), .Y(un1_rv32c_dec_mnemonic2112_4_1_Z) ); defparam un1_rv32c_dec_mnemonic2112_4_1.INIT=8'hFE; // @46:14924 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4959_3 ( .A(ifu_expipe_resp_ireg_net[31]), .B(N_291_i), .C(N_117_i), .D(N_137_i), .Y(rv32i_dec_mnemonic4959_3) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4959_3 .INIT=16'h0001; // @46:15460 CFG4 \rv32c_dec_alu_op_sel_1_iv_0[0] ( .A(un1_instruction_13), .B(rv32c_dec_mnemonic2115), .C(un83_rv32i_dec_gpr_wr_valid), .D(rv32c_dec_mnemonic2131), .Y(rv32c_dec_alu_op_sel_1_iv_0_Z[0]) ); defparam \rv32c_dec_alu_op_sel_1_iv_0[0] .INIT=16'h5D0C; // @46:13195 CFG4 \rv32i_dec_shifter_unit_places_2_0_.m19_1 ( .A(ifu_expipe_resp_ireg_net[30]), .B(ifu_expipe_resp_ireg_net[31]), .C(N_115_i), .D(N_290_i), .Y(m19_1_0) ); defparam \rv32i_dec_shifter_unit_places_2_0_.m19_1 .INIT=16'h0301; // @46:13195 CFG3 \gen_decode_rv32i.rv32i_dec_mnemonic4948_0_0 ( .A(N_133_i), .B(N_131_i), .C(N_290_i), .Y(rv32i_dec_mnemonic4948_0) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4948_0_0 .INIT=8'h01; // @46:13195 CFG3 \rv32i_dec_alu_op_sel_0_a5_0_0[1] ( .A(N_117_i), .B(N_115_i), .C(N_290_i), .Y(rv32i_dec_alu_op_sel_0_a5_0_0_Z[1]) ); defparam \rv32i_dec_alu_op_sel_0_a5_0_0[1] .INIT=8'hA2; // @46:15460 CFG3 un1_rv32c_dec_mnemonic2112_2_5 ( .A(rv32c_dec_mnemonic2131), .B(rv32c_dec_mnemonic2116), .C(rv32c_dec_mnemonic2132), .Y(un1_rv32c_dec_mnemonic2112_2_5_Z) ); defparam un1_rv32c_dec_mnemonic2112_2_5.INIT=8'hFE; // @46:15082 CFG3 \gen_decode_rv32m.rv32m_dec_mnemonic846_0_0 ( .A(N_117_i), .B(N_115_i), .C(N_290_i), .Y(rv32m_dec_mnemonic846_0) ); defparam \gen_decode_rv32m.rv32m_dec_mnemonic846_0_0 .INIT=8'h01; // @46:15082 CFG4 \gen_decode_rv32m.rv32m_dec_mnemonic851_2 ( .A(N_115_i), .B(N_290_i), .C(ifu_expipe_resp_ireg_net[31]), .D(N_117_i), .Y(rv32m_dec_mnemonic851_2) ); defparam \gen_decode_rv32m.rv32m_dec_mnemonic851_2 .INIT=16'h0400; // @46:8300 CFG4 \rv32c_dec_lsu_op_1_iv_1_RNO[0] ( .A(N_115_i), .B(N_290_i), .C(N_139_i), .D(N_289_i), .Y(rv32c_dec_mnemonic2136_s24_0) ); defparam \rv32c_dec_lsu_op_1_iv_1_RNO[0] .INIT=16'h0080; // @46:13195 CFG4 \rv32i_dec_alu_op_sel_0_a2_2_0[1] ( .A(ifu_expipe_resp_ireg_net[29]), .B(ifu_expipe_resp_ireg_net[28]), .C(ifu_expipe_resp_ireg_net[31]), .D(ifu_expipe_resp_ireg_net[27]), .Y(rv32i_dec_alu_op_sel_0_a2_2_0_Z[1]) ); defparam \rv32i_dec_alu_op_sel_0_a2_2_0[1] .INIT=16'h0001; // @46:13195 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4914_1 ( .A(N_137_i), .B(N_129_i), .C(N_291_i), .D(N_131_i), .Y(rv32i_dec_mnemonic4914_1) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4914_1 .INIT=16'h0800; // @46:15460 CFG4 \gen_decode_rv32c.rv32c_dec_mnemonic2122_1 ( .A(N_131_i), .B(N_289_i), .C(N_119_i), .D(N_121_i), .Y(rv32c_dec_mnemonic2122_1) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2122_1 .INIT=16'h4000; // @46:15460 CFG4 \gen_decode_rv32c.rv32c_dec_mnemonic2123_1 ( .A(N_131_i), .B(N_289_i), .C(N_119_i), .D(N_121_i), .Y(rv32c_dec_mnemonic2123_1_0) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2123_1 .INIT=16'h8000; // @46:13195 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4928_2 ( .A(N_133_i), .B(N_131_i), .C(N_129_i), .D(N_115_i), .Y(rv32i_dec_mnemonic4928_2) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4928_2 .INIT=16'h0400; // @46:13195 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4919_0 ( .A(N_133_i), .B(N_117_i), .C(N_115_i), .D(N_290_i), .Y(rv32i_dec_mnemonic4919_0) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4919_0 .INIT=16'h1000; // @46:15460 CFG4 \gen_decode_rv32c.rv32c_dec_mnemonic2124_1 ( .A(N_141_i), .B(N_139_i), .C(N_131_i), .D(N_115_i), .Y(rv32c_dec_mnemonic2124_1) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2124_1 .INIT=16'h0002; // @46:15460 CFG4 \gen_decode_rv32c.rv32c_dec_mnemonic2125_0_0 ( .A(N_121_i), .B(N_119_i), .C(N_129_i), .D(N_131_i), .Y(rv32c_dec_mnemonic2125_0) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2125_0_0 .INIT=16'h8000; // @46:15460 CFG3 \gen_decode_rv32c.rv32c_dec_mnemonic2127_0 ( .A(N_290_i), .B(N_289_i), .C(N_115_i), .Y(rv32c_dec_mnemonic2127_0) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2127_0 .INIT=8'h08; // @46:15460 CFG3 \rv32c_dec_shifter_unit_op_sel_0_.m8_e_0 ( .A(N_139_i), .B(N_115_i), .C(N_121_i), .Y(m8_e_0) ); defparam \rv32c_dec_shifter_unit_op_sel_0_.m8_e_0 .INIT=8'h10; // @46:15460 CFG3 \rv32c_dec_mnemonic2125.rv32c_dec_mnemonic2125_2_1 ( .A(N_129_i), .B(N_115_i), .C(N_290_i), .Y(rv32c_dec_mnemonic2125_2_1) ); defparam \rv32c_dec_mnemonic2125.rv32c_dec_mnemonic2125_2_1 .INIT=8'h02; // @46:8230 CFG4 \gen_trig_de.un11_csr_trigger_wr_hzd_de_6 ( .A(de_ex_pipe_sw_csr_addr_ex[11]), .B(de_ex_pipe_sw_csr_addr_ex[8]), .C(de_ex_pipe_sw_csr_addr_ex[6]), .D(de_ex_pipe_sw_csr_addr_ex[4]), .Y(un11_csr_trigger_wr_hzd_de_6) ); defparam \gen_trig_de.un11_csr_trigger_wr_hzd_de_6 .INIT=16'h0004; // @46:8230 CFG4 \gen_trig_de.un11_csr_trigger_wr_hzd_de_5 ( .A(de_ex_pipe_sw_csr_addr_ex[10]), .B(de_ex_pipe_sw_csr_addr_ex[7]), .C(de_ex_pipe_sw_csr_addr_ex[3]), .D(de_ex_pipe_sw_csr_addr_ex[2]), .Y(un11_csr_trigger_wr_hzd_de_5) ); defparam \gen_trig_de.un11_csr_trigger_wr_hzd_de_5 .INIT=16'h0008; // @46:9342 CFG3 un6_instr_is_lsu_op_retr_0 ( .A(ex_retr_pipe_lsu_op_retr[0]), .B(ex_retr_pipe_lsu_op_retr[3]), .C(stage_state_retr), .Y(un6_instr_is_lsu_op_retr_0_Z) ); defparam un6_instr_is_lsu_op_retr_0.INIT=8'h1F; // @46:10369 CFG3 un11_lsu_resp_ready_c_0 ( .A(ex_retr_pipe_lsu_op_retr[0]), .B(ex_retr_pipe_lsu_op_retr[3]), .C(stage_state_retr), .Y(un11_lsu_resp_ready_c_0_Z) ); defparam un11_lsu_resp_ready_c_0.INIT=8'h20; // @46:8704 CFG3 un3_instr_inhibit_ex_8 ( .A(ex_retr_pipe_i_access_misalign_error_retr), .B(ex_retr_pipe_illegal_instr_retr), .C(stage_state_retr), .Y(un3_instr_inhibit_ex_8_1z) ); defparam un3_instr_inhibit_ex_8.INIT=8'hE0; // @46:8704 CFG4 un3_instr_inhibit_ex_4 ( .A(de_ex_pipe_trigger_ex[0]), .B(de_ex_pipe_i_access_misalign_error_ex), .C(de_ex_pipe_i_access_mem_error_ex), .D(de_ex_pipe_dbreak_ex), .Y(un3_instr_inhibit_ex_4_Z) ); defparam un3_instr_inhibit_ex_4.INIT=16'hFFFE; // @46:8234 CFG4 \gen_trig_de.un29_csr_trigger_wr_hzd_de_2 ( .A(ex_retr_pipe_sw_csr_addr_retr[4]), .B(ex_retr_pipe_sw_csr_addr_retr[6]), .C(ex_retr_pipe_sw_csr_addr_retr[8]), .D(ex_retr_pipe_sw_csr_addr_retr[9]), .Y(un29_csr_trigger_wr_hzd_de_2) ); defparam \gen_trig_de.un29_csr_trigger_wr_hzd_de_2 .INIT=16'h1000; // @46:8842 CFG3 un6_alu_op_complete_ex_0_a3_2 ( .A(de_ex_pipe_alu_op_sel_ex[2]), .B(de_ex_pipe_alu_op_sel_ex[1]), .C(de_ex_pipe_alu_op_sel_ex[0]), .Y(un6_alu_op_complete_ex_0_a3_2_Z) ); defparam un6_alu_op_complete_ex_0_a3_2.INIT=8'h01; // @46:18188 CFG3 \sw_csr_addr[7] ( .A(un1_instruction_33_i), .B(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .C(ifu_expipe_resp_ireg_net[27]), .Y(sw_csr_addr_de[7]) ); defparam \sw_csr_addr[7] .INIT=8'h80; // @46:18188 CFG3 \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_sel_ex_2_RNO[0] ( .A(un1_instruction_44_i), .B(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .C(N_137_i), .Y(rv32c_dec_gpr_rs2_rd_sel_m[0]) ); defparam \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_sel_ex_2_RNO[0] .INIT=8'h80; // @46:13195 CFG4 \rv32i_dec_exu_result_mux_sel_0_a2_6[0] ( .A(N_137_i), .B(N_129_i), .C(N_133_i), .D(N_131_i), .Y(N_96) ); defparam \rv32i_dec_exu_result_mux_sel_0_a2_6[0] .INIT=16'h0800; // @46:18188 CFG3 un1_rv32c_dec_mnemonic2115_4 ( .A(rv32c_dec_mnemonic2131), .B(rv32c_dec_mnemonic2115), .C(rv32c_dec_mnemonic2132), .Y(un1_rv32c_dec_mnemonic2115_4_Z) ); defparam un1_rv32c_dec_mnemonic2115_4.INIT=8'hFE; // @46:13195 CFG4 \rv32i_dec_shifter_unit_places_2_0_.m4_e_3 ( .A(N_141_i), .B(N_291_i), .C(N_129_i), .D(N_139_i), .Y(N_28_mux_3) ); defparam \rv32i_dec_shifter_unit_places_2_0_.m4_e_3 .INIT=16'h0200; // @46:18188 CFG3 de_ex_pipe_illegal_instr_ex_2_RNO_0 ( .A(N_115_i), .B(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .C(N_141_i), .Y(rv32c_dec_illegal_instr_m) ); defparam de_ex_pipe_illegal_instr_ex_2_RNO_0.INIT=8'h08; // @46:18188 CFG3 \sw_csr_addr[9] ( .A(un1_instruction_33_i), .B(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .C(ifu_expipe_resp_ireg_net[29]), .Y(sw_csr_addr_de[9]) ); defparam \sw_csr_addr[9] .INIT=8'h80; // @46:15460 CFG4 \rv32c_dec_mnemonic2125.rv32c_dec_mnemonic2125_3_3 ( .A(N_139_i), .B(N_115_i), .C(N_119_i), .D(N_121_i), .Y(rv32c_dec_mnemonic2125_3_3) ); defparam \rv32c_dec_mnemonic2125.rv32c_dec_mnemonic2125_3_3 .INIT=16'h1000; // @46:15460 CFG4 \rv32c_dec_shifter_unit_op_sel_0_.m3 ( .A(N_141_i), .B(N_139_i), .C(N_115_i), .D(N_290_i), .Y(N_14_mux) ); defparam \rv32c_dec_shifter_unit_op_sel_0_.m3 .INIT=16'h0004; // @46:15460 CFG4 \rv32c_dec_mnemonic2121.rv32c_dec_mnemonic2121 ( .A(N_121_i), .B(N_119_i), .C(N_290_i), .D(N_115_i), .Y(rv32c_dec_mnemonic2121) ); defparam \rv32c_dec_mnemonic2121.rv32c_dec_mnemonic2121 .INIT=16'h0004; // @46:15460 CFG4 \gen_decode_rv32c.rv32c_dec_mnemonic2114_3 ( .A(N_139_i), .B(N_141_i), .C(N_290_i), .D(N_289_i), .Y(rv32c_dec_mnemonic2114_3) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2114_3 .INIT=16'h1000; // @46:9236 CFG3 \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_sel_ex_2_0_a2_2[4] ( .A(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .B(trace_priv_i), .C(un1_instruction_44_i), .Y(N_71) ); defparam \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_sel_ex_2_0_a2_2[4] .INIT=8'h20; // @46:18188 CFG3 \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_sel_ex_2_RNO[1] ( .A(un1_instruction_44_i), .B(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .C(N_291_i), .Y(rv32c_dec_gpr_rs2_rd_sel_m[1]) ); defparam \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_sel_ex_2_RNO[1] .INIT=8'h80; // @46:9953 CFG2 gpr_rd_rs3_complete_ex_s_RNI8URB86 ( .A(instr_accepted_retr_2), .B(trace_priv_i), .Y(N_1394_i) ); defparam gpr_rd_rs3_complete_ex_s_RNI8URB86.INIT=4'hE; // @46:18188 CFG3 \gen_decode_rv32c.rv32c_dec_mnemonic2132_RNI2O4OH ( .A(un83_rv32i_dec_gpr_wr_valid), .B(rv32c_dec_mnemonic2132), .C(un1_instruction_13), .Y(rv32c_dec_dbreakpoint_m_0) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2132_RNI2O4OH .INIT=8'h80; // @46:14888 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4958_6 ( .A(N_137_i), .B(N_291_i), .C(N_290_i), .D(N_115_i), .Y(rv32i_dec_mnemonic4957_0) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4958_6 .INIT=16'h0001; // @46:13195 CFG3 \rv32i_dec_exu_result_mux_sel_0_a3_0[0] ( .A(N_117_i), .B(N_115_i), .C(N_290_i), .Y(N_574) ); defparam \rv32i_dec_exu_result_mux_sel_0_a3_0[0] .INIT=8'h01; // @46:15082 CFG4 un1_instruction_29_1 ( .A(ifu_expipe_resp_ireg_net[29]), .B(ifu_expipe_resp_ireg_net[28]), .C(ifu_expipe_resp_ireg_net[30]), .D(ifu_expipe_resp_ireg_net[27]), .Y(un1_instruction_29_1_1) ); defparam un1_instruction_29_1.INIT=16'h0001; // @46:13195 CFG4 \rv32i_dec_gpr_wr_mux_sel_0_a6_1_1[1] ( .A(ifu_expipe_resp_ireg_net[25]), .B(ifu_expipe_resp_ireg_net[27]), .C(ifu_expipe_resp_ireg_net[26]), .D(ifu_expipe_resp_ireg_net[28]), .Y(N_568_1_0) ); defparam \rv32i_dec_gpr_wr_mux_sel_0_a6_1_1[1] .INIT=16'h0001; // @46:13195 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4950_0 ( .A(N_291_i), .B(N_117_i), .C(N_137_i), .D(N_129_i), .Y(rv32i_dec_mnemonic4950_0) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4950_0 .INIT=16'h0400; // @46:8963 CFG4 gpr_rs2_stall_csr_2_2 ( .A(de_ex_pipe_gpr_rs2_rd_sel_ex[4]), .B(de_ex_pipe_gpr_rs2_rd_sel_ex[0]), .C(ex_retr_pipe_gpr_wr_sel_retr[4]), .D(ex_retr_pipe_gpr_wr_sel_retr[0]), .Y(gpr_rs2_stall_csr_2_2_1z) ); defparam gpr_rs2_stall_csr_2_2.INIT=16'h8421; // @46:8963 CFG4 gpr_rs2_stall_csr_2_1 ( .A(de_ex_pipe_gpr_rs2_rd_sel_ex[2]), .B(de_ex_pipe_gpr_rs2_rd_sel_ex[1]), .C(ex_retr_pipe_gpr_wr_sel_retr[2]), .D(ex_retr_pipe_gpr_wr_sel_retr[1]), .Y(gpr_rs2_stall_csr_2_1_1z) ); defparam gpr_rs2_stall_csr_2_1.INIT=16'h8421; // @46:8963 CFG4 gpr_rs2_stall_csr_2_0 ( .A(de_ex_pipe_gpr_rs2_rd_sel_ex[5]), .B(ex_retr_pipe_gpr_wr_sel_retr[5]), .C(de_ex_pipe_gpr_rs2_rd_sel_ex[3]), .D(ex_retr_pipe_gpr_wr_sel_retr[3]), .Y(gpr_rs2_stall_csr_2_0_1z) ); defparam gpr_rs2_stall_csr_2_0.INIT=16'h9009; // @46:13195 CFG4 un1_instruction_33 ( .A(N_133_i), .B(N_117_i), .C(N_129_i), .D(N_115_i), .Y(un1_instruction_33_i) ); defparam un1_instruction_33.INIT=16'hA080; // @46:8177 CFG2 un3_bcu_op_sel_ex_RNI5NIE7 ( .A(un3_branch_cond_ex[0]), .B(un3_bcu_op_sel_ex_1z), .Y(ifu_m3_a2_0) ); defparam un3_bcu_op_sel_ex_RNI5NIE7.INIT=4'h8; // @46:9354 CFG3 gpr_rd_rs3_complete_ex_0 ( .A(trace_priv_i), .B(un1_gpr_wr_mux_sel_ex_i), .C(de_ex_pipe_gpr_rs3_rd_valid_ex), .Y(gpr_rd_rs3_complete_ex_0_Z) ); defparam gpr_rd_rs3_complete_ex_0.INIT=8'h1F; CFG2 gpr_rs1_rd_valid_mux_1555_tz_tz ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .Y(N_5237_tz_tz) ); defparam gpr_rs1_rd_valid_mux_1555_tz_tz.INIT=4'h9; // @46:9720 CFG2 \sw_csr_wr_op_ex_RNIIHD136[1] ( .A(instr_accepted_retr_2), .B(sw_csr_wr_op_ex_Z[1]), .Y(ex_retr_pipe_sw_csr_wr_op_retr_2[1]) ); defparam \sw_csr_wr_op_ex_RNIIHD136[1] .INIT=4'h8; // @46:13195 CFG2 N_130_i ( .A(N_290_i), .B(N_115_i), .Y(N_130_i_Z) ); defparam N_130_i.INIT=4'h4; // @46:13195 CFG2 \rv32i_dec_gpr_wr_valid_cnst.m3 ( .A(N_3), .B(N_290_i), .Y(N_4) ); defparam \rv32i_dec_gpr_wr_valid_cnst.m3 .INIT=4'h2; // @46:15460 CFG3 un1_instruction_11_RNI6P1TI ( .A(un83_rv32i_dec_gpr_wr_valid), .B(un1_instruction_11_i), .C(un1_instruction_13), .Y(rv32c_dec_mnemonic1725_m_1) ); defparam un1_instruction_11_RNI6P1TI.INIT=8'h40; // @46:14609 CFG3 un1_rv32c_dec_mnemonic2137_1_2_a3 ( .A(N_141_i), .B(N_139_i), .C(N_115_i), .Y(N_596) ); defparam un1_rv32c_dec_mnemonic2137_1_2_a3.INIT=8'hA8; // @46:13195 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4948_18 ( .A(ifu_expipe_resp_ireg_net[31]), .B(ifu_expipe_resp_ireg_net[30]), .C(N_117_i), .D(ifu_expipe_resp_ireg_net[29]), .Y(rv32i_dec_mnemonic4948_i_18) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4948_18 .INIT=16'h0001; // @46:14924 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4959_22 ( .A(ifu_expipe_resp_ireg_net[25]), .B(ifu_expipe_resp_ireg_net[26]), .C(N_115_i), .D(N_290_i), .Y(rv32i_dec_mnemonic4959_i_22) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4959_22 .INIT=16'h0001; // @46:13195 CFG3 \gen_decode_rv32i.rv32i_dec_mnemonic4913_2_0 ( .A(N_133_i), .B(N_131_i), .C(N_129_i), .Y(N_103_2) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4913_2_0 .INIT=8'h40; // @46:15460 CFG4 \rv32c_dec_mnemonic2121.rv32c_dec_mnemonic2121_1 ( .A(N_139_i), .B(N_121_i), .C(N_290_i), .D(N_115_i), .Y(rv32c_dec_mnemonic2121_1_0) ); defparam \rv32c_dec_mnemonic2121.rv32c_dec_mnemonic2121_1 .INIT=16'h0001; // @46:15460 CFG3 \rv32c_dec_lsu_op_0_a2[2] ( .A(N_290_i), .B(N_141_i), .C(N_289_i), .Y(rv32c_dec_lsu_op[2]) ); defparam \rv32c_dec_lsu_op_0_a2[2] .INIT=8'h20; // @46:15460 CFG3 un1_instruction_21 ( .A(N_141_i), .B(N_139_i), .C(N_290_i), .Y(un1_instruction_21_Z) ); defparam un1_instruction_21.INIT=8'h10; // @46:15460 CFG3 un1_instruction_8 ( .A(N_290_i), .B(N_141_i), .C(N_289_i), .Y(un1_instruction_8_Z) ); defparam un1_instruction_8.INIT=8'h80; // @46:9958 CFG3 \gen_debug_gpr_ctrl_pipeline.ex_retr_pipe_gpr_wr_mux_sel_retr_2_f0[1] ( .A(trace_priv_i), .B(un1_gpr_wr_mux_sel_ex_i), .C(de_ex_pipe_gpr_wr_mux_sel_ex_0), .Y(ex_retr_pipe_gpr_wr_mux_sel_retr_2_0) ); defparam \gen_debug_gpr_ctrl_pipeline.ex_retr_pipe_gpr_wr_mux_sel_retr_2_f0[1] .INIT=8'hEA; // @46:18188 CFG3 \sw_csr_addr[11] ( .A(un1_instruction_33_i), .B(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .C(ifu_expipe_resp_ireg_net[31]), .Y(sw_csr_addr_de[11]) ); defparam \sw_csr_addr[11] .INIT=8'h80; // @46:9862 CFG3 exu_result_valid_retr ( .A(stage_state_retr), .B(trace_priv_i), .C(ex_retr_pipe_exu_result_valid_retr), .Y(exu_result_valid_retr_1z) ); defparam exu_result_valid_retr.INIT=8'hE0; // @46:9976 CFG3 gpr_wr_en_retr ( .A(stage_state_retr), .B(trace_priv_i), .C(ex_retr_pipe_gpr_wr_en_retr), .Y(gpr_wr_en_retr_1z) ); defparam gpr_wr_en_retr.INIT=8'hE0; // @46:13195 CFG3 un1_instruction_7 ( .A(N_133_i), .B(N_129_i), .C(N_290_i), .Y(un1_instruction_7_i) ); defparam un1_instruction_7.INIT=8'h80; // @46:15460 CFG3 un1_instruction_18 ( .A(N_290_i), .B(N_141_i), .C(N_289_i), .Y(un1_instruction_18_i) ); defparam un1_instruction_18.INIT=8'h02; // @46:18188 CFG4 \gen_decode_rv32c.rv32c_dec_mnemonic2115_RNIFJ3KL ( .A(un1_instruction_13), .B(rv32c_dec_mnemonic2115), .C(un83_rv32i_dec_gpr_wr_valid), .D(rv32c_dec_mnemonic2131), .Y(rv32c_dec_gpr_wr_mux_sel_m_2[1]) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2115_RNIFJ3KL .INIT=16'h153F; // @46:15460 CFG3 un1_rv32c_dec_mnemonic2115_2 ( .A(N_141_i), .B(N_139_i), .C(N_290_i), .Y(un1_rv32c_dec_mnemonic2115_2_Z) ); defparam un1_rv32c_dec_mnemonic2115_2.INIT=8'hCA; // @46:18188 CFG3 \sw_csr_addr[10] ( .A(un1_instruction_33_i), .B(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .C(ifu_expipe_resp_ireg_net[30]), .Y(sw_csr_addr_de[10]) ); defparam \sw_csr_addr[10] .INIT=8'h80; // @46:18188 CFG3 \sw_csr_addr[6] ( .A(un1_instruction_33_i), .B(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .C(ifu_expipe_resp_ireg_net[26]), .Y(sw_csr_addr_de[6]) ); defparam \sw_csr_addr[6] .INIT=8'h80; // @46:18188 CFG3 \sw_csr_addr[5] ( .A(un1_instruction_33_i), .B(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .C(ifu_expipe_resp_ireg_net[25]), .Y(sw_csr_addr_de[5]) ); defparam \sw_csr_addr[5] .INIT=8'h80; // @46:18188 CFG3 \sw_csr_addr[8] ( .A(un1_instruction_33_i), .B(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .C(ifu_expipe_resp_ireg_net[28]), .Y(sw_csr_addr_de[8]) ); defparam \sw_csr_addr[8] .INIT=8'h80; // @46:13195 CFG3 \rv32i_dec_gpr_wr_mux_sel_0_a2[1] ( .A(N_117_i), .B(N_115_i), .C(N_290_i), .Y(N_217) ); defparam \rv32i_dec_gpr_wr_mux_sel_0_a2[1] .INIT=8'h21; // @46:15460 CFG3 un1_instruction_20 ( .A(N_290_i), .B(N_139_i), .C(N_289_i), .Y(un1_instruction_20_Z) ); defparam un1_instruction_20.INIT=8'h08; // @46:15460 CFG3 un1_instruction_9 ( .A(N_290_i), .B(N_139_i), .C(N_289_i), .Y(un1_instruction_9_Z) ); defparam un1_instruction_9.INIT=8'h80; // @46:8233 CFG3 un6_shift_op_complete_ex ( .A(de_ex_pipe_shifter_unit_op_sel_ex[0]), .B(un1_gpr_wr_mux_sel_ex_i), .C(de_ex_pipe_shifter_unit_op_sel_ex[1]), .Y(un6_shift_op_complete_ex_Z) ); defparam un6_shift_op_complete_ex.INIT=8'h37; // @46:8736 CFG3 de_ex_pipe_trap_ret_ex_2 ( .A(rv32i_dec_mnemonic4959), .B(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .C(rv32i_dec_mnemonic4958), .Y(de_ex_pipe_trap_ret_ex_2_1z) ); defparam de_ex_pipe_trap_ret_ex_2.INIT=8'hC8; // @46:18188 CFG3 \bcu_operand1_mux_sel_1_0_iv[0] ( .A(mnemonic536_Z), .B(rv32i_dec_mnemonic4959), .C(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .Y(bcu_operand1_mux_sel_de[0]) ); defparam \bcu_operand1_mux_sel_1_0_iv[0] .INIT=8'hEA; // @46:9640 CFG3 un18_lsu_op_str_ex_2 ( .A(lsu_op_ex_pipe_reg[1]), .B(un1_gpr_wr_mux_sel_ex_i), .C(lsu_op_ex_pipe_reg[2]), .Y(un18_lsu_op_str_ex_2_Z) ); defparam un18_lsu_op_str_ex_2.INIT=8'h37; // @46:13195 CFG3 un1_instruction_15 ( .A(N_137_i), .B(N_129_i), .C(N_133_i), .Y(un1_instruction_15_i) ); defparam un1_instruction_15.INIT=8'h04; // @46:15460 CFG3 un1_instruction_11 ( .A(N_290_i), .B(N_141_i), .C(N_289_i), .Y(un1_instruction_11_i) ); defparam un1_instruction_11.INIT=8'h10; // @46:13195 CFG3 \rv32i_dec_lsu_op_0_a2_0[2] ( .A(N_131_i), .B(N_115_i), .C(N_290_i), .Y(N_52) ); defparam \rv32i_dec_lsu_op_0_a2_0[2] .INIT=8'h10; // @46:13195 CFG3 un1_instruction_14 ( .A(N_133_i), .B(N_131_i), .C(N_129_i), .Y(un1_instruction_14_i) ); defparam un1_instruction_14.INIT=8'h04; // @46:13195 CFG4 \rv32i_dec_alu_op_sel_4_.m8_e_1_0 ( .A(ifu_expipe_resp_ireg_net[31]), .B(ifu_expipe_resp_ireg_net[30]), .C(ifu_expipe_resp_ireg_net[28]), .D(ifu_expipe_resp_ireg_net[29]), .Y(rv32m_dec_mnemonic846_i_12) ); defparam \rv32i_dec_alu_op_sel_4_.m8_e_1_0 .INIT=16'h0001; // @46:13195 CFG4 un1_instruction_12 ( .A(N_133_i), .B(N_117_i), .C(N_129_i), .D(N_115_i), .Y(un1_instruction_12_i) ); defparam un1_instruction_12.INIT=16'h8000; // @46:13195 CFG4 un1_instruction_25 ( .A(N_133_i), .B(N_117_i), .C(N_129_i), .D(N_115_i), .Y(un1_instruction_25_i) ); defparam un1_instruction_25.INIT=16'h0080; // @46:15082 CFG4 \gen_decode_rv32m.rv32m_dec_mnemonic846_9 ( .A(N_141_i), .B(N_139_i), .C(N_133_i), .D(N_131_i), .Y(un1_instruction_29_8) ); defparam \gen_decode_rv32m.rv32m_dec_mnemonic846_9 .INIT=16'h8000; // @46:13195 CFG3 un1_instruction_39_0_o2_0 ( .A(N_137_i), .B(N_290_i), .C(N_291_i), .Y(N_29) ); defparam un1_instruction_39_0_o2_0.INIT=8'h1D; // @46:13195 CFG3 \rv32i_dec_alu_op_sel_0_a2_0[0] ( .A(N_139_i), .B(N_291_i), .C(N_141_i), .Y(N_154) ); defparam \rv32i_dec_alu_op_sel_0_a2_0[0] .INIT=8'h20; // @46:13195 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4915_1_0 ( .A(N_141_i), .B(N_139_i), .C(N_131_i), .D(N_129_i), .Y(rv32i_dec_mnemonic4915_1_0) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4915_1_0 .INIT=16'h8000; // @46:2329 CFG2 N_1397_i ( .A(stage_state_retr), .B(ex_retr_pipe_sw_csr_wr_op_retr[1]), .Y(N_1397_i_1z) ); defparam N_1397_i.INIT=4'h8; // @46:2329 CFG2 N_1398_i ( .A(stage_state_retr), .B(ex_retr_pipe_sw_csr_wr_op_retr[0]), .Y(N_1398_i_1z) ); defparam N_1398_i.INIT=4'h8; // @46:11028 CFG2 N_14_i ( .A(un1_gpr_wr_mux_sel_ex_i), .B(de_ex_pipe_alu_op_sel_ex[4]), .Y(N_14_i_1z) ); defparam N_14_i.INIT=4'h8; // @46:11028 CFG2 N_8_i ( .A(un1_gpr_wr_mux_sel_ex_i), .B(de_ex_pipe_alu_op_sel_ex[3]), .Y(N_8_i_1z) ); defparam N_8_i.INIT=4'h8; // @46:11028 CFG2 N_10_i ( .A(un1_gpr_wr_mux_sel_ex_i), .B(de_ex_pipe_alu_op_sel_ex[2]), .Y(N_10_i_1z) ); defparam N_10_i.INIT=4'h8; // @46:11028 CFG2 N_4_i ( .A(un1_gpr_wr_mux_sel_ex_i), .B(de_ex_pipe_alu_op_sel_ex[1]), .Y(N_4_i_1z) ); defparam N_4_i.INIT=4'h8; // @46:11028 CFG2 N_6_i ( .A(un1_gpr_wr_mux_sel_ex_i), .B(de_ex_pipe_alu_op_sel_ex[0]), .Y(N_6_i_1z) ); defparam N_6_i.INIT=4'h8; // @46:15460 CFG3 \rv32c_dec_gpr_wr_sel_5[0] ( .A(rv32c_dec_mnemonic2116), .B(un1_rv32c_dec_mnemonic2114_1_i), .C(N_137_i), .Y(N_377) ); defparam \rv32c_dec_gpr_wr_sel_5[0] .INIT=8'hBA; // @46:15460 CFG4 \rv32c_dec_operand1_mux_sel_1_iv_i_m3[0] ( .A(N_139_i), .B(N_141_i), .C(N_115_i), .D(N_289_i), .Y(N_540) ); defparam \rv32c_dec_operand1_mux_sel_1_iv_i_m3[0] .INIT=16'hCCCA; // @46:13195 CFG4 un1_rv32i_dec_mnemonic4960_1_i_m17 ( .A(N_133_i), .B(N_117_i), .C(N_115_i), .D(N_290_i), .Y(N_561) ); defparam un1_rv32i_dec_mnemonic4960_1_i_m17.INIT=16'hDD8D; // @46:14609 CFG4 un1_rv32c_dec_mnemonic2137_1_2_o3_3 ( .A(N_141_i), .B(N_117_i), .C(N_119_i), .D(N_121_i), .Y(N_582) ); defparam un1_rv32c_dec_mnemonic2137_1_2_o3_3.INIT=16'hFD5D; // @46:13195 CFG4 \rv32i_dec_bcu_operand0_mux_sel_0_.m3 ( .A(N_290_i), .B(N_564_1), .C(N_131_i), .D(N_115_i), .Y(N_4_0) ); defparam \rv32i_dec_bcu_operand0_mux_sel_0_.m3 .INIT=16'hCC5F; // @46:15460 CFG4 \rv32c_dec_operand0_mux_sel_u[0] ( .A(rv32c_dec_mnemonic2132), .B(rv32c_dec_bcu_op_sel_2), .C(un1_instruction_13), .D(un83_rv32i_dec_gpr_wr_valid), .Y(rv32c_dec_operand0_mux_sel[0]) ); defparam \rv32c_dec_operand0_mux_sel_u[0] .INIT=16'h44E4; // @46:18188 CFG2 \exu_result_mux_sel_1_iv_RNO[0] ( .A(un1_rv32c_dec_mnemonic2123_2_s4), .B(rv32c_dec_dbreakpoint_m_0), .Y(rv32c_dec_exu_result_mux_sel_m_1[0]) ); defparam \exu_result_mux_sel_1_iv_RNO[0] .INIT=4'h1; // @46:18188 CFG4 \gen_gpr_ex_attbs_rd_ex.de_ex_pipe_gpr_rs1_rd_valid_ex_2_RNO_0 ( .A(rv32c_dec_mnemonic1881), .B(un1_rv32c_dec_mnemonic2119_1_i), .C(N_117_i), .D(un1_instruction_11_i), .Y(rv32c_dec_gpr_rs1_rd_valid_1_m_3) ); defparam \gen_gpr_ex_attbs_rd_ex.de_ex_pipe_gpr_rs1_rd_valid_ex_2_RNO_0 .INIT=16'h153F; // @46:18188 CFG4 \operand1_mux_sel_1_iv_RNO_0[1] ( .A(N_566_1), .B(un1_instruction_29_1_1z), .C(N_133_i), .D(N_137_i), .Y(rv32i_dec_operand1_mux_sel_m_1[1]) ); defparam \operand1_mux_sel_1_iv_RNO_0[1] .INIT=16'h0800; // @46:18188 CFG4 gpr_rs2_rd_valid_iv_RNO_2 ( .A(N_141_i), .B(N_131_i), .C(N_137_i), .D(rv32i_dec_gpr_rs2_rd_valid_m_3), .Y(rv32i_dec_gpr_rs2_rd_valid_m_2) ); defparam gpr_rs2_rd_valid_iv_RNO_2.INIT=16'h0800; // @46:18188 CFG4 fence_0_2 ( .A(debug_exit_retr), .B(rv32i_dec_fence_Z), .C(soft_reset_taken_retr_1z), .D(trace_exception), .Y(fence_0_2_Z) ); defparam fence_0_2.INIT=16'h0004; // @46:9349 CFG4 un12_gpr_rd_rs3_completing_ex_0 ( .A(de_ex_pipe_shifter_unit_places_sel_ex_0), .B(shifter_unit_places_sel_0), .C(shifter_operand_sel[0]), .D(shifter_operand_sel[1]), .Y(un12_gpr_rd_rs3_completing_ex_0_Z) ); defparam un12_gpr_rd_rs3_completing_ex_0.INIT=16'h0FDF; // @46:13195 CFG4 un1_rv32i_dec_mnemonic4915_1_10 ( .A(rv32i_dec_mnemonic4958), .B(rv32i_dec_mnemonic4960), .C(rv32i_dec_mnemonic4959), .D(un1_rv32i_dec_mnemonic4915_1_5_Z), .Y(un1_rv32i_dec_mnemonic4915_1_10_Z) ); defparam un1_rv32i_dec_mnemonic4915_1_10.INIT=16'hFFFE; // @46:13195 CFG4 \rv32i_dec_shifter_unit_op_sel_1_0_.m15_1 ( .A(ifu_expipe_resp_ireg_net[29]), .B(ifu_expipe_resp_ireg_net[27]), .C(rv32m_dec_mnemonic847_0), .D(ifu_expipe_resp_ireg_net[28]), .Y(m15_1_0) ); defparam \rv32i_dec_shifter_unit_op_sel_1_0_.m15_1 .INIT=16'h0010; // @46:14816 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4956_3 ( .A(ifu_expipe_resp_ireg_net[31]), .B(ifu_expipe_resp_ireg_net[30]), .C(rv32i_dec_mnemonic4953_5), .D(ifu_expipe_resp_ireg_net[25]), .Y(rv32i_dec_mnemonic4956_3) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4956_3 .INIT=16'h0010; // @46:15082 CFG4 \gen_decode_rv32m.rv32m_dec_mnemonic847_2 ( .A(rv32i_dec_mnemonic4926_4), .B(rv32i_dec_alu_op_sel_m_0_2), .C(ifu_expipe_resp_ireg_net[25]), .D(rv32m_dec_mnemonic847_0), .Y(rv32m_dec_mnemonic847_2) ); defparam \gen_decode_rv32m.rv32m_dec_mnemonic847_2 .INIT=16'h8000; // @46:15082 CFG4 \gen_decode_rv32m.rv32m_dec_mnemonic853_2 ( .A(ifu_expipe_resp_ireg_net[26]), .B(rv32m_dec_mnemonic853_0), .C(un1_instruction_12_i_2), .D(rv32i_dec_alu_op_sel_m_0_2), .Y(rv32m_dec_mnemonic853_2) ); defparam \gen_decode_rv32m.rv32m_dec_mnemonic853_2 .INIT=16'h4000; // @46:13195 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4952_1 ( .A(N_137_i), .B(N_115_i), .C(rv32i_dec_mnemonic4950_3), .D(rv32i_dec_mnemonic4952_5), .Y(rv32i_dec_mnemonic4952_1) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4952_1 .INIT=16'h4000; // @46:13195 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4920_1 ( .A(un1_instruction_12_i_2), .B(rv32i_dec_mnemonic4917_3), .C(N_291_i), .D(N_133_i), .Y(rv32i_dec_mnemonic4920_1) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4920_1 .INIT=16'h0008; // @46:13195 CFG4 \rv32i_dec_gpr_wr_mux_sel_0_a6_1[0] ( .A(N_131_i), .B(N_115_i), .C(N_100_1), .D(N_564_1), .Y(rv32i_dec_gpr_wr_mux_sel_0_a6_1_Z[0]) ); defparam \rv32i_dec_gpr_wr_mux_sel_0_a6_1[0] .INIT=16'h5010; // @46:15460 CFG4 \gen_decode_rv32c.rv32c_dec_mnemonic2121_2 ( .A(N_290_i), .B(rv32c_dec_mnemonic2121_1), .C(N_119_i), .D(N_141_i), .Y(rv32c_dec_mnemonic2121_2) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2121_2 .INIT=16'h4000; // @46:9986 CFG4 gpr_wr_valid_retr_1_1_0 ( .A(stage_state_retr), .B(ex_retr_pipe_exu_result_valid_retr), .C(trace_priv_i), .D(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .Y(gpr_wr_valid_retr_1_1_0_1z) ); defparam gpr_wr_valid_retr_1_1_0.INIT=16'hC800; // @46:8704 CFG4 un3_instr_inhibit_ex_5 ( .A(de_ex_pipe_trigger_ex[1]), .B(un3_instr_inhibit_ex_3), .C(de_ex_pipe_m_env_call_ex), .D(un3_instr_inhibit_ex_4_Z), .Y(un3_instr_inhibit_ex_5_Z) ); defparam un3_instr_inhibit_ex_5.INIT=16'hFFFE; // @46:8234 CFG4 \gen_trig_de.un29_csr_trigger_wr_hzd_de_3 ( .A(ex_retr_pipe_sw_csr_addr_retr[10]), .B(ex_retr_pipe_sw_csr_addr_retr[11]), .C(un29_csr_trigger_wr_hzd_de_4), .D(un29_csr_trigger_wr_hzd_de_1), .Y(un29_csr_trigger_wr_hzd_de_3) ); defparam \gen_trig_de.un29_csr_trigger_wr_hzd_de_3 .INIT=16'h2000; // @46:13195 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4915_3_0 ( .A(N_565_1), .B(N_566_1), .C(un1_instruction_29_1_1z), .D(rv32i_dec_alu_op_sel_m_0_2), .Y(rv32i_dec_mnemonic4915_3_0) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4915_3_0 .INIT=16'h8000; // @46:15082 CFG4 un1_instruction_29_1_0 ( .A(rv32i_dec_alu_op_sel_0_a5_2_0_Z[2]), .B(un1_instruction_29_1_1z), .C(un1_instruction_29_3_Z), .D(N_95_2), .Y(un1_instruction_29_1_0_Z) ); defparam un1_instruction_29_1_0.INIT=16'h8000; // @46:13195 CFG4 \rv32i_dec_gpr_wr_valid_cnst.m20 ( .A(N_290_i), .B(N_46_1), .C(N_129_i), .D(N_115_i), .Y(i19_mux) ); defparam \rv32i_dec_gpr_wr_valid_cnst.m20 .INIT=16'h0040; // @46:13195 CFG3 \rv32i_dec_alu_op_sel_0_a2_2[1] ( .A(ifu_expipe_resp_ireg_net[25]), .B(ifu_expipe_resp_ireg_net[26]), .C(rv32i_dec_alu_op_sel_0_a2_2_0_Z[1]), .Y(N_168) ); defparam \rv32i_dec_alu_op_sel_0_a2_2[1] .INIT=8'h10; // @46:15460 CFG4 un1_instruction_27 ( .A(N_139_i), .B(N_119_i), .C(un1_instruction_27_2_Z), .D(N_290_i), .Y(un1_instruction_27_1z) ); defparam un1_instruction_27.INIT=16'h0010; // @46:15460 CFG4 \gen_decode_rv32c.rv32c_dec_mnemonic2132 ( .A(un1_instruction_11_i_1), .B(rv32i_dec_mnemonic4916_5), .C(N_139_i), .D(N_117_i), .Y(rv32c_dec_mnemonic2132) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2132 .INIT=16'h8000; // @46:15460 CFG4 \gen_decode_rv32c.rv32c_dec_mnemonic2133 ( .A(N_139_i), .B(N_115_i), .C(N_290_i), .D(un1_instruction_11_i_1), .Y(rv32c_dec_mnemonic2133) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2133 .INIT=16'h2000; // @46:15460 CFG4 \gen_decode_rv32c.rv32c_dec_mnemonic2126 ( .A(N_289_i), .B(N_115_i), .C(N_290_i), .D(rv32c_dec_mnemonic2119_2), .Y(rv32c_dec_mnemonic2126) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2126 .INIT=16'h0800; // @46:15460 CFG4 \gen_decode_rv32c.rv32c_dec_mnemonic2128 ( .A(N_289_i), .B(N_115_i), .C(N_290_i), .D(rv32c_dec_mnemonic2119_2), .Y(rv32c_dec_mnemonic2128) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2128 .INIT=16'h8000; // @46:13195 CFG4 \rv32i_dec_gpr_rs1_rd_valid.m26 ( .A(N_117_i), .B(N_115_i), .C(N_290_i), .D(un1_instruction_14_i_1), .Y(N_41_mux) ); defparam \rv32i_dec_gpr_rs1_rd_valid.m26 .INIT=16'h0100; // @46:13195 CFG4 \rv32i_dec_bcu_operand0_mux_sel_0_.m13_e ( .A(rv32i_dec_gpr_rs2_rd_valid_m_3), .B(rv32i_dec_mnemonic4948), .C(N_141_i), .D(N_133_i), .Y(N_22) ); defparam \rv32i_dec_bcu_operand0_mux_sel_0_.m13_e .INIT=16'h0020; // @46:9342 CFG4 un6_lsu_op_complete_ex ( .A(lsu_expipe_req_op_net[2]), .B(lsu_expipe_req_op_net[1]), .C(lsu_expipe_req_op_net[0]), .D(lsu_expipe_req_op_net[3]), .Y(un6_lsu_op_complete_ex_Z) ); defparam un6_lsu_op_complete_ex.INIT=16'h0001; // @46:15460 CFG4 \gen_decode_rv32c.rv32c_dec_mnemonic2131 ( .A(N_289_i), .B(N_139_i), .C(N_564_1), .D(rv32c_dec_mnemonic2129_2), .Y(rv32c_dec_mnemonic2131) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2131 .INIT=16'h8000; // @46:18188 CFG4 \bcu_operand1_mux_sel_1_0_iv[1] ( .A(mnemonic537_Z), .B(mnemonic536_Z), .C(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .D(rv32i_dec_mnemonic4958), .Y(bcu_operand1_mux_sel_de[1]) ); defparam \bcu_operand1_mux_sel_1_0_iv[1] .INIT=16'hFEEE; // @46:14609 CFG4 \gen_decode_rv32c.rv32c_dec_mnemonic2112 ( .A(N_289_i), .B(N_139_i), .C(rv32c_dec_mnemonic2129_2), .D(N_290_i), .Y(rv32c_dec_mnemonic2112) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2112 .INIT=16'h0010; // @46:15460 CFG4 \gen_decode_rv32c.rv32c_dec_mnemonic2115 ( .A(N_289_i), .B(N_139_i), .C(rv32c_dec_mnemonic2115_i_2), .D(N_290_i), .Y(rv32c_dec_mnemonic2115) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2115 .INIT=16'h0010; // @46:15460 CFG4 \gen_decode_rv32c.rv32c_dec_mnemonic2130 ( .A(N_139_i), .B(N_289_i), .C(N_115_i), .D(un1_instruction_22_i), .Y(rv32c_dec_mnemonic2130_0) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2130 .INIT=16'h0200; // @46:15460 CFG4 \gen_decode_rv32c.rv32c_dec_mnemonic2129 ( .A(N_289_i), .B(N_139_i), .C(rv32c_dec_mnemonic2129_2), .D(N_290_i), .Y(rv32c_dec_mnemonic2129) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2129 .INIT=16'h0040; // @46:9640 CFG4 un18_lsu_op_str_ex ( .A(lsu_op_ex_pipe_reg[0]), .B(un5_lsu_op_ex_pipe_Z[1]), .C(un5_lsu_op_ex_pipe_Z[2]), .D(un5_lsu_op_ex_pipe_Z[3]), .Y(un18_lsu_op_str_ex_Z) ); defparam un18_lsu_op_str_ex.INIT=16'h0100; // @46:9633 CFG4 un13_instr_is_lsu_ldstr_ex ( .A(un1_gpr_wr_mux_sel_ex_i), .B(lsu_op_ex_pipe_reg[0]), .C(un5_lsu_op_ex_pipe_Z[3]), .D(un18_lsu_op_str_ex_2_Z), .Y(un13_instr_is_lsu_ldstr_ex_Z) ); defparam un13_instr_is_lsu_ldstr_ex.INIT=16'h0800; // @46:9342 CFG4 un6_instr_is_lsu_op_retr ( .A(ex_retr_pipe_lsu_op_retr[1]), .B(ex_retr_pipe_lsu_op_retr[2]), .C(un6_instr_is_lsu_op_retr_0_Z), .D(stage_state_retr), .Y(un6_instr_is_lsu_op_retr_1z) ); defparam un6_instr_is_lsu_op_retr.INIT=16'h10F0; // @46:13195 CFG4 un1_instruction_24 ( .A(N_137_i), .B(N_131_i), .C(un1_instruction_24_i_1), .D(N_115_i), .Y(un1_instruction_24_i) ); defparam un1_instruction_24.INIT=16'h0010; // @46:13195 CFG3 \rv32i_dec_alu_op_sel_4_.m8_e ( .A(rv32i_dec_shifter_unit_places_3[2]), .B(rv32m_dec_mnemonic846_i_12), .C(ifu_expipe_resp_ireg_net[25]), .Y(N_26) ); defparam \rv32i_dec_alu_op_sel_4_.m8_e .INIT=8'h08; // @46:13195 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4912 ( .A(N_95_2), .B(un1_instruction_29_1_1z), .C(N_131_i), .D(un1_instruction_i_2), .Y(rv32i_dec_mnemonic4912) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4912 .INIT=16'h0800; // @46:13195 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4913 ( .A(N_566_1), .B(un1_instruction_29_1_1z), .C(N_133_i), .D(rv32i_dec_mnemonic4913_i_2), .Y(rv32i_dec_mnemonic4913) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4913 .INIT=16'h0800; // @46:13195 CFG4 \rv32i_dec_lsu_op_0_a2_1[0] ( .A(N_291_i), .B(N_133_i), .C(rv32i_dec_mnemonic4947), .D(un1_instruction_29_1_1z), .Y(N_51) ); defparam \rv32i_dec_lsu_op_0_a2_1[0] .INIT=16'h1000; // @46:9341 CFG4 un16_gpr_rd_rs1_completing_ex_1 ( .A(shifter_operand_sel[0]), .B(shifter_operand_sel[1]), .C(shifter_unit_op_sel[0]), .D(shifter_unit_op_sel[1]), .Y(un16_gpr_rd_rs1_completing_ex_1_Z) ); defparam un16_gpr_rd_rs1_completing_ex_1.INIT=16'hDDDF; // @46:8717 CFG3 un3_bcu_op_sel_ex_RNI4LNGA_1 ( .A(un3_bcu_op_sel_ex_1z), .B(un3_branch_cond_ex[0]), .C(un3_branch_cond_ex[1]), .Y(ifu_m3_a0_1) ); defparam un3_bcu_op_sel_ex_RNI4LNGA_1.INIT=8'h02; // @46:9397 CFG3 un3_bcu_op_sel_ex_RNI4LNGA ( .A(un3_bcu_op_sel_ex_1z), .B(un3_branch_cond_ex[0]), .C(un3_branch_cond_ex[1]), .Y(de_m4_e_1) ); defparam un3_bcu_op_sel_ex_RNI4LNGA.INIT=8'h20; // @46:15460 CFG3 \rv32c_dec_immediate_0_0[17] ( .A(rv32c_dec_mnemonic2117_2), .B(N_130_i_Z), .C(N_289_i), .Y(N_489_1) ); defparam \rv32c_dec_immediate_0_0[17] .INIT=8'hEC; // @46:9986 CFG2 gpr_wr_valid_retr_2_1_2_1_0 ( .A(debug_enter_retr), .B(trace_priv_i), .Y(soft_reset_taken_retr_0) ); defparam gpr_wr_valid_retr_2_1_2_1_0.INIT=4'h1; // @46:13195 CFG4 \rv32i_dec_immediate[31] ( .A(rv32i_dec_mnemonic4913), .B(un1_instruction), .C(un1_instruction_38_i), .D(N_482_2), .Y(N_482) ); defparam \rv32i_dec_immediate[31] .INIT=16'hFFFE; // @46:15460 CFG4 un1_rv32c_dec_mnemonic2123_1_0 ( .A(rv32c_dec_mnemonic2123_1), .B(rv32i_dec_mnemonic4916_5), .C(N_139_i), .D(N_129_i), .Y(un1_rv32c_dec_mnemonic2123_1_0_Z) ); defparam un1_rv32c_dec_mnemonic2123_1_0.INIT=16'h8C88; CFG3 un1_rv32c_dec_mnemonic2119_1_RNO ( .A(N_139_i), .B(N_119_i), .C(N_141_i), .Y(N_4922_tz) ); defparam un1_rv32c_dec_mnemonic2119_1_RNO.INIT=8'h10; // @46:13195 CFG3 \rv32i_dec_immediate_1_iv_tz[5] ( .A(rv32i_dec_mnemonic4913), .B(un1_instruction_38_i), .C(N_482_2), .Y(rv32i_dec_immediate_tz[5]) ); defparam \rv32i_dec_immediate_1_iv_tz[5] .INIT=8'hFE; // @46:10186 CFG4 \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_wr_op_retr_2_iv[0] ( .A(un3_ex_retr_pipe_sw_csr_wr_op_retr), .B(trace_priv_i), .C(sw_csr_wr_op_ex_Z[0]), .D(instr_accepted_retr_2), .Y(ex_retr_pipe_sw_csr_wr_op_retr_2[0]) ); defparam \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_wr_op_retr_2_iv[0] .INIT=16'hF888; // @46:10155 CFG4 un3_csr_complete_retr ( .A(ex_retr_pipe_sw_csr_rd_op_retr), .B(stage_state_retr), .C(ex_retr_pipe_sw_csr_wr_op_retr[1]), .D(ex_retr_pipe_sw_csr_wr_op_retr[0]), .Y(un3_csr_complete_retr_Z) ); defparam un3_csr_complete_retr.INIT=16'h3337; // @46:15460 CFG3 un1_instruction_40 ( .A(N_547), .B(rv32c_dec_mnemonic2121), .C(N_141_i), .Y(un1_instruction_40_Z) ); defparam un1_instruction_40.INIT=8'hD0; // @46:13195 CFG4 \rv32i_dec_alu_op_sel_0_o5_0[0] ( .A(N_291_i), .B(N_117_i), .C(N_115_i), .D(N_290_i), .Y(N_134) ); defparam \rv32i_dec_alu_op_sel_0_o5_0[0] .INIT=16'hAAAB; // @46:9345 CFG4 un21_gpr_rd_rs2_completing_ex ( .A(de_ex_pipe_shifter_unit_places_sel_ex_0), .B(shifter_unit_places_sel_0), .C(shifter_operand_sel[0]), .D(shifter_operand_sel[1]), .Y(un21_gpr_rd_rs2_completing_ex_Z) ); defparam un21_gpr_rd_rs2_completing_ex.INIT=16'hE0EF; // @46:8842 CFG2 \gen_read_gpr_rs1_ex.gen_rs1_exu_stall.un6_gpr_rs1_stall_exu ( .A(stage_state_retr), .B(ex_retr_pipe_gpr_wr_en_retr), .Y(un6_gpr_rs1_stall_exu) ); defparam \gen_read_gpr_rs1_ex.gen_rs1_exu_stall.un6_gpr_rs1_stall_exu .INIT=4'h8; // @46:18188 CFG4 fence_i_iv ( .A(rv32i_dec_mnemonic4949), .B(rv32c_dec_fence_i_m_0), .C(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .D(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .Y(fence_i_de) ); defparam fence_i_iv.INIT=16'hEAC0; // @46:18188 CFG2 case_dec_gpr_rs2_rd_sel_2_sqmuxa_RNI98ALL ( .A(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .B(rv32c_dec_dbreakpoint_m_0), .Y(rv32c_dec_gpr_wr_valid_m_1) ); defparam case_dec_gpr_rs2_rd_sel_2_sqmuxa_RNI98ALL.INIT=4'h2; // @46:15460 CFG2 \rv32c_dec_immediate[2] ( .A(rv32c_dec_mnemonic2112), .B(un1_instruction_21_Z), .Y(N_490) ); defparam \rv32c_dec_immediate[2] .INIT=4'hE; // @46:13195 CFG3 un1_instruction_38_RNI1R9MH ( .A(un1_instruction_38_i), .B(N_482_2), .C(ifu_expipe_resp_ireg_net[31]), .Y(instruction_m_0[31]) ); defparam un1_instruction_38_RNI1R9MH.INIT=8'hE0; // @46:14609 CFG4 \gen_decode_rv32c.un1_instruction_13 ( .A(N_129_i), .B(un1_instruction_14_2), .C(N_291_i), .D(N_137_i), .Y(un1_instruction_13) ); defparam \gen_decode_rv32c.un1_instruction_13 .INIT=16'h0004; // @46:15460 CFG4 \rv32c_dec_immediate_1_iv_1_RNO[6] ( .A(N_137_i), .B(N_290_i), .C(N_139_i), .D(N_289_i), .Y(instruction_m_3[2]) ); defparam \rv32c_dec_immediate_1_iv_1_RNO[6] .INIT=16'h0080; // @46:14761 CFG4 \gen_decode_rv32c.un1_instruction_14 ( .A(N_137_i), .B(N_291_i), .C(un1_instruction_14_3), .D(un1_instruction_14_2), .Y(un1_instruction_14_Z) ); defparam \gen_decode_rv32c.un1_instruction_14 .INIT=16'h1000; // @46:15460 CFG4 \gen_decode_rv32c.rv32c_dec_mnemonic2116 ( .A(N_141_i), .B(N_115_i), .C(N_290_i), .D(un1_instruction_26_1), .Y(rv32c_dec_mnemonic2116) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2116 .INIT=16'h0800; // @46:15460 CFG4 \gen_decode_rv32c.rv32c_dec_mnemonic2118 ( .A(N_141_i), .B(N_115_i), .C(N_290_i), .D(un1_instruction_26_1), .Y(rv32c_dec_mnemonic2118) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2118 .INIT=16'h8000; // @46:8300 CFG4 \rv32c_dec_alu_op_sel_1_iv_RNO[0] ( .A(rv32c_dec_mnemonic2123), .B(rv32c_dec_mnemonic2115), .C(rv32c_dec_mnemonic2131), .D(rv32c_dec_mnemonic2132), .Y(rv32c_dec_mnemonic2123_s5) ); defparam \rv32c_dec_alu_op_sel_1_iv_RNO[0] .INIT=16'h0002; // @46:13195 CFG4 \rv32i_dec_alu_op_sel_0_a5_0_2[0] ( .A(N_291_i), .B(N_141_i), .C(N_139_i), .D(N_160), .Y(N_144_2) ); defparam \rv32i_dec_alu_op_sel_0_a5_0_2[0] .INIT=16'h4000; // @46:15460 CFG4 \rv32c_dec_shifter_unit_places_1_.m8_e ( .A(N_139_i), .B(N_115_i), .C(N_290_i), .D(N_17_1), .Y(N_16) ); defparam \rv32c_dec_shifter_unit_places_1_.m8_e .INIT=16'h0E0F; // @46:13195 CFG4 \rv32i_dec_exu_result_mux_sel_0_o3[1] ( .A(N_137_i), .B(ifu_expipe_resp_ireg_net[30]), .C(un1_instruction_24_i_1), .D(N_290_i), .Y(N_73) ); defparam \rv32i_dec_exu_result_mux_sel_0_o3[1] .INIT=16'hF011; // @46:13195 CFG4 \rv32i_dec_alu_op_sel_0_a2[1] ( .A(N_139_i), .B(N_137_i), .C(N_291_i), .D(N_141_i), .Y(N_155) ); defparam \rv32i_dec_alu_op_sel_0_a2[1] .INIT=16'h0200; // @46:13195 CFG4 \rv32i_dec_bcu_op_sel.m4_0_1 ( .A(N_137_i), .B(N_117_i), .C(N_2), .D(N_290_i), .Y(N_6) ); defparam \rv32i_dec_bcu_op_sel.m4_0_1 .INIT=16'h00D1; // @46:13195 CFG4 \rv32i_dec_gpr_rs2_rd_valid.m15 ( .A(N_133_i), .B(N_117_i), .C(N_115_i), .D(N_290_i), .Y(N_23_mux) ); defparam \rv32i_dec_gpr_rs2_rd_valid.m15 .INIT=16'h55AD; // @46:13195 CFG3 \rv32i_dec_gpr_rs2_rd_valid.m6 ( .A(ifu_expipe_resp_ireg_net[30]), .B(ifu_expipe_resp_ireg_net[25]), .C(N_217), .Y(N_24_mux_0) ); defparam \rv32i_dec_gpr_rs2_rd_valid.m6 .INIT=8'h31; // @46:13195 CFG4 \rv32i_dec_bcu_operand0_mux_sel_0_.m4 ( .A(N_2_0), .B(N_564_1), .C(N_129_i), .D(N_115_i), .Y(i9_mux_0) ); defparam \rv32i_dec_bcu_operand0_mux_sel_0_.m4 .INIT=16'h0C05; // @46:13195 CFG2 \rv32i_dec_gpr_rs1_rd_valid.m18_2_0 ( .A(rv32i_dec_alu_op_sel_0_a5_2_0_Z[2]), .B(N_137_i), .Y(N_19_2) ); defparam \rv32i_dec_gpr_rs1_rd_valid.m18_2_0 .INIT=4'h4; // @46:13195 CFG4 \rv32i_dec_gpr_rs1_rd_valid.m6_1_0 ( .A(N_117_i), .B(N_115_i), .C(N_290_i), .D(N_2_0), .Y(N_7_1) ); defparam \rv32i_dec_gpr_rs1_rd_valid.m6_1_0 .INIT=16'h2031; // @46:13195 CFG4 \rv32i_dec_gpr_rs1_rd_valid.m22_2_0 ( .A(N_115_i), .B(N_133_i), .C(N_2_0), .D(un1_rv32i_dec_mnemonic4960_1_i_a17_2_1_0), .Y(i5_mux_2) ); defparam \rv32i_dec_gpr_rs1_rd_valid.m22_2_0 .INIT=16'hAA02; // @46:13195 CFG4 \rv32i_dec_bcu_op_sel.m11_2_0 ( .A(N_2), .B(rv32i_dec_mnemonic4952_5), .C(N_117_i), .D(rv32m_dec_mnemonic848_1), .Y(N_21_mux_2) ); defparam \rv32i_dec_bcu_op_sel.m11_2_0 .INIT=16'hCC40; // @46:13195 CFG3 \rv32i_dec_bcu_op_sel.m11_1_0 ( .A(N_291_i), .B(N_137_i), .C(rv32i_dec_mnemonic4952_5), .Y(N_21_mux_1) ); defparam \rv32i_dec_bcu_op_sel.m11_1_0 .INIT=8'h06; // @46:9236 CFG4 \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_sel_ex_2_0_0[2] ( .A(trace_priv_i), .B(cpu_debug_gpr_op_addr_net[2]), .C(N_71), .D(N_133_i), .Y(de_ex_pipe_gpr_rs2_rd_sel_ex_2_0_0[2]) ); defparam \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_sel_ex_2_0_0[2] .INIT=16'hF888; // @46:18188 CFG4 \exu_result_mux_sel_1_iv_RNO_0[0] ( .A(rv32c_dec_fence_i_m_0), .B(rv32c_dec_gpr_rs1_rd_sel_19_m_1[3]), .C(un1_rv32c_dec_mnemonic2119_1_i), .D(un1_rv32c_dec_mnemonic2115_4_Z), .Y(rv32c_dec_exu_result_mux_sel_m_0[0]) ); defparam \exu_result_mux_sel_1_iv_RNO_0[0] .INIT=16'h1101; // @46:15460 CFG4 \rv32c_dec_alu_op_sel_1_iv_3[0] ( .A(un1_rv32c_dec_mnemonic2115_4_Z), .B(un1_rv32c_dec_mnemonic2116_9_s1), .C(un1_rv32c_dec_mnemonic2125_5_i_0), .D(rv32c_dec_alu_op_sel_1_iv_0_Z[0]), .Y(rv32c_dec_alu_op_sel_1_iv_3_Z[0]) ); defparam \rv32c_dec_alu_op_sel_1_iv_3[0] .INIT=16'hFFDC; // @46:13195 CFG3 \rv32i_dec_shifter_unit_places_2_0_.m19_3 ( .A(ifu_expipe_resp_ireg_net[25]), .B(m19_1_0), .C(un1_instruction_24_i_1), .Y(m19_3) ); defparam \rv32i_dec_shifter_unit_places_2_0_.m19_3 .INIT=8'h40; // @46:14816 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4956_4 ( .A(N_7_0), .B(rv32i_dec_alu_op_sel_0_a5_2_0_Z[2]), .C(N_290_i), .D(rv32i_dec_mnemonic4956_3), .Y(rv32i_dec_mnemonic4956_4) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4956_4 .INIT=16'h0400; // @46:13195 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4948_3 ( .A(rv32i_dec_mnemonic4948_0), .B(rv32i_dec_mnemonic4926_4), .C(ifu_expipe_resp_ireg_net[28]), .D(rv32i_dec_mnemonic4913_i_2), .Y(rv32i_dec_mnemonic4948_3) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4948_3 .INIT=16'h0800; // @46:15082 CFG4 \gen_decode_rv32m.rv32m_dec_mnemonic852_2 ( .A(N_117_i), .B(un1_instruction_29_3_Z), .C(N_95_2), .D(rv32i_dec_mnemonic4919_3), .Y(rv32m_dec_mnemonic852_2) ); defparam \gen_decode_rv32m.rv32m_dec_mnemonic852_2 .INIT=16'h4000; // @46:15082 CFG4 \gen_decode_rv32m.rv32m_dec_mnemonic850_2 ( .A(rv32i_dec_mnemonic4926_4), .B(rv32i_dec_alu_op_sel_m_0_2), .C(N_117_i), .D(rv32m_dec_mnemonic850_i_3), .Y(rv32m_dec_mnemonic850_2) ); defparam \gen_decode_rv32m.rv32m_dec_mnemonic850_2 .INIT=16'h0800; // @46:15460 CFG4 un1_rv32c_dec_mnemonic2112_2_0 ( .A(un1_instruction_26_1), .B(rv32c_dec_mnemonic2117_2), .C(N_115_i), .D(rv32c_dec_mnemonic2130), .Y(un1_rv32c_dec_mnemonic2112_2_0_Z) ); defparam un1_rv32c_dec_mnemonic2112_2_0.INIT=16'hFF08; // @46:15082 CFG4 \gen_decode_rv32m.rv32m_dec_mnemonic848_4 ( .A(rv32m_dec_mnemonic848_0), .B(rv32i_dec_alu_op_sel_m_0_2), .C(ifu_expipe_resp_ireg_net[25]), .D(rv32m_dec_mnemonic848_1), .Y(rv32m_dec_mnemonic848_4) ); defparam \gen_decode_rv32m.rv32m_dec_mnemonic848_4 .INIT=16'h8000; // @46:15082 CFG4 \gen_decode_rv32m.rv32m_dec_mnemonic849_2 ( .A(un1_instruction_29_5_Z), .B(N_95_2), .C(ifu_expipe_resp_ireg_net[31]), .D(un1_instruction_12_i_2), .Y(rv32m_dec_mnemonic849_2) ); defparam \gen_decode_rv32m.rv32m_dec_mnemonic849_2 .INIT=16'h0800; // @46:15082 CFG3 \gen_decode_rv32m.rv32m_dec_mnemonic851_4 ( .A(ifu_expipe_resp_ireg_net[26]), .B(rv32m_dec_mnemonic851_2), .C(N_95_2), .Y(rv32m_dec_mnemonic851_4) ); defparam \gen_decode_rv32m.rv32m_dec_mnemonic851_4 .INIT=8'h40; // @46:13195 CFG3 \rv32i_dec_exu_result_mux_sel_0_a4_1[1] ( .A(N_28_mux_3), .B(N_73), .C(N_115_i), .Y(rv32i_dec_exu_result_mux_sel_0_a4_1_Z[1]) ); defparam \rv32i_dec_exu_result_mux_sel_0_a4_1[1] .INIT=8'h08; // @46:15460 CFG4 \rv32c_dec_immediate_1[5] ( .A(un1_instruction_21_Z), .B(rv32c_dec_mnemonic2112), .C(un1_instruction_20_Z), .D(un1_instruction_9_Z), .Y(rv32c_dec_immediate_1_Z[5]) ); defparam \rv32c_dec_immediate_1[5] .INIT=16'hFFFE; // @46:13195 CFG4 \rv32i_dec_gpr_wr_mux_sel_0_a6_1_0[1] ( .A(ifu_expipe_resp_ireg_net[31]), .B(ifu_expipe_resp_ireg_net[30]), .C(N_217), .D(ifu_expipe_resp_ireg_net[29]), .Y(rv32i_dec_gpr_wr_mux_sel_0_a6_1_0_Z[1]) ); defparam \rv32i_dec_gpr_wr_mux_sel_0_a6_1_0[1] .INIT=16'h0051; // @46:13195 CFG4 \rv32i_dec_operand1_mux_sel_0_a2_0_2[0] ( .A(N_7_0), .B(N_133_i), .C(N_2_0), .D(N_127_0), .Y(rv32i_dec_operand1_mux_sel_0_a2_0_2_Z[0]) ); defparam \rv32i_dec_operand1_mux_sel_0_a2_0_2[0] .INIT=16'h4000; // @46:13195 CFG4 \rv32i_dec_exu_result_mux_sel_0_a2_0_0[0] ( .A(N_130), .B(un1_instruction_29_1_1z), .C(N_291_i), .D(N_137_i), .Y(rv32i_dec_exu_result_mux_sel_0_a2_0_0_Z[0]) ); defparam \rv32i_dec_exu_result_mux_sel_0_a2_0_0[0] .INIT=16'hC008; // @46:9633 CFG4 instr_is_lsu_ldstr_ex_0_0 ( .A(un5_lsu_op_ex_pipe_Z[1]), .B(un5_lsu_op_ex_pipe_Z[2]), .C(un5_lsu_op_ex_pipe_Z[3]), .D(un13_instr_is_lsu_ldstr_ex_Z), .Y(instr_is_lsu_ldstr_ex_0_0_Z) ); defparam instr_is_lsu_ldstr_ex_0_0.INIT=16'hFF0E; // @46:8230 CFG4 \gen_trig_de.un11_csr_trigger_wr_hzd_de_8 ( .A(de_ex_pipe_sw_csr_addr_ex[9]), .B(de_ex_pipe_sw_csr_addr_ex[5]), .C(un11_csr_trigger_wr_hzd_de_6), .D(un11_csr_trigger_wr_hzd_de_5), .Y(un11_csr_trigger_wr_hzd_de_8) ); defparam \gen_trig_de.un11_csr_trigger_wr_hzd_de_8 .INIT=16'h8000; // @46:10369 CFG4 un11_lsu_resp_ready_1_1_0 ( .A(ex_retr_pipe_lsu_op_retr[1]), .B(stage_state_retr), .C(ex_retr_pipe_lsu_op_retr[3]), .D(ex_retr_pipe_lsu_op_retr[2]), .Y(un11_lsu_resp_ready_1_1_0_Z) ); defparam un11_lsu_resp_ready_1_1_0.INIT=16'h0840; // @46:10369 CFG4 un11_lsu_resp_ready_d_0 ( .A(ex_retr_pipe_lsu_op_retr[1]), .B(stage_state_retr), .C(ex_retr_pipe_lsu_op_retr[3]), .D(ex_retr_pipe_lsu_op_retr[2]), .Y(un11_lsu_resp_ready_d_0_Z) ); defparam un11_lsu_resp_ready_d_0.INIT=16'h0408; // @46:13195 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4928 ( .A(un1_instruction_29_1_1z), .B(N_564_1), .C(rv32i_dec_mnemonic4928_2), .D(rv32i_dec_alu_op_sel_m_0_2), .Y(rv32i_dec_mnemonic4928) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4928 .INIT=16'h8000; // @46:8234 CFG4 \gen_trig_de.un29_csr_trigger_wr_hzd_de ( .A(N_40), .B(stage_state_retr), .C(un29_csr_trigger_wr_hzd_de_2), .D(un29_csr_trigger_wr_hzd_de_3), .Y(un29_csr_trigger_wr_hzd_de) ); defparam \gen_trig_de.un29_csr_trigger_wr_hzd_de .INIT=16'h8000; // @46:15082 CFG4 un1_instruction_29 ( .A(un1_instruction_29_1_1), .B(un1_instruction_29_1_0_Z), .C(ifu_expipe_resp_ireg_net[31]), .D(un1_instruction_29_5_Z), .Y(un1_instruction_29_Z) ); defparam un1_instruction_29.INIT=16'h0800; // @46:13195 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4951 ( .A(N_564_1), .B(un1_instruction_29_8), .C(rv32i_dec_mnemonic4951_i_3), .D(rv32i_dec_alu_op_sel_m_0_2), .Y(rv32i_dec_mnemonic4951) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4951 .INIT=16'h8000; // @46:13195 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4953 ( .A(rv32i_dec_mnemonic4917_3), .B(un1_instruction_29_8), .C(rv32i_dec_mnemonic4950_3), .D(rv32i_dec_mnemonic4953_5), .Y(rv32i_dec_mnemonic4953) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4953 .INIT=16'h8000; // @46:13195 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4954 ( .A(rv32i_dec_mnemonic4917_3), .B(un1_instruction_29_8), .C(rv32i_dec_mnemonic4954_0), .D(rv32i_dec_mnemonic4951_i_3), .Y(rv32i_dec_mnemonic4954) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4954 .INIT=16'h8000; // @46:13195 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4955 ( .A(rv32i_dec_mnemonic4919_3), .B(un1_instruction_29_1_1z), .C(rv32i_dec_mnemonic4950_0), .D(rv32i_dec_alu_op_sel_0_a5_2_0_Z[2]), .Y(rv32i_dec_mnemonic4955) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4955 .INIT=16'h8000; // @46:15460 CFG4 gpr_wr_valid_iv_RNO_2 ( .A(un1_rv32c_dec_mnemonic2115_2_Z), .B(un83_rv32i_dec_gpr_wr_valid), .C(N_289_i), .D(N_115_i), .Y(un83_rv32i_dec_gpr_wr_valid_m_1) ); defparam gpr_wr_valid_iv_RNO_2.INIT=16'h0008; // @46:13195 CFG4 \rv32i_dec_alu_op_sel_0_a5[0] ( .A(N_96), .B(N_291_i), .C(un1_instruction_29_1_1z), .D(N_574), .Y(N_143) ); defparam \rv32i_dec_alu_op_sel_0_a5[0] .INIT=16'hA080; // @46:13195 CFG4 \rv32i_dec_gpr_wr_mux_sel_0_a6[1] ( .A(N_131_i), .B(N_160), .C(N_206), .D(N_154), .Y(N_211) ); defparam \rv32i_dec_gpr_wr_mux_sel_0_a6[1] .INIT=16'h4000; // @46:15460 CFG4 \gen_decode_rv32c.rv32c_dec_mnemonic2112_1_RNI03J3J ( .A(un1_instruction_22_i), .B(un1_instruction_26_1), .C(rv32c_dec_gpr_wr_sel_sn_N_6), .D(rv32c_dec_mnemonic2112), .Y(rv32c_dec_gpr_wr_sel_sn_N_10_mux) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2112_1_RNI03J3J .INIT=16'h0070; // @46:8859 CFG4 gpr_rs1_stall_csr_1 ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .B(stage_state_retr), .C(gpr_wr_en_retr_1z), .D(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .Y(gpr_rs1_stall_csr_1_Z) ); defparam gpr_rs1_stall_csr_1.INIT=16'h8000; // @46:15460 CFG4 \gen_decode_rv32c.rv32c_dec_mnemonic2125 ( .A(un1_instruction_27_2_Z), .B(N_564_1), .C(rv32c_dec_mnemonic2125_0), .D(rv32c_dec_mnemonic2119_2), .Y(rv32c_dec_mnemonic2125) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2125 .INIT=16'h8000; // @46:15460 CFG4 \gen_decode_rv32c.rv32c_dec_mnemonic2124 ( .A(un1_rv32c_dec_mnemonic2123_2_s4_i_1_0), .B(N_564_1), .C(rv32c_dec_mnemonic2124_i_2), .D(rv32c_dec_mnemonic2124_1), .Y(rv32c_dec_mnemonic2124) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2124 .INIT=16'h8000; // @46:15460 CFG4 \gen_decode_rv32c.rv32c_dec_mnemonic2123 ( .A(rv32i_dec_mnemonic4926_4), .B(N_564_1), .C(rv32c_dec_mnemonic2123_1_0), .D(rv32c_dec_mnemonic2119_2), .Y(rv32c_dec_mnemonic2123) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2123 .INIT=16'h8000; // @46:15460 CFG4 \gen_decode_rv32c.rv32c_dec_mnemonic2122 ( .A(rv32i_dec_mnemonic4926_4), .B(N_564_1), .C(rv32c_dec_mnemonic2122_1), .D(rv32c_dec_mnemonic2119_2), .Y(rv32c_dec_mnemonic2122) ); defparam \gen_decode_rv32c.rv32c_dec_mnemonic2122 .INIT=16'h8000; // @46:9642 CFG4 instr_is_lsu_ldstr_reg_ex ( .A(lsu_op_ex_pipe_reg[2]), .B(lsu_op_ex_pipe_reg[3]), .C(lsu_op_ex_pipe_reg[1]), .D(lsu_op_ex_pipe_reg[0]), .Y(instr_is_lsu_ldstr_reg_ex_Z) ); defparam instr_is_lsu_ldstr_reg_ex.INIT=16'h3336; // @46:13195 CFG4 \rv32i_dec_alu_op_sel_0_a2_0[1] ( .A(ifu_expipe_resp_ireg_net[30]), .B(N_131_i), .C(N_290_i), .D(N_168), .Y(N_162) ); defparam \rv32i_dec_alu_op_sel_0_a2_0[1] .INIT=16'h0800; // @46:13195 CFG4 \rv32i_dec_lsu_op_0_a4[1] ( .A(N_117_i), .B(N_290_i), .C(N_27), .D(N_51), .Y(rv32i_dec_lsu_op[1]) ); defparam \rv32i_dec_lsu_op_0_a4[1] .INIT=16'h1200; // @46:13195 CFG4 \rv32i_dec_gpr_wr_mux_sel_0_a6_0[0] ( .A(N_127_0), .B(N_7_0), .C(N_154), .D(rv32i_dec_alu_op_sel_0_a5_2_0_Z[2]), .Y(N_210) ); defparam \rv32i_dec_gpr_wr_mux_sel_0_a6_0[0] .INIT=16'h2000; // @46:13195 CFG3 \rv32i_dec_exu_result_mux_sel_0_a2_5[0] ( .A(N_168), .B(N_137_i), .C(N_95_2), .Y(N_95) ); defparam \rv32i_dec_exu_result_mux_sel_0_a2_5[0] .INIT=8'h20; // @46:13195 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4914 ( .A(un1_instruction_29_1_1z), .B(N_564_1), .C(rv32i_dec_mnemonic4914_1), .D(N_565_1), .Y(rv32i_dec_mnemonic4914) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4914 .INIT=16'h8000; // @46:9986 CFG3 gpr_wr_valid_retr_1_1 ( .A(exu_result_valid_retr_1z), .B(gpr_wr_en_retr_1z), .C(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .Y(gpr_wr_valid_retr_1_1_1z) ); defparam gpr_wr_valid_retr_1_1.INIT=8'h80; // @46:15460 CFG4 \rv32c_dec_immediate_0[4] ( .A(N_139_i), .B(N_141_i), .C(N_290_i), .D(N_289_i), .Y(rv32c_dec_immediate_0_Z[4]) ); defparam \rv32c_dec_immediate_0[4] .INIT=16'hF010; // @46:10336 CFG2 soft_reset_taken_retr ( .A(formal_trace_reset_taken), .B(soft_reset_taken_retr_0), .Y(soft_reset_taken_retr_1z) ); defparam soft_reset_taken_retr.INIT=4'h8; // @46:15460 CFG2 \rv32c_dec_immediate_0_iv_tz[0] ( .A(un1_rv32c_dec_mnemonic2119_1_i), .B(un1_instruction_40_Z), .Y(rv32c_dec_immediate_tz[0]) ); defparam \rv32c_dec_immediate_0_iv_tz[0] .INIT=4'hE; // @46:18188 CFG3 case_dec_gpr_rs2_rd_sel_2_sqmuxa_RNILBV7N1 ( .A(N_130_i_Z), .B(rv32c_dec_mnemonic1725_m_1), .C(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .Y(rv32c_dec_branch_cond_m_0) ); defparam case_dec_gpr_rs2_rd_sel_2_sqmuxa_RNILBV7N1.INIT=8'hE0; // @46:18188 CFG4 \branch_cond_0_iv[1] ( .A(un1_instruction_8_Z), .B(un1_instruction_15_i), .C(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .D(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .Y(branch_cond_de_0) ); defparam \branch_cond_0_iv[1] .INIT=16'hECA0; // @46:18188 CFG4 \operand1_mux_sel_1_iv_RNO[1] ( .A(rv32c_dec_mnemonic2132), .B(rv32c_dec_mnemonic2116), .C(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .D(rv32c_dec_mnemonic1725), .Y(rv32c_dec_operand1_mux_sel_m[1]) ); defparam \operand1_mux_sel_1_iv_RNO[1] .INIT=16'hE040; // @46:13195 CFG3 \rv32i_dec_immediate_2_iv[15] ( .A(instruction_m_0[31]), .B(N_482_1), .C(N_289_i), .Y(rv32i_dec_immediate[15]) ); defparam \rv32i_dec_immediate_2_iv[15] .INIT=8'hEA; // @46:13195 CFG4 un1_instruction_38_RNI3TSFL ( .A(ifu_expipe_resp_ireg_net[31]), .B(un1_instruction_38_i), .C(N_482_2), .D(rv32i_dec_mnemonic4913), .Y(instruction_m_8[31]) ); defparam un1_instruction_38_RNI3TSFL.INIT=16'hAAA8; // @46:9666 CFG4 lsu_op_str_ex ( .A(lsu_op_ex_pipe_reg[1]), .B(un5_lsu_op_ex_pipe_Z[2]), .C(un5_lsu_op_ex_pipe_Z[3]), .D(un18_lsu_op_str_ex_Z), .Y(lsu_op_str_ex_Z) ); defparam lsu_op_str_ex.INIT=16'hFF08; // @46:13195 CFG4 \rv32i_dec_alu_op_sel_0_a5_1[0] ( .A(N_160), .B(un1_instruction_29_1_1z), .C(N_291_i), .D(N_137_i), .Y(un1_instruction) ); defparam \rv32i_dec_alu_op_sel_0_a5_1[0] .INIT=16'h0800; // @46:13195 CFG4 un1_rv32i_dec_mnemonic4960_1_i_a3_2 ( .A(ifu_expipe_resp_ireg_net[30]), .B(N_133_i), .C(N_290_i), .D(N_206), .Y(N_575) ); defparam un1_rv32i_dec_mnemonic4960_1_i_a3_2.INIT=16'h44C4; // @46:9986 CFG4 gpr_wr_completing_retr_1 ( .A(trace_priv_i), .B(gpr_wr_en_retr_1z), .C(ex_retr_pipe_exu_result_valid_retr), .D(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .Y(N_769) ); defparam gpr_wr_completing_retr_1.INIT=16'h40FF; // @46:18188 CFG4 dbreakpoint_iv ( .A(rv32i_dec_mnemonic4957), .B(rv32c_dec_dbreakpoint_m_0), .C(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .D(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .Y(dbreak_de) ); defparam dbreakpoint_iv.INIT=16'hECA0; // @46:15460 CFG4 un1_rv32c_dec_mnemonic2124_1 ( .A(rv32c_dec_mnemonic2124_1_0), .B(rv32c_dec_mnemonic2124_i_2), .C(N_115_i), .D(N_290_i), .Y(un1_rv32c_dec_mnemonic2124_1_Z) ); defparam un1_rv32c_dec_mnemonic2124_1.INIT=16'h0F08; // @46:9833 CFG2 \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[0] ( .A(un1_ex_retr_pipe_curr_pc_retr), .B(de_ex_pipe_curr_pc_ex[0]), .Y(ex_retr_pipe_curr_pc_retr_2[0]) ); defparam \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[0] .INIT=4'h4; // @46:15460 CFG3 un1_rv32c_dec_mnemonic2125_4 ( .A(N_290_i), .B(rv32c_dec_mnemonic2125_3_3), .C(N_289_i), .Y(un1_rv32c_dec_mnemonic2125_4_i) ); defparam un1_rv32c_dec_mnemonic2125_4.INIT=8'hE0; // @46:15460 CFG2 \gen_decode_rv32c.un1_instruction_14_RNIVJOOA ( .A(rv32c_dec_mnemonic2118), .B(un1_instruction_14_Z), .Y(un1_instruction_14_m) ); defparam \gen_decode_rv32c.un1_instruction_14_RNIVJOOA .INIT=4'h8; // @46:15460 CFG4 \rv32c_dec_immediate_2[3] ( .A(N_141_i), .B(N_547), .C(un1_instruction_20_Z), .D(rv32c_dec_mnemonic2121), .Y(N_491_2) ); defparam \rv32c_dec_immediate_2[3] .INIT=16'hFAF2; // @46:15460 CFG4 \rv32c_dec_mnemonic2121.rv32c_dec_mnemonic2121_RNIQQOP41 ( .A(N_547), .B(rv32c_dec_mnemonic2121), .C(N_141_i), .D(N_117_i), .Y(instruction_m_3[12]) ); defparam \rv32c_dec_mnemonic2121.rv32c_dec_mnemonic2121_RNIQQOP41 .INIT=16'hD000; // @46:13195 CFG3 \rv32i_dec_immediate_2_iv[14] ( .A(instruction_m_0[31]), .B(N_482_1), .C(N_290_i), .Y(rv32i_dec_immediate[14]) ); defparam \rv32i_dec_immediate_2_iv[14] .INIT=8'hEA; // @46:13195 CFG3 \rv32i_dec_immediate_2_iv[12] ( .A(instruction_m_0[31]), .B(N_482_1), .C(N_117_i), .Y(rv32i_dec_immediate_Z[12]) ); defparam \rv32i_dec_immediate_2_iv[12] .INIT=8'hEA; // @46:13195 CFG3 \rv32i_dec_immediate_2_iv[13] ( .A(instruction_m_0[31]), .B(N_482_1), .C(N_115_i), .Y(rv32i_dec_immediate[13]) ); defparam \rv32i_dec_immediate_2_iv[13] .INIT=8'hEA; // @46:18188 CFG4 \shifter_operand_sel_1_iv[1] ( .A(rv32c_dec_lsu_op[2]), .B(un1_instruction_14_i), .C(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .D(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .Y(shifter_unit_operand_sel_de_0) ); defparam \shifter_operand_sel_1_iv[1] .INIT=16'hEAC0; // @46:15460 CFG4 un1_instruction_37 ( .A(N_139_i), .B(N_289_i), .C(rv32c_dec_mnemonic2115_i_2), .D(rv32c_dec_mnemonic2117_2), .Y(un1_instruction_37_Z) ); defparam un1_instruction_37.INIT=16'h3332; // @46:8842 CFG4 un6_alu_op_complete_ex_0 ( .A(de_ex_pipe_alu_op_sel_ex[3]), .B(de_ex_pipe_alu_op_sel_ex[4]), .C(un1_gpr_wr_mux_sel_ex_i), .D(un6_alu_op_complete_ex_0_a3_2_Z), .Y(un6_alu_op_complete_ex) ); defparam un6_alu_op_complete_ex_0.INIT=16'h1F0F; // @46:13195 CFG4 \rv32i_dec_alu_op_sel_0_a5_2[1] ( .A(N_160), .B(un1_instruction_29_1_1z), .C(N_291_i), .D(N_137_i), .Y(N_147_2) ); defparam \rv32i_dec_alu_op_sel_0_a5_2[1] .INIT=16'h0008; // @46:13195 CFG4 un1_rv32i_dec_mnemonic4960_1_i_a3_0 ( .A(N_137_i), .B(N_291_i), .C(un1_instruction_29_1_1z), .D(N_129_i), .Y(N_573) ); defparam un1_rv32i_dec_mnemonic4960_1_i_a3_0.INIT=16'h0010; // @46:13195 CFG4 \rv32i_dec_alu_op_sel_0_o5[0] ( .A(rv32i_dec_shifter_unit_places_3[2]), .B(rv32m_dec_mnemonic846_i_12), .C(ifu_expipe_resp_ireg_net[25]), .D(N_131_i), .Y(N_123_0) ); defparam \rv32i_dec_alu_op_sel_0_o5[0] .INIT=16'h08FF; // @46:13195 CFG4 \rv32i_dec_alu_op_sel_0_a2_4[0] ( .A(N_103_2), .B(un1_instruction_29_1_1z), .C(N_291_i), .D(N_137_i), .Y(N_170) ); defparam \rv32i_dec_alu_op_sel_0_a2_4[0] .INIT=16'h0008; // @46:13195 CFG4 \rv32i_dec_lsu_op_0_o4[0] ( .A(N_131_i), .B(N_117_i), .C(N_115_i), .D(N_290_i), .Y(N_30) ); defparam \rv32i_dec_lsu_op_0_o4[0] .INIT=16'h0431; // @46:13195 CFG4 \rv32i_dec_lsu_op_0_a4[2] ( .A(N_52), .B(N_290_i), .C(N_51), .D(N_46_1), .Y(rv32i_dec_lsu_op[2]) ); defparam \rv32i_dec_lsu_op_0_a4[2] .INIT=16'hB0A0; // @46:13195 CFG4 un1_rv32i_dec_mnemonic4960_1_i_a17_1 ( .A(N_137_i), .B(N_561), .C(N_566_1), .D(N_154), .Y(N_566) ); defparam un1_rv32i_dec_mnemonic4960_1_i_a17_1.INIT=16'h4000; // @46:13195 CFG4 \rv32i_dec_gpr_wr_valid_cnst.m24 ( .A(N_133_i), .B(N_129_i), .C(N_46_1), .D(rv32i_dec_mnemonic4916_5), .Y(i18_mux) ); defparam \rv32i_dec_gpr_wr_valid_cnst.m24 .INIT=16'h6222; // @46:9833 CFG3 \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[2] ( .A(cpu_d_req_addr_net[2]), .B(un1_ex_retr_pipe_curr_pc_retr), .C(de_ex_pipe_curr_pc_ex[2]), .Y(ex_retr_pipe_curr_pc_retr_2[2]) ); defparam \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[2] .INIT=8'hB8; // @46:9833 CFG3 \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[1] ( .A(cpu_d_req_addr_net[1]), .B(un1_ex_retr_pipe_curr_pc_retr), .C(de_ex_pipe_curr_pc_ex[1]), .Y(ex_retr_pipe_curr_pc_retr_2[1]) ); defparam \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[1] .INIT=8'hB8; // @46:13195 CFG4 \rv32i_dec_gpr_wr_valid_cnst.m16_1_0 ( .A(N_133_i), .B(N_131_i), .C(N_115_i), .D(N_4), .Y(N_17_1_0) ); defparam \rv32i_dec_gpr_wr_valid_cnst.m16_1_0 .INIT=16'h5101; // @46:13195 CFG4 \rv32i_dec_gpr_rs1_rd_valid.m22_1_0 ( .A(N_133_i), .B(N_131_i), .C(N_117_i), .D(N_115_i), .Y(i5_mux_1) ); defparam \rv32i_dec_gpr_rs1_rd_valid.m22_1_0 .INIT=16'h003B; // @46:13195 CFG2 \rv32i_dec_bcu_operand0_mux_sel_0_.m13_1_0 ( .A(N_22), .B(rv32i_dec_mnemonic4948), .Y(N_22_mux_1) ); defparam \rv32i_dec_bcu_operand0_mux_sel_0_.m13_1_0 .INIT=4'h1; // @46:13195 CFG4 un1_rv32i_dec_mnemonic4915_1_1 ( .A(N_565_1), .B(rv32i_dec_alu_op_sel_m_0_2), .C(rv32i_dec_mnemonic4915_1_0), .D(rv32i_dec_mnemonic4919_0), .Y(un1_rv32i_dec_mnemonic4915_1_1_Z) ); defparam un1_rv32i_dec_mnemonic4915_1_1.INIT=16'hC080; // @46:15460 CFG4 \rv32c_dec_immediate_1_iv_1[6] ( .A(N_131_i), .B(instruction_m_3[2]), .C(un1_instruction_8_Z), .D(un1_instruction_21_Z), .Y(rv32c_dec_immediate_1_iv_1_Z[6]) ); defparam \rv32c_dec_immediate_1_iv_1[6] .INIT=16'hEEEC; // @46:15460 CFG4 \rv32c_dec_immediate_2_iv_0[7] ( .A(un1_instruction_20_Z), .B(N_489_1), .C(N_291_i), .D(N_129_i), .Y(rv32c_dec_immediate_2_iv_0_Z[7]) ); defparam \rv32c_dec_immediate_2_iv_0[7] .INIT=16'hECA0; // @46:15460 CFG4 \rv32c_dec_operand1_mux_sel_1_iv_i_a3_0_0[0] ( .A(N_540), .B(un1_instruction_27_2_Z), .C(N_290_i), .D(rv32c_dec_mnemonic2121_2), .Y(rv32c_dec_operand1_mux_sel_1_iv_i_a3_0[0]) ); defparam \rv32c_dec_operand1_mux_sel_1_iv_i_a3_0_0[0] .INIT=16'h23AF; // @46:15460 CFG4 un1_rv32c_dec_mnemonic2114_1_2 ( .A(rv32c_dec_mnemonic2127_0), .B(rv32c_dec_mnemonic2114_3), .C(un1_rv32c_dec_mnemonic2114_1_0), .D(rv32c_dec_mnemonic2119_2), .Y(un1_rv32c_dec_mnemonic2114_1_2_Z) ); defparam un1_rv32c_dec_mnemonic2114_1_2.INIT=16'hFEFC; // @46:15460 CFG4 \rv32c_dec_lsu_op_1_iv_0_tz_1[0] ( .A(un1_instruction_26_1), .B(un1_instruction_22_i), .C(N_115_i), .D(un1_rv32c_dec_mnemonic2114_1_0), .Y(rv32c_dec_lsu_op_1_iv_0_tz_1_Z[0]) ); defparam \rv32c_dec_lsu_op_1_iv_0_tz_1[0] .INIT=16'hFF08; // @46:8706 CFG2 un5_instr_inhibit_ex_0 ( .A(un3_irq_stall_lsu_req), .B(instr_is_lsu_ldstr_reg_ex_Z), .Y(un5_instr_inhibit_ex_0_1z) ); defparam un5_instr_inhibit_ex_0.INIT=4'h4; // @46:8704 CFG4 un3_instr_inhibit_ex_9 ( .A(m_env_call_retr_1z), .B(i_access_mem_error_retr_1z), .C(un3_instr_inhibit_ex_5_Z), .D(dbreak_retr_1z), .Y(un3_instr_inhibit_ex_9_Z) ); defparam un3_instr_inhibit_ex_9.INIT=16'hFFFE; // @46:10369 CFG4 un11_lsu_resp_ready_c_1_RNIN2I2L ( .A(un11_lsu_resp_ready_1_1_0_Z), .B(trace_priv_i), .C(un11_lsu_resp_ready_c_1_Z), .D(un14_gpr_rs1_stall_lsu), .Y(un11_lsu_resp_ready_1_1) ); defparam un11_lsu_resp_ready_c_1_RNIN2I2L.INIT=16'hBAAA; // @46:15460 CFG4 un1_rv32c_dec_mnemonic2112_4 ( .A(rv32c_dec_mnemonic2118), .B(un1_rv32c_dec_mnemonic2112_4_1_Z), .C(un1_rv32c_dec_mnemonic2119_1_i), .D(un1_rv32c_dec_mnemonic2137_1_0), .Y(un1_rv32c_dec_mnemonic2112_4_i) ); defparam un1_rv32c_dec_mnemonic2112_4.INIT=16'hFFFE; // @46:15082 CFG4 \gen_decode_rv32m.rv32m_dec_mnemonic846 ( .A(rv32m_dec_mnemonic846_0), .B(rv32i_dec_shifter_unit_places_3[2]), .C(rv32m_dec_mnemonic846_i_12), .D(un1_instruction_29_1_0_Z), .Y(rv32m_dec_mnemonic846) ); defparam \gen_decode_rv32m.rv32m_dec_mnemonic846 .INIT=16'h8000; // @46:13195 CFG4 \rv32i_dec_lsu_op_0_a4[3] ( .A(N_117_i), .B(N_290_i), .C(N_28), .D(N_51), .Y(N_41) ); defparam \rv32i_dec_lsu_op_0_a4[3] .INIT=16'h0200; // @46:8963 CFG4 gpr_rs2_stall_csr_2 ( .A(gpr_rs2_stall_csr_2_2_1z), .B(gpr_rs2_stall_csr_2_1_1z), .C(gpr_rs2_stall_csr_2_0_1z), .D(un11_gpr_rs2_stall_exu), .Y(gpr_rs2_stall_csr_2_Z) ); defparam gpr_rs2_stall_csr_2.INIT=16'h0080; // @46:15460 CFG4 \rv32c_dec_immediate[3] ( .A(N_499_1), .B(un1_rv32c_dec_mnemonic2119_1_i), .C(un1_instruction_20_Z), .D(un1_instruction_40_Z), .Y(N_492) ); defparam \rv32c_dec_immediate[3] .INIT=16'hFFFE; // @46:15460 CFG3 un1_rv32c_dec_mnemonic2115_3 ( .A(rv32c_dec_mnemonic2115), .B(rv32c_dec_mnemonic2129), .C(rv32c_dec_mnemonic2132), .Y(un1_rv32c_dec_mnemonic2115_3_Z) ); defparam un1_rv32c_dec_mnemonic2115_3.INIT=8'hFE; // @46:13195 CFG4 \rv32i_dec_exu_result_mux_sel_0_a4_0[1] ( .A(N_131_i), .B(N_290_i), .C(N_127_0), .D(N_573), .Y(N_89) ); defparam \rv32i_dec_exu_result_mux_sel_0_a4_0[1] .INIT=16'h0100; // @46:18188 CFG4 \gpr_wr_mux_sel_iv_RNO[1] ( .A(un1_instruction_18_i), .B(rv32c_dec_gpr_wr_mux_sel_m_2[1]), .C(un1_rv32c_dec_mnemonic2114_1_i), .D(rv32c_dec_gpr_wr_valid_m_1), .Y(rv32c_dec_gpr_wr_mux_sel_m[1]) ); defparam \gpr_wr_mux_sel_iv_RNO[1] .INIT=16'h0400; // @46:15460 CFG4 \rv32c_dec_alu_op_sel_1_iv[1] ( .A(rv32c_dec_mnemonic2122), .B(rv32c_dec_mnemonic2128), .C(rv32c_dec_mnemonic2123), .D(un1_rv32c_dec_mnemonic2115_4_Z), .Y(rv32c_dec_alu_op_sel_0_d0) ); defparam \rv32c_dec_alu_op_sel_1_iv[1] .INIT=16'h00FE; // @46:15460 CFG4 \rv32c_dec_alu_op_sel_1_iv[0] ( .A(rv32c_dec_mnemonic1881), .B(rv32c_dec_alu_op_sel_1_iv_3_Z[0]), .C(rv32c_dec_mnemonic2132), .D(rv32c_dec_mnemonic2123_s5), .Y(rv32c_dec_alu_op_sel[0]) ); defparam \rv32c_dec_alu_op_sel_1_iv[0] .INIT=16'hFFDC; // @46:13195 CFG4 \rv32i_dec_alu_op_sel_0_a5_0[0] ( .A(rv32i_dec_mnemonic4919_3), .B(N_117_i), .C(N_144_2), .D(N_123_0), .Y(N_144) ); defparam \rv32i_dec_alu_op_sel_0_a5_0[0] .INIT=16'h9000; // @46:13195 CFG4 un1_rv32i_dec_mnemonic4960_1_i_a17_0 ( .A(N_2_0), .B(N_155), .C(N_129_i), .D(N_565_1), .Y(N_565) ); defparam un1_rv32i_dec_mnemonic4960_1_i_a17_0.INIT=16'h0400; // @46:15460 CFG3 \rv32c_dec_immediate_1_iv_tz[1] ( .A(N_489_1), .B(un1_instruction_40_Z), .C(un1_rv32c_dec_mnemonic2119_1_i), .Y(rv32c_dec_immediate_tz[1]) ); defparam \rv32c_dec_immediate_1_iv_tz[1] .INIT=8'hFE; // @46:13195 CFG4 \rv32i_dec_alu_op_sel_0_a5_2[0] ( .A(N_115_i), .B(N_290_i), .C(N_103_2), .D(N_155), .Y(N_146) ); defparam \rv32i_dec_alu_op_sel_0_a5_2[0] .INIT=16'h4000; // @46:15460 CFG3 \rv32c_dec_immediate[4] ( .A(N_130_i_Z), .B(rv32c_dec_mnemonic2112), .C(rv32c_dec_immediate_0_Z[4]), .Y(N_495) ); defparam \rv32c_dec_immediate[4] .INIT=8'hFE; // @46:15460 CFG4 un1_rv32c_dec_mnemonic2119_1 ( .A(un1_instruction_27_2_Z), .B(N_4922_tz), .C(rv32c_dec_mnemonic2129), .D(N_564_1), .Y(un1_rv32c_dec_mnemonic2119_1_i) ); defparam un1_rv32c_dec_mnemonic2119_1.INIT=16'hF8F0; // @46:13195 CFG3 \gen_decode_rv32i.rv32i_dec_mnemonic4926 ( .A(N_51), .B(N_28), .C(N_564_1), .Y(rv32i_dec_mnemonic4926) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4926 .INIT=8'h20; // @46:13195 CFG4 un1_rv32i_dec_mnemonic4960_1_i_o17_2 ( .A(N_137_i), .B(N_129_i), .C(N_28), .D(N_154), .Y(N_563) ); defparam un1_rv32i_dec_mnemonic4960_1_i_o17_2.INIT=16'h1D00; // @46:18188 CFG4 un1_rv32i_dec_mnemonic4950_1 ( .A(rv32i_dec_mnemonic4950_0), .B(rv32i_dec_mnemonic4916_5), .C(un1_instruction_29_8), .D(rv32i_dec_mnemonic4953), .Y(un1_rv32i_dec_mnemonic4950_1_Z) ); defparam un1_rv32i_dec_mnemonic4950_1.INIT=16'hFF80; // @46:18188 CFG4 \exu_result_mux_sel_1_iv_RNO[2] ( .A(un1_rv32c_dec_mnemonic2123_2_s4), .B(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .C(un1_instruction_22_i), .D(un1_rv32c_dec_mnemonic2115_4_Z), .Y(rv32c_dec_exu_result_mux_sel_m[2]) ); defparam \exu_result_mux_sel_1_iv_RNO[2] .INIT=16'h88C8; // @46:15460 CFG4 un1_rv32c_dec_mnemonic2125_5 ( .A(rv32c_dec_mnemonic2121_1_0), .B(un1_rv32c_dec_mnemonic2123_2_s4_i_1_0), .C(rv32c_dec_mnemonic2123_1), .D(rv32c_dec_mnemonic2125_2_1), .Y(un1_rv32c_dec_mnemonic2125_5_i_0) ); defparam un1_rv32c_dec_mnemonic2125_5.INIT=16'hC888; // @46:9447 CFG3 exu_op_abort_ex_1 ( .A(formal_trace_reset_taken), .B(debug_enter_retr), .C(soft_reset_taken_retr_0), .Y(exu_op_abort_ex_1_1z) ); defparam exu_op_abort_ex_1.INIT=8'hEC; // @46:13195 CFG3 \rv32i_dec_gpr_wr_mux_sel_0[0] ( .A(N_28_mux_3), .B(rv32i_dec_gpr_wr_mux_sel_0_a6_1_Z[0]), .C(N_210), .Y(rv32i_dec_gpr_wr_mux_sel[0]) ); defparam \rv32i_dec_gpr_wr_mux_sel_0[0] .INIT=8'hF8; // @46:10155 CFG4 csr_complete_retr ( .A(trace_priv_i), .B(un3_csr_complete_retr_Z), .C(exu_result_valid_retr_1z), .D(exu_csr_op_wr_data14), .Y(csr_complete_retr_Z) ); defparam csr_complete_retr.INIT=16'hFFFE; // @46:15460 CFG4 \rv32c_dec_shifter_unit_op_sel_0_.m9 ( .A(N_1349), .B(m8_e_0), .C(N_290_i), .D(N_17_1), .Y(N_18_mux) ); defparam \rv32c_dec_shifter_unit_op_sel_0_.m9 .INIT=16'hA8A0; // @46:15460 CFG4 un1_instruction_44 ( .A(N_141_i), .B(N_289_i), .C(N_290_i), .D(rv32c_dec_mnemonic2125_3_3), .Y(un1_instruction_44_i) ); defparam un1_instruction_44.INIT=16'h4C44; // @46:15460 CFG4 un1_instruction_41 ( .A(rv32c_dec_mnemonic2135_0), .B(rv32c_dec_mnemonic2125_3_3), .C(N_289_i), .D(N_290_i), .Y(un1_instruction_41_i) ); defparam un1_instruction_41.INIT=16'hA0E0; // @46:15460 CFG3 un1_instruction_8_RNIOI22J ( .A(N_117_i), .B(un1_instruction_8_Z), .C(un1_instruction_40_Z), .Y(instruction_m_5[12]) ); defparam un1_instruction_8_RNIOI22J.INIT=8'hA8; // @46:15460 CFG3 \rv32c_dec_immediate_1_iv_1[11] ( .A(N_489_1), .B(un1_instruction_40_Z), .C(N_117_i), .Y(rv32c_dec_immediate_1[12]) ); defparam \rv32c_dec_immediate_1_iv_1[11] .INIT=8'hE0; // @46:13195 CFG3 \rv32i_dec_alu_op_sel_0_a2_1[1] ( .A(N_131_i), .B(N_290_i), .C(N_26), .Y(N_163) ); defparam \rv32i_dec_alu_op_sel_0_a2_1[1] .INIT=8'hC4; // @46:13195 CFG4 \rv32i_dec_shifter_unit_op_sel_1_0_.m5 ( .A(N_115_i), .B(N_154), .C(N_137_i), .D(N_129_i), .Y(N_6_0) ); defparam \rv32i_dec_shifter_unit_op_sel_1_0_.m5 .INIT=16'h0004; // @46:13195 CFG4 un1_instruction_39_0_a2 ( .A(rv32i_dec_mnemonic4947), .B(N_29), .C(N_133_i), .D(N_131_i), .Y(un1_instruction_39) ); defparam un1_instruction_39_0_a2.INIT=16'hAE00; // @46:9557 CFG4 bcu_m1_e ( .A(apb_i_req_addr_net_2), .B(apb_i_req_addr_net_1), .C(apb_i_req_addr_net_0), .D(apb_i_req_addr_net_3), .Y(un8_cpu_i_req_is_tcm0lt18) ); defparam bcu_m1_e.INIT=16'hFE00; // @46:9986 CFG4 gpr_wr_completing_retr_3_0_d ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .B(trace_priv_i), .C(gpr_wr_en_retr_1z), .D(N_769), .Y(gpr_wr_completing_retr_3_0_d_1z) ); defparam gpr_wr_completing_retr_3_0_d.INIT=16'h7520; // @46:15460 CFG4 \rv32c_dec_shifter_unit_places_1_.m9 ( .A(N_1349), .B(N_289_i), .C(N_16), .D(N_14_mux), .Y(rv32c_dec_shifter_unit_places[1]) ); defparam \rv32c_dec_shifter_unit_places_1_.m9 .INIT=16'h3B08; // @46:13195 CFG4 \rv32i_dec_exu_result_mux_sel_0_a2_1[0] ( .A(un1_instruction_i_2), .B(N_100_1), .C(N_4_0), .D(N_28_mux_3), .Y(N_104) ); defparam \rv32i_dec_exu_result_mux_sel_0_a2_1[0] .INIT=16'hEA00; // @46:13195 CFG4 un1_rv32i_dec_mnemonic4915_1_2 ( .A(rv32i_dec_mnemonic4920_1), .B(rv32i_dec_mnemonic4915_1_0), .C(rv32i_dec_mnemonic4928), .D(un1_rv32i_dec_mnemonic4915_1_1_Z), .Y(un1_rv32i_dec_mnemonic4915_1_2_Z) ); defparam un1_rv32i_dec_mnemonic4915_1_2.INIT=16'hFFF8; // @46:13195 CFG4 un1_rv32i_dec_mnemonic4911_2 ( .A(rv32i_dec_mnemonic4955), .B(rv32i_dec_mnemonic4954), .C(rv32i_dec_mnemonic4953), .D(rv32i_dec_mnemonic4913), .Y(un1_rv32i_dec_mnemonic4911_2_Z) ); defparam un1_rv32i_dec_mnemonic4911_2.INIT=16'hFFFE; // @46:13195 CFG3 \rv32i_dec_branch_cond_1[0] ( .A(rv32i_dec_mnemonic4913), .B(rv32i_dec_mnemonic4959), .C(rv32i_dec_mnemonic4914), .Y(rv32i_dec_branch_cond_1_Z[0]) ); defparam \rv32i_dec_branch_cond_1[0] .INIT=8'hFE; // @46:15460 CFG4 un1_rv32c_dec_mnemonic2112_2_4 ( .A(rv32c_dec_mnemonic2129), .B(un1_rv32c_dec_mnemonic2112_2_0_Z), .C(un1_instruction_27_1z), .D(rv32c_dec_mnemonic2126), .Y(un1_rv32c_dec_mnemonic2112_2_4_Z) ); defparam un1_rv32c_dec_mnemonic2112_2_4.INIT=16'hFFFE; // @46:13195 CFG4 un1_rv32i_dec_mnemonic4960_1_i_a17_3_1_0 ( .A(ifu_expipe_resp_ireg_net[29]), .B(ifu_expipe_resp_ireg_net[31]), .C(N_575), .D(N_574), .Y(un1_rv32i_dec_mnemonic4960_1_i_a17_3_1_0_Z) ); defparam un1_rv32i_dec_mnemonic4960_1_i_a17_3_1_0.INIT=16'h1110; // @46:15082 CFG4 \gen_decode_rv32m.rv32m_dec_mnemonic849 ( .A(un1_instruction_29_8), .B(rv32m_dec_mnemonic849_2), .C(un1_instruction_29_3_Z), .D(un1_instruction_29_1_1), .Y(rv32m_dec_mnemonic849) ); defparam \gen_decode_rv32m.rv32m_dec_mnemonic849 .INIT=16'h8000; // @46:13195 CFG4 \rv32i_dec_exu_result_mux_sel_0_a4[2] ( .A(N_290_i), .B(N_206), .C(N_147_2), .D(N_123_0), .Y(N_90) ); defparam \rv32i_dec_exu_result_mux_sel_0_a4[2] .INIT=16'h8000; // @46:8300 CFG4 un1_rv32c_dec_mnemonic2123_1_0_RNID8RV21 ( .A(un1_rv32c_dec_mnemonic2123_1_0_Z), .B(un1_rv32c_dec_mnemonic2115_4_Z), .C(rv32c_dec_mnemonic2121_1_0), .D(un1_rv32c_dec_mnemonic2123_2_s4_i_1_0), .Y(un1_rv32c_dec_mnemonic2123_2_s4) ); defparam un1_rv32c_dec_mnemonic2123_1_0_RNID8RV21.INIT=16'h3200; // @46:13195 CFG4 rv32i_dec_sw_csr_rd_op_cnst ( .A(un1_instruction_29_8), .B(rv32i_dec_mnemonic4952_1), .C(rv32i_dec_mnemonic4955), .D(N_527_1), .Y(rv32i_dec_sw_csr_rd_op_cnst_Z) ); defparam rv32i_dec_sw_csr_rd_op_cnst.INIT=16'hFFF8; // @46:10184 CFG4 \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_wr_op_retr18 ( .A(sw_csr_op_ready_retr), .B(instr_accepted_retr_2), .C(trace_priv_i), .D(un3_csr_complete_retr_Z), .Y(ex_retr_pipe_sw_csr_wr_op_retr18) ); defparam \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_wr_op_retr18 .INIT=16'hFCFE; // @46:9770 CFG3 stall_retr ( .A(set_wfi_waiting), .B(wfi_waiting_reg), .C(trace_priv_i), .Y(stall_retr_Z) ); defparam stall_retr.INIT=8'hFE; // @46:13195 CFG4 \rv32i_dec_shifter_unit_op_sel_1_0_.m15 ( .A(ifu_expipe_resp_ireg_net[26]), .B(ifu_expipe_resp_ireg_net[25]), .C(N_6_0), .D(m15_1_0), .Y(N_32_mux) ); defparam \rv32i_dec_shifter_unit_op_sel_1_0_.m15 .INIT=16'h1000; // @46:8300 CFG4 un1_rv32c_dec_mnemonic2124_1_RNI69MLV ( .A(N_289_i), .B(N_141_i), .C(un1_rv32c_dec_mnemonic2115_4_Z), .D(un1_rv32c_dec_mnemonic2124_1_Z), .Y(un1_rv32c_dec_mnemonic2124_2_s6) ); defparam un1_rv32c_dec_mnemonic2124_1_RNI69MLV.INIT=16'h0800; // @46:15082 CFG4 \gen_decode_rv32m.rv32m_dec_mnemonic852 ( .A(rv32i_dec_shifter_unit_places_3[2]), .B(rv32m_dec_mnemonic846_i_12), .C(un1_instruction_29_8), .D(rv32m_dec_mnemonic852_2), .Y(rv32m_dec_mnemonic852) ); defparam \gen_decode_rv32m.rv32m_dec_mnemonic852 .INIT=16'h8000; // @46:13195 CFG4 \rv32i_dec_alu_op_sel_0_a5_2[2] ( .A(N_155), .B(N_26), .C(rv32i_dec_alu_op_sel_0_a5_2_0_Z[2]), .D(rv32i_dec_mnemonic4919_3), .Y(N_152) ); defparam \rv32i_dec_alu_op_sel_0_a5_2[2] .INIT=16'h8000; // @46:15460 CFG4 un1_rv32c_dec_mnemonic2114_1 ( .A(un1_rv32c_dec_mnemonic2114_1_2_Z), .B(rv32c_dec_mnemonic2133), .C(rv32c_dec_mnemonic2126), .D(rv32c_dec_mnemonic2128), .Y(un1_rv32c_dec_mnemonic2114_1_i) ); defparam un1_rv32c_dec_mnemonic2114_1.INIT=16'hFFFE; // @46:13195 CFG3 \rv32i_dec_operand0_mux_sel[0] ( .A(rv32i_dec_mnemonic4913), .B(rv32i_dec_mnemonic4912), .C(rv32i_dec_mnemonic4914), .Y(rv32i_dec_operand0_mux_sel_Z[0]) ); defparam \rv32i_dec_operand0_mux_sel[0] .INIT=8'hFE; // @46:13195 CFG4 \rv32i_dec_exu_result_mux_sel_0_a3[0] ( .A(un1_instruction_29_1_1z), .B(N_95), .C(N_96), .D(N_574), .Y(N_108) ); defparam \rv32i_dec_exu_result_mux_sel_0_a3[0] .INIT=16'hA800; // @46:15082 CFG4 \gen_decode_rv32m.rv32m_dec_mnemonic853 ( .A(un1_instruction_29_1_1), .B(rv32m_dec_mnemonic850_i_3), .C(rv32m_dec_mnemonic853_2), .D(un1_instruction_29_8), .Y(rv32m_dec_mnemonic853) ); defparam \gen_decode_rv32m.rv32m_dec_mnemonic853 .INIT=16'h8000; // @46:15082 CFG4 \gen_decode_rv32m.rv32m_dec_mnemonic850 ( .A(rv32i_dec_shifter_unit_places_3[2]), .B(rv32m_dec_mnemonic846_i_12), .C(un1_instruction_29_8), .D(rv32m_dec_mnemonic850_2), .Y(rv32m_dec_mnemonic850) ); defparam \gen_decode_rv32m.rv32m_dec_mnemonic850 .INIT=16'h8000; // @46:15082 CFG4 \gen_decode_rv32m.rv32m_dec_mnemonic847 ( .A(un1_instruction_29_8), .B(rv32m_dec_mnemonic847_2), .C(un1_instruction_29_5_Z), .D(un1_instruction_29_1_1), .Y(rv32m_dec_mnemonic847) ); defparam \gen_decode_rv32m.rv32m_dec_mnemonic847 .INIT=16'h8000; // @46:8661 CFG3 instr_accepted_ex_2_1 ( .A(trace_exception), .B(debug_exit_retr), .C(soft_reset_taken_retr_1z), .Y(un1_implicit_pseudo_instr_de) ); defparam instr_accepted_ex_2_1.INIT=8'hFE; CFG4 gpr_rs1_rd_valid_mux_0_RNO ( .A(un7_gpr_rs1_stall_exu_NE), .B(un11_gpr_rs1_stall_exu), .C(un6_gpr_rs1_stall_exu), .D(N_5237_tz_tz), .Y(gpr_rs1_rd_valid_mux_0_RNO_Z) ); defparam gpr_rs1_rd_valid_mux_0_RNO.INIT=16'hFFEF; // @46:15460 CFG3 \rv32c_dec_gpr_rs1_rd_sel_0_iv_0_tz[3] ( .A(rv32c_dec_mnemonic2131), .B(un1_rv32c_dec_mnemonic2115_3_Z), .C(un1_instruction_13), .Y(rv32c_dec_gpr_rs1_rd_sel_tz[4]) ); defparam \rv32c_dec_gpr_rs1_rd_sel_0_iv_0_tz[3] .INIT=8'hEC; // @46:8230 CFG4 csr_trigger_wr_hzd_de ( .A(sw_csr_wr_op_ex_Z[1]), .B(sw_csr_wr_op_ex_Z[0]), .C(un11_csr_trigger_wr_hzd_de_8), .D(un29_csr_trigger_wr_hzd_de), .Y(csr_trigger_wr_hzd_de_Z) ); defparam csr_trigger_wr_hzd_de.INIT=16'hFFE0; // @46:18188 CFG4 \operand1_mux_sel_1_iv[1] ( .A(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .B(rv32c_dec_operand1_mux_sel_m[1]), .C(N_134), .D(rv32i_dec_operand1_mux_sel_m_1[1]), .Y(operand1_mux_sel_de[1]) ); defparam \operand1_mux_sel_1_iv[1] .INIT=16'hECCC; // @46:15460 CFG4 \rv32c_dec_gpr_rs1_rd_sel_0[0] ( .A(rv32c_dec_mnemonic2129), .B(rv32c_dec_mnemonic2115), .C(rv32c_dec_mnemonic2132), .D(un1_instruction_27_1z), .Y(N_397) ); defparam \rv32c_dec_gpr_rs1_rd_sel_0[0] .INIT=16'hFFFE; // @46:18188 CFG3 \immediate_i_a2_0[24] ( .A(instruction_m_8[31]), .B(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .C(un1_instruction), .Y(N_61) ); defparam \immediate_i_a2_0[24] .INIT=8'h01; // @46:8963 CFG4 gpr_rs2_stall_csr ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(gpr_rs2_stall_csr_2_Z), .D(un6_gpr_rs1_stall_exu), .Y(gpr_rs2_stall_csr_Z) ); defparam gpr_rs2_stall_csr.INIT=16'h8000; // @46:9447 CFG4 exu_op_abort_ex ( .A(soft_reset_taken_retr_1z), .B(machine_implicit_wr_mtval_tval_wr_en), .C(debug_enter_retr), .D(un2_exception_taken), .Y(exu_op_abort_ex_1z) ); defparam exu_op_abort_ex.INIT=16'hFAFE; // @46:15460 CFG4 \rv32c_dec_immediate_1_iv[17] ( .A(N_117_i), .B(N_489_1), .C(un1_instruction_40_Z), .D(rv32c_dec_mnemonic2118), .Y(rv32c_dec_immediate[17]) ); defparam \rv32c_dec_immediate_1_iv[17] .INIT=16'hAAA8; // @46:15460 CFG4 \immediate_0_RNO[2] ( .A(N_489_1), .B(un1_rv32c_dec_mnemonic2119_1_i), .C(N_133_i), .D(N_491_2), .Y(instruction_m[4]) ); defparam \immediate_0_RNO[2] .INIT=16'hF0E0; // @46:15460 CFG3 \rv32c_dec_immediate_1_iv_RNO[5] ( .A(rv32c_dec_immediate_1_Z[5]), .B(N_117_i), .C(un1_instruction_40_Z), .Y(instruction_m_2[12]) ); defparam \rv32c_dec_immediate_1_iv_RNO[5] .INIT=8'hC8; // @46:13195 CFG4 \rv32i_dec_shifter_unit_places_2_0_.m7 ( .A(N_290_i), .B(N_573), .C(N_133_i), .D(N_117_i), .Y(N_30_mux) ); defparam \rv32i_dec_shifter_unit_places_2_0_.m7 .INIT=16'h0004; // @46:13195 CFG4 \rv32i_dec_shifter_unit_places_2_0_.m21 ( .A(N_32_mux_1), .B(N_155), .C(N_129_i), .D(N_290_i), .Y(N_32_mux_0) ); defparam \rv32i_dec_shifter_unit_places_2_0_.m21 .INIT=16'h0008; // @46:13195 CFG4 \rv32i_dec_bcu_operand0_mux_sel_0_.m13_2_0 ( .A(i9_mux_0), .B(N_22), .C(N_137_i), .D(i19_mux), .Y(N_22_mux_2) ); defparam \rv32i_dec_bcu_operand0_mux_sel_0_.m13_2_0 .INIT=16'h04C4; // @46:10363 CFG4 lsu_op_complete_retr_d_d_0 ( .A(un6_instr_is_lsu_op_retr_1z), .B(req_resp_state_valid), .C(un1_lsu_resp_valid38_1_i), .D(lsu_resp_valid40), .Y(lsu_op_complete_retr_d_d) ); defparam lsu_op_complete_retr_d_d_0.INIT=16'hEEEA; // @46:15460 CFG4 \rv32c_dec_gpr_wr_sel_6[4] ( .A(N_119_i), .B(un1_instruction_37_Z), .C(un1_instruction_13), .D(rv32c_dec_gpr_wr_sel_sn_N_7), .Y(N_387) ); defparam \rv32c_dec_gpr_wr_sel_6[4] .INIT=16'h880A; // @46:13195 CFG4 \rv32i_dec_shifter_unit_op_sel_1_0_.m6 ( .A(N_115_i), .B(N_155), .C(N_117_i), .D(N_129_i), .Y(N_7) ); defparam \rv32i_dec_shifter_unit_op_sel_1_0_.m6 .INIT=16'h004C; // @46:18188 CFG4 \lsu_op[2] ( .A(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .B(N_14072_i), .C(rv32c_dec_lsu_op[2]), .D(rv32i_dec_lsu_op[2]), .Y(lsu_op_de[2]) ); defparam \lsu_op[2] .INIT=16'hC480; // @46:13195 CFG4 \rv32i_dec_bcu_op_sel.m17_3_1 ( .A(N_129_i), .B(N_131_i), .C(N_21_mux_1), .D(N_21_mux_2), .Y(m17_2_1) ); defparam \rv32i_dec_bcu_op_sel.m17_3_1 .INIT=16'hAAA2; // @46:13195 CFG4 un1_rv32i_dec_mnemonic4960_1_i_4 ( .A(N_563), .B(un1_rv32i_dec_mnemonic4960_1_i_a17_0_Z), .C(rv32i_dec_mnemonic4960), .D(N_527_1), .Y(un1_rv32i_dec_mnemonic4960_1_i_4_Z) ); defparam un1_rv32i_dec_mnemonic4960_1_i_4.INIT=16'hFFF8; // @46:13195 CFG4 \rv32i_dec_operand1_mux_sel_0_1[0] ( .A(N_211), .B(un1_instruction), .C(N_154), .D(rv32i_dec_operand1_mux_sel_0_a2_0_2_Z[0]), .Y(rv32i_dec_operand1_mux_sel_0_1_Z[0]) ); defparam \rv32i_dec_operand1_mux_sel_0_1[0] .INIT=16'hFEEE; // @46:15460 CFG4 \rv32c_dec_immediate_1_iv_0[4] ( .A(un1_instruction_40_Z), .B(N_495), .C(N_119_i), .D(N_129_i), .Y(rv32c_dec_immediate_1_iv_0_Z[4]) ); defparam \rv32c_dec_immediate_1_iv_0[4] .INIT=16'hEAC0; // @46:13195 CFG4 \rv32i_dec_gpr_wr_mux_sel_0_2[1] ( .A(rv32i_dec_gpr_wr_mux_sel_0_a6_1_0_Z[1]), .B(N_137_i), .C(N_144_2), .D(N_568_1_0), .Y(rv32i_dec_gpr_wr_mux_sel_0_2_Z[1]) ); defparam \rv32i_dec_gpr_wr_mux_sel_0_2[1] .INIT=16'hE0C0; // @46:15460 CFG4 \rv32c_dec_operand1_mux_sel_1_iv_i_a3_3[0] ( .A(rv32c_dec_mnemonic2132), .B(rv32c_dec_mnemonic2130_0), .C(rv32c_dec_operand1_mux_sel_1_iv_i_a3_0[0]), .D(rv32c_dec_mnemonic2126), .Y(rv32c_dec_operand1_mux_sel_1_iv_i_a3_3_Z[0]) ); defparam \rv32c_dec_operand1_mux_sel_1_iv_i_a3_3[0] .INIT=16'h0010; // @46:15082 CFG4 \gen_decode_rv32m.rv32m_dec_mnemonic851 ( .A(un1_instruction_29_8), .B(rv32m_dec_mnemonic851_4), .C(un1_instruction_29_3_Z), .D(un1_instruction_29_1_1), .Y(rv32m_dec_mnemonic851) ); defparam \gen_decode_rv32m.rv32m_dec_mnemonic851 .INIT=16'h8000; // @46:13195 CFG4 \rv32i_dec_exu_result_mux_sel_0[2] ( .A(N_210), .B(N_4_0), .C(N_51), .D(N_90), .Y(rv32i_dec_exu_result_mux_sel[2]) ); defparam \rv32i_dec_exu_result_mux_sel_0[2] .INIT=16'hFFEA; // @46:8132 CFG4 lsu_flush ( .A(exu_op_abort_ex_1_1z), .B(machine_implicit_wr_mtval_tval_wr_en), .C(trace_priv_i), .D(un2_exception_taken), .Y(lsu_flush_1z) ); defparam lsu_flush.INIT=16'hFAFE; // @46:15082 CFG4 \gen_decode_rv32m.rv32m_dec_gpr_wr_valid ( .A(un1_instruction_29_Z), .B(rv32m_dec_mnemonic853), .C(rv32m_dec_mnemonic852), .D(rv32m_dec_gpr_wr_valid_1), .Y(rv32m_dec_gpr_wr_valid) ); defparam \gen_decode_rv32m.rv32m_dec_gpr_wr_valid .INIT=16'hFFFE; // @46:13195 CFG4 \rv32i_dec_alu_op_sel_0_a5[1] ( .A(N_127_0), .B(N_147_2), .C(N_162), .D(N_163), .Y(N_147) ); defparam \rv32i_dec_alu_op_sel_0_a5[1] .INIT=16'h4440; // @46:13195 CFG4 \rv32i_dec_alu_op_sel_0[0] ( .A(N_146), .B(N_143), .C(un1_instruction), .D(N_144), .Y(rv32i_dec_alu_op_sel[0]) ); defparam \rv32i_dec_alu_op_sel_0[0] .INIT=16'hFFFE; // @46:13195 CFG4 \rv32i_dec_lsu_op_0[0] ( .A(N_30), .B(N_51), .C(rv32i_dec_mnemonic4948), .D(rv32i_dec_mnemonic4949), .Y(rv32i_dec_lsu_op[0]) ); defparam \rv32i_dec_lsu_op_0[0] .INIT=16'hFFF8; // @46:15082 CFG4 \gen_decode_rv32m.rv32m_dec_mnemonic848 ( .A(rv32i_dec_shifter_unit_places_3[2]), .B(rv32m_dec_mnemonic846_i_12), .C(un1_instruction_29_8), .D(rv32m_dec_mnemonic848_4), .Y(rv32m_dec_mnemonic848) ); defparam \gen_decode_rv32m.rv32m_dec_mnemonic848 .INIT=16'h8000; // @46:13195 CFG4 \rv32i_dec_shifter_unit_places_2_0_.m19 ( .A(rv32i_dec_shifter_unit_places_3[2]), .B(rv32i_dec_shifter_unit_places_2[2]), .C(N_573), .D(m19_3), .Y(rv32i_dec_shifter_unit_places[2]) ); defparam \rv32i_dec_shifter_unit_places_2_0_.m19 .INIT=16'h8000; CFG4 gpr_rs2_rd_valid_dbgpipe_0_RNO_0 ( .A(stage_state_retr), .B(N_5237_tz_tz), .C(gpr_rs2_stall_csr_2_Z), .D(gpr_wr_en_retr_1z), .Y(gpr_rs2_rd_valid_dbgpipe_0_RNO_0_Z) ); defparam gpr_rs2_rd_valid_dbgpipe_0_RNO_0.INIT=16'hDFFF; // @46:8177 CFG2 csr_trigger_wr_hzd_de_RNI41LM3 ( .A(csr_trigger_wr_hzd_de_Z), .B(stage_state_de), .Y(ifu_m1_e_1_0) ); defparam csr_trigger_wr_hzd_de_RNI41LM3.INIT=4'h1; // @46:10024 CFG4 gpr_rs1_rd_valid_mux_0 ( .A(un11_gpr_rs1_stall_exu), .B(un7_gpr_rs1_stall_exu_NE), .C(gpr_rs1_stall_csr_1_Z), .D(gpr_rs1_rd_valid_mux_0_RNO_Z), .Y(gpr_rs1_rd_valid_mux_0_1z) ); defparam gpr_rs1_rd_valid_mux_0.INIT=16'hEF00; // @46:15460 CFG4 \rv32c_dec_gpr_rs1_rd_sel_0_iv_0[3] ( .A(rv32c_dec_mnemonic2131), .B(un1_rv32c_dec_mnemonic2115_3_Z), .C(N_121_i), .D(un1_instruction_13), .Y(rv32c_dec_gpr_rs1_rd_sel_0_iv_0_Z[3]) ); defparam \rv32c_dec_gpr_rs1_rd_sel_0_iv_0[3] .INIT=16'hE0C0; CFG2 instr_accepted_ex_2_1_RNIEDMV8U3 ( .A(instr_accepted_ex), .B(un1_implicit_pseudo_instr_de), .Y(instr_accepted_ex_2_1_RNIEDMV8U3_Z) ); defparam instr_accepted_ex_2_1_RNIEDMV8U3.INIT=4'h8; // @46:15460 CFG4 \rv32c_dec_immediate_2_iv[3] ( .A(rv32c_dec_immediate_0_Z[4]), .B(N_492), .C(N_121_i), .D(N_131_i), .Y(rv32c_dec_immediate_Z[3]) ); defparam \rv32c_dec_immediate_2_iv[3] .INIT=16'hECA0; // @46:18188 CFG4 \gpr_wr_mux_sel_0_iv[0] ( .A(rv32i_dec_gpr_wr_mux_sel[0]), .B(un1_instruction_18_i), .C(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .D(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .Y(gpr_wr_mux_sel_de[0]) ); defparam \gpr_wr_mux_sel_0_iv[0] .INIT=16'hEAC0; // @46:13195 CFG4 \rv32i_dec_exu_result_mux_sel_0_o4[0] ( .A(N_108), .B(N_104), .C(N_103_2), .D(rv32i_dec_exu_result_mux_sel_0_a2_0_0_Z[0]), .Y(N_77) ); defparam \rv32i_dec_exu_result_mux_sel_0_o4[0] .INIT=16'hFEEE; // @46:9986 CFG4 gpr_wr_valid_retr_1 ( .A(debug_enter_retr), .B(formal_trace_reset_taken), .C(trace_priv_i), .D(gpr_wr_valid_retr_1_1_1z), .Y(gpr_wr_valid_retr_0) ); defparam gpr_wr_valid_retr_1.INIT=16'hF100; // @46:18188 CFG4 \immediate_0[26] ( .A(rv32c_dec_immediate[17]), .B(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .C(instruction_m_1[26]), .D(instruction_m_8[31]), .Y(immediate_de[26]) ); defparam \immediate_0[26] .INIT=16'hBBB8; // @46:18188 CFG4 \immediate_0[28] ( .A(rv32c_dec_immediate[17]), .B(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .C(instruction_m_1[28]), .D(instruction_m_8[31]), .Y(immediate_de[28]) ); defparam \immediate_0[28] .INIT=16'hBBB8; // @46:18188 CFG4 \immediate_0[30] ( .A(rv32c_dec_immediate[17]), .B(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .C(instruction_m_1[30]), .D(instruction_m_8[31]), .Y(immediate_de[30]) ); defparam \immediate_0[30] .INIT=16'hBBB8; // @46:18188 CFG4 \immediate_0[31] ( .A(ifu_expipe_resp_ireg_net[31]), .B(N_482), .C(rv32c_dec_immediate[17]), .D(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .Y(immediate_de[31]) ); defparam \immediate_0[31] .INIT=16'hF088; // @46:18188 CFG4 \immediate_0[29] ( .A(rv32c_dec_immediate[17]), .B(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .C(instruction_m_1[29]), .D(instruction_m_8[31]), .Y(immediate_de[29]) ); defparam \immediate_0[29] .INIT=16'hBBB8; // @46:18188 CFG4 \immediate_0[27] ( .A(rv32c_dec_immediate[17]), .B(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .C(instruction_m_1[27]), .D(instruction_m_8[31]), .Y(immediate_de[27]) ); defparam \immediate_0[27] .INIT=16'hBBB8; // @46:18188 CFG4 \immediate_0[25] ( .A(rv32c_dec_immediate[17]), .B(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .C(instruction_m_1[25]), .D(instruction_m_8[31]), .Y(immediate_de[25]) ); defparam \immediate_0[25] .INIT=16'hBBB8; // @46:13195 CFG4 \rv32i_dec_gpr_rs1_rd_valid.m27 ( .A(N_137_i), .B(i5_mux_1), .C(N_41_mux), .D(i5_mux_2), .Y(N_28_0) ); defparam \rv32i_dec_gpr_rs1_rd_valid.m27 .INIT=16'hA0B1; // @46:18188 CFG4 case_dec_gpr_rs2_rd_sel_2_sqmuxa_RNI49OMR5 ( .A(N_18_mux), .B(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .C(N_289_i), .D(N_14_mux), .Y(rv32c_dec_shifter_unit_op_sel_m_0) ); defparam case_dec_gpr_rs2_rd_sel_2_sqmuxa_RNI49OMR5.INIT=16'h8C80; // @46:12110 CFG4 exu_op_abort_ex_1_RNI8HDTF ( .A(exu_op_abort_ex_1_1z), .B(machine_implicit_wr_mtval_tval_wr_en), .C(trace_priv_i), .D(un2_exception_taken), .Y(lsu_flush_net_i) ); defparam exu_op_abort_ex_1_RNI8HDTF.INIT=16'h0501; // @46:13195 CFG4 un1_rv32i_dec_mnemonic4960_1_i_6 ( .A(N_565), .B(N_566), .C(rv32i_dec_mnemonic4948), .D(un1_rv32i_dec_mnemonic4960_1_i_4_Z), .Y(un1_rv32i_dec_mnemonic4960_1_i_6_Z) ); defparam un1_rv32i_dec_mnemonic4960_1_i_6.INIT=16'hFFFE; // @46:13195 CFG4 \rv32i_dec_gpr_wr_mux_sel_0[1] ( .A(N_143), .B(N_211), .C(rv32i_dec_gpr_wr_mux_sel_0_2_Z[1]), .D(N_210), .Y(rv32i_dec_gpr_wr_mux_sel[1]) ); defparam \rv32i_dec_gpr_wr_mux_sel_0[1] .INIT=16'hFFFE; // @46:15460 CFG4 rv32c_dec_bcu_op_sel_iv_1 ( .A(rv32c_dec_bcu_op_sel_iv_1_1_Z), .B(rv32c_dec_mnemonic_1_m_0), .C(rv32c_dec_mnemonic1725_m_1), .D(rv32c_dec_bcu_op_sel_2), .Y(rv32c_dec_bcu_op_sel) ); defparam rv32c_dec_bcu_op_sel_iv_1.INIT=16'hFFFE; // @46:15460 CFG4 un1_rv32c_dec_mnemonic2112_2 ( .A(rv32c_dec_mnemonic2118), .B(un1_rv32c_dec_mnemonic2112_2_1_Z), .C(un1_rv32c_dec_mnemonic2112_2_4_Z), .D(un1_rv32c_dec_mnemonic2112_2_5_Z), .Y(un1_rv32c_dec_mnemonic2112_2_Z) ); defparam un1_rv32c_dec_mnemonic2112_2.INIT=16'hFFFE; // @46:8207 CFG4 csr_trigger_wr_hzd_de_RNI1D18B ( .A(stage_state_ex), .B(stage_state_de), .C(lsu_flush_1z), .D(csr_trigger_wr_hzd_de_Z), .Y(next_N_7_mux) ); defparam csr_trigger_wr_hzd_de_RNI1D18B.INIT=16'h0008; // @46:10363 CFG4 lsu_op_complete_retr_0_0_0 ( .A(un6_instr_is_lsu_op_retr_1z), .B(un11_lsu_resp_ready_d_1z), .C(un11_lsu_resp_ready_1_1), .D(csr_complete_retr_Z), .Y(lsu_op_complete_retr_0_0_0_1z) ); defparam lsu_op_complete_retr_0_0_0.INIT=16'hFE00; // @46:8704 CFG4 un1_instr_inhibit_ex_0 ( .A(de_ex_pipe_implicit_pseudo_instr_ex), .B(de_ex_pipe_debug_enter_req_ex), .C(un3_instr_inhibit_ex_8_1z), .D(un3_instr_inhibit_ex_9_Z), .Y(un1_instr_inhibit_ex_0_1z) ); defparam un1_instr_inhibit_ex_0.INIT=16'hDDDC; // @46:13195 CFG4 un1_rv32i_dec_mnemonic4960_1_i_3_tz ( .A(N_206), .B(un1_rv32i_dec_mnemonic4960_1_i_a17_2_1_0), .C(un1_rv32i_dec_mnemonic4960_1_i_a17_3_1_0_Z), .D(N_568_1_0), .Y(un1_rv32i_dec_mnemonic4960_1_i_3_tz_Z) ); defparam un1_rv32i_dec_mnemonic4960_1_i_3_tz.INIT=16'hF888; // @46:8177 CFG4 exu_op_abort_ex_1_RNILOR4J ( .A(trace_priv_i), .B(stage_state_ex), .C(trace_exception), .D(exu_op_abort_ex_1_1z), .Y(ifu_m1_e_0) ); defparam exu_op_abort_ex_1_RNILOR4J.INIT=16'h0004; // @46:18099 CFG4 \rv32i_dec_lsu_op_0_a4_RNILR4FC[3] ( .A(rv32i_dec_mnemonic4948), .B(N_41), .C(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .D(rv32i_dec_mnemonic4949), .Y(lsu_op_de[3]) ); defparam \rv32i_dec_lsu_op_0_a4_RNILR4FC[3] .INIT=16'hF0E0; // @46:9236 CFG4 \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_sel_ex_2_0_a2_3[4] ( .A(case_dec_gpr_rs2_rd_sel_1_sqmuxa_Z), .B(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .C(trace_priv_i), .D(un1_instruction_39), .Y(N_72_0) ); defparam \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_sel_ex_2_0_a2_3[4] .INIT=16'h0E0A; // @46:18188 CFG2 \gen_decode_rv32m.rv32m_dec_gpr_wr_valid_RNI9OFR8 ( .A(case_dec_gpr_rs2_rd_sel_1_sqmuxa_Z), .B(rv32m_dec_gpr_wr_valid), .Y(rv32m_dec_gpr_wr_valid_m) ); defparam \gen_decode_rv32m.rv32m_dec_gpr_wr_valid_RNI9OFR8 .INIT=4'h8; // @46:18099 CFG2 case_dec_gpr_rs2_rd_sel_1_sqmuxa ( .A(mnemonic538_Z), .B(rv32m_dec_gpr_wr_valid), .Y(case_dec_gpr_rs2_rd_sel_1_sqmuxa_Z) ); defparam case_dec_gpr_rs2_rd_sel_1_sqmuxa.INIT=4'h8; // @46:18188 CFG4 \operand0_mux_sel_1_iv[0] ( .A(rv32c_dec_operand0_mux_sel[0]), .B(rv32i_dec_operand0_mux_sel_Z[0]), .C(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .D(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .Y(operand0_mux_sel_de_0) ); defparam \operand0_mux_sel_1_iv[0] .INIT=16'hECA0; // @46:13195 CFG4 \rv32i_dec_exu_result_mux_sel_0_0[0] ( .A(N_131_i), .B(N_564_1), .C(N_573), .D(N_77), .Y(rv32i_dec_exu_result_mux_sel_0_0_Z[0]) ); defparam \rv32i_dec_exu_result_mux_sel_0_0[0] .INIT=16'hFF40; // @46:14609 CFG4 un1_rv32c_dec_mnemonic2137_1_2_a2_7 ( .A(N_587), .B(rv32c_dec_mnemonic2128), .C(rv32c_dec_mnemonic2130_0), .D(rv32c_dec_gpr_wr_sel_sn_N_7), .Y(un1_rv32c_dec_mnemonic2137_1_2_a2_7_Z) ); defparam un1_rv32c_dec_mnemonic2137_1_2_a2_7.INIT=16'h0200; // @46:13195 CFG4 \rv32i_dec_exu_result_mux_sel_0[1] ( .A(rv32i_dec_exu_result_mux_sel_0_a4_1_Z[1]), .B(N_168), .C(N_77), .D(N_89), .Y(rv32i_dec_exu_result_mux_sel[1]) ); defparam \rv32i_dec_exu_result_mux_sel_0[1] .INIT=16'hFFF8; // @46:18188 CFG4 sw_csr_rd_op ( .A(un1_rv32i_dec_mnemonic4950_1_Z), .B(un83_rv32i_dec_gpr_wr_valid), .C(rv32i_dec_sw_csr_rd_op_cnst_Z), .D(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .Y(sw_csr_rd_op_de) ); defparam sw_csr_rd_op.INIT=16'h7200; // @46:18188 CFG3 \shifter_unit_places_0[2] ( .A(un1_rv32c_dec_mnemonic2119_1_i), .B(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .C(rv32i_dec_shifter_unit_places[2]), .Y(shifter_unit_places_sel_de[2]) ); defparam \shifter_unit_places_0[2] .INIT=8'hB8; // @46:18188 CFG4 \shifter_unit_places_0[0] ( .A(N_30_mux), .B(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .C(N_131_i), .D(rv32c_dec_lsu_op[2]), .Y(shifter_unit_places_sel_de[0]) ); defparam \shifter_unit_places_0[0] .INIT=16'hEC20; // @46:13195 CFG4 \rv32i_dec_shifter_unit_places_2_0_.m23_2_0 ( .A(N_115_i), .B(N_131_i), .C(N_30_mux), .D(N_32_mux_0), .Y(rv32i_dec_shifter_unit_places_2[1]) ); defparam \rv32i_dec_shifter_unit_places_2_0_.m23_2_0 .INIT=16'hC480; // @46:18188 CFG4 \alu_op_sel_1_iv_0_cZ[0] ( .A(rv32c_dec_alu_op_sel[0]), .B(rv32i_dec_alu_op_sel[0]), .C(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .D(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .Y(alu_op_sel_1_iv_0[0]) ); defparam \alu_op_sel_1_iv_0_cZ[0] .INIT=16'hECA0; // @46:18188 CFG4 \branch_cond_iv_0[0] ( .A(un1_debug_exit_Z), .B(rv32i_dec_branch_cond_1_Z[0]), .C(rv32i_instr_decoded_8), .D(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .Y(branch_cond_iv_0_0) ); defparam \branch_cond_iv_0[0] .INIT=16'hFEAA; // @46:13195 CFG4 un1_rv32i_dec_mnemonic4915_1_6 ( .A(rv32i_dec_mnemonic4926), .B(un1_rv32i_dec_mnemonic4915_1_2_Z), .C(rv32i_dec_mnemonic4949), .D(N_41), .Y(un1_rv32i_dec_mnemonic4915_1_6_Z) ); defparam un1_rv32i_dec_mnemonic4915_1_6.INIT=16'hFFFE; // @46:13195 CFG4 un1_rv32i_dec_mnemonic4911_6 ( .A(un1_instruction), .B(un1_rv32i_dec_mnemonic4911_2_Z), .C(rv32i_dec_mnemonic4960), .D(rv32i_dec_fence_Z), .Y(un1_rv32i_dec_mnemonic4911_6_Z) ); defparam un1_rv32i_dec_mnemonic4911_6.INIT=16'hFFFE; // @46:9968 CFG4 gpr_rs2_rd_valid_dbgpipe_0_RNO ( .A(trace_priv_i), .B(de_ex_pipe_gpr_rs2_rd_valid_ex), .C(gpr_rs2_rd_valid_dbgpipe_0_RNO_0_Z), .D(gpr_rs2_stall_csr_Z), .Y(gpr_N_5_mux_0) ); defparam gpr_rs2_rd_valid_dbgpipe_0_RNO.INIT=16'h0040; // @46:18188 CFG4 \immediate_i_o2[24] ( .A(N_14072_i), .B(N_61), .C(rv32c_dec_immediate[17]), .D(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .Y(N_39) ); defparam \immediate_i_o2[24] .INIT=16'hDFDD; // @46:18188 CFG4 case_dec_gpr_rs2_rd_sel_0_sqmuxa_RNIBM8F94 ( .A(N_32_mux), .B(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .C(N_133_i), .D(N_290_i), .Y(rv32i_dec_shifter_unit_op_sel_m_0) ); defparam case_dec_gpr_rs2_rd_sel_0_sqmuxa_RNIBM8F94.INIT=16'h8000; // @46:15460 CFG4 \rv32c_dec_operand1_mux_sel_1_iv_i_a3[0] ( .A(rv32c_dec_mnemonic2118), .B(rv32c_dec_mnemonic2116), .C(rv32c_dec_operand1_mux_sel_1_iv_i_a3_3_Z[0]), .D(un1_rv32c_dec_mnemonic2112_2_1_Z), .Y(N_542) ); defparam \rv32c_dec_operand1_mux_sel_1_iv_i_a3[0] .INIT=16'h0010; // @46:8704 CFG3 un1_instr_inhibit_ex ( .A(un1_instr_inhibit_ex_0_1z), .B(un5_instr_inhibit_ex_0_1z), .C(un1_irq_stall_lsu_req), .Y(un1_instr_inhibit_ex_1z) ); defparam un1_instr_inhibit_ex.INIT=8'hEA; // @46:15460 CFG2 \rv32c_dec_gpr_rs1_rd_sel_1[1] ( .A(un1_rv32c_dec_mnemonic2112_2_Z), .B(un1_instruction_27_1z), .Y(N_398_1) ); defparam \rv32c_dec_gpr_rs1_rd_sel_1[1] .INIT=4'hD; // @46:18188 CFG4 \alu_op_sel_1_iv_0_RNO[1] ( .A(N_170), .B(rv32i_dec_alu_op_sel_0_a5_0_0_Z[1]), .C(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .D(N_147), .Y(rv32i_dec_alu_op_sel_m[1]) ); defparam \alu_op_sel_1_iv_0_RNO[1] .INIT=16'hF080; // @46:18188 CFG4 \rv32i_dec_bcu_operand0_mux_sel_0_.N_23_mux_m ( .A(N_22_mux_2), .B(N_22_mux_1), .C(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .D(N_25_mux_1), .Y(N_23_mux_m) ); defparam \rv32i_dec_bcu_operand0_mux_sel_0_.N_23_mux_m .INIT=16'hE000; // @46:13195 CFG4 \rv32i_dec_exu_result_mux_sel_0[0] ( .A(N_123_0), .B(N_130), .C(rv32i_dec_exu_result_mux_sel_0_0_Z[0]), .D(N_144_2), .Y(rv32i_dec_exu_result_mux_sel[0]) ); defparam \rv32i_dec_exu_result_mux_sel_0[0] .INIT=16'hF2F0; // @46:13195 CFG2 \rv32i_dec_shifter_unit_places_2_0_.m23_1_0 ( .A(rv32i_dec_shifter_unit_places[2]), .B(N_131_i), .Y(rv32i_dec_shifter_unit_places_1[1]) ); defparam \rv32i_dec_shifter_unit_places_2_0_.m23_1_0 .INIT=4'h2; // @46:18188 CFG4 \alu_op_sel_1_iv_0_cZ[1] ( .A(case_dec_gpr_rs2_rd_sel_1_sqmuxa_Z), .B(rv32i_dec_alu_op_sel_m[1]), .C(rv32m_dec_mnemonic849), .D(rv32m_dec_gpr_wr_valid_1), .Y(alu_op_sel_1_iv_0[1]) ); defparam \alu_op_sel_1_iv_0_cZ[1] .INIT=16'hCCCE; // @46:18188 CFG3 \operand1_mux_sel_1_iv_RNO[0] ( .A(rv32c_dec_mnemonic2132), .B(rv32c_dec_mnemonic1725), .C(N_542), .Y(rv32c_dec_operand1_mux_sel_m_0[0]) ); defparam \operand1_mux_sel_1_iv_RNO[0] .INIT=8'h0D; // @46:18188 CFG4 \exu_result_mux_sel_1_iv[2] ( .A(case_dec_gpr_rs2_rd_sel_1_sqmuxa_Z), .B(rv32i_dec_exu_result_mux_sel[2]), .C(rv32c_dec_exu_result_mux_sel_m[2]), .D(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .Y(exu_result_mux_sel_de[2]) ); defparam \exu_result_mux_sel_1_iv[2] .INIT=16'hFEFA; // @46:13195 CFG4 \rv32i_dec_operand1_mux_sel_0[0] ( .A(rv32i_dec_operand1_mux_sel_0_1_Z[0]), .B(N_565), .C(rv32i_dec_fence_Z), .D(N_30_mux), .Y(rv32i_dec_operand1_mux_sel[0]) ); defparam \rv32i_dec_operand1_mux_sel_0[0] .INIT=16'hFFFE; // @46:9997 CFG4 gpr_wr_completing_retr_2 ( .A(gpr_wr_en_retr_1z), .B(trace_priv_i), .C(lsu_expipe_resp_valid_0), .D(un1_lsu_resp_valid), .Y(gpr_wr_completing_retr_2_Z) ); defparam gpr_wr_completing_retr_2.INIT=16'h2000; // @46:18188 CFG4 \exu_result_mux_sel_1_iv_0[1] ( .A(rv32i_dec_exu_result_mux_sel[1]), .B(N_290_i), .C(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .D(case_dec_gpr_rs2_rd_sel_1_sqmuxa_Z), .Y(exu_result_mux_sel_1_iv_0_Z[1]) ); defparam \exu_result_mux_sel_1_iv_0[1] .INIT=16'hECA0; // @46:18188 CFG4 \bcu_operand0_mux_sel_1_iv_2[0] ( .A(case_dec_gpr_rs2_rd_sel_3_sqmuxa_Z), .B(N_23_mux_m), .C(un1_instruction_valid_i), .D(case_dec_gpr_rs2_rd_sel_1_sqmuxa_Z), .Y(bcu_operand0_mux_sel_1_iv_2_Z[0]) ); defparam \bcu_operand0_mux_sel_1_iv_2[0] .INIT=16'hFFEF; // @46:14609 CFG4 un1_rv32c_dec_mnemonic2137_1_2_a2 ( .A(rv32c_dec_mnemonic2118), .B(rv32c_dec_mnemonic2116), .C(un1_rv32c_dec_mnemonic2137_1_2_a2_7_Z), .D(un1_rv32c_dec_mnemonic2137_1_2_a2_8_Z), .Y(un1_rv32c_dec_mnemonic2137_1_0) ); defparam un1_rv32c_dec_mnemonic2137_1_2_a2.INIT=16'h1000; // @46:9968 CFG4 gpr_rs2_rd_valid_dbgpipe_0 ( .A(trace_priv_i), .B(de_ex_pipe_gpr_rs2_rd_valid_ex), .C(un1_gpr_wr_mux_sel_ex_i), .D(gpr_N_5_mux_0), .Y(gpr_rs2_rd_valid_dbgpipe) ); defparam gpr_rs2_rd_valid_dbgpipe_0.INIT=16'hF088; // @46:13195 CFG4 un1_rv32i_dec_mnemonic4960_1_i_5 ( .A(un1_rv32i_dec_mnemonic4960_1_i_3_tz_Z), .B(N_573), .C(N_482_1), .D(rv32i_dec_mnemonic4959), .Y(un1_rv32i_dec_mnemonic4960_1_i_5_Z) ); defparam un1_rv32i_dec_mnemonic4960_1_i_5.INIT=16'hFFF8; // @46:18188 CFG4 \gpr_wr_mux_sel_iv[1] ( .A(case_dec_gpr_rs2_rd_sel_1_sqmuxa_Z), .B(rv32i_dec_gpr_wr_mux_sel[1]), .C(rv32c_dec_gpr_wr_mux_sel_m[1]), .D(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .Y(gpr_wr_mux_sel_de[1]) ); defparam \gpr_wr_mux_sel_iv[1] .INIT=16'hFEFA; // @46:9859 CFG3 ifu_expipe_req_fenci_proceed ( .A(debug_mode_retire_mask_retr), .B(dealloc_resp_buff_10), .C(ex_retr_pipe_fence_i_retr), .Y(ifu_expipe_req_fenci_proceed_net) ); defparam ifu_expipe_req_fenci_proceed.INIT=8'h40; // @46:9986 CFG4 gpr_wr_valid_retr_2_0_a0_0 ( .A(gpr_wr_en_retr_1z), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(lsu_expipe_resp_valid_0), .D(un1_lsu_resp_valid), .Y(gpr_wr_valid_retr_2_0_0) ); defparam gpr_wr_valid_retr_2_0_a0_0.INIT=16'hA888; // @46:9542 CFG3 ex_retr_pipe_fence_i_retr_2_RNI3S88F ( .A(ex_retr_pipe_fence_i_retr_2_1z), .B(un1_instr_inhibit_ex_1z), .C(stage_state_ex), .Y(bcu_m5_i_a4_0_0) ); defparam ex_retr_pipe_fence_i_retr_2_RNI3S88F.INIT=8'h15; // @46:9542 CFG3 ifu_expipe_req_branch_excpt_req_valid_1_0 ( .A(un3_branch_cond_ex[1]), .B(un1_instr_inhibit_ex_1z), .C(stage_state_ex), .Y(ifu_expipe_req_branch_excpt_req_valid_1_0_1z) ); defparam ifu_expipe_req_branch_excpt_req_valid_1_0.INIT=8'h2A; // @46:10356 CFG2 un1_ex_retr_pipe_lsu_op_retr ( .A(instr_accepted_retr_2), .B(instr_inhibit_ex), .Y(un1_ex_retr_pipe_lsu_op_retr_i_0) ); defparam un1_ex_retr_pipe_lsu_op_retr.INIT=4'h2; // @46:10354 CFG2 ex_retr_pipe_lsu_op_retr9 ( .A(instr_accepted_retr_2), .B(dealloc_resp_buff_10), .Y(ex_retr_pipe_lsu_op_retr9_1z) ); defparam ex_retr_pipe_lsu_op_retr9.INIT=4'hE; // @46:18188 CFG4 \exu_result_mux_sel_1_iv_0[0] ( .A(un1_instruction_29_Z), .B(rv32i_dec_exu_result_mux_sel[0]), .C(case_dec_gpr_rs2_rd_sel_1_sqmuxa_Z), .D(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .Y(exu_result_mux_sel_1_iv_0_Z[0]) ); defparam \exu_result_mux_sel_1_iv_0[0] .INIT=16'hECA0; // @46:18188 CFG4 \exu_result_mux_sel_1_iv[1] ( .A(rv32c_dec_gpr_wr_mux_sel_m_2[1]), .B(un1_rv32c_dec_mnemonic2123_2_s4), .C(exu_result_mux_sel_1_iv_0_Z[1]), .D(rv32c_dec_gpr_wr_valid_m_1), .Y(exu_result_mux_sel_de[1]) ); defparam \exu_result_mux_sel_1_iv[1] .INIT=16'hF2F0; // @46:9764 CFG3 un1_instr_completing_retr_c ( .A(gpr_wr_en_retr_1z), .B(lsu_op_complete_retr_0), .C(lsu_op_complete_retr_d_d), .Y(un1_instr_completing_retr_c_1z) ); defparam un1_instr_completing_retr_c.INIT=8'h40; // @46:9986 CFG3 gpr_wr_completing_retr_3_0 ( .A(gpr_wr_completing_retr_2_Z), .B(un14_gpr_rs1_stall_lsu), .C(gpr_wr_completing_retr_3_0_d_1z), .Y(gpr_wr_completing_retr) ); defparam gpr_wr_completing_retr_3_0.INIT=8'hB8; // @46:18188 CFG4 \lsu_op[1] ( .A(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .B(N_14072_i), .C(rv32i_dec_lsu_op[1]), .D(rv32c_dec_lsu_op[0]), .Y(lsu_op_de[1]) ); defparam \lsu_op[1] .INIT=16'hC840; // @46:18188 CFG4 \lsu_op[0] ( .A(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .B(N_14072_i), .C(rv32c_dec_lsu_op[0]), .D(rv32i_dec_lsu_op[0]), .Y(lsu_op_de[0]) ); defparam \lsu_op[0] .INIT=16'hC480; // @46:18188 CFG4 gpr_rs2_rd_valid_iv_RNO ( .A(N_23_mux), .B(N_129_i), .C(N_13), .D(rv32i_dec_gpr_rs2_rd_valid_m_2), .Y(rv32i_dec_gpr_rs2_rd_valid_m_3_0) ); defparam gpr_rs2_rd_valid_iv_RNO.INIT=16'hB800; // @46:9352 CFG4 gpr_rd_rs1_complete_ex_d_1_a2_0 ( .A(ex_retr_pipe_fence_i_retr_2_1z), .B(stage_state_ex), .C(un1_instr_inhibit_ex_1z), .D(un3_branch_cond_ex[0]), .Y(gpr_rd_rs1_complete_ex_d_1_a2_0_Z) ); defparam gpr_rd_rs1_complete_ex_d_1_a2_0.INIT=16'hEA00; // @46:9353 CFG4 gpr_rd_rs2_complete_ex_s ( .A(trace_priv_i), .B(de_ex_pipe_gpr_rs2_rd_valid_ex), .C(un1_gpr_wr_mux_sel_ex_i), .D(instr_inhibit_ex), .Y(gpr_rd_rs2_complete_ex_out) ); defparam gpr_rd_rs2_complete_ex_s.INIT=16'hFF37; // @46:9335 CFG2 gpr_N_10_mux_i_0_0 ( .A(un1_gpr_wr_mux_sel_ex_i), .B(trace_priv_i), .Y(gpr_N_10_mux_i_0_0_1z) ); defparam gpr_N_10_mux_i_0_0.INIT=4'h2; // @46:18188 CFG4 \operand1_mux_sel_1_iv[0] ( .A(rv32c_dec_operand1_mux_sel_m_0[0]), .B(rv32i_dec_operand1_mux_sel[0]), .C(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .D(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .Y(operand1_mux_sel_de[0]) ); defparam \operand1_mux_sel_1_iv[0] .INIT=16'hEAC0; // @46:7008 CFG4 lsu_op_complete_retr_d_d_0_RNIMQNPK ( .A(debug_enter_retr), .B(lsu_op_complete_retr_d_d), .C(interrupt_could_commit_0), .D(lsu_op_complete_retr_0), .Y(instr_completing_retr_0_0) ); defparam lsu_op_complete_retr_d_d_0_RNIMQNPK.INIT=16'hE0A0; // @46:18188 CFG4 \exu_result_mux_sel_1_iv[0] ( .A(rv32c_dec_exu_result_mux_sel_m_1[0]), .B(rv32c_dec_exu_result_mux_sel_m_0[0]), .C(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .D(exu_result_mux_sel_1_iv_0_Z[0]), .Y(exu_result_mux_sel_de[0]) ); defparam \exu_result_mux_sel_1_iv[0] .INIT=16'hFF80; // @46:9764 CFG3 un1_instr_completing_retr_d ( .A(lsu_op_complete_retr_d_d), .B(gpr_wr_completing_retr), .C(lsu_op_complete_retr_0), .Y(un1_instr_completing_retr_d_1z) ); defparam un1_instr_completing_retr_d.INIT=8'h80; // @46:18188 CFG4 \shifter_unit_places_0[1] ( .A(rv32i_dec_shifter_unit_places_2[1]), .B(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .C(rv32c_dec_shifter_unit_places[1]), .D(rv32i_dec_shifter_unit_places_1[1]), .Y(shifter_unit_places_sel_de[1]) ); defparam \shifter_unit_places_0[1] .INIT=16'hF3E2; // @46:9519 CFG4 \bcu_operand0_mux_sel_1_iv_2_RNIIG5251[0] ( .A(rv32c_dec_mnemonic1725_m_1), .B(un1_instruction_22_i), .C(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .D(bcu_operand0_mux_sel_1_iv_2_Z[0]), .Y(bcu_operand0_mux_sel_1_iv_i_0) ); defparam \bcu_operand0_mux_sel_1_iv_2_RNIIG5251[0] .INIT=16'h00EF; // @46:13195 CFG4 \rv32i_dec_gpr_rs1_rd_valid.m18_1_0 ( .A(N_133_i), .B(N_137_i), .C(N_46_mux), .D(N_4_0), .Y(N_19_1) ); defparam \rv32i_dec_gpr_rs1_rd_valid.m18_1_0 .INIT=16'h0213; // @46:9542 CFG4 ex_retr_pipe_fence_i_retr_2_RNIBMA4P ( .A(un3_branch_cond_ex[1]), .B(bcu_m5_i_a4_0_0), .C(i_trx_os_buff_ready), .D(trace_priv_i), .Y(bcu_m5_i_a4_0_1_1_0) ); defparam ex_retr_pipe_fence_i_retr_2_RNIBMA4P.INIT=16'hEEAE; // @46:9986 CFG4 \gpr_wr_data_retr_3_2[4] ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(lsu_expipe_resp_rd_data_net[4]), .D(cpu_debug_csr_op_rd_data_net[4]), .Y(gpr_wr_data_retr_2[4]) ); defparam \gpr_wr_data_retr_3_2[4] .INIT=16'hA820; // @46:9986 CFG4 \gpr_wr_data_retr_3_2[10] ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(lsu_expipe_resp_rd_data_net[10]), .D(cpu_debug_csr_op_rd_data_net[10]), .Y(gpr_wr_data_retr_2[10]) ); defparam \gpr_wr_data_retr_3_2[10] .INIT=16'hA820; // @46:9986 CFG4 \gpr_wr_data_retr_3_2[11] ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(lsu_expipe_resp_rd_data_net[11]), .D(cpu_debug_csr_op_rd_data_net[11]), .Y(gpr_wr_data_retr_2[11]) ); defparam \gpr_wr_data_retr_3_2[11] .INIT=16'hA820; // @46:9764 CFG3 un1_instr_completing_retr_c_RNIQ642L ( .A(debug_enter_retr), .B(un1_instr_completing_retr_c_1z), .C(un1_instr_completing_retr_d_1z), .Y(instr_completing_retr) ); defparam un1_instr_completing_retr_c_RNIQ642L.INIT=8'hFE; // @46:7008 CFG4 gpr_wr_completing_retr_3_0_RNI9QTR21 ( .A(gpr_wr_en_retr_1z), .B(debug_enter_retr), .C(instr_completing_retr_0_0), .D(gpr_wr_completing_retr), .Y(interrupt_could_commit) ); defparam gpr_wr_completing_retr_3_0_RNI9QTR21.INIT=16'hF0D0; // @46:9946 CFG3 \gen_debug_gpr_ctrl_pipeline.ex_retr_pipe_gpr_wr_en_retr10 ( .A(trace_priv_i), .B(gpr_wr_completing_retr), .C(instr_accepted_retr_2), .Y(ex_retr_pipe_gpr_wr_en_retr10) ); defparam \gen_debug_gpr_ctrl_pipeline.ex_retr_pipe_gpr_wr_en_retr10 .INIT=8'hFE; // @46:9335 CFG4 gpr_wr_valid_retr_1_1_RNISFCQ8 ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .B(un1_rs2_rd_hzd_4), .C(gpr_wr_valid_retr_1_1_1z), .D(gpr_wr_valid_retr_2_0_0), .Y(gpr_m7_0_a3_0) ); defparam gpr_wr_valid_retr_1_1_RNISFCQ8.INIT=16'hC840; // @46:13195 CFG3 \rv32i_dec_gpr_wr_valid_cnst.m16 ( .A(N_46_mux), .B(N_133_i), .C(N_17_1_0), .Y(N_17_0) ); defparam \rv32i_dec_gpr_wr_valid_cnst.m16 .INIT=8'hF8; // @46:9986 CFG4 \gpr_wr_data_retr_3_2[1] ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(lsu_expipe_resp_rd_data_net[1]), .D(cpu_debug_csr_op_rd_data_net[1]), .Y(gpr_wr_data_retr_2[1]) ); defparam \gpr_wr_data_retr_3_2[1] .INIT=16'hA820; // @46:9986 CFG4 \gpr_wr_data_retr_3_2[2] ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(lsu_expipe_resp_rd_data_net[2]), .D(cpu_debug_csr_op_rd_data_net[2]), .Y(gpr_wr_data_retr_2[2]) ); defparam \gpr_wr_data_retr_3_2[2] .INIT=16'hA820; // @46:9986 CFG4 \gpr_wr_data_retr_3_2[9] ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(lsu_expipe_resp_rd_data_net[9]), .D(cpu_debug_csr_op_rd_data_net[9]), .Y(gpr_wr_data_retr_2[9]) ); defparam \gpr_wr_data_retr_3_2[9] .INIT=16'hA820; // @46:13195 CFG4 un1_rv32i_dec_mnemonic4960_1_i ( .A(un1_rv32i_dec_mnemonic4960_1_i_5_Z), .B(rv32i_instr_decoded_4), .C(rv32i_instr_decoded_8), .D(un1_rv32i_dec_mnemonic4960_1_i_6_Z), .Y(rv32i_instr_decoded) ); defparam un1_rv32i_dec_mnemonic4960_1_i.INIT=16'hFFFE; // @46:8289 CFG4 force_debug_nop_de ( .A(fence_i_retr_Z), .B(debug_enter_req_de), .C(N_108_0), .D(ex_retr_pipe_fence_i_retr_2_1z), .Y(force_debug_nop_de_1z) ); defparam force_debug_nop_de.INIT=16'h0040; // @46:8240 CFG4 trigger_op_addr_valid_de ( .A(debug_exit_retr), .B(N_108_0), .C(csr_trigger_wr_hzd_de_Z), .D(lsu_flush_1z), .Y(trigger_op_addr_valid_de_1z) ); defparam trigger_op_addr_valid_de.INIT=16'h0001; // @46:9986 CFG4 gpr_wr_valid_retr_2_1 ( .A(gpr_wr_valid_retr_2_0_0), .B(soft_reset_taken_retr_0), .C(trace_exception), .D(formal_trace_reset_taken), .Y(N_767) ); defparam gpr_wr_valid_retr_2_1.INIT=16'h0008; // @46:9986 CFG4 \gpr_wr_data_retr_3[4] ( .A(ex_retr_pipe_exu_result_retr[4]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .D(gpr_wr_data_retr_2[4]), .Y(gpr_wr_data_retr[4]) ); defparam \gpr_wr_data_retr_3[4] .INIT=16'hFF08; // @46:9986 CFG4 \gpr_wr_data_retr_3[10] ( .A(ex_retr_pipe_exu_result_retr[10]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .D(gpr_wr_data_retr_2[10]), .Y(gpr_wr_data_retr[10]) ); defparam \gpr_wr_data_retr_3[10] .INIT=16'hFF08; // @46:9986 CFG4 \gpr_wr_data_retr_3[11] ( .A(ex_retr_pipe_exu_result_retr[11]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .D(gpr_wr_data_retr_2[11]), .Y(gpr_wr_data_retr[11]) ); defparam \gpr_wr_data_retr_3[11] .INIT=16'hFF08; // @46:8717 CFG4 instr_completing_ex_6_4_1_0 ( .A(debug_enter_retr), .B(stall_retr_Z), .C(un1_instr_completing_retr_d_1z), .D(un1_instr_completing_retr_c_1z), .Y(instr_completing_ex_6_4_1_0_Z) ); defparam instr_completing_ex_6_4_1_0.INIT=16'h3332; // @46:9986 CFG4 \gpr_wr_data_retr_3[1] ( .A(ex_retr_pipe_exu_result_retr[1]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .D(gpr_wr_data_retr_2[1]), .Y(gpr_wr_data_retr[1]) ); defparam \gpr_wr_data_retr_3[1] .INIT=16'hFF08; // @46:9986 CFG4 \gpr_wr_data_retr_3[2] ( .A(ex_retr_pipe_exu_result_retr[2]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .D(gpr_wr_data_retr_2[2]), .Y(gpr_wr_data_retr[2]) ); defparam \gpr_wr_data_retr_3[2] .INIT=16'hFF08; // @46:9986 CFG4 \gpr_wr_data_retr_3[9] ( .A(ex_retr_pipe_exu_result_retr[9]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .D(gpr_wr_data_retr_2[9]), .Y(gpr_wr_data_retr[9]) ); defparam \gpr_wr_data_retr_3[9] .INIT=16'hFF08; // @46:14609 CFG2 \gen_decode_rv32i.un291_rv32i_dec_sw_csr_wr_op_0 ( .A(N_289_i), .B(ifu_expipe_resp_ireg_net[18]), .Y(un291_rv32i_dec_sw_csr_wr_op_0) ); defparam \gen_decode_rv32i.un291_rv32i_dec_sw_csr_wr_op_0 .INIT=4'h1; // @46:13195 CFG4 un1_rv32i_dec_mnemonic4915_1 ( .A(un1_rv32i_dec_mnemonic4915_1_6_Z), .B(rv32i_dec_mnemonic4957), .C(rv32i_instr_decoded), .D(un1_rv32i_dec_mnemonic4915_1_10_Z), .Y(un1_rv32i_dec_mnemonic4915_1_Z) ); defparam un1_rv32i_dec_mnemonic4915_1.INIT=16'hFFEF; // @46:13195 CFG4 un1_rv32i_dec_mnemonic4911 ( .A(rv32i_instr_decoded_4), .B(N_25_mux_1), .C(un1_rv32i_dec_mnemonic4911_6_Z), .D(rv32i_instr_decoded), .Y(un1_rv32i_dec_mnemonic4911_Z) ); defparam un1_rv32i_dec_mnemonic4911.INIT=16'hFBFF; // @46:18188 CFG4 gpr_rs2_rd_valid_iv ( .A(rv32m_dec_gpr_wr_valid_m), .B(rv32i_dec_gpr_rs2_rd_valid_m_3_0), .C(rv32c_dec_gpr_rs2_rd_valid_m), .D(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .Y(gpr_rs2_rd_valid_de) ); defparam gpr_rs2_rd_valid_iv.INIT=16'hFEFA; // @46:16351 CFG2 \rv32c_dec_gpr_wr_sel_6_1_RNO[0] ( .A(un1_instruction_13), .B(N_127), .Y(instruction_m_5[7]) ); defparam \rv32c_dec_gpr_wr_sel_6_1_RNO[0] .INIT=4'h1; // @46:18099 CFG2 case_dec_gpr_rs2_rd_sel_0_sqmuxa ( .A(rv32i_instr_decoded), .B(mnemonic538_Z), .Y(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z) ); defparam case_dec_gpr_rs2_rd_sel_0_sqmuxa.INIT=4'h8; // @46:13195 CFG3 \immediate_0_RNO[18] ( .A(ifu_expipe_resp_ireg_net[18]), .B(rv32i_dec_mnemonic4913), .C(un1_instruction), .Y(instruction_m_1[18]) ); defparam \immediate_0_RNO[18] .INIT=8'hA8; // @46:13195 CFG2 \immediate_0_RNO[22] ( .A(un1_instruction), .B(ifu_expipe_resp_ireg_net[22]), .Y(instruction_m_2[22]) ); defparam \immediate_0_RNO[22] .INIT=4'h8; // @46:15460 CFG3 \rv32c_dec_immediate_2_iv_RNO[8] ( .A(rv32c_dec_mnemonic2112), .B(N_123), .C(N_130_i_Z), .Y(instruction_m_5[9]) ); defparam \rv32c_dec_immediate_2_iv_RNO[8] .INIT=8'h32; // @46:8291 CFG2 de_ex_pipe_implicit_pseudo_instr_ex_2 ( .A(force_debug_nop_de_1z), .B(un1_implicit_pseudo_instr_de), .Y(de_ex_pipe_implicit_pseudo_instr_ex_2_1z) ); defparam de_ex_pipe_implicit_pseudo_instr_ex_2.INIT=4'hE; // @46:15460 CFG4 \gpr_rs1_rd_sel_1_iv_RNO[1] ( .A(un1_instruction_27_1z), .B(N_125), .C(un1_rv32c_dec_mnemonic2112_2_Z), .D(un1_rv32c_dec_mnemonic2115_3_Z), .Y(instruction_m_0[8]) ); defparam \gpr_rs1_rd_sel_1_iv_RNO[1] .INIT=16'h3323; // @46:9986 CFG4 \gpr_wr_data_retr_3_2[15] ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(lsu_expipe_resp_rd_data_net[15]), .D(cpu_debug_csr_op_rd_data_net[15]), .Y(gpr_wr_data_retr_2[15]) ); defparam \gpr_wr_data_retr_3_2[15] .INIT=16'hA820; // @46:18188 CFG4 bcu_op_sel_iv_0 ( .A(un1_debug_exit_Z), .B(N_24_mux), .C(N_25_mux_1), .D(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .Y(bcu_op_sel_iv_0_Z) ); defparam bcu_op_sel_iv_0.INIT=16'hBFAA; // @46:13195 CFG4 \rv32i_dec_gpr_wr_valid_cnst.m19 ( .A(N_129_i), .B(N_115_i), .C(rv32i_dec_alu_op_sel_0_a5_2_0_Z[2]), .D(N_17_0), .Y(N_20) ); defparam \rv32i_dec_gpr_wr_valid_cnst.m19 .INIT=16'h2A7F; // @46:9986 CFG4 gpr_wr_valid_retr_3_0 ( .A(gpr_wr_valid_retr_0), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .C(N_767), .D(start_m1_e_1), .Y(gpr_wr_valid_retr) ); defparam gpr_wr_valid_retr_3_0.INIT=16'hC0E2; // @46:13195 CFG4 \rv32i_dec_gpr_rs1_rd_valid.m28 ( .A(N_19_2), .B(N_129_i), .C(N_19_1), .D(N_28_0), .Y(N_29_0) ); defparam \rv32i_dec_gpr_rs1_rd_valid.m28 .INIT=16'hCD01; // @46:9986 CFG4 \gpr_wr_data_retr_3_2[3] ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(lsu_expipe_resp_rd_data_net[3]), .D(cpu_debug_csr_op_rd_data_net[3]), .Y(gpr_wr_data_retr_2[3]) ); defparam \gpr_wr_data_retr_3_2[3] .INIT=16'hA820; // @46:14888 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4958_2 ( .A(ifu_expipe_resp_ireg_net[30]), .B(ifu_expipe_resp_ireg_net[22]), .C(ifu_expipe_resp_ireg_net[27]), .D(ifu_expipe_resp_ireg_net[31]), .Y(rv32i_dec_mnemonic4958_2) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4958_2 .INIT=16'h0020; // @46:14960 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4960_1 ( .A(ifu_expipe_resp_ireg_net[30]), .B(ifu_expipe_resp_ireg_net[22]), .C(N_117_i), .D(ifu_expipe_resp_ireg_net[31]), .Y(rv32i_dec_mnemonic4960_1) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4960_1 .INIT=16'h0004; // @46:15460 CFG4 \rv32c_dec_immediate_1_iv_0[2] ( .A(N_129_i), .B(N_123), .C(N_490), .D(un1_instruction_9_Z), .Y(rv32c_dec_immediate_1_iv_0_Z[2]) ); defparam \rv32c_dec_immediate_1_iv_0[2] .INIT=16'hB3A0; // @46:15460 CFG4 \rv32c_dec_immediate_1_iv_2[6] ( .A(rv32c_dec_immediate_1_iv_1_Z[6]), .B(N_499_1), .C(N_127), .D(un1_instruction_9_Z), .Y(rv32c_dec_immediate_1_iv_2_Z[6]) ); defparam \rv32c_dec_immediate_1_iv_2[6] .INIT=16'hAFAE; // @46:15460 CFG4 \rv32c_dec_immediate_0_iv_0[10] ( .A(N_117_i), .B(N_125), .C(N_130_i_Z), .D(un1_instruction_8_Z), .Y(rv32c_dec_immediate_0_iv_0_Z[10]) ); defparam \rv32c_dec_immediate_0_iv_0[10] .INIT=16'hBA30; // @46:13195 CFG4 \rv32i_dec_immediate_1_iv_0_0[3] ( .A(N_121_i), .B(ifu_expipe_resp_ireg_net[18]), .C(N_482_2), .D(un1_instruction_7_i), .Y(rv32i_dec_immediate_1_iv_0_0_Z[3]) ); defparam \rv32i_dec_immediate_1_iv_0_0[3] .INIT=16'hECA0; // @46:15460 CFG4 \rv32c_dec_immediate_2_iv_1[7] ( .A(rv32c_dec_mnemonic2112), .B(rv32c_dec_immediate_2_iv_0_Z[7]), .C(N_125), .D(un1_instruction_9_Z), .Y(rv32c_dec_immediate_2_iv_1_Z[7]) ); defparam \rv32c_dec_immediate_2_iv_1[7] .INIT=16'hCFCE; // @46:14761 CFG4 \gen_decode_rv32c.un1_instruction_19_1_0 ( .A(N_123), .B(N_125), .C(N_127), .D(N_119_i), .Y(un1_instruction_19_1_0) ); defparam \gen_decode_rv32c.un1_instruction_19_1_0 .INIT=16'h0080; // @46:8164 CFG4 instr_valid_de_2 ( .A(lsu_flush_1z), .B(un1_implicit_pseudo_instr_de), .C(N_108_0), .D(force_debug_nop_de_1z), .Y(instr_valid_de_2_Z) ); defparam instr_valid_de_2.INIT=16'hFFCD; // @46:18188 CFG3 \sw_csr_addr[2] ( .A(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .B(ifu_expipe_resp_ireg_net[22]), .C(un1_instruction_33_i), .Y(sw_csr_addr_de[2]) ); defparam \sw_csr_addr[2] .INIT=8'h80; // @46:9236 CFG3 \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_sel_ex_2_0[2] ( .A(ifu_expipe_resp_ireg_net[22]), .B(N_72_0), .C(de_ex_pipe_gpr_rs2_rd_sel_ex_2_0_0[2]), .Y(de_ex_pipe_gpr_rs2_rd_sel_ex_2[2]) ); defparam \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_sel_ex_2_0[2] .INIT=8'hF8; // @46:12789 CFG4 un1_instruction_valid ( .A(un1_debug_exit_Z), .B(N_108_0), .C(ifu_expipe_resp_access_misalign_error_i_1), .D(ifu_expipe_resp_access_mem_error_net), .Y(un1_instruction_valid_i) ); defparam un1_instruction_valid.INIT=16'hAAAB; // @46:12789 CFG4 mnemonic538 ( .A(un1_debug_exit_Z), .B(N_108_0), .C(ifu_expipe_resp_access_misalign_error_i_1), .D(ifu_expipe_resp_access_mem_error_net), .Y(mnemonic538_Z) ); defparam mnemonic538.INIT=16'h0001; // @46:13195 CFG3 \immediate_0_RNO[17] ( .A(ifu_expipe_resp_ireg_net[17]), .B(rv32i_dec_mnemonic4913), .C(un1_instruction), .Y(instruction_m_1[17]) ); defparam \immediate_0_RNO[17] .INIT=8'hA8; // @46:13195 CFG2 \immediate_0_RNO[20] ( .A(un1_instruction), .B(ifu_expipe_resp_ireg_net[20]), .Y(instruction_m_3[20]) ); defparam \immediate_0_RNO[20] .INIT=4'h8; // @46:13195 CFG3 \immediate_0_RNO[19] ( .A(ifu_expipe_resp_ireg_net[19]), .B(rv32i_dec_mnemonic4913), .C(un1_instruction), .Y(instruction_m_1[19]) ); defparam \immediate_0_RNO[19] .INIT=8'hA8; // @46:18188 CFG2 \sw_csr_addr_1[1] ( .A(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .B(ifu_expipe_resp_ireg_net[21]), .Y(sw_csr_addr_de_1_0) ); defparam \sw_csr_addr_1[1] .INIT=4'h8; // @46:14564 CFG2 \gen_decode_rv32i.rv32i_dec_mnemonic4949_16 ( .A(ifu_expipe_resp_ireg_net[24]), .B(ifu_expipe_resp_ireg_net[23]), .Y(rv32i_dec_mnemonic4949_i_16) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4949_16 .INIT=4'h1; // @46:9986 CFG4 \gpr_wr_data_retr_2_1[14] ( .A(N_194), .B(N_246), .C(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .D(lsu_expipe_resp_rd_data_sn_N_9_mux), .Y(N_818_1) ); defparam \gpr_wr_data_retr_2_1[14] .INIT=16'h0A0C; // @46:9986 CFG4 \gpr_wr_data_retr_2_1[12] ( .A(N_192), .B(N_244), .C(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .D(lsu_expipe_resp_rd_data_sn_N_9_mux), .Y(N_816_1) ); defparam \gpr_wr_data_retr_2_1[12] .INIT=16'h0A0C; // @46:9986 CFG4 \gpr_wr_data_retr_2_1[8] ( .A(N_188), .B(N_240), .C(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .D(lsu_expipe_resp_rd_data_sn_N_9_mux), .Y(N_812_1) ); defparam \gpr_wr_data_retr_2_1[8] .INIT=16'h0A0C; // @46:9986 CFG4 \gpr_wr_data_retr_3[15] ( .A(ex_retr_pipe_exu_result_retr[15]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .D(gpr_wr_data_retr_2[15]), .Y(gpr_wr_data_retr[15]) ); defparam \gpr_wr_data_retr_3[15] .INIT=16'hFF08; // @46:18188 CFG4 de_ex_pipe_illegal_instr_ex_2_RNO ( .A(rv32i_dec_mnemonic4958), .B(trace_priv_i), .C(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .D(rv32i_instr_decoded), .Y(rv32i_dec_illegal_instr_m) ); defparam de_ex_pipe_illegal_instr_ex_2_RNO.INIT=16'h2070; // @46:9986 CFG4 \gpr_wr_data_retr_3_2[5] ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(lsu_expipe_resp_rd_data_net[5]), .D(cpu_debug_csr_op_rd_data_net[5]), .Y(gpr_wr_data_retr_2[5]) ); defparam \gpr_wr_data_retr_3_2[5] .INIT=16'hA820; // @46:9986 CFG4 \gpr_wr_data_retr_3[3] ( .A(ex_retr_pipe_exu_result_retr[3]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .D(gpr_wr_data_retr_2[3]), .Y(gpr_wr_data_retr[3]) ); defparam \gpr_wr_data_retr_3[3] .INIT=16'hFF08; // @46:14888 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4958_7 ( .A(ifu_expipe_resp_ireg_net[23]), .B(ifu_expipe_resp_ireg_net[25]), .C(ifu_expipe_resp_ireg_net[26]), .D(ifu_expipe_resp_ireg_net[28]), .Y(rv32i_dec_mnemonic4958_7) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4958_7 .INIT=16'h0400; // @46:14924 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4959_4 ( .A(ifu_expipe_resp_ireg_net[27]), .B(ifu_expipe_resp_ireg_net[29]), .C(ifu_expipe_resp_ireg_net[22]), .D(ifu_expipe_resp_ireg_net[30]), .Y(rv32i_dec_mnemonic4959_4) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4959_4 .INIT=16'h0004; // @46:13195 CFG4 \rv32i_dec_immediate_1_iv_0_0[1] ( .A(ifu_expipe_resp_ireg_net[16]), .B(N_125), .C(N_482_2), .D(un1_instruction_7_i), .Y(rv32i_dec_immediate_1_iv_0_0_Z[1]) ); defparam \rv32i_dec_immediate_1_iv_0_0[1] .INIT=16'hBA30; // @46:13195 CFG4 \rv32i_dec_immediate_1_iv_0_0[4] ( .A(N_119_i), .B(ifu_expipe_resp_ireg_net[19]), .C(N_482_2), .D(un1_instruction_7_i), .Y(rv32i_dec_immediate_1_iv_0_0_Z[4]) ); defparam \rv32i_dec_immediate_1_iv_0_0[4] .INIT=16'hECA0; // @46:13195 CFG4 \rv32i_dec_immediate_1_iv_0_0[2] ( .A(ifu_expipe_resp_ireg_net[17]), .B(N_123), .C(N_482_2), .D(un1_instruction_7_i), .Y(rv32i_dec_immediate_1_iv_0_0_Z[2]) ); defparam \rv32i_dec_immediate_1_iv_0_0[2] .INIT=16'hBA30; // @46:13195 CFG4 \rv32i_dec_immediate_1_iv_0[11] ( .A(ifu_expipe_resp_ireg_net[20]), .B(N_127), .C(rv32i_dec_mnemonic4913), .D(un1_instruction_15_i), .Y(rv32i_dec_immediate_1_iv_0_Z[11]) ); defparam \rv32i_dec_immediate_1_iv_0[11] .INIT=16'hB3A0; // @46:14816 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4956_5 ( .A(ifu_expipe_resp_ireg_net[28]), .B(N_117_i), .C(ifu_expipe_resp_ireg_net[20]), .D(ifu_expipe_resp_ireg_net[29]), .Y(rv32i_dec_mnemonic4956_5) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4956_5 .INIT=16'h0001; // @46:14564 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4949_25_2 ( .A(ifu_expipe_resp_ireg_net[16]), .B(ifu_expipe_resp_ireg_net[17]), .C(N_289_i), .D(N_121_i), .Y(rv32i_dec_mnemonic4949_25_2) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4949_25_2 .INIT=16'h0001; // @46:14609 CFG4 \gen_decode_rv32i.un291_rv32i_dec_sw_csr_wr_op ( .A(ifu_expipe_resp_ireg_net[16]), .B(un291_rv32i_dec_sw_csr_wr_op_0), .C(ifu_expipe_resp_ireg_net[19]), .D(ifu_expipe_resp_ireg_net[17]), .Y(un291_rv32i_dec_sw_csr_wr_op) ); defparam \gen_decode_rv32i.un291_rv32i_dec_sw_csr_wr_op .INIT=16'h0004; // @46:18188 CFG3 \gpr_wr_sel_1_iv_RNO_0[0] ( .A(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .B(N_127), .C(un1_rv32i_dec_mnemonic4915_1_Z), .Y(rv32i_dec_gpr_wr_sel_m[0]) ); defparam \gpr_wr_sel_1_iv_RNO_0[0] .INIT=8'h02; // @46:18188 CFG3 \gpr_wr_sel_1_iv_RNO[3] ( .A(un1_rv32i_dec_mnemonic4915_1_Z), .B(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .C(N_121_i), .Y(rv32i_dec_gpr_wr_sel_m[3]) ); defparam \gpr_wr_sel_1_iv_RNO[3] .INIT=8'h40; // @46:18188 CFG3 \sw_csr_addr[3] ( .A(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .B(ifu_expipe_resp_ireg_net[23]), .C(un1_instruction_33_i), .Y(sw_csr_addr_de[3]) ); defparam \sw_csr_addr[3] .INIT=8'h80; // @46:14761 CFG4 \gen_decode_rv32c.un1_instruction_19 ( .A(N_131_i), .B(N_121_i), .C(un1_instruction_19_1_0), .D(un1_instruction_14_3), .Y(un1_instruction_19) ); defparam \gen_decode_rv32c.un1_instruction_19 .INIT=16'h1000; // @46:18188 CFG3 \sw_csr_addr[0] ( .A(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .B(ifu_expipe_resp_ireg_net[20]), .C(un1_instruction_33_i), .Y(sw_csr_addr_de[0]) ); defparam \sw_csr_addr[0] .INIT=8'h80; // @46:15793 CFG4 \gen_decode_rv32c.un1_instruction_15 ( .A(N_123), .B(N_125), .C(N_127), .D(un1_instruction_15_2), .Y(un1_instruction_15_Z) ); defparam \gen_decode_rv32c.un1_instruction_15 .INIT=16'h2000; // @46:14564 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4949_24 ( .A(ifu_expipe_resp_ireg_net[21]), .B(ifu_expipe_resp_ireg_net[24]), .C(ifu_expipe_resp_ireg_net[22]), .D(ifu_expipe_resp_ireg_net[23]), .Y(rv32i_dec_mnemonic4949_i_24) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4949_24 .INIT=16'h0001; // @46:13195 CFG3 \rv32i_dec_gpr_wr_valid_cnst.m25 ( .A(N_20), .B(N_137_i), .C(i18_mux), .Y(N_26_0) ); defparam \rv32i_dec_gpr_wr_valid_cnst.m25 .INIT=8'hD1; // @46:13195 CFG3 \rv32i_dec_immediate_2_iv[16] ( .A(N_482_1), .B(ifu_expipe_resp_ireg_net[16]), .C(instruction_m_0[31]), .Y(rv32i_dec_immediate[16]) ); defparam \rv32i_dec_immediate_2_iv[16] .INIT=8'hF8; // @46:14609 CFG2 \gen_decode_rv32i.un83_rv32i_dec_gpr_wr_valid ( .A(un1_instruction_19_1_0), .B(N_121_i), .Y(un83_rv32i_dec_gpr_wr_valid) ); defparam \gen_decode_rv32i.un83_rv32i_dec_gpr_wr_valid .INIT=4'h2; // @46:18188 CFG3 \sw_csr_addr[4] ( .A(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .B(ifu_expipe_resp_ireg_net[24]), .C(un1_instruction_33_i), .Y(sw_csr_addr_de[4]) ); defparam \sw_csr_addr[4] .INIT=8'h80; // @46:18188 CFG3 \sw_csr_addr[1] ( .A(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .B(ifu_expipe_resp_ireg_net[21]), .C(un1_instruction_33_i), .Y(sw_csr_addr_de[1]) ); defparam \sw_csr_addr[1] .INIT=8'h80; // @46:9756 CFG3 un1_instr_completing_retr_c_RNI21GQO6 ( .A(stage_state_retr), .B(instr_completing_retr), .C(instr_accepted_retr_2), .Y(un1_next_stage_state_retr_i_0) ); defparam un1_instr_completing_retr_c_RNI21GQO6.INIT=8'hF2; // @46:9986 CFG4 \gpr_wr_data_retr_3_2[13] ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(lsu_expipe_resp_rd_data_net[13]), .D(cpu_debug_csr_op_rd_data_net[13]), .Y(gpr_wr_data_retr_2[13]) ); defparam \gpr_wr_data_retr_3_2[13] .INIT=16'hA820; // @46:9986 CFG3 \gpr_wr_data_retr_2[14] ( .A(N_818_1), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(cpu_debug_csr_op_rd_data_net[14]), .Y(N_818) ); defparam \gpr_wr_data_retr_2[14] .INIT=8'hEA; // @46:9986 CFG3 \gpr_wr_data_retr_2[12] ( .A(N_816_1), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(cpu_debug_csr_op_rd_data_net[12]), .Y(N_816) ); defparam \gpr_wr_data_retr_2[12] .INIT=8'hEA; // @46:9986 CFG3 \gpr_wr_data_retr_2[8] ( .A(N_812_1), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(cpu_debug_csr_op_rd_data_net[8]), .Y(N_812) ); defparam \gpr_wr_data_retr_2[8] .INIT=8'hEA; // @46:9986 CFG4 \gpr_wr_data_retr_3_2[21] ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(lsu_expipe_resp_rd_data_net[21]), .D(cpu_debug_csr_op_rd_data_net[21]), .Y(gpr_wr_data_retr_2[21]) ); defparam \gpr_wr_data_retr_3_2[21] .INIT=16'hA820; // @46:9986 CFG4 \gpr_wr_data_retr_3_2[20] ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(lsu_expipe_resp_rd_data_net[20]), .D(cpu_debug_csr_op_rd_data_net[20]), .Y(gpr_wr_data_retr_2[20]) ); defparam \gpr_wr_data_retr_3_2[20] .INIT=16'hA820; // @46:9986 CFG4 \gpr_wr_data_retr_3_2[24] ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(lsu_expipe_resp_rd_data_net[24]), .D(cpu_debug_csr_op_rd_data_net[24]), .Y(gpr_wr_data_retr_2[24]) ); defparam \gpr_wr_data_retr_3_2[24] .INIT=16'hA820; // @46:9986 CFG4 \gpr_wr_data_retr_3_2[26] ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(lsu_expipe_resp_rd_data_net[26]), .D(cpu_debug_csr_op_rd_data_net[26]), .Y(gpr_wr_data_retr_2[26]) ); defparam \gpr_wr_data_retr_3_2[26] .INIT=16'hA820; // @46:9986 CFG4 \gpr_wr_data_retr_3_2[19] ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(lsu_expipe_resp_rd_data_net[19]), .D(cpu_debug_csr_op_rd_data_net[19]), .Y(gpr_wr_data_retr_2[19]) ); defparam \gpr_wr_data_retr_3_2[19] .INIT=16'hA820; // @46:9986 CFG4 \gpr_wr_data_retr_3_2[25] ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(lsu_expipe_resp_rd_data_net[25]), .D(cpu_debug_csr_op_rd_data_net[25]), .Y(gpr_wr_data_retr_2[25]) ); defparam \gpr_wr_data_retr_3_2[25] .INIT=16'hA820; // @46:9986 CFG4 \gpr_wr_data_retr_3_2[17] ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(lsu_expipe_resp_rd_data_net[17]), .D(cpu_debug_csr_op_rd_data_net[17]), .Y(gpr_wr_data_retr_2[17]) ); defparam \gpr_wr_data_retr_3_2[17] .INIT=16'hA820; // @46:9986 CFG4 \gpr_wr_data_retr_3_2[27] ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(lsu_expipe_resp_rd_data_net[27]), .D(cpu_debug_csr_op_rd_data_net[27]), .Y(gpr_wr_data_retr_2[27]) ); defparam \gpr_wr_data_retr_3_2[27] .INIT=16'hA820; // @46:9230 CFG4 \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_valid_ex_2_u ( .A(cpu_debug_gpr_rd_en_net), .B(trace_priv_i), .C(gpr_rs2_rd_valid_de), .D(instr_accepted_ex), .Y(de_ex_pipe_gpr_rs2_rd_valid_ex_2) ); defparam \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_valid_ex_2_u .INIT=16'hB888; // @46:18188 CFG4 \immediate_0[22] ( .A(rv32c_dec_immediate[17]), .B(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .C(instruction_m_2[22]), .D(instruction_m_8[31]), .Y(immediate_de[22]) ); defparam \immediate_0[22] .INIT=16'hBBB8; // @46:18188 CFG4 \immediate_0[18] ( .A(rv32c_dec_immediate[17]), .B(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .C(instruction_m_1[18]), .D(instruction_m_0[31]), .Y(immediate_de[18]) ); defparam \immediate_0[18] .INIT=16'hBBB8; // @46:9514 CFG4 de_ex_pipe_bcu_op_sel_ex_2 ( .A(rv32c_dec_bcu_op_sel), .B(bcu_op_sel_iv_0_Z), .C(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .D(instr_accepted_ex), .Y(de_ex_pipe_bcu_op_sel_ex_2_1z) ); defparam de_ex_pipe_bcu_op_sel_ex_2.INIT=16'hEC00; // @46:9986 CFG4 \gpr_wr_data_retr_3_2[6] ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(lsu_expipe_resp_rd_data_net[6]), .D(cpu_debug_csr_op_rd_data_net[6]), .Y(gpr_wr_data_retr_2[6]) ); defparam \gpr_wr_data_retr_3_2[6] .INIT=16'hA820; // @46:9986 CFG4 \gpr_wr_data_retr_3[5] ( .A(ex_retr_pipe_exu_result_retr[5]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .D(gpr_wr_data_retr_2[5]), .Y(gpr_wr_data_retr[5]) ); defparam \gpr_wr_data_retr_3[5] .INIT=16'hFF08; // @46:15460 CFG4 \rv32c_dec_gpr_wr_sel_2[1] ( .A(N_125), .B(un1_instruction_13), .C(rv32c_dec_gpr_wr_sel_sn_N_7), .D(rv32c_dec_gpr_wr_sel_sn_N_10_mux), .Y(rv32c_dec_gpr_wr_sel_2_Z[1]) ); defparam \rv32c_dec_gpr_wr_sel_2[1] .INIT=16'h5100; // @46:15460 CFG4 \rv32c_dec_gpr_wr_sel_2[2] ( .A(N_123), .B(un1_instruction_13), .C(rv32c_dec_gpr_wr_sel_sn_N_7), .D(rv32c_dec_gpr_wr_sel_sn_N_10_mux), .Y(rv32c_dec_gpr_wr_sel_2_Z[2]) ); defparam \rv32c_dec_gpr_wr_sel_2[2] .INIT=16'h5100; // @46:18188 CFG4 \gpr_rs2_rd_sel_1_iv_0[1] ( .A(case_dec_gpr_rs2_rd_sel_1_sqmuxa_Z), .B(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .C(ifu_expipe_resp_ireg_net[21]), .D(un1_instruction_39), .Y(gpr_rs2_rd_sel_1_iv_0_Z[1]) ); defparam \gpr_rs2_rd_sel_1_iv_0[1] .INIT=16'hE0A0; // @46:18188 CFG4 \gpr_rs2_rd_sel_1_iv_0[0] ( .A(case_dec_gpr_rs2_rd_sel_1_sqmuxa_Z), .B(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .C(ifu_expipe_resp_ireg_net[20]), .D(un1_instruction_39), .Y(gpr_rs2_rd_sel_1_iv_0_Z[0]) ); defparam \gpr_rs2_rd_sel_1_iv_0[0] .INIT=16'hE0A0; // @46:18188 CFG4 \gpr_rs1_rd_sel_1_iv_0[4] ( .A(case_dec_gpr_rs2_rd_sel_1_sqmuxa_Z), .B(ifu_expipe_resp_ireg_net[19]), .C(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .D(un1_rv32i_dec_mnemonic4911_Z), .Y(gpr_rs1_rd_sel_1_iv_0_Z[4]) ); defparam \gpr_rs1_rd_sel_1_iv_0[4] .INIT=16'h88C8; // @46:18188 CFG4 \gpr_wr_sel_1_iv_0[4] ( .A(un1_rv32i_dec_mnemonic4915_1_Z), .B(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .C(N_119_i), .D(case_dec_gpr_rs2_rd_sel_1_sqmuxa_Z), .Y(gpr_wr_sel_1_iv_0_Z[4]) ); defparam \gpr_wr_sel_1_iv_0[4] .INIT=16'hF040; // @46:18188 CFG4 \gpr_rs1_rd_sel_1_iv_0[3] ( .A(case_dec_gpr_rs2_rd_sel_1_sqmuxa_Z), .B(ifu_expipe_resp_ireg_net[18]), .C(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .D(un1_rv32i_dec_mnemonic4911_Z), .Y(gpr_rs1_rd_sel_1_iv_0_Z[3]) ); defparam \gpr_rs1_rd_sel_1_iv_0[3] .INIT=16'h88C8; // @46:18188 CFG4 \gpr_wr_sel_1_iv_0[1] ( .A(case_dec_gpr_rs2_rd_sel_1_sqmuxa_Z), .B(N_125), .C(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .D(un1_rv32i_dec_mnemonic4915_1_Z), .Y(gpr_wr_sel_1_iv_0_Z[1]) ); defparam \gpr_wr_sel_1_iv_0[1] .INIT=16'h2232; // @46:18188 CFG4 \gpr_rs1_rd_sel_1_iv_0[2] ( .A(case_dec_gpr_rs2_rd_sel_1_sqmuxa_Z), .B(ifu_expipe_resp_ireg_net[17]), .C(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .D(un1_rv32i_dec_mnemonic4911_Z), .Y(gpr_rs1_rd_sel_1_iv_0_Z[2]) ); defparam \gpr_rs1_rd_sel_1_iv_0[2] .INIT=16'h88C8; // @46:18188 CFG4 \gpr_rs1_rd_sel_1_iv_0[0] ( .A(un1_rv32i_dec_mnemonic4911_Z), .B(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .C(N_289_i), .D(case_dec_gpr_rs2_rd_sel_1_sqmuxa_Z), .Y(gpr_rs1_rd_sel_1_iv_0_Z[0]) ); defparam \gpr_rs1_rd_sel_1_iv_0[0] .INIT=16'hF040; // @46:18188 CFG4 \gpr_rs1_rd_sel_1_iv_0[1] ( .A(case_dec_gpr_rs2_rd_sel_1_sqmuxa_Z), .B(ifu_expipe_resp_ireg_net[16]), .C(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .D(un1_rv32i_dec_mnemonic4911_Z), .Y(gpr_rs1_rd_sel_1_iv_0_Z[1]) ); defparam \gpr_rs1_rd_sel_1_iv_0[1] .INIT=16'h88C8; // @46:18188 CFG4 \gpr_wr_sel_1_iv_0[2] ( .A(case_dec_gpr_rs2_rd_sel_1_sqmuxa_Z), .B(N_123), .C(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .D(un1_rv32i_dec_mnemonic4915_1_Z), .Y(gpr_wr_sel_1_iv_0_Z[2]) ); defparam \gpr_wr_sel_1_iv_0[2] .INIT=16'h2232; // @46:13195 CFG4 \rv32i_dec_gpr_rs1_rd_valid.m35_0 ( .A(rv32i_dec_mnemonic4948), .B(N_154), .C(rv32i_dec_mnemonic4959), .D(N_29_0), .Y(m35_0) ); defparam \rv32i_dec_gpr_rs1_rd_valid.m35_0 .INIT=16'h0105; // @46:14888 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4958_8 ( .A(rv32i_dec_mnemonic4958_2), .B(rv32i_dec_mnemonic4957_0), .C(ifu_expipe_resp_ireg_net[24]), .D(ifu_expipe_resp_ireg_net[29]), .Y(rv32i_dec_mnemonic4958_8) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4958_8 .INIT=16'h8000; // @46:14924 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4959_6 ( .A(rv32i_dec_mnemonic4959_4), .B(rv32i_dec_mnemonic4959_3), .C(ifu_expipe_resp_ireg_net[20]), .D(ifu_expipe_resp_ireg_net[28]), .Y(rv32i_dec_mnemonic4959_6) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4959_6 .INIT=16'h0800; // @46:14960 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4960_5 ( .A(ifu_expipe_resp_ireg_net[21]), .B(ifu_expipe_resp_ireg_net[28]), .C(rv32i_dec_mnemonic4960_1), .D(rv32i_dec_alu_op_sel_m_0_2), .Y(rv32i_dec_mnemonic4960_5) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4960_5 .INIT=16'h4000; // @46:14888 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4958_1_0_2 ( .A(N_129_i), .B(ifu_expipe_resp_ireg_net[21]), .C(rv32i_dec_mnemonic4948_i_15), .D(rv32i_dec_alu_op_sel_0_a5_2_0_Z[2]), .Y(rv32i_dec_mnemonic4958_1_0_2) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4958_1_0_2 .INIT=16'h8000; // @46:14852 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4957_1_0_2 ( .A(N_129_i), .B(ifu_expipe_resp_ireg_net[20]), .C(rv32i_dec_mnemonic4948_i_15), .D(rv32i_dec_alu_op_sel_0_a5_2_0_Z[2]), .Y(rv32i_dec_mnemonic4957_1_0_2) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4957_1_0_2 .INIT=16'h8000; // @46:13195 CFG4 \rv32i_dec_immediate_1_iv[11] ( .A(un1_instruction_14_i), .B(ifu_expipe_resp_ireg_net[31]), .C(rv32i_dec_immediate_1_iv_0_Z[11]), .D(un1_instruction_38_i), .Y(rv32i_dec_immediate[11]) ); defparam \rv32i_dec_immediate_1_iv[11] .INIT=16'hFCF8; // @46:9682 CFG3 un8_lsu_req_valid ( .A(de_ex_pipe_fence_ex), .B(ex_retr_pipe_fence_i_retr_2_1z), .C(lsu_req_addr_valid), .Y(un8_lsu_req_valid_Z) ); defparam un8_lsu_req_valid.INIT=8'hFE; // @46:14564 CFG2 \gen_decode_rv32i.rv32i_dec_mnemonic4949_25 ( .A(rv32i_dec_mnemonic4949_25_2), .B(un1_instruction_19_1_0), .Y(rv32i_dec_mnemonic4949_i_25) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4949_25 .INIT=4'h8; // @46:13195 CFG4 \rv32i_dec_immediate_1_iv[3] ( .A(rv32i_dec_mnemonic4913), .B(ifu_expipe_resp_ireg_net[23]), .C(N_415), .D(rv32i_dec_immediate_1_iv_0_0_Z[3]), .Y(rv32i_dec_immediate[3]) ); defparam \rv32i_dec_immediate_1_iv[3] .INIT=16'hFFC8; // @46:9542 CFG3 ifu_expipe_req_branch_excpt_req_valid_2 ( .A(un3_branch_cond_ex[1]), .B(instr_inhibit_ex), .C(lsu_req_addr_valid), .Y(N_764) ); defparam ifu_expipe_req_branch_excpt_req_valid_2.INIT=8'h10; // @46:9551 CFG2 un7_bcu_op_completing_ex_0 ( .A(lsu_req_addr_valid), .B(iab_ready), .Y(un7_bcu_op_completing_ex_0_Z) ); defparam un7_bcu_op_completing_ex_0.INIT=4'h8; // @46:15460 CFG2 \gen_decode_rv32c.un1_instruction_19_RNIUJOOA ( .A(rv32c_dec_mnemonic2112), .B(un1_instruction_19), .Y(un1_instruction_19_m) ); defparam \gen_decode_rv32c.un1_instruction_19_RNIUJOOA .INIT=4'h8; // @46:8721 CFG4 \immediate_i_o2_RNIGDF031[24] ( .A(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .B(N_39), .C(ifu_expipe_resp_ireg_net[24]), .D(instruction_m_8[31]), .Y(N_1387_i) ); defparam \immediate_i_o2_RNIGDF031[24] .INIT=16'h3332; // @46:8721 CFG4 \immediate_i_o2_RNIFCF031[24] ( .A(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .B(N_39), .C(ifu_expipe_resp_ireg_net[23]), .D(instruction_m_8[31]), .Y(N_1388_i) ); defparam \immediate_i_o2_RNIFCF031[24] .INIT=16'h3332; // @46:8721 CFG4 \immediate_i_o2_RNIDAF031[24] ( .A(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .B(N_39), .C(ifu_expipe_resp_ireg_net[21]), .D(instruction_m_8[31]), .Y(N_26_i) ); defparam \immediate_i_o2_RNIDAF031[24] .INIT=16'h3332; // @46:9986 CFG4 \gpr_wr_data_retr_3_2[7] ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(lsu_expipe_resp_rd_data_net[7]), .D(cpu_debug_csr_op_rd_data_net[7]), .Y(gpr_wr_data_retr_2[7]) ); defparam \gpr_wr_data_retr_3_2[7] .INIT=16'hA820; // @46:9986 CFG4 \gpr_wr_data_retr_3[13] ( .A(ex_retr_pipe_exu_result_retr[13]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .D(gpr_wr_data_retr_2[13]), .Y(gpr_wr_data_retr[13]) ); defparam \gpr_wr_data_retr_3[13] .INIT=16'hFF08; // @46:9986 CFG4 \gpr_wr_data_retr_3[21] ( .A(ex_retr_pipe_exu_result_retr[21]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .D(gpr_wr_data_retr_2[21]), .Y(gpr_wr_data_retr[21]) ); defparam \gpr_wr_data_retr_3[21] .INIT=16'hFF08; // @46:9986 CFG4 \gpr_wr_data_retr_3[20] ( .A(ex_retr_pipe_exu_result_retr[20]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .D(gpr_wr_data_retr_2[20]), .Y(gpr_wr_data_retr[20]) ); defparam \gpr_wr_data_retr_3[20] .INIT=16'hFF08; // @46:9986 CFG4 \gpr_wr_data_retr_3_2[22] ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(lsu_expipe_resp_rd_data_net[22]), .D(cpu_debug_csr_op_rd_data_net[22]), .Y(gpr_wr_data_retr_2[22]) ); defparam \gpr_wr_data_retr_3_2[22] .INIT=16'hA820; // @46:9986 CFG4 \gpr_wr_data_retr_3_2[16] ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(lsu_expipe_resp_rd_data_net[16]), .D(cpu_debug_csr_op_rd_data_net[16]), .Y(gpr_wr_data_retr_2[16]) ); defparam \gpr_wr_data_retr_3_2[16] .INIT=16'hA820; // @46:9986 CFG4 \gpr_wr_data_retr_3_2[29] ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(lsu_expipe_resp_rd_data_net[29]), .D(cpu_debug_csr_op_rd_data_net[29]), .Y(gpr_wr_data_retr_2[29]) ); defparam \gpr_wr_data_retr_3_2[29] .INIT=16'hA820; // @46:9986 CFG4 \gpr_wr_data_retr_3_2[23] ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(lsu_expipe_resp_rd_data_net[23]), .D(cpu_debug_csr_op_rd_data_net[23]), .Y(gpr_wr_data_retr_2[23]) ); defparam \gpr_wr_data_retr_3_2[23] .INIT=16'hA820; // @46:9986 CFG4 \gpr_wr_data_retr_3[24] ( .A(ex_retr_pipe_exu_result_retr[24]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .D(gpr_wr_data_retr_2[24]), .Y(gpr_wr_data_retr[24]) ); defparam \gpr_wr_data_retr_3[24] .INIT=16'hFF08; // @46:9986 CFG4 \gpr_wr_data_retr_3_2[30] ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(lsu_expipe_resp_rd_data_net[30]), .D(cpu_debug_csr_op_rd_data_net[30]), .Y(gpr_wr_data_retr_2[30]) ); defparam \gpr_wr_data_retr_3_2[30] .INIT=16'hA820; // @46:9986 CFG4 \gpr_wr_data_retr_3[26] ( .A(ex_retr_pipe_exu_result_retr[26]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .D(gpr_wr_data_retr_2[26]), .Y(gpr_wr_data_retr[26]) ); defparam \gpr_wr_data_retr_3[26] .INIT=16'hFF08; // @46:9986 CFG4 \gpr_wr_data_retr_3[19] ( .A(ex_retr_pipe_exu_result_retr[19]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .D(gpr_wr_data_retr_2[19]), .Y(gpr_wr_data_retr[19]) ); defparam \gpr_wr_data_retr_3[19] .INIT=16'hFF08; // @46:9986 CFG4 \gpr_wr_data_retr_3_2[28] ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(lsu_expipe_resp_rd_data_net[28]), .D(cpu_debug_csr_op_rd_data_net[28]), .Y(gpr_wr_data_retr_2[28]) ); defparam \gpr_wr_data_retr_3_2[28] .INIT=16'hA820; // @46:9986 CFG4 \gpr_wr_data_retr_3_2[18] ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(lsu_expipe_resp_rd_data_net[18]), .D(cpu_debug_csr_op_rd_data_net[18]), .Y(gpr_wr_data_retr_2[18]) ); defparam \gpr_wr_data_retr_3_2[18] .INIT=16'hA820; // @46:9986 CFG4 \gpr_wr_data_retr_3_2[31] ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(lsu_expipe_resp_rd_data_net[31]), .D(cpu_debug_csr_op_rd_data_net[31]), .Y(gpr_wr_data_retr_2[31]) ); defparam \gpr_wr_data_retr_3_2[31] .INIT=16'hA820; // @46:9986 CFG4 \gpr_wr_data_retr_3[25] ( .A(ex_retr_pipe_exu_result_retr[25]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .D(gpr_wr_data_retr_2[25]), .Y(gpr_wr_data_retr[25]) ); defparam \gpr_wr_data_retr_3[25] .INIT=16'hFF08; // @46:9986 CFG4 \gpr_wr_data_retr_3[17] ( .A(ex_retr_pipe_exu_result_retr[17]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .D(gpr_wr_data_retr_2[17]), .Y(gpr_wr_data_retr[17]) ); defparam \gpr_wr_data_retr_3[17] .INIT=16'hFF08; // @46:9986 CFG4 \gpr_wr_data_retr_3[27] ( .A(ex_retr_pipe_exu_result_retr[27]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .D(gpr_wr_data_retr_2[27]), .Y(gpr_wr_data_retr[27]) ); defparam \gpr_wr_data_retr_3[27] .INIT=16'hFF08; // @46:18188 CFG4 \immediate_0[17] ( .A(rv32c_dec_immediate[17]), .B(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .C(instruction_m_1[17]), .D(instruction_m_0[31]), .Y(immediate_de[17]) ); defparam \immediate_0[17] .INIT=16'hBBB8; // @46:18188 CFG4 \immediate_0[20] ( .A(rv32c_dec_immediate[17]), .B(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .C(instruction_m_3[20]), .D(instruction_m_8[31]), .Y(immediate_de[20]) ); defparam \immediate_0[20] .INIT=16'hBBB8; // @46:18188 CFG4 \immediate_0[19] ( .A(rv32c_dec_immediate[17]), .B(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .C(instruction_m_1[19]), .D(instruction_m_0[31]), .Y(immediate_de[19]) ); defparam \immediate_0[19] .INIT=16'hBBB8; // @46:9986 CFG4 \gpr_wr_data_retr_3_2[0] ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(lsu_expipe_resp_rd_data_net[0]), .D(cpu_debug_csr_op_rd_data_net[0]), .Y(gpr_wr_data_retr_2[0]) ); defparam \gpr_wr_data_retr_3_2[0] .INIT=16'hA820; // @46:9986 CFG4 \gpr_wr_data_retr_3[6] ( .A(ex_retr_pipe_exu_result_retr[6]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .D(gpr_wr_data_retr_2[6]), .Y(gpr_wr_data_retr[6]) ); defparam \gpr_wr_data_retr_3[6] .INIT=16'hFF08; // @46:15460 CFG4 \rv32c_dec_gpr_wr_sel_6_1[0] ( .A(rv32c_dec_mnemonic1725), .B(rv32c_dec_gpr_wr_sel_sn_N_7), .C(instruction_m_5[7]), .D(rv32c_dec_mnemonic2132), .Y(N_383_1) ); defparam \rv32c_dec_gpr_wr_sel_6_1[0] .INIT=16'h3230; // @46:9557 CFG3 bcu_op_completing_ex_4_a1_0 ( .A(lsu_req_addr_valid), .B(iab_ready), .C(ex_retr_pipe_fence_i_retr_2_1z), .Y(bcu_op_completing_ex_4_a1_0_Z) ); defparam bcu_op_completing_ex_4_a1_0.INIT=8'h80; // @46:15460 CFG4 rv32c_instr_decoded_iv_0 ( .A(un1_instruction_19), .B(un83_rv32i_dec_gpr_wr_valid), .C(rv32c_dec_mnemonic2112), .D(rv32c_dec_mnemonic2130_0), .Y(rv32c_instr_decoded_iv_0_Z) ); defparam rv32c_instr_decoded_iv_0.INIT=16'h7350; // @46:9681 CFG4 lsu_req_valid_6 ( .A(stall_retr_Z), .B(lsu_req_valid_3_Z), .C(un8_lsu_req_valid_Z), .D(un6_lsu_op_complete_ex_Z), .Y(lsu_req_valid_6_Z) ); defparam lsu_req_valid_6.INIT=16'h0040; // @46:14888 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4958_10 ( .A(rv32i_dec_mnemonic4958_7), .B(rv32i_dec_mnemonic4958_8), .C(ifu_expipe_resp_ireg_net[20]), .D(N_117_i), .Y(rv32i_dec_mnemonic4958_10) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4958_10 .INIT=16'h0008; // @46:14852 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4957_2 ( .A(rv32i_dec_mnemonic4957_0), .B(rv32i_dec_mnemonic4948_i_18), .C(N_568_1_0), .D(rv32i_dec_mnemonic4949_i_24), .Y(rv32i_dec_mnemonic4957_2) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4957_2 .INIT=16'h8000; // @46:14816 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4956_8 ( .A(rv32i_dec_mnemonic4949_25_2), .B(rv32i_dec_mnemonic4956_4), .C(un1_instruction_19_1_0), .D(rv32i_dec_shifter_unit_places_3[2]), .Y(rv32i_dec_mnemonic4956_8) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4956_8 .INIT=16'h8000; // @46:18188 CFG4 \sw_csr_wr_op[1] ( .A(un291_rv32i_dec_sw_csr_wr_op), .B(un1_instruction_12_i), .C(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .D(N_527_1), .Y(sw_csr_wr_op_de[1]) ); defparam \sw_csr_wr_op[1] .INIT=16'h5040; // @46:18188 CFG4 \gpr_wr_sel_1_iv[4] ( .A(gpr_wr_sel_1_iv_0_Z[4]), .B(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .C(N_387), .D(rv32c_dec_gpr_wr_sel_sn_N_10_mux), .Y(gpr_wr_sel_de[4]) ); defparam \gpr_wr_sel_1_iv[4] .INIT=16'hEAAA; // @46:18188 CFG4 \gpr_rs1_rd_sel_1_iv[4] ( .A(rv32c_dec_gpr_rs1_rd_sel_tz[4]), .B(N_119_i), .C(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .D(gpr_rs1_rd_sel_1_iv_0_Z[4]), .Y(gpr_rs1_rd_sel_de[4]) ); defparam \gpr_rs1_rd_sel_1_iv[4] .INIT=16'hFF80; // @46:18188 CFG4 \gpr_wr_sel_1_iv[3] ( .A(N_121_i), .B(case_dec_gpr_rs2_rd_sel_1_sqmuxa_Z), .C(rv32i_dec_gpr_wr_sel_m[3]), .D(rv32c_dec_gpr_wr_sel_m[3]), .Y(gpr_wr_sel_de[3]) ); defparam \gpr_wr_sel_1_iv[3] .INIT=16'hFFF8; // @46:13195 CFG4 \rv32i_dec_immediate_1_iv[2] ( .A(rv32i_dec_mnemonic4913), .B(ifu_expipe_resp_ireg_net[22]), .C(N_415), .D(rv32i_dec_immediate_1_iv_0_0_Z[2]), .Y(rv32i_dec_immediate[2]) ); defparam \rv32i_dec_immediate_1_iv[2] .INIT=16'hFFC8; // @46:15460 CFG3 \rv32c_dec_immediate_13_m_1[6] ( .A(un1_instruction_15_Z), .B(un1_instruction_14_Z), .C(rv32c_dec_mnemonic2118), .Y(rv32c_dec_immediate_13_m_1[4]) ); defparam \rv32c_dec_immediate_13_m_1[6] .INIT=8'h20; // @46:13195 CFG4 \rv32i_dec_immediate_1_iv[1] ( .A(rv32i_dec_mnemonic4913), .B(ifu_expipe_resp_ireg_net[21]), .C(N_415), .D(rv32i_dec_immediate_1_iv_0_0_Z[1]), .Y(rv32i_dec_immediate[1]) ); defparam \rv32i_dec_immediate_1_iv[1] .INIT=16'hFFC8; // @46:18188 CFG4 \gpr_rs1_rd_sel_1_iv[3] ( .A(gpr_rs1_rd_sel_1_iv_0_Z[3]), .B(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .C(rv32c_dec_gpr_rs1_rd_sel_0_iv_0_Z[3]), .D(N_398_1), .Y(gpr_rs1_rd_sel_de[3]) ); defparam \gpr_rs1_rd_sel_1_iv[3] .INIT=16'hEEEA; // @46:13195 CFG4 \rv32i_dec_immediate_1_iv[4] ( .A(rv32i_dec_mnemonic4913), .B(ifu_expipe_resp_ireg_net[24]), .C(N_415), .D(rv32i_dec_immediate_1_iv_0_0_Z[4]), .Y(rv32i_dec_immediate[4]) ); defparam \rv32i_dec_immediate_1_iv[4] .INIT=16'hFFC8; // @46:9986 CFG4 \gpr_wr_data_retr_3[8] ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .B(ex_retr_pipe_exu_result_retr[8]), .C(N_812), .D(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .Y(gpr_wr_data_retr[8]) ); defparam \gpr_wr_data_retr_3[8] .INIT=16'hF088; // @46:9986 CFG4 \gpr_wr_data_retr_3[12] ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .B(ex_retr_pipe_exu_result_retr[12]), .C(N_816), .D(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .Y(gpr_wr_data_retr[12]) ); defparam \gpr_wr_data_retr_3[12] .INIT=16'hF088; // @46:9986 CFG4 \gpr_wr_data_retr_3[14] ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .B(ex_retr_pipe_exu_result_retr[14]), .C(N_818), .D(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .Y(gpr_wr_data_retr[14]) ); defparam \gpr_wr_data_retr_3[14] .INIT=16'hF088; // @46:9986 CFG4 \gpr_wr_data_retr_3[7] ( .A(ex_retr_pipe_exu_result_retr[7]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .D(gpr_wr_data_retr_2[7]), .Y(gpr_wr_data_retr[7]) ); defparam \gpr_wr_data_retr_3[7] .INIT=16'hFF08; // @46:9986 CFG4 \gpr_wr_data_retr_3[22] ( .A(ex_retr_pipe_exu_result_retr[22]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .D(gpr_wr_data_retr_2[22]), .Y(gpr_wr_data_retr[22]) ); defparam \gpr_wr_data_retr_3[22] .INIT=16'hFF08; // @46:9986 CFG4 \gpr_wr_data_retr_3[16] ( .A(ex_retr_pipe_exu_result_retr[16]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .D(gpr_wr_data_retr_2[16]), .Y(gpr_wr_data_retr[16]) ); defparam \gpr_wr_data_retr_3[16] .INIT=16'hFF08; // @46:9986 CFG4 \gpr_wr_data_retr_3[29] ( .A(ex_retr_pipe_exu_result_retr[29]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .D(gpr_wr_data_retr_2[29]), .Y(gpr_wr_data_retr[29]) ); defparam \gpr_wr_data_retr_3[29] .INIT=16'hFF08; // @46:9986 CFG4 \gpr_wr_data_retr_3[23] ( .A(ex_retr_pipe_exu_result_retr[23]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .D(gpr_wr_data_retr_2[23]), .Y(gpr_wr_data_retr[23]) ); defparam \gpr_wr_data_retr_3[23] .INIT=16'hFF08; // @46:9986 CFG4 \gpr_wr_data_retr_3[30] ( .A(ex_retr_pipe_exu_result_retr[30]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .D(gpr_wr_data_retr_2[30]), .Y(gpr_wr_data_retr[30]) ); defparam \gpr_wr_data_retr_3[30] .INIT=16'hFF08; // @46:9986 CFG4 \gpr_wr_data_retr_3[28] ( .A(ex_retr_pipe_exu_result_retr[28]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .D(gpr_wr_data_retr_2[28]), .Y(gpr_wr_data_retr[28]) ); defparam \gpr_wr_data_retr_3[28] .INIT=16'hFF08; // @46:9986 CFG4 \gpr_wr_data_retr_3[18] ( .A(ex_retr_pipe_exu_result_retr[18]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .D(gpr_wr_data_retr_2[18]), .Y(gpr_wr_data_retr[18]) ); defparam \gpr_wr_data_retr_3[18] .INIT=16'hFF08; // @46:9986 CFG4 \gpr_wr_data_retr_3[31] ( .A(ex_retr_pipe_exu_result_retr[31]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .D(gpr_wr_data_retr_2[31]), .Y(gpr_wr_data_retr[31]) ); defparam \gpr_wr_data_retr_3[31] .INIT=16'hFF08; // @46:15460 CFG4 \rv32c_dec_immediate_13_m[15] ( .A(N_117_i), .B(N_131_i), .C(rv32c_dec_mnemonic2118), .D(un1_instruction_15_Z), .Y(rv32c_dec_immediate_13_m_Z[15]) ); defparam \rv32c_dec_immediate_13_m[15] .INIT=16'hA0C0; // @46:15460 CFG4 \rv32c_dec_immediate_13_m[16] ( .A(N_117_i), .B(N_129_i), .C(un1_instruction_15_Z), .D(rv32c_dec_mnemonic2118), .Y(rv32c_dec_immediate_13_m_Z[16]) ); defparam \rv32c_dec_immediate_13_m[16] .INIT=16'hAC00; // @46:13195 CFG4 \rv32i_dec_gpr_wr_valid_cnst.m31 ( .A(N_291_i), .B(N_96), .C(un1_instruction_29_1_1z), .D(N_26_0), .Y(rv32i_dec_gpr_wr_valid_cnst) ); defparam \rv32i_dec_gpr_wr_valid_cnst.m31 .INIT=16'hD080; // @46:18188 CFG3 \immediate_0[3] ( .A(rv32i_dec_immediate[3]), .B(rv32c_dec_immediate_Z[3]), .C(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .Y(immediate_de[3]) ); defparam \immediate_0[3] .INIT=8'hCA; // @46:15460 CFG4 \rv32c_dec_immediate_13_m[14] ( .A(N_117_i), .B(N_133_i), .C(rv32c_dec_mnemonic2118), .D(un1_instruction_15_Z), .Y(rv32c_dec_immediate_13_m_Z[14]) ); defparam \rv32c_dec_immediate_13_m[14] .INIT=16'hA0C0; // @46:15460 CFG4 \rv32c_dec_immediate_13_m[12] ( .A(N_117_i), .B(N_137_i), .C(un1_instruction_15_Z), .D(rv32c_dec_mnemonic2118), .Y(rv32c_dec_immediate_13_m_Z[12]) ); defparam \rv32c_dec_immediate_13_m[12] .INIT=16'hAC00; // @46:15460 CFG4 \rv32c_dec_immediate_13_m[13] ( .A(N_117_i), .B(N_291_i), .C(rv32c_dec_mnemonic2118), .D(un1_instruction_15_Z), .Y(rv32c_dec_immediate_13_m_Z[13]) ); defparam \rv32c_dec_immediate_13_m[13] .INIT=16'hA0C0; // @46:9986 CFG4 \gpr_wr_data_retr_3[0] ( .A(ex_retr_pipe_exu_result_retr[0]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .C(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .D(gpr_wr_data_retr_2[0]), .Y(gpr_wr_data_retr[0]) ); defparam \gpr_wr_data_retr_3[0] .INIT=16'hFF08; // @46:15460 CFG3 \rv32c_dec_gpr_wr_sel_6[0] ( .A(N_383_1), .B(N_127), .C(rv32c_dec_gpr_wr_sel_sn_N_7), .Y(N_383) ); defparam \rv32c_dec_gpr_wr_sel_6[0] .INIT=8'hBA; // @46:18188 CFG4 \gen_gpr_ex_attbs_rd_ex.de_ex_pipe_gpr_rs1_rd_valid_ex_2_RNO_1 ( .A(un1_instruction_19_m), .B(un1_instruction_14_m), .C(un83_rv32i_dec_gpr_wr_valid), .D(rv32c_dec_mnemonic2130_0), .Y(rv32c_dec_gpr_rs1_rd_valid_1_m_1) ); defparam \gen_gpr_ex_attbs_rd_ex.de_ex_pipe_gpr_rs1_rd_valid_ex_2_RNO_1 .INIT=16'h0111; // @46:14924 CFG3 \gen_decode_rv32i.rv32i_dec_mnemonic4959_8 ( .A(rv32i_dec_mnemonic4959_6), .B(rv32i_dec_mnemonic4949_i_16), .C(rv32i_dec_mnemonic4959_i_22), .Y(rv32i_dec_mnemonic4959_8) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4959_8 .INIT=8'h80; // @46:14960 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4960_7 ( .A(ifu_expipe_resp_ireg_net[27]), .B(ifu_expipe_resp_ireg_net[29]), .C(rv32i_dec_mnemonic4949_i_16), .D(rv32i_dec_mnemonic4960_5), .Y(rv32i_dec_mnemonic4960_7) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4960_7 .INIT=16'h1000; // @46:9542 CFG4 ex_retr_pipe_fence_i_retr_2_RNIURBE01 ( .A(bcu_m5_i_a4_0_1_1_0), .B(lsu_req_addr_valid), .C(iab_ready), .D(instr_inhibit_ex), .Y(bcu_m5_i_a4_0_1_1) ); defparam ex_retr_pipe_fence_i_retr_2_RNIURBE01.INIT=16'hAABF; // @46:14816 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4956 ( .A(rv32i_dec_mnemonic4948_i_15), .B(rv32i_dec_mnemonic4956_8), .C(rv32i_dec_mnemonic4956_5), .D(rv32i_dec_mnemonic4949_i_24), .Y(rv32i_dec_mnemonic4956) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4956 .INIT=16'h8000; // @46:14888 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4958 ( .A(rv32i_dec_mnemonic4949_25_2), .B(un1_instruction_19_1_0), .C(rv32i_dec_mnemonic4958_1_0_2), .D(rv32i_dec_mnemonic4958_10), .Y(rv32i_dec_mnemonic4958) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4958 .INIT=16'h8000; // @46:13195 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4948 ( .A(rv32i_dec_mnemonic4948_3), .B(rv32i_dec_mnemonic4949_i_25), .C(rv32i_dec_mnemonic4948_i_18), .D(rv32i_dec_mnemonic4948_i_15), .Y(rv32i_dec_mnemonic4948) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4948 .INIT=16'h8000; // @46:14852 CFG3 \gen_decode_rv32i.rv32i_dec_mnemonic4957 ( .A(rv32i_dec_mnemonic4957_2), .B(rv32i_dec_mnemonic4957_1_0_2), .C(rv32i_dec_mnemonic4949_i_25), .Y(rv32i_dec_mnemonic4957) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4957 .INIT=8'h80; // @46:18188 CFG4 \sw_csr_wr_op[0] ( .A(un1_instruction_25_i), .B(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .C(un1_instruction_12_i), .D(un291_rv32i_dec_sw_csr_wr_op), .Y(sw_csr_wr_op_de[0]) ); defparam \sw_csr_wr_op[0] .INIT=16'h88C8; // @46:9236 CFG4 \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_sel_ex_2[0] ( .A(cpu_debug_gpr_op_addr_net[0]), .B(trace_priv_i), .C(gpr_rs2_rd_sel_1_iv_0_Z[0]), .D(rv32c_dec_gpr_rs2_rd_sel_m[0]), .Y(de_ex_pipe_gpr_rs2_rd_sel_ex_2[0]) ); defparam \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_sel_ex_2[0] .INIT=16'hBBB8; // @46:18188 CFG4 \immediate_0[0] ( .A(rv32i_dec_immediate[0]), .B(N_137_i), .C(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .D(rv32c_dec_immediate_tz[0]), .Y(immediate_de[0]) ); defparam \immediate_0[0] .INIT=16'hCA0A; // @46:18188 CFG4 \immediate_0[2] ( .A(rv32i_dec_immediate[2]), .B(rv32c_dec_immediate_1_iv_0_Z[2]), .C(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .D(instruction_m[4]), .Y(immediate_de[2]) ); defparam \immediate_0[2] .INIT=16'hFACA; // @46:18188 CFG4 \immediate_0[1] ( .A(rv32i_dec_immediate[1]), .B(N_291_i), .C(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .D(rv32c_dec_immediate_tz[1]), .Y(immediate_de[1]) ); defparam \immediate_0[1] .INIT=16'hCA0A; // @46:9236 CFG4 \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_sel_ex_2[1] ( .A(cpu_debug_gpr_op_addr_net[1]), .B(trace_priv_i), .C(gpr_rs2_rd_sel_1_iv_0_Z[1]), .D(rv32c_dec_gpr_rs2_rd_sel_m[1]), .Y(de_ex_pipe_gpr_rs2_rd_sel_ex_2[1]) ); defparam \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_sel_ex_2[1] .INIT=16'hBBB8; // @46:18188 CFG4 gpr_wr_valid_iv_RNO_1 ( .A(un83_rv32i_dec_gpr_wr_valid_m_1), .B(un1_instruction_19_m), .C(un1_instruction_14_m), .D(rv32c_dec_gpr_rs1_rd_sel_19_m_1[3]), .Y(rv32c_dec_gpr_wr_valid_m_2) ); defparam gpr_wr_valid_iv_RNO_1.INIT=16'h0001; // @46:18188 CFG4 gpr_rs1_rd_valid_iv_0 ( .A(un1_debug_exit_Z), .B(m35_0), .C(rv32i_instr_decoded_8), .D(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .Y(gpr_rs1_rd_valid_iv_0_Z) ); defparam gpr_rs1_rd_valid_iv_0.INIT=16'hFBAA; // @46:15460 CFG4 rv32c_instr_decoded_iv_2 ( .A(un1_instruction_14_Z), .B(rv32c_dec_mnemonic2118), .C(rv32c_instr_decoded_iv_0_Z), .D(rv32c_dec_mnemonic_m[12]), .Y(rv32c_instr_decoded_iv_2_Z) ); defparam rv32c_instr_decoded_iv_2.INIT=16'hFFF4; // @46:14924 CFG3 \gen_decode_rv32i.rv32i_dec_mnemonic4959 ( .A(rv32i_dec_mnemonic4959_8), .B(rv32i_dec_mnemonic4958_1_0_2), .C(rv32i_dec_mnemonic4949_i_25), .Y(rv32i_dec_mnemonic4959) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4959 .INIT=8'h80; // @46:18188 CFG4 \gpr_wr_sel_1_iv[1] ( .A(rv32c_dec_gpr_wr_sel_2_Z[1]), .B(rv32c_dec_gpr_wr_sel_1_Z[1]), .C(gpr_wr_sel_1_iv_0_Z[1]), .D(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .Y(gpr_wr_sel_de[1]) ); defparam \gpr_wr_sel_1_iv[1] .INIT=16'hFEF0; // @46:18188 CFG4 \gpr_wr_sel_1_iv[2] ( .A(rv32c_dec_gpr_wr_sel_2_Z[2]), .B(rv32c_dec_gpr_wr_sel_1_Z[2]), .C(gpr_wr_sel_1_iv_0_Z[2]), .D(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .Y(gpr_wr_sel_de[2]) ); defparam \gpr_wr_sel_1_iv[2] .INIT=16'hFEF0; // @46:15460 CFG4 \rv32c_dec_immediate_2_iv[8] ( .A(N_133_i), .B(instruction_m_5[9]), .C(instruction_m_5[12]), .D(rv32c_dec_immediate_13_m_1[4]), .Y(rv32c_dec_immediate[8]) ); defparam \rv32c_dec_immediate_2_iv[8] .INIT=16'hFEFC; // @46:15460 CFG4 \rv32c_dec_immediate_2_iv[7] ( .A(N_291_i), .B(instruction_m_3[12]), .C(rv32c_dec_immediate_2_iv_1_Z[7]), .D(rv32c_dec_immediate_13_m_1[4]), .Y(rv32c_dec_immediate[7]) ); defparam \rv32c_dec_immediate_2_iv[7] .INIT=16'hFEFC; // @46:15460 CFG4 \rv32c_dec_immediate_1_iv[5] ( .A(N_489_1), .B(N_137_i), .C(rv32c_dec_immediate_13_m_1[4]), .D(instruction_m_2[12]), .Y(rv32c_dec_immediate[5]) ); defparam \rv32c_dec_immediate_1_iv[5] .INIT=16'hFFC8; // @46:15460 CFG4 \rv32c_dec_immediate_0_iv[10] ( .A(N_117_i), .B(rv32c_dec_immediate_0_iv_0_Z[10]), .C(instruction_m_3[12]), .D(rv32c_dec_immediate_13_m_1[4]), .Y(rv32c_dec_immediate[10]) ); defparam \rv32c_dec_immediate_0_iv[10] .INIT=16'hFEFC; // @46:15460 CFG4 \rv32c_dec_immediate_2_iv[9] ( .A(rv32c_dec_immediate_13_m_Z[9]), .B(N_499_1), .C(N_121_i), .D(instruction_m_5[12]), .Y(rv32c_dec_immediate[9]) ); defparam \rv32c_dec_immediate_2_iv[9] .INIT=16'hFFEA; // @46:8177 CFG4 un7_bcu_op_completing_ex_0_RNIGTKL51 ( .A(instr_inhibit_ex), .B(ifu_m3_a2_0), .C(un7_bcu_op_completing_ex_0_Z), .D(bcu_m5_i_a4_0_1_1_0), .Y(un7_bcu_op_completing_ex_0_RNIGTKL51_Z) ); defparam un7_bcu_op_completing_ex_0_RNIGTKL51.INIT=16'hCC04; // @46:15460 CFG4 \rv32c_dec_immediate_1_iv_1[4] ( .A(un1_instruction_20_Z), .B(N_129_i), .C(rv32c_dec_immediate_13_m_1[4]), .D(un1_rv32c_dec_mnemonic2119_1_i), .Y(rv32c_dec_immediate_1_iv_1_Z[4]) ); defparam \rv32c_dec_immediate_1_iv_1[4] .INIT=16'hCCC8; // @46:9352 CFG4 gpr_rd_rs1_complete_ex_d_1 ( .A(un3_bcu_op_sel_ex_1z), .B(gpr_rd_rs1_complete_ex_d_1_a2_0_Z), .C(gpr_rd_rs1_complete_ex_out), .D(bcu_m5_i_a4_0_1_1), .Y(gpr_rd_rs1_complete_ex_d_1_Z) ); defparam gpr_rd_rs1_complete_ex_d_1.INIT=16'hF5FD; // @46:18188 CFG4 gpr_wr_valid_iv_RNO ( .A(un1_rv32c_dec_mnemonic2114_1_i), .B(rv32c_dec_gpr_wr_valid_m_2), .C(N_117_i), .D(un1_rv32c_dec_mnemonic2119_1_i), .Y(rv32c_dec_gpr_wr_valid_m_4) ); defparam gpr_wr_valid_iv_RNO.INIT=16'h0444; // @46:9542 CFG4 gpr_rd_rs1_complete_ex_s_RNIQR5JU1 ( .A(gpr_rd_rs1_complete_ex_out), .B(bcu_m5_i_a4_0_1_1), .C(ifu_m3_a2_0), .D(bcu_m5_i_a4_0_0), .Y(gpr_rd_rs1_complete_ex_0_s_a2) ); defparam gpr_rd_rs1_complete_ex_s_RNIQR5JU1.INIT=16'h5040; // @46:15460 CFG4 \rv32c_dec_immediate_1_iv[6] ( .A(N_131_i), .B(instruction_m_3[12]), .C(rv32c_dec_immediate_1_iv_2_Z[6]), .D(rv32c_dec_immediate_13_m_1[4]), .Y(rv32c_dec_immediate[6]) ); defparam \rv32c_dec_immediate_1_iv[6] .INIT=16'hFEFC; // @46:18188 CFG4 \gpr_rs1_rd_sel_1_iv[1] ( .A(rv32c_dec_gpr_rs1_rd_sel_0_iv_2_Z[1]), .B(instruction_m_0[8]), .C(gpr_rs1_rd_sel_1_iv_0_Z[1]), .D(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .Y(gpr_rs1_rd_sel_de[1]) ); defparam \gpr_rs1_rd_sel_1_iv[1] .INIT=16'hFEF0; // @46:14960 CFG4 \gen_decode_rv32i.rv32i_dec_mnemonic4960 ( .A(rv32i_dec_mnemonic4949_i_25), .B(rv32i_dec_mnemonic4960_7), .C(rv32i_dec_mnemonic4959_i_22), .D(rv32i_dec_mnemonic4957_1_0_2), .Y(rv32i_dec_mnemonic4960) ); defparam \gen_decode_rv32i.rv32i_dec_mnemonic4960 .INIT=16'h8000; // @46:8717 CFG3 ex_retr_pipe_fence_i_retr_2_RNIVKPOI1 ( .A(un3_branch_cond_ex[0]), .B(bcu_m5_i_a4_0_0), .C(bcu_m5_i_a4_0_1_1), .Y(gpr_N_8_0) ); defparam ex_retr_pipe_fence_i_retr_2_RNIVKPOI1.INIT=8'hA2; // @46:18188 CFG4 \immediate_0[15] ( .A(rv32i_dec_immediate[15]), .B(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .C(rv32c_dec_immediate_13_m_Z[15]), .D(rv32c_dec_immediate_1[12]), .Y(immediate_de[15]) ); defparam \immediate_0[15] .INIT=16'hEEE2; // @46:18188 CFG4 \immediate_0[16] ( .A(rv32i_dec_immediate[16]), .B(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .C(rv32c_dec_immediate_13_m_Z[16]), .D(rv32c_dec_immediate_1[12]), .Y(immediate_de[16]) ); defparam \immediate_0[16] .INIT=16'hEEE2; // @46:18188 CFG4 gpr_wr_valid_iv_RNO_0 ( .A(un1_rv32i_dec_mnemonic4950_1_Z), .B(un83_rv32i_dec_gpr_wr_valid), .C(rv32i_dec_gpr_wr_valid_cnst), .D(case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z), .Y(rv32i_dec_gpr_wr_valid_m) ); defparam gpr_wr_valid_iv_RNO_0.INIT=16'h7200; // @46:18188 CFG4 \immediate_0[14] ( .A(rv32i_dec_immediate[14]), .B(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .C(rv32c_dec_immediate_13_m_Z[14]), .D(rv32c_dec_immediate_1[12]), .Y(immediate_de[14]) ); defparam \immediate_0[14] .INIT=16'hEEE2; // @46:18188 CFG4 \immediate_0[12] ( .A(rv32i_dec_immediate_Z[12]), .B(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .C(rv32c_dec_immediate_13_m_Z[12]), .D(rv32c_dec_immediate_1[12]), .Y(immediate_de[12]) ); defparam \immediate_0[12] .INIT=16'hEEE2; // @46:18188 CFG4 \immediate_0[13] ( .A(rv32i_dec_immediate[13]), .B(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .C(rv32c_dec_immediate_13_m_Z[13]), .D(rv32c_dec_immediate_1[12]), .Y(immediate_de[13]) ); defparam \immediate_0[13] .INIT=16'hEEE2; // @46:18188 CFG4 \gpr_wr_sel_1_iv_RNO[0] ( .A(N_383), .B(N_377), .C(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .D(rv32c_dec_gpr_wr_sel_sn_N_10_mux), .Y(rv32c_dec_gpr_wr_sel_m[0]) ); defparam \gpr_wr_sel_1_iv_RNO[0] .INIT=16'hA0C0; // @46:18188 CFG4 \immediate_0[11] ( .A(rv32i_dec_immediate[11]), .B(rv32c_dec_immediate_13_m_Z[9]), .C(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .D(rv32c_dec_immediate_1[12]), .Y(immediate_de[11]) ); defparam \immediate_0[11] .INIT=16'hFACA; // @46:18188 CFG4 \immediate_0[8] ( .A(rv32i_dec_immediate_tz[5]), .B(ifu_expipe_resp_ireg_net[28]), .C(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .D(rv32c_dec_immediate[8]), .Y(immediate_de[8]) ); defparam \immediate_0[8] .INIT=16'hF808; // @46:18188 CFG4 \immediate_0[7] ( .A(rv32i_dec_immediate_tz[5]), .B(ifu_expipe_resp_ireg_net[27]), .C(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .D(rv32c_dec_immediate[7]), .Y(immediate_de[7]) ); defparam \immediate_0[7] .INIT=16'hF808; // @46:18188 CFG4 \immediate_0[5] ( .A(rv32i_dec_immediate_tz[5]), .B(ifu_expipe_resp_ireg_net[25]), .C(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .D(rv32c_dec_immediate[5]), .Y(immediate_de[5]) ); defparam \immediate_0[5] .INIT=16'hF808; // @46:18188 CFG4 \immediate_0[9] ( .A(rv32i_dec_immediate_tz[5]), .B(ifu_expipe_resp_ireg_net[29]), .C(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .D(rv32c_dec_immediate[9]), .Y(immediate_de[9]) ); defparam \immediate_0[9] .INIT=16'hF808; // @46:18188 CFG4 \immediate_0[10] ( .A(rv32i_dec_immediate_tz[5]), .B(ifu_expipe_resp_ireg_net[30]), .C(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .D(rv32c_dec_immediate[10]), .Y(immediate_de[10]) ); defparam \immediate_0[10] .INIT=16'hF808; // @46:18188 CFG4 \gen_gpr_ex_attbs_rd_ex.de_ex_pipe_gpr_rs1_rd_valid_ex_2_RNO ( .A(rv32c_dec_gpr_rs1_rd_valid_1_m_3), .B(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .C(rv32c_dec_gpr_rs1_rd_valid_1_m_1), .D(rv32c_dec_bcu_op_sel_2), .Y(rv32c_dec_gpr_rs1_rd_valid_1_m) ); defparam \gen_gpr_ex_attbs_rd_ex.de_ex_pipe_gpr_rs1_rd_valid_ex_2_RNO .INIT=16'h0080; // @46:15460 CFG4 rv32c_instr_decoded_iv ( .A(rv32c_dec_mnemonic1881), .B(rv32c_dec_mnemonic2131), .C(un1_rv32c_dec_mnemonic2112_4_i), .D(rv32c_instr_decoded_iv_2_Z), .Y(rv32c_instr_decoded) ); defparam rv32c_instr_decoded_iv.INIT=16'hFF4F; // @46:18188 CFG4 \gpr_wr_sel_1_iv[0] ( .A(case_dec_gpr_rs2_rd_sel_1_sqmuxa_Z), .B(N_127), .C(rv32c_dec_gpr_wr_sel_m[0]), .D(rv32i_dec_gpr_wr_sel_m[0]), .Y(gpr_wr_sel_de[0]) ); defparam \gpr_wr_sel_1_iv[0] .INIT=16'hFFF2; // @46:18188 CFG4 \immediate_0[6] ( .A(rv32i_dec_immediate_tz[5]), .B(ifu_expipe_resp_ireg_net[26]), .C(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .D(rv32c_dec_immediate[6]), .Y(immediate_de[6]) ); defparam \immediate_0[6] .INIT=16'hF808; // @46:18188 CFG4 \immediate_0[4] ( .A(rv32i_dec_immediate[4]), .B(rv32c_dec_immediate_1_iv_0_Z[4]), .C(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z), .D(rv32c_dec_immediate_1_iv_1_Z[4]), .Y(immediate_de[4]) ); defparam \immediate_0[4] .INIT=16'hFACA; // @46:18188 CFG4 gpr_wr_valid_iv ( .A(rv32c_dec_gpr_wr_valid_m_4), .B(rv32m_dec_gpr_wr_valid_m), .C(rv32i_dec_gpr_wr_valid_m), .D(rv32c_dec_gpr_wr_valid_m_1), .Y(gpr_wr_en_de) ); defparam gpr_wr_valid_iv.INIT=16'hFEFC; // @46:18188 CFG2 un1_rv32i_instr_decoded_1 ( .A(rv32c_instr_decoded), .B(rv32i_instr_decoded), .Y(un1_rv32i_instr_decoded_1_Z) ); defparam un1_rv32i_instr_decoded_1.INIT=4'hE; // @46:18099 CFG2 case_dec_gpr_rs2_rd_sel_2_sqmuxa ( .A(rv32c_instr_decoded), .B(mnemonic538_Z), .Y(case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z) ); defparam case_dec_gpr_rs2_rd_sel_2_sqmuxa.INIT=4'h8; // @46:9681 CFG4 lsu_req_valid ( .A(exu_shifter_places_valid), .B(lsu_op_str_ex_Z), .C(lsu_align_result_valid_0), .D(lsu_req_valid_6_Z), .Y(lsu_expipe_req_valid_net) ); defparam lsu_req_valid.INIT=16'hB300; // @46:18188 CFG4 fence_0 ( .A(rv32m_dec_gpr_wr_valid), .B(un1_instruction_valid_i), .C(rv32c_instr_decoded), .D(fence_0_2_Z), .Y(fence_de) ); defparam fence_0.INIT=16'h0400; // @46:18188 CFG2 un1_rv32i_instr_decoded_3 ( .A(un1_rv32i_instr_decoded_1_Z), .B(mnemonic538_Z), .Y(N_14072_i) ); defparam un1_rv32i_instr_decoded_3.INIT=4'h8; // @46:18099 CFG3 case_dec_gpr_rs2_rd_sel_3_sqmuxa ( .A(rv32m_dec_gpr_wr_valid), .B(mnemonic538_Z), .C(un1_rv32i_instr_decoded_1_Z), .Y(case_dec_gpr_rs2_rd_sel_3_sqmuxa_Z) ); defparam case_dec_gpr_rs2_rd_sel_3_sqmuxa.INIT=8'h04; // @46:9188 CFG4 \gen_gpr_ex_attbs_rd_ex.de_ex_pipe_gpr_rs1_rd_valid_ex_2 ( .A(rv32c_dec_gpr_rs1_rd_valid_1_m), .B(instr_accepted_ex), .C(rv32m_dec_gpr_wr_valid_m), .D(gpr_rs1_rd_valid_iv_0_Z), .Y(de_ex_pipe_gpr_rs1_rd_valid_ex_2) ); defparam \gen_gpr_ex_attbs_rd_ex.de_ex_pipe_gpr_rs1_rd_valid_ex_2 .INIT=16'hCCC8; // @46:9663 CFG4 lsu_op_completing_ex_a1_2 ( .A(trace_priv_i), .B(N_64), .C(alloc_req_buff_1_1), .D(cpu_d_req_is_apb), .Y(lsu_op_completing_ex_a1_2_Z) ); defparam lsu_op_completing_ex_a1_2.INIT=16'h4000; // @46:9663 CFG4 lsu_op_completing_ex_1_2_1 ( .A(lsu_flush_1z), .B(alloc_req_buff_1_1), .C(instr_inhibit_ex), .D(alloc_exception), .Y(lsu_op_completing_ex_1_2_1_Z) ); defparam lsu_op_completing_ex_1_2_1.INIT=16'hFEFA; // @46:9663 CFG4 lsu_op_completing_ex_a0_2 ( .A(cpu_d_req_is_apb), .B(trace_priv_i), .C(req_masked[1]), .D(alloc_req_buff_1_1), .Y(lsu_op_completing_ex_a0_2_Z) ); defparam lsu_op_completing_ex_a0_2.INIT=16'h2000; // @46:9557 CFG4 bcu_op_completing_ex_4_a0_2 ( .A(un7_bcu_op_completing_ex_0_Z), .B(exu_result_valid_ex), .C(i_trx_os_buff_ready), .D(trace_priv_i), .Y(bcu_op_completing_ex_4_a0_2_Z) ); defparam bcu_op_completing_ex_4_a0_2.INIT=16'h0080; // @46:9348 CFG2 lsu_op_completing_ex_a0_2_RNI2NRL4 ( .A(lsu_op_completing_ex_a0_2_Z), .B(un3_bcu_op_sel_ex_1z), .Y(gpr_rd_rs3_completing_ex_0_a1_1_0) ); defparam lsu_op_completing_ex_a0_2_RNI2NRL4.INIT=4'h2; // @46:9542 CFG2 ifu_expipe_req_branch_excpt_req_valid_1_0_0 ( .A(exu_result_valid_ex), .B(ifu_expipe_req_branch_excpt_req_valid_1_0_1z), .Y(ifu_expipe_req_branch_excpt_req_valid_1_0_0_1z) ); defparam ifu_expipe_req_branch_excpt_req_valid_1_0_0.INIT=4'h8; // @46:9663 CFG2 lsu_op_completing_ex_a0 ( .A(req_masked[0]), .B(lsu_op_completing_ex_a0_2_Z), .Y(lsu_op_completing_ex_a0_1z) ); defparam lsu_op_completing_ex_a0.INIT=4'h4; // @46:9557 CFG4 bcu_op_completing_ex_4_a0_2_RNI7NNAIO3 ( .A(next_req_fetch_ptr_xx_0), .B(next_req_fetch_ptr_yy_0), .C(un5_N_4_0_i), .D(bcu_op_completing_ex_4_a0_2_Z), .Y(bcu_m8_0) ); defparam bcu_op_completing_ex_4_a0_2_RNI7NNAIO3.INIT=16'h3500; // @46:9444 CFG3 shift_op_complete_ex_a0 ( .A(un6_lsu_op_complete_ex_Z), .B(lsu_op_completing_ex_a0_2_Z), .C(req_masked[0]), .Y(shift_op_complete_ex_a0_Z) ); defparam shift_op_complete_ex_a0.INIT=8'h04; // @46:9664 CFG4 lsu_op_complete_ex_s_s ( .A(un6_lsu_op_complete_ex_Z), .B(lsu_op_completing_ex_1_2_1_Z), .C(lsu_op_completing_ex_a1_2_Z), .D(req_masked[1]), .Y(lsu_op_complete_ex_s_out) ); defparam lsu_op_complete_ex_s_s.INIT=16'hFEEE; // @46:9739 CFG4 ex_retr_exu_res_accept_retr_3 ( .A(instr_completing_ex_6_4_1_0_Z), .B(exu_mux_result34), .C(exu_result_valid_ex), .D(lsu_req_addr_valid), .Y(ex_retr_exu_res_accept_retr_3_1z) ); defparam ex_retr_exu_res_accept_retr_3.INIT=16'hA820; // @46:9557 CFG4 bcu_op_completing_ex_4_a1_0_RNIMAFE4 ( .A(bcu_op_completing_ex_4_a1_0_Z), .B(instr_inhibit_ex), .C(cmp_cond), .D(exu_result_valid_ex), .Y(bcu_op_completing_ex_1) ); defparam bcu_op_completing_ex_4_a1_0_RNIMAFE4.INIT=16'hEFCC; // @46:9546 CFG3 un4_bcu_op_completing_ex_0 ( .A(un18_lsu_op_str_ex_Z), .B(ex_retr_exu_res_accept_retr_3_1z), .C(instr_is_lsu_ldstr_ex_0_0_Z), .Y(un4_bcu_op_completing_ex_0_Z) ); defparam un4_bcu_op_completing_ex_0.INIT=8'hC8; // @46:9340 CFG4 un7_gpr_rd_rs1_completing_ex_0 ( .A(un16_gpr_rd_rs1_completing_ex_1_Z), .B(ex_retr_exu_res_accept_retr_3_1z), .C(de_ex_pipe_operand0_mux_sel_ex_0), .D(un6_alu_op_complete_ex), .Y(un7_gpr_rd_rs1_completing_ex_0_Z) ); defparam un7_gpr_rd_rs1_completing_ex_0.INIT=16'hEEEC; // @46:9966 CFG2 exu_update_result_reg ( .A(ex_retr_exu_res_accept_retr_3_1z), .B(trace_priv_i), .Y(exu_update_result_reg_1z) ); defparam exu_update_result_reg.INIT=4'hE; // @46:9542 CFG4 ifu_expipe_req_branch_excpt_req_valid_3 ( .A(un3_branch_cond_ex[0]), .B(N_764), .C(ifu_expipe_req_branch_excpt_req_valid_1_0_0_1z), .D(cmp_cond), .Y(ifu_expipe_req_branch_excpt_req_valid_net) ); defparam ifu_expipe_req_branch_excpt_req_valid_3.INIT=16'hD888; // @46:9444 CFG4 shift_op_complete_ex_0_1 ( .A(un6_shift_op_complete_ex_Z), .B(instr_inhibit_ex), .C(ex_retr_exu_res_accept_retr_3_1z), .D(un6_lsu_op_complete_ex_Z), .Y(shift_op_complete_ex_0_1_Z) ); defparam shift_op_complete_ex_0_1.INIT=16'hFEEE; // @46:9546 CFG4 instr_is_lsu_ldstr_ex_0_0_RNIDR6AE ( .A(instr_is_lsu_ldstr_ex_0_0_Z), .B(un18_lsu_op_str_ex_Z), .C(ex_retr_exu_res_accept_retr_3_1z), .D(lsu_op_completing_ex_a0_2_Z), .Y(un4_m1_0_a2_0) ); defparam instr_is_lsu_ldstr_ex_0_0_RNIDR6AE.INIT=16'hE000; // @46:9557 CFG4 bcu_op_completing_ex_4_a0_2_RNIKD30T93 ( .A(bcu_m8_0), .B(gen_m3), .C(apb_i_req_addr_net_8), .D(cpu_i_req_is_tcm0_4_2), .Y(bcu_m8_3) ); defparam bcu_op_completing_ex_4_a0_2_RNIKD30T93.INIT=16'h0800; // @46:8717 CFG4 un7_gpr_rd_rs1_completing_ex_0_RNIF8OSC3_0 ( .A(bcu_m5_i_a4_0_1_1), .B(gpr_rd_rs1_complete_ex_out), .C(un7_gpr_rd_rs1_completing_ex_0_Z), .D(gpr_rd_rs1_complete_ex_0_s_a2), .Y(gpr_m7_0_0) ); defparam un7_gpr_rd_rs1_completing_ex_0_RNIF8OSC3_0.INIT=16'h54FC; // @46:9542 CFG2 instr_is_lsu_ldstr_ex_0_0_RNITU5E381 ( .A(req_masked[0]), .B(un4_m1_0_a2_0), .Y(bcu_N_7_0) ); defparam instr_is_lsu_ldstr_ex_0_0_RNITU5E381.INIT=4'h4; // @46:8717 CFG4 un7_gpr_rd_rs1_completing_ex_0_RNIF8OSC3 ( .A(bcu_m5_i_a4_0_1_1), .B(gpr_rd_rs1_complete_ex_out), .C(un7_gpr_rd_rs1_completing_ex_0_Z), .D(gpr_rd_rs1_complete_ex_0_s_a2), .Y(gpr_rd_rs1_complete_ex_0_s_0_2_0) ); defparam un7_gpr_rd_rs1_completing_ex_0_RNIF8OSC3.INIT=16'h54FC; // @46:9348 CFG4 un7_gpr_rd_rs3_completing_ex_0 ( .A(un6_shift_op_complete_ex_Z), .B(un12_gpr_rd_rs3_completing_ex_0_Z), .C(ex_retr_exu_res_accept_retr_3_1z), .D(un6_alu_op_complete_ex), .Y(un7_gpr_rd_rs3_completing_ex_0_Z) ); defparam un7_gpr_rd_rs3_completing_ex_0.INIT=16'hFEF0; // @46:9348 CFG3 un7_m4_0_a2_1 ( .A(cpu_i_req_is_tcm0_5_0), .B(un8_cpu_i_req_is_tcm0lt19_12), .C(cpu_m8_0_a3_0_2), .Y(un7_m4_0_a2_1_Z) ); defparam un7_m4_0_a2_1.INIT=8'h20; // @46:9663 CFG2 lsu_op_completing_ex_a2_0_RNI16EFQ ( .A(cpu_N_6), .B(lsu_op_completing_ex_a2_0_Z), .Y(d_N_7_0) ); defparam lsu_op_completing_ex_a2_0_RNI16EFQ.INIT=4'h4; // @46:8666 CFG2 un7_gpr_rd_rs3_completing_ex_0_RNI7RKA6 ( .A(un7_gpr_rd_rs3_completing_ex_0_Z), .B(gpr_rd_rs3_completing_ex_0_a1_1_0), .Y(instr_m2_e_0) ); defparam un7_gpr_rd_rs3_completing_ex_0_RNI7RKA6.INIT=4'h8; // @46:8717 CFG4 un1_instr_inhibit_ex_RNIMBF6F4 ( .A(bcu_op_completing_ex_2_0_a0_1), .B(un8_cpu_i_req_is_tcm0lt19_12), .C(gpr_rd_rs1_complete_ex_0_s_a0_2), .D(cpu_i_req_is_tcm0_5_0), .Y(gpr_m4_0_a2_2) ); defparam un1_instr_inhibit_ex_RNIMBF6F4.INIT=16'h2000; // @46:9664 CFG4 lsu_op_completing_ex_a2_0_RNIICTDIS3 ( .A(cpu_m8_0_a3_0_2), .B(apb_i_req_addr_net_18), .C(lsu_op_completing_ex_a2_0_Z), .D(cpu_N_6), .Y(lsu_m6_0_a2_2) ); defparam lsu_op_completing_ex_a2_0_RNIICTDIS3.INIT=16'h0020; // @46:9348 CFG4 un7_gpr_rd_rs3_completing_ex_0_RNID4LG01 ( .A(un3_bcu_op_sel_ex_1z), .B(lsu_op_completing_ex_a2_0_Z), .C(cpu_N_6), .D(un7_gpr_rd_rs3_completing_ex_0_Z), .Y(gpr_rd_rs3_completing_ex_0_a0_2) ); defparam un7_gpr_rd_rs3_completing_ex_0_RNID4LG01.INIT=16'h0400; // @46:8717 CFG3 instr_completing_ex_6_4_1 ( .A(gpr_rd_rs2_complete_ex_out), .B(instr_completing_ex_6_4_1_0_Z), .C(un8_gpr_rd_rs2_completing_ex_0_Z), .Y(instr_completing_ex_6_4_1_Z) ); defparam instr_completing_ex_6_4_1.INIT=8'hC8; // @46:9557 CFG4 bcu_op_completing_ex_4_a0_2_RNIU12C5T1 ( .A(un8_cpu_i_req_is_tcm0lt18), .B(bcu_m8_3), .C(bcu_op_completing_ex_4_a0_2_Z), .D(cpu_m1_e_1), .Y(bcu_op_completing_ex_a2_0) ); defparam bcu_op_completing_ex_4_a0_2_RNIU12C5T1.INIT=16'hB0F4; // @46:9348 CFG4 un7_gpr_rd_rs3_completing_ex_0_RNI9RU7D ( .A(lsu_op_complete_ex_s_out), .B(un7_gpr_rd_rs3_completing_ex_0_Z), .C(un3_bcu_op_sel_ex_1z), .D(instr_inhibit_ex), .Y(un7_gpr_rd_rs3_completing_ex_1_2_0) ); defparam un7_gpr_rd_rs3_completing_ex_0_RNI9RU7D.INIT=16'hFF08; // @46:9546 CFG4 un4_bcu_op_completing_ex_0_RNI82T691 ( .A(un4_bcu_op_completing_ex_0_Z), .B(lsu_op_complete_ex_s_out), .C(instr_inhibit_ex), .D(cpu_N_6), .Y(bcu_op_completing_ex_2_1_1_0) ); defparam un4_bcu_op_completing_ex_0_RNI82T691.INIT=16'hF8FA; // @46:9664 CFG4 lsu_op_complete_ex_s_s_RNIQ7RI2T3 ( .A(lsu_m6_0_a2_2), .B(un8_cpu_i_req_is_tcm0lto18_12_1), .C(lsu_op_complete_ex_s_out), .D(cpu_i_req_is_tcm0_5_0), .Y(lsu_N_13_mux) ); defparam lsu_op_complete_ex_s_s_RNIQ7RI2T3.INIT=16'h0200; // @46:9546 CFG4 lsu_op_completing_ex_a2_0_RNID49ST4 ( .A(bcu_op_completing_ex_2_0_a0_1), .B(bcu_op_completing_ex_2_1_1), .C(cpu_m8_0_a3_0_3), .D(cpu_i_req_is_tcm0_5), .Y(bcu_op_completing_ex_2) ); defparam lsu_op_completing_ex_a2_0_RNID49ST4.INIT=16'h4CCC; // @46:9348 CFG4 un7_gpr_rd_rs3_completing_ex_0_RNIAC4V15 ( .A(gpr_rd_rs3_completing_ex_0_a0_2), .B(un7_gpr_rd_rs3_completing_ex_1_2_0), .C(cpu_m8_0_a3_0_3), .D(un7_m4_0_a2_1_Z), .Y(un7_gpr_rd_rs3_completing_ex_1_2_1) ); defparam un7_gpr_rd_rs3_completing_ex_0_RNIAC4V15.INIT=16'hCEEE; // @46:9664 CFG4 lsu_op_complete_ex_s_0 ( .A(lsu_op_complete_ex_s_out), .B(d_N_7_0), .C(cpu_m8_0_a3_0_3), .D(lsu_N_13_mux), .Y(lsu_op_complete_ex_out) ); defparam lsu_op_complete_ex_s_0.INIT=16'h0FEE; // @46:8717 CFG3 lsu_op_complete_ex_s_0_RNIHPCED ( .A(lsu_op_complete_ex_out), .B(gpr_rd_rs1_complete_ex_out), .C(lsu_op_completing_ex_a0_2_Z), .Y(lsu_op_complete_ex_s_0_RNIHPCED_Z) ); defparam lsu_op_complete_ex_s_0_RNIHPCED.INIT=8'h01; // @46:8717 CFG3 instr_completing_ex_6_4_a0 ( .A(lsu_op_complete_ex_out), .B(lsu_op_completing_ex_a0_2_Z), .C(req_masked[0]), .Y(instr_completing_ex_6_4_a0_Z) ); defparam instr_completing_ex_6_4_a0.INIT=8'h51; // @46:8717 CFG4 lsu_op_completing_ex_a2_0_RNIF52NJ6 ( .A(bcu_op_completing_ex_2_1_1), .B(gpr_rd_rs1_complete_ex_0_s_a0_2), .C(cpu_m8_0_a3_0_3), .D(gpr_m4_0_a2_2), .Y(gpr_rd_rs1_complete_ex_0_s_a0_3) ); defparam lsu_op_completing_ex_a2_0_RNIF52NJ6.INIT=16'hE444; // @46:9348 CFG3 un7_gpr_rd_rs3_completing_ex_0_RNI1BODTC1 ( .A(req_masked[0]), .B(un7_gpr_rd_rs3_completing_ex_1_2_1), .C(instr_m2_e_0), .Y(un7_gpr_rd_rs3_completing_ex_1_2) ); defparam un7_gpr_rd_rs3_completing_ex_0_RNI1BODTC1.INIT=8'hDC; // @46:8177 CFG4 un3_bcu_op_sel_ex_RNIEO6RBD1 ( .A(ifu_m3_a0_1), .B(un4_m1_0_a2_0), .C(req_masked[0]), .D(bcu_op_completing_ex_2), .Y(un3_bcu_op_sel_ex_RNIEO6RBD1_Z) ); defparam un3_bcu_op_sel_ex_RNIEO6RBD1.INIT=16'h00A2; // @46:9352 CFG4 gpr_rd_rs1_complete_ex_d_1_a0 ( .A(un3_branch_cond_ex[0]), .B(un3_branch_cond_ex[1]), .C(bcu_op_completing_ex_2), .D(bcu_N_7_0), .Y(gpr_rd_rs1_complete_ex_d_1_a0_Z) ); defparam gpr_rd_rs1_complete_ex_d_1_a0.INIT=16'h1110; // @46:9614 CFG3 de_ex_pipe_lsu_op_ex7 ( .A(lsu_op_completing_ex_a0_1z), .B(instr_accepted_ex), .C(lsu_op_completing_ex_1_0_1z), .Y(de_ex_pipe_lsu_op_ex7_1z) ); defparam de_ex_pipe_lsu_op_ex7.INIT=8'hFE; // @46:9340 CFG4 un7_gpr_rd_rs1_completing_ex_0_0 ( .A(lsu_op_completing_ex_a0_2_Z), .B(un7_gpr_rd_rs1_completing_ex_0_Z), .C(req_masked[0]), .D(lsu_op_complete_ex_out), .Y(un7_gpr_rd_rs1_completing_ex_0_0_Z) ); defparam un7_gpr_rd_rs1_completing_ex_0_0.INIT=16'hCC08; // @46:8717 CFG4 gpr_rd_rs3_complete_ex_0_RNIRG8LR ( .A(gpr_rd_rs1_complete_ex_out), .B(gpr_rd_rs3_complete_ex_0_Z), .C(un7_gpr_rd_rs1_completing_ex_0_Z), .D(lsu_op_complete_ex_s_0_RNIHPCED_Z), .Y(gpr_rd_rs1_complete_ex_0_c_1) ); defparam gpr_rd_rs3_complete_ex_0_RNIRG8LR.INIT=16'h00C8; // @46:9720 CFG4 gpr_rd_rs2_complete_ex_s_RNIP1M9E ( .A(lsu_op_completing_ex_a0_2_Z), .B(lsu_op_complete_ex_out), .C(un3_bcu_op_sel_ex_1z), .D(gpr_rd_rs2_complete_ex_out), .Y(instr_m2_0_a2_4_tz_0_0) ); defparam gpr_rd_rs2_complete_ex_s_RNIP1M9E.INIT=16'h0F0E; // @46:8717 CFG4 lsu_op_complete_ex_s_0_RNI1TBI281 ( .A(gpr_rd_rs1_complete_ex_out), .B(lsu_op_completing_ex_a0_2_Z), .C(req_masked[0]), .D(lsu_op_complete_ex_out), .Y(lsu_op_complete_ex_s_0_RNI1TBI281_Z) ); defparam lsu_op_complete_ex_s_0_RNI1TBI281.INIT=16'h0051; // @46:9354 CFG4 gpr_rd_rs3_complete_ex_s ( .A(req_masked[0]), .B(un7_gpr_rd_rs3_completing_ex_1_2_1), .C(gpr_rd_rs3_complete_ex_0_Z), .D(instr_m2_e_0), .Y(gpr_rd_rs3_complete_ex_out) ); defparam gpr_rd_rs3_complete_ex_s.INIT=16'hFDFC; // @46:9441 CFG4 un7_shift_op_completing_ex ( .A(ex_retr_exu_res_accept_retr_3_1z), .B(un6_lsu_op_complete_ex_Z), .C(lsu_op_completing_ex_a0_1z), .D(lsu_op_completing_ex_1_0_1z), .Y(un7_shift_op_completing_ex_Z) ); defparam un7_shift_op_completing_ex.INIT=16'hBBB8; // @46:8177 CFG4 un7_bcu_op_completing_ex_0_RNINFCC8F1 ( .A(ifu_m1_e_1_0), .B(un7_bcu_op_completing_ex_0_RNIGTKL51_Z), .C(ifu_m1_e_0), .D(un3_bcu_op_sel_ex_RNIEO6RBD1_Z), .Y(ifu_m3_0_2) ); defparam un7_bcu_op_completing_ex_0_RNINFCC8F1.INIT=16'h0020; // @46:9444 CFG4 shift_op_complete_ex_0 ( .A(shift_op_complete_ex_a0_Z), .B(lsu_op_completing_ex_1_0_1z), .C(un6_lsu_op_complete_ex_Z), .D(shift_op_complete_ex_0_1_Z), .Y(shift_op_complete_ex) ); defparam shift_op_complete_ex_0.INIT=16'hFFAE; // @46:8717 CFG4 un7_gpr_rd_rs1_completing_ex_0_RNIRC024I1 ( .A(gpr_m7_0_0), .B(un4_m1_0_a2_0), .C(req_masked[0]), .D(gpr_rd_rs1_complete_ex_0_s_a0_3), .Y(gpr_m7_0_1) ); defparam un7_gpr_rd_rs1_completing_ex_0_RNIRC024I1.INIT=16'h08AA; // @46:8717 CFG4 lsu_op_complete_ex_s_0_RNI1H6UT81 ( .A(gpr_rd_rs1_complete_ex_out), .B(req_masked[0]), .C(lsu_op_complete_ex_out), .D(gpr_rd_rs1_complete_ex_0_c_1), .Y(gpr_rd_rs1_complete_ex_0_c_2) ); defparam lsu_op_complete_ex_s_0_RNI1H6UT81.INIT=16'hFB00; // @46:9720 CFG4 gpr_rd_rs2_complete_ex_s_RNI0GF1D81 ( .A(gpr_rd_rs2_complete_ex_out), .B(req_masked[0]), .C(lsu_op_complete_ex_out), .D(instr_m2_0_a2_4_tz_0_0), .Y(instr_m2_0_a2_2_tz) ); defparam gpr_rd_rs2_complete_ex_s_RNI0GF1D81.INIT=16'hFB00; // @46:9353 CFG4 gpr_rd_rs2_complete_ex_s_RNI8RFS461 ( .A(un3_bcu_op_sel_ex_RNI16R57U3_Z), .B(req_masked[0]), .C(gpr_rd_rs2_complete_ex_out), .D(gpr_rd_rs3_completing_ex_0_a1_1_0), .Y(un7_gpr_rd_rs1_completing_ex_1_0_d_0) ); defparam gpr_rd_rs2_complete_ex_s_RNI8RFS461.INIT=16'hFBFA; // @46:9348 CFG4 un7_gpr_rd_rs3_completing_ex_d_1 ( .A(lsu_op_completing_ex_a0_2_Z), .B(un7_gpr_rd_rs3_completing_ex_0_Z), .C(req_masked[0]), .D(lsu_op_complete_ex_out), .Y(un7_gpr_rd_rs3_completing_ex_d_0) ); defparam un7_gpr_rd_rs3_completing_ex_d_1.INIT=16'hCC08; // @46:8717 CFG4 un7_gpr_rd_rs1_completing_ex_0_RNIRC024I1_0 ( .A(gpr_rd_rs1_complete_ex_0_s_0_2_0), .B(un4_m1_0_a2_0), .C(req_masked[0]), .D(gpr_rd_rs1_complete_ex_0_s_a0_3), .Y(gpr_rd_rs1_complete_ex_0_s_0_2_1) ); defparam un7_gpr_rd_rs1_completing_ex_0_RNIRC024I1_0.INIT=16'h08AA; // @46:9408 CFG3 de_ex_pipe_shifter_unit_op_sel_ex7 ( .A(un7_shift_op_completing_ex_Z), .B(instr_accepted_ex), .C(instr_inhibit_ex), .Y(de_ex_pipe_shifter_unit_op_sel_ex7_1z) ); defparam de_ex_pipe_shifter_unit_op_sel_ex7.INIT=8'hFE; // @46:9720 CFG4 instr_completing_ex_6_4_a0_RNIFMJOM ( .A(shift_op_complete_ex), .B(instr_completing_ex_6_4_a0_Z), .C(ifu_m1_e_0), .D(instr_completing_ex_6_4_1_Z), .Y(instr_m2_0_a2_5_2) ); defparam instr_completing_ex_6_4_a0_RNIFMJOM.INIT=16'h2000; // @46:8666 CFG4 ex_retr_pipe_fence_i_retr_2_RNINNJ0L ( .A(bcu_m5_i_a4_0_0), .B(cpu_i_req_is_dummy_target), .C(un2_cpu_i_req_ready), .D(un3_cpu_i_req_ready), .Y(d_N_5_1) ); defparam ex_retr_pipe_fence_i_retr_2_RNINNJ0L.INIT=16'h0002; // @46:9352 CFG3 gpr_rd_rs1_complete_ex_d_1_a3 ( .A(un3_branch_cond_ex[0]), .B(bcu_m5_i_a4_0_1_1), .C(un1_cpu_i_req_ready), .Y(gpr_rd_rs1_complete_ex_d_1_a3_Z) ); defparam gpr_rd_rs1_complete_ex_d_1_a3.INIT=8'h20; // @46:8717 CFG3 un7_gpr_rd_rs3_completing_ex_0_RNIURTKGF1 ( .A(bcu_m5_i_a4_0_1_1), .B(gpr_N_8_0), .C(un7_gpr_rd_rs3_completing_ex_1_2), .Y(N_1_48_2) ); defparam un7_gpr_rd_rs3_completing_ex_0_RNIURTKGF1.INIT=8'h08; // @46:8177 CFG4 un3_bcu_op_sel_ex_RNI32EI4G1 ( .A(ifu_m3_a2_0), .B(bcu_m5_i_a4_0_0), .C(un1_cpu_i_req_ready), .D(ifu_m3_0_2), .Y(ifu_m3_0_3) ); defparam un3_bcu_op_sel_ex_RNI32EI4G1.INIT=16'hF700; // @46:8717 CFG3 gpr_rd_rs1_complete_ex_s_RNIRTD29R ( .A(gpr_rd_rs1_complete_ex_out), .B(bcu_op_completing_ex_4), .C(de_m4_e_1), .Y(gpr_rd_rs1_complete_ex_0_s_0_1_1) ); defparam gpr_rd_rs1_complete_ex_s_RNIRTD29R.INIT=8'h10; // @46:8177 CFG2 un3_bcu_op_sel_ex_RNI7HFK1R ( .A(bcu_op_completing_ex_4), .B(de_m4_e_1), .Y(un3_bcu_op_sel_ex_RNI7HFK1R_Z) ); defparam un3_bcu_op_sel_ex_RNI7HFK1R.INIT=4'h4; // @46:9542 CFG4 instr_is_lsu_ldstr_ex_0_0_RNICTBGR72_0 ( .A(bcu_op_completing_ex_2), .B(bcu_op_completing_ex_4), .C(un3_branch_cond_ex[1]), .D(bcu_N_7_0), .Y(instr_is_lsu_ldstr_ex_0_0_RNICTBGR72_0_Z) ); defparam instr_is_lsu_ldstr_ex_0_0_RNICTBGR72_0.INIT=16'h3035; // @46:8168 CFG4 instr_accepted_de_s_0_RNO_0 ( .A(un3_bcu_op_sel_ex_RNI7HFK1R_Z), .B(instr_valid_de_2_Z), .C(ifu_m1_e_0), .D(un3_bcu_op_sel_ex_RNIEO6RBD1_Z), .Y(instr_m2_e_0_2) ); defparam instr_accepted_de_s_0_RNO_0.INIT=16'h0040; // @46:9352 CFG4 gpr_rd_rs1_complete_ex_d_2 ( .A(gpr_rd_rs1_complete_ex_d_1_Z), .B(bcu_op_completing_ex_4), .C(un3_branch_cond_ex[1]), .D(un3_branch_cond_ex[0]), .Y(gpr_rd_rs1_complete_ex_d_2_Z) ); defparam gpr_rd_rs1_complete_ex_d_2.INIT=16'hAAEA; // @46:9720 CFG4 gpr_rd_rs3_complete_ex_s_RNIP7VU3A1 ( .A(gpr_rd_rs3_complete_ex_out), .B(bcu_N_4), .C(un3_branch_cond_ex[0]), .D(instr_m2_0_a2_2_tz), .Y(instr_m2_0_a2_2_1) ); defparam gpr_rd_rs3_complete_ex_s_RNIP7VU3A1.INIT=16'hBF3F; // @46:8717 CFG4 gpr_rd_rs1_complete_ex_s_RNIK5Q6HF2 ( .A(un1_cpu_i_req_ready), .B(gpr_rd_rs1_complete_ex_0_s_0_1_1), .C(gpr_rd_rs1_complete_ex_0_s_a2), .D(gpr_rd_rs1_complete_ex_0_s_0_2_1), .Y(instr_m3_e_1_0) ); defparam gpr_rd_rs1_complete_ex_s_RNIK5Q6HF2.INIT=16'h2300; // @46:8177 CFG2 un3_bcu_op_sel_ex_RNIAJT66B2 ( .A(ifu_m3_0_3), .B(un3_bcu_op_sel_ex_RNI7HFK1R_Z), .Y(un3_bcu_op_sel_ex_RNIAJT66B2_Z) ); defparam un3_bcu_op_sel_ex_RNIAJT66B2.INIT=4'h2; // @46:8717 CFG4 un7_gpr_rd_rs3_completing_ex_d_1_RNI0H7VEQ3 ( .A(gpr_m7_0_1), .B(gpr_rd_rs1_complete_ex_0_s_0_1_1), .C(un7_gpr_rd_rs3_completing_ex_1_2), .D(un7_gpr_rd_rs3_completing_ex_d_0), .Y(gpr_m7_0_3) ); defparam un7_gpr_rd_rs3_completing_ex_d_1_RNI0H7VEQ3.INIT=16'h2220; // @46:8168 CFG3 instr_accepted_de_s_0_RNO ( .A(instr_m2_e_0_2), .B(bcu_N_4), .C(ifu_m3_a2_0), .Y(instr_N_5_mux) ); defparam instr_accepted_de_s_0_RNO.INIT=8'h2A; // @46:8177 CFG4 ex_retr_pipe_fence_i_retr_2_RNIVDG1K92 ( .A(bcu_m5_i_a4_0_1_1), .B(un3_branch_cond_ex[0]), .C(instr_is_lsu_ldstr_ex_0_0_RNICTBGR72_0_Z), .D(d_N_5_1), .Y(ex_retr_pipe_fence_i_retr_2_RNIVDG1K92_Z) ); defparam ex_retr_pipe_fence_i_retr_2_RNIVDG1K92.INIT=16'h0347; // @46:9397 CFG4 de_ex_pipe_alu_op_sel_ex7_1 ( .A(instr_inhibit_ex), .B(de_m4_e_1), .C(instr_is_lsu_ldstr_ex_0_0_RNICTBGR72_0_Z), .D(ex_retr_exu_res_accept_retr_3_1z), .Y(de_ex_pipe_alu_op_sel_ex7_0) ); defparam de_ex_pipe_alu_op_sel_ex7_1.INIT=16'hBFAA; // @46:9542 CFG3 bcu_op_completing_ex_3_0 ( .A(instr_is_lsu_ldstr_ex_0_0_RNICTBGR72_0_Z), .B(un3_branch_cond_ex[0]), .C(bcu_N_4), .Y(bcu_op_completing_ex) ); defparam bcu_op_completing_ex_3_0.INIT=8'h1D; // @46:9720 CFG4 gpr_rd_rs3_complete_ex_s_RNI0JLVBG3 ( .A(gpr_rd_rs3_complete_ex_out), .B(instr_is_lsu_ldstr_ex_0_0_RNICTBGR72_0_Z), .C(un3_branch_cond_ex[0]), .D(instr_m2_0_a2_2_tz), .Y(instr_m2_0_a2_5_5) ); defparam gpr_rd_rs3_complete_ex_s_RNI0JLVBG3.INIT=16'hFBF3; // @46:8717 CFG4 un7_gpr_rd_rs3_completing_ex_d_1_RNIV8VJL41 ( .A(lsu_op_complete_ex_s_0_RNI1TBI281_Z), .B(gpr_m7_0_3), .C(gpr_rd_rs1_complete_ex_0_s_a2), .D(un1_cpu_i_req_ready), .Y(gpr_m7_0_5) ); defparam un7_gpr_rd_rs3_completing_ex_d_1_RNIV8VJL41.INIT=16'h4404; // @46:8177 CFG4 instr_completing_ex_6_4_a0_RNIQV8S9R ( .A(alu_op_complete_ex), .B(instr_completing_ex_6_4_a0_Z), .C(instr_completing_ex_6_4_1_Z), .D(shift_op_complete_ex), .Y(ifu_m4_0) ); defparam instr_completing_ex_6_4_a0_RNIQV8S9R.INIT=16'h2000; // @46:8717 CFG4 gpr_rd_rs1_complete_ex_d_2_RNI49B6991 ( .A(gpr_rd_rs1_complete_ex_d_1_a3_Z), .B(gpr_rd_rs1_complete_ex_0_c_2), .C(gpr_rd_rs1_complete_ex_d_1_a0_Z), .D(gpr_rd_rs1_complete_ex_d_2_Z), .Y(gpr_rd_rs1_complete_ex_0_c) ); defparam gpr_rd_rs1_complete_ex_d_2_RNI49B6991.INIT=16'hCCC8; // @46:9397 CFG2 de_ex_pipe_alu_op_sel_ex7 ( .A(instr_accepted_ex), .B(de_ex_pipe_alu_op_sel_ex7_0), .Y(de_ex_pipe_alu_op_sel_ex7_1z) ); defparam de_ex_pipe_alu_op_sel_ex7.INIT=4'hE; // @46:9348 CFG4 un7_gpr_rd_rs3_completing_ex_d ( .A(bcu_N_4), .B(instr_is_lsu_ldstr_ex_0_0_RNICTBGR72_0_Z), .C(un3_branch_cond_ex[0]), .D(un7_gpr_rd_rs3_completing_ex_d_0), .Y(un7_gpr_rd_rs3_completing_ex_d_Z) ); defparam un7_gpr_rd_rs3_completing_ex_d.INIT=16'h5300; // @46:9532 CFG4 bcu_op_complete_ex ( .A(bcu_N_4), .B(instr_is_lsu_ldstr_ex_0_0_RNICTBGR72_0_Z), .C(un3_bcu_op_sel_ex_1z), .D(un3_branch_cond_ex[0]), .Y(bcu_op_complete_ex_Z) ); defparam bcu_op_complete_ex.INIT=16'h5F3F; // @46:9512 CFG2 de_ex_pipe_bcu_op_sel_ex7 ( .A(instr_accepted_ex), .B(bcu_op_completing_ex), .Y(de_ex_pipe_bcu_op_sel_ex7_1z) ); defparam de_ex_pipe_bcu_op_sel_ex7.INIT=4'hE; // @46:9720 CFG4 gpr_rd_rs3_complete_ex_s_RNIESQP1S ( .A(alu_op_complete_ex), .B(instr_m2_0_a2_5_2), .C(gpr_rd_rs3_complete_ex_out), .D(un7_gpr_rd_rs3_completing_ex_d_0), .Y(instr_m2_0_a2_5_4) ); defparam gpr_rd_rs3_complete_ex_s_RNIESQP1S.INIT=16'h8880; // @46:8177 CFG2 instr_accepted_de_RNO ( .A(gpr_rd_rs1_complete_ex_0_c), .B(ifu_m1_e_0), .Y(gpr_rd_rs1_complete_ex_0_0_0) ); defparam instr_accepted_de_RNO.INIT=4'hB; // @46:9344 CFG4 un8_gpr_rd_rs2_completing_ex ( .A(lsu_op_completing_ex_a0_1z), .B(bcu_op_complete_ex_Z), .C(un8_gpr_rd_rs2_completing_ex_0_Z), .D(lsu_op_complete_ex_out), .Y(un8_gpr_rd_rs2_completing_ex_Z) ); defparam un8_gpr_rd_rs2_completing_ex.INIT=16'hC080; // @46:8717 CFG3 instr_completing_ex_6_6 ( .A(un7_gpr_rd_rs1_completing_ex_1_0_d_0), .B(ifu_m4_0), .C(bcu_op_completing_ex), .Y(instr_completing_ex_6_6_Z) ); defparam instr_completing_ex_6_6.INIT=8'hC8; // @46:9241 CFG4 \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs3_rd_valid_ex9 ( .A(un7_gpr_rd_rs3_completing_ex_1_2), .B(trace_priv_i), .C(instr_accepted_ex), .D(un7_gpr_rd_rs3_completing_ex_d_Z), .Y(de_ex_pipe_gpr_rs3_rd_valid_ex9) ); defparam \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs3_rd_valid_ex9 .INIT=16'hFFFE; // @46:8168 CFG4 instr_accepted_de_s_0 ( .A(instr_valid_de_2_Z), .B(ifu_m1_e_0), .C(instr_completing_ex_6_6_Z), .D(instr_N_5_mux), .Y(instr_accepted_de_out) ); defparam instr_accepted_de_s_0.INIT=16'hF022; // @46:9720 CFG4 gpr_rd_rs3_complete_ex_s_RNIRS9V26 ( .A(instr_m2_0_a2_5_4), .B(instr_m2_0_a2_5_5), .C(instr_m2_0_a2_2_1), .D(instr_m3_e_1_0), .Y(instr_accepted_retr_2) ); defparam gpr_rd_rs3_complete_ex_s_RNIRS9V26.INIT=16'h8000; // @46:9229 CFG4 \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_valid_ex9 ( .A(instr_inhibit_ex), .B(trace_priv_i), .C(instr_accepted_ex), .D(un8_gpr_rd_rs2_completing_ex_Z), .Y(de_ex_pipe_gpr_rs2_rd_valid_ex9) ); defparam \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_valid_ex9 .INIT=16'hFFFE; // @46:9187 CFG4 \gen_gpr_ex_attbs_rd_ex.de_ex_pipe_gpr_rs1_rd_valid_ex6 ( .A(instr_inhibit_ex), .B(un7_gpr_rd_rs1_completing_ex_0_0_Z), .C(bcu_op_complete_ex_Z), .D(instr_accepted_ex), .Y(de_ex_pipe_gpr_rs1_rd_valid_ex6) ); defparam \gen_gpr_ex_attbs_rd_ex.de_ex_pipe_gpr_rs1_rd_valid_ex6 .INIT=16'hFFEA; // @46:8177 CFG4 gpr_rd_rs1_complete_ex_d_2_RNII920TM ( .A(gpr_rd_rs2_complete_ex_s_RNIE9L3621_Z), .B(gpr_rd_rs1_complete_ex_0_d), .C(ifu_m1_e_0), .D(gpr_rd_rs1_complete_ex_0_c), .Y(ifu_expipe_resp_ready_net) ); defparam gpr_rd_rs1_complete_ex_d_2_RNII920TM.INIT=16'h5545; // @46:8168 CFG4 instr_accepted_de ( .A(gpr_rd_rs1_complete_ex_0_0_0), .B(ifu_m1_e_1_0), .C(instr_accepted_de_out), .D(gpr_rd_rs1_complete_ex_0_d), .Y(instr_accepted_de_Z) ); defparam instr_accepted_de.INIT=16'hC080; // @46:8207 CFG4 instr_completing_ex_RNITONSM ( .A(stage_state_de), .B(csr_trigger_wr_hzd_de_Z), .C(next_N_7_mux), .D(instr_completing_ex_Z), .Y(next_stage_state_de_1_sqmuxa_i) ); defparam instr_completing_ex_RNITONSM.INIT=16'hF707; // @46:8180 CFG2 un2_next_stage_state_de ( .A(instr_accepted_ex), .B(instr_accepted_de_Z), .Y(un2_next_stage_state_de_1z) ); defparam un2_next_stage_state_de.INIT=4'h4; // @46:8694 CFG4 instr_accepted_de_RNIOCJGR ( .A(un1_implicit_pseudo_instr_de), .B(ifu_m1_e_0), .C(instr_accepted_de_Z), .D(instr_completing_ex_Z), .Y(un1_next_stage_state_ex_i_0) ); defparam instr_accepted_de_RNIOCJGR.INIT=16'hFAFE; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_idecode_1_1s_1s_0s */ module miv_rv32_csr_decode_1s_1s_0s ( sw_csr_addr_de, ifu_expipe_resp_ireg_net, sw_csr_addr_de_1_0, N_17, sw_csr_rd_op_de, N_72, csr_wr_illegal_i_4_1z, N_42, N_58, N_88, N_84, un1_instruction_33_i, case_dec_gpr_rs2_rd_sel_0_sqmuxa, csr_rd_illegal_i_4 ) ; input [11:0] sw_csr_addr_de ; input [31:22] ifu_expipe_resp_ireg_net ; input sw_csr_addr_de_1_0 ; output N_17 ; input sw_csr_rd_op_de ; output N_72 ; output csr_wr_illegal_i_4_1z ; output N_42 ; output N_58 ; output N_88 ; output N_84 ; input un1_instruction_33_i ; input case_dec_gpr_rs2_rd_sel_0_sqmuxa ; output csr_rd_illegal_i_4 ; wire sw_csr_addr_de_1_0 ; wire N_17 ; wire sw_csr_rd_op_de ; wire N_72 ; wire csr_wr_illegal_i_4_1z ; wire N_42 ; wire N_58 ; wire N_88 ; wire N_84 ; wire un1_instruction_33_i ; wire case_dec_gpr_rs2_rd_sel_0_sqmuxa ; wire csr_rd_illegal_i_4 ; wire csr_wr_illegal_i_2_N_3L3_1_Z ; wire csr_wr_illegal_i_2_N_3L3_Z ; wire N_45 ; wire csr_wr_illegal_i_2_N_2L1_Z ; wire N_55 ; wire csr_rd_illegal_i_a12_1_3_Z ; wire N_22 ; wire csr_wr_illegal_i_2_N_4L5_Z ; wire N_38 ; wire csr_rd_illegal_i_a12_2_1_0_Z ; wire csr_rd_illegal_i_a12_2_1_Z ; wire N_48 ; wire csr_rd_illegal_i_a12_1 ; wire csr_rd_illegal_i_a12_1_0_Z ; wire N_30 ; wire csr_rd_illegal_i_a12_4_1_Z ; wire N_82 ; wire N_40 ; wire csr_wr_illegal_i_a12_4_0_Z ; wire N_69 ; wire csr_wr_illegal_i_a12_7_1_Z ; wire N_31 ; wire N_43_3 ; wire N_33 ; wire N_35 ; wire N_78 ; wire N_43 ; wire csr_rd_illegal_i_a12_0_1_Z ; wire csr_rd_illegal_i_3 ; wire csr_rd_illegal_i_2_Z ; wire GND ; wire VCC ; // @46:1547 CFG4 csr_wr_illegal_i_2_N_3L3 ( .A(sw_csr_addr_de[0]), .B(sw_csr_addr_de[11]), .C(sw_csr_addr_de[9]), .D(csr_wr_illegal_i_2_N_3L3_1_Z), .Y(csr_wr_illegal_i_2_N_3L3_Z) ); defparam csr_wr_illegal_i_2_N_3L3.INIT=16'hFEFF; // @46:1547 CFG4 csr_wr_illegal_i_2_N_3L3_1 ( .A(ifu_expipe_resp_ireg_net[25]), .B(sw_csr_addr_de[1]), .C(N_45), .D(sw_csr_addr_de[10]), .Y(csr_wr_illegal_i_2_N_3L3_1_Z) ); defparam csr_wr_illegal_i_2_N_3L3_1.INIT=16'h0010; // @46:1547 CFG3 csr_wr_illegal_i_2_N_2L1 ( .A(sw_csr_addr_de[9]), .B(sw_csr_addr_de_1_0), .C(sw_csr_addr_de[8]), .Y(csr_wr_illegal_i_2_N_2L1_Z) ); defparam csr_wr_illegal_i_2_N_2L1.INIT=8'h1F; // @46:1547 CFG4 csr_wr_illegal_i_2_N_4L5 ( .A(csr_wr_illegal_i_2_N_2L1_Z), .B(N_55), .C(csr_rd_illegal_i_a12_1_3_Z), .D(N_22), .Y(csr_wr_illegal_i_2_N_4L5_Z) ); defparam csr_wr_illegal_i_2_N_4L5.INIT=16'h3F3B; // @46:1547 CFG4 csr_wr_illegal_i_2 ( .A(csr_wr_illegal_i_2_N_3L3_Z), .B(N_22), .C(N_38), .D(csr_wr_illegal_i_2_N_4L5_Z), .Y(csr_rd_illegal_i_4) ); defparam csr_wr_illegal_i_2.INIT=16'hF1FF; // @46:1473 CFG4 csr_rd_illegal_i_a12_2 ( .A(sw_csr_addr_de[1]), .B(sw_csr_addr_de[0]), .C(csr_rd_illegal_i_a12_2_1_0_Z), .D(N_22), .Y(N_38) ); defparam csr_rd_illegal_i_a12_2.INIT=16'h0F0B; // @46:1473 CFG3 csr_rd_illegal_i_a12_2_1_0 ( .A(sw_csr_addr_de[9]), .B(csr_rd_illegal_i_a12_2_1_Z), .C(N_45), .Y(csr_rd_illegal_i_a12_2_1_0_Z) ); defparam csr_rd_illegal_i_a12_2_1_0.INIT=8'h7F; // @46:1473 CFG3 csr_rd_illegal_i_a12_2_1 ( .A(ifu_expipe_resp_ireg_net[30]), .B(ifu_expipe_resp_ireg_net[25]), .C(sw_csr_addr_de[11]), .Y(csr_rd_illegal_i_a12_2_1_Z) ); defparam csr_rd_illegal_i_a12_2_1.INIT=8'h10; // @46:1473 CFG3 csr_rd_illegal_i_a12_1_4 ( .A(sw_csr_addr_de[11]), .B(ifu_expipe_resp_ireg_net[24]), .C(N_48), .Y(csr_rd_illegal_i_a12_1) ); defparam csr_rd_illegal_i_a12_1_4.INIT=8'h80; // @46:1473 CFG3 csr_rd_illegal_i_a12_1_0 ( .A(sw_csr_addr_de[9]), .B(ifu_expipe_resp_ireg_net[28]), .C(sw_csr_addr_de[3]), .Y(csr_rd_illegal_i_a12_1_0_Z) ); defparam csr_rd_illegal_i_a12_1_0.INIT=8'h0D; // @46:1473 CFG3 csr_rd_illegal_i_o12_2 ( .A(ifu_expipe_resp_ireg_net[26]), .B(sw_csr_addr_de[2]), .C(sw_csr_addr_de[0]), .Y(N_30) ); defparam csr_rd_illegal_i_o12_2.INIT=8'h4F; // @46:1473 CFG4 csr_rd_illegal_i_a12_4_1 ( .A(ifu_expipe_resp_ireg_net[31]), .B(ifu_expipe_resp_ireg_net[25]), .C(case_dec_gpr_rs2_rd_sel_0_sqmuxa), .D(sw_csr_addr_de[9]), .Y(csr_rd_illegal_i_a12_4_1_Z) ); defparam csr_rd_illegal_i_a12_4_1.INIT=16'h0020; // @46:1473 CFG4 csr_rd_illegal_i_a2 ( .A(un1_instruction_33_i), .B(case_dec_gpr_rs2_rd_sel_0_sqmuxa), .C(ifu_expipe_resp_ireg_net[26]), .D(ifu_expipe_resp_ireg_net[28]), .Y(N_45) ); defparam csr_rd_illegal_i_a2.INIT=16'h0800; // @46:1473 CFG4 csr_rd_illegal_i_a2_2 ( .A(un1_instruction_33_i), .B(case_dec_gpr_rs2_rd_sel_0_sqmuxa), .C(ifu_expipe_resp_ireg_net[25]), .D(ifu_expipe_resp_ireg_net[27]), .Y(N_48) ); defparam csr_rd_illegal_i_a2_2.INIT=16'h777F; // @46:1547 CFG4 csr_wr_illegal_i_a2 ( .A(un1_instruction_33_i), .B(case_dec_gpr_rs2_rd_sel_0_sqmuxa), .C(ifu_expipe_resp_ireg_net[30]), .D(ifu_expipe_resp_ireg_net[31]), .Y(N_82) ); defparam csr_wr_illegal_i_a2.INIT=16'h777F; // @46:1547 CFG3 csr_wr_illegal_i_a2_1 ( .A(sw_csr_addr_de[7]), .B(sw_csr_addr_de[11]), .C(sw_csr_addr_de[10]), .Y(N_84) ); defparam csr_wr_illegal_i_a2_1.INIT=8'h01; // @46:1473 CFG4 csr_rd_illegal_i_a2_6 ( .A(sw_csr_addr_de[5]), .B(sw_csr_addr_de[10]), .C(sw_csr_addr_de[7]), .D(sw_csr_addr_de[11]), .Y(N_55) ); defparam csr_rd_illegal_i_a2_6.INIT=16'h0001; // @46:1473 CFG4 csr_rd_illegal_i_a12_4 ( .A(sw_csr_addr_de[6]), .B(sw_csr_addr_de[8]), .C(csr_rd_illegal_i_a12_4_1_Z), .D(sw_csr_addr_de[10]), .Y(N_40) ); defparam csr_rd_illegal_i_a12_4.INIT=16'h1000; // @46:1547 CFG3 csr_wr_illegal_i_a2_5 ( .A(sw_csr_addr_de[9]), .B(sw_csr_addr_de[5]), .C(N_45), .Y(N_88) ); defparam csr_wr_illegal_i_a2_5.INIT=8'h80; // @46:1547 CFG4 csr_wr_illegal_i_a12_4_0 ( .A(sw_csr_addr_de[10]), .B(sw_csr_addr_de[11]), .C(ifu_expipe_resp_ireg_net[24]), .D(case_dec_gpr_rs2_rd_sel_0_sqmuxa), .Y(csr_wr_illegal_i_a12_4_0_Z) ); defparam csr_wr_illegal_i_a12_4_0.INIT=16'h1000; // @46:1547 CFG4 csr_wr_illegal_i_o12 ( .A(ifu_expipe_resp_ireg_net[23]), .B(ifu_expipe_resp_ireg_net[22]), .C(case_dec_gpr_rs2_rd_sel_0_sqmuxa), .D(un1_instruction_33_i), .Y(N_58) ); defparam csr_wr_illegal_i_o12.INIT=16'hE000; // @46:1547 CFG4 csr_wr_illegal_i_o12_4 ( .A(ifu_expipe_resp_ireg_net[25]), .B(case_dec_gpr_rs2_rd_sel_0_sqmuxa), .C(sw_csr_addr_de_1_0), .D(sw_csr_addr_de[9]), .Y(N_69) ); defparam csr_wr_illegal_i_o12_4.INIT=16'h7F77; // @46:1547 CFG4 csr_wr_illegal_i_a12_7_1 ( .A(sw_csr_addr_de[1]), .B(N_82), .C(sw_csr_addr_de[7]), .D(sw_csr_addr_de[0]), .Y(csr_wr_illegal_i_a12_7_1_Z) ); defparam csr_wr_illegal_i_a12_7_1.INIT=16'h0800; // @46:1473 CFG3 csr_rd_illegal_i_o2_0 ( .A(sw_csr_addr_de[3]), .B(sw_csr_addr_de[2]), .C(sw_csr_addr_de[4]), .Y(N_22) ); defparam csr_rd_illegal_i_o2_0.INIT=8'hFE; // @46:1473 CFG4 csr_rd_illegal_i_m2 ( .A(sw_csr_addr_de[1]), .B(N_58), .C(sw_csr_addr_de[7]), .D(sw_csr_addr_de[0]), .Y(N_31) ); defparam csr_rd_illegal_i_m2.INIT=16'hD1E2; // @46:1473 CFG4 csr_rd_illegal_i_a12_1_3 ( .A(sw_csr_addr_de[4]), .B(sw_csr_addr_de[1]), .C(csr_rd_illegal_i_a12_1_0_Z), .D(N_30), .Y(csr_rd_illegal_i_a12_1_3_Z) ); defparam csr_rd_illegal_i_a12_1_3.INIT=16'h1000; // @46:1473 CFG4 csr_rd_illegal_i_a12_7_3 ( .A(sw_csr_addr_de[0]), .B(N_45), .C(sw_csr_addr_de[4]), .D(sw_csr_addr_de[3]), .Y(N_43_3) ); defparam csr_rd_illegal_i_a12_7_3.INIT=16'h0004; // @46:1473 CFG4 csr_rd_illegal_i_o12_4 ( .A(sw_csr_addr_de[3]), .B(sw_csr_addr_de[2]), .C(sw_csr_addr_de[0]), .D(sw_csr_addr_de[1]), .Y(N_33) ); defparam csr_rd_illegal_i_o12_4.INIT=16'h1114; // @46:1473 CFG4 csr_rd_illegal_i_a12 ( .A(N_45), .B(sw_csr_addr_de[9]), .C(csr_rd_illegal_i_a12_1), .D(N_33), .Y(N_35) ); defparam csr_rd_illegal_i_a12.INIT=16'h8000; // @46:1473 CFG4 csr_rd_illegal_i_a12_6 ( .A(sw_csr_addr_de[9]), .B(sw_csr_addr_de[6]), .C(N_22), .D(N_55), .Y(N_42) ); defparam csr_rd_illegal_i_a12_6.INIT=16'h0400; // @46:1547 CFG4 csr_wr_illegal_i_a12_5 ( .A(sw_csr_addr_de[7]), .B(sw_csr_addr_de[11]), .C(N_22), .D(N_88), .Y(N_78) ); defparam csr_wr_illegal_i_a12_5.INIT=16'h0200; // @46:1473 CFG3 csr_rd_illegal_i_a12_7 ( .A(N_82), .B(N_43_3), .C(N_48), .Y(N_43) ); defparam csr_rd_illegal_i_a12_7.INIT=8'h80; // @46:1473 CFG4 csr_rd_illegal_i_a12_0_1 ( .A(sw_csr_addr_de[5]), .B(sw_csr_addr_de[4]), .C(N_31), .D(N_82), .Y(csr_rd_illegal_i_a12_0_1_Z) ); defparam csr_rd_illegal_i_a12_0_1.INIT=16'h8A00; // @46:1547 CFG4 csr_wr_illegal_i_4 ( .A(csr_wr_illegal_i_a12_7_1_Z), .B(csr_wr_illegal_i_a12_4_0_Z), .C(N_78), .D(N_88), .Y(csr_wr_illegal_i_4_1z) ); defparam csr_wr_illegal_i_4.INIT=16'hFEF0; // @46:1547 CFG4 csr_wr_illegal_i_a12 ( .A(N_43_3), .B(N_69), .C(N_82), .D(sw_csr_addr_de[7]), .Y(N_72) ); defparam csr_wr_illegal_i_a12.INIT=16'h0080; // @46:1473 CFG4 csr_rd_illegal_i_3_0 ( .A(N_35), .B(N_40), .C(sw_csr_rd_op_de), .D(N_43), .Y(csr_rd_illegal_i_3) ); defparam csr_rd_illegal_i_3_0.INIT=16'hFFEF; // @46:1473 CFG4 csr_rd_illegal_i_2 ( .A(N_45), .B(sw_csr_addr_de[9]), .C(csr_rd_illegal_i_a12_0_1_Z), .D(N_42), .Y(csr_rd_illegal_i_2_Z) ); defparam csr_rd_illegal_i_2.INIT=16'hFF80; // @46:1473 CFG4 csr_rd_illegal_i ( .A(N_78), .B(csr_rd_illegal_i_3), .C(csr_rd_illegal_i_4), .D(csr_rd_illegal_i_2_Z), .Y(N_17) ); defparam csr_rd_illegal_i.INIT=16'hFFFE; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_csr_decode_1s_1s_0s */ module miv_rv32_exu_1s_1s_1s_1s_0s_0s_0s_1_0_1 ( cpu_d_req_wr_data_net, cpu_d_req_addr_net, exu_alu_result_iv_8_0_0, shifter_unit_op_sel, cpu_debug_op_wr_data_net, shifter_unit_places_sel_0, shifter_operand_sel, de_ex_pipe_shifter_unit_places_sel_ex_0, ex_retr_pipe_gpr_wr_mux_sel_retr_0, exu_result_mux_sel, exu_alu_operand0_0, gpr_rs1_rd_data_sig, de_ex_pipe_curr_pc_ex, exu_alu_operand1_0, de_ex_pipe_immediate_ex, cpu_debug_gpr_op_rd_data_net, de_ex_pipe_operand1_mux_sel_ex, de_ex_pipe_operand0_mux_sel_ex_0, ex_retr_pipe_exu_result_retr, ex_retr_exu_res_accept_retr_3, lsu_req_addr_valid, exu_shifter_places_valid_1z, lsu_align_result_valid_0_1z, gpr_wr_valid_retr_0, gpr_rs1_rd_data_valid_6, gpr_rs2_rd_data_valid_7, bcu_result_cry_0_Y, exu_mux_result34, soft_reset_taken_retr_0, gpr_rs1_rd_valid_mux, gpr_N_10_mux_i_0_0, soft_reset_taken_retr, gpr_wr_valid_retr_2_0_0, gpr_rs1_rd_valid_mux_0, cmp_cond, un5_N_8, un1_instr_inhibit_ex, exu_alu_result_iv_10_out, un128_exu_alu_result_cry_31_RNI01RTHF_1z, formal_trace_reset_taken, exu_op_abort_ex_1, gpr_wr_valid_retr_1_1, exu_m4_1, gpr_wr_valid_retr_1_1_0, gpr_wr_en_retr, un1_rs1_rd_hzd_4, gpr_rs1_rd_data_valid_6_5, un1_rs2_rd_hzd_4, d_m2_e_1_0, start_m1_e_1_1z, exu_m4_0_1, trace_exception, debug_enter_retr, exu_alu_result192_1_1z, exu_m3_0_2, N_26_0, exu_m1_e_0_1z, d_m5_a0_0, de_ex_pipe_gpr_rs1_rd_valid_ex, un1_alu_op_sel_int, exu_result_valid_ex, un1_exu_alu_result212_3_i_0, exu_result_valid_iv_1_1z, exu_result_valid_iv_1_0_1z, div_finish, N_14_i, N_8_i, N_6_i, N_10_i, trace_priv_i, un2_exception_taken, machine_implicit_wr_mtval_tval_wr_en, gpr_rs2_rd_data_valid_ex, stage_state_ex, exu_op_abort_ex, exu_alu_result_int_cry_0_Y, N_4_i, exu_update_result_reg, ex_retr_pipe_exu_result_valid_retr, dff, PF_CCC_0_0_OUT0_FABCLK_0 ) ; output [31:0] cpu_d_req_wr_data_net ; input [31:1] cpu_d_req_addr_net ; output exu_alu_result_iv_8_0_0 ; input [1:0] shifter_unit_op_sel ; input [31:0] cpu_debug_op_wr_data_net ; input shifter_unit_places_sel_0 ; input [1:0] shifter_operand_sel ; input de_ex_pipe_shifter_unit_places_sel_ex_0 ; input ex_retr_pipe_gpr_wr_mux_sel_retr_0 ; input [2:0] exu_result_mux_sel ; output exu_alu_operand0_0 ; input [31:0] gpr_rs1_rd_data_sig ; input [31:0] de_ex_pipe_curr_pc_ex ; output exu_alu_operand1_0 ; input [31:0] de_ex_pipe_immediate_ex ; input [31:0] cpu_debug_gpr_op_rd_data_net ; input [1:0] de_ex_pipe_operand1_mux_sel_ex ; input de_ex_pipe_operand0_mux_sel_ex_0 ; output [31:0] ex_retr_pipe_exu_result_retr ; input ex_retr_exu_res_accept_retr_3 ; input lsu_req_addr_valid ; output exu_shifter_places_valid_1z ; output lsu_align_result_valid_0_1z ; input gpr_wr_valid_retr_0 ; input gpr_rs1_rd_data_valid_6 ; input gpr_rs2_rd_data_valid_7 ; input bcu_result_cry_0_Y ; input exu_mux_result34 ; input soft_reset_taken_retr_0 ; input gpr_rs1_rd_valid_mux ; input gpr_N_10_mux_i_0_0 ; input soft_reset_taken_retr ; input gpr_wr_valid_retr_2_0_0 ; input gpr_rs1_rd_valid_mux_0 ; output cmp_cond ; input un5_N_8 ; input un1_instr_inhibit_ex ; output exu_alu_result_iv_10_out ; output un128_exu_alu_result_cry_31_RNI01RTHF_1z ; input formal_trace_reset_taken ; input exu_op_abort_ex_1 ; input gpr_wr_valid_retr_1_1 ; output exu_m4_1 ; input gpr_wr_valid_retr_1_1_0 ; input gpr_wr_en_retr ; input un1_rs1_rd_hzd_4 ; input gpr_rs1_rd_data_valid_6_5 ; input un1_rs2_rd_hzd_4 ; input d_m2_e_1_0 ; output start_m1_e_1_1z ; output exu_m4_0_1 ; output trace_exception ; input debug_enter_retr ; output exu_alu_result192_1_1z ; output exu_m3_0_2 ; output N_26_0 ; output exu_m1_e_0_1z ; output d_m5_a0_0 ; input de_ex_pipe_gpr_rs1_rd_valid_ex ; output un1_alu_op_sel_int ; output exu_result_valid_ex ; output un1_exu_alu_result212_3_i_0 ; output exu_result_valid_iv_1_1z ; output exu_result_valid_iv_1_0_1z ; output div_finish ; input N_14_i ; input N_8_i ; input N_6_i ; input N_10_i ; input trace_priv_i ; input un2_exception_taken ; input machine_implicit_wr_mtval_tval_wr_en ; input gpr_rs2_rd_data_valid_ex ; input stage_state_ex ; input exu_op_abort_ex ; output exu_alu_result_int_cry_0_Y ; input N_4_i ; input exu_update_result_reg ; output ex_retr_pipe_exu_result_valid_retr ; input dff ; input PF_CCC_0_0_OUT0_FABCLK_0 ; wire exu_alu_result_iv_8_0_0 ; wire shifter_unit_places_sel_0 ; wire de_ex_pipe_shifter_unit_places_sel_ex_0 ; wire ex_retr_pipe_gpr_wr_mux_sel_retr_0 ; wire exu_alu_operand0_0 ; wire exu_alu_operand1_0 ; wire de_ex_pipe_operand0_mux_sel_ex_0 ; wire ex_retr_exu_res_accept_retr_3 ; wire lsu_req_addr_valid ; wire exu_shifter_places_valid_1z ; wire lsu_align_result_valid_0_1z ; wire gpr_wr_valid_retr_0 ; wire gpr_rs1_rd_data_valid_6 ; wire gpr_rs2_rd_data_valid_7 ; wire bcu_result_cry_0_Y ; wire exu_mux_result34 ; wire soft_reset_taken_retr_0 ; wire gpr_rs1_rd_valid_mux ; wire gpr_N_10_mux_i_0_0 ; wire soft_reset_taken_retr ; wire gpr_wr_valid_retr_2_0_0 ; wire gpr_rs1_rd_valid_mux_0 ; wire cmp_cond ; wire un5_N_8 ; wire un1_instr_inhibit_ex ; wire exu_alu_result_iv_10_out ; wire un128_exu_alu_result_cry_31_RNI01RTHF_1z ; wire formal_trace_reset_taken ; wire exu_op_abort_ex_1 ; wire gpr_wr_valid_retr_1_1 ; wire exu_m4_1 ; wire gpr_wr_valid_retr_1_1_0 ; wire gpr_wr_en_retr ; wire un1_rs1_rd_hzd_4 ; wire gpr_rs1_rd_data_valid_6_5 ; wire un1_rs2_rd_hzd_4 ; wire d_m2_e_1_0 ; wire start_m1_e_1_1z ; wire exu_m4_0_1 ; wire trace_exception ; wire debug_enter_retr ; wire exu_alu_result192_1_1z ; wire exu_m3_0_2 ; wire N_26_0 ; wire exu_m1_e_0_1z ; wire d_m5_a0_0 ; wire de_ex_pipe_gpr_rs1_rd_valid_ex ; wire un1_alu_op_sel_int ; wire exu_result_valid_ex ; wire un1_exu_alu_result212_3_i_0 ; wire exu_result_valid_iv_1_1z ; wire exu_result_valid_iv_1_0_1z ; wire div_finish ; wire N_14_i ; wire N_8_i ; wire N_6_i ; wire N_10_i ; wire trace_priv_i ; wire un2_exception_taken ; wire machine_implicit_wr_mtval_tval_wr_en ; wire gpr_rs2_rd_data_valid_ex ; wire stage_state_ex ; wire exu_op_abort_ex ; wire exu_alu_result_int_cry_0_Y ; wire N_4_i ; wire exu_update_result_reg ; wire ex_retr_pipe_exu_result_valid_retr ; wire dff ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire [31:1] exu_alu_operand1_Z; wire [30:1] exu_alu_operand1_i_0; wire [31:31] exu_alu_operand1_i; wire [31:0] quotient_Z; wire [31:0] quotient_RNO_Z; wire [31:0] quotientce_Z; wire [64:32] exu_result_reg_int_Z; wire [64:64] exu_result_reg_int_RNO_Z; wire [64:64] exu_result_reg_intce_Z; wire [63:32] next_exu_result_reg_int; wire [5:0] mul_div_cnt_Z; wire [5:0] mul_div_cnt_lm; wire [62:0] div_divisor_Z; wire [62:0] next_div_divisor_5_Z; wire [31:0] dividend_Z; wire [30:0] next_dividend_Z; wire [31:31] next_dividend; wire [31:0] next_exu_result_reg_int_Z; wire [1:1] quotient_RNINK1DG_S; wire [1:1] quotient_RNINK1DG_Y; wire [31:2] un1_div_result_11; wire [2:2] quotient_RNIGB3Q01_Y; wire [3:3] quotient_RNIB457H1_Y; wire [4:4] quotient_RNI8V6K12_Y; wire [5:5] quotient_RNI7S81I2_Y; wire [6:6] quotient_RNI8RAE23_Y; wire [7:7] quotient_RNIBSCRI3_Y; wire [8:8] quotient_RNIGVE834_Y; wire [9:9] quotient_RNIN4HLJ4_Y; wire [10:10] quotient_RNIEKLD85_Y; wire [11:11] quotient_RNI76Q5T5_Y; wire [12:12] quotient_RNI2QUTH6_Y; wire [13:13] quotient_RNIVF3M67_Y; wire [14:14] quotient_RNIU78ER7_Y; wire [15:15] quotient_RNIV1D6G8_Y; wire [16:16] quotient_RNI2UHU49_Y; wire [17:17] quotient_RNI7SMMP9_Y; wire [18:18] quotient_RNIESREEA_Y; wire [19:19] quotient_RNINU073B_Y; wire [20:20] quotient_RNIGI7VNB_Y; wire [21:21] quotient_RNIB8ENCC_Y; wire [22:22] quotient_RNI80LF1D_Y; wire [23:23] quotient_RNI7QR7MD_Y; wire [24:24] quotient_RNI8M20BE_Y; wire [25:25] quotient_RNIBK9OVE_Y; wire [26:26] quotient_RNIGKGGKF_Y; wire [27:27] quotient_RNINMN89G_Y; wire [28:28] quotient_RNI0RU0UG_Y; wire [29:29] quotient_RNIB16PIH_Y; wire [31:31] exu_alu_result_26_RNO_FCO; wire [31:31] exu_alu_result_26_RNO_Y; wire [30:30] quotient_RNI6PEH7I_Y; wire [31:2] un23_mulh_mc0; wire [31:2] un6_exu_alu_result0; wire [31:1] exu_alu_operand0_Z; wire [32:1] exu_alu_result_int_Z; wire [32:1] exu_alu_operand0_int; wire [31:1] un6_exu_alu_result1; wire [15:0] un152_exu_alu_result_1_data_tmp; wire [30:0] next_dividend_0; wire [4:1] mul_div_cnt_cry_Z; wire [4:1] mul_div_cnt_s; wire [4:1] mul_div_cnt_cry_Y; wire [5:5] mul_div_cnt_s_FCO; wire [5:5] mul_div_cnt_s_Z; wire [5:5] mul_div_cnt_s_Y; wire [14:1] lsu_align_result_95_2_1_0_co1; wire [14:1] lsu_align_result_95_2_1_wmux_0_S; wire [31:0] exu_shifter_operand; wire [14:1] lsu_align_result_95_2_1_0_y0; wire [14:1] lsu_align_result_95_2_1_0_co0; wire [14:1] lsu_align_result_95_2_1_0_wmux_S; wire [5:5] un174_shifter_result_1_i; wire [29:17] lsu_align_result_78_Z; wire [31:1] mul_mp_Z; wire [16:16] lsu_align_result_95_3_1_Z; wire [0:0] exu_alu_result_8_m_0_3_1_Z; wire [0:0] exu_alu_result_8_m_0_3_Z; wire [1:1] exu_alu_result_26_m_i_m2_1_Z; wire [30:17] lsu_align_result_96_m1_2_Z; wire [30:17] lsu_align_result_96_m1_2_0_Z; wire [30:17] lsu_align_result_96_m1; wire [30:17] lsu_align_result_96_m1_1_0_Z; wire [31:0] exu_result_2_Z; wire [31:4] exu_alu_result_6_m_Z; wire [1:0] addr_shift_bits; wire [21:21] exu_alu_result_26_1_Z; wire [22:22] exu_alu_result_26_m_i_m2_RNO_Z; wire [29:0] quotientce_1_Z; wire [21:1] quotientce_0_Z; wire [12:12] quotientce_0_0_Z; wire [32:32] mul_mp; wire [3:3] exu_shifter_places_cnst; wire [0:0] un6_exu_alu_result1_m_a0_4_0; wire [4:0] exu_shifter_places_Z; wire [0:0] exu_alu_result_6_Z; wire [4:3] exu_shifter_places_1_Z; wire [5:4] exu_alu_result_8_Z; wire [3:2] exu_result_reg_int_m; wire [31:0] exu_alu_result_26_m_Z; wire [0:0] lsu_align_result_32_1_Z; wire [30:1] mul_mp_2_Z; wire [2:2] exu_alu_result_10_m_0_Z; wire [0:0] exu_alu_operand1_s0; wire [0:0] exu_alu_operand1_s1; wire [31:2] exu_alu_result_8_m_Z; wire [8:4] exu_alu_result_int_m_Z; wire [31:2] exu_alu_result_26_Z; wire [0:0] un6_exu_alu_result1_m_a0_4; wire [2:2] SUM; wire [31:1] exu_alu_result_0_iv_2_Z; wire [8:1] un6_exu_alu_result0_m; wire [31:1] exu_alu_result_0_iv_5_Z; wire [61:32] next_div_divisor_5_1_Z; wire [31:1] exu_alu_result_0_iv_4_Z; wire [31:31] cpu_d_req_wr_data_net_2; wire [31:1] exu_alu_result_0_iv_0_Z; wire [8:1] exu_alu_result_0_iv_1_Z; wire [8:2] exu_alu_result_0_iv_3_Z; wire [0:0] exu_alu_result_iv_8_1_Z; wire [31:1] exu_alu_result; wire [31:0] exu_result_1; wire slow_mul_ack_RNIRFHITD_Z ; wire N_6076_i ; wire next_quotient_0_sqmuxa ; wire next_quotient_0_sqmuxa_i ; wire VCC ; wire GND ; wire N_1529 ; wire slow_mul_ack_RNI4KM1RR_Z ; wire N_37_0_i ; wire N_38_0_i ; wire exu_result_reg_valid_2_Z ; wire slow_mul_ack_Z ; wire next_exu_result_reg_int48 ; wire div_ack_Z ; wire next_div_divisor39 ; wire N_61 ; wire res_pos_neg_Z ; wire next_res_pos_neg_3_Z ; wire N_2199_i ; wire un1_next_div_divisor39_inv_2_or ; wire N_14137_i ; wire un1_div_result_1_cry_1_cy ; wire un1_div_result_1_cry_1 ; wire un1_div_result_1_cry_2 ; wire un1_div_result_1_cry_3 ; wire un1_div_result_1_cry_4 ; wire un1_div_result_1_cry_5 ; wire un1_div_result_1_cry_6 ; wire un1_div_result_1_cry_7 ; wire un1_div_result_1_cry_8 ; wire un1_div_result_1_cry_9 ; wire un1_div_result_1_cry_10 ; wire un1_div_result_1_cry_11 ; wire un1_div_result_1_cry_12 ; wire un1_div_result_1_cry_13 ; wire un1_div_result_1_cry_14 ; wire un1_div_result_1_cry_15 ; wire un1_div_result_1_cry_16 ; wire un1_div_result_1_cry_17 ; wire un1_div_result_1_cry_18 ; wire un1_div_result_1_cry_19 ; wire un1_div_result_1_cry_20 ; wire un1_div_result_1_cry_21 ; wire un1_div_result_1_cry_22 ; wire un1_div_result_1_cry_23 ; wire un1_div_result_1_cry_24 ; wire un1_div_result_1_cry_25 ; wire un1_div_result_1_cry_26 ; wire un1_div_result_1_cry_27 ; wire un1_div_result_1_cry_28 ; wire un1_div_result_1_cry_29 ; wire un23_mulh_mc_0_cry_1_cy_Z ; wire un23_mulh_mc_0_cry_1_cy_S ; wire un23_mulh_mc_0_cry_1_cy_Y ; wire un23_mulh_mc_0_cry_1_Z ; wire un23_mulh_mc_0_cry_1_Y ; wire un23_mulh_mc_0_cry_2_Z ; wire un23_mulh_mc_0_cry_2_Y ; wire un23_mulh_mc_0_cry_3_Z ; wire un23_mulh_mc_0_cry_3_Y ; wire un23_mulh_mc_0_cry_4_Z ; wire un23_mulh_mc_0_cry_4_Y ; wire un23_mulh_mc_0_cry_5_Z ; wire un23_mulh_mc_0_cry_5_Y ; wire un23_mulh_mc_0_cry_6_Z ; wire un23_mulh_mc_0_cry_6_Y ; wire un23_mulh_mc_0_cry_7_Z ; wire un23_mulh_mc_0_cry_7_Y ; wire un23_mulh_mc_0_cry_8_Z ; wire un23_mulh_mc_0_cry_8_Y ; wire un23_mulh_mc_0_cry_9_Z ; wire un23_mulh_mc_0_cry_9_Y ; wire un23_mulh_mc_0_cry_10_Z ; wire un23_mulh_mc_0_cry_10_Y ; wire un23_mulh_mc_0_cry_11_Z ; wire un23_mulh_mc_0_cry_11_Y ; wire un23_mulh_mc_0_cry_12_Z ; wire un23_mulh_mc_0_cry_12_Y ; wire un23_mulh_mc_0_cry_13_Z ; wire un23_mulh_mc_0_cry_13_Y ; wire un23_mulh_mc_0_cry_14_Z ; wire un23_mulh_mc_0_cry_14_Y ; wire un23_mulh_mc_0_cry_15_Z ; wire un23_mulh_mc_0_cry_15_Y ; wire un23_mulh_mc_0_cry_16_Z ; wire un23_mulh_mc_0_cry_16_Y ; wire un23_mulh_mc_0_cry_17_Z ; wire un23_mulh_mc_0_cry_17_Y ; wire un23_mulh_mc_0_cry_18_Z ; wire un23_mulh_mc_0_cry_18_Y ; wire un23_mulh_mc_0_cry_19_Z ; wire un23_mulh_mc_0_cry_19_Y ; wire un23_mulh_mc_0_cry_20_Z ; wire un23_mulh_mc_0_cry_20_Y ; wire un23_mulh_mc_0_cry_21_Z ; wire un23_mulh_mc_0_cry_21_Y ; wire un23_mulh_mc_0_cry_22_Z ; wire un23_mulh_mc_0_cry_22_Y ; wire un23_mulh_mc_0_cry_23_Z ; wire un23_mulh_mc_0_cry_23_Y ; wire un23_mulh_mc_0_cry_24_Z ; wire un23_mulh_mc_0_cry_24_Y ; wire un23_mulh_mc_0_cry_25_Z ; wire un23_mulh_mc_0_cry_25_Y ; wire un23_mulh_mc_0_cry_26_Z ; wire un23_mulh_mc_0_cry_26_Y ; wire un23_mulh_mc_0_cry_27_Z ; wire un23_mulh_mc_0_cry_27_Y ; wire un23_mulh_mc_0_cry_28_Z ; wire un23_mulh_mc_0_cry_28_Y ; wire exu_alu_result_int_cry_31_RNO_1_FCO ; wire exu_alu_result_int_cry_31_RNO_1_Y ; wire un23_mulh_mc_0_cry_29_Z ; wire un23_mulh_mc_0_cry_29_Y ; wire un16_next_div_divisor_1_cry_0_Z ; wire un16_next_div_divisor_1_cry_0_S ; wire un16_next_div_divisor_1_cry_0_Y ; wire un16_next_div_divisor_1_cry_1_Z ; wire un16_next_div_divisor_1_cry_1_S ; wire un16_next_div_divisor_1_cry_1_Y ; wire un16_next_div_divisor_1_cry_2_Z ; wire un16_next_div_divisor_1_cry_2_S ; wire un16_next_div_divisor_1_cry_2_Y ; wire un16_next_div_divisor_1_cry_3_Z ; wire un16_next_div_divisor_1_cry_3_S ; wire un16_next_div_divisor_1_cry_3_Y ; wire un16_next_div_divisor_1_cry_4_Z ; wire un16_next_div_divisor_1_cry_4_S ; wire un16_next_div_divisor_1_cry_4_Y ; wire un16_next_div_divisor_1_cry_5_Z ; wire un16_next_div_divisor_1_cry_5_S ; wire un16_next_div_divisor_1_cry_5_Y ; wire un16_next_div_divisor_1_cry_6_Z ; wire un16_next_div_divisor_1_cry_6_S ; wire un16_next_div_divisor_1_cry_6_Y ; wire un16_next_div_divisor_1_cry_7_Z ; wire un16_next_div_divisor_1_cry_7_S ; wire un16_next_div_divisor_1_cry_7_Y ; wire un16_next_div_divisor_1_cry_8_Z ; wire un16_next_div_divisor_1_cry_8_S ; wire un16_next_div_divisor_1_cry_8_Y ; wire un16_next_div_divisor_1_cry_9_Z ; wire un16_next_div_divisor_1_cry_9_S ; wire un16_next_div_divisor_1_cry_9_Y ; wire un16_next_div_divisor_1_cry_10_Z ; wire un16_next_div_divisor_1_cry_10_S ; wire un16_next_div_divisor_1_cry_10_Y ; wire un16_next_div_divisor_1_cry_11_Z ; wire un16_next_div_divisor_1_cry_11_S ; wire un16_next_div_divisor_1_cry_11_Y ; wire un16_next_div_divisor_1_cry_12_Z ; wire un16_next_div_divisor_1_cry_12_S ; wire un16_next_div_divisor_1_cry_12_Y ; wire un16_next_div_divisor_1_cry_13_Z ; wire un16_next_div_divisor_1_cry_13_S ; wire un16_next_div_divisor_1_cry_13_Y ; wire un16_next_div_divisor_1_cry_14_Z ; wire un16_next_div_divisor_1_cry_14_S ; wire un16_next_div_divisor_1_cry_14_Y ; wire un16_next_div_divisor_1_cry_15_Z ; wire un16_next_div_divisor_1_cry_15_S ; wire un16_next_div_divisor_1_cry_15_Y ; wire un16_next_div_divisor_1_cry_16_Z ; wire un16_next_div_divisor_1_cry_16_S ; wire un16_next_div_divisor_1_cry_16_Y ; wire un16_next_div_divisor_1_cry_17_Z ; wire un16_next_div_divisor_1_cry_17_S ; wire un16_next_div_divisor_1_cry_17_Y ; wire un16_next_div_divisor_1_cry_18_Z ; wire un16_next_div_divisor_1_cry_18_S ; wire un16_next_div_divisor_1_cry_18_Y ; wire un16_next_div_divisor_1_cry_19_Z ; wire un16_next_div_divisor_1_cry_19_S ; wire un16_next_div_divisor_1_cry_19_Y ; wire un16_next_div_divisor_1_cry_20_Z ; wire un16_next_div_divisor_1_cry_20_S ; wire un16_next_div_divisor_1_cry_20_Y ; wire un16_next_div_divisor_1_cry_21_Z ; wire un16_next_div_divisor_1_cry_21_S ; wire un16_next_div_divisor_1_cry_21_Y ; wire un16_next_div_divisor_1_cry_22_Z ; wire un16_next_div_divisor_1_cry_22_S ; wire un16_next_div_divisor_1_cry_22_Y ; wire un16_next_div_divisor_1_cry_23_Z ; wire un16_next_div_divisor_1_cry_23_S ; wire un16_next_div_divisor_1_cry_23_Y ; wire un16_next_div_divisor_1_cry_24_Z ; wire un16_next_div_divisor_1_cry_24_S ; wire un16_next_div_divisor_1_cry_24_Y ; wire un16_next_div_divisor_1_cry_25_Z ; wire un16_next_div_divisor_1_cry_25_S ; wire un16_next_div_divisor_1_cry_25_Y ; wire un16_next_div_divisor_1_cry_26_Z ; wire un16_next_div_divisor_1_cry_26_S ; wire un16_next_div_divisor_1_cry_26_Y ; wire un16_next_div_divisor_1_cry_27_Z ; wire un16_next_div_divisor_1_cry_27_S ; wire un16_next_div_divisor_1_cry_27_Y ; wire un16_next_div_divisor_1_cry_28_Z ; wire un16_next_div_divisor_1_cry_28_S ; wire un16_next_div_divisor_1_cry_28_Y ; wire un16_next_div_divisor_1_cry_29_Z ; wire un16_next_div_divisor_1_cry_29_S ; wire un16_next_div_divisor_1_cry_29_Y ; wire un16_next_div_divisor_1_s_31_FCO ; wire un16_next_div_divisor_1_s_31_S ; wire un16_next_div_divisor_1_s_31_Y ; wire un16_next_div_divisor_1_cry_30_Z ; wire un16_next_div_divisor_1_cry_30_S ; wire un16_next_div_divisor_1_cry_30_Y ; wire un6_exu_alu_result_0_cry_1_Z ; wire un6_exu_alu_result_0_cry_1_S ; wire un6_exu_alu_result_0_cry_1_Y ; wire un6_exu_alu_result_0_cry_2_Z ; wire un6_exu_alu_result_0_cry_2_Y ; wire un6_exu_alu_result_0_cry_3_Z ; wire un6_exu_alu_result_0_cry_3_Y ; wire un6_exu_alu_result_0_cry_4_Z ; wire un6_exu_alu_result_0_cry_4_Y ; wire un6_exu_alu_result_0_cry_5_Z ; wire un6_exu_alu_result_0_cry_5_Y ; wire un6_exu_alu_result_0_cry_6_Z ; wire un6_exu_alu_result_0_cry_6_Y ; wire un6_exu_alu_result_0_cry_7_Z ; wire un6_exu_alu_result_0_cry_7_Y ; wire un6_exu_alu_result_0_cry_8_Z ; wire un6_exu_alu_result_0_cry_8_Y ; wire un6_exu_alu_result_0_cry_9_Z ; wire un6_exu_alu_result_0_cry_9_Y ; wire un6_exu_alu_result_0_cry_10_Z ; wire un6_exu_alu_result_0_cry_10_Y ; wire un6_exu_alu_result_0_cry_11_Z ; wire un6_exu_alu_result_0_cry_11_Y ; wire un6_exu_alu_result_0_cry_12_Z ; wire un6_exu_alu_result_0_cry_12_Y ; wire un6_exu_alu_result_0_cry_13_Z ; wire un6_exu_alu_result_0_cry_13_Y ; wire un6_exu_alu_result_0_cry_14_Z ; wire un6_exu_alu_result_0_cry_14_Y ; wire un6_exu_alu_result_0_cry_15_Z ; wire un6_exu_alu_result_0_cry_15_Y ; wire un6_exu_alu_result_0_cry_16_Z ; wire un6_exu_alu_result_0_cry_16_Y ; wire un6_exu_alu_result_0_cry_17_Z ; wire un6_exu_alu_result_0_cry_17_Y ; wire un6_exu_alu_result_0_cry_18_Z ; wire un6_exu_alu_result_0_cry_18_Y ; wire un6_exu_alu_result_0_cry_19_Z ; wire un6_exu_alu_result_0_cry_19_Y ; wire un6_exu_alu_result_0_cry_20_Z ; wire un6_exu_alu_result_0_cry_20_Y ; wire un6_exu_alu_result_0_cry_21_Z ; wire un6_exu_alu_result_0_cry_21_Y ; wire un6_exu_alu_result_0_cry_22_Z ; wire un6_exu_alu_result_0_cry_22_Y ; wire un6_exu_alu_result_0_cry_23_Z ; wire un6_exu_alu_result_0_cry_23_Y ; wire un6_exu_alu_result_0_cry_24_Z ; wire un6_exu_alu_result_0_cry_24_Y ; wire un6_exu_alu_result_0_cry_25_Z ; wire un6_exu_alu_result_0_cry_25_Y ; wire un6_exu_alu_result_0_cry_26_Z ; wire un6_exu_alu_result_0_cry_26_Y ; wire un6_exu_alu_result_0_cry_27_Z ; wire un6_exu_alu_result_0_cry_27_Y ; wire un6_exu_alu_result_0_cry_28_Z ; wire un6_exu_alu_result_0_cry_28_Y ; wire un6_exu_alu_result_0_cry_29_Z ; wire un6_exu_alu_result_0_cry_29_Y ; wire un6_exu_alu_result_0_s_31_FCO ; wire un6_exu_alu_result_0_s_31_Y ; wire un6_exu_alu_result_0_cry_30_Z ; wire un6_exu_alu_result_0_cry_30_Y ; wire exu_alu_result_int_cry_0_Z ; wire exu_alu_result_int_cry_0_S ; wire start_slow_mul ; wire exu_alu_result_int ; wire exu_alu_result_int_cry_1_Z ; wire exu_alu_result_int_cry_1_Y ; wire exu_alu_result_int_cry_2_Z ; wire exu_alu_result_int_cry_2_Y ; wire exu_alu_result_int_cry_3_Z ; wire exu_alu_result_int_cry_3_Y ; wire exu_alu_result_int_cry_4_Z ; wire exu_alu_result_int_cry_4_Y ; wire exu_alu_result_int_cry_5_Z ; wire exu_alu_result_int_cry_5_Y ; wire exu_alu_result_int_cry_6_Z ; wire exu_alu_result_int_cry_6_Y ; wire exu_alu_result_int_cry_7_Z ; wire exu_alu_result_int_cry_7_Y ; wire exu_alu_result_int_cry_8_Z ; wire exu_alu_result_int_cry_8_Y ; wire exu_alu_result_int_cry_9_Z ; wire exu_alu_result_int_cry_9_Y ; wire exu_alu_result_int_cry_10_Z ; wire exu_alu_result_int_cry_10_Y ; wire exu_alu_result_int_cry_11_Z ; wire exu_alu_result_int_cry_11_Y ; wire exu_alu_result_int_cry_12_Z ; wire exu_alu_result_int_cry_12_Y ; wire exu_alu_result_int_cry_13_Z ; wire exu_alu_result_int_cry_13_Y ; wire exu_alu_result_int_cry_14_Z ; wire exu_alu_result_int_cry_14_Y ; wire exu_alu_result_int_cry_15_Z ; wire exu_alu_result_int_cry_15_Y ; wire exu_alu_result_int_cry_16_Z ; wire exu_alu_result_int_cry_16_Y ; wire exu_alu_result_int_cry_17_Z ; wire exu_alu_result_int_cry_17_Y ; wire exu_alu_result_int_cry_18_Z ; wire exu_alu_result_int_cry_18_Y ; wire exu_alu_result_int_cry_19_Z ; wire exu_alu_result_int_cry_19_Y ; wire exu_alu_result_int_cry_20_Z ; wire exu_alu_result_int_cry_20_Y ; wire exu_alu_result_int_cry_21_Z ; wire exu_alu_result_int_cry_21_Y ; wire exu_alu_result_int_cry_22_Z ; wire exu_alu_result_int_cry_22_Y ; wire exu_alu_result_int_cry_23_Z ; wire exu_alu_result_int_cry_23_Y ; wire exu_alu_result_int_cry_24_Z ; wire exu_alu_result_int_cry_24_Y ; wire exu_alu_result_int_cry_25_Z ; wire exu_alu_result_int_cry_25_Y ; wire exu_alu_result_int_cry_26_Z ; wire exu_alu_result_int_cry_26_Y ; wire exu_alu_result_int_cry_27_Z ; wire exu_alu_result_int_cry_27_Y ; wire exu_alu_result_int_cry_28_Z ; wire exu_alu_result_int_cry_28_Y ; wire exu_alu_result_int_cry_29_Z ; wire exu_alu_result_int_cry_29_Y ; wire exu_alu_result_int_cry_30_Z ; wire exu_alu_result_int_cry_30_Y ; wire exu_alu_result_int_s_32_FCO ; wire exu_alu_result_int_s_32_Y ; wire exu_alu_result_int_cry_31_Z ; wire exu_alu_result_int_cry_31_Y ; wire un6_exu_alu_result_1_cry_0_Z ; wire un6_exu_alu_result_1_cry_0_S ; wire un6_exu_alu_result_1_cry_0_Y ; wire un6_exu_alu_result_1_cry_1_Z ; wire un6_exu_alu_result_1_cry_1_Y ; wire un6_exu_alu_result_1_cry_2_Z ; wire un6_exu_alu_result_1_cry_2_Y ; wire un6_exu_alu_result_1_cry_3_Z ; wire un6_exu_alu_result_1_cry_3_Y ; wire un6_exu_alu_result_1_cry_4_Z ; wire un6_exu_alu_result_1_cry_4_Y ; wire un6_exu_alu_result_1_cry_5_Z ; wire un6_exu_alu_result_1_cry_5_Y ; wire un6_exu_alu_result_1_cry_6_Z ; wire un6_exu_alu_result_1_cry_6_Y ; wire un6_exu_alu_result_1_cry_7_Z ; wire un6_exu_alu_result_1_cry_7_Y ; wire un6_exu_alu_result_1_cry_8_Z ; wire un6_exu_alu_result_1_cry_8_Y ; wire un6_exu_alu_result_1_cry_9_Z ; wire un6_exu_alu_result_1_cry_9_Y ; wire un6_exu_alu_result_1_cry_10_Z ; wire un6_exu_alu_result_1_cry_10_Y ; wire un6_exu_alu_result_1_cry_11_Z ; wire un6_exu_alu_result_1_cry_11_Y ; wire un6_exu_alu_result_1_cry_12_Z ; wire un6_exu_alu_result_1_cry_12_Y ; wire un6_exu_alu_result_1_cry_13_Z ; wire un6_exu_alu_result_1_cry_13_Y ; wire un6_exu_alu_result_1_cry_14_Z ; wire un6_exu_alu_result_1_cry_14_Y ; wire un6_exu_alu_result_1_cry_15_Z ; wire un6_exu_alu_result_1_cry_15_Y ; wire un6_exu_alu_result_1_cry_16_Z ; wire un6_exu_alu_result_1_cry_16_Y ; wire un6_exu_alu_result_1_cry_17_Z ; wire un6_exu_alu_result_1_cry_17_Y ; wire un6_exu_alu_result_1_cry_18_Z ; wire un6_exu_alu_result_1_cry_18_Y ; wire un6_exu_alu_result_1_cry_19_Z ; wire un6_exu_alu_result_1_cry_19_Y ; wire un6_exu_alu_result_1_cry_20_Z ; wire un6_exu_alu_result_1_cry_20_Y ; wire un6_exu_alu_result_1_cry_21_Z ; wire un6_exu_alu_result_1_cry_21_Y ; wire un6_exu_alu_result_1_cry_22_Z ; wire un6_exu_alu_result_1_cry_22_Y ; wire un6_exu_alu_result_1_cry_23_Z ; wire un6_exu_alu_result_1_cry_23_Y ; wire un6_exu_alu_result_1_cry_24_Z ; wire un6_exu_alu_result_1_cry_24_Y ; wire un6_exu_alu_result_1_cry_25_Z ; wire un6_exu_alu_result_1_cry_25_Y ; wire un6_exu_alu_result_1_cry_26_Z ; wire un6_exu_alu_result_1_cry_26_Y ; wire un6_exu_alu_result_1_cry_27_Z ; wire un6_exu_alu_result_1_cry_27_Y ; wire un6_exu_alu_result_1_cry_28_Z ; wire un6_exu_alu_result_1_cry_28_Y ; wire un6_exu_alu_result_1_cry_29_Z ; wire un6_exu_alu_result_1_cry_29_Y ; wire un6_exu_alu_result_1_s_31_FCO ; wire un6_exu_alu_result_1_s_31_Y ; wire un6_exu_alu_result_1_cry_30_Z ; wire un6_exu_alu_result_1_cry_30_Y ; wire un1_dividend_cry_0_Z ; wire un1_dividend_cry_0_S ; wire un1_dividend_cry_0_Y ; wire un1_dividend_cry_1_Z ; wire un1_dividend_cry_1_S ; wire un1_dividend_cry_1_Y ; wire un1_dividend_cry_2_Z ; wire un1_dividend_cry_2_S ; wire un1_dividend_cry_2_Y ; wire un1_dividend_cry_3_Z ; wire un1_dividend_cry_3_S ; wire un1_dividend_cry_3_Y ; wire un1_dividend_cry_4_Z ; wire un1_dividend_cry_4_S ; wire un1_dividend_cry_4_Y ; wire un1_dividend_cry_5_Z ; wire un1_dividend_cry_5_S ; wire un1_dividend_cry_5_Y ; wire un1_dividend_cry_6_Z ; wire un1_dividend_cry_6_S ; wire un1_dividend_cry_6_Y ; wire un1_dividend_cry_7_Z ; wire un1_dividend_cry_7_S ; wire un1_dividend_cry_7_Y ; wire un1_dividend_cry_8_Z ; wire un1_dividend_cry_8_S ; wire un1_dividend_cry_8_Y ; wire un1_dividend_cry_9_Z ; wire un1_dividend_cry_9_S ; wire un1_dividend_cry_9_Y ; wire un1_dividend_cry_10_Z ; wire un1_dividend_cry_10_S ; wire un1_dividend_cry_10_Y ; wire un1_dividend_cry_11_Z ; wire un1_dividend_cry_11_S ; wire un1_dividend_cry_11_Y ; wire un1_dividend_cry_12_Z ; wire un1_dividend_cry_12_S ; wire un1_dividend_cry_12_Y ; wire un1_dividend_cry_13_Z ; wire un1_dividend_cry_13_S ; wire un1_dividend_cry_13_Y ; wire un1_dividend_cry_14_Z ; wire un1_dividend_cry_14_S ; wire un1_dividend_cry_14_Y ; wire un1_dividend_cry_15_Z ; wire un1_dividend_cry_15_S ; wire un1_dividend_cry_15_Y ; wire un1_dividend_cry_16_Z ; wire un1_dividend_cry_16_S ; wire un1_dividend_cry_16_Y ; wire un1_dividend_cry_17_Z ; wire un1_dividend_cry_17_S ; wire un1_dividend_cry_17_Y ; wire un1_dividend_cry_18_Z ; wire un1_dividend_cry_18_S ; wire un1_dividend_cry_18_Y ; wire un1_dividend_cry_19_Z ; wire un1_dividend_cry_19_S ; wire un1_dividend_cry_19_Y ; wire un1_dividend_cry_20_Z ; wire un1_dividend_cry_20_S ; wire un1_dividend_cry_20_Y ; wire un1_dividend_cry_21_Z ; wire un1_dividend_cry_21_S ; wire un1_dividend_cry_21_Y ; wire un1_dividend_cry_22_Z ; wire un1_dividend_cry_22_S ; wire un1_dividend_cry_22_Y ; wire un1_dividend_cry_23_Z ; wire un1_dividend_cry_23_S ; wire un1_dividend_cry_23_Y ; wire un1_dividend_cry_24_Z ; wire un1_dividend_cry_24_S ; wire un1_dividend_cry_24_Y ; wire un1_dividend_cry_25_Z ; wire un1_dividend_cry_25_S ; wire un1_dividend_cry_25_Y ; wire un1_dividend_cry_26_Z ; wire un1_dividend_cry_26_S ; wire un1_dividend_cry_26_Y ; wire un1_dividend_cry_27_Z ; wire un1_dividend_cry_27_S ; wire un1_dividend_cry_27_Y ; wire un1_dividend_cry_28_Z ; wire un1_dividend_cry_28_S ; wire un1_dividend_cry_28_Y ; wire un1_dividend_cry_29_Z ; wire un1_dividend_cry_29_S ; wire un1_dividend_cry_29_Y ; wire un1_dividend_cry_30_Z ; wire un1_dividend_cry_30_S ; wire un1_dividend_cry_30_Y ; wire un1_dividend_cry_31_Z ; wire un1_dividend_cry_31_S ; wire un1_dividend_cry_31_Y ; wire un1_dividend_cry_32_Z ; wire un1_dividend_cry_32_S ; wire un1_dividend_cry_32_Y ; wire un1_dividend_cry_33_Z ; wire un1_dividend_cry_33_S ; wire un1_dividend_cry_33_Y ; wire un1_dividend_cry_34_Z ; wire un1_dividend_cry_34_S ; wire un1_dividend_cry_34_Y ; wire un1_dividend_cry_35_Z ; wire un1_dividend_cry_35_S ; wire un1_dividend_cry_35_Y ; wire un1_dividend_cry_36_Z ; wire un1_dividend_cry_36_S ; wire un1_dividend_cry_36_Y ; wire un1_dividend_cry_37_Z ; wire un1_dividend_cry_37_S ; wire un1_dividend_cry_37_Y ; wire un1_dividend_cry_38_Z ; wire un1_dividend_cry_38_S ; wire un1_dividend_cry_38_Y ; wire un1_dividend_cry_39_Z ; wire un1_dividend_cry_39_S ; wire un1_dividend_cry_39_Y ; wire un1_dividend_cry_40_Z ; wire un1_dividend_cry_40_S ; wire un1_dividend_cry_40_Y ; wire un1_dividend_cry_41_Z ; wire un1_dividend_cry_41_S ; wire un1_dividend_cry_41_Y ; wire un1_dividend_cry_42_Z ; wire un1_dividend_cry_42_S ; wire un1_dividend_cry_42_Y ; wire un1_dividend_cry_43_Z ; wire un1_dividend_cry_43_S ; wire un1_dividend_cry_43_Y ; wire un1_dividend_cry_44_Z ; wire un1_dividend_cry_44_S ; wire un1_dividend_cry_44_Y ; wire un1_dividend_cry_45_Z ; wire un1_dividend_cry_45_S ; wire un1_dividend_cry_45_Y ; wire un1_dividend_cry_46_Z ; wire un1_dividend_cry_46_S ; wire un1_dividend_cry_46_Y ; wire un1_dividend_cry_47_Z ; wire un1_dividend_cry_47_S ; wire un1_dividend_cry_47_Y ; wire un1_dividend_cry_48_Z ; wire un1_dividend_cry_48_S ; wire un1_dividend_cry_48_Y ; wire un1_dividend_cry_49_Z ; wire un1_dividend_cry_49_S ; wire un1_dividend_cry_49_Y ; wire un1_dividend_cry_50_Z ; wire un1_dividend_cry_50_S ; wire un1_dividend_cry_50_Y ; wire un1_dividend_cry_51_Z ; wire un1_dividend_cry_51_S ; wire un1_dividend_cry_51_Y ; wire un1_dividend_cry_52_Z ; wire un1_dividend_cry_52_S ; wire un1_dividend_cry_52_Y ; wire un1_dividend_cry_53_Z ; wire un1_dividend_cry_53_S ; wire un1_dividend_cry_53_Y ; wire un1_dividend_cry_54_Z ; wire un1_dividend_cry_54_S ; wire un1_dividend_cry_54_Y ; wire un1_dividend_cry_55_Z ; wire un1_dividend_cry_55_S ; wire un1_dividend_cry_55_Y ; wire un1_dividend_cry_56_Z ; wire un1_dividend_cry_56_S ; wire un1_dividend_cry_56_Y ; wire un1_dividend_cry_57_Z ; wire un1_dividend_cry_57_S ; wire un1_dividend_cry_57_Y ; wire un1_dividend_cry_58_Z ; wire un1_dividend_cry_58_S ; wire un1_dividend_cry_58_Y ; wire un1_dividend_cry_59_Z ; wire un1_dividend_cry_59_S ; wire un1_dividend_cry_59_Y ; wire un1_dividend_cry_60_Z ; wire un1_dividend_cry_60_S ; wire un1_dividend_cry_60_Y ; wire un1_dividend_cry_61_Z ; wire un1_dividend_cry_61_S ; wire un1_dividend_cry_61_Y ; wire un1_dividend_cry_62_Z ; wire un1_dividend_cry_62_S ; wire un1_dividend_cry_62_Y ; wire un120_exu_alu_result_cry_0_Z ; wire un120_exu_alu_result_cry_0_S ; wire un120_exu_alu_result_cry_0_Y ; wire un120_exu_alu_result_cry_1_Z ; wire un120_exu_alu_result_cry_1_S ; wire un120_exu_alu_result_cry_1_Y ; wire un120_exu_alu_result_cry_2_Z ; wire un120_exu_alu_result_cry_2_S ; wire un120_exu_alu_result_cry_2_Y ; wire un120_exu_alu_result_cry_3_Z ; wire un120_exu_alu_result_cry_3_S ; wire un120_exu_alu_result_cry_3_Y ; wire un120_exu_alu_result_cry_4_Z ; wire un120_exu_alu_result_cry_4_S ; wire un120_exu_alu_result_cry_4_Y ; wire un120_exu_alu_result_cry_5_Z ; wire un120_exu_alu_result_cry_5_S ; wire un120_exu_alu_result_cry_5_Y ; wire un120_exu_alu_result_cry_6_Z ; wire un120_exu_alu_result_cry_6_S ; wire un120_exu_alu_result_cry_6_Y ; wire un120_exu_alu_result_cry_7_Z ; wire un120_exu_alu_result_cry_7_S ; wire un120_exu_alu_result_cry_7_Y ; wire un120_exu_alu_result_cry_8_Z ; wire un120_exu_alu_result_cry_8_S ; wire un120_exu_alu_result_cry_8_Y ; wire un120_exu_alu_result_cry_9_Z ; wire un120_exu_alu_result_cry_9_S ; wire un120_exu_alu_result_cry_9_Y ; wire un120_exu_alu_result_cry_10_Z ; wire un120_exu_alu_result_cry_10_S ; wire un120_exu_alu_result_cry_10_Y ; wire un120_exu_alu_result_cry_11_Z ; wire un120_exu_alu_result_cry_11_S ; wire un120_exu_alu_result_cry_11_Y ; wire un120_exu_alu_result_cry_12_Z ; wire un120_exu_alu_result_cry_12_S ; wire un120_exu_alu_result_cry_12_Y ; wire un120_exu_alu_result_cry_13_Z ; wire un120_exu_alu_result_cry_13_S ; wire un120_exu_alu_result_cry_13_Y ; wire un120_exu_alu_result_cry_14_Z ; wire un120_exu_alu_result_cry_14_S ; wire un120_exu_alu_result_cry_14_Y ; wire un120_exu_alu_result_cry_15_Z ; wire un120_exu_alu_result_cry_15_S ; wire un120_exu_alu_result_cry_15_Y ; wire un120_exu_alu_result_cry_16_Z ; wire un120_exu_alu_result_cry_16_S ; wire un120_exu_alu_result_cry_16_Y ; wire un120_exu_alu_result_cry_17_Z ; wire un120_exu_alu_result_cry_17_S ; wire un120_exu_alu_result_cry_17_Y ; wire un120_exu_alu_result_cry_18_Z ; wire un120_exu_alu_result_cry_18_S ; wire un120_exu_alu_result_cry_18_Y ; wire un120_exu_alu_result_cry_19_Z ; wire un120_exu_alu_result_cry_19_S ; wire un120_exu_alu_result_cry_19_Y ; wire un120_exu_alu_result_cry_20_Z ; wire un120_exu_alu_result_cry_20_S ; wire un120_exu_alu_result_cry_20_Y ; wire un120_exu_alu_result_cry_21_Z ; wire un120_exu_alu_result_cry_21_S ; wire un120_exu_alu_result_cry_21_Y ; wire un120_exu_alu_result_cry_22_Z ; wire un120_exu_alu_result_cry_22_S ; wire un120_exu_alu_result_cry_22_Y ; wire un120_exu_alu_result_cry_23_Z ; wire un120_exu_alu_result_cry_23_S ; wire un120_exu_alu_result_cry_23_Y ; wire un120_exu_alu_result_cry_24_Z ; wire un120_exu_alu_result_cry_24_S ; wire un120_exu_alu_result_cry_24_Y ; wire un120_exu_alu_result_cry_25_Z ; wire un120_exu_alu_result_cry_25_S ; wire un120_exu_alu_result_cry_25_Y ; wire un120_exu_alu_result_cry_26_Z ; wire un120_exu_alu_result_cry_26_S ; wire un120_exu_alu_result_cry_26_Y ; wire un120_exu_alu_result_cry_27_Z ; wire un120_exu_alu_result_cry_27_S ; wire un120_exu_alu_result_cry_27_Y ; wire un120_exu_alu_result_cry_28_Z ; wire un120_exu_alu_result_cry_28_S ; wire un120_exu_alu_result_cry_28_Y ; wire un120_exu_alu_result_cry_29_Z ; wire un120_exu_alu_result_cry_29_S ; wire un120_exu_alu_result_cry_29_Y ; wire un120_exu_alu_result_cry_30_Z ; wire un120_exu_alu_result_cry_30_S ; wire un120_exu_alu_result_cry_30_Y ; wire un120_exu_alu_result_i ; wire un120_exu_alu_result_cry_31_S ; wire un120_exu_alu_result_cry_31_Y ; wire un128_exu_alu_result_cry_0_Z ; wire un128_exu_alu_result_cry_0_S ; wire un128_exu_alu_result_cry_0_Y ; wire un128_exu_alu_result_cry_1_Z ; wire un128_exu_alu_result_cry_1_S ; wire un128_exu_alu_result_cry_1_Y ; wire un128_exu_alu_result_cry_2_Z ; wire un128_exu_alu_result_cry_2_S ; wire un128_exu_alu_result_cry_2_Y ; wire un128_exu_alu_result_cry_3_Z ; wire un128_exu_alu_result_cry_3_S ; wire un128_exu_alu_result_cry_3_Y ; wire un128_exu_alu_result_cry_4_Z ; wire un128_exu_alu_result_cry_4_S ; wire un128_exu_alu_result_cry_4_Y ; wire un128_exu_alu_result_cry_5_Z ; wire un128_exu_alu_result_cry_5_S ; wire un128_exu_alu_result_cry_5_Y ; wire un128_exu_alu_result_cry_6_Z ; wire un128_exu_alu_result_cry_6_S ; wire un128_exu_alu_result_cry_6_Y ; wire un128_exu_alu_result_cry_7_Z ; wire un128_exu_alu_result_cry_7_S ; wire un128_exu_alu_result_cry_7_Y ; wire un128_exu_alu_result_cry_8_Z ; wire un128_exu_alu_result_cry_8_S ; wire un128_exu_alu_result_cry_8_Y ; wire un128_exu_alu_result_cry_9_Z ; wire un128_exu_alu_result_cry_9_S ; wire un128_exu_alu_result_cry_9_Y ; wire un128_exu_alu_result_cry_10_Z ; wire un128_exu_alu_result_cry_10_S ; wire un128_exu_alu_result_cry_10_Y ; wire un128_exu_alu_result_cry_11_Z ; wire un128_exu_alu_result_cry_11_S ; wire un128_exu_alu_result_cry_11_Y ; wire un128_exu_alu_result_cry_12_Z ; wire un128_exu_alu_result_cry_12_S ; wire un128_exu_alu_result_cry_12_Y ; wire un128_exu_alu_result_cry_13_Z ; wire un128_exu_alu_result_cry_13_S ; wire un128_exu_alu_result_cry_13_Y ; wire un128_exu_alu_result_cry_14_Z ; wire un128_exu_alu_result_cry_14_S ; wire un128_exu_alu_result_cry_14_Y ; wire un128_exu_alu_result_cry_15_Z ; wire un128_exu_alu_result_cry_15_S ; wire un128_exu_alu_result_cry_15_Y ; wire un128_exu_alu_result_cry_16_Z ; wire un128_exu_alu_result_cry_16_S ; wire un128_exu_alu_result_cry_16_Y ; wire un128_exu_alu_result_cry_17_Z ; wire un128_exu_alu_result_cry_17_S ; wire un128_exu_alu_result_cry_17_Y ; wire un128_exu_alu_result_cry_18_Z ; wire un128_exu_alu_result_cry_18_S ; wire un128_exu_alu_result_cry_18_Y ; wire un128_exu_alu_result_cry_19_Z ; wire un128_exu_alu_result_cry_19_S ; wire un128_exu_alu_result_cry_19_Y ; wire un128_exu_alu_result_cry_20_Z ; wire un128_exu_alu_result_cry_20_S ; wire un128_exu_alu_result_cry_20_Y ; wire un128_exu_alu_result_cry_21_Z ; wire un128_exu_alu_result_cry_21_S ; wire un128_exu_alu_result_cry_21_Y ; wire un128_exu_alu_result_cry_22_Z ; wire un128_exu_alu_result_cry_22_S ; wire un128_exu_alu_result_cry_22_Y ; wire un128_exu_alu_result_cry_23_Z ; wire un128_exu_alu_result_cry_23_S ; wire un128_exu_alu_result_cry_23_Y ; wire un128_exu_alu_result_cry_24_Z ; wire un128_exu_alu_result_cry_24_S ; wire un128_exu_alu_result_cry_24_Y ; wire un128_exu_alu_result_cry_25_Z ; wire un128_exu_alu_result_cry_25_S ; wire un128_exu_alu_result_cry_25_Y ; wire un128_exu_alu_result_cry_26_Z ; wire un128_exu_alu_result_cry_26_S ; wire un128_exu_alu_result_cry_26_Y ; wire un128_exu_alu_result_cry_27_Z ; wire un128_exu_alu_result_cry_27_S ; wire un128_exu_alu_result_cry_27_Y ; wire un128_exu_alu_result_cry_28_Z ; wire un128_exu_alu_result_cry_28_S ; wire un128_exu_alu_result_cry_28_Y ; wire un128_exu_alu_result_cry_29_Z ; wire un128_exu_alu_result_cry_29_S ; wire un128_exu_alu_result_cry_29_Y ; wire un128_exu_alu_result_cry_30_Z ; wire un128_exu_alu_result_cry_30_S ; wire un128_exu_alu_result_cry_30_Y ; wire un128_exu_alu_result_i ; wire un128_exu_alu_result_cry_31_S ; wire un128_exu_alu_result_cry_31_Y ; wire un152_exu_alu_result_1_I_1_S ; wire un152_exu_alu_result_1_I_1_Y ; wire un152_exu_alu_result_1_I_9_S ; wire un152_exu_alu_result_1_I_9_Y ; wire un152_exu_alu_result_1_I_15_S ; wire un152_exu_alu_result_1_I_15_Y ; wire un152_exu_alu_result_1_I_51_S ; wire un152_exu_alu_result_1_I_51_Y ; wire un152_exu_alu_result_1_I_75_S ; wire un152_exu_alu_result_1_I_75_Y ; wire un152_exu_alu_result_1_I_33_S ; wire un152_exu_alu_result_1_I_33_Y ; wire un152_exu_alu_result_1_I_39_S ; wire un152_exu_alu_result_1_I_39_Y ; wire un152_exu_alu_result_1_I_27_S ; wire un152_exu_alu_result_1_I_27_Y ; wire un152_exu_alu_result_1_I_93_S ; wire un152_exu_alu_result_1_I_93_Y ; wire un152_exu_alu_result_1_I_57_S ; wire un152_exu_alu_result_1_I_57_Y ; wire un152_exu_alu_result_1_I_63_S ; wire un152_exu_alu_result_1_I_63_Y ; wire un152_exu_alu_result_1_I_21_S ; wire un152_exu_alu_result_1_I_21_Y ; wire un152_exu_alu_result_1_I_69_S ; wire un152_exu_alu_result_1_I_69_Y ; wire un152_exu_alu_result_1_I_81_S ; wire un152_exu_alu_result_1_I_81_Y ; wire un152_exu_alu_result_1_I_87_S ; wire un152_exu_alu_result_1_I_87_Y ; wire un152_exu_alu_result_1_I_45_S ; wire un152_exu_alu_result_1_I_45_Y ; wire next_dividend_s_0_4127_FCO ; wire next_dividend_s_0_4127_S ; wire next_dividend_s_0_4127_Y ; wire next_dividend_cry_0 ; wire next_dividend_cry_0_0_Y ; wire next_dividend_0_sqmuxa_Z ; wire un1_next_dividend_0_sqmuxa_Z ; wire next_dividend_cry_1 ; wire next_dividend_cry_1_0_Y ; wire next_dividend_cry_2 ; wire next_dividend_cry_2_0_Y ; wire next_dividend_cry_3 ; wire next_dividend_cry_3_0_Y ; wire next_dividend_cry_4 ; wire next_dividend_cry_4_0_Y ; wire next_dividend_cry_5 ; wire next_dividend_cry_5_0_Y ; wire next_dividend_cry_6 ; wire next_dividend_cry_6_0_Y ; wire next_dividend_cry_7 ; wire next_dividend_cry_7_0_Y ; wire next_dividend_cry_8 ; wire next_dividend_cry_8_0_Y ; wire next_dividend_cry_9 ; wire next_dividend_cry_9_0_Y ; wire next_dividend_cry_10 ; wire next_dividend_cry_10_0_Y ; wire next_dividend_cry_11 ; wire next_dividend_cry_11_0_Y ; wire next_dividend_cry_12 ; wire next_dividend_cry_12_0_Y ; wire next_dividend_cry_13 ; wire next_dividend_cry_13_0_Y ; wire next_dividend_cry_14 ; wire next_dividend_cry_14_0_Y ; wire next_dividend_cry_15 ; wire next_dividend_cry_15_0_Y ; wire next_dividend_cry_16 ; wire next_dividend_cry_16_0_Y ; wire next_dividend_cry_17 ; wire next_dividend_cry_17_0_Y ; wire next_dividend_cry_18 ; wire next_dividend_cry_18_0_Y ; wire next_dividend_cry_19 ; wire next_dividend_cry_19_0_Y ; wire next_dividend_cry_20 ; wire next_dividend_cry_20_0_Y ; wire next_dividend_cry_21 ; wire next_dividend_cry_21_0_Y ; wire next_dividend_cry_22 ; wire next_dividend_cry_22_0_Y ; wire next_dividend_cry_23 ; wire next_dividend_cry_23_0_Y ; wire next_dividend_cry_24 ; wire next_dividend_cry_24_0_Y ; wire next_dividend_cry_25 ; wire next_dividend_cry_25_0_Y ; wire next_dividend_cry_26 ; wire next_dividend_cry_26_0_Y ; wire next_dividend_cry_27 ; wire next_dividend_cry_27_0_Y ; wire next_dividend_cry_28 ; wire next_dividend_cry_28_0_Y ; wire next_dividend_cry_29 ; wire next_dividend_cry_29_0_Y ; wire next_dividend_s_31_FCO ; wire next_dividend_s_31_Y ; wire next_dividend_axb_31_1_Z ; wire next_dividend_cry_30 ; wire next_dividend_cry_30_0_Y ; wire mul_div_cnt_s_4133_FCO ; wire mul_div_cnt_s_4133_S ; wire mul_div_cnt_s_4133_Y ; wire N_2275 ; wire N_1505 ; wire N_2293 ; wire N_1504 ; wire N_2291 ; wire N_1503 ; wire N_2287 ; wire N_1501 ; wire N_2289 ; wire N_1502 ; wire N_2299 ; wire N_1493 ; wire N_2283 ; wire N_1499 ; wire N_2281 ; wire N_1498 ; wire N_2151 ; wire N_1492 ; wire N_2297 ; wire N_1495 ; wire N_2277 ; wire N_1496 ; wire N_2285 ; wire N_1500 ; wire N_2279 ; wire N_1497 ; wire N_2295 ; wire N_1494 ; wire mul_mp_pmux_32_1_0_co1_9 ; wire mul_mp_pmux_32_1_0_wmux_20_S ; wire mul_mp_pmux_32_1_0_y21 ; wire mul_mp_pmux_32_1_0_y3_0 ; wire mul_mp_pmux_32_1_0_y1_0 ; wire mul_mp_pmux_32_1_0_y0_8 ; wire mul_mp_pmux_32_1_0_co0_9 ; wire mul_mp_pmux_32_1_0_wmux_19_S ; wire mul_mp_pmux_32_1_0_y5_0 ; wire mul_mp_pmux_32_1_0_y7_0 ; wire mul_mp_pmux_32_1_0_co1_8 ; wire mul_mp_pmux_32_1_0_wmux_18_S ; wire mul_mp_pmux_32_1_0_y0_7 ; wire mul_mp_pmux_32_1_0_co0_8 ; wire mul_mp_pmux_32_1_0_wmux_17_S ; wire mul_mp_pmux_32_1_0_co1_7 ; wire mul_mp_pmux_32_1_0_wmux_16_S ; wire mul_mp_pmux_32_1_0_y0_6 ; wire mul_mp_pmux_32_1_0_co0_7 ; wire mul_mp_pmux_32_1_0_wmux_15_S ; wire mul_mp_pmux_32_1_0_co1_6 ; wire mul_mp_pmux_32_1_0_wmux_14_S ; wire mul_mp_pmux_32_1_0_y0_5 ; wire mul_mp_pmux_32_1_0_co0_6 ; wire mul_mp_pmux_32_1_0_wmux_13_S ; wire mul_mp_pmux_32_1_0_co1_5 ; wire mul_mp_pmux_32_1_0_wmux_12_S ; wire mul_mp_pmux_32_1_0_y0_4 ; wire mul_mp_pmux_32_1_0_co0_5 ; wire mul_mp_pmux_32_1_0_wmux_11_S ; wire mul_mp_pmux_32_1_0_co1_4 ; wire mul_mp_pmux_32_1_0_wmux_10_S ; wire mul_mp_pmux ; wire mul_mp_pmux_32_1_0_y9 ; wire mul_mp_pmux_32_1_0_co0_4 ; wire mul_mp_pmux_32_1_0_wmux_9_S ; wire mul_mp_pmux_32_1_0_wmux_9_Y ; wire mul_mp_pmux_32_1_0_co1_3 ; wire mul_mp_pmux_32_1_0_wmux_8_S ; wire mul_mp_pmux_32_1_0_y3 ; wire mul_mp_pmux_32_1_0_y1 ; wire mul_mp_pmux_32_1_0_y0_3 ; wire mul_mp_pmux_32_1_0_co0_3 ; wire mul_mp_pmux_32_1_0_wmux_7_S ; wire mul_mp_pmux_32_1_0_y5 ; wire mul_mp_pmux_32_1_0_y7 ; wire mul_mp_pmux_32_1_0_co1_2 ; wire mul_mp_pmux_32_1_0_wmux_6_S ; wire mul_mp_pmux_32_1_0_y0_2 ; wire mul_mp_pmux_32_1_0_co0_2 ; wire mul_mp_pmux_32_1_0_wmux_5_S ; wire mul_mp_pmux_32_1_0_co1_1 ; wire mul_mp_pmux_32_1_0_wmux_4_S ; wire mul_mp_pmux_32_1_0_y0_1 ; wire mul_mp_pmux_32_1_0_co0_1 ; wire mul_mp_pmux_32_1_0_wmux_3_S ; wire mul_mp_pmux_32_1_0_co1_0 ; wire mul_mp_pmux_32_1_0_wmux_2_S ; wire mul_mp_pmux_32_1_0_y0_0 ; wire mul_mp_pmux_32_1_0_co0_0 ; wire mul_mp_pmux_32_1_0_wmux_1_S ; wire mul_mp_pmux_32_1_0_co1 ; wire mul_mp_pmux_32_1_0_wmux_0_S ; wire mul_mp_pmux_32_1_0_y0 ; wire mul_mp_pmux_32_1_0_co0 ; wire mul_mp_pmux_32_1_0_wmux_S ; wire N_1533 ; wire N_2123_i ; wire N_1643 ; wire N_870 ; wire N_2124_i ; wire N_873 ; wire exu_shifter_places57_Z ; wire exu_shifter_places58_Z ; wire exu_shifter_places_valid_1_0 ; wire N_73_mux ; wire start_m8_3_sx_Z ; wire start_m3_0_a3_2_Z ; wire slow_N_3_mux_i ; wire start_m8_3 ; wire start_m8_1_Z ; wire un5_mul_mc_sx ; wire un5_mul_mc ; wire un1_exu_mux_result27_1_Z ; wire exu_alu_operand0_valid ; wire exu_alu_operand1_valid ; wire N_1923 ; wire N_2122_i ; wire N_1041_1 ; wire N_3027 ; wire N_947 ; wire lsu_align_result_95_2_2_Z ; wire N_1250_i ; wire N_59 ; wire m29_0 ; wire exu_m4_0_a2_0_Z ; wire exu_m4_0_a2_1 ; wire exu_result_sn_N_6_mux ; wire exu_alu_result193_a0_3_Z ; wire start_m8_a1_0_Z ; wire exu_alu_result193_a0_3_1_Z ; wire d_N_3_mux ; wire exu_alu_result192_0_out ; wire un9_next_exu_result_reg_int_i ; wire next_exu_result_reg_int_sn_N_2 ; wire exu_alu_operand0_int_sn_N_4 ; wire exu_alu_operand0_int_sn_N_9 ; wire exu_shifter_places_sn_N_2 ; wire N_1279 ; wire N_1278 ; wire N_1276 ; wire N_1272 ; wire N_1267 ; wire N_1257 ; wire N_1270 ; wire N_1271 ; wire N_1253 ; wire N_1254 ; wire N_1255 ; wire N_1258 ; wire N_1261 ; wire N_1263 ; wire N_1264 ; wire N_1265 ; wire N_1266 ; wire N_1269 ; wire N_1275 ; wire N_1277 ; wire N_1281 ; wire N_1282 ; wire N_1283 ; wire N_1324 ; wire N_1325 ; wire N_1326 ; wire N_1327 ; wire N_1328 ; wire N_1329 ; wire N_1330 ; wire N_1331 ; wire N_1332 ; wire N_1333 ; wire N_1334 ; wire N_1336 ; wire N_1337 ; wire N_1339 ; wire N_1340 ; wire N_1341 ; wire N_1342 ; wire N_1343 ; wire N_1344 ; wire N_1345 ; wire N_1346 ; wire N_1347 ; wire N_1348 ; wire N_1349 ; wire N_1351 ; wire N_1352 ; wire N_1262 ; wire N_1256 ; wire N_1338 ; wire N_1268 ; wire N_2194 ; wire N_1723 ; wire N_1250 ; wire N_1323 ; wire N_1322 ; wire N_1350 ; wire N_1280 ; wire N_1335 ; wire exu_shifter_operand_valid_2_0_Z ; wire exu_alu_result_0_sqmuxa_2_a0_2_Z ; wire un8_mul_mp ; wire un120_exu_alu_result_cry_31_RNI2SGCO_Z ; wire un10_mul_mp ; wire mul_mp_e2 ; wire un17_start_div ; wire un5_div_result ; wire m23_1 ; wire N_2197 ; wire N_87 ; wire un11_start_div ; wire exu_N_7_0 ; wire exu_shifter_places_valid_sn_N_7_mux ; wire exu_alu_result_0_sqmuxa_3_2_0 ; wire un1_exu_alu_result212_1_d_1 ; wire exu_alu_result195_2_3_Z ; wire mul_mp_sn_N_6_mux ; wire N_493 ; wire exu_m1_e_2 ; wire exu_alu_operand0_int_sn_N_10_mux ; wire exu_alu_result196 ; wire exu_shifter_places_valid_3_0_Z ; wire exu_N_7 ; wire N_27_0 ; wire exu_m1_0_a2_1 ; wire exu_N_4_1 ; wire exu_alu_result194_Z ; wire exu_alu_result193 ; wire exu_m1_e_4_0_Z ; wire exu_alu_result195 ; wire exu_N_4 ; wire N_23 ; wire N_24 ; wire N_25 ; wire N_26 ; wire N_27 ; wire N_28 ; wire N_29 ; wire N_30 ; wire N_31 ; wire N_32 ; wire N_337 ; wire N_338 ; wire N_339 ; wire N_340 ; wire N_341 ; wire N_342 ; wire N_344 ; wire N_345 ; wire N_346 ; wire N_347 ; wire N_348 ; wire N_349 ; wire N_350 ; wire N_351 ; wire N_352 ; wire N_353 ; wire N_354 ; wire N_1029 ; wire N_1030 ; wire N_1031 ; wire N_1033 ; wire N_1034 ; wire N_1035 ; wire N_1036 ; wire N_1067 ; wire N_1068 ; wire N_1131 ; wire N_1132 ; wire N_1163 ; wire N_1164 ; wire N_1259 ; wire N_1260 ; wire N_1291 ; wire N_1292 ; wire N_1355 ; wire N_1356 ; wire N_1387 ; wire N_1388 ; wire N_1515 ; wire N_1516 ; wire N_1547 ; wire N_1548 ; wire N_1611 ; wire un6_next_div_divisor ; wire N_1612 ; wire N_1032 ; wire N_343 ; wire N_1649_2 ; wire N_1650_2 ; wire N_1664_2 ; wire N_1663_2 ; wire N_1662_2 ; wire N_1665_2 ; wire N_1678_2 ; wire N_1656_2 ; wire N_1657_2 ; wire N_1673_2 ; wire N_1676_2 ; wire N_1677_2 ; wire N_1674_2 ; wire N_1675_2 ; wire N_1655_2 ; wire N_1660_2 ; wire N_1659_2 ; wire N_1672_2 ; wire N_1667_2 ; wire N_1661_2 ; wire N_1671_2 ; wire N_1670_2 ; wire N_1658_2 ; wire N_1668_2 ; wire N_1669_2 ; wire N_1653_2 ; wire N_1652_2 ; wire N_1666_2 ; wire N_1651_2 ; wire N_1654_2 ; wire un15_next_res_pos_neg_22_Z ; wire un15_next_res_pos_neg_21_Z ; wire un15_next_res_pos_neg_20_Z ; wire un15_next_res_pos_neg_19_Z ; wire un15_next_res_pos_neg_18_Z ; wire un15_next_res_pos_neg_17_Z ; wire un15_next_res_pos_neg_16_Z ; wire N_2018 ; wire exu_alu_operand0_valid_u_RNIF99UVE_Z ; wire un3_alu_op_sel_int_2 ; wire N_1121 ; wire N_68 ; wire N_1533_1 ; wire exu_m4_0 ; wire N_512_1 ; wire N_1092_1 ; wire N_505_1 ; wire N_533_1 ; wire N_1664_1 ; wire N_1663_1 ; wire N_1662_1 ; wire N_1665_1 ; wire N_60 ; wire N_1678_1 ; wire N_1656_1 ; wire N_1657_1 ; wire N_1673_1 ; wire N_1676_1 ; wire N_1677_1 ; wire N_1674_1 ; wire N_1675_1 ; wire N_1655_1 ; wire N_1660_1 ; wire N_1659_1 ; wire N_1672_1 ; wire N_1667_1 ; wire N_1661_1 ; wire N_1671_1 ; wire N_1670_1 ; wire N_1658_1 ; wire N_1668_1 ; wire N_1669_1 ; wire N_1653_1 ; wire N_1652_1 ; wire N_1666_1 ; wire N_1651_1 ; wire N_1654_1 ; wire N_1353_1 ; wire N_1679 ; wire N_70 ; wire N_71 ; wire N_72 ; wire N_73 ; wire N_91 ; wire N_92 ; wire N_93 ; wire N_94 ; wire N_1095 ; wire N_1098 ; wire N_1099 ; wire N_1100 ; wire N_1101 ; wire N_1102 ; wire N_1103 ; wire N_1104 ; wire N_1105 ; wire N_1106 ; wire N_1107 ; wire N_1108 ; wire N_1109 ; wire N_1110 ; wire N_1115 ; wire N_1116 ; wire N_1118 ; wire N_1119 ; wire N_568 ; wire N_582 ; wire N_596 ; wire N_610 ; wire N_750 ; wire N_757 ; wire N_764 ; wire N_778 ; wire N_575 ; wire N_589 ; wire N_603 ; wire N_617 ; wire N_736 ; wire N_771 ; wire N_785 ; wire N_792 ; wire N_799 ; wire N_666 ; wire N_2887 ; wire N_2888 ; wire N_659 ; wire start_m7_0_a4_0_1_Z ; wire exu_m2_0_a2_7_2_Z ; wire un15_next_res_pos_neg_23_Z ; wire exu_alu_operand0_valid_u_0_a2_0_RNO_1_Z ; wire N_1896 ; wire N_429 ; wire N_978_2 ; wire lsu_align_result_54_3_2_1_Z ; wire lsu_align_result_54_3_1_1_Z ; wire lsu_align_result_54_3_9_1 ; wire lsu_align_result_54_3_10_1_Z ; wire N_1353 ; wire un15_next_res_pos_neg_28_Z ; wire d_N_5 ; wire N_430 ; wire N_1894 ; wire N_1895 ; wire N_2125_i ; wire N_452 ; wire N_2189 ; wire N_2190 ; wire N_543_1 ; wire N_858_2 ; wire N_844_2 ; wire N_1703_1 ; wire N_662_1 ; wire N_676_2 ; wire N_837_2 ; wire N_851_2 ; wire N_865_2 ; wire N_746_2 ; wire N_1705_2 ; wire N_522_1 ; wire N_634_1 ; wire N_1706_2 ; wire N_1704_1 ; wire N_1649_1 ; wire N_1650_1 ; wire N_2199_1 ; wire start_m3_0_a3_1_Z ; wire exu_m2_0_a2_5_Z ; wire N_432 ; wire N_433 ; wire N_585 ; wire N_613 ; wire N_753 ; wire N_760 ; wire N_767 ; wire N_781 ; wire N_578 ; wire N_592 ; wire N_606 ; wire N_620 ; wire N_739 ; wire N_774 ; wire N_788 ; wire N_795 ; wire N_690 ; wire N_704 ; wire N_718 ; wire N_732 ; wire N_453 ; wire N_683 ; wire N_697 ; wire N_711 ; wire N_816 ; wire N_823 ; wire N_830 ; wire N_880 ; wire N_13_0 ; wire N_725 ; wire N_599 ; wire N_571 ; wire N_1045 ; wire exu_N_5_mux_0 ; wire N_455 ; wire N_454 ; wire lsu_align_result_30_1_1_Z ; wire lsu_align_result_31_0_1_Z ; wire N_512 ; wire N_1092 ; wire N_505 ; wire N_533 ; wire un15_next_res_pos_neg_29_Z ; wire N_948 ; wire N_964 ; wire N_456 ; wire N_457 ; wire N_459 ; wire N_458 ; wire N_477_1 ; wire N_478_1 ; wire N_476_1 ; wire N_475_1 ; wire N_1481_1 ; wire N_1479_1 ; wire N_1482_1 ; wire N_1480_1 ; wire N_543_2 ; wire N_662_2 ; wire N_522_2 ; wire N_634_2 ; wire N_460 ; wire N_461 ; wire N_462 ; wire N_463 ; wire N_464 ; wire N_465 ; wire N_468 ; wire N_469 ; wire N_470 ; wire N_471 ; wire N_472 ; wire N_473 ; wire N_474 ; wire N_949 ; wire N_965 ; wire un1_exu_mux_result_valid_sel_m ; wire N_950 ; wire N_951 ; wire N_966 ; wire N_967 ; wire N_858 ; wire N_844 ; wire N_1703 ; wire N_676 ; wire N_837 ; wire N_851 ; wire N_865 ; wire N_746 ; wire N_1705 ; wire N_1706 ; wire N_1704 ; wire N_952 ; wire N_953 ; wire N_954 ; wire N_968 ; wire N_971 ; wire N_970 ; wire N_969 ; wire N_955 ; wire N_477_2 ; wire N_478_2 ; wire N_476_2 ; wire N_1475_2 ; wire N_1476_2 ; wire N_481_2 ; wire N_475_2 ; wire N_1481_2 ; wire N_1479_2 ; wire N_1482_2 ; wire N_979_1 ; wire N_1480_2 ; wire un7_next_res_pos_neg_0_Z ; wire d_m5_a0_2 ; wire N_956 ; wire N_957 ; wire N_958 ; wire N_959 ; wire N_960 ; wire N_961 ; wire N_972 ; wire N_973 ; wire N_974 ; wire N_975 ; wire N_976 ; wire N_977 ; wire N_980 ; wire N_981 ; wire N_982 ; wire N_983 ; wire N_482_1 ; wire N_1475_1 ; wire N_1476_1 ; wire N_481_1 ; wire N_979 ; wire N_978 ; wire N_479 ; wire N_480 ; wire N_984 ; wire N_985 ; wire N_986 ; wire N_1477 ; wire N_1478 ; wire N_1483 ; wire N_1484 ; wire N_1485 ; wire N_1486 ; wire N_1487 ; wire N_1488 ; wire N_1489 ; wire N_1490 ; wire N_482 ; wire exu_m2_0_a2_7_Z ; wire exu_alu_operand0_valid_u_0_a2_0_RNO_Z ; wire N_962_2 ; wire N_988 ; wire N_989 ; wire N_990 ; wire N_991 ; wire N_992 ; wire N_1955 ; wire N_3026 ; wire N_2300 ; wire N_2298 ; wire N_2296 ; wire N_2294 ; wire N_2292 ; wire N_2290 ; wire N_2288 ; wire N_2286 ; wire N_2284 ; wire N_2278 ; wire N_2276 ; wire N_2280 ; wire N_2282 ; wire N_987 ; wire start_m7_0_a4_0_3_Z ; wire exu_m2_0 ; wire N_962 ; wire N_993 ; wire N_2333 ; wire start_m8_0_Z ; wire exu_shifter_operand_valid_2_a3_1_Z ; wire exu_shifter_places_valid_2_a3_1_Z ; wire exu_alu_operand0_valid_u_0_a0_1_Z ; wire exu_shifter_operand_valid_2_a2_1_Z ; wire exu_shifter_places_valid_2_a4_Z ; wire exu_alu_operand0_valid_u_RNO_Z ; wire N_2274 ; wire exu_shifter_places_valid_0 ; wire exu_shifter_operand_valid_2_a3_Z ; wire exu_shifter_places_valid_2_a3_Z ; wire exu_shifter_places_valid_2_a2_Z ; wire exu_shifter_operand_valid_2_Z ; wire exu_shifter_places_valid_3_Z ; wire exu_alu_operand0_valid_u_0_a2_0_Z ; wire exu_shifter_operand_valid_0_Z ; wire N_1026 ; wire N_1850 ; wire N_1748 ; wire exu_shifter_operand_valid_Z ; wire start_div_Z ; wire lsu_align_result_valid_m ; CFG1 \exu_alu_operand1_RNILUBS7[1] ( .A(exu_alu_operand1_Z[1]), .Y(exu_alu_operand1_i_0[1]) ); defparam \exu_alu_operand1_RNILUBS7[1] .INIT=2'h1; CFG1 \exu_alu_operand1_RNIMVBS7[2] ( .A(exu_alu_operand1_Z[2]), .Y(exu_alu_operand1_i_0[2]) ); defparam \exu_alu_operand1_RNIMVBS7[2] .INIT=2'h1; CFG1 \exu_alu_operand1_RNIN0CS7[3] ( .A(exu_alu_operand1_Z[3]), .Y(exu_alu_operand1_i_0[3]) ); defparam \exu_alu_operand1_RNIN0CS7[3] .INIT=2'h1; CFG1 \exu_alu_operand1_RNIO1CS7[4] ( .A(exu_alu_operand1_Z[4]), .Y(exu_alu_operand1_i_0[4]) ); defparam \exu_alu_operand1_RNIO1CS7[4] .INIT=2'h1; CFG1 \exu_alu_operand1_RNIP2CS7[5] ( .A(exu_alu_operand1_Z[5]), .Y(exu_alu_operand1_i_0[5]) ); defparam \exu_alu_operand1_RNIP2CS7[5] .INIT=2'h1; CFG1 \exu_alu_operand1_RNIQ3CS7[6] ( .A(exu_alu_operand1_Z[6]), .Y(exu_alu_operand1_i_0[6]) ); defparam \exu_alu_operand1_RNIQ3CS7[6] .INIT=2'h1; CFG1 \exu_alu_operand1_RNIR4CS7[7] ( .A(exu_alu_operand1_Z[7]), .Y(exu_alu_operand1_i_0[7]) ); defparam \exu_alu_operand1_RNIR4CS7[7] .INIT=2'h1; CFG1 \exu_alu_operand1_RNIS5CS7[8] ( .A(exu_alu_operand1_Z[8]), .Y(exu_alu_operand1_i_0[8]) ); defparam \exu_alu_operand1_RNIS5CS7[8] .INIT=2'h1; CFG1 \exu_alu_operand1_RNIT6CS7[9] ( .A(exu_alu_operand1_Z[9]), .Y(exu_alu_operand1_i_0[9]) ); defparam \exu_alu_operand1_RNIT6CS7[9] .INIT=2'h1; CFG1 \exu_alu_operand1_RNI58984[10] ( .A(exu_alu_operand1_Z[10]), .Y(exu_alu_operand1_i_0[10]) ); defparam \exu_alu_operand1_RNI58984[10] .INIT=2'h1; CFG1 \exu_alu_operand1_RNI69984[11] ( .A(exu_alu_operand1_Z[11]), .Y(exu_alu_operand1_i_0[11]) ); defparam \exu_alu_operand1_RNI69984[11] .INIT=2'h1; CFG1 \exu_alu_operand1_RNI7A984[12] ( .A(exu_alu_operand1_Z[12]), .Y(exu_alu_operand1_i_0[12]) ); defparam \exu_alu_operand1_RNI7A984[12] .INIT=2'h1; CFG1 \exu_alu_operand1_RNI8B984[13] ( .A(exu_alu_operand1_Z[13]), .Y(exu_alu_operand1_i_0[13]) ); defparam \exu_alu_operand1_RNI8B984[13] .INIT=2'h1; CFG1 \exu_alu_operand1_RNI9C984[14] ( .A(exu_alu_operand1_Z[14]), .Y(exu_alu_operand1_i_0[14]) ); defparam \exu_alu_operand1_RNI9C984[14] .INIT=2'h1; CFG1 \exu_alu_operand1_RNIAD984[15] ( .A(exu_alu_operand1_Z[15]), .Y(exu_alu_operand1_i_0[15]) ); defparam \exu_alu_operand1_RNIAD984[15] .INIT=2'h1; CFG1 \exu_alu_operand1_RNIBE984[16] ( .A(exu_alu_operand1_Z[16]), .Y(exu_alu_operand1_i_0[16]) ); defparam \exu_alu_operand1_RNIBE984[16] .INIT=2'h1; CFG1 \exu_alu_operand1_RNICF984[17] ( .A(exu_alu_operand1_Z[17]), .Y(exu_alu_operand1_i_0[17]) ); defparam \exu_alu_operand1_RNICF984[17] .INIT=2'h1; CFG1 \exu_alu_operand1_RNIDG984[18] ( .A(exu_alu_operand1_Z[18]), .Y(exu_alu_operand1_i_0[18]) ); defparam \exu_alu_operand1_RNIDG984[18] .INIT=2'h1; CFG1 \exu_alu_operand1_RNIEH984[19] ( .A(exu_alu_operand1_Z[19]), .Y(exu_alu_operand1_i_0[19]) ); defparam \exu_alu_operand1_RNIEH984[19] .INIT=2'h1; CFG1 \exu_alu_operand1_RNI6AA84[20] ( .A(exu_alu_operand1_Z[20]), .Y(exu_alu_operand1_i_0[20]) ); defparam \exu_alu_operand1_RNI6AA84[20] .INIT=2'h1; CFG1 \exu_alu_operand1_RNI7BA84[21] ( .A(exu_alu_operand1_Z[21]), .Y(exu_alu_operand1_i_0[21]) ); defparam \exu_alu_operand1_RNI7BA84[21] .INIT=2'h1; CFG1 \exu_alu_operand1_RNI8CA84[22] ( .A(exu_alu_operand1_Z[22]), .Y(exu_alu_operand1_i_0[22]) ); defparam \exu_alu_operand1_RNI8CA84[22] .INIT=2'h1; CFG1 \exu_alu_operand1_RNI9DA84[23] ( .A(exu_alu_operand1_Z[23]), .Y(exu_alu_operand1_i_0[23]) ); defparam \exu_alu_operand1_RNI9DA84[23] .INIT=2'h1; CFG1 \exu_alu_operand1_RNIAEA84[24] ( .A(exu_alu_operand1_Z[24]), .Y(exu_alu_operand1_i_0[24]) ); defparam \exu_alu_operand1_RNIAEA84[24] .INIT=2'h1; CFG1 \exu_alu_operand1_RNIBFA84[25] ( .A(exu_alu_operand1_Z[25]), .Y(exu_alu_operand1_i_0[25]) ); defparam \exu_alu_operand1_RNIBFA84[25] .INIT=2'h1; CFG1 \exu_alu_operand1_RNICGA84[26] ( .A(exu_alu_operand1_Z[26]), .Y(exu_alu_operand1_i_0[26]) ); defparam \exu_alu_operand1_RNICGA84[26] .INIT=2'h1; CFG1 \exu_alu_operand1_RNIDHA84[27] ( .A(exu_alu_operand1_Z[27]), .Y(exu_alu_operand1_i_0[27]) ); defparam \exu_alu_operand1_RNIDHA84[27] .INIT=2'h1; CFG1 \exu_alu_operand1_RNIEIA84[28] ( .A(exu_alu_operand1_Z[28]), .Y(exu_alu_operand1_i_0[28]) ); defparam \exu_alu_operand1_RNIEIA84[28] .INIT=2'h1; CFG1 \exu_alu_operand1_RNIFJA84[29] ( .A(exu_alu_operand1_Z[29]), .Y(exu_alu_operand1_i_0[29]) ); defparam \exu_alu_operand1_RNIFJA84[29] .INIT=2'h1; CFG1 \exu_alu_operand1_RNI7CB84[30] ( .A(exu_alu_operand1_Z[30]), .Y(exu_alu_operand1_i_0[30]) ); defparam \exu_alu_operand1_RNI7CB84[30] .INIT=2'h1; CFG1 un128_exu_alu_result_cry_31_RNO ( .A(exu_alu_operand1_Z[31]), .Y(exu_alu_operand1_i[31]) ); defparam un128_exu_alu_result_cry_31_RNO.INIT=2'h1; CFG1 slow_mul_ack_RNIRFHITD_0 ( .A(slow_mul_ack_RNIRFHITD_Z), .Y(N_6076_i) ); defparam slow_mul_ack_RNIRFHITD_0.INIT=2'h1; CFG1 div_ack_RNIAS9O01_0 ( .A(next_quotient_0_sqmuxa), .Y(next_quotient_0_sqmuxa_i) ); defparam div_ack_RNIAS9O01_0.INIT=2'h1; // @46:11473 SLE \quotient[31] ( .Q(quotient_Z[31]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(quotient_RNO_Z[31]), .LAT(GND), .SD(GND), .SLn(next_quotient_0_sqmuxa_i) ); CFG2 \quotient_RNO[31] ( .A(quotientce_Z[31]), .B(next_quotient_0_sqmuxa), .Y(quotient_RNO_Z[31]) ); defparam \quotient_RNO[31] .INIT=4'hE; // @46:11473 SLE \quotient[30] ( .Q(quotient_Z[30]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(quotient_RNO_Z[30]), .LAT(GND), .SD(GND), .SLn(next_quotient_0_sqmuxa_i) ); CFG2 \quotient_RNO[30] ( .A(quotientce_Z[30]), .B(next_quotient_0_sqmuxa), .Y(quotient_RNO_Z[30]) ); defparam \quotient_RNO[30] .INIT=4'hE; // @46:11473 SLE \quotient[29] ( .Q(quotient_Z[29]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(quotient_RNO_Z[29]), .LAT(GND), .SD(GND), .SLn(next_quotient_0_sqmuxa_i) ); CFG2 \quotient_RNO[29] ( .A(quotientce_Z[29]), .B(next_quotient_0_sqmuxa), .Y(quotient_RNO_Z[29]) ); defparam \quotient_RNO[29] .INIT=4'hE; // @46:11473 SLE \quotient[28] ( .Q(quotient_Z[28]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(quotient_RNO_Z[28]), .LAT(GND), .SD(GND), .SLn(next_quotient_0_sqmuxa_i) ); CFG2 \quotient_RNO[28] ( .A(quotientce_Z[28]), .B(next_quotient_0_sqmuxa), .Y(quotient_RNO_Z[28]) ); defparam \quotient_RNO[28] .INIT=4'hE; // @46:11473 SLE \quotient[27] ( .Q(quotient_Z[27]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(quotient_RNO_Z[27]), .LAT(GND), .SD(GND), .SLn(next_quotient_0_sqmuxa_i) ); CFG2 \quotient_RNO[27] ( .A(quotientce_Z[27]), .B(next_quotient_0_sqmuxa), .Y(quotient_RNO_Z[27]) ); defparam \quotient_RNO[27] .INIT=4'hE; // @46:11473 SLE \quotient[26] ( .Q(quotient_Z[26]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(quotient_RNO_Z[26]), .LAT(GND), .SD(GND), .SLn(next_quotient_0_sqmuxa_i) ); CFG2 \quotient_RNO[26] ( .A(quotientce_Z[26]), .B(next_quotient_0_sqmuxa), .Y(quotient_RNO_Z[26]) ); defparam \quotient_RNO[26] .INIT=4'hE; // @46:11473 SLE \quotient[25] ( .Q(quotient_Z[25]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(quotient_RNO_Z[25]), .LAT(GND), .SD(GND), .SLn(next_quotient_0_sqmuxa_i) ); CFG2 \quotient_RNO[25] ( .A(quotientce_Z[25]), .B(next_quotient_0_sqmuxa), .Y(quotient_RNO_Z[25]) ); defparam \quotient_RNO[25] .INIT=4'hE; // @46:11473 SLE \quotient[24] ( .Q(quotient_Z[24]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(quotient_RNO_Z[24]), .LAT(GND), .SD(GND), .SLn(next_quotient_0_sqmuxa_i) ); CFG2 \quotient_RNO[24] ( .A(quotientce_Z[24]), .B(next_quotient_0_sqmuxa), .Y(quotient_RNO_Z[24]) ); defparam \quotient_RNO[24] .INIT=4'hE; // @46:11473 SLE \quotient[23] ( .Q(quotient_Z[23]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(quotient_RNO_Z[23]), .LAT(GND), .SD(GND), .SLn(next_quotient_0_sqmuxa_i) ); CFG2 \quotient_RNO[23] ( .A(quotientce_Z[23]), .B(next_quotient_0_sqmuxa), .Y(quotient_RNO_Z[23]) ); defparam \quotient_RNO[23] .INIT=4'hE; // @46:11473 SLE \quotient[22] ( .Q(quotient_Z[22]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(quotient_RNO_Z[22]), .LAT(GND), .SD(GND), .SLn(next_quotient_0_sqmuxa_i) ); CFG2 \quotient_RNO[22] ( .A(quotientce_Z[22]), .B(next_quotient_0_sqmuxa), .Y(quotient_RNO_Z[22]) ); defparam \quotient_RNO[22] .INIT=4'hE; // @46:11473 SLE \quotient[21] ( .Q(quotient_Z[21]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(quotient_RNO_Z[21]), .LAT(GND), .SD(GND), .SLn(next_quotient_0_sqmuxa_i) ); CFG2 \quotient_RNO[21] ( .A(quotientce_Z[21]), .B(next_quotient_0_sqmuxa), .Y(quotient_RNO_Z[21]) ); defparam \quotient_RNO[21] .INIT=4'hE; // @46:11473 SLE \quotient[20] ( .Q(quotient_Z[20]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(quotient_RNO_Z[20]), .LAT(GND), .SD(GND), .SLn(next_quotient_0_sqmuxa_i) ); CFG2 \quotient_RNO[20] ( .A(quotientce_Z[20]), .B(next_quotient_0_sqmuxa), .Y(quotient_RNO_Z[20]) ); defparam \quotient_RNO[20] .INIT=4'hE; // @46:11473 SLE \quotient[19] ( .Q(quotient_Z[19]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(quotient_RNO_Z[19]), .LAT(GND), .SD(GND), .SLn(next_quotient_0_sqmuxa_i) ); CFG2 \quotient_RNO[19] ( .A(quotientce_Z[19]), .B(next_quotient_0_sqmuxa), .Y(quotient_RNO_Z[19]) ); defparam \quotient_RNO[19] .INIT=4'hE; // @46:11473 SLE \quotient[18] ( .Q(quotient_Z[18]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(quotient_RNO_Z[18]), .LAT(GND), .SD(GND), .SLn(next_quotient_0_sqmuxa_i) ); CFG2 \quotient_RNO[18] ( .A(quotientce_Z[18]), .B(next_quotient_0_sqmuxa), .Y(quotient_RNO_Z[18]) ); defparam \quotient_RNO[18] .INIT=4'hE; // @46:11473 SLE \quotient[17] ( .Q(quotient_Z[17]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(quotient_RNO_Z[17]), .LAT(GND), .SD(GND), .SLn(next_quotient_0_sqmuxa_i) ); CFG2 \quotient_RNO[17] ( .A(quotientce_Z[17]), .B(next_quotient_0_sqmuxa), .Y(quotient_RNO_Z[17]) ); defparam \quotient_RNO[17] .INIT=4'hE; // @46:11473 SLE \quotient[16] ( .Q(quotient_Z[16]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(quotient_RNO_Z[16]), .LAT(GND), .SD(GND), .SLn(next_quotient_0_sqmuxa_i) ); CFG2 \quotient_RNO[16] ( .A(quotientce_Z[16]), .B(next_quotient_0_sqmuxa), .Y(quotient_RNO_Z[16]) ); defparam \quotient_RNO[16] .INIT=4'hE; // @46:11473 SLE \quotient[15] ( .Q(quotient_Z[15]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(quotient_RNO_Z[15]), .LAT(GND), .SD(GND), .SLn(next_quotient_0_sqmuxa_i) ); CFG2 \quotient_RNO[15] ( .A(quotientce_Z[15]), .B(next_quotient_0_sqmuxa), .Y(quotient_RNO_Z[15]) ); defparam \quotient_RNO[15] .INIT=4'hE; // @46:11473 SLE \quotient[14] ( .Q(quotient_Z[14]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(quotient_RNO_Z[14]), .LAT(GND), .SD(GND), .SLn(next_quotient_0_sqmuxa_i) ); CFG2 \quotient_RNO[14] ( .A(quotientce_Z[14]), .B(next_quotient_0_sqmuxa), .Y(quotient_RNO_Z[14]) ); defparam \quotient_RNO[14] .INIT=4'hE; // @46:11473 SLE \quotient[13] ( .Q(quotient_Z[13]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(quotient_RNO_Z[13]), .LAT(GND), .SD(GND), .SLn(next_quotient_0_sqmuxa_i) ); CFG2 \quotient_RNO[13] ( .A(quotientce_Z[13]), .B(next_quotient_0_sqmuxa), .Y(quotient_RNO_Z[13]) ); defparam \quotient_RNO[13] .INIT=4'hE; // @46:11473 SLE \quotient[12] ( .Q(quotient_Z[12]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(quotient_RNO_Z[12]), .LAT(GND), .SD(GND), .SLn(next_quotient_0_sqmuxa_i) ); CFG2 \quotient_RNO[12] ( .A(quotientce_Z[12]), .B(next_quotient_0_sqmuxa), .Y(quotient_RNO_Z[12]) ); defparam \quotient_RNO[12] .INIT=4'hE; // @46:11473 SLE \quotient[11] ( .Q(quotient_Z[11]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(quotient_RNO_Z[11]), .LAT(GND), .SD(GND), .SLn(next_quotient_0_sqmuxa_i) ); CFG2 \quotient_RNO[11] ( .A(quotientce_Z[11]), .B(next_quotient_0_sqmuxa), .Y(quotient_RNO_Z[11]) ); defparam \quotient_RNO[11] .INIT=4'hE; // @46:11473 SLE \quotient[10] ( .Q(quotient_Z[10]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(quotient_RNO_Z[10]), .LAT(GND), .SD(GND), .SLn(next_quotient_0_sqmuxa_i) ); CFG2 \quotient_RNO[10] ( .A(quotientce_Z[10]), .B(next_quotient_0_sqmuxa), .Y(quotient_RNO_Z[10]) ); defparam \quotient_RNO[10] .INIT=4'hE; // @46:11473 SLE \quotient[9] ( .Q(quotient_Z[9]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(quotient_RNO_Z[9]), .LAT(GND), .SD(GND), .SLn(next_quotient_0_sqmuxa_i) ); CFG2 \quotient_RNO[9] ( .A(quotientce_Z[9]), .B(next_quotient_0_sqmuxa), .Y(quotient_RNO_Z[9]) ); defparam \quotient_RNO[9] .INIT=4'hE; // @46:11473 SLE \quotient[8] ( .Q(quotient_Z[8]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(quotient_RNO_Z[8]), .LAT(GND), .SD(GND), .SLn(next_quotient_0_sqmuxa_i) ); CFG2 \quotient_RNO[8] ( .A(quotientce_Z[8]), .B(next_quotient_0_sqmuxa), .Y(quotient_RNO_Z[8]) ); defparam \quotient_RNO[8] .INIT=4'hE; // @46:11473 SLE \quotient[7] ( .Q(quotient_Z[7]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(quotient_RNO_Z[7]), .LAT(GND), .SD(GND), .SLn(next_quotient_0_sqmuxa_i) ); CFG2 \quotient_RNO[7] ( .A(quotientce_Z[7]), .B(next_quotient_0_sqmuxa), .Y(quotient_RNO_Z[7]) ); defparam \quotient_RNO[7] .INIT=4'hE; // @46:11473 SLE \quotient[6] ( .Q(quotient_Z[6]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(quotient_RNO_Z[6]), .LAT(GND), .SD(GND), .SLn(next_quotient_0_sqmuxa_i) ); CFG2 \quotient_RNO[6] ( .A(quotientce_Z[6]), .B(next_quotient_0_sqmuxa), .Y(quotient_RNO_Z[6]) ); defparam \quotient_RNO[6] .INIT=4'hE; // @46:11473 SLE \quotient[5] ( .Q(quotient_Z[5]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(quotient_RNO_Z[5]), .LAT(GND), .SD(GND), .SLn(next_quotient_0_sqmuxa_i) ); CFG2 \quotient_RNO[5] ( .A(quotientce_Z[5]), .B(next_quotient_0_sqmuxa), .Y(quotient_RNO_Z[5]) ); defparam \quotient_RNO[5] .INIT=4'hE; // @46:11473 SLE \quotient[4] ( .Q(quotient_Z[4]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(quotient_RNO_Z[4]), .LAT(GND), .SD(GND), .SLn(next_quotient_0_sqmuxa_i) ); CFG2 \quotient_RNO[4] ( .A(quotientce_Z[4]), .B(next_quotient_0_sqmuxa), .Y(quotient_RNO_Z[4]) ); defparam \quotient_RNO[4] .INIT=4'hE; // @46:11473 SLE \quotient[3] ( .Q(quotient_Z[3]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(quotient_RNO_Z[3]), .LAT(GND), .SD(GND), .SLn(next_quotient_0_sqmuxa_i) ); CFG2 \quotient_RNO[3] ( .A(quotientce_Z[3]), .B(next_quotient_0_sqmuxa), .Y(quotient_RNO_Z[3]) ); defparam \quotient_RNO[3] .INIT=4'hE; // @46:11473 SLE \quotient[2] ( .Q(quotient_Z[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(quotient_RNO_Z[2]), .LAT(GND), .SD(GND), .SLn(next_quotient_0_sqmuxa_i) ); CFG2 \quotient_RNO[2] ( .A(quotientce_Z[2]), .B(next_quotient_0_sqmuxa), .Y(quotient_RNO_Z[2]) ); defparam \quotient_RNO[2] .INIT=4'hE; // @46:11473 SLE \quotient[1] ( .Q(quotient_Z[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(quotient_RNO_Z[1]), .LAT(GND), .SD(GND), .SLn(next_quotient_0_sqmuxa_i) ); CFG2 \quotient_RNO[1] ( .A(quotientce_Z[1]), .B(next_quotient_0_sqmuxa), .Y(quotient_RNO_Z[1]) ); defparam \quotient_RNO[1] .INIT=4'hE; // @46:11473 SLE \quotient[0] ( .Q(quotient_Z[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(quotient_RNO_Z[0]), .LAT(GND), .SD(GND), .SLn(next_quotient_0_sqmuxa_i) ); CFG2 \quotient_RNO[0] ( .A(quotientce_Z[0]), .B(next_quotient_0_sqmuxa), .Y(quotient_RNO_Z[0]) ); defparam \quotient_RNO[0] .INIT=4'hE; // @46:11493 SLE \exu_result_reg_int[64] ( .Q(exu_result_reg_int_Z[64]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_1529), .EN(exu_result_reg_int_RNO_Z[64]), .LAT(GND), .SD(GND), .SLn(N_6076_i) ); CFG2 \exu_result_reg_int_RNO[64] ( .A(slow_mul_ack_RNIRFHITD_Z), .B(exu_result_reg_intce_Z[64]), .Y(exu_result_reg_int_RNO_Z[64]) ); defparam \exu_result_reg_int_RNO[64] .INIT=4'hE; // @46:11493 SLE \exu_result_reg_int[63] ( .Q(exu_result_reg_int_Z[63]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int[63]), .EN(slow_mul_ack_RNI4KM1RR_Z), .LAT(GND), .SD(GND), .SLn(N_6076_i) ); // @46:11493 SLE \exu_result_reg_int[62] ( .Q(exu_result_reg_int_Z[62]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int[62]), .EN(slow_mul_ack_RNI4KM1RR_Z), .LAT(GND), .SD(GND), .SLn(N_6076_i) ); // @46:11493 SLE \exu_result_reg_int[61] ( .Q(exu_result_reg_int_Z[61]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int[61]), .EN(slow_mul_ack_RNI4KM1RR_Z), .LAT(GND), .SD(GND), .SLn(N_6076_i) ); // @46:11493 SLE \exu_result_reg_int[60] ( .Q(exu_result_reg_int_Z[60]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int[60]), .EN(slow_mul_ack_RNI4KM1RR_Z), .LAT(GND), .SD(GND), .SLn(N_6076_i) ); // @46:11493 SLE \exu_result_reg_int[59] ( .Q(exu_result_reg_int_Z[59]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int[59]), .EN(slow_mul_ack_RNI4KM1RR_Z), .LAT(GND), .SD(GND), .SLn(N_6076_i) ); // @46:11493 SLE \exu_result_reg_int[58] ( .Q(exu_result_reg_int_Z[58]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int[58]), .EN(slow_mul_ack_RNI4KM1RR_Z), .LAT(GND), .SD(GND), .SLn(N_6076_i) ); // @46:11493 SLE \exu_result_reg_int[57] ( .Q(exu_result_reg_int_Z[57]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int[57]), .EN(slow_mul_ack_RNI4KM1RR_Z), .LAT(GND), .SD(GND), .SLn(N_6076_i) ); // @46:11493 SLE \exu_result_reg_int[56] ( .Q(exu_result_reg_int_Z[56]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int[56]), .EN(slow_mul_ack_RNI4KM1RR_Z), .LAT(GND), .SD(GND), .SLn(N_6076_i) ); // @46:11493 SLE \exu_result_reg_int[55] ( .Q(exu_result_reg_int_Z[55]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int[55]), .EN(slow_mul_ack_RNI4KM1RR_Z), .LAT(GND), .SD(GND), .SLn(N_6076_i) ); // @46:11493 SLE \exu_result_reg_int[54] ( .Q(exu_result_reg_int_Z[54]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int[54]), .EN(slow_mul_ack_RNI4KM1RR_Z), .LAT(GND), .SD(GND), .SLn(N_6076_i) ); // @46:11493 SLE \exu_result_reg_int[53] ( .Q(exu_result_reg_int_Z[53]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int[53]), .EN(slow_mul_ack_RNI4KM1RR_Z), .LAT(GND), .SD(GND), .SLn(N_6076_i) ); // @46:11493 SLE \exu_result_reg_int[52] ( .Q(exu_result_reg_int_Z[52]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int[52]), .EN(slow_mul_ack_RNI4KM1RR_Z), .LAT(GND), .SD(GND), .SLn(N_6076_i) ); // @46:11493 SLE \exu_result_reg_int[51] ( .Q(exu_result_reg_int_Z[51]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int[51]), .EN(slow_mul_ack_RNI4KM1RR_Z), .LAT(GND), .SD(GND), .SLn(N_6076_i) ); // @46:11493 SLE \exu_result_reg_int[50] ( .Q(exu_result_reg_int_Z[50]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int[50]), .EN(slow_mul_ack_RNI4KM1RR_Z), .LAT(GND), .SD(GND), .SLn(N_6076_i) ); // @46:11493 SLE \exu_result_reg_int[49] ( .Q(exu_result_reg_int_Z[49]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int[49]), .EN(slow_mul_ack_RNI4KM1RR_Z), .LAT(GND), .SD(GND), .SLn(N_6076_i) ); // @46:11493 SLE \exu_result_reg_int[48] ( .Q(exu_result_reg_int_Z[48]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int[48]), .EN(slow_mul_ack_RNI4KM1RR_Z), .LAT(GND), .SD(GND), .SLn(N_6076_i) ); // @46:11493 SLE \exu_result_reg_int[47] ( .Q(exu_result_reg_int_Z[47]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int[47]), .EN(slow_mul_ack_RNI4KM1RR_Z), .LAT(GND), .SD(GND), .SLn(N_6076_i) ); // @46:11493 SLE \exu_result_reg_int[46] ( .Q(exu_result_reg_int_Z[46]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int[46]), .EN(slow_mul_ack_RNI4KM1RR_Z), .LAT(GND), .SD(GND), .SLn(N_6076_i) ); // @46:11493 SLE \exu_result_reg_int[45] ( .Q(exu_result_reg_int_Z[45]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int[45]), .EN(slow_mul_ack_RNI4KM1RR_Z), .LAT(GND), .SD(GND), .SLn(N_6076_i) ); // @46:11493 SLE \exu_result_reg_int[44] ( .Q(exu_result_reg_int_Z[44]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int[44]), .EN(slow_mul_ack_RNI4KM1RR_Z), .LAT(GND), .SD(GND), .SLn(N_6076_i) ); // @46:11493 SLE \exu_result_reg_int[43] ( .Q(exu_result_reg_int_Z[43]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int[43]), .EN(slow_mul_ack_RNI4KM1RR_Z), .LAT(GND), .SD(GND), .SLn(N_6076_i) ); // @46:11493 SLE \exu_result_reg_int[42] ( .Q(exu_result_reg_int_Z[42]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int[42]), .EN(slow_mul_ack_RNI4KM1RR_Z), .LAT(GND), .SD(GND), .SLn(N_6076_i) ); // @46:11493 SLE \exu_result_reg_int[41] ( .Q(exu_result_reg_int_Z[41]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int[41]), .EN(slow_mul_ack_RNI4KM1RR_Z), .LAT(GND), .SD(GND), .SLn(N_6076_i) ); // @46:11493 SLE \exu_result_reg_int[40] ( .Q(exu_result_reg_int_Z[40]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int[40]), .EN(slow_mul_ack_RNI4KM1RR_Z), .LAT(GND), .SD(GND), .SLn(N_6076_i) ); // @46:11493 SLE \exu_result_reg_int[39] ( .Q(exu_result_reg_int_Z[39]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int[39]), .EN(slow_mul_ack_RNI4KM1RR_Z), .LAT(GND), .SD(GND), .SLn(N_6076_i) ); // @46:11493 SLE \exu_result_reg_int[38] ( .Q(exu_result_reg_int_Z[38]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int[38]), .EN(slow_mul_ack_RNI4KM1RR_Z), .LAT(GND), .SD(GND), .SLn(N_6076_i) ); // @46:11493 SLE \exu_result_reg_int[37] ( .Q(exu_result_reg_int_Z[37]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int[37]), .EN(slow_mul_ack_RNI4KM1RR_Z), .LAT(GND), .SD(GND), .SLn(N_6076_i) ); // @46:11493 SLE \exu_result_reg_int[36] ( .Q(exu_result_reg_int_Z[36]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int[36]), .EN(slow_mul_ack_RNI4KM1RR_Z), .LAT(GND), .SD(GND), .SLn(N_6076_i) ); // @46:11493 SLE \exu_result_reg_int[35] ( .Q(exu_result_reg_int_Z[35]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int[35]), .EN(slow_mul_ack_RNI4KM1RR_Z), .LAT(GND), .SD(GND), .SLn(N_6076_i) ); // @46:11493 SLE \exu_result_reg_int[34] ( .Q(exu_result_reg_int_Z[34]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int[34]), .EN(slow_mul_ack_RNI4KM1RR_Z), .LAT(GND), .SD(GND), .SLn(N_6076_i) ); // @46:11493 SLE \exu_result_reg_int[33] ( .Q(exu_result_reg_int_Z[33]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int[33]), .EN(slow_mul_ack_RNI4KM1RR_Z), .LAT(GND), .SD(GND), .SLn(N_6076_i) ); // @46:11493 SLE \exu_result_reg_int[32] ( .Q(exu_result_reg_int_Z[32]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int[32]), .EN(slow_mul_ack_RNI4KM1RR_Z), .LAT(GND), .SD(GND), .SLn(N_6076_i) ); CFG2 slow_mul_ack_RNI4KM1RR ( .A(slow_mul_ack_RNIRFHITD_Z), .B(N_37_0_i), .Y(slow_mul_ack_RNI4KM1RR_Z) ); defparam slow_mul_ack_RNI4KM1RR.INIT=4'hE; // @46:11446 SLE \mul_div_cnt[5] ( .Q(mul_div_cnt_Z[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mul_div_cnt_lm[5]), .EN(N_38_0_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11446 SLE \mul_div_cnt[4] ( .Q(mul_div_cnt_Z[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mul_div_cnt_lm[4]), .EN(N_38_0_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11446 SLE \mul_div_cnt[3] ( .Q(mul_div_cnt_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mul_div_cnt_lm[3]), .EN(N_38_0_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11446 SLE \mul_div_cnt[2] ( .Q(mul_div_cnt_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mul_div_cnt_lm[2]), .EN(N_38_0_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11446 SLE \mul_div_cnt[1] ( .Q(mul_div_cnt_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mul_div_cnt_lm[1]), .EN(N_38_0_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11446 SLE \mul_div_cnt[0] ( .Q(mul_div_cnt_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mul_div_cnt_lm[0]), .EN(N_38_0_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11484 SLE exu_result_reg_valid ( .Q(ex_retr_pipe_exu_result_valid_retr), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(exu_result_reg_valid_2_Z), .EN(exu_update_result_reg), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11455 SLE slow_mul_ack ( .Q(slow_mul_ack_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int48), .EN(N_37_0_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11465 SLE div_ack ( .Q(div_ack_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor39), .EN(N_61), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE res_pos_neg ( .Q(res_pos_neg_Z), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_res_pos_neg_3_Z), .EN(next_quotient_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[1] ( .Q(div_divisor_Z[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[1]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[0] ( .Q(div_divisor_Z[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[0]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[16] ( .Q(div_divisor_Z[16]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[16]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[15] ( .Q(div_divisor_Z[15]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[15]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[14] ( .Q(div_divisor_Z[14]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[14]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[13] ( .Q(div_divisor_Z[13]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[13]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[12] ( .Q(div_divisor_Z[12]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[12]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[11] ( .Q(div_divisor_Z[11]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[11]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[10] ( .Q(div_divisor_Z[10]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[10]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[9] ( .Q(div_divisor_Z[9]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[9]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[8] ( .Q(div_divisor_Z[8]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[8]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[7] ( .Q(div_divisor_Z[7]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[7]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[6] ( .Q(div_divisor_Z[6]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[6]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[5] ( .Q(div_divisor_Z[5]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[5]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[4] ( .Q(div_divisor_Z[4]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[4]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[3] ( .Q(div_divisor_Z[3]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[3]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[2] ( .Q(div_divisor_Z[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[2]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[31] ( .Q(div_divisor_Z[31]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[31]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[30] ( .Q(div_divisor_Z[30]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[30]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[29] ( .Q(div_divisor_Z[29]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[29]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[28] ( .Q(div_divisor_Z[28]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[28]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[27] ( .Q(div_divisor_Z[27]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[27]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[26] ( .Q(div_divisor_Z[26]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[26]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[25] ( .Q(div_divisor_Z[25]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[25]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[24] ( .Q(div_divisor_Z[24]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[24]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[23] ( .Q(div_divisor_Z[23]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[23]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[22] ( .Q(div_divisor_Z[22]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[22]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[21] ( .Q(div_divisor_Z[21]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[21]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[20] ( .Q(div_divisor_Z[20]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[20]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[19] ( .Q(div_divisor_Z[19]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[19]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[18] ( .Q(div_divisor_Z[18]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[18]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[17] ( .Q(div_divisor_Z[17]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[17]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[46] ( .Q(div_divisor_Z[46]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[46]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[45] ( .Q(div_divisor_Z[45]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[45]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[44] ( .Q(div_divisor_Z[44]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[44]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[43] ( .Q(div_divisor_Z[43]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[43]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[42] ( .Q(div_divisor_Z[42]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[42]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[41] ( .Q(div_divisor_Z[41]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[41]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[40] ( .Q(div_divisor_Z[40]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[40]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[39] ( .Q(div_divisor_Z[39]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[39]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[38] ( .Q(div_divisor_Z[38]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[38]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[37] ( .Q(div_divisor_Z[37]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[37]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[36] ( .Q(div_divisor_Z[36]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[36]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[35] ( .Q(div_divisor_Z[35]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[35]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[34] ( .Q(div_divisor_Z[34]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[34]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[33] ( .Q(div_divisor_Z[33]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[33]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[32] ( .Q(div_divisor_Z[32]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[32]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[61] ( .Q(div_divisor_Z[61]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[61]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[60] ( .Q(div_divisor_Z[60]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[60]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[59] ( .Q(div_divisor_Z[59]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[59]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[58] ( .Q(div_divisor_Z[58]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[58]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[57] ( .Q(div_divisor_Z[57]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[57]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[56] ( .Q(div_divisor_Z[56]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[56]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[55] ( .Q(div_divisor_Z[55]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[55]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[54] ( .Q(div_divisor_Z[54]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[54]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[53] ( .Q(div_divisor_Z[53]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[53]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[52] ( .Q(div_divisor_Z[52]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[52]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[51] ( .Q(div_divisor_Z[51]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[51]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[50] ( .Q(div_divisor_Z[50]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[50]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[49] ( .Q(div_divisor_Z[49]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[49]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[48] ( .Q(div_divisor_Z[48]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[48]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[47] ( .Q(div_divisor_Z[47]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_2199_i), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \dividend[13] ( .Q(dividend_Z[13]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_dividend_Z[13]), .EN(un1_next_div_divisor39_inv_2_or), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \dividend[12] ( .Q(dividend_Z[12]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_dividend_Z[12]), .EN(un1_next_div_divisor39_inv_2_or), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \dividend[11] ( .Q(dividend_Z[11]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_dividend_Z[11]), .EN(un1_next_div_divisor39_inv_2_or), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \dividend[10] ( .Q(dividend_Z[10]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_dividend_Z[10]), .EN(un1_next_div_divisor39_inv_2_or), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \dividend[9] ( .Q(dividend_Z[9]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_dividend_Z[9]), .EN(un1_next_div_divisor39_inv_2_or), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \dividend[8] ( .Q(dividend_Z[8]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_dividend_Z[8]), .EN(un1_next_div_divisor39_inv_2_or), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \dividend[7] ( .Q(dividend_Z[7]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_dividend_Z[7]), .EN(un1_next_div_divisor39_inv_2_or), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \dividend[6] ( .Q(dividend_Z[6]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_dividend_Z[6]), .EN(un1_next_div_divisor39_inv_2_or), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \dividend[5] ( .Q(dividend_Z[5]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_dividend_Z[5]), .EN(un1_next_div_divisor39_inv_2_or), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \dividend[4] ( .Q(dividend_Z[4]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_dividend_Z[4]), .EN(un1_next_div_divisor39_inv_2_or), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \dividend[3] ( .Q(dividend_Z[3]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_dividend_Z[3]), .EN(un1_next_div_divisor39_inv_2_or), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \dividend[2] ( .Q(dividend_Z[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_dividend_Z[2]), .EN(un1_next_div_divisor39_inv_2_or), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \dividend[1] ( .Q(dividend_Z[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_dividend_Z[1]), .EN(un1_next_div_divisor39_inv_2_or), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \dividend[0] ( .Q(dividend_Z[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_dividend_Z[0]), .EN(un1_next_div_divisor39_inv_2_or), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \div_divisor[62] ( .Q(div_divisor_Z[62]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_div_divisor_5_Z[62]), .EN(next_div_divisor39), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \dividend[28] ( .Q(dividend_Z[28]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_dividend_Z[28]), .EN(un1_next_div_divisor39_inv_2_or), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \dividend[27] ( .Q(dividend_Z[27]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_dividend_Z[27]), .EN(un1_next_div_divisor39_inv_2_or), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \dividend[26] ( .Q(dividend_Z[26]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_dividend_Z[26]), .EN(un1_next_div_divisor39_inv_2_or), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \dividend[25] ( .Q(dividend_Z[25]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_dividend_Z[25]), .EN(un1_next_div_divisor39_inv_2_or), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \dividend[24] ( .Q(dividend_Z[24]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_dividend_Z[24]), .EN(un1_next_div_divisor39_inv_2_or), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \dividend[23] ( .Q(dividend_Z[23]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_dividend_Z[23]), .EN(un1_next_div_divisor39_inv_2_or), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \dividend[22] ( .Q(dividend_Z[22]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_dividend_Z[22]), .EN(un1_next_div_divisor39_inv_2_or), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \dividend[21] ( .Q(dividend_Z[21]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_dividend_Z[21]), .EN(un1_next_div_divisor39_inv_2_or), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \dividend[20] ( .Q(dividend_Z[20]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_dividend_Z[20]), .EN(un1_next_div_divisor39_inv_2_or), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \dividend[19] ( .Q(dividend_Z[19]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_dividend_Z[19]), .EN(un1_next_div_divisor39_inv_2_or), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \dividend[18] ( .Q(dividend_Z[18]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_dividend_Z[18]), .EN(un1_next_div_divisor39_inv_2_or), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \dividend[17] ( .Q(dividend_Z[17]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_dividend_Z[17]), .EN(un1_next_div_divisor39_inv_2_or), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \dividend[16] ( .Q(dividend_Z[16]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_dividend_Z[16]), .EN(un1_next_div_divisor39_inv_2_or), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \dividend[15] ( .Q(dividend_Z[15]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_dividend_Z[15]), .EN(un1_next_div_divisor39_inv_2_or), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \dividend[14] ( .Q(dividend_Z[14]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_dividend_Z[14]), .EN(un1_next_div_divisor39_inv_2_or), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \dividend[31] ( .Q(dividend_Z[31]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_dividend[31]), .EN(un1_next_div_divisor39_inv_2_or), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \dividend[30] ( .Q(dividend_Z[30]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_dividend_Z[30]), .EN(un1_next_div_divisor39_inv_2_or), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11473 SLE \dividend[29] ( .Q(dividend_Z[29]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_dividend_Z[29]), .EN(un1_next_div_divisor39_inv_2_or), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:11493 SLE \exu_result_reg_int[9] ( .Q(ex_retr_pipe_exu_result_retr[9]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int_Z[9]), .EN(N_37_0_i), .LAT(GND), .SD(GND), .SLn(N_14137_i) ); // @46:11493 SLE \exu_result_reg_int[8] ( .Q(ex_retr_pipe_exu_result_retr[8]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int_Z[8]), .EN(N_37_0_i), .LAT(GND), .SD(GND), .SLn(N_14137_i) ); // @46:11493 SLE \exu_result_reg_int[7] ( .Q(ex_retr_pipe_exu_result_retr[7]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int_Z[7]), .EN(N_37_0_i), .LAT(GND), .SD(GND), .SLn(N_14137_i) ); // @46:11493 SLE \exu_result_reg_int[6] ( .Q(ex_retr_pipe_exu_result_retr[6]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int_Z[6]), .EN(N_37_0_i), .LAT(GND), .SD(GND), .SLn(N_14137_i) ); // @46:11493 SLE \exu_result_reg_int[5] ( .Q(ex_retr_pipe_exu_result_retr[5]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int_Z[5]), .EN(N_37_0_i), .LAT(GND), .SD(GND), .SLn(N_14137_i) ); // @46:11493 SLE \exu_result_reg_int[4] ( .Q(ex_retr_pipe_exu_result_retr[4]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int_Z[4]), .EN(N_37_0_i), .LAT(GND), .SD(GND), .SLn(N_14137_i) ); // @46:11493 SLE \exu_result_reg_int[3] ( .Q(ex_retr_pipe_exu_result_retr[3]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int_Z[3]), .EN(N_37_0_i), .LAT(GND), .SD(GND), .SLn(N_14137_i) ); // @46:11493 SLE \exu_result_reg_int[2] ( .Q(ex_retr_pipe_exu_result_retr[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int_Z[2]), .EN(N_37_0_i), .LAT(GND), .SD(GND), .SLn(N_14137_i) ); // @46:11493 SLE \exu_result_reg_int[1] ( .Q(ex_retr_pipe_exu_result_retr[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int_Z[1]), .EN(N_37_0_i), .LAT(GND), .SD(GND), .SLn(N_14137_i) ); // @46:11493 SLE \exu_result_reg_int[0] ( .Q(ex_retr_pipe_exu_result_retr[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int_Z[0]), .EN(N_37_0_i), .LAT(GND), .SD(GND), .SLn(N_14137_i) ); // @46:11493 SLE \exu_result_reg_int[31] ( .Q(ex_retr_pipe_exu_result_retr[31]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int_Z[31]), .EN(N_37_0_i), .LAT(GND), .SD(GND), .SLn(N_14137_i) ); // @46:11493 SLE \exu_result_reg_int[30] ( .Q(ex_retr_pipe_exu_result_retr[30]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int_Z[30]), .EN(N_37_0_i), .LAT(GND), .SD(GND), .SLn(N_14137_i) ); // @46:11493 SLE \exu_result_reg_int[29] ( .Q(ex_retr_pipe_exu_result_retr[29]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int_Z[29]), .EN(N_37_0_i), .LAT(GND), .SD(GND), .SLn(N_14137_i) ); // @46:11493 SLE \exu_result_reg_int[28] ( .Q(ex_retr_pipe_exu_result_retr[28]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int_Z[28]), .EN(N_37_0_i), .LAT(GND), .SD(GND), .SLn(N_14137_i) ); // @46:11493 SLE \exu_result_reg_int[27] ( .Q(ex_retr_pipe_exu_result_retr[27]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int_Z[27]), .EN(N_37_0_i), .LAT(GND), .SD(GND), .SLn(N_14137_i) ); // @46:11493 SLE \exu_result_reg_int[26] ( .Q(ex_retr_pipe_exu_result_retr[26]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int_Z[26]), .EN(N_37_0_i), .LAT(GND), .SD(GND), .SLn(N_14137_i) ); // @46:11493 SLE \exu_result_reg_int[25] ( .Q(ex_retr_pipe_exu_result_retr[25]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int_Z[25]), .EN(N_37_0_i), .LAT(GND), .SD(GND), .SLn(N_14137_i) ); // @46:11493 SLE \exu_result_reg_int[24] ( .Q(ex_retr_pipe_exu_result_retr[24]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int_Z[24]), .EN(N_37_0_i), .LAT(GND), .SD(GND), .SLn(N_14137_i) ); // @46:11493 SLE \exu_result_reg_int[23] ( .Q(ex_retr_pipe_exu_result_retr[23]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int_Z[23]), .EN(N_37_0_i), .LAT(GND), .SD(GND), .SLn(N_14137_i) ); // @46:11493 SLE \exu_result_reg_int[22] ( .Q(ex_retr_pipe_exu_result_retr[22]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int_Z[22]), .EN(N_37_0_i), .LAT(GND), .SD(GND), .SLn(N_14137_i) ); // @46:11493 SLE \exu_result_reg_int[21] ( .Q(ex_retr_pipe_exu_result_retr[21]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int_Z[21]), .EN(N_37_0_i), .LAT(GND), .SD(GND), .SLn(N_14137_i) ); // @46:11493 SLE \exu_result_reg_int[20] ( .Q(ex_retr_pipe_exu_result_retr[20]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int_Z[20]), .EN(N_37_0_i), .LAT(GND), .SD(GND), .SLn(N_14137_i) ); // @46:11493 SLE \exu_result_reg_int[19] ( .Q(ex_retr_pipe_exu_result_retr[19]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int_Z[19]), .EN(N_37_0_i), .LAT(GND), .SD(GND), .SLn(N_14137_i) ); // @46:11493 SLE \exu_result_reg_int[18] ( .Q(ex_retr_pipe_exu_result_retr[18]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int_Z[18]), .EN(N_37_0_i), .LAT(GND), .SD(GND), .SLn(N_14137_i) ); // @46:11493 SLE \exu_result_reg_int[17] ( .Q(ex_retr_pipe_exu_result_retr[17]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int_Z[17]), .EN(N_37_0_i), .LAT(GND), .SD(GND), .SLn(N_14137_i) ); // @46:11493 SLE \exu_result_reg_int[16] ( .Q(ex_retr_pipe_exu_result_retr[16]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int_Z[16]), .EN(N_37_0_i), .LAT(GND), .SD(GND), .SLn(N_14137_i) ); // @46:11493 SLE \exu_result_reg_int[15] ( .Q(ex_retr_pipe_exu_result_retr[15]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int_Z[15]), .EN(N_37_0_i), .LAT(GND), .SD(GND), .SLn(N_14137_i) ); // @46:11493 SLE \exu_result_reg_int[14] ( .Q(ex_retr_pipe_exu_result_retr[14]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int_Z[14]), .EN(N_37_0_i), .LAT(GND), .SD(GND), .SLn(N_14137_i) ); // @46:11493 SLE \exu_result_reg_int[13] ( .Q(ex_retr_pipe_exu_result_retr[13]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int_Z[13]), .EN(N_37_0_i), .LAT(GND), .SD(GND), .SLn(N_14137_i) ); // @46:11493 SLE \exu_result_reg_int[12] ( .Q(ex_retr_pipe_exu_result_retr[12]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int_Z[12]), .EN(N_37_0_i), .LAT(GND), .SD(GND), .SLn(N_14137_i) ); // @46:11493 SLE \exu_result_reg_int[11] ( .Q(ex_retr_pipe_exu_result_retr[11]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int_Z[11]), .EN(N_37_0_i), .LAT(GND), .SD(GND), .SLn(N_14137_i) ); // @46:11493 SLE \exu_result_reg_int[10] ( .Q(ex_retr_pipe_exu_result_retr[10]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_exu_result_reg_int_Z[10]), .EN(N_37_0_i), .LAT(GND), .SD(GND), .SLn(N_14137_i) ); // @46:9457 CFG2 slow_mul_ack_RNIJBP0PD ( .A(next_exu_result_reg_int48), .B(slow_mul_ack_Z), .Y(N_14137_i) ); defparam slow_mul_ack_RNIJBP0PD.INIT=4'hD; // @46:11028 ARI1 \quotient_RNINK1DG[1] ( .FCO(un1_div_result_1_cry_1_cy), .S(quotient_RNINK1DG_S[1]), .Y(quotient_RNINK1DG_Y[1]), .B(N_4_i), .C(dividend_Z[1]), .D(quotient_Z[1]), .A(VCC), .FCI(VCC) ); defparam \quotient_RNINK1DG[1] .INIT=20'h42700; // @46:11028 ARI1 \quotient_RNIGB3Q01[2] ( .FCO(un1_div_result_1_cry_1), .S(un1_div_result_11[2]), .Y(quotient_RNIGB3Q01_Y[2]), .B(N_4_i), .C(dividend_Z[2]), .D(quotient_Z[2]), .A(VCC), .FCI(un1_div_result_1_cry_1_cy) ); defparam \quotient_RNIGB3Q01[2] .INIT=20'h42700; // @46:11028 ARI1 \quotient_RNIB457H1[3] ( .FCO(un1_div_result_1_cry_2), .S(un1_div_result_11[3]), .Y(quotient_RNIB457H1_Y[3]), .B(N_4_i), .C(dividend_Z[3]), .D(quotient_Z[3]), .A(VCC), .FCI(un1_div_result_1_cry_1) ); defparam \quotient_RNIB457H1[3] .INIT=20'h42700; // @46:11028 ARI1 \quotient_RNI8V6K12[4] ( .FCO(un1_div_result_1_cry_3), .S(un1_div_result_11[4]), .Y(quotient_RNI8V6K12_Y[4]), .B(N_4_i), .C(dividend_Z[4]), .D(quotient_Z[4]), .A(VCC), .FCI(un1_div_result_1_cry_2) ); defparam \quotient_RNI8V6K12[4] .INIT=20'h42700; // @46:11028 ARI1 \quotient_RNI7S81I2[5] ( .FCO(un1_div_result_1_cry_4), .S(un1_div_result_11[5]), .Y(quotient_RNI7S81I2_Y[5]), .B(N_4_i), .C(dividend_Z[5]), .D(quotient_Z[5]), .A(VCC), .FCI(un1_div_result_1_cry_3) ); defparam \quotient_RNI7S81I2[5] .INIT=20'h42700; // @46:11028 ARI1 \quotient_RNI8RAE23[6] ( .FCO(un1_div_result_1_cry_5), .S(un1_div_result_11[6]), .Y(quotient_RNI8RAE23_Y[6]), .B(N_4_i), .C(dividend_Z[6]), .D(quotient_Z[6]), .A(VCC), .FCI(un1_div_result_1_cry_4) ); defparam \quotient_RNI8RAE23[6] .INIT=20'h42700; // @46:11028 ARI1 \quotient_RNIBSCRI3[7] ( .FCO(un1_div_result_1_cry_6), .S(un1_div_result_11[7]), .Y(quotient_RNIBSCRI3_Y[7]), .B(N_4_i), .C(dividend_Z[7]), .D(quotient_Z[7]), .A(VCC), .FCI(un1_div_result_1_cry_5) ); defparam \quotient_RNIBSCRI3[7] .INIT=20'h42700; // @46:11028 ARI1 \quotient_RNIGVE834[8] ( .FCO(un1_div_result_1_cry_7), .S(un1_div_result_11[8]), .Y(quotient_RNIGVE834_Y[8]), .B(N_4_i), .C(dividend_Z[8]), .D(quotient_Z[8]), .A(VCC), .FCI(un1_div_result_1_cry_6) ); defparam \quotient_RNIGVE834[8] .INIT=20'h42700; // @46:11028 ARI1 \quotient_RNIN4HLJ4[9] ( .FCO(un1_div_result_1_cry_8), .S(un1_div_result_11[9]), .Y(quotient_RNIN4HLJ4_Y[9]), .B(N_4_i), .C(dividend_Z[9]), .D(quotient_Z[9]), .A(VCC), .FCI(un1_div_result_1_cry_7) ); defparam \quotient_RNIN4HLJ4[9] .INIT=20'h42700; // @46:11028 ARI1 \quotient_RNIEKLD85[10] ( .FCO(un1_div_result_1_cry_9), .S(un1_div_result_11[10]), .Y(quotient_RNIEKLD85_Y[10]), .B(N_4_i), .C(dividend_Z[10]), .D(quotient_Z[10]), .A(VCC), .FCI(un1_div_result_1_cry_8) ); defparam \quotient_RNIEKLD85[10] .INIT=20'h42700; // @46:11028 ARI1 \quotient_RNI76Q5T5[11] ( .FCO(un1_div_result_1_cry_10), .S(un1_div_result_11[11]), .Y(quotient_RNI76Q5T5_Y[11]), .B(N_4_i), .C(dividend_Z[11]), .D(quotient_Z[11]), .A(VCC), .FCI(un1_div_result_1_cry_9) ); defparam \quotient_RNI76Q5T5[11] .INIT=20'h42700; // @46:11028 ARI1 \quotient_RNI2QUTH6[12] ( .FCO(un1_div_result_1_cry_11), .S(un1_div_result_11[12]), .Y(quotient_RNI2QUTH6_Y[12]), .B(N_4_i), .C(dividend_Z[12]), .D(quotient_Z[12]), .A(VCC), .FCI(un1_div_result_1_cry_10) ); defparam \quotient_RNI2QUTH6[12] .INIT=20'h42700; // @46:11028 ARI1 \quotient_RNIVF3M67[13] ( .FCO(un1_div_result_1_cry_12), .S(un1_div_result_11[13]), .Y(quotient_RNIVF3M67_Y[13]), .B(N_4_i), .C(dividend_Z[13]), .D(quotient_Z[13]), .A(VCC), .FCI(un1_div_result_1_cry_11) ); defparam \quotient_RNIVF3M67[13] .INIT=20'h42700; // @46:11028 ARI1 \quotient_RNIU78ER7[14] ( .FCO(un1_div_result_1_cry_13), .S(un1_div_result_11[14]), .Y(quotient_RNIU78ER7_Y[14]), .B(N_4_i), .C(dividend_Z[14]), .D(quotient_Z[14]), .A(VCC), .FCI(un1_div_result_1_cry_12) ); defparam \quotient_RNIU78ER7[14] .INIT=20'h42700; // @46:11028 ARI1 \quotient_RNIV1D6G8[15] ( .FCO(un1_div_result_1_cry_14), .S(un1_div_result_11[15]), .Y(quotient_RNIV1D6G8_Y[15]), .B(N_4_i), .C(dividend_Z[15]), .D(quotient_Z[15]), .A(VCC), .FCI(un1_div_result_1_cry_13) ); defparam \quotient_RNIV1D6G8[15] .INIT=20'h42700; // @46:11028 ARI1 \quotient_RNI2UHU49[16] ( .FCO(un1_div_result_1_cry_15), .S(un1_div_result_11[16]), .Y(quotient_RNI2UHU49_Y[16]), .B(N_4_i), .C(dividend_Z[16]), .D(quotient_Z[16]), .A(VCC), .FCI(un1_div_result_1_cry_14) ); defparam \quotient_RNI2UHU49[16] .INIT=20'h42700; // @46:11028 ARI1 \quotient_RNI7SMMP9[17] ( .FCO(un1_div_result_1_cry_16), .S(un1_div_result_11[17]), .Y(quotient_RNI7SMMP9_Y[17]), .B(N_4_i), .C(dividend_Z[17]), .D(quotient_Z[17]), .A(VCC), .FCI(un1_div_result_1_cry_15) ); defparam \quotient_RNI7SMMP9[17] .INIT=20'h42700; // @46:11028 ARI1 \quotient_RNIESREEA[18] ( .FCO(un1_div_result_1_cry_17), .S(un1_div_result_11[18]), .Y(quotient_RNIESREEA_Y[18]), .B(N_4_i), .C(dividend_Z[18]), .D(quotient_Z[18]), .A(VCC), .FCI(un1_div_result_1_cry_16) ); defparam \quotient_RNIESREEA[18] .INIT=20'h42700; // @46:11028 ARI1 \quotient_RNINU073B[19] ( .FCO(un1_div_result_1_cry_18), .S(un1_div_result_11[19]), .Y(quotient_RNINU073B_Y[19]), .B(N_4_i), .C(dividend_Z[19]), .D(quotient_Z[19]), .A(VCC), .FCI(un1_div_result_1_cry_17) ); defparam \quotient_RNINU073B[19] .INIT=20'h42700; // @46:11028 ARI1 \quotient_RNIGI7VNB[20] ( .FCO(un1_div_result_1_cry_19), .S(un1_div_result_11[20]), .Y(quotient_RNIGI7VNB_Y[20]), .B(N_4_i), .C(dividend_Z[20]), .D(quotient_Z[20]), .A(VCC), .FCI(un1_div_result_1_cry_18) ); defparam \quotient_RNIGI7VNB[20] .INIT=20'h42700; // @46:11028 ARI1 \quotient_RNIB8ENCC[21] ( .FCO(un1_div_result_1_cry_20), .S(un1_div_result_11[21]), .Y(quotient_RNIB8ENCC_Y[21]), .B(N_4_i), .C(dividend_Z[21]), .D(quotient_Z[21]), .A(VCC), .FCI(un1_div_result_1_cry_19) ); defparam \quotient_RNIB8ENCC[21] .INIT=20'h42700; // @46:11028 ARI1 \quotient_RNI80LF1D[22] ( .FCO(un1_div_result_1_cry_21), .S(un1_div_result_11[22]), .Y(quotient_RNI80LF1D_Y[22]), .B(N_4_i), .C(dividend_Z[22]), .D(quotient_Z[22]), .A(VCC), .FCI(un1_div_result_1_cry_20) ); defparam \quotient_RNI80LF1D[22] .INIT=20'h42700; // @46:11028 ARI1 \quotient_RNI7QR7MD[23] ( .FCO(un1_div_result_1_cry_22), .S(un1_div_result_11[23]), .Y(quotient_RNI7QR7MD_Y[23]), .B(N_4_i), .C(dividend_Z[23]), .D(quotient_Z[23]), .A(VCC), .FCI(un1_div_result_1_cry_21) ); defparam \quotient_RNI7QR7MD[23] .INIT=20'h42700; // @46:11028 ARI1 \quotient_RNI8M20BE[24] ( .FCO(un1_div_result_1_cry_23), .S(un1_div_result_11[24]), .Y(quotient_RNI8M20BE_Y[24]), .B(N_4_i), .C(dividend_Z[24]), .D(quotient_Z[24]), .A(VCC), .FCI(un1_div_result_1_cry_22) ); defparam \quotient_RNI8M20BE[24] .INIT=20'h42700; // @46:11028 ARI1 \quotient_RNIBK9OVE[25] ( .FCO(un1_div_result_1_cry_24), .S(un1_div_result_11[25]), .Y(quotient_RNIBK9OVE_Y[25]), .B(N_4_i), .C(dividend_Z[25]), .D(quotient_Z[25]), .A(VCC), .FCI(un1_div_result_1_cry_23) ); defparam \quotient_RNIBK9OVE[25] .INIT=20'h42700; // @46:11028 ARI1 \quotient_RNIGKGGKF[26] ( .FCO(un1_div_result_1_cry_25), .S(un1_div_result_11[26]), .Y(quotient_RNIGKGGKF_Y[26]), .B(N_4_i), .C(dividend_Z[26]), .D(quotient_Z[26]), .A(VCC), .FCI(un1_div_result_1_cry_24) ); defparam \quotient_RNIGKGGKF[26] .INIT=20'h42700; // @46:11028 ARI1 \quotient_RNINMN89G[27] ( .FCO(un1_div_result_1_cry_26), .S(un1_div_result_11[27]), .Y(quotient_RNINMN89G_Y[27]), .B(N_4_i), .C(dividend_Z[27]), .D(quotient_Z[27]), .A(VCC), .FCI(un1_div_result_1_cry_25) ); defparam \quotient_RNINMN89G[27] .INIT=20'h42700; // @46:11028 ARI1 \quotient_RNI0RU0UG[28] ( .FCO(un1_div_result_1_cry_27), .S(un1_div_result_11[28]), .Y(quotient_RNI0RU0UG_Y[28]), .B(N_4_i), .C(dividend_Z[28]), .D(quotient_Z[28]), .A(VCC), .FCI(un1_div_result_1_cry_26) ); defparam \quotient_RNI0RU0UG[28] .INIT=20'h42700; // @46:11028 ARI1 \quotient_RNIB16PIH[29] ( .FCO(un1_div_result_1_cry_28), .S(un1_div_result_11[29]), .Y(quotient_RNIB16PIH_Y[29]), .B(N_4_i), .C(dividend_Z[29]), .D(quotient_Z[29]), .A(VCC), .FCI(un1_div_result_1_cry_27) ); defparam \quotient_RNIB16PIH[29] .INIT=20'h42700; // @46:11028 ARI1 \exu_alu_result_26_RNO[31] ( .FCO(exu_alu_result_26_RNO_FCO[31]), .S(un1_div_result_11[31]), .Y(exu_alu_result_26_RNO_Y[31]), .B(N_4_i), .C(dividend_Z[31]), .D(quotient_Z[31]), .A(VCC), .FCI(un1_div_result_1_cry_29) ); defparam \exu_alu_result_26_RNO[31] .INIT=20'h42700; // @46:11028 ARI1 \quotient_RNI6PEH7I[30] ( .FCO(un1_div_result_1_cry_29), .S(un1_div_result_11[30]), .Y(quotient_RNI6PEH7I_Y[30]), .B(N_4_i), .C(dividend_Z[30]), .D(quotient_Z[30]), .A(VCC), .FCI(un1_div_result_1_cry_28) ); defparam \quotient_RNI6PEH7I[30] .INIT=20'h42700; // @46:10892 ARI1 un23_mulh_mc_0_cry_1_cy ( .FCO(un23_mulh_mc_0_cry_1_cy_Z), .S(un23_mulh_mc_0_cry_1_cy_S), .Y(un23_mulh_mc_0_cry_1_cy_Y), .B(de_ex_pipe_curr_pc_ex[1]), .C(gpr_rs1_rd_data_sig[1]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(VCC), .FCI(VCC) ); defparam un23_mulh_mc_0_cry_1_cy.INIT=20'h45300; // @46:10892 ARI1 un23_mulh_mc_0_cry_1 ( .FCO(un23_mulh_mc_0_cry_1_Z), .S(un23_mulh_mc0[2]), .Y(un23_mulh_mc_0_cry_1_Y), .B(de_ex_pipe_curr_pc_ex[2]), .C(gpr_rs1_rd_data_sig[2]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(VCC), .FCI(un23_mulh_mc_0_cry_1_cy_Z) ); defparam un23_mulh_mc_0_cry_1.INIT=20'h45300; // @46:10892 ARI1 un23_mulh_mc_0_cry_2 ( .FCO(un23_mulh_mc_0_cry_2_Z), .S(un23_mulh_mc0[3]), .Y(un23_mulh_mc_0_cry_2_Y), .B(de_ex_pipe_curr_pc_ex[3]), .C(gpr_rs1_rd_data_sig[3]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(VCC), .FCI(un23_mulh_mc_0_cry_1_Z) ); defparam un23_mulh_mc_0_cry_2.INIT=20'h45300; // @46:10892 ARI1 un23_mulh_mc_0_cry_3 ( .FCO(un23_mulh_mc_0_cry_3_Z), .S(un23_mulh_mc0[4]), .Y(un23_mulh_mc_0_cry_3_Y), .B(de_ex_pipe_curr_pc_ex[4]), .C(gpr_rs1_rd_data_sig[4]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(VCC), .FCI(un23_mulh_mc_0_cry_2_Z) ); defparam un23_mulh_mc_0_cry_3.INIT=20'h45300; // @46:10892 ARI1 un23_mulh_mc_0_cry_4 ( .FCO(un23_mulh_mc_0_cry_4_Z), .S(un23_mulh_mc0[5]), .Y(un23_mulh_mc_0_cry_4_Y), .B(de_ex_pipe_curr_pc_ex[5]), .C(gpr_rs1_rd_data_sig[5]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(VCC), .FCI(un23_mulh_mc_0_cry_3_Z) ); defparam un23_mulh_mc_0_cry_4.INIT=20'h45300; // @46:10892 ARI1 un23_mulh_mc_0_cry_5 ( .FCO(un23_mulh_mc_0_cry_5_Z), .S(un23_mulh_mc0[6]), .Y(un23_mulh_mc_0_cry_5_Y), .B(de_ex_pipe_curr_pc_ex[6]), .C(gpr_rs1_rd_data_sig[6]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(VCC), .FCI(un23_mulh_mc_0_cry_4_Z) ); defparam un23_mulh_mc_0_cry_5.INIT=20'h45300; // @46:10892 ARI1 un23_mulh_mc_0_cry_6 ( .FCO(un23_mulh_mc_0_cry_6_Z), .S(un23_mulh_mc0[7]), .Y(un23_mulh_mc_0_cry_6_Y), .B(de_ex_pipe_curr_pc_ex[7]), .C(gpr_rs1_rd_data_sig[7]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(VCC), .FCI(un23_mulh_mc_0_cry_5_Z) ); defparam un23_mulh_mc_0_cry_6.INIT=20'h45300; // @46:10892 ARI1 un23_mulh_mc_0_cry_7 ( .FCO(un23_mulh_mc_0_cry_7_Z), .S(un23_mulh_mc0[8]), .Y(un23_mulh_mc_0_cry_7_Y), .B(de_ex_pipe_curr_pc_ex[8]), .C(gpr_rs1_rd_data_sig[8]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(VCC), .FCI(un23_mulh_mc_0_cry_6_Z) ); defparam un23_mulh_mc_0_cry_7.INIT=20'h45300; // @46:10892 ARI1 un23_mulh_mc_0_cry_8 ( .FCO(un23_mulh_mc_0_cry_8_Z), .S(un23_mulh_mc0[9]), .Y(un23_mulh_mc_0_cry_8_Y), .B(de_ex_pipe_curr_pc_ex[9]), .C(gpr_rs1_rd_data_sig[9]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(VCC), .FCI(un23_mulh_mc_0_cry_7_Z) ); defparam un23_mulh_mc_0_cry_8.INIT=20'h45300; // @46:10892 ARI1 un23_mulh_mc_0_cry_9 ( .FCO(un23_mulh_mc_0_cry_9_Z), .S(un23_mulh_mc0[10]), .Y(un23_mulh_mc_0_cry_9_Y), .B(de_ex_pipe_curr_pc_ex[10]), .C(gpr_rs1_rd_data_sig[10]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(VCC), .FCI(un23_mulh_mc_0_cry_8_Z) ); defparam un23_mulh_mc_0_cry_9.INIT=20'h45300; // @46:10892 ARI1 un23_mulh_mc_0_cry_10 ( .FCO(un23_mulh_mc_0_cry_10_Z), .S(un23_mulh_mc0[11]), .Y(un23_mulh_mc_0_cry_10_Y), .B(de_ex_pipe_curr_pc_ex[11]), .C(gpr_rs1_rd_data_sig[11]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(VCC), .FCI(un23_mulh_mc_0_cry_9_Z) ); defparam un23_mulh_mc_0_cry_10.INIT=20'h45300; // @46:10892 ARI1 un23_mulh_mc_0_cry_11 ( .FCO(un23_mulh_mc_0_cry_11_Z), .S(un23_mulh_mc0[12]), .Y(un23_mulh_mc_0_cry_11_Y), .B(de_ex_pipe_curr_pc_ex[12]), .C(gpr_rs1_rd_data_sig[12]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(VCC), .FCI(un23_mulh_mc_0_cry_10_Z) ); defparam un23_mulh_mc_0_cry_11.INIT=20'h45300; // @46:10892 ARI1 un23_mulh_mc_0_cry_12 ( .FCO(un23_mulh_mc_0_cry_12_Z), .S(un23_mulh_mc0[13]), .Y(un23_mulh_mc_0_cry_12_Y), .B(de_ex_pipe_curr_pc_ex[13]), .C(gpr_rs1_rd_data_sig[13]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(VCC), .FCI(un23_mulh_mc_0_cry_11_Z) ); defparam un23_mulh_mc_0_cry_12.INIT=20'h45300; // @46:10892 ARI1 un23_mulh_mc_0_cry_13 ( .FCO(un23_mulh_mc_0_cry_13_Z), .S(un23_mulh_mc0[14]), .Y(un23_mulh_mc_0_cry_13_Y), .B(de_ex_pipe_curr_pc_ex[14]), .C(gpr_rs1_rd_data_sig[14]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(VCC), .FCI(un23_mulh_mc_0_cry_12_Z) ); defparam un23_mulh_mc_0_cry_13.INIT=20'h45300; // @46:10892 ARI1 un23_mulh_mc_0_cry_14 ( .FCO(un23_mulh_mc_0_cry_14_Z), .S(un23_mulh_mc0[15]), .Y(un23_mulh_mc_0_cry_14_Y), .B(de_ex_pipe_curr_pc_ex[15]), .C(gpr_rs1_rd_data_sig[15]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(VCC), .FCI(un23_mulh_mc_0_cry_13_Z) ); defparam un23_mulh_mc_0_cry_14.INIT=20'h45300; // @46:10892 ARI1 un23_mulh_mc_0_cry_15 ( .FCO(un23_mulh_mc_0_cry_15_Z), .S(un23_mulh_mc0[16]), .Y(un23_mulh_mc_0_cry_15_Y), .B(de_ex_pipe_curr_pc_ex[16]), .C(gpr_rs1_rd_data_sig[16]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(VCC), .FCI(un23_mulh_mc_0_cry_14_Z) ); defparam un23_mulh_mc_0_cry_15.INIT=20'h45300; // @46:10892 ARI1 un23_mulh_mc_0_cry_16 ( .FCO(un23_mulh_mc_0_cry_16_Z), .S(un23_mulh_mc0[17]), .Y(un23_mulh_mc_0_cry_16_Y), .B(de_ex_pipe_curr_pc_ex[17]), .C(gpr_rs1_rd_data_sig[17]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(VCC), .FCI(un23_mulh_mc_0_cry_15_Z) ); defparam un23_mulh_mc_0_cry_16.INIT=20'h45300; // @46:10892 ARI1 un23_mulh_mc_0_cry_17 ( .FCO(un23_mulh_mc_0_cry_17_Z), .S(un23_mulh_mc0[18]), .Y(un23_mulh_mc_0_cry_17_Y), .B(de_ex_pipe_curr_pc_ex[18]), .C(gpr_rs1_rd_data_sig[18]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(VCC), .FCI(un23_mulh_mc_0_cry_16_Z) ); defparam un23_mulh_mc_0_cry_17.INIT=20'h45300; // @46:10892 ARI1 un23_mulh_mc_0_cry_18 ( .FCO(un23_mulh_mc_0_cry_18_Z), .S(un23_mulh_mc0[19]), .Y(un23_mulh_mc_0_cry_18_Y), .B(de_ex_pipe_curr_pc_ex[19]), .C(gpr_rs1_rd_data_sig[19]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(VCC), .FCI(un23_mulh_mc_0_cry_17_Z) ); defparam un23_mulh_mc_0_cry_18.INIT=20'h45300; // @46:10892 ARI1 un23_mulh_mc_0_cry_19 ( .FCO(un23_mulh_mc_0_cry_19_Z), .S(un23_mulh_mc0[20]), .Y(un23_mulh_mc_0_cry_19_Y), .B(de_ex_pipe_curr_pc_ex[20]), .C(gpr_rs1_rd_data_sig[20]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(VCC), .FCI(un23_mulh_mc_0_cry_18_Z) ); defparam un23_mulh_mc_0_cry_19.INIT=20'h45300; // @46:10892 ARI1 un23_mulh_mc_0_cry_20 ( .FCO(un23_mulh_mc_0_cry_20_Z), .S(un23_mulh_mc0[21]), .Y(un23_mulh_mc_0_cry_20_Y), .B(de_ex_pipe_curr_pc_ex[21]), .C(gpr_rs1_rd_data_sig[21]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(VCC), .FCI(un23_mulh_mc_0_cry_19_Z) ); defparam un23_mulh_mc_0_cry_20.INIT=20'h45300; // @46:10892 ARI1 un23_mulh_mc_0_cry_21 ( .FCO(un23_mulh_mc_0_cry_21_Z), .S(un23_mulh_mc0[22]), .Y(un23_mulh_mc_0_cry_21_Y), .B(de_ex_pipe_curr_pc_ex[22]), .C(gpr_rs1_rd_data_sig[22]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(VCC), .FCI(un23_mulh_mc_0_cry_20_Z) ); defparam un23_mulh_mc_0_cry_21.INIT=20'h45300; // @46:10892 ARI1 un23_mulh_mc_0_cry_22 ( .FCO(un23_mulh_mc_0_cry_22_Z), .S(un23_mulh_mc0[23]), .Y(un23_mulh_mc_0_cry_22_Y), .B(de_ex_pipe_curr_pc_ex[23]), .C(gpr_rs1_rd_data_sig[23]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(VCC), .FCI(un23_mulh_mc_0_cry_21_Z) ); defparam un23_mulh_mc_0_cry_22.INIT=20'h45300; // @46:10892 ARI1 un23_mulh_mc_0_cry_23 ( .FCO(un23_mulh_mc_0_cry_23_Z), .S(un23_mulh_mc0[24]), .Y(un23_mulh_mc_0_cry_23_Y), .B(de_ex_pipe_curr_pc_ex[24]), .C(gpr_rs1_rd_data_sig[24]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(VCC), .FCI(un23_mulh_mc_0_cry_22_Z) ); defparam un23_mulh_mc_0_cry_23.INIT=20'h45300; // @46:10892 ARI1 un23_mulh_mc_0_cry_24 ( .FCO(un23_mulh_mc_0_cry_24_Z), .S(un23_mulh_mc0[25]), .Y(un23_mulh_mc_0_cry_24_Y), .B(de_ex_pipe_curr_pc_ex[25]), .C(gpr_rs1_rd_data_sig[25]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(VCC), .FCI(un23_mulh_mc_0_cry_23_Z) ); defparam un23_mulh_mc_0_cry_24.INIT=20'h45300; // @46:10892 ARI1 un23_mulh_mc_0_cry_25 ( .FCO(un23_mulh_mc_0_cry_25_Z), .S(un23_mulh_mc0[26]), .Y(un23_mulh_mc_0_cry_25_Y), .B(de_ex_pipe_curr_pc_ex[26]), .C(gpr_rs1_rd_data_sig[26]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(VCC), .FCI(un23_mulh_mc_0_cry_24_Z) ); defparam un23_mulh_mc_0_cry_25.INIT=20'h45300; // @46:10892 ARI1 un23_mulh_mc_0_cry_26 ( .FCO(un23_mulh_mc_0_cry_26_Z), .S(un23_mulh_mc0[27]), .Y(un23_mulh_mc_0_cry_26_Y), .B(de_ex_pipe_curr_pc_ex[27]), .C(gpr_rs1_rd_data_sig[27]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(VCC), .FCI(un23_mulh_mc_0_cry_25_Z) ); defparam un23_mulh_mc_0_cry_26.INIT=20'h45300; // @46:10892 ARI1 un23_mulh_mc_0_cry_27 ( .FCO(un23_mulh_mc_0_cry_27_Z), .S(un23_mulh_mc0[28]), .Y(un23_mulh_mc_0_cry_27_Y), .B(de_ex_pipe_curr_pc_ex[28]), .C(gpr_rs1_rd_data_sig[28]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(VCC), .FCI(un23_mulh_mc_0_cry_26_Z) ); defparam un23_mulh_mc_0_cry_27.INIT=20'h45300; // @46:10892 ARI1 un23_mulh_mc_0_cry_28 ( .FCO(un23_mulh_mc_0_cry_28_Z), .S(un23_mulh_mc0[29]), .Y(un23_mulh_mc_0_cry_28_Y), .B(de_ex_pipe_curr_pc_ex[29]), .C(gpr_rs1_rd_data_sig[29]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(VCC), .FCI(un23_mulh_mc_0_cry_27_Z) ); defparam un23_mulh_mc_0_cry_28.INIT=20'h45300; // @46:10892 ARI1 exu_alu_result_int_cry_31_RNO_1 ( .FCO(exu_alu_result_int_cry_31_RNO_1_FCO), .S(un23_mulh_mc0[31]), .Y(exu_alu_result_int_cry_31_RNO_1_Y), .B(de_ex_pipe_curr_pc_ex[31]), .C(gpr_rs1_rd_data_sig[31]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(VCC), .FCI(un23_mulh_mc_0_cry_29_Z) ); defparam exu_alu_result_int_cry_31_RNO_1.INIT=20'h45300; // @46:10892 ARI1 un23_mulh_mc_0_cry_29 ( .FCO(un23_mulh_mc_0_cry_29_Z), .S(un23_mulh_mc0[30]), .Y(un23_mulh_mc_0_cry_29_Y), .B(de_ex_pipe_curr_pc_ex[30]), .C(gpr_rs1_rd_data_sig[30]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(VCC), .FCI(un23_mulh_mc_0_cry_28_Z) ); defparam un23_mulh_mc_0_cry_29.INIT=20'h45300; // @46:11423 ARI1 un16_next_div_divisor_1_cry_0 ( .FCO(un16_next_div_divisor_1_cry_0_Z), .S(un16_next_div_divisor_1_cry_0_S), .Y(un16_next_div_divisor_1_cry_0_Y), .B(cpu_debug_gpr_op_rd_data_net[0]), .C(de_ex_pipe_immediate_ex[0]), .D(de_ex_pipe_operand1_mux_sel_ex[0]), .A(de_ex_pipe_operand1_mux_sel_ex[1]), .FCI(VCC) ); defparam un16_next_div_divisor_1_cry_0.INIT=20'h4FF35; // @46:11423 ARI1 un16_next_div_divisor_1_cry_1 ( .FCO(un16_next_div_divisor_1_cry_1_Z), .S(un16_next_div_divisor_1_cry_1_S), .Y(un16_next_div_divisor_1_cry_1_Y), .B(cpu_debug_gpr_op_rd_data_net[1]), .C(de_ex_pipe_immediate_ex[1]), .D(de_ex_pipe_operand1_mux_sel_ex[0]), .A(de_ex_pipe_operand1_mux_sel_ex[1]), .FCI(un16_next_div_divisor_1_cry_0_Z) ); defparam un16_next_div_divisor_1_cry_1.INIT=20'h40F35; // @46:11423 ARI1 un16_next_div_divisor_1_cry_2 ( .FCO(un16_next_div_divisor_1_cry_2_Z), .S(un16_next_div_divisor_1_cry_2_S), .Y(un16_next_div_divisor_1_cry_2_Y), .B(cpu_debug_gpr_op_rd_data_net[2]), .C(de_ex_pipe_immediate_ex[2]), .D(de_ex_pipe_operand1_mux_sel_ex[0]), .A(de_ex_pipe_operand1_mux_sel_ex[1]), .FCI(un16_next_div_divisor_1_cry_1_Z) ); defparam un16_next_div_divisor_1_cry_2.INIT=20'h4F035; // @46:11423 ARI1 un16_next_div_divisor_1_cry_3 ( .FCO(un16_next_div_divisor_1_cry_3_Z), .S(un16_next_div_divisor_1_cry_3_S), .Y(un16_next_div_divisor_1_cry_3_Y), .B(cpu_debug_gpr_op_rd_data_net[3]), .C(de_ex_pipe_immediate_ex[3]), .D(de_ex_pipe_operand1_mux_sel_ex[0]), .A(de_ex_pipe_operand1_mux_sel_ex[1]), .FCI(un16_next_div_divisor_1_cry_2_Z) ); defparam un16_next_div_divisor_1_cry_3.INIT=20'h4FF35; // @46:11423 ARI1 un16_next_div_divisor_1_cry_4 ( .FCO(un16_next_div_divisor_1_cry_4_Z), .S(un16_next_div_divisor_1_cry_4_S), .Y(un16_next_div_divisor_1_cry_4_Y), .B(cpu_debug_gpr_op_rd_data_net[4]), .C(de_ex_pipe_immediate_ex[4]), .D(de_ex_pipe_operand1_mux_sel_ex[0]), .A(de_ex_pipe_operand1_mux_sel_ex[1]), .FCI(un16_next_div_divisor_1_cry_3_Z) ); defparam un16_next_div_divisor_1_cry_4.INIT=20'h4FF35; // @46:11423 ARI1 un16_next_div_divisor_1_cry_5 ( .FCO(un16_next_div_divisor_1_cry_5_Z), .S(un16_next_div_divisor_1_cry_5_S), .Y(un16_next_div_divisor_1_cry_5_Y), .B(cpu_debug_gpr_op_rd_data_net[5]), .C(de_ex_pipe_immediate_ex[5]), .D(de_ex_pipe_operand1_mux_sel_ex[0]), .A(de_ex_pipe_operand1_mux_sel_ex[1]), .FCI(un16_next_div_divisor_1_cry_4_Z) ); defparam un16_next_div_divisor_1_cry_5.INIT=20'h4FF35; // @46:11423 ARI1 un16_next_div_divisor_1_cry_6 ( .FCO(un16_next_div_divisor_1_cry_6_Z), .S(un16_next_div_divisor_1_cry_6_S), .Y(un16_next_div_divisor_1_cry_6_Y), .B(cpu_debug_gpr_op_rd_data_net[6]), .C(de_ex_pipe_immediate_ex[6]), .D(de_ex_pipe_operand1_mux_sel_ex[0]), .A(de_ex_pipe_operand1_mux_sel_ex[1]), .FCI(un16_next_div_divisor_1_cry_5_Z) ); defparam un16_next_div_divisor_1_cry_6.INIT=20'h4FF35; // @46:11423 ARI1 un16_next_div_divisor_1_cry_7 ( .FCO(un16_next_div_divisor_1_cry_7_Z), .S(un16_next_div_divisor_1_cry_7_S), .Y(un16_next_div_divisor_1_cry_7_Y), .B(cpu_debug_gpr_op_rd_data_net[7]), .C(de_ex_pipe_immediate_ex[7]), .D(de_ex_pipe_operand1_mux_sel_ex[0]), .A(de_ex_pipe_operand1_mux_sel_ex[1]), .FCI(un16_next_div_divisor_1_cry_6_Z) ); defparam un16_next_div_divisor_1_cry_7.INIT=20'h4FF35; // @46:11423 ARI1 un16_next_div_divisor_1_cry_8 ( .FCO(un16_next_div_divisor_1_cry_8_Z), .S(un16_next_div_divisor_1_cry_8_S), .Y(un16_next_div_divisor_1_cry_8_Y), .B(cpu_debug_gpr_op_rd_data_net[8]), .C(de_ex_pipe_immediate_ex[8]), .D(de_ex_pipe_operand1_mux_sel_ex[0]), .A(de_ex_pipe_operand1_mux_sel_ex[1]), .FCI(un16_next_div_divisor_1_cry_7_Z) ); defparam un16_next_div_divisor_1_cry_8.INIT=20'h4FF35; // @46:11423 ARI1 un16_next_div_divisor_1_cry_9 ( .FCO(un16_next_div_divisor_1_cry_9_Z), .S(un16_next_div_divisor_1_cry_9_S), .Y(un16_next_div_divisor_1_cry_9_Y), .B(cpu_debug_gpr_op_rd_data_net[9]), .C(de_ex_pipe_immediate_ex[9]), .D(de_ex_pipe_operand1_mux_sel_ex[0]), .A(de_ex_pipe_operand1_mux_sel_ex[1]), .FCI(un16_next_div_divisor_1_cry_8_Z) ); defparam un16_next_div_divisor_1_cry_9.INIT=20'h4FF35; // @46:11423 ARI1 un16_next_div_divisor_1_cry_10 ( .FCO(un16_next_div_divisor_1_cry_10_Z), .S(un16_next_div_divisor_1_cry_10_S), .Y(un16_next_div_divisor_1_cry_10_Y), .B(cpu_debug_gpr_op_rd_data_net[10]), .C(de_ex_pipe_immediate_ex[10]), .D(de_ex_pipe_operand1_mux_sel_ex[0]), .A(de_ex_pipe_operand1_mux_sel_ex[1]), .FCI(un16_next_div_divisor_1_cry_9_Z) ); defparam un16_next_div_divisor_1_cry_10.INIT=20'h4FF35; // @46:11423 ARI1 un16_next_div_divisor_1_cry_11 ( .FCO(un16_next_div_divisor_1_cry_11_Z), .S(un16_next_div_divisor_1_cry_11_S), .Y(un16_next_div_divisor_1_cry_11_Y), .B(cpu_debug_gpr_op_rd_data_net[11]), .C(de_ex_pipe_immediate_ex[11]), .D(de_ex_pipe_operand1_mux_sel_ex[0]), .A(de_ex_pipe_operand1_mux_sel_ex[1]), .FCI(un16_next_div_divisor_1_cry_10_Z) ); defparam un16_next_div_divisor_1_cry_11.INIT=20'h4FF35; // @46:11423 ARI1 un16_next_div_divisor_1_cry_12 ( .FCO(un16_next_div_divisor_1_cry_12_Z), .S(un16_next_div_divisor_1_cry_12_S), .Y(un16_next_div_divisor_1_cry_12_Y), .B(cpu_debug_gpr_op_rd_data_net[12]), .C(de_ex_pipe_immediate_ex[12]), .D(de_ex_pipe_operand1_mux_sel_ex[0]), .A(de_ex_pipe_operand1_mux_sel_ex[1]), .FCI(un16_next_div_divisor_1_cry_11_Z) ); defparam un16_next_div_divisor_1_cry_12.INIT=20'h4FF35; // @46:11423 ARI1 un16_next_div_divisor_1_cry_13 ( .FCO(un16_next_div_divisor_1_cry_13_Z), .S(un16_next_div_divisor_1_cry_13_S), .Y(un16_next_div_divisor_1_cry_13_Y), .B(cpu_debug_gpr_op_rd_data_net[13]), .C(de_ex_pipe_immediate_ex[13]), .D(de_ex_pipe_operand1_mux_sel_ex[0]), .A(de_ex_pipe_operand1_mux_sel_ex[1]), .FCI(un16_next_div_divisor_1_cry_12_Z) ); defparam un16_next_div_divisor_1_cry_13.INIT=20'h4FF35; // @46:11423 ARI1 un16_next_div_divisor_1_cry_14 ( .FCO(un16_next_div_divisor_1_cry_14_Z), .S(un16_next_div_divisor_1_cry_14_S), .Y(un16_next_div_divisor_1_cry_14_Y), .B(cpu_debug_gpr_op_rd_data_net[14]), .C(de_ex_pipe_immediate_ex[14]), .D(de_ex_pipe_operand1_mux_sel_ex[0]), .A(de_ex_pipe_operand1_mux_sel_ex[1]), .FCI(un16_next_div_divisor_1_cry_13_Z) ); defparam un16_next_div_divisor_1_cry_14.INIT=20'h4FF35; // @46:11423 ARI1 un16_next_div_divisor_1_cry_15 ( .FCO(un16_next_div_divisor_1_cry_15_Z), .S(un16_next_div_divisor_1_cry_15_S), .Y(un16_next_div_divisor_1_cry_15_Y), .B(cpu_debug_gpr_op_rd_data_net[15]), .C(de_ex_pipe_immediate_ex[15]), .D(de_ex_pipe_operand1_mux_sel_ex[0]), .A(de_ex_pipe_operand1_mux_sel_ex[1]), .FCI(un16_next_div_divisor_1_cry_14_Z) ); defparam un16_next_div_divisor_1_cry_15.INIT=20'h4FF35; // @46:11423 ARI1 un16_next_div_divisor_1_cry_16 ( .FCO(un16_next_div_divisor_1_cry_16_Z), .S(un16_next_div_divisor_1_cry_16_S), .Y(un16_next_div_divisor_1_cry_16_Y), .B(cpu_debug_gpr_op_rd_data_net[16]), .C(de_ex_pipe_immediate_ex[16]), .D(de_ex_pipe_operand1_mux_sel_ex[0]), .A(de_ex_pipe_operand1_mux_sel_ex[1]), .FCI(un16_next_div_divisor_1_cry_15_Z) ); defparam un16_next_div_divisor_1_cry_16.INIT=20'h4FF35; // @46:11423 ARI1 un16_next_div_divisor_1_cry_17 ( .FCO(un16_next_div_divisor_1_cry_17_Z), .S(un16_next_div_divisor_1_cry_17_S), .Y(un16_next_div_divisor_1_cry_17_Y), .B(cpu_debug_gpr_op_rd_data_net[17]), .C(de_ex_pipe_immediate_ex[17]), .D(de_ex_pipe_operand1_mux_sel_ex[0]), .A(de_ex_pipe_operand1_mux_sel_ex[1]), .FCI(un16_next_div_divisor_1_cry_16_Z) ); defparam un16_next_div_divisor_1_cry_17.INIT=20'h4FF35; // @46:11423 ARI1 un16_next_div_divisor_1_cry_18 ( .FCO(un16_next_div_divisor_1_cry_18_Z), .S(un16_next_div_divisor_1_cry_18_S), .Y(un16_next_div_divisor_1_cry_18_Y), .B(cpu_debug_gpr_op_rd_data_net[18]), .C(de_ex_pipe_immediate_ex[18]), .D(de_ex_pipe_operand1_mux_sel_ex[0]), .A(de_ex_pipe_operand1_mux_sel_ex[1]), .FCI(un16_next_div_divisor_1_cry_17_Z) ); defparam un16_next_div_divisor_1_cry_18.INIT=20'h4FF35; // @46:11423 ARI1 un16_next_div_divisor_1_cry_19 ( .FCO(un16_next_div_divisor_1_cry_19_Z), .S(un16_next_div_divisor_1_cry_19_S), .Y(un16_next_div_divisor_1_cry_19_Y), .B(cpu_debug_gpr_op_rd_data_net[19]), .C(de_ex_pipe_immediate_ex[19]), .D(de_ex_pipe_operand1_mux_sel_ex[0]), .A(de_ex_pipe_operand1_mux_sel_ex[1]), .FCI(un16_next_div_divisor_1_cry_18_Z) ); defparam un16_next_div_divisor_1_cry_19.INIT=20'h4FF35; // @46:11423 ARI1 un16_next_div_divisor_1_cry_20 ( .FCO(un16_next_div_divisor_1_cry_20_Z), .S(un16_next_div_divisor_1_cry_20_S), .Y(un16_next_div_divisor_1_cry_20_Y), .B(cpu_debug_gpr_op_rd_data_net[20]), .C(de_ex_pipe_immediate_ex[20]), .D(de_ex_pipe_operand1_mux_sel_ex[0]), .A(de_ex_pipe_operand1_mux_sel_ex[1]), .FCI(un16_next_div_divisor_1_cry_19_Z) ); defparam un16_next_div_divisor_1_cry_20.INIT=20'h4FF35; // @46:11423 ARI1 un16_next_div_divisor_1_cry_21 ( .FCO(un16_next_div_divisor_1_cry_21_Z), .S(un16_next_div_divisor_1_cry_21_S), .Y(un16_next_div_divisor_1_cry_21_Y), .B(cpu_debug_gpr_op_rd_data_net[21]), .C(de_ex_pipe_immediate_ex[21]), .D(de_ex_pipe_operand1_mux_sel_ex[0]), .A(de_ex_pipe_operand1_mux_sel_ex[1]), .FCI(un16_next_div_divisor_1_cry_20_Z) ); defparam un16_next_div_divisor_1_cry_21.INIT=20'h4FF35; // @46:11423 ARI1 un16_next_div_divisor_1_cry_22 ( .FCO(un16_next_div_divisor_1_cry_22_Z), .S(un16_next_div_divisor_1_cry_22_S), .Y(un16_next_div_divisor_1_cry_22_Y), .B(cpu_debug_gpr_op_rd_data_net[22]), .C(de_ex_pipe_immediate_ex[22]), .D(de_ex_pipe_operand1_mux_sel_ex[0]), .A(de_ex_pipe_operand1_mux_sel_ex[1]), .FCI(un16_next_div_divisor_1_cry_21_Z) ); defparam un16_next_div_divisor_1_cry_22.INIT=20'h4FF35; // @46:11423 ARI1 un16_next_div_divisor_1_cry_23 ( .FCO(un16_next_div_divisor_1_cry_23_Z), .S(un16_next_div_divisor_1_cry_23_S), .Y(un16_next_div_divisor_1_cry_23_Y), .B(cpu_debug_gpr_op_rd_data_net[23]), .C(de_ex_pipe_immediate_ex[23]), .D(de_ex_pipe_operand1_mux_sel_ex[0]), .A(de_ex_pipe_operand1_mux_sel_ex[1]), .FCI(un16_next_div_divisor_1_cry_22_Z) ); defparam un16_next_div_divisor_1_cry_23.INIT=20'h4FF35; // @46:11423 ARI1 un16_next_div_divisor_1_cry_24 ( .FCO(un16_next_div_divisor_1_cry_24_Z), .S(un16_next_div_divisor_1_cry_24_S), .Y(un16_next_div_divisor_1_cry_24_Y), .B(cpu_debug_gpr_op_rd_data_net[24]), .C(de_ex_pipe_immediate_ex[24]), .D(de_ex_pipe_operand1_mux_sel_ex[0]), .A(de_ex_pipe_operand1_mux_sel_ex[1]), .FCI(un16_next_div_divisor_1_cry_23_Z) ); defparam un16_next_div_divisor_1_cry_24.INIT=20'h4FF35; // @46:11423 ARI1 un16_next_div_divisor_1_cry_25 ( .FCO(un16_next_div_divisor_1_cry_25_Z), .S(un16_next_div_divisor_1_cry_25_S), .Y(un16_next_div_divisor_1_cry_25_Y), .B(cpu_debug_gpr_op_rd_data_net[25]), .C(de_ex_pipe_immediate_ex[25]), .D(de_ex_pipe_operand1_mux_sel_ex[0]), .A(de_ex_pipe_operand1_mux_sel_ex[1]), .FCI(un16_next_div_divisor_1_cry_24_Z) ); defparam un16_next_div_divisor_1_cry_25.INIT=20'h4FF35; // @46:11423 ARI1 un16_next_div_divisor_1_cry_26 ( .FCO(un16_next_div_divisor_1_cry_26_Z), .S(un16_next_div_divisor_1_cry_26_S), .Y(un16_next_div_divisor_1_cry_26_Y), .B(cpu_debug_gpr_op_rd_data_net[26]), .C(de_ex_pipe_immediate_ex[26]), .D(de_ex_pipe_operand1_mux_sel_ex[0]), .A(de_ex_pipe_operand1_mux_sel_ex[1]), .FCI(un16_next_div_divisor_1_cry_25_Z) ); defparam un16_next_div_divisor_1_cry_26.INIT=20'h4FF35; // @46:11423 ARI1 un16_next_div_divisor_1_cry_27 ( .FCO(un16_next_div_divisor_1_cry_27_Z), .S(un16_next_div_divisor_1_cry_27_S), .Y(un16_next_div_divisor_1_cry_27_Y), .B(cpu_debug_gpr_op_rd_data_net[27]), .C(de_ex_pipe_immediate_ex[27]), .D(de_ex_pipe_operand1_mux_sel_ex[0]), .A(de_ex_pipe_operand1_mux_sel_ex[1]), .FCI(un16_next_div_divisor_1_cry_26_Z) ); defparam un16_next_div_divisor_1_cry_27.INIT=20'h4FF35; // @46:11423 ARI1 un16_next_div_divisor_1_cry_28 ( .FCO(un16_next_div_divisor_1_cry_28_Z), .S(un16_next_div_divisor_1_cry_28_S), .Y(un16_next_div_divisor_1_cry_28_Y), .B(cpu_debug_gpr_op_rd_data_net[28]), .C(de_ex_pipe_immediate_ex[28]), .D(de_ex_pipe_operand1_mux_sel_ex[0]), .A(de_ex_pipe_operand1_mux_sel_ex[1]), .FCI(un16_next_div_divisor_1_cry_27_Z) ); defparam un16_next_div_divisor_1_cry_28.INIT=20'h4FF35; // @46:11423 ARI1 un16_next_div_divisor_1_cry_29 ( .FCO(un16_next_div_divisor_1_cry_29_Z), .S(un16_next_div_divisor_1_cry_29_S), .Y(un16_next_div_divisor_1_cry_29_Y), .B(cpu_debug_gpr_op_rd_data_net[29]), .C(de_ex_pipe_immediate_ex[29]), .D(de_ex_pipe_operand1_mux_sel_ex[0]), .A(de_ex_pipe_operand1_mux_sel_ex[1]), .FCI(un16_next_div_divisor_1_cry_28_Z) ); defparam un16_next_div_divisor_1_cry_29.INIT=20'h4FF35; // @46:11423 ARI1 un16_next_div_divisor_1_s_31 ( .FCO(un16_next_div_divisor_1_s_31_FCO), .S(un16_next_div_divisor_1_s_31_S), .Y(un16_next_div_divisor_1_s_31_Y), .B(cpu_debug_gpr_op_rd_data_net[31]), .C(de_ex_pipe_immediate_ex[31]), .D(de_ex_pipe_operand1_mux_sel_ex[0]), .A(de_ex_pipe_operand1_mux_sel_ex[1]), .FCI(un16_next_div_divisor_1_cry_30_Z) ); defparam un16_next_div_divisor_1_s_31.INIT=20'h4FF35; // @46:11423 ARI1 un16_next_div_divisor_1_cry_30 ( .FCO(un16_next_div_divisor_1_cry_30_Z), .S(un16_next_div_divisor_1_cry_30_S), .Y(un16_next_div_divisor_1_cry_30_Y), .B(cpu_debug_gpr_op_rd_data_net[30]), .C(de_ex_pipe_immediate_ex[30]), .D(de_ex_pipe_operand1_mux_sel_ex[0]), .A(de_ex_pipe_operand1_mux_sel_ex[1]), .FCI(un16_next_div_divisor_1_cry_29_Z) ); defparam un16_next_div_divisor_1_cry_30.INIT=20'h4FF35; // @46:11044 ARI1 un6_exu_alu_result_0_cry_1 ( .FCO(un6_exu_alu_result_0_cry_1_Z), .S(un6_exu_alu_result_0_cry_1_S), .Y(un6_exu_alu_result_0_cry_1_Y), .B(de_ex_pipe_curr_pc_ex[1]), .C(gpr_rs1_rd_data_sig[1]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[1]), .FCI(VCC) ); defparam un6_exu_alu_result_0_cry_1.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_0_cry_2 ( .FCO(un6_exu_alu_result_0_cry_2_Z), .S(un6_exu_alu_result0[2]), .Y(un6_exu_alu_result_0_cry_2_Y), .B(de_ex_pipe_curr_pc_ex[2]), .C(gpr_rs1_rd_data_sig[2]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[2]), .FCI(un6_exu_alu_result_0_cry_1_Z) ); defparam un6_exu_alu_result_0_cry_2.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_0_cry_3 ( .FCO(un6_exu_alu_result_0_cry_3_Z), .S(un6_exu_alu_result0[3]), .Y(un6_exu_alu_result_0_cry_3_Y), .B(de_ex_pipe_curr_pc_ex[3]), .C(gpr_rs1_rd_data_sig[3]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[3]), .FCI(un6_exu_alu_result_0_cry_2_Z) ); defparam un6_exu_alu_result_0_cry_3.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_0_cry_4 ( .FCO(un6_exu_alu_result_0_cry_4_Z), .S(un6_exu_alu_result0[4]), .Y(un6_exu_alu_result_0_cry_4_Y), .B(de_ex_pipe_curr_pc_ex[4]), .C(gpr_rs1_rd_data_sig[4]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[4]), .FCI(un6_exu_alu_result_0_cry_3_Z) ); defparam un6_exu_alu_result_0_cry_4.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_0_cry_5 ( .FCO(un6_exu_alu_result_0_cry_5_Z), .S(un6_exu_alu_result0[5]), .Y(un6_exu_alu_result_0_cry_5_Y), .B(de_ex_pipe_curr_pc_ex[5]), .C(gpr_rs1_rd_data_sig[5]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[5]), .FCI(un6_exu_alu_result_0_cry_4_Z) ); defparam un6_exu_alu_result_0_cry_5.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_0_cry_6 ( .FCO(un6_exu_alu_result_0_cry_6_Z), .S(un6_exu_alu_result0[6]), .Y(un6_exu_alu_result_0_cry_6_Y), .B(de_ex_pipe_curr_pc_ex[6]), .C(gpr_rs1_rd_data_sig[6]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[6]), .FCI(un6_exu_alu_result_0_cry_5_Z) ); defparam un6_exu_alu_result_0_cry_6.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_0_cry_7 ( .FCO(un6_exu_alu_result_0_cry_7_Z), .S(un6_exu_alu_result0[7]), .Y(un6_exu_alu_result_0_cry_7_Y), .B(de_ex_pipe_curr_pc_ex[7]), .C(gpr_rs1_rd_data_sig[7]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[7]), .FCI(un6_exu_alu_result_0_cry_6_Z) ); defparam un6_exu_alu_result_0_cry_7.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_0_cry_8 ( .FCO(un6_exu_alu_result_0_cry_8_Z), .S(un6_exu_alu_result0[8]), .Y(un6_exu_alu_result_0_cry_8_Y), .B(de_ex_pipe_curr_pc_ex[8]), .C(gpr_rs1_rd_data_sig[8]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[8]), .FCI(un6_exu_alu_result_0_cry_7_Z) ); defparam un6_exu_alu_result_0_cry_8.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_0_cry_9 ( .FCO(un6_exu_alu_result_0_cry_9_Z), .S(un6_exu_alu_result0[9]), .Y(un6_exu_alu_result_0_cry_9_Y), .B(de_ex_pipe_curr_pc_ex[9]), .C(gpr_rs1_rd_data_sig[9]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[9]), .FCI(un6_exu_alu_result_0_cry_8_Z) ); defparam un6_exu_alu_result_0_cry_9.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_0_cry_10 ( .FCO(un6_exu_alu_result_0_cry_10_Z), .S(un6_exu_alu_result0[10]), .Y(un6_exu_alu_result_0_cry_10_Y), .B(de_ex_pipe_curr_pc_ex[10]), .C(gpr_rs1_rd_data_sig[10]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[10]), .FCI(un6_exu_alu_result_0_cry_9_Z) ); defparam un6_exu_alu_result_0_cry_10.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_0_cry_11 ( .FCO(un6_exu_alu_result_0_cry_11_Z), .S(un6_exu_alu_result0[11]), .Y(un6_exu_alu_result_0_cry_11_Y), .B(de_ex_pipe_curr_pc_ex[11]), .C(gpr_rs1_rd_data_sig[11]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[11]), .FCI(un6_exu_alu_result_0_cry_10_Z) ); defparam un6_exu_alu_result_0_cry_11.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_0_cry_12 ( .FCO(un6_exu_alu_result_0_cry_12_Z), .S(un6_exu_alu_result0[12]), .Y(un6_exu_alu_result_0_cry_12_Y), .B(de_ex_pipe_curr_pc_ex[12]), .C(gpr_rs1_rd_data_sig[12]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[12]), .FCI(un6_exu_alu_result_0_cry_11_Z) ); defparam un6_exu_alu_result_0_cry_12.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_0_cry_13 ( .FCO(un6_exu_alu_result_0_cry_13_Z), .S(un6_exu_alu_result0[13]), .Y(un6_exu_alu_result_0_cry_13_Y), .B(de_ex_pipe_curr_pc_ex[13]), .C(gpr_rs1_rd_data_sig[13]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[13]), .FCI(un6_exu_alu_result_0_cry_12_Z) ); defparam un6_exu_alu_result_0_cry_13.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_0_cry_14 ( .FCO(un6_exu_alu_result_0_cry_14_Z), .S(un6_exu_alu_result0[14]), .Y(un6_exu_alu_result_0_cry_14_Y), .B(de_ex_pipe_curr_pc_ex[14]), .C(gpr_rs1_rd_data_sig[14]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[14]), .FCI(un6_exu_alu_result_0_cry_13_Z) ); defparam un6_exu_alu_result_0_cry_14.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_0_cry_15 ( .FCO(un6_exu_alu_result_0_cry_15_Z), .S(un6_exu_alu_result0[15]), .Y(un6_exu_alu_result_0_cry_15_Y), .B(de_ex_pipe_curr_pc_ex[15]), .C(gpr_rs1_rd_data_sig[15]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[15]), .FCI(un6_exu_alu_result_0_cry_14_Z) ); defparam un6_exu_alu_result_0_cry_15.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_0_cry_16 ( .FCO(un6_exu_alu_result_0_cry_16_Z), .S(un6_exu_alu_result0[16]), .Y(un6_exu_alu_result_0_cry_16_Y), .B(de_ex_pipe_curr_pc_ex[16]), .C(gpr_rs1_rd_data_sig[16]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[16]), .FCI(un6_exu_alu_result_0_cry_15_Z) ); defparam un6_exu_alu_result_0_cry_16.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_0_cry_17 ( .FCO(un6_exu_alu_result_0_cry_17_Z), .S(un6_exu_alu_result0[17]), .Y(un6_exu_alu_result_0_cry_17_Y), .B(de_ex_pipe_curr_pc_ex[17]), .C(gpr_rs1_rd_data_sig[17]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[17]), .FCI(un6_exu_alu_result_0_cry_16_Z) ); defparam un6_exu_alu_result_0_cry_17.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_0_cry_18 ( .FCO(un6_exu_alu_result_0_cry_18_Z), .S(un6_exu_alu_result0[18]), .Y(un6_exu_alu_result_0_cry_18_Y), .B(de_ex_pipe_curr_pc_ex[18]), .C(gpr_rs1_rd_data_sig[18]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[18]), .FCI(un6_exu_alu_result_0_cry_17_Z) ); defparam un6_exu_alu_result_0_cry_18.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_0_cry_19 ( .FCO(un6_exu_alu_result_0_cry_19_Z), .S(un6_exu_alu_result0[19]), .Y(un6_exu_alu_result_0_cry_19_Y), .B(de_ex_pipe_curr_pc_ex[19]), .C(gpr_rs1_rd_data_sig[19]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[19]), .FCI(un6_exu_alu_result_0_cry_18_Z) ); defparam un6_exu_alu_result_0_cry_19.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_0_cry_20 ( .FCO(un6_exu_alu_result_0_cry_20_Z), .S(un6_exu_alu_result0[20]), .Y(un6_exu_alu_result_0_cry_20_Y), .B(de_ex_pipe_curr_pc_ex[20]), .C(gpr_rs1_rd_data_sig[20]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[20]), .FCI(un6_exu_alu_result_0_cry_19_Z) ); defparam un6_exu_alu_result_0_cry_20.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_0_cry_21 ( .FCO(un6_exu_alu_result_0_cry_21_Z), .S(un6_exu_alu_result0[21]), .Y(un6_exu_alu_result_0_cry_21_Y), .B(de_ex_pipe_curr_pc_ex[21]), .C(gpr_rs1_rd_data_sig[21]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[21]), .FCI(un6_exu_alu_result_0_cry_20_Z) ); defparam un6_exu_alu_result_0_cry_21.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_0_cry_22 ( .FCO(un6_exu_alu_result_0_cry_22_Z), .S(un6_exu_alu_result0[22]), .Y(un6_exu_alu_result_0_cry_22_Y), .B(de_ex_pipe_curr_pc_ex[22]), .C(gpr_rs1_rd_data_sig[22]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[22]), .FCI(un6_exu_alu_result_0_cry_21_Z) ); defparam un6_exu_alu_result_0_cry_22.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_0_cry_23 ( .FCO(un6_exu_alu_result_0_cry_23_Z), .S(un6_exu_alu_result0[23]), .Y(un6_exu_alu_result_0_cry_23_Y), .B(de_ex_pipe_curr_pc_ex[23]), .C(gpr_rs1_rd_data_sig[23]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[23]), .FCI(un6_exu_alu_result_0_cry_22_Z) ); defparam un6_exu_alu_result_0_cry_23.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_0_cry_24 ( .FCO(un6_exu_alu_result_0_cry_24_Z), .S(un6_exu_alu_result0[24]), .Y(un6_exu_alu_result_0_cry_24_Y), .B(de_ex_pipe_curr_pc_ex[24]), .C(gpr_rs1_rd_data_sig[24]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[24]), .FCI(un6_exu_alu_result_0_cry_23_Z) ); defparam un6_exu_alu_result_0_cry_24.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_0_cry_25 ( .FCO(un6_exu_alu_result_0_cry_25_Z), .S(un6_exu_alu_result0[25]), .Y(un6_exu_alu_result_0_cry_25_Y), .B(de_ex_pipe_curr_pc_ex[25]), .C(gpr_rs1_rd_data_sig[25]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[25]), .FCI(un6_exu_alu_result_0_cry_24_Z) ); defparam un6_exu_alu_result_0_cry_25.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_0_cry_26 ( .FCO(un6_exu_alu_result_0_cry_26_Z), .S(un6_exu_alu_result0[26]), .Y(un6_exu_alu_result_0_cry_26_Y), .B(de_ex_pipe_curr_pc_ex[26]), .C(gpr_rs1_rd_data_sig[26]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[26]), .FCI(un6_exu_alu_result_0_cry_25_Z) ); defparam un6_exu_alu_result_0_cry_26.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_0_cry_27 ( .FCO(un6_exu_alu_result_0_cry_27_Z), .S(un6_exu_alu_result0[27]), .Y(un6_exu_alu_result_0_cry_27_Y), .B(de_ex_pipe_curr_pc_ex[27]), .C(gpr_rs1_rd_data_sig[27]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[27]), .FCI(un6_exu_alu_result_0_cry_26_Z) ); defparam un6_exu_alu_result_0_cry_27.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_0_cry_28 ( .FCO(un6_exu_alu_result_0_cry_28_Z), .S(un6_exu_alu_result0[28]), .Y(un6_exu_alu_result_0_cry_28_Y), .B(de_ex_pipe_curr_pc_ex[28]), .C(gpr_rs1_rd_data_sig[28]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[28]), .FCI(un6_exu_alu_result_0_cry_27_Z) ); defparam un6_exu_alu_result_0_cry_28.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_0_cry_29 ( .FCO(un6_exu_alu_result_0_cry_29_Z), .S(un6_exu_alu_result0[29]), .Y(un6_exu_alu_result_0_cry_29_Y), .B(de_ex_pipe_curr_pc_ex[29]), .C(gpr_rs1_rd_data_sig[29]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[29]), .FCI(un6_exu_alu_result_0_cry_28_Z) ); defparam un6_exu_alu_result_0_cry_29.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_0_s_31 ( .FCO(un6_exu_alu_result_0_s_31_FCO), .S(un6_exu_alu_result0[31]), .Y(un6_exu_alu_result_0_s_31_Y), .B(exu_alu_operand0_Z[31]), .C(exu_alu_operand1_Z[31]), .D(GND), .A(VCC), .FCI(un6_exu_alu_result_0_cry_30_Z) ); defparam un6_exu_alu_result_0_s_31.INIT=20'h49900; // @46:11044 ARI1 un6_exu_alu_result_0_cry_30 ( .FCO(un6_exu_alu_result_0_cry_30_Z), .S(un6_exu_alu_result0[30]), .Y(un6_exu_alu_result_0_cry_30_Y), .B(de_ex_pipe_curr_pc_ex[30]), .C(gpr_rs1_rd_data_sig[30]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[30]), .FCI(un6_exu_alu_result_0_cry_29_Z) ); defparam un6_exu_alu_result_0_cry_30.INIT=20'h553AC; // @46:11023 ARI1 exu_alu_result_int_cry_0 ( .FCO(exu_alu_result_int_cry_0_Z), .S(exu_alu_result_int_cry_0_S), .Y(exu_alu_result_int_cry_0_Y), .B(exu_alu_operand1_0), .C(exu_result_reg_int_Z[32]), .D(start_slow_mul), .A(exu_alu_result_int), .FCI(GND) ); defparam exu_alu_result_int_cry_0.INIT=20'h535CA; // @46:11023 ARI1 exu_alu_result_int_cry_1 ( .FCO(exu_alu_result_int_cry_1_Z), .S(exu_alu_result_int_Z[1]), .Y(exu_alu_result_int_cry_1_Y), .B(exu_alu_operand1_Z[1]), .C(exu_result_reg_int_Z[33]), .D(start_slow_mul), .A(exu_alu_operand0_int[1]), .FCI(exu_alu_result_int_cry_0_Z) ); defparam exu_alu_result_int_cry_1.INIT=20'h535CA; // @46:11023 ARI1 exu_alu_result_int_cry_2 ( .FCO(exu_alu_result_int_cry_2_Z), .S(exu_alu_result_int_Z[2]), .Y(exu_alu_result_int_cry_2_Y), .B(exu_alu_operand1_Z[2]), .C(exu_result_reg_int_Z[34]), .D(start_slow_mul), .A(exu_alu_operand0_int[2]), .FCI(exu_alu_result_int_cry_1_Z) ); defparam exu_alu_result_int_cry_2.INIT=20'h535CA; // @46:11023 ARI1 exu_alu_result_int_cry_3 ( .FCO(exu_alu_result_int_cry_3_Z), .S(exu_alu_result_int_Z[3]), .Y(exu_alu_result_int_cry_3_Y), .B(exu_alu_operand1_Z[3]), .C(exu_result_reg_int_Z[35]), .D(start_slow_mul), .A(exu_alu_operand0_int[3]), .FCI(exu_alu_result_int_cry_2_Z) ); defparam exu_alu_result_int_cry_3.INIT=20'h535CA; // @46:11023 ARI1 exu_alu_result_int_cry_4 ( .FCO(exu_alu_result_int_cry_4_Z), .S(exu_alu_result_int_Z[4]), .Y(exu_alu_result_int_cry_4_Y), .B(exu_alu_operand1_Z[4]), .C(exu_result_reg_int_Z[36]), .D(start_slow_mul), .A(exu_alu_operand0_int[4]), .FCI(exu_alu_result_int_cry_3_Z) ); defparam exu_alu_result_int_cry_4.INIT=20'h535CA; // @46:11023 ARI1 exu_alu_result_int_cry_5 ( .FCO(exu_alu_result_int_cry_5_Z), .S(exu_alu_result_int_Z[5]), .Y(exu_alu_result_int_cry_5_Y), .B(exu_alu_operand1_Z[5]), .C(exu_result_reg_int_Z[37]), .D(start_slow_mul), .A(exu_alu_operand0_int[5]), .FCI(exu_alu_result_int_cry_4_Z) ); defparam exu_alu_result_int_cry_5.INIT=20'h535CA; // @46:11023 ARI1 exu_alu_result_int_cry_6 ( .FCO(exu_alu_result_int_cry_6_Z), .S(exu_alu_result_int_Z[6]), .Y(exu_alu_result_int_cry_6_Y), .B(exu_alu_operand1_Z[6]), .C(exu_result_reg_int_Z[38]), .D(start_slow_mul), .A(exu_alu_operand0_int[6]), .FCI(exu_alu_result_int_cry_5_Z) ); defparam exu_alu_result_int_cry_6.INIT=20'h535CA; // @46:11023 ARI1 exu_alu_result_int_cry_7 ( .FCO(exu_alu_result_int_cry_7_Z), .S(exu_alu_result_int_Z[7]), .Y(exu_alu_result_int_cry_7_Y), .B(exu_alu_operand1_Z[7]), .C(exu_result_reg_int_Z[39]), .D(start_slow_mul), .A(exu_alu_operand0_int[7]), .FCI(exu_alu_result_int_cry_6_Z) ); defparam exu_alu_result_int_cry_7.INIT=20'h535CA; // @46:11023 ARI1 exu_alu_result_int_cry_8 ( .FCO(exu_alu_result_int_cry_8_Z), .S(exu_alu_result_int_Z[8]), .Y(exu_alu_result_int_cry_8_Y), .B(exu_alu_operand1_Z[8]), .C(exu_result_reg_int_Z[40]), .D(start_slow_mul), .A(exu_alu_operand0_int[8]), .FCI(exu_alu_result_int_cry_7_Z) ); defparam exu_alu_result_int_cry_8.INIT=20'h535CA; // @46:11023 ARI1 exu_alu_result_int_cry_9 ( .FCO(exu_alu_result_int_cry_9_Z), .S(exu_alu_result_int_Z[9]), .Y(exu_alu_result_int_cry_9_Y), .B(exu_alu_operand1_Z[9]), .C(exu_result_reg_int_Z[41]), .D(start_slow_mul), .A(exu_alu_operand0_int[9]), .FCI(exu_alu_result_int_cry_8_Z) ); defparam exu_alu_result_int_cry_9.INIT=20'h535CA; // @46:11023 ARI1 exu_alu_result_int_cry_10 ( .FCO(exu_alu_result_int_cry_10_Z), .S(exu_alu_result_int_Z[10]), .Y(exu_alu_result_int_cry_10_Y), .B(exu_alu_operand1_Z[10]), .C(exu_result_reg_int_Z[42]), .D(start_slow_mul), .A(exu_alu_operand0_int[10]), .FCI(exu_alu_result_int_cry_9_Z) ); defparam exu_alu_result_int_cry_10.INIT=20'h535CA; // @46:11023 ARI1 exu_alu_result_int_cry_11 ( .FCO(exu_alu_result_int_cry_11_Z), .S(exu_alu_result_int_Z[11]), .Y(exu_alu_result_int_cry_11_Y), .B(exu_alu_operand1_Z[11]), .C(exu_result_reg_int_Z[43]), .D(start_slow_mul), .A(exu_alu_operand0_int[11]), .FCI(exu_alu_result_int_cry_10_Z) ); defparam exu_alu_result_int_cry_11.INIT=20'h535CA; // @46:11023 ARI1 exu_alu_result_int_cry_12 ( .FCO(exu_alu_result_int_cry_12_Z), .S(exu_alu_result_int_Z[12]), .Y(exu_alu_result_int_cry_12_Y), .B(exu_alu_operand1_Z[12]), .C(exu_result_reg_int_Z[44]), .D(start_slow_mul), .A(exu_alu_operand0_int[12]), .FCI(exu_alu_result_int_cry_11_Z) ); defparam exu_alu_result_int_cry_12.INIT=20'h535CA; // @46:11023 ARI1 exu_alu_result_int_cry_13 ( .FCO(exu_alu_result_int_cry_13_Z), .S(exu_alu_result_int_Z[13]), .Y(exu_alu_result_int_cry_13_Y), .B(exu_alu_operand1_Z[13]), .C(exu_result_reg_int_Z[45]), .D(start_slow_mul), .A(exu_alu_operand0_int[13]), .FCI(exu_alu_result_int_cry_12_Z) ); defparam exu_alu_result_int_cry_13.INIT=20'h535CA; // @46:11023 ARI1 exu_alu_result_int_cry_14 ( .FCO(exu_alu_result_int_cry_14_Z), .S(exu_alu_result_int_Z[14]), .Y(exu_alu_result_int_cry_14_Y), .B(exu_alu_operand1_Z[14]), .C(exu_result_reg_int_Z[46]), .D(start_slow_mul), .A(exu_alu_operand0_int[14]), .FCI(exu_alu_result_int_cry_13_Z) ); defparam exu_alu_result_int_cry_14.INIT=20'h535CA; // @46:11023 ARI1 exu_alu_result_int_cry_15 ( .FCO(exu_alu_result_int_cry_15_Z), .S(exu_alu_result_int_Z[15]), .Y(exu_alu_result_int_cry_15_Y), .B(exu_alu_operand1_Z[15]), .C(exu_result_reg_int_Z[47]), .D(start_slow_mul), .A(exu_alu_operand0_int[15]), .FCI(exu_alu_result_int_cry_14_Z) ); defparam exu_alu_result_int_cry_15.INIT=20'h535CA; // @46:11023 ARI1 exu_alu_result_int_cry_16 ( .FCO(exu_alu_result_int_cry_16_Z), .S(exu_alu_result_int_Z[16]), .Y(exu_alu_result_int_cry_16_Y), .B(exu_alu_operand1_Z[16]), .C(exu_result_reg_int_Z[48]), .D(start_slow_mul), .A(exu_alu_operand0_int[16]), .FCI(exu_alu_result_int_cry_15_Z) ); defparam exu_alu_result_int_cry_16.INIT=20'h535CA; // @46:11023 ARI1 exu_alu_result_int_cry_17 ( .FCO(exu_alu_result_int_cry_17_Z), .S(exu_alu_result_int_Z[17]), .Y(exu_alu_result_int_cry_17_Y), .B(exu_alu_operand1_Z[17]), .C(exu_result_reg_int_Z[49]), .D(start_slow_mul), .A(exu_alu_operand0_int[17]), .FCI(exu_alu_result_int_cry_16_Z) ); defparam exu_alu_result_int_cry_17.INIT=20'h535CA; // @46:11023 ARI1 exu_alu_result_int_cry_18 ( .FCO(exu_alu_result_int_cry_18_Z), .S(exu_alu_result_int_Z[18]), .Y(exu_alu_result_int_cry_18_Y), .B(exu_alu_operand1_Z[18]), .C(exu_result_reg_int_Z[50]), .D(start_slow_mul), .A(exu_alu_operand0_int[18]), .FCI(exu_alu_result_int_cry_17_Z) ); defparam exu_alu_result_int_cry_18.INIT=20'h535CA; // @46:11023 ARI1 exu_alu_result_int_cry_19 ( .FCO(exu_alu_result_int_cry_19_Z), .S(exu_alu_result_int_Z[19]), .Y(exu_alu_result_int_cry_19_Y), .B(exu_alu_operand1_Z[19]), .C(exu_result_reg_int_Z[51]), .D(start_slow_mul), .A(exu_alu_operand0_int[19]), .FCI(exu_alu_result_int_cry_18_Z) ); defparam exu_alu_result_int_cry_19.INIT=20'h535CA; // @46:11023 ARI1 exu_alu_result_int_cry_20 ( .FCO(exu_alu_result_int_cry_20_Z), .S(exu_alu_result_int_Z[20]), .Y(exu_alu_result_int_cry_20_Y), .B(exu_alu_operand1_Z[20]), .C(exu_result_reg_int_Z[52]), .D(start_slow_mul), .A(exu_alu_operand0_int[20]), .FCI(exu_alu_result_int_cry_19_Z) ); defparam exu_alu_result_int_cry_20.INIT=20'h535CA; // @46:11023 ARI1 exu_alu_result_int_cry_21 ( .FCO(exu_alu_result_int_cry_21_Z), .S(exu_alu_result_int_Z[21]), .Y(exu_alu_result_int_cry_21_Y), .B(exu_alu_operand1_Z[21]), .C(exu_result_reg_int_Z[53]), .D(start_slow_mul), .A(exu_alu_operand0_int[21]), .FCI(exu_alu_result_int_cry_20_Z) ); defparam exu_alu_result_int_cry_21.INIT=20'h535CA; // @46:11023 ARI1 exu_alu_result_int_cry_22 ( .FCO(exu_alu_result_int_cry_22_Z), .S(exu_alu_result_int_Z[22]), .Y(exu_alu_result_int_cry_22_Y), .B(exu_alu_operand1_Z[22]), .C(exu_result_reg_int_Z[54]), .D(start_slow_mul), .A(exu_alu_operand0_int[22]), .FCI(exu_alu_result_int_cry_21_Z) ); defparam exu_alu_result_int_cry_22.INIT=20'h535CA; // @46:11023 ARI1 exu_alu_result_int_cry_23 ( .FCO(exu_alu_result_int_cry_23_Z), .S(exu_alu_result_int_Z[23]), .Y(exu_alu_result_int_cry_23_Y), .B(exu_alu_operand1_Z[23]), .C(exu_result_reg_int_Z[55]), .D(start_slow_mul), .A(exu_alu_operand0_int[23]), .FCI(exu_alu_result_int_cry_22_Z) ); defparam exu_alu_result_int_cry_23.INIT=20'h535CA; // @46:11023 ARI1 exu_alu_result_int_cry_24 ( .FCO(exu_alu_result_int_cry_24_Z), .S(exu_alu_result_int_Z[24]), .Y(exu_alu_result_int_cry_24_Y), .B(exu_alu_operand1_Z[24]), .C(exu_result_reg_int_Z[56]), .D(start_slow_mul), .A(exu_alu_operand0_int[24]), .FCI(exu_alu_result_int_cry_23_Z) ); defparam exu_alu_result_int_cry_24.INIT=20'h535CA; // @46:11023 ARI1 exu_alu_result_int_cry_25 ( .FCO(exu_alu_result_int_cry_25_Z), .S(exu_alu_result_int_Z[25]), .Y(exu_alu_result_int_cry_25_Y), .B(exu_alu_operand1_Z[25]), .C(exu_result_reg_int_Z[57]), .D(start_slow_mul), .A(exu_alu_operand0_int[25]), .FCI(exu_alu_result_int_cry_24_Z) ); defparam exu_alu_result_int_cry_25.INIT=20'h535CA; // @46:11023 ARI1 exu_alu_result_int_cry_26 ( .FCO(exu_alu_result_int_cry_26_Z), .S(exu_alu_result_int_Z[26]), .Y(exu_alu_result_int_cry_26_Y), .B(exu_alu_operand1_Z[26]), .C(exu_result_reg_int_Z[58]), .D(start_slow_mul), .A(exu_alu_operand0_int[26]), .FCI(exu_alu_result_int_cry_25_Z) ); defparam exu_alu_result_int_cry_26.INIT=20'h535CA; // @46:11023 ARI1 exu_alu_result_int_cry_27 ( .FCO(exu_alu_result_int_cry_27_Z), .S(exu_alu_result_int_Z[27]), .Y(exu_alu_result_int_cry_27_Y), .B(exu_alu_operand1_Z[27]), .C(exu_result_reg_int_Z[59]), .D(start_slow_mul), .A(exu_alu_operand0_int[27]), .FCI(exu_alu_result_int_cry_26_Z) ); defparam exu_alu_result_int_cry_27.INIT=20'h535CA; // @46:11023 ARI1 exu_alu_result_int_cry_28 ( .FCO(exu_alu_result_int_cry_28_Z), .S(exu_alu_result_int_Z[28]), .Y(exu_alu_result_int_cry_28_Y), .B(exu_alu_operand1_Z[28]), .C(exu_result_reg_int_Z[60]), .D(start_slow_mul), .A(exu_alu_operand0_int[28]), .FCI(exu_alu_result_int_cry_27_Z) ); defparam exu_alu_result_int_cry_28.INIT=20'h535CA; // @46:11023 ARI1 exu_alu_result_int_cry_29 ( .FCO(exu_alu_result_int_cry_29_Z), .S(exu_alu_result_int_Z[29]), .Y(exu_alu_result_int_cry_29_Y), .B(exu_alu_operand1_Z[29]), .C(exu_result_reg_int_Z[61]), .D(start_slow_mul), .A(exu_alu_operand0_int[29]), .FCI(exu_alu_result_int_cry_28_Z) ); defparam exu_alu_result_int_cry_29.INIT=20'h535CA; // @46:11023 ARI1 exu_alu_result_int_cry_30 ( .FCO(exu_alu_result_int_cry_30_Z), .S(exu_alu_result_int_Z[30]), .Y(exu_alu_result_int_cry_30_Y), .B(exu_alu_operand1_Z[30]), .C(exu_result_reg_int_Z[62]), .D(start_slow_mul), .A(exu_alu_operand0_int[30]), .FCI(exu_alu_result_int_cry_29_Z) ); defparam exu_alu_result_int_cry_30.INIT=20'h535CA; // @46:11023 ARI1 exu_alu_result_int_s_32 ( .FCO(exu_alu_result_int_s_32_FCO), .S(exu_alu_result_int_Z[32]), .Y(exu_alu_result_int_s_32_Y), .B(exu_alu_operand0_int[32]), .C(exu_result_reg_int_Z[64]), .D(start_slow_mul), .A(VCC), .FCI(exu_alu_result_int_cry_31_Z) ); defparam exu_alu_result_int_s_32.INIT=20'h46A00; // @46:11023 ARI1 exu_alu_result_int_cry_31 ( .FCO(exu_alu_result_int_cry_31_Z), .S(exu_alu_result_int_Z[31]), .Y(exu_alu_result_int_cry_31_Y), .B(exu_alu_operand1_Z[31]), .C(exu_result_reg_int_Z[63]), .D(start_slow_mul), .A(exu_alu_operand0_int[31]), .FCI(exu_alu_result_int_cry_30_Z) ); defparam exu_alu_result_int_cry_31.INIT=20'h535CA; // @46:11044 ARI1 un6_exu_alu_result_1_cry_0 ( .FCO(un6_exu_alu_result_1_cry_0_Z), .S(un6_exu_alu_result_1_cry_0_S), .Y(un6_exu_alu_result_1_cry_0_Y), .B(de_ex_pipe_curr_pc_ex[0]), .C(gpr_rs1_rd_data_sig[0]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(VCC), .FCI(GND) ); defparam un6_exu_alu_result_1_cry_0.INIT=20'h65300; // @46:11044 ARI1 un6_exu_alu_result_1_cry_1 ( .FCO(un6_exu_alu_result_1_cry_1_Z), .S(un6_exu_alu_result1[1]), .Y(un6_exu_alu_result_1_cry_1_Y), .B(de_ex_pipe_curr_pc_ex[1]), .C(gpr_rs1_rd_data_sig[1]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[1]), .FCI(un6_exu_alu_result_1_cry_0_Z) ); defparam un6_exu_alu_result_1_cry_1.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_1_cry_2 ( .FCO(un6_exu_alu_result_1_cry_2_Z), .S(un6_exu_alu_result1[2]), .Y(un6_exu_alu_result_1_cry_2_Y), .B(de_ex_pipe_curr_pc_ex[2]), .C(gpr_rs1_rd_data_sig[2]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[2]), .FCI(un6_exu_alu_result_1_cry_1_Z) ); defparam un6_exu_alu_result_1_cry_2.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_1_cry_3 ( .FCO(un6_exu_alu_result_1_cry_3_Z), .S(un6_exu_alu_result1[3]), .Y(un6_exu_alu_result_1_cry_3_Y), .B(de_ex_pipe_curr_pc_ex[3]), .C(gpr_rs1_rd_data_sig[3]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[3]), .FCI(un6_exu_alu_result_1_cry_2_Z) ); defparam un6_exu_alu_result_1_cry_3.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_1_cry_4 ( .FCO(un6_exu_alu_result_1_cry_4_Z), .S(un6_exu_alu_result1[4]), .Y(un6_exu_alu_result_1_cry_4_Y), .B(de_ex_pipe_curr_pc_ex[4]), .C(gpr_rs1_rd_data_sig[4]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[4]), .FCI(un6_exu_alu_result_1_cry_3_Z) ); defparam un6_exu_alu_result_1_cry_4.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_1_cry_5 ( .FCO(un6_exu_alu_result_1_cry_5_Z), .S(un6_exu_alu_result1[5]), .Y(un6_exu_alu_result_1_cry_5_Y), .B(de_ex_pipe_curr_pc_ex[5]), .C(gpr_rs1_rd_data_sig[5]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[5]), .FCI(un6_exu_alu_result_1_cry_4_Z) ); defparam un6_exu_alu_result_1_cry_5.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_1_cry_6 ( .FCO(un6_exu_alu_result_1_cry_6_Z), .S(un6_exu_alu_result1[6]), .Y(un6_exu_alu_result_1_cry_6_Y), .B(de_ex_pipe_curr_pc_ex[6]), .C(gpr_rs1_rd_data_sig[6]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[6]), .FCI(un6_exu_alu_result_1_cry_5_Z) ); defparam un6_exu_alu_result_1_cry_6.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_1_cry_7 ( .FCO(un6_exu_alu_result_1_cry_7_Z), .S(un6_exu_alu_result1[7]), .Y(un6_exu_alu_result_1_cry_7_Y), .B(de_ex_pipe_curr_pc_ex[7]), .C(gpr_rs1_rd_data_sig[7]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[7]), .FCI(un6_exu_alu_result_1_cry_6_Z) ); defparam un6_exu_alu_result_1_cry_7.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_1_cry_8 ( .FCO(un6_exu_alu_result_1_cry_8_Z), .S(un6_exu_alu_result1[8]), .Y(un6_exu_alu_result_1_cry_8_Y), .B(de_ex_pipe_curr_pc_ex[8]), .C(gpr_rs1_rd_data_sig[8]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[8]), .FCI(un6_exu_alu_result_1_cry_7_Z) ); defparam un6_exu_alu_result_1_cry_8.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_1_cry_9 ( .FCO(un6_exu_alu_result_1_cry_9_Z), .S(un6_exu_alu_result1[9]), .Y(un6_exu_alu_result_1_cry_9_Y), .B(de_ex_pipe_curr_pc_ex[9]), .C(gpr_rs1_rd_data_sig[9]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[9]), .FCI(un6_exu_alu_result_1_cry_8_Z) ); defparam un6_exu_alu_result_1_cry_9.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_1_cry_10 ( .FCO(un6_exu_alu_result_1_cry_10_Z), .S(un6_exu_alu_result1[10]), .Y(un6_exu_alu_result_1_cry_10_Y), .B(de_ex_pipe_curr_pc_ex[10]), .C(gpr_rs1_rd_data_sig[10]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[10]), .FCI(un6_exu_alu_result_1_cry_9_Z) ); defparam un6_exu_alu_result_1_cry_10.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_1_cry_11 ( .FCO(un6_exu_alu_result_1_cry_11_Z), .S(un6_exu_alu_result1[11]), .Y(un6_exu_alu_result_1_cry_11_Y), .B(de_ex_pipe_curr_pc_ex[11]), .C(gpr_rs1_rd_data_sig[11]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[11]), .FCI(un6_exu_alu_result_1_cry_10_Z) ); defparam un6_exu_alu_result_1_cry_11.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_1_cry_12 ( .FCO(un6_exu_alu_result_1_cry_12_Z), .S(un6_exu_alu_result1[12]), .Y(un6_exu_alu_result_1_cry_12_Y), .B(de_ex_pipe_curr_pc_ex[12]), .C(gpr_rs1_rd_data_sig[12]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[12]), .FCI(un6_exu_alu_result_1_cry_11_Z) ); defparam un6_exu_alu_result_1_cry_12.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_1_cry_13 ( .FCO(un6_exu_alu_result_1_cry_13_Z), .S(un6_exu_alu_result1[13]), .Y(un6_exu_alu_result_1_cry_13_Y), .B(de_ex_pipe_curr_pc_ex[13]), .C(gpr_rs1_rd_data_sig[13]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[13]), .FCI(un6_exu_alu_result_1_cry_12_Z) ); defparam un6_exu_alu_result_1_cry_13.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_1_cry_14 ( .FCO(un6_exu_alu_result_1_cry_14_Z), .S(un6_exu_alu_result1[14]), .Y(un6_exu_alu_result_1_cry_14_Y), .B(de_ex_pipe_curr_pc_ex[14]), .C(gpr_rs1_rd_data_sig[14]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[14]), .FCI(un6_exu_alu_result_1_cry_13_Z) ); defparam un6_exu_alu_result_1_cry_14.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_1_cry_15 ( .FCO(un6_exu_alu_result_1_cry_15_Z), .S(un6_exu_alu_result1[15]), .Y(un6_exu_alu_result_1_cry_15_Y), .B(de_ex_pipe_curr_pc_ex[15]), .C(gpr_rs1_rd_data_sig[15]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[15]), .FCI(un6_exu_alu_result_1_cry_14_Z) ); defparam un6_exu_alu_result_1_cry_15.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_1_cry_16 ( .FCO(un6_exu_alu_result_1_cry_16_Z), .S(un6_exu_alu_result1[16]), .Y(un6_exu_alu_result_1_cry_16_Y), .B(de_ex_pipe_curr_pc_ex[16]), .C(gpr_rs1_rd_data_sig[16]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[16]), .FCI(un6_exu_alu_result_1_cry_15_Z) ); defparam un6_exu_alu_result_1_cry_16.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_1_cry_17 ( .FCO(un6_exu_alu_result_1_cry_17_Z), .S(un6_exu_alu_result1[17]), .Y(un6_exu_alu_result_1_cry_17_Y), .B(de_ex_pipe_curr_pc_ex[17]), .C(gpr_rs1_rd_data_sig[17]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[17]), .FCI(un6_exu_alu_result_1_cry_16_Z) ); defparam un6_exu_alu_result_1_cry_17.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_1_cry_18 ( .FCO(un6_exu_alu_result_1_cry_18_Z), .S(un6_exu_alu_result1[18]), .Y(un6_exu_alu_result_1_cry_18_Y), .B(de_ex_pipe_curr_pc_ex[18]), .C(gpr_rs1_rd_data_sig[18]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[18]), .FCI(un6_exu_alu_result_1_cry_17_Z) ); defparam un6_exu_alu_result_1_cry_18.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_1_cry_19 ( .FCO(un6_exu_alu_result_1_cry_19_Z), .S(un6_exu_alu_result1[19]), .Y(un6_exu_alu_result_1_cry_19_Y), .B(de_ex_pipe_curr_pc_ex[19]), .C(gpr_rs1_rd_data_sig[19]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[19]), .FCI(un6_exu_alu_result_1_cry_18_Z) ); defparam un6_exu_alu_result_1_cry_19.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_1_cry_20 ( .FCO(un6_exu_alu_result_1_cry_20_Z), .S(un6_exu_alu_result1[20]), .Y(un6_exu_alu_result_1_cry_20_Y), .B(de_ex_pipe_curr_pc_ex[20]), .C(gpr_rs1_rd_data_sig[20]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[20]), .FCI(un6_exu_alu_result_1_cry_19_Z) ); defparam un6_exu_alu_result_1_cry_20.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_1_cry_21 ( .FCO(un6_exu_alu_result_1_cry_21_Z), .S(un6_exu_alu_result1[21]), .Y(un6_exu_alu_result_1_cry_21_Y), .B(de_ex_pipe_curr_pc_ex[21]), .C(gpr_rs1_rd_data_sig[21]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[21]), .FCI(un6_exu_alu_result_1_cry_20_Z) ); defparam un6_exu_alu_result_1_cry_21.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_1_cry_22 ( .FCO(un6_exu_alu_result_1_cry_22_Z), .S(un6_exu_alu_result1[22]), .Y(un6_exu_alu_result_1_cry_22_Y), .B(de_ex_pipe_curr_pc_ex[22]), .C(gpr_rs1_rd_data_sig[22]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[22]), .FCI(un6_exu_alu_result_1_cry_21_Z) ); defparam un6_exu_alu_result_1_cry_22.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_1_cry_23 ( .FCO(un6_exu_alu_result_1_cry_23_Z), .S(un6_exu_alu_result1[23]), .Y(un6_exu_alu_result_1_cry_23_Y), .B(de_ex_pipe_curr_pc_ex[23]), .C(gpr_rs1_rd_data_sig[23]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[23]), .FCI(un6_exu_alu_result_1_cry_22_Z) ); defparam un6_exu_alu_result_1_cry_23.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_1_cry_24 ( .FCO(un6_exu_alu_result_1_cry_24_Z), .S(un6_exu_alu_result1[24]), .Y(un6_exu_alu_result_1_cry_24_Y), .B(de_ex_pipe_curr_pc_ex[24]), .C(gpr_rs1_rd_data_sig[24]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[24]), .FCI(un6_exu_alu_result_1_cry_23_Z) ); defparam un6_exu_alu_result_1_cry_24.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_1_cry_25 ( .FCO(un6_exu_alu_result_1_cry_25_Z), .S(un6_exu_alu_result1[25]), .Y(un6_exu_alu_result_1_cry_25_Y), .B(de_ex_pipe_curr_pc_ex[25]), .C(gpr_rs1_rd_data_sig[25]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[25]), .FCI(un6_exu_alu_result_1_cry_24_Z) ); defparam un6_exu_alu_result_1_cry_25.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_1_cry_26 ( .FCO(un6_exu_alu_result_1_cry_26_Z), .S(un6_exu_alu_result1[26]), .Y(un6_exu_alu_result_1_cry_26_Y), .B(de_ex_pipe_curr_pc_ex[26]), .C(gpr_rs1_rd_data_sig[26]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[26]), .FCI(un6_exu_alu_result_1_cry_25_Z) ); defparam un6_exu_alu_result_1_cry_26.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_1_cry_27 ( .FCO(un6_exu_alu_result_1_cry_27_Z), .S(un6_exu_alu_result1[27]), .Y(un6_exu_alu_result_1_cry_27_Y), .B(de_ex_pipe_curr_pc_ex[27]), .C(gpr_rs1_rd_data_sig[27]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[27]), .FCI(un6_exu_alu_result_1_cry_26_Z) ); defparam un6_exu_alu_result_1_cry_27.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_1_cry_28 ( .FCO(un6_exu_alu_result_1_cry_28_Z), .S(un6_exu_alu_result1[28]), .Y(un6_exu_alu_result_1_cry_28_Y), .B(de_ex_pipe_curr_pc_ex[28]), .C(gpr_rs1_rd_data_sig[28]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[28]), .FCI(un6_exu_alu_result_1_cry_27_Z) ); defparam un6_exu_alu_result_1_cry_28.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_1_cry_29 ( .FCO(un6_exu_alu_result_1_cry_29_Z), .S(un6_exu_alu_result1[29]), .Y(un6_exu_alu_result_1_cry_29_Y), .B(de_ex_pipe_curr_pc_ex[29]), .C(gpr_rs1_rd_data_sig[29]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[29]), .FCI(un6_exu_alu_result_1_cry_28_Z) ); defparam un6_exu_alu_result_1_cry_29.INIT=20'h553AC; // @46:11044 ARI1 un6_exu_alu_result_1_s_31 ( .FCO(un6_exu_alu_result_1_s_31_FCO), .S(un6_exu_alu_result1[31]), .Y(un6_exu_alu_result_1_s_31_Y), .B(exu_alu_operand0_Z[31]), .C(exu_alu_operand1_Z[31]), .D(GND), .A(VCC), .FCI(un6_exu_alu_result_1_cry_30_Z) ); defparam un6_exu_alu_result_1_s_31.INIT=20'h49900; // @46:11044 ARI1 un6_exu_alu_result_1_cry_30 ( .FCO(un6_exu_alu_result_1_cry_30_Z), .S(un6_exu_alu_result1[30]), .Y(un6_exu_alu_result_1_cry_30_Y), .B(de_ex_pipe_curr_pc_ex[30]), .C(gpr_rs1_rd_data_sig[30]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i_0[30]), .FCI(un6_exu_alu_result_1_cry_29_Z) ); defparam un6_exu_alu_result_1_cry_30.INIT=20'h553AC; // @46:11431 ARI1 un1_dividend_cry_0 ( .FCO(un1_dividend_cry_0_Z), .S(un1_dividend_cry_0_S), .Y(un1_dividend_cry_0_Y), .B(dividend_Z[0]), .C(GND), .D(GND), .A(div_divisor_Z[0]), .FCI(GND) ); defparam un1_dividend_cry_0.INIT=20'h5AA55; // @46:11431 ARI1 un1_dividend_cry_1 ( .FCO(un1_dividend_cry_1_Z), .S(un1_dividend_cry_1_S), .Y(un1_dividend_cry_1_Y), .B(dividend_Z[1]), .C(GND), .D(GND), .A(div_divisor_Z[1]), .FCI(un1_dividend_cry_0_Z) ); defparam un1_dividend_cry_1.INIT=20'h5AA55; // @46:11431 ARI1 un1_dividend_cry_2 ( .FCO(un1_dividend_cry_2_Z), .S(un1_dividend_cry_2_S), .Y(un1_dividend_cry_2_Y), .B(dividend_Z[2]), .C(GND), .D(GND), .A(div_divisor_Z[2]), .FCI(un1_dividend_cry_1_Z) ); defparam un1_dividend_cry_2.INIT=20'h5AA55; // @46:11431 ARI1 un1_dividend_cry_3 ( .FCO(un1_dividend_cry_3_Z), .S(un1_dividend_cry_3_S), .Y(un1_dividend_cry_3_Y), .B(dividend_Z[3]), .C(GND), .D(GND), .A(div_divisor_Z[3]), .FCI(un1_dividend_cry_2_Z) ); defparam un1_dividend_cry_3.INIT=20'h5AA55; // @46:11431 ARI1 un1_dividend_cry_4 ( .FCO(un1_dividend_cry_4_Z), .S(un1_dividend_cry_4_S), .Y(un1_dividend_cry_4_Y), .B(dividend_Z[4]), .C(GND), .D(GND), .A(div_divisor_Z[4]), .FCI(un1_dividend_cry_3_Z) ); defparam un1_dividend_cry_4.INIT=20'h5AA55; // @46:11431 ARI1 un1_dividend_cry_5 ( .FCO(un1_dividend_cry_5_Z), .S(un1_dividend_cry_5_S), .Y(un1_dividend_cry_5_Y), .B(dividend_Z[5]), .C(GND), .D(GND), .A(div_divisor_Z[5]), .FCI(un1_dividend_cry_4_Z) ); defparam un1_dividend_cry_5.INIT=20'h5AA55; // @46:11431 ARI1 un1_dividend_cry_6 ( .FCO(un1_dividend_cry_6_Z), .S(un1_dividend_cry_6_S), .Y(un1_dividend_cry_6_Y), .B(dividend_Z[6]), .C(GND), .D(GND), .A(div_divisor_Z[6]), .FCI(un1_dividend_cry_5_Z) ); defparam un1_dividend_cry_6.INIT=20'h5AA55; // @46:11431 ARI1 un1_dividend_cry_7 ( .FCO(un1_dividend_cry_7_Z), .S(un1_dividend_cry_7_S), .Y(un1_dividend_cry_7_Y), .B(dividend_Z[7]), .C(GND), .D(GND), .A(div_divisor_Z[7]), .FCI(un1_dividend_cry_6_Z) ); defparam un1_dividend_cry_7.INIT=20'h5AA55; // @46:11431 ARI1 un1_dividend_cry_8 ( .FCO(un1_dividend_cry_8_Z), .S(un1_dividend_cry_8_S), .Y(un1_dividend_cry_8_Y), .B(dividend_Z[8]), .C(GND), .D(GND), .A(div_divisor_Z[8]), .FCI(un1_dividend_cry_7_Z) ); defparam un1_dividend_cry_8.INIT=20'h5AA55; // @46:11431 ARI1 un1_dividend_cry_9 ( .FCO(un1_dividend_cry_9_Z), .S(un1_dividend_cry_9_S), .Y(un1_dividend_cry_9_Y), .B(dividend_Z[9]), .C(GND), .D(GND), .A(div_divisor_Z[9]), .FCI(un1_dividend_cry_8_Z) ); defparam un1_dividend_cry_9.INIT=20'h5AA55; // @46:11431 ARI1 un1_dividend_cry_10 ( .FCO(un1_dividend_cry_10_Z), .S(un1_dividend_cry_10_S), .Y(un1_dividend_cry_10_Y), .B(dividend_Z[10]), .C(GND), .D(GND), .A(div_divisor_Z[10]), .FCI(un1_dividend_cry_9_Z) ); defparam un1_dividend_cry_10.INIT=20'h5AA55; // @46:11431 ARI1 un1_dividend_cry_11 ( .FCO(un1_dividend_cry_11_Z), .S(un1_dividend_cry_11_S), .Y(un1_dividend_cry_11_Y), .B(dividend_Z[11]), .C(GND), .D(GND), .A(div_divisor_Z[11]), .FCI(un1_dividend_cry_10_Z) ); defparam un1_dividend_cry_11.INIT=20'h5AA55; // @46:11431 ARI1 un1_dividend_cry_12 ( .FCO(un1_dividend_cry_12_Z), .S(un1_dividend_cry_12_S), .Y(un1_dividend_cry_12_Y), .B(dividend_Z[12]), .C(GND), .D(GND), .A(div_divisor_Z[12]), .FCI(un1_dividend_cry_11_Z) ); defparam un1_dividend_cry_12.INIT=20'h5AA55; // @46:11431 ARI1 un1_dividend_cry_13 ( .FCO(un1_dividend_cry_13_Z), .S(un1_dividend_cry_13_S), .Y(un1_dividend_cry_13_Y), .B(dividend_Z[13]), .C(GND), .D(GND), .A(div_divisor_Z[13]), .FCI(un1_dividend_cry_12_Z) ); defparam un1_dividend_cry_13.INIT=20'h5AA55; // @46:11431 ARI1 un1_dividend_cry_14 ( .FCO(un1_dividend_cry_14_Z), .S(un1_dividend_cry_14_S), .Y(un1_dividend_cry_14_Y), .B(dividend_Z[14]), .C(GND), .D(GND), .A(div_divisor_Z[14]), .FCI(un1_dividend_cry_13_Z) ); defparam un1_dividend_cry_14.INIT=20'h5AA55; // @46:11431 ARI1 un1_dividend_cry_15 ( .FCO(un1_dividend_cry_15_Z), .S(un1_dividend_cry_15_S), .Y(un1_dividend_cry_15_Y), .B(dividend_Z[15]), .C(GND), .D(GND), .A(div_divisor_Z[15]), .FCI(un1_dividend_cry_14_Z) ); defparam un1_dividend_cry_15.INIT=20'h5AA55; // @46:11431 ARI1 un1_dividend_cry_16 ( .FCO(un1_dividend_cry_16_Z), .S(un1_dividend_cry_16_S), .Y(un1_dividend_cry_16_Y), .B(dividend_Z[16]), .C(GND), .D(GND), .A(div_divisor_Z[16]), .FCI(un1_dividend_cry_15_Z) ); defparam un1_dividend_cry_16.INIT=20'h5AA55; // @46:11431 ARI1 un1_dividend_cry_17 ( .FCO(un1_dividend_cry_17_Z), .S(un1_dividend_cry_17_S), .Y(un1_dividend_cry_17_Y), .B(dividend_Z[17]), .C(GND), .D(GND), .A(div_divisor_Z[17]), .FCI(un1_dividend_cry_16_Z) ); defparam un1_dividend_cry_17.INIT=20'h5AA55; // @46:11431 ARI1 un1_dividend_cry_18 ( .FCO(un1_dividend_cry_18_Z), .S(un1_dividend_cry_18_S), .Y(un1_dividend_cry_18_Y), .B(dividend_Z[18]), .C(GND), .D(GND), .A(div_divisor_Z[18]), .FCI(un1_dividend_cry_17_Z) ); defparam un1_dividend_cry_18.INIT=20'h5AA55; // @46:11431 ARI1 un1_dividend_cry_19 ( .FCO(un1_dividend_cry_19_Z), .S(un1_dividend_cry_19_S), .Y(un1_dividend_cry_19_Y), .B(dividend_Z[19]), .C(GND), .D(GND), .A(div_divisor_Z[19]), .FCI(un1_dividend_cry_18_Z) ); defparam un1_dividend_cry_19.INIT=20'h5AA55; // @46:11431 ARI1 un1_dividend_cry_20 ( .FCO(un1_dividend_cry_20_Z), .S(un1_dividend_cry_20_S), .Y(un1_dividend_cry_20_Y), .B(dividend_Z[20]), .C(GND), .D(GND), .A(div_divisor_Z[20]), .FCI(un1_dividend_cry_19_Z) ); defparam un1_dividend_cry_20.INIT=20'h5AA55; // @46:11431 ARI1 un1_dividend_cry_21 ( .FCO(un1_dividend_cry_21_Z), .S(un1_dividend_cry_21_S), .Y(un1_dividend_cry_21_Y), .B(dividend_Z[21]), .C(GND), .D(GND), .A(div_divisor_Z[21]), .FCI(un1_dividend_cry_20_Z) ); defparam un1_dividend_cry_21.INIT=20'h5AA55; // @46:11431 ARI1 un1_dividend_cry_22 ( .FCO(un1_dividend_cry_22_Z), .S(un1_dividend_cry_22_S), .Y(un1_dividend_cry_22_Y), .B(dividend_Z[22]), .C(GND), .D(GND), .A(div_divisor_Z[22]), .FCI(un1_dividend_cry_21_Z) ); defparam un1_dividend_cry_22.INIT=20'h5AA55; // @46:11431 ARI1 un1_dividend_cry_23 ( .FCO(un1_dividend_cry_23_Z), .S(un1_dividend_cry_23_S), .Y(un1_dividend_cry_23_Y), .B(dividend_Z[23]), .C(GND), .D(GND), .A(div_divisor_Z[23]), .FCI(un1_dividend_cry_22_Z) ); defparam un1_dividend_cry_23.INIT=20'h5AA55; // @46:11431 ARI1 un1_dividend_cry_24 ( .FCO(un1_dividend_cry_24_Z), .S(un1_dividend_cry_24_S), .Y(un1_dividend_cry_24_Y), .B(dividend_Z[24]), .C(GND), .D(GND), .A(div_divisor_Z[24]), .FCI(un1_dividend_cry_23_Z) ); defparam un1_dividend_cry_24.INIT=20'h5AA55; // @46:11431 ARI1 un1_dividend_cry_25 ( .FCO(un1_dividend_cry_25_Z), .S(un1_dividend_cry_25_S), .Y(un1_dividend_cry_25_Y), .B(dividend_Z[25]), .C(GND), .D(GND), .A(div_divisor_Z[25]), .FCI(un1_dividend_cry_24_Z) ); defparam un1_dividend_cry_25.INIT=20'h5AA55; // @46:11431 ARI1 un1_dividend_cry_26 ( .FCO(un1_dividend_cry_26_Z), .S(un1_dividend_cry_26_S), .Y(un1_dividend_cry_26_Y), .B(dividend_Z[26]), .C(GND), .D(GND), .A(div_divisor_Z[26]), .FCI(un1_dividend_cry_25_Z) ); defparam un1_dividend_cry_26.INIT=20'h5AA55; // @46:11431 ARI1 un1_dividend_cry_27 ( .FCO(un1_dividend_cry_27_Z), .S(un1_dividend_cry_27_S), .Y(un1_dividend_cry_27_Y), .B(dividend_Z[27]), .C(GND), .D(GND), .A(div_divisor_Z[27]), .FCI(un1_dividend_cry_26_Z) ); defparam un1_dividend_cry_27.INIT=20'h5AA55; // @46:11431 ARI1 un1_dividend_cry_28 ( .FCO(un1_dividend_cry_28_Z), .S(un1_dividend_cry_28_S), .Y(un1_dividend_cry_28_Y), .B(dividend_Z[28]), .C(GND), .D(GND), .A(div_divisor_Z[28]), .FCI(un1_dividend_cry_27_Z) ); defparam un1_dividend_cry_28.INIT=20'h5AA55; // @46:11431 ARI1 un1_dividend_cry_29 ( .FCO(un1_dividend_cry_29_Z), .S(un1_dividend_cry_29_S), .Y(un1_dividend_cry_29_Y), .B(dividend_Z[29]), .C(GND), .D(GND), .A(div_divisor_Z[29]), .FCI(un1_dividend_cry_28_Z) ); defparam un1_dividend_cry_29.INIT=20'h5AA55; // @46:11431 ARI1 un1_dividend_cry_30 ( .FCO(un1_dividend_cry_30_Z), .S(un1_dividend_cry_30_S), .Y(un1_dividend_cry_30_Y), .B(dividend_Z[30]), .C(GND), .D(GND), .A(div_divisor_Z[30]), .FCI(un1_dividend_cry_29_Z) ); defparam un1_dividend_cry_30.INIT=20'h5AA55; // @46:11431 ARI1 un1_dividend_cry_31 ( .FCO(un1_dividend_cry_31_Z), .S(un1_dividend_cry_31_S), .Y(un1_dividend_cry_31_Y), .B(dividend_Z[31]), .C(GND), .D(GND), .A(div_divisor_Z[31]), .FCI(un1_dividend_cry_30_Z) ); defparam un1_dividend_cry_31.INIT=20'h5AA55; // @46:11431 ARI1 un1_dividend_cry_32 ( .FCO(un1_dividend_cry_32_Z), .S(un1_dividend_cry_32_S), .Y(un1_dividend_cry_32_Y), .B(div_divisor_Z[32]), .C(GND), .D(GND), .A(VCC), .FCI(un1_dividend_cry_31_Z) ); defparam un1_dividend_cry_32.INIT=20'h65500; // @46:11431 ARI1 un1_dividend_cry_33 ( .FCO(un1_dividend_cry_33_Z), .S(un1_dividend_cry_33_S), .Y(un1_dividend_cry_33_Y), .B(div_divisor_Z[33]), .C(GND), .D(GND), .A(VCC), .FCI(un1_dividend_cry_32_Z) ); defparam un1_dividend_cry_33.INIT=20'h65500; // @46:11431 ARI1 un1_dividend_cry_34 ( .FCO(un1_dividend_cry_34_Z), .S(un1_dividend_cry_34_S), .Y(un1_dividend_cry_34_Y), .B(div_divisor_Z[34]), .C(GND), .D(GND), .A(VCC), .FCI(un1_dividend_cry_33_Z) ); defparam un1_dividend_cry_34.INIT=20'h65500; // @46:11431 ARI1 un1_dividend_cry_35 ( .FCO(un1_dividend_cry_35_Z), .S(un1_dividend_cry_35_S), .Y(un1_dividend_cry_35_Y), .B(div_divisor_Z[35]), .C(GND), .D(GND), .A(VCC), .FCI(un1_dividend_cry_34_Z) ); defparam un1_dividend_cry_35.INIT=20'h65500; // @46:11431 ARI1 un1_dividend_cry_36 ( .FCO(un1_dividend_cry_36_Z), .S(un1_dividend_cry_36_S), .Y(un1_dividend_cry_36_Y), .B(div_divisor_Z[36]), .C(GND), .D(GND), .A(VCC), .FCI(un1_dividend_cry_35_Z) ); defparam un1_dividend_cry_36.INIT=20'h65500; // @46:11431 ARI1 un1_dividend_cry_37 ( .FCO(un1_dividend_cry_37_Z), .S(un1_dividend_cry_37_S), .Y(un1_dividend_cry_37_Y), .B(div_divisor_Z[37]), .C(GND), .D(GND), .A(VCC), .FCI(un1_dividend_cry_36_Z) ); defparam un1_dividend_cry_37.INIT=20'h65500; // @46:11431 ARI1 un1_dividend_cry_38 ( .FCO(un1_dividend_cry_38_Z), .S(un1_dividend_cry_38_S), .Y(un1_dividend_cry_38_Y), .B(div_divisor_Z[38]), .C(GND), .D(GND), .A(VCC), .FCI(un1_dividend_cry_37_Z) ); defparam un1_dividend_cry_38.INIT=20'h65500; // @46:11431 ARI1 un1_dividend_cry_39 ( .FCO(un1_dividend_cry_39_Z), .S(un1_dividend_cry_39_S), .Y(un1_dividend_cry_39_Y), .B(div_divisor_Z[39]), .C(GND), .D(GND), .A(VCC), .FCI(un1_dividend_cry_38_Z) ); defparam un1_dividend_cry_39.INIT=20'h65500; // @46:11431 ARI1 un1_dividend_cry_40 ( .FCO(un1_dividend_cry_40_Z), .S(un1_dividend_cry_40_S), .Y(un1_dividend_cry_40_Y), .B(div_divisor_Z[40]), .C(GND), .D(GND), .A(VCC), .FCI(un1_dividend_cry_39_Z) ); defparam un1_dividend_cry_40.INIT=20'h65500; // @46:11431 ARI1 un1_dividend_cry_41 ( .FCO(un1_dividend_cry_41_Z), .S(un1_dividend_cry_41_S), .Y(un1_dividend_cry_41_Y), .B(div_divisor_Z[41]), .C(GND), .D(GND), .A(VCC), .FCI(un1_dividend_cry_40_Z) ); defparam un1_dividend_cry_41.INIT=20'h65500; // @46:11431 ARI1 un1_dividend_cry_42 ( .FCO(un1_dividend_cry_42_Z), .S(un1_dividend_cry_42_S), .Y(un1_dividend_cry_42_Y), .B(div_divisor_Z[42]), .C(GND), .D(GND), .A(VCC), .FCI(un1_dividend_cry_41_Z) ); defparam un1_dividend_cry_42.INIT=20'h65500; // @46:11431 ARI1 un1_dividend_cry_43 ( .FCO(un1_dividend_cry_43_Z), .S(un1_dividend_cry_43_S), .Y(un1_dividend_cry_43_Y), .B(div_divisor_Z[43]), .C(GND), .D(GND), .A(VCC), .FCI(un1_dividend_cry_42_Z) ); defparam un1_dividend_cry_43.INIT=20'h65500; // @46:11431 ARI1 un1_dividend_cry_44 ( .FCO(un1_dividend_cry_44_Z), .S(un1_dividend_cry_44_S), .Y(un1_dividend_cry_44_Y), .B(div_divisor_Z[44]), .C(GND), .D(GND), .A(VCC), .FCI(un1_dividend_cry_43_Z) ); defparam un1_dividend_cry_44.INIT=20'h65500; // @46:11431 ARI1 un1_dividend_cry_45 ( .FCO(un1_dividend_cry_45_Z), .S(un1_dividend_cry_45_S), .Y(un1_dividend_cry_45_Y), .B(div_divisor_Z[45]), .C(GND), .D(GND), .A(VCC), .FCI(un1_dividend_cry_44_Z) ); defparam un1_dividend_cry_45.INIT=20'h65500; // @46:11431 ARI1 un1_dividend_cry_46 ( .FCO(un1_dividend_cry_46_Z), .S(un1_dividend_cry_46_S), .Y(un1_dividend_cry_46_Y), .B(div_divisor_Z[46]), .C(GND), .D(GND), .A(VCC), .FCI(un1_dividend_cry_45_Z) ); defparam un1_dividend_cry_46.INIT=20'h65500; // @46:11431 ARI1 un1_dividend_cry_47 ( .FCO(un1_dividend_cry_47_Z), .S(un1_dividend_cry_47_S), .Y(un1_dividend_cry_47_Y), .B(div_divisor_Z[47]), .C(GND), .D(GND), .A(VCC), .FCI(un1_dividend_cry_46_Z) ); defparam un1_dividend_cry_47.INIT=20'h65500; // @46:11431 ARI1 un1_dividend_cry_48 ( .FCO(un1_dividend_cry_48_Z), .S(un1_dividend_cry_48_S), .Y(un1_dividend_cry_48_Y), .B(div_divisor_Z[48]), .C(GND), .D(GND), .A(VCC), .FCI(un1_dividend_cry_47_Z) ); defparam un1_dividend_cry_48.INIT=20'h65500; // @46:11431 ARI1 un1_dividend_cry_49 ( .FCO(un1_dividend_cry_49_Z), .S(un1_dividend_cry_49_S), .Y(un1_dividend_cry_49_Y), .B(div_divisor_Z[49]), .C(GND), .D(GND), .A(VCC), .FCI(un1_dividend_cry_48_Z) ); defparam un1_dividend_cry_49.INIT=20'h65500; // @46:11431 ARI1 un1_dividend_cry_50 ( .FCO(un1_dividend_cry_50_Z), .S(un1_dividend_cry_50_S), .Y(un1_dividend_cry_50_Y), .B(div_divisor_Z[50]), .C(GND), .D(GND), .A(VCC), .FCI(un1_dividend_cry_49_Z) ); defparam un1_dividend_cry_50.INIT=20'h65500; // @46:11431 ARI1 un1_dividend_cry_51 ( .FCO(un1_dividend_cry_51_Z), .S(un1_dividend_cry_51_S), .Y(un1_dividend_cry_51_Y), .B(div_divisor_Z[51]), .C(GND), .D(GND), .A(VCC), .FCI(un1_dividend_cry_50_Z) ); defparam un1_dividend_cry_51.INIT=20'h65500; // @46:11431 ARI1 un1_dividend_cry_52 ( .FCO(un1_dividend_cry_52_Z), .S(un1_dividend_cry_52_S), .Y(un1_dividend_cry_52_Y), .B(div_divisor_Z[52]), .C(GND), .D(GND), .A(VCC), .FCI(un1_dividend_cry_51_Z) ); defparam un1_dividend_cry_52.INIT=20'h65500; // @46:11431 ARI1 un1_dividend_cry_53 ( .FCO(un1_dividend_cry_53_Z), .S(un1_dividend_cry_53_S), .Y(un1_dividend_cry_53_Y), .B(div_divisor_Z[53]), .C(GND), .D(GND), .A(VCC), .FCI(un1_dividend_cry_52_Z) ); defparam un1_dividend_cry_53.INIT=20'h65500; // @46:11431 ARI1 un1_dividend_cry_54 ( .FCO(un1_dividend_cry_54_Z), .S(un1_dividend_cry_54_S), .Y(un1_dividend_cry_54_Y), .B(div_divisor_Z[54]), .C(GND), .D(GND), .A(VCC), .FCI(un1_dividend_cry_53_Z) ); defparam un1_dividend_cry_54.INIT=20'h65500; // @46:11431 ARI1 un1_dividend_cry_55 ( .FCO(un1_dividend_cry_55_Z), .S(un1_dividend_cry_55_S), .Y(un1_dividend_cry_55_Y), .B(div_divisor_Z[55]), .C(GND), .D(GND), .A(VCC), .FCI(un1_dividend_cry_54_Z) ); defparam un1_dividend_cry_55.INIT=20'h65500; // @46:11431 ARI1 un1_dividend_cry_56 ( .FCO(un1_dividend_cry_56_Z), .S(un1_dividend_cry_56_S), .Y(un1_dividend_cry_56_Y), .B(div_divisor_Z[56]), .C(GND), .D(GND), .A(VCC), .FCI(un1_dividend_cry_55_Z) ); defparam un1_dividend_cry_56.INIT=20'h65500; // @46:11431 ARI1 un1_dividend_cry_57 ( .FCO(un1_dividend_cry_57_Z), .S(un1_dividend_cry_57_S), .Y(un1_dividend_cry_57_Y), .B(div_divisor_Z[57]), .C(GND), .D(GND), .A(VCC), .FCI(un1_dividend_cry_56_Z) ); defparam un1_dividend_cry_57.INIT=20'h65500; // @46:11431 ARI1 un1_dividend_cry_58 ( .FCO(un1_dividend_cry_58_Z), .S(un1_dividend_cry_58_S), .Y(un1_dividend_cry_58_Y), .B(div_divisor_Z[58]), .C(GND), .D(GND), .A(VCC), .FCI(un1_dividend_cry_57_Z) ); defparam un1_dividend_cry_58.INIT=20'h65500; // @46:11431 ARI1 un1_dividend_cry_59 ( .FCO(un1_dividend_cry_59_Z), .S(un1_dividend_cry_59_S), .Y(un1_dividend_cry_59_Y), .B(div_divisor_Z[59]), .C(GND), .D(GND), .A(VCC), .FCI(un1_dividend_cry_58_Z) ); defparam un1_dividend_cry_59.INIT=20'h65500; // @46:11431 ARI1 un1_dividend_cry_60 ( .FCO(un1_dividend_cry_60_Z), .S(un1_dividend_cry_60_S), .Y(un1_dividend_cry_60_Y), .B(div_divisor_Z[60]), .C(GND), .D(GND), .A(VCC), .FCI(un1_dividend_cry_59_Z) ); defparam un1_dividend_cry_60.INIT=20'h65500; // @46:11431 ARI1 un1_dividend_cry_61 ( .FCO(un1_dividend_cry_61_Z), .S(un1_dividend_cry_61_S), .Y(un1_dividend_cry_61_Y), .B(div_divisor_Z[61]), .C(GND), .D(GND), .A(VCC), .FCI(un1_dividend_cry_60_Z) ); defparam un1_dividend_cry_61.INIT=20'h65500; // @46:11431 ARI1 un1_dividend_cry_62 ( .FCO(un1_dividend_cry_62_Z), .S(un1_dividend_cry_62_S), .Y(un1_dividend_cry_62_Y), .B(div_divisor_Z[62]), .C(GND), .D(GND), .A(VCC), .FCI(un1_dividend_cry_61_Z) ); defparam un1_dividend_cry_62.INIT=20'h65500; // @46:11141 ARI1 un120_exu_alu_result_cry_0 ( .FCO(un120_exu_alu_result_cry_0_Z), .S(un120_exu_alu_result_cry_0_S), .Y(un120_exu_alu_result_cry_0_Y), .B(de_ex_pipe_curr_pc_ex[0]), .C(gpr_rs1_rd_data_sig[0]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_0), .FCI(GND) ); defparam un120_exu_alu_result_cry_0.INIT=20'h5AC53; // @46:11141 ARI1 un120_exu_alu_result_cry_1 ( .FCO(un120_exu_alu_result_cry_1_Z), .S(un120_exu_alu_result_cry_1_S), .Y(un120_exu_alu_result_cry_1_Y), .B(de_ex_pipe_curr_pc_ex[1]), .C(gpr_rs1_rd_data_sig[1]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[1]), .FCI(un120_exu_alu_result_cry_0_Z) ); defparam un120_exu_alu_result_cry_1.INIT=20'h5AC53; // @46:11141 ARI1 un120_exu_alu_result_cry_2 ( .FCO(un120_exu_alu_result_cry_2_Z), .S(un120_exu_alu_result_cry_2_S), .Y(un120_exu_alu_result_cry_2_Y), .B(de_ex_pipe_curr_pc_ex[2]), .C(gpr_rs1_rd_data_sig[2]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[2]), .FCI(un120_exu_alu_result_cry_1_Z) ); defparam un120_exu_alu_result_cry_2.INIT=20'h5AC53; // @46:11141 ARI1 un120_exu_alu_result_cry_3 ( .FCO(un120_exu_alu_result_cry_3_Z), .S(un120_exu_alu_result_cry_3_S), .Y(un120_exu_alu_result_cry_3_Y), .B(de_ex_pipe_curr_pc_ex[3]), .C(gpr_rs1_rd_data_sig[3]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[3]), .FCI(un120_exu_alu_result_cry_2_Z) ); defparam un120_exu_alu_result_cry_3.INIT=20'h5AC53; // @46:11141 ARI1 un120_exu_alu_result_cry_4 ( .FCO(un120_exu_alu_result_cry_4_Z), .S(un120_exu_alu_result_cry_4_S), .Y(un120_exu_alu_result_cry_4_Y), .B(de_ex_pipe_curr_pc_ex[4]), .C(gpr_rs1_rd_data_sig[4]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[4]), .FCI(un120_exu_alu_result_cry_3_Z) ); defparam un120_exu_alu_result_cry_4.INIT=20'h5AC53; // @46:11141 ARI1 un120_exu_alu_result_cry_5 ( .FCO(un120_exu_alu_result_cry_5_Z), .S(un120_exu_alu_result_cry_5_S), .Y(un120_exu_alu_result_cry_5_Y), .B(de_ex_pipe_curr_pc_ex[5]), .C(gpr_rs1_rd_data_sig[5]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[5]), .FCI(un120_exu_alu_result_cry_4_Z) ); defparam un120_exu_alu_result_cry_5.INIT=20'h5AC53; // @46:11141 ARI1 un120_exu_alu_result_cry_6 ( .FCO(un120_exu_alu_result_cry_6_Z), .S(un120_exu_alu_result_cry_6_S), .Y(un120_exu_alu_result_cry_6_Y), .B(de_ex_pipe_curr_pc_ex[6]), .C(gpr_rs1_rd_data_sig[6]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[6]), .FCI(un120_exu_alu_result_cry_5_Z) ); defparam un120_exu_alu_result_cry_6.INIT=20'h5AC53; // @46:11141 ARI1 un120_exu_alu_result_cry_7 ( .FCO(un120_exu_alu_result_cry_7_Z), .S(un120_exu_alu_result_cry_7_S), .Y(un120_exu_alu_result_cry_7_Y), .B(de_ex_pipe_curr_pc_ex[7]), .C(gpr_rs1_rd_data_sig[7]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[7]), .FCI(un120_exu_alu_result_cry_6_Z) ); defparam un120_exu_alu_result_cry_7.INIT=20'h5AC53; // @46:11141 ARI1 un120_exu_alu_result_cry_8 ( .FCO(un120_exu_alu_result_cry_8_Z), .S(un120_exu_alu_result_cry_8_S), .Y(un120_exu_alu_result_cry_8_Y), .B(de_ex_pipe_curr_pc_ex[8]), .C(gpr_rs1_rd_data_sig[8]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[8]), .FCI(un120_exu_alu_result_cry_7_Z) ); defparam un120_exu_alu_result_cry_8.INIT=20'h5AC53; // @46:11141 ARI1 un120_exu_alu_result_cry_9 ( .FCO(un120_exu_alu_result_cry_9_Z), .S(un120_exu_alu_result_cry_9_S), .Y(un120_exu_alu_result_cry_9_Y), .B(de_ex_pipe_curr_pc_ex[9]), .C(gpr_rs1_rd_data_sig[9]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[9]), .FCI(un120_exu_alu_result_cry_8_Z) ); defparam un120_exu_alu_result_cry_9.INIT=20'h5AC53; // @46:11141 ARI1 un120_exu_alu_result_cry_10 ( .FCO(un120_exu_alu_result_cry_10_Z), .S(un120_exu_alu_result_cry_10_S), .Y(un120_exu_alu_result_cry_10_Y), .B(de_ex_pipe_curr_pc_ex[10]), .C(gpr_rs1_rd_data_sig[10]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[10]), .FCI(un120_exu_alu_result_cry_9_Z) ); defparam un120_exu_alu_result_cry_10.INIT=20'h5AC53; // @46:11141 ARI1 un120_exu_alu_result_cry_11 ( .FCO(un120_exu_alu_result_cry_11_Z), .S(un120_exu_alu_result_cry_11_S), .Y(un120_exu_alu_result_cry_11_Y), .B(de_ex_pipe_curr_pc_ex[11]), .C(gpr_rs1_rd_data_sig[11]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[11]), .FCI(un120_exu_alu_result_cry_10_Z) ); defparam un120_exu_alu_result_cry_11.INIT=20'h5AC53; // @46:11141 ARI1 un120_exu_alu_result_cry_12 ( .FCO(un120_exu_alu_result_cry_12_Z), .S(un120_exu_alu_result_cry_12_S), .Y(un120_exu_alu_result_cry_12_Y), .B(de_ex_pipe_curr_pc_ex[12]), .C(gpr_rs1_rd_data_sig[12]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[12]), .FCI(un120_exu_alu_result_cry_11_Z) ); defparam un120_exu_alu_result_cry_12.INIT=20'h5AC53; // @46:11141 ARI1 un120_exu_alu_result_cry_13 ( .FCO(un120_exu_alu_result_cry_13_Z), .S(un120_exu_alu_result_cry_13_S), .Y(un120_exu_alu_result_cry_13_Y), .B(de_ex_pipe_curr_pc_ex[13]), .C(gpr_rs1_rd_data_sig[13]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[13]), .FCI(un120_exu_alu_result_cry_12_Z) ); defparam un120_exu_alu_result_cry_13.INIT=20'h5AC53; // @46:11141 ARI1 un120_exu_alu_result_cry_14 ( .FCO(un120_exu_alu_result_cry_14_Z), .S(un120_exu_alu_result_cry_14_S), .Y(un120_exu_alu_result_cry_14_Y), .B(de_ex_pipe_curr_pc_ex[14]), .C(gpr_rs1_rd_data_sig[14]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[14]), .FCI(un120_exu_alu_result_cry_13_Z) ); defparam un120_exu_alu_result_cry_14.INIT=20'h5AC53; // @46:11141 ARI1 un120_exu_alu_result_cry_15 ( .FCO(un120_exu_alu_result_cry_15_Z), .S(un120_exu_alu_result_cry_15_S), .Y(un120_exu_alu_result_cry_15_Y), .B(de_ex_pipe_curr_pc_ex[15]), .C(gpr_rs1_rd_data_sig[15]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[15]), .FCI(un120_exu_alu_result_cry_14_Z) ); defparam un120_exu_alu_result_cry_15.INIT=20'h5AC53; // @46:11141 ARI1 un120_exu_alu_result_cry_16 ( .FCO(un120_exu_alu_result_cry_16_Z), .S(un120_exu_alu_result_cry_16_S), .Y(un120_exu_alu_result_cry_16_Y), .B(de_ex_pipe_curr_pc_ex[16]), .C(gpr_rs1_rd_data_sig[16]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[16]), .FCI(un120_exu_alu_result_cry_15_Z) ); defparam un120_exu_alu_result_cry_16.INIT=20'h5AC53; // @46:11141 ARI1 un120_exu_alu_result_cry_17 ( .FCO(un120_exu_alu_result_cry_17_Z), .S(un120_exu_alu_result_cry_17_S), .Y(un120_exu_alu_result_cry_17_Y), .B(de_ex_pipe_curr_pc_ex[17]), .C(gpr_rs1_rd_data_sig[17]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[17]), .FCI(un120_exu_alu_result_cry_16_Z) ); defparam un120_exu_alu_result_cry_17.INIT=20'h5AC53; // @46:11141 ARI1 un120_exu_alu_result_cry_18 ( .FCO(un120_exu_alu_result_cry_18_Z), .S(un120_exu_alu_result_cry_18_S), .Y(un120_exu_alu_result_cry_18_Y), .B(de_ex_pipe_curr_pc_ex[18]), .C(gpr_rs1_rd_data_sig[18]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[18]), .FCI(un120_exu_alu_result_cry_17_Z) ); defparam un120_exu_alu_result_cry_18.INIT=20'h5AC53; // @46:11141 ARI1 un120_exu_alu_result_cry_19 ( .FCO(un120_exu_alu_result_cry_19_Z), .S(un120_exu_alu_result_cry_19_S), .Y(un120_exu_alu_result_cry_19_Y), .B(de_ex_pipe_curr_pc_ex[19]), .C(gpr_rs1_rd_data_sig[19]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[19]), .FCI(un120_exu_alu_result_cry_18_Z) ); defparam un120_exu_alu_result_cry_19.INIT=20'h5AC53; // @46:11141 ARI1 un120_exu_alu_result_cry_20 ( .FCO(un120_exu_alu_result_cry_20_Z), .S(un120_exu_alu_result_cry_20_S), .Y(un120_exu_alu_result_cry_20_Y), .B(de_ex_pipe_curr_pc_ex[20]), .C(gpr_rs1_rd_data_sig[20]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[20]), .FCI(un120_exu_alu_result_cry_19_Z) ); defparam un120_exu_alu_result_cry_20.INIT=20'h5AC53; // @46:11141 ARI1 un120_exu_alu_result_cry_21 ( .FCO(un120_exu_alu_result_cry_21_Z), .S(un120_exu_alu_result_cry_21_S), .Y(un120_exu_alu_result_cry_21_Y), .B(de_ex_pipe_curr_pc_ex[21]), .C(gpr_rs1_rd_data_sig[21]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[21]), .FCI(un120_exu_alu_result_cry_20_Z) ); defparam un120_exu_alu_result_cry_21.INIT=20'h5AC53; // @46:11141 ARI1 un120_exu_alu_result_cry_22 ( .FCO(un120_exu_alu_result_cry_22_Z), .S(un120_exu_alu_result_cry_22_S), .Y(un120_exu_alu_result_cry_22_Y), .B(de_ex_pipe_curr_pc_ex[22]), .C(gpr_rs1_rd_data_sig[22]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[22]), .FCI(un120_exu_alu_result_cry_21_Z) ); defparam un120_exu_alu_result_cry_22.INIT=20'h5AC53; // @46:11141 ARI1 un120_exu_alu_result_cry_23 ( .FCO(un120_exu_alu_result_cry_23_Z), .S(un120_exu_alu_result_cry_23_S), .Y(un120_exu_alu_result_cry_23_Y), .B(de_ex_pipe_curr_pc_ex[23]), .C(gpr_rs1_rd_data_sig[23]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[23]), .FCI(un120_exu_alu_result_cry_22_Z) ); defparam un120_exu_alu_result_cry_23.INIT=20'h5AC53; // @46:11141 ARI1 un120_exu_alu_result_cry_24 ( .FCO(un120_exu_alu_result_cry_24_Z), .S(un120_exu_alu_result_cry_24_S), .Y(un120_exu_alu_result_cry_24_Y), .B(de_ex_pipe_curr_pc_ex[24]), .C(gpr_rs1_rd_data_sig[24]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[24]), .FCI(un120_exu_alu_result_cry_23_Z) ); defparam un120_exu_alu_result_cry_24.INIT=20'h5AC53; // @46:11141 ARI1 un120_exu_alu_result_cry_25 ( .FCO(un120_exu_alu_result_cry_25_Z), .S(un120_exu_alu_result_cry_25_S), .Y(un120_exu_alu_result_cry_25_Y), .B(de_ex_pipe_curr_pc_ex[25]), .C(gpr_rs1_rd_data_sig[25]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[25]), .FCI(un120_exu_alu_result_cry_24_Z) ); defparam un120_exu_alu_result_cry_25.INIT=20'h5AC53; // @46:11141 ARI1 un120_exu_alu_result_cry_26 ( .FCO(un120_exu_alu_result_cry_26_Z), .S(un120_exu_alu_result_cry_26_S), .Y(un120_exu_alu_result_cry_26_Y), .B(de_ex_pipe_curr_pc_ex[26]), .C(gpr_rs1_rd_data_sig[26]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[26]), .FCI(un120_exu_alu_result_cry_25_Z) ); defparam un120_exu_alu_result_cry_26.INIT=20'h5AC53; // @46:11141 ARI1 un120_exu_alu_result_cry_27 ( .FCO(un120_exu_alu_result_cry_27_Z), .S(un120_exu_alu_result_cry_27_S), .Y(un120_exu_alu_result_cry_27_Y), .B(de_ex_pipe_curr_pc_ex[27]), .C(gpr_rs1_rd_data_sig[27]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[27]), .FCI(un120_exu_alu_result_cry_26_Z) ); defparam un120_exu_alu_result_cry_27.INIT=20'h5AC53; // @46:11141 ARI1 un120_exu_alu_result_cry_28 ( .FCO(un120_exu_alu_result_cry_28_Z), .S(un120_exu_alu_result_cry_28_S), .Y(un120_exu_alu_result_cry_28_Y), .B(de_ex_pipe_curr_pc_ex[28]), .C(gpr_rs1_rd_data_sig[28]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[28]), .FCI(un120_exu_alu_result_cry_27_Z) ); defparam un120_exu_alu_result_cry_28.INIT=20'h5AC53; // @46:11141 ARI1 un120_exu_alu_result_cry_29 ( .FCO(un120_exu_alu_result_cry_29_Z), .S(un120_exu_alu_result_cry_29_S), .Y(un120_exu_alu_result_cry_29_Y), .B(de_ex_pipe_curr_pc_ex[29]), .C(gpr_rs1_rd_data_sig[29]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[29]), .FCI(un120_exu_alu_result_cry_28_Z) ); defparam un120_exu_alu_result_cry_29.INIT=20'h5AC53; // @46:11141 ARI1 un120_exu_alu_result_cry_30 ( .FCO(un120_exu_alu_result_cry_30_Z), .S(un120_exu_alu_result_cry_30_S), .Y(un120_exu_alu_result_cry_30_Y), .B(de_ex_pipe_curr_pc_ex[30]), .C(gpr_rs1_rd_data_sig[30]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[30]), .FCI(un120_exu_alu_result_cry_29_Z) ); defparam un120_exu_alu_result_cry_30.INIT=20'h5AC53; // @46:11141 ARI1 un120_exu_alu_result_cry_31 ( .FCO(un120_exu_alu_result_i), .S(un120_exu_alu_result_cry_31_S), .Y(un120_exu_alu_result_cry_31_Y), .B(de_ex_pipe_curr_pc_ex[31]), .C(gpr_rs1_rd_data_sig[31]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[31]), .FCI(un120_exu_alu_result_cry_30_Z) ); defparam un120_exu_alu_result_cry_31.INIT=20'h5AC53; // @46:11147 ARI1 un128_exu_alu_result_cry_0 ( .FCO(un128_exu_alu_result_cry_0_Z), .S(un128_exu_alu_result_cry_0_S), .Y(un128_exu_alu_result_cry_0_Y), .B(de_ex_pipe_curr_pc_ex[0]), .C(gpr_rs1_rd_data_sig[0]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_0), .FCI(GND) ); defparam un128_exu_alu_result_cry_0.INIT=20'h5AC53; // @46:11147 ARI1 un128_exu_alu_result_cry_1 ( .FCO(un128_exu_alu_result_cry_1_Z), .S(un128_exu_alu_result_cry_1_S), .Y(un128_exu_alu_result_cry_1_Y), .B(de_ex_pipe_curr_pc_ex[1]), .C(gpr_rs1_rd_data_sig[1]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[1]), .FCI(un128_exu_alu_result_cry_0_Z) ); defparam un128_exu_alu_result_cry_1.INIT=20'h5AC53; // @46:11147 ARI1 un128_exu_alu_result_cry_2 ( .FCO(un128_exu_alu_result_cry_2_Z), .S(un128_exu_alu_result_cry_2_S), .Y(un128_exu_alu_result_cry_2_Y), .B(de_ex_pipe_curr_pc_ex[2]), .C(gpr_rs1_rd_data_sig[2]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[2]), .FCI(un128_exu_alu_result_cry_1_Z) ); defparam un128_exu_alu_result_cry_2.INIT=20'h5AC53; // @46:11147 ARI1 un128_exu_alu_result_cry_3 ( .FCO(un128_exu_alu_result_cry_3_Z), .S(un128_exu_alu_result_cry_3_S), .Y(un128_exu_alu_result_cry_3_Y), .B(de_ex_pipe_curr_pc_ex[3]), .C(gpr_rs1_rd_data_sig[3]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[3]), .FCI(un128_exu_alu_result_cry_2_Z) ); defparam un128_exu_alu_result_cry_3.INIT=20'h5AC53; // @46:11147 ARI1 un128_exu_alu_result_cry_4 ( .FCO(un128_exu_alu_result_cry_4_Z), .S(un128_exu_alu_result_cry_4_S), .Y(un128_exu_alu_result_cry_4_Y), .B(de_ex_pipe_curr_pc_ex[4]), .C(gpr_rs1_rd_data_sig[4]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[4]), .FCI(un128_exu_alu_result_cry_3_Z) ); defparam un128_exu_alu_result_cry_4.INIT=20'h5AC53; // @46:11147 ARI1 un128_exu_alu_result_cry_5 ( .FCO(un128_exu_alu_result_cry_5_Z), .S(un128_exu_alu_result_cry_5_S), .Y(un128_exu_alu_result_cry_5_Y), .B(de_ex_pipe_curr_pc_ex[5]), .C(gpr_rs1_rd_data_sig[5]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[5]), .FCI(un128_exu_alu_result_cry_4_Z) ); defparam un128_exu_alu_result_cry_5.INIT=20'h5AC53; // @46:11147 ARI1 un128_exu_alu_result_cry_6 ( .FCO(un128_exu_alu_result_cry_6_Z), .S(un128_exu_alu_result_cry_6_S), .Y(un128_exu_alu_result_cry_6_Y), .B(de_ex_pipe_curr_pc_ex[6]), .C(gpr_rs1_rd_data_sig[6]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[6]), .FCI(un128_exu_alu_result_cry_5_Z) ); defparam un128_exu_alu_result_cry_6.INIT=20'h5AC53; // @46:11147 ARI1 un128_exu_alu_result_cry_7 ( .FCO(un128_exu_alu_result_cry_7_Z), .S(un128_exu_alu_result_cry_7_S), .Y(un128_exu_alu_result_cry_7_Y), .B(de_ex_pipe_curr_pc_ex[7]), .C(gpr_rs1_rd_data_sig[7]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[7]), .FCI(un128_exu_alu_result_cry_6_Z) ); defparam un128_exu_alu_result_cry_7.INIT=20'h5AC53; // @46:11147 ARI1 un128_exu_alu_result_cry_8 ( .FCO(un128_exu_alu_result_cry_8_Z), .S(un128_exu_alu_result_cry_8_S), .Y(un128_exu_alu_result_cry_8_Y), .B(de_ex_pipe_curr_pc_ex[8]), .C(gpr_rs1_rd_data_sig[8]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[8]), .FCI(un128_exu_alu_result_cry_7_Z) ); defparam un128_exu_alu_result_cry_8.INIT=20'h5AC53; // @46:11147 ARI1 un128_exu_alu_result_cry_9 ( .FCO(un128_exu_alu_result_cry_9_Z), .S(un128_exu_alu_result_cry_9_S), .Y(un128_exu_alu_result_cry_9_Y), .B(de_ex_pipe_curr_pc_ex[9]), .C(gpr_rs1_rd_data_sig[9]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[9]), .FCI(un128_exu_alu_result_cry_8_Z) ); defparam un128_exu_alu_result_cry_9.INIT=20'h5AC53; // @46:11147 ARI1 un128_exu_alu_result_cry_10 ( .FCO(un128_exu_alu_result_cry_10_Z), .S(un128_exu_alu_result_cry_10_S), .Y(un128_exu_alu_result_cry_10_Y), .B(de_ex_pipe_curr_pc_ex[10]), .C(gpr_rs1_rd_data_sig[10]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[10]), .FCI(un128_exu_alu_result_cry_9_Z) ); defparam un128_exu_alu_result_cry_10.INIT=20'h5AC53; // @46:11147 ARI1 un128_exu_alu_result_cry_11 ( .FCO(un128_exu_alu_result_cry_11_Z), .S(un128_exu_alu_result_cry_11_S), .Y(un128_exu_alu_result_cry_11_Y), .B(de_ex_pipe_curr_pc_ex[11]), .C(gpr_rs1_rd_data_sig[11]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[11]), .FCI(un128_exu_alu_result_cry_10_Z) ); defparam un128_exu_alu_result_cry_11.INIT=20'h5AC53; // @46:11147 ARI1 un128_exu_alu_result_cry_12 ( .FCO(un128_exu_alu_result_cry_12_Z), .S(un128_exu_alu_result_cry_12_S), .Y(un128_exu_alu_result_cry_12_Y), .B(de_ex_pipe_curr_pc_ex[12]), .C(gpr_rs1_rd_data_sig[12]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[12]), .FCI(un128_exu_alu_result_cry_11_Z) ); defparam un128_exu_alu_result_cry_12.INIT=20'h5AC53; // @46:11147 ARI1 un128_exu_alu_result_cry_13 ( .FCO(un128_exu_alu_result_cry_13_Z), .S(un128_exu_alu_result_cry_13_S), .Y(un128_exu_alu_result_cry_13_Y), .B(de_ex_pipe_curr_pc_ex[13]), .C(gpr_rs1_rd_data_sig[13]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[13]), .FCI(un128_exu_alu_result_cry_12_Z) ); defparam un128_exu_alu_result_cry_13.INIT=20'h5AC53; // @46:11147 ARI1 un128_exu_alu_result_cry_14 ( .FCO(un128_exu_alu_result_cry_14_Z), .S(un128_exu_alu_result_cry_14_S), .Y(un128_exu_alu_result_cry_14_Y), .B(de_ex_pipe_curr_pc_ex[14]), .C(gpr_rs1_rd_data_sig[14]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[14]), .FCI(un128_exu_alu_result_cry_13_Z) ); defparam un128_exu_alu_result_cry_14.INIT=20'h5AC53; // @46:11147 ARI1 un128_exu_alu_result_cry_15 ( .FCO(un128_exu_alu_result_cry_15_Z), .S(un128_exu_alu_result_cry_15_S), .Y(un128_exu_alu_result_cry_15_Y), .B(de_ex_pipe_curr_pc_ex[15]), .C(gpr_rs1_rd_data_sig[15]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[15]), .FCI(un128_exu_alu_result_cry_14_Z) ); defparam un128_exu_alu_result_cry_15.INIT=20'h5AC53; // @46:11147 ARI1 un128_exu_alu_result_cry_16 ( .FCO(un128_exu_alu_result_cry_16_Z), .S(un128_exu_alu_result_cry_16_S), .Y(un128_exu_alu_result_cry_16_Y), .B(de_ex_pipe_curr_pc_ex[16]), .C(gpr_rs1_rd_data_sig[16]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[16]), .FCI(un128_exu_alu_result_cry_15_Z) ); defparam un128_exu_alu_result_cry_16.INIT=20'h5AC53; // @46:11147 ARI1 un128_exu_alu_result_cry_17 ( .FCO(un128_exu_alu_result_cry_17_Z), .S(un128_exu_alu_result_cry_17_S), .Y(un128_exu_alu_result_cry_17_Y), .B(de_ex_pipe_curr_pc_ex[17]), .C(gpr_rs1_rd_data_sig[17]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[17]), .FCI(un128_exu_alu_result_cry_16_Z) ); defparam un128_exu_alu_result_cry_17.INIT=20'h5AC53; // @46:11147 ARI1 un128_exu_alu_result_cry_18 ( .FCO(un128_exu_alu_result_cry_18_Z), .S(un128_exu_alu_result_cry_18_S), .Y(un128_exu_alu_result_cry_18_Y), .B(de_ex_pipe_curr_pc_ex[18]), .C(gpr_rs1_rd_data_sig[18]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[18]), .FCI(un128_exu_alu_result_cry_17_Z) ); defparam un128_exu_alu_result_cry_18.INIT=20'h5AC53; // @46:11147 ARI1 un128_exu_alu_result_cry_19 ( .FCO(un128_exu_alu_result_cry_19_Z), .S(un128_exu_alu_result_cry_19_S), .Y(un128_exu_alu_result_cry_19_Y), .B(de_ex_pipe_curr_pc_ex[19]), .C(gpr_rs1_rd_data_sig[19]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[19]), .FCI(un128_exu_alu_result_cry_18_Z) ); defparam un128_exu_alu_result_cry_19.INIT=20'h5AC53; // @46:11147 ARI1 un128_exu_alu_result_cry_20 ( .FCO(un128_exu_alu_result_cry_20_Z), .S(un128_exu_alu_result_cry_20_S), .Y(un128_exu_alu_result_cry_20_Y), .B(de_ex_pipe_curr_pc_ex[20]), .C(gpr_rs1_rd_data_sig[20]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[20]), .FCI(un128_exu_alu_result_cry_19_Z) ); defparam un128_exu_alu_result_cry_20.INIT=20'h5AC53; // @46:11147 ARI1 un128_exu_alu_result_cry_21 ( .FCO(un128_exu_alu_result_cry_21_Z), .S(un128_exu_alu_result_cry_21_S), .Y(un128_exu_alu_result_cry_21_Y), .B(de_ex_pipe_curr_pc_ex[21]), .C(gpr_rs1_rd_data_sig[21]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[21]), .FCI(un128_exu_alu_result_cry_20_Z) ); defparam un128_exu_alu_result_cry_21.INIT=20'h5AC53; // @46:11147 ARI1 un128_exu_alu_result_cry_22 ( .FCO(un128_exu_alu_result_cry_22_Z), .S(un128_exu_alu_result_cry_22_S), .Y(un128_exu_alu_result_cry_22_Y), .B(de_ex_pipe_curr_pc_ex[22]), .C(gpr_rs1_rd_data_sig[22]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[22]), .FCI(un128_exu_alu_result_cry_21_Z) ); defparam un128_exu_alu_result_cry_22.INIT=20'h5AC53; // @46:11147 ARI1 un128_exu_alu_result_cry_23 ( .FCO(un128_exu_alu_result_cry_23_Z), .S(un128_exu_alu_result_cry_23_S), .Y(un128_exu_alu_result_cry_23_Y), .B(de_ex_pipe_curr_pc_ex[23]), .C(gpr_rs1_rd_data_sig[23]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[23]), .FCI(un128_exu_alu_result_cry_22_Z) ); defparam un128_exu_alu_result_cry_23.INIT=20'h5AC53; // @46:11147 ARI1 un128_exu_alu_result_cry_24 ( .FCO(un128_exu_alu_result_cry_24_Z), .S(un128_exu_alu_result_cry_24_S), .Y(un128_exu_alu_result_cry_24_Y), .B(de_ex_pipe_curr_pc_ex[24]), .C(gpr_rs1_rd_data_sig[24]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[24]), .FCI(un128_exu_alu_result_cry_23_Z) ); defparam un128_exu_alu_result_cry_24.INIT=20'h5AC53; // @46:11147 ARI1 un128_exu_alu_result_cry_25 ( .FCO(un128_exu_alu_result_cry_25_Z), .S(un128_exu_alu_result_cry_25_S), .Y(un128_exu_alu_result_cry_25_Y), .B(de_ex_pipe_curr_pc_ex[25]), .C(gpr_rs1_rd_data_sig[25]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[25]), .FCI(un128_exu_alu_result_cry_24_Z) ); defparam un128_exu_alu_result_cry_25.INIT=20'h5AC53; // @46:11147 ARI1 un128_exu_alu_result_cry_26 ( .FCO(un128_exu_alu_result_cry_26_Z), .S(un128_exu_alu_result_cry_26_S), .Y(un128_exu_alu_result_cry_26_Y), .B(de_ex_pipe_curr_pc_ex[26]), .C(gpr_rs1_rd_data_sig[26]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[26]), .FCI(un128_exu_alu_result_cry_25_Z) ); defparam un128_exu_alu_result_cry_26.INIT=20'h5AC53; // @46:11147 ARI1 un128_exu_alu_result_cry_27 ( .FCO(un128_exu_alu_result_cry_27_Z), .S(un128_exu_alu_result_cry_27_S), .Y(un128_exu_alu_result_cry_27_Y), .B(de_ex_pipe_curr_pc_ex[27]), .C(gpr_rs1_rd_data_sig[27]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[27]), .FCI(un128_exu_alu_result_cry_26_Z) ); defparam un128_exu_alu_result_cry_27.INIT=20'h5AC53; // @46:11147 ARI1 un128_exu_alu_result_cry_28 ( .FCO(un128_exu_alu_result_cry_28_Z), .S(un128_exu_alu_result_cry_28_S), .Y(un128_exu_alu_result_cry_28_Y), .B(de_ex_pipe_curr_pc_ex[28]), .C(gpr_rs1_rd_data_sig[28]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[28]), .FCI(un128_exu_alu_result_cry_27_Z) ); defparam un128_exu_alu_result_cry_28.INIT=20'h5AC53; // @46:11147 ARI1 un128_exu_alu_result_cry_29 ( .FCO(un128_exu_alu_result_cry_29_Z), .S(un128_exu_alu_result_cry_29_S), .Y(un128_exu_alu_result_cry_29_Y), .B(de_ex_pipe_curr_pc_ex[29]), .C(gpr_rs1_rd_data_sig[29]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[29]), .FCI(un128_exu_alu_result_cry_28_Z) ); defparam un128_exu_alu_result_cry_29.INIT=20'h5AC53; // @46:11147 ARI1 un128_exu_alu_result_cry_30 ( .FCO(un128_exu_alu_result_cry_30_Z), .S(un128_exu_alu_result_cry_30_S), .Y(un128_exu_alu_result_cry_30_Y), .B(de_ex_pipe_curr_pc_ex[30]), .C(gpr_rs1_rd_data_sig[30]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_Z[30]), .FCI(un128_exu_alu_result_cry_29_Z) ); defparam un128_exu_alu_result_cry_30.INIT=20'h5AC53; // @46:11147 ARI1 un128_exu_alu_result_cry_31 ( .FCO(un128_exu_alu_result_i), .S(un128_exu_alu_result_cry_31_S), .Y(un128_exu_alu_result_cry_31_Y), .B(de_ex_pipe_curr_pc_ex[31]), .C(gpr_rs1_rd_data_sig[31]), .D(de_ex_pipe_operand0_mux_sel_ex_0), .A(exu_alu_operand1_i[31]), .FCI(un128_exu_alu_result_cry_30_Z) ); defparam un128_exu_alu_result_cry_31.INIT=20'h553AC; // @46:11165 ARI1 un152_exu_alu_result_1_I_1 ( .FCO(un152_exu_alu_result_1_data_tmp[0]), .S(un152_exu_alu_result_1_I_1_S), .Y(un152_exu_alu_result_1_I_1_Y), .B(exu_alu_operand0_0), .C(exu_alu_operand0_Z[1]), .D(exu_alu_operand1_0), .A(exu_alu_operand1_Z[1]), .FCI(GND) ); defparam un152_exu_alu_result_1_I_1.INIT=20'h64812; // @46:11165 ARI1 un152_exu_alu_result_1_I_9 ( .FCO(un152_exu_alu_result_1_data_tmp[1]), .S(un152_exu_alu_result_1_I_9_S), .Y(un152_exu_alu_result_1_I_9_Y), .B(exu_alu_operand0_Z[2]), .C(exu_alu_operand0_Z[3]), .D(exu_alu_operand1_Z[2]), .A(exu_alu_operand1_Z[3]), .FCI(un152_exu_alu_result_1_data_tmp[0]) ); defparam un152_exu_alu_result_1_I_9.INIT=20'h68421; // @46:11165 ARI1 un152_exu_alu_result_1_I_15 ( .FCO(un152_exu_alu_result_1_data_tmp[2]), .S(un152_exu_alu_result_1_I_15_S), .Y(un152_exu_alu_result_1_I_15_Y), .B(exu_alu_operand0_Z[4]), .C(exu_alu_operand0_Z[5]), .D(exu_alu_operand1_Z[4]), .A(exu_alu_operand1_Z[5]), .FCI(un152_exu_alu_result_1_data_tmp[1]) ); defparam un152_exu_alu_result_1_I_15.INIT=20'h68421; // @46:11165 ARI1 un152_exu_alu_result_1_I_51 ( .FCO(un152_exu_alu_result_1_data_tmp[3]), .S(un152_exu_alu_result_1_I_51_S), .Y(un152_exu_alu_result_1_I_51_Y), .B(exu_alu_operand0_Z[6]), .C(exu_alu_operand0_Z[7]), .D(exu_alu_operand1_Z[6]), .A(exu_alu_operand1_Z[7]), .FCI(un152_exu_alu_result_1_data_tmp[2]) ); defparam un152_exu_alu_result_1_I_51.INIT=20'h68421; // @46:11165 ARI1 un152_exu_alu_result_1_I_75 ( .FCO(un152_exu_alu_result_1_data_tmp[4]), .S(un152_exu_alu_result_1_I_75_S), .Y(un152_exu_alu_result_1_I_75_Y), .B(exu_alu_operand0_Z[8]), .C(exu_alu_operand0_Z[9]), .D(exu_alu_operand1_Z[8]), .A(exu_alu_operand1_Z[9]), .FCI(un152_exu_alu_result_1_data_tmp[3]) ); defparam un152_exu_alu_result_1_I_75.INIT=20'h68421; // @46:11165 ARI1 un152_exu_alu_result_1_I_33 ( .FCO(un152_exu_alu_result_1_data_tmp[5]), .S(un152_exu_alu_result_1_I_33_S), .Y(un152_exu_alu_result_1_I_33_Y), .B(exu_alu_operand0_Z[10]), .C(exu_alu_operand0_Z[11]), .D(exu_alu_operand1_Z[10]), .A(exu_alu_operand1_Z[11]), .FCI(un152_exu_alu_result_1_data_tmp[4]) ); defparam un152_exu_alu_result_1_I_33.INIT=20'h68421; // @46:11165 ARI1 un152_exu_alu_result_1_I_39 ( .FCO(un152_exu_alu_result_1_data_tmp[6]), .S(un152_exu_alu_result_1_I_39_S), .Y(un152_exu_alu_result_1_I_39_Y), .B(exu_alu_operand0_Z[12]), .C(exu_alu_operand0_Z[13]), .D(exu_alu_operand1_Z[12]), .A(exu_alu_operand1_Z[13]), .FCI(un152_exu_alu_result_1_data_tmp[5]) ); defparam un152_exu_alu_result_1_I_39.INIT=20'h68421; // @46:11165 ARI1 un152_exu_alu_result_1_I_27 ( .FCO(un152_exu_alu_result_1_data_tmp[7]), .S(un152_exu_alu_result_1_I_27_S), .Y(un152_exu_alu_result_1_I_27_Y), .B(exu_alu_operand0_Z[14]), .C(exu_alu_operand0_Z[15]), .D(exu_alu_operand1_Z[14]), .A(exu_alu_operand1_Z[15]), .FCI(un152_exu_alu_result_1_data_tmp[6]) ); defparam un152_exu_alu_result_1_I_27.INIT=20'h68421; // @46:11165 ARI1 un152_exu_alu_result_1_I_93 ( .FCO(un152_exu_alu_result_1_data_tmp[8]), .S(un152_exu_alu_result_1_I_93_S), .Y(un152_exu_alu_result_1_I_93_Y), .B(exu_alu_operand0_Z[16]), .C(exu_alu_operand0_Z[17]), .D(exu_alu_operand1_Z[16]), .A(exu_alu_operand1_Z[17]), .FCI(un152_exu_alu_result_1_data_tmp[7]) ); defparam un152_exu_alu_result_1_I_93.INIT=20'h68421; // @46:11165 ARI1 un152_exu_alu_result_1_I_57 ( .FCO(un152_exu_alu_result_1_data_tmp[9]), .S(un152_exu_alu_result_1_I_57_S), .Y(un152_exu_alu_result_1_I_57_Y), .B(exu_alu_operand0_Z[18]), .C(exu_alu_operand0_Z[19]), .D(exu_alu_operand1_Z[18]), .A(exu_alu_operand1_Z[19]), .FCI(un152_exu_alu_result_1_data_tmp[8]) ); defparam un152_exu_alu_result_1_I_57.INIT=20'h68421; // @46:11165 ARI1 un152_exu_alu_result_1_I_63 ( .FCO(un152_exu_alu_result_1_data_tmp[10]), .S(un152_exu_alu_result_1_I_63_S), .Y(un152_exu_alu_result_1_I_63_Y), .B(exu_alu_operand0_Z[20]), .C(exu_alu_operand0_Z[21]), .D(exu_alu_operand1_Z[20]), .A(exu_alu_operand1_Z[21]), .FCI(un152_exu_alu_result_1_data_tmp[9]) ); defparam un152_exu_alu_result_1_I_63.INIT=20'h68421; // @46:11165 ARI1 un152_exu_alu_result_1_I_21 ( .FCO(un152_exu_alu_result_1_data_tmp[11]), .S(un152_exu_alu_result_1_I_21_S), .Y(un152_exu_alu_result_1_I_21_Y), .B(exu_alu_operand0_Z[22]), .C(exu_alu_operand0_Z[23]), .D(exu_alu_operand1_Z[22]), .A(exu_alu_operand1_Z[23]), .FCI(un152_exu_alu_result_1_data_tmp[10]) ); defparam un152_exu_alu_result_1_I_21.INIT=20'h68421; // @46:11165 ARI1 un152_exu_alu_result_1_I_69 ( .FCO(un152_exu_alu_result_1_data_tmp[12]), .S(un152_exu_alu_result_1_I_69_S), .Y(un152_exu_alu_result_1_I_69_Y), .B(exu_alu_operand0_Z[24]), .C(exu_alu_operand0_Z[25]), .D(exu_alu_operand1_Z[24]), .A(exu_alu_operand1_Z[25]), .FCI(un152_exu_alu_result_1_data_tmp[11]) ); defparam un152_exu_alu_result_1_I_69.INIT=20'h68421; // @46:11165 ARI1 un152_exu_alu_result_1_I_81 ( .FCO(un152_exu_alu_result_1_data_tmp[13]), .S(un152_exu_alu_result_1_I_81_S), .Y(un152_exu_alu_result_1_I_81_Y), .B(exu_alu_operand0_Z[26]), .C(exu_alu_operand0_Z[27]), .D(exu_alu_operand1_Z[26]), .A(exu_alu_operand1_Z[27]), .FCI(un152_exu_alu_result_1_data_tmp[12]) ); defparam un152_exu_alu_result_1_I_81.INIT=20'h68421; // @46:11165 ARI1 un152_exu_alu_result_1_I_87 ( .FCO(un152_exu_alu_result_1_data_tmp[14]), .S(un152_exu_alu_result_1_I_87_S), .Y(un152_exu_alu_result_1_I_87_Y), .B(exu_alu_operand0_Z[28]), .C(exu_alu_operand0_Z[29]), .D(exu_alu_operand1_Z[28]), .A(exu_alu_operand1_Z[29]), .FCI(un152_exu_alu_result_1_data_tmp[13]) ); defparam un152_exu_alu_result_1_I_87.INIT=20'h68421; // @46:11165 ARI1 un152_exu_alu_result_1_I_45 ( .FCO(un152_exu_alu_result_1_data_tmp[15]), .S(un152_exu_alu_result_1_I_45_S), .Y(un152_exu_alu_result_1_I_45_Y), .B(exu_alu_operand0_Z[30]), .C(exu_alu_operand0_Z[31]), .D(exu_alu_operand1_Z[30]), .A(exu_alu_operand1_Z[31]), .FCI(un152_exu_alu_result_1_data_tmp[14]) ); defparam un152_exu_alu_result_1_I_45.INIT=20'h68421; // @46:11420 ARI1 next_dividend_s_0_4127 ( .FCO(next_dividend_s_0_4127_FCO), .S(next_dividend_s_0_4127_S), .Y(next_dividend_s_0_4127_Y), .B(div_ack_Z), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam next_dividend_s_0_4127.INIT=20'h4AA00; // @46:11420 ARI1 next_dividend_cry_0_0 ( .FCO(next_dividend_cry_0), .S(next_dividend_Z[0]), .Y(next_dividend_cry_0_0_Y), .B(div_divisor_Z[0]), .C(next_dividend_0_sqmuxa_Z), .D(next_dividend_0[0]), .A(un1_next_dividend_0_sqmuxa_Z), .FCI(next_dividend_s_0_4127_FCO) ); defparam next_dividend_cry_0_0.INIT=20'h52DF0; // @46:11420 ARI1 next_dividend_cry_1_0 ( .FCO(next_dividend_cry_1), .S(next_dividend_Z[1]), .Y(next_dividend_cry_1_0_Y), .B(div_divisor_Z[1]), .C(next_dividend_0_sqmuxa_Z), .D(next_dividend_0[1]), .A(un1_next_dividend_0_sqmuxa_Z), .FCI(next_dividend_cry_0) ); defparam next_dividend_cry_1_0.INIT=20'h5E1F0; // @46:11420 ARI1 next_dividend_cry_2_0 ( .FCO(next_dividend_cry_2), .S(next_dividend_Z[2]), .Y(next_dividend_cry_2_0_Y), .B(div_divisor_Z[2]), .C(next_dividend_0_sqmuxa_Z), .D(next_dividend_0[2]), .A(un1_next_dividend_0_sqmuxa_Z), .FCI(next_dividend_cry_1) ); defparam next_dividend_cry_2_0.INIT=20'h5E1F0; // @46:11420 ARI1 next_dividend_cry_3_0 ( .FCO(next_dividend_cry_3), .S(next_dividend_Z[3]), .Y(next_dividend_cry_3_0_Y), .B(div_divisor_Z[3]), .C(next_dividend_0_sqmuxa_Z), .D(next_dividend_0[3]), .A(un1_next_dividend_0_sqmuxa_Z), .FCI(next_dividend_cry_2) ); defparam next_dividend_cry_3_0.INIT=20'h5E1F0; // @46:11420 ARI1 next_dividend_cry_4_0 ( .FCO(next_dividend_cry_4), .S(next_dividend_Z[4]), .Y(next_dividend_cry_4_0_Y), .B(div_divisor_Z[4]), .C(next_dividend_0_sqmuxa_Z), .D(next_dividend_0[4]), .A(un1_next_dividend_0_sqmuxa_Z), .FCI(next_dividend_cry_3) ); defparam next_dividend_cry_4_0.INIT=20'h5E1F0; // @46:11420 ARI1 next_dividend_cry_5_0 ( .FCO(next_dividend_cry_5), .S(next_dividend_Z[5]), .Y(next_dividend_cry_5_0_Y), .B(div_divisor_Z[5]), .C(next_dividend_0_sqmuxa_Z), .D(next_dividend_0[5]), .A(un1_next_dividend_0_sqmuxa_Z), .FCI(next_dividend_cry_4) ); defparam next_dividend_cry_5_0.INIT=20'h5E1F0; // @46:11420 ARI1 next_dividend_cry_6_0 ( .FCO(next_dividend_cry_6), .S(next_dividend_Z[6]), .Y(next_dividend_cry_6_0_Y), .B(div_divisor_Z[6]), .C(next_dividend_0_sqmuxa_Z), .D(next_dividend_0[6]), .A(un1_next_dividend_0_sqmuxa_Z), .FCI(next_dividend_cry_5) ); defparam next_dividend_cry_6_0.INIT=20'h5E1F0; // @46:11420 ARI1 next_dividend_cry_7_0 ( .FCO(next_dividend_cry_7), .S(next_dividend_Z[7]), .Y(next_dividend_cry_7_0_Y), .B(div_divisor_Z[7]), .C(next_dividend_0_sqmuxa_Z), .D(next_dividend_0[7]), .A(un1_next_dividend_0_sqmuxa_Z), .FCI(next_dividend_cry_6) ); defparam next_dividend_cry_7_0.INIT=20'h5E1F0; // @46:11420 ARI1 next_dividend_cry_8_0 ( .FCO(next_dividend_cry_8), .S(next_dividend_Z[8]), .Y(next_dividend_cry_8_0_Y), .B(div_divisor_Z[8]), .C(next_dividend_0_sqmuxa_Z), .D(next_dividend_0[8]), .A(un1_next_dividend_0_sqmuxa_Z), .FCI(next_dividend_cry_7) ); defparam next_dividend_cry_8_0.INIT=20'h5E1F0; // @46:11420 ARI1 next_dividend_cry_9_0 ( .FCO(next_dividend_cry_9), .S(next_dividend_Z[9]), .Y(next_dividend_cry_9_0_Y), .B(div_divisor_Z[9]), .C(next_dividend_0_sqmuxa_Z), .D(next_dividend_0[9]), .A(un1_next_dividend_0_sqmuxa_Z), .FCI(next_dividend_cry_8) ); defparam next_dividend_cry_9_0.INIT=20'h5E1F0; // @46:11420 ARI1 next_dividend_cry_10_0 ( .FCO(next_dividend_cry_10), .S(next_dividend_Z[10]), .Y(next_dividend_cry_10_0_Y), .B(div_divisor_Z[10]), .C(next_dividend_0_sqmuxa_Z), .D(next_dividend_0[10]), .A(un1_next_dividend_0_sqmuxa_Z), .FCI(next_dividend_cry_9) ); defparam next_dividend_cry_10_0.INIT=20'h5E1F0; // @46:11420 ARI1 next_dividend_cry_11_0 ( .FCO(next_dividend_cry_11), .S(next_dividend_Z[11]), .Y(next_dividend_cry_11_0_Y), .B(div_divisor_Z[11]), .C(next_dividend_0_sqmuxa_Z), .D(next_dividend_0[11]), .A(un1_next_dividend_0_sqmuxa_Z), .FCI(next_dividend_cry_10) ); defparam next_dividend_cry_11_0.INIT=20'h5E1F0; // @46:11420 ARI1 next_dividend_cry_12_0 ( .FCO(next_dividend_cry_12), .S(next_dividend_Z[12]), .Y(next_dividend_cry_12_0_Y), .B(div_divisor_Z[12]), .C(next_dividend_0_sqmuxa_Z), .D(next_dividend_0[12]), .A(un1_next_dividend_0_sqmuxa_Z), .FCI(next_dividend_cry_11) ); defparam next_dividend_cry_12_0.INIT=20'h5E1F0; // @46:11420 ARI1 next_dividend_cry_13_0 ( .FCO(next_dividend_cry_13), .S(next_dividend_Z[13]), .Y(next_dividend_cry_13_0_Y), .B(div_divisor_Z[13]), .C(next_dividend_0_sqmuxa_Z), .D(next_dividend_0[13]), .A(un1_next_dividend_0_sqmuxa_Z), .FCI(next_dividend_cry_12) ); defparam next_dividend_cry_13_0.INIT=20'h5E1F0; // @46:11420 ARI1 next_dividend_cry_14_0 ( .FCO(next_dividend_cry_14), .S(next_dividend_Z[14]), .Y(next_dividend_cry_14_0_Y), .B(div_divisor_Z[14]), .C(next_dividend_0_sqmuxa_Z), .D(next_dividend_0[14]), .A(un1_next_dividend_0_sqmuxa_Z), .FCI(next_dividend_cry_13) ); defparam next_dividend_cry_14_0.INIT=20'h5E1F0; // @46:11420 ARI1 next_dividend_cry_15_0 ( .FCO(next_dividend_cry_15), .S(next_dividend_Z[15]), .Y(next_dividend_cry_15_0_Y), .B(div_divisor_Z[15]), .C(next_dividend_0_sqmuxa_Z), .D(next_dividend_0[15]), .A(un1_next_dividend_0_sqmuxa_Z), .FCI(next_dividend_cry_14) ); defparam next_dividend_cry_15_0.INIT=20'h5E1F0; // @46:11420 ARI1 next_dividend_cry_16_0 ( .FCO(next_dividend_cry_16), .S(next_dividend_Z[16]), .Y(next_dividend_cry_16_0_Y), .B(div_divisor_Z[16]), .C(next_dividend_0_sqmuxa_Z), .D(next_dividend_0[16]), .A(un1_next_dividend_0_sqmuxa_Z), .FCI(next_dividend_cry_15) ); defparam next_dividend_cry_16_0.INIT=20'h5E1F0; // @46:11420 ARI1 next_dividend_cry_17_0 ( .FCO(next_dividend_cry_17), .S(next_dividend_Z[17]), .Y(next_dividend_cry_17_0_Y), .B(div_divisor_Z[17]), .C(next_dividend_0_sqmuxa_Z), .D(next_dividend_0[17]), .A(un1_next_dividend_0_sqmuxa_Z), .FCI(next_dividend_cry_16) ); defparam next_dividend_cry_17_0.INIT=20'h5E1F0; // @46:11420 ARI1 next_dividend_cry_18_0 ( .FCO(next_dividend_cry_18), .S(next_dividend_Z[18]), .Y(next_dividend_cry_18_0_Y), .B(div_divisor_Z[18]), .C(next_dividend_0_sqmuxa_Z), .D(next_dividend_0[18]), .A(un1_next_dividend_0_sqmuxa_Z), .FCI(next_dividend_cry_17) ); defparam next_dividend_cry_18_0.INIT=20'h5E1F0; // @46:11420 ARI1 next_dividend_cry_19_0 ( .FCO(next_dividend_cry_19), .S(next_dividend_Z[19]), .Y(next_dividend_cry_19_0_Y), .B(div_divisor_Z[19]), .C(next_dividend_0_sqmuxa_Z), .D(next_dividend_0[19]), .A(un1_next_dividend_0_sqmuxa_Z), .FCI(next_dividend_cry_18) ); defparam next_dividend_cry_19_0.INIT=20'h5E1F0; // @46:11420 ARI1 next_dividend_cry_20_0 ( .FCO(next_dividend_cry_20), .S(next_dividend_Z[20]), .Y(next_dividend_cry_20_0_Y), .B(div_divisor_Z[20]), .C(next_dividend_0_sqmuxa_Z), .D(next_dividend_0[20]), .A(un1_next_dividend_0_sqmuxa_Z), .FCI(next_dividend_cry_19) ); defparam next_dividend_cry_20_0.INIT=20'h5E1F0; // @46:11420 ARI1 next_dividend_cry_21_0 ( .FCO(next_dividend_cry_21), .S(next_dividend_Z[21]), .Y(next_dividend_cry_21_0_Y), .B(div_divisor_Z[21]), .C(next_dividend_0_sqmuxa_Z), .D(next_dividend_0[21]), .A(un1_next_dividend_0_sqmuxa_Z), .FCI(next_dividend_cry_20) ); defparam next_dividend_cry_21_0.INIT=20'h5E1F0; // @46:11420 ARI1 next_dividend_cry_22_0 ( .FCO(next_dividend_cry_22), .S(next_dividend_Z[22]), .Y(next_dividend_cry_22_0_Y), .B(div_divisor_Z[22]), .C(next_dividend_0_sqmuxa_Z), .D(next_dividend_0[22]), .A(un1_next_dividend_0_sqmuxa_Z), .FCI(next_dividend_cry_21) ); defparam next_dividend_cry_22_0.INIT=20'h5E1F0; // @46:11420 ARI1 next_dividend_cry_23_0 ( .FCO(next_dividend_cry_23), .S(next_dividend_Z[23]), .Y(next_dividend_cry_23_0_Y), .B(div_divisor_Z[23]), .C(next_dividend_0_sqmuxa_Z), .D(next_dividend_0[23]), .A(un1_next_dividend_0_sqmuxa_Z), .FCI(next_dividend_cry_22) ); defparam next_dividend_cry_23_0.INIT=20'h5E1F0; // @46:11420 ARI1 next_dividend_cry_24_0 ( .FCO(next_dividend_cry_24), .S(next_dividend_Z[24]), .Y(next_dividend_cry_24_0_Y), .B(div_divisor_Z[24]), .C(next_dividend_0_sqmuxa_Z), .D(next_dividend_0[24]), .A(un1_next_dividend_0_sqmuxa_Z), .FCI(next_dividend_cry_23) ); defparam next_dividend_cry_24_0.INIT=20'h5E1F0; // @46:11420 ARI1 next_dividend_cry_25_0 ( .FCO(next_dividend_cry_25), .S(next_dividend_Z[25]), .Y(next_dividend_cry_25_0_Y), .B(div_divisor_Z[25]), .C(next_dividend_0_sqmuxa_Z), .D(next_dividend_0[25]), .A(un1_next_dividend_0_sqmuxa_Z), .FCI(next_dividend_cry_24) ); defparam next_dividend_cry_25_0.INIT=20'h5E1F0; // @46:11420 ARI1 next_dividend_cry_26_0 ( .FCO(next_dividend_cry_26), .S(next_dividend_Z[26]), .Y(next_dividend_cry_26_0_Y), .B(div_divisor_Z[26]), .C(next_dividend_0_sqmuxa_Z), .D(next_dividend_0[26]), .A(un1_next_dividend_0_sqmuxa_Z), .FCI(next_dividend_cry_25) ); defparam next_dividend_cry_26_0.INIT=20'h5E1F0; // @46:11420 ARI1 next_dividend_cry_27_0 ( .FCO(next_dividend_cry_27), .S(next_dividend_Z[27]), .Y(next_dividend_cry_27_0_Y), .B(div_divisor_Z[27]), .C(next_dividend_0_sqmuxa_Z), .D(next_dividend_0[27]), .A(un1_next_dividend_0_sqmuxa_Z), .FCI(next_dividend_cry_26) ); defparam next_dividend_cry_27_0.INIT=20'h5E1F0; // @46:11420 ARI1 next_dividend_cry_28_0 ( .FCO(next_dividend_cry_28), .S(next_dividend_Z[28]), .Y(next_dividend_cry_28_0_Y), .B(div_divisor_Z[28]), .C(next_dividend_0_sqmuxa_Z), .D(next_dividend_0[28]), .A(un1_next_dividend_0_sqmuxa_Z), .FCI(next_dividend_cry_27) ); defparam next_dividend_cry_28_0.INIT=20'h5E1F0; // @46:11420 ARI1 next_dividend_cry_29_0 ( .FCO(next_dividend_cry_29), .S(next_dividend_Z[29]), .Y(next_dividend_cry_29_0_Y), .B(div_divisor_Z[29]), .C(next_dividend_0_sqmuxa_Z), .D(next_dividend_0[29]), .A(un1_next_dividend_0_sqmuxa_Z), .FCI(next_dividend_cry_28) ); defparam next_dividend_cry_29_0.INIT=20'h5E1F0; // @46:11420 ARI1 next_dividend_s_31 ( .FCO(next_dividend_s_31_FCO), .S(next_dividend[31]), .Y(next_dividend_s_31_Y), .B(exu_alu_operand0_Z[31]), .C(next_dividend_0_sqmuxa_Z), .D(next_dividend_axb_31_1_Z), .A(un1_next_dividend_0_sqmuxa_Z), .FCI(next_dividend_cry_30) ); defparam next_dividend_s_31.INIT=20'h447AA; // @46:11420 ARI1 next_dividend_cry_30_0 ( .FCO(next_dividend_cry_30), .S(next_dividend_Z[30]), .Y(next_dividend_cry_30_0_Y), .B(div_divisor_Z[30]), .C(next_dividend_0_sqmuxa_Z), .D(next_dividend_0[30]), .A(un1_next_dividend_0_sqmuxa_Z), .FCI(next_dividend_cry_29) ); defparam next_dividend_cry_30_0.INIT=20'h5E1F0; // @46:11446 ARI1 mul_div_cnt_s_4133 ( .FCO(mul_div_cnt_s_4133_FCO), .S(mul_div_cnt_s_4133_S), .Y(mul_div_cnt_s_4133_Y), .B(mul_div_cnt_Z[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam mul_div_cnt_s_4133.INIT=20'h4AA00; // @46:11446 ARI1 \mul_div_cnt_cry[1] ( .FCO(mul_div_cnt_cry_Z[1]), .S(mul_div_cnt_s[1]), .Y(mul_div_cnt_cry_Y[1]), .B(mul_div_cnt_Z[1]), .C(GND), .D(GND), .A(VCC), .FCI(mul_div_cnt_s_4133_FCO) ); defparam \mul_div_cnt_cry[1] .INIT=20'h4AA00; // @46:11446 ARI1 \mul_div_cnt_cry[2] ( .FCO(mul_div_cnt_cry_Z[2]), .S(mul_div_cnt_s[2]), .Y(mul_div_cnt_cry_Y[2]), .B(mul_div_cnt_Z[2]), .C(GND), .D(GND), .A(VCC), .FCI(mul_div_cnt_cry_Z[1]) ); defparam \mul_div_cnt_cry[2] .INIT=20'h4AA00; // @46:11446 ARI1 \mul_div_cnt_cry[3] ( .FCO(mul_div_cnt_cry_Z[3]), .S(mul_div_cnt_s[3]), .Y(mul_div_cnt_cry_Y[3]), .B(mul_div_cnt_Z[3]), .C(GND), .D(GND), .A(VCC), .FCI(mul_div_cnt_cry_Z[2]) ); defparam \mul_div_cnt_cry[3] .INIT=20'h4AA00; // @46:11446 ARI1 \mul_div_cnt_s[5] ( .FCO(mul_div_cnt_s_FCO[5]), .S(mul_div_cnt_s_Z[5]), .Y(mul_div_cnt_s_Y[5]), .B(mul_div_cnt_Z[5]), .C(GND), .D(GND), .A(VCC), .FCI(mul_div_cnt_cry_Z[4]) ); defparam \mul_div_cnt_s[5] .INIT=20'h4AA00; // @46:11446 ARI1 \mul_div_cnt_cry[4] ( .FCO(mul_div_cnt_cry_Z[4]), .S(mul_div_cnt_s[4]), .Y(mul_div_cnt_cry_Y[4]), .B(mul_div_cnt_Z[4]), .C(GND), .D(GND), .A(VCC), .FCI(mul_div_cnt_cry_Z[3]) ); defparam \mul_div_cnt_cry[4] .INIT=20'h4AA00; // @46:11244 ARI1 \lsu_align_result_95_2_1_wmux_0[14] ( .FCO(lsu_align_result_95_2_1_0_co1[14]), .S(lsu_align_result_95_2_1_wmux_0_S[14]), .Y(N_2275), .B(shifter_unit_op_sel[0]), .C(exu_shifter_operand[14]), .D(exu_shifter_operand[31]), .A(lsu_align_result_95_2_1_0_y0[14]), .FCI(lsu_align_result_95_2_1_0_co0[14]) ); defparam \lsu_align_result_95_2_1_wmux_0[14] .INIT=20'h0F588; // @46:11244 ARI1 \lsu_align_result_95_2_1_0_wmux[14] ( .FCO(lsu_align_result_95_2_1_0_co0[14]), .S(lsu_align_result_95_2_1_0_wmux_S[14]), .Y(lsu_align_result_95_2_1_0_y0[14]), .B(shifter_unit_op_sel[0]), .C(exu_shifter_operand[14]), .D(N_1505), .A(un174_shifter_result_1_i[5]), .FCI(VCC) ); defparam \lsu_align_result_95_2_1_0_wmux[14] .INIT=20'h0FA44; // @46:11244 ARI1 \lsu_align_result_95_2_1_wmux_0[13] ( .FCO(lsu_align_result_95_2_1_0_co1[13]), .S(lsu_align_result_95_2_1_wmux_0_S[13]), .Y(N_2293), .B(shifter_unit_op_sel[0]), .C(exu_shifter_operand[13]), .D(lsu_align_result_78_Z[29]), .A(lsu_align_result_95_2_1_0_y0[13]), .FCI(lsu_align_result_95_2_1_0_co0[13]) ); defparam \lsu_align_result_95_2_1_wmux_0[13] .INIT=20'h0F588; // @46:11244 ARI1 \lsu_align_result_95_2_1_0_wmux[13] ( .FCO(lsu_align_result_95_2_1_0_co0[13]), .S(lsu_align_result_95_2_1_0_wmux_S[13]), .Y(lsu_align_result_95_2_1_0_y0[13]), .B(shifter_unit_op_sel[0]), .C(exu_shifter_operand[13]), .D(N_1504), .A(un174_shifter_result_1_i[5]), .FCI(VCC) ); defparam \lsu_align_result_95_2_1_0_wmux[13] .INIT=20'h0FA44; // @46:11244 ARI1 \lsu_align_result_95_2_1_wmux_0[12] ( .FCO(lsu_align_result_95_2_1_0_co1[12]), .S(lsu_align_result_95_2_1_wmux_0_S[12]), .Y(N_2291), .B(shifter_unit_op_sel[0]), .C(exu_shifter_operand[12]), .D(lsu_align_result_78_Z[28]), .A(lsu_align_result_95_2_1_0_y0[12]), .FCI(lsu_align_result_95_2_1_0_co0[12]) ); defparam \lsu_align_result_95_2_1_wmux_0[12] .INIT=20'h0F588; // @46:11244 ARI1 \lsu_align_result_95_2_1_0_wmux[12] ( .FCO(lsu_align_result_95_2_1_0_co0[12]), .S(lsu_align_result_95_2_1_0_wmux_S[12]), .Y(lsu_align_result_95_2_1_0_y0[12]), .B(shifter_unit_op_sel[0]), .C(exu_shifter_operand[12]), .D(N_1503), .A(un174_shifter_result_1_i[5]), .FCI(VCC) ); defparam \lsu_align_result_95_2_1_0_wmux[12] .INIT=20'h0FA44; // @46:11244 ARI1 \lsu_align_result_95_2_1_wmux_0[10] ( .FCO(lsu_align_result_95_2_1_0_co1[10]), .S(lsu_align_result_95_2_1_wmux_0_S[10]), .Y(N_2287), .B(shifter_unit_op_sel[0]), .C(exu_shifter_operand[10]), .D(lsu_align_result_78_Z[26]), .A(lsu_align_result_95_2_1_0_y0[10]), .FCI(lsu_align_result_95_2_1_0_co0[10]) ); defparam \lsu_align_result_95_2_1_wmux_0[10] .INIT=20'h0F588; // @46:11244 ARI1 \lsu_align_result_95_2_1_0_wmux[10] ( .FCO(lsu_align_result_95_2_1_0_co0[10]), .S(lsu_align_result_95_2_1_0_wmux_S[10]), .Y(lsu_align_result_95_2_1_0_y0[10]), .B(shifter_unit_op_sel[0]), .C(exu_shifter_operand[10]), .D(N_1501), .A(un174_shifter_result_1_i[5]), .FCI(VCC) ); defparam \lsu_align_result_95_2_1_0_wmux[10] .INIT=20'h0FA44; // @46:11244 ARI1 \lsu_align_result_95_2_1_wmux_0[11] ( .FCO(lsu_align_result_95_2_1_0_co1[11]), .S(lsu_align_result_95_2_1_wmux_0_S[11]), .Y(N_2289), .B(shifter_unit_op_sel[0]), .C(exu_shifter_operand[11]), .D(lsu_align_result_78_Z[27]), .A(lsu_align_result_95_2_1_0_y0[11]), .FCI(lsu_align_result_95_2_1_0_co0[11]) ); defparam \lsu_align_result_95_2_1_wmux_0[11] .INIT=20'h0F588; // @46:11244 ARI1 \lsu_align_result_95_2_1_0_wmux[11] ( .FCO(lsu_align_result_95_2_1_0_co0[11]), .S(lsu_align_result_95_2_1_0_wmux_S[11]), .Y(lsu_align_result_95_2_1_0_y0[11]), .B(shifter_unit_op_sel[0]), .C(exu_shifter_operand[11]), .D(N_1502), .A(un174_shifter_result_1_i[5]), .FCI(VCC) ); defparam \lsu_align_result_95_2_1_0_wmux[11] .INIT=20'h0FA44; // @46:11244 ARI1 \lsu_align_result_95_2_1_wmux_0[2] ( .FCO(lsu_align_result_95_2_1_0_co1[2]), .S(lsu_align_result_95_2_1_wmux_0_S[2]), .Y(N_2299), .B(shifter_unit_op_sel[0]), .C(exu_shifter_operand[2]), .D(lsu_align_result_78_Z[18]), .A(lsu_align_result_95_2_1_0_y0[2]), .FCI(lsu_align_result_95_2_1_0_co0[2]) ); defparam \lsu_align_result_95_2_1_wmux_0[2] .INIT=20'h0F588; // @46:11244 ARI1 \lsu_align_result_95_2_1_0_wmux[2] ( .FCO(lsu_align_result_95_2_1_0_co0[2]), .S(lsu_align_result_95_2_1_0_wmux_S[2]), .Y(lsu_align_result_95_2_1_0_y0[2]), .B(shifter_unit_op_sel[0]), .C(exu_shifter_operand[2]), .D(N_1493), .A(un174_shifter_result_1_i[5]), .FCI(VCC) ); defparam \lsu_align_result_95_2_1_0_wmux[2] .INIT=20'h0FA44; // @46:11244 ARI1 \lsu_align_result_95_2_1_wmux_0[8] ( .FCO(lsu_align_result_95_2_1_0_co1[8]), .S(lsu_align_result_95_2_1_wmux_0_S[8]), .Y(N_2283), .B(shifter_unit_op_sel[0]), .C(exu_shifter_operand[8]), .D(lsu_align_result_78_Z[24]), .A(lsu_align_result_95_2_1_0_y0[8]), .FCI(lsu_align_result_95_2_1_0_co0[8]) ); defparam \lsu_align_result_95_2_1_wmux_0[8] .INIT=20'h0F588; // @46:11244 ARI1 \lsu_align_result_95_2_1_0_wmux[8] ( .FCO(lsu_align_result_95_2_1_0_co0[8]), .S(lsu_align_result_95_2_1_0_wmux_S[8]), .Y(lsu_align_result_95_2_1_0_y0[8]), .B(shifter_unit_op_sel[0]), .C(exu_shifter_operand[8]), .D(N_1499), .A(un174_shifter_result_1_i[5]), .FCI(VCC) ); defparam \lsu_align_result_95_2_1_0_wmux[8] .INIT=20'h0FA44; // @46:11244 ARI1 \lsu_align_result_95_2_1_wmux_0[7] ( .FCO(lsu_align_result_95_2_1_0_co1[7]), .S(lsu_align_result_95_2_1_wmux_0_S[7]), .Y(N_2281), .B(shifter_unit_op_sel[0]), .C(exu_shifter_operand[7]), .D(lsu_align_result_78_Z[23]), .A(lsu_align_result_95_2_1_0_y0[7]), .FCI(lsu_align_result_95_2_1_0_co0[7]) ); defparam \lsu_align_result_95_2_1_wmux_0[7] .INIT=20'h0F588; // @46:11244 ARI1 \lsu_align_result_95_2_1_0_wmux[7] ( .FCO(lsu_align_result_95_2_1_0_co0[7]), .S(lsu_align_result_95_2_1_0_wmux_S[7]), .Y(lsu_align_result_95_2_1_0_y0[7]), .B(shifter_unit_op_sel[0]), .C(exu_shifter_operand[7]), .D(N_1498), .A(un174_shifter_result_1_i[5]), .FCI(VCC) ); defparam \lsu_align_result_95_2_1_0_wmux[7] .INIT=20'h0FA44; // @46:11244 ARI1 \lsu_align_result_95_2_1_wmux_0[1] ( .FCO(lsu_align_result_95_2_1_0_co1[1]), .S(lsu_align_result_95_2_1_wmux_0_S[1]), .Y(N_2151), .B(shifter_unit_op_sel[0]), .C(exu_shifter_operand[1]), .D(lsu_align_result_78_Z[17]), .A(lsu_align_result_95_2_1_0_y0[1]), .FCI(lsu_align_result_95_2_1_0_co0[1]) ); defparam \lsu_align_result_95_2_1_wmux_0[1] .INIT=20'h0F588; // @46:11244 ARI1 \lsu_align_result_95_2_1_0_wmux[1] ( .FCO(lsu_align_result_95_2_1_0_co0[1]), .S(lsu_align_result_95_2_1_0_wmux_S[1]), .Y(lsu_align_result_95_2_1_0_y0[1]), .B(shifter_unit_op_sel[0]), .C(exu_shifter_operand[1]), .D(N_1492), .A(un174_shifter_result_1_i[5]), .FCI(VCC) ); defparam \lsu_align_result_95_2_1_0_wmux[1] .INIT=20'h0FA44; // @46:11244 ARI1 \lsu_align_result_95_2_1_wmux_0[4] ( .FCO(lsu_align_result_95_2_1_0_co1[4]), .S(lsu_align_result_95_2_1_wmux_0_S[4]), .Y(N_2297), .B(shifter_unit_op_sel[0]), .C(exu_shifter_operand[4]), .D(lsu_align_result_78_Z[20]), .A(lsu_align_result_95_2_1_0_y0[4]), .FCI(lsu_align_result_95_2_1_0_co0[4]) ); defparam \lsu_align_result_95_2_1_wmux_0[4] .INIT=20'h0F588; // @46:11244 ARI1 \lsu_align_result_95_2_1_0_wmux[4] ( .FCO(lsu_align_result_95_2_1_0_co0[4]), .S(lsu_align_result_95_2_1_0_wmux_S[4]), .Y(lsu_align_result_95_2_1_0_y0[4]), .B(shifter_unit_op_sel[0]), .C(exu_shifter_operand[4]), .D(N_1495), .A(un174_shifter_result_1_i[5]), .FCI(VCC) ); defparam \lsu_align_result_95_2_1_0_wmux[4] .INIT=20'h0FA44; // @46:11244 ARI1 \lsu_align_result_95_2_1_wmux_0[5] ( .FCO(lsu_align_result_95_2_1_0_co1[5]), .S(lsu_align_result_95_2_1_wmux_0_S[5]), .Y(N_2277), .B(shifter_unit_op_sel[0]), .C(exu_shifter_operand[5]), .D(lsu_align_result_78_Z[21]), .A(lsu_align_result_95_2_1_0_y0[5]), .FCI(lsu_align_result_95_2_1_0_co0[5]) ); defparam \lsu_align_result_95_2_1_wmux_0[5] .INIT=20'h0F588; // @46:11244 ARI1 \lsu_align_result_95_2_1_0_wmux[5] ( .FCO(lsu_align_result_95_2_1_0_co0[5]), .S(lsu_align_result_95_2_1_0_wmux_S[5]), .Y(lsu_align_result_95_2_1_0_y0[5]), .B(shifter_unit_op_sel[0]), .C(exu_shifter_operand[5]), .D(N_1496), .A(un174_shifter_result_1_i[5]), .FCI(VCC) ); defparam \lsu_align_result_95_2_1_0_wmux[5] .INIT=20'h0FA44; // @46:11244 ARI1 \lsu_align_result_95_2_1_wmux_0[9] ( .FCO(lsu_align_result_95_2_1_0_co1[9]), .S(lsu_align_result_95_2_1_wmux_0_S[9]), .Y(N_2285), .B(shifter_unit_op_sel[0]), .C(exu_shifter_operand[9]), .D(lsu_align_result_78_Z[25]), .A(lsu_align_result_95_2_1_0_y0[9]), .FCI(lsu_align_result_95_2_1_0_co0[9]) ); defparam \lsu_align_result_95_2_1_wmux_0[9] .INIT=20'h0F588; // @46:11244 ARI1 \lsu_align_result_95_2_1_0_wmux[9] ( .FCO(lsu_align_result_95_2_1_0_co0[9]), .S(lsu_align_result_95_2_1_0_wmux_S[9]), .Y(lsu_align_result_95_2_1_0_y0[9]), .B(shifter_unit_op_sel[0]), .C(exu_shifter_operand[9]), .D(N_1500), .A(un174_shifter_result_1_i[5]), .FCI(VCC) ); defparam \lsu_align_result_95_2_1_0_wmux[9] .INIT=20'h0FA44; // @46:11244 ARI1 \lsu_align_result_95_2_1_wmux_0[6] ( .FCO(lsu_align_result_95_2_1_0_co1[6]), .S(lsu_align_result_95_2_1_wmux_0_S[6]), .Y(N_2279), .B(shifter_unit_op_sel[0]), .C(exu_shifter_operand[6]), .D(lsu_align_result_78_Z[22]), .A(lsu_align_result_95_2_1_0_y0[6]), .FCI(lsu_align_result_95_2_1_0_co0[6]) ); defparam \lsu_align_result_95_2_1_wmux_0[6] .INIT=20'h0F588; // @46:11244 ARI1 \lsu_align_result_95_2_1_0_wmux[6] ( .FCO(lsu_align_result_95_2_1_0_co0[6]), .S(lsu_align_result_95_2_1_0_wmux_S[6]), .Y(lsu_align_result_95_2_1_0_y0[6]), .B(shifter_unit_op_sel[0]), .C(exu_shifter_operand[6]), .D(N_1497), .A(un174_shifter_result_1_i[5]), .FCI(VCC) ); defparam \lsu_align_result_95_2_1_0_wmux[6] .INIT=20'h0FA44; // @46:11244 ARI1 \lsu_align_result_95_2_1_wmux_0[3] ( .FCO(lsu_align_result_95_2_1_0_co1[3]), .S(lsu_align_result_95_2_1_wmux_0_S[3]), .Y(N_2295), .B(shifter_unit_op_sel[0]), .C(exu_shifter_operand[3]), .D(lsu_align_result_78_Z[19]), .A(lsu_align_result_95_2_1_0_y0[3]), .FCI(lsu_align_result_95_2_1_0_co0[3]) ); defparam \lsu_align_result_95_2_1_wmux_0[3] .INIT=20'h0F588; // @46:11244 ARI1 \lsu_align_result_95_2_1_0_wmux[3] ( .FCO(lsu_align_result_95_2_1_0_co0[3]), .S(lsu_align_result_95_2_1_0_wmux_S[3]), .Y(lsu_align_result_95_2_1_0_y0[3]), .B(shifter_unit_op_sel[0]), .C(exu_shifter_operand[3]), .D(N_1494), .A(un174_shifter_result_1_i[5]), .FCI(VCC) ); defparam \lsu_align_result_95_2_1_0_wmux[3] .INIT=20'h0FA44; // @46:11392 ARI1 mul_mp_pmux_32_1_0_wmux_20 ( .FCO(mul_mp_pmux_32_1_0_co1_9), .S(mul_mp_pmux_32_1_0_wmux_20_S), .Y(mul_mp_pmux_32_1_0_y21), .B(mul_mp_pmux_32_1_0_y3_0), .C(mul_mp_pmux_32_1_0_y1_0), .D(mul_div_cnt_Z[1]), .A(mul_mp_pmux_32_1_0_y0_8), .FCI(mul_mp_pmux_32_1_0_co0_9) ); defparam mul_mp_pmux_32_1_0_wmux_20.INIT=20'h0FA0C; // @46:11392 ARI1 mul_mp_pmux_32_1_0_wmux_19 ( .FCO(mul_mp_pmux_32_1_0_co0_9), .S(mul_mp_pmux_32_1_0_wmux_19_S), .Y(mul_mp_pmux_32_1_0_y0_8), .B(mul_mp_pmux_32_1_0_y5_0), .C(mul_div_cnt_Z[2]), .D(mul_div_cnt_Z[1]), .A(mul_mp_pmux_32_1_0_y7_0), .FCI(mul_mp_pmux_32_1_0_co1_8) ); defparam mul_mp_pmux_32_1_0_wmux_19.INIT=20'h0EC2C; // @46:11392 ARI1 mul_mp_pmux_32_1_0_wmux_18 ( .FCO(mul_mp_pmux_32_1_0_co1_8), .S(mul_mp_pmux_32_1_0_wmux_18_S), .Y(mul_mp_pmux_32_1_0_y7_0), .B(mul_div_cnt_Z[3]), .C(mul_mp_Z[15]), .D(mul_mp_Z[31]), .A(mul_mp_pmux_32_1_0_y0_7), .FCI(mul_mp_pmux_32_1_0_co0_8) ); defparam mul_mp_pmux_32_1_0_wmux_18.INIT=20'h0F588; // @46:11392 ARI1 mul_mp_pmux_32_1_0_wmux_17 ( .FCO(mul_mp_pmux_32_1_0_co0_8), .S(mul_mp_pmux_32_1_0_wmux_17_S), .Y(mul_mp_pmux_32_1_0_y0_7), .B(mul_div_cnt_Z[3]), .C(mul_mp_Z[7]), .D(mul_mp_Z[23]), .A(mul_div_cnt_Z[4]), .FCI(mul_mp_pmux_32_1_0_co1_7) ); defparam mul_mp_pmux_32_1_0_wmux_17.INIT=20'h0FA44; // @46:11392 ARI1 mul_mp_pmux_32_1_0_wmux_16 ( .FCO(mul_mp_pmux_32_1_0_co1_7), .S(mul_mp_pmux_32_1_0_wmux_16_S), .Y(mul_mp_pmux_32_1_0_y5_0), .B(mul_div_cnt_Z[3]), .C(mul_mp_Z[11]), .D(mul_mp_Z[27]), .A(mul_mp_pmux_32_1_0_y0_6), .FCI(mul_mp_pmux_32_1_0_co0_7) ); defparam mul_mp_pmux_32_1_0_wmux_16.INIT=20'h0F588; // @46:11392 ARI1 mul_mp_pmux_32_1_0_wmux_15 ( .FCO(mul_mp_pmux_32_1_0_co0_7), .S(mul_mp_pmux_32_1_0_wmux_15_S), .Y(mul_mp_pmux_32_1_0_y0_6), .B(mul_div_cnt_Z[3]), .C(mul_mp_Z[3]), .D(mul_mp_Z[19]), .A(mul_div_cnt_Z[4]), .FCI(mul_mp_pmux_32_1_0_co1_6) ); defparam mul_mp_pmux_32_1_0_wmux_15.INIT=20'h0FA44; // @46:11392 ARI1 mul_mp_pmux_32_1_0_wmux_14 ( .FCO(mul_mp_pmux_32_1_0_co1_6), .S(mul_mp_pmux_32_1_0_wmux_14_S), .Y(mul_mp_pmux_32_1_0_y3_0), .B(mul_div_cnt_Z[3]), .C(mul_mp_Z[13]), .D(mul_mp_Z[29]), .A(mul_mp_pmux_32_1_0_y0_5), .FCI(mul_mp_pmux_32_1_0_co0_6) ); defparam mul_mp_pmux_32_1_0_wmux_14.INIT=20'h0F588; // @46:11392 ARI1 mul_mp_pmux_32_1_0_wmux_13 ( .FCO(mul_mp_pmux_32_1_0_co0_6), .S(mul_mp_pmux_32_1_0_wmux_13_S), .Y(mul_mp_pmux_32_1_0_y0_5), .B(mul_div_cnt_Z[3]), .C(mul_mp_Z[5]), .D(mul_mp_Z[21]), .A(mul_div_cnt_Z[4]), .FCI(mul_mp_pmux_32_1_0_co1_5) ); defparam mul_mp_pmux_32_1_0_wmux_13.INIT=20'h0FA44; // @46:11392 ARI1 mul_mp_pmux_32_1_0_wmux_12 ( .FCO(mul_mp_pmux_32_1_0_co1_5), .S(mul_mp_pmux_32_1_0_wmux_12_S), .Y(mul_mp_pmux_32_1_0_y1_0), .B(mul_div_cnt_Z[3]), .C(mul_mp_Z[9]), .D(mul_mp_Z[25]), .A(mul_mp_pmux_32_1_0_y0_4), .FCI(mul_mp_pmux_32_1_0_co0_5) ); defparam mul_mp_pmux_32_1_0_wmux_12.INIT=20'h0F588; // @46:11392 ARI1 mul_mp_pmux_32_1_0_wmux_11 ( .FCO(mul_mp_pmux_32_1_0_co0_5), .S(mul_mp_pmux_32_1_0_wmux_11_S), .Y(mul_mp_pmux_32_1_0_y0_4), .B(mul_div_cnt_Z[3]), .C(mul_mp_Z[1]), .D(mul_mp_Z[17]), .A(mul_div_cnt_Z[4]), .FCI(mul_mp_pmux_32_1_0_co1_4) ); defparam mul_mp_pmux_32_1_0_wmux_11.INIT=20'h0FA44; // @46:11392 ARI1 mul_mp_pmux_32_1_0_wmux_10 ( .FCO(mul_mp_pmux_32_1_0_co1_4), .S(mul_mp_pmux_32_1_0_wmux_10_S), .Y(mul_mp_pmux), .B(mul_mp_pmux_32_1_0_y9), .C(mul_div_cnt_Z[0]), .D(VCC), .A(mul_mp_pmux_32_1_0_y21), .FCI(mul_mp_pmux_32_1_0_co0_4) ); defparam mul_mp_pmux_32_1_0_wmux_10.INIT=20'h0EC2C; // @46:11392 ARI1 mul_mp_pmux_32_1_0_wmux_9 ( .FCO(mul_mp_pmux_32_1_0_co0_4), .S(mul_mp_pmux_32_1_0_wmux_9_S), .Y(mul_mp_pmux_32_1_0_wmux_9_Y), .B(VCC), .C(mul_div_cnt_Z[0]), .D(VCC), .A(VCC), .FCI(mul_mp_pmux_32_1_0_co1_3) ); defparam mul_mp_pmux_32_1_0_wmux_9.INIT=20'h0EC2C; // @46:11392 ARI1 mul_mp_pmux_32_1_0_wmux_8 ( .FCO(mul_mp_pmux_32_1_0_co1_3), .S(mul_mp_pmux_32_1_0_wmux_8_S), .Y(mul_mp_pmux_32_1_0_y9), .B(mul_mp_pmux_32_1_0_y3), .C(mul_mp_pmux_32_1_0_y1), .D(mul_div_cnt_Z[1]), .A(mul_mp_pmux_32_1_0_y0_3), .FCI(mul_mp_pmux_32_1_0_co0_3) ); defparam mul_mp_pmux_32_1_0_wmux_8.INIT=20'h0FA0C; // @46:11392 ARI1 mul_mp_pmux_32_1_0_wmux_7 ( .FCO(mul_mp_pmux_32_1_0_co0_3), .S(mul_mp_pmux_32_1_0_wmux_7_S), .Y(mul_mp_pmux_32_1_0_y0_3), .B(mul_mp_pmux_32_1_0_y5), .C(mul_div_cnt_Z[2]), .D(mul_div_cnt_Z[1]), .A(mul_mp_pmux_32_1_0_y7), .FCI(mul_mp_pmux_32_1_0_co1_2) ); defparam mul_mp_pmux_32_1_0_wmux_7.INIT=20'h0EC2C; // @46:11392 ARI1 mul_mp_pmux_32_1_0_wmux_6 ( .FCO(mul_mp_pmux_32_1_0_co1_2), .S(mul_mp_pmux_32_1_0_wmux_6_S), .Y(mul_mp_pmux_32_1_0_y7), .B(mul_div_cnt_Z[3]), .C(mul_mp_Z[14]), .D(mul_mp_Z[30]), .A(mul_mp_pmux_32_1_0_y0_2), .FCI(mul_mp_pmux_32_1_0_co0_2) ); defparam mul_mp_pmux_32_1_0_wmux_6.INIT=20'h0F588; // @46:11392 ARI1 mul_mp_pmux_32_1_0_wmux_5 ( .FCO(mul_mp_pmux_32_1_0_co0_2), .S(mul_mp_pmux_32_1_0_wmux_5_S), .Y(mul_mp_pmux_32_1_0_y0_2), .B(mul_div_cnt_Z[3]), .C(mul_mp_Z[6]), .D(mul_mp_Z[22]), .A(mul_div_cnt_Z[4]), .FCI(mul_mp_pmux_32_1_0_co1_1) ); defparam mul_mp_pmux_32_1_0_wmux_5.INIT=20'h0FA44; // @46:11392 ARI1 mul_mp_pmux_32_1_0_wmux_4 ( .FCO(mul_mp_pmux_32_1_0_co1_1), .S(mul_mp_pmux_32_1_0_wmux_4_S), .Y(mul_mp_pmux_32_1_0_y5), .B(mul_div_cnt_Z[3]), .C(mul_mp_Z[10]), .D(mul_mp_Z[26]), .A(mul_mp_pmux_32_1_0_y0_1), .FCI(mul_mp_pmux_32_1_0_co0_1) ); defparam mul_mp_pmux_32_1_0_wmux_4.INIT=20'h0F588; // @46:11392 ARI1 mul_mp_pmux_32_1_0_wmux_3 ( .FCO(mul_mp_pmux_32_1_0_co0_1), .S(mul_mp_pmux_32_1_0_wmux_3_S), .Y(mul_mp_pmux_32_1_0_y0_1), .B(mul_div_cnt_Z[3]), .C(mul_mp_Z[2]), .D(mul_mp_Z[18]), .A(mul_div_cnt_Z[4]), .FCI(mul_mp_pmux_32_1_0_co1_0) ); defparam mul_mp_pmux_32_1_0_wmux_3.INIT=20'h0FA44; // @46:11392 ARI1 mul_mp_pmux_32_1_0_wmux_2 ( .FCO(mul_mp_pmux_32_1_0_co1_0), .S(mul_mp_pmux_32_1_0_wmux_2_S), .Y(mul_mp_pmux_32_1_0_y3), .B(mul_div_cnt_Z[3]), .C(mul_mp_Z[12]), .D(mul_mp_Z[28]), .A(mul_mp_pmux_32_1_0_y0_0), .FCI(mul_mp_pmux_32_1_0_co0_0) ); defparam mul_mp_pmux_32_1_0_wmux_2.INIT=20'h0F588; // @46:11392 ARI1 mul_mp_pmux_32_1_0_wmux_1 ( .FCO(mul_mp_pmux_32_1_0_co0_0), .S(mul_mp_pmux_32_1_0_wmux_1_S), .Y(mul_mp_pmux_32_1_0_y0_0), .B(mul_div_cnt_Z[3]), .C(mul_mp_Z[4]), .D(mul_mp_Z[20]), .A(mul_div_cnt_Z[4]), .FCI(mul_mp_pmux_32_1_0_co1) ); defparam mul_mp_pmux_32_1_0_wmux_1.INIT=20'h0FA44; // @46:11392 ARI1 mul_mp_pmux_32_1_0_wmux_0 ( .FCO(mul_mp_pmux_32_1_0_co1), .S(mul_mp_pmux_32_1_0_wmux_0_S), .Y(mul_mp_pmux_32_1_0_y1), .B(mul_div_cnt_Z[3]), .C(mul_mp_Z[8]), .D(mul_mp_Z[24]), .A(mul_mp_pmux_32_1_0_y0), .FCI(mul_mp_pmux_32_1_0_co0) ); defparam mul_mp_pmux_32_1_0_wmux_0.INIT=20'h0F588; // @46:11392 ARI1 mul_mp_pmux_32_1_0_wmux ( .FCO(mul_mp_pmux_32_1_0_co0), .S(mul_mp_pmux_32_1_0_wmux_S), .Y(mul_mp_pmux_32_1_0_y0), .B(mul_div_cnt_Z[3]), .C(N_1533), .D(mul_mp_Z[16]), .A(mul_div_cnt_Z[4]), .FCI(VCC) ); defparam mul_mp_pmux_32_1_0_wmux.INIT=20'h0FA44; // @46:11244 CFG4 \lsu_align_result_60_u[2] ( .A(N_2123_i), .B(N_1643), .C(N_870), .D(N_2124_i), .Y(N_873) ); defparam \lsu_align_result_60_u[2] .INIT=16'h44F0; CFG4 slow_mul_ack_RNIRFHITD ( .A(exu_op_abort_ex), .B(slow_mul_ack_Z), .C(exu_update_result_reg), .D(next_exu_result_reg_int48), .Y(slow_mul_ack_RNIRFHITD_Z) ); defparam slow_mul_ack_RNIRFHITD.INIT=16'h33FA; // @46:10978 CFG4 exu_shifter_places_valid_u_1_0 ( .A(stage_state_ex), .B(exu_shifter_places57_Z), .C(exu_shifter_places58_Z), .D(gpr_rs2_rd_data_valid_ex), .Y(exu_shifter_places_valid_1_0) ); defparam exu_shifter_places_valid_u_1_0.INIT=16'hACA0; // @46:11446 CFG2 \mul_div_cnt_lm_0[0] ( .A(N_73_mux), .B(mul_div_cnt_Z[0]), .Y(mul_div_cnt_lm[0]) ); defparam \mul_div_cnt_lm_0[0] .INIT=4'h1; // @46:10828 CFG4 exu_alu_result195_2_3_0_RNI6IDNHB ( .A(start_m8_3_sx_Z), .B(start_m3_0_a3_2_Z), .C(machine_implicit_wr_mtval_tval_wr_en), .D(slow_N_3_mux_i), .Y(start_m8_3) ); defparam exu_alu_result195_2_3_0_RNI6IDNHB.INIT=16'h5100; // @46:10828 CFG4 start_m8_3_sx ( .A(un2_exception_taken), .B(trace_priv_i), .C(start_m3_0_a3_2_Z), .D(start_m8_1_Z), .Y(start_m8_3_sx_Z) ); defparam start_m8_3_sx.INIT=16'hE0FF; // @46:10824 CFG2 \slow_mul.un5_mul_mc ( .A(un5_mul_mc_sx), .B(N_4_i), .Y(un5_mul_mc) ); defparam \slow_mul.un5_mul_mc .INIT=4'h4; // @46:10824 CFG4 \slow_mul.un5_mul_mc_sx ( .A(N_10_i), .B(N_6_i), .C(N_8_i), .D(N_14_i), .Y(un5_mul_mc_sx) ); defparam \slow_mul.un5_mul_mc_sx .INIT=16'hFFF7; // @46:11282 CFG4 exu_result_valid_iv ( .A(div_finish), .B(exu_result_valid_iv_1_0_1z), .C(exu_result_valid_iv_1_1z), .D(un1_exu_alu_result212_3_i_0), .Y(exu_result_valid_ex) ); defparam exu_result_valid_iv.INIT=16'hFCF8; // @46:11282 CFG4 exu_result_valid_iv_1_0 ( .A(un1_exu_mux_result27_1_Z), .B(exu_alu_operand0_valid), .C(exu_alu_operand1_valid), .D(div_finish), .Y(exu_result_valid_iv_1_0_1z) ); defparam exu_result_valid_iv_1_0.INIT=16'h5540; // @46:11244 CFG4 \lsu_align_result_95_3[16] ( .A(N_1923), .B(lsu_align_result_95_3_1_Z[16]), .C(N_2122_i), .D(N_1041_1), .Y(N_3027) ); defparam \lsu_align_result_95_3[16] .INIT=16'h3F32; // @46:11244 CFG4 \lsu_align_result_95_3_1[16] ( .A(shifter_unit_op_sel[0]), .B(N_2122_i), .C(N_947), .D(lsu_align_result_95_2_2_Z), .Y(lsu_align_result_95_3_1_Z[16]) ); defparam \lsu_align_result_95_3_1[16] .INIT=16'h111D; // @46:11420 CFG2 next_dividend_axb_31_1 ( .A(dividend_Z[31]), .B(div_divisor_Z[31]), .Y(next_dividend_axb_31_1_Z) ); defparam next_dividend_axb_31_1.INIT=4'h6; // @46:11028 CFG4 \exu_alu_result_8_m_0_3[0] ( .A(N_4_i), .B(exu_alu_result_8_m_0_3_1_Z[0]), .C(N_14_i), .D(N_8_i), .Y(exu_alu_result_8_m_0_3_Z[0]) ); defparam \exu_alu_result_8_m_0_3[0] .INIT=16'h0004; // @46:11028 CFG4 \exu_alu_result_8_m_0_3_1[0] ( .A(exu_alu_operand0_0), .B(exu_alu_operand1_0), .C(N_10_i), .D(N_6_i), .Y(exu_alu_result_8_m_0_3_1_Z[0]) ); defparam \exu_alu_result_8_m_0_3_1[0] .INIT=16'h00D0; // @46:11028 CFG4 \exu_alu_result_26_m_i_m2[1] ( .A(quotient_RNINK1DG_Y[1]), .B(N_1250_i), .C(res_pos_neg_Z), .D(exu_alu_result_26_m_i_m2_1_Z[1]), .Y(N_59) ); defparam \exu_alu_result_26_m_i_m2[1] .INIT=16'h704F; // @46:11028 CFG3 \exu_alu_result_26_m_i_m2_1[1] ( .A(quotient_Z[1]), .B(dividend_Z[1]), .C(N_4_i), .Y(exu_alu_result_26_m_i_m2_1_Z[1]) ); defparam \exu_alu_result_26_m_i_m2_1[1] .INIT=8'h35; // @46:11244 CFG4 \lsu_align_result_96_m1_2[28] ( .A(un174_shifter_result_1_i[5]), .B(exu_shifter_operand[28]), .C(N_1503), .D(N_2122_i), .Y(lsu_align_result_96_m1_2_Z[28]) ); defparam \lsu_align_result_96_m1_2[28] .INIT=16'h44F0; // @46:11244 CFG4 \lsu_align_result_96_m1_2[27] ( .A(un174_shifter_result_1_i[5]), .B(exu_shifter_operand[27]), .C(N_1502), .D(N_2122_i), .Y(lsu_align_result_96_m1_2_Z[27]) ); defparam \lsu_align_result_96_m1_2[27] .INIT=16'h44F0; // @46:11244 CFG4 \lsu_align_result_96_m1_2[30] ( .A(un174_shifter_result_1_i[5]), .B(exu_shifter_operand[30]), .C(N_1505), .D(N_2122_i), .Y(lsu_align_result_96_m1_2_Z[30]) ); defparam \lsu_align_result_96_m1_2[30] .INIT=16'h44F0; // @46:11244 CFG4 \lsu_align_result_96_m1_2[29] ( .A(un174_shifter_result_1_i[5]), .B(exu_shifter_operand[29]), .C(N_1504), .D(N_2122_i), .Y(lsu_align_result_96_m1_2_Z[29]) ); defparam \lsu_align_result_96_m1_2[29] .INIT=16'h44F0; // @46:11244 CFG4 \lsu_align_result_96_m1_2[26] ( .A(un174_shifter_result_1_i[5]), .B(exu_shifter_operand[26]), .C(N_1501), .D(N_2122_i), .Y(lsu_align_result_96_m1_2_Z[26]) ); defparam \lsu_align_result_96_m1_2[26] .INIT=16'h44F0; // @46:11244 CFG4 \lsu_align_result_96_m1_2[25] ( .A(un174_shifter_result_1_i[5]), .B(exu_shifter_operand[25]), .C(N_1500), .D(N_2122_i), .Y(lsu_align_result_96_m1_2_Z[25]) ); defparam \lsu_align_result_96_m1_2[25] .INIT=16'h44F0; // @46:11244 CFG4 \lsu_align_result_96_m1_2[24] ( .A(un174_shifter_result_1_i[5]), .B(exu_shifter_operand[24]), .C(N_1499), .D(N_2122_i), .Y(lsu_align_result_96_m1_2_Z[24]) ); defparam \lsu_align_result_96_m1_2[24] .INIT=16'h44F0; // @46:11244 CFG4 \lsu_align_result_96_m1_2[23] ( .A(un174_shifter_result_1_i[5]), .B(exu_shifter_operand[23]), .C(N_1498), .D(N_2122_i), .Y(lsu_align_result_96_m1_2_Z[23]) ); defparam \lsu_align_result_96_m1_2[23] .INIT=16'h44F0; // @46:11244 CFG4 \lsu_align_result_96_m1_2[22] ( .A(un174_shifter_result_1_i[5]), .B(exu_shifter_operand[22]), .C(N_1497), .D(N_2122_i), .Y(lsu_align_result_96_m1_2_Z[22]) ); defparam \lsu_align_result_96_m1_2[22] .INIT=16'h44F0; // @46:11244 CFG4 \lsu_align_result_96_m1_2[21] ( .A(un174_shifter_result_1_i[5]), .B(exu_shifter_operand[21]), .C(N_1496), .D(N_2122_i), .Y(lsu_align_result_96_m1_2_Z[21]) ); defparam \lsu_align_result_96_m1_2[21] .INIT=16'h44F0; // @46:11244 CFG4 \lsu_align_result_96_m1_2[20] ( .A(un174_shifter_result_1_i[5]), .B(exu_shifter_operand[20]), .C(N_1495), .D(N_2122_i), .Y(lsu_align_result_96_m1_2_Z[20]) ); defparam \lsu_align_result_96_m1_2[20] .INIT=16'h44F0; // @46:11244 CFG4 \lsu_align_result_96_m1_2[19] ( .A(un174_shifter_result_1_i[5]), .B(exu_shifter_operand[19]), .C(N_1494), .D(N_2122_i), .Y(lsu_align_result_96_m1_2_Z[19]) ); defparam \lsu_align_result_96_m1_2[19] .INIT=16'h44F0; // @46:11244 CFG4 \lsu_align_result_96_m1_2[18] ( .A(un174_shifter_result_1_i[5]), .B(exu_shifter_operand[18]), .C(N_1493), .D(N_2122_i), .Y(lsu_align_result_96_m1_2_Z[18]) ); defparam \lsu_align_result_96_m1_2[18] .INIT=16'h44F0; // @46:11244 CFG4 \lsu_align_result_96_m1_2[17] ( .A(un174_shifter_result_1_i[5]), .B(exu_shifter_operand[17]), .C(N_1492), .D(N_2122_i), .Y(lsu_align_result_96_m1_2_Z[17]) ); defparam \lsu_align_result_96_m1_2[17] .INIT=16'h44F0; CFG3 \lsu_align_result_96_RNO[17] ( .A(shifter_unit_op_sel[0]), .B(lsu_align_result_96_m1_2_Z[17]), .C(lsu_align_result_96_m1_2_0_Z[17]), .Y(lsu_align_result_96_m1[17]) ); defparam \lsu_align_result_96_RNO[17] .INIT=8'hE4; // @46:11244 CFG4 \lsu_align_result_96_m1_2_0[17] ( .A(exu_shifter_operand[17]), .B(exu_shifter_operand[31]), .C(N_2122_i), .D(lsu_align_result_96_m1_1_0_Z[17]), .Y(lsu_align_result_96_m1_2_0_Z[17]) ); defparam \lsu_align_result_96_m1_2_0[17] .INIT=16'hCFA0; // @46:11244 CFG3 \lsu_align_result_96_m1_1_0[17] ( .A(un174_shifter_result_1_i[5]), .B(N_2122_i), .C(lsu_align_result_78_Z[17]), .Y(lsu_align_result_96_m1_1_0_Z[17]) ); defparam \lsu_align_result_96_m1_1_0[17] .INIT=8'hB8; CFG3 \lsu_align_result_96_RNO[18] ( .A(shifter_unit_op_sel[0]), .B(lsu_align_result_96_m1_2_Z[18]), .C(lsu_align_result_96_m1_2_0_Z[18]), .Y(lsu_align_result_96_m1[18]) ); defparam \lsu_align_result_96_RNO[18] .INIT=8'hE4; // @46:11244 CFG4 \lsu_align_result_96_m1_2_0[18] ( .A(exu_shifter_operand[18]), .B(exu_shifter_operand[31]), .C(N_2122_i), .D(lsu_align_result_96_m1_1_0_Z[18]), .Y(lsu_align_result_96_m1_2_0_Z[18]) ); defparam \lsu_align_result_96_m1_2_0[18] .INIT=16'hCFA0; // @46:11244 CFG3 \lsu_align_result_96_m1_1_0[18] ( .A(un174_shifter_result_1_i[5]), .B(N_2122_i), .C(lsu_align_result_78_Z[18]), .Y(lsu_align_result_96_m1_1_0_Z[18]) ); defparam \lsu_align_result_96_m1_1_0[18] .INIT=8'hB8; CFG3 \lsu_align_result_96_RNO[19] ( .A(shifter_unit_op_sel[0]), .B(lsu_align_result_96_m1_2_Z[19]), .C(lsu_align_result_96_m1_2_0_Z[19]), .Y(lsu_align_result_96_m1[19]) ); defparam \lsu_align_result_96_RNO[19] .INIT=8'hE4; // @46:11244 CFG4 \lsu_align_result_96_m1_2_0[19] ( .A(exu_shifter_operand[19]), .B(exu_shifter_operand[31]), .C(N_2122_i), .D(lsu_align_result_96_m1_1_0_Z[19]), .Y(lsu_align_result_96_m1_2_0_Z[19]) ); defparam \lsu_align_result_96_m1_2_0[19] .INIT=16'hCFA0; // @46:11244 CFG3 \lsu_align_result_96_m1_1_0[19] ( .A(un174_shifter_result_1_i[5]), .B(N_2122_i), .C(lsu_align_result_78_Z[19]), .Y(lsu_align_result_96_m1_1_0_Z[19]) ); defparam \lsu_align_result_96_m1_1_0[19] .INIT=8'hB8; CFG3 \lsu_align_result_96_RNO[20] ( .A(shifter_unit_op_sel[0]), .B(lsu_align_result_96_m1_2_Z[20]), .C(lsu_align_result_96_m1_2_0_Z[20]), .Y(lsu_align_result_96_m1[20]) ); defparam \lsu_align_result_96_RNO[20] .INIT=8'hE4; // @46:11244 CFG4 \lsu_align_result_96_m1_2_0[20] ( .A(exu_shifter_operand[20]), .B(exu_shifter_operand[31]), .C(N_2122_i), .D(lsu_align_result_96_m1_1_0_Z[20]), .Y(lsu_align_result_96_m1_2_0_Z[20]) ); defparam \lsu_align_result_96_m1_2_0[20] .INIT=16'hCFA0; // @46:11244 CFG3 \lsu_align_result_96_m1_1_0[20] ( .A(un174_shifter_result_1_i[5]), .B(N_2122_i), .C(lsu_align_result_78_Z[20]), .Y(lsu_align_result_96_m1_1_0_Z[20]) ); defparam \lsu_align_result_96_m1_1_0[20] .INIT=8'hB8; CFG3 \lsu_align_result_96_RNO[21] ( .A(shifter_unit_op_sel[0]), .B(lsu_align_result_96_m1_2_Z[21]), .C(lsu_align_result_96_m1_2_0_Z[21]), .Y(lsu_align_result_96_m1[21]) ); defparam \lsu_align_result_96_RNO[21] .INIT=8'hE4; // @46:11244 CFG4 \lsu_align_result_96_m1_2_0[21] ( .A(exu_shifter_operand[21]), .B(exu_shifter_operand[31]), .C(N_2122_i), .D(lsu_align_result_96_m1_1_0_Z[21]), .Y(lsu_align_result_96_m1_2_0_Z[21]) ); defparam \lsu_align_result_96_m1_2_0[21] .INIT=16'hCFA0; // @46:11244 CFG3 \lsu_align_result_96_m1_1_0[21] ( .A(un174_shifter_result_1_i[5]), .B(N_2122_i), .C(lsu_align_result_78_Z[21]), .Y(lsu_align_result_96_m1_1_0_Z[21]) ); defparam \lsu_align_result_96_m1_1_0[21] .INIT=8'hB8; CFG3 \lsu_align_result_96_RNO[22] ( .A(shifter_unit_op_sel[0]), .B(lsu_align_result_96_m1_2_Z[22]), .C(lsu_align_result_96_m1_2_0_Z[22]), .Y(lsu_align_result_96_m1[22]) ); defparam \lsu_align_result_96_RNO[22] .INIT=8'hE4; // @46:11244 CFG4 \lsu_align_result_96_m1_2_0[22] ( .A(exu_shifter_operand[22]), .B(exu_shifter_operand[31]), .C(N_2122_i), .D(lsu_align_result_96_m1_1_0_Z[22]), .Y(lsu_align_result_96_m1_2_0_Z[22]) ); defparam \lsu_align_result_96_m1_2_0[22] .INIT=16'hCFA0; // @46:11244 CFG3 \lsu_align_result_96_m1_1_0[22] ( .A(un174_shifter_result_1_i[5]), .B(N_2122_i), .C(lsu_align_result_78_Z[22]), .Y(lsu_align_result_96_m1_1_0_Z[22]) ); defparam \lsu_align_result_96_m1_1_0[22] .INIT=8'hB8; CFG3 \lsu_align_result_96_RNO[23] ( .A(shifter_unit_op_sel[0]), .B(lsu_align_result_96_m1_2_Z[23]), .C(lsu_align_result_96_m1_2_0_Z[23]), .Y(lsu_align_result_96_m1[23]) ); defparam \lsu_align_result_96_RNO[23] .INIT=8'hE4; // @46:11244 CFG4 \lsu_align_result_96_m1_2_0[23] ( .A(exu_shifter_operand[23]), .B(exu_shifter_operand[31]), .C(N_2122_i), .D(lsu_align_result_96_m1_1_0_Z[23]), .Y(lsu_align_result_96_m1_2_0_Z[23]) ); defparam \lsu_align_result_96_m1_2_0[23] .INIT=16'hCFA0; // @46:11244 CFG3 \lsu_align_result_96_m1_1_0[23] ( .A(un174_shifter_result_1_i[5]), .B(N_2122_i), .C(lsu_align_result_78_Z[23]), .Y(lsu_align_result_96_m1_1_0_Z[23]) ); defparam \lsu_align_result_96_m1_1_0[23] .INIT=8'hB8; CFG3 \lsu_align_result_96_RNO[24] ( .A(shifter_unit_op_sel[0]), .B(lsu_align_result_96_m1_2_Z[24]), .C(lsu_align_result_96_m1_2_0_Z[24]), .Y(lsu_align_result_96_m1[24]) ); defparam \lsu_align_result_96_RNO[24] .INIT=8'hE4; // @46:11244 CFG4 \lsu_align_result_96_m1_2_0[24] ( .A(exu_shifter_operand[24]), .B(exu_shifter_operand[31]), .C(N_2122_i), .D(lsu_align_result_96_m1_1_0_Z[24]), .Y(lsu_align_result_96_m1_2_0_Z[24]) ); defparam \lsu_align_result_96_m1_2_0[24] .INIT=16'hCFA0; // @46:11244 CFG3 \lsu_align_result_96_m1_1_0[24] ( .A(un174_shifter_result_1_i[5]), .B(N_2122_i), .C(lsu_align_result_78_Z[24]), .Y(lsu_align_result_96_m1_1_0_Z[24]) ); defparam \lsu_align_result_96_m1_1_0[24] .INIT=8'hB8; CFG3 \lsu_align_result_96_RNO[25] ( .A(shifter_unit_op_sel[0]), .B(lsu_align_result_96_m1_2_Z[25]), .C(lsu_align_result_96_m1_2_0_Z[25]), .Y(lsu_align_result_96_m1[25]) ); defparam \lsu_align_result_96_RNO[25] .INIT=8'hE4; // @46:11244 CFG4 \lsu_align_result_96_m1_2_0[25] ( .A(exu_shifter_operand[25]), .B(exu_shifter_operand[31]), .C(N_2122_i), .D(lsu_align_result_96_m1_1_0_Z[25]), .Y(lsu_align_result_96_m1_2_0_Z[25]) ); defparam \lsu_align_result_96_m1_2_0[25] .INIT=16'hCFA0; // @46:11244 CFG3 \lsu_align_result_96_m1_1_0[25] ( .A(un174_shifter_result_1_i[5]), .B(N_2122_i), .C(lsu_align_result_78_Z[25]), .Y(lsu_align_result_96_m1_1_0_Z[25]) ); defparam \lsu_align_result_96_m1_1_0[25] .INIT=8'hB8; CFG3 \lsu_align_result_96_RNO[26] ( .A(shifter_unit_op_sel[0]), .B(lsu_align_result_96_m1_2_Z[26]), .C(lsu_align_result_96_m1_2_0_Z[26]), .Y(lsu_align_result_96_m1[26]) ); defparam \lsu_align_result_96_RNO[26] .INIT=8'hE4; // @46:11244 CFG4 \lsu_align_result_96_m1_2_0[26] ( .A(exu_shifter_operand[26]), .B(exu_shifter_operand[31]), .C(N_2122_i), .D(lsu_align_result_96_m1_1_0_Z[26]), .Y(lsu_align_result_96_m1_2_0_Z[26]) ); defparam \lsu_align_result_96_m1_2_0[26] .INIT=16'hCFA0; // @46:11244 CFG3 \lsu_align_result_96_m1_1_0[26] ( .A(un174_shifter_result_1_i[5]), .B(N_2122_i), .C(lsu_align_result_78_Z[26]), .Y(lsu_align_result_96_m1_1_0_Z[26]) ); defparam \lsu_align_result_96_m1_1_0[26] .INIT=8'hB8; CFG3 \lsu_align_result_96_RNO[29] ( .A(shifter_unit_op_sel[0]), .B(lsu_align_result_96_m1_2_Z[29]), .C(lsu_align_result_96_m1_2_0_Z[29]), .Y(lsu_align_result_96_m1[29]) ); defparam \lsu_align_result_96_RNO[29] .INIT=8'hE4; // @46:11244 CFG4 \lsu_align_result_96_m1_2_0[29] ( .A(exu_shifter_operand[29]), .B(exu_shifter_operand[31]), .C(N_2122_i), .D(lsu_align_result_96_m1_1_0_Z[29]), .Y(lsu_align_result_96_m1_2_0_Z[29]) ); defparam \lsu_align_result_96_m1_2_0[29] .INIT=16'hCFA0; // @46:11244 CFG3 \lsu_align_result_96_m1_1_0[29] ( .A(un174_shifter_result_1_i[5]), .B(N_2122_i), .C(lsu_align_result_78_Z[29]), .Y(lsu_align_result_96_m1_1_0_Z[29]) ); defparam \lsu_align_result_96_m1_1_0[29] .INIT=8'hB8; CFG3 \lsu_align_result_96_RNO[30] ( .A(shifter_unit_op_sel[0]), .B(lsu_align_result_96_m1_2_Z[30]), .C(lsu_align_result_96_m1_2_0_Z[30]), .Y(lsu_align_result_96_m1[30]) ); defparam \lsu_align_result_96_RNO[30] .INIT=8'hE4; // @46:11244 CFG4 \lsu_align_result_96_m1_2_0[30] ( .A(exu_shifter_operand[30]), .B(exu_shifter_operand[31]), .C(N_2122_i), .D(lsu_align_result_96_m1_1_0_Z[30]), .Y(lsu_align_result_96_m1_2_0_Z[30]) ); defparam \lsu_align_result_96_m1_2_0[30] .INIT=16'hCFA0; // @46:11244 CFG3 \lsu_align_result_96_m1_1_0[30] ( .A(N_2122_i), .B(exu_shifter_operand[31]), .C(un174_shifter_result_1_i[5]), .Y(lsu_align_result_96_m1_1_0_Z[30]) ); defparam \lsu_align_result_96_m1_1_0[30] .INIT=8'hE4; CFG3 \lsu_align_result_96_RNO[27] ( .A(shifter_unit_op_sel[0]), .B(lsu_align_result_96_m1_2_Z[27]), .C(lsu_align_result_96_m1_2_0_Z[27]), .Y(lsu_align_result_96_m1[27]) ); defparam \lsu_align_result_96_RNO[27] .INIT=8'hE4; // @46:11244 CFG4 \lsu_align_result_96_m1_2_0[27] ( .A(exu_shifter_operand[27]), .B(exu_shifter_operand[31]), .C(N_2122_i), .D(lsu_align_result_96_m1_1_0_Z[27]), .Y(lsu_align_result_96_m1_2_0_Z[27]) ); defparam \lsu_align_result_96_m1_2_0[27] .INIT=16'hCFA0; // @46:11244 CFG3 \lsu_align_result_96_m1_1_0[27] ( .A(un174_shifter_result_1_i[5]), .B(N_2122_i), .C(lsu_align_result_78_Z[27]), .Y(lsu_align_result_96_m1_1_0_Z[27]) ); defparam \lsu_align_result_96_m1_1_0[27] .INIT=8'hB8; CFG3 \lsu_align_result_96_RNO[28] ( .A(shifter_unit_op_sel[0]), .B(lsu_align_result_96_m1_2_Z[28]), .C(lsu_align_result_96_m1_2_0_Z[28]), .Y(lsu_align_result_96_m1[28]) ); defparam \lsu_align_result_96_RNO[28] .INIT=8'hE4; // @46:11244 CFG4 \lsu_align_result_96_m1_2_0[28] ( .A(exu_shifter_operand[28]), .B(exu_shifter_operand[31]), .C(N_2122_i), .D(lsu_align_result_96_m1_1_0_Z[28]), .Y(lsu_align_result_96_m1_2_0_Z[28]) ); defparam \lsu_align_result_96_m1_2_0[28] .INIT=16'hCFA0; // @46:11244 CFG3 \lsu_align_result_96_m1_1_0[28] ( .A(un174_shifter_result_1_i[5]), .B(N_2122_i), .C(lsu_align_result_78_Z[28]), .Y(lsu_align_result_96_m1_1_0_Z[28]) ); defparam \lsu_align_result_96_m1_1_0[28] .INIT=8'hB8; // @46:11028 CFG3 \exu_alu_result_iv_10_s_0_RNO[0] ( .A(m29_0), .B(exu_m4_0_a2_0_Z), .C(exu_result_reg_int_Z[32]), .Y(exu_m4_0_a2_1) ); defparam \exu_alu_result_iv_10_s_0_RNO[0] .INIT=8'h80; // @46:11282 CFG3 \exu_result_2[25] ( .A(exu_result_sn_N_6_mux), .B(cpu_d_req_wr_data_net[25]), .C(exu_result_mux_sel[1]), .Y(exu_result_2_Z[25]) ); defparam \exu_result_2[25] .INIT=8'h80; // @46:11282 CFG3 \exu_result_2[23] ( .A(exu_result_sn_N_6_mux), .B(cpu_d_req_wr_data_net[23]), .C(exu_result_mux_sel[1]), .Y(exu_result_2_Z[23]) ); defparam \exu_result_2[23] .INIT=8'h80; // @46:11028 CFG4 \exu_alu_result_6_m[24] ( .A(exu_alu_operand0_Z[24]), .B(exu_alu_operand1_Z[24]), .C(un1_alu_op_sel_int), .D(exu_alu_result193_a0_3_Z), .Y(exu_alu_result_6_m_Z[24]) ); defparam \exu_alu_result_6_m[24] .INIT=16'h0600; // @46:11028 CFG2 exu_m4_0_a2_0 ( .A(N_8_i), .B(N_10_i), .Y(exu_m4_0_a2_0_Z) ); defparam exu_m4_0_a2_0.INIT=4'h4; // @46:10828 CFG2 start_m8_a1_0 ( .A(de_ex_pipe_operand1_mux_sel_ex[0]), .B(de_ex_pipe_operand1_mux_sel_ex[1]), .Y(start_m8_a1_0_Z) ); defparam start_m8_a1_0.INIT=4'h1; // @46:11048 CFG2 exu_alu_result193_a0_3_1 ( .A(N_8_i), .B(N_10_i), .Y(exu_alu_result193_a0_3_1_Z) ); defparam exu_alu_result193_a0_3_1.INIT=4'h1; // @46:11062 CFG2 exu_alu_result195_2_3_0 ( .A(N_14_i), .B(N_6_i), .Y(m29_0) ); defparam exu_alu_result195_2_3_0.INIT=4'h4; // @46:10892 CFG2 exu_m2_0_a2_7_0 ( .A(stage_state_ex), .B(de_ex_pipe_gpr_rs1_rd_valid_ex), .Y(d_m5_a0_0) ); defparam exu_m2_0_a2_7_0.INIT=4'h8; // @46:11028 CFG2 exu_alu_operand0_valid_u_RNIIPO2AD ( .A(start_slow_mul), .B(N_14_i), .Y(d_N_3_mux) ); defparam exu_alu_operand0_valid_u_RNIIPO2AD.INIT=4'h2; // @46:11041 CFG2 exu_alu_result192_0_s ( .A(N_4_i), .B(N_14_i), .Y(exu_alu_result192_0_out) ); defparam exu_alu_result192_0_s.INIT=4'h2; // @46:9457 CFG2 div_ack_RNIAS9O01 ( .A(next_div_divisor39), .B(div_ack_Z), .Y(next_quotient_0_sqmuxa) ); defparam div_ack_RNIAS9O01.INIT=4'h2; // @46:11392 CFG2 \next_exu_result_reg_int_3_0[64] ( .A(exu_alu_result_int_Z[32]), .B(un9_next_exu_result_reg_int_i), .Y(N_1529) ); defparam \next_exu_result_reg_int_3_0[64] .INIT=4'h8; // @46:11422 CFG2 \next_div_divisor_5[0] ( .A(div_ack_Z), .B(div_divisor_Z[1]), .Y(next_div_divisor_5_Z[0]) ); defparam \next_div_divisor_5[0] .INIT=4'h8; // @46:11422 CFG2 \next_div_divisor_5[1] ( .A(div_ack_Z), .B(div_divisor_Z[2]), .Y(next_div_divisor_5_Z[1]) ); defparam \next_div_divisor_5[1] .INIT=4'h8; // @46:11422 CFG2 \next_div_divisor_5[2] ( .A(div_ack_Z), .B(div_divisor_Z[3]), .Y(next_div_divisor_5_Z[2]) ); defparam \next_div_divisor_5[2] .INIT=4'h8; // @46:11422 CFG2 \next_div_divisor_5[3] ( .A(div_ack_Z), .B(div_divisor_Z[4]), .Y(next_div_divisor_5_Z[3]) ); defparam \next_div_divisor_5[3] .INIT=4'h8; // @46:11422 CFG2 \next_div_divisor_5[4] ( .A(div_ack_Z), .B(div_divisor_Z[5]), .Y(next_div_divisor_5_Z[4]) ); defparam \next_div_divisor_5[4] .INIT=4'h8; // @46:11422 CFG2 \next_div_divisor_5[5] ( .A(div_ack_Z), .B(div_divisor_Z[6]), .Y(next_div_divisor_5_Z[5]) ); defparam \next_div_divisor_5[5] .INIT=4'h8; // @46:11422 CFG2 \next_div_divisor_5[6] ( .A(div_ack_Z), .B(div_divisor_Z[7]), .Y(next_div_divisor_5_Z[6]) ); defparam \next_div_divisor_5[6] .INIT=4'h8; // @46:11422 CFG2 \next_div_divisor_5[11] ( .A(div_ack_Z), .B(div_divisor_Z[12]), .Y(next_div_divisor_5_Z[11]) ); defparam \next_div_divisor_5[11] .INIT=4'h8; // @46:11422 CFG2 \next_div_divisor_5[12] ( .A(div_ack_Z), .B(div_divisor_Z[13]), .Y(next_div_divisor_5_Z[12]) ); defparam \next_div_divisor_5[12] .INIT=4'h8; // @46:11422 CFG2 \next_div_divisor_5[13] ( .A(div_ack_Z), .B(div_divisor_Z[14]), .Y(next_div_divisor_5_Z[13]) ); defparam \next_div_divisor_5[13] .INIT=4'h8; // @46:11422 CFG2 \next_div_divisor_5[14] ( .A(div_ack_Z), .B(div_divisor_Z[15]), .Y(next_div_divisor_5_Z[14]) ); defparam \next_div_divisor_5[14] .INIT=4'h8; // @46:11422 CFG2 \next_div_divisor_5[15] ( .A(div_ack_Z), .B(div_divisor_Z[16]), .Y(next_div_divisor_5_Z[15]) ); defparam \next_div_divisor_5[15] .INIT=4'h8; // @46:11422 CFG2 \next_div_divisor_5[16] ( .A(div_ack_Z), .B(div_divisor_Z[17]), .Y(next_div_divisor_5_Z[16]) ); defparam \next_div_divisor_5[16] .INIT=4'h8; // @46:11422 CFG2 \next_div_divisor_5[17] ( .A(div_ack_Z), .B(div_divisor_Z[18]), .Y(next_div_divisor_5_Z[17]) ); defparam \next_div_divisor_5[17] .INIT=4'h8; // @46:11422 CFG2 \next_div_divisor_5[18] ( .A(div_ack_Z), .B(div_divisor_Z[19]), .Y(next_div_divisor_5_Z[18]) ); defparam \next_div_divisor_5[18] .INIT=4'h8; // @46:11422 CFG2 \next_div_divisor_5[19] ( .A(div_ack_Z), .B(div_divisor_Z[20]), .Y(next_div_divisor_5_Z[19]) ); defparam \next_div_divisor_5[19] .INIT=4'h8; // @46:11422 CFG2 \next_div_divisor_5[20] ( .A(div_ack_Z), .B(div_divisor_Z[21]), .Y(next_div_divisor_5_Z[20]) ); defparam \next_div_divisor_5[20] .INIT=4'h8; // @46:11422 CFG2 \next_div_divisor_5[21] ( .A(div_ack_Z), .B(div_divisor_Z[22]), .Y(next_div_divisor_5_Z[21]) ); defparam \next_div_divisor_5[21] .INIT=4'h8; // @46:11422 CFG2 \next_div_divisor_5[22] ( .A(div_ack_Z), .B(div_divisor_Z[23]), .Y(next_div_divisor_5_Z[22]) ); defparam \next_div_divisor_5[22] .INIT=4'h8; // @46:11422 CFG2 \next_div_divisor_5[23] ( .A(div_ack_Z), .B(div_divisor_Z[24]), .Y(next_div_divisor_5_Z[23]) ); defparam \next_div_divisor_5[23] .INIT=4'h8; // @46:11422 CFG2 \next_div_divisor_5[25] ( .A(div_ack_Z), .B(div_divisor_Z[26]), .Y(next_div_divisor_5_Z[25]) ); defparam \next_div_divisor_5[25] .INIT=4'h8; // @46:11422 CFG2 \next_div_divisor_5[26] ( .A(div_ack_Z), .B(div_divisor_Z[27]), .Y(next_div_divisor_5_Z[26]) ); defparam \next_div_divisor_5[26] .INIT=4'h8; // @46:11422 CFG2 \next_div_divisor_5[27] ( .A(div_ack_Z), .B(div_divisor_Z[28]), .Y(next_div_divisor_5_Z[27]) ); defparam \next_div_divisor_5[27] .INIT=4'h8; // @46:11422 CFG2 \next_div_divisor_5[28] ( .A(div_ack_Z), .B(div_divisor_Z[29]), .Y(next_div_divisor_5_Z[28]) ); defparam \next_div_divisor_5[28] .INIT=4'h8; // @46:11422 CFG2 \next_div_divisor_5[29] ( .A(div_ack_Z), .B(div_divisor_Z[30]), .Y(next_div_divisor_5_Z[29]) ); defparam \next_div_divisor_5[29] .INIT=4'h8; // @46:11422 CFG2 \next_div_divisor_5[30] ( .A(div_ack_Z), .B(div_divisor_Z[31]), .Y(next_div_divisor_5_Z[30]) ); defparam \next_div_divisor_5[30] .INIT=4'h8; // @46:11383 CFG2 \mul_div_cnt_RNI07I0QD[5] ( .A(next_exu_result_reg_int48), .B(trace_priv_i), .Y(next_exu_result_reg_int_sn_N_2) ); defparam \mul_div_cnt_RNI07I0QD[5] .INIT=4'h1; // @46:10835 CFG2 exu_alu_operand0_int_sn_m3 ( .A(start_slow_mul), .B(N_4_i), .Y(exu_alu_operand0_int_sn_N_4) ); defparam exu_alu_operand0_int_sn_m3.INIT=4'h8; // @46:10835 CFG2 exu_alu_operand0_int_sn_m6_e ( .A(exu_alu_operand0_Z[31]), .B(exu_alu_operand1_Z[31]), .Y(exu_alu_operand0_int_sn_N_9) ); defparam exu_alu_operand0_int_sn_m6_e.INIT=4'h2; // @46:11422 CFG2 \next_div_divisor_5[10] ( .A(div_ack_Z), .B(div_divisor_Z[11]), .Y(next_div_divisor_5_Z[10]) ); defparam \next_div_divisor_5[10] .INIT=4'h8; // @46:11422 CFG2 \next_div_divisor_5[9] ( .A(div_ack_Z), .B(div_divisor_Z[10]), .Y(next_div_divisor_5_Z[9]) ); defparam \next_div_divisor_5[9] .INIT=4'h8; // @46:11422 CFG2 \next_div_divisor_5[8] ( .A(div_ack_Z), .B(div_divisor_Z[9]), .Y(next_div_divisor_5_Z[8]) ); defparam \next_div_divisor_5[8] .INIT=4'h8; // @46:11422 CFG2 \next_div_divisor_5[7] ( .A(div_ack_Z), .B(div_divisor_Z[8]), .Y(next_div_divisor_5_Z[7]) ); defparam \next_div_divisor_5[7] .INIT=4'h8; // @46:11293 CFG2 exu_result_sn_m4 ( .A(exu_result_mux_sel[0]), .B(exu_result_mux_sel[2]), .Y(exu_result_sn_N_6_mux) ); defparam exu_result_sn_m4.INIT=4'h1; // @46:9457 CFG2 \mul_div_cnt_RNIBKIM4D[5] ( .A(start_slow_mul), .B(mul_div_cnt_Z[5]), .Y(un1_alu_op_sel_int) ); defparam \mul_div_cnt_RNIBKIM4D[5] .INIT=4'h2; // @46:11422 CFG2 \next_div_divisor_5[24] ( .A(div_ack_Z), .B(div_divisor_Z[25]), .Y(next_div_divisor_5_Z[24]) ); defparam \next_div_divisor_5[24] .INIT=4'h8; // @46:11232 CFG2 \exu_shifter_places_cnst_0_a4_RNO[3] ( .A(de_ex_pipe_immediate_ex[0]), .B(gpr_rs1_rd_data_sig[0]), .Y(addr_shift_bits[0]) ); defparam \exu_shifter_places_cnst_0_a4_RNO[3] .INIT=4'h6; // @46:11493 CFG2 exu_shifter_places57_RNIJO7A ( .A(exu_shifter_places58_Z), .B(exu_shifter_places57_Z), .Y(exu_shifter_places_sn_N_2) ); defparam exu_shifter_places57_RNIJO7A.INIT=4'h1; // @46:10892 CFG3 \exu_alu_operand0[27] ( .A(de_ex_pipe_curr_pc_ex[27]), .B(de_ex_pipe_operand0_mux_sel_ex_0), .C(gpr_rs1_rd_data_sig[27]), .Y(exu_alu_operand0_Z[27]) ); defparam \exu_alu_operand0[27] .INIT=8'hB8; // @46:10892 CFG3 \exu_alu_operand0[30] ( .A(de_ex_pipe_curr_pc_ex[30]), .B(de_ex_pipe_operand0_mux_sel_ex_0), .C(gpr_rs1_rd_data_sig[30]), .Y(exu_alu_operand0_Z[30]) ); defparam \exu_alu_operand0[30] .INIT=8'hB8; // @46:11395 CFG3 \next_exu_result_reg_int_4[40] ( .A(mul_mp_pmux), .B(exu_alu_result_int_Z[9]), .C(exu_result_reg_int_Z[41]), .Y(next_exu_result_reg_int[40]) ); defparam \next_exu_result_reg_int_4[40] .INIT=8'hD8; // @46:11395 CFG3 \next_exu_result_reg_int_4[51] ( .A(mul_mp_pmux), .B(exu_alu_result_int_Z[20]), .C(exu_result_reg_int_Z[52]), .Y(next_exu_result_reg_int[51]) ); defparam \next_exu_result_reg_int_4[51] .INIT=8'hD8; // @46:11395 CFG3 \next_exu_result_reg_int_4[52] ( .A(mul_mp_pmux), .B(exu_alu_result_int_Z[21]), .C(exu_result_reg_int_Z[53]), .Y(next_exu_result_reg_int[52]) ); defparam \next_exu_result_reg_int_4[52] .INIT=8'hD8; // @46:11395 CFG3 \next_exu_result_reg_int_4[54] ( .A(mul_mp_pmux), .B(exu_alu_result_int_Z[23]), .C(exu_result_reg_int_Z[55]), .Y(next_exu_result_reg_int[54]) ); defparam \next_exu_result_reg_int_4[54] .INIT=8'hD8; // @46:11395 CFG3 \next_exu_result_reg_int_4[55] ( .A(mul_mp_pmux), .B(exu_alu_result_int_Z[24]), .C(exu_result_reg_int_Z[56]), .Y(next_exu_result_reg_int[55]) ); defparam \next_exu_result_reg_int_4[55] .INIT=8'hD8; // @46:11395 CFG3 \next_exu_result_reg_int_4[32] ( .A(exu_alu_result_int_Z[1]), .B(mul_mp_pmux), .C(exu_result_reg_int_Z[33]), .Y(next_exu_result_reg_int[32]) ); defparam \next_exu_result_reg_int_4[32] .INIT=8'hB8; // @46:11395 CFG3 \next_exu_result_reg_int_4[34] ( .A(mul_mp_pmux), .B(exu_alu_result_int_Z[3]), .C(exu_result_reg_int_Z[35]), .Y(next_exu_result_reg_int[34]) ); defparam \next_exu_result_reg_int_4[34] .INIT=8'hD8; // @46:11395 CFG3 \next_exu_result_reg_int_4[35] ( .A(mul_mp_pmux), .B(exu_alu_result_int_Z[4]), .C(exu_result_reg_int_Z[36]), .Y(next_exu_result_reg_int[35]) ); defparam \next_exu_result_reg_int_4[35] .INIT=8'hD8; // @46:11395 CFG3 \next_exu_result_reg_int_4[36] ( .A(mul_mp_pmux), .B(exu_alu_result_int_Z[5]), .C(exu_result_reg_int_Z[37]), .Y(next_exu_result_reg_int[36]) ); defparam \next_exu_result_reg_int_4[36] .INIT=8'hD8; // @46:11395 CFG3 \next_exu_result_reg_int_4[37] ( .A(mul_mp_pmux), .B(exu_alu_result_int_Z[6]), .C(exu_result_reg_int_Z[38]), .Y(next_exu_result_reg_int[37]) ); defparam \next_exu_result_reg_int_4[37] .INIT=8'hD8; // @46:11395 CFG3 \next_exu_result_reg_int_4[38] ( .A(mul_mp_pmux), .B(exu_alu_result_int_Z[7]), .C(exu_result_reg_int_Z[39]), .Y(next_exu_result_reg_int[38]) ); defparam \next_exu_result_reg_int_4[38] .INIT=8'hD8; // @46:11395 CFG3 \next_exu_result_reg_int_4[39] ( .A(mul_mp_pmux), .B(exu_alu_result_int_Z[8]), .C(exu_result_reg_int_Z[40]), .Y(next_exu_result_reg_int[39]) ); defparam \next_exu_result_reg_int_4[39] .INIT=8'hD8; // @46:11395 CFG3 \next_exu_result_reg_int_4[41] ( .A(mul_mp_pmux), .B(exu_alu_result_int_Z[10]), .C(exu_result_reg_int_Z[42]), .Y(next_exu_result_reg_int[41]) ); defparam \next_exu_result_reg_int_4[41] .INIT=8'hD8; // @46:11395 CFG3 \next_exu_result_reg_int_4[42] ( .A(mul_mp_pmux), .B(exu_alu_result_int_Z[11]), .C(exu_result_reg_int_Z[43]), .Y(next_exu_result_reg_int[42]) ); defparam \next_exu_result_reg_int_4[42] .INIT=8'hD8; // @46:11395 CFG3 \next_exu_result_reg_int_4[43] ( .A(mul_mp_pmux), .B(exu_alu_result_int_Z[12]), .C(exu_result_reg_int_Z[44]), .Y(next_exu_result_reg_int[43]) ); defparam \next_exu_result_reg_int_4[43] .INIT=8'hD8; // @46:11395 CFG3 \next_exu_result_reg_int_4[44] ( .A(mul_mp_pmux), .B(exu_alu_result_int_Z[13]), .C(exu_result_reg_int_Z[45]), .Y(next_exu_result_reg_int[44]) ); defparam \next_exu_result_reg_int_4[44] .INIT=8'hD8; // @46:11395 CFG3 \next_exu_result_reg_int_4[45] ( .A(mul_mp_pmux), .B(exu_alu_result_int_Z[14]), .C(exu_result_reg_int_Z[46]), .Y(next_exu_result_reg_int[45]) ); defparam \next_exu_result_reg_int_4[45] .INIT=8'hD8; // @46:11395 CFG3 \next_exu_result_reg_int_4[46] ( .A(mul_mp_pmux), .B(exu_alu_result_int_Z[15]), .C(exu_result_reg_int_Z[47]), .Y(next_exu_result_reg_int[46]) ); defparam \next_exu_result_reg_int_4[46] .INIT=8'hD8; // @46:11395 CFG3 \next_exu_result_reg_int_4[48] ( .A(mul_mp_pmux), .B(exu_alu_result_int_Z[17]), .C(exu_result_reg_int_Z[49]), .Y(next_exu_result_reg_int[48]) ); defparam \next_exu_result_reg_int_4[48] .INIT=8'hD8; // @46:11395 CFG3 \next_exu_result_reg_int_4[53] ( .A(mul_mp_pmux), .B(exu_alu_result_int_Z[22]), .C(exu_result_reg_int_Z[54]), .Y(next_exu_result_reg_int[53]) ); defparam \next_exu_result_reg_int_4[53] .INIT=8'hD8; // @46:11395 CFG3 \next_exu_result_reg_int_4[56] ( .A(mul_mp_pmux), .B(exu_alu_result_int_Z[25]), .C(exu_result_reg_int_Z[57]), .Y(next_exu_result_reg_int[56]) ); defparam \next_exu_result_reg_int_4[56] .INIT=8'hD8; // @46:11395 CFG3 \next_exu_result_reg_int_4[57] ( .A(mul_mp_pmux), .B(exu_alu_result_int_Z[26]), .C(exu_result_reg_int_Z[58]), .Y(next_exu_result_reg_int[57]) ); defparam \next_exu_result_reg_int_4[57] .INIT=8'hD8; // @46:11395 CFG3 \next_exu_result_reg_int_4[58] ( .A(mul_mp_pmux), .B(exu_alu_result_int_Z[27]), .C(exu_result_reg_int_Z[59]), .Y(next_exu_result_reg_int[58]) ); defparam \next_exu_result_reg_int_4[58] .INIT=8'hD8; // @46:11395 CFG3 \next_exu_result_reg_int_4[60] ( .A(mul_mp_pmux), .B(exu_alu_result_int_Z[29]), .C(exu_result_reg_int_Z[61]), .Y(next_exu_result_reg_int[60]) ); defparam \next_exu_result_reg_int_4[60] .INIT=8'hD8; // @46:11395 CFG3 \next_exu_result_reg_int_4[61] ( .A(mul_mp_pmux), .B(exu_alu_result_int_Z[30]), .C(exu_result_reg_int_Z[62]), .Y(next_exu_result_reg_int[61]) ); defparam \next_exu_result_reg_int_4[61] .INIT=8'hD8; // @46:11395 CFG3 \next_exu_result_reg_int_4[63] ( .A(mul_mp_pmux), .B(exu_alu_result_int_Z[32]), .C(exu_result_reg_int_Z[64]), .Y(next_exu_result_reg_int[63]) ); defparam \next_exu_result_reg_int_4[63] .INIT=8'hD8; // @46:10892 CFG3 \exu_alu_operand0[4] ( .A(de_ex_pipe_curr_pc_ex[4]), .B(de_ex_pipe_operand0_mux_sel_ex_0), .C(gpr_rs1_rd_data_sig[4]), .Y(exu_alu_operand0_Z[4]) ); defparam \exu_alu_operand0[4] .INIT=8'hB8; // @46:10892 CFG3 \exu_alu_operand0[19] ( .A(de_ex_pipe_curr_pc_ex[19]), .B(de_ex_pipe_operand0_mux_sel_ex_0), .C(gpr_rs1_rd_data_sig[19]), .Y(exu_alu_operand0_Z[19]) ); defparam \exu_alu_operand0[19] .INIT=8'hB8; // @46:10892 CFG3 \exu_alu_operand0[31] ( .A(de_ex_pipe_curr_pc_ex[31]), .B(de_ex_pipe_operand0_mux_sel_ex_0), .C(gpr_rs1_rd_data_sig[31]), .Y(exu_alu_operand0_Z[31]) ); defparam \exu_alu_operand0[31] .INIT=8'hB8; // @46:10867 CFG3 \exu_alu_result_26_1[27] ( .A(quotient_Z[27]), .B(dividend_Z[27]), .C(N_4_i), .Y(N_1279) ); defparam \exu_alu_result_26_1[27] .INIT=8'hCA; // @46:10867 CFG3 \exu_alu_result_26_1[26] ( .A(quotient_Z[26]), .B(dividend_Z[26]), .C(N_4_i), .Y(N_1278) ); defparam \exu_alu_result_26_1[26] .INIT=8'hCA; // @46:10867 CFG3 \exu_alu_result_26_1[24] ( .A(quotient_Z[24]), .B(dividend_Z[24]), .C(N_4_i), .Y(N_1276) ); defparam \exu_alu_result_26_1[24] .INIT=8'hCA; // @46:10867 CFG3 \exu_alu_result_26_1[20] ( .A(quotient_Z[20]), .B(dividend_Z[20]), .C(N_4_i), .Y(N_1272) ); defparam \exu_alu_result_26_1[20] .INIT=8'hCA; // @46:10867 CFG3 \exu_alu_result_26_1[15] ( .A(quotient_Z[15]), .B(dividend_Z[15]), .C(N_4_i), .Y(N_1267) ); defparam \exu_alu_result_26_1[15] .INIT=8'hCA; // @46:10867 CFG3 \exu_alu_result_26_1[7] ( .A(quotient_Z[7]), .B(dividend_Z[7]), .C(N_4_i), .Y(N_1257) ); defparam \exu_alu_result_26_1[7] .INIT=8'hCA; // @46:10892 CFG3 \exu_alu_operand0[3] ( .A(de_ex_pipe_curr_pc_ex[3]), .B(de_ex_pipe_operand0_mux_sel_ex_0), .C(gpr_rs1_rd_data_sig[3]), .Y(exu_alu_operand0_Z[3]) ); defparam \exu_alu_operand0[3] .INIT=8'hB8; // @46:10892 CFG3 \exu_alu_operand0[5] ( .A(de_ex_pipe_curr_pc_ex[5]), .B(de_ex_pipe_operand0_mux_sel_ex_0), .C(gpr_rs1_rd_data_sig[5]), .Y(exu_alu_operand0_Z[5]) ); defparam \exu_alu_operand0[5] .INIT=8'hB8; // @46:10892 CFG3 \exu_alu_operand0[6] ( .A(de_ex_pipe_curr_pc_ex[6]), .B(de_ex_pipe_operand0_mux_sel_ex_0), .C(gpr_rs1_rd_data_sig[6]), .Y(exu_alu_operand0_Z[6]) ); defparam \exu_alu_operand0[6] .INIT=8'hB8; // @46:10892 CFG3 \exu_alu_operand0[7] ( .A(de_ex_pipe_curr_pc_ex[7]), .B(de_ex_pipe_operand0_mux_sel_ex_0), .C(gpr_rs1_rd_data_sig[7]), .Y(exu_alu_operand0_Z[7]) ); defparam \exu_alu_operand0[7] .INIT=8'hB8; // @46:10892 CFG3 \exu_alu_operand0[8] ( .A(de_ex_pipe_curr_pc_ex[8]), .B(de_ex_pipe_operand0_mux_sel_ex_0), .C(gpr_rs1_rd_data_sig[8]), .Y(exu_alu_operand0_Z[8]) ); defparam \exu_alu_operand0[8] .INIT=8'hB8; // @46:10892 CFG3 \exu_alu_operand0[9] ( .A(de_ex_pipe_curr_pc_ex[9]), .B(de_ex_pipe_operand0_mux_sel_ex_0), .C(gpr_rs1_rd_data_sig[9]), .Y(exu_alu_operand0_Z[9]) ); defparam \exu_alu_operand0[9] .INIT=8'hB8; // @46:10892 CFG3 \exu_alu_operand0[10] ( .A(de_ex_pipe_curr_pc_ex[10]), .B(de_ex_pipe_operand0_mux_sel_ex_0), .C(gpr_rs1_rd_data_sig[10]), .Y(exu_alu_operand0_Z[10]) ); defparam \exu_alu_operand0[10] .INIT=8'hB8; // @46:10892 CFG3 \exu_alu_operand0[11] ( .A(de_ex_pipe_curr_pc_ex[11]), .B(de_ex_pipe_operand0_mux_sel_ex_0), .C(gpr_rs1_rd_data_sig[11]), .Y(exu_alu_operand0_Z[11]) ); defparam \exu_alu_operand0[11] .INIT=8'hB8; // @46:10892 CFG3 \exu_alu_operand0[12] ( .A(de_ex_pipe_curr_pc_ex[12]), .B(de_ex_pipe_operand0_mux_sel_ex_0), .C(gpr_rs1_rd_data_sig[12]), .Y(exu_alu_operand0_Z[12]) ); defparam \exu_alu_operand0[12] .INIT=8'hB8; // @46:10892 CFG3 \exu_alu_operand0[13] ( .A(de_ex_pipe_curr_pc_ex[13]), .B(de_ex_pipe_operand0_mux_sel_ex_0), .C(gpr_rs1_rd_data_sig[13]), .Y(exu_alu_operand0_Z[13]) ); defparam \exu_alu_operand0[13] .INIT=8'hB8; // @46:10892 CFG3 \exu_alu_operand0[14] ( .A(de_ex_pipe_curr_pc_ex[14]), .B(de_ex_pipe_operand0_mux_sel_ex_0), .C(gpr_rs1_rd_data_sig[14]), .Y(exu_alu_operand0_Z[14]) ); defparam \exu_alu_operand0[14] .INIT=8'hB8; // @46:10892 CFG3 \exu_alu_operand0[15] ( .A(de_ex_pipe_curr_pc_ex[15]), .B(de_ex_pipe_operand0_mux_sel_ex_0), .C(gpr_rs1_rd_data_sig[15]), .Y(exu_alu_operand0_Z[15]) ); defparam \exu_alu_operand0[15] .INIT=8'hB8; // @46:10892 CFG3 \exu_alu_operand0[17] ( .A(de_ex_pipe_curr_pc_ex[17]), .B(de_ex_pipe_operand0_mux_sel_ex_0), .C(gpr_rs1_rd_data_sig[17]), .Y(exu_alu_operand0_Z[17]) ); defparam \exu_alu_operand0[17] .INIT=8'hB8; // @46:10892 CFG3 \exu_alu_operand0[18] ( .A(de_ex_pipe_curr_pc_ex[18]), .B(de_ex_pipe_operand0_mux_sel_ex_0), .C(gpr_rs1_rd_data_sig[18]), .Y(exu_alu_operand0_Z[18]) ); defparam \exu_alu_operand0[18] .INIT=8'hB8; // @46:10892 CFG3 \exu_alu_operand0[20] ( .A(de_ex_pipe_curr_pc_ex[20]), .B(de_ex_pipe_operand0_mux_sel_ex_0), .C(gpr_rs1_rd_data_sig[20]), .Y(exu_alu_operand0_Z[20]) ); defparam \exu_alu_operand0[20] .INIT=8'hB8; // @46:10892 CFG3 \exu_alu_operand0[21] ( .A(de_ex_pipe_curr_pc_ex[21]), .B(de_ex_pipe_operand0_mux_sel_ex_0), .C(gpr_rs1_rd_data_sig[21]), .Y(exu_alu_operand0_Z[21]) ); defparam \exu_alu_operand0[21] .INIT=8'hB8; // @46:10892 CFG3 \exu_alu_operand0[23] ( .A(de_ex_pipe_curr_pc_ex[23]), .B(de_ex_pipe_operand0_mux_sel_ex_0), .C(gpr_rs1_rd_data_sig[23]), .Y(exu_alu_operand0_Z[23]) ); defparam \exu_alu_operand0[23] .INIT=8'hB8; // @46:10892 CFG3 \exu_alu_operand0[24] ( .A(de_ex_pipe_curr_pc_ex[24]), .B(de_ex_pipe_operand0_mux_sel_ex_0), .C(gpr_rs1_rd_data_sig[24]), .Y(exu_alu_operand0_Z[24]) ); defparam \exu_alu_operand0[24] .INIT=8'hB8; // @46:10892 CFG3 \exu_alu_operand0[25] ( .A(de_ex_pipe_curr_pc_ex[25]), .B(de_ex_pipe_operand0_mux_sel_ex_0), .C(gpr_rs1_rd_data_sig[25]), .Y(exu_alu_operand0_Z[25]) ); defparam \exu_alu_operand0[25] .INIT=8'hB8; // @46:10892 CFG3 \exu_alu_operand0[26] ( .A(de_ex_pipe_curr_pc_ex[26]), .B(de_ex_pipe_operand0_mux_sel_ex_0), .C(gpr_rs1_rd_data_sig[26]), .Y(exu_alu_operand0_Z[26]) ); defparam \exu_alu_operand0[26] .INIT=8'hB8; // @46:10892 CFG3 \exu_alu_operand0[29] ( .A(de_ex_pipe_curr_pc_ex[29]), .B(de_ex_pipe_operand0_mux_sel_ex_0), .C(gpr_rs1_rd_data_sig[29]), .Y(exu_alu_operand0_Z[29]) ); defparam \exu_alu_operand0[29] .INIT=8'hB8; // @46:11395 CFG3 \next_exu_result_reg_int_4[50] ( .A(mul_mp_pmux), .B(exu_alu_result_int_Z[19]), .C(exu_result_reg_int_Z[51]), .Y(next_exu_result_reg_int[50]) ); defparam \next_exu_result_reg_int_4[50] .INIT=8'hD8; // @46:10867 CFG3 \exu_alu_result_26_1[18] ( .A(quotient_Z[18]), .B(dividend_Z[18]), .C(N_4_i), .Y(N_1270) ); defparam \exu_alu_result_26_1[18] .INIT=8'hCA; // @46:10867 CFG3 \exu_alu_result_26_1[19] ( .A(quotient_Z[19]), .B(dividend_Z[19]), .C(N_4_i), .Y(N_1271) ); defparam \exu_alu_result_26_1[19] .INIT=8'hCA; // @46:11395 CFG3 \next_exu_result_reg_int_4[49] ( .A(mul_mp_pmux), .B(exu_alu_result_int_Z[18]), .C(exu_result_reg_int_Z[50]), .Y(next_exu_result_reg_int[49]) ); defparam \next_exu_result_reg_int_4[49] .INIT=8'hD8; // @46:10892 CFG3 \exu_alu_operand0[22] ( .A(de_ex_pipe_curr_pc_ex[22]), .B(de_ex_pipe_operand0_mux_sel_ex_0), .C(gpr_rs1_rd_data_sig[22]), .Y(exu_alu_operand0_Z[22]) ); defparam \exu_alu_operand0[22] .INIT=8'hB8; // @46:10867 CFG3 \exu_alu_result_26_1[3] ( .A(quotient_Z[3]), .B(dividend_Z[3]), .C(N_4_i), .Y(N_1253) ); defparam \exu_alu_result_26_1[3] .INIT=8'hCA; // @46:10867 CFG3 \exu_alu_result_26_1[4] ( .A(quotient_Z[4]), .B(dividend_Z[4]), .C(N_4_i), .Y(N_1254) ); defparam \exu_alu_result_26_1[4] .INIT=8'hCA; // @46:10867 CFG3 \exu_alu_result_26_1[5] ( .A(quotient_Z[5]), .B(dividend_Z[5]), .C(N_4_i), .Y(N_1255) ); defparam \exu_alu_result_26_1[5] .INIT=8'hCA; // @46:10867 CFG3 \exu_alu_result_26_1[8] ( .A(quotient_Z[8]), .B(dividend_Z[8]), .C(N_4_i), .Y(N_1258) ); defparam \exu_alu_result_26_1[8] .INIT=8'hCA; // @46:10867 CFG3 \exu_alu_result_26_1[9] ( .A(quotient_Z[9]), .B(dividend_Z[9]), .C(N_4_i), .Y(N_1261) ); defparam \exu_alu_result_26_1[9] .INIT=8'hCA; // @46:10867 CFG3 \exu_alu_result_26_1[11] ( .A(quotient_Z[11]), .B(dividend_Z[11]), .C(N_4_i), .Y(N_1263) ); defparam \exu_alu_result_26_1[11] .INIT=8'hCA; // @46:10867 CFG3 \exu_alu_result_26_1[12] ( .A(quotient_Z[12]), .B(dividend_Z[12]), .C(N_4_i), .Y(N_1264) ); defparam \exu_alu_result_26_1[12] .INIT=8'hCA; // @46:10867 CFG3 \exu_alu_result_26_1[13] ( .A(quotient_Z[13]), .B(dividend_Z[13]), .C(N_4_i), .Y(N_1265) ); defparam \exu_alu_result_26_1[13] .INIT=8'hCA; // @46:10867 CFG3 \exu_alu_result_26_1[14] ( .A(quotient_Z[14]), .B(dividend_Z[14]), .C(N_4_i), .Y(N_1266) ); defparam \exu_alu_result_26_1[14] .INIT=8'hCA; // @46:10867 CFG3 \exu_alu_result_26_1[17] ( .A(quotient_Z[17]), .B(dividend_Z[17]), .C(N_4_i), .Y(N_1269) ); defparam \exu_alu_result_26_1[17] .INIT=8'hCA; // @46:10867 CFG3 \exu_alu_result_26_1[21] ( .A(quotient_Z[21]), .B(dividend_Z[21]), .C(N_4_i), .Y(exu_alu_result_26_1_Z[21]) ); defparam \exu_alu_result_26_1[21] .INIT=8'hCA; // @46:10867 CFG3 \exu_alu_result_26_1[23] ( .A(quotient_Z[23]), .B(dividend_Z[23]), .C(N_4_i), .Y(N_1275) ); defparam \exu_alu_result_26_1[23] .INIT=8'hCA; // @46:10867 CFG3 \exu_alu_result_26_1[25] ( .A(quotient_Z[25]), .B(dividend_Z[25]), .C(N_4_i), .Y(N_1277) ); defparam \exu_alu_result_26_1[25] .INIT=8'hCA; // @46:10867 CFG3 \exu_alu_result_26_1[29] ( .A(quotient_Z[29]), .B(dividend_Z[29]), .C(N_4_i), .Y(N_1281) ); defparam \exu_alu_result_26_1[29] .INIT=8'hCA; // @46:10867 CFG3 \exu_alu_result_26_1[30] ( .A(quotient_Z[30]), .B(dividend_Z[30]), .C(N_4_i), .Y(N_1282) ); defparam \exu_alu_result_26_1[30] .INIT=8'hCA; // @46:10867 CFG3 \exu_alu_result_26_1[31] ( .A(quotient_Z[31]), .B(dividend_Z[31]), .C(N_4_i), .Y(N_1283) ); defparam \exu_alu_result_26_1[31] .INIT=8'hCA; // @46:11383 CFG3 \next_exu_result_reg_int_0[2] ( .A(cpu_debug_op_wr_data_net[2]), .B(ex_retr_pipe_exu_result_retr[3]), .C(trace_priv_i), .Y(N_1324) ); defparam \next_exu_result_reg_int_0[2] .INIT=8'hAC; // @46:11383 CFG3 \next_exu_result_reg_int_0[3] ( .A(cpu_debug_op_wr_data_net[3]), .B(ex_retr_pipe_exu_result_retr[4]), .C(trace_priv_i), .Y(N_1325) ); defparam \next_exu_result_reg_int_0[3] .INIT=8'hAC; // @46:11383 CFG3 \next_exu_result_reg_int_0[4] ( .A(cpu_debug_op_wr_data_net[4]), .B(ex_retr_pipe_exu_result_retr[5]), .C(trace_priv_i), .Y(N_1326) ); defparam \next_exu_result_reg_int_0[4] .INIT=8'hAC; // @46:11383 CFG3 \next_exu_result_reg_int_0[5] ( .A(cpu_debug_op_wr_data_net[5]), .B(ex_retr_pipe_exu_result_retr[6]), .C(trace_priv_i), .Y(N_1327) ); defparam \next_exu_result_reg_int_0[5] .INIT=8'hAC; // @46:11383 CFG3 \next_exu_result_reg_int_0[6] ( .A(cpu_debug_op_wr_data_net[6]), .B(ex_retr_pipe_exu_result_retr[7]), .C(trace_priv_i), .Y(N_1328) ); defparam \next_exu_result_reg_int_0[6] .INIT=8'hAC; // @46:11383 CFG3 \next_exu_result_reg_int_0[7] ( .A(cpu_debug_op_wr_data_net[7]), .B(ex_retr_pipe_exu_result_retr[8]), .C(trace_priv_i), .Y(N_1329) ); defparam \next_exu_result_reg_int_0[7] .INIT=8'hAC; // @46:11383 CFG3 \next_exu_result_reg_int_0[8] ( .A(cpu_debug_op_wr_data_net[8]), .B(ex_retr_pipe_exu_result_retr[9]), .C(trace_priv_i), .Y(N_1330) ); defparam \next_exu_result_reg_int_0[8] .INIT=8'hAC; // @46:11383 CFG3 \next_exu_result_reg_int_0[9] ( .A(cpu_debug_op_wr_data_net[9]), .B(ex_retr_pipe_exu_result_retr[10]), .C(trace_priv_i), .Y(N_1331) ); defparam \next_exu_result_reg_int_0[9] .INIT=8'hAC; // @46:11383 CFG3 \next_exu_result_reg_int_0[10] ( .A(cpu_debug_op_wr_data_net[10]), .B(ex_retr_pipe_exu_result_retr[11]), .C(trace_priv_i), .Y(N_1332) ); defparam \next_exu_result_reg_int_0[10] .INIT=8'hAC; // @46:11383 CFG3 \next_exu_result_reg_int_0[11] ( .A(cpu_debug_op_wr_data_net[11]), .B(ex_retr_pipe_exu_result_retr[12]), .C(trace_priv_i), .Y(N_1333) ); defparam \next_exu_result_reg_int_0[11] .INIT=8'hAC; // @46:11383 CFG3 \next_exu_result_reg_int_0[12] ( .A(cpu_debug_op_wr_data_net[12]), .B(ex_retr_pipe_exu_result_retr[13]), .C(trace_priv_i), .Y(N_1334) ); defparam \next_exu_result_reg_int_0[12] .INIT=8'hAC; // @46:11383 CFG3 \next_exu_result_reg_int_0[14] ( .A(cpu_debug_op_wr_data_net[14]), .B(ex_retr_pipe_exu_result_retr[15]), .C(trace_priv_i), .Y(N_1336) ); defparam \next_exu_result_reg_int_0[14] .INIT=8'hAC; // @46:11383 CFG3 \next_exu_result_reg_int_0[15] ( .A(cpu_debug_op_wr_data_net[15]), .B(ex_retr_pipe_exu_result_retr[16]), .C(trace_priv_i), .Y(N_1337) ); defparam \next_exu_result_reg_int_0[15] .INIT=8'hAC; // @46:11383 CFG3 \next_exu_result_reg_int_0[17] ( .A(cpu_debug_op_wr_data_net[17]), .B(ex_retr_pipe_exu_result_retr[18]), .C(trace_priv_i), .Y(N_1339) ); defparam \next_exu_result_reg_int_0[17] .INIT=8'hAC; // @46:11383 CFG3 \next_exu_result_reg_int_0[18] ( .A(cpu_debug_op_wr_data_net[18]), .B(ex_retr_pipe_exu_result_retr[19]), .C(trace_priv_i), .Y(N_1340) ); defparam \next_exu_result_reg_int_0[18] .INIT=8'hAC; // @46:11383 CFG3 \next_exu_result_reg_int_0[19] ( .A(cpu_debug_op_wr_data_net[19]), .B(ex_retr_pipe_exu_result_retr[20]), .C(trace_priv_i), .Y(N_1341) ); defparam \next_exu_result_reg_int_0[19] .INIT=8'hAC; // @46:11383 CFG3 \next_exu_result_reg_int_0[20] ( .A(cpu_debug_op_wr_data_net[20]), .B(ex_retr_pipe_exu_result_retr[21]), .C(trace_priv_i), .Y(N_1342) ); defparam \next_exu_result_reg_int_0[20] .INIT=8'hAC; // @46:11383 CFG3 \next_exu_result_reg_int_0[21] ( .A(cpu_debug_op_wr_data_net[21]), .B(ex_retr_pipe_exu_result_retr[22]), .C(trace_priv_i), .Y(N_1343) ); defparam \next_exu_result_reg_int_0[21] .INIT=8'hAC; // @46:11383 CFG3 \next_exu_result_reg_int_0[22] ( .A(cpu_debug_op_wr_data_net[22]), .B(ex_retr_pipe_exu_result_retr[23]), .C(trace_priv_i), .Y(N_1344) ); defparam \next_exu_result_reg_int_0[22] .INIT=8'hAC; // @46:11383 CFG3 \next_exu_result_reg_int_0[23] ( .A(cpu_debug_op_wr_data_net[23]), .B(ex_retr_pipe_exu_result_retr[24]), .C(trace_priv_i), .Y(N_1345) ); defparam \next_exu_result_reg_int_0[23] .INIT=8'hAC; // @46:11383 CFG3 \next_exu_result_reg_int_0[24] ( .A(cpu_debug_op_wr_data_net[24]), .B(ex_retr_pipe_exu_result_retr[25]), .C(trace_priv_i), .Y(N_1346) ); defparam \next_exu_result_reg_int_0[24] .INIT=8'hAC; // @46:11383 CFG3 \next_exu_result_reg_int_0[25] ( .A(cpu_debug_op_wr_data_net[25]), .B(ex_retr_pipe_exu_result_retr[26]), .C(trace_priv_i), .Y(N_1347) ); defparam \next_exu_result_reg_int_0[25] .INIT=8'hAC; // @46:11383 CFG3 \next_exu_result_reg_int_0[26] ( .A(cpu_debug_op_wr_data_net[26]), .B(ex_retr_pipe_exu_result_retr[27]), .C(trace_priv_i), .Y(N_1348) ); defparam \next_exu_result_reg_int_0[26] .INIT=8'hAC; // @46:11383 CFG3 \next_exu_result_reg_int_0[27] ( .A(cpu_debug_op_wr_data_net[27]), .B(ex_retr_pipe_exu_result_retr[28]), .C(trace_priv_i), .Y(N_1349) ); defparam \next_exu_result_reg_int_0[27] .INIT=8'hAC; // @46:11383 CFG3 \next_exu_result_reg_int_0[29] ( .A(cpu_debug_op_wr_data_net[29]), .B(ex_retr_pipe_exu_result_retr[30]), .C(trace_priv_i), .Y(N_1351) ); defparam \next_exu_result_reg_int_0[29] .INIT=8'hAC; // @46:11383 CFG3 \next_exu_result_reg_int_0[30] ( .A(cpu_debug_op_wr_data_net[30]), .B(ex_retr_pipe_exu_result_retr[31]), .C(trace_priv_i), .Y(N_1352) ); defparam \next_exu_result_reg_int_0[30] .INIT=8'hAC; // @46:9457 CFG3 \exu_alu_result_26_m_i_m2_RNO[22] ( .A(quotient_Z[22]), .B(dividend_Z[22]), .C(N_4_i), .Y(exu_alu_result_26_m_i_m2_RNO_Z[22]) ); defparam \exu_alu_result_26_m_i_m2_RNO[22] .INIT=8'hCA; // @46:10867 CFG3 \exu_alu_result_26_1[10] ( .A(quotient_Z[10]), .B(dividend_Z[10]), .C(N_4_i), .Y(N_1262) ); defparam \exu_alu_result_26_1[10] .INIT=8'hCA; // @46:10867 CFG3 \exu_alu_result_26_1[6] ( .A(quotient_Z[6]), .B(dividend_Z[6]), .C(N_4_i), .Y(N_1256) ); defparam \exu_alu_result_26_1[6] .INIT=8'hCA; // @46:11383 CFG3 \next_exu_result_reg_int_0[16] ( .A(cpu_debug_op_wr_data_net[16]), .B(ex_retr_pipe_exu_result_retr[17]), .C(trace_priv_i), .Y(N_1338) ); defparam \next_exu_result_reg_int_0[16] .INIT=8'hAC; // @46:10892 CFG3 \exu_alu_operand0[16] ( .A(de_ex_pipe_curr_pc_ex[16]), .B(de_ex_pipe_operand0_mux_sel_ex_0), .C(gpr_rs1_rd_data_sig[16]), .Y(exu_alu_operand0_Z[16]) ); defparam \exu_alu_operand0[16] .INIT=8'hB8; // @46:10867 CFG3 \exu_alu_result_26_1[16] ( .A(quotient_Z[16]), .B(dividend_Z[16]), .C(N_4_i), .Y(N_1268) ); defparam \exu_alu_result_26_1[16] .INIT=8'hCA; // @46:11395 CFG3 \next_exu_result_reg_int_4[47] ( .A(mul_mp_pmux), .B(exu_alu_result_int_Z[16]), .C(exu_result_reg_int_Z[48]), .Y(next_exu_result_reg_int[47]) ); defparam \next_exu_result_reg_int_4[47] .INIT=8'hD8; // @46:11422 CFG3 \next_div_divisor_5[31] ( .A(div_ack_Z), .B(exu_alu_operand1_0), .C(div_divisor_Z[32]), .Y(next_div_divisor_5_Z[31]) ); defparam \next_div_divisor_5[31] .INIT=8'hE4; // @46:10867 CFG3 \exu_alu_result_26_1_i_m2[2] ( .A(quotient_Z[2]), .B(dividend_Z[2]), .C(N_4_i), .Y(N_2194) ); defparam \exu_alu_result_26_1_i_m2[2] .INIT=8'hCA; // @46:10892 CFG3 \exu_alu_operand0[2] ( .A(de_ex_pipe_curr_pc_ex[2]), .B(de_ex_pipe_operand0_mux_sel_ex_0), .C(gpr_rs1_rd_data_sig[2]), .Y(exu_alu_operand0_Z[2]) ); defparam \exu_alu_operand0[2] .INIT=8'hB8; // @46:11395 CFG3 \next_exu_result_reg_int_4[33] ( .A(mul_mp_pmux), .B(exu_alu_result_int_Z[2]), .C(exu_result_reg_int_Z[34]), .Y(next_exu_result_reg_int[33]) ); defparam \next_exu_result_reg_int_4[33] .INIT=8'hD8; // @46:10978 CFG3 \exu_shifter_places_0[1] ( .A(cpu_debug_gpr_op_rd_data_net[1]), .B(de_ex_pipe_immediate_ex[1]), .C(exu_shifter_places58_Z), .Y(N_1723) ); defparam \exu_shifter_places_0[1] .INIT=8'hCA; // @46:10892 CFG3 \exu_alu_operand0[0] ( .A(de_ex_pipe_curr_pc_ex[0]), .B(de_ex_pipe_operand0_mux_sel_ex_0), .C(gpr_rs1_rd_data_sig[0]), .Y(exu_alu_operand0_0) ); defparam \exu_alu_operand0[0] .INIT=8'h47; // @46:10867 CFG3 \exu_alu_result_26_1[0] ( .A(quotient_Z[0]), .B(dividend_Z[0]), .C(N_4_i), .Y(N_1250) ); defparam \exu_alu_result_26_1[0] .INIT=8'hCA; // @46:11383 CFG3 \next_exu_result_reg_int_0[1] ( .A(cpu_debug_op_wr_data_net[1]), .B(ex_retr_pipe_exu_result_retr[2]), .C(trace_priv_i), .Y(N_1323) ); defparam \next_exu_result_reg_int_0[1] .INIT=8'hAC; // @46:10892 CFG3 \exu_alu_operand0[1] ( .A(de_ex_pipe_curr_pc_ex[1]), .B(de_ex_pipe_operand0_mux_sel_ex_0), .C(gpr_rs1_rd_data_sig[1]), .Y(exu_alu_operand0_Z[1]) ); defparam \exu_alu_operand0[1] .INIT=8'hB8; // @46:11383 CFG3 \next_exu_result_reg_int_0[0] ( .A(cpu_debug_op_wr_data_net[0]), .B(ex_retr_pipe_exu_result_retr[1]), .C(trace_priv_i), .Y(N_1322) ); defparam \next_exu_result_reg_int_0[0] .INIT=8'hAC; // @46:11383 CFG3 \next_exu_result_reg_int_0[28] ( .A(cpu_debug_op_wr_data_net[28]), .B(ex_retr_pipe_exu_result_retr[29]), .C(trace_priv_i), .Y(N_1350) ); defparam \next_exu_result_reg_int_0[28] .INIT=8'hAC; // @46:10892 CFG3 \exu_alu_operand0[28] ( .A(de_ex_pipe_curr_pc_ex[28]), .B(de_ex_pipe_operand0_mux_sel_ex_0), .C(gpr_rs1_rd_data_sig[28]), .Y(exu_alu_operand0_Z[28]) ); defparam \exu_alu_operand0[28] .INIT=8'hB8; // @46:10867 CFG3 \exu_alu_result_26_1[28] ( .A(quotient_Z[28]), .B(dividend_Z[28]), .C(N_4_i), .Y(N_1280) ); defparam \exu_alu_result_26_1[28] .INIT=8'hCA; // @46:11395 CFG3 \next_exu_result_reg_int_4[62] ( .A(mul_mp_pmux), .B(exu_alu_result_int_Z[31]), .C(exu_result_reg_int_Z[63]), .Y(next_exu_result_reg_int[62]) ); defparam \next_exu_result_reg_int_4[62] .INIT=8'hD8; // @46:11395 CFG3 \next_exu_result_reg_int_4[59] ( .A(mul_mp_pmux), .B(exu_alu_result_int_Z[28]), .C(exu_result_reg_int_Z[60]), .Y(next_exu_result_reg_int[59]) ); defparam \next_exu_result_reg_int_4[59] .INIT=8'hD8; // @46:11383 CFG3 \next_exu_result_reg_int_0[13] ( .A(cpu_debug_op_wr_data_net[13]), .B(ex_retr_pipe_exu_result_retr[14]), .C(trace_priv_i), .Y(N_1335) ); defparam \next_exu_result_reg_int_0[13] .INIT=8'hAC; // @46:11473 CFG3 \quotientce_1[13] ( .A(mul_div_cnt_Z[3]), .B(mul_div_cnt_Z[1]), .C(mul_div_cnt_Z[4]), .Y(quotientce_1_Z[13]) ); defparam \quotientce_1[13] .INIT=8'h40; // @46:11473 CFG3 \quotientce_1[29] ( .A(mul_div_cnt_Z[0]), .B(mul_div_cnt_Z[4]), .C(mul_div_cnt_Z[1]), .Y(quotientce_1_Z[29]) ); defparam \quotientce_1[29] .INIT=8'h10; // @46:11473 CFG3 \quotientce_1[4] ( .A(mul_div_cnt_Z[1]), .B(mul_div_cnt_Z[2]), .C(mul_div_cnt_Z[3]), .Y(quotientce_1_Z[4]) ); defparam \quotientce_1[4] .INIT=8'h20; // @46:11473 CFG3 \quotientce_1[27] ( .A(mul_div_cnt_Z[0]), .B(mul_div_cnt_Z[4]), .C(mul_div_cnt_Z[2]), .Y(quotientce_1_Z[27]) ); defparam \quotientce_1[27] .INIT=8'h10; // @46:11473 CFG3 \quotientce_1[25] ( .A(mul_div_cnt_Z[3]), .B(mul_div_cnt_Z[0]), .C(mul_div_cnt_Z[4]), .Y(quotientce_1_Z[25]) ); defparam \quotientce_1[25] .INIT=8'h01; // @46:11473 CFG3 \quotientce_1[0] ( .A(mul_div_cnt_Z[0]), .B(mul_div_cnt_Z[4]), .C(mul_div_cnt_Z[1]), .Y(quotientce_1_Z[0]) ); defparam \quotientce_1[0] .INIT=8'h80; // @46:11473 CFG3 \quotientce_0[8] ( .A(mul_div_cnt_Z[0]), .B(mul_div_cnt_Z[3]), .C(mul_div_cnt_Z[1]), .Y(quotientce_0_Z[8]) ); defparam \quotientce_0[8] .INIT=8'h20; // @46:11473 CFG3 \quotientce_0[9] ( .A(mul_div_cnt_Z[1]), .B(mul_div_cnt_Z[2]), .C(mul_div_cnt_Z[3]), .Y(quotientce_0_Z[9]) ); defparam \quotientce_0[9] .INIT=8'h08; // @46:11473 CFG3 \quotientce_0[21] ( .A(mul_div_cnt_Z[0]), .B(mul_div_cnt_Z[4]), .C(mul_div_cnt_Z[2]), .Y(quotientce_0_Z[21]) ); defparam \quotientce_0[21] .INIT=8'h01; // @46:11473 CFG3 \quotientce_0_0[12] ( .A(mul_div_cnt_Z[0]), .B(mul_div_cnt_Z[4]), .C(mul_div_cnt_Z[1]), .Y(quotientce_0_0_Z[12]) ); defparam \quotientce_0_0[12] .INIT=8'h80; // @46:11473 CFG3 \quotientce_0[1] ( .A(mul_div_cnt_Z[1]), .B(mul_div_cnt_Z[2]), .C(mul_div_cnt_Z[3]), .Y(quotientce_0_Z[1]) ); defparam \quotientce_0[1] .INIT=8'h80; // @46:11473 CFG3 \quotientce_0[5] ( .A(mul_div_cnt_Z[1]), .B(mul_div_cnt_Z[2]), .C(mul_div_cnt_Z[3]), .Y(quotientce_0_Z[5]) ); defparam \quotientce_0[5] .INIT=8'h20; // @46:11473 CFG3 \quotientce_0[11] ( .A(mul_div_cnt_Z[0]), .B(mul_div_cnt_Z[3]), .C(mul_div_cnt_Z[1]), .Y(quotientce_0_Z[11]) ); defparam \quotientce_0[11] .INIT=8'h01; // @46:11473 CFG3 \quotientce_0[2] ( .A(mul_div_cnt_Z[1]), .B(mul_div_cnt_Z[2]), .C(mul_div_cnt_Z[3]), .Y(quotientce_0_Z[2]) ); defparam \quotientce_0[2] .INIT=8'h40; // @46:10951 CFG3 exu_shifter_operand_valid_2_0 ( .A(shifter_operand_sel[1]), .B(ex_retr_pipe_gpr_wr_mux_sel_retr_0), .C(trace_priv_i), .Y(exu_shifter_operand_valid_2_0_Z) ); defparam exu_shifter_operand_valid_2_0.INIT=8'h45; // @46:11147 CFG4 exu_alu_result_0_sqmuxa_2_a0_2 ( .A(N_10_i), .B(N_14_i), .C(un128_exu_alu_result_i), .D(N_6_i), .Y(exu_alu_result_0_sqmuxa_2_a0_2_Z) ); defparam exu_alu_result_0_sqmuxa_2_a0_2.INIT=16'h4000; // @46:10828 CFG4 slow_m1_e ( .A(N_14_i), .B(N_10_i), .C(N_4_i), .D(N_8_i), .Y(un8_mul_mp) ); defparam slow_m1_e.INIT=16'h0040; // @46:11028 CFG3 un120_exu_alu_result_cry_31_RNI2SGCO ( .A(N_14_i), .B(un120_exu_alu_result_i), .C(N_6_i), .Y(un120_exu_alu_result_cry_31_RNI2SGCO_Z) ); defparam un120_exu_alu_result_cry_31_RNI2SGCO.INIT=8'h08; // @46:9457 CFG3 mul_mp_pmux_1_1_0_RNO ( .A(N_6_i), .B(un10_mul_mp), .C(exu_alu_operand0_Z[31]), .Y(mul_mp_e2) ); defparam mul_mp_pmux_1_1_0_RNO.INIT=8'h02; // @46:9457 CFG3 mul_mp_pmux_1_RNO ( .A(N_6_i), .B(un10_mul_mp), .C(exu_alu_operand1_Z[31]), .Y(mul_mp[32]) ); defparam mul_mp_pmux_1_RNO.INIT=8'h10; // @46:10872 CFG3 \div.un17_start_div ( .A(N_8_i), .B(N_10_i), .C(N_14_i), .Y(un17_start_div) ); defparam \div.un17_start_div .INIT=8'h08; // @46:11001 CFG3 exu_shifter_places58 ( .A(de_ex_pipe_shifter_unit_places_sel_ex_0), .B(shifter_operand_sel[0]), .C(shifter_unit_places_sel_0), .Y(exu_shifter_places58_Z) ); defparam exu_shifter_places58.INIT=8'h40; // @46:10996 CFG3 exu_shifter_places57 ( .A(de_ex_pipe_shifter_unit_places_sel_ex_0), .B(shifter_operand_sel[0]), .C(shifter_unit_places_sel_0), .Y(exu_shifter_places57_Z) ); defparam exu_shifter_places57.INIT=8'h04; // @46:10867 CFG4 \div.un5_div_result_3 ( .A(N_10_i), .B(N_6_i), .C(N_4_i), .D(N_8_i), .Y(un5_div_result) ); defparam \div.un5_div_result_3 .INIT=16'h0200; // @46:11232 CFG4 \exu_shifter_places_cnst_i_RNO[4] ( .A(gpr_rs1_rd_data_sig[1]), .B(gpr_rs1_rd_data_sig[0]), .C(de_ex_pipe_immediate_ex[0]), .D(de_ex_pipe_immediate_ex[1]), .Y(addr_shift_bits[1]) ); defparam \exu_shifter_places_cnst_i_RNO[4] .INIT=16'h956A; // @46:10978 CFG4 \exu_shifter_places_cnst_0_a4[3] ( .A(addr_shift_bits[0]), .B(shifter_operand_sel[0]), .C(shifter_unit_places_sel_0), .D(de_ex_pipe_shifter_unit_places_sel_ex_0), .Y(exu_shifter_places_cnst[3]) ); defparam \exu_shifter_places_cnst_0_a4[3] .INIT=16'h0200; // @46:11035 CFG4 exu_m1_e_0 ( .A(N_10_i), .B(N_6_i), .C(N_4_i), .D(N_8_i), .Y(exu_m1_e_0_1z) ); defparam exu_m1_e_0.INIT=16'h0004; // @46:11473 CFG3 \quotientce_0[17] ( .A(mul_div_cnt_Z[3]), .B(mul_div_cnt_Z[0]), .C(mul_div_cnt_Z[4]), .Y(quotientce_0_Z[17]) ); defparam \quotientce_0[17] .INIT=8'h02; // @46:11473 CFG3 \quotientce_0[10] ( .A(mul_div_cnt_Z[1]), .B(mul_div_cnt_Z[2]), .C(mul_div_cnt_Z[3]), .Y(quotientce_0_Z[10]) ); defparam \quotientce_0[10] .INIT=8'h04; // @46:11473 CFG3 \quotientce_0[19] ( .A(mul_div_cnt_Z[0]), .B(mul_div_cnt_Z[4]), .C(mul_div_cnt_Z[1]), .Y(quotientce_0_Z[19]) ); defparam \quotientce_0[19] .INIT=8'h01; // @46:11473 CFG3 \quotientce_0[14] ( .A(mul_div_cnt_Z[1]), .B(mul_div_cnt_Z[2]), .C(mul_div_cnt_Z[3]), .Y(quotientce_0_Z[14]) ); defparam \quotientce_0[14] .INIT=8'h01; // @46:11055 CFG3 exu_alu_result194_0_0 ( .A(N_6_i), .B(N_10_i), .C(N_14_i), .Y(m23_1) ); defparam exu_alu_result194_0_0.INIT=8'h04; // @46:9457 CFG2 exu_alu_result193_a0_3_1_RNIBFPQ8D ( .A(un1_alu_op_sel_int), .B(exu_alu_result193_a0_3_1_Z), .Y(N_26_0) ); defparam exu_alu_result193_a0_3_1_RNIBFPQ8D.INIT=4'h1; // @46:11434 CFG3 un22_next_quotient_0_a2_0 ( .A(mul_div_cnt_Z[1]), .B(mul_div_cnt_Z[2]), .C(mul_div_cnt_Z[3]), .Y(N_2197) ); defparam un22_next_quotient_0_a2_0.INIT=8'h10; // @46:11434 CFG3 un31_next_quotient_0_a2_0 ( .A(mul_div_cnt_Z[0]), .B(mul_div_cnt_Z[4]), .C(mul_div_cnt_Z[1]), .Y(N_87) ); defparam un31_next_quotient_0_a2_0.INIT=8'h20; // @46:11392 CFG3 un9_next_exu_result_reg_int ( .A(N_4_i), .B(un5_mul_mc), .C(N_10_i), .Y(un9_next_exu_result_reg_int_i) ); defparam un9_next_exu_result_reg_int.INIT=8'hCE; // @46:10870 CFG4 \div.un11_start_div_3 ( .A(N_10_i), .B(N_6_i), .C(N_4_i), .D(N_8_i), .Y(un11_start_div) ); defparam \div.un11_start_div_3 .INIT=16'h2000; // @46:11028 CFG2 \exu_alu_operand1_RNI7OKNF[0] ( .A(exu_alu_operand0_0), .B(exu_alu_operand1_0), .Y(un6_exu_alu_result1_m_a0_4_0[0]) ); defparam \exu_alu_operand1_RNI7OKNF[0] .INIT=4'h8; // @46:11028 CFG4 un120_exu_alu_result_cry_31_RNIV6I1U ( .A(un120_exu_alu_result_i), .B(un128_exu_alu_result_i), .C(N_6_i), .D(N_8_i), .Y(exu_N_7_0) ); defparam un120_exu_alu_result_cry_31_RNIV6I1U.INIT=16'h0035; // @46:10951 CFG4 \exu_shifter_operand_3[31] ( .A(gpr_rs1_rd_data_sig[31]), .B(cpu_debug_gpr_op_rd_data_net[31]), .C(shifter_operand_sel[0]), .D(shifter_operand_sel[1]), .Y(exu_shifter_operand[31]) ); defparam \exu_shifter_operand_3[31] .INIT=16'h0CA0; // @46:9457 CFG3 un1_dividend_cry_62_RNIOR8F41 ( .A(next_div_divisor39), .B(div_ack_Z), .C(un1_dividend_cry_62_Z), .Y(un1_next_div_divisor39_inv_2_or) ); defparam un1_dividend_cry_62_RNIOR8F41.INIT=8'h2A; // @46:10951 CFG4 \exu_shifter_operand_3[4] ( .A(gpr_rs1_rd_data_sig[4]), .B(cpu_debug_gpr_op_rd_data_net[4]), .C(shifter_operand_sel[0]), .D(shifter_operand_sel[1]), .Y(exu_shifter_operand[4]) ); defparam \exu_shifter_operand_3[4] .INIT=16'h0CA0; // @46:10951 CFG4 \exu_shifter_operand_3[27] ( .A(gpr_rs1_rd_data_sig[27]), .B(cpu_debug_gpr_op_rd_data_net[27]), .C(shifter_operand_sel[0]), .D(shifter_operand_sel[1]), .Y(exu_shifter_operand[27]) ); defparam \exu_shifter_operand_3[27] .INIT=16'h0CA0; // @46:10951 CFG4 \exu_shifter_operand_3[30] ( .A(gpr_rs1_rd_data_sig[30]), .B(cpu_debug_gpr_op_rd_data_net[30]), .C(shifter_operand_sel[0]), .D(shifter_operand_sel[1]), .Y(exu_shifter_operand[30]) ); defparam \exu_shifter_operand_3[30] .INIT=16'h0CA0; // @46:10951 CFG4 \exu_shifter_operand_3[1] ( .A(gpr_rs1_rd_data_sig[1]), .B(cpu_debug_gpr_op_rd_data_net[1]), .C(shifter_operand_sel[0]), .D(shifter_operand_sel[1]), .Y(exu_shifter_operand[1]) ); defparam \exu_shifter_operand_3[1] .INIT=16'h0CA0; // @46:10951 CFG4 \exu_shifter_operand_3[2] ( .A(gpr_rs1_rd_data_sig[2]), .B(cpu_debug_gpr_op_rd_data_net[2]), .C(shifter_operand_sel[0]), .D(shifter_operand_sel[1]), .Y(exu_shifter_operand[2]) ); defparam \exu_shifter_operand_3[2] .INIT=16'h0CA0; // @46:10914 CFG4 \exu_alu_operand1[0] ( .A(de_ex_pipe_immediate_ex[0]), .B(cpu_debug_gpr_op_rd_data_net[0]), .C(de_ex_pipe_operand1_mux_sel_ex[0]), .D(de_ex_pipe_operand1_mux_sel_ex[1]), .Y(exu_alu_operand1_0) ); defparam \exu_alu_operand1[0] .INIT=16'h00AC; // @46:10951 CFG4 \exu_shifter_operand_3[19] ( .A(gpr_rs1_rd_data_sig[19]), .B(cpu_debug_gpr_op_rd_data_net[19]), .C(shifter_operand_sel[0]), .D(shifter_operand_sel[1]), .Y(exu_shifter_operand[19]) ); defparam \exu_shifter_operand_3[19] .INIT=16'h0CA0; // @46:10914 CFG4 \exu_alu_operand1[31] ( .A(de_ex_pipe_immediate_ex[31]), .B(cpu_debug_gpr_op_rd_data_net[31]), .C(de_ex_pipe_operand1_mux_sel_ex[0]), .D(de_ex_pipe_operand1_mux_sel_ex[1]), .Y(exu_alu_operand1_Z[31]) ); defparam \exu_alu_operand1[31] .INIT=16'h00AC; // @46:10914 CFG4 \exu_alu_operand1[13] ( .A(de_ex_pipe_immediate_ex[13]), .B(cpu_debug_gpr_op_rd_data_net[13]), .C(de_ex_pipe_operand1_mux_sel_ex[0]), .D(de_ex_pipe_operand1_mux_sel_ex[1]), .Y(exu_alu_operand1_Z[13]) ); defparam \exu_alu_operand1[13] .INIT=16'h00AC; // @46:10914 CFG4 \exu_alu_operand1[12] ( .A(de_ex_pipe_immediate_ex[12]), .B(cpu_debug_gpr_op_rd_data_net[12]), .C(de_ex_pipe_operand1_mux_sel_ex[0]), .D(de_ex_pipe_operand1_mux_sel_ex[1]), .Y(exu_alu_operand1_Z[12]) ); defparam \exu_alu_operand1[12] .INIT=16'h00AC; // @46:10914 CFG4 \exu_alu_operand1[11] ( .A(de_ex_pipe_immediate_ex[11]), .B(cpu_debug_gpr_op_rd_data_net[11]), .C(de_ex_pipe_operand1_mux_sel_ex[0]), .D(de_ex_pipe_operand1_mux_sel_ex[1]), .Y(exu_alu_operand1_Z[11]) ); defparam \exu_alu_operand1[11] .INIT=16'h00AC; // @46:10914 CFG4 \exu_alu_operand1[10] ( .A(de_ex_pipe_immediate_ex[10]), .B(cpu_debug_gpr_op_rd_data_net[10]), .C(de_ex_pipe_operand1_mux_sel_ex[0]), .D(de_ex_pipe_operand1_mux_sel_ex[1]), .Y(exu_alu_operand1_Z[10]) ); defparam \exu_alu_operand1[10] .INIT=16'h00AC; // @46:10914 CFG4 \exu_alu_operand1[9] ( .A(de_ex_pipe_immediate_ex[9]), .B(cpu_debug_gpr_op_rd_data_net[9]), .C(de_ex_pipe_operand1_mux_sel_ex[0]), .D(de_ex_pipe_operand1_mux_sel_ex[1]), .Y(exu_alu_operand1_Z[9]) ); defparam \exu_alu_operand1[9] .INIT=16'h00AC; // @46:10914 CFG4 \exu_alu_operand1[8] ( .A(de_ex_pipe_immediate_ex[8]), .B(cpu_debug_gpr_op_rd_data_net[8]), .C(de_ex_pipe_operand1_mux_sel_ex[0]), .D(de_ex_pipe_operand1_mux_sel_ex[1]), .Y(exu_alu_operand1_Z[8]) ); defparam \exu_alu_operand1[8] .INIT=16'h00AC; // @46:10914 CFG4 \exu_alu_operand1[7] ( .A(de_ex_pipe_immediate_ex[7]), .B(cpu_debug_gpr_op_rd_data_net[7]), .C(de_ex_pipe_operand1_mux_sel_ex[0]), .D(de_ex_pipe_operand1_mux_sel_ex[1]), .Y(exu_alu_operand1_Z[7]) ); defparam \exu_alu_operand1[7] .INIT=16'h00AC; // @46:10914 CFG4 \exu_alu_operand1[6] ( .A(de_ex_pipe_immediate_ex[6]), .B(cpu_debug_gpr_op_rd_data_net[6]), .C(de_ex_pipe_operand1_mux_sel_ex[0]), .D(de_ex_pipe_operand1_mux_sel_ex[1]), .Y(exu_alu_operand1_Z[6]) ); defparam \exu_alu_operand1[6] .INIT=16'h00AC; // @46:10914 CFG4 \exu_alu_operand1[5] ( .A(de_ex_pipe_immediate_ex[5]), .B(cpu_debug_gpr_op_rd_data_net[5]), .C(de_ex_pipe_operand1_mux_sel_ex[0]), .D(de_ex_pipe_operand1_mux_sel_ex[1]), .Y(exu_alu_operand1_Z[5]) ); defparam \exu_alu_operand1[5] .INIT=16'h00AC; // @46:10914 CFG4 \exu_alu_operand1[4] ( .A(de_ex_pipe_immediate_ex[4]), .B(cpu_debug_gpr_op_rd_data_net[4]), .C(de_ex_pipe_operand1_mux_sel_ex[0]), .D(de_ex_pipe_operand1_mux_sel_ex[1]), .Y(exu_alu_operand1_Z[4]) ); defparam \exu_alu_operand1[4] .INIT=16'h00AC; // @46:10914 CFG4 \exu_alu_operand1[3] ( .A(de_ex_pipe_immediate_ex[3]), .B(cpu_debug_gpr_op_rd_data_net[3]), .C(de_ex_pipe_operand1_mux_sel_ex[0]), .D(de_ex_pipe_operand1_mux_sel_ex[1]), .Y(exu_alu_operand1_Z[3]) ); defparam \exu_alu_operand1[3] .INIT=16'h00AC; // @46:10914 CFG4 \exu_alu_operand1[28] ( .A(de_ex_pipe_immediate_ex[28]), .B(cpu_debug_gpr_op_rd_data_net[28]), .C(de_ex_pipe_operand1_mux_sel_ex[0]), .D(de_ex_pipe_operand1_mux_sel_ex[1]), .Y(exu_alu_operand1_Z[28]) ); defparam \exu_alu_operand1[28] .INIT=16'h00AC; // @46:10914 CFG4 \exu_alu_operand1[26] ( .A(de_ex_pipe_immediate_ex[26]), .B(cpu_debug_gpr_op_rd_data_net[26]), .C(de_ex_pipe_operand1_mux_sel_ex[0]), .D(de_ex_pipe_operand1_mux_sel_ex[1]), .Y(exu_alu_operand1_Z[26]) ); defparam \exu_alu_operand1[26] .INIT=16'h00AC; // @46:10914 CFG4 \exu_alu_operand1[25] ( .A(de_ex_pipe_immediate_ex[25]), .B(cpu_debug_gpr_op_rd_data_net[25]), .C(de_ex_pipe_operand1_mux_sel_ex[0]), .D(de_ex_pipe_operand1_mux_sel_ex[1]), .Y(exu_alu_operand1_Z[25]) ); defparam \exu_alu_operand1[25] .INIT=16'h00AC; // @46:10914 CFG4 \exu_alu_operand1[24] ( .A(de_ex_pipe_immediate_ex[24]), .B(cpu_debug_gpr_op_rd_data_net[24]), .C(de_ex_pipe_operand1_mux_sel_ex[0]), .D(de_ex_pipe_operand1_mux_sel_ex[1]), .Y(exu_alu_operand1_Z[24]) ); defparam \exu_alu_operand1[24] .INIT=16'h00AC; // @46:10914 CFG4 \exu_alu_operand1[23] ( .A(de_ex_pipe_immediate_ex[23]), .B(cpu_debug_gpr_op_rd_data_net[23]), .C(de_ex_pipe_operand1_mux_sel_ex[0]), .D(de_ex_pipe_operand1_mux_sel_ex[1]), .Y(exu_alu_operand1_Z[23]) ); defparam \exu_alu_operand1[23] .INIT=16'h00AC; // @46:10914 CFG4 \exu_alu_operand1[20] ( .A(de_ex_pipe_immediate_ex[20]), .B(cpu_debug_gpr_op_rd_data_net[20]), .C(de_ex_pipe_operand1_mux_sel_ex[0]), .D(de_ex_pipe_operand1_mux_sel_ex[1]), .Y(exu_alu_operand1_Z[20]) ); defparam \exu_alu_operand1[20] .INIT=16'h00AC; // @46:10914 CFG4 \exu_alu_operand1[17] ( .A(de_ex_pipe_immediate_ex[17]), .B(cpu_debug_gpr_op_rd_data_net[17]), .C(de_ex_pipe_operand1_mux_sel_ex[0]), .D(de_ex_pipe_operand1_mux_sel_ex[1]), .Y(exu_alu_operand1_Z[17]) ); defparam \exu_alu_operand1[17] .INIT=16'h00AC; // @46:10914 CFG4 \exu_alu_operand1[29] ( .A(de_ex_pipe_immediate_ex[29]), .B(cpu_debug_gpr_op_rd_data_net[29]), .C(de_ex_pipe_operand1_mux_sel_ex[0]), .D(de_ex_pipe_operand1_mux_sel_ex[1]), .Y(exu_alu_operand1_Z[29]) ); defparam \exu_alu_operand1[29] .INIT=16'h00AC; // @46:10914 CFG4 \exu_alu_operand1[30] ( .A(de_ex_pipe_immediate_ex[30]), .B(cpu_debug_gpr_op_rd_data_net[30]), .C(de_ex_pipe_operand1_mux_sel_ex[0]), .D(de_ex_pipe_operand1_mux_sel_ex[1]), .Y(exu_alu_operand1_Z[30]) ); defparam \exu_alu_operand1[30] .INIT=16'h00AC; // @46:10914 CFG4 \exu_alu_operand1[27] ( .A(de_ex_pipe_immediate_ex[27]), .B(cpu_debug_gpr_op_rd_data_net[27]), .C(de_ex_pipe_operand1_mux_sel_ex[0]), .D(de_ex_pipe_operand1_mux_sel_ex[1]), .Y(exu_alu_operand1_Z[27]) ); defparam \exu_alu_operand1[27] .INIT=16'h00AC; // @46:10914 CFG4 \exu_alu_operand1[22] ( .A(de_ex_pipe_immediate_ex[22]), .B(cpu_debug_gpr_op_rd_data_net[22]), .C(de_ex_pipe_operand1_mux_sel_ex[0]), .D(de_ex_pipe_operand1_mux_sel_ex[1]), .Y(exu_alu_operand1_Z[22]) ); defparam \exu_alu_operand1[22] .INIT=16'h00AC; // @46:10914 CFG4 \exu_alu_operand1[21] ( .A(de_ex_pipe_immediate_ex[21]), .B(cpu_debug_gpr_op_rd_data_net[21]), .C(de_ex_pipe_operand1_mux_sel_ex[0]), .D(de_ex_pipe_operand1_mux_sel_ex[1]), .Y(exu_alu_operand1_Z[21]) ); defparam \exu_alu_operand1[21] .INIT=16'h00AC; // @46:10914 CFG4 \exu_alu_operand1[19] ( .A(de_ex_pipe_immediate_ex[19]), .B(cpu_debug_gpr_op_rd_data_net[19]), .C(de_ex_pipe_operand1_mux_sel_ex[0]), .D(de_ex_pipe_operand1_mux_sel_ex[1]), .Y(exu_alu_operand1_Z[19]) ); defparam \exu_alu_operand1[19] .INIT=16'h00AC; // @46:10914 CFG4 \exu_alu_operand1[18] ( .A(de_ex_pipe_immediate_ex[18]), .B(cpu_debug_gpr_op_rd_data_net[18]), .C(de_ex_pipe_operand1_mux_sel_ex[0]), .D(de_ex_pipe_operand1_mux_sel_ex[1]), .Y(exu_alu_operand1_Z[18]) ); defparam \exu_alu_operand1[18] .INIT=16'h00AC; // @46:10951 CFG4 \exu_shifter_operand_3[18] ( .A(gpr_rs1_rd_data_sig[18]), .B(cpu_debug_gpr_op_rd_data_net[18]), .C(shifter_operand_sel[0]), .D(shifter_operand_sel[1]), .Y(exu_shifter_operand[18]) ); defparam \exu_shifter_operand_3[18] .INIT=16'h0CA0; // @46:10951 CFG4 \exu_shifter_operand_3[3] ( .A(gpr_rs1_rd_data_sig[3]), .B(cpu_debug_gpr_op_rd_data_net[3]), .C(shifter_operand_sel[0]), .D(shifter_operand_sel[1]), .Y(exu_shifter_operand[3]) ); defparam \exu_shifter_operand_3[3] .INIT=16'h0CA0; // @46:10951 CFG4 \exu_shifter_operand_3[5] ( .A(gpr_rs1_rd_data_sig[5]), .B(cpu_debug_gpr_op_rd_data_net[5]), .C(shifter_operand_sel[0]), .D(shifter_operand_sel[1]), .Y(exu_shifter_operand[5]) ); defparam \exu_shifter_operand_3[5] .INIT=16'h0CA0; // @46:10951 CFG4 \exu_shifter_operand_3[6] ( .A(gpr_rs1_rd_data_sig[6]), .B(cpu_debug_gpr_op_rd_data_net[6]), .C(shifter_operand_sel[0]), .D(shifter_operand_sel[1]), .Y(exu_shifter_operand[6]) ); defparam \exu_shifter_operand_3[6] .INIT=16'h0CA0; // @46:10951 CFG4 \exu_shifter_operand_3[7] ( .A(gpr_rs1_rd_data_sig[7]), .B(cpu_debug_gpr_op_rd_data_net[7]), .C(shifter_operand_sel[0]), .D(shifter_operand_sel[1]), .Y(exu_shifter_operand[7]) ); defparam \exu_shifter_operand_3[7] .INIT=16'h0CA0; // @46:10951 CFG4 \exu_shifter_operand_3[8] ( .A(gpr_rs1_rd_data_sig[8]), .B(cpu_debug_gpr_op_rd_data_net[8]), .C(shifter_operand_sel[0]), .D(shifter_operand_sel[1]), .Y(exu_shifter_operand[8]) ); defparam \exu_shifter_operand_3[8] .INIT=16'h0CA0; // @46:10951 CFG4 \exu_shifter_operand_3[9] ( .A(gpr_rs1_rd_data_sig[9]), .B(cpu_debug_gpr_op_rd_data_net[9]), .C(shifter_operand_sel[0]), .D(shifter_operand_sel[1]), .Y(exu_shifter_operand[9]) ); defparam \exu_shifter_operand_3[9] .INIT=16'h0CA0; // @46:10951 CFG4 \exu_shifter_operand_3[10] ( .A(gpr_rs1_rd_data_sig[10]), .B(cpu_debug_gpr_op_rd_data_net[10]), .C(shifter_operand_sel[0]), .D(shifter_operand_sel[1]), .Y(exu_shifter_operand[10]) ); defparam \exu_shifter_operand_3[10] .INIT=16'h0CA0; // @46:10951 CFG4 \exu_shifter_operand_3[11] ( .A(gpr_rs1_rd_data_sig[11]), .B(cpu_debug_gpr_op_rd_data_net[11]), .C(shifter_operand_sel[0]), .D(shifter_operand_sel[1]), .Y(exu_shifter_operand[11]) ); defparam \exu_shifter_operand_3[11] .INIT=16'h0CA0; // @46:10951 CFG4 \exu_shifter_operand_3[12] ( .A(gpr_rs1_rd_data_sig[12]), .B(cpu_debug_gpr_op_rd_data_net[12]), .C(shifter_operand_sel[0]), .D(shifter_operand_sel[1]), .Y(exu_shifter_operand[12]) ); defparam \exu_shifter_operand_3[12] .INIT=16'h0CA0; // @46:10951 CFG4 \exu_shifter_operand_3[13] ( .A(gpr_rs1_rd_data_sig[13]), .B(cpu_debug_gpr_op_rd_data_net[13]), .C(shifter_operand_sel[0]), .D(shifter_operand_sel[1]), .Y(exu_shifter_operand[13]) ); defparam \exu_shifter_operand_3[13] .INIT=16'h0CA0; // @46:10951 CFG4 \exu_shifter_operand_3[14] ( .A(gpr_rs1_rd_data_sig[14]), .B(cpu_debug_gpr_op_rd_data_net[14]), .C(shifter_operand_sel[0]), .D(shifter_operand_sel[1]), .Y(exu_shifter_operand[14]) ); defparam \exu_shifter_operand_3[14] .INIT=16'h0CA0; // @46:10951 CFG4 \exu_shifter_operand_3[15] ( .A(gpr_rs1_rd_data_sig[15]), .B(cpu_debug_gpr_op_rd_data_net[15]), .C(shifter_operand_sel[0]), .D(shifter_operand_sel[1]), .Y(exu_shifter_operand[15]) ); defparam \exu_shifter_operand_3[15] .INIT=16'h0CA0; // @46:10951 CFG4 \exu_shifter_operand_3[17] ( .A(gpr_rs1_rd_data_sig[17]), .B(cpu_debug_gpr_op_rd_data_net[17]), .C(shifter_operand_sel[0]), .D(shifter_operand_sel[1]), .Y(exu_shifter_operand[17]) ); defparam \exu_shifter_operand_3[17] .INIT=16'h0CA0; // @46:10951 CFG4 \exu_shifter_operand_3[20] ( .A(gpr_rs1_rd_data_sig[20]), .B(cpu_debug_gpr_op_rd_data_net[20]), .C(shifter_operand_sel[0]), .D(shifter_operand_sel[1]), .Y(exu_shifter_operand[20]) ); defparam \exu_shifter_operand_3[20] .INIT=16'h0CA0; // @46:10951 CFG4 \exu_shifter_operand_3[21] ( .A(gpr_rs1_rd_data_sig[21]), .B(cpu_debug_gpr_op_rd_data_net[21]), .C(shifter_operand_sel[0]), .D(shifter_operand_sel[1]), .Y(exu_shifter_operand[21]) ); defparam \exu_shifter_operand_3[21] .INIT=16'h0CA0; // @46:10951 CFG4 \exu_shifter_operand_3[22] ( .A(gpr_rs1_rd_data_sig[22]), .B(cpu_debug_gpr_op_rd_data_net[22]), .C(shifter_operand_sel[0]), .D(shifter_operand_sel[1]), .Y(exu_shifter_operand[22]) ); defparam \exu_shifter_operand_3[22] .INIT=16'h0CA0; // @46:10951 CFG4 \exu_shifter_operand_3[23] ( .A(gpr_rs1_rd_data_sig[23]), .B(cpu_debug_gpr_op_rd_data_net[23]), .C(shifter_operand_sel[0]), .D(shifter_operand_sel[1]), .Y(exu_shifter_operand[23]) ); defparam \exu_shifter_operand_3[23] .INIT=16'h0CA0; // @46:10951 CFG4 \exu_shifter_operand_3[24] ( .A(gpr_rs1_rd_data_sig[24]), .B(cpu_debug_gpr_op_rd_data_net[24]), .C(shifter_operand_sel[0]), .D(shifter_operand_sel[1]), .Y(exu_shifter_operand[24]) ); defparam \exu_shifter_operand_3[24] .INIT=16'h0CA0; // @46:10951 CFG4 \exu_shifter_operand_3[25] ( .A(gpr_rs1_rd_data_sig[25]), .B(cpu_debug_gpr_op_rd_data_net[25]), .C(shifter_operand_sel[0]), .D(shifter_operand_sel[1]), .Y(exu_shifter_operand[25]) ); defparam \exu_shifter_operand_3[25] .INIT=16'h0CA0; // @46:10951 CFG4 \exu_shifter_operand_3[26] ( .A(gpr_rs1_rd_data_sig[26]), .B(cpu_debug_gpr_op_rd_data_net[26]), .C(shifter_operand_sel[0]), .D(shifter_operand_sel[1]), .Y(exu_shifter_operand[26]) ); defparam \exu_shifter_operand_3[26] .INIT=16'h0CA0; // @46:10951 CFG4 \exu_shifter_operand_3[29] ( .A(gpr_rs1_rd_data_sig[29]), .B(cpu_debug_gpr_op_rd_data_net[29]), .C(shifter_operand_sel[0]), .D(shifter_operand_sel[1]), .Y(exu_shifter_operand[29]) ); defparam \exu_shifter_operand_3[29] .INIT=16'h0CA0; // @46:10914 CFG4 \exu_alu_operand1[16] ( .A(de_ex_pipe_immediate_ex[16]), .B(cpu_debug_gpr_op_rd_data_net[16]), .C(de_ex_pipe_operand1_mux_sel_ex[0]), .D(de_ex_pipe_operand1_mux_sel_ex[1]), .Y(exu_alu_operand1_Z[16]) ); defparam \exu_alu_operand1[16] .INIT=16'h00AC; // @46:10978 CFG4 \exu_shifter_places[0] ( .A(cpu_debug_gpr_op_rd_data_net[0]), .B(de_ex_pipe_immediate_ex[0]), .C(exu_shifter_places57_Z), .D(exu_shifter_places58_Z), .Y(exu_shifter_places_Z[0]) ); defparam \exu_shifter_places[0] .INIT=16'hCCA0; // @46:9457 CFG4 slow_mul_ack_RNIT73PPE ( .A(next_exu_result_reg_int48), .B(next_div_divisor39), .C(slow_mul_ack_Z), .D(div_ack_Z), .Y(N_73_mux) ); defparam slow_mul_ack_RNIT73PPE.INIT=16'h1B5F; // @46:10951 CFG4 \exu_shifter_operand_3[16] ( .A(gpr_rs1_rd_data_sig[16]), .B(cpu_debug_gpr_op_rd_data_net[16]), .C(shifter_operand_sel[0]), .D(shifter_operand_sel[1]), .Y(exu_shifter_operand[16]) ); defparam \exu_shifter_operand_3[16] .INIT=16'h0CA0; // @46:11051 CFG2 \exu_alu_result_6[0] ( .A(exu_alu_operand0_0), .B(exu_alu_operand1_0), .Y(exu_alu_result_6_Z[0]) ); defparam \exu_alu_result_6[0] .INIT=4'h9; // @46:10951 CFG4 \exu_shifter_operand_3[0] ( .A(gpr_rs1_rd_data_sig[0]), .B(cpu_debug_gpr_op_rd_data_net[0]), .C(shifter_operand_sel[0]), .D(shifter_operand_sel[1]), .Y(exu_shifter_operand[0]) ); defparam \exu_shifter_operand_3[0] .INIT=16'h0CA0; // @46:10978 CFG3 exu_shifter_places_valid_sn_m4 ( .A(de_ex_pipe_shifter_unit_places_sel_ex_0), .B(shifter_operand_sel[0]), .C(shifter_unit_places_sel_0), .Y(exu_shifter_places_valid_sn_N_7_mux) ); defparam exu_shifter_places_valid_sn_m4.INIT=8'h32; // @46:10978 CFG4 \exu_shifter_places[2] ( .A(cpu_debug_gpr_op_rd_data_net[2]), .B(de_ex_pipe_immediate_ex[2]), .C(exu_shifter_places57_Z), .D(exu_shifter_places58_Z), .Y(exu_shifter_places_Z[2]) ); defparam \exu_shifter_places[2] .INIT=16'hCCA0; // @46:10951 CFG4 \exu_shifter_operand_3[28] ( .A(gpr_rs1_rd_data_sig[28]), .B(cpu_debug_gpr_op_rd_data_net[28]), .C(shifter_operand_sel[0]), .D(shifter_operand_sel[1]), .Y(exu_shifter_operand[28]) ); defparam \exu_shifter_operand_3[28] .INIT=16'h0CA0; // @46:10914 CFG4 \exu_alu_operand1[15] ( .A(de_ex_pipe_immediate_ex[15]), .B(cpu_debug_gpr_op_rd_data_net[15]), .C(de_ex_pipe_operand1_mux_sel_ex[0]), .D(de_ex_pipe_operand1_mux_sel_ex[1]), .Y(exu_alu_operand1_Z[15]) ); defparam \exu_alu_operand1[15] .INIT=16'h00AC; // @46:10914 CFG4 \exu_alu_operand1[14] ( .A(de_ex_pipe_immediate_ex[14]), .B(cpu_debug_gpr_op_rd_data_net[14]), .C(de_ex_pipe_operand1_mux_sel_ex[0]), .D(de_ex_pipe_operand1_mux_sel_ex[1]), .Y(exu_alu_operand1_Z[14]) ); defparam \exu_alu_operand1[14] .INIT=16'h00AC; // @46:10867 CFG3 \quotient_RNILI1DG[0] ( .A(quotient_Z[0]), .B(dividend_Z[0]), .C(N_4_i), .Y(N_1250_i) ); defparam \quotient_RNILI1DG[0] .INIT=8'h35; // @46:10978 CFG4 \exu_shifter_places_1[4] ( .A(cpu_debug_gpr_op_rd_data_net[4]), .B(de_ex_pipe_immediate_ex[4]), .C(exu_shifter_places58_Z), .D(exu_shifter_places_sn_N_2), .Y(exu_shifter_places_1_Z[4]) ); defparam \exu_shifter_places_1[4] .INIT=16'h00CA; // @46:10978 CFG4 \exu_shifter_places_1[3] ( .A(cpu_debug_gpr_op_rd_data_net[3]), .B(de_ex_pipe_immediate_ex[3]), .C(exu_shifter_places58_Z), .D(exu_shifter_places_sn_N_2), .Y(exu_shifter_places_1_Z[3]) ); defparam \exu_shifter_places_1[3] .INIT=16'h00CA; // @46:11165 CFG4 exu_alu_result_0_sqmuxa_3_2 ( .A(N_14_i), .B(un152_exu_alu_result_1_data_tmp[15]), .C(exu_m4_0_a2_0_Z), .D(N_4_i), .Y(exu_alu_result_0_sqmuxa_3_2_0) ); defparam exu_alu_result_0_sqmuxa_3_2.INIT=16'h8000; // @46:11028 CFG3 un1_exu_alu_result212_1_d_2 ( .A(N_8_i), .B(N_4_i), .C(N_10_i), .Y(un1_exu_alu_result212_1_d_1) ); defparam un1_exu_alu_result212_1_d_2.INIT=8'h14; // @46:11062 CFG4 exu_alu_result195_2_3 ( .A(N_6_i), .B(N_14_i), .C(N_4_i), .D(exu_m4_0_a2_0_Z), .Y(exu_alu_result195_2_3_Z) ); defparam exu_alu_result195_2_3.INIT=16'h0200; // @46:10825 CFG3 mul_mp_sn_m4 ( .A(N_6_i), .B(un10_mul_mp), .C(exu_alu_operand0_int_sn_N_9), .Y(mul_mp_sn_N_6_mux) ); defparam mul_mp_sn_m4.INIT=8'h02; // @46:10978 CFG4 \exu_shifter_places_cnst_i[4] ( .A(shifter_operand_sel[0]), .B(addr_shift_bits[1]), .C(shifter_unit_places_sel_0), .D(de_ex_pipe_shifter_unit_places_sel_ex_0), .Y(N_493) ); defparam \exu_shifter_places_cnst_i[4] .INIT=16'hFBBF; // @46:11028 CFG4 exu_alu_result194_0_0_RNIOP1PQ ( .A(ex_retr_pipe_exu_result_retr[0]), .B(N_8_i), .C(N_4_i), .D(m23_1), .Y(exu_m1_e_2) ); defparam exu_alu_result194_0_0_RNIOP1PQ.INIT=16'h2000; // @46:11048 CFG4 exu_alu_result193_a0_3 ( .A(N_6_i), .B(N_14_i), .C(N_4_i), .D(exu_alu_result193_a0_3_1_Z), .Y(exu_alu_result193_a0_3_Z) ); defparam exu_alu_result193_a0_3.INIT=16'h2000; // @46:10835 CFG4 exu_alu_operand0_int_sn_m7 ( .A(N_4_i), .B(exu_alu_operand0_int_sn_N_9), .C(start_slow_mul), .D(un5_mul_mc), .Y(exu_alu_operand0_int_sn_N_10_mux) ); defparam exu_alu_operand0_int_sn_m7.INIT=16'h2000; // @46:9457 CFG4 exu_alu_result194_0_0_RNI4TU1TD ( .A(N_4_i), .B(N_8_i), .C(un1_alu_op_sel_int), .D(m23_1), .Y(exu_alu_result196) ); defparam exu_alu_result194_0_0_RNI4TU1TD.INIT=16'h0200; // @46:11282 CFG3 un1_exu_mux_result27_1 ( .A(exu_result_mux_sel[1]), .B(exu_result_mux_sel[2]), .C(exu_result_mux_sel[0]), .Y(un1_exu_mux_result27_1_Z) ); defparam un1_exu_mux_result27_1.INIT=8'h83; // @46:10824 CFG2 \slow_mul.un10_mul_mp ( .A(un5_mul_mc), .B(un8_mul_mp), .Y(un10_mul_mp) ); defparam \slow_mul.un10_mul_mp .INIT=4'h1; // @46:11028 CFG4 un120_exu_alu_result_cry_31_RNIIOLBU1 ( .A(N_4_i), .B(exu_N_7_0), .C(N_10_i), .D(N_14_i), .Y(exu_m3_0_2) ); defparam un120_exu_alu_result_cry_31_RNIIOLBU1.INIT=16'hF7FF; // @46:10978 CFG3 exu_shifter_places_valid_3_0 ( .A(trace_priv_i), .B(exu_shifter_places_valid_sn_N_7_mux), .C(ex_retr_pipe_gpr_wr_mux_sel_retr_0), .Y(exu_shifter_places_valid_3_0_Z) ); defparam exu_shifter_places_valid_3_0.INIT=8'hC4; // @46:11446 CFG2 \mul_div_cnt_lm_0[5] ( .A(N_73_mux), .B(mul_div_cnt_s_Z[5]), .Y(mul_div_cnt_lm[5]) ); defparam \mul_div_cnt_lm_0[5] .INIT=4'h4; // @46:11446 CFG2 \mul_div_cnt_lm_0[4] ( .A(N_73_mux), .B(mul_div_cnt_s[4]), .Y(mul_div_cnt_lm[4]) ); defparam \mul_div_cnt_lm_0[4] .INIT=4'h4; // @46:11446 CFG2 \mul_div_cnt_lm_0[3] ( .A(N_73_mux), .B(mul_div_cnt_s[3]), .Y(mul_div_cnt_lm[3]) ); defparam \mul_div_cnt_lm_0[3] .INIT=4'h4; // @46:11446 CFG2 \mul_div_cnt_lm_0[2] ( .A(N_73_mux), .B(mul_div_cnt_s[2]), .Y(mul_div_cnt_lm[2]) ); defparam \mul_div_cnt_lm_0[2] .INIT=4'h4; // @46:11446 CFG2 \mul_div_cnt_lm_0[1] ( .A(N_73_mux), .B(mul_div_cnt_s[1]), .Y(mul_div_cnt_lm[1]) ); defparam \mul_div_cnt_lm_0[1] .INIT=4'h4; // @46:11028 CFG4 un152_exu_alu_result_1_I_45_RNIRI50I1 ( .A(N_14_i), .B(un120_exu_alu_result_cry_31_RNI2SGCO_Z), .C(un152_exu_alu_result_1_data_tmp[15]), .D(N_10_i), .Y(exu_N_7) ); defparam un152_exu_alu_result_1_I_45_RNIRI50I1.INIT=16'h0ACC; // @46:11244 CFG2 \lsu_align_result_52[8] ( .A(exu_shifter_places_Z[0]), .B(exu_shifter_operand[31]), .Y(N_1643) ); defparam \lsu_align_result_52[8] .INIT=4'h8; // @46:11058 CFG2 \exu_alu_result_8[5] ( .A(exu_alu_operand0_Z[5]), .B(exu_alu_operand1_Z[5]), .Y(exu_alu_result_8_Z[5]) ); defparam \exu_alu_result_8[5] .INIT=4'hE; // @46:11058 CFG2 \exu_alu_result_8[4] ( .A(exu_alu_operand0_Z[4]), .B(exu_alu_operand1_Z[4]), .Y(exu_alu_result_8_Z[4]) ); defparam \exu_alu_result_8[4] .INIT=4'hE; // @46:11244 CFG2 \lsu_align_result_30[16] ( .A(un174_shifter_result_1_i[5]), .B(exu_shifter_operand[16]), .Y(N_947) ); defparam \lsu_align_result_30[16] .INIT=4'h4; // @46:9457 CFG4 \mul_div_cnt_RNIT4M05E[5] ( .A(N_4_i), .B(un1_alu_op_sel_int), .C(N_10_i), .D(N_8_i), .Y(N_27_0) ); defparam \mul_div_cnt_RNIT4M05E[5] .INIT=16'h0320; // @46:10914 CFG4 \exu_alu_operand1[1] ( .A(de_ex_pipe_immediate_ex[1]), .B(cpu_debug_gpr_op_rd_data_net[1]), .C(de_ex_pipe_operand1_mux_sel_ex[0]), .D(de_ex_pipe_operand1_mux_sel_ex[1]), .Y(exu_alu_operand1_Z[1]) ); defparam \exu_alu_operand1[1] .INIT=16'hF0AC; // @46:10914 CFG4 \exu_alu_operand1[2] ( .A(de_ex_pipe_immediate_ex[2]), .B(cpu_debug_gpr_op_rd_data_net[2]), .C(de_ex_pipe_operand1_mux_sel_ex[0]), .D(de_ex_pipe_operand1_mux_sel_ex[1]), .Y(exu_alu_operand1_Z[2]) ); defparam \exu_alu_operand1[2] .INIT=16'h0FAC; // @46:11028 CFG3 exu_alu_result195_2_3_RNIQ8SLJ ( .A(exu_alu_operand0_0), .B(exu_alu_result195_2_3_Z), .C(exu_alu_operand1_0), .Y(exu_m1_0_a2_1) ); defparam exu_alu_result195_2_3_RNIQ8SLJ.INIT=8'h40; // @46:11023 CFG4 exu_alu_result_int_cry_0_RNO_0 ( .A(N_4_i), .B(exu_alu_operand0_int_sn_N_9), .C(start_slow_mul), .D(un5_mul_mc), .Y(exu_N_4_1) ); defparam exu_alu_result_int_cry_0_RNO_0.INIT=16'hDFFF; // @46:11041 CFG3 exu_alu_result192_1 ( .A(N_6_i), .B(exu_alu_result192_0_out), .C(un1_alu_op_sel_int), .Y(exu_alu_result192_1_1z) ); defparam exu_alu_result192_1.INIT=8'h04; // @46:11424 CFG4 next_dividend_0_sqmuxa ( .A(div_ack_Z), .B(exu_alu_operand0_Z[31]), .C(un5_div_result), .D(un11_start_div), .Y(next_dividend_0_sqmuxa_Z) ); defparam next_dividend_0_sqmuxa.INIT=16'h4440; // @46:11055 CFG4 exu_alu_result194 ( .A(N_4_i), .B(N_8_i), .C(un1_alu_op_sel_int), .D(m23_1), .Y(exu_alu_result194_Z) ); defparam exu_alu_result194.INIT=16'h0100; // @46:11473 CFG4 \quotientce[0] ( .A(mul_div_cnt_Z[2]), .B(mul_div_cnt_Z[3]), .C(quotientce_1_Z[0]), .D(un1_next_div_divisor39_inv_2_or), .Y(quotientce_Z[0]) ); defparam \quotientce[0] .INIT=16'h8000; // @46:11473 CFG4 \quotientce[1] ( .A(mul_div_cnt_Z[0]), .B(mul_div_cnt_Z[4]), .C(quotientce_0_Z[1]), .D(un1_next_div_divisor39_inv_2_or), .Y(quotientce_Z[1]) ); defparam \quotientce[1] .INIT=16'h4000; // @46:11473 CFG4 \quotientce[2] ( .A(mul_div_cnt_Z[0]), .B(mul_div_cnt_Z[4]), .C(quotientce_0_Z[2]), .D(un1_next_div_divisor39_inv_2_or), .Y(quotientce_Z[2]) ); defparam \quotientce[2] .INIT=16'h8000; // @46:11473 CFG4 \quotientce[3] ( .A(mul_div_cnt_Z[0]), .B(mul_div_cnt_Z[4]), .C(quotientce_0_Z[2]), .D(un1_next_div_divisor39_inv_2_or), .Y(quotientce_Z[3]) ); defparam \quotientce[3] .INIT=16'h4000; // @46:11473 CFG4 \quotientce[4] ( .A(mul_div_cnt_Z[0]), .B(mul_div_cnt_Z[4]), .C(quotientce_1_Z[4]), .D(un1_next_div_divisor39_inv_2_or), .Y(quotientce_Z[4]) ); defparam \quotientce[4] .INIT=16'h8000; // @46:11473 CFG4 \quotientce[5] ( .A(mul_div_cnt_Z[0]), .B(mul_div_cnt_Z[4]), .C(quotientce_0_Z[5]), .D(un1_next_div_divisor39_inv_2_or), .Y(quotientce_Z[5]) ); defparam \quotientce[5] .INIT=16'h4000; // @46:11473 CFG4 \quotientce[6] ( .A(N_2197), .B(un1_next_div_divisor39_inv_2_or), .C(mul_div_cnt_Z[0]), .D(mul_div_cnt_Z[4]), .Y(quotientce_Z[6]) ); defparam \quotientce[6] .INIT=16'h8000; // @46:11473 CFG4 \quotientce[7] ( .A(N_2197), .B(un1_next_div_divisor39_inv_2_or), .C(mul_div_cnt_Z[0]), .D(mul_div_cnt_Z[4]), .Y(quotientce_Z[7]) ); defparam \quotientce[7] .INIT=16'h0800; // @46:11473 CFG4 \quotientce[8] ( .A(mul_div_cnt_Z[2]), .B(mul_div_cnt_Z[4]), .C(quotientce_0_Z[8]), .D(un1_next_div_divisor39_inv_2_or), .Y(quotientce_Z[8]) ); defparam \quotientce[8] .INIT=16'h8000; // @46:11473 CFG4 \quotientce[9] ( .A(mul_div_cnt_Z[0]), .B(mul_div_cnt_Z[4]), .C(quotientce_0_Z[9]), .D(un1_next_div_divisor39_inv_2_or), .Y(quotientce_Z[9]) ); defparam \quotientce[9] .INIT=16'h4000; // @46:11473 CFG4 \quotientce[10] ( .A(mul_div_cnt_Z[0]), .B(mul_div_cnt_Z[4]), .C(quotientce_0_Z[10]), .D(un1_next_div_divisor39_inv_2_or), .Y(quotientce_Z[10]) ); defparam \quotientce[10] .INIT=16'h8000; // @46:11473 CFG4 \quotientce[11] ( .A(mul_div_cnt_Z[2]), .B(mul_div_cnt_Z[4]), .C(quotientce_0_Z[11]), .D(un1_next_div_divisor39_inv_2_or), .Y(quotientce_Z[11]) ); defparam \quotientce[11] .INIT=16'h8000; // @46:11473 CFG4 \quotientce[12] ( .A(mul_div_cnt_Z[2]), .B(mul_div_cnt_Z[3]), .C(quotientce_0_0_Z[12]), .D(un1_next_div_divisor39_inv_2_or), .Y(quotientce_Z[12]) ); defparam \quotientce[12] .INIT=16'h1000; // @46:11473 CFG4 \quotientce[13] ( .A(mul_div_cnt_Z[0]), .B(mul_div_cnt_Z[2]), .C(un1_next_div_divisor39_inv_2_or), .D(quotientce_1_Z[13]), .Y(quotientce_Z[13]) ); defparam \quotientce[13] .INIT=16'h1000; // @46:11473 CFG4 \quotientce[14] ( .A(mul_div_cnt_Z[0]), .B(mul_div_cnt_Z[4]), .C(quotientce_0_Z[14]), .D(un1_next_div_divisor39_inv_2_or), .Y(quotientce_Z[14]) ); defparam \quotientce[14] .INIT=16'h8000; // @46:11473 CFG4 \quotientce[15] ( .A(mul_div_cnt_Z[0]), .B(mul_div_cnt_Z[4]), .C(quotientce_0_Z[14]), .D(un1_next_div_divisor39_inv_2_or), .Y(quotientce_Z[15]) ); defparam \quotientce[15] .INIT=16'h4000; // @46:11473 CFG4 \quotientce[16] ( .A(N_87), .B(un1_next_div_divisor39_inv_2_or), .C(mul_div_cnt_Z[2]), .D(mul_div_cnt_Z[3]), .Y(quotientce_Z[16]) ); defparam \quotientce[16] .INIT=16'h8000; // @46:11473 CFG4 \quotientce[17] ( .A(mul_div_cnt_Z[1]), .B(mul_div_cnt_Z[2]), .C(quotientce_0_Z[17]), .D(un1_next_div_divisor39_inv_2_or), .Y(quotientce_Z[17]) ); defparam \quotientce[17] .INIT=16'h8000; // @46:11473 CFG4 \quotientce[18] ( .A(mul_div_cnt_Z[0]), .B(mul_div_cnt_Z[4]), .C(quotientce_0_Z[2]), .D(un1_next_div_divisor39_inv_2_or), .Y(quotientce_Z[18]) ); defparam \quotientce[18] .INIT=16'h2000; // @46:11473 CFG4 \quotientce[19] ( .A(mul_div_cnt_Z[2]), .B(mul_div_cnt_Z[3]), .C(quotientce_0_Z[19]), .D(un1_next_div_divisor39_inv_2_or), .Y(quotientce_Z[19]) ); defparam \quotientce[19] .INIT=16'h8000; // @46:11473 CFG4 \quotientce[20] ( .A(N_87), .B(un1_next_div_divisor39_inv_2_or), .C(mul_div_cnt_Z[2]), .D(mul_div_cnt_Z[3]), .Y(quotientce_Z[20]) ); defparam \quotientce[20] .INIT=16'h0800; // @46:11473 CFG4 \quotientce[21] ( .A(mul_div_cnt_Z[1]), .B(mul_div_cnt_Z[3]), .C(quotientce_0_Z[21]), .D(un1_next_div_divisor39_inv_2_or), .Y(quotientce_Z[21]) ); defparam \quotientce[21] .INIT=16'h8000; // @46:11473 CFG4 \quotientce[22] ( .A(N_2197), .B(un1_next_div_divisor39_inv_2_or), .C(mul_div_cnt_Z[0]), .D(mul_div_cnt_Z[4]), .Y(quotientce_Z[22]) ); defparam \quotientce[22] .INIT=16'h0080; // @46:11473 CFG4 \quotientce[23] ( .A(mul_div_cnt_Z[1]), .B(mul_div_cnt_Z[2]), .C(quotientce_0_Z[17]), .D(un1_next_div_divisor39_inv_2_or), .Y(quotientce_Z[23]) ); defparam \quotientce[23] .INIT=16'h1000; // @46:11473 CFG4 \quotientce[24] ( .A(N_87), .B(un1_next_div_divisor39_inv_2_or), .C(mul_div_cnt_Z[2]), .D(mul_div_cnt_Z[3]), .Y(quotientce_Z[24]) ); defparam \quotientce[24] .INIT=16'h0080; // @46:11473 CFG4 \quotientce[25] ( .A(mul_div_cnt_Z[1]), .B(mul_div_cnt_Z[2]), .C(quotientce_1_Z[25]), .D(un1_next_div_divisor39_inv_2_or), .Y(quotientce_Z[25]) ); defparam \quotientce[25] .INIT=16'h8000; // @46:11473 CFG4 \quotientce[26] ( .A(mul_div_cnt_Z[0]), .B(mul_div_cnt_Z[4]), .C(quotientce_0_Z[10]), .D(un1_next_div_divisor39_inv_2_or), .Y(quotientce_Z[26]) ); defparam \quotientce[26] .INIT=16'h2000; // @46:11473 CFG4 \quotientce[27] ( .A(mul_div_cnt_Z[1]), .B(mul_div_cnt_Z[3]), .C(quotientce_1_Z[27]), .D(un1_next_div_divisor39_inv_2_or), .Y(quotientce_Z[27]) ); defparam \quotientce[27] .INIT=16'h1000; // @46:11473 CFG4 \quotientce[28] ( .A(N_87), .B(un1_next_div_divisor39_inv_2_or), .C(mul_div_cnt_Z[2]), .D(mul_div_cnt_Z[3]), .Y(quotientce_Z[28]) ); defparam \quotientce[28] .INIT=16'h0008; // @46:11473 CFG4 \quotientce[29] ( .A(mul_div_cnt_Z[2]), .B(mul_div_cnt_Z[3]), .C(quotientce_1_Z[29]), .D(un1_next_div_divisor39_inv_2_or), .Y(quotientce_Z[29]) ); defparam \quotientce[29] .INIT=16'h1000; // @46:11473 CFG4 \quotientce[30] ( .A(mul_div_cnt_Z[0]), .B(mul_div_cnt_Z[4]), .C(quotientce_0_Z[14]), .D(un1_next_div_divisor39_inv_2_or), .Y(quotientce_Z[30]) ); defparam \quotientce[30] .INIT=16'h2000; // @46:11473 CFG4 \quotientce[31] ( .A(mul_div_cnt_Z[2]), .B(mul_div_cnt_Z[3]), .C(quotientce_0_Z[19]), .D(un1_next_div_divisor39_inv_2_or), .Y(quotientce_Z[31]) ); defparam \quotientce[31] .INIT=16'h1000; // @46:11048 CFG2 exu_alu_result193_a0 ( .A(un1_alu_op_sel_int), .B(exu_alu_result193_a0_3_Z), .Y(exu_alu_result193) ); defparam exu_alu_result193_a0.INIT=4'h4; // @46:10892 CFG3 exu_m1_e_4_0 ( .A(debug_enter_retr), .B(ex_retr_pipe_gpr_wr_mux_sel_retr_0), .C(trace_priv_i), .Y(exu_m1_e_4_0_Z) ); defparam exu_m1_e_4_0.INIT=8'h01; // @46:11062 CFG2 exu_alu_result195_2 ( .A(un1_alu_op_sel_int), .B(exu_alu_result195_2_3_Z), .Y(exu_alu_result195) ); defparam exu_alu_result195_2.INIT=4'h4; // @46:11035 CFG3 \mul_div_cnt_RNI953IQE[5] ( .A(N_14_i), .B(exu_m1_e_0_1z), .C(un1_alu_op_sel_int), .Y(exu_N_4) ); defparam \mul_div_cnt_RNI953IQE[5] .INIT=8'hAB; // @46:10828 CFG2 start_m1_e ( .A(machine_implicit_wr_mtval_tval_wr_en), .B(un2_exception_taken), .Y(trace_exception) ); defparam start_m1_e.INIT=4'h2; // @46:11244 CFG3 \lsu_align_result_1[20] ( .A(exu_shifter_operand[18]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[19]), .Y(N_23) ); defparam \lsu_align_result_1[20] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_1[21] ( .A(exu_shifter_operand[19]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[20]), .Y(N_24) ); defparam \lsu_align_result_1[21] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_1[22] ( .A(exu_shifter_operand[20]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[21]), .Y(N_25) ); defparam \lsu_align_result_1[22] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_1[23] ( .A(exu_shifter_operand[21]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[22]), .Y(N_26) ); defparam \lsu_align_result_1[23] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_1[24] ( .A(exu_shifter_operand[22]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[23]), .Y(N_27) ); defparam \lsu_align_result_1[24] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_1[25] ( .A(exu_shifter_operand[23]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[24]), .Y(N_28) ); defparam \lsu_align_result_1[25] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_1[26] ( .A(exu_shifter_operand[24]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[25]), .Y(N_29) ); defparam \lsu_align_result_1[26] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_1[27] ( .A(exu_shifter_operand[25]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[26]), .Y(N_30) ); defparam \lsu_align_result_1[27] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_1[28] ( .A(exu_shifter_operand[26]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[27]), .Y(N_31) ); defparam \lsu_align_result_1[28] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_1[29] ( .A(exu_shifter_operand[27]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[28]), .Y(N_32) ); defparam \lsu_align_result_1[29] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_11[14] ( .A(exu_shifter_operand[0]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[1]), .Y(N_337) ); defparam \lsu_align_result_11[14] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_11[15] ( .A(exu_shifter_operand[1]), .B(exu_shifter_operand[2]), .C(exu_shifter_places_Z[0]), .Y(N_338) ); defparam \lsu_align_result_11[15] .INIT=8'hCA; // @46:11244 CFG3 \lsu_align_result_11[16] ( .A(exu_shifter_operand[2]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[3]), .Y(N_339) ); defparam \lsu_align_result_11[16] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_11[17] ( .A(exu_shifter_operand[3]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[4]), .Y(N_340) ); defparam \lsu_align_result_11[17] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_11[18] ( .A(exu_shifter_operand[4]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[5]), .Y(N_341) ); defparam \lsu_align_result_11[18] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_11[19] ( .A(exu_shifter_operand[5]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[6]), .Y(N_342) ); defparam \lsu_align_result_11[19] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_11[21] ( .A(exu_shifter_operand[7]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[8]), .Y(N_344) ); defparam \lsu_align_result_11[21] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_11[22] ( .A(exu_shifter_operand[8]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[9]), .Y(N_345) ); defparam \lsu_align_result_11[22] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_11[23] ( .A(exu_shifter_operand[9]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[10]), .Y(N_346) ); defparam \lsu_align_result_11[23] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_11[24] ( .A(exu_shifter_operand[10]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[11]), .Y(N_347) ); defparam \lsu_align_result_11[24] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_11[25] ( .A(exu_shifter_operand[11]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[12]), .Y(N_348) ); defparam \lsu_align_result_11[25] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_11[26] ( .A(exu_shifter_operand[12]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[13]), .Y(N_349) ); defparam \lsu_align_result_11[26] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_11[27] ( .A(exu_shifter_operand[13]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[14]), .Y(N_350) ); defparam \lsu_align_result_11[27] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_11[28] ( .A(exu_shifter_operand[14]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[15]), .Y(N_351) ); defparam \lsu_align_result_11[28] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_11[29] ( .A(exu_shifter_operand[15]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[16]), .Y(N_352) ); defparam \lsu_align_result_11[29] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_11[30] ( .A(exu_shifter_operand[16]), .B(exu_shifter_operand[17]), .C(exu_shifter_places_Z[0]), .Y(N_353) ); defparam \lsu_align_result_11[30] .INIT=8'hCA; // @46:11244 CFG3 \lsu_align_result_11[31] ( .A(exu_shifter_operand[17]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[18]), .Y(N_354) ); defparam \lsu_align_result_11[31] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_33[2] ( .A(exu_shifter_operand[3]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[4]), .Y(N_1029) ); defparam \lsu_align_result_33[2] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_33[3] ( .A(exu_shifter_operand[4]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[5]), .Y(N_1030) ); defparam \lsu_align_result_33[3] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_33[4] ( .A(exu_shifter_operand[5]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[6]), .Y(N_1031) ); defparam \lsu_align_result_33[4] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_33[6] ( .A(exu_shifter_operand[7]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[8]), .Y(N_1033) ); defparam \lsu_align_result_33[6] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_33[7] ( .A(exu_shifter_operand[8]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[9]), .Y(N_1034) ); defparam \lsu_align_result_33[7] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_33[8] ( .A(exu_shifter_operand[9]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[10]), .Y(N_1035) ); defparam \lsu_align_result_33[8] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_33[9] ( .A(exu_shifter_operand[10]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[11]), .Y(N_1036) ); defparam \lsu_align_result_33[9] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_34[8] ( .A(exu_shifter_operand[11]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[12]), .Y(N_1067) ); defparam \lsu_align_result_34[8] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_34[9] ( .A(exu_shifter_operand[12]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[13]), .Y(N_1068) ); defparam \lsu_align_result_34[9] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_36[8] ( .A(exu_shifter_operand[13]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[14]), .Y(N_1131) ); defparam \lsu_align_result_36[8] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_36[9] ( .A(exu_shifter_operand[14]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[15]), .Y(N_1132) ); defparam \lsu_align_result_36[9] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_37[8] ( .A(exu_shifter_operand[15]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[16]), .Y(N_1163) ); defparam \lsu_align_result_37[8] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_37[9] ( .A(exu_shifter_operand[16]), .B(exu_shifter_operand[17]), .C(exu_shifter_places_Z[0]), .Y(N_1164) ); defparam \lsu_align_result_37[9] .INIT=8'hAC; // @46:11244 CFG3 \lsu_align_result_40[8] ( .A(exu_shifter_operand[17]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[18]), .Y(N_1259) ); defparam \lsu_align_result_40[8] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_40[9] ( .A(exu_shifter_operand[18]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[19]), .Y(N_1260) ); defparam \lsu_align_result_40[9] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_41[8] ( .A(exu_shifter_operand[19]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[20]), .Y(N_1291) ); defparam \lsu_align_result_41[8] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_41[9] ( .A(exu_shifter_operand[20]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[21]), .Y(N_1292) ); defparam \lsu_align_result_41[9] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_43[8] ( .A(exu_shifter_operand[21]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[22]), .Y(N_1355) ); defparam \lsu_align_result_43[8] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_43[9] ( .A(exu_shifter_operand[22]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[23]), .Y(N_1356) ); defparam \lsu_align_result_43[9] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_44[8] ( .A(exu_shifter_operand[23]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[24]), .Y(N_1387) ); defparam \lsu_align_result_44[8] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_44[9] ( .A(exu_shifter_operand[24]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[25]), .Y(N_1388) ); defparam \lsu_align_result_44[9] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_48[8] ( .A(exu_shifter_operand[25]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[26]), .Y(N_1515) ); defparam \lsu_align_result_48[8] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_48[9] ( .A(exu_shifter_operand[26]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[27]), .Y(N_1516) ); defparam \lsu_align_result_48[9] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_49[8] ( .A(exu_shifter_operand[27]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[28]), .Y(N_1547) ); defparam \lsu_align_result_49[8] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_49[9] ( .A(exu_shifter_operand[28]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[29]), .Y(N_1548) ); defparam \lsu_align_result_49[9] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_51[8] ( .A(exu_shifter_operand[29]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[30]), .Y(N_1611) ); defparam \lsu_align_result_51[8] .INIT=8'hB8; // @46:9457 CFG3 \div.un11_start_div_3_RNIQEVCD ( .A(un11_start_div), .B(exu_alu_operand1_Z[31]), .C(un5_div_result), .Y(un6_next_div_divisor) ); defparam \div.un11_start_div_3_RNIQEVCD .INIT=8'hC8; // @46:11028 CFG2 \exu_alu_result_0_iv_3_RNO[3] ( .A(exu_alu_result196), .B(ex_retr_pipe_exu_result_retr[3]), .Y(exu_result_reg_int_m[3]) ); defparam \exu_alu_result_0_iv_3_RNO[3] .INIT=4'h8; // @46:11028 CFG2 \exu_alu_result_0_iv_3_RNO[2] ( .A(exu_alu_result196), .B(ex_retr_pipe_exu_result_retr[2]), .Y(exu_result_reg_int_m[2]) ); defparam \exu_alu_result_0_iv_3_RNO[2] .INIT=4'h8; // @46:11028 CFG4 \exu_alu_result_26_m[0] ( .A(N_1250), .B(res_pos_neg_Z), .C(N_1250_i), .D(un17_start_div), .Y(exu_alu_result_26_m_Z[0]) ); defparam \exu_alu_result_26_m[0] .INIT=16'h2E00; // @46:11244 CFG3 \lsu_align_result_51[9] ( .A(exu_shifter_operand[30]), .B(exu_shifter_operand[31]), .C(exu_shifter_places_Z[0]), .Y(N_1612) ); defparam \lsu_align_result_51[9] .INIT=8'hAC; // @46:11244 CFG3 \lsu_align_result_33[5] ( .A(exu_shifter_operand[6]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[7]), .Y(N_1032) ); defparam \lsu_align_result_33[5] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_11[20] ( .A(exu_shifter_operand[6]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_operand[7]), .Y(N_343) ); defparam \lsu_align_result_11[20] .INIT=8'hE2; // @46:10826 CFG4 exu_alu_result_int_cry_1_RNO_1 ( .A(exu_alu_operand0_Z[1]), .B(un23_mulh_mc_0_cry_1_cy_Y), .C(exu_alu_operand0_Z[31]), .D(exu_alu_operand0_0), .Y(N_1649_2) ); defparam exu_alu_result_int_cry_1_RNO_1.INIT=16'h3050; // @46:10826 CFG4 exu_alu_result_int_cry_2_RNO_1 ( .A(exu_alu_operand0_Z[2]), .B(un23_mulh_mc0[2]), .C(exu_alu_operand0_0), .D(exu_alu_operand0_Z[31]), .Y(N_1650_2) ); defparam exu_alu_result_int_cry_2_RNO_1.INIT=16'hC500; // @46:10826 CFG4 exu_alu_result_int_cry_16_RNO_1 ( .A(exu_alu_operand0_Z[16]), .B(exu_alu_operand0_0), .C(un23_mulh_mc0[16]), .D(exu_alu_operand0_Z[31]), .Y(N_1664_2) ); defparam exu_alu_result_int_cry_16_RNO_1.INIT=16'hD100; // @46:10826 CFG4 exu_alu_result_int_cry_15_RNO_1 ( .A(exu_alu_operand0_Z[15]), .B(exu_alu_operand0_0), .C(un23_mulh_mc0[15]), .D(exu_alu_operand0_Z[31]), .Y(N_1663_2) ); defparam exu_alu_result_int_cry_15_RNO_1.INIT=16'hD100; // @46:10826 CFG4 exu_alu_result_int_cry_14_RNO_1 ( .A(exu_alu_operand0_Z[14]), .B(exu_alu_operand0_0), .C(un23_mulh_mc0[14]), .D(exu_alu_operand0_Z[31]), .Y(N_1662_2) ); defparam exu_alu_result_int_cry_14_RNO_1.INIT=16'hD100; // @46:10826 CFG4 exu_alu_result_int_cry_17_RNO_1 ( .A(exu_alu_operand0_Z[17]), .B(exu_alu_operand0_0), .C(un23_mulh_mc0[17]), .D(exu_alu_operand0_Z[31]), .Y(N_1665_2) ); defparam exu_alu_result_int_cry_17_RNO_1.INIT=16'hD100; // @46:10826 CFG4 exu_alu_result_int_cry_30_RNO_1 ( .A(exu_alu_operand0_Z[30]), .B(exu_alu_operand0_0), .C(un23_mulh_mc0[30]), .D(exu_alu_operand0_Z[31]), .Y(N_1678_2) ); defparam exu_alu_result_int_cry_30_RNO_1.INIT=16'hD100; // @46:10826 CFG4 exu_alu_result_int_cry_8_RNO_1 ( .A(exu_alu_operand0_Z[8]), .B(un23_mulh_mc0[8]), .C(exu_alu_operand0_0), .D(exu_alu_operand0_Z[31]), .Y(N_1656_2) ); defparam exu_alu_result_int_cry_8_RNO_1.INIT=16'hC500; // @46:10826 CFG4 exu_alu_result_int_cry_9_RNO_1 ( .A(exu_alu_operand0_Z[9]), .B(un23_mulh_mc0[9]), .C(exu_alu_operand0_0), .D(exu_alu_operand0_Z[31]), .Y(N_1657_2) ); defparam exu_alu_result_int_cry_9_RNO_1.INIT=16'hC500; // @46:10826 CFG4 exu_alu_result_int_cry_25_RNO_1 ( .A(exu_alu_operand0_Z[25]), .B(exu_alu_operand0_0), .C(un23_mulh_mc0[25]), .D(exu_alu_operand0_Z[31]), .Y(N_1673_2) ); defparam exu_alu_result_int_cry_25_RNO_1.INIT=16'hD100; // @46:10826 CFG4 exu_alu_result_int_cry_28_RNO_1 ( .A(exu_alu_operand0_Z[28]), .B(exu_alu_operand0_0), .C(un23_mulh_mc0[28]), .D(exu_alu_operand0_Z[31]), .Y(N_1676_2) ); defparam exu_alu_result_int_cry_28_RNO_1.INIT=16'hD100; // @46:10826 CFG4 exu_alu_result_int_cry_29_RNO_1 ( .A(exu_alu_operand0_Z[29]), .B(exu_alu_operand0_0), .C(un23_mulh_mc0[29]), .D(exu_alu_operand0_Z[31]), .Y(N_1677_2) ); defparam exu_alu_result_int_cry_29_RNO_1.INIT=16'hD100; // @46:10826 CFG4 exu_alu_result_int_cry_26_RNO_1 ( .A(exu_alu_operand0_Z[26]), .B(exu_alu_operand0_0), .C(un23_mulh_mc0[26]), .D(exu_alu_operand0_Z[31]), .Y(N_1674_2) ); defparam exu_alu_result_int_cry_26_RNO_1.INIT=16'hD100; // @46:10826 CFG4 exu_alu_result_int_cry_27_RNO_1 ( .A(exu_alu_operand0_Z[27]), .B(exu_alu_operand0_0), .C(un23_mulh_mc0[27]), .D(exu_alu_operand0_Z[31]), .Y(N_1675_2) ); defparam exu_alu_result_int_cry_27_RNO_1.INIT=16'hD100; // @46:10826 CFG4 exu_alu_result_int_cry_7_RNO_1 ( .A(exu_alu_operand0_Z[7]), .B(un23_mulh_mc0[7]), .C(exu_alu_operand0_0), .D(exu_alu_operand0_Z[31]), .Y(N_1655_2) ); defparam exu_alu_result_int_cry_7_RNO_1.INIT=16'hC500; // @46:10826 CFG4 exu_alu_result_int_cry_12_RNO_1 ( .A(exu_alu_operand0_Z[12]), .B(exu_alu_operand0_0), .C(un23_mulh_mc0[12]), .D(exu_alu_operand0_Z[31]), .Y(N_1660_2) ); defparam exu_alu_result_int_cry_12_RNO_1.INIT=16'hD100; // @46:10826 CFG4 exu_alu_result_int_cry_11_RNO_1 ( .A(exu_alu_operand0_Z[11]), .B(exu_alu_operand0_0), .C(un23_mulh_mc0[11]), .D(exu_alu_operand0_Z[31]), .Y(N_1659_2) ); defparam exu_alu_result_int_cry_11_RNO_1.INIT=16'hD100; // @46:10826 CFG4 exu_alu_result_int_cry_24_RNO_1 ( .A(exu_alu_operand0_Z[24]), .B(exu_alu_operand0_0), .C(un23_mulh_mc0[24]), .D(exu_alu_operand0_Z[31]), .Y(N_1672_2) ); defparam exu_alu_result_int_cry_24_RNO_1.INIT=16'hD100; // @46:10826 CFG4 exu_alu_result_int_cry_19_RNO_1 ( .A(exu_alu_operand0_Z[19]), .B(exu_alu_operand0_0), .C(un23_mulh_mc0[19]), .D(exu_alu_operand0_Z[31]), .Y(N_1667_2) ); defparam exu_alu_result_int_cry_19_RNO_1.INIT=16'hD100; // @46:10826 CFG4 exu_alu_result_int_cry_13_RNO_1 ( .A(exu_alu_operand0_Z[13]), .B(exu_alu_operand0_0), .C(un23_mulh_mc0[13]), .D(exu_alu_operand0_Z[31]), .Y(N_1661_2) ); defparam exu_alu_result_int_cry_13_RNO_1.INIT=16'hD100; // @46:10826 CFG4 exu_alu_result_int_cry_23_RNO_1 ( .A(exu_alu_operand0_Z[23]), .B(exu_alu_operand0_0), .C(un23_mulh_mc0[23]), .D(exu_alu_operand0_Z[31]), .Y(N_1671_2) ); defparam exu_alu_result_int_cry_23_RNO_1.INIT=16'hD100; // @46:10826 CFG4 exu_alu_result_int_cry_22_RNO_1 ( .A(exu_alu_operand0_Z[22]), .B(exu_alu_operand0_0), .C(un23_mulh_mc0[22]), .D(exu_alu_operand0_Z[31]), .Y(N_1670_2) ); defparam exu_alu_result_int_cry_22_RNO_1.INIT=16'hD100; // @46:10826 CFG4 exu_alu_result_int_cry_10_RNO_1 ( .A(exu_alu_operand0_Z[10]), .B(exu_alu_operand0_0), .C(un23_mulh_mc0[10]), .D(exu_alu_operand0_Z[31]), .Y(N_1658_2) ); defparam exu_alu_result_int_cry_10_RNO_1.INIT=16'hD100; // @46:10826 CFG4 exu_alu_result_int_cry_20_RNO_1 ( .A(exu_alu_operand0_Z[20]), .B(exu_alu_operand0_0), .C(un23_mulh_mc0[20]), .D(exu_alu_operand0_Z[31]), .Y(N_1668_2) ); defparam exu_alu_result_int_cry_20_RNO_1.INIT=16'hD100; // @46:10826 CFG4 exu_alu_result_int_cry_21_RNO_1 ( .A(exu_alu_operand0_Z[21]), .B(exu_alu_operand0_0), .C(un23_mulh_mc0[21]), .D(exu_alu_operand0_Z[31]), .Y(N_1669_2) ); defparam exu_alu_result_int_cry_21_RNO_1.INIT=16'hD100; // @46:11244 CFG3 lsu_align_result_95_2_2 ( .A(exu_shifter_operand[31]), .B(shifter_unit_op_sel[0]), .C(un174_shifter_result_1_i[5]), .Y(lsu_align_result_95_2_2_Z) ); defparam lsu_align_result_95_2_2.INIT=8'h80; // @46:10826 CFG4 exu_alu_result_int_cry_5_RNO_1 ( .A(exu_alu_operand0_Z[5]), .B(un23_mulh_mc0[5]), .C(exu_alu_operand0_0), .D(exu_alu_operand0_Z[31]), .Y(N_1653_2) ); defparam exu_alu_result_int_cry_5_RNO_1.INIT=16'hC500; // @46:10826 CFG4 exu_alu_result_int_cry_4_RNO_1 ( .A(exu_alu_operand0_Z[4]), .B(un23_mulh_mc0[4]), .C(exu_alu_operand0_0), .D(exu_alu_operand0_Z[31]), .Y(N_1652_2) ); defparam exu_alu_result_int_cry_4_RNO_1.INIT=16'hC500; // @46:10826 CFG4 exu_alu_result_int_cry_18_RNO_1 ( .A(exu_alu_operand0_Z[18]), .B(exu_alu_operand0_0), .C(un23_mulh_mc0[18]), .D(exu_alu_operand0_Z[31]), .Y(N_1666_2) ); defparam exu_alu_result_int_cry_18_RNO_1.INIT=16'hD100; // @46:10826 CFG4 exu_alu_result_int_cry_3_RNO_1 ( .A(exu_alu_operand0_Z[3]), .B(un23_mulh_mc0[3]), .C(exu_alu_operand0_0), .D(exu_alu_operand0_Z[31]), .Y(N_1651_2) ); defparam exu_alu_result_int_cry_3_RNO_1.INIT=16'hC500; // @46:10826 CFG4 exu_alu_result_int_cry_6_RNO_1 ( .A(exu_alu_operand0_Z[6]), .B(un23_mulh_mc0[6]), .C(exu_alu_operand0_0), .D(exu_alu_operand0_Z[31]), .Y(N_1654_2) ); defparam exu_alu_result_int_cry_6_RNO_1.INIT=16'hC500; // @46:11028 CFG3 un152_exu_alu_result_1_I_45_RNI7JIH72 ( .A(N_4_i), .B(exu_N_7), .C(N_8_i), .Y(exu_m4_0_1) ); defparam un152_exu_alu_result_1_I_45_RNI7JIH72.INIT=8'hFB; // @46:11244 CFG3 \lsu_align_result_32_1[0] ( .A(exu_shifter_operand[0]), .B(shifter_unit_op_sel[0]), .C(N_2122_i), .Y(lsu_align_result_32_1_Z[0]) ); defparam \lsu_align_result_32_1[0] .INIT=8'h80; // @46:11425 CFG4 un15_next_res_pos_neg_22 ( .A(exu_alu_operand1_Z[15]), .B(exu_alu_operand1_Z[14]), .C(exu_alu_operand1_Z[13]), .D(exu_alu_operand1_Z[12]), .Y(un15_next_res_pos_neg_22_Z) ); defparam un15_next_res_pos_neg_22.INIT=16'hFFFE; // @46:11425 CFG4 un15_next_res_pos_neg_21 ( .A(exu_alu_operand1_Z[11]), .B(exu_alu_operand1_Z[10]), .C(exu_alu_operand1_Z[9]), .D(exu_alu_operand1_Z[8]), .Y(un15_next_res_pos_neg_21_Z) ); defparam un15_next_res_pos_neg_21.INIT=16'hFFFE; // @46:11425 CFG4 un15_next_res_pos_neg_20 ( .A(exu_alu_operand1_Z[7]), .B(exu_alu_operand1_Z[6]), .C(exu_alu_operand1_Z[5]), .D(exu_alu_operand1_Z[4]), .Y(un15_next_res_pos_neg_20_Z) ); defparam un15_next_res_pos_neg_20.INIT=16'hFFFE; // @46:11425 CFG4 un15_next_res_pos_neg_19 ( .A(exu_alu_operand1_Z[30]), .B(exu_alu_operand1_Z[29]), .C(exu_alu_operand1_Z[28]), .D(exu_alu_operand1_Z[3]), .Y(un15_next_res_pos_neg_19_Z) ); defparam un15_next_res_pos_neg_19.INIT=16'hFFFE; // @46:11425 CFG4 un15_next_res_pos_neg_18 ( .A(exu_alu_operand1_Z[27]), .B(exu_alu_operand1_Z[26]), .C(exu_alu_operand1_Z[25]), .D(exu_alu_operand1_Z[24]), .Y(un15_next_res_pos_neg_18_Z) ); defparam un15_next_res_pos_neg_18.INIT=16'hFFFE; // @46:11425 CFG4 un15_next_res_pos_neg_17 ( .A(exu_alu_operand1_Z[23]), .B(exu_alu_operand1_Z[22]), .C(exu_alu_operand1_Z[21]), .D(exu_alu_operand1_Z[20]), .Y(un15_next_res_pos_neg_17_Z) ); defparam un15_next_res_pos_neg_17.INIT=16'hFFFE; // @46:11425 CFG4 un15_next_res_pos_neg_16 ( .A(exu_alu_operand1_Z[19]), .B(exu_alu_operand1_Z[18]), .C(exu_alu_operand1_Z[17]), .D(exu_alu_operand1_Z[16]), .Y(un15_next_res_pos_neg_16_Z) ); defparam un15_next_res_pos_neg_16.INIT=16'hFFFE; // @46:11244 CFG3 \lsu_align_result_63[31] ( .A(N_2122_i), .B(exu_shifter_operand[31]), .C(un174_shifter_result_1_i[5]), .Y(N_2018) ); defparam \lsu_align_result_63[31] .INIT=8'h08; // @46:11028 CFG4 exu_alu_operand0_valid_u_RNIF99UVE ( .A(N_8_i), .B(N_14_i), .C(start_slow_mul), .D(exu_m1_e_0_1z), .Y(exu_alu_operand0_valid_u_RNIF99UVE_Z) ); defparam exu_alu_operand0_valid_u_RNIF99UVE.INIT=16'hB8BB; // @46:9457 CFG2 exu_alu_result195_2_3_0_RNIVUKUCE ( .A(N_27_0), .B(m29_0), .Y(un3_alu_op_sel_int_2) ); defparam exu_alu_result195_2_3_0_RNIVUKUCE.INIT=4'h8; // @46:11023 CFG4 exu_alu_result_int_s_32_RNO ( .A(exu_alu_operand1_Z[31]), .B(exu_alu_operand0_Z[31]), .C(un5_mul_mc), .D(exu_alu_operand0_int_sn_N_4), .Y(exu_alu_operand0_int[32]) ); defparam exu_alu_result_int_s_32_RNO.INIT=16'h6C00; // @46:11244 CFG2 \lsu_align_result_35[30] ( .A(N_2123_i), .B(N_1643), .Y(N_1121) ); defparam \lsu_align_result_35[30] .INIT=4'h4; // @46:10825 CFG4 \mul_mp[31] ( .A(exu_alu_operand1_Z[31]), .B(un16_next_div_divisor_1_s_31_S), .C(exu_alu_operand0_Z[31]), .D(mul_mp_sn_N_6_mux), .Y(mul_mp_Z[31]) ); defparam \mul_mp[31] .INIT=16'hC0AA; // @46:11244 CFG3 \lsu_align_result_3[1] ( .A(exu_shifter_operand[0]), .B(exu_shifter_places_Z[0]), .C(N_2123_i), .Y(N_68) ); defparam \lsu_align_result_3[1] .INIT=8'h08; // @46:11244 CFG3 \un174_shifter_result_1_1.N_2123_i ( .A(exu_shifter_places_Z[0]), .B(exu_shifter_places_sn_N_2), .C(N_1723), .Y(N_2123_i) ); defparam \un174_shifter_result_1_1.N_2123_i .INIT=8'h65; // @46:10825 CFG4 \mul_mp_2[1] ( .A(exu_alu_operand0_Z[31]), .B(mul_mp_sn_N_6_mux), .C(un16_next_div_divisor_1_cry_1_S), .D(exu_alu_operand0_Z[1]), .Y(mul_mp_2_Z[1]) ); defparam \mul_mp_2[1] .INIT=16'hC480; // @46:10825 CFG4 \mul_mp_2[2] ( .A(exu_alu_operand0_Z[31]), .B(mul_mp_sn_N_6_mux), .C(un16_next_div_divisor_1_cry_2_S), .D(exu_alu_operand0_Z[2]), .Y(mul_mp_2_Z[2]) ); defparam \mul_mp_2[2] .INIT=16'hC480; // @46:10825 CFG4 \mul_mp_2[5] ( .A(exu_alu_operand0_Z[31]), .B(mul_mp_sn_N_6_mux), .C(exu_alu_operand0_Z[5]), .D(un16_next_div_divisor_1_cry_5_S), .Y(mul_mp_2_Z[5]) ); defparam \mul_mp_2[5] .INIT=16'hC840; // @46:10825 CFG4 \mul_mp_2[3] ( .A(exu_alu_operand0_Z[31]), .B(mul_mp_sn_N_6_mux), .C(un16_next_div_divisor_1_cry_3_S), .D(exu_alu_operand0_Z[3]), .Y(mul_mp_2_Z[3]) ); defparam \mul_mp_2[3] .INIT=16'hC480; // @46:10825 CFG4 \mul_mp_2[19] ( .A(exu_alu_operand0_Z[31]), .B(mul_mp_sn_N_6_mux), .C(exu_alu_operand0_Z[19]), .D(un16_next_div_divisor_1_cry_19_S), .Y(mul_mp_2_Z[19]) ); defparam \mul_mp_2[19] .INIT=16'hC840; // @46:10825 CFG4 \mul_mp_2[8] ( .A(exu_alu_operand0_Z[31]), .B(mul_mp_sn_N_6_mux), .C(exu_alu_operand0_Z[8]), .D(un16_next_div_divisor_1_cry_8_S), .Y(mul_mp_2_Z[8]) ); defparam \mul_mp_2[8] .INIT=16'hC840; // @46:10825 CFG4 \mul_mp_2[7] ( .A(exu_alu_operand0_Z[31]), .B(mul_mp_sn_N_6_mux), .C(exu_alu_operand0_Z[7]), .D(un16_next_div_divisor_1_cry_7_S), .Y(mul_mp_2_Z[7]) ); defparam \mul_mp_2[7] .INIT=16'hC840; // @46:10825 CFG4 \mul_mp_2[16] ( .A(exu_alu_operand0_Z[31]), .B(mul_mp_sn_N_6_mux), .C(exu_alu_operand0_Z[16]), .D(un16_next_div_divisor_1_cry_16_S), .Y(mul_mp_2_Z[16]) ); defparam \mul_mp_2[16] .INIT=16'hC840; // @46:10825 CFG4 \mul_mp_2[13] ( .A(exu_alu_operand0_Z[31]), .B(mul_mp_sn_N_6_mux), .C(exu_alu_operand0_Z[13]), .D(un16_next_div_divisor_1_cry_13_S), .Y(mul_mp_2_Z[13]) ); defparam \mul_mp_2[13] .INIT=16'hC840; // @46:10825 CFG4 \mul_mp_2[23] ( .A(exu_alu_operand0_Z[31]), .B(mul_mp_sn_N_6_mux), .C(exu_alu_operand0_Z[23]), .D(un16_next_div_divisor_1_cry_23_S), .Y(mul_mp_2_Z[23]) ); defparam \mul_mp_2[23] .INIT=16'hC840; // @46:10825 CFG4 \mul_mp_2[11] ( .A(exu_alu_operand0_Z[31]), .B(mul_mp_sn_N_6_mux), .C(exu_alu_operand0_Z[11]), .D(un16_next_div_divisor_1_cry_11_S), .Y(mul_mp_2_Z[11]) ); defparam \mul_mp_2[11] .INIT=16'hC840; // @46:10825 CFG4 \mul_mp_2[29] ( .A(exu_alu_operand0_Z[31]), .B(mul_mp_sn_N_6_mux), .C(exu_alu_operand0_Z[29]), .D(un16_next_div_divisor_1_cry_29_S), .Y(mul_mp_2_Z[29]) ); defparam \mul_mp_2[29] .INIT=16'hC840; // @46:10825 CFG4 \mul_mp_2[21] ( .A(exu_alu_operand0_Z[31]), .B(mul_mp_sn_N_6_mux), .C(exu_alu_operand0_Z[21]), .D(un16_next_div_divisor_1_cry_21_S), .Y(mul_mp_2_Z[21]) ); defparam \mul_mp_2[21] .INIT=16'hC840; // @46:10825 CFG4 \mul_mp_2[24] ( .A(exu_alu_operand0_Z[31]), .B(mul_mp_sn_N_6_mux), .C(exu_alu_operand0_Z[24]), .D(un16_next_div_divisor_1_cry_24_S), .Y(mul_mp_2_Z[24]) ); defparam \mul_mp_2[24] .INIT=16'hC840; // @46:11392 CFG4 mul_mp_pmux_1_1_0 ( .A(exu_alu_operand0_0), .B(mul_mp_e2), .C(mul_div_cnt_Z[5]), .D(exu_alu_operand1_0), .Y(N_1533_1) ); defparam mul_mp_pmux_1_1_0.INIT=16'h0704; // @46:10825 CFG4 \mul_mp_2[10] ( .A(exu_alu_operand0_Z[31]), .B(mul_mp_sn_N_6_mux), .C(exu_alu_operand0_Z[10]), .D(un16_next_div_divisor_1_cry_10_S), .Y(mul_mp_2_Z[10]) ); defparam \mul_mp_2[10] .INIT=16'hC840; // @46:10825 CFG4 \mul_mp_2[27] ( .A(exu_alu_operand0_Z[31]), .B(mul_mp_sn_N_6_mux), .C(exu_alu_operand0_Z[27]), .D(un16_next_div_divisor_1_cry_27_S), .Y(mul_mp_2_Z[27]) ); defparam \mul_mp_2[27] .INIT=16'hC840; // @46:10825 CFG4 \mul_mp_2[12] ( .A(exu_alu_operand0_Z[31]), .B(mul_mp_sn_N_6_mux), .C(exu_alu_operand0_Z[12]), .D(un16_next_div_divisor_1_cry_12_S), .Y(mul_mp_2_Z[12]) ); defparam \mul_mp_2[12] .INIT=16'hC840; // @46:10825 CFG4 \mul_mp_2[9] ( .A(exu_alu_operand0_Z[31]), .B(mul_mp_sn_N_6_mux), .C(exu_alu_operand0_Z[9]), .D(un16_next_div_divisor_1_cry_9_S), .Y(mul_mp_2_Z[9]) ); defparam \mul_mp_2[9] .INIT=16'hC840; // @46:10825 CFG4 \mul_mp_2[17] ( .A(exu_alu_operand0_Z[31]), .B(mul_mp_sn_N_6_mux), .C(exu_alu_operand0_Z[17]), .D(un16_next_div_divisor_1_cry_17_S), .Y(mul_mp_2_Z[17]) ); defparam \mul_mp_2[17] .INIT=16'hC840; // @46:10825 CFG4 \mul_mp_2[14] ( .A(exu_alu_operand0_Z[31]), .B(mul_mp_sn_N_6_mux), .C(exu_alu_operand0_Z[14]), .D(un16_next_div_divisor_1_cry_14_S), .Y(mul_mp_2_Z[14]) ); defparam \mul_mp_2[14] .INIT=16'hC840; // @46:10825 CFG4 \mul_mp_2[20] ( .A(exu_alu_operand0_Z[31]), .B(mul_mp_sn_N_6_mux), .C(exu_alu_operand0_Z[20]), .D(un16_next_div_divisor_1_cry_20_S), .Y(mul_mp_2_Z[20]) ); defparam \mul_mp_2[20] .INIT=16'hC840; // @46:10825 CFG4 \mul_mp_2[22] ( .A(exu_alu_operand0_Z[31]), .B(mul_mp_sn_N_6_mux), .C(exu_alu_operand0_Z[22]), .D(un16_next_div_divisor_1_cry_22_S), .Y(mul_mp_2_Z[22]) ); defparam \mul_mp_2[22] .INIT=16'hC840; // @46:10825 CFG4 \mul_mp_2[15] ( .A(exu_alu_operand0_Z[31]), .B(mul_mp_sn_N_6_mux), .C(exu_alu_operand0_Z[15]), .D(un16_next_div_divisor_1_cry_15_S), .Y(mul_mp_2_Z[15]) ); defparam \mul_mp_2[15] .INIT=16'hC840; // @46:10825 CFG4 \mul_mp_2[18] ( .A(exu_alu_operand0_Z[31]), .B(mul_mp_sn_N_6_mux), .C(exu_alu_operand0_Z[18]), .D(un16_next_div_divisor_1_cry_18_S), .Y(mul_mp_2_Z[18]) ); defparam \mul_mp_2[18] .INIT=16'hC840; // @46:10825 CFG4 \mul_mp_2[25] ( .A(exu_alu_operand0_Z[31]), .B(mul_mp_sn_N_6_mux), .C(exu_alu_operand0_Z[25]), .D(un16_next_div_divisor_1_cry_25_S), .Y(mul_mp_2_Z[25]) ); defparam \mul_mp_2[25] .INIT=16'hC840; // @46:10825 CFG4 \mul_mp_2[28] ( .A(exu_alu_operand0_Z[31]), .B(mul_mp_sn_N_6_mux), .C(exu_alu_operand0_Z[28]), .D(un16_next_div_divisor_1_cry_28_S), .Y(mul_mp_2_Z[28]) ); defparam \mul_mp_2[28] .INIT=16'hC840; // @46:10825 CFG4 \mul_mp_2[6] ( .A(exu_alu_operand0_Z[31]), .B(mul_mp_sn_N_6_mux), .C(exu_alu_operand0_Z[6]), .D(un16_next_div_divisor_1_cry_6_S), .Y(mul_mp_2_Z[6]) ); defparam \mul_mp_2[6] .INIT=16'hC840; // @46:10825 CFG4 \mul_mp_2[30] ( .A(exu_alu_operand0_Z[31]), .B(mul_mp_sn_N_6_mux), .C(exu_alu_operand0_Z[30]), .D(un16_next_div_divisor_1_cry_30_S), .Y(mul_mp_2_Z[30]) ); defparam \mul_mp_2[30] .INIT=16'hC840; // @46:10825 CFG4 \mul_mp_2[26] ( .A(exu_alu_operand0_Z[31]), .B(mul_mp_sn_N_6_mux), .C(exu_alu_operand0_Z[26]), .D(un16_next_div_divisor_1_cry_26_S), .Y(mul_mp_2_Z[26]) ); defparam \mul_mp_2[26] .INIT=16'hC840; // @46:10825 CFG4 \mul_mp_2[4] ( .A(exu_alu_operand0_Z[31]), .B(mul_mp_sn_N_6_mux), .C(un16_next_div_divisor_1_cry_4_S), .D(exu_alu_operand0_Z[4]), .Y(mul_mp_2_Z[4]) ); defparam \mul_mp_2[4] .INIT=16'hC480; // @46:11028 CFG2 \exu_alu_result_10_m_0[2] ( .A(exu_alu_operand0_Z[2]), .B(exu_alu_operand1_Z[2]), .Y(exu_alu_result_10_m_0_Z[2]) ); defparam \exu_alu_result_10_m_0[2] .INIT=4'h8; // @46:11028 CFG4 \exu_alu_result_26_m_RNI8PSHR[0] ( .A(N_4_i), .B(N_8_i), .C(exu_alu_result_26_m_Z[0]), .D(exu_alu_result_0_sqmuxa_2_a0_2_Z), .Y(exu_m4_0) ); defparam \exu_alu_result_26_m_RNI8PSHR[0] .INIT=16'h0E0F; // @46:9457 CFG3 exu_alu_result192_1_RNISHFFMD_0 ( .A(N_26_0), .B(exu_alu_result192_1_1z), .C(exu_alu_operand1_0), .Y(exu_alu_operand1_s0[0]) ); defparam exu_alu_result192_1_RNISHFFMD_0.INIT=8'h04; // @46:9457 CFG3 exu_alu_result192_1_RNISHFFMD ( .A(N_26_0), .B(exu_alu_result192_1_1z), .C(exu_alu_operand1_0), .Y(exu_alu_operand1_s1[0]) ); defparam exu_alu_result192_1_RNISHFFMD.INIT=8'h40; // @46:10828 CFG3 start_m1_e_1 ( .A(machine_implicit_wr_mtval_tval_wr_en), .B(trace_priv_i), .C(un2_exception_taken), .Y(start_m1_e_1_1z) ); defparam start_m1_e_1.INIT=8'h02; // @46:11028 CFG4 \exu_alu_result_6_m[18] ( .A(exu_alu_operand0_Z[18]), .B(exu_alu_operand1_Z[18]), .C(un1_alu_op_sel_int), .D(exu_alu_result193_a0_3_Z), .Y(exu_alu_result_6_m_Z[18]) ); defparam \exu_alu_result_6_m[18] .INIT=16'h0600; // @46:11028 CFG3 \exu_alu_result_8_m[18] ( .A(exu_alu_operand0_Z[18]), .B(exu_alu_result194_Z), .C(exu_alu_operand1_Z[18]), .Y(exu_alu_result_8_m_Z[18]) ); defparam \exu_alu_result_8_m[18] .INIT=8'hC8; // @46:11028 CFG4 \exu_alu_result_6_m[19] ( .A(exu_alu_operand0_Z[19]), .B(exu_alu_operand1_Z[19]), .C(un1_alu_op_sel_int), .D(exu_alu_result193_a0_3_Z), .Y(exu_alu_result_6_m_Z[19]) ); defparam \exu_alu_result_6_m[19] .INIT=16'h0600; // @46:11028 CFG3 \exu_alu_result_8_m[19] ( .A(exu_alu_operand0_Z[19]), .B(exu_alu_result194_Z), .C(exu_alu_operand1_Z[19]), .Y(exu_alu_result_8_m_Z[19]) ); defparam \exu_alu_result_8_m[19] .INIT=8'hC8; // @46:11028 CFG4 \exu_alu_result_6_m[21] ( .A(exu_alu_operand0_Z[21]), .B(exu_alu_operand1_Z[21]), .C(un1_alu_op_sel_int), .D(exu_alu_result193_a0_3_Z), .Y(exu_alu_result_6_m_Z[21]) ); defparam \exu_alu_result_6_m[21] .INIT=16'h0600; // @46:11028 CFG3 \exu_alu_result_8_m[21] ( .A(exu_alu_operand0_Z[21]), .B(exu_alu_result194_Z), .C(exu_alu_operand1_Z[21]), .Y(exu_alu_result_8_m_Z[21]) ); defparam \exu_alu_result_8_m[21] .INIT=8'hC8; // @46:11420 CFG4 un1_next_dividend_0_sqmuxa ( .A(div_ack_Z), .B(exu_alu_operand0_Z[31]), .C(un5_div_result), .D(un11_start_div), .Y(un1_next_dividend_0_sqmuxa_Z) ); defparam un1_next_dividend_0_sqmuxa.INIT=16'hEEEA; // @46:11028 CFG3 \exu_alu_result_8_m[3] ( .A(exu_alu_operand0_Z[3]), .B(exu_alu_result194_Z), .C(exu_alu_operand1_Z[3]), .Y(exu_alu_result_8_m_Z[3]) ); defparam \exu_alu_result_8_m[3] .INIT=8'hC8; // @46:11028 CFG2 \exu_alu_result_int_m[4] ( .A(exu_alu_result_int_Z[4]), .B(exu_N_4), .Y(exu_alu_result_int_m_Z[4]) ); defparam \exu_alu_result_int_m[4] .INIT=4'h2; // @46:11028 CFG4 \exu_alu_result_6_m[4] ( .A(exu_alu_operand0_Z[4]), .B(exu_alu_operand1_Z[4]), .C(un1_alu_op_sel_int), .D(exu_alu_result193_a0_3_Z), .Y(exu_alu_result_6_m_Z[4]) ); defparam \exu_alu_result_6_m[4] .INIT=16'h0600; // @46:11028 CFG2 \exu_alu_result_int_m[5] ( .A(exu_alu_result_int_Z[5]), .B(exu_N_4), .Y(exu_alu_result_int_m_Z[5]) ); defparam \exu_alu_result_int_m[5] .INIT=4'h2; // @46:11028 CFG4 \exu_alu_result_6_m[5] ( .A(exu_alu_operand0_Z[5]), .B(exu_alu_operand1_Z[5]), .C(un1_alu_op_sel_int), .D(exu_alu_result193_a0_3_Z), .Y(exu_alu_result_6_m_Z[5]) ); defparam \exu_alu_result_6_m[5] .INIT=16'h0600; // @46:11028 CFG2 \exu_alu_result_int_m[6] ( .A(exu_alu_result_int_Z[6]), .B(exu_N_4), .Y(exu_alu_result_int_m_Z[6]) ); defparam \exu_alu_result_int_m[6] .INIT=4'h2; // @46:11028 CFG3 \exu_alu_result_8_m[6] ( .A(exu_alu_operand0_Z[6]), .B(exu_alu_result194_Z), .C(exu_alu_operand1_Z[6]), .Y(exu_alu_result_8_m_Z[6]) ); defparam \exu_alu_result_8_m[6] .INIT=8'hC8; // @46:11028 CFG2 \exu_alu_result_int_m[7] ( .A(exu_alu_result_int_Z[7]), .B(exu_N_4), .Y(exu_alu_result_int_m_Z[7]) ); defparam \exu_alu_result_int_m[7] .INIT=4'h2; // @46:11028 CFG3 \exu_alu_result_8_m[7] ( .A(exu_alu_operand0_Z[7]), .B(exu_alu_result194_Z), .C(exu_alu_operand1_Z[7]), .Y(exu_alu_result_8_m_Z[7]) ); defparam \exu_alu_result_8_m[7] .INIT=8'hC8; // @46:11028 CFG2 \exu_alu_result_int_m[8] ( .A(exu_alu_result_int_Z[8]), .B(exu_N_4), .Y(exu_alu_result_int_m_Z[8]) ); defparam \exu_alu_result_int_m[8] .INIT=4'h2; // @46:11028 CFG3 \exu_alu_result_8_m[8] ( .A(exu_alu_operand0_Z[8]), .B(exu_alu_result194_Z), .C(exu_alu_operand1_Z[8]), .Y(exu_alu_result_8_m_Z[8]) ); defparam \exu_alu_result_8_m[8] .INIT=8'hC8; // @46:11028 CFG4 \exu_alu_result_6_m[9] ( .A(exu_alu_operand0_Z[9]), .B(exu_alu_operand1_Z[9]), .C(un1_alu_op_sel_int), .D(exu_alu_result193_a0_3_Z), .Y(exu_alu_result_6_m_Z[9]) ); defparam \exu_alu_result_6_m[9] .INIT=16'h0600; // @46:11028 CFG3 \exu_alu_result_8_m[9] ( .A(exu_alu_operand0_Z[9]), .B(exu_alu_result194_Z), .C(exu_alu_operand1_Z[9]), .Y(exu_alu_result_8_m_Z[9]) ); defparam \exu_alu_result_8_m[9] .INIT=8'hC8; // @46:11028 CFG4 \exu_alu_result_6_m[10] ( .A(exu_alu_operand0_Z[10]), .B(exu_alu_operand1_Z[10]), .C(un1_alu_op_sel_int), .D(exu_alu_result193_a0_3_Z), .Y(exu_alu_result_6_m_Z[10]) ); defparam \exu_alu_result_6_m[10] .INIT=16'h0600; // @46:11028 CFG3 \exu_alu_result_8_m[10] ( .A(exu_alu_operand0_Z[10]), .B(exu_alu_result194_Z), .C(exu_alu_operand1_Z[10]), .Y(exu_alu_result_8_m_Z[10]) ); defparam \exu_alu_result_8_m[10] .INIT=8'hC8; // @46:11028 CFG4 \exu_alu_result_6_m[11] ( .A(exu_alu_operand0_Z[11]), .B(exu_alu_operand1_Z[11]), .C(un1_alu_op_sel_int), .D(exu_alu_result193_a0_3_Z), .Y(exu_alu_result_6_m_Z[11]) ); defparam \exu_alu_result_6_m[11] .INIT=16'h0600; // @46:11028 CFG3 \exu_alu_result_8_m[11] ( .A(exu_alu_operand0_Z[11]), .B(exu_alu_result194_Z), .C(exu_alu_operand1_Z[11]), .Y(exu_alu_result_8_m_Z[11]) ); defparam \exu_alu_result_8_m[11] .INIT=8'hC8; // @46:11028 CFG4 \exu_alu_result_6_m[12] ( .A(exu_alu_operand0_Z[12]), .B(exu_alu_operand1_Z[12]), .C(un1_alu_op_sel_int), .D(exu_alu_result193_a0_3_Z), .Y(exu_alu_result_6_m_Z[12]) ); defparam \exu_alu_result_6_m[12] .INIT=16'h0600; // @46:11028 CFG3 \exu_alu_result_8_m[12] ( .A(exu_alu_operand0_Z[12]), .B(exu_alu_result194_Z), .C(exu_alu_operand1_Z[12]), .Y(exu_alu_result_8_m_Z[12]) ); defparam \exu_alu_result_8_m[12] .INIT=8'hC8; // @46:11028 CFG4 \exu_alu_result_6_m[13] ( .A(exu_alu_operand0_Z[13]), .B(exu_alu_operand1_Z[13]), .C(un1_alu_op_sel_int), .D(exu_alu_result193_a0_3_Z), .Y(exu_alu_result_6_m_Z[13]) ); defparam \exu_alu_result_6_m[13] .INIT=16'h0600; // @46:11028 CFG3 \exu_alu_result_8_m[13] ( .A(exu_alu_operand0_Z[13]), .B(exu_alu_result194_Z), .C(exu_alu_operand1_Z[13]), .Y(exu_alu_result_8_m_Z[13]) ); defparam \exu_alu_result_8_m[13] .INIT=8'hC8; // @46:11028 CFG4 \exu_alu_result_6_m[14] ( .A(exu_alu_operand0_Z[14]), .B(exu_alu_operand1_Z[14]), .C(un1_alu_op_sel_int), .D(exu_alu_result193_a0_3_Z), .Y(exu_alu_result_6_m_Z[14]) ); defparam \exu_alu_result_6_m[14] .INIT=16'h0600; // @46:11028 CFG3 \exu_alu_result_8_m[14] ( .A(exu_alu_operand0_Z[14]), .B(exu_alu_result194_Z), .C(exu_alu_operand1_Z[14]), .Y(exu_alu_result_8_m_Z[14]) ); defparam \exu_alu_result_8_m[14] .INIT=8'hC8; // @46:11028 CFG4 \exu_alu_result_6_m[15] ( .A(exu_alu_operand0_Z[15]), .B(exu_alu_operand1_Z[15]), .C(un1_alu_op_sel_int), .D(exu_alu_result193_a0_3_Z), .Y(exu_alu_result_6_m_Z[15]) ); defparam \exu_alu_result_6_m[15] .INIT=16'h0600; // @46:11028 CFG3 \exu_alu_result_8_m[15] ( .A(exu_alu_operand0_Z[15]), .B(exu_alu_result194_Z), .C(exu_alu_operand1_Z[15]), .Y(exu_alu_result_8_m_Z[15]) ); defparam \exu_alu_result_8_m[15] .INIT=8'hC8; // @46:11028 CFG4 \exu_alu_result_6_m[17] ( .A(exu_alu_operand0_Z[17]), .B(exu_alu_operand1_Z[17]), .C(un1_alu_op_sel_int), .D(exu_alu_result193_a0_3_Z), .Y(exu_alu_result_6_m_Z[17]) ); defparam \exu_alu_result_6_m[17] .INIT=16'h0600; // @46:11028 CFG3 \exu_alu_result_8_m[17] ( .A(exu_alu_operand0_Z[17]), .B(exu_alu_result194_Z), .C(exu_alu_operand1_Z[17]), .Y(exu_alu_result_8_m_Z[17]) ); defparam \exu_alu_result_8_m[17] .INIT=8'hC8; // @46:11028 CFG4 \exu_alu_result_6_m[20] ( .A(exu_alu_operand0_Z[20]), .B(exu_alu_operand1_Z[20]), .C(un1_alu_op_sel_int), .D(exu_alu_result193_a0_3_Z), .Y(exu_alu_result_6_m_Z[20]) ); defparam \exu_alu_result_6_m[20] .INIT=16'h0600; // @46:11028 CFG3 \exu_alu_result_8_m[20] ( .A(exu_alu_operand0_Z[20]), .B(exu_alu_result194_Z), .C(exu_alu_operand1_Z[20]), .Y(exu_alu_result_8_m_Z[20]) ); defparam \exu_alu_result_8_m[20] .INIT=8'hC8; // @46:11028 CFG4 \exu_alu_result_6_m[22] ( .A(exu_alu_operand0_Z[22]), .B(exu_alu_operand1_Z[22]), .C(un1_alu_op_sel_int), .D(exu_alu_result193_a0_3_Z), .Y(exu_alu_result_6_m_Z[22]) ); defparam \exu_alu_result_6_m[22] .INIT=16'h0600; // @46:11028 CFG3 \exu_alu_result_8_m[22] ( .A(exu_alu_operand0_Z[22]), .B(exu_alu_result194_Z), .C(exu_alu_operand1_Z[22]), .Y(exu_alu_result_8_m_Z[22]) ); defparam \exu_alu_result_8_m[22] .INIT=8'hC8; // @46:11028 CFG4 \exu_alu_result_6_m[23] ( .A(exu_alu_operand0_Z[23]), .B(exu_alu_operand1_Z[23]), .C(un1_alu_op_sel_int), .D(exu_alu_result193_a0_3_Z), .Y(exu_alu_result_6_m_Z[23]) ); defparam \exu_alu_result_6_m[23] .INIT=16'h0600; // @46:11028 CFG3 \exu_alu_result_8_m[23] ( .A(exu_alu_operand0_Z[23]), .B(exu_alu_result194_Z), .C(exu_alu_operand1_Z[23]), .Y(exu_alu_result_8_m_Z[23]) ); defparam \exu_alu_result_8_m[23] .INIT=8'hC8; // @46:11028 CFG3 \exu_alu_result_8_m[24] ( .A(exu_alu_operand0_Z[24]), .B(exu_alu_result194_Z), .C(exu_alu_operand1_Z[24]), .Y(exu_alu_result_8_m_Z[24]) ); defparam \exu_alu_result_8_m[24] .INIT=8'hC8; // @46:11028 CFG4 \exu_alu_result_6_m[25] ( .A(exu_alu_operand0_Z[25]), .B(exu_alu_operand1_Z[25]), .C(un1_alu_op_sel_int), .D(exu_alu_result193_a0_3_Z), .Y(exu_alu_result_6_m_Z[25]) ); defparam \exu_alu_result_6_m[25] .INIT=16'h0600; // @46:11028 CFG3 \exu_alu_result_8_m[25] ( .A(exu_alu_operand0_Z[25]), .B(exu_alu_result194_Z), .C(exu_alu_operand1_Z[25]), .Y(exu_alu_result_8_m_Z[25]) ); defparam \exu_alu_result_8_m[25] .INIT=8'hC8; // @46:11028 CFG4 \exu_alu_result_6_m[26] ( .A(exu_alu_operand0_Z[26]), .B(exu_alu_operand1_Z[26]), .C(un1_alu_op_sel_int), .D(exu_alu_result193_a0_3_Z), .Y(exu_alu_result_6_m_Z[26]) ); defparam \exu_alu_result_6_m[26] .INIT=16'h0600; // @46:11028 CFG3 \exu_alu_result_8_m[26] ( .A(exu_alu_operand0_Z[26]), .B(exu_alu_result194_Z), .C(exu_alu_operand1_Z[26]), .Y(exu_alu_result_8_m_Z[26]) ); defparam \exu_alu_result_8_m[26] .INIT=8'hC8; // @46:11028 CFG4 \exu_alu_result_6_m[27] ( .A(exu_alu_operand0_Z[27]), .B(exu_alu_operand1_Z[27]), .C(un1_alu_op_sel_int), .D(exu_alu_result193_a0_3_Z), .Y(exu_alu_result_6_m_Z[27]) ); defparam \exu_alu_result_6_m[27] .INIT=16'h0600; // @46:11028 CFG3 \exu_alu_result_8_m[27] ( .A(exu_alu_operand0_Z[27]), .B(exu_alu_result194_Z), .C(exu_alu_operand1_Z[27]), .Y(exu_alu_result_8_m_Z[27]) ); defparam \exu_alu_result_8_m[27] .INIT=8'hC8; // @46:11028 CFG4 \exu_alu_result_6_m[29] ( .A(exu_alu_operand0_Z[29]), .B(exu_alu_operand1_Z[29]), .C(un1_alu_op_sel_int), .D(exu_alu_result193_a0_3_Z), .Y(exu_alu_result_6_m_Z[29]) ); defparam \exu_alu_result_6_m[29] .INIT=16'h0600; // @46:11028 CFG3 \exu_alu_result_8_m[29] ( .A(exu_alu_operand0_Z[29]), .B(exu_alu_result194_Z), .C(exu_alu_operand1_Z[29]), .Y(exu_alu_result_8_m_Z[29]) ); defparam \exu_alu_result_8_m[29] .INIT=8'hC8; // @46:11028 CFG4 \exu_alu_result_6_m[30] ( .A(exu_alu_operand0_Z[30]), .B(exu_alu_operand1_Z[30]), .C(un1_alu_op_sel_int), .D(exu_alu_result193_a0_3_Z), .Y(exu_alu_result_6_m_Z[30]) ); defparam \exu_alu_result_6_m[30] .INIT=16'h0600; // @46:11028 CFG3 \exu_alu_result_8_m[30] ( .A(exu_alu_operand0_Z[30]), .B(exu_alu_result194_Z), .C(exu_alu_operand1_Z[30]), .Y(exu_alu_result_8_m_Z[30]) ); defparam \exu_alu_result_8_m[30] .INIT=8'hC8; // @46:11028 CFG4 \exu_alu_result_6_m[31] ( .A(exu_alu_operand0_Z[31]), .B(exu_alu_operand1_Z[31]), .C(un1_alu_op_sel_int), .D(exu_alu_result193_a0_3_Z), .Y(exu_alu_result_6_m_Z[31]) ); defparam \exu_alu_result_6_m[31] .INIT=16'h0600; // @46:11028 CFG3 \exu_alu_result_8_m[31] ( .A(exu_alu_operand0_Z[31]), .B(exu_alu_result194_Z), .C(exu_alu_operand1_Z[31]), .Y(exu_alu_result_8_m_Z[31]) ); defparam \exu_alu_result_8_m[31] .INIT=8'hC8; // @46:11028 CFG3 \exu_alu_result_8_m[16] ( .A(exu_alu_operand0_Z[16]), .B(exu_alu_result194_Z), .C(exu_alu_operand1_Z[16]), .Y(exu_alu_result_8_m_Z[16]) ); defparam \exu_alu_result_8_m[16] .INIT=8'hC8; // @46:11028 CFG4 \exu_alu_result_6_m[16] ( .A(exu_alu_operand0_Z[16]), .B(exu_alu_operand1_Z[16]), .C(un1_alu_op_sel_int), .D(exu_alu_result193_a0_3_Z), .Y(exu_alu_result_6_m_Z[16]) ); defparam \exu_alu_result_6_m[16] .INIT=16'h0600; // @46:11028 CFG3 \exu_alu_result_8_m[28] ( .A(exu_alu_operand0_Z[28]), .B(exu_alu_result194_Z), .C(exu_alu_operand1_Z[28]), .Y(exu_alu_result_8_m_Z[28]) ); defparam \exu_alu_result_8_m[28] .INIT=8'hC8; // @46:11028 CFG4 \exu_alu_result_6_m[28] ( .A(exu_alu_operand0_Z[28]), .B(exu_alu_operand1_Z[28]), .C(un1_alu_op_sel_int), .D(exu_alu_result193_a0_3_Z), .Y(exu_alu_result_6_m_Z[28]) ); defparam \exu_alu_result_6_m[28] .INIT=16'h0600; // @46:11282 CFG4 exu_alu_result195_2_3_0_RNITQ0FE2 ( .A(un8_mul_mp), .B(d_m2_e_1_0), .C(un5_mul_mc), .D(m29_0), .Y(slow_N_3_mux_i) ); defparam exu_alu_result195_2_3_0_RNITQ0FE2.INIT=16'hFEFA; // @46:11244 CFG4 \lsu_align_result_7_0_1[31] ( .A(exu_shifter_operand[29]), .B(exu_shifter_operand[30]), .C(N_2123_i), .D(exu_shifter_places_Z[0]), .Y(N_512_1) ); defparam \lsu_align_result_7_0_1[31] .INIT=16'h0C0A; // @46:11244 CFG4 \lsu_align_result_35_1[1] ( .A(exu_shifter_operand[2]), .B(exu_shifter_operand[3]), .C(N_2123_i), .D(exu_shifter_places_Z[0]), .Y(N_1092_1) ); defparam \lsu_align_result_35_1[1] .INIT=16'h0A0C; // @46:11244 CFG4 \lsu_align_result_39_0_1[0] ( .A(exu_shifter_operand[1]), .B(exu_shifter_operand[2]), .C(exu_shifter_places_Z[0]), .D(N_2123_i), .Y(N_505_1) ); defparam \lsu_align_result_39_0_1[0] .INIT=16'h00AC; // @46:11244 CFG4 \lsu_align_result_7_0_1[30] ( .A(exu_shifter_operand[28]), .B(exu_shifter_operand[29]), .C(N_2123_i), .D(exu_shifter_places_Z[0]), .Y(N_533_1) ); defparam \lsu_align_result_7_0_1[30] .INIT=16'h0C0A; // @46:10867 CFG4 \exu_alu_result_26[17] ( .A(res_pos_neg_Z), .B(N_1269), .C(un1_div_result_11[17]), .D(N_1250_i), .Y(exu_alu_result_26_Z[17]) ); defparam \exu_alu_result_26[17] .INIT=16'hE466; // @46:10867 CFG4 \exu_alu_result_26[31] ( .A(res_pos_neg_Z), .B(N_1283), .C(un1_div_result_11[31]), .D(N_1250_i), .Y(exu_alu_result_26_Z[31]) ); defparam \exu_alu_result_26[31] .INIT=16'hE466; // @46:10867 CFG4 \exu_alu_result_26[19] ( .A(res_pos_neg_Z), .B(N_1271), .C(un1_div_result_11[19]), .D(N_1250_i), .Y(exu_alu_result_26_Z[19]) ); defparam \exu_alu_result_26[19] .INIT=16'hE466; // @46:10867 CFG4 \exu_alu_result_26[24] ( .A(res_pos_neg_Z), .B(N_1276), .C(un1_div_result_11[24]), .D(N_1250_i), .Y(exu_alu_result_26_Z[24]) ); defparam \exu_alu_result_26[24] .INIT=16'hE466; // @46:10867 CFG4 \exu_alu_result_26[25] ( .A(res_pos_neg_Z), .B(N_1277), .C(un1_div_result_11[25]), .D(N_1250_i), .Y(exu_alu_result_26_Z[25]) ); defparam \exu_alu_result_26[25] .INIT=16'hE466; // @46:10867 CFG4 \exu_alu_result_26[15] ( .A(res_pos_neg_Z), .B(N_1267), .C(un1_div_result_11[15]), .D(N_1250_i), .Y(exu_alu_result_26_Z[15]) ); defparam \exu_alu_result_26[15] .INIT=16'hE466; // @46:10867 CFG4 \exu_alu_result_26[6] ( .A(res_pos_neg_Z), .B(N_1256), .C(un1_div_result_11[6]), .D(N_1250_i), .Y(exu_alu_result_26_Z[6]) ); defparam \exu_alu_result_26[6] .INIT=16'hE466; // @46:10867 CFG4 \exu_alu_result_26[8] ( .A(res_pos_neg_Z), .B(N_1258), .C(un1_div_result_11[8]), .D(N_1250_i), .Y(exu_alu_result_26_Z[8]) ); defparam \exu_alu_result_26[8] .INIT=16'hE466; // @46:10867 CFG4 \exu_alu_result_26[5] ( .A(res_pos_neg_Z), .B(N_1255), .C(un1_div_result_11[5]), .D(N_1250_i), .Y(exu_alu_result_26_Z[5]) ); defparam \exu_alu_result_26[5] .INIT=16'hE466; // @46:10867 CFG4 \exu_alu_result_26[20] ( .A(res_pos_neg_Z), .B(N_1272), .C(un1_div_result_11[20]), .D(N_1250_i), .Y(exu_alu_result_26_Z[20]) ); defparam \exu_alu_result_26[20] .INIT=16'hE466; // @46:10867 CFG4 \exu_alu_result_26[26] ( .A(res_pos_neg_Z), .B(N_1278), .C(un1_div_result_11[26]), .D(N_1250_i), .Y(exu_alu_result_26_Z[26]) ); defparam \exu_alu_result_26[26] .INIT=16'hE466; // @46:10867 CFG4 \exu_alu_result_26[29] ( .A(res_pos_neg_Z), .B(N_1281), .C(un1_div_result_11[29]), .D(N_1250_i), .Y(exu_alu_result_26_Z[29]) ); defparam \exu_alu_result_26[29] .INIT=16'hE466; // @46:10867 CFG4 \exu_alu_result_26[7] ( .A(res_pos_neg_Z), .B(N_1257), .C(un1_div_result_11[7]), .D(N_1250_i), .Y(exu_alu_result_26_Z[7]) ); defparam \exu_alu_result_26[7] .INIT=16'hE466; // @46:10867 CFG4 \exu_alu_result_26[14] ( .A(res_pos_neg_Z), .B(N_1266), .C(un1_div_result_11[14]), .D(N_1250_i), .Y(exu_alu_result_26_Z[14]) ); defparam \exu_alu_result_26[14] .INIT=16'hE466; // @46:10826 CFG2 exu_alu_result_int_cry_16_RNO_0 ( .A(exu_alu_operand0_Z[31]), .B(exu_alu_operand1_Z[16]), .Y(N_1664_1) ); defparam exu_alu_result_int_cry_16_RNO_0.INIT=4'h4; // @46:10826 CFG2 exu_alu_result_int_cry_15_RNO_0 ( .A(exu_alu_operand0_Z[31]), .B(exu_alu_operand1_Z[15]), .Y(N_1663_1) ); defparam exu_alu_result_int_cry_15_RNO_0.INIT=4'h4; // @46:10826 CFG2 exu_alu_result_int_cry_14_RNO_0 ( .A(exu_alu_operand0_Z[31]), .B(exu_alu_operand1_Z[14]), .Y(N_1662_1) ); defparam exu_alu_result_int_cry_14_RNO_0.INIT=4'h4; // @46:10826 CFG2 exu_alu_result_int_cry_17_RNO_0 ( .A(exu_alu_operand0_Z[31]), .B(exu_alu_operand1_Z[17]), .Y(N_1665_1) ); defparam exu_alu_result_int_cry_17_RNO_0.INIT=4'h4; // @46:11028 CFG4 \exu_alu_result_26_m_i_m2[22] ( .A(res_pos_neg_Z), .B(exu_alu_result_26_m_i_m2_RNO_Z[22]), .C(un1_div_result_11[22]), .D(N_1250_i), .Y(N_60) ); defparam \exu_alu_result_26_m_i_m2[22] .INIT=16'hE466; // @46:10826 CFG2 exu_alu_result_int_cry_30_RNO_0 ( .A(exu_alu_operand0_Z[31]), .B(exu_alu_operand1_Z[30]), .Y(N_1678_1) ); defparam exu_alu_result_int_cry_30_RNO_0.INIT=4'h4; // @46:10867 CFG4 \exu_alu_result_26[18] ( .A(res_pos_neg_Z), .B(N_1270), .C(un1_div_result_11[18]), .D(N_1250_i), .Y(exu_alu_result_26_Z[18]) ); defparam \exu_alu_result_26[18] .INIT=16'hE466; // @46:10826 CFG2 exu_alu_result_int_cry_8_RNO_0 ( .A(exu_alu_operand0_Z[31]), .B(exu_alu_operand1_Z[8]), .Y(N_1656_1) ); defparam exu_alu_result_int_cry_8_RNO_0.INIT=4'h4; // @46:10867 CFG4 \exu_alu_result_26[21] ( .A(res_pos_neg_Z), .B(exu_alu_result_26_1_Z[21]), .C(un1_div_result_11[21]), .D(N_1250_i), .Y(exu_alu_result_26_Z[21]) ); defparam \exu_alu_result_26[21] .INIT=16'hE466; // @46:10826 CFG2 exu_alu_result_int_cry_9_RNO_0 ( .A(exu_alu_operand0_Z[31]), .B(exu_alu_operand1_Z[9]), .Y(N_1657_1) ); defparam exu_alu_result_int_cry_9_RNO_0.INIT=4'h4; // @46:10826 CFG2 exu_alu_result_int_cry_25_RNO_0 ( .A(exu_alu_operand0_Z[31]), .B(exu_alu_operand1_Z[25]), .Y(N_1673_1) ); defparam exu_alu_result_int_cry_25_RNO_0.INIT=4'h4; // @46:10867 CFG4 \exu_alu_result_26[16] ( .A(res_pos_neg_Z), .B(N_1268), .C(un1_div_result_11[16]), .D(N_1250_i), .Y(exu_alu_result_26_Z[16]) ); defparam \exu_alu_result_26[16] .INIT=16'hE466; // @46:10867 CFG4 \exu_alu_result_26[27] ( .A(res_pos_neg_Z), .B(N_1279), .C(un1_div_result_11[27]), .D(N_1250_i), .Y(exu_alu_result_26_Z[27]) ); defparam \exu_alu_result_26[27] .INIT=16'hE466; // @46:10867 CFG4 \exu_alu_result_26[2] ( .A(res_pos_neg_Z), .B(N_2194), .C(un1_div_result_11[2]), .D(N_1250_i), .Y(exu_alu_result_26_Z[2]) ); defparam \exu_alu_result_26[2] .INIT=16'hE466; // @46:10867 CFG4 \exu_alu_result_26[13] ( .A(res_pos_neg_Z), .B(N_1265), .C(un1_div_result_11[13]), .D(N_1250_i), .Y(exu_alu_result_26_Z[13]) ); defparam \exu_alu_result_26[13] .INIT=16'hE466; // @46:10826 CFG2 exu_alu_result_int_cry_28_RNO_0 ( .A(exu_alu_operand0_Z[31]), .B(exu_alu_operand1_Z[28]), .Y(N_1676_1) ); defparam exu_alu_result_int_cry_28_RNO_0.INIT=4'h4; // @46:10826 CFG2 exu_alu_result_int_cry_29_RNO_0 ( .A(exu_alu_operand0_Z[31]), .B(exu_alu_operand1_Z[29]), .Y(N_1677_1) ); defparam exu_alu_result_int_cry_29_RNO_0.INIT=4'h4; // @46:10826 CFG2 exu_alu_result_int_cry_26_RNO_0 ( .A(exu_alu_operand0_Z[31]), .B(exu_alu_operand1_Z[26]), .Y(N_1674_1) ); defparam exu_alu_result_int_cry_26_RNO_0.INIT=4'h4; // @46:10867 CFG4 \exu_alu_result_26[30] ( .A(res_pos_neg_Z), .B(N_1282), .C(un1_div_result_11[30]), .D(N_1250_i), .Y(exu_alu_result_26_Z[30]) ); defparam \exu_alu_result_26[30] .INIT=16'hE466; // @46:10867 CFG4 \exu_alu_result_26[23] ( .A(res_pos_neg_Z), .B(N_1275), .C(un1_div_result_11[23]), .D(N_1250_i), .Y(exu_alu_result_26_Z[23]) ); defparam \exu_alu_result_26[23] .INIT=16'hE466; // @46:10867 CFG4 \exu_alu_result_26[4] ( .A(res_pos_neg_Z), .B(N_1254), .C(un1_div_result_11[4]), .D(N_1250_i), .Y(exu_alu_result_26_Z[4]) ); defparam \exu_alu_result_26[4] .INIT=16'hE466; // @46:10867 CFG4 \exu_alu_result_26[9] ( .A(res_pos_neg_Z), .B(N_1261), .C(un1_div_result_11[9]), .D(N_1250_i), .Y(exu_alu_result_26_Z[9]) ); defparam \exu_alu_result_26[9] .INIT=16'hE466; // @46:10867 CFG4 \exu_alu_result_26[10] ( .A(res_pos_neg_Z), .B(N_1262), .C(un1_div_result_11[10]), .D(N_1250_i), .Y(exu_alu_result_26_Z[10]) ); defparam \exu_alu_result_26[10] .INIT=16'hE466; // @46:10826 CFG2 exu_alu_result_int_cry_27_RNO_0 ( .A(exu_alu_operand0_Z[31]), .B(exu_alu_operand1_Z[27]), .Y(N_1675_1) ); defparam exu_alu_result_int_cry_27_RNO_0.INIT=4'h4; // @46:10826 CFG2 exu_alu_result_int_cry_7_RNO_0 ( .A(exu_alu_operand0_Z[31]), .B(exu_alu_operand1_Z[7]), .Y(N_1655_1) ); defparam exu_alu_result_int_cry_7_RNO_0.INIT=4'h4; // @46:10867 CFG4 \exu_alu_result_26[3] ( .A(res_pos_neg_Z), .B(N_1253), .C(un1_div_result_11[3]), .D(N_1250_i), .Y(exu_alu_result_26_Z[3]) ); defparam \exu_alu_result_26[3] .INIT=16'hE466; // @46:10826 CFG2 exu_alu_result_int_cry_12_RNO_0 ( .A(exu_alu_operand0_Z[31]), .B(exu_alu_operand1_Z[12]), .Y(N_1660_1) ); defparam exu_alu_result_int_cry_12_RNO_0.INIT=4'h4; // @46:10826 CFG2 exu_alu_result_int_cry_11_RNO_0 ( .A(exu_alu_operand0_Z[31]), .B(exu_alu_operand1_Z[11]), .Y(N_1659_1) ); defparam exu_alu_result_int_cry_11_RNO_0.INIT=4'h4; // @46:10826 CFG2 exu_alu_result_int_cry_24_RNO_0 ( .A(exu_alu_operand0_Z[31]), .B(exu_alu_operand1_Z[24]), .Y(N_1672_1) ); defparam exu_alu_result_int_cry_24_RNO_0.INIT=4'h4; // @46:10867 CFG4 \exu_alu_result_26[12] ( .A(res_pos_neg_Z), .B(N_1264), .C(un1_div_result_11[12]), .D(N_1250_i), .Y(exu_alu_result_26_Z[12]) ); defparam \exu_alu_result_26[12] .INIT=16'hE466; // @46:10826 CFG2 exu_alu_result_int_cry_19_RNO_0 ( .A(exu_alu_operand0_Z[31]), .B(exu_alu_operand1_Z[19]), .Y(N_1667_1) ); defparam exu_alu_result_int_cry_19_RNO_0.INIT=4'h4; // @46:10826 CFG2 exu_alu_result_int_cry_13_RNO_0 ( .A(exu_alu_operand0_Z[31]), .B(exu_alu_operand1_Z[13]), .Y(N_1661_1) ); defparam exu_alu_result_int_cry_13_RNO_0.INIT=4'h4; // @46:10826 CFG2 exu_alu_result_int_cry_23_RNO_0 ( .A(exu_alu_operand0_Z[31]), .B(exu_alu_operand1_Z[23]), .Y(N_1671_1) ); defparam exu_alu_result_int_cry_23_RNO_0.INIT=4'h4; // @46:10826 CFG2 exu_alu_result_int_cry_22_RNO_0 ( .A(exu_alu_operand0_Z[31]), .B(exu_alu_operand1_Z[22]), .Y(N_1670_1) ); defparam exu_alu_result_int_cry_22_RNO_0.INIT=4'h4; // @46:10867 CFG4 \exu_alu_result_26[11] ( .A(res_pos_neg_Z), .B(N_1263), .C(un1_div_result_11[11]), .D(N_1250_i), .Y(exu_alu_result_26_Z[11]) ); defparam \exu_alu_result_26[11] .INIT=16'hE466; // @46:10826 CFG2 exu_alu_result_int_cry_10_RNO_0 ( .A(exu_alu_operand0_Z[31]), .B(exu_alu_operand1_Z[10]), .Y(N_1658_1) ); defparam exu_alu_result_int_cry_10_RNO_0.INIT=4'h4; // @46:10867 CFG4 \exu_alu_result_26[28] ( .A(res_pos_neg_Z), .B(N_1280), .C(un1_div_result_11[28]), .D(N_1250_i), .Y(exu_alu_result_26_Z[28]) ); defparam \exu_alu_result_26[28] .INIT=16'hE466; // @46:10826 CFG2 exu_alu_result_int_cry_20_RNO_0 ( .A(exu_alu_operand0_Z[31]), .B(exu_alu_operand1_Z[20]), .Y(N_1668_1) ); defparam exu_alu_result_int_cry_20_RNO_0.INIT=4'h4; // @46:10826 CFG2 exu_alu_result_int_cry_21_RNO_0 ( .A(exu_alu_operand0_Z[31]), .B(exu_alu_operand1_Z[21]), .Y(N_1669_1) ); defparam exu_alu_result_int_cry_21_RNO_0.INIT=4'h4; // @46:10826 CFG2 exu_alu_result_int_cry_5_RNO_0 ( .A(exu_alu_operand0_Z[31]), .B(exu_alu_operand1_Z[5]), .Y(N_1653_1) ); defparam exu_alu_result_int_cry_5_RNO_0.INIT=4'h4; // @46:10826 CFG2 exu_alu_result_int_cry_4_RNO_0 ( .A(exu_alu_operand0_Z[31]), .B(exu_alu_operand1_Z[4]), .Y(N_1652_1) ); defparam exu_alu_result_int_cry_4_RNO_0.INIT=4'h4; // @46:10826 CFG2 exu_alu_result_int_cry_18_RNO_0 ( .A(exu_alu_operand0_Z[31]), .B(exu_alu_operand1_Z[18]), .Y(N_1666_1) ); defparam exu_alu_result_int_cry_18_RNO_0.INIT=4'h4; // @46:10826 CFG2 exu_alu_result_int_cry_3_RNO_0 ( .A(exu_alu_operand0_Z[31]), .B(exu_alu_operand1_Z[3]), .Y(N_1651_1) ); defparam exu_alu_result_int_cry_3_RNO_0.INIT=4'h4; // @46:10826 CFG2 exu_alu_result_int_cry_6_RNO_0 ( .A(exu_alu_operand0_Z[31]), .B(exu_alu_operand1_Z[6]), .Y(N_1654_1) ); defparam exu_alu_result_int_cry_6_RNO_0.INIT=4'h4; // @46:11383 CFG4 \next_exu_result_reg_int_0_1[31] ( .A(trace_priv_i), .B(exu_result_reg_int_Z[32]), .C(mul_mp_pmux), .D(exu_alu_result_int_cry_0_Y), .Y(N_1353_1) ); defparam \next_exu_result_reg_int_0_1[31] .INIT=16'h5404; // @46:10826 CFG4 exu_alu_result_int_cry_31_RNO_0 ( .A(exu_alu_operand1_Z[31]), .B(exu_alu_operand0_0), .C(un23_mulh_mc0[31]), .D(exu_alu_operand0_Z[31]), .Y(N_1679) ); defparam exu_alu_result_int_cry_31_RNO_0.INIT=16'hC0AA; // @46:11028 CFG4 exu_alu_result192_0_s_RNIP356V ( .A(exu_alu_result192_0_out), .B(exu_alu_result193_a0_3_1_Z), .C(un6_exu_alu_result1_m_a0_4_0[0]), .D(N_6_i), .Y(un6_exu_alu_result1_m_a0_4[0]) ); defparam exu_alu_result192_0_s_RNIP356V.INIT=16'h0080; // @46:11244 CFG4 \lsu_align_result_3[3] ( .A(N_338), .B(N_2123_i), .C(exu_shifter_operand[0]), .D(exu_shifter_places_Z[0]), .Y(N_70) ); defparam \lsu_align_result_3[3] .INIT=16'hE222; // @46:11244 CFG3 \lsu_align_result_3[4] ( .A(N_337), .B(N_2123_i), .C(N_339), .Y(N_71) ); defparam \lsu_align_result_3[4] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_3[5] ( .A(N_338), .B(N_2123_i), .C(N_340), .Y(N_72) ); defparam \lsu_align_result_3[5] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_3[6] ( .A(N_339), .B(N_2123_i), .C(N_341), .Y(N_73) ); defparam \lsu_align_result_3[6] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_3[24] ( .A(N_25), .B(N_2123_i), .C(N_27), .Y(N_91) ); defparam \lsu_align_result_3[24] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_3[25] ( .A(N_26), .B(N_2123_i), .C(N_28), .Y(N_92) ); defparam \lsu_align_result_3[25] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_3[26] ( .A(N_27), .B(N_2123_i), .C(N_29), .Y(N_93) ); defparam \lsu_align_result_3[26] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_3[27] ( .A(N_28), .B(N_2123_i), .C(N_30), .Y(N_94) ); defparam \lsu_align_result_3[27] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_35[4] ( .A(N_1031), .B(N_2123_i), .C(N_1033), .Y(N_1095) ); defparam \lsu_align_result_35[4] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_35[7] ( .A(N_1034), .B(N_2123_i), .C(N_1036), .Y(N_1098) ); defparam \lsu_align_result_35[7] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_35[8] ( .A(N_1035), .B(N_2123_i), .C(N_1067), .Y(N_1099) ); defparam \lsu_align_result_35[8] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_35[9] ( .A(N_1036), .B(N_2123_i), .C(N_1068), .Y(N_1100) ); defparam \lsu_align_result_35[9] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_35[10] ( .A(N_1067), .B(N_2123_i), .C(N_1131), .Y(N_1101) ); defparam \lsu_align_result_35[10] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_35[11] ( .A(N_1068), .B(N_2123_i), .C(N_1132), .Y(N_1102) ); defparam \lsu_align_result_35[11] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_35[12] ( .A(N_1131), .B(N_2123_i), .C(N_1163), .Y(N_1103) ); defparam \lsu_align_result_35[12] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_35[13] ( .A(N_1132), .B(N_1164), .C(N_2123_i), .Y(N_1104) ); defparam \lsu_align_result_35[13] .INIT=8'hCA; // @46:11244 CFG3 \lsu_align_result_35[14] ( .A(N_1163), .B(N_2123_i), .C(N_1259), .Y(N_1105) ); defparam \lsu_align_result_35[14] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_35[15] ( .A(N_1164), .B(N_2123_i), .C(N_1260), .Y(N_1106) ); defparam \lsu_align_result_35[15] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_35[16] ( .A(N_1259), .B(N_2123_i), .C(N_1291), .Y(N_1107) ); defparam \lsu_align_result_35[16] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_35[17] ( .A(N_1260), .B(N_2123_i), .C(N_1292), .Y(N_1108) ); defparam \lsu_align_result_35[17] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_35[18] ( .A(N_1291), .B(N_1355), .C(N_2123_i), .Y(N_1109) ); defparam \lsu_align_result_35[18] .INIT=8'hCA; // @46:11244 CFG3 \lsu_align_result_35[19] ( .A(N_1292), .B(N_1356), .C(N_2123_i), .Y(N_1110) ); defparam \lsu_align_result_35[19] .INIT=8'hCA; // @46:11244 CFG3 \lsu_align_result_35[24] ( .A(N_1515), .B(N_2123_i), .C(N_1547), .Y(N_1115) ); defparam \lsu_align_result_35[24] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_35[25] ( .A(N_1516), .B(N_2123_i), .C(N_1548), .Y(N_1116) ); defparam \lsu_align_result_35[25] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_35[27] ( .A(N_1548), .B(N_1612), .C(N_2123_i), .Y(N_1118) ); defparam \lsu_align_result_35[27] .INIT=8'hCA; // @46:11244 CFG3 \lsu_align_result_35[28] ( .A(N_1611), .B(N_2123_i), .C(N_1643), .Y(N_1119) ); defparam \lsu_align_result_35[28] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_14_0[24] ( .A(N_349), .B(N_2123_i), .C(N_351), .Y(N_568) ); defparam \lsu_align_result_14_0[24] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_14_0[30] ( .A(N_23), .B(N_2123_i), .C(N_25), .Y(N_582) ); defparam \lsu_align_result_14_0[30] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_14_0[28] ( .A(N_23), .B(N_353), .C(N_2123_i), .Y(N_596) ); defparam \lsu_align_result_14_0[28] .INIT=8'hCA; // @46:11244 CFG3 \lsu_align_result_14_0[26] ( .A(N_351), .B(N_353), .C(N_2123_i), .Y(N_610) ); defparam \lsu_align_result_14_0[26] .INIT=8'hAC; // @46:11244 CFG3 \lsu_align_result_14_0[16] ( .A(N_341), .B(N_2123_i), .C(N_343), .Y(N_750) ); defparam \lsu_align_result_14_0[16] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_14_0[20] ( .A(N_345), .B(N_2123_i), .C(N_347), .Y(N_757) ); defparam \lsu_align_result_14_0[20] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_14_0[22] ( .A(N_347), .B(N_2123_i), .C(N_349), .Y(N_764) ); defparam \lsu_align_result_14_0[22] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_14_0[18] ( .A(N_343), .B(N_2123_i), .C(N_345), .Y(N_778) ); defparam \lsu_align_result_14_0[18] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_14_0[31] ( .A(N_24), .B(N_2123_i), .C(N_26), .Y(N_575) ); defparam \lsu_align_result_14_0[31] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_14_0[29] ( .A(N_24), .B(N_2123_i), .C(N_354), .Y(N_589) ); defparam \lsu_align_result_14_0[29] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_14_0[27] ( .A(N_352), .B(N_2123_i), .C(N_354), .Y(N_603) ); defparam \lsu_align_result_14_0[27] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_14_0[25] ( .A(N_350), .B(N_2123_i), .C(N_352), .Y(N_617) ); defparam \lsu_align_result_14_0[25] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_14_0[23] ( .A(N_348), .B(N_2123_i), .C(N_350), .Y(N_736) ); defparam \lsu_align_result_14_0[23] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_14_0[21] ( .A(N_346), .B(N_2123_i), .C(N_348), .Y(N_771) ); defparam \lsu_align_result_14_0[21] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_14_0[17] ( .A(N_342), .B(N_2123_i), .C(N_344), .Y(N_785) ); defparam \lsu_align_result_14_0[17] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_14_0[19] ( .A(N_344), .B(N_2123_i), .C(N_346), .Y(N_792) ); defparam \lsu_align_result_14_0[19] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_14_0[15] ( .A(N_340), .B(N_2123_i), .C(N_342), .Y(N_799) ); defparam \lsu_align_result_14_0[15] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_39_0[1] ( .A(N_1032), .B(N_2123_i), .C(N_1034), .Y(N_666) ); defparam \lsu_align_result_39_0[1] .INIT=8'hE2; // @46:9457 CFG4 \lsu_align_result_51_RNIE1FDB1[8] ( .A(N_1611), .B(exu_shifter_operand[31]), .C(N_2124_i), .D(N_2123_i), .Y(N_2887) ); defparam \lsu_align_result_51_RNIE1FDB1[8] .INIT=16'hCCCA; // @46:9457 CFG4 \lsu_align_result_51_RNIF2FDB1[9] ( .A(N_1612), .B(exu_shifter_operand[31]), .C(N_2124_i), .D(N_2123_i), .Y(N_2888) ); defparam \lsu_align_result_51_RNIF2FDB1[9] .INIT=16'hCCCA; // @46:11244 CFG3 \lsu_align_result_39_0[2] ( .A(N_1033), .B(N_2123_i), .C(N_1035), .Y(N_659) ); defparam \lsu_align_result_39_0[2] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_60_0[2] ( .A(N_1547), .B(N_1611), .C(N_2123_i), .Y(N_870) ); defparam \lsu_align_result_60_0[2] .INIT=8'hCA; // @46:11260 CFG4 \un174_shifter_result_1_1.SUM[2] ( .A(exu_shifter_places_Z[2]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_places_sn_N_2), .D(N_1723), .Y(SUM[2]) ); defparam \un174_shifter_result_1_1.SUM[2] .INIT=16'h6566; // @46:11392 CFG3 mul_mp_pmux_1 ( .A(mul_mp[32]), .B(N_1533_1), .C(mul_div_cnt_Z[5]), .Y(N_1533) ); defparam mul_mp_pmux_1.INIT=8'hEC; // @46:10978 CFG3 \exu_shifter_places[3] ( .A(exu_shifter_places_sn_N_2), .B(exu_shifter_places_1_Z[3]), .C(exu_shifter_places_cnst[3]), .Y(exu_shifter_places_Z[3]) ); defparam \exu_shifter_places[3] .INIT=8'hEC; // @46:11028 CFG4 \exu_alu_result_0_iv_2[1] ( .A(exu_alu_result196), .B(exu_N_4), .C(ex_retr_pipe_exu_result_retr[1]), .D(exu_alu_result_int_Z[1]), .Y(exu_alu_result_0_iv_2_Z[1]) ); defparam \exu_alu_result_0_iv_2[1] .INIT=16'hB3A0; // @46:10828 CFG4 start_m7_0_a4_0_1 ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr_0), .B(trace_priv_i), .C(start_m8_a1_0_Z), .D(un1_rs2_rd_hzd_4), .Y(start_m7_0_a4_0_1_Z) ); defparam start_m7_0_a4_0_1.INIT=16'h2000; // @46:10892 CFG4 exu_m2_0_a2_7_2 ( .A(d_m5_a0_0), .B(de_ex_pipe_operand0_mux_sel_ex_0), .C(gpr_rs1_rd_data_valid_6_5), .D(un1_rs1_rd_hzd_4), .Y(exu_m2_0_a2_7_2_Z) ); defparam exu_m2_0_a2_7_2.INIT=16'h2000; // @46:11425 CFG4 un15_next_res_pos_neg_23 ( .A(exu_alu_operand1_Z[31]), .B(exu_alu_operand1_0), .C(exu_alu_operand1_Z[2]), .D(exu_alu_operand1_Z[1]), .Y(un15_next_res_pos_neg_23_Z) ); defparam un15_next_res_pos_neg_23.INIT=16'hFFFE; // @46:10892 CFG4 exu_alu_operand0_valid_u_0_a2_0_RNO_1 ( .A(un1_rs1_rd_hzd_4), .B(gpr_wr_en_retr), .C(trace_priv_i), .D(gpr_wr_valid_retr_1_1_0), .Y(exu_alu_operand0_valid_u_0_a2_0_RNO_1_Z) ); defparam exu_alu_operand0_valid_u_0_a2_0_RNO_1.INIT=16'h8000; // @46:11244 CFG3 \lsu_align_result_60[5] ( .A(N_1612), .B(N_2123_i), .C(N_2124_i), .Y(N_1896) ); defparam \lsu_align_result_60[5] .INIT=8'h02; // @46:11244 CFG3 \lsu_align_result_14[10] ( .A(N_337), .B(N_2123_i), .C(N_2124_i), .Y(N_429) ); defparam \lsu_align_result_14[10] .INIT=8'h02; // @46:11028 CFG4 \exu_alu_result_0_iv_RNO[3] ( .A(exu_alu_operand1_0), .B(un6_exu_alu_result0[3]), .C(N_26_0), .D(exu_alu_result192_1_1z), .Y(un6_exu_alu_result0_m[3]) ); defparam \exu_alu_result_0_iv_RNO[3] .INIT=16'h0400; // @46:11028 CFG4 \exu_alu_result_0_iv_RNO[6] ( .A(exu_alu_operand1_0), .B(un6_exu_alu_result0[6]), .C(N_26_0), .D(exu_alu_result192_1_1z), .Y(un6_exu_alu_result0_m[6]) ); defparam \exu_alu_result_0_iv_RNO[6] .INIT=16'h0400; // @46:11028 CFG4 \exu_alu_result_0_iv_RNO[7] ( .A(exu_alu_operand1_0), .B(un6_exu_alu_result0[7]), .C(N_26_0), .D(exu_alu_result192_1_1z), .Y(un6_exu_alu_result0_m[7]) ); defparam \exu_alu_result_0_iv_RNO[7] .INIT=16'h0400; // @46:11028 CFG4 \exu_alu_result_0_iv_RNO[8] ( .A(exu_alu_operand1_0), .B(un6_exu_alu_result0[8]), .C(N_26_0), .D(exu_alu_result192_1_1z), .Y(un6_exu_alu_result0_m[8]) ); defparam \exu_alu_result_0_iv_RNO[8] .INIT=16'h0400; // @46:11028 CFG3 \exu_alu_result_8_m[2] ( .A(exu_alu_operand0_Z[2]), .B(exu_alu_result194_Z), .C(exu_alu_operand1_Z[2]), .Y(exu_alu_result_8_m_Z[2]) ); defparam \exu_alu_result_8_m[2] .INIT=8'hC8; // @46:11028 CFG4 \exu_alu_result_0_iv_RNO[2] ( .A(exu_alu_operand1_0), .B(un6_exu_alu_result0[2]), .C(N_26_0), .D(exu_alu_result192_1_1z), .Y(un6_exu_alu_result0_m[2]) ); defparam \exu_alu_result_0_iv_RNO[2] .INIT=16'h0400; // @46:11028 CFG4 \exu_alu_result_0_iv_4_RNO[1] ( .A(exu_alu_operand1_0), .B(un6_exu_alu_result_0_cry_1_Y), .C(N_26_0), .D(exu_alu_result192_1_1z), .Y(un6_exu_alu_result0_m[1]) ); defparam \exu_alu_result_0_iv_4_RNO[1] .INIT=16'h0100; // @46:11244 CFG3 \lsu_align_result_31_2[15] ( .A(N_2122_i), .B(exu_shifter_operand[15]), .C(un174_shifter_result_1_i[5]), .Y(N_978_2) ); defparam \lsu_align_result_31_2[15] .INIT=8'h08; // @46:11244 CFG2 lsu_align_result_54_3_2_1 ( .A(N_2124_i), .B(N_1547), .Y(lsu_align_result_54_3_2_1_Z) ); defparam lsu_align_result_54_3_2_1.INIT=4'h8; // @46:11244 CFG2 lsu_align_result_54_3_1_1 ( .A(N_2124_i), .B(N_1387), .Y(lsu_align_result_54_3_1_1_Z) ); defparam lsu_align_result_54_3_1_1.INIT=4'h4; // @46:11244 CFG2 lsu_align_result_54_3_11_1 ( .A(N_2124_i), .B(N_1388), .Y(lsu_align_result_54_3_9_1) ); defparam lsu_align_result_54_3_11_1.INIT=4'h4; // @46:11244 CFG2 lsu_align_result_54_3_10_1 ( .A(N_2124_i), .B(N_1548), .Y(lsu_align_result_54_3_10_1_Z) ); defparam lsu_align_result_54_3_10_1.INIT=4'h8; // @46:10825 CFG3 \mul_mp[5] ( .A(mul_mp_2_Z[5]), .B(exu_alu_operand1_Z[5]), .C(mul_mp_sn_N_6_mux), .Y(mul_mp_Z[5]) ); defparam \mul_mp[5] .INIT=8'hAE; // @46:10825 CFG3 \mul_mp[3] ( .A(mul_mp_2_Z[3]), .B(exu_alu_operand1_Z[3]), .C(mul_mp_sn_N_6_mux), .Y(mul_mp_Z[3]) ); defparam \mul_mp[3] .INIT=8'hAE; // @46:10825 CFG3 \mul_mp[19] ( .A(mul_mp_2_Z[19]), .B(exu_alu_operand1_Z[19]), .C(mul_mp_sn_N_6_mux), .Y(mul_mp_Z[19]) ); defparam \mul_mp[19] .INIT=8'hAE; // @46:10825 CFG3 \mul_mp[8] ( .A(mul_mp_2_Z[8]), .B(exu_alu_operand1_Z[8]), .C(mul_mp_sn_N_6_mux), .Y(mul_mp_Z[8]) ); defparam \mul_mp[8] .INIT=8'hAE; // @46:10825 CFG3 \mul_mp[7] ( .A(mul_mp_2_Z[7]), .B(exu_alu_operand1_Z[7]), .C(mul_mp_sn_N_6_mux), .Y(mul_mp_Z[7]) ); defparam \mul_mp[7] .INIT=8'hAE; // @46:10825 CFG3 \mul_mp[16] ( .A(mul_mp_2_Z[16]), .B(exu_alu_operand1_Z[16]), .C(mul_mp_sn_N_6_mux), .Y(mul_mp_Z[16]) ); defparam \mul_mp[16] .INIT=8'hAE; // @46:10825 CFG3 \mul_mp[13] ( .A(mul_mp_2_Z[13]), .B(exu_alu_operand1_Z[13]), .C(mul_mp_sn_N_6_mux), .Y(mul_mp_Z[13]) ); defparam \mul_mp[13] .INIT=8'hAE; // @46:10825 CFG3 \mul_mp[23] ( .A(mul_mp_2_Z[23]), .B(exu_alu_operand1_Z[23]), .C(mul_mp_sn_N_6_mux), .Y(mul_mp_Z[23]) ); defparam \mul_mp[23] .INIT=8'hAE; // @46:10825 CFG3 \mul_mp[11] ( .A(mul_mp_2_Z[11]), .B(exu_alu_operand1_Z[11]), .C(mul_mp_sn_N_6_mux), .Y(mul_mp_Z[11]) ); defparam \mul_mp[11] .INIT=8'hAE; // @46:10825 CFG3 \mul_mp[29] ( .A(mul_mp_2_Z[29]), .B(exu_alu_operand1_Z[29]), .C(mul_mp_sn_N_6_mux), .Y(mul_mp_Z[29]) ); defparam \mul_mp[29] .INIT=8'hAE; // @46:10825 CFG3 \mul_mp[21] ( .A(mul_mp_2_Z[21]), .B(exu_alu_operand1_Z[21]), .C(mul_mp_sn_N_6_mux), .Y(mul_mp_Z[21]) ); defparam \mul_mp[21] .INIT=8'hAE; // @46:10825 CFG3 \mul_mp[24] ( .A(mul_mp_2_Z[24]), .B(exu_alu_operand1_Z[24]), .C(mul_mp_sn_N_6_mux), .Y(mul_mp_Z[24]) ); defparam \mul_mp[24] .INIT=8'hAE; // @46:10825 CFG3 \mul_mp[10] ( .A(mul_mp_2_Z[10]), .B(exu_alu_operand1_Z[10]), .C(mul_mp_sn_N_6_mux), .Y(mul_mp_Z[10]) ); defparam \mul_mp[10] .INIT=8'hAE; // @46:10825 CFG3 \mul_mp[27] ( .A(mul_mp_2_Z[27]), .B(exu_alu_operand1_Z[27]), .C(mul_mp_sn_N_6_mux), .Y(mul_mp_Z[27]) ); defparam \mul_mp[27] .INIT=8'hAE; // @46:10825 CFG3 \mul_mp[12] ( .A(mul_mp_2_Z[12]), .B(exu_alu_operand1_Z[12]), .C(mul_mp_sn_N_6_mux), .Y(mul_mp_Z[12]) ); defparam \mul_mp[12] .INIT=8'hAE; // @46:10825 CFG3 \mul_mp[9] ( .A(mul_mp_2_Z[9]), .B(exu_alu_operand1_Z[9]), .C(mul_mp_sn_N_6_mux), .Y(mul_mp_Z[9]) ); defparam \mul_mp[9] .INIT=8'hAE; // @46:10825 CFG3 \mul_mp[17] ( .A(mul_mp_2_Z[17]), .B(exu_alu_operand1_Z[17]), .C(mul_mp_sn_N_6_mux), .Y(mul_mp_Z[17]) ); defparam \mul_mp[17] .INIT=8'hAE; // @46:10825 CFG3 \mul_mp[14] ( .A(mul_mp_2_Z[14]), .B(exu_alu_operand1_Z[14]), .C(mul_mp_sn_N_6_mux), .Y(mul_mp_Z[14]) ); defparam \mul_mp[14] .INIT=8'hAE; // @46:10825 CFG3 \mul_mp[20] ( .A(mul_mp_2_Z[20]), .B(exu_alu_operand1_Z[20]), .C(mul_mp_sn_N_6_mux), .Y(mul_mp_Z[20]) ); defparam \mul_mp[20] .INIT=8'hAE; // @46:10825 CFG3 \mul_mp[22] ( .A(mul_mp_2_Z[22]), .B(exu_alu_operand1_Z[22]), .C(mul_mp_sn_N_6_mux), .Y(mul_mp_Z[22]) ); defparam \mul_mp[22] .INIT=8'hAE; // @46:10825 CFG3 \mul_mp[15] ( .A(mul_mp_2_Z[15]), .B(exu_alu_operand1_Z[15]), .C(mul_mp_sn_N_6_mux), .Y(mul_mp_Z[15]) ); defparam \mul_mp[15] .INIT=8'hAE; // @46:10825 CFG3 \mul_mp[18] ( .A(mul_mp_2_Z[18]), .B(exu_alu_operand1_Z[18]), .C(mul_mp_sn_N_6_mux), .Y(mul_mp_Z[18]) ); defparam \mul_mp[18] .INIT=8'hAE; // @46:10825 CFG3 \mul_mp[25] ( .A(mul_mp_2_Z[25]), .B(exu_alu_operand1_Z[25]), .C(mul_mp_sn_N_6_mux), .Y(mul_mp_Z[25]) ); defparam \mul_mp[25] .INIT=8'hAE; // @46:10825 CFG3 \mul_mp[28] ( .A(mul_mp_2_Z[28]), .B(exu_alu_operand1_Z[28]), .C(mul_mp_sn_N_6_mux), .Y(mul_mp_Z[28]) ); defparam \mul_mp[28] .INIT=8'hAE; // @46:10825 CFG3 \mul_mp[6] ( .A(mul_mp_2_Z[6]), .B(exu_alu_operand1_Z[6]), .C(mul_mp_sn_N_6_mux), .Y(mul_mp_Z[6]) ); defparam \mul_mp[6] .INIT=8'hAE; // @46:10825 CFG3 \mul_mp[30] ( .A(mul_mp_2_Z[30]), .B(exu_alu_operand1_Z[30]), .C(mul_mp_sn_N_6_mux), .Y(mul_mp_Z[30]) ); defparam \mul_mp[30] .INIT=8'hAE; // @46:10825 CFG3 \mul_mp[26] ( .A(mul_mp_2_Z[26]), .B(exu_alu_operand1_Z[26]), .C(mul_mp_sn_N_6_mux), .Y(mul_mp_Z[26]) ); defparam \mul_mp[26] .INIT=8'hAE; // @46:10825 CFG3 \mul_mp[4] ( .A(mul_mp_2_Z[4]), .B(exu_alu_operand1_Z[4]), .C(mul_mp_sn_N_6_mux), .Y(mul_mp_Z[4]) ); defparam \mul_mp[4] .INIT=8'hAE; // @46:11383 CFG3 \next_exu_result_reg_int_0[31] ( .A(N_1353_1), .B(cpu_debug_op_wr_data_net[31]), .C(trace_priv_i), .Y(N_1353) ); defparam \next_exu_result_reg_int_0[31] .INIT=8'hEA; // @46:11028 CFG4 \exu_alu_result_0_iv_5[28] ( .A(exu_result_reg_int_Z[60]), .B(exu_N_4), .C(un3_alu_op_sel_int_2), .D(exu_alu_result_int_Z[28]), .Y(exu_alu_result_0_iv_5_Z[28]) ); defparam \exu_alu_result_0_iv_5[28] .INIT=16'hB3A0; // @46:11028 CFG4 \exu_alu_result_0_iv_5[29] ( .A(exu_result_reg_int_Z[61]), .B(exu_N_4), .C(un3_alu_op_sel_int_2), .D(exu_alu_result_int_Z[29]), .Y(exu_alu_result_0_iv_5_Z[29]) ); defparam \exu_alu_result_0_iv_5[29] .INIT=16'hB3A0; // @46:11028 CFG4 \exu_alu_result_0_iv_5[30] ( .A(exu_result_reg_int_Z[62]), .B(exu_N_4), .C(un3_alu_op_sel_int_2), .D(exu_alu_result_int_Z[30]), .Y(exu_alu_result_0_iv_5_Z[30]) ); defparam \exu_alu_result_0_iv_5[30] .INIT=16'hB3A0; // @46:11028 CFG4 \exu_alu_result_0_iv_5[27] ( .A(exu_result_reg_int_Z[59]), .B(exu_N_4), .C(un3_alu_op_sel_int_2), .D(exu_alu_result_int_Z[27]), .Y(exu_alu_result_0_iv_5_Z[27]) ); defparam \exu_alu_result_0_iv_5[27] .INIT=16'hB3A0; // @46:11028 CFG4 \exu_alu_result_0_iv_5[26] ( .A(exu_result_reg_int_Z[58]), .B(exu_N_4), .C(un3_alu_op_sel_int_2), .D(exu_alu_result_int_Z[26]), .Y(exu_alu_result_0_iv_5_Z[26]) ); defparam \exu_alu_result_0_iv_5[26] .INIT=16'hB3A0; // @46:11028 CFG4 \exu_alu_result_0_iv_5[25] ( .A(exu_result_reg_int_Z[57]), .B(exu_N_4), .C(un3_alu_op_sel_int_2), .D(exu_alu_result_int_Z[25]), .Y(exu_alu_result_0_iv_5_Z[25]) ); defparam \exu_alu_result_0_iv_5[25] .INIT=16'hB3A0; // @46:11028 CFG4 \exu_alu_result_0_iv_5[31] ( .A(exu_result_reg_int_Z[63]), .B(exu_N_4), .C(un3_alu_op_sel_int_2), .D(exu_alu_result_int_Z[31]), .Y(exu_alu_result_0_iv_5_Z[31]) ); defparam \exu_alu_result_0_iv_5[31] .INIT=16'hB3A0; // @46:11028 CFG4 \exu_alu_result_0_iv_5[24] ( .A(exu_result_reg_int_Z[56]), .B(exu_N_4), .C(un3_alu_op_sel_int_2), .D(exu_alu_result_int_Z[24]), .Y(exu_alu_result_0_iv_5_Z[24]) ); defparam \exu_alu_result_0_iv_5[24] .INIT=16'hB3A0; // @46:11028 CFG4 \exu_alu_result_0_iv_5[23] ( .A(exu_result_reg_int_Z[55]), .B(exu_N_4), .C(un3_alu_op_sel_int_2), .D(exu_alu_result_int_Z[23]), .Y(exu_alu_result_0_iv_5_Z[23]) ); defparam \exu_alu_result_0_iv_5[23] .INIT=16'hB3A0; // @46:11028 CFG4 \exu_alu_result_0_iv_5[22] ( .A(exu_result_reg_int_Z[54]), .B(exu_N_4), .C(un3_alu_op_sel_int_2), .D(exu_alu_result_int_Z[22]), .Y(exu_alu_result_0_iv_5_Z[22]) ); defparam \exu_alu_result_0_iv_5[22] .INIT=16'hB3A0; // @46:11028 CFG4 \exu_alu_result_0_iv_5[21] ( .A(exu_result_reg_int_Z[53]), .B(exu_N_4), .C(un3_alu_op_sel_int_2), .D(exu_alu_result_int_Z[21]), .Y(exu_alu_result_0_iv_5_Z[21]) ); defparam \exu_alu_result_0_iv_5[21] .INIT=16'hB3A0; // @46:11028 CFG4 \exu_alu_result_0_iv_5[20] ( .A(exu_result_reg_int_Z[52]), .B(exu_N_4), .C(un3_alu_op_sel_int_2), .D(exu_alu_result_int_Z[20]), .Y(exu_alu_result_0_iv_5_Z[20]) ); defparam \exu_alu_result_0_iv_5[20] .INIT=16'hB3A0; // @46:11028 CFG4 \exu_alu_result_0_iv_5[19] ( .A(exu_result_reg_int_Z[51]), .B(exu_N_4), .C(un3_alu_op_sel_int_2), .D(exu_alu_result_int_Z[19]), .Y(exu_alu_result_0_iv_5_Z[19]) ); defparam \exu_alu_result_0_iv_5[19] .INIT=16'hB3A0; // @46:11028 CFG4 \exu_alu_result_0_iv_5[18] ( .A(exu_result_reg_int_Z[50]), .B(exu_N_4), .C(un3_alu_op_sel_int_2), .D(exu_alu_result_int_Z[18]), .Y(exu_alu_result_0_iv_5_Z[18]) ); defparam \exu_alu_result_0_iv_5[18] .INIT=16'hB3A0; // @46:11028 CFG4 \exu_alu_result_0_iv_5[17] ( .A(exu_result_reg_int_Z[49]), .B(exu_N_4), .C(un3_alu_op_sel_int_2), .D(exu_alu_result_int_Z[17]), .Y(exu_alu_result_0_iv_5_Z[17]) ); defparam \exu_alu_result_0_iv_5[17] .INIT=16'hB3A0; // @46:11028 CFG4 \exu_alu_result_0_iv_5[16] ( .A(exu_result_reg_int_Z[48]), .B(exu_N_4), .C(un3_alu_op_sel_int_2), .D(exu_alu_result_int_Z[16]), .Y(exu_alu_result_0_iv_5_Z[16]) ); defparam \exu_alu_result_0_iv_5[16] .INIT=16'hB3A0; // @46:11028 CFG4 \exu_alu_result_0_iv_5[15] ( .A(exu_result_reg_int_Z[47]), .B(exu_N_4), .C(un3_alu_op_sel_int_2), .D(exu_alu_result_int_Z[15]), .Y(exu_alu_result_0_iv_5_Z[15]) ); defparam \exu_alu_result_0_iv_5[15] .INIT=16'hB3A0; // @46:11028 CFG4 \exu_alu_result_0_iv_5[11] ( .A(exu_result_reg_int_Z[43]), .B(exu_N_4), .C(un3_alu_op_sel_int_2), .D(exu_alu_result_int_Z[11]), .Y(exu_alu_result_0_iv_5_Z[11]) ); defparam \exu_alu_result_0_iv_5[11] .INIT=16'hB3A0; // @46:11028 CFG4 \exu_alu_result_0_iv_5[14] ( .A(exu_result_reg_int_Z[46]), .B(exu_N_4), .C(un3_alu_op_sel_int_2), .D(exu_alu_result_int_Z[14]), .Y(exu_alu_result_0_iv_5_Z[14]) ); defparam \exu_alu_result_0_iv_5[14] .INIT=16'hB3A0; // @46:11028 CFG4 \exu_alu_result_0_iv_5[12] ( .A(exu_result_reg_int_Z[44]), .B(exu_N_4), .C(un3_alu_op_sel_int_2), .D(exu_alu_result_int_Z[12]), .Y(exu_alu_result_0_iv_5_Z[12]) ); defparam \exu_alu_result_0_iv_5[12] .INIT=16'hB3A0; // @46:11028 CFG4 \exu_alu_result_0_iv_5[13] ( .A(exu_result_reg_int_Z[45]), .B(exu_N_4), .C(un3_alu_op_sel_int_2), .D(exu_alu_result_int_Z[13]), .Y(exu_alu_result_0_iv_5_Z[13]) ); defparam \exu_alu_result_0_iv_5[13] .INIT=16'hB3A0; // @46:11028 CFG4 \exu_alu_result_0_iv_5[10] ( .A(exu_result_reg_int_Z[42]), .B(exu_N_4), .C(un3_alu_op_sel_int_2), .D(exu_alu_result_int_Z[10]), .Y(exu_alu_result_0_iv_5_Z[10]) ); defparam \exu_alu_result_0_iv_5[10] .INIT=16'hB3A0; // @46:11425 CFG4 un15_next_res_pos_neg_28 ( .A(un15_next_res_pos_neg_19_Z), .B(un15_next_res_pos_neg_18_Z), .C(un15_next_res_pos_neg_17_Z), .D(un15_next_res_pos_neg_16_Z), .Y(un15_next_res_pos_neg_28_Z) ); defparam un15_next_res_pos_neg_28.INIT=16'hFFFE; // @46:11028 CFG4 \exu_alu_result_iv_10_s_0_RNO_0[0] ( .A(exu_result_reg_int_Z[32]), .B(d_m2_e_1_0), .C(exu_alu_result_8_m_0_3_Z[0]), .D(m29_0), .Y(d_N_5) ); defparam \exu_alu_result_iv_10_s_0_RNO_0[0] .INIT=16'h070F; // @46:11244 CFG2 \lsu_align_result_14[11] ( .A(N_70), .B(N_2124_i), .Y(N_430) ); defparam \lsu_align_result_14[11] .INIT=4'h2; // @46:11244 CFG2 \lsu_align_result_60[3] ( .A(N_1118), .B(N_2124_i), .Y(N_1894) ); defparam \lsu_align_result_60[3] .INIT=4'h2; // @46:11244 CFG2 \lsu_align_result_60[4] ( .A(N_1119), .B(N_2124_i), .Y(N_1895) ); defparam \lsu_align_result_60[4] .INIT=4'h2; // @46:11244 CFG3 \lsu_align_result_15[1] ( .A(N_68), .B(N_2125_i), .C(N_2124_i), .Y(N_452) ); defparam \lsu_align_result_15[1] .INIT=8'h02; // @46:11028 CFG4 \exu_alu_result_26_m[18] ( .A(N_10_i), .B(N_14_i), .C(N_8_i), .D(exu_alu_result_26_Z[18]), .Y(exu_alu_result_26_m_Z[18]) ); defparam \exu_alu_result_26_m[18] .INIT=16'h2000; // @46:11028 CFG4 \exu_alu_result_26_m[19] ( .A(N_10_i), .B(N_14_i), .C(N_8_i), .D(exu_alu_result_26_Z[19]), .Y(exu_alu_result_26_m_Z[19]) ); defparam \exu_alu_result_26_m[19] .INIT=16'h2000; // @46:11028 CFG4 \exu_alu_result_26_m[21] ( .A(N_10_i), .B(N_14_i), .C(N_8_i), .D(exu_alu_result_26_Z[21]), .Y(exu_alu_result_26_m_Z[21]) ); defparam \exu_alu_result_26_m[21] .INIT=16'h2000; // @46:11028 CFG4 \exu_alu_result_26_m[3] ( .A(N_10_i), .B(N_14_i), .C(N_8_i), .D(exu_alu_result_26_Z[3]), .Y(exu_alu_result_26_m_Z[3]) ); defparam \exu_alu_result_26_m[3] .INIT=16'h2000; // @46:11028 CFG4 \exu_alu_result_26_m[4] ( .A(N_10_i), .B(N_14_i), .C(N_8_i), .D(exu_alu_result_26_Z[4]), .Y(exu_alu_result_26_m_Z[4]) ); defparam \exu_alu_result_26_m[4] .INIT=16'h2000; // @46:11028 CFG4 \exu_alu_result_26_m[5] ( .A(N_10_i), .B(N_14_i), .C(N_8_i), .D(exu_alu_result_26_Z[5]), .Y(exu_alu_result_26_m_Z[5]) ); defparam \exu_alu_result_26_m[5] .INIT=16'h2000; // @46:11028 CFG4 \exu_alu_result_26_m[6] ( .A(N_10_i), .B(N_14_i), .C(N_8_i), .D(exu_alu_result_26_Z[6]), .Y(exu_alu_result_26_m_Z[6]) ); defparam \exu_alu_result_26_m[6] .INIT=16'h2000; // @46:11028 CFG4 \exu_alu_result_26_m[8] ( .A(N_10_i), .B(N_14_i), .C(N_8_i), .D(exu_alu_result_26_Z[8]), .Y(exu_alu_result_26_m_Z[8]) ); defparam \exu_alu_result_26_m[8] .INIT=16'h2000; // @46:11028 CFG4 \exu_alu_result_26_m[9] ( .A(N_10_i), .B(N_14_i), .C(N_8_i), .D(exu_alu_result_26_Z[9]), .Y(exu_alu_result_26_m_Z[9]) ); defparam \exu_alu_result_26_m[9] .INIT=16'h2000; // @46:11028 CFG4 \exu_alu_result_26_m[10] ( .A(N_10_i), .B(N_14_i), .C(N_8_i), .D(exu_alu_result_26_Z[10]), .Y(exu_alu_result_26_m_Z[10]) ); defparam \exu_alu_result_26_m[10] .INIT=16'h2000; // @46:11028 CFG4 \exu_alu_result_26_m[11] ( .A(N_10_i), .B(N_14_i), .C(N_8_i), .D(exu_alu_result_26_Z[11]), .Y(exu_alu_result_26_m_Z[11]) ); defparam \exu_alu_result_26_m[11] .INIT=16'h2000; // @46:11028 CFG4 \exu_alu_result_26_m[12] ( .A(N_10_i), .B(N_14_i), .C(N_8_i), .D(exu_alu_result_26_Z[12]), .Y(exu_alu_result_26_m_Z[12]) ); defparam \exu_alu_result_26_m[12] .INIT=16'h2000; // @46:11028 CFG4 \exu_alu_result_26_m[13] ( .A(N_10_i), .B(N_14_i), .C(N_8_i), .D(exu_alu_result_26_Z[13]), .Y(exu_alu_result_26_m_Z[13]) ); defparam \exu_alu_result_26_m[13] .INIT=16'h2000; // @46:11028 CFG4 \exu_alu_result_26_m[14] ( .A(N_10_i), .B(N_14_i), .C(N_8_i), .D(exu_alu_result_26_Z[14]), .Y(exu_alu_result_26_m_Z[14]) ); defparam \exu_alu_result_26_m[14] .INIT=16'h2000; // @46:11028 CFG4 \exu_alu_result_26_m[15] ( .A(N_10_i), .B(N_14_i), .C(N_8_i), .D(exu_alu_result_26_Z[15]), .Y(exu_alu_result_26_m_Z[15]) ); defparam \exu_alu_result_26_m[15] .INIT=16'h2000; // @46:11028 CFG4 \exu_alu_result_26_m[17] ( .A(N_10_i), .B(N_14_i), .C(N_8_i), .D(exu_alu_result_26_Z[17]), .Y(exu_alu_result_26_m_Z[17]) ); defparam \exu_alu_result_26_m[17] .INIT=16'h2000; // @46:11028 CFG4 \exu_alu_result_26_m[20] ( .A(N_10_i), .B(N_14_i), .C(N_8_i), .D(exu_alu_result_26_Z[20]), .Y(exu_alu_result_26_m_Z[20]) ); defparam \exu_alu_result_26_m[20] .INIT=16'h2000; // @46:11028 CFG4 \exu_alu_result_26_m[23] ( .A(N_10_i), .B(N_14_i), .C(N_8_i), .D(exu_alu_result_26_Z[23]), .Y(exu_alu_result_26_m_Z[23]) ); defparam \exu_alu_result_26_m[23] .INIT=16'h2000; // @46:11028 CFG4 \exu_alu_result_26_m[24] ( .A(N_10_i), .B(N_14_i), .C(N_8_i), .D(exu_alu_result_26_Z[24]), .Y(exu_alu_result_26_m_Z[24]) ); defparam \exu_alu_result_26_m[24] .INIT=16'h2000; // @46:11028 CFG4 \exu_alu_result_26_m[25] ( .A(N_10_i), .B(N_14_i), .C(N_8_i), .D(exu_alu_result_26_Z[25]), .Y(exu_alu_result_26_m_Z[25]) ); defparam \exu_alu_result_26_m[25] .INIT=16'h2000; // @46:11028 CFG4 \exu_alu_result_26_m[26] ( .A(N_10_i), .B(N_14_i), .C(N_8_i), .D(exu_alu_result_26_Z[26]), .Y(exu_alu_result_26_m_Z[26]) ); defparam \exu_alu_result_26_m[26] .INIT=16'h2000; // @46:11028 CFG4 \exu_alu_result_26_m[27] ( .A(N_10_i), .B(N_14_i), .C(N_8_i), .D(exu_alu_result_26_Z[27]), .Y(exu_alu_result_26_m_Z[27]) ); defparam \exu_alu_result_26_m[27] .INIT=16'h2000; // @46:11028 CFG4 \exu_alu_result_26_m[29] ( .A(N_10_i), .B(N_14_i), .C(N_8_i), .D(exu_alu_result_26_Z[29]), .Y(exu_alu_result_26_m_Z[29]) ); defparam \exu_alu_result_26_m[29] .INIT=16'h2000; // @46:11028 CFG4 \exu_alu_result_26_m[30] ( .A(N_10_i), .B(N_14_i), .C(N_8_i), .D(exu_alu_result_26_Z[30]), .Y(exu_alu_result_26_m_Z[30]) ); defparam \exu_alu_result_26_m[30] .INIT=16'h2000; // @46:11028 CFG4 \exu_alu_result_26_m[31] ( .A(N_10_i), .B(N_14_i), .C(N_8_i), .D(exu_alu_result_26_Z[31]), .Y(exu_alu_result_26_m_Z[31]) ); defparam \exu_alu_result_26_m[31] .INIT=16'h2000; // @46:11028 CFG4 \exu_alu_result_26_m_i[22] ( .A(N_14_i), .B(N_10_i), .C(N_60), .D(N_8_i), .Y(N_2189) ); defparam \exu_alu_result_26_m_i[22] .INIT=16'hBFFF; // @46:11422 CFG4 \next_div_divisor_5[62] ( .A(exu_alu_operand1_Z[31]), .B(div_ack_Z), .C(un6_next_div_divisor), .D(un16_next_div_divisor_1_s_31_S), .Y(next_div_divisor_5_Z[62]) ); defparam \next_div_divisor_5[62] .INIT=16'h3202; // @46:11028 CFG4 \exu_alu_result_26_m[16] ( .A(N_10_i), .B(N_14_i), .C(N_8_i), .D(exu_alu_result_26_Z[16]), .Y(exu_alu_result_26_m_Z[16]) ); defparam \exu_alu_result_26_m[16] .INIT=16'h2000; // @46:11028 CFG4 \exu_alu_result_26_m_i[1] ( .A(N_14_i), .B(N_10_i), .C(N_59), .D(N_8_i), .Y(N_2190) ); defparam \exu_alu_result_26_m_i[1] .INIT=16'hBFFF; // @46:11028 CFG4 \exu_alu_result_26_m[7] ( .A(N_10_i), .B(N_14_i), .C(N_8_i), .D(exu_alu_result_26_Z[7]), .Y(exu_alu_result_26_m_Z[7]) ); defparam \exu_alu_result_26_m[7] .INIT=16'h2000; // @46:11028 CFG4 \exu_alu_result_26_m[28] ( .A(N_10_i), .B(N_14_i), .C(N_8_i), .D(exu_alu_result_26_Z[28]), .Y(exu_alu_result_26_m_Z[28]) ); defparam \exu_alu_result_26_m[28] .INIT=16'h2000; // @46:11244 CFG3 \lsu_align_result_47[30] ( .A(N_1121), .B(N_2125_i), .C(N_2124_i), .Y(N_1505) ); defparam \lsu_align_result_47[30] .INIT=8'h02; // @46:11244 CFG4 \un174_shifter_result_1_1.N_2124_i ( .A(exu_shifter_places_Z[2]), .B(exu_shifter_places_Z[0]), .C(exu_shifter_places_sn_N_2), .D(N_1723), .Y(N_2124_i) ); defparam \un174_shifter_result_1_1.N_2124_i .INIT=16'h9A99; // @46:11244 CFG4 \lsu_align_result_7_u_1[29] ( .A(N_30), .B(N_32), .C(N_2124_i), .D(N_2123_i), .Y(N_543_1) ); defparam \lsu_align_result_7_u_1[29] .INIT=16'h0A0C; // @46:11244 CFG4 \lsu_align_result_54_u_2[2] ( .A(N_1387), .B(N_1515), .C(N_2123_i), .D(N_2124_i), .Y(N_858_2) ); defparam \lsu_align_result_54_u_2[2] .INIT=16'hCA00; // @46:11244 CFG4 \lsu_align_result_85_u_2[9] ( .A(N_1612), .B(exu_shifter_operand[31]), .C(N_2124_i), .D(N_2123_i), .Y(N_844_2) ); defparam \lsu_align_result_85_u_2[9] .INIT=16'hC0A0; // @46:11244 CFG4 \lsu_align_result_54_3_1[4] ( .A(N_1355), .B(N_1515), .C(N_2123_i), .D(N_2124_i), .Y(N_1703_1) ); defparam \lsu_align_result_54_3_1[4] .INIT=16'h0C0A; // @46:11244 CFG4 \lsu_align_result_39_u_1[2] ( .A(N_1029), .B(N_1031), .C(N_2124_i), .D(N_2123_i), .Y(N_662_1) ); defparam \lsu_align_result_39_u_1[2] .INIT=16'h0C0A; // @46:11244 CFG4 \lsu_align_result_28_u_2[31] ( .A(N_338), .B(exu_shifter_operand[0]), .C(N_2124_i), .D(N_2123_i), .Y(N_676_2) ); defparam \lsu_align_result_28_u_2[31] .INIT=16'hC0A0; // @46:11244 CFG4 \lsu_align_result_60_u_2[0] ( .A(N_1611), .B(exu_shifter_operand[31]), .C(N_2124_i), .D(N_2123_i), .Y(N_837_2) ); defparam \lsu_align_result_60_u_2[0] .INIT=16'hC0A0; // @46:11244 CFG4 \lsu_align_result_54_u_2[3] ( .A(N_1388), .B(N_1516), .C(N_2123_i), .D(N_2124_i), .Y(N_851_2) ); defparam \lsu_align_result_54_u_2[3] .INIT=16'hCA00; // @46:11244 CFG4 \lsu_align_result_46_u_2[9] ( .A(N_1356), .B(N_1388), .C(N_2124_i), .D(N_2123_i), .Y(N_865_2) ); defparam \lsu_align_result_46_u_2[9] .INIT=16'hC0A0; // @46:11244 CFG4 \lsu_align_result_46_u_2[8] ( .A(N_1355), .B(N_1387), .C(N_2124_i), .D(N_2123_i), .Y(N_746_2) ); defparam \lsu_align_result_46_u_2[8] .INIT=16'hC0A0; // @46:11244 CFG4 \lsu_align_result_54_3_2[6] ( .A(N_1515), .B(N_1611), .C(N_2123_i), .D(N_2124_i), .Y(N_1705_2) ); defparam \lsu_align_result_54_3_2[6] .INIT=16'hC0A0; // @46:11244 CFG4 \lsu_align_result_7_u_1[28] ( .A(N_29), .B(N_31), .C(N_2124_i), .D(N_2123_i), .Y(N_522_1) ); defparam \lsu_align_result_7_u_1[28] .INIT=16'h0A0C; // @46:11244 CFG4 \lsu_align_result_39_u_1[3] ( .A(N_1030), .B(N_1032), .C(N_2124_i), .D(N_2123_i), .Y(N_634_1) ); defparam \lsu_align_result_39_u_1[3] .INIT=16'h0C0A; // @46:11244 CFG4 \lsu_align_result_54_3_2[7] ( .A(N_1516), .B(N_1612), .C(N_2123_i), .D(N_2124_i), .Y(N_1706_2) ); defparam \lsu_align_result_54_3_2[7] .INIT=16'hC0A0; // @46:11244 CFG4 \lsu_align_result_54_3_1[5] ( .A(N_1356), .B(N_1516), .C(N_2123_i), .D(N_2124_i), .Y(N_1704_1) ); defparam \lsu_align_result_54_3_1[5] .INIT=16'h0C0A; // @46:10826 CFG2 exu_alu_result_int_cry_1_RNO_0 ( .A(exu_alu_operand0_Z[31]), .B(exu_alu_operand1_Z[1]), .Y(N_1649_1) ); defparam exu_alu_result_int_cry_1_RNO_0.INIT=4'h4; // @46:11422 CFG4 \next_div_divisor_5_1[32] ( .A(exu_alu_operand1_Z[1]), .B(div_ack_Z), .C(un6_next_div_divisor), .D(un16_next_div_divisor_1_cry_1_S), .Y(next_div_divisor_5_1_Z[32]) ); defparam \next_div_divisor_5_1[32] .INIT=16'h3202; // @46:10826 CFG2 exu_alu_result_int_cry_2_RNO_0 ( .A(exu_alu_operand0_Z[31]), .B(exu_alu_operand1_Z[2]), .Y(N_1650_1) ); defparam exu_alu_result_int_cry_2_RNO_0.INIT=4'h4; // @46:11422 CFG4 \next_div_divisor_5_1[33] ( .A(exu_alu_operand1_Z[2]), .B(div_ack_Z), .C(un6_next_div_divisor), .D(un16_next_div_divisor_1_cry_2_S), .Y(next_div_divisor_5_1_Z[33]) ); defparam \next_div_divisor_5_1[33] .INIT=16'h3202; // @46:11023 CFG4 exu_alu_result_int_cry_0_RNO ( .A(exu_alu_operand1_0), .B(exu_alu_operand0_0), .C(exu_alu_operand0_Z[31]), .D(exu_N_4_1), .Y(exu_alu_result_int) ); defparam exu_alu_result_int_cry_0_RNO.INIT=16'h333A; // @46:11422 CFG4 \next_div_divisor_5_1[43] ( .A(exu_alu_operand1_Z[12]), .B(div_ack_Z), .C(un6_next_div_divisor), .D(un16_next_div_divisor_1_cry_12_S), .Y(next_div_divisor_5_1_Z[43]) ); defparam \next_div_divisor_5_1[43] .INIT=16'h3202; // @46:10978 CFG3 \exu_shifter_places[4] ( .A(exu_shifter_places_1_Z[4]), .B(N_493), .C(exu_shifter_places_sn_N_2), .Y(exu_shifter_places_Z[4]) ); defparam \exu_shifter_places[4] .INIT=8'hBA; // @46:11422 CFG4 \next_div_divisor_5_1[44] ( .A(exu_alu_operand1_Z[13]), .B(div_ack_Z), .C(un6_next_div_divisor), .D(un16_next_div_divisor_1_cry_13_S), .Y(next_div_divisor_5_1_Z[44]) ); defparam \next_div_divisor_5_1[44] .INIT=16'h3202; // @46:11422 CFG4 \next_div_divisor_5_1[56] ( .A(exu_alu_operand1_Z[25]), .B(div_ack_Z), .C(un6_next_div_divisor), .D(un16_next_div_divisor_1_cry_25_S), .Y(next_div_divisor_5_1_Z[56]) ); defparam \next_div_divisor_5_1[56] .INIT=16'h3202; // @46:11422 CFG4 \next_div_divisor_5_1[46] ( .A(exu_alu_operand1_Z[15]), .B(div_ack_Z), .C(un6_next_div_divisor), .D(un16_next_div_divisor_1_cry_15_S), .Y(next_div_divisor_5_1_Z[46]) ); defparam \next_div_divisor_5_1[46] .INIT=16'h3202; // @46:11422 CFG4 \next_div_divisor_5_1[61] ( .A(exu_alu_operand1_Z[30]), .B(div_ack_Z), .C(un6_next_div_divisor), .D(un16_next_div_divisor_1_cry_30_S), .Y(next_div_divisor_5_1_Z[61]) ); defparam \next_div_divisor_5_1[61] .INIT=16'h3202; // @46:11422 CFG4 \next_div_divisor_5_1[57] ( .A(exu_alu_operand1_Z[26]), .B(div_ack_Z), .C(un6_next_div_divisor), .D(un16_next_div_divisor_1_cry_26_S), .Y(next_div_divisor_5_1_Z[57]) ); defparam \next_div_divisor_5_1[57] .INIT=16'h3202; // @46:11422 CFG4 \next_div_divisor_5_1[42] ( .A(exu_alu_operand1_Z[11]), .B(div_ack_Z), .C(un6_next_div_divisor), .D(un16_next_div_divisor_1_cry_11_S), .Y(next_div_divisor_5_1_Z[42]) ); defparam \next_div_divisor_5_1[42] .INIT=16'h3202; // @46:11422 CFG4 \next_div_divisor_5_1[45] ( .A(exu_alu_operand1_Z[14]), .B(div_ack_Z), .C(un6_next_div_divisor), .D(un16_next_div_divisor_1_cry_14_S), .Y(next_div_divisor_5_1_Z[45]) ); defparam \next_div_divisor_5_1[45] .INIT=16'h3202; // @46:11422 CFG4 \next_div_divisor_5_1[37] ( .A(exu_alu_operand1_Z[6]), .B(div_ack_Z), .C(un6_next_div_divisor), .D(un16_next_div_divisor_1_cry_6_S), .Y(next_div_divisor_5_1_Z[37]) ); defparam \next_div_divisor_5_1[37] .INIT=16'h3202; // @46:11422 CFG4 \next_div_divisor_5_1[39] ( .A(exu_alu_operand1_Z[8]), .B(div_ack_Z), .C(un6_next_div_divisor), .D(un16_next_div_divisor_1_cry_8_S), .Y(next_div_divisor_5_1_Z[39]) ); defparam \next_div_divisor_5_1[39] .INIT=16'h3202; // @46:11422 CFG4 \next_div_divisor_5_1[41] ( .A(exu_alu_operand1_Z[10]), .B(div_ack_Z), .C(un6_next_div_divisor), .D(un16_next_div_divisor_1_cry_10_S), .Y(next_div_divisor_5_1_Z[41]) ); defparam \next_div_divisor_5_1[41] .INIT=16'h3202; // @46:11422 CFG4 \next_div_divisor_5_1[52] ( .A(exu_alu_operand1_Z[21]), .B(div_ack_Z), .C(un6_next_div_divisor), .D(un16_next_div_divisor_1_cry_21_S), .Y(next_div_divisor_5_1_Z[52]) ); defparam \next_div_divisor_5_1[52] .INIT=16'h3202; // @46:11422 CFG4 \next_div_divisor_5_1[40] ( .A(exu_alu_operand1_Z[9]), .B(div_ack_Z), .C(un6_next_div_divisor), .D(un16_next_div_divisor_1_cry_9_S), .Y(next_div_divisor_5_1_Z[40]) ); defparam \next_div_divisor_5_1[40] .INIT=16'h3202; // @46:11422 CFG4 \next_div_divisor_5_1[53] ( .A(exu_alu_operand1_Z[22]), .B(div_ack_Z), .C(un6_next_div_divisor), .D(un16_next_div_divisor_1_cry_22_S), .Y(next_div_divisor_5_1_Z[53]) ); defparam \next_div_divisor_5_1[53] .INIT=16'h3202; // @46:11422 CFG4 \next_div_divisor_5_1[38] ( .A(exu_alu_operand1_Z[7]), .B(div_ack_Z), .C(un6_next_div_divisor), .D(un16_next_div_divisor_1_cry_7_S), .Y(next_div_divisor_5_1_Z[38]) ); defparam \next_div_divisor_5_1[38] .INIT=16'h3202; // @46:11422 CFG4 \next_div_divisor_5_1[54] ( .A(exu_alu_operand1_Z[23]), .B(div_ack_Z), .C(un6_next_div_divisor), .D(un16_next_div_divisor_1_cry_23_S), .Y(next_div_divisor_5_1_Z[54]) ); defparam \next_div_divisor_5_1[54] .INIT=16'h3202; // @46:11422 CFG4 \next_div_divisor_5_1[35] ( .A(exu_alu_operand1_Z[4]), .B(div_ack_Z), .C(un6_next_div_divisor), .D(un16_next_div_divisor_1_cry_4_S), .Y(next_div_divisor_5_1_Z[35]) ); defparam \next_div_divisor_5_1[35] .INIT=16'h3202; // @46:11422 CFG4 \next_div_divisor_5_1[36] ( .A(exu_alu_operand1_Z[5]), .B(div_ack_Z), .C(un6_next_div_divisor), .D(un16_next_div_divisor_1_cry_5_S), .Y(next_div_divisor_5_1_Z[36]) ); defparam \next_div_divisor_5_1[36] .INIT=16'h3202; // @46:11422 CFG4 \next_div_divisor_5_1[34] ( .A(exu_alu_operand1_Z[3]), .B(div_ack_Z), .C(un6_next_div_divisor), .D(un16_next_div_divisor_1_cry_3_S), .Y(next_div_divisor_5_1_Z[34]) ); defparam \next_div_divisor_5_1[34] .INIT=16'h3202; // @46:11422 CFG4 \next_div_divisor_5_1[60] ( .A(exu_alu_operand1_Z[29]), .B(div_ack_Z), .C(un6_next_div_divisor), .D(un16_next_div_divisor_1_cry_29_S), .Y(next_div_divisor_5_1_Z[60]) ); defparam \next_div_divisor_5_1[60] .INIT=16'h3202; // @46:11422 CFG4 \next_div_divisor_5_1[51] ( .A(exu_alu_operand1_Z[20]), .B(div_ack_Z), .C(un6_next_div_divisor), .D(un16_next_div_divisor_1_cry_20_S), .Y(next_div_divisor_5_1_Z[51]) ); defparam \next_div_divisor_5_1[51] .INIT=16'h3202; // @46:9457 CFG4 \div_divisor_RNO_0[47] ( .A(exu_alu_operand1_Z[16]), .B(div_ack_Z), .C(un6_next_div_divisor), .D(un16_next_div_divisor_1_cry_16_S), .Y(N_2199_1) ); defparam \div_divisor_RNO_0[47] .INIT=16'h0131; // @46:11422 CFG4 \next_div_divisor_5_1[48] ( .A(exu_alu_operand1_Z[17]), .B(div_ack_Z), .C(un6_next_div_divisor), .D(un16_next_div_divisor_1_cry_17_S), .Y(next_div_divisor_5_1_Z[48]) ); defparam \next_div_divisor_5_1[48] .INIT=16'h3202; // @46:11422 CFG4 \next_div_divisor_5_1[59] ( .A(exu_alu_operand1_Z[28]), .B(div_ack_Z), .C(un6_next_div_divisor), .D(un16_next_div_divisor_1_cry_28_S), .Y(next_div_divisor_5_1_Z[59]) ); defparam \next_div_divisor_5_1[59] .INIT=16'h3202; // @46:11422 CFG4 \next_div_divisor_5_1[55] ( .A(exu_alu_operand1_Z[24]), .B(div_ack_Z), .C(un6_next_div_divisor), .D(un16_next_div_divisor_1_cry_24_S), .Y(next_div_divisor_5_1_Z[55]) ); defparam \next_div_divisor_5_1[55] .INIT=16'h3202; // @46:11422 CFG4 \next_div_divisor_5_1[50] ( .A(exu_alu_operand1_Z[19]), .B(div_ack_Z), .C(un6_next_div_divisor), .D(un16_next_div_divisor_1_cry_19_S), .Y(next_div_divisor_5_1_Z[50]) ); defparam \next_div_divisor_5_1[50] .INIT=16'h3202; // @46:11422 CFG4 \next_div_divisor_5_1[49] ( .A(exu_alu_operand1_Z[18]), .B(div_ack_Z), .C(un6_next_div_divisor), .D(un16_next_div_divisor_1_cry_18_S), .Y(next_div_divisor_5_1_Z[49]) ); defparam \next_div_divisor_5_1[49] .INIT=16'h3202; // @46:11422 CFG4 \next_div_divisor_5_1[58] ( .A(exu_alu_operand1_Z[27]), .B(div_ack_Z), .C(un6_next_div_divisor), .D(un16_next_div_divisor_1_cry_27_S), .Y(next_div_divisor_5_1_Z[58]) ); defparam \next_div_divisor_5_1[58] .INIT=16'h3202; // @46:11028 CFG4 \exu_alu_result_0_iv_5[3] ( .A(un6_exu_alu_result1[3]), .B(exu_result_reg_int_Z[35]), .C(exu_alu_operand1_s1[0]), .D(un3_alu_op_sel_int_2), .Y(exu_alu_result_0_iv_5_Z[3]) ); defparam \exu_alu_result_0_iv_5[3] .INIT=16'hECA0; // @46:11028 CFG4 \exu_alu_result_0_iv_5[2] ( .A(un6_exu_alu_result1[2]), .B(exu_result_reg_int_Z[34]), .C(exu_alu_operand1_s1[0]), .D(un3_alu_op_sel_int_2), .Y(exu_alu_result_0_iv_5_Z[2]) ); defparam \exu_alu_result_0_iv_5[2] .INIT=16'hECA0; // @46:11028 CFG4 \exu_alu_result_0_iv_4[28] ( .A(un6_exu_alu_result0[28]), .B(un6_exu_alu_result1[28]), .C(exu_alu_operand1_s1[0]), .D(exu_alu_operand1_s0[0]), .Y(exu_alu_result_0_iv_4_Z[28]) ); defparam \exu_alu_result_0_iv_4[28] .INIT=16'hEAC0; // @46:11028 CFG4 \exu_alu_result_0_iv_4[29] ( .A(un6_exu_alu_result0[29]), .B(un6_exu_alu_result1[29]), .C(exu_alu_operand1_s1[0]), .D(exu_alu_operand1_s0[0]), .Y(exu_alu_result_0_iv_4_Z[29]) ); defparam \exu_alu_result_0_iv_4[29] .INIT=16'hEAC0; // @46:11028 CFG4 \exu_alu_result_0_iv_4[30] ( .A(un6_exu_alu_result0[30]), .B(un6_exu_alu_result1[30]), .C(exu_alu_operand1_s1[0]), .D(exu_alu_operand1_s0[0]), .Y(exu_alu_result_0_iv_4_Z[30]) ); defparam \exu_alu_result_0_iv_4[30] .INIT=16'hEAC0; // @46:11028 CFG4 \exu_alu_result_0_iv_4[27] ( .A(un6_exu_alu_result0[27]), .B(un6_exu_alu_result1[27]), .C(exu_alu_operand1_s1[0]), .D(exu_alu_operand1_s0[0]), .Y(exu_alu_result_0_iv_4_Z[27]) ); defparam \exu_alu_result_0_iv_4[27] .INIT=16'hEAC0; // @46:11028 CFG4 \exu_alu_result_0_iv_4[26] ( .A(un6_exu_alu_result0[26]), .B(un6_exu_alu_result1[26]), .C(exu_alu_operand1_s1[0]), .D(exu_alu_operand1_s0[0]), .Y(exu_alu_result_0_iv_4_Z[26]) ); defparam \exu_alu_result_0_iv_4[26] .INIT=16'hEAC0; // @46:11028 CFG4 \exu_alu_result_0_iv_4[25] ( .A(un6_exu_alu_result0[25]), .B(un6_exu_alu_result1[25]), .C(exu_alu_operand1_s1[0]), .D(exu_alu_operand1_s0[0]), .Y(exu_alu_result_0_iv_4_Z[25]) ); defparam \exu_alu_result_0_iv_4[25] .INIT=16'hEAC0; // @46:11028 CFG4 \exu_alu_result_0_iv_4[31] ( .A(un6_exu_alu_result0[31]), .B(un6_exu_alu_result1[31]), .C(exu_alu_operand1_s1[0]), .D(exu_alu_operand1_s0[0]), .Y(exu_alu_result_0_iv_4_Z[31]) ); defparam \exu_alu_result_0_iv_4[31] .INIT=16'hEAC0; // @46:11028 CFG4 \exu_alu_result_0_iv_4[24] ( .A(un6_exu_alu_result0[24]), .B(un6_exu_alu_result1[24]), .C(exu_alu_operand1_s1[0]), .D(exu_alu_operand1_s0[0]), .Y(exu_alu_result_0_iv_4_Z[24]) ); defparam \exu_alu_result_0_iv_4[24] .INIT=16'hEAC0; // @46:11028 CFG4 \exu_alu_result_0_iv_4[23] ( .A(un6_exu_alu_result0[23]), .B(un6_exu_alu_result1[23]), .C(exu_alu_operand1_s1[0]), .D(exu_alu_operand1_s0[0]), .Y(exu_alu_result_0_iv_4_Z[23]) ); defparam \exu_alu_result_0_iv_4[23] .INIT=16'hEAC0; // @46:11028 CFG4 \exu_alu_result_0_iv_4[22] ( .A(un6_exu_alu_result0[22]), .B(un6_exu_alu_result1[22]), .C(exu_alu_operand1_s1[0]), .D(exu_alu_operand1_s0[0]), .Y(exu_alu_result_0_iv_4_Z[22]) ); defparam \exu_alu_result_0_iv_4[22] .INIT=16'hEAC0; // @46:11028 CFG4 \exu_alu_result_0_iv_4[21] ( .A(un6_exu_alu_result0[21]), .B(un6_exu_alu_result1[21]), .C(exu_alu_operand1_s1[0]), .D(exu_alu_operand1_s0[0]), .Y(exu_alu_result_0_iv_4_Z[21]) ); defparam \exu_alu_result_0_iv_4[21] .INIT=16'hEAC0; // @46:11028 CFG4 \exu_alu_result_0_iv_4[20] ( .A(un6_exu_alu_result0[20]), .B(un6_exu_alu_result1[20]), .C(exu_alu_operand1_s1[0]), .D(exu_alu_operand1_s0[0]), .Y(exu_alu_result_0_iv_4_Z[20]) ); defparam \exu_alu_result_0_iv_4[20] .INIT=16'hEAC0; // @46:11028 CFG4 \exu_alu_result_0_iv_4[19] ( .A(un6_exu_alu_result0[19]), .B(un6_exu_alu_result1[19]), .C(exu_alu_operand1_s1[0]), .D(exu_alu_operand1_s0[0]), .Y(exu_alu_result_0_iv_4_Z[19]) ); defparam \exu_alu_result_0_iv_4[19] .INIT=16'hEAC0; // @46:11028 CFG4 \exu_alu_result_0_iv_4[18] ( .A(un6_exu_alu_result0[18]), .B(un6_exu_alu_result1[18]), .C(exu_alu_operand1_s1[0]), .D(exu_alu_operand1_s0[0]), .Y(exu_alu_result_0_iv_4_Z[18]) ); defparam \exu_alu_result_0_iv_4[18] .INIT=16'hEAC0; // @46:11028 CFG4 \exu_alu_result_0_iv_4[17] ( .A(un6_exu_alu_result0[17]), .B(un6_exu_alu_result1[17]), .C(exu_alu_operand1_s1[0]), .D(exu_alu_operand1_s0[0]), .Y(exu_alu_result_0_iv_4_Z[17]) ); defparam \exu_alu_result_0_iv_4[17] .INIT=16'hEAC0; // @46:11028 CFG4 \exu_alu_result_0_iv_4[16] ( .A(un6_exu_alu_result0[16]), .B(un6_exu_alu_result1[16]), .C(exu_alu_operand1_s1[0]), .D(exu_alu_operand1_s0[0]), .Y(exu_alu_result_0_iv_4_Z[16]) ); defparam \exu_alu_result_0_iv_4[16] .INIT=16'hEAC0; // @46:11028 CFG4 \exu_alu_result_0_iv_4[15] ( .A(un6_exu_alu_result0[15]), .B(un6_exu_alu_result1[15]), .C(exu_alu_operand1_s1[0]), .D(exu_alu_operand1_s0[0]), .Y(exu_alu_result_0_iv_4_Z[15]) ); defparam \exu_alu_result_0_iv_4[15] .INIT=16'hEAC0; // @46:11028 CFG4 \exu_alu_result_0_iv_4[11] ( .A(un6_exu_alu_result0[11]), .B(un6_exu_alu_result1[11]), .C(exu_alu_operand1_s1[0]), .D(exu_alu_operand1_s0[0]), .Y(exu_alu_result_0_iv_4_Z[11]) ); defparam \exu_alu_result_0_iv_4[11] .INIT=16'hEAC0; // @46:11028 CFG4 \exu_alu_result_0_iv_4[14] ( .A(un6_exu_alu_result0[14]), .B(un6_exu_alu_result1[14]), .C(exu_alu_operand1_s1[0]), .D(exu_alu_operand1_s0[0]), .Y(exu_alu_result_0_iv_4_Z[14]) ); defparam \exu_alu_result_0_iv_4[14] .INIT=16'hEAC0; // @46:11028 CFG4 \exu_alu_result_0_iv_5[7] ( .A(un6_exu_alu_result1[7]), .B(exu_result_reg_int_Z[39]), .C(exu_alu_operand1_s1[0]), .D(un3_alu_op_sel_int_2), .Y(exu_alu_result_0_iv_5_Z[7]) ); defparam \exu_alu_result_0_iv_5[7] .INIT=16'hECA0; // @46:11028 CFG4 \exu_alu_result_0_iv_5[1] ( .A(un6_exu_alu_result1[1]), .B(exu_result_reg_int_Z[33]), .C(exu_alu_operand1_s1[0]), .D(un3_alu_op_sel_int_2), .Y(exu_alu_result_0_iv_5_Z[1]) ); defparam \exu_alu_result_0_iv_5[1] .INIT=16'hECA0; // @46:11028 CFG4 \exu_alu_result_0_iv_4[1] ( .A(exu_alu_operand0_Z[1]), .B(exu_alu_operand1_Z[1]), .C(un6_exu_alu_result0_m[1]), .D(exu_alu_result194_Z), .Y(exu_alu_result_0_iv_4_Z[1]) ); defparam \exu_alu_result_0_iv_4[1] .INIT=16'hFEF0; // @46:11028 CFG4 \exu_alu_result_0_iv_5[4] ( .A(un6_exu_alu_result1[4]), .B(exu_result_reg_int_Z[36]), .C(exu_alu_operand1_s1[0]), .D(un3_alu_op_sel_int_2), .Y(exu_alu_result_0_iv_5_Z[4]) ); defparam \exu_alu_result_0_iv_5[4] .INIT=16'hECA0; // @46:11028 CFG4 \exu_alu_result_0_iv_4[4] ( .A(un6_exu_alu_result0[4]), .B(exu_alu_result_8_Z[4]), .C(exu_alu_operand1_s0[0]), .D(exu_alu_result194_Z), .Y(exu_alu_result_0_iv_4_Z[4]) ); defparam \exu_alu_result_0_iv_4[4] .INIT=16'hECA0; // @46:11028 CFG4 \exu_alu_result_0_iv_5[9] ( .A(un6_exu_alu_result1[9]), .B(exu_result_reg_int_Z[41]), .C(exu_alu_operand1_s1[0]), .D(un3_alu_op_sel_int_2), .Y(exu_alu_result_0_iv_5_Z[9]) ); defparam \exu_alu_result_0_iv_5[9] .INIT=16'hECA0; // @46:11028 CFG4 \exu_alu_result_0_iv_4[9] ( .A(exu_alu_result_int_Z[9]), .B(exu_alu_operand1_s0[0]), .C(un6_exu_alu_result0[9]), .D(exu_N_4), .Y(exu_alu_result_0_iv_4_Z[9]) ); defparam \exu_alu_result_0_iv_4[9] .INIT=16'hC0EA; // @46:11028 CFG4 \exu_alu_result_0_iv_4[12] ( .A(un6_exu_alu_result0[12]), .B(un6_exu_alu_result1[12]), .C(exu_alu_operand1_s1[0]), .D(exu_alu_operand1_s0[0]), .Y(exu_alu_result_0_iv_4_Z[12]) ); defparam \exu_alu_result_0_iv_4[12] .INIT=16'hEAC0; // @46:11028 CFG4 \exu_alu_result_0_iv_4[13] ( .A(un6_exu_alu_result0[13]), .B(un6_exu_alu_result1[13]), .C(exu_alu_operand1_s1[0]), .D(exu_alu_operand1_s0[0]), .Y(exu_alu_result_0_iv_4_Z[13]) ); defparam \exu_alu_result_0_iv_4[13] .INIT=16'hEAC0; // @46:11028 CFG4 \exu_alu_result_0_iv_4[10] ( .A(un6_exu_alu_result0[10]), .B(un6_exu_alu_result1[10]), .C(exu_alu_operand1_s1[0]), .D(exu_alu_operand1_s0[0]), .Y(exu_alu_result_0_iv_4_Z[10]) ); defparam \exu_alu_result_0_iv_4[10] .INIT=16'hEAC0; // @46:11028 CFG4 \exu_alu_result_0_iv_5[8] ( .A(un6_exu_alu_result1[8]), .B(exu_result_reg_int_Z[40]), .C(exu_alu_operand1_s1[0]), .D(un3_alu_op_sel_int_2), .Y(exu_alu_result_0_iv_5_Z[8]) ); defparam \exu_alu_result_0_iv_5[8] .INIT=16'hECA0; // @46:11028 CFG4 \exu_alu_result_0_iv_5[5] ( .A(un6_exu_alu_result1[5]), .B(exu_result_reg_int_Z[37]), .C(exu_alu_operand1_s1[0]), .D(un3_alu_op_sel_int_2), .Y(exu_alu_result_0_iv_5_Z[5]) ); defparam \exu_alu_result_0_iv_5[5] .INIT=16'hECA0; // @46:11028 CFG4 \exu_alu_result_0_iv_4[5] ( .A(un6_exu_alu_result0[5]), .B(exu_alu_result_8_Z[5]), .C(exu_alu_operand1_s0[0]), .D(exu_alu_result194_Z), .Y(exu_alu_result_0_iv_4_Z[5]) ); defparam \exu_alu_result_0_iv_4[5] .INIT=16'hECA0; // @46:11028 CFG4 \exu_alu_result_0_iv_5[6] ( .A(un6_exu_alu_result1[6]), .B(exu_result_reg_int_Z[38]), .C(exu_alu_operand1_s1[0]), .D(un3_alu_op_sel_int_2), .Y(exu_alu_result_0_iv_5_Z[6]) ); defparam \exu_alu_result_0_iv_5[6] .INIT=16'hECA0; // @46:11028 CFG4 exu_alu_result_0_sqmuxa_3_2_RNIEHFCRE ( .A(exu_alu_result_0_sqmuxa_3_2_0), .B(exu_m1_0_a2_1), .C(exu_m4_0), .D(un1_alu_op_sel_int), .Y(exu_m4_1) ); defparam exu_alu_result_0_sqmuxa_3_2_RNIEHFCRE.INIT=16'hF010; // @46:10828 CFG4 start_m3_0_a3_1 ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr_0), .B(start_m8_a1_0_Z), .C(un1_rs2_rd_hzd_4), .D(gpr_wr_valid_retr_1_1), .Y(start_m3_0_a3_1_Z) ); defparam start_m3_0_a3_1.INIT=16'h4000; // @46:10892 CFG4 exu_m2_0_a2_5 ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr_0), .B(trace_priv_i), .C(gpr_wr_valid_retr_1_1), .D(debug_enter_retr), .Y(exu_m2_0_a2_5_Z) ); defparam exu_m2_0_a2_5.INIT=16'hAABA; // @46:11028 CFG4 un1_exu_alu_result212_1_d_2_RNI9RSEJ91 ( .A(d_N_3_mux), .B(un1_exu_alu_result212_1_d_1), .C(un1_alu_op_sel_int), .D(exu_alu_operand0_valid_u_RNIF99UVE_Z), .Y(un1_exu_alu_result212_3_i_0) ); defparam un1_exu_alu_result212_1_d_2_RNI9RSEJ91.INIT=16'h5C55; // @46:11023 CFG3 exu_alu_result_int_cry_31_RNO ( .A(N_1679), .B(exu_alu_operand0_int_sn_N_10_mux), .C(exu_alu_operand0_Z[31]), .Y(exu_alu_operand0_int[31]) ); defparam exu_alu_result_int_cry_31_RNO.INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_14[13] ( .A(N_2124_i), .B(N_72), .C(N_68), .Y(N_432) ); defparam \lsu_align_result_14[13] .INIT=8'hE4; // @46:11244 CFG4 \lsu_align_result_14[14] ( .A(N_2124_i), .B(N_73), .C(N_337), .D(N_2123_i), .Y(N_433) ); defparam \lsu_align_result_14[14] .INIT=16'h44E4; // @46:11244 CFG3 \lsu_align_result_78[28] ( .A(N_2887), .B(N_2125_i), .C(exu_shifter_operand[31]), .Y(lsu_align_result_78_Z[28]) ); defparam \lsu_align_result_78[28] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_78[29] ( .A(N_2888), .B(N_2125_i), .C(exu_shifter_operand[31]), .Y(lsu_align_result_78_Z[29]) ); defparam \lsu_align_result_78[29] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_14_u[30] ( .A(N_610), .B(N_2124_i), .C(N_582), .Y(N_585) ); defparam \lsu_align_result_14_u[30] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_14_u[26] ( .A(N_2124_i), .B(N_764), .C(N_610), .Y(N_613) ); defparam \lsu_align_result_14_u[26] .INIT=8'hD8; // @46:11244 CFG3 \lsu_align_result_14_u[16] ( .A(N_2124_i), .B(N_750), .C(N_71), .Y(N_753) ); defparam \lsu_align_result_14_u[16] .INIT=8'hE4; // @46:11244 CFG3 \lsu_align_result_14_u[20] ( .A(N_2124_i), .B(N_757), .C(N_750), .Y(N_760) ); defparam \lsu_align_result_14_u[20] .INIT=8'hE4; // @46:11244 CFG3 \lsu_align_result_14_u[22] ( .A(N_2124_i), .B(N_778), .C(N_764), .Y(N_767) ); defparam \lsu_align_result_14_u[22] .INIT=8'hD8; // @46:11244 CFG3 \lsu_align_result_14_u[18] ( .A(N_2124_i), .B(N_778), .C(N_73), .Y(N_781) ); defparam \lsu_align_result_14_u[18] .INIT=8'hE4; // @46:11244 CFG3 \lsu_align_result_14_u[31] ( .A(N_2124_i), .B(N_603), .C(N_575), .Y(N_578) ); defparam \lsu_align_result_14_u[31] .INIT=8'hD8; // @46:11244 CFG3 \lsu_align_result_14_u[29] ( .A(N_2124_i), .B(N_617), .C(N_589), .Y(N_592) ); defparam \lsu_align_result_14_u[29] .INIT=8'hD8; // @46:11244 CFG3 \lsu_align_result_14_u[27] ( .A(N_2124_i), .B(N_736), .C(N_603), .Y(N_606) ); defparam \lsu_align_result_14_u[27] .INIT=8'hD8; // @46:11244 CFG3 \lsu_align_result_14_u[25] ( .A(N_2124_i), .B(N_771), .C(N_617), .Y(N_620) ); defparam \lsu_align_result_14_u[25] .INIT=8'hD8; // @46:11244 CFG3 \lsu_align_result_14_u[23] ( .A(N_2124_i), .B(N_792), .C(N_736), .Y(N_739) ); defparam \lsu_align_result_14_u[23] .INIT=8'hD8; // @46:11244 CFG3 \lsu_align_result_14_u[21] ( .A(N_2124_i), .B(N_785), .C(N_771), .Y(N_774) ); defparam \lsu_align_result_14_u[21] .INIT=8'hD8; // @46:11244 CFG3 \lsu_align_result_14_u[17] ( .A(N_2124_i), .B(N_785), .C(N_72), .Y(N_788) ); defparam \lsu_align_result_14_u[17] .INIT=8'hE4; // @46:11244 CFG3 \lsu_align_result_14_u[19] ( .A(N_799), .B(N_2124_i), .C(N_792), .Y(N_795) ); defparam \lsu_align_result_14_u[19] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_46_u[3] ( .A(N_2124_i), .B(N_1106), .C(N_1102), .Y(N_690) ); defparam \lsu_align_result_46_u[3] .INIT=8'hD8; // @46:11244 CFG3 \lsu_align_result_46_u[7] ( .A(N_1110), .B(N_2124_i), .C(N_1106), .Y(N_704) ); defparam \lsu_align_result_46_u[7] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_46_u[5] ( .A(N_2124_i), .B(N_1108), .C(N_1104), .Y(N_718) ); defparam \lsu_align_result_46_u[5] .INIT=8'hD8; // @46:11244 CFG3 \lsu_align_result_39_u[9] ( .A(N_1104), .B(N_2124_i), .C(N_1100), .Y(N_732) ); defparam \lsu_align_result_39_u[9] .INIT=8'hB8; // @46:11244 CFG2 \lsu_align_result_15[2] ( .A(N_2125_i), .B(N_429), .Y(N_453) ); defparam \lsu_align_result_15[2] .INIT=4'h4; // @46:11244 CFG2 \lsu_align_result_47[29] ( .A(N_2125_i), .B(N_1896), .Y(N_1504) ); defparam \lsu_align_result_47[29] .INIT=4'h4; // @46:11244 CFG3 \lsu_align_result_46_u[4] ( .A(N_2124_i), .B(N_1107), .C(N_1103), .Y(N_683) ); defparam \lsu_align_result_46_u[4] .INIT=8'hD8; // @46:11244 CFG3 \lsu_align_result_39_u[8] ( .A(N_2124_i), .B(N_1103), .C(N_1099), .Y(N_697) ); defparam \lsu_align_result_39_u[8] .INIT=8'hD8; // @46:11244 CFG3 \lsu_align_result_46_u[6] ( .A(N_1109), .B(N_2124_i), .C(N_1105), .Y(N_711) ); defparam \lsu_align_result_46_u[6] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_54_u[8] ( .A(N_2124_i), .B(N_1119), .C(N_1115), .Y(N_816) ); defparam \lsu_align_result_54_u[8] .INIT=8'hD8; // @46:11244 CFG3 \lsu_align_result_91_u[2] ( .A(N_2124_i), .B(N_870), .C(exu_shifter_operand[31]), .Y(N_823) ); defparam \lsu_align_result_91_u[2] .INIT=8'hE4; // @46:11244 CFG3 \lsu_align_result_91_u[3] ( .A(N_2124_i), .B(N_1118), .C(exu_shifter_operand[31]), .Y(N_830) ); defparam \lsu_align_result_91_u[3] .INIT=8'hE4; // @46:11244 CFG4 \lsu_align_result_54_u[9] ( .A(N_2124_i), .B(N_1116), .C(N_1612), .D(N_2123_i), .Y(N_880) ); defparam \lsu_align_result_54_u[9] .INIT=16'h44E4; // @46:9457 CFG4 \mul_div_cnt_RNISSBTF[5] ( .A(un2_exception_taken), .B(mul_div_cnt_Z[5]), .C(machine_implicit_wr_mtval_tval_wr_en), .D(exu_op_abort_ex_1), .Y(N_13_0) ); defparam \mul_div_cnt_RNISSBTF[5] .INIT=16'h0023; // @46:11244 CFG3 \lsu_align_result_46_u[2] ( .A(N_2124_i), .B(N_1105), .C(N_1101), .Y(N_725) ); defparam \lsu_align_result_46_u[2] .INIT=8'hD8; // @46:11244 CFG3 \lsu_align_result_14_u[28] ( .A(N_596), .B(N_2124_i), .C(N_568), .Y(N_599) ); defparam \lsu_align_result_14_u[28] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_14_u[24] ( .A(N_2124_i), .B(N_757), .C(N_568), .Y(N_571) ); defparam \lsu_align_result_14_u[24] .INIT=8'hD8; // @46:11244 CFG4 \lsu_align_result_96_2[31] ( .A(shifter_unit_op_sel[1]), .B(exu_shifter_operand[31]), .C(N_2018), .D(shifter_unit_op_sel[0]), .Y(cpu_d_req_wr_data_net_2[31]) ); defparam \lsu_align_result_96_2[31] .INIT=16'h88A0; // @46:11244 CFG3 \lsu_align_result_95_2[15] ( .A(lsu_align_result_95_2_2_Z), .B(exu_shifter_operand[15]), .C(un174_shifter_result_1_i[5]), .Y(N_1045) ); defparam \lsu_align_result_95_2[15] .INIT=8'hAE; // @46:11028 CFG4 \exu_alu_result_0_iv_0[3] ( .A(exu_alu_operand1_Z[3]), .B(exu_alu_operand0_Z[3]), .C(exu_alu_result_26_m_Z[3]), .D(exu_alu_result195), .Y(exu_alu_result_0_iv_0_Z[3]) ); defparam \exu_alu_result_0_iv_0[3] .INIT=16'hF8F0; // @46:11028 CFG4 \exu_alu_result_0_iv_0[2] ( .A(exu_alu_result_10_m_0_Z[2]), .B(un17_start_div), .C(exu_alu_result_26_Z[2]), .D(exu_alu_result195), .Y(exu_alu_result_0_iv_0_Z[2]) ); defparam \exu_alu_result_0_iv_0[2] .INIT=16'hEAC0; // @46:11028 CFG4 \exu_alu_result_0_iv_0[28] ( .A(exu_alu_operand1_Z[28]), .B(exu_alu_operand0_Z[28]), .C(exu_alu_result_26_m_Z[28]), .D(exu_alu_result195), .Y(exu_alu_result_0_iv_0_Z[28]) ); defparam \exu_alu_result_0_iv_0[28] .INIT=16'hF8F0; // @46:11028 CFG4 \exu_alu_result_0_iv_0[29] ( .A(exu_alu_operand1_Z[29]), .B(exu_alu_operand0_Z[29]), .C(exu_alu_result_26_m_Z[29]), .D(exu_alu_result195), .Y(exu_alu_result_0_iv_0_Z[29]) ); defparam \exu_alu_result_0_iv_0[29] .INIT=16'hF8F0; // @46:11028 CFG4 \exu_alu_result_0_iv_0[30] ( .A(exu_alu_operand1_Z[30]), .B(exu_alu_operand0_Z[30]), .C(exu_alu_result_26_m_Z[30]), .D(exu_alu_result195), .Y(exu_alu_result_0_iv_0_Z[30]) ); defparam \exu_alu_result_0_iv_0[30] .INIT=16'hF8F0; // @46:11028 CFG4 \exu_alu_result_0_iv_0[27] ( .A(exu_alu_operand1_Z[27]), .B(exu_alu_operand0_Z[27]), .C(exu_alu_result_26_m_Z[27]), .D(exu_alu_result195), .Y(exu_alu_result_0_iv_0_Z[27]) ); defparam \exu_alu_result_0_iv_0[27] .INIT=16'hF8F0; // @46:11028 CFG4 \exu_alu_result_0_iv_0[26] ( .A(exu_alu_operand1_Z[26]), .B(exu_alu_operand0_Z[26]), .C(exu_alu_result_26_m_Z[26]), .D(exu_alu_result195), .Y(exu_alu_result_0_iv_0_Z[26]) ); defparam \exu_alu_result_0_iv_0[26] .INIT=16'hF8F0; // @46:11028 CFG4 \exu_alu_result_0_iv_0[25] ( .A(exu_alu_operand1_Z[25]), .B(exu_alu_operand0_Z[25]), .C(exu_alu_result_26_m_Z[25]), .D(exu_alu_result195), .Y(exu_alu_result_0_iv_0_Z[25]) ); defparam \exu_alu_result_0_iv_0[25] .INIT=16'hF8F0; // @46:11028 CFG4 \exu_alu_result_0_iv_0[31] ( .A(exu_alu_operand1_Z[31]), .B(exu_alu_operand0_Z[31]), .C(exu_alu_result_26_m_Z[31]), .D(exu_alu_result195), .Y(exu_alu_result_0_iv_0_Z[31]) ); defparam \exu_alu_result_0_iv_0[31] .INIT=16'hF8F0; // @46:11028 CFG4 \exu_alu_result_0_iv_0[24] ( .A(exu_alu_operand1_Z[24]), .B(exu_alu_operand0_Z[24]), .C(exu_alu_result_26_m_Z[24]), .D(exu_alu_result195), .Y(exu_alu_result_0_iv_0_Z[24]) ); defparam \exu_alu_result_0_iv_0[24] .INIT=16'hF8F0; // @46:11028 CFG4 \exu_alu_result_0_iv_0[23] ( .A(exu_alu_operand1_Z[23]), .B(exu_alu_operand0_Z[23]), .C(exu_alu_result_26_m_Z[23]), .D(exu_alu_result195), .Y(exu_alu_result_0_iv_0_Z[23]) ); defparam \exu_alu_result_0_iv_0[23] .INIT=16'hF8F0; // @46:11028 CFG4 \exu_alu_result_0_iv_0[22] ( .A(N_2189), .B(exu_alu_result195), .C(exu_alu_operand1_Z[22]), .D(exu_alu_operand0_Z[22]), .Y(exu_alu_result_0_iv_0_Z[22]) ); defparam \exu_alu_result_0_iv_0[22] .INIT=16'hD555; // @46:11028 CFG4 \exu_alu_result_0_iv_0[21] ( .A(exu_alu_operand1_Z[21]), .B(exu_alu_operand0_Z[21]), .C(exu_alu_result_26_m_Z[21]), .D(exu_alu_result195), .Y(exu_alu_result_0_iv_0_Z[21]) ); defparam \exu_alu_result_0_iv_0[21] .INIT=16'hF8F0; // @46:11028 CFG4 \exu_alu_result_0_iv_0[20] ( .A(exu_alu_operand1_Z[20]), .B(exu_alu_operand0_Z[20]), .C(exu_alu_result_26_m_Z[20]), .D(exu_alu_result195), .Y(exu_alu_result_0_iv_0_Z[20]) ); defparam \exu_alu_result_0_iv_0[20] .INIT=16'hF8F0; // @46:11028 CFG4 \exu_alu_result_0_iv_0[19] ( .A(exu_alu_operand1_Z[19]), .B(exu_alu_operand0_Z[19]), .C(exu_alu_result_26_m_Z[19]), .D(exu_alu_result195), .Y(exu_alu_result_0_iv_0_Z[19]) ); defparam \exu_alu_result_0_iv_0[19] .INIT=16'hF8F0; // @46:11028 CFG4 \exu_alu_result_0_iv_0[18] ( .A(exu_alu_operand1_Z[18]), .B(exu_alu_operand0_Z[18]), .C(exu_alu_result_26_m_Z[18]), .D(exu_alu_result195), .Y(exu_alu_result_0_iv_0_Z[18]) ); defparam \exu_alu_result_0_iv_0[18] .INIT=16'hF8F0; // @46:11028 CFG4 \exu_alu_result_0_iv_0[17] ( .A(exu_alu_operand1_Z[17]), .B(exu_alu_operand0_Z[17]), .C(exu_alu_result_26_m_Z[17]), .D(exu_alu_result195), .Y(exu_alu_result_0_iv_0_Z[17]) ); defparam \exu_alu_result_0_iv_0[17] .INIT=16'hF8F0; // @46:11028 CFG4 \exu_alu_result_0_iv_0[16] ( .A(exu_alu_operand1_Z[16]), .B(exu_alu_operand0_Z[16]), .C(exu_alu_result_26_m_Z[16]), .D(exu_alu_result195), .Y(exu_alu_result_0_iv_0_Z[16]) ); defparam \exu_alu_result_0_iv_0[16] .INIT=16'hF8F0; // @46:11028 CFG4 \exu_alu_result_0_iv_0[15] ( .A(exu_alu_operand1_Z[15]), .B(exu_alu_operand0_Z[15]), .C(exu_alu_result_26_m_Z[15]), .D(exu_alu_result195), .Y(exu_alu_result_0_iv_0_Z[15]) ); defparam \exu_alu_result_0_iv_0[15] .INIT=16'hF8F0; // @46:11028 CFG4 \exu_alu_result_0_iv_0[11] ( .A(exu_alu_operand1_Z[11]), .B(exu_alu_operand0_Z[11]), .C(exu_alu_result_26_m_Z[11]), .D(exu_alu_result195), .Y(exu_alu_result_0_iv_0_Z[11]) ); defparam \exu_alu_result_0_iv_0[11] .INIT=16'hF8F0; // @46:11028 CFG4 \exu_alu_result_0_iv_0[14] ( .A(exu_alu_operand1_Z[14]), .B(exu_alu_operand0_Z[14]), .C(exu_alu_result_26_m_Z[14]), .D(exu_alu_result195), .Y(exu_alu_result_0_iv_0_Z[14]) ); defparam \exu_alu_result_0_iv_0[14] .INIT=16'hF8F0; // @46:11028 CFG4 \exu_alu_result_0_iv_0[7] ( .A(exu_alu_operand1_Z[7]), .B(exu_alu_operand0_Z[7]), .C(exu_alu_result_26_m_Z[7]), .D(exu_alu_result195), .Y(exu_alu_result_0_iv_0_Z[7]) ); defparam \exu_alu_result_0_iv_0[7] .INIT=16'hF8F0; // @46:11028 CFG4 \exu_alu_result_0_iv_0[1] ( .A(N_2190), .B(exu_alu_result195), .C(exu_alu_operand1_Z[1]), .D(exu_alu_operand0_Z[1]), .Y(exu_alu_result_0_iv_0_Z[1]) ); defparam \exu_alu_result_0_iv_0[1] .INIT=16'hD555; // @46:11028 CFG4 \exu_alu_result_0_iv_0[4] ( .A(exu_alu_operand1_Z[4]), .B(exu_alu_operand0_Z[4]), .C(exu_alu_result_26_m_Z[4]), .D(exu_alu_result195), .Y(exu_alu_result_0_iv_0_Z[4]) ); defparam \exu_alu_result_0_iv_0[4] .INIT=16'hF8F0; // @46:11028 CFG4 \exu_alu_result_0_iv_0[9] ( .A(exu_alu_operand1_Z[9]), .B(exu_alu_operand0_Z[9]), .C(exu_alu_result_26_m_Z[9]), .D(exu_alu_result195), .Y(exu_alu_result_0_iv_0_Z[9]) ); defparam \exu_alu_result_0_iv_0[9] .INIT=16'hF8F0; // @46:11028 CFG4 \exu_alu_result_0_iv_0[12] ( .A(exu_alu_operand1_Z[12]), .B(exu_alu_operand0_Z[12]), .C(exu_alu_result_26_m_Z[12]), .D(exu_alu_result195), .Y(exu_alu_result_0_iv_0_Z[12]) ); defparam \exu_alu_result_0_iv_0[12] .INIT=16'hF8F0; // @46:11028 CFG4 \exu_alu_result_0_iv_0[13] ( .A(exu_alu_operand1_Z[13]), .B(exu_alu_operand0_Z[13]), .C(exu_alu_result_26_m_Z[13]), .D(exu_alu_result195), .Y(exu_alu_result_0_iv_0_Z[13]) ); defparam \exu_alu_result_0_iv_0[13] .INIT=16'hF8F0; // @46:11028 CFG4 \exu_alu_result_0_iv_0[10] ( .A(exu_alu_operand1_Z[10]), .B(exu_alu_operand0_Z[10]), .C(exu_alu_result_26_m_Z[10]), .D(exu_alu_result195), .Y(exu_alu_result_0_iv_0_Z[10]) ); defparam \exu_alu_result_0_iv_0[10] .INIT=16'hF8F0; // @46:11028 CFG4 \exu_alu_result_0_iv_0[8] ( .A(exu_alu_operand1_Z[8]), .B(exu_alu_operand0_Z[8]), .C(exu_alu_result_26_m_Z[8]), .D(exu_alu_result195), .Y(exu_alu_result_0_iv_0_Z[8]) ); defparam \exu_alu_result_0_iv_0[8] .INIT=16'hF8F0; // @46:11028 CFG4 \exu_alu_result_0_iv_0[5] ( .A(exu_alu_operand1_Z[5]), .B(exu_alu_operand0_Z[5]), .C(exu_alu_result_26_m_Z[5]), .D(exu_alu_result195), .Y(exu_alu_result_0_iv_0_Z[5]) ); defparam \exu_alu_result_0_iv_0[5] .INIT=16'hF8F0; // @46:11028 CFG4 \exu_alu_result_0_iv_0[6] ( .A(exu_alu_operand1_Z[6]), .B(exu_alu_operand0_Z[6]), .C(exu_alu_result_26_m_Z[6]), .D(exu_alu_result195), .Y(exu_alu_result_0_iv_0_Z[6]) ); defparam \exu_alu_result_0_iv_0[6] .INIT=16'hF8F0; // @46:11028 CFG4 \exu_alu_result_6_RNIFEGPS1[0] ( .A(un6_exu_alu_result1_m_a0_4[0]), .B(exu_alu_result_6_Z[0]), .C(exu_alu_result193_a0_3_Z), .D(exu_m1_e_2), .Y(exu_N_5_mux_0) ); defparam \exu_alu_result_6_RNIFEGPS1[0] .INIT=16'h0015; // @46:11244 CFG3 \lsu_align_result_15[4] ( .A(N_71), .B(N_2125_i), .C(N_2124_i), .Y(N_455) ); defparam \lsu_align_result_15[4] .INIT=8'h02; // @46:11244 CFG2 \lsu_align_result_15[3] ( .A(N_430), .B(N_2125_i), .Y(N_454) ); defparam \lsu_align_result_15[3] .INIT=4'h2; // @46:11244 CFG2 \lsu_align_result_47[27] ( .A(N_2125_i), .B(N_1894), .Y(N_1502) ); defparam \lsu_align_result_47[27] .INIT=4'h4; // @46:11244 CFG2 \lsu_align_result_47[28] ( .A(N_2125_i), .B(N_1895), .Y(N_1503) ); defparam \lsu_align_result_47[28] .INIT=4'h4; // @46:11244 CFG2 lsu_align_result_30_1_1 ( .A(N_2125_i), .B(N_739), .Y(lsu_align_result_30_1_1_Z) ); defparam lsu_align_result_30_1_1.INIT=4'h4; // @46:11244 CFG4 lsu_align_result_31_0_1 ( .A(N_70), .B(N_2124_i), .C(N_2125_i), .D(N_799), .Y(lsu_align_result_31_0_1_Z) ); defparam lsu_align_result_31_0_1.INIT=16'hB080; // @46:11422 CFG3 \next_div_divisor_5[32] ( .A(div_ack_Z), .B(next_div_divisor_5_1_Z[32]), .C(div_divisor_Z[33]), .Y(next_div_divisor_5_Z[32]) ); defparam \next_div_divisor_5[32] .INIT=8'hEC; // @46:11244 CFG3 \lsu_align_result_7_0[31] ( .A(N_512_1), .B(N_32), .C(N_2123_i), .Y(N_512) ); defparam \lsu_align_result_7_0[31] .INIT=8'hEA; // @46:11244 CFG3 \lsu_align_result_35[1] ( .A(N_1092_1), .B(N_1030), .C(N_2123_i), .Y(N_1092) ); defparam \lsu_align_result_35[1] .INIT=8'hEA; // @46:10825 CFG3 \mul_mp[1] ( .A(mul_mp_2_Z[1]), .B(exu_alu_operand1_Z[1]), .C(mul_mp_sn_N_6_mux), .Y(mul_mp_Z[1]) ); defparam \mul_mp[1] .INIT=8'hAE; // @46:11244 CFG3 \lsu_align_result_39_0[0] ( .A(N_2123_i), .B(N_505_1), .C(N_1029), .Y(N_505) ); defparam \lsu_align_result_39_0[0] .INIT=8'hEC; // @46:10825 CFG3 \mul_mp[2] ( .A(mul_mp_2_Z[2]), .B(exu_alu_operand1_Z[2]), .C(mul_mp_sn_N_6_mux), .Y(mul_mp_Z[2]) ); defparam \mul_mp[2] .INIT=8'hAE; // @46:11244 CFG3 \lsu_align_result_7_0[30] ( .A(N_533_1), .B(N_31), .C(N_2123_i), .Y(N_533) ); defparam \lsu_align_result_7_0[30] .INIT=8'hEA; // @46:11422 CFG3 \next_div_divisor_5[33] ( .A(div_ack_Z), .B(next_div_divisor_5_1_Z[33]), .C(div_divisor_Z[34]), .Y(next_div_divisor_5_Z[33]) ); defparam \next_div_divisor_5[33] .INIT=8'hEC; // @46:11420 CFG4 \next_dividend[12] ( .A(exu_alu_operand0_Z[12]), .B(dividend_Z[12]), .C(next_dividend_0_sqmuxa_Z), .D(un1_next_dividend_0_sqmuxa_Z), .Y(next_dividend_0[12]) ); defparam \next_dividend[12] .INIT=16'h5CAA; // @46:11420 CFG4 \next_dividend[13] ( .A(exu_alu_operand0_Z[13]), .B(dividend_Z[13]), .C(next_dividend_0_sqmuxa_Z), .D(un1_next_dividend_0_sqmuxa_Z), .Y(next_dividend_0[13]) ); defparam \next_dividend[13] .INIT=16'h5CAA; // @46:11420 CFG4 \next_dividend[10] ( .A(exu_alu_operand0_Z[10]), .B(dividend_Z[10]), .C(next_dividend_0_sqmuxa_Z), .D(un1_next_dividend_0_sqmuxa_Z), .Y(next_dividend_0[10]) ); defparam \next_dividend[10] .INIT=16'h5CAA; // @46:11420 CFG4 \next_dividend[9] ( .A(exu_alu_operand0_Z[9]), .B(dividend_Z[9]), .C(next_dividend_0_sqmuxa_Z), .D(un1_next_dividend_0_sqmuxa_Z), .Y(next_dividend_0[9]) ); defparam \next_dividend[9] .INIT=16'h5CAA; // @46:11420 CFG4 \next_dividend[1] ( .A(exu_alu_operand0_Z[1]), .B(dividend_Z[1]), .C(next_dividend_0_sqmuxa_Z), .D(un1_next_dividend_0_sqmuxa_Z), .Y(next_dividend_0[1]) ); defparam \next_dividend[1] .INIT=16'h5CAA; // @46:11420 CFG4 \next_dividend[0] ( .A(exu_alu_operand0_0), .B(dividend_Z[0]), .C(next_dividend_0_sqmuxa_Z), .D(un1_next_dividend_0_sqmuxa_Z), .Y(next_dividend_0[0]) ); defparam \next_dividend[0] .INIT=16'hAC55; // @46:11420 CFG4 \next_dividend[15] ( .A(exu_alu_operand0_Z[15]), .B(dividend_Z[15]), .C(next_dividend_0_sqmuxa_Z), .D(un1_next_dividend_0_sqmuxa_Z), .Y(next_dividend_0[15]) ); defparam \next_dividend[15] .INIT=16'h5CAA; // @46:11420 CFG4 \next_dividend[11] ( .A(exu_alu_operand0_Z[11]), .B(dividend_Z[11]), .C(next_dividend_0_sqmuxa_Z), .D(un1_next_dividend_0_sqmuxa_Z), .Y(next_dividend_0[11]) ); defparam \next_dividend[11] .INIT=16'h5CAA; // @46:11420 CFG4 \next_dividend[8] ( .A(exu_alu_operand0_Z[8]), .B(dividend_Z[8]), .C(next_dividend_0_sqmuxa_Z), .D(un1_next_dividend_0_sqmuxa_Z), .Y(next_dividend_0[8]) ); defparam \next_dividend[8] .INIT=16'h5CAA; // @46:11420 CFG4 \next_dividend[16] ( .A(exu_alu_operand0_Z[16]), .B(dividend_Z[16]), .C(next_dividend_0_sqmuxa_Z), .D(un1_next_dividend_0_sqmuxa_Z), .Y(next_dividend_0[16]) ); defparam \next_dividend[16] .INIT=16'h5CAA; // @46:11420 CFG4 \next_dividend[4] ( .A(exu_alu_operand0_Z[4]), .B(dividend_Z[4]), .C(next_dividend_0_sqmuxa_Z), .D(un1_next_dividend_0_sqmuxa_Z), .Y(next_dividend_0[4]) ); defparam \next_dividend[4] .INIT=16'h5CAA; // @46:11420 CFG4 \next_dividend[14] ( .A(exu_alu_operand0_Z[14]), .B(dividend_Z[14]), .C(next_dividend_0_sqmuxa_Z), .D(un1_next_dividend_0_sqmuxa_Z), .Y(next_dividend_0[14]) ); defparam \next_dividend[14] .INIT=16'h5CAA; // @46:11420 CFG4 \next_dividend[18] ( .A(exu_alu_operand0_Z[18]), .B(dividend_Z[18]), .C(next_dividend_0_sqmuxa_Z), .D(un1_next_dividend_0_sqmuxa_Z), .Y(next_dividend_0[18]) ); defparam \next_dividend[18] .INIT=16'h5CAA; // @46:11420 CFG4 \next_dividend[17] ( .A(exu_alu_operand0_Z[17]), .B(dividend_Z[17]), .C(next_dividend_0_sqmuxa_Z), .D(un1_next_dividend_0_sqmuxa_Z), .Y(next_dividend_0[17]) ); defparam \next_dividend[17] .INIT=16'h5CAA; // @46:11420 CFG4 \next_dividend[24] ( .A(exu_alu_operand0_Z[24]), .B(dividend_Z[24]), .C(next_dividend_0_sqmuxa_Z), .D(un1_next_dividend_0_sqmuxa_Z), .Y(next_dividend_0[24]) ); defparam \next_dividend[24] .INIT=16'h5CAA; // @46:11420 CFG4 \next_dividend[6] ( .A(exu_alu_operand0_Z[6]), .B(dividend_Z[6]), .C(next_dividend_0_sqmuxa_Z), .D(un1_next_dividend_0_sqmuxa_Z), .Y(next_dividend_0[6]) ); defparam \next_dividend[6] .INIT=16'h5CAA; // @46:11420 CFG4 \next_dividend[7] ( .A(exu_alu_operand0_Z[7]), .B(dividend_Z[7]), .C(next_dividend_0_sqmuxa_Z), .D(un1_next_dividend_0_sqmuxa_Z), .Y(next_dividend_0[7]) ); defparam \next_dividend[7] .INIT=16'h5CAA; // @46:11420 CFG4 \next_dividend[5] ( .A(exu_alu_operand0_Z[5]), .B(dividend_Z[5]), .C(next_dividend_0_sqmuxa_Z), .D(un1_next_dividend_0_sqmuxa_Z), .Y(next_dividend_0[5]) ); defparam \next_dividend[5] .INIT=16'h5CAA; // @46:11420 CFG4 \next_dividend[26] ( .A(exu_alu_operand0_Z[26]), .B(dividend_Z[26]), .C(next_dividend_0_sqmuxa_Z), .D(un1_next_dividend_0_sqmuxa_Z), .Y(next_dividend_0[26]) ); defparam \next_dividend[26] .INIT=16'h5CAA; // @46:11420 CFG4 \next_dividend[25] ( .A(exu_alu_operand0_Z[25]), .B(dividend_Z[25]), .C(next_dividend_0_sqmuxa_Z), .D(un1_next_dividend_0_sqmuxa_Z), .Y(next_dividend_0[25]) ); defparam \next_dividend[25] .INIT=16'h5CAA; // @46:11420 CFG4 \next_dividend[2] ( .A(exu_alu_operand0_Z[2]), .B(dividend_Z[2]), .C(next_dividend_0_sqmuxa_Z), .D(un1_next_dividend_0_sqmuxa_Z), .Y(next_dividend_0[2]) ); defparam \next_dividend[2] .INIT=16'h5CAA; // @46:11420 CFG4 \next_dividend[29] ( .A(exu_alu_operand0_Z[29]), .B(dividend_Z[29]), .C(next_dividend_0_sqmuxa_Z), .D(un1_next_dividend_0_sqmuxa_Z), .Y(next_dividend_0[29]) ); defparam \next_dividend[29] .INIT=16'h5CAA; // @46:11420 CFG4 \next_dividend[30] ( .A(exu_alu_operand0_Z[30]), .B(dividend_Z[30]), .C(next_dividend_0_sqmuxa_Z), .D(un1_next_dividend_0_sqmuxa_Z), .Y(next_dividend_0[30]) ); defparam \next_dividend[30] .INIT=16'h5CAA; // @46:11420 CFG4 \next_dividend[22] ( .A(exu_alu_operand0_Z[22]), .B(dividend_Z[22]), .C(next_dividend_0_sqmuxa_Z), .D(un1_next_dividend_0_sqmuxa_Z), .Y(next_dividend_0[22]) ); defparam \next_dividend[22] .INIT=16'h5CAA; // @46:11420 CFG4 \next_dividend[20] ( .A(exu_alu_operand0_Z[20]), .B(dividend_Z[20]), .C(next_dividend_0_sqmuxa_Z), .D(un1_next_dividend_0_sqmuxa_Z), .Y(next_dividend_0[20]) ); defparam \next_dividend[20] .INIT=16'h5CAA; // @46:11420 CFG4 \next_dividend[3] ( .A(exu_alu_operand0_Z[3]), .B(dividend_Z[3]), .C(next_dividend_0_sqmuxa_Z), .D(un1_next_dividend_0_sqmuxa_Z), .Y(next_dividend_0[3]) ); defparam \next_dividend[3] .INIT=16'h5CAA; // @46:11420 CFG4 \next_dividend[19] ( .A(exu_alu_operand0_Z[19]), .B(dividend_Z[19]), .C(next_dividend_0_sqmuxa_Z), .D(un1_next_dividend_0_sqmuxa_Z), .Y(next_dividend_0[19]) ); defparam \next_dividend[19] .INIT=16'h5CAA; // @46:11420 CFG4 \next_dividend[27] ( .A(exu_alu_operand0_Z[27]), .B(dividend_Z[27]), .C(next_dividend_0_sqmuxa_Z), .D(un1_next_dividend_0_sqmuxa_Z), .Y(next_dividend_0[27]) ); defparam \next_dividend[27] .INIT=16'h5CAA; // @46:11420 CFG4 \next_dividend[21] ( .A(exu_alu_operand0_Z[21]), .B(dividend_Z[21]), .C(next_dividend_0_sqmuxa_Z), .D(un1_next_dividend_0_sqmuxa_Z), .Y(next_dividend_0[21]) ); defparam \next_dividend[21] .INIT=16'h5CAA; // @46:11420 CFG4 \next_dividend[28] ( .A(exu_alu_operand0_Z[28]), .B(dividend_Z[28]), .C(next_dividend_0_sqmuxa_Z), .D(un1_next_dividend_0_sqmuxa_Z), .Y(next_dividend_0[28]) ); defparam \next_dividend[28] .INIT=16'h5CAA; // @46:11420 CFG4 \next_dividend[23] ( .A(exu_alu_operand0_Z[23]), .B(dividend_Z[23]), .C(next_dividend_0_sqmuxa_Z), .D(un1_next_dividend_0_sqmuxa_Z), .Y(next_dividend_0[23]) ); defparam \next_dividend[23] .INIT=16'h5CAA; // @46:11422 CFG3 \next_div_divisor_5[43] ( .A(div_ack_Z), .B(next_div_divisor_5_1_Z[43]), .C(div_divisor_Z[44]), .Y(next_div_divisor_5_Z[43]) ); defparam \next_div_divisor_5[43] .INIT=8'hEC; // @46:11422 CFG3 \next_div_divisor_5[44] ( .A(div_ack_Z), .B(next_div_divisor_5_1_Z[44]), .C(div_divisor_Z[45]), .Y(next_div_divisor_5_Z[44]) ); defparam \next_div_divisor_5[44] .INIT=8'hEC; // @46:11422 CFG3 \next_div_divisor_5[56] ( .A(div_ack_Z), .B(next_div_divisor_5_1_Z[56]), .C(div_divisor_Z[57]), .Y(next_div_divisor_5_Z[56]) ); defparam \next_div_divisor_5[56] .INIT=8'hEC; // @46:11422 CFG3 \next_div_divisor_5[46] ( .A(div_ack_Z), .B(next_div_divisor_5_1_Z[46]), .C(div_divisor_Z[47]), .Y(next_div_divisor_5_Z[46]) ); defparam \next_div_divisor_5[46] .INIT=8'hEC; // @46:11422 CFG3 \next_div_divisor_5[61] ( .A(div_ack_Z), .B(next_div_divisor_5_1_Z[61]), .C(div_divisor_Z[62]), .Y(next_div_divisor_5_Z[61]) ); defparam \next_div_divisor_5[61] .INIT=8'hEC; // @46:11422 CFG3 \next_div_divisor_5[57] ( .A(div_ack_Z), .B(next_div_divisor_5_1_Z[57]), .C(div_divisor_Z[58]), .Y(next_div_divisor_5_Z[57]) ); defparam \next_div_divisor_5[57] .INIT=8'hEC; // @46:11422 CFG3 \next_div_divisor_5[42] ( .A(div_ack_Z), .B(next_div_divisor_5_1_Z[42]), .C(div_divisor_Z[43]), .Y(next_div_divisor_5_Z[42]) ); defparam \next_div_divisor_5[42] .INIT=8'hEC; // @46:11422 CFG3 \next_div_divisor_5[45] ( .A(div_ack_Z), .B(next_div_divisor_5_1_Z[45]), .C(div_divisor_Z[46]), .Y(next_div_divisor_5_Z[45]) ); defparam \next_div_divisor_5[45] .INIT=8'hEC; // @46:11422 CFG3 \next_div_divisor_5[37] ( .A(div_ack_Z), .B(next_div_divisor_5_1_Z[37]), .C(div_divisor_Z[38]), .Y(next_div_divisor_5_Z[37]) ); defparam \next_div_divisor_5[37] .INIT=8'hEC; // @46:11422 CFG3 \next_div_divisor_5[39] ( .A(div_ack_Z), .B(next_div_divisor_5_1_Z[39]), .C(div_divisor_Z[40]), .Y(next_div_divisor_5_Z[39]) ); defparam \next_div_divisor_5[39] .INIT=8'hEC; // @46:11422 CFG3 \next_div_divisor_5[41] ( .A(div_ack_Z), .B(next_div_divisor_5_1_Z[41]), .C(div_divisor_Z[42]), .Y(next_div_divisor_5_Z[41]) ); defparam \next_div_divisor_5[41] .INIT=8'hEC; // @46:11422 CFG3 \next_div_divisor_5[52] ( .A(div_ack_Z), .B(next_div_divisor_5_1_Z[52]), .C(div_divisor_Z[53]), .Y(next_div_divisor_5_Z[52]) ); defparam \next_div_divisor_5[52] .INIT=8'hEC; // @46:11422 CFG3 \next_div_divisor_5[40] ( .A(div_ack_Z), .B(next_div_divisor_5_1_Z[40]), .C(div_divisor_Z[41]), .Y(next_div_divisor_5_Z[40]) ); defparam \next_div_divisor_5[40] .INIT=8'hEC; // @46:11422 CFG3 \next_div_divisor_5[53] ( .A(div_ack_Z), .B(next_div_divisor_5_1_Z[53]), .C(div_divisor_Z[54]), .Y(next_div_divisor_5_Z[53]) ); defparam \next_div_divisor_5[53] .INIT=8'hEC; // @46:11422 CFG3 \next_div_divisor_5[38] ( .A(div_ack_Z), .B(next_div_divisor_5_1_Z[38]), .C(div_divisor_Z[39]), .Y(next_div_divisor_5_Z[38]) ); defparam \next_div_divisor_5[38] .INIT=8'hEC; // @46:11422 CFG3 \next_div_divisor_5[54] ( .A(div_ack_Z), .B(next_div_divisor_5_1_Z[54]), .C(div_divisor_Z[55]), .Y(next_div_divisor_5_Z[54]) ); defparam \next_div_divisor_5[54] .INIT=8'hEC; // @46:11422 CFG3 \next_div_divisor_5[35] ( .A(div_ack_Z), .B(next_div_divisor_5_1_Z[35]), .C(div_divisor_Z[36]), .Y(next_div_divisor_5_Z[35]) ); defparam \next_div_divisor_5[35] .INIT=8'hEC; // @46:11422 CFG3 \next_div_divisor_5[36] ( .A(div_ack_Z), .B(next_div_divisor_5_1_Z[36]), .C(div_divisor_Z[37]), .Y(next_div_divisor_5_Z[36]) ); defparam \next_div_divisor_5[36] .INIT=8'hEC; // @46:11422 CFG3 \next_div_divisor_5[34] ( .A(div_ack_Z), .B(next_div_divisor_5_1_Z[34]), .C(div_divisor_Z[35]), .Y(next_div_divisor_5_Z[34]) ); defparam \next_div_divisor_5[34] .INIT=8'hEC; // @46:11422 CFG3 \next_div_divisor_5[60] ( .A(div_ack_Z), .B(next_div_divisor_5_1_Z[60]), .C(div_divisor_Z[61]), .Y(next_div_divisor_5_Z[60]) ); defparam \next_div_divisor_5[60] .INIT=8'hEC; // @46:11422 CFG3 \next_div_divisor_5[51] ( .A(div_ack_Z), .B(next_div_divisor_5_1_Z[51]), .C(div_divisor_Z[52]), .Y(next_div_divisor_5_Z[51]) ); defparam \next_div_divisor_5[51] .INIT=8'hEC; // @46:11422 CFG3 \next_div_divisor_5[48] ( .A(div_ack_Z), .B(next_div_divisor_5_1_Z[48]), .C(div_divisor_Z[49]), .Y(next_div_divisor_5_Z[48]) ); defparam \next_div_divisor_5[48] .INIT=8'hEC; // @46:11422 CFG3 \next_div_divisor_5[59] ( .A(div_ack_Z), .B(next_div_divisor_5_1_Z[59]), .C(div_divisor_Z[60]), .Y(next_div_divisor_5_Z[59]) ); defparam \next_div_divisor_5[59] .INIT=8'hEC; // @46:11422 CFG3 \next_div_divisor_5[55] ( .A(div_ack_Z), .B(next_div_divisor_5_1_Z[55]), .C(div_divisor_Z[56]), .Y(next_div_divisor_5_Z[55]) ); defparam \next_div_divisor_5[55] .INIT=8'hEC; // @46:11422 CFG3 \next_div_divisor_5[50] ( .A(div_ack_Z), .B(next_div_divisor_5_1_Z[50]), .C(div_divisor_Z[51]), .Y(next_div_divisor_5_Z[50]) ); defparam \next_div_divisor_5[50] .INIT=8'hEC; // @46:11422 CFG3 \next_div_divisor_5[49] ( .A(div_ack_Z), .B(next_div_divisor_5_1_Z[49]), .C(div_divisor_Z[50]), .Y(next_div_divisor_5_Z[49]) ); defparam \next_div_divisor_5[49] .INIT=8'hEC; // @46:11422 CFG3 \next_div_divisor_5[58] ( .A(div_ack_Z), .B(next_div_divisor_5_1_Z[58]), .C(div_divisor_Z[59]), .Y(next_div_divisor_5_Z[58]) ); defparam \next_div_divisor_5[58] .INIT=8'hEC; // @46:10828 CFG4 start_m3_0_a3_2 ( .A(debug_enter_retr), .B(formal_trace_reset_taken), .C(trace_priv_i), .D(start_m3_0_a3_1_Z), .Y(start_m3_0_a3_2_Z) ); defparam start_m3_0_a3_2.INIT=16'hF100; // @46:11425 CFG4 un15_next_res_pos_neg_29 ( .A(un15_next_res_pos_neg_20_Z), .B(un15_next_res_pos_neg_23_Z), .C(un15_next_res_pos_neg_22_Z), .D(un15_next_res_pos_neg_21_Z), .Y(un15_next_res_pos_neg_29_Z) ); defparam un15_next_res_pos_neg_29.INIT=16'hFFFE; // @46:11023 CFG4 exu_alu_result_int_cry_30_RNO ( .A(N_1678_1), .B(exu_alu_operand0_Z[30]), .C(exu_alu_operand0_int_sn_N_10_mux), .D(N_1678_2), .Y(exu_alu_operand0_int[30]) ); defparam exu_alu_result_int_cry_30_RNO.INIT=16'hFCAC; // @46:11023 CFG4 exu_alu_result_int_cry_29_RNO ( .A(N_1677_1), .B(exu_alu_operand0_Z[29]), .C(exu_alu_operand0_int_sn_N_10_mux), .D(N_1677_2), .Y(exu_alu_operand0_int[29]) ); defparam exu_alu_result_int_cry_29_RNO.INIT=16'hFCAC; // @46:11023 CFG4 exu_alu_result_int_cry_28_RNO ( .A(N_1676_1), .B(exu_alu_operand0_Z[28]), .C(exu_alu_operand0_int_sn_N_10_mux), .D(N_1676_2), .Y(exu_alu_operand0_int[28]) ); defparam exu_alu_result_int_cry_28_RNO.INIT=16'hFCAC; // @46:11023 CFG4 exu_alu_result_int_cry_27_RNO ( .A(N_1675_1), .B(exu_alu_operand0_Z[27]), .C(exu_alu_operand0_int_sn_N_10_mux), .D(N_1675_2), .Y(exu_alu_operand0_int[27]) ); defparam exu_alu_result_int_cry_27_RNO.INIT=16'hFCAC; // @46:11023 CFG4 exu_alu_result_int_cry_26_RNO ( .A(N_1674_1), .B(exu_alu_operand0_Z[26]), .C(exu_alu_operand0_int_sn_N_10_mux), .D(N_1674_2), .Y(exu_alu_operand0_int[26]) ); defparam exu_alu_result_int_cry_26_RNO.INIT=16'hFCAC; // @46:11023 CFG4 exu_alu_result_int_cry_25_RNO ( .A(N_1673_1), .B(exu_alu_operand0_Z[25]), .C(exu_alu_operand0_int_sn_N_10_mux), .D(N_1673_2), .Y(exu_alu_operand0_int[25]) ); defparam exu_alu_result_int_cry_25_RNO.INIT=16'hFCAC; // @46:11023 CFG4 exu_alu_result_int_cry_24_RNO ( .A(N_1672_1), .B(exu_alu_operand0_Z[24]), .C(exu_alu_operand0_int_sn_N_10_mux), .D(N_1672_2), .Y(exu_alu_operand0_int[24]) ); defparam exu_alu_result_int_cry_24_RNO.INIT=16'hFCAC; // @46:11023 CFG4 exu_alu_result_int_cry_23_RNO ( .A(N_1671_1), .B(exu_alu_operand0_Z[23]), .C(exu_alu_operand0_int_sn_N_10_mux), .D(N_1671_2), .Y(exu_alu_operand0_int[23]) ); defparam exu_alu_result_int_cry_23_RNO.INIT=16'hFCAC; // @46:11023 CFG4 exu_alu_result_int_cry_22_RNO ( .A(N_1670_1), .B(exu_alu_operand0_Z[22]), .C(exu_alu_operand0_int_sn_N_10_mux), .D(N_1670_2), .Y(exu_alu_operand0_int[22]) ); defparam exu_alu_result_int_cry_22_RNO.INIT=16'hFCAC; // @46:11023 CFG4 exu_alu_result_int_cry_21_RNO ( .A(N_1669_1), .B(exu_alu_operand0_Z[21]), .C(exu_alu_operand0_int_sn_N_10_mux), .D(N_1669_2), .Y(exu_alu_operand0_int[21]) ); defparam exu_alu_result_int_cry_21_RNO.INIT=16'hFCAC; // @46:11023 CFG4 exu_alu_result_int_cry_20_RNO ( .A(N_1668_1), .B(exu_alu_operand0_Z[20]), .C(exu_alu_operand0_int_sn_N_10_mux), .D(N_1668_2), .Y(exu_alu_operand0_int[20]) ); defparam exu_alu_result_int_cry_20_RNO.INIT=16'hFCAC; // @46:11023 CFG4 exu_alu_result_int_cry_19_RNO ( .A(N_1667_1), .B(exu_alu_operand0_Z[19]), .C(exu_alu_operand0_int_sn_N_10_mux), .D(N_1667_2), .Y(exu_alu_operand0_int[19]) ); defparam exu_alu_result_int_cry_19_RNO.INIT=16'hFCAC; // @46:11023 CFG4 exu_alu_result_int_cry_18_RNO ( .A(N_1666_1), .B(exu_alu_operand0_Z[18]), .C(exu_alu_operand0_int_sn_N_10_mux), .D(N_1666_2), .Y(exu_alu_operand0_int[18]) ); defparam exu_alu_result_int_cry_18_RNO.INIT=16'hFCAC; // @46:11023 CFG4 exu_alu_result_int_cry_17_RNO ( .A(N_1665_1), .B(exu_alu_operand0_Z[17]), .C(exu_alu_operand0_int_sn_N_10_mux), .D(N_1665_2), .Y(exu_alu_operand0_int[17]) ); defparam exu_alu_result_int_cry_17_RNO.INIT=16'hFCAC; // @46:11023 CFG4 exu_alu_result_int_cry_16_RNO ( .A(N_1664_1), .B(exu_alu_operand0_Z[16]), .C(exu_alu_operand0_int_sn_N_10_mux), .D(N_1664_2), .Y(exu_alu_operand0_int[16]) ); defparam exu_alu_result_int_cry_16_RNO.INIT=16'hFCAC; // @46:11023 CFG4 exu_alu_result_int_cry_15_RNO ( .A(N_1663_1), .B(exu_alu_operand0_Z[15]), .C(exu_alu_operand0_int_sn_N_10_mux), .D(N_1663_2), .Y(exu_alu_operand0_int[15]) ); defparam exu_alu_result_int_cry_15_RNO.INIT=16'hFCAC; // @46:11023 CFG4 exu_alu_result_int_cry_14_RNO ( .A(N_1662_1), .B(exu_alu_operand0_Z[14]), .C(exu_alu_operand0_int_sn_N_10_mux), .D(N_1662_2), .Y(exu_alu_operand0_int[14]) ); defparam exu_alu_result_int_cry_14_RNO.INIT=16'hFCAC; // @46:11023 CFG4 exu_alu_result_int_cry_13_RNO ( .A(N_1661_1), .B(exu_alu_operand0_Z[13]), .C(exu_alu_operand0_int_sn_N_10_mux), .D(N_1661_2), .Y(exu_alu_operand0_int[13]) ); defparam exu_alu_result_int_cry_13_RNO.INIT=16'hFCAC; // @46:11023 CFG4 exu_alu_result_int_cry_12_RNO ( .A(N_1660_1), .B(exu_alu_operand0_Z[12]), .C(exu_alu_operand0_int_sn_N_10_mux), .D(N_1660_2), .Y(exu_alu_operand0_int[12]) ); defparam exu_alu_result_int_cry_12_RNO.INIT=16'hFCAC; // @46:11023 CFG4 exu_alu_result_int_cry_11_RNO ( .A(N_1659_1), .B(exu_alu_operand0_Z[11]), .C(exu_alu_operand0_int_sn_N_10_mux), .D(N_1659_2), .Y(exu_alu_operand0_int[11]) ); defparam exu_alu_result_int_cry_11_RNO.INIT=16'hFCAC; // @46:11023 CFG4 exu_alu_result_int_cry_10_RNO ( .A(N_1658_1), .B(exu_alu_operand0_Z[10]), .C(exu_alu_operand0_int_sn_N_10_mux), .D(N_1658_2), .Y(exu_alu_operand0_int[10]) ); defparam exu_alu_result_int_cry_10_RNO.INIT=16'hFCAC; // @46:11023 CFG4 exu_alu_result_int_cry_9_RNO ( .A(N_1657_1), .B(exu_alu_operand0_Z[9]), .C(exu_alu_operand0_int_sn_N_10_mux), .D(N_1657_2), .Y(exu_alu_operand0_int[9]) ); defparam exu_alu_result_int_cry_9_RNO.INIT=16'hFCAC; // @46:11023 CFG4 exu_alu_result_int_cry_8_RNO ( .A(N_1656_1), .B(exu_alu_operand0_Z[8]), .C(exu_alu_operand0_int_sn_N_10_mux), .D(N_1656_2), .Y(exu_alu_operand0_int[8]) ); defparam exu_alu_result_int_cry_8_RNO.INIT=16'hFCAC; // @46:11023 CFG4 exu_alu_result_int_cry_7_RNO ( .A(N_1655_1), .B(exu_alu_operand0_Z[7]), .C(exu_alu_operand0_int_sn_N_10_mux), .D(N_1655_2), .Y(exu_alu_operand0_int[7]) ); defparam exu_alu_result_int_cry_7_RNO.INIT=16'hFCAC; // @46:11023 CFG4 exu_alu_result_int_cry_6_RNO ( .A(N_1654_1), .B(exu_alu_operand0_Z[6]), .C(exu_alu_operand0_int_sn_N_10_mux), .D(N_1654_2), .Y(exu_alu_operand0_int[6]) ); defparam exu_alu_result_int_cry_6_RNO.INIT=16'hFCAC; // @46:11023 CFG4 exu_alu_result_int_cry_5_RNO ( .A(N_1653_1), .B(exu_alu_operand0_Z[5]), .C(exu_alu_operand0_int_sn_N_10_mux), .D(N_1653_2), .Y(exu_alu_operand0_int[5]) ); defparam exu_alu_result_int_cry_5_RNO.INIT=16'hFCAC; // @46:11023 CFG4 exu_alu_result_int_cry_4_RNO ( .A(N_1652_1), .B(exu_alu_operand0_Z[4]), .C(exu_alu_operand0_int_sn_N_10_mux), .D(N_1652_2), .Y(exu_alu_operand0_int[4]) ); defparam exu_alu_result_int_cry_4_RNO.INIT=16'hFCAC; // @46:11023 CFG4 exu_alu_result_int_cry_3_RNO ( .A(N_1651_1), .B(exu_alu_operand0_Z[3]), .C(exu_alu_operand0_int_sn_N_10_mux), .D(N_1651_2), .Y(exu_alu_operand0_int[3]) ); defparam exu_alu_result_int_cry_3_RNO.INIT=16'hFCAC; // @46:11244 CFG3 \lsu_align_result_30[17] ( .A(un174_shifter_result_1_i[5]), .B(N_452), .C(exu_shifter_operand[17]), .Y(N_948) ); defparam \lsu_align_result_30[17] .INIT=8'hD8; // @46:11244 CFG4 \lsu_align_result_31[1] ( .A(un174_shifter_result_1_i[5]), .B(exu_shifter_operand[1]), .C(N_452), .D(N_2122_i), .Y(N_964) ); defparam \lsu_align_result_31[1] .INIT=16'h44F0; // @46:11244 CFG2 \lsu_align_result_15[5] ( .A(N_432), .B(N_2125_i), .Y(N_456) ); defparam \lsu_align_result_15[5] .INIT=4'h2; // @46:11244 CFG2 \lsu_align_result_15[6] ( .A(N_2125_i), .B(N_433), .Y(N_457) ); defparam \lsu_align_result_15[6] .INIT=4'h4; // @46:11244 CFG2 \lsu_align_result_15[8] ( .A(N_753), .B(N_2125_i), .Y(N_459) ); defparam \lsu_align_result_15[8] .INIT=4'h2; // @46:11244 CFG4 \lsu_align_result_15[7] ( .A(N_70), .B(N_2124_i), .C(N_2125_i), .D(N_799), .Y(N_458) ); defparam \lsu_align_result_15[7] .INIT=16'h0B08; // @46:11244 CFG2 \lsu_align_result_47[24] ( .A(N_2125_i), .B(N_816), .Y(N_1499) ); defparam \lsu_align_result_47[24] .INIT=4'h4; // @46:11244 CFG2 \lsu_align_result_47[25] ( .A(N_2125_i), .B(N_880), .Y(N_1500) ); defparam \lsu_align_result_47[25] .INIT=4'h4; // @46:11244 CFG2 \lsu_align_result_47[26] ( .A(N_2125_i), .B(N_873), .Y(N_1501) ); defparam \lsu_align_result_47[26] .INIT=4'h4; // @46:11244 CFG4 \lsu_align_result_15_1[26] ( .A(N_93), .B(N_2125_i), .C(N_2124_i), .D(N_582), .Y(N_477_1) ); defparam \lsu_align_result_15_1[26] .INIT=16'h3202; // @46:11244 CFG4 \lsu_align_result_15_1[27] ( .A(N_94), .B(N_2125_i), .C(N_2124_i), .D(N_575), .Y(N_478_1) ); defparam \lsu_align_result_15_1[27] .INIT=16'h3202; // @46:11244 CFG4 \lsu_align_result_15_1[25] ( .A(N_92), .B(N_2125_i), .C(N_2124_i), .D(N_589), .Y(N_476_1) ); defparam \lsu_align_result_15_1[25] .INIT=16'h3202; // @46:11244 CFG4 \lsu_align_result_15_1[24] ( .A(N_91), .B(N_2124_i), .C(N_2125_i), .D(N_596), .Y(N_475_1) ); defparam \lsu_align_result_15_1[24] .INIT=16'h0E02; // @46:11244 CFG4 \lsu_align_result_47_1[6] ( .A(N_659), .B(N_2125_i), .C(N_2124_i), .D(N_1101), .Y(N_1481_1) ); defparam \lsu_align_result_47_1[6] .INIT=16'h3202; // @46:11244 CFG4 \lsu_align_result_47_1[4] ( .A(N_1095), .B(N_2125_i), .C(N_2124_i), .D(N_1099), .Y(N_1479_1) ); defparam \lsu_align_result_47_1[4] .INIT=16'h3202; // @46:11244 CFG4 \lsu_align_result_47_1[7] ( .A(N_1098), .B(N_2125_i), .C(N_2124_i), .D(N_1102), .Y(N_1482_1) ); defparam \lsu_align_result_47_1[7] .INIT=16'h3202; // @46:11244 CFG4 \lsu_align_result_47_1[5] ( .A(N_666), .B(N_2125_i), .C(N_2124_i), .D(N_1100), .Y(N_1480_1) ); defparam \lsu_align_result_47_1[5] .INIT=16'h3202; // @46:11244 CFG2 \lsu_align_result_7_u_2[29] ( .A(N_92), .B(N_2124_i), .Y(N_543_2) ); defparam \lsu_align_result_7_u_2[29] .INIT=4'h8; // @46:11244 CFG2 \lsu_align_result_39_u_2[2] ( .A(N_659), .B(N_2124_i), .Y(N_662_2) ); defparam \lsu_align_result_39_u_2[2] .INIT=4'h8; // @46:11244 CFG2 \lsu_align_result_7_u_2[28] ( .A(N_91), .B(N_2124_i), .Y(N_522_2) ); defparam \lsu_align_result_7_u_2[28] .INIT=4'h8; // @46:11244 CFG2 \lsu_align_result_39_u_2[3] ( .A(N_1098), .B(N_2124_i), .Y(N_634_2) ); defparam \lsu_align_result_39_u_2[3] .INIT=4'h8; // @46:11028 CFG4 \exu_alu_result_0_iv_1[3] ( .A(exu_alu_operand0_Z[3]), .B(exu_alu_operand1_Z[3]), .C(exu_alu_result_0_iv_0_Z[3]), .D(exu_alu_result193), .Y(exu_alu_result_0_iv_1_Z[3]) ); defparam \exu_alu_result_0_iv_1[3] .INIT=16'hF6F0; // @46:11028 CFG4 \exu_alu_result_0_iv_1[2] ( .A(exu_alu_operand0_Z[2]), .B(exu_alu_operand1_Z[2]), .C(exu_alu_result_0_iv_0_Z[2]), .D(exu_alu_result193), .Y(exu_alu_result_0_iv_1_Z[2]) ); defparam \exu_alu_result_0_iv_1[2] .INIT=16'hF6F0; // @46:11028 CFG4 \exu_alu_result_0_iv_1[7] ( .A(exu_alu_operand0_Z[7]), .B(exu_alu_operand1_Z[7]), .C(exu_alu_result_0_iv_0_Z[7]), .D(exu_alu_result193), .Y(exu_alu_result_0_iv_1_Z[7]) ); defparam \exu_alu_result_0_iv_1[7] .INIT=16'hF6F0; // @46:11028 CFG4 \exu_alu_result_0_iv_1[1] ( .A(exu_alu_operand0_Z[1]), .B(exu_alu_operand1_Z[1]), .C(exu_alu_result_0_iv_0_Z[1]), .D(exu_alu_result193), .Y(exu_alu_result_0_iv_1_Z[1]) ); defparam \exu_alu_result_0_iv_1[1] .INIT=16'hF6F0; // @46:11028 CFG4 \exu_alu_result_0_iv_1[8] ( .A(exu_alu_operand0_Z[8]), .B(exu_alu_operand1_Z[8]), .C(exu_alu_result_0_iv_0_Z[8]), .D(exu_alu_result193), .Y(exu_alu_result_0_iv_1_Z[8]) ); defparam \exu_alu_result_0_iv_1[8] .INIT=16'hF6F0; // @46:11028 CFG4 \exu_alu_result_0_iv_1[6] ( .A(exu_alu_operand0_Z[6]), .B(exu_alu_operand1_Z[6]), .C(exu_alu_result_0_iv_0_Z[6]), .D(exu_alu_result193), .Y(exu_alu_result_0_iv_1_Z[6]) ); defparam \exu_alu_result_0_iv_1[6] .INIT=16'hF6F0; // @46:11244 CFG4 \lsu_align_result_15[9] ( .A(N_68), .B(N_2125_i), .C(N_2124_i), .D(N_788), .Y(N_460) ); defparam \lsu_align_result_15[9] .INIT=16'h3B08; // @46:11244 CFG3 \lsu_align_result_15[10] ( .A(N_429), .B(N_781), .C(N_2125_i), .Y(N_461) ); defparam \lsu_align_result_15[10] .INIT=8'hAC; // @46:11244 CFG3 \lsu_align_result_15[11] ( .A(N_795), .B(N_2125_i), .C(N_430), .Y(N_462) ); defparam \lsu_align_result_15[11] .INIT=8'hE2; // @46:11244 CFG4 \lsu_align_result_15[12] ( .A(N_71), .B(N_2125_i), .C(N_2124_i), .D(N_760), .Y(N_463) ); defparam \lsu_align_result_15[12] .INIT=16'h3B08; // @46:11244 CFG3 \lsu_align_result_15[13] ( .A(N_2125_i), .B(N_432), .C(N_774), .Y(N_464) ); defparam \lsu_align_result_15[13] .INIT=8'hD8; // @46:11244 CFG3 \lsu_align_result_15[14] ( .A(N_433), .B(N_767), .C(N_2125_i), .Y(N_465) ); defparam \lsu_align_result_15[14] .INIT=8'hAC; // @46:11244 CFG3 \lsu_align_result_15[17] ( .A(N_620), .B(N_2125_i), .C(N_788), .Y(N_468) ); defparam \lsu_align_result_15[17] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_15[18] ( .A(N_613), .B(N_2125_i), .C(N_781), .Y(N_469) ); defparam \lsu_align_result_15[18] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_15[19] ( .A(N_795), .B(N_606), .C(N_2125_i), .Y(N_470) ); defparam \lsu_align_result_15[19] .INIT=8'hAC; // @46:11244 CFG3 \lsu_align_result_15[20] ( .A(N_599), .B(N_2125_i), .C(N_760), .Y(N_471) ); defparam \lsu_align_result_15[20] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_15[21] ( .A(N_592), .B(N_2125_i), .C(N_774), .Y(N_472) ); defparam \lsu_align_result_15[21] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_15[22] ( .A(N_585), .B(N_2125_i), .C(N_767), .Y(N_473) ); defparam \lsu_align_result_15[22] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_15[23] ( .A(N_578), .B(N_2125_i), .C(N_739), .Y(N_474) ); defparam \lsu_align_result_15[23] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_30[18] ( .A(un174_shifter_result_1_i[5]), .B(N_453), .C(exu_shifter_operand[18]), .Y(N_949) ); defparam \lsu_align_result_30[18] .INIT=8'hD8; // @46:11244 CFG4 \lsu_align_result_31[2] ( .A(un174_shifter_result_1_i[5]), .B(exu_shifter_operand[2]), .C(N_453), .D(N_2122_i), .Y(N_965) ); defparam \lsu_align_result_31[2] .INIT=16'h44F0; // @46:11244 CFG3 \lsu_align_result_78[26] ( .A(N_823), .B(N_2125_i), .C(exu_shifter_operand[31]), .Y(lsu_align_result_78_Z[26]) ); defparam \lsu_align_result_78[26] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_78[27] ( .A(N_830), .B(N_2125_i), .C(exu_shifter_operand[31]), .Y(lsu_align_result_78_Z[27]) ); defparam \lsu_align_result_78[27] .INIT=8'hE2; // @46:11244 CFG3 \un174_shifter_result_1_1.N_2125_i ( .A(exu_shifter_places_Z[3]), .B(SUM[2]), .C(exu_shifter_places_Z[2]), .Y(N_2125_i) ); defparam \un174_shifter_result_1_1.N_2125_i .INIT=8'hA9; // @46:11282 CFG4 exu_result_valid_iv_1_RNO ( .A(slow_N_3_mux_i), .B(un1_exu_mux_result27_1_Z), .C(start_slow_mul), .D(N_13_0), .Y(un1_exu_mux_result_valid_sel_m) ); defparam exu_result_valid_iv_1_RNO.INIT=16'h0020; // @46:11028 CFG4 un128_exu_alu_result_cry_31_RNI01RTHF ( .A(exu_N_5_mux_0), .B(un1_alu_op_sel_int), .C(un128_exu_alu_result_i), .D(N_14_i), .Y(un128_exu_alu_result_cry_31_RNI01RTHF_1z) ); defparam un128_exu_alu_result_cry_31_RNI01RTHF.INIT=16'h2EEE; // @46:11028 CFG4 \exu_alu_result_iv_10_s_0[0] ( .A(exu_m4_0_a2_1), .B(N_4_i), .C(un1_alu_op_sel_int), .D(d_N_5), .Y(exu_alu_result_iv_10_out) ); defparam \exu_alu_result_iv_10_s_0[0] .INIT=16'h080D; // @46:11244 CFG3 \lsu_align_result_30[19] ( .A(un174_shifter_result_1_i[5]), .B(N_454), .C(exu_shifter_operand[19]), .Y(N_950) ); defparam \lsu_align_result_30[19] .INIT=8'hD8; // @46:11244 CFG3 \lsu_align_result_30[20] ( .A(un174_shifter_result_1_i[5]), .B(N_455), .C(exu_shifter_operand[20]), .Y(N_951) ); defparam \lsu_align_result_30[20] .INIT=8'hD8; // @46:11244 CFG4 \lsu_align_result_31[3] ( .A(un174_shifter_result_1_i[5]), .B(exu_shifter_operand[3]), .C(N_454), .D(N_2122_i), .Y(N_966) ); defparam \lsu_align_result_31[3] .INIT=16'h44F0; // @46:11244 CFG4 \lsu_align_result_31[4] ( .A(un174_shifter_result_1_i[5]), .B(exu_shifter_operand[4]), .C(N_455), .D(N_2122_i), .Y(N_967) ); defparam \lsu_align_result_31[4] .INIT=16'h44F0; // @46:9457 CFG3 \mul_div_cnt_RNIJ50KKD[5] ( .A(N_13_0), .B(start_slow_mul), .C(trace_priv_i), .Y(next_exu_result_reg_int48) ); defparam \mul_div_cnt_RNIJ50KKD[5] .INIT=8'h08; // @46:11473 CFG3 \div_divisor_RNO[47] ( .A(div_divisor_Z[48]), .B(div_ack_Z), .C(N_2199_1), .Y(N_2199_i) ); defparam \div_divisor_RNO[47] .INIT=8'h0B; // @46:11244 CFG3 \lsu_align_result_54_u[2] ( .A(N_2124_i), .B(N_1109), .C(N_858_2), .Y(N_858) ); defparam \lsu_align_result_54_u[2] .INIT=8'hF4; // @46:11244 CFG3 \lsu_align_result_85_u[9] ( .A(N_2124_i), .B(N_1116), .C(N_844_2), .Y(N_844) ); defparam \lsu_align_result_85_u[9] .INIT=8'hF4; // @46:11244 CFG4 \lsu_align_result_54_3[4] ( .A(N_2123_i), .B(lsu_align_result_54_3_1_1_Z), .C(lsu_align_result_54_3_2_1_Z), .D(N_1703_1), .Y(N_1703) ); defparam \lsu_align_result_54_3[4] .INIT=16'hFFA8; // @46:11244 CFG3 \lsu_align_result_28_u[31] ( .A(N_799), .B(N_2124_i), .C(N_676_2), .Y(N_676) ); defparam \lsu_align_result_28_u[31] .INIT=8'hF2; // @46:11244 CFG3 \lsu_align_result_60_u[0] ( .A(N_2124_i), .B(N_1115), .C(N_837_2), .Y(N_837) ); defparam \lsu_align_result_60_u[0] .INIT=8'hF4; // @46:11244 CFG3 \lsu_align_result_54_u[3] ( .A(N_2124_i), .B(N_1110), .C(N_851_2), .Y(N_851) ); defparam \lsu_align_result_54_u[3] .INIT=8'hF4; // @46:11244 CFG3 \lsu_align_result_46_u[9] ( .A(N_2124_i), .B(N_1108), .C(N_865_2), .Y(N_865) ); defparam \lsu_align_result_46_u[9] .INIT=8'hF4; // @46:11244 CFG3 \lsu_align_result_46_u[8] ( .A(N_2124_i), .B(N_1107), .C(N_746_2), .Y(N_746) ); defparam \lsu_align_result_46_u[8] .INIT=8'hF4; // @46:11244 CFG4 \lsu_align_result_54_3[6] ( .A(N_2123_i), .B(lsu_align_result_54_3_1_1_Z), .C(lsu_align_result_54_3_2_1_Z), .D(N_1705_2), .Y(N_1705) ); defparam \lsu_align_result_54_3[6] .INIT=16'hFF54; // @46:11244 CFG4 \lsu_align_result_54_3[7] ( .A(N_2123_i), .B(lsu_align_result_54_3_9_1), .C(lsu_align_result_54_3_10_1_Z), .D(N_1706_2), .Y(N_1706) ); defparam \lsu_align_result_54_3[7] .INIT=16'hFF54; // @46:11244 CFG4 \lsu_align_result_54_3[5] ( .A(N_2123_i), .B(lsu_align_result_54_3_9_1), .C(lsu_align_result_54_3_10_1_Z), .D(N_1704_1), .Y(N_1704) ); defparam \lsu_align_result_54_3[5] .INIT=16'hFFA8; // @46:11028 CFG4 \exu_alu_result_0_iv_2[28] ( .A(exu_alu_result196), .B(exu_alu_result_0_iv_0_Z[28]), .C(ex_retr_pipe_exu_result_retr[28]), .D(exu_alu_result_6_m_Z[28]), .Y(exu_alu_result_0_iv_2_Z[28]) ); defparam \exu_alu_result_0_iv_2[28] .INIT=16'hFFEC; // @46:11028 CFG4 \exu_alu_result_0_iv_2[29] ( .A(exu_alu_result196), .B(exu_alu_result_0_iv_0_Z[29]), .C(ex_retr_pipe_exu_result_retr[29]), .D(exu_alu_result_6_m_Z[29]), .Y(exu_alu_result_0_iv_2_Z[29]) ); defparam \exu_alu_result_0_iv_2[29] .INIT=16'hFFEC; // @46:11028 CFG4 \exu_alu_result_0_iv_2[30] ( .A(exu_alu_result196), .B(exu_alu_result_0_iv_0_Z[30]), .C(ex_retr_pipe_exu_result_retr[30]), .D(exu_alu_result_6_m_Z[30]), .Y(exu_alu_result_0_iv_2_Z[30]) ); defparam \exu_alu_result_0_iv_2[30] .INIT=16'hFFEC; // @46:11028 CFG4 \exu_alu_result_0_iv_2[27] ( .A(exu_alu_result196), .B(exu_alu_result_0_iv_0_Z[27]), .C(ex_retr_pipe_exu_result_retr[27]), .D(exu_alu_result_6_m_Z[27]), .Y(exu_alu_result_0_iv_2_Z[27]) ); defparam \exu_alu_result_0_iv_2[27] .INIT=16'hFFEC; // @46:11028 CFG4 \exu_alu_result_0_iv_2[26] ( .A(exu_alu_result196), .B(exu_alu_result_0_iv_0_Z[26]), .C(ex_retr_pipe_exu_result_retr[26]), .D(exu_alu_result_6_m_Z[26]), .Y(exu_alu_result_0_iv_2_Z[26]) ); defparam \exu_alu_result_0_iv_2[26] .INIT=16'hFFEC; // @46:11028 CFG4 \exu_alu_result_0_iv_2[25] ( .A(exu_alu_result196), .B(exu_alu_result_0_iv_0_Z[25]), .C(ex_retr_pipe_exu_result_retr[25]), .D(exu_alu_result_6_m_Z[25]), .Y(exu_alu_result_0_iv_2_Z[25]) ); defparam \exu_alu_result_0_iv_2[25] .INIT=16'hFFEC; // @46:11028 CFG4 \exu_alu_result_0_iv_2[31] ( .A(exu_alu_result196), .B(exu_alu_result_0_iv_0_Z[31]), .C(ex_retr_pipe_exu_result_retr[31]), .D(exu_alu_result_6_m_Z[31]), .Y(exu_alu_result_0_iv_2_Z[31]) ); defparam \exu_alu_result_0_iv_2[31] .INIT=16'hFFEC; // @46:11028 CFG4 \exu_alu_result_0_iv_2[24] ( .A(exu_alu_result196), .B(exu_alu_result_0_iv_0_Z[24]), .C(ex_retr_pipe_exu_result_retr[24]), .D(exu_alu_result_6_m_Z[24]), .Y(exu_alu_result_0_iv_2_Z[24]) ); defparam \exu_alu_result_0_iv_2[24] .INIT=16'hFFEC; // @46:11028 CFG4 \exu_alu_result_0_iv_2[23] ( .A(exu_alu_result196), .B(exu_alu_result_0_iv_0_Z[23]), .C(ex_retr_pipe_exu_result_retr[23]), .D(exu_alu_result_6_m_Z[23]), .Y(exu_alu_result_0_iv_2_Z[23]) ); defparam \exu_alu_result_0_iv_2[23] .INIT=16'hFFEC; // @46:11028 CFG4 \exu_alu_result_0_iv_2[22] ( .A(exu_alu_result196), .B(exu_alu_result_0_iv_0_Z[22]), .C(ex_retr_pipe_exu_result_retr[22]), .D(exu_alu_result_6_m_Z[22]), .Y(exu_alu_result_0_iv_2_Z[22]) ); defparam \exu_alu_result_0_iv_2[22] .INIT=16'hFFEC; // @46:11028 CFG4 \exu_alu_result_0_iv_2[21] ( .A(exu_alu_result196), .B(exu_alu_result_0_iv_0_Z[21]), .C(ex_retr_pipe_exu_result_retr[21]), .D(exu_alu_result_6_m_Z[21]), .Y(exu_alu_result_0_iv_2_Z[21]) ); defparam \exu_alu_result_0_iv_2[21] .INIT=16'hFFEC; // @46:11028 CFG4 \exu_alu_result_0_iv_2[20] ( .A(exu_alu_result196), .B(exu_alu_result_0_iv_0_Z[20]), .C(ex_retr_pipe_exu_result_retr[20]), .D(exu_alu_result_6_m_Z[20]), .Y(exu_alu_result_0_iv_2_Z[20]) ); defparam \exu_alu_result_0_iv_2[20] .INIT=16'hFFEC; // @46:11028 CFG4 \exu_alu_result_0_iv_2[19] ( .A(exu_alu_result196), .B(exu_alu_result_0_iv_0_Z[19]), .C(ex_retr_pipe_exu_result_retr[19]), .D(exu_alu_result_6_m_Z[19]), .Y(exu_alu_result_0_iv_2_Z[19]) ); defparam \exu_alu_result_0_iv_2[19] .INIT=16'hFFEC; // @46:11028 CFG4 \exu_alu_result_0_iv_2[18] ( .A(exu_alu_result196), .B(exu_alu_result_0_iv_0_Z[18]), .C(ex_retr_pipe_exu_result_retr[18]), .D(exu_alu_result_6_m_Z[18]), .Y(exu_alu_result_0_iv_2_Z[18]) ); defparam \exu_alu_result_0_iv_2[18] .INIT=16'hFFEC; // @46:11028 CFG4 \exu_alu_result_0_iv_2[17] ( .A(exu_alu_result196), .B(exu_alu_result_0_iv_0_Z[17]), .C(ex_retr_pipe_exu_result_retr[17]), .D(exu_alu_result_6_m_Z[17]), .Y(exu_alu_result_0_iv_2_Z[17]) ); defparam \exu_alu_result_0_iv_2[17] .INIT=16'hFFEC; // @46:11028 CFG4 \exu_alu_result_0_iv_2[16] ( .A(exu_alu_result196), .B(exu_alu_result_0_iv_0_Z[16]), .C(ex_retr_pipe_exu_result_retr[16]), .D(exu_alu_result_6_m_Z[16]), .Y(exu_alu_result_0_iv_2_Z[16]) ); defparam \exu_alu_result_0_iv_2[16] .INIT=16'hFFEC; // @46:11028 CFG4 \exu_alu_result_0_iv_2[15] ( .A(exu_alu_result196), .B(exu_alu_result_0_iv_0_Z[15]), .C(ex_retr_pipe_exu_result_retr[15]), .D(exu_alu_result_6_m_Z[15]), .Y(exu_alu_result_0_iv_2_Z[15]) ); defparam \exu_alu_result_0_iv_2[15] .INIT=16'hFFEC; // @46:11028 CFG4 \exu_alu_result_0_iv_2[11] ( .A(exu_alu_result196), .B(exu_alu_result_0_iv_0_Z[11]), .C(ex_retr_pipe_exu_result_retr[11]), .D(exu_alu_result_6_m_Z[11]), .Y(exu_alu_result_0_iv_2_Z[11]) ); defparam \exu_alu_result_0_iv_2[11] .INIT=16'hFFEC; // @46:11028 CFG4 \exu_alu_result_0_iv_2[14] ( .A(exu_alu_result196), .B(exu_alu_result_0_iv_0_Z[14]), .C(ex_retr_pipe_exu_result_retr[14]), .D(exu_alu_result_6_m_Z[14]), .Y(exu_alu_result_0_iv_2_Z[14]) ); defparam \exu_alu_result_0_iv_2[14] .INIT=16'hFFEC; // @46:11028 CFG4 \exu_alu_result_0_iv_2[4] ( .A(exu_alu_result196), .B(exu_alu_result_0_iv_0_Z[4]), .C(ex_retr_pipe_exu_result_retr[4]), .D(exu_alu_result_6_m_Z[4]), .Y(exu_alu_result_0_iv_2_Z[4]) ); defparam \exu_alu_result_0_iv_2[4] .INIT=16'hFFEC; // @46:11028 CFG4 \exu_alu_result_0_iv_2[9] ( .A(exu_alu_result196), .B(exu_alu_result_0_iv_0_Z[9]), .C(ex_retr_pipe_exu_result_retr[9]), .D(exu_alu_result_6_m_Z[9]), .Y(exu_alu_result_0_iv_2_Z[9]) ); defparam \exu_alu_result_0_iv_2[9] .INIT=16'hFFEC; // @46:11028 CFG4 \exu_alu_result_0_iv_2[12] ( .A(exu_alu_result196), .B(exu_alu_result_0_iv_0_Z[12]), .C(ex_retr_pipe_exu_result_retr[12]), .D(exu_alu_result_6_m_Z[12]), .Y(exu_alu_result_0_iv_2_Z[12]) ); defparam \exu_alu_result_0_iv_2[12] .INIT=16'hFFEC; // @46:11028 CFG4 \exu_alu_result_0_iv_2[13] ( .A(exu_alu_result196), .B(exu_alu_result_0_iv_0_Z[13]), .C(ex_retr_pipe_exu_result_retr[13]), .D(exu_alu_result_6_m_Z[13]), .Y(exu_alu_result_0_iv_2_Z[13]) ); defparam \exu_alu_result_0_iv_2[13] .INIT=16'hFFEC; // @46:11028 CFG4 \exu_alu_result_0_iv_2[10] ( .A(exu_alu_result196), .B(exu_alu_result_0_iv_0_Z[10]), .C(ex_retr_pipe_exu_result_retr[10]), .D(exu_alu_result_6_m_Z[10]), .Y(exu_alu_result_0_iv_2_Z[10]) ); defparam \exu_alu_result_0_iv_2[10] .INIT=16'hFFEC; // @46:11028 CFG4 \exu_alu_result_0_iv_2[5] ( .A(exu_alu_result196), .B(exu_alu_result_0_iv_0_Z[5]), .C(ex_retr_pipe_exu_result_retr[5]), .D(exu_alu_result_6_m_Z[5]), .Y(exu_alu_result_0_iv_2_Z[5]) ); defparam \exu_alu_result_0_iv_2[5] .INIT=16'hFFEC; // @46:11023 CFG4 exu_alu_result_int_cry_2_RNO ( .A(N_1650_1), .B(exu_alu_operand0_Z[2]), .C(exu_alu_operand0_int_sn_N_10_mux), .D(N_1650_2), .Y(exu_alu_operand0_int[2]) ); defparam exu_alu_result_int_cry_2_RNO.INIT=16'hFCAC; // @46:11023 CFG4 exu_alu_result_int_cry_1_RNO ( .A(N_1649_1), .B(exu_alu_operand0_Z[1]), .C(exu_alu_operand0_int_sn_N_10_mux), .D(N_1649_2), .Y(exu_alu_operand0_int[1]) ); defparam exu_alu_result_int_cry_1_RNO.INIT=16'hFCAC; // @46:11244 CFG3 \lsu_align_result_30[21] ( .A(un174_shifter_result_1_i[5]), .B(N_456), .C(exu_shifter_operand[21]), .Y(N_952) ); defparam \lsu_align_result_30[21] .INIT=8'hD8; // @46:11244 CFG3 \lsu_align_result_30[22] ( .A(un174_shifter_result_1_i[5]), .B(N_457), .C(exu_shifter_operand[22]), .Y(N_953) ); defparam \lsu_align_result_30[22] .INIT=8'hD8; // @46:11244 CFG3 \lsu_align_result_30[23] ( .A(un174_shifter_result_1_i[5]), .B(N_458), .C(exu_shifter_operand[23]), .Y(N_954) ); defparam \lsu_align_result_30[23] .INIT=8'hD8; // @46:11244 CFG4 \lsu_align_result_31[5] ( .A(un174_shifter_result_1_i[5]), .B(exu_shifter_operand[5]), .C(N_456), .D(N_2122_i), .Y(N_968) ); defparam \lsu_align_result_31[5] .INIT=16'h44F0; // @46:11244 CFG4 \lsu_align_result_31[8] ( .A(un174_shifter_result_1_i[5]), .B(exu_shifter_operand[8]), .C(N_459), .D(N_2122_i), .Y(N_971) ); defparam \lsu_align_result_31[8] .INIT=16'h44F0; // @46:11244 CFG4 \lsu_align_result_31[7] ( .A(un174_shifter_result_1_i[5]), .B(exu_shifter_operand[7]), .C(N_458), .D(N_2122_i), .Y(N_970) ); defparam \lsu_align_result_31[7] .INIT=16'h44F0; // @46:11244 CFG4 \lsu_align_result_31[6] ( .A(un174_shifter_result_1_i[5]), .B(exu_shifter_operand[6]), .C(N_457), .D(N_2122_i), .Y(N_969) ); defparam \lsu_align_result_31[6] .INIT=16'h44F0; // @46:11244 CFG3 \lsu_align_result_30[24] ( .A(un174_shifter_result_1_i[5]), .B(N_459), .C(exu_shifter_operand[24]), .Y(N_955) ); defparam \lsu_align_result_30[24] .INIT=8'hD8; // @46:11244 CFG2 \lsu_align_result_15_2[26] ( .A(N_2125_i), .B(N_613), .Y(N_477_2) ); defparam \lsu_align_result_15_2[26] .INIT=4'h8; // @46:11244 CFG2 \lsu_align_result_15_2[27] ( .A(N_2125_i), .B(N_606), .Y(N_478_2) ); defparam \lsu_align_result_15_2[27] .INIT=4'h8; // @46:11244 CFG2 \lsu_align_result_15_2[25] ( .A(N_2125_i), .B(N_620), .Y(N_476_2) ); defparam \lsu_align_result_15_2[25] .INIT=4'h8; // @46:11244 CFG2 \lsu_align_result_47_2[0] ( .A(N_2125_i), .B(N_697), .Y(N_1475_2) ); defparam \lsu_align_result_47_2[0] .INIT=4'h8; // @46:11244 CFG2 \lsu_align_result_47_2[1] ( .A(N_2125_i), .B(N_732), .Y(N_1476_2) ); defparam \lsu_align_result_47_2[1] .INIT=4'h8; // @46:11244 CFG2 \lsu_align_result_15_2[30] ( .A(N_2125_i), .B(N_585), .Y(N_481_2) ); defparam \lsu_align_result_15_2[30] .INIT=4'h8; // @46:11244 CFG2 \lsu_align_result_15_2[24] ( .A(N_2125_i), .B(N_571), .Y(N_475_2) ); defparam \lsu_align_result_15_2[24] .INIT=4'h8; // @46:11244 CFG2 \lsu_align_result_47_2[6] ( .A(N_2125_i), .B(N_711), .Y(N_1481_2) ); defparam \lsu_align_result_47_2[6] .INIT=4'h8; // @46:11244 CFG2 \lsu_align_result_47_2[4] ( .A(N_2125_i), .B(N_683), .Y(N_1479_2) ); defparam \lsu_align_result_47_2[4] .INIT=4'h8; // @46:11244 CFG2 \lsu_align_result_47_2[7] ( .A(N_2125_i), .B(N_704), .Y(N_1482_2) ); defparam \lsu_align_result_47_2[7] .INIT=4'h8; // @46:11244 CFG4 \lsu_align_result_31_1[16] ( .A(N_2125_i), .B(N_571), .C(N_753), .D(N_2122_i), .Y(N_979_1) ); defparam \lsu_align_result_31_1[16] .INIT=16'h00E4; // @46:11244 CFG2 \lsu_align_result_47_2[5] ( .A(N_2125_i), .B(N_718), .Y(N_1480_2) ); defparam \lsu_align_result_47_2[5] .INIT=4'h8; // @46:11425 CFG4 un7_next_res_pos_neg_0 ( .A(exu_alu_operand1_Z[31]), .B(exu_alu_operand0_Z[31]), .C(un15_next_res_pos_neg_29_Z), .D(un15_next_res_pos_neg_28_Z), .Y(un7_next_res_pos_neg_0_Z) ); defparam un7_next_res_pos_neg_0.INIT=16'h6660; // @46:10892 CFG4 exu_alu_operand0_valid_u_0_a2_0_RNO_0 ( .A(exu_alu_operand0_valid_u_0_a2_0_RNO_1_Z), .B(un1_instr_inhibit_ex), .C(d_m5_a0_0), .D(gpr_rs1_rd_data_valid_6_5), .Y(d_m5_a0_2) ); defparam exu_alu_operand0_valid_u_0_a2_0_RNO_0.INIT=16'h1000; // @46:11028 CFG4 \exu_alu_result_iv_8_0[0] ( .A(un1_alu_op_sel_int), .B(exu_alu_result_iv_10_out), .C(exu_m3_0_2), .D(exu_m4_0_1), .Y(exu_alu_result_iv_8_0_0) ); defparam \exu_alu_result_iv_8_0[0] .INIT=16'hCDDD; // @46:11244 CFG3 \lsu_align_result_30[25] ( .A(un174_shifter_result_1_i[5]), .B(N_460), .C(exu_shifter_operand[25]), .Y(N_956) ); defparam \lsu_align_result_30[25] .INIT=8'hD8; // @46:11244 CFG3 \lsu_align_result_30[26] ( .A(un174_shifter_result_1_i[5]), .B(N_461), .C(exu_shifter_operand[26]), .Y(N_957) ); defparam \lsu_align_result_30[26] .INIT=8'hD8; // @46:11244 CFG3 \lsu_align_result_30[27] ( .A(un174_shifter_result_1_i[5]), .B(N_462), .C(exu_shifter_operand[27]), .Y(N_958) ); defparam \lsu_align_result_30[27] .INIT=8'hD8; // @46:11244 CFG3 \lsu_align_result_30[28] ( .A(un174_shifter_result_1_i[5]), .B(N_463), .C(exu_shifter_operand[28]), .Y(N_959) ); defparam \lsu_align_result_30[28] .INIT=8'hD8; // @46:11244 CFG3 \lsu_align_result_30[29] ( .A(un174_shifter_result_1_i[5]), .B(N_464), .C(exu_shifter_operand[29]), .Y(N_960) ); defparam \lsu_align_result_30[29] .INIT=8'hD8; // @46:11244 CFG3 \lsu_align_result_30[30] ( .A(un174_shifter_result_1_i[5]), .B(N_465), .C(exu_shifter_operand[30]), .Y(N_961) ); defparam \lsu_align_result_30[30] .INIT=8'hD8; // @46:11244 CFG4 \lsu_align_result_31[9] ( .A(un174_shifter_result_1_i[5]), .B(exu_shifter_operand[9]), .C(N_460), .D(N_2122_i), .Y(N_972) ); defparam \lsu_align_result_31[9] .INIT=16'h44F0; // @46:11244 CFG4 \lsu_align_result_31[10] ( .A(un174_shifter_result_1_i[5]), .B(exu_shifter_operand[10]), .C(N_461), .D(N_2122_i), .Y(N_973) ); defparam \lsu_align_result_31[10] .INIT=16'h44F0; // @46:11244 CFG4 \lsu_align_result_31[11] ( .A(un174_shifter_result_1_i[5]), .B(exu_shifter_operand[11]), .C(N_462), .D(N_2122_i), .Y(N_974) ); defparam \lsu_align_result_31[11] .INIT=16'h44F0; // @46:11244 CFG4 \lsu_align_result_31[12] ( .A(un174_shifter_result_1_i[5]), .B(exu_shifter_operand[12]), .C(N_463), .D(N_2122_i), .Y(N_975) ); defparam \lsu_align_result_31[12] .INIT=16'h44F0; // @46:11244 CFG4 \lsu_align_result_31[13] ( .A(un174_shifter_result_1_i[5]), .B(exu_shifter_operand[13]), .C(N_464), .D(N_2122_i), .Y(N_976) ); defparam \lsu_align_result_31[13] .INIT=16'h44F0; // @46:11244 CFG4 \lsu_align_result_31[14] ( .A(un174_shifter_result_1_i[5]), .B(exu_shifter_operand[14]), .C(N_465), .D(N_2122_i), .Y(N_977) ); defparam \lsu_align_result_31[14] .INIT=16'h44F0; // @46:11244 CFG3 \lsu_align_result_31[17] ( .A(N_948), .B(N_2122_i), .C(N_468), .Y(N_980) ); defparam \lsu_align_result_31[17] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_31[18] ( .A(N_949), .B(N_2122_i), .C(N_469), .Y(N_981) ); defparam \lsu_align_result_31[18] .INIT=8'hB8; // @46:11028 CFG4 \exu_alu_result_0_iv_3[3] ( .A(exu_alu_result_int_Z[3]), .B(exu_N_4), .C(exu_alu_result_0_iv_1_Z[3]), .D(exu_result_reg_int_m[3]), .Y(exu_alu_result_0_iv_3_Z[3]) ); defparam \exu_alu_result_0_iv_3[3] .INIT=16'hFFF2; // @46:11028 CFG4 \exu_alu_result_0_iv_3[2] ( .A(exu_alu_result_int_Z[2]), .B(exu_N_4), .C(exu_alu_result_0_iv_1_Z[2]), .D(exu_result_reg_int_m[2]), .Y(exu_alu_result_0_iv_3_Z[2]) ); defparam \exu_alu_result_0_iv_3[2] .INIT=16'hFFF2; // @46:11028 CFG4 \exu_alu_result_0_iv_3[7] ( .A(exu_alu_result196), .B(ex_retr_pipe_exu_result_retr[7]), .C(exu_alu_result_0_iv_1_Z[7]), .D(exu_alu_result_int_m_Z[7]), .Y(exu_alu_result_0_iv_3_Z[7]) ); defparam \exu_alu_result_0_iv_3[7] .INIT=16'hFFF8; // @46:11028 CFG4 \exu_alu_result_0_iv_3[8] ( .A(exu_alu_result196), .B(ex_retr_pipe_exu_result_retr[8]), .C(exu_alu_result_0_iv_1_Z[8]), .D(exu_alu_result_int_m_Z[8]), .Y(exu_alu_result_0_iv_3_Z[8]) ); defparam \exu_alu_result_0_iv_3[8] .INIT=16'hFFF8; // @46:11028 CFG4 \exu_alu_result_0_iv_3[6] ( .A(exu_alu_result196), .B(ex_retr_pipe_exu_result_retr[6]), .C(exu_alu_result_0_iv_1_Z[6]), .D(exu_alu_result_int_m_Z[6]), .Y(exu_alu_result_0_iv_3_Z[6]) ); defparam \exu_alu_result_0_iv_3[6] .INIT=16'hFFF8; // @46:11244 CFG3 \lsu_align_result_31[19] ( .A(N_950), .B(N_2122_i), .C(N_470), .Y(N_982) ); defparam \lsu_align_result_31[19] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_31[20] ( .A(N_951), .B(N_2122_i), .C(N_471), .Y(N_983) ); defparam \lsu_align_result_31[20] .INIT=8'hB8; // @46:11244 CFG2 \lsu_align_result_47[23] ( .A(N_1706), .B(N_2125_i), .Y(N_1498) ); defparam \lsu_align_result_47[23] .INIT=4'h2; // @46:11260 CFG4 \un174_shifter_result_1_1.CO4 ( .A(exu_shifter_places_Z[4]), .B(exu_shifter_places_Z[2]), .C(SUM[2]), .D(exu_shifter_places_Z[3]), .Y(un174_shifter_result_1_i[5]) ); defparam \un174_shifter_result_1_1.CO4 .INIT=16'hFFFE; // @46:11244 CFG4 \un174_shifter_result_1_1.N_2122_i ( .A(exu_shifter_places_Z[4]), .B(exu_shifter_places_Z[2]), .C(SUM[2]), .D(exu_shifter_places_Z[3]), .Y(N_2122_i) ); defparam \un174_shifter_result_1_1.N_2122_i .INIT=16'hAAA9; // @46:11244 CFG4 \lsu_align_result_15_1[31] ( .A(N_94), .B(N_2124_i), .C(N_2125_i), .D(N_512), .Y(N_482_1) ); defparam \lsu_align_result_15_1[31] .INIT=16'h0B08; // @46:11244 CFG4 \lsu_align_result_47_1[0] ( .A(N_505), .B(N_2125_i), .C(N_2124_i), .D(N_1095), .Y(N_1475_1) ); defparam \lsu_align_result_47_1[0] .INIT=16'h3202; // @46:11244 CFG4 \lsu_align_result_47_1[1] ( .A(N_666), .B(N_2124_i), .C(N_2125_i), .D(N_1092), .Y(N_1476_1) ); defparam \lsu_align_result_47_1[1] .INIT=16'h0B08; // @46:11244 CFG4 \lsu_align_result_15_1[30] ( .A(N_93), .B(N_2124_i), .C(N_2125_i), .D(N_533), .Y(N_481_1) ); defparam \lsu_align_result_15_1[30] .INIT=16'h0B08; // @46:11244 CFG3 \lsu_align_result_31[16] ( .A(N_979_1), .B(N_2122_i), .C(N_947), .Y(N_979) ); defparam \lsu_align_result_31[16] .INIT=8'hEA; // @46:11244 CFG4 \lsu_align_result_31[15] ( .A(N_2122_i), .B(lsu_align_result_30_1_1_Z), .C(lsu_align_result_31_0_1_Z), .D(N_978_2), .Y(N_978) ); defparam \lsu_align_result_31[15] .INIT=16'hFF54; // @46:11028 CFG3 \exu_alu_result_iv_8_1[0] ( .A(exu_alu_result_iv_8_0_0), .B(exu_N_4), .C(exu_alu_result_int_cry_0_Y), .Y(exu_alu_result_iv_8_1_Z[0]) ); defparam \exu_alu_result_iv_8_1[0] .INIT=8'hBA; // @46:11244 CFG4 \lsu_align_result_15[28] ( .A(N_522_1), .B(N_522_2), .C(N_599), .D(N_2125_i), .Y(N_479) ); defparam \lsu_align_result_15[28] .INIT=16'hF0EE; // @46:11244 CFG4 \lsu_align_result_15[29] ( .A(N_543_1), .B(N_543_2), .C(N_592), .D(N_2125_i), .Y(N_480) ); defparam \lsu_align_result_15[29] .INIT=16'hF0EE; // @46:11244 CFG3 \lsu_align_result_31[21] ( .A(N_952), .B(N_2122_i), .C(N_472), .Y(N_984) ); defparam \lsu_align_result_31[21] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_31[22] ( .A(N_953), .B(N_2122_i), .C(N_473), .Y(N_985) ); defparam \lsu_align_result_31[22] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_31[23] ( .A(N_954), .B(N_2122_i), .C(N_474), .Y(N_986) ); defparam \lsu_align_result_31[23] .INIT=8'hB8; // @46:11244 CFG4 \lsu_align_result_47[2] ( .A(N_662_1), .B(N_662_2), .C(N_725), .D(N_2125_i), .Y(N_1477) ); defparam \lsu_align_result_47[2] .INIT=16'hF0EE; // @46:11244 CFG4 \lsu_align_result_47[3] ( .A(N_634_1), .B(N_634_2), .C(N_690), .D(N_2125_i), .Y(N_1478) ); defparam \lsu_align_result_47[3] .INIT=16'hF0EE; // @46:11244 CFG3 \lsu_align_result_47[8] ( .A(N_746), .B(N_697), .C(N_2125_i), .Y(N_1483) ); defparam \lsu_align_result_47[8] .INIT=8'hAC; // @46:11244 CFG3 \lsu_align_result_47[9] ( .A(N_865), .B(N_732), .C(N_2125_i), .Y(N_1484) ); defparam \lsu_align_result_47[9] .INIT=8'hAC; // @46:11244 CFG3 \lsu_align_result_47[10] ( .A(N_858), .B(N_725), .C(N_2125_i), .Y(N_1485) ); defparam \lsu_align_result_47[10] .INIT=8'hAC; // @46:11244 CFG3 \lsu_align_result_47[11] ( .A(N_851), .B(N_690), .C(N_2125_i), .Y(N_1486) ); defparam \lsu_align_result_47[11] .INIT=8'hAC; // @46:11244 CFG3 \lsu_align_result_47[12] ( .A(N_1703), .B(N_683), .C(N_2125_i), .Y(N_1487) ); defparam \lsu_align_result_47[12] .INIT=8'hAC; // @46:11244 CFG3 \lsu_align_result_47[13] ( .A(N_1704), .B(N_718), .C(N_2125_i), .Y(N_1488) ); defparam \lsu_align_result_47[13] .INIT=8'hAC; // @46:11244 CFG3 \lsu_align_result_47[14] ( .A(N_1705), .B(N_711), .C(N_2125_i), .Y(N_1489) ); defparam \lsu_align_result_47[14] .INIT=8'hAC; // @46:11244 CFG3 \lsu_align_result_47[15] ( .A(N_1706), .B(N_704), .C(N_2125_i), .Y(N_1490) ); defparam \lsu_align_result_47[15] .INIT=8'hAC; // @46:11244 CFG3 \lsu_align_result_47[17] ( .A(N_2125_i), .B(N_865), .C(N_880), .Y(N_1492) ); defparam \lsu_align_result_47[17] .INIT=8'hE4; // @46:11244 CFG3 \lsu_align_result_47[18] ( .A(N_2125_i), .B(N_858), .C(N_873), .Y(N_1493) ); defparam \lsu_align_result_47[18] .INIT=8'hE4; // @46:11244 CFG3 \lsu_align_result_47[19] ( .A(N_2125_i), .B(N_851), .C(N_1894), .Y(N_1494) ); defparam \lsu_align_result_47[19] .INIT=8'hE4; // @46:11244 CFG3 \lsu_align_result_47[20] ( .A(N_2125_i), .B(N_1703), .C(N_1895), .Y(N_1495) ); defparam \lsu_align_result_47[20] .INIT=8'hE4; // @46:11244 CFG3 \lsu_align_result_47[21] ( .A(N_2125_i), .B(N_1704), .C(N_1896), .Y(N_1496) ); defparam \lsu_align_result_47[21] .INIT=8'hE4; // @46:11244 CFG3 \lsu_align_result_61[0] ( .A(N_2125_i), .B(N_746), .C(N_837), .Y(N_1923) ); defparam \lsu_align_result_61[0] .INIT=8'hE4; // @46:11244 CFG3 \lsu_align_result_78[17] ( .A(N_865), .B(N_844), .C(N_2125_i), .Y(lsu_align_result_78_Z[17]) ); defparam \lsu_align_result_78[17] .INIT=8'hCA; // @46:11244 CFG3 \lsu_align_result_78[18] ( .A(N_858), .B(N_823), .C(N_2125_i), .Y(lsu_align_result_78_Z[18]) ); defparam \lsu_align_result_78[18] .INIT=8'hCA; // @46:11244 CFG3 \lsu_align_result_78[19] ( .A(N_851), .B(N_830), .C(N_2125_i), .Y(lsu_align_result_78_Z[19]) ); defparam \lsu_align_result_78[19] .INIT=8'hCA; // @46:11244 CFG3 \lsu_align_result_78[20] ( .A(N_2125_i), .B(N_1703), .C(N_2887), .Y(lsu_align_result_78_Z[20]) ); defparam \lsu_align_result_78[20] .INIT=8'hE4; // @46:11244 CFG3 \lsu_align_result_78[21] ( .A(N_2125_i), .B(N_1704), .C(N_2888), .Y(lsu_align_result_78_Z[21]) ); defparam \lsu_align_result_78[21] .INIT=8'hE4; // @46:11244 CFG3 \lsu_align_result_78[23] ( .A(N_2125_i), .B(N_1706), .C(exu_shifter_operand[31]), .Y(lsu_align_result_78_Z[23]) ); defparam \lsu_align_result_78[23] .INIT=8'hE4; // @46:11244 CFG3 \lsu_align_result_78[24] ( .A(N_837), .B(N_2125_i), .C(exu_shifter_operand[31]), .Y(lsu_align_result_78_Z[24]) ); defparam \lsu_align_result_78[24] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_78[25] ( .A(N_844), .B(N_2125_i), .C(exu_shifter_operand[31]), .Y(lsu_align_result_78_Z[25]) ); defparam \lsu_align_result_78[25] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_78[22] ( .A(N_2125_i), .B(N_1705), .C(exu_shifter_operand[31]), .Y(lsu_align_result_78_Z[22]) ); defparam \lsu_align_result_78[22] .INIT=8'hE4; // @46:11244 CFG4 \lsu_align_result_47[22] ( .A(N_2124_i), .B(N_1121), .C(N_2125_i), .D(N_1705), .Y(N_1497) ); defparam \lsu_align_result_47[22] .INIT=16'h4F40; // @46:11028 CFG4 \exu_alu_result_0_iv[1] ( .A(exu_alu_result_0_iv_1_Z[1]), .B(exu_alu_result_0_iv_5_Z[1]), .C(exu_alu_result_0_iv_2_Z[1]), .D(exu_alu_result_0_iv_4_Z[1]), .Y(exu_alu_result[1]) ); defparam \exu_alu_result_0_iv[1] .INIT=16'hFFFE; // @46:11244 CFG3 \lsu_align_result_15[31] ( .A(N_2125_i), .B(N_482_1), .C(N_578), .Y(N_482) ); defparam \lsu_align_result_15[31] .INIT=8'hEC; // @46:11028 CFG4 \exu_alu_result_iv_8[0] ( .A(exu_m4_1), .B(un128_exu_alu_result_cry_31_RNI01RTHF_1z), .C(exu_alu_result_iv_8_1_Z[0]), .D(un5_N_8), .Y(cmp_cond) ); defparam \exu_alu_result_iv_8[0] .INIT=16'hFFF7; // @46:10892 CFG4 exu_m2_0_a2_7 ( .A(un1_instr_inhibit_ex), .B(exu_m2_0_a2_5_Z), .C(exu_m2_0_a2_7_2_Z), .D(gpr_rs1_rd_valid_mux_0), .Y(exu_m2_0_a2_7_Z) ); defparam exu_m2_0_a2_7.INIT=16'h4000; // @46:10892 CFG4 exu_alu_operand0_valid_u_0_a2_0_RNO ( .A(stage_state_ex), .B(de_ex_pipe_operand0_mux_sel_ex_0), .C(gpr_rs1_rd_valid_mux_0), .D(d_m5_a0_2), .Y(exu_alu_operand0_valid_u_0_a2_0_RNO_Z) ); defparam exu_alu_operand0_valid_u_0_a2_0_RNO.INIT=16'h0777; // @46:11425 CFG4 next_res_pos_neg_3 ( .A(exu_alu_operand0_Z[31]), .B(un7_next_res_pos_neg_0_Z), .C(un5_div_result), .D(un11_start_div), .Y(next_res_pos_neg_3_Z) ); defparam next_res_pos_neg_3.INIT=16'hEAC0; // @46:11244 CFG4 \lsu_align_result_95_1_1[16] ( .A(N_2125_i), .B(N_746), .C(N_816), .D(shifter_unit_op_sel[0]), .Y(N_1041_1) ); defparam \lsu_align_result_95_1_1[16] .INIT=16'h00E4; // @46:11244 CFG4 \lsu_align_result_30_2[31] ( .A(N_2125_i), .B(un174_shifter_result_1_i[5]), .C(N_676), .D(lsu_align_result_30_1_1_Z), .Y(N_962_2) ); defparam \lsu_align_result_30_2[31] .INIT=16'hCC80; // @46:11028 CFG4 \exu_alu_result_0_iv[15] ( .A(exu_alu_result_0_iv_5_Z[15]), .B(exu_alu_result_0_iv_4_Z[15]), .C(exu_alu_result_8_m_Z[15]), .D(exu_alu_result_0_iv_2_Z[15]), .Y(exu_alu_result[15]) ); defparam \exu_alu_result_0_iv[15] .INIT=16'hFFFE; // @46:11028 CFG4 \exu_alu_result_0_iv[11] ( .A(exu_alu_result_0_iv_5_Z[11]), .B(exu_alu_result_0_iv_4_Z[11]), .C(exu_alu_result_8_m_Z[11]), .D(exu_alu_result_0_iv_2_Z[11]), .Y(exu_alu_result[11]) ); defparam \exu_alu_result_0_iv[11] .INIT=16'hFFFE; // @46:11028 CFG4 \exu_alu_result_0_iv[12] ( .A(exu_alu_result_0_iv_5_Z[12]), .B(exu_alu_result_0_iv_4_Z[12]), .C(exu_alu_result_8_m_Z[12]), .D(exu_alu_result_0_iv_2_Z[12]), .Y(exu_alu_result[12]) ); defparam \exu_alu_result_0_iv[12] .INIT=16'hFFFE; // @46:11028 CFG4 \exu_alu_result_0_iv[9] ( .A(exu_alu_result_0_iv_4_Z[9]), .B(exu_alu_result_0_iv_5_Z[9]), .C(exu_alu_result_8_m_Z[9]), .D(exu_alu_result_0_iv_2_Z[9]), .Y(exu_alu_result[9]) ); defparam \exu_alu_result_0_iv[9] .INIT=16'hFFFE; // @46:11028 CFG4 \exu_alu_result_0_iv[10] ( .A(exu_alu_result_0_iv_5_Z[10]), .B(exu_alu_result_0_iv_4_Z[10]), .C(exu_alu_result_8_m_Z[10]), .D(exu_alu_result_0_iv_2_Z[10]), .Y(exu_alu_result[10]) ); defparam \exu_alu_result_0_iv[10] .INIT=16'hFFFE; // @46:11028 CFG4 \exu_alu_result_0_iv[8] ( .A(exu_alu_result_8_m_Z[8]), .B(un6_exu_alu_result0_m[8]), .C(exu_alu_result_0_iv_5_Z[8]), .D(exu_alu_result_0_iv_3_Z[8]), .Y(exu_alu_result[8]) ); defparam \exu_alu_result_0_iv[8] .INIT=16'hFFFE; // @46:11028 CFG4 \exu_alu_result_0_iv[6] ( .A(exu_alu_result_8_m_Z[6]), .B(un6_exu_alu_result0_m[6]), .C(exu_alu_result_0_iv_5_Z[6]), .D(exu_alu_result_0_iv_3_Z[6]), .Y(exu_alu_result[6]) ); defparam \exu_alu_result_0_iv[6] .INIT=16'hFFFE; // @46:11028 CFG4 \exu_alu_result_0_iv[7] ( .A(exu_alu_result_8_m_Z[7]), .B(un6_exu_alu_result0_m[7]), .C(exu_alu_result_0_iv_5_Z[7]), .D(exu_alu_result_0_iv_3_Z[7]), .Y(exu_alu_result[7]) ); defparam \exu_alu_result_0_iv[7] .INIT=16'hFFFE; // @46:11028 CFG4 \exu_alu_result_0_iv[4] ( .A(exu_alu_result_0_iv_4_Z[4]), .B(exu_alu_result_0_iv_5_Z[4]), .C(exu_alu_result_int_m_Z[4]), .D(exu_alu_result_0_iv_2_Z[4]), .Y(exu_alu_result[4]) ); defparam \exu_alu_result_0_iv[4] .INIT=16'hFFFE; // @46:11028 CFG4 \exu_alu_result_0_iv[5] ( .A(exu_alu_result_0_iv_4_Z[5]), .B(exu_alu_result_0_iv_5_Z[5]), .C(exu_alu_result_int_m_Z[5]), .D(exu_alu_result_0_iv_2_Z[5]), .Y(exu_alu_result[5]) ); defparam \exu_alu_result_0_iv[5] .INIT=16'hFFFE; // @46:11028 CFG4 \exu_alu_result_0_iv[3] ( .A(exu_alu_result_8_m_Z[3]), .B(un6_exu_alu_result0_m[3]), .C(exu_alu_result_0_iv_5_Z[3]), .D(exu_alu_result_0_iv_3_Z[3]), .Y(exu_alu_result[3]) ); defparam \exu_alu_result_0_iv[3] .INIT=16'hFFFE; // @46:11028 CFG4 \exu_alu_result_0_iv[2] ( .A(exu_alu_result_8_m_Z[2]), .B(un6_exu_alu_result0_m[2]), .C(exu_alu_result_0_iv_5_Z[2]), .D(exu_alu_result_0_iv_3_Z[2]), .Y(exu_alu_result[2]) ); defparam \exu_alu_result_0_iv[2] .INIT=16'hFFFE; // @46:11028 CFG4 \exu_alu_result_0_iv[30] ( .A(exu_alu_result_0_iv_5_Z[30]), .B(exu_alu_result_0_iv_4_Z[30]), .C(exu_alu_result_8_m_Z[30]), .D(exu_alu_result_0_iv_2_Z[30]), .Y(exu_alu_result[30]) ); defparam \exu_alu_result_0_iv[30] .INIT=16'hFFFE; // @46:11028 CFG4 \exu_alu_result_0_iv[26] ( .A(exu_alu_result_0_iv_5_Z[26]), .B(exu_alu_result_0_iv_4_Z[26]), .C(exu_alu_result_8_m_Z[26]), .D(exu_alu_result_0_iv_2_Z[26]), .Y(exu_alu_result[26]) ); defparam \exu_alu_result_0_iv[26] .INIT=16'hFFFE; // @46:11028 CFG4 \exu_alu_result_0_iv[27] ( .A(exu_alu_result_0_iv_5_Z[27]), .B(exu_alu_result_0_iv_4_Z[27]), .C(exu_alu_result_8_m_Z[27]), .D(exu_alu_result_0_iv_2_Z[27]), .Y(exu_alu_result[27]) ); defparam \exu_alu_result_0_iv[27] .INIT=16'hFFFE; // @46:11028 CFG4 \exu_alu_result_0_iv[24] ( .A(exu_alu_result_0_iv_5_Z[24]), .B(exu_alu_result_0_iv_4_Z[24]), .C(exu_alu_result_8_m_Z[24]), .D(exu_alu_result_0_iv_2_Z[24]), .Y(exu_alu_result[24]) ); defparam \exu_alu_result_0_iv[24] .INIT=16'hFFFE; // @46:11028 CFG4 \exu_alu_result_0_iv[25] ( .A(exu_alu_result_0_iv_5_Z[25]), .B(exu_alu_result_0_iv_4_Z[25]), .C(exu_alu_result_8_m_Z[25]), .D(exu_alu_result_0_iv_2_Z[25]), .Y(exu_alu_result[25]) ); defparam \exu_alu_result_0_iv[25] .INIT=16'hFFFE; // @46:11028 CFG4 \exu_alu_result_0_iv[23] ( .A(exu_alu_result_0_iv_5_Z[23]), .B(exu_alu_result_0_iv_4_Z[23]), .C(exu_alu_result_8_m_Z[23]), .D(exu_alu_result_0_iv_2_Z[23]), .Y(exu_alu_result[23]) ); defparam \exu_alu_result_0_iv[23] .INIT=16'hFFFE; // @46:11028 CFG4 \exu_alu_result_0_iv[22] ( .A(exu_alu_result_0_iv_5_Z[22]), .B(exu_alu_result_0_iv_4_Z[22]), .C(exu_alu_result_8_m_Z[22]), .D(exu_alu_result_0_iv_2_Z[22]), .Y(exu_alu_result[22]) ); defparam \exu_alu_result_0_iv[22] .INIT=16'hFFFE; // @46:11028 CFG4 \exu_alu_result_0_iv[20] ( .A(exu_alu_result_0_iv_5_Z[20]), .B(exu_alu_result_0_iv_4_Z[20]), .C(exu_alu_result_8_m_Z[20]), .D(exu_alu_result_0_iv_2_Z[20]), .Y(exu_alu_result[20]) ); defparam \exu_alu_result_0_iv[20] .INIT=16'hFFFE; // @46:11028 CFG4 \exu_alu_result_0_iv[18] ( .A(exu_alu_result_0_iv_5_Z[18]), .B(exu_alu_result_0_iv_4_Z[18]), .C(exu_alu_result_8_m_Z[18]), .D(exu_alu_result_0_iv_2_Z[18]), .Y(exu_alu_result[18]) ); defparam \exu_alu_result_0_iv[18] .INIT=16'hFFFE; // @46:11028 CFG4 \exu_alu_result_0_iv[17] ( .A(exu_alu_result_0_iv_5_Z[17]), .B(exu_alu_result_0_iv_4_Z[17]), .C(exu_alu_result_8_m_Z[17]), .D(exu_alu_result_0_iv_2_Z[17]), .Y(exu_alu_result[17]) ); defparam \exu_alu_result_0_iv[17] .INIT=16'hFFFE; // @46:11028 CFG4 \exu_alu_result_0_iv[14] ( .A(exu_alu_result_0_iv_5_Z[14]), .B(exu_alu_result_0_iv_4_Z[14]), .C(exu_alu_result_8_m_Z[14]), .D(exu_alu_result_0_iv_2_Z[14]), .Y(exu_alu_result[14]) ); defparam \exu_alu_result_0_iv[14] .INIT=16'hFFFE; // @46:11028 CFG4 \exu_alu_result_0_iv[31] ( .A(exu_alu_result_0_iv_5_Z[31]), .B(exu_alu_result_0_iv_4_Z[31]), .C(exu_alu_result_8_m_Z[31]), .D(exu_alu_result_0_iv_2_Z[31]), .Y(exu_alu_result[31]) ); defparam \exu_alu_result_0_iv[31] .INIT=16'hFFFE; // @46:11028 CFG4 \exu_alu_result_0_iv[29] ( .A(exu_alu_result_0_iv_5_Z[29]), .B(exu_alu_result_0_iv_4_Z[29]), .C(exu_alu_result_8_m_Z[29]), .D(exu_alu_result_0_iv_2_Z[29]), .Y(exu_alu_result[29]) ); defparam \exu_alu_result_0_iv[29] .INIT=16'hFFFE; // @46:11028 CFG4 \exu_alu_result_0_iv[19] ( .A(exu_alu_result_0_iv_5_Z[19]), .B(exu_alu_result_0_iv_4_Z[19]), .C(exu_alu_result_8_m_Z[19]), .D(exu_alu_result_0_iv_2_Z[19]), .Y(exu_alu_result[19]) ); defparam \exu_alu_result_0_iv[19] .INIT=16'hFFFE; // @46:11028 CFG4 \exu_alu_result_0_iv[21] ( .A(exu_alu_result_0_iv_5_Z[21]), .B(exu_alu_result_0_iv_4_Z[21]), .C(exu_alu_result_8_m_Z[21]), .D(exu_alu_result_0_iv_2_Z[21]), .Y(exu_alu_result[21]) ); defparam \exu_alu_result_0_iv[21] .INIT=16'hFFFE; // @46:11028 CFG4 \exu_alu_result_0_iv[16] ( .A(exu_alu_result_0_iv_5_Z[16]), .B(exu_alu_result_0_iv_4_Z[16]), .C(exu_alu_result_8_m_Z[16]), .D(exu_alu_result_0_iv_2_Z[16]), .Y(exu_alu_result[16]) ); defparam \exu_alu_result_0_iv[16] .INIT=16'hFFFE; // @46:11028 CFG4 \exu_alu_result_0_iv[28] ( .A(exu_alu_result_0_iv_5_Z[28]), .B(exu_alu_result_0_iv_4_Z[28]), .C(exu_alu_result_8_m_Z[28]), .D(exu_alu_result_0_iv_2_Z[28]), .Y(exu_alu_result[28]) ); defparam \exu_alu_result_0_iv[28] .INIT=16'hFFFE; // @46:11028 CFG4 \exu_alu_result_0_iv[13] ( .A(exu_alu_result_0_iv_5_Z[13]), .B(exu_alu_result_0_iv_4_Z[13]), .C(exu_alu_result_8_m_Z[13]), .D(exu_alu_result_0_iv_2_Z[13]), .Y(exu_alu_result[13]) ); defparam \exu_alu_result_0_iv[13] .INIT=16'hFFFE; // @46:11244 CFG4 \lsu_align_result_96[17] ( .A(shifter_unit_op_sel[0]), .B(shifter_unit_op_sel[1]), .C(lsu_align_result_96_m1[17]), .D(N_980), .Y(cpu_d_req_wr_data_net[17]) ); defparam \lsu_align_result_96[17] .INIT=16'hE2C0; // @46:11244 CFG4 \lsu_align_result_96[18] ( .A(shifter_unit_op_sel[0]), .B(shifter_unit_op_sel[1]), .C(lsu_align_result_96_m1[18]), .D(N_981), .Y(cpu_d_req_wr_data_net[18]) ); defparam \lsu_align_result_96[18] .INIT=16'hE2C0; // @46:11244 CFG4 \lsu_align_result_31[25] ( .A(N_476_2), .B(N_2122_i), .C(N_956), .D(N_476_1), .Y(N_988) ); defparam \lsu_align_result_31[25] .INIT=16'hF3E2; // @46:11244 CFG4 \lsu_align_result_31[26] ( .A(N_477_2), .B(N_2122_i), .C(N_957), .D(N_477_1), .Y(N_989) ); defparam \lsu_align_result_31[26] .INIT=16'hF3E2; // @46:11244 CFG4 \lsu_align_result_31[27] ( .A(N_478_2), .B(N_2122_i), .C(N_958), .D(N_478_1), .Y(N_990) ); defparam \lsu_align_result_31[27] .INIT=16'hF3E2; // @46:11244 CFG3 \lsu_align_result_31[28] ( .A(N_959), .B(N_2122_i), .C(N_479), .Y(N_991) ); defparam \lsu_align_result_31[28] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_31[29] ( .A(N_960), .B(N_2122_i), .C(N_480), .Y(N_992) ); defparam \lsu_align_result_31[29] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_62[0] ( .A(un174_shifter_result_1_i[5]), .B(N_1923), .C(exu_shifter_operand[0]), .Y(N_1955) ); defparam \lsu_align_result_62[0] .INIT=8'hD8; // @46:11244 CFG3 \lsu_align_result_95_3[15] ( .A(N_1490), .B(N_2122_i), .C(N_1045), .Y(N_3026) ); defparam \lsu_align_result_95_3[15] .INIT=8'hE2; // @46:11244 CFG3 \lsu_align_result_95_3[2] ( .A(N_2299), .B(N_2122_i), .C(N_1477), .Y(N_2300) ); defparam \lsu_align_result_95_3[2] .INIT=8'hB8; // @46:11244 CFG4 \lsu_align_result_95_3[4] ( .A(N_1479_2), .B(N_2122_i), .C(N_2297), .D(N_1479_1), .Y(N_2298) ); defparam \lsu_align_result_95_3[4] .INIT=16'hF3E2; // @46:11244 CFG3 \lsu_align_result_95_3[3] ( .A(N_2295), .B(N_2122_i), .C(N_1478), .Y(N_2296) ); defparam \lsu_align_result_95_3[3] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_95_3[13] ( .A(N_2293), .B(N_2122_i), .C(N_1488), .Y(N_2294) ); defparam \lsu_align_result_95_3[13] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_95_3[12] ( .A(N_2291), .B(N_2122_i), .C(N_1487), .Y(N_2292) ); defparam \lsu_align_result_95_3[12] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_95_3[11] ( .A(N_2289), .B(N_2122_i), .C(N_1486), .Y(N_2290) ); defparam \lsu_align_result_95_3[11] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_95_3[10] ( .A(N_2287), .B(N_2122_i), .C(N_1485), .Y(N_2288) ); defparam \lsu_align_result_95_3[10] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_95_3[9] ( .A(N_2285), .B(N_2122_i), .C(N_1484), .Y(N_2286) ); defparam \lsu_align_result_95_3[9] .INIT=8'hB8; // @46:11244 CFG3 \lsu_align_result_95_3[8] ( .A(N_2283), .B(N_2122_i), .C(N_1483), .Y(N_2284) ); defparam \lsu_align_result_95_3[8] .INIT=8'hB8; // @46:11244 CFG4 \lsu_align_result_95_3[5] ( .A(N_1480_2), .B(N_2122_i), .C(N_2277), .D(N_1480_1), .Y(N_2278) ); defparam \lsu_align_result_95_3[5] .INIT=16'hF3E2; // @46:11244 CFG3 \lsu_align_result_95_3[14] ( .A(N_2275), .B(N_2122_i), .C(N_1489), .Y(N_2276) ); defparam \lsu_align_result_95_3[14] .INIT=8'hB8; // @46:11244 CFG4 \lsu_align_result_95_3[6] ( .A(N_1481_2), .B(N_2122_i), .C(N_2279), .D(N_1481_1), .Y(N_2280) ); defparam \lsu_align_result_95_3[6] .INIT=16'hF3E2; // @46:11244 CFG4 \lsu_align_result_95_3[7] ( .A(N_1482_2), .B(N_2122_i), .C(N_2281), .D(N_1482_1), .Y(N_2282) ); defparam \lsu_align_result_95_3[7] .INIT=16'hF3E2; // @46:11244 CFG4 \lsu_align_result_31[24] ( .A(N_475_2), .B(N_2122_i), .C(N_955), .D(N_475_1), .Y(N_987) ); defparam \lsu_align_result_31[24] .INIT=16'hF3E2; // @46:10828 CFG4 start_m7_0_a4_0_3 ( .A(start_m7_0_a4_0_1_Z), .B(debug_enter_retr), .C(gpr_wr_valid_retr_2_0_0), .D(soft_reset_taken_retr), .Y(start_m7_0_a4_0_3_Z) ); defparam start_m7_0_a4_0_3.INIT=16'h0020; // @46:10892 CFG2 exu_alu_operand0_valid_u_RNO_0 ( .A(exu_m2_0_a2_7_Z), .B(ex_retr_pipe_gpr_wr_mux_sel_retr_0), .Y(exu_m2_0) ); defparam exu_alu_operand0_valid_u_RNO_0.INIT=4'h8; // @46:11244 CFG4 \lsu_align_result_96[19] ( .A(shifter_unit_op_sel[0]), .B(shifter_unit_op_sel[1]), .C(lsu_align_result_96_m1[19]), .D(N_982), .Y(cpu_d_req_wr_data_net[19]) ); defparam \lsu_align_result_96[19] .INIT=16'hE2C0; // @46:11244 CFG4 \lsu_align_result_96[20] ( .A(shifter_unit_op_sel[0]), .B(shifter_unit_op_sel[1]), .C(lsu_align_result_96_m1[20]), .D(N_983), .Y(cpu_d_req_wr_data_net[20]) ); defparam \lsu_align_result_96[20] .INIT=16'hE2C0; // @46:11244 CFG3 \lsu_align_result_30[31] ( .A(un174_shifter_result_1_i[5]), .B(N_962_2), .C(exu_shifter_operand[31]), .Y(N_962) ); defparam \lsu_align_result_30[31] .INIT=8'hDC; // @46:11244 CFG4 \lsu_align_result_96[21] ( .A(shifter_unit_op_sel[0]), .B(shifter_unit_op_sel[1]), .C(lsu_align_result_96_m1[21]), .D(N_984), .Y(cpu_d_req_wr_data_net[21]) ); defparam \lsu_align_result_96[21] .INIT=16'hE2C0; // @46:11244 CFG4 \lsu_align_result_96[22] ( .A(shifter_unit_op_sel[0]), .B(shifter_unit_op_sel[1]), .C(lsu_align_result_96_m1[22]), .D(N_985), .Y(cpu_d_req_wr_data_net[22]) ); defparam \lsu_align_result_96[22] .INIT=16'hE2C0; // @46:11244 CFG4 \lsu_align_result_96[23] ( .A(shifter_unit_op_sel[0]), .B(shifter_unit_op_sel[1]), .C(lsu_align_result_96_m1[23]), .D(N_986), .Y(cpu_d_req_wr_data_net[23]) ); defparam \lsu_align_result_96[23] .INIT=16'hE2C0; // @46:11244 CFG4 \lsu_align_result_31[30] ( .A(N_481_2), .B(N_2122_i), .C(N_961), .D(N_481_1), .Y(N_993) ); defparam \lsu_align_result_31[30] .INIT=16'hF3E2; // @46:11244 CFG4 \lsu_align_result_95_3[1] ( .A(N_1476_2), .B(N_2122_i), .C(N_2151), .D(N_1476_1), .Y(N_2333) ); defparam \lsu_align_result_95_3[1] .INIT=16'hF3E2; // @46:10828 CFG4 start_m8_0 ( .A(stage_state_ex), .B(de_ex_pipe_operand1_mux_sel_ex[1]), .C(de_ex_pipe_operand1_mux_sel_ex[0]), .D(gpr_N_10_mux_i_0_0), .Y(start_m8_0_Z) ); defparam start_m8_0.INIT=16'hEFEC; // @46:10951 CFG4 exu_shifter_operand_valid_2_a3_1 ( .A(gpr_rs1_rd_data_valid_6_5), .B(gpr_rs1_rd_valid_mux), .C(shifter_operand_sel[1]), .D(ex_retr_pipe_gpr_wr_mux_sel_retr_0), .Y(exu_shifter_operand_valid_2_a3_1_Z) ); defparam exu_shifter_operand_valid_2_a3_1.INIT=16'h0800; // @46:10978 CFG4 exu_shifter_places_valid_2_a3_1 ( .A(gpr_rs1_rd_data_valid_6_5), .B(gpr_rs1_rd_valid_mux), .C(ex_retr_pipe_gpr_wr_mux_sel_retr_0), .D(exu_shifter_places_valid_sn_N_7_mux), .Y(exu_shifter_places_valid_2_a3_1_Z) ); defparam exu_shifter_places_valid_2_a3_1.INIT=16'h8000; // @46:10892 CFG4 exu_alu_operand0_valid_u_0_a0_1 ( .A(exu_m2_0_a2_7_Z), .B(formal_trace_reset_taken), .C(exu_m1_e_4_0_Z), .D(un2_exception_taken), .Y(exu_alu_operand0_valid_u_0_a0_1_Z) ); defparam exu_alu_operand0_valid_u_0_a0_1.INIT=16'h002A; // @46:10951 CFG4 exu_shifter_operand_valid_2_a2_1 ( .A(gpr_rs1_rd_data_valid_6_5), .B(gpr_rs1_rd_valid_mux), .C(shifter_operand_sel[1]), .D(ex_retr_pipe_gpr_wr_mux_sel_retr_0), .Y(exu_shifter_operand_valid_2_a2_1_Z) ); defparam exu_shifter_operand_valid_2_a2_1.INIT=16'h0008; // @46:10978 CFG4 exu_shifter_places_valid_2_a4 ( .A(un1_rs1_rd_hzd_4), .B(exu_shifter_places_valid_sn_N_7_mux), .C(gpr_rs1_rd_valid_mux), .D(gpr_rs1_rd_data_valid_6_5), .Y(exu_shifter_places_valid_2_a4_Z) ); defparam exu_shifter_places_valid_2_a4.INIT=16'h4000; // @46:10892 CFG4 exu_alu_operand0_valid_u_RNO ( .A(gpr_wr_valid_retr_2_0_0), .B(soft_reset_taken_retr_0), .C(exu_m2_0), .D(formal_trace_reset_taken), .Y(exu_alu_operand0_valid_u_RNO_Z) ); defparam exu_alu_operand0_valid_u_RNO.INIT=16'hF070; // @46:11244 CFG4 \lsu_align_result_96[2] ( .A(shifter_unit_op_sel[0]), .B(shifter_unit_op_sel[1]), .C(N_2300), .D(N_965), .Y(cpu_d_req_wr_data_net[2]) ); defparam \lsu_align_result_96[2] .INIT=16'hE2C0; // @46:11244 CFG4 \lsu_align_result_96[3] ( .A(shifter_unit_op_sel[0]), .B(shifter_unit_op_sel[1]), .C(N_2296), .D(N_966), .Y(cpu_d_req_wr_data_net[3]) ); defparam \lsu_align_result_96[3] .INIT=16'hE2C0; // @46:11244 CFG4 \lsu_align_result_96[4] ( .A(shifter_unit_op_sel[0]), .B(shifter_unit_op_sel[1]), .C(N_2298), .D(N_967), .Y(cpu_d_req_wr_data_net[4]) ); defparam \lsu_align_result_96[4] .INIT=16'hE2C0; // @46:11244 CFG4 \lsu_align_result_96[5] ( .A(shifter_unit_op_sel[0]), .B(shifter_unit_op_sel[1]), .C(N_2278), .D(N_968), .Y(cpu_d_req_wr_data_net[5]) ); defparam \lsu_align_result_96[5] .INIT=16'hE2C0; // @46:11244 CFG4 \lsu_align_result_96[8] ( .A(shifter_unit_op_sel[0]), .B(shifter_unit_op_sel[1]), .C(N_2284), .D(N_971), .Y(cpu_d_req_wr_data_net[8]) ); defparam \lsu_align_result_96[8] .INIT=16'hE2C0; // @46:11244 CFG4 \lsu_align_result_96[9] ( .A(shifter_unit_op_sel[0]), .B(shifter_unit_op_sel[1]), .C(N_2286), .D(N_972), .Y(cpu_d_req_wr_data_net[9]) ); defparam \lsu_align_result_96[9] .INIT=16'hE2C0; // @46:11244 CFG4 \lsu_align_result_96[10] ( .A(shifter_unit_op_sel[0]), .B(shifter_unit_op_sel[1]), .C(N_2288), .D(N_973), .Y(cpu_d_req_wr_data_net[10]) ); defparam \lsu_align_result_96[10] .INIT=16'hE2C0; // @46:11244 CFG4 \lsu_align_result_96[11] ( .A(shifter_unit_op_sel[0]), .B(shifter_unit_op_sel[1]), .C(N_2290), .D(N_974), .Y(cpu_d_req_wr_data_net[11]) ); defparam \lsu_align_result_96[11] .INIT=16'hE2C0; // @46:11244 CFG4 \lsu_align_result_96[12] ( .A(shifter_unit_op_sel[0]), .B(shifter_unit_op_sel[1]), .C(N_2292), .D(N_975), .Y(cpu_d_req_wr_data_net[12]) ); defparam \lsu_align_result_96[12] .INIT=16'hE2C0; // @46:11244 CFG4 \lsu_align_result_96[13] ( .A(shifter_unit_op_sel[0]), .B(shifter_unit_op_sel[1]), .C(N_2294), .D(N_976), .Y(cpu_d_req_wr_data_net[13]) ); defparam \lsu_align_result_96[13] .INIT=16'hE2C0; // @46:11244 CFG4 \lsu_align_result_96[14] ( .A(shifter_unit_op_sel[0]), .B(shifter_unit_op_sel[1]), .C(N_2276), .D(N_977), .Y(cpu_d_req_wr_data_net[14]) ); defparam \lsu_align_result_96[14] .INIT=16'hE2C0; // @46:11244 CFG4 \lsu_align_result_96[15] ( .A(shifter_unit_op_sel[0]), .B(shifter_unit_op_sel[1]), .C(N_3026), .D(N_978), .Y(cpu_d_req_wr_data_net[15]) ); defparam \lsu_align_result_96[15] .INIT=16'hE2C0; // @46:11244 CFG4 \lsu_align_result_96_0[0] ( .A(N_1475_2), .B(N_2122_i), .C(N_1955), .D(N_1475_1), .Y(N_2274) ); defparam \lsu_align_result_96_0[0] .INIT=16'hF3E2; // @46:11244 CFG4 \lsu_align_result_96[7] ( .A(shifter_unit_op_sel[0]), .B(shifter_unit_op_sel[1]), .C(N_2282), .D(N_970), .Y(cpu_d_req_wr_data_net[7]) ); defparam \lsu_align_result_96[7] .INIT=16'hE2C0; // @46:11244 CFG4 \lsu_align_result_96[6] ( .A(shifter_unit_op_sel[0]), .B(shifter_unit_op_sel[1]), .C(N_2280), .D(N_969), .Y(cpu_d_req_wr_data_net[6]) ); defparam \lsu_align_result_96[6] .INIT=16'hE2C0; // @46:11282 CFG4 \exu_result_1_0[1] ( .A(exu_mux_result34), .B(exu_result_sn_N_6_mux), .C(exu_alu_result[1]), .D(cpu_d_req_addr_net[1]), .Y(exu_result_1[1]) ); defparam \exu_result_1_0[1] .INIT=16'h3210; // @46:11282 CFG4 \exu_result_1_0[0] ( .A(exu_mux_result34), .B(exu_result_sn_N_6_mux), .C(cmp_cond), .D(bcu_result_cry_0_Y), .Y(exu_result_1[0]) ); defparam \exu_result_1_0[0] .INIT=16'h3210; // @46:10828 CFG3 start_m8_1 ( .A(start_m8_a1_0_Z), .B(start_m8_0_Z), .C(gpr_rs2_rd_data_valid_7), .Y(start_m8_1_Z) ); defparam start_m8_1.INIT=8'hC4; // @46:10978 CFG4 exu_shifter_places_valid_0_0 ( .A(exu_shifter_places_valid_sn_N_7_mux), .B(exu_shifter_places_valid_2_a4_Z), .C(shifter_unit_places_sel_0), .D(de_ex_pipe_shifter_unit_places_sel_ex_0), .Y(exu_shifter_places_valid_0) ); defparam exu_shifter_places_valid_0_0.INIT=16'hECCC; // @46:10951 CFG4 exu_shifter_operand_valid_2_a3 ( .A(soft_reset_taken_retr_0), .B(exu_shifter_operand_valid_2_a3_1_Z), .C(formal_trace_reset_taken), .D(gpr_wr_valid_retr_2_0_0), .Y(exu_shifter_operand_valid_2_a3_Z) ); defparam exu_shifter_operand_valid_2_a3.INIT=16'hC4CC; // @46:10978 CFG4 exu_shifter_places_valid_2_a3 ( .A(soft_reset_taken_retr_0), .B(exu_shifter_places_valid_2_a3_1_Z), .C(formal_trace_reset_taken), .D(gpr_wr_valid_retr_2_0_0), .Y(exu_shifter_places_valid_2_a3_Z) ); defparam exu_shifter_places_valid_2_a3.INIT=16'hC4CC; // @46:10978 CFG4 exu_shifter_places_valid_2_a2 ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr_0), .B(exu_shifter_places_valid_sn_N_7_mux), .C(gpr_rs1_rd_data_valid_6), .D(gpr_wr_valid_retr_0), .Y(exu_shifter_places_valid_2_a2_Z) ); defparam exu_shifter_places_valid_2_a2.INIT=16'h0040; // @46:10951 CFG4 exu_shifter_operand_valid_2 ( .A(un2_exception_taken), .B(machine_implicit_wr_mtval_tval_wr_en), .C(exu_shifter_operand_valid_2_0_Z), .D(gpr_rs1_rd_data_valid_6), .Y(exu_shifter_operand_valid_2_Z) ); defparam exu_shifter_operand_valid_2.INIT=16'h4000; // @46:10978 CFG4 exu_shifter_places_valid_3 ( .A(un2_exception_taken), .B(machine_implicit_wr_mtval_tval_wr_en), .C(exu_shifter_places_valid_3_0_Z), .D(gpr_rs1_rd_data_valid_6), .Y(exu_shifter_places_valid_3_Z) ); defparam exu_shifter_places_valid_3.INIT=16'h4000; // @46:11244 CFG4 \lsu_align_result_96[24] ( .A(shifter_unit_op_sel[0]), .B(shifter_unit_op_sel[1]), .C(lsu_align_result_96_m1[24]), .D(N_987), .Y(cpu_d_req_wr_data_net[24]) ); defparam \lsu_align_result_96[24] .INIT=16'hE2C0; // @46:11244 CFG4 \lsu_align_result_96[25] ( .A(shifter_unit_op_sel[0]), .B(shifter_unit_op_sel[1]), .C(lsu_align_result_96_m1[25]), .D(N_988), .Y(cpu_d_req_wr_data_net[25]) ); defparam \lsu_align_result_96[25] .INIT=16'hE2C0; // @46:11244 CFG4 \lsu_align_result_96[26] ( .A(shifter_unit_op_sel[0]), .B(shifter_unit_op_sel[1]), .C(lsu_align_result_96_m1[26]), .D(N_989), .Y(cpu_d_req_wr_data_net[26]) ); defparam \lsu_align_result_96[26] .INIT=16'hE2C0; // @46:11244 CFG4 \lsu_align_result_96[29] ( .A(shifter_unit_op_sel[0]), .B(shifter_unit_op_sel[1]), .C(lsu_align_result_96_m1[29]), .D(N_992), .Y(cpu_d_req_wr_data_net[29]) ); defparam \lsu_align_result_96[29] .INIT=16'hE2C0; // @46:11244 CFG4 \lsu_align_result_96[27] ( .A(shifter_unit_op_sel[0]), .B(shifter_unit_op_sel[1]), .C(lsu_align_result_96_m1[27]), .D(N_990), .Y(cpu_d_req_wr_data_net[27]) ); defparam \lsu_align_result_96[27] .INIT=16'hE2C0; // @46:11244 CFG4 \lsu_align_result_96[28] ( .A(shifter_unit_op_sel[0]), .B(shifter_unit_op_sel[1]), .C(lsu_align_result_96_m1[28]), .D(N_991), .Y(cpu_d_req_wr_data_net[28]) ); defparam \lsu_align_result_96[28] .INIT=16'hE2C0; // @46:11244 CFG4 \lsu_align_result_96[1] ( .A(shifter_unit_op_sel[0]), .B(shifter_unit_op_sel[1]), .C(N_2333), .D(N_964), .Y(cpu_d_req_wr_data_net[1]) ); defparam \lsu_align_result_96[1] .INIT=16'hE2C0; // @46:11282 CFG4 \exu_result_1_0[3] ( .A(exu_mux_result34), .B(exu_result_sn_N_6_mux), .C(exu_alu_result[3]), .D(cpu_d_req_addr_net[3]), .Y(exu_result_1[3]) ); defparam \exu_result_1_0[3] .INIT=16'h3210; // @46:11282 CFG4 \exu_result_1_0[2] ( .A(exu_mux_result34), .B(exu_result_sn_N_6_mux), .C(exu_alu_result[2]), .D(cpu_d_req_addr_net[2]), .Y(exu_result_1[2]) ); defparam \exu_result_1_0[2] .INIT=16'h3210; // @46:11282 CFG4 \exu_result_1_0[4] ( .A(exu_mux_result34), .B(exu_result_sn_N_6_mux), .C(exu_alu_result[4]), .D(cpu_d_req_addr_net[4]), .Y(exu_result_1[4]) ); defparam \exu_result_1_0[4] .INIT=16'h3210; // @46:11282 CFG4 \exu_result_1_0[6] ( .A(exu_mux_result34), .B(exu_result_sn_N_6_mux), .C(exu_alu_result[6]), .D(cpu_d_req_addr_net[6]), .Y(exu_result_1[6]) ); defparam \exu_result_1_0[6] .INIT=16'h3210; // @46:11282 CFG4 \exu_result_1_0[12] ( .A(exu_mux_result34), .B(exu_result_sn_N_6_mux), .C(exu_alu_result[12]), .D(cpu_d_req_addr_net[12]), .Y(exu_result_1[12]) ); defparam \exu_result_1_0[12] .INIT=16'h3210; // @46:11282 CFG4 \exu_result_1_0[5] ( .A(exu_mux_result34), .B(exu_result_sn_N_6_mux), .C(exu_alu_result[5]), .D(cpu_d_req_addr_net[5]), .Y(exu_result_1[5]) ); defparam \exu_result_1_0[5] .INIT=16'h3210; // @46:11282 CFG4 \exu_result_1_0[27] ( .A(exu_mux_result34), .B(exu_result_sn_N_6_mux), .C(exu_alu_result[27]), .D(cpu_d_req_addr_net[27]), .Y(exu_result_1[27]) ); defparam \exu_result_1_0[27] .INIT=16'h3210; // @46:11282 CFG4 \exu_result_1_0[17] ( .A(exu_mux_result34), .B(exu_result_sn_N_6_mux), .C(exu_alu_result[17]), .D(cpu_d_req_addr_net[17]), .Y(exu_result_1[17]) ); defparam \exu_result_1_0[17] .INIT=16'h3210; // @46:11282 CFG4 \exu_result_1_0[9] ( .A(exu_mux_result34), .B(exu_result_sn_N_6_mux), .C(exu_alu_result[9]), .D(cpu_d_req_addr_net[9]), .Y(exu_result_1[9]) ); defparam \exu_result_1_0[9] .INIT=16'h3210; // @46:11282 CFG4 \exu_result_1_0[15] ( .A(exu_mux_result34), .B(exu_result_sn_N_6_mux), .C(exu_alu_result[15]), .D(cpu_d_req_addr_net[15]), .Y(exu_result_1[15]) ); defparam \exu_result_1_0[15] .INIT=16'h3210; // @46:11282 CFG4 \exu_result_1_0[31] ( .A(exu_mux_result34), .B(exu_result_sn_N_6_mux), .C(exu_alu_result[31]), .D(cpu_d_req_addr_net[31]), .Y(exu_result_1[31]) ); defparam \exu_result_1_0[31] .INIT=16'h3210; // @46:11282 CFG4 \exu_result_1_0[26] ( .A(exu_mux_result34), .B(exu_result_sn_N_6_mux), .C(exu_alu_result[26]), .D(cpu_d_req_addr_net[26]), .Y(exu_result_1[26]) ); defparam \exu_result_1_0[26] .INIT=16'h3210; // @46:11282 CFG4 \exu_result_1_0[14] ( .A(exu_mux_result34), .B(exu_result_sn_N_6_mux), .C(exu_alu_result[14]), .D(cpu_d_req_addr_net[14]), .Y(exu_result_1[14]) ); defparam \exu_result_1_0[14] .INIT=16'h3210; // @46:11282 CFG4 \exu_result_1_0[7] ( .A(exu_mux_result34), .B(exu_result_sn_N_6_mux), .C(exu_alu_result[7]), .D(cpu_d_req_addr_net[7]), .Y(exu_result_1[7]) ); defparam \exu_result_1_0[7] .INIT=16'h3210; // @46:11282 CFG4 \exu_result_1_0[18] ( .A(exu_mux_result34), .B(exu_result_sn_N_6_mux), .C(exu_alu_result[18]), .D(cpu_d_req_addr_net[18]), .Y(exu_result_1[18]) ); defparam \exu_result_1_0[18] .INIT=16'h3210; // @46:11282 CFG4 \exu_result_1_0[16] ( .A(exu_mux_result34), .B(exu_result_sn_N_6_mux), .C(exu_alu_result[16]), .D(cpu_d_req_addr_net[16]), .Y(exu_result_1[16]) ); defparam \exu_result_1_0[16] .INIT=16'h3210; // @46:11282 CFG4 \exu_result_1_0[13] ( .A(exu_mux_result34), .B(exu_result_sn_N_6_mux), .C(exu_alu_result[13]), .D(cpu_d_req_addr_net[13]), .Y(exu_result_1[13]) ); defparam \exu_result_1_0[13] .INIT=16'h3210; // @46:11282 CFG4 \exu_result_1_0[20] ( .A(exu_mux_result34), .B(exu_result_sn_N_6_mux), .C(exu_alu_result[20]), .D(cpu_d_req_addr_net[20]), .Y(exu_result_1[20]) ); defparam \exu_result_1_0[20] .INIT=16'h3210; // @46:11282 CFG4 \exu_result_1_0[11] ( .A(exu_mux_result34), .B(exu_result_sn_N_6_mux), .C(exu_alu_result[11]), .D(cpu_d_req_addr_net[11]), .Y(exu_result_1[11]) ); defparam \exu_result_1_0[11] .INIT=16'h3210; // @46:11282 CFG4 \exu_result_1_0[19] ( .A(exu_mux_result34), .B(exu_result_sn_N_6_mux), .C(exu_alu_result[19]), .D(cpu_d_req_addr_net[19]), .Y(exu_result_1[19]) ); defparam \exu_result_1_0[19] .INIT=16'h3210; // @46:11282 CFG4 \exu_result_1_0[8] ( .A(exu_mux_result34), .B(exu_result_sn_N_6_mux), .C(exu_alu_result[8]), .D(cpu_d_req_addr_net[8]), .Y(exu_result_1[8]) ); defparam \exu_result_1_0[8] .INIT=16'h3210; // @46:11282 CFG4 \exu_result_1_0[24] ( .A(exu_mux_result34), .B(exu_result_sn_N_6_mux), .C(exu_alu_result[24]), .D(cpu_d_req_addr_net[24]), .Y(exu_result_1[24]) ); defparam \exu_result_1_0[24] .INIT=16'h3210; // @46:11282 CFG4 \exu_result_1_0[30] ( .A(exu_mux_result34), .B(exu_result_sn_N_6_mux), .C(exu_alu_result[30]), .D(cpu_d_req_addr_net[30]), .Y(exu_result_1[30]) ); defparam \exu_result_1_0[30] .INIT=16'h3210; // @46:11282 CFG4 \exu_result_1_0[22] ( .A(exu_mux_result34), .B(exu_result_sn_N_6_mux), .C(exu_alu_result[22]), .D(cpu_d_req_addr_net[22]), .Y(exu_result_1[22]) ); defparam \exu_result_1_0[22] .INIT=16'h3210; // @46:11282 CFG4 \exu_result_1_0[23] ( .A(exu_mux_result34), .B(exu_result_sn_N_6_mux), .C(exu_alu_result[23]), .D(cpu_d_req_addr_net[23]), .Y(exu_result_1[23]) ); defparam \exu_result_1_0[23] .INIT=16'h3210; // @46:11282 CFG4 \exu_result_1_0[29] ( .A(exu_mux_result34), .B(exu_result_sn_N_6_mux), .C(exu_alu_result[29]), .D(cpu_d_req_addr_net[29]), .Y(exu_result_1[29]) ); defparam \exu_result_1_0[29] .INIT=16'h3210; // @46:11282 CFG4 \exu_result_1_0[21] ( .A(exu_mux_result34), .B(exu_result_sn_N_6_mux), .C(exu_alu_result[21]), .D(cpu_d_req_addr_net[21]), .Y(exu_result_1[21]) ); defparam \exu_result_1_0[21] .INIT=16'h3210; // @46:11282 CFG4 \exu_result_1_0[10] ( .A(exu_mux_result34), .B(exu_result_sn_N_6_mux), .C(exu_alu_result[10]), .D(cpu_d_req_addr_net[10]), .Y(exu_result_1[10]) ); defparam \exu_result_1_0[10] .INIT=16'h3210; // @46:11282 CFG4 \exu_result_1_0[28] ( .A(exu_mux_result34), .B(exu_result_sn_N_6_mux), .C(exu_alu_result[28]), .D(cpu_d_req_addr_net[28]), .Y(exu_result_1[28]) ); defparam \exu_result_1_0[28] .INIT=16'h3210; // @46:11282 CFG4 \exu_result_1_0[25] ( .A(exu_mux_result34), .B(exu_result_sn_N_6_mux), .C(exu_alu_result[25]), .D(cpu_d_req_addr_net[25]), .Y(exu_result_1[25]) ); defparam \exu_result_1_0[25] .INIT=16'h3210; // @46:10892 CFG4 exu_alu_operand0_valid_u_0_a2_0 ( .A(exu_alu_operand0_valid_u_0_a2_0_RNO_Z), .B(exu_m1_e_4_0_Z), .C(exu_m2_0_a2_7_Z), .D(formal_trace_reset_taken), .Y(exu_alu_operand0_valid_u_0_a2_0_Z) ); defparam exu_alu_operand0_valid_u_0_a2_0.INIT=16'h4505; // @46:11244 CFG4 \lsu_align_result_96_u[0] ( .A(un174_shifter_result_1_i[5]), .B(shifter_unit_op_sel[1]), .C(N_2274), .D(lsu_align_result_32_1_Z[0]), .Y(cpu_d_req_wr_data_net[0]) ); defparam \lsu_align_result_96_u[0] .INIT=16'hD1C0; // @46:10951 CFG4 exu_shifter_operand_valid_0 ( .A(un1_rs1_rd_hzd_4), .B(shifter_operand_sel[1]), .C(exu_shifter_operand_valid_2_Z), .D(gpr_rs1_rd_data_valid_6), .Y(exu_shifter_operand_valid_0_Z) ); defparam exu_shifter_operand_valid_0.INIT=16'hF1F0; // @46:11244 CFG4 \lsu_align_result_96[30] ( .A(shifter_unit_op_sel[0]), .B(shifter_unit_op_sel[1]), .C(lsu_align_result_96_m1[30]), .D(N_993), .Y(cpu_d_req_wr_data_net[30]) ); defparam \lsu_align_result_96[30] .INIT=16'hE2C0; // @46:11244 CFG4 \lsu_align_result_32[31] ( .A(shifter_unit_op_sel[0]), .B(N_2122_i), .C(N_482), .D(N_962), .Y(N_1026) ); defparam \lsu_align_result_32[31] .INIT=16'hA820; // @46:11282 CFG3 \exu_result_2[17] ( .A(exu_result_sn_N_6_mux), .B(cpu_d_req_wr_data_net[17]), .C(exu_result_mux_sel[1]), .Y(exu_result_2_Z[17]) ); defparam \exu_result_2[17] .INIT=8'h80; // @46:11282 CFG3 \exu_result_2[18] ( .A(exu_result_sn_N_6_mux), .B(cpu_d_req_wr_data_net[18]), .C(exu_result_mux_sel[1]), .Y(exu_result_2_Z[18]) ); defparam \exu_result_2[18] .INIT=8'h80; // @46:11282 CFG3 \exu_result_2[20] ( .A(exu_result_sn_N_6_mux), .B(cpu_d_req_wr_data_net[20]), .C(exu_result_mux_sel[1]), .Y(exu_result_2_Z[20]) ); defparam \exu_result_2[20] .INIT=8'h80; // @46:11282 CFG3 \exu_result_2[19] ( .A(exu_result_sn_N_6_mux), .B(cpu_d_req_wr_data_net[19]), .C(exu_result_mux_sel[1]), .Y(exu_result_2_Z[19]) ); defparam \exu_result_2[19] .INIT=8'h80; // @46:10951 CFG4 exu_shifter_operand_valid ( .A(exu_shifter_operand_valid_2_a3_Z), .B(exu_shifter_operand_valid_2_a2_1_Z), .C(exu_shifter_operand_valid_0_Z), .D(gpr_wr_valid_retr_0), .Y(N_1850) ); defparam exu_shifter_operand_valid.INIT=16'hFAFE; // @46:10978 CFG4 exu_shifter_places_valid ( .A(exu_shifter_places_valid_2_a2_Z), .B(exu_shifter_places_valid_3_Z), .C(exu_shifter_places_valid_0), .D(exu_shifter_places_valid_2_a3_Z), .Y(N_1748) ); defparam exu_shifter_places_valid.INIT=16'hFFFE; // @46:11282 CFG3 \exu_result_2[22] ( .A(exu_result_sn_N_6_mux), .B(cpu_d_req_wr_data_net[22]), .C(exu_result_mux_sel[1]), .Y(exu_result_2_Z[22]) ); defparam \exu_result_2[22] .INIT=8'h80; // @46:11282 CFG3 \exu_result_2[21] ( .A(exu_result_sn_N_6_mux), .B(cpu_d_req_wr_data_net[21]), .C(exu_result_mux_sel[1]), .Y(exu_result_2_Z[21]) ); defparam \exu_result_2[21] .INIT=8'h80; // @46:10892 CFG4 exu_alu_operand0_valid_u ( .A(exu_alu_operand0_valid_u_0_a2_0_Z), .B(exu_alu_operand0_valid_u_0_a0_1_Z), .C(machine_implicit_wr_mtval_tval_wr_en), .D(exu_alu_operand0_valid_u_RNO_Z), .Y(exu_alu_operand0_valid) ); defparam exu_alu_operand0_valid_u.INIT=16'hFFEA; // @46:11282 CFG3 \exu_result_2[3] ( .A(exu_result_sn_N_6_mux), .B(cpu_d_req_wr_data_net[3]), .C(exu_result_mux_sel[1]), .Y(exu_result_2_Z[3]) ); defparam \exu_result_2[3] .INIT=8'h80; // @46:11282 CFG3 \exu_result_2[2] ( .A(exu_result_sn_N_6_mux), .B(cpu_d_req_wr_data_net[2]), .C(exu_result_mux_sel[1]), .Y(exu_result_2_Z[2]) ); defparam \exu_result_2[2] .INIT=8'h80; // @46:11282 CFG3 \exu_result_2[4] ( .A(exu_result_sn_N_6_mux), .B(cpu_d_req_wr_data_net[4]), .C(exu_result_mux_sel[1]), .Y(exu_result_2_Z[4]) ); defparam \exu_result_2[4] .INIT=8'h80; // @46:11282 CFG3 \exu_result_2[6] ( .A(exu_result_sn_N_6_mux), .B(cpu_d_req_wr_data_net[6]), .C(exu_result_mux_sel[1]), .Y(exu_result_2_Z[6]) ); defparam \exu_result_2[6] .INIT=8'h80; // @46:11282 CFG3 \exu_result_2[12] ( .A(exu_result_sn_N_6_mux), .B(cpu_d_req_wr_data_net[12]), .C(exu_result_mux_sel[1]), .Y(exu_result_2_Z[12]) ); defparam \exu_result_2[12] .INIT=8'h80; // @46:11282 CFG3 \exu_result_2[5] ( .A(exu_result_sn_N_6_mux), .B(cpu_d_req_wr_data_net[5]), .C(exu_result_mux_sel[1]), .Y(exu_result_2_Z[5]) ); defparam \exu_result_2[5] .INIT=8'h80; // @46:11282 CFG3 \exu_result_2[9] ( .A(exu_result_sn_N_6_mux), .B(cpu_d_req_wr_data_net[9]), .C(exu_result_mux_sel[1]), .Y(exu_result_2_Z[9]) ); defparam \exu_result_2[9] .INIT=8'h80; // @46:11282 CFG3 \exu_result_2[15] ( .A(exu_result_sn_N_6_mux), .B(cpu_d_req_wr_data_net[15]), .C(exu_result_mux_sel[1]), .Y(exu_result_2_Z[15]) ); defparam \exu_result_2[15] .INIT=8'h80; // @46:11282 CFG3 \exu_result_2[14] ( .A(exu_result_sn_N_6_mux), .B(cpu_d_req_wr_data_net[14]), .C(exu_result_mux_sel[1]), .Y(exu_result_2_Z[14]) ); defparam \exu_result_2[14] .INIT=8'h80; // @46:11282 CFG3 \exu_result_2[7] ( .A(exu_result_sn_N_6_mux), .B(cpu_d_req_wr_data_net[7]), .C(exu_result_mux_sel[1]), .Y(exu_result_2_Z[7]) ); defparam \exu_result_2[7] .INIT=8'h80; // @46:11282 CFG3 \exu_result_2[13] ( .A(exu_result_sn_N_6_mux), .B(cpu_d_req_wr_data_net[13]), .C(exu_result_mux_sel[1]), .Y(exu_result_2_Z[13]) ); defparam \exu_result_2[13] .INIT=8'h80; // @46:11282 CFG3 \exu_result_2[11] ( .A(exu_result_sn_N_6_mux), .B(cpu_d_req_wr_data_net[11]), .C(exu_result_mux_sel[1]), .Y(exu_result_2_Z[11]) ); defparam \exu_result_2[11] .INIT=8'h80; // @46:11282 CFG3 \exu_result_2[8] ( .A(exu_result_sn_N_6_mux), .B(cpu_d_req_wr_data_net[8]), .C(exu_result_mux_sel[1]), .Y(exu_result_2_Z[8]) ); defparam \exu_result_2[8] .INIT=8'h80; // @46:11282 CFG3 \exu_result_2[10] ( .A(exu_result_sn_N_6_mux), .B(cpu_d_req_wr_data_net[10]), .C(exu_result_mux_sel[1]), .Y(exu_result_2_Z[10]) ); defparam \exu_result_2[10] .INIT=8'h80; // @46:11244 CFG4 \lsu_align_result_96[16] ( .A(shifter_unit_op_sel[0]), .B(shifter_unit_op_sel[1]), .C(N_3027), .D(N_979), .Y(cpu_d_req_wr_data_net[16]) ); defparam \lsu_align_result_96[16] .INIT=16'hE2C0; // @46:11282 CFG3 \exu_result_2[1] ( .A(exu_result_sn_N_6_mux), .B(cpu_d_req_wr_data_net[1]), .C(exu_result_mux_sel[1]), .Y(exu_result_2_Z[1]) ); defparam \exu_result_2[1] .INIT=8'h80; // @46:11282 CFG3 \exu_result_2[27] ( .A(exu_result_sn_N_6_mux), .B(cpu_d_req_wr_data_net[27]), .C(exu_result_mux_sel[1]), .Y(exu_result_2_Z[27]) ); defparam \exu_result_2[27] .INIT=8'h80; // @46:11282 CFG3 \exu_result_2[26] ( .A(exu_result_sn_N_6_mux), .B(cpu_d_req_wr_data_net[26]), .C(exu_result_mux_sel[1]), .Y(exu_result_2_Z[26]) ); defparam \exu_result_2[26] .INIT=8'h80; // @46:11282 CFG3 \exu_result_2[24] ( .A(exu_result_sn_N_6_mux), .B(cpu_d_req_wr_data_net[24]), .C(exu_result_mux_sel[1]), .Y(exu_result_2_Z[24]) ); defparam \exu_result_2[24] .INIT=8'h80; // @46:11282 CFG3 \exu_result_2[29] ( .A(exu_result_sn_N_6_mux), .B(cpu_d_req_wr_data_net[29]), .C(exu_result_mux_sel[1]), .Y(exu_result_2_Z[29]) ); defparam \exu_result_2[29] .INIT=8'h80; // @46:11282 CFG3 \exu_result_2[28] ( .A(exu_result_sn_N_6_mux), .B(cpu_d_req_wr_data_net[28]), .C(exu_result_mux_sel[1]), .Y(exu_result_2_Z[28]) ); defparam \exu_result_2[28] .INIT=8'h80; // @46:11383 CFG4 \next_exu_result_reg_int[17] ( .A(exu_result_2_Z[17]), .B(N_1339), .C(exu_result_1[17]), .D(next_exu_result_reg_int_sn_N_2), .Y(next_exu_result_reg_int_Z[17]) ); defparam \next_exu_result_reg_int[17] .INIT=16'hFACC; // @46:11383 CFG4 \next_exu_result_reg_int[18] ( .A(exu_result_2_Z[18]), .B(N_1340), .C(exu_result_1[18]), .D(next_exu_result_reg_int_sn_N_2), .Y(next_exu_result_reg_int_Z[18]) ); defparam \next_exu_result_reg_int[18] .INIT=16'hFACC; // @46:11282 CFG3 \exu_result_2[0] ( .A(exu_result_sn_N_6_mux), .B(cpu_d_req_wr_data_net[0]), .C(exu_result_mux_sel[1]), .Y(exu_result_2_Z[0]) ); defparam \exu_result_2[0] .INIT=8'h80; // @46:10828 CFG4 exu_alu_operand0_valid_u_RNIA72AVC ( .A(start_m7_0_a4_0_3_Z), .B(start_m8_3), .C(trace_exception), .D(exu_alu_operand0_valid), .Y(start_slow_mul) ); defparam exu_alu_operand0_valid_u_RNIA72AVC.INIT=16'hC400; // @46:11383 CFG4 \next_exu_result_reg_int[19] ( .A(exu_result_2_Z[19]), .B(N_1341), .C(exu_result_1[19]), .D(next_exu_result_reg_int_sn_N_2), .Y(next_exu_result_reg_int_Z[19]) ); defparam \next_exu_result_reg_int[19] .INIT=16'hFACC; // @46:11383 CFG4 \next_exu_result_reg_int[20] ( .A(exu_result_2_Z[20]), .B(N_1342), .C(exu_result_1[20]), .D(next_exu_result_reg_int_sn_N_2), .Y(next_exu_result_reg_int_Z[20]) ); defparam \next_exu_result_reg_int[20] .INIT=16'hFACC; // @46:11244 CFG3 \lsu_align_result_96[31] ( .A(N_1026), .B(shifter_unit_op_sel[1]), .C(cpu_d_req_wr_data_net_2[31]), .Y(cpu_d_req_wr_data_net[31]) ); defparam \lsu_align_result_96[31] .INIT=8'hF2; // @46:11282 CFG3 \exu_result_2[30] ( .A(exu_result_sn_N_6_mux), .B(cpu_d_req_wr_data_net[30]), .C(exu_result_mux_sel[1]), .Y(exu_result_2_Z[30]) ); defparam \exu_result_2[30] .INIT=8'h80; // @46:11383 CFG4 \next_exu_result_reg_int[21] ( .A(exu_result_2_Z[21]), .B(N_1343), .C(exu_result_1[21]), .D(next_exu_result_reg_int_sn_N_2), .Y(next_exu_result_reg_int_Z[21]) ); defparam \next_exu_result_reg_int[21] .INIT=16'hFACC; // @46:11383 CFG4 \next_exu_result_reg_int[22] ( .A(exu_result_2_Z[22]), .B(N_1344), .C(exu_result_1[22]), .D(next_exu_result_reg_int_sn_N_2), .Y(next_exu_result_reg_int_Z[22]) ); defparam \next_exu_result_reg_int[22] .INIT=16'hFACC; // @46:11383 CFG4 \next_exu_result_reg_int[23] ( .A(exu_result_2_Z[23]), .B(N_1345), .C(exu_result_1[23]), .D(next_exu_result_reg_int_sn_N_2), .Y(next_exu_result_reg_int_Z[23]) ); defparam \next_exu_result_reg_int[23] .INIT=16'hFACC; // @46:10951 CFG4 exu_shifter_operand_valid_3 ( .A(shifter_operand_sel[1]), .B(shifter_operand_sel[0]), .C(N_1850), .D(gpr_rs2_rd_data_valid_ex), .Y(exu_shifter_operand_valid_Z) ); defparam exu_shifter_operand_valid_3.INIT=16'hF3D1; // @46:10914 CFG4 exu_alu_operand1_valid_u ( .A(de_ex_pipe_operand1_mux_sel_ex[1]), .B(stage_state_ex), .C(gpr_rs2_rd_data_valid_ex), .D(de_ex_pipe_operand1_mux_sel_ex[0]), .Y(exu_alu_operand1_valid) ); defparam exu_alu_operand1_valid_u.INIT=16'hEEFA; // @46:11383 CFG4 \next_exu_result_reg_int[2] ( .A(exu_result_2_Z[2]), .B(N_1324), .C(exu_result_1[2]), .D(next_exu_result_reg_int_sn_N_2), .Y(next_exu_result_reg_int_Z[2]) ); defparam \next_exu_result_reg_int[2] .INIT=16'hFACC; // @46:11383 CFG4 \next_exu_result_reg_int[3] ( .A(exu_result_2_Z[3]), .B(N_1325), .C(exu_result_1[3]), .D(next_exu_result_reg_int_sn_N_2), .Y(next_exu_result_reg_int_Z[3]) ); defparam \next_exu_result_reg_int[3] .INIT=16'hFACC; // @46:11383 CFG4 \next_exu_result_reg_int[4] ( .A(exu_result_2_Z[4]), .B(N_1326), .C(exu_result_1[4]), .D(next_exu_result_reg_int_sn_N_2), .Y(next_exu_result_reg_int_Z[4]) ); defparam \next_exu_result_reg_int[4] .INIT=16'hFACC; // @46:11383 CFG4 \next_exu_result_reg_int[5] ( .A(exu_result_2_Z[5]), .B(N_1327), .C(exu_result_1[5]), .D(next_exu_result_reg_int_sn_N_2), .Y(next_exu_result_reg_int_Z[5]) ); defparam \next_exu_result_reg_int[5] .INIT=16'hFACC; // @46:11383 CFG4 \next_exu_result_reg_int[6] ( .A(exu_result_2_Z[6]), .B(N_1328), .C(exu_result_1[6]), .D(next_exu_result_reg_int_sn_N_2), .Y(next_exu_result_reg_int_Z[6]) ); defparam \next_exu_result_reg_int[6] .INIT=16'hFACC; // @46:11383 CFG4 \next_exu_result_reg_int[7] ( .A(exu_result_2_Z[7]), .B(N_1329), .C(exu_result_1[7]), .D(next_exu_result_reg_int_sn_N_2), .Y(next_exu_result_reg_int_Z[7]) ); defparam \next_exu_result_reg_int[7] .INIT=16'hFACC; // @46:11383 CFG4 \next_exu_result_reg_int[8] ( .A(exu_result_2_Z[8]), .B(N_1330), .C(exu_result_1[8]), .D(next_exu_result_reg_int_sn_N_2), .Y(next_exu_result_reg_int_Z[8]) ); defparam \next_exu_result_reg_int[8] .INIT=16'hFACC; // @46:11383 CFG4 \next_exu_result_reg_int[9] ( .A(exu_result_2_Z[9]), .B(N_1331), .C(exu_result_1[9]), .D(next_exu_result_reg_int_sn_N_2), .Y(next_exu_result_reg_int_Z[9]) ); defparam \next_exu_result_reg_int[9] .INIT=16'hFACC; // @46:11383 CFG4 \next_exu_result_reg_int[10] ( .A(exu_result_2_Z[10]), .B(N_1332), .C(exu_result_1[10]), .D(next_exu_result_reg_int_sn_N_2), .Y(next_exu_result_reg_int_Z[10]) ); defparam \next_exu_result_reg_int[10] .INIT=16'hFACC; // @46:11383 CFG4 \next_exu_result_reg_int[11] ( .A(exu_result_2_Z[11]), .B(N_1333), .C(exu_result_1[11]), .D(next_exu_result_reg_int_sn_N_2), .Y(next_exu_result_reg_int_Z[11]) ); defparam \next_exu_result_reg_int[11] .INIT=16'hFACC; // @46:11383 CFG4 \next_exu_result_reg_int[12] ( .A(exu_result_2_Z[12]), .B(N_1334), .C(exu_result_1[12]), .D(next_exu_result_reg_int_sn_N_2), .Y(next_exu_result_reg_int_Z[12]) ); defparam \next_exu_result_reg_int[12] .INIT=16'hFACC; // @46:11383 CFG4 \next_exu_result_reg_int[14] ( .A(exu_result_2_Z[14]), .B(N_1336), .C(exu_result_1[14]), .D(next_exu_result_reg_int_sn_N_2), .Y(next_exu_result_reg_int_Z[14]) ); defparam \next_exu_result_reg_int[14] .INIT=16'hFACC; // @46:11383 CFG4 \next_exu_result_reg_int[15] ( .A(exu_result_2_Z[15]), .B(N_1337), .C(exu_result_1[15]), .D(next_exu_result_reg_int_sn_N_2), .Y(next_exu_result_reg_int_Z[15]) ); defparam \next_exu_result_reg_int[15] .INIT=16'hFACC; // @46:11383 CFG4 \next_exu_result_reg_int[13] ( .A(exu_result_2_Z[13]), .B(N_1335), .C(exu_result_1[13]), .D(next_exu_result_reg_int_sn_N_2), .Y(next_exu_result_reg_int_Z[13]) ); defparam \next_exu_result_reg_int[13] .INIT=16'hFACC; // @46:10869 CFG3 start_div ( .A(un17_start_div), .B(exu_alu_operand0_valid), .C(exu_alu_operand1_valid), .Y(start_div_Z) ); defparam start_div.INIT=8'h80; // @46:11244 CFG3 lsu_align_result_valid_0 ( .A(shifter_unit_op_sel[1]), .B(shifter_unit_op_sel[0]), .C(exu_shifter_operand_valid_Z), .Y(lsu_align_result_valid_0_1z) ); defparam lsu_align_result_valid_0.INIT=8'hE0; // @46:10978 CFG3 exu_shifter_places_valid_u ( .A(N_1748), .B(exu_shifter_places_valid_1_0), .C(exu_shifter_places_sn_N_2), .Y(exu_shifter_places_valid_1z) ); defparam exu_shifter_places_valid_u.INIT=8'hEC; // @46:11383 CFG4 \next_exu_result_reg_int[24] ( .A(exu_result_2_Z[24]), .B(N_1346), .C(exu_result_1[24]), .D(next_exu_result_reg_int_sn_N_2), .Y(next_exu_result_reg_int_Z[24]) ); defparam \next_exu_result_reg_int[24] .INIT=16'hFACC; // @46:11383 CFG4 \next_exu_result_reg_int[25] ( .A(exu_result_2_Z[25]), .B(N_1347), .C(exu_result_1[25]), .D(next_exu_result_reg_int_sn_N_2), .Y(next_exu_result_reg_int_Z[25]) ); defparam \next_exu_result_reg_int[25] .INIT=16'hFACC; // @46:11383 CFG4 \next_exu_result_reg_int[26] ( .A(exu_result_2_Z[26]), .B(N_1348), .C(exu_result_1[26]), .D(next_exu_result_reg_int_sn_N_2), .Y(next_exu_result_reg_int_Z[26]) ); defparam \next_exu_result_reg_int[26] .INIT=16'hFACC; // @46:11383 CFG4 \next_exu_result_reg_int[27] ( .A(exu_result_2_Z[27]), .B(N_1349), .C(exu_result_1[27]), .D(next_exu_result_reg_int_sn_N_2), .Y(next_exu_result_reg_int_Z[27]) ); defparam \next_exu_result_reg_int[27] .INIT=16'hFACC; // @46:11383 CFG4 \next_exu_result_reg_int[29] ( .A(exu_result_2_Z[29]), .B(N_1351), .C(exu_result_1[29]), .D(next_exu_result_reg_int_sn_N_2), .Y(next_exu_result_reg_int_Z[29]) ); defparam \next_exu_result_reg_int[29] .INIT=16'hFACC; // @46:11383 CFG4 \next_exu_result_reg_int[1] ( .A(exu_result_2_Z[1]), .B(N_1323), .C(exu_result_1[1]), .D(next_exu_result_reg_int_sn_N_2), .Y(next_exu_result_reg_int_Z[1]) ); defparam \next_exu_result_reg_int[1] .INIT=16'hFACC; // @46:11383 CFG4 \next_exu_result_reg_int[28] ( .A(exu_result_2_Z[28]), .B(N_1350), .C(exu_result_1[28]), .D(next_exu_result_reg_int_sn_N_2), .Y(next_exu_result_reg_int_Z[28]) ); defparam \next_exu_result_reg_int[28] .INIT=16'hFACC; // @46:11282 CFG3 \exu_result_2[16] ( .A(exu_result_sn_N_6_mux), .B(cpu_d_req_wr_data_net[16]), .C(exu_result_mux_sel[1]), .Y(exu_result_2_Z[16]) ); defparam \exu_result_2[16] .INIT=8'h80; // @46:9457 CFG3 start_div_RNIPIHTR ( .A(N_13_0), .B(start_div_Z), .C(trace_priv_i), .Y(next_div_divisor39) ); defparam start_div_RNIPIHTR.INIT=8'h08; // @46:9457 CFG4 exu_alu_operand1_valid_u_RNI46SCU ( .A(N_13_0), .B(un17_start_div), .C(exu_alu_operand1_valid), .D(exu_alu_operand0_valid), .Y(div_finish) ); defparam exu_alu_operand1_valid_u_RNI46SCU.INIT=16'h4000; // @46:11383 CFG4 \next_exu_result_reg_int[0] ( .A(exu_result_2_Z[0]), .B(N_1322), .C(exu_result_1[0]), .D(next_exu_result_reg_int_sn_N_2), .Y(next_exu_result_reg_int_Z[0]) ); defparam \next_exu_result_reg_int[0] .INIT=16'hFACC; // @46:11383 CFG4 \next_exu_result_reg_int[30] ( .A(exu_result_2_Z[30]), .B(N_1352), .C(exu_result_1[30]), .D(next_exu_result_reg_int_sn_N_2), .Y(next_exu_result_reg_int_Z[30]) ); defparam \next_exu_result_reg_int[30] .INIT=16'hFACC; // @46:11282 CFG4 exu_result_valid_iv_1_RNO_0 ( .A(exu_result_mux_sel[1]), .B(exu_result_sn_N_6_mux), .C(exu_shifter_places_valid_1z), .D(lsu_align_result_valid_0_1z), .Y(lsu_align_result_valid_m) ); defparam exu_result_valid_iv_1_RNO_0.INIT=16'h8000; // @46:11282 CFG3 \exu_result_2[31] ( .A(exu_result_sn_N_6_mux), .B(cpu_d_req_wr_data_net[31]), .C(exu_result_mux_sel[1]), .Y(exu_result_2_Z[31]) ); defparam \exu_result_2[31] .INIT=8'h80; // @46:11383 CFG4 \next_exu_result_reg_int[16] ( .A(exu_result_2_Z[16]), .B(N_1338), .C(exu_result_1[16]), .D(next_exu_result_reg_int_sn_N_2), .Y(next_exu_result_reg_int_Z[16]) ); defparam \next_exu_result_reg_int[16] .INIT=16'hFACC; // @46:11282 CFG4 exu_result_valid_iv_1 ( .A(lsu_req_addr_valid), .B(exu_mux_result34), .C(un1_exu_mux_result_valid_sel_m), .D(lsu_align_result_valid_m), .Y(exu_result_valid_iv_1_1z) ); defparam exu_result_valid_iv_1.INIT=16'hFFF8; // @46:11383 CFG4 \next_exu_result_reg_int[31] ( .A(exu_result_2_Z[31]), .B(next_exu_result_reg_int_sn_N_2), .C(N_1353), .D(exu_result_1[31]), .Y(next_exu_result_reg_int_Z[31]) ); defparam \next_exu_result_reg_int[31] .INIT=16'hFCB8; // @46:11356 CFG2 exu_result_reg_valid_2 ( .A(exu_result_valid_ex), .B(trace_priv_i), .Y(exu_result_reg_valid_2_Z) ); defparam exu_result_reg_valid_2.INIT=4'hE; // @46:9457 CFG4 div_ack_RNO ( .A(div_ack_Z), .B(exu_op_abort_ex), .C(next_div_divisor39), .D(exu_update_result_reg), .Y(N_61) ); defparam div_ack_RNO.INIT=16'h5F5C; // @46:11493 CFG4 \exu_result_reg_intce[64] ( .A(mul_mp_pmux), .B(exu_update_result_reg), .C(exu_op_abort_ex), .D(next_exu_result_reg_int48), .Y(exu_result_reg_intce_Z[64]) ); defparam \exu_result_reg_intce[64] .INIT=16'hAAA8; // @46:11493 CFG4 \mul_div_cnt_RNI945FTD[5] ( .A(exu_op_abort_ex), .B(trace_priv_i), .C(ex_retr_exu_res_accept_retr_3), .D(next_exu_result_reg_int48), .Y(N_37_0_i) ); defparam \mul_div_cnt_RNI945FTD[5] .INIT=16'hFFFE; // @46:11446 CFG4 start_div_RNIKS93LE ( .A(next_div_divisor39), .B(exu_update_result_reg), .C(exu_op_abort_ex), .D(next_exu_result_reg_int48), .Y(N_38_0_i) ); defparam start_div_RNIKS93LE.INIT=16'hFFFE; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_exu_1s_1s_1s_1s_0s_0s_0s_1_0_1 */ module miv_rv32_bcu ( ex_retr_pipe_gpr_wr_mux_sel_retr_0, ex_retr_pipe_sw_csr_addr_retr, csr_priv_mtvec_epc_retr, de_ex_pipe_immediate_ex, csr_priv_dpc_retr, de_ex_pipe_curr_pc_ex, gpr_rs1_rd_data_sig, de_ex_pipe_bcu_operand0_mux_sel_ex_0, csr_priv_mtvec_excpt_vec_retr, de_ex_pipe_bcu_operand1_mux_sel_ex, cpu_d_req_addr_net, lsu_req_addr_valid, machine_implicit_wr_mtval_tval_wr_en, un2_exception_taken, gpr_wr_valid_retr_2_0_0, formal_trace_reset_taken, soft_reset_taken_retr_0, gpr_wr_valid_retr_0, gpr_rs1_rd_data_valid_6, un1_rs1_rd_hzd_4, gpr_rs1_rd_valid_mux, gpr_rs1_rd_data_valid_6_5, trace_priv_i, un3_bcu_op_sel_ex, stage_state_retr, N_40, N_1410_4, N_1410_2, bcu_operand1_valid_6_i_a2_0_2_1z, bcu_result_cry_0_Y ) ; input ex_retr_pipe_gpr_wr_mux_sel_retr_0 ; input [11:0] ex_retr_pipe_sw_csr_addr_retr ; input [31:1] csr_priv_mtvec_epc_retr ; input [31:0] de_ex_pipe_immediate_ex ; input [31:0] csr_priv_dpc_retr ; input [31:0] de_ex_pipe_curr_pc_ex ; input [31:0] gpr_rs1_rd_data_sig ; input de_ex_pipe_bcu_operand0_mux_sel_ex_0 ; input [31:2] csr_priv_mtvec_excpt_vec_retr ; input [2:0] de_ex_pipe_bcu_operand1_mux_sel_ex ; output [31:1] cpu_d_req_addr_net ; output lsu_req_addr_valid ; input machine_implicit_wr_mtval_tval_wr_en ; input un2_exception_taken ; input gpr_wr_valid_retr_2_0_0 ; input formal_trace_reset_taken ; input soft_reset_taken_retr_0 ; input gpr_wr_valid_retr_0 ; input gpr_rs1_rd_data_valid_6 ; input un1_rs1_rd_hzd_4 ; input gpr_rs1_rd_valid_mux ; input gpr_rs1_rd_data_valid_6_5 ; input trace_priv_i ; input un3_bcu_op_sel_ex ; input stage_state_retr ; input N_40 ; output N_1410_4 ; output N_1410_2 ; output bcu_operand1_valid_6_i_a2_0_2_1z ; output bcu_result_cry_0_Y ; wire ex_retr_pipe_gpr_wr_mux_sel_retr_0 ; wire de_ex_pipe_bcu_operand0_mux_sel_ex_0 ; wire lsu_req_addr_valid ; wire machine_implicit_wr_mtval_tval_wr_en ; wire un2_exception_taken ; wire gpr_wr_valid_retr_2_0_0 ; wire formal_trace_reset_taken ; wire soft_reset_taken_retr_0 ; wire gpr_wr_valid_retr_0 ; wire gpr_rs1_rd_data_valid_6 ; wire un1_rs1_rd_hzd_4 ; wire gpr_rs1_rd_valid_mux ; wire gpr_rs1_rd_data_valid_6_5 ; wire trace_priv_i ; wire un3_bcu_op_sel_ex ; wire stage_state_retr ; wire N_40 ; wire N_1410_4 ; wire N_1410_2 ; wire bcu_operand1_valid_6_i_a2_0_2_1z ; wire bcu_result_cry_0_Y ; wire [0:0] bcu_operand1_6_0_a2_0_Z; wire [31:1] bcu_operand0; wire [30:3] bcu_operand1_3_1_0_co1; wire [30:3] bcu_operand1_3_1_0_wmux_0_S; wire [30:3] bcu_operand1_3_1_0_y0; wire [30:3] bcu_operand1_3_1_0_co0; wire [30:3] bcu_operand1_3_1_0_wmux_S; wire [31:2] bcu_operand1_3_i_m4_1_0_co1; wire [31:2] bcu_operand1_3_i_m4_1_0_wmux_0_S; wire [31:2] bcu_operand1_3_i_m4_1_0_y0; wire [31:2] bcu_operand1_3_i_m4_1_0_co0; wire [31:2] bcu_operand1_3_i_m4_1_0_wmux_S; wire bcu_result_cry_0_Z ; wire bcu_result_cry_0_S ; wire N_1405 ; wire bcu_result ; wire GND ; wire bcu_result_cry_1_Z ; wire bcu_result_cry_1_Y ; wire N_1404 ; wire N_1408 ; wire bcu_result_cry_2 ; wire bcu_result_cry_2_0_Y ; wire N_1401 ; wire bcu_result_cry_3 ; wire bcu_result_cry_3_0_Y ; wire N_935 ; wire bcu_result_cry_4 ; wire bcu_result_cry_4_0_Y ; wire N_936 ; wire bcu_result_cry_5 ; wire bcu_result_cry_5_0_Y ; wire N_937 ; wire bcu_result_cry_6 ; wire bcu_result_cry_6_0_Y ; wire N_938 ; wire bcu_result_cry_7 ; wire bcu_result_cry_7_0_Y ; wire N_939 ; wire bcu_result_cry_8 ; wire bcu_result_cry_8_0_Y ; wire N_940 ; wire bcu_result_cry_9 ; wire bcu_result_cry_9_0_Y ; wire N_941 ; wire bcu_result_cry_10 ; wire bcu_result_cry_10_0_Y ; wire N_942 ; wire bcu_result_cry_11 ; wire bcu_result_cry_11_0_Y ; wire N_943 ; wire bcu_result_cry_12 ; wire bcu_result_cry_12_0_Y ; wire N_944 ; wire bcu_result_cry_13 ; wire bcu_result_cry_13_0_Y ; wire N_945 ; wire bcu_result_cry_14 ; wire bcu_result_cry_14_0_Y ; wire N_946 ; wire bcu_result_cry_15 ; wire bcu_result_cry_15_0_Y ; wire N_947 ; wire bcu_result_cry_16 ; wire bcu_result_cry_16_0_Y ; wire N_948 ; wire bcu_result_cry_17 ; wire bcu_result_cry_17_0_Y ; wire N_949 ; wire bcu_result_cry_18 ; wire bcu_result_cry_18_0_Y ; wire N_950 ; wire bcu_result_cry_19 ; wire bcu_result_cry_19_0_Y ; wire N_951 ; wire bcu_result_cry_20 ; wire bcu_result_cry_20_0_Y ; wire N_952 ; wire bcu_result_cry_21 ; wire bcu_result_cry_21_0_Y ; wire N_953 ; wire bcu_result_cry_22 ; wire bcu_result_cry_22_0_Y ; wire N_954 ; wire bcu_result_cry_23 ; wire bcu_result_cry_23_0_Y ; wire N_955 ; wire bcu_result_cry_24 ; wire bcu_result_cry_24_0_Y ; wire N_956 ; wire bcu_result_cry_25 ; wire bcu_result_cry_25_0_Y ; wire N_957 ; wire bcu_result_cry_26 ; wire bcu_result_cry_26_0_Y ; wire N_958 ; wire bcu_result_cry_27 ; wire bcu_result_cry_27_0_Y ; wire N_959 ; wire bcu_result_cry_28 ; wire bcu_result_cry_28_0_Y ; wire N_960 ; wire bcu_result_cry_29 ; wire bcu_result_cry_29_0_Y ; wire N_961 ; wire bcu_result_s_31_FCO ; wire bcu_result_s_31_Y ; wire N_42 ; wire N_1400 ; wire bcu_result_cry_30 ; wire bcu_result_cry_30_0_Y ; wire N_962 ; wire VCC ; wire bcu_operand1_valid_6_i_a2_0_3_Z ; wire N_1409 ; wire N_41 ; wire bcu_operand1_valid_6_i_a2_0_8_Z ; wire bcu_operand1_valid_6_i_a2_0_7_Z ; wire bcu_result_valid_1_Z ; wire bcu_result_valid_6_0_Z ; wire bcu_result_valid_a3_1_Z ; wire bcu_result_valid_2_0_Z ; wire bcu_result_valid_a2_Z ; wire bcu_result_valid_a3_Z ; wire bcu_result_valid_3 ; // @46:456 ARI1 bcu_result_cry_0 ( .FCO(bcu_result_cry_0_Z), .S(bcu_result_cry_0_S), .Y(bcu_result_cry_0_Y), .B(N_1405), .C(de_ex_pipe_bcu_operand1_mux_sel_ex[2]), .D(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .A(bcu_result), .FCI(GND) ); defparam bcu_result_cry_0.INIT=20'h5FD02; // @46:456 ARI1 bcu_result_cry_1 ( .FCO(bcu_result_cry_1_Z), .S(cpu_d_req_addr_net[1]), .Y(bcu_result_cry_1_Y), .B(N_1404), .C(N_1408), .D(bcu_operand1_6_0_a2_0_Z[0]), .A(bcu_operand0[1]), .FCI(bcu_result_cry_0_Z) ); defparam bcu_result_cry_1.INIT=20'h513EC; // @46:456 ARI1 bcu_result_cry_2_0 ( .FCO(bcu_result_cry_2), .S(cpu_d_req_addr_net[2]), .Y(bcu_result_cry_2_0_Y), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[2]), .C(N_1401), .D(GND), .A(bcu_operand0[2]), .FCI(bcu_result_cry_1_Z) ); defparam bcu_result_cry_2_0.INIT=20'h5BB44; // @46:456 ARI1 bcu_result_cry_3_0 ( .FCO(bcu_result_cry_3), .S(cpu_d_req_addr_net[3]), .Y(bcu_result_cry_3_0_Y), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[2]), .C(N_935), .D(GND), .A(bcu_operand0[3]), .FCI(bcu_result_cry_2) ); defparam bcu_result_cry_3_0.INIT=20'h5BB44; // @46:456 ARI1 bcu_result_cry_4_0 ( .FCO(bcu_result_cry_4), .S(cpu_d_req_addr_net[4]), .Y(bcu_result_cry_4_0_Y), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[2]), .C(N_936), .D(GND), .A(bcu_operand0[4]), .FCI(bcu_result_cry_3) ); defparam bcu_result_cry_4_0.INIT=20'h5BB44; // @46:456 ARI1 bcu_result_cry_5_0 ( .FCO(bcu_result_cry_5), .S(cpu_d_req_addr_net[5]), .Y(bcu_result_cry_5_0_Y), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[2]), .C(N_937), .D(GND), .A(bcu_operand0[5]), .FCI(bcu_result_cry_4) ); defparam bcu_result_cry_5_0.INIT=20'h5BB44; // @46:456 ARI1 bcu_result_cry_6_0 ( .FCO(bcu_result_cry_6), .S(cpu_d_req_addr_net[6]), .Y(bcu_result_cry_6_0_Y), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[2]), .C(N_938), .D(GND), .A(bcu_operand0[6]), .FCI(bcu_result_cry_5) ); defparam bcu_result_cry_6_0.INIT=20'h5BB44; // @46:456 ARI1 bcu_result_cry_7_0 ( .FCO(bcu_result_cry_7), .S(cpu_d_req_addr_net[7]), .Y(bcu_result_cry_7_0_Y), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[2]), .C(N_939), .D(GND), .A(bcu_operand0[7]), .FCI(bcu_result_cry_6) ); defparam bcu_result_cry_7_0.INIT=20'h5BB44; // @46:456 ARI1 bcu_result_cry_8_0 ( .FCO(bcu_result_cry_8), .S(cpu_d_req_addr_net[8]), .Y(bcu_result_cry_8_0_Y), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[2]), .C(N_940), .D(GND), .A(bcu_operand0[8]), .FCI(bcu_result_cry_7) ); defparam bcu_result_cry_8_0.INIT=20'h5BB44; // @46:456 ARI1 bcu_result_cry_9_0 ( .FCO(bcu_result_cry_9), .S(cpu_d_req_addr_net[9]), .Y(bcu_result_cry_9_0_Y), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[2]), .C(N_941), .D(GND), .A(bcu_operand0[9]), .FCI(bcu_result_cry_8) ); defparam bcu_result_cry_9_0.INIT=20'h5BB44; // @46:456 ARI1 bcu_result_cry_10_0 ( .FCO(bcu_result_cry_10), .S(cpu_d_req_addr_net[10]), .Y(bcu_result_cry_10_0_Y), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[2]), .C(N_942), .D(GND), .A(bcu_operand0[10]), .FCI(bcu_result_cry_9) ); defparam bcu_result_cry_10_0.INIT=20'h5BB44; // @46:456 ARI1 bcu_result_cry_11_0 ( .FCO(bcu_result_cry_11), .S(cpu_d_req_addr_net[11]), .Y(bcu_result_cry_11_0_Y), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[2]), .C(N_943), .D(GND), .A(bcu_operand0[11]), .FCI(bcu_result_cry_10) ); defparam bcu_result_cry_11_0.INIT=20'h5BB44; // @46:456 ARI1 bcu_result_cry_12_0 ( .FCO(bcu_result_cry_12), .S(cpu_d_req_addr_net[12]), .Y(bcu_result_cry_12_0_Y), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[2]), .C(N_944), .D(GND), .A(bcu_operand0[12]), .FCI(bcu_result_cry_11) ); defparam bcu_result_cry_12_0.INIT=20'h5BB44; // @46:456 ARI1 bcu_result_cry_13_0 ( .FCO(bcu_result_cry_13), .S(cpu_d_req_addr_net[13]), .Y(bcu_result_cry_13_0_Y), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[2]), .C(N_945), .D(GND), .A(bcu_operand0[13]), .FCI(bcu_result_cry_12) ); defparam bcu_result_cry_13_0.INIT=20'h5BB44; // @46:456 ARI1 bcu_result_cry_14_0 ( .FCO(bcu_result_cry_14), .S(cpu_d_req_addr_net[14]), .Y(bcu_result_cry_14_0_Y), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[2]), .C(N_946), .D(GND), .A(bcu_operand0[14]), .FCI(bcu_result_cry_13) ); defparam bcu_result_cry_14_0.INIT=20'h5BB44; // @46:456 ARI1 bcu_result_cry_15_0 ( .FCO(bcu_result_cry_15), .S(cpu_d_req_addr_net[15]), .Y(bcu_result_cry_15_0_Y), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[2]), .C(N_947), .D(GND), .A(bcu_operand0[15]), .FCI(bcu_result_cry_14) ); defparam bcu_result_cry_15_0.INIT=20'h5BB44; // @46:456 ARI1 bcu_result_cry_16_0 ( .FCO(bcu_result_cry_16), .S(cpu_d_req_addr_net[16]), .Y(bcu_result_cry_16_0_Y), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[2]), .C(N_948), .D(GND), .A(bcu_operand0[16]), .FCI(bcu_result_cry_15) ); defparam bcu_result_cry_16_0.INIT=20'h5BB44; // @46:456 ARI1 bcu_result_cry_17_0 ( .FCO(bcu_result_cry_17), .S(cpu_d_req_addr_net[17]), .Y(bcu_result_cry_17_0_Y), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[2]), .C(N_949), .D(GND), .A(bcu_operand0[17]), .FCI(bcu_result_cry_16) ); defparam bcu_result_cry_17_0.INIT=20'h5BB44; // @46:456 ARI1 bcu_result_cry_18_0 ( .FCO(bcu_result_cry_18), .S(cpu_d_req_addr_net[18]), .Y(bcu_result_cry_18_0_Y), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[2]), .C(N_950), .D(GND), .A(bcu_operand0[18]), .FCI(bcu_result_cry_17) ); defparam bcu_result_cry_18_0.INIT=20'h5BB44; // @46:456 ARI1 bcu_result_cry_19_0 ( .FCO(bcu_result_cry_19), .S(cpu_d_req_addr_net[19]), .Y(bcu_result_cry_19_0_Y), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[2]), .C(N_951), .D(GND), .A(bcu_operand0[19]), .FCI(bcu_result_cry_18) ); defparam bcu_result_cry_19_0.INIT=20'h5BB44; // @46:456 ARI1 bcu_result_cry_20_0 ( .FCO(bcu_result_cry_20), .S(cpu_d_req_addr_net[20]), .Y(bcu_result_cry_20_0_Y), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[2]), .C(N_952), .D(GND), .A(bcu_operand0[20]), .FCI(bcu_result_cry_19) ); defparam bcu_result_cry_20_0.INIT=20'h5BB44; // @46:456 ARI1 bcu_result_cry_21_0 ( .FCO(bcu_result_cry_21), .S(cpu_d_req_addr_net[21]), .Y(bcu_result_cry_21_0_Y), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[2]), .C(N_953), .D(GND), .A(bcu_operand0[21]), .FCI(bcu_result_cry_20) ); defparam bcu_result_cry_21_0.INIT=20'h5BB44; // @46:456 ARI1 bcu_result_cry_22_0 ( .FCO(bcu_result_cry_22), .S(cpu_d_req_addr_net[22]), .Y(bcu_result_cry_22_0_Y), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[2]), .C(N_954), .D(GND), .A(bcu_operand0[22]), .FCI(bcu_result_cry_21) ); defparam bcu_result_cry_22_0.INIT=20'h5BB44; // @46:456 ARI1 bcu_result_cry_23_0 ( .FCO(bcu_result_cry_23), .S(cpu_d_req_addr_net[23]), .Y(bcu_result_cry_23_0_Y), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[2]), .C(N_955), .D(GND), .A(bcu_operand0[23]), .FCI(bcu_result_cry_22) ); defparam bcu_result_cry_23_0.INIT=20'h5BB44; // @46:456 ARI1 bcu_result_cry_24_0 ( .FCO(bcu_result_cry_24), .S(cpu_d_req_addr_net[24]), .Y(bcu_result_cry_24_0_Y), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[2]), .C(N_956), .D(GND), .A(bcu_operand0[24]), .FCI(bcu_result_cry_23) ); defparam bcu_result_cry_24_0.INIT=20'h5BB44; // @46:456 ARI1 bcu_result_cry_25_0 ( .FCO(bcu_result_cry_25), .S(cpu_d_req_addr_net[25]), .Y(bcu_result_cry_25_0_Y), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[2]), .C(N_957), .D(GND), .A(bcu_operand0[25]), .FCI(bcu_result_cry_24) ); defparam bcu_result_cry_25_0.INIT=20'h5BB44; // @46:456 ARI1 bcu_result_cry_26_0 ( .FCO(bcu_result_cry_26), .S(cpu_d_req_addr_net[26]), .Y(bcu_result_cry_26_0_Y), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[2]), .C(N_958), .D(GND), .A(bcu_operand0[26]), .FCI(bcu_result_cry_25) ); defparam bcu_result_cry_26_0.INIT=20'h5BB44; // @46:456 ARI1 bcu_result_cry_27_0 ( .FCO(bcu_result_cry_27), .S(cpu_d_req_addr_net[27]), .Y(bcu_result_cry_27_0_Y), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[2]), .C(N_959), .D(GND), .A(bcu_operand0[27]), .FCI(bcu_result_cry_26) ); defparam bcu_result_cry_27_0.INIT=20'h5BB44; // @46:456 ARI1 bcu_result_cry_28_0 ( .FCO(bcu_result_cry_28), .S(cpu_d_req_addr_net[28]), .Y(bcu_result_cry_28_0_Y), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[2]), .C(N_960), .D(GND), .A(bcu_operand0[28]), .FCI(bcu_result_cry_27) ); defparam bcu_result_cry_28_0.INIT=20'h5BB44; // @46:456 ARI1 bcu_result_cry_29_0 ( .FCO(bcu_result_cry_29), .S(cpu_d_req_addr_net[29]), .Y(bcu_result_cry_29_0_Y), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[2]), .C(N_961), .D(GND), .A(bcu_operand0[29]), .FCI(bcu_result_cry_28) ); defparam bcu_result_cry_29_0.INIT=20'h5BB44; // @46:456 ARI1 bcu_result_s_31 ( .FCO(bcu_result_s_31_FCO), .S(cpu_d_req_addr_net[31]), .Y(bcu_result_s_31_Y), .B(N_42), .C(N_1400), .D(de_ex_pipe_bcu_operand1_mux_sel_ex[2]), .A(bcu_operand0[31]), .FCI(bcu_result_cry_30) ); defparam bcu_result_s_31.INIT=20'h4A35C; // @46:456 ARI1 bcu_result_cry_30_0 ( .FCO(bcu_result_cry_30), .S(cpu_d_req_addr_net[30]), .Y(bcu_result_cry_30_0_Y), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[2]), .C(N_962), .D(GND), .A(bcu_operand0[30]), .FCI(bcu_result_cry_29) ); defparam bcu_result_cry_30_0.INIT=20'h5BB44; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux_0[9] ( .FCO(bcu_operand1_3_1_0_co1[9]), .S(bcu_operand1_3_1_0_wmux_0_S[9]), .Y(N_941), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(csr_priv_mtvec_epc_retr[9]), .D(csr_priv_mtvec_excpt_vec_retr[9]), .A(bcu_operand1_3_1_0_y0[9]), .FCI(bcu_operand1_3_1_0_co0[9]) ); defparam \bcu_operand1_3_1_0_wmux_0[9] .INIT=20'h0F588; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux[9] ( .FCO(bcu_operand1_3_1_0_co0[9]), .S(bcu_operand1_3_1_0_wmux_S[9]), .Y(bcu_operand1_3_1_0_y0[9]), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(de_ex_pipe_immediate_ex[9]), .D(csr_priv_dpc_retr[9]), .A(de_ex_pipe_bcu_operand1_mux_sel_ex[1]), .FCI(VCC) ); defparam \bcu_operand1_3_1_0_wmux[9] .INIT=20'h0FA44; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux_0[6] ( .FCO(bcu_operand1_3_1_0_co1[6]), .S(bcu_operand1_3_1_0_wmux_0_S[6]), .Y(N_938), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(csr_priv_mtvec_epc_retr[6]), .D(csr_priv_mtvec_excpt_vec_retr[6]), .A(bcu_operand1_3_1_0_y0[6]), .FCI(bcu_operand1_3_1_0_co0[6]) ); defparam \bcu_operand1_3_1_0_wmux_0[6] .INIT=20'h0F588; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux[6] ( .FCO(bcu_operand1_3_1_0_co0[6]), .S(bcu_operand1_3_1_0_wmux_S[6]), .Y(bcu_operand1_3_1_0_y0[6]), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(de_ex_pipe_immediate_ex[6]), .D(csr_priv_dpc_retr[6]), .A(de_ex_pipe_bcu_operand1_mux_sel_ex[1]), .FCI(VCC) ); defparam \bcu_operand1_3_1_0_wmux[6] .INIT=20'h0FA44; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux_0[27] ( .FCO(bcu_operand1_3_1_0_co1[27]), .S(bcu_operand1_3_1_0_wmux_0_S[27]), .Y(N_959), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(csr_priv_mtvec_epc_retr[27]), .D(csr_priv_mtvec_excpt_vec_retr[27]), .A(bcu_operand1_3_1_0_y0[27]), .FCI(bcu_operand1_3_1_0_co0[27]) ); defparam \bcu_operand1_3_1_0_wmux_0[27] .INIT=20'h0F588; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux[27] ( .FCO(bcu_operand1_3_1_0_co0[27]), .S(bcu_operand1_3_1_0_wmux_S[27]), .Y(bcu_operand1_3_1_0_y0[27]), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(de_ex_pipe_immediate_ex[27]), .D(csr_priv_dpc_retr[27]), .A(de_ex_pipe_bcu_operand1_mux_sel_ex[1]), .FCI(VCC) ); defparam \bcu_operand1_3_1_0_wmux[27] .INIT=20'h0FA44; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux_0[29] ( .FCO(bcu_operand1_3_1_0_co1[29]), .S(bcu_operand1_3_1_0_wmux_0_S[29]), .Y(N_961), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(csr_priv_mtvec_epc_retr[29]), .D(csr_priv_mtvec_excpt_vec_retr[29]), .A(bcu_operand1_3_1_0_y0[29]), .FCI(bcu_operand1_3_1_0_co0[29]) ); defparam \bcu_operand1_3_1_0_wmux_0[29] .INIT=20'h0F588; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux[29] ( .FCO(bcu_operand1_3_1_0_co0[29]), .S(bcu_operand1_3_1_0_wmux_S[29]), .Y(bcu_operand1_3_1_0_y0[29]), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(de_ex_pipe_immediate_ex[29]), .D(csr_priv_dpc_retr[29]), .A(de_ex_pipe_bcu_operand1_mux_sel_ex[1]), .FCI(VCC) ); defparam \bcu_operand1_3_1_0_wmux[29] .INIT=20'h0FA44; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux_0[10] ( .FCO(bcu_operand1_3_1_0_co1[10]), .S(bcu_operand1_3_1_0_wmux_0_S[10]), .Y(N_942), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(csr_priv_mtvec_epc_retr[10]), .D(csr_priv_mtvec_excpt_vec_retr[10]), .A(bcu_operand1_3_1_0_y0[10]), .FCI(bcu_operand1_3_1_0_co0[10]) ); defparam \bcu_operand1_3_1_0_wmux_0[10] .INIT=20'h0F588; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux[10] ( .FCO(bcu_operand1_3_1_0_co0[10]), .S(bcu_operand1_3_1_0_wmux_S[10]), .Y(bcu_operand1_3_1_0_y0[10]), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(de_ex_pipe_immediate_ex[10]), .D(csr_priv_dpc_retr[10]), .A(de_ex_pipe_bcu_operand1_mux_sel_ex[1]), .FCI(VCC) ); defparam \bcu_operand1_3_1_0_wmux[10] .INIT=20'h0FA44; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux_0[7] ( .FCO(bcu_operand1_3_1_0_co1[7]), .S(bcu_operand1_3_1_0_wmux_0_S[7]), .Y(N_939), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(csr_priv_mtvec_epc_retr[7]), .D(csr_priv_mtvec_excpt_vec_retr[7]), .A(bcu_operand1_3_1_0_y0[7]), .FCI(bcu_operand1_3_1_0_co0[7]) ); defparam \bcu_operand1_3_1_0_wmux_0[7] .INIT=20'h0F588; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux[7] ( .FCO(bcu_operand1_3_1_0_co0[7]), .S(bcu_operand1_3_1_0_wmux_S[7]), .Y(bcu_operand1_3_1_0_y0[7]), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(de_ex_pipe_immediate_ex[7]), .D(csr_priv_dpc_retr[7]), .A(de_ex_pipe_bcu_operand1_mux_sel_ex[1]), .FCI(VCC) ); defparam \bcu_operand1_3_1_0_wmux[7] .INIT=20'h0FA44; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux_0[30] ( .FCO(bcu_operand1_3_1_0_co1[30]), .S(bcu_operand1_3_1_0_wmux_0_S[30]), .Y(N_962), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(csr_priv_mtvec_epc_retr[30]), .D(csr_priv_mtvec_excpt_vec_retr[30]), .A(bcu_operand1_3_1_0_y0[30]), .FCI(bcu_operand1_3_1_0_co0[30]) ); defparam \bcu_operand1_3_1_0_wmux_0[30] .INIT=20'h0F588; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux[30] ( .FCO(bcu_operand1_3_1_0_co0[30]), .S(bcu_operand1_3_1_0_wmux_S[30]), .Y(bcu_operand1_3_1_0_y0[30]), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(de_ex_pipe_immediate_ex[30]), .D(csr_priv_dpc_retr[30]), .A(de_ex_pipe_bcu_operand1_mux_sel_ex[1]), .FCI(VCC) ); defparam \bcu_operand1_3_1_0_wmux[30] .INIT=20'h0FA44; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux_0[24] ( .FCO(bcu_operand1_3_1_0_co1[24]), .S(bcu_operand1_3_1_0_wmux_0_S[24]), .Y(N_956), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(csr_priv_mtvec_epc_retr[24]), .D(csr_priv_mtvec_excpt_vec_retr[24]), .A(bcu_operand1_3_1_0_y0[24]), .FCI(bcu_operand1_3_1_0_co0[24]) ); defparam \bcu_operand1_3_1_0_wmux_0[24] .INIT=20'h0F588; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux[24] ( .FCO(bcu_operand1_3_1_0_co0[24]), .S(bcu_operand1_3_1_0_wmux_S[24]), .Y(bcu_operand1_3_1_0_y0[24]), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(de_ex_pipe_immediate_ex[24]), .D(csr_priv_dpc_retr[24]), .A(de_ex_pipe_bcu_operand1_mux_sel_ex[1]), .FCI(VCC) ); defparam \bcu_operand1_3_1_0_wmux[24] .INIT=20'h0FA44; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux_0[28] ( .FCO(bcu_operand1_3_1_0_co1[28]), .S(bcu_operand1_3_1_0_wmux_0_S[28]), .Y(N_960), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(csr_priv_mtvec_epc_retr[28]), .D(csr_priv_mtvec_excpt_vec_retr[28]), .A(bcu_operand1_3_1_0_y0[28]), .FCI(bcu_operand1_3_1_0_co0[28]) ); defparam \bcu_operand1_3_1_0_wmux_0[28] .INIT=20'h0F588; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux[28] ( .FCO(bcu_operand1_3_1_0_co0[28]), .S(bcu_operand1_3_1_0_wmux_S[28]), .Y(bcu_operand1_3_1_0_y0[28]), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(de_ex_pipe_immediate_ex[28]), .D(csr_priv_dpc_retr[28]), .A(de_ex_pipe_bcu_operand1_mux_sel_ex[1]), .FCI(VCC) ); defparam \bcu_operand1_3_1_0_wmux[28] .INIT=20'h0FA44; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux_0[20] ( .FCO(bcu_operand1_3_1_0_co1[20]), .S(bcu_operand1_3_1_0_wmux_0_S[20]), .Y(N_952), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(csr_priv_mtvec_epc_retr[20]), .D(csr_priv_mtvec_excpt_vec_retr[20]), .A(bcu_operand1_3_1_0_y0[20]), .FCI(bcu_operand1_3_1_0_co0[20]) ); defparam \bcu_operand1_3_1_0_wmux_0[20] .INIT=20'h0F588; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux[20] ( .FCO(bcu_operand1_3_1_0_co0[20]), .S(bcu_operand1_3_1_0_wmux_S[20]), .Y(bcu_operand1_3_1_0_y0[20]), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(de_ex_pipe_immediate_ex[20]), .D(csr_priv_dpc_retr[20]), .A(de_ex_pipe_bcu_operand1_mux_sel_ex[1]), .FCI(VCC) ); defparam \bcu_operand1_3_1_0_wmux[20] .INIT=20'h0FA44; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux_0[26] ( .FCO(bcu_operand1_3_1_0_co1[26]), .S(bcu_operand1_3_1_0_wmux_0_S[26]), .Y(N_958), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(csr_priv_mtvec_epc_retr[26]), .D(csr_priv_mtvec_excpt_vec_retr[26]), .A(bcu_operand1_3_1_0_y0[26]), .FCI(bcu_operand1_3_1_0_co0[26]) ); defparam \bcu_operand1_3_1_0_wmux_0[26] .INIT=20'h0F588; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux[26] ( .FCO(bcu_operand1_3_1_0_co0[26]), .S(bcu_operand1_3_1_0_wmux_S[26]), .Y(bcu_operand1_3_1_0_y0[26]), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(de_ex_pipe_immediate_ex[26]), .D(csr_priv_dpc_retr[26]), .A(de_ex_pipe_bcu_operand1_mux_sel_ex[1]), .FCI(VCC) ); defparam \bcu_operand1_3_1_0_wmux[26] .INIT=20'h0FA44; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux_0[21] ( .FCO(bcu_operand1_3_1_0_co1[21]), .S(bcu_operand1_3_1_0_wmux_0_S[21]), .Y(N_953), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(csr_priv_mtvec_epc_retr[21]), .D(csr_priv_mtvec_excpt_vec_retr[21]), .A(bcu_operand1_3_1_0_y0[21]), .FCI(bcu_operand1_3_1_0_co0[21]) ); defparam \bcu_operand1_3_1_0_wmux_0[21] .INIT=20'h0F588; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux[21] ( .FCO(bcu_operand1_3_1_0_co0[21]), .S(bcu_operand1_3_1_0_wmux_S[21]), .Y(bcu_operand1_3_1_0_y0[21]), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(de_ex_pipe_immediate_ex[21]), .D(csr_priv_dpc_retr[21]), .A(de_ex_pipe_bcu_operand1_mux_sel_ex[1]), .FCI(VCC) ); defparam \bcu_operand1_3_1_0_wmux[21] .INIT=20'h0FA44; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux_0[14] ( .FCO(bcu_operand1_3_1_0_co1[14]), .S(bcu_operand1_3_1_0_wmux_0_S[14]), .Y(N_946), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(csr_priv_mtvec_epc_retr[14]), .D(csr_priv_mtvec_excpt_vec_retr[14]), .A(bcu_operand1_3_1_0_y0[14]), .FCI(bcu_operand1_3_1_0_co0[14]) ); defparam \bcu_operand1_3_1_0_wmux_0[14] .INIT=20'h0F588; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux[14] ( .FCO(bcu_operand1_3_1_0_co0[14]), .S(bcu_operand1_3_1_0_wmux_S[14]), .Y(bcu_operand1_3_1_0_y0[14]), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(de_ex_pipe_immediate_ex[14]), .D(csr_priv_dpc_retr[14]), .A(de_ex_pipe_bcu_operand1_mux_sel_ex[1]), .FCI(VCC) ); defparam \bcu_operand1_3_1_0_wmux[14] .INIT=20'h0FA44; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux_0[23] ( .FCO(bcu_operand1_3_1_0_co1[23]), .S(bcu_operand1_3_1_0_wmux_0_S[23]), .Y(N_955), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(csr_priv_mtvec_epc_retr[23]), .D(csr_priv_mtvec_excpt_vec_retr[23]), .A(bcu_operand1_3_1_0_y0[23]), .FCI(bcu_operand1_3_1_0_co0[23]) ); defparam \bcu_operand1_3_1_0_wmux_0[23] .INIT=20'h0F588; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux[23] ( .FCO(bcu_operand1_3_1_0_co0[23]), .S(bcu_operand1_3_1_0_wmux_S[23]), .Y(bcu_operand1_3_1_0_y0[23]), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(de_ex_pipe_immediate_ex[23]), .D(csr_priv_dpc_retr[23]), .A(de_ex_pipe_bcu_operand1_mux_sel_ex[1]), .FCI(VCC) ); defparam \bcu_operand1_3_1_0_wmux[23] .INIT=20'h0FA44; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux_0[13] ( .FCO(bcu_operand1_3_1_0_co1[13]), .S(bcu_operand1_3_1_0_wmux_0_S[13]), .Y(N_945), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(csr_priv_mtvec_epc_retr[13]), .D(csr_priv_mtvec_excpt_vec_retr[13]), .A(bcu_operand1_3_1_0_y0[13]), .FCI(bcu_operand1_3_1_0_co0[13]) ); defparam \bcu_operand1_3_1_0_wmux_0[13] .INIT=20'h0F588; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux[13] ( .FCO(bcu_operand1_3_1_0_co0[13]), .S(bcu_operand1_3_1_0_wmux_S[13]), .Y(bcu_operand1_3_1_0_y0[13]), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(de_ex_pipe_immediate_ex[13]), .D(csr_priv_dpc_retr[13]), .A(de_ex_pipe_bcu_operand1_mux_sel_ex[1]), .FCI(VCC) ); defparam \bcu_operand1_3_1_0_wmux[13] .INIT=20'h0FA44; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux_0[12] ( .FCO(bcu_operand1_3_1_0_co1[12]), .S(bcu_operand1_3_1_0_wmux_0_S[12]), .Y(N_944), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(csr_priv_mtvec_epc_retr[12]), .D(csr_priv_mtvec_excpt_vec_retr[12]), .A(bcu_operand1_3_1_0_y0[12]), .FCI(bcu_operand1_3_1_0_co0[12]) ); defparam \bcu_operand1_3_1_0_wmux_0[12] .INIT=20'h0F588; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux[12] ( .FCO(bcu_operand1_3_1_0_co0[12]), .S(bcu_operand1_3_1_0_wmux_S[12]), .Y(bcu_operand1_3_1_0_y0[12]), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(de_ex_pipe_immediate_ex[12]), .D(csr_priv_dpc_retr[12]), .A(de_ex_pipe_bcu_operand1_mux_sel_ex[1]), .FCI(VCC) ); defparam \bcu_operand1_3_1_0_wmux[12] .INIT=20'h0FA44; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux_0[8] ( .FCO(bcu_operand1_3_1_0_co1[8]), .S(bcu_operand1_3_1_0_wmux_0_S[8]), .Y(N_940), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(csr_priv_mtvec_epc_retr[8]), .D(csr_priv_mtvec_excpt_vec_retr[8]), .A(bcu_operand1_3_1_0_y0[8]), .FCI(bcu_operand1_3_1_0_co0[8]) ); defparam \bcu_operand1_3_1_0_wmux_0[8] .INIT=20'h0F588; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux[8] ( .FCO(bcu_operand1_3_1_0_co0[8]), .S(bcu_operand1_3_1_0_wmux_S[8]), .Y(bcu_operand1_3_1_0_y0[8]), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(de_ex_pipe_immediate_ex[8]), .D(csr_priv_dpc_retr[8]), .A(de_ex_pipe_bcu_operand1_mux_sel_ex[1]), .FCI(VCC) ); defparam \bcu_operand1_3_1_0_wmux[8] .INIT=20'h0FA44; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux_0[5] ( .FCO(bcu_operand1_3_1_0_co1[5]), .S(bcu_operand1_3_1_0_wmux_0_S[5]), .Y(N_937), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(csr_priv_mtvec_epc_retr[5]), .D(csr_priv_mtvec_excpt_vec_retr[5]), .A(bcu_operand1_3_1_0_y0[5]), .FCI(bcu_operand1_3_1_0_co0[5]) ); defparam \bcu_operand1_3_1_0_wmux_0[5] .INIT=20'h0F588; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux[5] ( .FCO(bcu_operand1_3_1_0_co0[5]), .S(bcu_operand1_3_1_0_wmux_S[5]), .Y(bcu_operand1_3_1_0_y0[5]), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(de_ex_pipe_immediate_ex[5]), .D(csr_priv_dpc_retr[5]), .A(de_ex_pipe_bcu_operand1_mux_sel_ex[1]), .FCI(VCC) ); defparam \bcu_operand1_3_1_0_wmux[5] .INIT=20'h0FA44; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux_0[25] ( .FCO(bcu_operand1_3_1_0_co1[25]), .S(bcu_operand1_3_1_0_wmux_0_S[25]), .Y(N_957), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(csr_priv_mtvec_epc_retr[25]), .D(csr_priv_mtvec_excpt_vec_retr[25]), .A(bcu_operand1_3_1_0_y0[25]), .FCI(bcu_operand1_3_1_0_co0[25]) ); defparam \bcu_operand1_3_1_0_wmux_0[25] .INIT=20'h0F588; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux[25] ( .FCO(bcu_operand1_3_1_0_co0[25]), .S(bcu_operand1_3_1_0_wmux_S[25]), .Y(bcu_operand1_3_1_0_y0[25]), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(de_ex_pipe_immediate_ex[25]), .D(csr_priv_dpc_retr[25]), .A(de_ex_pipe_bcu_operand1_mux_sel_ex[1]), .FCI(VCC) ); defparam \bcu_operand1_3_1_0_wmux[25] .INIT=20'h0FA44; // @46:419 ARI1 \bcu_operand1_3_i_m4_1_0_wmux_0[2] ( .FCO(bcu_operand1_3_i_m4_1_0_co1[2]), .S(bcu_operand1_3_i_m4_1_0_wmux_0_S[2]), .Y(N_1401), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(csr_priv_mtvec_epc_retr[2]), .D(csr_priv_mtvec_excpt_vec_retr[2]), .A(bcu_operand1_3_i_m4_1_0_y0[2]), .FCI(bcu_operand1_3_i_m4_1_0_co0[2]) ); defparam \bcu_operand1_3_i_m4_1_0_wmux_0[2] .INIT=20'h0F588; // @46:419 ARI1 \bcu_operand1_3_i_m4_1_0_wmux[2] ( .FCO(bcu_operand1_3_i_m4_1_0_co0[2]), .S(bcu_operand1_3_i_m4_1_0_wmux_S[2]), .Y(bcu_operand1_3_i_m4_1_0_y0[2]), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(de_ex_pipe_immediate_ex[2]), .D(csr_priv_dpc_retr[2]), .A(de_ex_pipe_bcu_operand1_mux_sel_ex[1]), .FCI(VCC) ); defparam \bcu_operand1_3_i_m4_1_0_wmux[2] .INIT=20'h0FA44; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux_0[15] ( .FCO(bcu_operand1_3_1_0_co1[15]), .S(bcu_operand1_3_1_0_wmux_0_S[15]), .Y(N_947), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(csr_priv_mtvec_epc_retr[15]), .D(csr_priv_mtvec_excpt_vec_retr[15]), .A(bcu_operand1_3_1_0_y0[15]), .FCI(bcu_operand1_3_1_0_co0[15]) ); defparam \bcu_operand1_3_1_0_wmux_0[15] .INIT=20'h0F588; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux[15] ( .FCO(bcu_operand1_3_1_0_co0[15]), .S(bcu_operand1_3_1_0_wmux_S[15]), .Y(bcu_operand1_3_1_0_y0[15]), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(de_ex_pipe_immediate_ex[15]), .D(csr_priv_dpc_retr[15]), .A(de_ex_pipe_bcu_operand1_mux_sel_ex[1]), .FCI(VCC) ); defparam \bcu_operand1_3_1_0_wmux[15] .INIT=20'h0FA44; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux_0[3] ( .FCO(bcu_operand1_3_1_0_co1[3]), .S(bcu_operand1_3_1_0_wmux_0_S[3]), .Y(N_935), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(csr_priv_mtvec_epc_retr[3]), .D(csr_priv_mtvec_excpt_vec_retr[3]), .A(bcu_operand1_3_1_0_y0[3]), .FCI(bcu_operand1_3_1_0_co0[3]) ); defparam \bcu_operand1_3_1_0_wmux_0[3] .INIT=20'h0F588; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux[3] ( .FCO(bcu_operand1_3_1_0_co0[3]), .S(bcu_operand1_3_1_0_wmux_S[3]), .Y(bcu_operand1_3_1_0_y0[3]), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(de_ex_pipe_immediate_ex[3]), .D(csr_priv_dpc_retr[3]), .A(de_ex_pipe_bcu_operand1_mux_sel_ex[1]), .FCI(VCC) ); defparam \bcu_operand1_3_1_0_wmux[3] .INIT=20'h0FA44; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux_0[18] ( .FCO(bcu_operand1_3_1_0_co1[18]), .S(bcu_operand1_3_1_0_wmux_0_S[18]), .Y(N_950), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(csr_priv_mtvec_epc_retr[18]), .D(csr_priv_mtvec_excpt_vec_retr[18]), .A(bcu_operand1_3_1_0_y0[18]), .FCI(bcu_operand1_3_1_0_co0[18]) ); defparam \bcu_operand1_3_1_0_wmux_0[18] .INIT=20'h0F588; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux[18] ( .FCO(bcu_operand1_3_1_0_co0[18]), .S(bcu_operand1_3_1_0_wmux_S[18]), .Y(bcu_operand1_3_1_0_y0[18]), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(de_ex_pipe_immediate_ex[18]), .D(csr_priv_dpc_retr[18]), .A(de_ex_pipe_bcu_operand1_mux_sel_ex[1]), .FCI(VCC) ); defparam \bcu_operand1_3_1_0_wmux[18] .INIT=20'h0FA44; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux_0[11] ( .FCO(bcu_operand1_3_1_0_co1[11]), .S(bcu_operand1_3_1_0_wmux_0_S[11]), .Y(N_943), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(csr_priv_mtvec_epc_retr[11]), .D(csr_priv_mtvec_excpt_vec_retr[11]), .A(bcu_operand1_3_1_0_y0[11]), .FCI(bcu_operand1_3_1_0_co0[11]) ); defparam \bcu_operand1_3_1_0_wmux_0[11] .INIT=20'h0F588; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux[11] ( .FCO(bcu_operand1_3_1_0_co0[11]), .S(bcu_operand1_3_1_0_wmux_S[11]), .Y(bcu_operand1_3_1_0_y0[11]), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(de_ex_pipe_immediate_ex[11]), .D(csr_priv_dpc_retr[11]), .A(de_ex_pipe_bcu_operand1_mux_sel_ex[1]), .FCI(VCC) ); defparam \bcu_operand1_3_1_0_wmux[11] .INIT=20'h0FA44; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux_0[4] ( .FCO(bcu_operand1_3_1_0_co1[4]), .S(bcu_operand1_3_1_0_wmux_0_S[4]), .Y(N_936), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(csr_priv_mtvec_epc_retr[4]), .D(csr_priv_mtvec_excpt_vec_retr[4]), .A(bcu_operand1_3_1_0_y0[4]), .FCI(bcu_operand1_3_1_0_co0[4]) ); defparam \bcu_operand1_3_1_0_wmux_0[4] .INIT=20'h0F588; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux[4] ( .FCO(bcu_operand1_3_1_0_co0[4]), .S(bcu_operand1_3_1_0_wmux_S[4]), .Y(bcu_operand1_3_1_0_y0[4]), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(de_ex_pipe_immediate_ex[4]), .D(csr_priv_dpc_retr[4]), .A(de_ex_pipe_bcu_operand1_mux_sel_ex[1]), .FCI(VCC) ); defparam \bcu_operand1_3_1_0_wmux[4] .INIT=20'h0FA44; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux_0[16] ( .FCO(bcu_operand1_3_1_0_co1[16]), .S(bcu_operand1_3_1_0_wmux_0_S[16]), .Y(N_948), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(csr_priv_mtvec_epc_retr[16]), .D(csr_priv_mtvec_excpt_vec_retr[16]), .A(bcu_operand1_3_1_0_y0[16]), .FCI(bcu_operand1_3_1_0_co0[16]) ); defparam \bcu_operand1_3_1_0_wmux_0[16] .INIT=20'h0F588; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux[16] ( .FCO(bcu_operand1_3_1_0_co0[16]), .S(bcu_operand1_3_1_0_wmux_S[16]), .Y(bcu_operand1_3_1_0_y0[16]), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(de_ex_pipe_immediate_ex[16]), .D(csr_priv_dpc_retr[16]), .A(de_ex_pipe_bcu_operand1_mux_sel_ex[1]), .FCI(VCC) ); defparam \bcu_operand1_3_1_0_wmux[16] .INIT=20'h0FA44; // @46:419 ARI1 \bcu_operand1_3_i_m4_1_0_wmux_0[31] ( .FCO(bcu_operand1_3_i_m4_1_0_co1[31]), .S(bcu_operand1_3_i_m4_1_0_wmux_0_S[31]), .Y(N_1400), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(csr_priv_mtvec_epc_retr[31]), .D(csr_priv_mtvec_excpt_vec_retr[31]), .A(bcu_operand1_3_i_m4_1_0_y0[31]), .FCI(bcu_operand1_3_i_m4_1_0_co0[31]) ); defparam \bcu_operand1_3_i_m4_1_0_wmux_0[31] .INIT=20'h0F588; // @46:419 ARI1 \bcu_operand1_3_i_m4_1_0_wmux[31] ( .FCO(bcu_operand1_3_i_m4_1_0_co0[31]), .S(bcu_operand1_3_i_m4_1_0_wmux_S[31]), .Y(bcu_operand1_3_i_m4_1_0_y0[31]), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(de_ex_pipe_immediate_ex[31]), .D(csr_priv_dpc_retr[31]), .A(de_ex_pipe_bcu_operand1_mux_sel_ex[1]), .FCI(VCC) ); defparam \bcu_operand1_3_i_m4_1_0_wmux[31] .INIT=20'h0FA44; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux_0[22] ( .FCO(bcu_operand1_3_1_0_co1[22]), .S(bcu_operand1_3_1_0_wmux_0_S[22]), .Y(N_954), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(csr_priv_mtvec_epc_retr[22]), .D(csr_priv_mtvec_excpt_vec_retr[22]), .A(bcu_operand1_3_1_0_y0[22]), .FCI(bcu_operand1_3_1_0_co0[22]) ); defparam \bcu_operand1_3_1_0_wmux_0[22] .INIT=20'h0F588; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux[22] ( .FCO(bcu_operand1_3_1_0_co0[22]), .S(bcu_operand1_3_1_0_wmux_S[22]), .Y(bcu_operand1_3_1_0_y0[22]), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(de_ex_pipe_immediate_ex[22]), .D(csr_priv_dpc_retr[22]), .A(de_ex_pipe_bcu_operand1_mux_sel_ex[1]), .FCI(VCC) ); defparam \bcu_operand1_3_1_0_wmux[22] .INIT=20'h0FA44; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux_0[17] ( .FCO(bcu_operand1_3_1_0_co1[17]), .S(bcu_operand1_3_1_0_wmux_0_S[17]), .Y(N_949), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(csr_priv_mtvec_epc_retr[17]), .D(csr_priv_mtvec_excpt_vec_retr[17]), .A(bcu_operand1_3_1_0_y0[17]), .FCI(bcu_operand1_3_1_0_co0[17]) ); defparam \bcu_operand1_3_1_0_wmux_0[17] .INIT=20'h0F588; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux[17] ( .FCO(bcu_operand1_3_1_0_co0[17]), .S(bcu_operand1_3_1_0_wmux_S[17]), .Y(bcu_operand1_3_1_0_y0[17]), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(de_ex_pipe_immediate_ex[17]), .D(csr_priv_dpc_retr[17]), .A(de_ex_pipe_bcu_operand1_mux_sel_ex[1]), .FCI(VCC) ); defparam \bcu_operand1_3_1_0_wmux[17] .INIT=20'h0FA44; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux_0[19] ( .FCO(bcu_operand1_3_1_0_co1[19]), .S(bcu_operand1_3_1_0_wmux_0_S[19]), .Y(N_951), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(csr_priv_mtvec_epc_retr[19]), .D(csr_priv_mtvec_excpt_vec_retr[19]), .A(bcu_operand1_3_1_0_y0[19]), .FCI(bcu_operand1_3_1_0_co0[19]) ); defparam \bcu_operand1_3_1_0_wmux_0[19] .INIT=20'h0F588; // @46:419 ARI1 \bcu_operand1_3_1_0_wmux[19] ( .FCO(bcu_operand1_3_1_0_co0[19]), .S(bcu_operand1_3_1_0_wmux_S[19]), .Y(bcu_operand1_3_1_0_y0[19]), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(de_ex_pipe_immediate_ex[19]), .D(csr_priv_dpc_retr[19]), .A(de_ex_pipe_bcu_operand1_mux_sel_ex[1]), .FCI(VCC) ); defparam \bcu_operand1_3_1_0_wmux[19] .INIT=20'h0FA44; // @46:419 CFG2 \bcu_operand1_6_0_a2_0[0] ( .A(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[2]), .Y(bcu_operand1_6_0_a2_0_Z[0]) ); defparam \bcu_operand1_6_0_a2_0[0] .INIT=4'h1; // @46:419 CFG2 bcu_operand1_valid_6_i_a2_0_2_0 ( .A(ex_retr_pipe_sw_csr_addr_retr[1]), .B(ex_retr_pipe_sw_csr_addr_retr[0]), .Y(bcu_operand1_valid_6_i_a2_0_2_1z) ); defparam bcu_operand1_valid_6_i_a2_0_2_0.INIT=4'h4; // @46:419 CFG2 bcu_operand1_valid_6_i_a2_0_2 ( .A(ex_retr_pipe_sw_csr_addr_retr[9]), .B(ex_retr_pipe_sw_csr_addr_retr[8]), .Y(N_1410_2) ); defparam bcu_operand1_valid_6_i_a2_0_2.INIT=4'h8; // @46:419 CFG2 bcu_operand1_valid_6_i_o4_0 ( .A(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[1]), .Y(N_42) ); defparam bcu_operand1_valid_6_i_o4_0.INIT=4'hE; // @46:419 CFG2 bcu_operand1_valid_6_i_a2_0_4 ( .A(ex_retr_pipe_sw_csr_addr_retr[4]), .B(ex_retr_pipe_sw_csr_addr_retr[5]), .Y(N_1410_4) ); defparam bcu_operand1_valid_6_i_a2_0_4.INIT=4'h1; // @46:456 CFG3 bcu_result_s_31_RNO ( .A(gpr_rs1_rd_data_sig[31]), .B(de_ex_pipe_curr_pc_ex[31]), .C(de_ex_pipe_bcu_operand0_mux_sel_ex_0), .Y(bcu_operand0[31]) ); defparam bcu_result_s_31_RNO.INIT=8'hAC; // @46:456 CFG3 bcu_result_cry_30_0_RNO ( .A(gpr_rs1_rd_data_sig[30]), .B(de_ex_pipe_curr_pc_ex[30]), .C(de_ex_pipe_bcu_operand0_mux_sel_ex_0), .Y(bcu_operand0[30]) ); defparam bcu_result_cry_30_0_RNO.INIT=8'hAC; // @46:456 CFG3 bcu_result_cry_29_0_RNO ( .A(gpr_rs1_rd_data_sig[29]), .B(de_ex_pipe_curr_pc_ex[29]), .C(de_ex_pipe_bcu_operand0_mux_sel_ex_0), .Y(bcu_operand0[29]) ); defparam bcu_result_cry_29_0_RNO.INIT=8'hAC; // @46:456 CFG3 bcu_result_cry_28_0_RNO ( .A(gpr_rs1_rd_data_sig[28]), .B(de_ex_pipe_curr_pc_ex[28]), .C(de_ex_pipe_bcu_operand0_mux_sel_ex_0), .Y(bcu_operand0[28]) ); defparam bcu_result_cry_28_0_RNO.INIT=8'hAC; // @46:456 CFG3 bcu_result_cry_27_0_RNO ( .A(gpr_rs1_rd_data_sig[27]), .B(de_ex_pipe_curr_pc_ex[27]), .C(de_ex_pipe_bcu_operand0_mux_sel_ex_0), .Y(bcu_operand0[27]) ); defparam bcu_result_cry_27_0_RNO.INIT=8'hAC; // @46:456 CFG3 bcu_result_cry_26_0_RNO ( .A(gpr_rs1_rd_data_sig[26]), .B(de_ex_pipe_curr_pc_ex[26]), .C(de_ex_pipe_bcu_operand0_mux_sel_ex_0), .Y(bcu_operand0[26]) ); defparam bcu_result_cry_26_0_RNO.INIT=8'hAC; // @46:456 CFG3 bcu_result_cry_25_0_RNO ( .A(gpr_rs1_rd_data_sig[25]), .B(de_ex_pipe_curr_pc_ex[25]), .C(de_ex_pipe_bcu_operand0_mux_sel_ex_0), .Y(bcu_operand0[25]) ); defparam bcu_result_cry_25_0_RNO.INIT=8'hAC; // @46:456 CFG3 bcu_result_cry_24_0_RNO ( .A(gpr_rs1_rd_data_sig[24]), .B(de_ex_pipe_curr_pc_ex[24]), .C(de_ex_pipe_bcu_operand0_mux_sel_ex_0), .Y(bcu_operand0[24]) ); defparam bcu_result_cry_24_0_RNO.INIT=8'hAC; // @46:456 CFG3 bcu_result_cry_23_0_RNO ( .A(gpr_rs1_rd_data_sig[23]), .B(de_ex_pipe_curr_pc_ex[23]), .C(de_ex_pipe_bcu_operand0_mux_sel_ex_0), .Y(bcu_operand0[23]) ); defparam bcu_result_cry_23_0_RNO.INIT=8'hAC; // @46:456 CFG3 bcu_result_cry_22_0_RNO ( .A(gpr_rs1_rd_data_sig[22]), .B(de_ex_pipe_curr_pc_ex[22]), .C(de_ex_pipe_bcu_operand0_mux_sel_ex_0), .Y(bcu_operand0[22]) ); defparam bcu_result_cry_22_0_RNO.INIT=8'hAC; // @46:456 CFG3 bcu_result_cry_21_0_RNO ( .A(gpr_rs1_rd_data_sig[21]), .B(de_ex_pipe_curr_pc_ex[21]), .C(de_ex_pipe_bcu_operand0_mux_sel_ex_0), .Y(bcu_operand0[21]) ); defparam bcu_result_cry_21_0_RNO.INIT=8'hAC; // @46:456 CFG3 bcu_result_cry_20_0_RNO ( .A(gpr_rs1_rd_data_sig[20]), .B(de_ex_pipe_curr_pc_ex[20]), .C(de_ex_pipe_bcu_operand0_mux_sel_ex_0), .Y(bcu_operand0[20]) ); defparam bcu_result_cry_20_0_RNO.INIT=8'hAC; // @46:456 CFG3 bcu_result_cry_19_0_RNO ( .A(gpr_rs1_rd_data_sig[19]), .B(de_ex_pipe_curr_pc_ex[19]), .C(de_ex_pipe_bcu_operand0_mux_sel_ex_0), .Y(bcu_operand0[19]) ); defparam bcu_result_cry_19_0_RNO.INIT=8'hAC; // @46:456 CFG3 bcu_result_cry_18_0_RNO ( .A(gpr_rs1_rd_data_sig[18]), .B(de_ex_pipe_curr_pc_ex[18]), .C(de_ex_pipe_bcu_operand0_mux_sel_ex_0), .Y(bcu_operand0[18]) ); defparam bcu_result_cry_18_0_RNO.INIT=8'hAC; // @46:456 CFG3 bcu_result_cry_17_0_RNO ( .A(gpr_rs1_rd_data_sig[17]), .B(de_ex_pipe_curr_pc_ex[17]), .C(de_ex_pipe_bcu_operand0_mux_sel_ex_0), .Y(bcu_operand0[17]) ); defparam bcu_result_cry_17_0_RNO.INIT=8'hAC; // @46:456 CFG3 bcu_result_cry_16_0_RNO ( .A(gpr_rs1_rd_data_sig[16]), .B(de_ex_pipe_curr_pc_ex[16]), .C(de_ex_pipe_bcu_operand0_mux_sel_ex_0), .Y(bcu_operand0[16]) ); defparam bcu_result_cry_16_0_RNO.INIT=8'hAC; // @46:456 CFG3 bcu_result_cry_15_0_RNO ( .A(gpr_rs1_rd_data_sig[15]), .B(de_ex_pipe_curr_pc_ex[15]), .C(de_ex_pipe_bcu_operand0_mux_sel_ex_0), .Y(bcu_operand0[15]) ); defparam bcu_result_cry_15_0_RNO.INIT=8'hAC; // @46:456 CFG3 bcu_result_cry_14_0_RNO ( .A(gpr_rs1_rd_data_sig[14]), .B(de_ex_pipe_curr_pc_ex[14]), .C(de_ex_pipe_bcu_operand0_mux_sel_ex_0), .Y(bcu_operand0[14]) ); defparam bcu_result_cry_14_0_RNO.INIT=8'hAC; // @46:456 CFG3 bcu_result_cry_13_0_RNO ( .A(gpr_rs1_rd_data_sig[13]), .B(de_ex_pipe_curr_pc_ex[13]), .C(de_ex_pipe_bcu_operand0_mux_sel_ex_0), .Y(bcu_operand0[13]) ); defparam bcu_result_cry_13_0_RNO.INIT=8'hAC; // @46:456 CFG3 bcu_result_cry_12_0_RNO ( .A(gpr_rs1_rd_data_sig[12]), .B(de_ex_pipe_curr_pc_ex[12]), .C(de_ex_pipe_bcu_operand0_mux_sel_ex_0), .Y(bcu_operand0[12]) ); defparam bcu_result_cry_12_0_RNO.INIT=8'hAC; // @46:456 CFG3 bcu_result_cry_11_0_RNO ( .A(gpr_rs1_rd_data_sig[11]), .B(de_ex_pipe_curr_pc_ex[11]), .C(de_ex_pipe_bcu_operand0_mux_sel_ex_0), .Y(bcu_operand0[11]) ); defparam bcu_result_cry_11_0_RNO.INIT=8'hAC; // @46:456 CFG3 bcu_result_cry_10_0_RNO ( .A(gpr_rs1_rd_data_sig[10]), .B(de_ex_pipe_curr_pc_ex[10]), .C(de_ex_pipe_bcu_operand0_mux_sel_ex_0), .Y(bcu_operand0[10]) ); defparam bcu_result_cry_10_0_RNO.INIT=8'hAC; // @46:456 CFG3 bcu_result_cry_9_0_RNO ( .A(gpr_rs1_rd_data_sig[9]), .B(de_ex_pipe_curr_pc_ex[9]), .C(de_ex_pipe_bcu_operand0_mux_sel_ex_0), .Y(bcu_operand0[9]) ); defparam bcu_result_cry_9_0_RNO.INIT=8'hAC; // @46:456 CFG3 bcu_result_cry_8_0_RNO ( .A(gpr_rs1_rd_data_sig[8]), .B(de_ex_pipe_curr_pc_ex[8]), .C(de_ex_pipe_bcu_operand0_mux_sel_ex_0), .Y(bcu_operand0[8]) ); defparam bcu_result_cry_8_0_RNO.INIT=8'hAC; // @46:456 CFG3 bcu_result_cry_7_0_RNO ( .A(gpr_rs1_rd_data_sig[7]), .B(de_ex_pipe_curr_pc_ex[7]), .C(de_ex_pipe_bcu_operand0_mux_sel_ex_0), .Y(bcu_operand0[7]) ); defparam bcu_result_cry_7_0_RNO.INIT=8'hAC; // @46:456 CFG3 bcu_result_cry_6_0_RNO ( .A(gpr_rs1_rd_data_sig[6]), .B(de_ex_pipe_curr_pc_ex[6]), .C(de_ex_pipe_bcu_operand0_mux_sel_ex_0), .Y(bcu_operand0[6]) ); defparam bcu_result_cry_6_0_RNO.INIT=8'hAC; // @46:456 CFG3 bcu_result_cry_5_0_RNO ( .A(gpr_rs1_rd_data_sig[5]), .B(de_ex_pipe_curr_pc_ex[5]), .C(de_ex_pipe_bcu_operand0_mux_sel_ex_0), .Y(bcu_operand0[5]) ); defparam bcu_result_cry_5_0_RNO.INIT=8'hAC; // @46:456 CFG3 bcu_result_cry_4_0_RNO ( .A(gpr_rs1_rd_data_sig[4]), .B(de_ex_pipe_curr_pc_ex[4]), .C(de_ex_pipe_bcu_operand0_mux_sel_ex_0), .Y(bcu_operand0[4]) ); defparam bcu_result_cry_4_0_RNO.INIT=8'hAC; // @46:456 CFG3 bcu_result_cry_3_0_RNO ( .A(gpr_rs1_rd_data_sig[3]), .B(de_ex_pipe_curr_pc_ex[3]), .C(de_ex_pipe_bcu_operand0_mux_sel_ex_0), .Y(bcu_operand0[3]) ); defparam bcu_result_cry_3_0_RNO.INIT=8'hAC; // @46:456 CFG3 bcu_result_cry_2_0_RNO ( .A(gpr_rs1_rd_data_sig[2]), .B(de_ex_pipe_curr_pc_ex[2]), .C(de_ex_pipe_bcu_operand0_mux_sel_ex_0), .Y(bcu_operand0[2]) ); defparam bcu_result_cry_2_0_RNO.INIT=8'hAC; // @46:456 CFG3 bcu_result_cry_1_RNO ( .A(gpr_rs1_rd_data_sig[1]), .B(de_ex_pipe_curr_pc_ex[1]), .C(de_ex_pipe_bcu_operand0_mux_sel_ex_0), .Y(bcu_operand0[1]) ); defparam bcu_result_cry_1_RNO.INIT=8'hAC; // @46:456 CFG3 bcu_result_cry_0_RNO ( .A(gpr_rs1_rd_data_sig[0]), .B(de_ex_pipe_curr_pc_ex[0]), .C(de_ex_pipe_bcu_operand0_mux_sel_ex_0), .Y(bcu_result) ); defparam bcu_result_cry_0_RNO.INIT=8'hAC; // @46:419 CFG3 \bcu_operand1_1_i_m4[1] ( .A(de_ex_pipe_bcu_operand1_mux_sel_ex[1]), .B(csr_priv_dpc_retr[1]), .C(de_ex_pipe_immediate_ex[1]), .Y(N_1404) ); defparam \bcu_operand1_1_i_m4[1] .INIT=8'hD8; // @46:419 CFG3 \bcu_operand1_1_i_m4[0] ( .A(de_ex_pipe_bcu_operand1_mux_sel_ex[1]), .B(csr_priv_dpc_retr[0]), .C(de_ex_pipe_immediate_ex[0]), .Y(N_1405) ); defparam \bcu_operand1_1_i_m4[0] .INIT=8'hD8; // @46:419 CFG4 bcu_operand1_valid_6_i_a2_0_3 ( .A(ex_retr_pipe_sw_csr_addr_retr[10]), .B(ex_retr_pipe_sw_csr_addr_retr[11]), .C(ex_retr_pipe_sw_csr_addr_retr[7]), .D(ex_retr_pipe_sw_csr_addr_retr[3]), .Y(bcu_operand1_valid_6_i_a2_0_3_Z) ); defparam bcu_operand1_valid_6_i_a2_0_3.INIT=16'h0001; // @46:419 CFG4 \bcu_operand1_6_0_a2_0[1] ( .A(de_ex_pipe_bcu_operand1_mux_sel_ex[1]), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .C(csr_priv_mtvec_epc_retr[1]), .D(de_ex_pipe_bcu_operand1_mux_sel_ex[2]), .Y(N_1408) ); defparam \bcu_operand1_6_0_a2_0[1] .INIT=16'h0040; // @46:419 CFG3 bcu_operand1_valid_6_i_a2 ( .A(de_ex_pipe_bcu_operand1_mux_sel_ex[2]), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[1]), .C(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .Y(N_1409) ); defparam bcu_operand1_valid_6_i_a2.INIT=8'hA8; // @46:419 CFG3 bcu_operand1_valid_6_i_o4 ( .A(ex_retr_pipe_sw_csr_addr_retr[6]), .B(de_ex_pipe_bcu_operand1_mux_sel_ex[1]), .C(ex_retr_pipe_sw_csr_addr_retr[2]), .Y(N_41) ); defparam bcu_operand1_valid_6_i_o4.INIT=8'h42; // @46:419 CFG4 bcu_operand1_valid_6_i_a2_0_8 ( .A(bcu_operand1_valid_6_i_a2_0_3_Z), .B(bcu_operand1_valid_6_i_a2_0_2_1z), .C(N_1410_2), .D(N_1410_4), .Y(bcu_operand1_valid_6_i_a2_0_8_Z) ); defparam bcu_operand1_valid_6_i_a2_0_8.INIT=16'h8000; // @46:419 CFG4 bcu_operand1_valid_6_i_a2_0_7 ( .A(de_ex_pipe_bcu_operand1_mux_sel_ex[0]), .B(N_41), .C(N_40), .D(stage_state_retr), .Y(bcu_operand1_valid_6_i_a2_0_7_Z) ); defparam bcu_operand1_valid_6_i_a2_0_7.INIT=16'h8000; // @46:460 CFG4 bcu_result_valid_1 ( .A(bcu_operand1_valid_6_i_a2_0_7_Z), .B(N_1409), .C(bcu_operand1_valid_6_i_a2_0_8_Z), .D(un3_bcu_op_sel_ex), .Y(bcu_result_valid_1_Z) ); defparam bcu_result_valid_1.INIT=16'h1300; // @46:460 CFG3 bcu_result_valid_6_0 ( .A(trace_priv_i), .B(bcu_result_valid_1_Z), .C(ex_retr_pipe_gpr_wr_mux_sel_retr_0), .Y(bcu_result_valid_6_0_Z) ); defparam bcu_result_valid_6_0.INIT=8'hC4; // @46:460 CFG4 bcu_result_valid_a3_1 ( .A(gpr_rs1_rd_data_valid_6_5), .B(ex_retr_pipe_gpr_wr_mux_sel_retr_0), .C(gpr_rs1_rd_valid_mux), .D(bcu_result_valid_1_Z), .Y(bcu_result_valid_a3_1_Z) ); defparam bcu_result_valid_a3_1.INIT=16'h8000; // @46:460 CFG4 bcu_result_valid_2_0 ( .A(un1_rs1_rd_hzd_4), .B(de_ex_pipe_bcu_operand0_mux_sel_ex_0), .C(gpr_rs1_rd_data_valid_6), .D(bcu_result_valid_1_Z), .Y(bcu_result_valid_2_0_Z) ); defparam bcu_result_valid_2_0.INIT=16'h7300; // @46:460 CFG4 bcu_result_valid_a2 ( .A(ex_retr_pipe_gpr_wr_mux_sel_retr_0), .B(bcu_result_valid_1_Z), .C(gpr_rs1_rd_data_valid_6), .D(gpr_wr_valid_retr_0), .Y(bcu_result_valid_a2_Z) ); defparam bcu_result_valid_a2.INIT=16'h0040; // @46:460 CFG4 bcu_result_valid_a3 ( .A(soft_reset_taken_retr_0), .B(bcu_result_valid_a3_1_Z), .C(formal_trace_reset_taken), .D(gpr_wr_valid_retr_2_0_0), .Y(bcu_result_valid_a3_Z) ); defparam bcu_result_valid_a3.INIT=16'hC4CC; // @46:460 CFG4 bcu_result_valid_6 ( .A(bcu_result_valid_6_0_Z), .B(gpr_rs1_rd_data_valid_6), .C(un2_exception_taken), .D(machine_implicit_wr_mtval_tval_wr_en), .Y(bcu_result_valid_3) ); defparam bcu_result_valid_6.INIT=16'h0800; // @46:460 CFG4 bcu_result_valid_2 ( .A(bcu_result_valid_a2_Z), .B(bcu_result_valid_3), .C(bcu_result_valid_2_0_Z), .D(bcu_result_valid_a3_Z), .Y(lsu_req_addr_valid) ); defparam bcu_result_valid_2.INIT=16'hFFFE; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_bcu */ module miv_rv32_gpr_ram_array_32s_6s_32s ( de_ex_pipe_gpr_rs2_rd_sel_ex, gpr_rs1_rd_data_sig, de_ex_pipe_gpr_rs1_rd_sel_ex, cpu_debug_gpr_op_rd_data_net, gpr_wr_data_retr, ex_retr_pipe_gpr_wr_sel_retr, gpr_wr_valid_int, PF_CCC_0_0_OUT0_FABCLK_0, un11_gpr_rs1_stall_exu, un11_gpr_rs2_stall_exu ) ; input [5:0] de_ex_pipe_gpr_rs2_rd_sel_ex ; output [31:0] gpr_rs1_rd_data_sig ; input [4:0] de_ex_pipe_gpr_rs1_rd_sel_ex ; output [31:0] cpu_debug_gpr_op_rd_data_net ; input [31:0] gpr_wr_data_retr ; input [4:0] ex_retr_pipe_gpr_wr_sel_retr ; input gpr_wr_valid_int ; input PF_CCC_0_0_OUT0_FABCLK_0 ; output un11_gpr_rs1_stall_exu ; output un11_gpr_rs2_stall_exu ; wire gpr_wr_valid_int ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire un11_gpr_rs1_stall_exu ; wire un11_gpr_rs2_stall_exu ; wire [11:8] mem_xf_1_mem_xf_1_0_2_R_DATA; wire [11:8] mem_xf_mem_xf_0_2_R_DATA; wire un11_gpr_rs2_stall_exu_i ; wire un11_gpr_rs1_stall_exu_i ; wire GND ; wire VCC ; wire un12_q0_0_Z ; wire un12_q1_3_Z ; wire N_65 ; wire N_64 ; wire N_63 ; wire N_62 ; wire N_61 ; wire N_60 ; wire N_59 ; wire N_58 ; wire N_57 ; wire N_56 ; wire N_55 ; wire N_54 ; wire N_53 ; wire N_52 ; wire N_51 ; wire N_50 ; wire N_49 ; wire N_48 ; wire N_47 ; wire N_46 ; wire N_45 ; wire N_44 ; wire N_43 ; wire N_42 ; wire N_41 ; wire N_40 ; wire N_39 ; wire N_38 ; wire N_37 ; wire N_36 ; wire N_35 ; wire N_34 ; wire N_33 ; wire N_32 ; wire N_31 ; wire N_30 ; wire N_29 ; wire N_28 ; wire N_27 ; wire N_26 ; wire N_25 ; wire N_24 ; wire N_23 ; wire N_22 ; wire N_21 ; wire N_20 ; wire N_19 ; wire N_18 ; wire N_17 ; wire N_16 ; wire N_15 ; wire N_14 ; wire N_13 ; wire N_12 ; wire N_11 ; wire N_10 ; wire N_9 ; wire N_8 ; wire N_7 ; wire N_6 ; wire N_5 ; wire N_4 ; wire N_3 ; wire N_2 ; wire NC0 ; wire NC1 ; wire NC2 ; wire NC3 ; wire NC4 ; wire NC5 ; CFG1 un12_q1_RNILTKC2 ( .A(un11_gpr_rs2_stall_exu), .Y(un11_gpr_rs2_stall_exu_i) ); defparam un12_q1_RNILTKC2.INIT=2'h1; CFG1 un12_q0_RNIKTKC2 ( .A(un11_gpr_rs1_stall_exu), .Y(un11_gpr_rs1_stall_exu_i) ); defparam un12_q0_RNIKTKC2.INIT=2'h1; // @46:6370 RAM64x12 mem_xf_1_mem_xf_1_0_0 ( .BUSY_FB(GND), .W_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .W_ADDR({GND, ex_retr_pipe_gpr_wr_sel_retr[4:0]}), .W_EN(gpr_wr_valid_int), .W_DATA(gpr_wr_data_retr[11:0]), .BLK_EN(VCC), .R_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .R_ADDR({GND, de_ex_pipe_gpr_rs2_rd_sel_ex[4:0]}), .R_DATA(cpu_debug_gpr_op_rd_data_net[11:0]), .R_ADDR_BYPASS(VCC), .R_ADDR_EN(VCC), .R_ADDR_SL_N(VCC), .R_ADDR_SD(GND), .R_ADDR_AL_N(VCC), .R_ADDR_AD_N(VCC), .R_DATA_BYPASS(GND), .R_DATA_EN(VCC), .R_DATA_SL_N(un11_gpr_rs2_stall_exu_i), .R_DATA_SD(GND), .R_DATA_AL_N(VCC), .R_DATA_AD_N(VCC), .ACCESS_BUSY(NC0) ); defparam mem_xf_1_mem_xf_1_0_0.RAMINDEX="mem_xf_1[31:0]%32%32%SPEED%0%0%MICRO_RAM"; // @46:6370 RAM64x12 mem_xf_1_mem_xf_1_0_1 ( .BUSY_FB(GND), .W_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .W_ADDR({GND, ex_retr_pipe_gpr_wr_sel_retr[4:0]}), .W_EN(gpr_wr_valid_int), .W_DATA(gpr_wr_data_retr[23:12]), .BLK_EN(VCC), .R_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .R_ADDR({GND, de_ex_pipe_gpr_rs2_rd_sel_ex[4:0]}), .R_DATA(cpu_debug_gpr_op_rd_data_net[23:12]), .R_ADDR_BYPASS(VCC), .R_ADDR_EN(VCC), .R_ADDR_SL_N(VCC), .R_ADDR_SD(GND), .R_ADDR_AL_N(VCC), .R_ADDR_AD_N(VCC), .R_DATA_BYPASS(GND), .R_DATA_EN(VCC), .R_DATA_SL_N(un11_gpr_rs2_stall_exu_i), .R_DATA_SD(GND), .R_DATA_AL_N(VCC), .R_DATA_AD_N(VCC), .ACCESS_BUSY(NC1) ); defparam mem_xf_1_mem_xf_1_0_1.RAMINDEX="mem_xf_1[31:0]%32%32%SPEED%0%1%MICRO_RAM"; // @46:6370 RAM64x12 mem_xf_1_mem_xf_1_0_2 ( .BUSY_FB(GND), .W_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .W_ADDR({GND, ex_retr_pipe_gpr_wr_sel_retr[4:0]}), .W_EN(gpr_wr_valid_int), .W_DATA({GND, GND, GND, GND, gpr_wr_data_retr[31:24]}), .BLK_EN(VCC), .R_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .R_ADDR({GND, de_ex_pipe_gpr_rs2_rd_sel_ex[4:0]}), .R_DATA({mem_xf_1_mem_xf_1_0_2_R_DATA[11:8], cpu_debug_gpr_op_rd_data_net[31:24]}), .R_ADDR_BYPASS(VCC), .R_ADDR_EN(VCC), .R_ADDR_SL_N(VCC), .R_ADDR_SD(GND), .R_ADDR_AL_N(VCC), .R_ADDR_AD_N(VCC), .R_DATA_BYPASS(GND), .R_DATA_EN(VCC), .R_DATA_SL_N(un11_gpr_rs2_stall_exu_i), .R_DATA_SD(GND), .R_DATA_AL_N(VCC), .R_DATA_AD_N(VCC), .ACCESS_BUSY(NC2) ); defparam mem_xf_1_mem_xf_1_0_2.RAMINDEX="mem_xf_1[31:0]%32%32%SPEED%0%2%MICRO_RAM"; // @46:6370 RAM64x12 mem_xf_mem_xf_0_0 ( .BUSY_FB(GND), .W_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .W_ADDR({GND, ex_retr_pipe_gpr_wr_sel_retr[4:0]}), .W_EN(gpr_wr_valid_int), .W_DATA(gpr_wr_data_retr[11:0]), .BLK_EN(VCC), .R_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .R_ADDR({GND, de_ex_pipe_gpr_rs1_rd_sel_ex[4:0]}), .R_DATA(gpr_rs1_rd_data_sig[11:0]), .R_ADDR_BYPASS(VCC), .R_ADDR_EN(VCC), .R_ADDR_SL_N(VCC), .R_ADDR_SD(GND), .R_ADDR_AL_N(VCC), .R_ADDR_AD_N(VCC), .R_DATA_BYPASS(GND), .R_DATA_EN(VCC), .R_DATA_SL_N(un11_gpr_rs1_stall_exu_i), .R_DATA_SD(GND), .R_DATA_AL_N(VCC), .R_DATA_AD_N(VCC), .ACCESS_BUSY(NC3) ); defparam mem_xf_mem_xf_0_0.RAMINDEX="mem_xf[31:0]%32%32%SPEED%0%0%MICRO_RAM"; // @46:6370 RAM64x12 mem_xf_mem_xf_0_1 ( .BUSY_FB(GND), .W_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .W_ADDR({GND, ex_retr_pipe_gpr_wr_sel_retr[4:0]}), .W_EN(gpr_wr_valid_int), .W_DATA(gpr_wr_data_retr[23:12]), .BLK_EN(VCC), .R_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .R_ADDR({GND, de_ex_pipe_gpr_rs1_rd_sel_ex[4:0]}), .R_DATA(gpr_rs1_rd_data_sig[23:12]), .R_ADDR_BYPASS(VCC), .R_ADDR_EN(VCC), .R_ADDR_SL_N(VCC), .R_ADDR_SD(GND), .R_ADDR_AL_N(VCC), .R_ADDR_AD_N(VCC), .R_DATA_BYPASS(GND), .R_DATA_EN(VCC), .R_DATA_SL_N(un11_gpr_rs1_stall_exu_i), .R_DATA_SD(GND), .R_DATA_AL_N(VCC), .R_DATA_AD_N(VCC), .ACCESS_BUSY(NC4) ); defparam mem_xf_mem_xf_0_1.RAMINDEX="mem_xf[31:0]%32%32%SPEED%0%1%MICRO_RAM"; // @46:6370 RAM64x12 mem_xf_mem_xf_0_2 ( .BUSY_FB(GND), .W_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .W_ADDR({GND, ex_retr_pipe_gpr_wr_sel_retr[4:0]}), .W_EN(gpr_wr_valid_int), .W_DATA({GND, GND, GND, GND, gpr_wr_data_retr[31:24]}), .BLK_EN(VCC), .R_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .R_ADDR({GND, de_ex_pipe_gpr_rs1_rd_sel_ex[4:0]}), .R_DATA({mem_xf_mem_xf_0_2_R_DATA[11:8], gpr_rs1_rd_data_sig[31:24]}), .R_ADDR_BYPASS(VCC), .R_ADDR_EN(VCC), .R_ADDR_SL_N(VCC), .R_ADDR_SD(GND), .R_ADDR_AL_N(VCC), .R_ADDR_AD_N(VCC), .R_DATA_BYPASS(GND), .R_DATA_EN(VCC), .R_DATA_SL_N(un11_gpr_rs1_stall_exu_i), .R_DATA_SD(GND), .R_DATA_AL_N(VCC), .R_DATA_AD_N(VCC), .ACCESS_BUSY(NC5) ); defparam mem_xf_mem_xf_0_2.RAMINDEX="mem_xf[31:0]%32%32%SPEED%0%2%MICRO_RAM"; // @46:6377 CFG2 un12_q0_0 ( .A(de_ex_pipe_gpr_rs1_rd_sel_ex[0]), .B(de_ex_pipe_gpr_rs1_rd_sel_ex[2]), .Y(un12_q0_0_Z) ); defparam un12_q0_0.INIT=4'h1; // @46:6377 CFG4 un12_q1_3 ( .A(de_ex_pipe_gpr_rs2_rd_sel_ex[5]), .B(de_ex_pipe_gpr_rs2_rd_sel_ex[4]), .C(de_ex_pipe_gpr_rs2_rd_sel_ex[1]), .D(de_ex_pipe_gpr_rs2_rd_sel_ex[0]), .Y(un12_q1_3_Z) ); defparam un12_q1_3.INIT=16'h0001; // @46:6377 CFG3 un12_q1 ( .A(de_ex_pipe_gpr_rs2_rd_sel_ex[2]), .B(un12_q1_3_Z), .C(de_ex_pipe_gpr_rs2_rd_sel_ex[3]), .Y(un11_gpr_rs2_stall_exu) ); defparam un12_q1.INIT=8'h04; // @46:6377 CFG4 un12_q0 ( .A(de_ex_pipe_gpr_rs1_rd_sel_ex[1]), .B(un12_q0_0_Z), .C(de_ex_pipe_gpr_rs1_rd_sel_ex[4]), .D(de_ex_pipe_gpr_rs1_rd_sel_ex[3]), .Y(un11_gpr_rs1_stall_exu) ); defparam un12_q0.INIT=16'h0004; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_gpr_ram_array_32s_6s_32s */ module miv_rv32_gpr_ram_0s_0_0s_32s ( gpr_wr_data_retr, cpu_debug_gpr_op_rd_data_net, gpr_rs1_rd_data_sig, de_ex_pipe_gpr_rs1_rd_sel_ex, de_ex_pipe_gpr_rs2_rd_sel_ex, ex_retr_pipe_gpr_wr_sel_retr, un11_gpr_rs2_stall_exu, un11_gpr_rs1_stall_exu, gpr_rs2_rd_data_valid_sig, gpr_rs1_rd_data_valid_6_1z, d_m5_a0_0, gpr_rs1_rd_valid_mux_0, gpr_rs2_rd_data_valid_7_1z, un1_gpr_wr_mux_sel_ex_i, instr_inhibit_ex_1z, un5_instr_inhibit_ex_0, stage_state_ex, un1_instr_inhibit_ex_0, un1_irq_stall_lsu_req, gpr_rs1_rd_data_valid_6_5_1z, un1_rs2_rd_hzd_4_1z, gpr_rs2_stall_csr_2_0, gpr_rs2_stall_csr_2_1, gpr_rs2_stall_csr_2_2, un1_rs1_rd_hzd_4_1z, un7_gpr_rs1_stall_exu_NE, gpr_rs1_rd_valid_mux, gpr_rs2_rd_valid_dbgpipe, gpr_wr_valid_retr, PF_CCC_0_0_OUT0_FABCLK_0, dff ) ; input [31:0] gpr_wr_data_retr ; output [31:0] cpu_debug_gpr_op_rd_data_net ; output [31:0] gpr_rs1_rd_data_sig ; input [4:0] de_ex_pipe_gpr_rs1_rd_sel_ex ; input [5:0] de_ex_pipe_gpr_rs2_rd_sel_ex ; input [5:0] ex_retr_pipe_gpr_wr_sel_retr ; output un11_gpr_rs2_stall_exu ; output un11_gpr_rs1_stall_exu ; output gpr_rs2_rd_data_valid_sig ; output gpr_rs1_rd_data_valid_6_1z ; input d_m5_a0_0 ; input gpr_rs1_rd_valid_mux_0 ; output gpr_rs2_rd_data_valid_7_1z ; output un1_gpr_wr_mux_sel_ex_i ; output instr_inhibit_ex_1z ; input un5_instr_inhibit_ex_0 ; input stage_state_ex ; input un1_instr_inhibit_ex_0 ; input un1_irq_stall_lsu_req ; output gpr_rs1_rd_data_valid_6_5_1z ; output un1_rs2_rd_hzd_4_1z ; input gpr_rs2_stall_csr_2_0 ; input gpr_rs2_stall_csr_2_1 ; input gpr_rs2_stall_csr_2_2 ; output un1_rs1_rd_hzd_4_1z ; output un7_gpr_rs1_stall_exu_NE ; input gpr_rs1_rd_valid_mux ; input gpr_rs2_rd_valid_dbgpipe ; input gpr_wr_valid_retr ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input dff ; wire un11_gpr_rs2_stall_exu ; wire un11_gpr_rs1_stall_exu ; wire gpr_rs2_rd_data_valid_sig ; wire gpr_rs1_rd_data_valid_6_1z ; wire d_m5_a0_0 ; wire gpr_rs1_rd_valid_mux_0 ; wire gpr_rs2_rd_data_valid_7_1z ; wire un1_gpr_wr_mux_sel_ex_i ; wire instr_inhibit_ex_1z ; wire un5_instr_inhibit_ex_0 ; wire stage_state_ex ; wire un1_instr_inhibit_ex_0 ; wire un1_irq_stall_lsu_req ; wire gpr_rs1_rd_data_valid_6_5_1z ; wire un1_rs2_rd_hzd_4_1z ; wire gpr_rs2_stall_csr_2_0 ; wire gpr_rs2_stall_csr_2_1 ; wire gpr_rs2_stall_csr_2_2 ; wire un1_rs1_rd_hzd_4_1z ; wire un7_gpr_rs1_stall_exu_NE ; wire gpr_rs1_rd_valid_mux ; wire gpr_rs2_rd_valid_dbgpipe ; wire gpr_wr_valid_retr ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire dff ; wire [4:0] gpr_rs1_rd_sel_reg_Z; wire [4:0] gpr_wr_sel_reg_Z; wire [5:0] gpr_rs2_rd_sel_reg_Z; wire gpr_wr_valid_reg_Z ; wire VCC ; wire GND ; wire gpr_rs2_rd_valid_reg_Z ; wire gpr_rs1_rd_valid_reg_Z ; wire un4_rs1_rd_hzd_5 ; wire un7_gpr_rs1_stall_exu_2 ; wire un7_gpr_rs1_stall_exu_0 ; wire un7_gpr_rs1_stall_exu_1 ; wire un7_gpr_rs1_stall_exu_3 ; wire un7_gpr_rs1_stall_exu_4 ; wire un4_rs2_rd_hzd_5_Z ; wire un3_gpr_rs2_rd_data_valid_3_Z ; wire un4_rs2_rd_hzd_1_Z ; wire gpr_rs2_rd_data_valid_7_2_Z ; wire gpr_rs2_rd_data_valid_7_0_Z ; wire gpr_rs1_rd_data_valid_6_5_2_Z ; wire gpr_rs1_rd_data_valid_6_5_1_Z ; wire un3_rs1_rd_hzd_3_Z ; wire un3_rs1_rd_hzd_2_Z ; wire un3_rs1_rd_hzd_1_Z ; wire un3_rs2_rd_hzd_2_Z ; wire un4_gpr_wr_valid_int_3_Z ; wire gpr_rs2_rd_data_valid_7_4_Z ; wire gpr_rs1_rd_data_valid_6_5_3_Z ; wire un1_rs1_rd_hzd_4_3_Z ; wire un7_gpr_rs1_stall_exu_NE_3 ; wire un3_rs2_rd_hzd_4_Z ; wire un3_rs2_rd_hzd_3_Z ; wire gpr_rs2_rd_data_valid_7_5_Z ; wire un3_rs1_rd_hzd_Z ; wire gpr_wr_valid_int_Z ; wire N_8 ; wire N_7 ; wire N_6 ; wire N_5 ; wire N_4 ; wire N_3 ; wire N_2 ; // @46:6097 SLE gpr_wr_valid_reg ( .Q(gpr_wr_valid_reg_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(gpr_wr_valid_retr), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:6097 SLE gpr_rs2_rd_valid_reg ( .Q(gpr_rs2_rd_valid_reg_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(gpr_rs2_rd_valid_dbgpipe), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:6097 SLE gpr_rs1_rd_valid_reg ( .Q(gpr_rs1_rd_valid_reg_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(gpr_rs1_rd_valid_mux), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:6097 SLE \gpr_rs1_rd_sel_reg[3] ( .Q(gpr_rs1_rd_sel_reg_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_gpr_rs1_rd_sel_ex[3]), .EN(gpr_rs1_rd_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:6097 SLE \gpr_rs1_rd_sel_reg[2] ( .Q(gpr_rs1_rd_sel_reg_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_gpr_rs1_rd_sel_ex[2]), .EN(gpr_rs1_rd_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:6097 SLE \gpr_rs1_rd_sel_reg[1] ( .Q(gpr_rs1_rd_sel_reg_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_gpr_rs1_rd_sel_ex[1]), .EN(gpr_rs1_rd_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:6097 SLE \gpr_rs1_rd_sel_reg[0] ( .Q(gpr_rs1_rd_sel_reg_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_gpr_rs1_rd_sel_ex[0]), .EN(gpr_rs1_rd_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:6097 SLE \gpr_wr_sel_reg[5] ( .Q(un4_rs1_rd_hzd_5), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_gpr_wr_sel_retr[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:6097 SLE \gpr_wr_sel_reg[4] ( .Q(gpr_wr_sel_reg_Z[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_gpr_wr_sel_retr[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:6097 SLE \gpr_wr_sel_reg[3] ( .Q(gpr_wr_sel_reg_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_gpr_wr_sel_retr[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:6097 SLE \gpr_wr_sel_reg[2] ( .Q(gpr_wr_sel_reg_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_gpr_wr_sel_retr[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:6097 SLE \gpr_wr_sel_reg[1] ( .Q(gpr_wr_sel_reg_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_gpr_wr_sel_retr[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:6097 SLE \gpr_wr_sel_reg[0] ( .Q(gpr_wr_sel_reg_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_gpr_wr_sel_retr[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:6097 SLE \gpr_rs2_rd_sel_reg[5] ( .Q(gpr_rs2_rd_sel_reg_Z[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_gpr_rs2_rd_sel_ex[5]), .EN(gpr_rs2_rd_valid_dbgpipe), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:6097 SLE \gpr_rs2_rd_sel_reg[4] ( .Q(gpr_rs2_rd_sel_reg_Z[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_gpr_rs2_rd_sel_ex[4]), .EN(gpr_rs2_rd_valid_dbgpipe), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:6097 SLE \gpr_rs2_rd_sel_reg[3] ( .Q(gpr_rs2_rd_sel_reg_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_gpr_rs2_rd_sel_ex[3]), .EN(gpr_rs2_rd_valid_dbgpipe), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:6097 SLE \gpr_rs2_rd_sel_reg[2] ( .Q(gpr_rs2_rd_sel_reg_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_gpr_rs2_rd_sel_ex[2]), .EN(gpr_rs2_rd_valid_dbgpipe), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:6097 SLE \gpr_rs2_rd_sel_reg[1] ( .Q(gpr_rs2_rd_sel_reg_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_gpr_rs2_rd_sel_ex[1]), .EN(gpr_rs2_rd_valid_dbgpipe), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:6097 SLE \gpr_rs2_rd_sel_reg[0] ( .Q(gpr_rs2_rd_sel_reg_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_gpr_rs2_rd_sel_ex[0]), .EN(gpr_rs2_rd_valid_dbgpipe), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:6097 SLE \gpr_rs1_rd_sel_reg[4] ( .Q(gpr_rs1_rd_sel_reg_Z[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_gpr_rs1_rd_sel_ex[4]), .EN(gpr_rs1_rd_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:6085 CFG2 un2_rs1_rd_hzd_2 ( .A(ex_retr_pipe_gpr_wr_sel_retr[2]), .B(de_ex_pipe_gpr_rs1_rd_sel_ex[2]), .Y(un7_gpr_rs1_stall_exu_2) ); defparam un2_rs1_rd_hzd_2.INIT=4'h6; // @46:6085 CFG2 un2_rs1_rd_hzd_0 ( .A(ex_retr_pipe_gpr_wr_sel_retr[0]), .B(de_ex_pipe_gpr_rs1_rd_sel_ex[0]), .Y(un7_gpr_rs1_stall_exu_0) ); defparam un2_rs1_rd_hzd_0.INIT=4'h6; // @46:6085 CFG2 un2_rs1_rd_hzd_1 ( .A(ex_retr_pipe_gpr_wr_sel_retr[1]), .B(de_ex_pipe_gpr_rs1_rd_sel_ex[1]), .Y(un7_gpr_rs1_stall_exu_1) ); defparam un2_rs1_rd_hzd_1.INIT=4'h6; // @46:6085 CFG2 un2_rs1_rd_hzd_3 ( .A(ex_retr_pipe_gpr_wr_sel_retr[3]), .B(de_ex_pipe_gpr_rs1_rd_sel_ex[3]), .Y(un7_gpr_rs1_stall_exu_3) ); defparam un2_rs1_rd_hzd_3.INIT=4'h6; // @46:6085 CFG2 un2_rs1_rd_hzd_4 ( .A(ex_retr_pipe_gpr_wr_sel_retr[4]), .B(de_ex_pipe_gpr_rs1_rd_sel_ex[4]), .Y(un7_gpr_rs1_stall_exu_4) ); defparam un2_rs1_rd_hzd_4.INIT=4'h6; // @46:6086 CFG2 un4_rs2_rd_hzd_5 ( .A(de_ex_pipe_gpr_rs2_rd_sel_ex[5]), .B(un4_rs1_rd_hzd_5), .Y(un4_rs2_rd_hzd_5_Z) ); defparam un4_rs2_rd_hzd_5.INIT=4'h6; // @46:6083 CFG2 un3_gpr_rs2_rd_data_valid_3 ( .A(de_ex_pipe_gpr_rs2_rd_sel_ex[3]), .B(gpr_rs2_rd_sel_reg_Z[3]), .Y(un3_gpr_rs2_rd_data_valid_3_Z) ); defparam un3_gpr_rs2_rd_data_valid_3.INIT=4'h6; // @46:6086 CFG2 un4_rs2_rd_hzd_1 ( .A(de_ex_pipe_gpr_rs2_rd_sel_ex[1]), .B(gpr_wr_sel_reg_Z[1]), .Y(un4_rs2_rd_hzd_1_Z) ); defparam un4_rs2_rd_hzd_1.INIT=4'h6; // @46:6083 CFG4 gpr_rs2_rd_data_valid_7_2 ( .A(gpr_rs2_rd_sel_reg_Z[4]), .B(gpr_rs2_rd_sel_reg_Z[0]), .C(de_ex_pipe_gpr_rs2_rd_sel_ex[4]), .D(de_ex_pipe_gpr_rs2_rd_sel_ex[0]), .Y(gpr_rs2_rd_data_valid_7_2_Z) ); defparam gpr_rs2_rd_data_valid_7_2.INIT=16'h8421; // @46:6083 CFG3 gpr_rs2_rd_data_valid_7_0 ( .A(gpr_rs2_rd_valid_reg_Z), .B(gpr_rs2_rd_sel_reg_Z[5]), .C(de_ex_pipe_gpr_rs2_rd_sel_ex[5]), .Y(gpr_rs2_rd_data_valid_7_0_Z) ); defparam gpr_rs2_rd_data_valid_7_0.INIT=8'h82; // @46:6082 CFG4 gpr_rs1_rd_data_valid_6_5_2 ( .A(gpr_rs1_rd_sel_reg_Z[4]), .B(gpr_rs1_rd_sel_reg_Z[3]), .C(de_ex_pipe_gpr_rs1_rd_sel_ex[4]), .D(de_ex_pipe_gpr_rs1_rd_sel_ex[3]), .Y(gpr_rs1_rd_data_valid_6_5_2_Z) ); defparam gpr_rs1_rd_data_valid_6_5_2.INIT=16'h8421; // @46:6082 CFG4 gpr_rs1_rd_data_valid_6_5_1 ( .A(gpr_rs1_rd_sel_reg_Z[1]), .B(gpr_rs1_rd_sel_reg_Z[0]), .C(de_ex_pipe_gpr_rs1_rd_sel_ex[1]), .D(de_ex_pipe_gpr_rs1_rd_sel_ex[0]), .Y(gpr_rs1_rd_data_valid_6_5_1_Z) ); defparam gpr_rs1_rd_data_valid_6_5_1.INIT=16'h8421; // @46:6085 CFG4 un3_rs1_rd_hzd_3 ( .A(gpr_wr_sel_reg_Z[1]), .B(gpr_wr_sel_reg_Z[0]), .C(de_ex_pipe_gpr_rs1_rd_sel_ex[1]), .D(de_ex_pipe_gpr_rs1_rd_sel_ex[0]), .Y(un3_rs1_rd_hzd_3_Z) ); defparam un3_rs1_rd_hzd_3.INIT=16'h8421; // @46:6085 CFG4 un3_rs1_rd_hzd_2 ( .A(gpr_wr_sel_reg_Z[3]), .B(gpr_wr_sel_reg_Z[2]), .C(de_ex_pipe_gpr_rs1_rd_sel_ex[3]), .D(de_ex_pipe_gpr_rs1_rd_sel_ex[2]), .Y(un3_rs1_rd_hzd_2_Z) ); defparam un3_rs1_rd_hzd_2.INIT=16'h8421; // @46:6085 CFG4 un3_rs1_rd_hzd_1 ( .A(un4_rs1_rd_hzd_5), .B(gpr_wr_valid_reg_Z), .C(gpr_wr_sel_reg_Z[4]), .D(de_ex_pipe_gpr_rs1_rd_sel_ex[4]), .Y(un3_rs1_rd_hzd_1_Z) ); defparam un3_rs1_rd_hzd_1.INIT=16'h4004; // @46:6086 CFG4 un3_rs2_rd_hzd_2 ( .A(gpr_wr_sel_reg_Z[3]), .B(gpr_wr_sel_reg_Z[2]), .C(de_ex_pipe_gpr_rs2_rd_sel_ex[3]), .D(de_ex_pipe_gpr_rs2_rd_sel_ex[2]), .Y(un3_rs2_rd_hzd_2_Z) ); defparam un3_rs2_rd_hzd_2.INIT=16'h8421; // @46:6088 CFG4 un4_gpr_wr_valid_int_3 ( .A(ex_retr_pipe_gpr_wr_sel_retr[5]), .B(ex_retr_pipe_gpr_wr_sel_retr[4]), .C(ex_retr_pipe_gpr_wr_sel_retr[1]), .D(ex_retr_pipe_gpr_wr_sel_retr[0]), .Y(un4_gpr_wr_valid_int_3_Z) ); defparam un4_gpr_wr_valid_int_3.INIT=16'h0001; // @46:6083 CFG4 gpr_rs2_rd_data_valid_7_4 ( .A(gpr_rs2_rd_sel_reg_Z[2]), .B(de_ex_pipe_gpr_rs2_rd_sel_ex[2]), .C(un3_gpr_rs2_rd_data_valid_3_Z), .D(gpr_rs2_rd_data_valid_7_2_Z), .Y(gpr_rs2_rd_data_valid_7_4_Z) ); defparam gpr_rs2_rd_data_valid_7_4.INIT=16'h0900; // @46:6082 CFG4 gpr_rs1_rd_data_valid_6_5_3 ( .A(gpr_rs1_rd_sel_reg_Z[2]), .B(gpr_rs1_rd_valid_reg_Z), .C(gpr_rs1_rd_data_valid_6_5_1_Z), .D(de_ex_pipe_gpr_rs1_rd_sel_ex[2]), .Y(gpr_rs1_rd_data_valid_6_5_3_Z) ); defparam gpr_rs1_rd_data_valid_6_5_3.INIT=16'h8040; // @46:6085 CFG4 un1_rs1_rd_hzd_4_3 ( .A(un7_gpr_rs1_stall_exu_1), .B(un7_gpr_rs1_stall_exu_0), .C(ex_retr_pipe_gpr_wr_sel_retr[5]), .D(un7_gpr_rs1_stall_exu_4), .Y(un1_rs1_rd_hzd_4_3_Z) ); defparam un1_rs1_rd_hzd_4_3.INIT=16'h0001; // @46:8842 CFG4 \gen_read_gpr_rs1_ex.gen_rs1_exu_stall.un7_gpr_rs1_stall_exu_NE_3 ( .A(un7_gpr_rs1_stall_exu_3), .B(un7_gpr_rs1_stall_exu_0), .C(ex_retr_pipe_gpr_wr_sel_retr[5]), .D(un7_gpr_rs1_stall_exu_4), .Y(un7_gpr_rs1_stall_exu_NE_3) ); defparam \gen_read_gpr_rs1_ex.gen_rs1_exu_stall.un7_gpr_rs1_stall_exu_NE_3 .INIT=16'hFFFE; // @46:6086 CFG4 un3_rs2_rd_hzd_4 ( .A(gpr_wr_sel_reg_Z[0]), .B(de_ex_pipe_gpr_rs2_rd_sel_ex[0]), .C(un4_rs2_rd_hzd_1_Z), .D(un3_rs2_rd_hzd_2_Z), .Y(un3_rs2_rd_hzd_4_Z) ); defparam un3_rs2_rd_hzd_4.INIT=16'h0900; // @46:6086 CFG4 un3_rs2_rd_hzd_3 ( .A(de_ex_pipe_gpr_rs2_rd_sel_ex[4]), .B(un4_rs2_rd_hzd_5_Z), .C(gpr_wr_valid_reg_Z), .D(gpr_wr_sel_reg_Z[4]), .Y(un3_rs2_rd_hzd_3_Z) ); defparam un3_rs2_rd_hzd_3.INIT=16'h2010; // @46:6083 CFG4 gpr_rs2_rd_data_valid_7_5 ( .A(gpr_rs2_rd_data_valid_7_0_Z), .B(gpr_rs2_rd_data_valid_7_4_Z), .C(gpr_rs2_rd_sel_reg_Z[1]), .D(de_ex_pipe_gpr_rs2_rd_sel_ex[1]), .Y(gpr_rs2_rd_data_valid_7_5_Z) ); defparam gpr_rs2_rd_data_valid_7_5.INIT=16'h8008; // @46:8842 CFG3 \gen_read_gpr_rs1_ex.gen_rs1_exu_stall.un7_gpr_rs1_stall_exu_NE ( .A(un7_gpr_rs1_stall_exu_2), .B(un7_gpr_rs1_stall_exu_1), .C(un7_gpr_rs1_stall_exu_NE_3), .Y(un7_gpr_rs1_stall_exu_NE) ); defparam \gen_read_gpr_rs1_ex.gen_rs1_exu_stall.un7_gpr_rs1_stall_exu_NE .INIT=8'hFE; // @46:6085 CFG3 un3_rs1_rd_hzd ( .A(un3_rs1_rd_hzd_3_Z), .B(un3_rs1_rd_hzd_2_Z), .C(un3_rs1_rd_hzd_1_Z), .Y(un3_rs1_rd_hzd_Z) ); defparam un3_rs1_rd_hzd.INIT=8'h80; // @46:6085 CFG3 un1_rs1_rd_hzd_4 ( .A(un7_gpr_rs1_stall_exu_3), .B(un7_gpr_rs1_stall_exu_2), .C(un1_rs1_rd_hzd_4_3_Z), .Y(un1_rs1_rd_hzd_4_1z) ); defparam un1_rs1_rd_hzd_4.INIT=8'h10; // @46:6086 CFG3 un1_rs2_rd_hzd_4 ( .A(gpr_rs2_stall_csr_2_2), .B(gpr_rs2_stall_csr_2_1), .C(gpr_rs2_stall_csr_2_0), .Y(un1_rs2_rd_hzd_4_1z) ); defparam un1_rs2_rd_hzd_4.INIT=8'h80; // @46:6082 CFG3 gpr_rs1_rd_data_valid_6_5 ( .A(gpr_rs1_rd_data_valid_6_5_3_Z), .B(gpr_rs1_rd_data_valid_6_5_2_Z), .C(un3_rs1_rd_hzd_Z), .Y(gpr_rs1_rd_data_valid_6_5_1z) ); defparam gpr_rs1_rd_data_valid_6_5.INIT=8'h08; // @46:8704 CFG4 instr_inhibit_ex ( .A(un1_irq_stall_lsu_req), .B(un1_instr_inhibit_ex_0), .C(stage_state_ex), .D(un5_instr_inhibit_ex_0), .Y(instr_inhibit_ex_1z) ); defparam instr_inhibit_ex.INIT=16'hE0C0; // @46:9335 CFG4 instr_inhibit_ex_0 ( .A(un1_irq_stall_lsu_req), .B(un1_instr_inhibit_ex_0), .C(stage_state_ex), .D(un5_instr_inhibit_ex_0), .Y(un1_gpr_wr_mux_sel_ex_i) ); defparam instr_inhibit_ex_0.INIT=16'h1030; // @46:6083 CFG4 gpr_rs2_rd_data_valid_7 ( .A(gpr_rs2_rd_data_valid_7_5_Z), .B(gpr_rs2_rd_valid_dbgpipe), .C(un3_rs2_rd_hzd_3_Z), .D(un3_rs2_rd_hzd_4_Z), .Y(gpr_rs2_rd_data_valid_7_1z) ); defparam gpr_rs2_rd_data_valid_7.INIT=16'h0888; // @46:6082 CFG4 gpr_rs1_rd_data_valid_6 ( .A(gpr_rs1_rd_valid_mux_0), .B(instr_inhibit_ex_1z), .C(d_m5_a0_0), .D(gpr_rs1_rd_data_valid_6_5_1z), .Y(gpr_rs1_rd_data_valid_6_1z) ); defparam gpr_rs1_rd_data_valid_6.INIT=16'h2000; // @46:6088 CFG4 gpr_wr_valid_int ( .A(ex_retr_pipe_gpr_wr_sel_retr[2]), .B(ex_retr_pipe_gpr_wr_sel_retr[3]), .C(gpr_wr_valid_retr), .D(un4_gpr_wr_valid_int_3_Z), .Y(gpr_wr_valid_int_Z) ); defparam gpr_wr_valid_int.INIT=16'hE0F0; // @46:6083 CFG3 gpr_rs2_rd_data_valid ( .A(gpr_rs2_rd_data_valid_7_1z), .B(gpr_wr_valid_retr), .C(un1_rs2_rd_hzd_4_1z), .Y(gpr_rs2_rd_data_valid_sig) ); defparam gpr_rs2_rd_data_valid.INIT=8'h2A; // @46:6241 miv_rv32_gpr_ram_array_32s_6s_32s \gen_gpr.u_gpr_array_0 ( .de_ex_pipe_gpr_rs2_rd_sel_ex(de_ex_pipe_gpr_rs2_rd_sel_ex[5:0]), .gpr_rs1_rd_data_sig(gpr_rs1_rd_data_sig[31:0]), .de_ex_pipe_gpr_rs1_rd_sel_ex(de_ex_pipe_gpr_rs1_rd_sel_ex[4:0]), .cpu_debug_gpr_op_rd_data_net(cpu_debug_gpr_op_rd_data_net[31:0]), .gpr_wr_data_retr(gpr_wr_data_retr[31:0]), .ex_retr_pipe_gpr_wr_sel_retr(ex_retr_pipe_gpr_wr_sel_retr[4:0]), .gpr_wr_valid_int(gpr_wr_valid_int_Z), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .un11_gpr_rs1_stall_exu(un11_gpr_rs1_stall_exu), .un11_gpr_rs2_stall_exu(un11_gpr_rs2_stall_exu) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_gpr_ram_0s_0_0s_32s */ module miv_rv32_irq_reg_0s ( un5_m_timer_irq_cry_63, interrupt_could_commit, lsu_resp_valid40, un6_instr_is_lsu_op_retr, irq_timer_enable_0, irq_sw_enable_2, interrupt_could_commit_0, un14_gpr_rs1_stall_lsu, trace_priv_i, stage_state_retr, ex_retr_pipe_gpr_wr_en_retr, un1_lsu_resp_valid38_1_i, req_resp_state_valid, interrupt_pending_a2_1, lsu_op_complete_retr_0_0_0, interrupt_pending_a0_1, interrupt_taken_timer, debug_enter_retr, un5_m_timer_irq_cry_63_i, PF_CCC_0_0_OUT0_FABCLK_0, dff, interrupt_captured_timer ) ; input un5_m_timer_irq_cry_63 ; input interrupt_could_commit ; input lsu_resp_valid40 ; input un6_instr_is_lsu_op_retr ; input irq_timer_enable_0 ; input irq_sw_enable_2 ; input interrupt_could_commit_0 ; input un14_gpr_rs1_stall_lsu ; input trace_priv_i ; input stage_state_retr ; input ex_retr_pipe_gpr_wr_en_retr ; input un1_lsu_resp_valid38_1_i ; input req_resp_state_valid ; input interrupt_pending_a2_1 ; input lsu_op_complete_retr_0_0_0 ; input interrupt_pending_a0_1 ; output interrupt_taken_timer ; input debug_enter_retr ; input un5_m_timer_irq_cry_63_i ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input dff ; output interrupt_captured_timer ; wire un5_m_timer_irq_cry_63 ; wire interrupt_could_commit ; wire lsu_resp_valid40 ; wire un6_instr_is_lsu_op_retr ; wire irq_timer_enable_0 ; wire irq_sw_enable_2 ; wire interrupt_could_commit_0 ; wire un14_gpr_rs1_stall_lsu ; wire trace_priv_i ; wire stage_state_retr ; wire ex_retr_pipe_gpr_wr_en_retr ; wire un1_lsu_resp_valid38_1_i ; wire req_resp_state_valid ; wire interrupt_pending_a2_1 ; wire lsu_op_complete_retr_0_0_0 ; wire interrupt_pending_a0_1 ; wire interrupt_taken_timer ; wire debug_enter_retr ; wire un5_m_timer_irq_cry_63_i ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire dff ; wire interrupt_captured_timer ; wire VCC ; wire interrupt_capture_reg4_Z ; wire GND ; wire interrupt_m5_0_1 ; wire interrupt_N_9_mux_i_1 ; wire interrupt_N_9_mux_i_1_0_Z ; wire interrupt_m2_0_0_0 ; wire interrupt_taken_a1_0_Z ; // @46:6765 SLE interrupt_capture_reg ( .Q(interrupt_captured_timer), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un5_m_timer_irq_cry_63_i), .EN(interrupt_capture_reg4_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:7360 CFG4 interrupt_capture_reg_RNIJ6N8I1 ( .A(interrupt_m5_0_1), .B(interrupt_N_9_mux_i_1), .C(interrupt_N_9_mux_i_1_0_Z), .D(debug_enter_retr), .Y(interrupt_taken_timer) ); defparam interrupt_capture_reg_RNIJ6N8I1.INIT=16'h5540; // @46:7360 CFG2 interrupt_N_9_mux_i_1_0 ( .A(interrupt_pending_a0_1), .B(lsu_op_complete_retr_0_0_0), .Y(interrupt_N_9_mux_i_1_0_Z) ); defparam interrupt_N_9_mux_i_1_0.INIT=4'h4; // @46:7360 CFG4 interrupt_taken_a1_0_RNISFEIG ( .A(interrupt_pending_a2_1), .B(req_resp_state_valid), .C(un1_lsu_resp_valid38_1_i), .D(interrupt_m2_0_0_0), .Y(interrupt_N_9_mux_i_1) ); defparam interrupt_taken_a1_0_RNISFEIG.INIT=16'h4055; // @46:6782 CFG4 interrupt_taken_a1_0 ( .A(ex_retr_pipe_gpr_wr_en_retr), .B(stage_state_retr), .C(trace_priv_i), .D(un14_gpr_rs1_stall_lsu), .Y(interrupt_taken_a1_0_Z) ); defparam interrupt_taken_a1_0.INIT=16'hA800; // @46:6782 CFG4 interrupt_capture_reg_RNI6EB8H ( .A(interrupt_captured_timer), .B(interrupt_could_commit_0), .C(irq_sw_enable_2), .D(irq_timer_enable_0), .Y(interrupt_m5_0_1) ); defparam interrupt_capture_reg_RNI6EB8H.INIT=16'h7FFF; // @46:6782 CFG4 interrupt_taken_a1_0_RNIG66O8 ( .A(un6_instr_is_lsu_op_retr), .B(req_resp_state_valid), .C(lsu_resp_valid40), .D(interrupt_taken_a1_0_Z), .Y(interrupt_m2_0_0_0) ); defparam interrupt_taken_a1_0_RNIG66O8.INIT=16'h3F15; // @46:6770 CFG2 interrupt_capture_reg4 ( .A(interrupt_could_commit), .B(un5_m_timer_irq_cry_63), .Y(interrupt_capture_reg4_Z) ); defparam interrupt_capture_reg4.INIT=4'hB; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_irq_reg_0s */ module miv_rv32_irq_reg_0s_0 ( req_buff_resp_state_valid, interrupt_could_commit, interrupt_pending_a3_0_1z, d_N_3_mux_3, interrupt_pending_a0_1_1z, gpr_wr_completing_retr_3_0_d, interrupt_pending_a2_1_1z, ex_retr_pipe_gpr_wr_en_retr, trace_priv_i, stage_state_retr, irq_sw_enable, debug_enter_retr, lsu_op_complete_retr_0, interrupt_taken_sw, interrupt_pending_2_1z, un14_gpr_rs1_stall_lsu, gpr_wr_en_retr, un1_lsu_resp_valid, haltreq_debug_enter_taken, ebreak_debug_enter_taken, step_debug_enter_taken, lsu_resp_valid40, trigger_debug_enter_taken, un1_lsu_resp_valid38_1_i, req_resp_state_valid, un6_instr_is_lsu_op_retr, hart_soft_irq_net, PF_CCC_0_0_OUT0_FABCLK_0, dff, interrupt_captured_sw ) ; input [1:0] req_buff_resp_state_valid ; input interrupt_could_commit ; output interrupt_pending_a3_0_1z ; input d_N_3_mux_3 ; output interrupt_pending_a0_1_1z ; input gpr_wr_completing_retr_3_0_d ; output interrupt_pending_a2_1_1z ; input ex_retr_pipe_gpr_wr_en_retr ; input trace_priv_i ; input stage_state_retr ; input irq_sw_enable ; input debug_enter_retr ; input lsu_op_complete_retr_0 ; output interrupt_taken_sw ; output interrupt_pending_2_1z ; input un14_gpr_rs1_stall_lsu ; input gpr_wr_en_retr ; input un1_lsu_resp_valid ; input haltreq_debug_enter_taken ; input ebreak_debug_enter_taken ; input step_debug_enter_taken ; input lsu_resp_valid40 ; input trigger_debug_enter_taken ; input un1_lsu_resp_valid38_1_i ; input req_resp_state_valid ; input un6_instr_is_lsu_op_retr ; input hart_soft_irq_net ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input dff ; output interrupt_captured_sw ; wire interrupt_could_commit ; wire interrupt_pending_a3_0_1z ; wire d_N_3_mux_3 ; wire interrupt_pending_a0_1_1z ; wire gpr_wr_completing_retr_3_0_d ; wire interrupt_pending_a2_1_1z ; wire ex_retr_pipe_gpr_wr_en_retr ; wire trace_priv_i ; wire stage_state_retr ; wire irq_sw_enable ; wire debug_enter_retr ; wire lsu_op_complete_retr_0 ; wire interrupt_taken_sw ; wire interrupt_pending_2_1z ; wire un14_gpr_rs1_stall_lsu ; wire gpr_wr_en_retr ; wire un1_lsu_resp_valid ; wire haltreq_debug_enter_taken ; wire ebreak_debug_enter_taken ; wire step_debug_enter_taken ; wire lsu_resp_valid40 ; wire trigger_debug_enter_taken ; wire un1_lsu_resp_valid38_1_i ; wire req_resp_state_valid ; wire un6_instr_is_lsu_op_retr ; wire hart_soft_irq_net ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire dff ; wire interrupt_captured_sw ; wire VCC ; wire interrupt_capture_reg4_Z ; wire GND ; wire interrupt_taken_0_3_1_1_Z ; wire interrupt_taken_0_3_1_Z ; wire interrupt_taken_a0_sx_Z ; wire interrupt_taken_a0_Z ; wire interrupt_taken_a4_sx_Z ; wire interrupt_taken_a4_Z ; wire interrupt_taken_0_1 ; wire interrupt_pending_2_0_Z ; wire interrupt_N_9 ; // @46:6765 SLE interrupt_capture_reg ( .Q(interrupt_captured_sw), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(hart_soft_irq_net), .EN(interrupt_capture_reg4_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:6782 CFG4 interrupt_taken_0_3_1 ( .A(un6_instr_is_lsu_op_retr), .B(req_resp_state_valid), .C(un1_lsu_resp_valid38_1_i), .D(interrupt_taken_0_3_1_1_Z), .Y(interrupt_taken_0_3_1_Z) ); defparam interrupt_taken_0_3_1.INIT=16'hE2CC; // @46:6782 CFG4 interrupt_taken_a0 ( .A(trigger_debug_enter_taken), .B(un1_lsu_resp_valid38_1_i), .C(lsu_resp_valid40), .D(interrupt_taken_a0_sx_Z), .Y(interrupt_taken_a0_Z) ); defparam interrupt_taken_a0.INIT=16'h0001; // @46:6782 CFG4 interrupt_taken_a0_sx ( .A(step_debug_enter_taken), .B(ebreak_debug_enter_taken), .C(un6_instr_is_lsu_op_retr), .D(haltreq_debug_enter_taken), .Y(interrupt_taken_a0_sx_Z) ); defparam interrupt_taken_a0_sx.INIT=16'hFFFE; // @46:6782 CFG4 interrupt_taken_a4 ( .A(haltreq_debug_enter_taken), .B(interrupt_taken_a4_sx_Z), .C(trigger_debug_enter_taken), .D(un1_lsu_resp_valid), .Y(interrupt_taken_a4_Z) ); defparam interrupt_taken_a4.INIT=16'h0001; // @46:6782 CFG4 interrupt_taken_a4_sx ( .A(ebreak_debug_enter_taken), .B(step_debug_enter_taken), .C(gpr_wr_en_retr), .D(un14_gpr_rs1_stall_lsu), .Y(interrupt_taken_a4_sx_Z) ); defparam interrupt_taken_a4_sx.INIT=16'hEFFF; // @46:6782 CFG4 interrupt_taken_0_3_1_1 ( .A(gpr_wr_en_retr), .B(lsu_resp_valid40), .C(req_resp_state_valid), .D(un14_gpr_rs1_stall_lsu), .Y(interrupt_taken_0_3_1_1_Z) ); defparam interrupt_taken_0_3_1_1.INIT=16'h250F; // @46:6782 CFG4 interrupt_taken_0 ( .A(interrupt_taken_a4_Z), .B(interrupt_taken_a0_Z), .C(interrupt_taken_0_1), .D(interrupt_pending_2_1z), .Y(interrupt_taken_sw) ); defparam interrupt_taken_0.INIT=16'h0100; // @46:6782 CFG4 interrupt_taken_0_1_0 ( .A(lsu_op_complete_retr_0), .B(debug_enter_retr), .C(irq_sw_enable), .D(interrupt_taken_0_3_1_Z), .Y(interrupt_taken_0_1) ); defparam interrupt_taken_0_1_0.INIT=16'h1F3F; // @46:6780 CFG4 interrupt_pending_2_0 ( .A(req_buff_resp_state_valid[1]), .B(interrupt_captured_sw), .C(stage_state_retr), .D(req_buff_resp_state_valid[0]), .Y(interrupt_pending_2_0_Z) ); defparam interrupt_pending_2_0.INIT=16'h0040; // @46:6780 CFG3 interrupt_pending_a2_1 ( .A(trace_priv_i), .B(un14_gpr_rs1_stall_lsu), .C(ex_retr_pipe_gpr_wr_en_retr), .Y(interrupt_pending_a2_1_1z) ); defparam interrupt_pending_a2_1.INIT=8'h80; // @46:6780 CFG3 interrupt_pending_a3_0_RNO ( .A(un6_instr_is_lsu_op_retr), .B(lsu_resp_valid40), .C(un1_lsu_resp_valid38_1_i), .Y(interrupt_N_9) ); defparam interrupt_pending_a3_0_RNO.INIT=8'h01; // @46:6780 CFG3 interrupt_pending_a0_1 ( .A(un14_gpr_rs1_stall_lsu), .B(gpr_wr_en_retr), .C(gpr_wr_completing_retr_3_0_d), .Y(interrupt_pending_a0_1_1z) ); defparam interrupt_pending_a0_1.INIT=8'h04; // @46:6780 CFG4 interrupt_pending_2 ( .A(interrupt_pending_a2_1_1z), .B(interrupt_pending_2_0_Z), .C(debug_enter_retr), .D(interrupt_pending_a0_1_1z), .Y(interrupt_pending_2_1z) ); defparam interrupt_pending_2.INIT=16'hC0C4; // @46:6780 CFG4 interrupt_pending_a3_0 ( .A(d_N_3_mux_3), .B(interrupt_N_9), .C(lsu_op_complete_retr_0), .D(debug_enter_retr), .Y(interrupt_pending_a3_0_1z) ); defparam interrupt_pending_a3_0.INIT=16'h00EF; // @46:6770 CFG2 interrupt_capture_reg4 ( .A(interrupt_could_commit), .B(hart_soft_irq_net), .Y(interrupt_capture_reg4_Z) ); defparam interrupt_capture_reg4.INIT=4'hE; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_irq_reg_0s_0 */ module miv_rv32_priv_irq_2s_0_0 ( req_buff_resp_state_valid, cause_excpt_code_irq_0, hart_soft_irq_net, trigger_debug_enter_taken, step_debug_enter_taken, ebreak_debug_enter_taken, haltreq_debug_enter_taken, un1_lsu_resp_valid, gpr_wr_en_retr, interrupt_pending_2, lsu_op_complete_retr_0, gpr_wr_completing_retr_3_0_d, d_N_3_mux_3, interrupt_pending_a3_0, dff, PF_CCC_0_0_OUT0_FABCLK_0, un5_m_timer_irq_cry_63_i, debug_enter_retr, lsu_op_complete_retr_0_0_0, req_resp_state_valid, un1_lsu_resp_valid38_1_i, ex_retr_pipe_gpr_wr_en_retr, un14_gpr_rs1_stall_lsu, un6_instr_is_lsu_op_retr, lsu_resp_valid40, interrupt_could_commit, un5_m_timer_irq_cry_63, un1_irq_stall_lsu_req_1z, interrupt_captured_timer, interrupt_captured_sw, ie_msie, un3_irq_stall_lsu_req_1z, dcsr_stepie, dcsr_step, status_mie, interrupt_could_commit_0_1z, stage_state_retr, un1_interrupt_taken_timer_2_i, interrupt_taken_timer, interrupt_taken_sw, ie_mtie, trace_priv_i ) ; input [1:0] req_buff_resp_state_valid ; output cause_excpt_code_irq_0 ; input hart_soft_irq_net ; input trigger_debug_enter_taken ; input step_debug_enter_taken ; input ebreak_debug_enter_taken ; input haltreq_debug_enter_taken ; input un1_lsu_resp_valid ; input gpr_wr_en_retr ; output interrupt_pending_2 ; input lsu_op_complete_retr_0 ; input gpr_wr_completing_retr_3_0_d ; input d_N_3_mux_3 ; output interrupt_pending_a3_0 ; input dff ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input un5_m_timer_irq_cry_63_i ; input debug_enter_retr ; input lsu_op_complete_retr_0_0_0 ; input req_resp_state_valid ; input un1_lsu_resp_valid38_1_i ; input ex_retr_pipe_gpr_wr_en_retr ; input un14_gpr_rs1_stall_lsu ; input un6_instr_is_lsu_op_retr ; input lsu_resp_valid40 ; input interrupt_could_commit ; input un5_m_timer_irq_cry_63 ; output un1_irq_stall_lsu_req_1z ; output interrupt_captured_timer ; output interrupt_captured_sw ; input ie_msie ; output un3_irq_stall_lsu_req_1z ; input dcsr_stepie ; input dcsr_step ; input status_mie ; output interrupt_could_commit_0_1z ; input stage_state_retr ; output un1_interrupt_taken_timer_2_i ; output interrupt_taken_timer ; output interrupt_taken_sw ; input ie_mtie ; input trace_priv_i ; wire cause_excpt_code_irq_0 ; wire hart_soft_irq_net ; wire trigger_debug_enter_taken ; wire step_debug_enter_taken ; wire ebreak_debug_enter_taken ; wire haltreq_debug_enter_taken ; wire un1_lsu_resp_valid ; wire gpr_wr_en_retr ; wire interrupt_pending_2 ; wire lsu_op_complete_retr_0 ; wire gpr_wr_completing_retr_3_0_d ; wire d_N_3_mux_3 ; wire interrupt_pending_a3_0 ; wire dff ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire un5_m_timer_irq_cry_63_i ; wire debug_enter_retr ; wire lsu_op_complete_retr_0_0_0 ; wire req_resp_state_valid ; wire un1_lsu_resp_valid38_1_i ; wire ex_retr_pipe_gpr_wr_en_retr ; wire un14_gpr_rs1_stall_lsu ; wire un6_instr_is_lsu_op_retr ; wire lsu_resp_valid40 ; wire interrupt_could_commit ; wire un5_m_timer_irq_cry_63 ; wire un1_irq_stall_lsu_req_1z ; wire interrupt_captured_timer ; wire interrupt_captured_sw ; wire ie_msie ; wire un3_irq_stall_lsu_req_1z ; wire dcsr_stepie ; wire dcsr_step ; wire status_mie ; wire interrupt_could_commit_0_1z ; wire stage_state_retr ; wire un1_interrupt_taken_timer_2_i ; wire interrupt_taken_timer ; wire interrupt_taken_sw ; wire ie_mtie ; wire trace_priv_i ; wire irq_timer_enable_0_Z ; wire irq_sw_enable_2_Z ; wire irq_sw_enable_Z ; wire interrupt_lsu_stall_sw_Z ; wire interrupt_pending_a2_1 ; wire interrupt_pending_a0_1 ; wire GND ; wire VCC ; // @46:7005 CFG2 irq_timer_enable_0 ( .A(trace_priv_i), .B(ie_mtie), .Y(irq_timer_enable_0_Z) ); defparam irq_timer_enable_0.INIT=4'h4; // @46:7360 CFG2 un1_interrupt_taken_timer_2 ( .A(interrupt_taken_sw), .B(interrupt_taken_timer), .Y(un1_interrupt_taken_timer_2_i) ); defparam un1_interrupt_taken_timer_2.INIT=4'h4; // @46:7340 CFG2 irq_taken ( .A(interrupt_taken_sw), .B(interrupt_taken_timer), .Y(cause_excpt_code_irq_0) ); defparam irq_taken.INIT=4'hE; // @46:7008 CFG3 interrupt_could_commit_0 ( .A(req_buff_resp_state_valid[1]), .B(req_buff_resp_state_valid[0]), .C(stage_state_retr), .Y(interrupt_could_commit_0_1z) ); defparam interrupt_could_commit_0.INIT=8'h10; // @46:7006 CFG3 irq_sw_enable_2 ( .A(status_mie), .B(dcsr_step), .C(dcsr_stepie), .Y(irq_sw_enable_2_Z) ); defparam irq_sw_enable_2.INIT=8'hA2; // @46:7328 CFG3 un3_irq_stall_lsu_req ( .A(req_buff_resp_state_valid[1]), .B(req_buff_resp_state_valid[0]), .C(stage_state_retr), .Y(un3_irq_stall_lsu_req_1z) ); defparam un3_irq_stall_lsu_req.INIT=8'hFE; // @46:7006 CFG3 irq_sw_enable ( .A(irq_sw_enable_2_Z), .B(trace_priv_i), .C(ie_msie), .Y(irq_sw_enable_Z) ); defparam irq_sw_enable.INIT=8'h20; // @46:7071 CFG4 interrupt_lsu_stall_sw ( .A(irq_sw_enable_2_Z), .B(trace_priv_i), .C(interrupt_captured_sw), .D(ie_msie), .Y(interrupt_lsu_stall_sw_Z) ); defparam interrupt_lsu_stall_sw.INIT=16'h2000; // @46:7320 CFG4 un1_irq_stall_lsu_req ( .A(irq_sw_enable_2_Z), .B(interrupt_captured_timer), .C(interrupt_lsu_stall_sw_Z), .D(irq_timer_enable_0_Z), .Y(un1_irq_stall_lsu_req_1z) ); defparam un1_irq_stall_lsu_req.INIT=16'hF8F0; // @46:7037 miv_rv32_irq_reg_0s u_miv_rv32_irq_reg_timer ( .un5_m_timer_irq_cry_63(un5_m_timer_irq_cry_63), .interrupt_could_commit(interrupt_could_commit), .lsu_resp_valid40(lsu_resp_valid40), .un6_instr_is_lsu_op_retr(un6_instr_is_lsu_op_retr), .irq_timer_enable_0(irq_timer_enable_0_Z), .irq_sw_enable_2(irq_sw_enable_2_Z), .interrupt_could_commit_0(interrupt_could_commit_0_1z), .un14_gpr_rs1_stall_lsu(un14_gpr_rs1_stall_lsu), .trace_priv_i(trace_priv_i), .stage_state_retr(stage_state_retr), .ex_retr_pipe_gpr_wr_en_retr(ex_retr_pipe_gpr_wr_en_retr), .un1_lsu_resp_valid38_1_i(un1_lsu_resp_valid38_1_i), .req_resp_state_valid(req_resp_state_valid), .interrupt_pending_a2_1(interrupt_pending_a2_1), .lsu_op_complete_retr_0_0_0(lsu_op_complete_retr_0_0_0), .interrupt_pending_a0_1(interrupt_pending_a0_1), .interrupt_taken_timer(interrupt_taken_timer), .debug_enter_retr(debug_enter_retr), .un5_m_timer_irq_cry_63_i(un5_m_timer_irq_cry_63_i), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .dff(dff), .interrupt_captured_timer(interrupt_captured_timer) ); // @46:7058 miv_rv32_irq_reg_0s_0 u_miv_rv32_irq_reg_sw ( .req_buff_resp_state_valid(req_buff_resp_state_valid[1:0]), .interrupt_could_commit(interrupt_could_commit), .interrupt_pending_a3_0_1z(interrupt_pending_a3_0), .d_N_3_mux_3(d_N_3_mux_3), .interrupt_pending_a0_1_1z(interrupt_pending_a0_1), .gpr_wr_completing_retr_3_0_d(gpr_wr_completing_retr_3_0_d), .interrupt_pending_a2_1_1z(interrupt_pending_a2_1), .ex_retr_pipe_gpr_wr_en_retr(ex_retr_pipe_gpr_wr_en_retr), .trace_priv_i(trace_priv_i), .stage_state_retr(stage_state_retr), .irq_sw_enable(irq_sw_enable_Z), .debug_enter_retr(debug_enter_retr), .lsu_op_complete_retr_0(lsu_op_complete_retr_0), .interrupt_taken_sw(interrupt_taken_sw), .interrupt_pending_2_1z(interrupt_pending_2), .un14_gpr_rs1_stall_lsu(un14_gpr_rs1_stall_lsu), .gpr_wr_en_retr(gpr_wr_en_retr), .un1_lsu_resp_valid(un1_lsu_resp_valid), .haltreq_debug_enter_taken(haltreq_debug_enter_taken), .ebreak_debug_enter_taken(ebreak_debug_enter_taken), .step_debug_enter_taken(step_debug_enter_taken), .lsu_resp_valid40(lsu_resp_valid40), .trigger_debug_enter_taken(trigger_debug_enter_taken), .un1_lsu_resp_valid38_1_i(un1_lsu_resp_valid38_1_i), .req_resp_state_valid(req_resp_state_valid), .un6_instr_is_lsu_op_retr(un6_instr_is_lsu_op_retr), .hart_soft_irq_net(hart_soft_irq_net), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .dff(dff), .interrupt_captured_sw(interrupt_captured_sw) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_priv_irq_2s_0_0 */ module miv_rv32_csr_decode_0s_1s_0s ( un1_u_miv_rv32_csr_decode_0_1_0, un1_u_miv_rv32_csr_decode_0_60, un1_u_miv_rv32_csr_decode_0_58, un1_u_miv_rv32_csr_decode_0_53, un1_u_miv_rv32_csr_decode_0_47, un1_u_miv_rv32_csr_decode_0_4, un1_u_miv_rv32_csr_decode_0_3, un1_u_miv_rv32_csr_decode_0_1_d0, un1_u_miv_rv32_csr_decode_0_0, un1_u_miv_rv32_csr_decode_0_16, un1_u_miv_rv32_csr_decode_0_15, un1_u_miv_rv32_csr_decode_0_40, un1_u_miv_rv32_csr_decode_0_37, un1_u_miv_rv32_csr_decode_0_41, un1_u_miv_rv32_csr_decode_0_42, un1_u_miv_rv32_csr_decode_0_43, un1_u_miv_rv32_csr_decode_0_50, un1_u_miv_rv32_csr_decode_0_56, un1_u_miv_rv32_csr_decode_0_2_3, un1_u_miv_rv32_csr_decode_0_2_0, ex_retr_pipe_sw_csr_addr_retr, mie_sw_wr_sel, mscratch_sw_wr_sel, mepc_sw_wr_sel_3, mcause_sw_wr_sel_3, sw_csr_wr_valid_qual, cpu_debug_csr_op_rd_data_valid_net, csr_op_rd_valid, mie_sw_wr_sel_1, mtval_sw_wr_sel_1, mepc_sw_rd_sel_1, mtvec_sw_rd_sel_1, mcause_sw_rd_sel_1, mstatus_sw_rd_sel_1, dcsr_debugger_wr_sel_1, dcsr_debugger_wr_sel_0, mip_sw_rd_sel_3, mepc_sw_rd_sel_3, stage_state_retr, ex_retr_pipe_sw_csr_rd_op_retr, N_1410_4, dpc_debugger_wr_sel_1, un29_csr_trigger_wr_hzd_de_1, N_1410_2, trace_priv_i, un29_csr_trigger_wr_hzd_de_4, bcu_operand1_valid_6_i_a2_0_2, tdata1_sw_rd_sel_7, tdata2_sw_rd_sel_7, mimpid_sw_rd_sel_3 ) ; output un1_u_miv_rv32_csr_decode_0_1_0 ; output un1_u_miv_rv32_csr_decode_0_60 ; output un1_u_miv_rv32_csr_decode_0_58 ; output un1_u_miv_rv32_csr_decode_0_53 ; output un1_u_miv_rv32_csr_decode_0_47 ; output un1_u_miv_rv32_csr_decode_0_4 ; output un1_u_miv_rv32_csr_decode_0_3 ; output un1_u_miv_rv32_csr_decode_0_1_d0 ; output un1_u_miv_rv32_csr_decode_0_0 ; output un1_u_miv_rv32_csr_decode_0_16 ; output un1_u_miv_rv32_csr_decode_0_15 ; output un1_u_miv_rv32_csr_decode_0_40 ; output un1_u_miv_rv32_csr_decode_0_37 ; output un1_u_miv_rv32_csr_decode_0_41 ; output un1_u_miv_rv32_csr_decode_0_42 ; output un1_u_miv_rv32_csr_decode_0_43 ; output un1_u_miv_rv32_csr_decode_0_50 ; output un1_u_miv_rv32_csr_decode_0_56 ; output un1_u_miv_rv32_csr_decode_0_2_3 ; output un1_u_miv_rv32_csr_decode_0_2_0 ; input [11:0] ex_retr_pipe_sw_csr_addr_retr ; output mie_sw_wr_sel ; output mscratch_sw_wr_sel ; output mepc_sw_wr_sel_3 ; output mcause_sw_wr_sel_3 ; input sw_csr_wr_valid_qual ; input cpu_debug_csr_op_rd_data_valid_net ; input csr_op_rd_valid ; output mie_sw_wr_sel_1 ; output mtval_sw_wr_sel_1 ; output mepc_sw_rd_sel_1 ; output mtvec_sw_rd_sel_1 ; output mcause_sw_rd_sel_1 ; output mstatus_sw_rd_sel_1 ; output dcsr_debugger_wr_sel_1 ; input dcsr_debugger_wr_sel_0 ; output mip_sw_rd_sel_3 ; output mepc_sw_rd_sel_3 ; input stage_state_retr ; input ex_retr_pipe_sw_csr_rd_op_retr ; input N_1410_4 ; output dpc_debugger_wr_sel_1 ; input un29_csr_trigger_wr_hzd_de_1 ; input N_1410_2 ; input trace_priv_i ; input un29_csr_trigger_wr_hzd_de_4 ; input bcu_operand1_valid_6_i_a2_0_2 ; output tdata1_sw_rd_sel_7 ; output tdata2_sw_rd_sel_7 ; output mimpid_sw_rd_sel_3 ; wire un1_u_miv_rv32_csr_decode_0_1_0 ; wire un1_u_miv_rv32_csr_decode_0_60 ; wire un1_u_miv_rv32_csr_decode_0_58 ; wire un1_u_miv_rv32_csr_decode_0_53 ; wire un1_u_miv_rv32_csr_decode_0_47 ; wire un1_u_miv_rv32_csr_decode_0_4 ; wire un1_u_miv_rv32_csr_decode_0_3 ; wire un1_u_miv_rv32_csr_decode_0_1_d0 ; wire un1_u_miv_rv32_csr_decode_0_0 ; wire un1_u_miv_rv32_csr_decode_0_16 ; wire un1_u_miv_rv32_csr_decode_0_15 ; wire un1_u_miv_rv32_csr_decode_0_40 ; wire un1_u_miv_rv32_csr_decode_0_37 ; wire un1_u_miv_rv32_csr_decode_0_41 ; wire un1_u_miv_rv32_csr_decode_0_42 ; wire un1_u_miv_rv32_csr_decode_0_43 ; wire un1_u_miv_rv32_csr_decode_0_50 ; wire un1_u_miv_rv32_csr_decode_0_56 ; wire un1_u_miv_rv32_csr_decode_0_2_3 ; wire un1_u_miv_rv32_csr_decode_0_2_0 ; wire mie_sw_wr_sel ; wire mscratch_sw_wr_sel ; wire mepc_sw_wr_sel_3 ; wire mcause_sw_wr_sel_3 ; wire sw_csr_wr_valid_qual ; wire cpu_debug_csr_op_rd_data_valid_net ; wire csr_op_rd_valid ; wire mie_sw_wr_sel_1 ; wire mtval_sw_wr_sel_1 ; wire mepc_sw_rd_sel_1 ; wire mtvec_sw_rd_sel_1 ; wire mcause_sw_rd_sel_1 ; wire mstatus_sw_rd_sel_1 ; wire dcsr_debugger_wr_sel_1 ; wire dcsr_debugger_wr_sel_0 ; wire mip_sw_rd_sel_3 ; wire mepc_sw_rd_sel_3 ; wire stage_state_retr ; wire ex_retr_pipe_sw_csr_rd_op_retr ; wire N_1410_4 ; wire dpc_debugger_wr_sel_1 ; wire un29_csr_trigger_wr_hzd_de_1 ; wire N_1410_2 ; wire trace_priv_i ; wire un29_csr_trigger_wr_hzd_de_4 ; wire bcu_operand1_valid_6_i_a2_0_2 ; wire tdata1_sw_rd_sel_7 ; wire tdata2_sw_rd_sel_7 ; wire mimpid_sw_rd_sel_3 ; wire [63:6] un1_u_miv_rv32_csr_decode_0_2; wire mepc_sw_rd_sel_1_0 ; wire mcause_sw_rd_sel_1_0 ; wire mie_sw_wr_sel_1_0 ; wire dpc_debugger_rd_sel_1 ; wire dpc_debugger_rd_sel_7 ; wire mie_sw_rd_sel_4 ; wire mie_sw_rd_sel_5 ; wire mie_sw_rd_sel_3 ; wire utime_sw_rd_sel_3 ; wire mvendorid_sw_rd_sel_0 ; wire mimpid_sw_rd_sel_1 ; wire mip_sw_rd_sel_2 ; wire utimeh_sw_rd_sel_2_0 ; wire mtvec_sw_rd_sel_1_1 ; wire mtval_sw_rd_sel_1_0 ; wire dcsr_debugger_rd_sel_8 ; wire misa_sw_rd_sel_8 ; wire mscratch_sw_rd_sel_8 ; wire misa_sw_rd_sel_1 ; wire utime_sw_rd_sel_4 ; wire utimeh_sw_rd_sel_5 ; wire utime_sw_rd_sel_2 ; wire mscratch_sw_rd_sel_1 ; wire GND ; wire VCC ; // @46:1211 CFG2 \csr_reg_rd_sel.mepc_sw_rd_sel_1_0 ( .A(ex_retr_pipe_sw_csr_addr_retr[0]), .B(ex_retr_pipe_sw_csr_addr_retr[6]), .Y(mepc_sw_rd_sel_1_0) ); defparam \csr_reg_rd_sel.mepc_sw_rd_sel_1_0 .INIT=4'h8; // @46:1214 CFG2 \csr_reg_rd_sel.mcause_sw_rd_sel_1_0 ( .A(ex_retr_pipe_sw_csr_addr_retr[1]), .B(ex_retr_pipe_sw_csr_addr_retr[6]), .Y(mcause_sw_rd_sel_1_0) ); defparam \csr_reg_rd_sel.mcause_sw_rd_sel_1_0 .INIT=4'h8; // @46:1195 CFG2 \csr_reg_wr_sel.mie_sw_wr_sel_1_0 ( .A(ex_retr_pipe_sw_csr_addr_retr[8]), .B(ex_retr_pipe_sw_csr_addr_retr[2]), .Y(mie_sw_wr_sel_1_0) ); defparam \csr_reg_wr_sel.mie_sw_wr_sel_1_0 .INIT=4'h8; // @46:1355 CFG2 \csr_reg_rd_sel.dpc_debugger_rd_sel_1 ( .A(ex_retr_pipe_sw_csr_addr_retr[0]), .B(ex_retr_pipe_sw_csr_addr_retr[4]), .Y(dpc_debugger_rd_sel_1) ); defparam \csr_reg_rd_sel.dpc_debugger_rd_sel_1 .INIT=4'h8; // @46:1353 CFG2 \csr_reg_rd_sel.dcsr_debugger_rd_sel_7 ( .A(ex_retr_pipe_sw_csr_addr_retr[6]), .B(ex_retr_pipe_sw_csr_addr_retr[11]), .Y(dpc_debugger_rd_sel_7) ); defparam \csr_reg_rd_sel.dcsr_debugger_rd_sel_7 .INIT=4'h1; // @46:1192 CFG2 \csr_reg_rd_sel.mie_sw_rd_sel_4 ( .A(ex_retr_pipe_sw_csr_addr_retr[3]), .B(ex_retr_pipe_sw_csr_addr_retr[4]), .Y(mie_sw_rd_sel_4) ); defparam \csr_reg_rd_sel.mie_sw_rd_sel_4 .INIT=4'h1; // @46:1192 CFG2 \csr_reg_rd_sel.mie_sw_rd_sel_5 ( .A(ex_retr_pipe_sw_csr_addr_retr[6]), .B(ex_retr_pipe_sw_csr_addr_retr[5]), .Y(mie_sw_rd_sel_5) ); defparam \csr_reg_rd_sel.mie_sw_rd_sel_5 .INIT=4'h1; // @46:1169 CFG2 \csr_reg_rd_sel.mimpid_sw_rd_sel_3 ( .A(ex_retr_pipe_sw_csr_addr_retr[9]), .B(ex_retr_pipe_sw_csr_addr_retr[10]), .Y(mimpid_sw_rd_sel_3) ); defparam \csr_reg_rd_sel.mimpid_sw_rd_sel_3 .INIT=4'h8; // @46:1192 CFG2 \csr_reg_rd_sel.mie_sw_rd_sel_3 ( .A(ex_retr_pipe_sw_csr_addr_retr[1]), .B(ex_retr_pipe_sw_csr_addr_retr[0]), .Y(mie_sw_rd_sel_3) ); defparam \csr_reg_rd_sel.mie_sw_rd_sel_3 .INIT=4'h1; // @46:1274 CFG4 \csr_reg_rd_sel.utime_sw_rd_sel_3 ( .A(ex_retr_pipe_sw_csr_addr_retr[8]), .B(ex_retr_pipe_sw_csr_addr_retr[1]), .C(ex_retr_pipe_sw_csr_addr_retr[7]), .D(ex_retr_pipe_sw_csr_addr_retr[2]), .Y(utime_sw_rd_sel_3) ); defparam \csr_reg_rd_sel.utime_sw_rd_sel_3 .INIT=16'h0001; // @46:1163 CFG3 \csr_reg_rd_sel.mvendorid_sw_rd_sel_0 ( .A(ex_retr_pipe_sw_csr_addr_retr[10]), .B(dpc_debugger_rd_sel_1), .C(ex_retr_pipe_sw_csr_addr_retr[11]), .Y(mvendorid_sw_rd_sel_0) ); defparam \csr_reg_rd_sel.mvendorid_sw_rd_sel_0 .INIT=8'h80; // @46:1169 CFG4 \csr_reg_rd_sel.mimpid_sw_rd_sel_1_0 ( .A(ex_retr_pipe_sw_csr_addr_retr[4]), .B(ex_retr_pipe_sw_csr_addr_retr[8]), .C(ex_retr_pipe_sw_csr_addr_retr[0]), .D(ex_retr_pipe_sw_csr_addr_retr[1]), .Y(mimpid_sw_rd_sel_1) ); defparam \csr_reg_rd_sel.mimpid_sw_rd_sel_1_0 .INIT=16'h8000; // @46:1199 CFG4 \csr_reg_rd_sel.mip_sw_rd_sel_2 ( .A(ex_retr_pipe_sw_csr_addr_retr[6]), .B(ex_retr_pipe_sw_csr_addr_retr[1]), .C(ex_retr_pipe_sw_csr_addr_retr[3]), .D(ex_retr_pipe_sw_csr_addr_retr[2]), .Y(mip_sw_rd_sel_2) ); defparam \csr_reg_rd_sel.mip_sw_rd_sel_2 .INIT=16'h0200; // @46:1276 CFG4 \csr_reg_rd_sel.utimeh_sw_rd_sel_2 ( .A(ex_retr_pipe_sw_csr_addr_retr[6]), .B(ex_retr_pipe_sw_csr_addr_retr[7]), .C(ex_retr_pipe_sw_csr_addr_retr[9]), .D(ex_retr_pipe_sw_csr_addr_retr[8]), .Y(utimeh_sw_rd_sel_2_0) ); defparam \csr_reg_rd_sel.utimeh_sw_rd_sel_2 .INIT=16'h0004; // @46:1208 CFG4 \csr_reg_rd_sel.mtvec_sw_rd_sel_1_1 ( .A(ex_retr_pipe_sw_csr_addr_retr[4]), .B(ex_retr_pipe_sw_csr_addr_retr[3]), .C(ex_retr_pipe_sw_csr_addr_retr[2]), .D(ex_retr_pipe_sw_csr_addr_retr[0]), .Y(mtvec_sw_rd_sel_1_1) ); defparam \csr_reg_rd_sel.mtvec_sw_rd_sel_1_1 .INIT=16'h1000; // @46:1217 CFG4 \csr_reg_rd_sel.mtval_sw_rd_sel_1_0 ( .A(ex_retr_pipe_sw_csr_addr_retr[6]), .B(ex_retr_pipe_sw_csr_addr_retr[8]), .C(ex_retr_pipe_sw_csr_addr_retr[0]), .D(ex_retr_pipe_sw_csr_addr_retr[1]), .Y(mtval_sw_rd_sel_1_0) ); defparam \csr_reg_rd_sel.mtval_sw_rd_sel_1_0 .INIT=16'h8000; // @46:1353 CFG4 \csr_reg_rd_sel.dcsr_debugger_rd_sel_8 ( .A(ex_retr_pipe_sw_csr_addr_retr[4]), .B(ex_retr_pipe_sw_csr_addr_retr[5]), .C(ex_retr_pipe_sw_csr_addr_retr[8]), .D(ex_retr_pipe_sw_csr_addr_retr[7]), .Y(dcsr_debugger_rd_sel_8) ); defparam \csr_reg_rd_sel.dcsr_debugger_rd_sel_8 .INIT=16'h8000; // @46:1346 CFG4 \csr_reg_rd_sel.tdata2_sw_rd_sel_7 ( .A(ex_retr_pipe_sw_csr_addr_retr[8]), .B(ex_retr_pipe_sw_csr_addr_retr[1]), .C(ex_retr_pipe_sw_csr_addr_retr[5]), .D(ex_retr_pipe_sw_csr_addr_retr[7]), .Y(tdata2_sw_rd_sel_7) ); defparam \csr_reg_rd_sel.tdata2_sw_rd_sel_7 .INIT=16'h8000; // @46:1344 CFG4 \csr_reg_rd_sel.tdata1_sw_rd_sel_7 ( .A(ex_retr_pipe_sw_csr_addr_retr[8]), .B(ex_retr_pipe_sw_csr_addr_retr[0]), .C(ex_retr_pipe_sw_csr_addr_retr[5]), .D(ex_retr_pipe_sw_csr_addr_retr[7]), .Y(tdata1_sw_rd_sel_7) ); defparam \csr_reg_rd_sel.tdata1_sw_rd_sel_7 .INIT=16'h8000; // @46:1183 CFG4 \csr_reg_rd_sel.misa_sw_rd_sel_8 ( .A(ex_retr_pipe_sw_csr_addr_retr[4]), .B(ex_retr_pipe_sw_csr_addr_retr[3]), .C(ex_retr_pipe_sw_csr_addr_retr[2]), .D(ex_retr_pipe_sw_csr_addr_retr[1]), .Y(misa_sw_rd_sel_8) ); defparam \csr_reg_rd_sel.misa_sw_rd_sel_8 .INIT=16'h0001; // @46:1353 CFG4 \csr_reg_rd_sel.dcsr_debugger_rd_sel_10 ( .A(ex_retr_pipe_sw_csr_addr_retr[2]), .B(ex_retr_pipe_sw_csr_addr_retr[3]), .C(ex_retr_pipe_sw_csr_addr_retr[1]), .D(ex_retr_pipe_sw_csr_addr_retr[0]), .Y(mscratch_sw_rd_sel_8) ); defparam \csr_reg_rd_sel.dcsr_debugger_rd_sel_10 .INIT=16'h0001; // @46:1183 CFG3 \csr_reg_rd_sel.misa_sw_rd_sel_1 ( .A(ex_retr_pipe_sw_csr_addr_retr[0]), .B(misa_sw_rd_sel_8), .C(ex_retr_pipe_sw_csr_addr_retr[8]), .Y(misa_sw_rd_sel_1) ); defparam \csr_reg_rd_sel.misa_sw_rd_sel_1 .INIT=8'h80; // @46:1274 CFG4 \csr_reg_rd_sel.utime_sw_rd_sel_4 ( .A(ex_retr_pipe_sw_csr_addr_retr[0]), .B(mie_sw_rd_sel_5), .C(ex_retr_pipe_sw_csr_addr_retr[10]), .D(ex_retr_pipe_sw_csr_addr_retr[9]), .Y(utime_sw_rd_sel_4) ); defparam \csr_reg_rd_sel.utime_sw_rd_sel_4 .INIT=16'h0080; // @46:1276 CFG4 \csr_reg_rd_sel.utimeh_sw_rd_sel_5 ( .A(ex_retr_pipe_sw_csr_addr_retr[11]), .B(ex_retr_pipe_sw_csr_addr_retr[10]), .C(bcu_operand1_valid_6_i_a2_0_2), .D(un29_csr_trigger_wr_hzd_de_4), .Y(utimeh_sw_rd_sel_5) ); defparam \csr_reg_rd_sel.utimeh_sw_rd_sel_5 .INIT=16'h8000; // @46:1169 CFG4 \csr_reg_rd_sel.mimpid_sw_rd_sel_2_0 ( .A(ex_retr_pipe_sw_csr_addr_retr[2]), .B(mie_sw_rd_sel_5), .C(ex_retr_pipe_sw_csr_addr_retr[3]), .D(ex_retr_pipe_sw_csr_addr_retr[7]), .Y(un1_u_miv_rv32_csr_decode_0_2[63]) ); defparam \csr_reg_rd_sel.mimpid_sw_rd_sel_2_0 .INIT=16'h0004; // @46:1344 CFG4 \csr_reg_rd_sel.tdata1_sw_rd_sel_2_0 ( .A(ex_retr_pipe_sw_csr_addr_retr[4]), .B(ex_retr_pipe_sw_csr_addr_retr[11]), .C(un29_csr_trigger_wr_hzd_de_4), .D(ex_retr_pipe_sw_csr_addr_retr[6]), .Y(un1_u_miv_rv32_csr_decode_0_2_3) ); defparam \csr_reg_rd_sel.tdata1_sw_rd_sel_2_0 .INIT=16'h0010; // @46:1355 CFG4 \csr_reg_rd_sel.dpc_debugger_rd_sel_2_0 ( .A(trace_priv_i), .B(un29_csr_trigger_wr_hzd_de_4), .C(ex_retr_pipe_sw_csr_addr_retr[1]), .D(dpc_debugger_rd_sel_7), .Y(un1_u_miv_rv32_csr_decode_0_2_0) ); defparam \csr_reg_rd_sel.dpc_debugger_rd_sel_2_0 .INIT=16'h0800; // @46:1356 CFG4 \csr_reg_wr_sel.dpc_debugger_wr_sel_1 ( .A(dpc_debugger_rd_sel_1), .B(N_1410_2), .C(ex_retr_pipe_sw_csr_addr_retr[10]), .D(un29_csr_trigger_wr_hzd_de_1), .Y(dpc_debugger_wr_sel_1) ); defparam \csr_reg_wr_sel.dpc_debugger_wr_sel_1 .INIT=16'h8000; // @46:1199 CFG4 \csr_reg_rd_sel.mip_sw_rd_sel_2_0 ( .A(ex_retr_pipe_sw_csr_addr_retr[11]), .B(ex_retr_pipe_sw_csr_addr_retr[10]), .C(ex_retr_pipe_sw_csr_addr_retr[7]), .D(N_1410_4), .Y(un1_u_miv_rv32_csr_decode_0_2[42]) ); defparam \csr_reg_rd_sel.mip_sw_rd_sel_2_0 .INIT=16'h0100; // @46:1192 CFG4 \csr_reg_rd_sel.mie_sw_rd_sel_2_0 ( .A(ex_retr_pipe_sw_csr_addr_retr[7]), .B(mie_sw_rd_sel_5), .C(ex_retr_pipe_sw_csr_addr_retr[11]), .D(ex_retr_pipe_sw_csr_addr_retr[10]), .Y(un1_u_miv_rv32_csr_decode_0_2[48]) ); defparam \csr_reg_rd_sel.mie_sw_rd_sel_2_0 .INIT=16'h0004; // @46:1353 CFG4 \csr_reg_rd_sel.dcsr_debugger_rd_sel_2_0 ( .A(ex_retr_pipe_sw_csr_addr_retr[2]), .B(ex_retr_pipe_sw_csr_addr_retr[3]), .C(mie_sw_rd_sel_3), .D(dpc_debugger_rd_sel_7), .Y(un1_u_miv_rv32_csr_decode_0_2[6]) ); defparam \csr_reg_rd_sel.dcsr_debugger_rd_sel_2_0 .INIT=16'h1000; // @46:1211 CFG4 \csr_reg_rd_sel.mepc_sw_rd_sel_3 ( .A(ex_retr_pipe_sw_csr_addr_retr[1]), .B(ex_retr_pipe_sw_csr_rd_op_retr), .C(trace_priv_i), .D(stage_state_retr), .Y(mepc_sw_rd_sel_3) ); defparam \csr_reg_rd_sel.mepc_sw_rd_sel_3 .INIT=16'h4440; // @46:1199 CFG4 \csr_reg_rd_sel.mip_sw_rd_sel_3 ( .A(ex_retr_pipe_sw_csr_addr_retr[0]), .B(ex_retr_pipe_sw_csr_rd_op_retr), .C(trace_priv_i), .D(stage_state_retr), .Y(mip_sw_rd_sel_3) ); defparam \csr_reg_rd_sel.mip_sw_rd_sel_3 .INIT=16'h4440; // @46:1169 CFG4 \csr_reg_rd_sel.mimpid_sw_rd_sel_4 ( .A(ex_retr_pipe_sw_csr_addr_retr[11]), .B(ex_retr_pipe_sw_csr_rd_op_retr), .C(trace_priv_i), .D(stage_state_retr), .Y(utime_sw_rd_sel_2) ); defparam \csr_reg_rd_sel.mimpid_sw_rd_sel_4 .INIT=16'h8880; // @46:1354 CFG3 \csr_reg_wr_sel.dcsr_debugger_wr_sel_1 ( .A(dcsr_debugger_wr_sel_0), .B(dcsr_debugger_rd_sel_8), .C(un1_u_miv_rv32_csr_decode_0_2[6]), .Y(dcsr_debugger_wr_sel_1) ); defparam \csr_reg_wr_sel.dcsr_debugger_wr_sel_1 .INIT=8'h80; // @46:1176 CFG3 \csr_reg_rd_sel.mstatus_sw_rd_sel_1 ( .A(N_1410_2), .B(un1_u_miv_rv32_csr_decode_0_2[48]), .C(misa_sw_rd_sel_8), .Y(mstatus_sw_rd_sel_1) ); defparam \csr_reg_rd_sel.mstatus_sw_rd_sel_1 .INIT=8'h80; // @46:1214 CFG4 \csr_reg_rd_sel.mcause_sw_rd_sel_1 ( .A(N_1410_2), .B(un1_u_miv_rv32_csr_decode_0_2[42]), .C(mcause_sw_rd_sel_1_0), .D(un29_csr_trigger_wr_hzd_de_4), .Y(mcause_sw_rd_sel_1) ); defparam \csr_reg_rd_sel.mcause_sw_rd_sel_1 .INIT=16'h8000; // @46:1208 CFG3 \csr_reg_rd_sel.mtvec_sw_rd_sel_1 ( .A(N_1410_2), .B(un1_u_miv_rv32_csr_decode_0_2[48]), .C(mtvec_sw_rd_sel_1_1), .Y(mtvec_sw_rd_sel_1) ); defparam \csr_reg_rd_sel.mtvec_sw_rd_sel_1 .INIT=8'h80; // @46:1211 CFG4 \csr_reg_rd_sel.mepc_sw_rd_sel_1 ( .A(N_1410_2), .B(un1_u_miv_rv32_csr_decode_0_2[42]), .C(mepc_sw_rd_sel_1_0), .D(un29_csr_trigger_wr_hzd_de_4), .Y(mepc_sw_rd_sel_1) ); defparam \csr_reg_rd_sel.mepc_sw_rd_sel_1 .INIT=16'h8000; // @46:1217 CFG3 \csr_reg_rd_sel.mtval_sw_rd_sel_1 ( .A(un29_csr_trigger_wr_hzd_de_4), .B(un1_u_miv_rv32_csr_decode_0_2[42]), .C(mtval_sw_rd_sel_1_0), .Y(mtval_sw_wr_sel_1) ); defparam \csr_reg_rd_sel.mtval_sw_rd_sel_1 .INIT=8'h80; // @46:1226 CFG4 \csr_reg_rd_sel.mscratch_sw_rd_sel_1 ( .A(ex_retr_pipe_sw_csr_addr_retr[6]), .B(ex_retr_pipe_sw_csr_addr_retr[8]), .C(mscratch_sw_rd_sel_8), .D(un1_u_miv_rv32_csr_decode_0_2[42]), .Y(mscratch_sw_rd_sel_1) ); defparam \csr_reg_rd_sel.mscratch_sw_rd_sel_1 .INIT=16'h8000; // @46:1195 CFG4 \csr_reg_wr_sel.mie_sw_wr_sel_1 ( .A(mie_sw_rd_sel_3), .B(un1_u_miv_rv32_csr_decode_0_2[48]), .C(mie_sw_rd_sel_4), .D(mie_sw_wr_sel_1_0), .Y(mie_sw_wr_sel_1) ); defparam \csr_reg_wr_sel.mie_sw_wr_sel_1 .INIT=16'h8000; // @46:1163 CFG4 \csr_reg_rd_sel.mvendorid_sw_rd_sel ( .A(mvendorid_sw_rd_sel_0), .B(N_1410_2), .C(un1_u_miv_rv32_csr_decode_0_2[63]), .D(mepc_sw_rd_sel_3), .Y(un1_u_miv_rv32_csr_decode_0_60) ); defparam \csr_reg_rd_sel.mvendorid_sw_rd_sel .INIT=16'h8000; // @46:1169 CFG4 \csr_reg_rd_sel.mimpid_sw_rd_sel ( .A(mimpid_sw_rd_sel_3), .B(mimpid_sw_rd_sel_1), .C(utime_sw_rd_sel_2), .D(un1_u_miv_rv32_csr_decode_0_2[63]), .Y(un1_u_miv_rv32_csr_decode_0_58) ); defparam \csr_reg_rd_sel.mimpid_sw_rd_sel .INIT=16'h8000; // @46:1183 CFG4 \csr_reg_rd_sel.misa_sw_rd_sel ( .A(misa_sw_rd_sel_1), .B(ex_retr_pipe_sw_csr_addr_retr[9]), .C(csr_op_rd_valid), .D(un1_u_miv_rv32_csr_decode_0_2[48]), .Y(un1_u_miv_rv32_csr_decode_0_53) ); defparam \csr_reg_rd_sel.misa_sw_rd_sel .INIT=16'h8000; // @46:1199 CFG4 \csr_reg_rd_sel.mip_sw_rd_sel ( .A(N_1410_2), .B(mip_sw_rd_sel_2), .C(un1_u_miv_rv32_csr_decode_0_2[42]), .D(mip_sw_rd_sel_3), .Y(un1_u_miv_rv32_csr_decode_0_47) ); defparam \csr_reg_rd_sel.mip_sw_rd_sel .INIT=16'h8000; // @46:1344 CFG4 \csr_reg_rd_sel.tdata1_sw_rd_sel ( .A(mepc_sw_rd_sel_3), .B(un1_u_miv_rv32_csr_decode_0_2_3), .C(tdata1_sw_rd_sel_7), .D(mimpid_sw_rd_sel_3), .Y(un1_u_miv_rv32_csr_decode_0_4) ); defparam \csr_reg_rd_sel.tdata1_sw_rd_sel .INIT=16'h8000; // @46:1346 CFG4 \csr_reg_rd_sel.tdata2_sw_rd_sel ( .A(mimpid_sw_rd_sel_3), .B(tdata2_sw_rd_sel_7), .C(un1_u_miv_rv32_csr_decode_0_2_3), .D(mip_sw_rd_sel_3), .Y(un1_u_miv_rv32_csr_decode_0_3) ); defparam \csr_reg_rd_sel.tdata2_sw_rd_sel .INIT=16'h8000; // @46:1353 CFG4 \csr_reg_rd_sel.dcsr_debugger_rd_sel ( .A(un1_u_miv_rv32_csr_decode_0_2[6]), .B(dcsr_debugger_rd_sel_8), .C(cpu_debug_csr_op_rd_data_valid_net), .D(mimpid_sw_rd_sel_3), .Y(un1_u_miv_rv32_csr_decode_0_1_d0) ); defparam \csr_reg_rd_sel.dcsr_debugger_rd_sel .INIT=16'h8000; // @46:1355 CFG3 \csr_reg_rd_sel.dpc_debugger_rd_sel ( .A(un1_u_miv_rv32_csr_decode_0_2_0), .B(dpc_debugger_wr_sel_1), .C(csr_op_rd_valid), .Y(un1_u_miv_rv32_csr_decode_0_0) ); defparam \csr_reg_rd_sel.dpc_debugger_rd_sel .INIT=8'h80; // @46:1274 CFG4 \csr_reg_rd_sel.utime_sw_rd_sel ( .A(utime_sw_rd_sel_3), .B(mie_sw_rd_sel_4), .C(utime_sw_rd_sel_2), .D(utime_sw_rd_sel_4), .Y(un1_u_miv_rv32_csr_decode_0_16) ); defparam \csr_reg_rd_sel.utime_sw_rd_sel .INIT=16'h8000; // @46:1276 CFG4 \csr_reg_rd_sel.utimeh_sw_rd_sel ( .A(utimeh_sw_rd_sel_2_0), .B(N_1410_4), .C(utimeh_sw_rd_sel_5), .D(csr_op_rd_valid), .Y(un1_u_miv_rv32_csr_decode_0_15) ); defparam \csr_reg_rd_sel.utimeh_sw_rd_sel .INIT=16'h8000; // @46:1217 CFG3 \csr_reg_rd_sel.mtval_sw_rd_sel ( .A(ex_retr_pipe_sw_csr_addr_retr[9]), .B(csr_op_rd_valid), .C(mtval_sw_wr_sel_1), .Y(un1_u_miv_rv32_csr_decode_0_40) ); defparam \csr_reg_rd_sel.mtval_sw_rd_sel .INIT=8'h80; // @46:1226 CFG3 \csr_reg_rd_sel.mscratch_sw_rd_sel ( .A(ex_retr_pipe_sw_csr_addr_retr[9]), .B(csr_op_rd_valid), .C(mscratch_sw_rd_sel_1), .Y(un1_u_miv_rv32_csr_decode_0_37) ); defparam \csr_reg_rd_sel.mscratch_sw_rd_sel .INIT=8'h80; // @46:1214 CFG2 \csr_reg_rd_sel.mcause_sw_rd_sel ( .A(mcause_sw_rd_sel_1), .B(mip_sw_rd_sel_3), .Y(un1_u_miv_rv32_csr_decode_0_41) ); defparam \csr_reg_rd_sel.mcause_sw_rd_sel .INIT=4'h8; // @46:1211 CFG2 \csr_reg_rd_sel.mepc_sw_rd_sel ( .A(mepc_sw_rd_sel_1), .B(mepc_sw_rd_sel_3), .Y(un1_u_miv_rv32_csr_decode_0_42) ); defparam \csr_reg_rd_sel.mepc_sw_rd_sel .INIT=4'h8; // @46:1208 CFG3 \csr_reg_rd_sel.mtvec_sw_rd_sel ( .A(ex_retr_pipe_sw_csr_addr_retr[1]), .B(csr_op_rd_valid), .C(mtvec_sw_rd_sel_1), .Y(un1_u_miv_rv32_csr_decode_0_43) ); defparam \csr_reg_rd_sel.mtvec_sw_rd_sel .INIT=8'h40; // @46:1192 CFG3 \csr_reg_rd_sel.mie_sw_rd_sel ( .A(ex_retr_pipe_sw_csr_addr_retr[9]), .B(csr_op_rd_valid), .C(mie_sw_wr_sel_1), .Y(un1_u_miv_rv32_csr_decode_0_50) ); defparam \csr_reg_rd_sel.mie_sw_rd_sel .INIT=8'h80; // @46:1176 CFG3 \csr_reg_rd_sel.mstatus_sw_rd_sel ( .A(ex_retr_pipe_sw_csr_addr_retr[0]), .B(csr_op_rd_valid), .C(mstatus_sw_rd_sel_1), .Y(un1_u_miv_rv32_csr_decode_0_56) ); defparam \csr_reg_rd_sel.mstatus_sw_rd_sel .INIT=8'h40; // @46:1356 CFG3 \csr_reg_wr_sel.dpc_debugger_wr_sel ( .A(un1_u_miv_rv32_csr_decode_0_2_0), .B(dpc_debugger_wr_sel_1), .C(sw_csr_wr_valid_qual), .Y(un1_u_miv_rv32_csr_decode_0_1_0) ); defparam \csr_reg_wr_sel.dpc_debugger_wr_sel .INIT=8'h80; // @46:1215 CFG2 \csr_reg_wr_sel.mcause_sw_wr_sel_3 ( .A(sw_csr_wr_valid_qual), .B(ex_retr_pipe_sw_csr_addr_retr[0]), .Y(mcause_sw_wr_sel_3) ); defparam \csr_reg_wr_sel.mcause_sw_wr_sel_3 .INIT=4'h2; // @46:1212 CFG2 \csr_reg_wr_sel.mepc_sw_wr_sel_3 ( .A(sw_csr_wr_valid_qual), .B(ex_retr_pipe_sw_csr_addr_retr[1]), .Y(mepc_sw_wr_sel_3) ); defparam \csr_reg_wr_sel.mepc_sw_wr_sel_3 .INIT=4'h2; // @46:1227 CFG3 \csr_reg_wr_sel.mscratch_sw_wr_sel ( .A(sw_csr_wr_valid_qual), .B(ex_retr_pipe_sw_csr_addr_retr[9]), .C(mscratch_sw_rd_sel_1), .Y(mscratch_sw_wr_sel) ); defparam \csr_reg_wr_sel.mscratch_sw_wr_sel .INIT=8'h80; // @46:1195 CFG3 \csr_reg_wr_sel.mie_sw_wr_sel ( .A(sw_csr_wr_valid_qual), .B(ex_retr_pipe_sw_csr_addr_retr[9]), .C(mie_sw_wr_sel_1), .Y(mie_sw_wr_sel) ); defparam \csr_reg_wr_sel.mie_sw_wr_sel .INIT=8'h80; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_csr_decode_0s_1s_0s */ module miv_rv32_csr_gpr_state_reg_1s_1s_0s_12 ( csr_op_wr_data_1_0, status_mpie, machine_implicit_wr_mtval_tval_wr_en, wr_en_data_or_0, mstatus_sw_rd_sel_1, mcause_sw_wr_sel_3, machine_implicit_wr_status_mpie_wr_en, dff, formal_trace_reset_taken, PF_CCC_0_0_OUT0_FABCLK_0, status_mie ) ; input csr_op_wr_data_1_0 ; input status_mpie ; input machine_implicit_wr_mtval_tval_wr_en ; input wr_en_data_or_0 ; input mstatus_sw_rd_sel_1 ; input mcause_sw_wr_sel_3 ; input machine_implicit_wr_status_mpie_wr_en ; input dff ; input formal_trace_reset_taken ; input PF_CCC_0_0_OUT0_FABCLK_0 ; output status_mie ; wire csr_op_wr_data_1_0 ; wire status_mpie ; wire machine_implicit_wr_mtval_tval_wr_en ; wire wr_en_data_or_0 ; wire mstatus_sw_rd_sel_1 ; wire mcause_sw_wr_sel_3 ; wire machine_implicit_wr_status_mpie_wr_en ; wire dff ; wire formal_trace_reset_taken ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire status_mie ; wire [0:0] state_val_RNO; wire state_val_2208 ; wire N_6074_i ; wire VCC ; wire N_969 ; wire GND ; wire wr_en_data_or ; CFG1 \gen_bit_reset.state_val_RNO_0[0] ( .A(state_val_2208), .Y(N_6074_i) ); defparam \gen_bit_reset.state_val_RNO_0[0] .INIT=2'h1; // @46:5705 SLE \gen_bit_reset.state_val[0] ( .Q(status_mie), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_969), .EN(state_val_RNO[0]), .LAT(GND), .SD(GND), .SLn(N_6074_i) ); CFG2 \gen_bit_reset.state_val_RNO[0] ( .A(wr_en_data_or), .B(state_val_2208), .Y(state_val_RNO[0]) ); defparam \gen_bit_reset.state_val_RNO[0] .INIT=4'hE; CFG2 \gen_bit_reset.state_val_2208 ( .A(formal_trace_reset_taken), .B(dff), .Y(state_val_2208) ); defparam \gen_bit_reset.state_val_2208 .INIT=4'hB; // @46:2658 CFG4 \gen_bit_reset.state_val_RNO_1[0] ( .A(machine_implicit_wr_status_mpie_wr_en), .B(mcause_sw_wr_sel_3), .C(mstatus_sw_rd_sel_1), .D(wr_en_data_or_0), .Y(wr_en_data_or) ); defparam \gen_bit_reset.state_val_RNO_1[0] .INIT=16'hFFEA; // @46:5707 CFG4 \gen_bit_reset.state_val_12_0[0] ( .A(machine_implicit_wr_mtval_tval_wr_en), .B(machine_implicit_wr_status_mpie_wr_en), .C(status_mpie), .D(csr_op_wr_data_1_0), .Y(N_969) ); defparam \gen_bit_reset.state_val_12_0[0] .INIT=16'h7340; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_csr_gpr_state_reg_1s_1s_0s_12 */ module miv_rv32_csr_gpr_state_reg_1s_0s_0s_5 ( csr_op_wr_data_1_0, ex_retr_pipe_sw_csr_addr_retr_0, machine_implicit_wr_mtval_tval_wr_en, status_mie, mstatus_sw_rd_sel_1, sw_csr_wr_valid_qual, machine_implicit_wr_status_mpie_wr_en, PF_CCC_0_0_OUT0_FABCLK_0, status_mpie ) ; input csr_op_wr_data_1_0 ; input ex_retr_pipe_sw_csr_addr_retr_0 ; input machine_implicit_wr_mtval_tval_wr_en ; input status_mie ; input mstatus_sw_rd_sel_1 ; input sw_csr_wr_valid_qual ; input machine_implicit_wr_status_mpie_wr_en ; input PF_CCC_0_0_OUT0_FABCLK_0 ; output status_mpie ; wire csr_op_wr_data_1_0 ; wire ex_retr_pipe_sw_csr_addr_retr_0 ; wire machine_implicit_wr_mtval_tval_wr_en ; wire status_mie ; wire mstatus_sw_rd_sel_1 ; wire sw_csr_wr_valid_qual ; wire machine_implicit_wr_status_mpie_wr_en ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire status_mpie ; wire [0:0] state_val_14_Z; wire VCC ; wire wr_en_data_Z ; wire GND ; // @46:5721 SLE \gen_bit_no_reset.state_val[0] ( .Q(status_mpie), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_14_Z[0]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5695 CFG4 wr_en_data ( .A(machine_implicit_wr_status_mpie_wr_en), .B(sw_csr_wr_valid_qual), .C(ex_retr_pipe_sw_csr_addr_retr_0), .D(mstatus_sw_rd_sel_1), .Y(wr_en_data_Z) ); defparam wr_en_data.INIT=16'hAEAA; // @46:5692 CFG4 \state_val_14[0] ( .A(status_mie), .B(machine_implicit_wr_mtval_tval_wr_en), .C(machine_implicit_wr_status_mpie_wr_en), .D(csr_op_wr_data_1_0), .Y(state_val_14_Z[0]) ); defparam \state_val_14[0] .INIT=16'hBFB0; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_csr_gpr_state_reg_1s_0s_0s_5 */ module miv_rv32_csr_gpr_state_reg_1s_0s_0s ( csr_op_wr_data_1_0, mie_sw_wr_sel, PF_CCC_0_0_OUT0_FABCLK_0, ie_msie ) ; input csr_op_wr_data_1_0 ; input mie_sw_wr_sel ; input PF_CCC_0_0_OUT0_FABCLK_0 ; output ie_msie ; wire csr_op_wr_data_1_0 ; wire mie_sw_wr_sel ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire ie_msie ; wire VCC ; wire GND ; // @46:5721 SLE \gen_bit_no_reset.state_val[0] ( .Q(ie_msie), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1_0), .EN(mie_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_csr_gpr_state_reg_1s_0s_0s */ module miv_rv32_csr_gpr_state_reg_1s_0s_0s_0 ( csr_op_wr_data_1_0, mie_sw_wr_sel, PF_CCC_0_0_OUT0_FABCLK_0, ie_mtie ) ; input csr_op_wr_data_1_0 ; input mie_sw_wr_sel ; input PF_CCC_0_0_OUT0_FABCLK_0 ; output ie_mtie ; wire csr_op_wr_data_1_0 ; wire mie_sw_wr_sel ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire ie_mtie ; wire VCC ; wire GND ; // @46:5721 SLE \gen_bit_no_reset.state_val[0] ( .Q(ie_mtie), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1_0), .EN(mie_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_csr_gpr_state_reg_1s_0s_0s_0 */ module miv_rv32_csr_gpr_state_reg_1s_0s_0s_1 ( csr_op_wr_data_1_0, mie_sw_wr_sel, PF_CCC_0_0_OUT0_FABCLK_0, ie_meie ) ; input csr_op_wr_data_1_0 ; input mie_sw_wr_sel ; input PF_CCC_0_0_OUT0_FABCLK_0 ; output ie_meie ; wire csr_op_wr_data_1_0 ; wire mie_sw_wr_sel ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire ie_meie ; wire VCC ; wire GND ; // @46:5721 SLE \gen_bit_no_reset.state_val[0] ( .Q(ie_meie), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1_0), .EN(mie_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_csr_gpr_state_reg_1s_0s_0s_1 */ module miv_rv32_csr_gpr_state_reg_1s_0s_0s_2 ( csr_op_wr_data_1_0, ie_mextsysie_0, mie_sw_wr_sel, PF_CCC_0_0_OUT0_FABCLK_0 ) ; input csr_op_wr_data_1_0 ; output ie_mextsysie_0 ; input mie_sw_wr_sel ; input PF_CCC_0_0_OUT0_FABCLK_0 ; wire csr_op_wr_data_1_0 ; wire ie_mextsysie_0 ; wire mie_sw_wr_sel ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire VCC ; wire GND ; // @46:5721 SLE \gen_bit_no_reset.state_val[0] ( .Q(ie_mextsysie_0), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1_0), .EN(mie_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_csr_gpr_state_reg_1s_0s_0s_2 */ module miv_rv32_csr_gpr_state_reg_1s_0s_0s_3 ( csr_op_wr_data_1_0, ie_mextsysie_0, mie_sw_wr_sel, PF_CCC_0_0_OUT0_FABCLK_0 ) ; input csr_op_wr_data_1_0 ; output ie_mextsysie_0 ; input mie_sw_wr_sel ; input PF_CCC_0_0_OUT0_FABCLK_0 ; wire csr_op_wr_data_1_0 ; wire ie_mextsysie_0 ; wire mie_sw_wr_sel ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire VCC ; wire GND ; // @46:5721 SLE \gen_bit_no_reset.state_val[0] ( .Q(ie_mextsysie_0), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1_0), .EN(mie_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_csr_gpr_state_reg_1s_0s_0s_3 */ module miv_rv32_csr_gpr_state_reg_30s_1s_536870913 ( un3_mtvec_warl_wr_en_14_0, un3_mtvec_warl_wr_en_15_0, csr_op_wr_data_1, csr_priv_mtvec_excpt_vec_retr, mepc_sw_wr_sel_3, dff, PF_CCC_0_0_OUT0_FABCLK_0 ) ; input un3_mtvec_warl_wr_en_14_0 ; input un3_mtvec_warl_wr_en_15_0 ; input [31:2] csr_op_wr_data_1 ; output [31:2] csr_priv_mtvec_excpt_vec_retr ; input mepc_sw_wr_sel_3 ; input dff ; input PF_CCC_0_0_OUT0_FABCLK_0 ; wire un3_mtvec_warl_wr_en_14_0 ; wire un3_mtvec_warl_wr_en_15_0 ; wire mepc_sw_wr_sel_3 ; wire dff ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire VCC ; wire wr_en_data_or_Z ; wire GND ; // @46:5705 SLE \gen_bit_reset.state_val[29] ( .Q(csr_priv_mtvec_excpt_vec_retr[31]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[31]), .EN(wr_en_data_or_Z), .LAT(GND), .SD(VCC), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[28] ( .Q(csr_priv_mtvec_excpt_vec_retr[30]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[30]), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[27] ( .Q(csr_priv_mtvec_excpt_vec_retr[29]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[29]), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[26] ( .Q(csr_priv_mtvec_excpt_vec_retr[28]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[28]), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[25] ( .Q(csr_priv_mtvec_excpt_vec_retr[27]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[27]), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[24] ( .Q(csr_priv_mtvec_excpt_vec_retr[26]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[26]), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[23] ( .Q(csr_priv_mtvec_excpt_vec_retr[25]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[25]), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[22] ( .Q(csr_priv_mtvec_excpt_vec_retr[24]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[24]), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[21] ( .Q(csr_priv_mtvec_excpt_vec_retr[23]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[23]), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[20] ( .Q(csr_priv_mtvec_excpt_vec_retr[22]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[22]), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[19] ( .Q(csr_priv_mtvec_excpt_vec_retr[21]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[21]), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[18] ( .Q(csr_priv_mtvec_excpt_vec_retr[20]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[20]), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[17] ( .Q(csr_priv_mtvec_excpt_vec_retr[19]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[19]), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[16] ( .Q(csr_priv_mtvec_excpt_vec_retr[18]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[18]), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[15] ( .Q(csr_priv_mtvec_excpt_vec_retr[17]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[17]), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[14] ( .Q(csr_priv_mtvec_excpt_vec_retr[16]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[16]), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[13] ( .Q(csr_priv_mtvec_excpt_vec_retr[15]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[15]), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[12] ( .Q(csr_priv_mtvec_excpt_vec_retr[14]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[14]), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[11] ( .Q(csr_priv_mtvec_excpt_vec_retr[13]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[13]), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[10] ( .Q(csr_priv_mtvec_excpt_vec_retr[12]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[12]), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[9] ( .Q(csr_priv_mtvec_excpt_vec_retr[11]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[11]), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[8] ( .Q(csr_priv_mtvec_excpt_vec_retr[10]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[10]), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[7] ( .Q(csr_priv_mtvec_excpt_vec_retr[9]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[9]), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[6] ( .Q(csr_priv_mtvec_excpt_vec_retr[8]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[8]), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[5] ( .Q(csr_priv_mtvec_excpt_vec_retr[7]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[7]), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[4] ( .Q(csr_priv_mtvec_excpt_vec_retr[6]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[6]), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[3] ( .Q(csr_priv_mtvec_excpt_vec_retr[5]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[5]), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[2] ( .Q(csr_priv_mtvec_excpt_vec_retr[4]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[4]), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[1] ( .Q(csr_priv_mtvec_excpt_vec_retr[3]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[3]), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[0] ( .Q(csr_priv_mtvec_excpt_vec_retr[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[2]), .EN(wr_en_data_or_Z), .LAT(GND), .SD(VCC), .SLn(dff) ); // @46:3416 CFG4 wr_en_data_or ( .A(un3_mtvec_warl_wr_en_15_0), .B(dff), .C(mepc_sw_wr_sel_3), .D(un3_mtvec_warl_wr_en_14_0), .Y(wr_en_data_or_Z) ); defparam wr_en_data_or.INIT=16'hB333; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_csr_gpr_state_reg_30s_1s_536870913 */ module miv_rv32_csr_gpr_state_reg_31s_0s_0s ( ex_retr_pipe_curr_pc_retr, csr_op_wr_data_1, ex_retr_pipe_sw_csr_addr_retr_0, csr_priv_mtvec_epc_retr, mepc_sw_rd_sel_1, sw_csr_wr_valid_qual, machine_implicit_wr_mtval_tval_wr_en, PF_CCC_0_0_OUT0_FABCLK_0 ) ; input [31:1] ex_retr_pipe_curr_pc_retr ; input [31:1] csr_op_wr_data_1 ; input ex_retr_pipe_sw_csr_addr_retr_0 ; output [31:1] csr_priv_mtvec_epc_retr ; input mepc_sw_rd_sel_1 ; input sw_csr_wr_valid_qual ; input machine_implicit_wr_mtval_tval_wr_en ; input PF_CCC_0_0_OUT0_FABCLK_0 ; wire ex_retr_pipe_sw_csr_addr_retr_0 ; wire mepc_sw_rd_sel_1 ; wire sw_csr_wr_valid_qual ; wire machine_implicit_wr_mtval_tval_wr_en ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire [30:0] state_val_17_Z; wire VCC ; wire wr_en_data_Z ; wire GND ; // @46:5721 SLE \gen_bit_no_reset.state_val[7] ( .Q(csr_priv_mtvec_epc_retr[8]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_17_Z[7]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[6] ( .Q(csr_priv_mtvec_epc_retr[7]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_17_Z[6]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[5] ( .Q(csr_priv_mtvec_epc_retr[6]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_17_Z[5]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[4] ( .Q(csr_priv_mtvec_epc_retr[5]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_17_Z[4]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[3] ( .Q(csr_priv_mtvec_epc_retr[4]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_17_Z[3]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[2] ( .Q(csr_priv_mtvec_epc_retr[3]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_17_Z[2]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[1] ( .Q(csr_priv_mtvec_epc_retr[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_17_Z[1]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[0] ( .Q(csr_priv_mtvec_epc_retr[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_17_Z[0]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[22] ( .Q(csr_priv_mtvec_epc_retr[23]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_17_Z[22]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[21] ( .Q(csr_priv_mtvec_epc_retr[22]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_17_Z[21]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[20] ( .Q(csr_priv_mtvec_epc_retr[21]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_17_Z[20]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[19] ( .Q(csr_priv_mtvec_epc_retr[20]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_17_Z[19]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[18] ( .Q(csr_priv_mtvec_epc_retr[19]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_17_Z[18]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[17] ( .Q(csr_priv_mtvec_epc_retr[18]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_17_Z[17]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[16] ( .Q(csr_priv_mtvec_epc_retr[17]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_17_Z[16]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[15] ( .Q(csr_priv_mtvec_epc_retr[16]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_17_Z[15]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[14] ( .Q(csr_priv_mtvec_epc_retr[15]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_17_Z[14]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[13] ( .Q(csr_priv_mtvec_epc_retr[14]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_17_Z[13]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[12] ( .Q(csr_priv_mtvec_epc_retr[13]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_17_Z[12]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[11] ( .Q(csr_priv_mtvec_epc_retr[12]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_17_Z[11]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[10] ( .Q(csr_priv_mtvec_epc_retr[11]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_17_Z[10]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[9] ( .Q(csr_priv_mtvec_epc_retr[10]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_17_Z[9]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[8] ( .Q(csr_priv_mtvec_epc_retr[9]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_17_Z[8]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[30] ( .Q(csr_priv_mtvec_epc_retr[31]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_17_Z[30]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[29] ( .Q(csr_priv_mtvec_epc_retr[30]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_17_Z[29]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[28] ( .Q(csr_priv_mtvec_epc_retr[29]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_17_Z[28]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[27] ( .Q(csr_priv_mtvec_epc_retr[28]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_17_Z[27]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[26] ( .Q(csr_priv_mtvec_epc_retr[27]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_17_Z[26]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[25] ( .Q(csr_priv_mtvec_epc_retr[26]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_17_Z[25]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[24] ( .Q(csr_priv_mtvec_epc_retr[25]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_17_Z[24]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[23] ( .Q(csr_priv_mtvec_epc_retr[24]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_17_Z[23]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5695 CFG4 wr_en_data ( .A(machine_implicit_wr_mtval_tval_wr_en), .B(sw_csr_wr_valid_qual), .C(ex_retr_pipe_sw_csr_addr_retr_0), .D(mepc_sw_rd_sel_1), .Y(wr_en_data_Z) ); defparam wr_en_data.INIT=16'hAEAA; // @46:5692 CFG3 \state_val_17[7] ( .A(ex_retr_pipe_curr_pc_retr[8]), .B(csr_op_wr_data_1[8]), .C(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_17_Z[7]) ); defparam \state_val_17[7] .INIT=8'hAC; // @46:5692 CFG3 \state_val_17[9] ( .A(ex_retr_pipe_curr_pc_retr[10]), .B(csr_op_wr_data_1[10]), .C(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_17_Z[9]) ); defparam \state_val_17[9] .INIT=8'hAC; // @46:5692 CFG3 \state_val_17[10] ( .A(ex_retr_pipe_curr_pc_retr[11]), .B(csr_op_wr_data_1[11]), .C(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_17_Z[10]) ); defparam \state_val_17[10] .INIT=8'hAC; // @46:5692 CFG3 \state_val_17[12] ( .A(ex_retr_pipe_curr_pc_retr[13]), .B(csr_op_wr_data_1[13]), .C(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_17_Z[12]) ); defparam \state_val_17[12] .INIT=8'hAC; // @46:5692 CFG3 \state_val_17[16] ( .A(ex_retr_pipe_curr_pc_retr[17]), .B(csr_op_wr_data_1[17]), .C(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_17_Z[16]) ); defparam \state_val_17[16] .INIT=8'hAC; // @46:5692 CFG3 \state_val_17[17] ( .A(ex_retr_pipe_curr_pc_retr[18]), .B(csr_op_wr_data_1[18]), .C(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_17_Z[17]) ); defparam \state_val_17[17] .INIT=8'hAC; // @46:5692 CFG3 \state_val_17[18] ( .A(ex_retr_pipe_curr_pc_retr[19]), .B(csr_op_wr_data_1[19]), .C(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_17_Z[18]) ); defparam \state_val_17[18] .INIT=8'hAC; // @46:5692 CFG3 \state_val_17[20] ( .A(ex_retr_pipe_curr_pc_retr[21]), .B(csr_op_wr_data_1[21]), .C(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_17_Z[20]) ); defparam \state_val_17[20] .INIT=8'hAC; // @46:5692 CFG3 \state_val_17[21] ( .A(ex_retr_pipe_curr_pc_retr[22]), .B(csr_op_wr_data_1[22]), .C(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_17_Z[21]) ); defparam \state_val_17[21] .INIT=8'hAC; // @46:5692 CFG3 \state_val_17[22] ( .A(ex_retr_pipe_curr_pc_retr[23]), .B(csr_op_wr_data_1[23]), .C(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_17_Z[22]) ); defparam \state_val_17[22] .INIT=8'hAC; // @46:5692 CFG3 \state_val_17[27] ( .A(ex_retr_pipe_curr_pc_retr[28]), .B(csr_op_wr_data_1[28]), .C(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_17_Z[27]) ); defparam \state_val_17[27] .INIT=8'hAC; // @46:5692 CFG3 \state_val_17[19] ( .A(ex_retr_pipe_curr_pc_retr[20]), .B(csr_op_wr_data_1[20]), .C(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_17_Z[19]) ); defparam \state_val_17[19] .INIT=8'hAC; // @46:5692 CFG3 \state_val_17[3] ( .A(ex_retr_pipe_curr_pc_retr[4]), .B(csr_op_wr_data_1[4]), .C(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_17_Z[3]) ); defparam \state_val_17[3] .INIT=8'hAC; // @46:5692 CFG3 \state_val_17[14] ( .A(ex_retr_pipe_curr_pc_retr[15]), .B(csr_op_wr_data_1[15]), .C(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_17_Z[14]) ); defparam \state_val_17[14] .INIT=8'hAC; // @46:5692 CFG3 \state_val_17[13] ( .A(ex_retr_pipe_curr_pc_retr[14]), .B(csr_op_wr_data_1[14]), .C(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_17_Z[13]) ); defparam \state_val_17[13] .INIT=8'hAC; // @46:5692 CFG3 \state_val_17[0] ( .A(ex_retr_pipe_curr_pc_retr[1]), .B(csr_op_wr_data_1[1]), .C(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_17_Z[0]) ); defparam \state_val_17[0] .INIT=8'hAC; // @46:5692 CFG3 \state_val_17[4] ( .A(ex_retr_pipe_curr_pc_retr[5]), .B(csr_op_wr_data_1[5]), .C(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_17_Z[4]) ); defparam \state_val_17[4] .INIT=8'hAC; // @46:5692 CFG3 \state_val_17[5] ( .A(ex_retr_pipe_curr_pc_retr[6]), .B(csr_op_wr_data_1[6]), .C(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_17_Z[5]) ); defparam \state_val_17[5] .INIT=8'hAC; // @46:5692 CFG3 \state_val_17[8] ( .A(ex_retr_pipe_curr_pc_retr[9]), .B(csr_op_wr_data_1[9]), .C(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_17_Z[8]) ); defparam \state_val_17[8] .INIT=8'hAC; // @46:5692 CFG3 \state_val_17[11] ( .A(ex_retr_pipe_curr_pc_retr[12]), .B(csr_op_wr_data_1[12]), .C(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_17_Z[11]) ); defparam \state_val_17[11] .INIT=8'hAC; // @46:5692 CFG3 \state_val_17[15] ( .A(ex_retr_pipe_curr_pc_retr[16]), .B(csr_op_wr_data_1[16]), .C(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_17_Z[15]) ); defparam \state_val_17[15] .INIT=8'hAC; // @46:5692 CFG3 \state_val_17[23] ( .A(ex_retr_pipe_curr_pc_retr[24]), .B(csr_op_wr_data_1[24]), .C(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_17_Z[23]) ); defparam \state_val_17[23] .INIT=8'hAC; // @46:5692 CFG3 \state_val_17[24] ( .A(ex_retr_pipe_curr_pc_retr[25]), .B(csr_op_wr_data_1[25]), .C(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_17_Z[24]) ); defparam \state_val_17[24] .INIT=8'hAC; // @46:5692 CFG3 \state_val_17[28] ( .A(ex_retr_pipe_curr_pc_retr[29]), .B(csr_op_wr_data_1[29]), .C(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_17_Z[28]) ); defparam \state_val_17[28] .INIT=8'hAC; // @46:5692 CFG3 \state_val_17[30] ( .A(ex_retr_pipe_curr_pc_retr[31]), .B(csr_op_wr_data_1[31]), .C(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_17_Z[30]) ); defparam \state_val_17[30] .INIT=8'hAC; // @46:5692 CFG3 \state_val_17[26] ( .A(ex_retr_pipe_curr_pc_retr[27]), .B(csr_op_wr_data_1[27]), .C(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_17_Z[26]) ); defparam \state_val_17[26] .INIT=8'hAC; // @46:5692 CFG3 \state_val_17[25] ( .A(ex_retr_pipe_curr_pc_retr[26]), .B(csr_op_wr_data_1[26]), .C(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_17_Z[25]) ); defparam \state_val_17[25] .INIT=8'hAC; // @46:5692 CFG3 \state_val_17[29] ( .A(ex_retr_pipe_curr_pc_retr[30]), .B(csr_op_wr_data_1[30]), .C(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_17_Z[29]) ); defparam \state_val_17[29] .INIT=8'hAC; // @46:5692 CFG3 \state_val_17[1] ( .A(ex_retr_pipe_curr_pc_retr[2]), .B(csr_op_wr_data_1[2]), .C(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_17_Z[1]) ); defparam \state_val_17[1] .INIT=8'hAC; // @46:5692 CFG3 \state_val_17[2] ( .A(ex_retr_pipe_curr_pc_retr[3]), .B(csr_op_wr_data_1[3]), .C(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_17_Z[2]) ); defparam \state_val_17[2] .INIT=8'hAC; // @46:5692 CFG3 \state_val_17[6] ( .A(csr_op_wr_data_1[7]), .B(ex_retr_pipe_curr_pc_retr[7]), .C(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_17_Z[6]) ); defparam \state_val_17[6] .INIT=8'hCA; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_csr_gpr_state_reg_31s_0s_0s */ module miv_rv32_csr_gpr_state_reg_5s_1s_0 ( csr_op_wr_data_1, machine_implicit_wr_mcause_excpt_code_wr_data_0, cause_excpt_code_excpt, cause_excpt_code_irq_0, csr_priv_cause_excpt_code, state_val_or_0_0, un11_trap_val, un1_interrupt_taken_timer_2_i, wr_en_data_or_0, mcause_sw_rd_sel_1, mcause_sw_wr_sel_3, machine_implicit_wr_mtval_tval_wr_en, state_val_2196, N_6062_i, PF_CCC_0_0_OUT0_FABCLK_0 ) ; input [4:0] csr_op_wr_data_1 ; input [4:3] machine_implicit_wr_mcause_excpt_code_wr_data_0 ; input [2:0] cause_excpt_code_excpt ; input cause_excpt_code_irq_0 ; output [4:0] csr_priv_cause_excpt_code ; output state_val_or_0_0 ; input un11_trap_val ; input un1_interrupt_taken_timer_2_i ; input wr_en_data_or_0 ; input mcause_sw_rd_sel_1 ; input mcause_sw_wr_sel_3 ; input machine_implicit_wr_mtval_tval_wr_en ; input state_val_2196 ; input N_6062_i ; input PF_CCC_0_0_OUT0_FABCLK_0 ; wire cause_excpt_code_irq_0 ; wire state_val_or_0_0 ; wire un11_trap_val ; wire un1_interrupt_taken_timer_2_i ; wire wr_en_data_or_0 ; wire mcause_sw_rd_sel_1 ; wire mcause_sw_wr_sel_3 ; wire machine_implicit_wr_mtval_tval_wr_en ; wire state_val_2196 ; wire N_6062_i ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire VCC ; wire N_960 ; wire GND ; wire N_959 ; wire N_958 ; wire N_957 ; wire N_956 ; wire wr_en_data_or_Z ; wire N_958_2 ; // @46:5705 SLE \gen_bit_reset.state_val[4] ( .Q(csr_priv_cause_excpt_code[4]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_960), .EN(state_val_or_0_0), .LAT(GND), .SD(GND), .SLn(N_6062_i) ); // @46:5705 SLE \gen_bit_reset.state_val[3] ( .Q(csr_priv_cause_excpt_code[3]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_959), .EN(state_val_or_0_0), .LAT(GND), .SD(GND), .SLn(N_6062_i) ); // @46:5705 SLE \gen_bit_reset.state_val[2] ( .Q(csr_priv_cause_excpt_code[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_958), .EN(state_val_or_0_0), .LAT(GND), .SD(GND), .SLn(N_6062_i) ); // @46:5705 SLE \gen_bit_reset.state_val[1] ( .Q(csr_priv_cause_excpt_code[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_957), .EN(state_val_or_0_0), .LAT(GND), .SD(GND), .SLn(N_6062_i) ); // @46:5705 SLE \gen_bit_reset.state_val[0] ( .Q(csr_priv_cause_excpt_code[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_956), .EN(state_val_or_0_0), .LAT(GND), .SD(GND), .SLn(N_6062_i) ); CFG2 \gen_bit_reset.state_val_or[0] ( .A(wr_en_data_or_Z), .B(state_val_2196), .Y(state_val_or_0_0) ); defparam \gen_bit_reset.state_val_or[0] .INIT=4'hE; // @46:3485 CFG4 wr_en_data_or ( .A(machine_implicit_wr_mtval_tval_wr_en), .B(mcause_sw_wr_sel_3), .C(mcause_sw_rd_sel_1), .D(wr_en_data_or_0), .Y(wr_en_data_or_Z) ); defparam wr_en_data_or.INIT=16'hFFEA; // @46:5707 CFG4 \gen_bit_reset.state_val_22_0_2[2] ( .A(cause_excpt_code_irq_0), .B(machine_implicit_wr_mtval_tval_wr_en), .C(cause_excpt_code_excpt[2]), .D(un1_interrupt_taken_timer_2_i), .Y(N_958_2) ); defparam \gen_bit_reset.state_val_22_0_2[2] .INIT=16'hC840; // @46:5707 CFG4 \gen_bit_reset.state_val_22_0[4] ( .A(machine_implicit_wr_mcause_excpt_code_wr_data_0[4]), .B(csr_op_wr_data_1[4]), .C(un11_trap_val), .D(machine_implicit_wr_mtval_tval_wr_en), .Y(N_960) ); defparam \gen_bit_reset.state_val_22_0[4] .INIT=16'hA0CC; // @46:5707 CFG4 \gen_bit_reset.state_val_22_0[0] ( .A(machine_implicit_wr_mtval_tval_wr_en), .B(cause_excpt_code_excpt[0]), .C(csr_op_wr_data_1[0]), .D(cause_excpt_code_irq_0), .Y(N_956) ); defparam \gen_bit_reset.state_val_22_0[0] .INIT=16'hFAD8; // @46:5707 CFG4 \gen_bit_reset.state_val_22_0[1] ( .A(cause_excpt_code_excpt[1]), .B(csr_op_wr_data_1[1]), .C(cause_excpt_code_irq_0), .D(machine_implicit_wr_mtval_tval_wr_en), .Y(N_957) ); defparam \gen_bit_reset.state_val_22_0[1] .INIT=16'hFACC; // @46:5707 CFG4 \gen_bit_reset.state_val_22_0[3] ( .A(cause_excpt_code_irq_0), .B(machine_implicit_wr_mcause_excpt_code_wr_data_0[3]), .C(machine_implicit_wr_mtval_tval_wr_en), .D(csr_op_wr_data_1[3]), .Y(N_959) ); defparam \gen_bit_reset.state_val_22_0[3] .INIT=16'h4F40; // @46:5707 CFG3 \gen_bit_reset.state_val_22_0[2] ( .A(machine_implicit_wr_mtval_tval_wr_en), .B(N_958_2), .C(csr_op_wr_data_1[2]), .Y(N_958) ); defparam \gen_bit_reset.state_val_22_0[2] .INIT=8'hDC; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_csr_gpr_state_reg_5s_1s_0 */ module miv_rv32_csr_gpr_state_reg_1s_1s_0s_12_0 ( csr_op_wr_data_1_0, cause_excpt_code_irq_0, state_val_or_0_0, machine_implicit_wr_mtval_tval_wr_en, dff, formal_trace_reset_taken, PF_CCC_0_0_OUT0_FABCLK_0, mcause_interrupt, N_6062_i, state_val_2196 ) ; input csr_op_wr_data_1_0 ; input cause_excpt_code_irq_0 ; input state_val_or_0_0 ; input machine_implicit_wr_mtval_tval_wr_en ; input dff ; input formal_trace_reset_taken ; input PF_CCC_0_0_OUT0_FABCLK_0 ; output mcause_interrupt ; output N_6062_i ; output state_val_2196 ; wire csr_op_wr_data_1_0 ; wire cause_excpt_code_irq_0 ; wire state_val_or_0_0 ; wire machine_implicit_wr_mtval_tval_wr_en ; wire dff ; wire formal_trace_reset_taken ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire mcause_interrupt ; wire N_6062_i ; wire state_val_2196 ; wire VCC ; wire N_951 ; wire GND ; CFG1 N_6062_i_0 ( .A(state_val_2196), .Y(N_6062_i) ); defparam N_6062_i_0.INIT=2'h1; // @46:5705 SLE \gen_bit_reset.state_val[0] ( .Q(mcause_interrupt), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_951), .EN(state_val_or_0_0), .LAT(GND), .SD(GND), .SLn(N_6062_i) ); CFG2 \gen_bit_reset.state_val_2196 ( .A(formal_trace_reset_taken), .B(dff), .Y(state_val_2196) ); defparam \gen_bit_reset.state_val_2196 .INIT=4'hB; // @46:5707 CFG3 \gen_bit_reset.state_val_12_0[0] ( .A(cause_excpt_code_irq_0), .B(machine_implicit_wr_mtval_tval_wr_en), .C(csr_op_wr_data_1_0), .Y(N_951) ); defparam \gen_bit_reset.state_val_12_0[0] .INIT=8'hB8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_csr_gpr_state_reg_1s_1s_0s_12_0 */ module miv_rv32_csr_gpr_state_reg_32s_0s_0s_1 ( csr_op_wr_data_1, machine_implicit_wr_mtval_tval_wr_data_1, machine_implicit_wr_mtval_tval_wr_data_2, ex_retr_pipe_sw_csr_addr_retr_0, csr_priv_mtval, mtval_sw_wr_sel_1, sw_csr_wr_valid_qual, machine_implicit_wr_mtval_tval_wr_en, PF_CCC_0_0_OUT0_FABCLK_0 ) ; input [31:0] csr_op_wr_data_1 ; input [31:0] machine_implicit_wr_mtval_tval_wr_data_1 ; input [31:0] machine_implicit_wr_mtval_tval_wr_data_2 ; input ex_retr_pipe_sw_csr_addr_retr_0 ; output [31:0] csr_priv_mtval ; input mtval_sw_wr_sel_1 ; input sw_csr_wr_valid_qual ; input machine_implicit_wr_mtval_tval_wr_en ; input PF_CCC_0_0_OUT0_FABCLK_0 ; wire ex_retr_pipe_sw_csr_addr_retr_0 ; wire mtval_sw_wr_sel_1 ; wire sw_csr_wr_valid_qual ; wire machine_implicit_wr_mtval_tval_wr_en ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire [31:0] state_val_24_Z; wire VCC ; wire wr_en_data_Z ; wire GND ; // @46:5721 SLE \gen_bit_no_reset.state_val[14] ( .Q(csr_priv_mtval[14]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_24_Z[14]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[13] ( .Q(csr_priv_mtval[13]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_24_Z[13]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[12] ( .Q(csr_priv_mtval[12]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_24_Z[12]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[11] ( .Q(csr_priv_mtval[11]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_24_Z[11]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[10] ( .Q(csr_priv_mtval[10]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_24_Z[10]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[9] ( .Q(csr_priv_mtval[9]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_24_Z[9]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[8] ( .Q(csr_priv_mtval[8]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_24_Z[8]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[7] ( .Q(csr_priv_mtval[7]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_24_Z[7]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[6] ( .Q(csr_priv_mtval[6]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_24_Z[6]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[5] ( .Q(csr_priv_mtval[5]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_24_Z[5]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[4] ( .Q(csr_priv_mtval[4]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_24_Z[4]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[3] ( .Q(csr_priv_mtval[3]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_24_Z[3]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[2] ( .Q(csr_priv_mtval[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_24_Z[2]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[1] ( .Q(csr_priv_mtval[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_24_Z[1]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[0] ( .Q(csr_priv_mtval[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_24_Z[0]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[29] ( .Q(csr_priv_mtval[29]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_24_Z[29]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[28] ( .Q(csr_priv_mtval[28]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_24_Z[28]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[27] ( .Q(csr_priv_mtval[27]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_24_Z[27]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[26] ( .Q(csr_priv_mtval[26]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_24_Z[26]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[25] ( .Q(csr_priv_mtval[25]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_24_Z[25]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[24] ( .Q(csr_priv_mtval[24]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_24_Z[24]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[23] ( .Q(csr_priv_mtval[23]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_24_Z[23]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[22] ( .Q(csr_priv_mtval[22]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_24_Z[22]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[21] ( .Q(csr_priv_mtval[21]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_24_Z[21]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[20] ( .Q(csr_priv_mtval[20]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_24_Z[20]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[19] ( .Q(csr_priv_mtval[19]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_24_Z[19]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[18] ( .Q(csr_priv_mtval[18]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_24_Z[18]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[17] ( .Q(csr_priv_mtval[17]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_24_Z[17]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[16] ( .Q(csr_priv_mtval[16]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_24_Z[16]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[15] ( .Q(csr_priv_mtval[15]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_24_Z[15]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[31] ( .Q(csr_priv_mtval[31]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_24_Z[31]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[30] ( .Q(csr_priv_mtval[30]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_24_Z[30]), .EN(wr_en_data_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5695 CFG4 wr_en_data ( .A(machine_implicit_wr_mtval_tval_wr_en), .B(sw_csr_wr_valid_qual), .C(ex_retr_pipe_sw_csr_addr_retr_0), .D(mtval_sw_wr_sel_1), .Y(wr_en_data_Z) ); defparam wr_en_data.INIT=16'hEAAA; // @46:5692 CFG4 \state_val_24[8] ( .A(machine_implicit_wr_mtval_tval_wr_data_2[8]), .B(machine_implicit_wr_mtval_tval_wr_data_1[8]), .C(csr_op_wr_data_1[8]), .D(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_24_Z[8]) ); defparam \state_val_24[8] .INIT=16'hEEF0; // @46:5692 CFG4 \state_val_24[10] ( .A(machine_implicit_wr_mtval_tval_wr_data_2[10]), .B(machine_implicit_wr_mtval_tval_wr_data_1[10]), .C(csr_op_wr_data_1[10]), .D(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_24_Z[10]) ); defparam \state_val_24[10] .INIT=16'hEEF0; // @46:5692 CFG4 \state_val_24[11] ( .A(machine_implicit_wr_mtval_tval_wr_data_2[11]), .B(machine_implicit_wr_mtval_tval_wr_data_1[11]), .C(csr_op_wr_data_1[11]), .D(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_24_Z[11]) ); defparam \state_val_24[11] .INIT=16'hEEF0; // @46:5692 CFG4 \state_val_24[13] ( .A(machine_implicit_wr_mtval_tval_wr_data_2[13]), .B(machine_implicit_wr_mtval_tval_wr_data_1[13]), .C(csr_op_wr_data_1[13]), .D(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_24_Z[13]) ); defparam \state_val_24[13] .INIT=16'hEEF0; // @46:5692 CFG4 \state_val_24[17] ( .A(machine_implicit_wr_mtval_tval_wr_data_2[17]), .B(machine_implicit_wr_mtval_tval_wr_data_1[17]), .C(csr_op_wr_data_1[17]), .D(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_24_Z[17]) ); defparam \state_val_24[17] .INIT=16'hEEF0; // @46:5692 CFG4 \state_val_24[18] ( .A(machine_implicit_wr_mtval_tval_wr_data_2[18]), .B(machine_implicit_wr_mtval_tval_wr_data_1[18]), .C(csr_op_wr_data_1[18]), .D(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_24_Z[18]) ); defparam \state_val_24[18] .INIT=16'hEEF0; // @46:5692 CFG4 \state_val_24[19] ( .A(machine_implicit_wr_mtval_tval_wr_data_2[19]), .B(machine_implicit_wr_mtval_tval_wr_data_1[19]), .C(csr_op_wr_data_1[19]), .D(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_24_Z[19]) ); defparam \state_val_24[19] .INIT=16'hEEF0; // @46:5692 CFG4 \state_val_24[21] ( .A(machine_implicit_wr_mtval_tval_wr_data_2[21]), .B(machine_implicit_wr_mtval_tval_wr_data_1[21]), .C(csr_op_wr_data_1[21]), .D(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_24_Z[21]) ); defparam \state_val_24[21] .INIT=16'hEEF0; // @46:5692 CFG4 \state_val_24[22] ( .A(machine_implicit_wr_mtval_tval_wr_data_2[22]), .B(machine_implicit_wr_mtval_tval_wr_data_1[22]), .C(csr_op_wr_data_1[22]), .D(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_24_Z[22]) ); defparam \state_val_24[22] .INIT=16'hEEF0; // @46:5692 CFG4 \state_val_24[23] ( .A(machine_implicit_wr_mtval_tval_wr_data_2[23]), .B(machine_implicit_wr_mtval_tval_wr_data_1[23]), .C(csr_op_wr_data_1[23]), .D(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_24_Z[23]) ); defparam \state_val_24[23] .INIT=16'hEEF0; // @46:5692 CFG4 \state_val_24[28] ( .A(machine_implicit_wr_mtval_tval_wr_data_2[28]), .B(machine_implicit_wr_mtval_tval_wr_data_1[28]), .C(csr_op_wr_data_1[28]), .D(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_24_Z[28]) ); defparam \state_val_24[28] .INIT=16'hEEF0; // @46:5692 CFG4 \state_val_24[20] ( .A(machine_implicit_wr_mtval_tval_wr_data_2[20]), .B(machine_implicit_wr_mtval_tval_wr_data_1[20]), .C(csr_op_wr_data_1[20]), .D(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_24_Z[20]) ); defparam \state_val_24[20] .INIT=16'hEEF0; // @46:5692 CFG4 \state_val_24[4] ( .A(machine_implicit_wr_mtval_tval_wr_data_2[4]), .B(machine_implicit_wr_mtval_tval_wr_data_1[4]), .C(csr_op_wr_data_1[4]), .D(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_24_Z[4]) ); defparam \state_val_24[4] .INIT=16'hEEF0; // @46:5692 CFG4 \state_val_24[15] ( .A(machine_implicit_wr_mtval_tval_wr_data_2[15]), .B(machine_implicit_wr_mtval_tval_wr_data_1[15]), .C(csr_op_wr_data_1[15]), .D(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_24_Z[15]) ); defparam \state_val_24[15] .INIT=16'hEEF0; // @46:5692 CFG4 \state_val_24[14] ( .A(machine_implicit_wr_mtval_tval_wr_data_2[14]), .B(machine_implicit_wr_mtval_tval_wr_data_1[14]), .C(csr_op_wr_data_1[14]), .D(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_24_Z[14]) ); defparam \state_val_24[14] .INIT=16'hEEF0; // @46:5692 CFG4 \state_val_24[0] ( .A(machine_implicit_wr_mtval_tval_wr_data_2[0]), .B(machine_implicit_wr_mtval_tval_wr_data_1[0]), .C(csr_op_wr_data_1[0]), .D(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_24_Z[0]) ); defparam \state_val_24[0] .INIT=16'hEEF0; // @46:5692 CFG4 \state_val_24[1] ( .A(machine_implicit_wr_mtval_tval_wr_data_2[1]), .B(machine_implicit_wr_mtval_tval_wr_data_1[1]), .C(csr_op_wr_data_1[1]), .D(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_24_Z[1]) ); defparam \state_val_24[1] .INIT=16'hEEF0; // @46:5692 CFG4 \state_val_24[5] ( .A(machine_implicit_wr_mtval_tval_wr_data_2[5]), .B(machine_implicit_wr_mtval_tval_wr_data_1[5]), .C(csr_op_wr_data_1[5]), .D(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_24_Z[5]) ); defparam \state_val_24[5] .INIT=16'hEEF0; // @46:5692 CFG4 \state_val_24[6] ( .A(machine_implicit_wr_mtval_tval_wr_data_2[6]), .B(machine_implicit_wr_mtval_tval_wr_data_1[6]), .C(csr_op_wr_data_1[6]), .D(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_24_Z[6]) ); defparam \state_val_24[6] .INIT=16'hEEF0; // @46:5692 CFG4 \state_val_24[9] ( .A(machine_implicit_wr_mtval_tval_wr_data_2[9]), .B(machine_implicit_wr_mtval_tval_wr_data_1[9]), .C(csr_op_wr_data_1[9]), .D(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_24_Z[9]) ); defparam \state_val_24[9] .INIT=16'hEEF0; // @46:5692 CFG4 \state_val_24[12] ( .A(machine_implicit_wr_mtval_tval_wr_data_2[12]), .B(machine_implicit_wr_mtval_tval_wr_data_1[12]), .C(csr_op_wr_data_1[12]), .D(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_24_Z[12]) ); defparam \state_val_24[12] .INIT=16'hEEF0; // @46:5692 CFG4 \state_val_24[16] ( .A(machine_implicit_wr_mtval_tval_wr_data_2[16]), .B(machine_implicit_wr_mtval_tval_wr_data_1[16]), .C(csr_op_wr_data_1[16]), .D(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_24_Z[16]) ); defparam \state_val_24[16] .INIT=16'hEEF0; // @46:5692 CFG4 \state_val_24[24] ( .A(machine_implicit_wr_mtval_tval_wr_data_2[24]), .B(machine_implicit_wr_mtval_tval_wr_data_1[24]), .C(csr_op_wr_data_1[24]), .D(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_24_Z[24]) ); defparam \state_val_24[24] .INIT=16'hEEF0; // @46:5692 CFG4 \state_val_24[29] ( .A(machine_implicit_wr_mtval_tval_wr_data_2[29]), .B(machine_implicit_wr_mtval_tval_wr_data_1[29]), .C(csr_op_wr_data_1[29]), .D(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_24_Z[29]) ); defparam \state_val_24[29] .INIT=16'hEEF0; // @46:5692 CFG4 \state_val_24[31] ( .A(machine_implicit_wr_mtval_tval_wr_data_2[31]), .B(machine_implicit_wr_mtval_tval_wr_data_1[31]), .C(csr_op_wr_data_1[31]), .D(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_24_Z[31]) ); defparam \state_val_24[31] .INIT=16'hEEF0; // @46:5692 CFG4 \state_val_24[27] ( .A(machine_implicit_wr_mtval_tval_wr_data_2[27]), .B(machine_implicit_wr_mtval_tval_wr_data_1[27]), .C(csr_op_wr_data_1[27]), .D(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_24_Z[27]) ); defparam \state_val_24[27] .INIT=16'hEEF0; // @46:5692 CFG4 \state_val_24[26] ( .A(machine_implicit_wr_mtval_tval_wr_data_2[26]), .B(machine_implicit_wr_mtval_tval_wr_data_1[26]), .C(csr_op_wr_data_1[26]), .D(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_24_Z[26]) ); defparam \state_val_24[26] .INIT=16'hEEF0; // @46:5692 CFG4 \state_val_24[25] ( .A(machine_implicit_wr_mtval_tval_wr_data_2[25]), .B(machine_implicit_wr_mtval_tval_wr_data_1[25]), .C(csr_op_wr_data_1[25]), .D(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_24_Z[25]) ); defparam \state_val_24[25] .INIT=16'hEEF0; // @46:5692 CFG4 \state_val_24[30] ( .A(machine_implicit_wr_mtval_tval_wr_data_2[30]), .B(machine_implicit_wr_mtval_tval_wr_data_1[30]), .C(csr_op_wr_data_1[30]), .D(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_24_Z[30]) ); defparam \state_val_24[30] .INIT=16'hEEF0; // @46:5692 CFG4 \state_val_24[2] ( .A(machine_implicit_wr_mtval_tval_wr_data_2[2]), .B(machine_implicit_wr_mtval_tval_wr_data_1[2]), .C(csr_op_wr_data_1[2]), .D(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_24_Z[2]) ); defparam \state_val_24[2] .INIT=16'hEEF0; // @46:5692 CFG4 \state_val_24[3] ( .A(machine_implicit_wr_mtval_tval_wr_data_2[3]), .B(machine_implicit_wr_mtval_tval_wr_data_1[3]), .C(csr_op_wr_data_1[3]), .D(machine_implicit_wr_mtval_tval_wr_en), .Y(state_val_24_Z[3]) ); defparam \state_val_24[3] .INIT=16'hEEF0; // @46:5692 CFG4 \state_val_24[7] ( .A(machine_implicit_wr_mtval_tval_wr_data_2[7]), .B(machine_implicit_wr_mtval_tval_wr_data_1[7]), .C(machine_implicit_wr_mtval_tval_wr_en), .D(csr_op_wr_data_1[7]), .Y(state_val_24_Z[7]) ); defparam \state_val_24[7] .INIT=16'hEFE0; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_csr_gpr_state_reg_32s_0s_0s_1 */ module miv_rv32_csr_gpr_state_reg_32s_0s_0s_0 ( csr_op_wr_data_1, mscratch_scratch, mscratch_sw_wr_sel, PF_CCC_0_0_OUT0_FABCLK_0 ) ; input [31:0] csr_op_wr_data_1 ; output [31:0] mscratch_scratch ; input mscratch_sw_wr_sel ; input PF_CCC_0_0_OUT0_FABCLK_0 ; wire mscratch_sw_wr_sel ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire VCC ; wire GND ; // @46:5721 SLE \gen_bit_no_reset.state_val[1] ( .Q(mscratch_scratch[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[1]), .EN(mscratch_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[0] ( .Q(mscratch_scratch[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[0]), .EN(mscratch_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[16] ( .Q(mscratch_scratch[16]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[16]), .EN(mscratch_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[15] ( .Q(mscratch_scratch[15]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[15]), .EN(mscratch_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[14] ( .Q(mscratch_scratch[14]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[14]), .EN(mscratch_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[13] ( .Q(mscratch_scratch[13]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[13]), .EN(mscratch_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[12] ( .Q(mscratch_scratch[12]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[12]), .EN(mscratch_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[11] ( .Q(mscratch_scratch[11]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[11]), .EN(mscratch_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[10] ( .Q(mscratch_scratch[10]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[10]), .EN(mscratch_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[9] ( .Q(mscratch_scratch[9]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[9]), .EN(mscratch_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[8] ( .Q(mscratch_scratch[8]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[8]), .EN(mscratch_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[7] ( .Q(mscratch_scratch[7]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[7]), .EN(mscratch_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[6] ( .Q(mscratch_scratch[6]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[6]), .EN(mscratch_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[5] ( .Q(mscratch_scratch[5]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[5]), .EN(mscratch_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[4] ( .Q(mscratch_scratch[4]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[4]), .EN(mscratch_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[3] ( .Q(mscratch_scratch[3]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[3]), .EN(mscratch_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[2] ( .Q(mscratch_scratch[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[2]), .EN(mscratch_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[31] ( .Q(mscratch_scratch[31]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[31]), .EN(mscratch_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[30] ( .Q(mscratch_scratch[30]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[30]), .EN(mscratch_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[29] ( .Q(mscratch_scratch[29]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[29]), .EN(mscratch_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[28] ( .Q(mscratch_scratch[28]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[28]), .EN(mscratch_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[27] ( .Q(mscratch_scratch[27]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[27]), .EN(mscratch_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[26] ( .Q(mscratch_scratch[26]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[26]), .EN(mscratch_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[25] ( .Q(mscratch_scratch[25]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[25]), .EN(mscratch_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[24] ( .Q(mscratch_scratch[24]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[24]), .EN(mscratch_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[23] ( .Q(mscratch_scratch[23]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[23]), .EN(mscratch_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[22] ( .Q(mscratch_scratch[22]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[22]), .EN(mscratch_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[21] ( .Q(mscratch_scratch[21]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[21]), .EN(mscratch_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[20] ( .Q(mscratch_scratch[20]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[20]), .EN(mscratch_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[19] ( .Q(mscratch_scratch[19]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[19]), .EN(mscratch_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[18] ( .Q(mscratch_scratch[18]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[18]), .EN(mscratch_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5721 SLE \gen_bit_no_reset.state_val[17] ( .Q(mscratch_scratch[17]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(csr_op_wr_data_1[17]), .EN(mscratch_sw_wr_sel), .LAT(GND), .SD(GND), .SLn(VCC) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_csr_gpr_state_reg_32s_0s_0s_0 */ module miv_rv32_csr_gpr_state_reg_1s_1s_0s_7 ( csr_op_wr_data_1_0, per_trigger_debug_0, formal_trace_reset_taken, machine_sw_wr_tdata1_mcontrol_execute_wr_en, dff, PF_CCC_0_0_OUT0_FABCLK_0, tdata1_mcontrol_hit ) ; input csr_op_wr_data_1_0 ; input per_trigger_debug_0 ; input formal_trace_reset_taken ; input machine_sw_wr_tdata1_mcontrol_execute_wr_en ; input dff ; input PF_CCC_0_0_OUT0_FABCLK_0 ; output tdata1_mcontrol_hit ; wire csr_op_wr_data_1_0 ; wire per_trigger_debug_0 ; wire formal_trace_reset_taken ; wire machine_sw_wr_tdata1_mcontrol_execute_wr_en ; wire dff ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire tdata1_mcontrol_hit ; wire [0:0] state_val_12_iv_i; wire VCC ; wire wr_en_data_or ; wire GND ; // @46:5705 SLE \gen_bit_reset.state_val[0] ( .Q(tdata1_mcontrol_hit), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_12_iv_i[0]), .EN(wr_en_data_or), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:4310 CFG4 \gen_bit_reset.state_val_RNO[0] ( .A(per_trigger_debug_0), .B(dff), .C(machine_sw_wr_tdata1_mcontrol_execute_wr_en), .D(formal_trace_reset_taken), .Y(wr_en_data_or) ); defparam \gen_bit_reset.state_val_RNO[0] .INIT=16'hFFFB; // @46:5705 CFG3 \gen_bit_reset.state_val_12_iv_i[0] ( .A(csr_op_wr_data_1_0), .B(per_trigger_debug_0), .C(formal_trace_reset_taken), .Y(state_val_12_iv_i[0]) ); defparam \gen_bit_reset.state_val_12_iv_i[0] .INIT=8'h0E; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_csr_gpr_state_reg_1s_1s_0s_7 */ module miv_rv32_csr_gpr_state_reg_1s_1s_0s_9 ( csr_op_wr_data_1_0, state_val_33_0, formal_trace_reset_taken, machine_sw_wr_tdata1_mcontrol_execute_wr_en, dff, PF_CCC_0_0_OUT0_FABCLK_0, tdata1_mcontrol_execute ) ; input csr_op_wr_data_1_0 ; output state_val_33_0 ; input formal_trace_reset_taken ; input machine_sw_wr_tdata1_mcontrol_execute_wr_en ; input dff ; input PF_CCC_0_0_OUT0_FABCLK_0 ; output tdata1_mcontrol_execute ; wire csr_op_wr_data_1_0 ; wire state_val_33_0 ; wire formal_trace_reset_taken ; wire machine_sw_wr_tdata1_mcontrol_execute_wr_en ; wire dff ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire tdata1_mcontrol_execute ; wire VCC ; wire wr_en_data_or ; wire GND ; // @46:5705 SLE \gen_bit_reset.state_val[0] ( .Q(tdata1_mcontrol_execute), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33_0), .EN(wr_en_data_or), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:4468 CFG3 \gen_bit_reset.state_val_RNO[0] ( .A(machine_sw_wr_tdata1_mcontrol_execute_wr_en), .B(dff), .C(formal_trace_reset_taken), .Y(wr_en_data_or) ); defparam \gen_bit_reset.state_val_RNO[0] .INIT=8'hFB; // @46:5707 CFG2 \gen_bit_reset.state_val_12_u[0] ( .A(csr_op_wr_data_1_0), .B(formal_trace_reset_taken), .Y(state_val_33_0) ); defparam \gen_bit_reset.state_val_12_u[0] .INIT=4'h2; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_csr_gpr_state_reg_1s_1s_0s_9 */ module miv_rv32_csr_gpr_state_reg_1s_1s_0s_5 ( state_val_33_0, tdata2_match_data_0, dff, wr_en_data_or_0, PF_CCC_0_0_OUT0_FABCLK_0 ) ; input state_val_33_0 ; output tdata2_match_data_0 ; input dff ; input wr_en_data_or_0 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; wire state_val_33_0 ; wire tdata2_match_data_0 ; wire dff ; wire wr_en_data_or_0 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire VCC ; wire GND ; // @46:5705 SLE \gen_bit_reset.state_val[0] ( .Q(tdata2_match_data_0), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33_0), .EN(wr_en_data_or_0), .LAT(GND), .SD(GND), .SLn(dff) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_csr_gpr_state_reg_1s_1s_0s_5 */ module miv_rv32_csr_gpr_state_reg_32s_1s_0_1 ( state_val_33, tdata2_match_data, dff, wr_en_data_or_0, PF_CCC_0_0_OUT0_FABCLK_0 ) ; input [31:0] state_val_33 ; output [31:0] tdata2_match_data ; input dff ; input wr_en_data_or_0 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; wire dff ; wire wr_en_data_or_0 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire VCC ; wire GND ; // @46:5705 SLE \gen_bit_reset.state_val[31] ( .Q(tdata2_match_data[31]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[31]), .EN(wr_en_data_or_0), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[30] ( .Q(tdata2_match_data[30]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[30]), .EN(wr_en_data_or_0), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[29] ( .Q(tdata2_match_data[29]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[29]), .EN(wr_en_data_or_0), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[28] ( .Q(tdata2_match_data[28]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[28]), .EN(wr_en_data_or_0), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[27] ( .Q(tdata2_match_data[27]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[27]), .EN(wr_en_data_or_0), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[26] ( .Q(tdata2_match_data[26]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[26]), .EN(wr_en_data_or_0), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[25] ( .Q(tdata2_match_data[25]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[25]), .EN(wr_en_data_or_0), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[24] ( .Q(tdata2_match_data[24]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[24]), .EN(wr_en_data_or_0), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[23] ( .Q(tdata2_match_data[23]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[23]), .EN(wr_en_data_or_0), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[22] ( .Q(tdata2_match_data[22]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[22]), .EN(wr_en_data_or_0), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[21] ( .Q(tdata2_match_data[21]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[21]), .EN(wr_en_data_or_0), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[20] ( .Q(tdata2_match_data[20]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[20]), .EN(wr_en_data_or_0), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[19] ( .Q(tdata2_match_data[19]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[19]), .EN(wr_en_data_or_0), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[18] ( .Q(tdata2_match_data[18]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[18]), .EN(wr_en_data_or_0), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[17] ( .Q(tdata2_match_data[17]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[17]), .EN(wr_en_data_or_0), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[16] ( .Q(tdata2_match_data[16]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[16]), .EN(wr_en_data_or_0), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[15] ( .Q(tdata2_match_data[15]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[15]), .EN(wr_en_data_or_0), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[14] ( .Q(tdata2_match_data[14]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[14]), .EN(wr_en_data_or_0), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[13] ( .Q(tdata2_match_data[13]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[13]), .EN(wr_en_data_or_0), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[12] ( .Q(tdata2_match_data[12]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[12]), .EN(wr_en_data_or_0), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[11] ( .Q(tdata2_match_data[11]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[11]), .EN(wr_en_data_or_0), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[10] ( .Q(tdata2_match_data[10]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[10]), .EN(wr_en_data_or_0), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[9] ( .Q(tdata2_match_data[9]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[9]), .EN(wr_en_data_or_0), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[8] ( .Q(tdata2_match_data[8]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[8]), .EN(wr_en_data_or_0), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[7] ( .Q(tdata2_match_data[7]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[7]), .EN(wr_en_data_or_0), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[5] ( .Q(tdata2_match_data[5]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[5]), .EN(wr_en_data_or_0), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[4] ( .Q(tdata2_match_data[4]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[4]), .EN(wr_en_data_or_0), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[3] ( .Q(tdata2_match_data[3]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[3]), .EN(wr_en_data_or_0), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[2] ( .Q(tdata2_match_data[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[2]), .EN(wr_en_data_or_0), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[1] ( .Q(tdata2_match_data[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[1]), .EN(wr_en_data_or_0), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[0] ( .Q(tdata2_match_data[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[0]), .EN(wr_en_data_or_0), .LAT(GND), .SD(GND), .SLn(dff) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_csr_gpr_state_reg_32s_1s_0_1 */ module miv_rv32_csr_gpr_state_reg_32s_1s_0_0 ( csr_op_wr_data_1, un1_u_miv_rv32_csr_decode_0_2_0, state_val_33, tdata2_match_data_1, machine_sw_wr_tdata2_match_data_wr_en_0, mcause_sw_wr_sel_3, wr_en_data_or_0_1z, formal_trace_reset_taken, dff, PF_CCC_0_0_OUT0_FABCLK_0 ) ; input [31:0] csr_op_wr_data_1 ; input un1_u_miv_rv32_csr_decode_0_2_0 ; inout [31:0] state_val_33 /* synthesis syn_tristate = 1 */ ; output [31:0] tdata2_match_data_1 ; input machine_sw_wr_tdata2_match_data_wr_en_0 ; input mcause_sw_wr_sel_3 ; output wr_en_data_or_0_1z ; input formal_trace_reset_taken ; input dff ; input PF_CCC_0_0_OUT0_FABCLK_0 ; wire un1_u_miv_rv32_csr_decode_0_2_0 ; wire machine_sw_wr_tdata2_match_data_wr_en_0 ; wire mcause_sw_wr_sel_3 ; wire wr_en_data_or_0_1z ; wire formal_trace_reset_taken ; wire dff ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire [0:0] state_val_or; wire VCC ; wire GND ; wire wr_en_data_or_Z ; // @46:5705 SLE \gen_bit_reset.state_val[31] ( .Q(tdata2_match_data_1[31]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[31]), .EN(state_val_or[0]), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[30] ( .Q(tdata2_match_data_1[30]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[30]), .EN(state_val_or[0]), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[29] ( .Q(tdata2_match_data_1[29]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[29]), .EN(state_val_or[0]), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[28] ( .Q(tdata2_match_data_1[28]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[28]), .EN(state_val_or[0]), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[27] ( .Q(tdata2_match_data_1[27]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[27]), .EN(state_val_or[0]), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[26] ( .Q(tdata2_match_data_1[26]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[26]), .EN(state_val_or[0]), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[25] ( .Q(tdata2_match_data_1[25]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[25]), .EN(state_val_or[0]), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[24] ( .Q(tdata2_match_data_1[24]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[24]), .EN(state_val_or[0]), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[23] ( .Q(tdata2_match_data_1[23]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[23]), .EN(state_val_or[0]), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[22] ( .Q(tdata2_match_data_1[22]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[22]), .EN(state_val_or[0]), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[21] ( .Q(tdata2_match_data_1[21]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[21]), .EN(state_val_or[0]), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[20] ( .Q(tdata2_match_data_1[20]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[20]), .EN(state_val_or[0]), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[19] ( .Q(tdata2_match_data_1[19]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[19]), .EN(state_val_or[0]), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[18] ( .Q(tdata2_match_data_1[18]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[18]), .EN(state_val_or[0]), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[17] ( .Q(tdata2_match_data_1[17]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[17]), .EN(state_val_or[0]), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[16] ( .Q(tdata2_match_data_1[16]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[16]), .EN(state_val_or[0]), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[15] ( .Q(tdata2_match_data_1[15]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[15]), .EN(state_val_or[0]), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[14] ( .Q(tdata2_match_data_1[14]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[14]), .EN(state_val_or[0]), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[13] ( .Q(tdata2_match_data_1[13]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[13]), .EN(state_val_or[0]), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[12] ( .Q(tdata2_match_data_1[12]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[12]), .EN(state_val_or[0]), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[11] ( .Q(tdata2_match_data_1[11]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[11]), .EN(state_val_or[0]), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[10] ( .Q(tdata2_match_data_1[10]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[10]), .EN(state_val_or[0]), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[9] ( .Q(tdata2_match_data_1[9]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[9]), .EN(state_val_or[0]), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[8] ( .Q(tdata2_match_data_1[8]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[8]), .EN(state_val_or[0]), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[7] ( .Q(tdata2_match_data_1[7]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[7]), .EN(state_val_or[0]), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[6] ( .Q(tdata2_match_data_1[6]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[6]), .EN(state_val_or[0]), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[5] ( .Q(tdata2_match_data_1[5]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[5]), .EN(state_val_or[0]), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[4] ( .Q(tdata2_match_data_1[4]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[4]), .EN(state_val_or[0]), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[3] ( .Q(tdata2_match_data_1[3]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[3]), .EN(state_val_or[0]), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[2] ( .Q(tdata2_match_data_1[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[2]), .EN(state_val_or[0]), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[1] ( .Q(tdata2_match_data_1[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[1]), .EN(state_val_or[0]), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[0] ( .Q(tdata2_match_data_1[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_33[0]), .EN(state_val_or[0]), .LAT(GND), .SD(GND), .SLn(dff) ); CFG2 \gen_bit_reset.state_val_or[0] ( .A(wr_en_data_or_Z), .B(dff), .Y(state_val_or[0]) ); defparam \gen_bit_reset.state_val_or[0] .INIT=4'hB; // @46:4522 CFG2 wr_en_data_or_0 ( .A(formal_trace_reset_taken), .B(dff), .Y(wr_en_data_or_0_1z) ); defparam wr_en_data_or_0.INIT=4'hB; // @46:4522 CFG4 wr_en_data_or ( .A(wr_en_data_or_0_1z), .B(mcause_sw_wr_sel_3), .C(un1_u_miv_rv32_csr_decode_0_2_0), .D(machine_sw_wr_tdata2_match_data_wr_en_0), .Y(wr_en_data_or_Z) ); defparam wr_en_data_or.INIT=16'hEAAA; // @46:5707 CFG2 \gen_bit_reset.state_val_33[8] ( .A(csr_op_wr_data_1[8]), .B(formal_trace_reset_taken), .Y(state_val_33[8]) ); defparam \gen_bit_reset.state_val_33[8] .INIT=4'h2; // @46:5707 CFG2 \gen_bit_reset.state_val_33[10] ( .A(csr_op_wr_data_1[10]), .B(formal_trace_reset_taken), .Y(state_val_33[10]) ); defparam \gen_bit_reset.state_val_33[10] .INIT=4'h2; // @46:5707 CFG2 \gen_bit_reset.state_val_33[11] ( .A(csr_op_wr_data_1[11]), .B(formal_trace_reset_taken), .Y(state_val_33[11]) ); defparam \gen_bit_reset.state_val_33[11] .INIT=4'h2; // @46:5707 CFG2 \gen_bit_reset.state_val_33[13] ( .A(csr_op_wr_data_1[13]), .B(formal_trace_reset_taken), .Y(state_val_33[13]) ); defparam \gen_bit_reset.state_val_33[13] .INIT=4'h2; // @46:5707 CFG2 \gen_bit_reset.state_val_33[17] ( .A(csr_op_wr_data_1[17]), .B(formal_trace_reset_taken), .Y(state_val_33[17]) ); defparam \gen_bit_reset.state_val_33[17] .INIT=4'h2; // @46:5707 CFG2 \gen_bit_reset.state_val_33[18] ( .A(csr_op_wr_data_1[18]), .B(formal_trace_reset_taken), .Y(state_val_33[18]) ); defparam \gen_bit_reset.state_val_33[18] .INIT=4'h2; // @46:5707 CFG2 \gen_bit_reset.state_val_33[19] ( .A(csr_op_wr_data_1[19]), .B(formal_trace_reset_taken), .Y(state_val_33[19]) ); defparam \gen_bit_reset.state_val_33[19] .INIT=4'h2; // @46:5707 CFG2 \gen_bit_reset.state_val_33[21] ( .A(csr_op_wr_data_1[21]), .B(formal_trace_reset_taken), .Y(state_val_33[21]) ); defparam \gen_bit_reset.state_val_33[21] .INIT=4'h2; // @46:5707 CFG2 \gen_bit_reset.state_val_33[22] ( .A(csr_op_wr_data_1[22]), .B(formal_trace_reset_taken), .Y(state_val_33[22]) ); defparam \gen_bit_reset.state_val_33[22] .INIT=4'h2; // @46:5707 CFG2 \gen_bit_reset.state_val_33[23] ( .A(csr_op_wr_data_1[23]), .B(formal_trace_reset_taken), .Y(state_val_33[23]) ); defparam \gen_bit_reset.state_val_33[23] .INIT=4'h2; // @46:5707 CFG2 \gen_bit_reset.state_val_33[28] ( .A(csr_op_wr_data_1[28]), .B(formal_trace_reset_taken), .Y(state_val_33[28]) ); defparam \gen_bit_reset.state_val_33[28] .INIT=4'h2; // @46:5707 CFG2 \gen_bit_reset.state_val_33[4] ( .A(csr_op_wr_data_1[4]), .B(formal_trace_reset_taken), .Y(state_val_33[4]) ); defparam \gen_bit_reset.state_val_33[4] .INIT=4'h2; // @46:5707 CFG2 \gen_bit_reset.state_val_33[20] ( .A(csr_op_wr_data_1[20]), .B(formal_trace_reset_taken), .Y(state_val_33[20]) ); defparam \gen_bit_reset.state_val_33[20] .INIT=4'h2; // @46:5707 CFG2 \gen_bit_reset.state_val_33[15] ( .A(csr_op_wr_data_1[15]), .B(formal_trace_reset_taken), .Y(state_val_33[15]) ); defparam \gen_bit_reset.state_val_33[15] .INIT=4'h2; // @46:5707 CFG2 \gen_bit_reset.state_val_33[14] ( .A(csr_op_wr_data_1[14]), .B(formal_trace_reset_taken), .Y(state_val_33[14]) ); defparam \gen_bit_reset.state_val_33[14] .INIT=4'h2; // @46:5707 CFG2 \gen_bit_reset.state_val_33[0] ( .A(csr_op_wr_data_1[0]), .B(formal_trace_reset_taken), .Y(state_val_33[0]) ); defparam \gen_bit_reset.state_val_33[0] .INIT=4'h2; // @46:5707 CFG2 \gen_bit_reset.state_val_33[1] ( .A(csr_op_wr_data_1[1]), .B(formal_trace_reset_taken), .Y(state_val_33[1]) ); defparam \gen_bit_reset.state_val_33[1] .INIT=4'h2; // @46:5707 CFG2 \gen_bit_reset.state_val_33[5] ( .A(csr_op_wr_data_1[5]), .B(formal_trace_reset_taken), .Y(state_val_33[5]) ); defparam \gen_bit_reset.state_val_33[5] .INIT=4'h2; // @46:5707 CFG2 \gen_bit_reset.state_val_33[9] ( .A(csr_op_wr_data_1[9]), .B(formal_trace_reset_taken), .Y(state_val_33[9]) ); defparam \gen_bit_reset.state_val_33[9] .INIT=4'h2; // @46:5707 CFG2 \gen_bit_reset.state_val_33[12] ( .A(csr_op_wr_data_1[12]), .B(formal_trace_reset_taken), .Y(state_val_33[12]) ); defparam \gen_bit_reset.state_val_33[12] .INIT=4'h2; // @46:5707 CFG2 \gen_bit_reset.state_val_33[16] ( .A(csr_op_wr_data_1[16]), .B(formal_trace_reset_taken), .Y(state_val_33[16]) ); defparam \gen_bit_reset.state_val_33[16] .INIT=4'h2; // @46:5707 CFG2 \gen_bit_reset.state_val_33[24] ( .A(csr_op_wr_data_1[24]), .B(formal_trace_reset_taken), .Y(state_val_33[24]) ); defparam \gen_bit_reset.state_val_33[24] .INIT=4'h2; // @46:5707 CFG2 \gen_bit_reset.state_val_33[29] ( .A(csr_op_wr_data_1[29]), .B(formal_trace_reset_taken), .Y(state_val_33[29]) ); defparam \gen_bit_reset.state_val_33[29] .INIT=4'h2; // @46:5707 CFG2 \gen_bit_reset.state_val_33[27] ( .A(csr_op_wr_data_1[27]), .B(formal_trace_reset_taken), .Y(state_val_33[27]) ); defparam \gen_bit_reset.state_val_33[27] .INIT=4'h2; // @46:5707 CFG2 \gen_bit_reset.state_val_33[26] ( .A(csr_op_wr_data_1[26]), .B(formal_trace_reset_taken), .Y(state_val_33[26]) ); defparam \gen_bit_reset.state_val_33[26] .INIT=4'h2; // @46:5707 CFG2 \gen_bit_reset.state_val_33[25] ( .A(csr_op_wr_data_1[25]), .B(formal_trace_reset_taken), .Y(state_val_33[25]) ); defparam \gen_bit_reset.state_val_33[25] .INIT=4'h2; // @46:5707 CFG2 \gen_bit_reset.state_val_33[30] ( .A(csr_op_wr_data_1[30]), .B(formal_trace_reset_taken), .Y(state_val_33[30]) ); defparam \gen_bit_reset.state_val_33[30] .INIT=4'h2; // @46:5707 CFG2 \gen_bit_reset.state_val_33[2] ( .A(csr_op_wr_data_1[2]), .B(formal_trace_reset_taken), .Y(state_val_33[2]) ); defparam \gen_bit_reset.state_val_33[2] .INIT=4'h2; // @46:5707 CFG2 \gen_bit_reset.state_val_33[31] ( .A(csr_op_wr_data_1[31]), .B(formal_trace_reset_taken), .Y(state_val_33[31]) ); defparam \gen_bit_reset.state_val_33[31] .INIT=4'h2; // @46:5707 CFG2 \gen_bit_reset.state_val_33[3] ( .A(csr_op_wr_data_1[3]), .B(formal_trace_reset_taken), .Y(state_val_33[3]) ); defparam \gen_bit_reset.state_val_33[3] .INIT=4'h2; // @46:5707 CFG2 \gen_bit_reset.state_val_33[7] ( .A(csr_op_wr_data_1[7]), .B(formal_trace_reset_taken), .Y(state_val_33[7]) ); defparam \gen_bit_reset.state_val_33[7] .INIT=4'h2; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_csr_gpr_state_reg_32s_1s_0_0 */ module miv_rv32_csr_gpr_state_reg_1s_1s_0s_9_0 ( csr_op_wr_data_1_0, init_wr_dcsr_step_en, sw_csr_wr_valid_qual, dcsr_debugger_wr_sel_1, dff, wr_en_data_or_1z, PF_CCC_0_0_OUT0_FABCLK_0, dcsr_ebreakm ) ; input csr_op_wr_data_1_0 ; input init_wr_dcsr_step_en ; input sw_csr_wr_valid_qual ; input dcsr_debugger_wr_sel_1 ; input dff ; output wr_en_data_or_1z ; input PF_CCC_0_0_OUT0_FABCLK_0 ; output dcsr_ebreakm ; wire csr_op_wr_data_1_0 ; wire init_wr_dcsr_step_en ; wire sw_csr_wr_valid_qual ; wire dcsr_debugger_wr_sel_1 ; wire dff ; wire wr_en_data_or_1z ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire dcsr_ebreakm ; wire [0:0] state_val_12; wire VCC ; wire GND ; // @46:5705 SLE \gen_bit_reset.state_val[0] ( .Q(dcsr_ebreakm), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_12[0]), .EN(wr_en_data_or_1z), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:4732 CFG4 wr_en_data_or ( .A(dcsr_debugger_wr_sel_1), .B(dff), .C(sw_csr_wr_valid_qual), .D(init_wr_dcsr_step_en), .Y(wr_en_data_or_1z) ); defparam wr_en_data_or.INIT=16'hFFB3; // @46:5707 CFG2 \gen_bit_reset.state_val_12_u[0] ( .A(init_wr_dcsr_step_en), .B(csr_op_wr_data_1_0), .Y(state_val_12[0]) ); defparam \gen_bit_reset.state_val_12_u[0] .INIT=4'h4; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_csr_gpr_state_reg_1s_1s_0s_9_0 */ module miv_rv32_csr_gpr_state_reg_1s_1s_0s_9_1 ( csr_op_wr_data_1_0, init_wr_dcsr_step_en, dff, wr_en_data_or, PF_CCC_0_0_OUT0_FABCLK_0, dcsr_stepie ) ; input csr_op_wr_data_1_0 ; input init_wr_dcsr_step_en ; input dff ; input wr_en_data_or ; input PF_CCC_0_0_OUT0_FABCLK_0 ; output dcsr_stepie ; wire csr_op_wr_data_1_0 ; wire init_wr_dcsr_step_en ; wire dff ; wire wr_en_data_or ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire dcsr_stepie ; wire [0:0] state_val_12; wire VCC ; wire GND ; // @46:5705 SLE \gen_bit_reset.state_val[0] ( .Q(dcsr_stepie), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_12[0]), .EN(wr_en_data_or), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5707 CFG2 \gen_bit_reset.state_val_12_u[0] ( .A(init_wr_dcsr_step_en), .B(csr_op_wr_data_1_0), .Y(state_val_12[0]) ); defparam \gen_bit_reset.state_val_12_u[0] .INIT=4'h4; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_csr_gpr_state_reg_1s_1s_0s_9_1 */ module miv_rv32_csr_gpr_state_reg_1s_1s_0s_9_2 ( csr_op_wr_data_1_0, init_wr_dcsr_step_en, dff, wr_en_data_or, PF_CCC_0_0_OUT0_FABCLK_0, dcsr_stopcount ) ; input csr_op_wr_data_1_0 ; input init_wr_dcsr_step_en ; input dff ; input wr_en_data_or ; input PF_CCC_0_0_OUT0_FABCLK_0 ; output dcsr_stopcount ; wire csr_op_wr_data_1_0 ; wire init_wr_dcsr_step_en ; wire dff ; wire wr_en_data_or ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire dcsr_stopcount ; wire [0:0] state_val_12; wire VCC ; wire GND ; // @46:5705 SLE \gen_bit_reset.state_val[0] ( .Q(dcsr_stopcount), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_12[0]), .EN(wr_en_data_or), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5707 CFG2 \gen_bit_reset.state_val_12_u[0] ( .A(init_wr_dcsr_step_en), .B(csr_op_wr_data_1_0), .Y(state_val_12[0]) ); defparam \gen_bit_reset.state_val_12_u[0] .INIT=4'h4; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_csr_gpr_state_reg_1s_1s_0s_9_2 */ module miv_rv32_csr_gpr_state_reg_1s_1s_0s_9_3 ( csr_op_wr_data_1_0, init_wr_dcsr_step_en, dff, wr_en_data_or, PF_CCC_0_0_OUT0_FABCLK_0, dcsr_stoptime ) ; input csr_op_wr_data_1_0 ; input init_wr_dcsr_step_en ; input dff ; input wr_en_data_or ; input PF_CCC_0_0_OUT0_FABCLK_0 ; output dcsr_stoptime ; wire csr_op_wr_data_1_0 ; wire init_wr_dcsr_step_en ; wire dff ; wire wr_en_data_or ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire dcsr_stoptime ; wire [0:0] state_val_12; wire VCC ; wire GND ; // @46:5705 SLE \gen_bit_reset.state_val[0] ( .Q(dcsr_stoptime), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_12[0]), .EN(wr_en_data_or), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5707 CFG2 \gen_bit_reset.state_val_12_u[0] ( .A(init_wr_dcsr_step_en), .B(csr_op_wr_data_1_0), .Y(state_val_12[0]) ); defparam \gen_bit_reset.state_val_12_u[0] .INIT=4'h4; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_csr_gpr_state_reg_1s_1s_0s_9_3 */ module miv_rv32_csr_gpr_state_reg_3s_1s_0s_0 ( dcsr_cause, implicit_wr_dcsr_cause_wr_data_1_sm0, debug_enter_retr, implicit_wr_dcsr_cause_wr_data_1_ss0, trigger_debug_enter_taken, init_wr_dcsr_step_en, dff, PF_CCC_0_0_OUT0_FABCLK_0 ) ; output [2:0] dcsr_cause ; input implicit_wr_dcsr_cause_wr_data_1_sm0 ; input debug_enter_retr ; input implicit_wr_dcsr_cause_wr_data_1_ss0 ; input trigger_debug_enter_taken ; input init_wr_dcsr_step_en ; input dff ; input PF_CCC_0_0_OUT0_FABCLK_0 ; wire implicit_wr_dcsr_cause_wr_data_1_sm0 ; wire debug_enter_retr ; wire implicit_wr_dcsr_cause_wr_data_1_ss0 ; wire trigger_debug_enter_taken ; wire init_wr_dcsr_step_en ; wire dff ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire [2:0] state_val_8; wire VCC ; wire wr_en_data_or_Z ; wire GND ; wire un11_wr_data ; // @46:5705 SLE \gen_bit_reset.state_val[2] ( .Q(dcsr_cause[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_8[2]), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[1] ( .Q(dcsr_cause[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_8[1]), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5705 SLE \gen_bit_reset.state_val[0] ( .Q(dcsr_cause[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_8[0]), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:5632 CFG3 \gen_bit_reset.state_val_RNO[0] ( .A(init_wr_dcsr_step_en), .B(trigger_debug_enter_taken), .C(implicit_wr_dcsr_cause_wr_data_1_ss0), .Y(state_val_8[0]) ); defparam \gen_bit_reset.state_val_RNO[0] .INIT=8'h10; // @46:5632 CFG2 \gen_init_term.un11_wr_data ( .A(init_wr_dcsr_step_en), .B(debug_enter_retr), .Y(un11_wr_data) ); defparam \gen_init_term.un11_wr_data .INIT=4'h4; // @46:4843 CFG3 wr_en_data_or ( .A(init_wr_dcsr_step_en), .B(dff), .C(debug_enter_retr), .Y(wr_en_data_or_Z) ); defparam wr_en_data_or.INIT=8'hFB; // @46:5632 CFG4 \gen_bit_reset.state_val_RNO[2] ( .A(implicit_wr_dcsr_cause_wr_data_1_ss0), .B(un11_wr_data), .C(trigger_debug_enter_taken), .D(implicit_wr_dcsr_cause_wr_data_1_sm0), .Y(state_val_8[2]) ); defparam \gen_bit_reset.state_val_RNO[2] .INIT=16'h0400; // @46:5632 CFG4 \gen_bit_reset.state_val_RNO[1] ( .A(implicit_wr_dcsr_cause_wr_data_1_ss0), .B(un11_wr_data), .C(trigger_debug_enter_taken), .D(implicit_wr_dcsr_cause_wr_data_1_sm0), .Y(state_val_8[1]) ); defparam \gen_bit_reset.state_val_RNO[1] .INIT=16'hC0C8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_csr_gpr_state_reg_3s_1s_0s_0 */ module miv_rv32_csr_gpr_state_reg_1s_1s_0s_9_4 ( un3_mtvec_warl_wr_en_14_0, un3_mtvec_warl_wr_en_15_0, cpu_debug_csr_op_rd_data_net, trigger_req_de, cause_excpt_code_excpt_2, cause_excpt_code_excpt_0, machine_implicit_wr_mcause_excpt_code_wr_data_0, un1_u_miv_rv32_csr_decode_0_2_0, un1_u_miv_rv32_csr_decode_0_2_3, csr_priv_mtvec_epc_retr, csr_priv_cause_excpt_code, csr_priv_mtvec_excpt_vec_retr, csr_priv_mtval, cause_excpt_code_excpt_m2_0, mscratch_scratch, csr_priv_dpc_retr, ex_retr_pipe_sw_csr_wr_op_retr, mtime_count_out, cause_excpt_code_excpt_m5_0, un1_u_miv_rv32_csr_decode_0_47, un1_u_miv_rv32_csr_decode_0_42, un1_u_miv_rv32_csr_decode_0_41, un1_u_miv_rv32_csr_decode_0_50, un1_u_miv_rv32_csr_decode_0_37, un1_u_miv_rv32_csr_decode_0_53, un1_u_miv_rv32_csr_decode_0_58, un1_u_miv_rv32_csr_decode_0_16, un1_u_miv_rv32_csr_decode_0_15, un1_u_miv_rv32_csr_decode_0_1, un1_u_miv_rv32_csr_decode_0_0, un1_u_miv_rv32_csr_decode_0_40, un1_u_miv_rv32_csr_decode_0_3, un1_u_miv_rv32_csr_decode_0_56, un1_u_miv_rv32_csr_decode_0_43, un1_u_miv_rv32_csr_decode_0_4, un1_u_miv_rv32_csr_decode_0_60, dcsr_cause, ex_retr_pipe_sw_csr_addr_retr_8, ex_retr_pipe_sw_csr_addr_retr_0, ex_retr_pipe_gpr_wr_mux_sel_retr, ie_mextsysie, per_trigger_debug_0, csr_op_wr_data_1, ex_retr_pipe_exu_result_retr, tdata2_match_data_1, tdata2_match_data, ifu_expipe_resp_ireg_vaddr_net_0, ifu_expipe_resp_ireg_vaddr_net_1, ifu_expipe_resp_ireg_vaddr_net_2, ifu_expipe_resp_ireg_vaddr_net_3, ifu_expipe_resp_ireg_vaddr_net_4, ifu_expipe_resp_ireg_vaddr_net_5, ifu_expipe_resp_ireg_vaddr_net_6, ifu_expipe_resp_ireg_vaddr_net_7, ifu_expipe_resp_ireg_vaddr_net_8, ifu_expipe_resp_ireg_vaddr_net_13, ifu_expipe_resp_ireg_vaddr_net_28, ifu_expipe_resp_ireg_vaddr_net_29, step_debug_enter_pending6, de_ex_pipe_implicit_pseudo_instr_ex_2, instr_accepted_ex, trigger_debug_enter_pending6, interrupt_could_commit, trigger_op_addr_valid_de, debug_active_retr5, debug_reset_pending, un1_instr_completing_retr_d, un1_instr_completing_retr_c, machine_sw_wr_tdata1_mcontrol_execute_wr_en, mepc_sw_wr_sel_3, tdata1_sw_rd_sel_7, lsu_op_complete_retr_0, cause_excpt_code_excpt_ss6_1z, un3_instr_inhibit_ex_8, ex_retr_pipe_illegal_instr_retr, sw_csr_wr_valid_qual_1z, tdata1_mcontrol_execute, lsu_flush, lsu_expipe_resp_str_amo_addr_misalign_net, gpr_wr_completing_retr_3_0_d, un1_excpt_i_access_fault_1z, i_access_mem_error_retr, tdata1_mcontrol_hit, dcsr_stopcount, dcsr_stoptime, dcsr_stepie, status_mie, status_mpie, implicit_wr_dcsr_cause_wr_data_1_ss0, mip_sw_rd_sel_3, mcause_interrupt, mcause_sw_rd_sel_1, wfi_waiting_reg6_1z, dpc_debugger_wr_sel_1, mtvec_sw_rd_sel_1, mie_sw_wr_sel_1, clr_wfi_waiting_i, un29_trap_val, un1_req_resp_state_1_i, lsu_expipe_resp_ld_addr_misalign_0, implicit_wr_dcsr_cause_wr_data_1_sm0, set_wfi_waiting_1z, ex_retr_pipe_wfi_retr, debug_mode6, cpu_debug_halt_ack_net, ex_retr_pipe_m_env_call_retr, debug_exit_retr_i, cpu_debug_csr_op_rd_data_valid_net, req_resp_state_valid, un2_exception_taken_1z, cause_excpt_code_excpt_sm3, m_env_call_retr, implicit_wr_dpc_pc_en, haltreq_debug_enter_pending6, debug_exit_retr, init_wr_dcsr_step_en, formal_trace_reset_taken, cpu_debug_resume_req_net, debug_mode_retire_mask_retr, sw_csr_op_ready_retr, exu_result_valid_retr, ie_meie, debug_enter_retr_i, machine_sw_wr_tdata2_match_data_wr_en_0, tdata2_sw_rd_sel_7, csr_op_rd_valid_1z, ex_retr_pipe_sw_csr_rd_op_retr, dbreak_retr, un11_trap_val_1z, un3_instr_inhibit_ex_6, un7_trap_val_1z, illegal_instr_retr, ex_retr_debug_enter_req_retr, haltreq_debug_enter_taken_1z, dcsr_debugger_wr_sel_0, mimpid_sw_rd_sel_3, trigger_debug_enter_taken_1z, debug_active_retr, dcsr_ebreakm, haltreq_debug_enter_pending, step_debug_enter_pending, trigger_debug_enter_pending, step_debug_enter_taken_1z, ebreak_debug_enter_taken_1z, interrupt_captured_sw, interrupt_captured_timer, exu_csr_op_wr_data14_1z, N_1397_i, N_1398_i, cpu_debug_halt_req_net, ie_mtie, ex_retr_pipe_i_access_mem_error_retr, ex_retr_pipe_dbreak_retr, d_N_3_mux_3, un6_instr_is_lsu_op_retr, un1_lsu_resp_valid38_1_i, lsu_resp_valid40, debug_enter_req_de, soft_reset_pending, ie_msie, interrupt_pending_a3_0, un1_lsu_resp_valid, machine_implicit_wr_mtval_tval_wr_en_1z, interrupt_taken_timer, interrupt_taken_sw, trace_priv_i, lsu_expipe_resp_access_mem_error_net, stage_state_retr, gpr_wr_en_retr, un14_gpr_rs1_stall_lsu, interrupt_pending_2, debug_enter_retr, mepc_sw_rd_sel_3, mepc_sw_rd_sel_1, N_367, N_298, N_369, N_368, N_371, N_370, N_373, N_372, N_375, N_374, N_377, N_376, N_379, N_378, N_380, N_382, N_381, N_383, N_424, N_306, dff, wr_en_data_or, PF_CCC_0_0_OUT0_FABCLK_0, dcsr_step ) ; output un3_mtvec_warl_wr_en_14_0 ; output un3_mtvec_warl_wr_en_15_0 ; output [31:0] cpu_debug_csr_op_rd_data_net ; output [1:0] trigger_req_de ; output cause_excpt_code_excpt_2 ; output cause_excpt_code_excpt_0 ; output [4:3] machine_implicit_wr_mcause_excpt_code_wr_data_0 ; input un1_u_miv_rv32_csr_decode_0_2_0 ; input un1_u_miv_rv32_csr_decode_0_2_3 ; input [31:1] csr_priv_mtvec_epc_retr ; input [4:0] csr_priv_cause_excpt_code ; input [31:2] csr_priv_mtvec_excpt_vec_retr ; input [31:0] csr_priv_mtval ; output cause_excpt_code_excpt_m2_0 ; input [31:0] mscratch_scratch ; input [31:0] csr_priv_dpc_retr ; input [1:0] ex_retr_pipe_sw_csr_wr_op_retr ; input [63:0] mtime_count_out ; output cause_excpt_code_excpt_m5_0 ; input un1_u_miv_rv32_csr_decode_0_47 ; input un1_u_miv_rv32_csr_decode_0_42 ; input un1_u_miv_rv32_csr_decode_0_41 ; input un1_u_miv_rv32_csr_decode_0_50 ; input un1_u_miv_rv32_csr_decode_0_37 ; input un1_u_miv_rv32_csr_decode_0_53 ; input un1_u_miv_rv32_csr_decode_0_58 ; input un1_u_miv_rv32_csr_decode_0_16 ; input un1_u_miv_rv32_csr_decode_0_15 ; input un1_u_miv_rv32_csr_decode_0_1 ; input un1_u_miv_rv32_csr_decode_0_0 ; input un1_u_miv_rv32_csr_decode_0_40 ; input un1_u_miv_rv32_csr_decode_0_3 ; input un1_u_miv_rv32_csr_decode_0_56 ; input un1_u_miv_rv32_csr_decode_0_43 ; input un1_u_miv_rv32_csr_decode_0_4 ; input un1_u_miv_rv32_csr_decode_0_60 ; input [2:0] dcsr_cause ; input ex_retr_pipe_sw_csr_addr_retr_8 ; input ex_retr_pipe_sw_csr_addr_retr_0 ; input [1:0] ex_retr_pipe_gpr_wr_mux_sel_retr ; input [1:0] ie_mextsysie ; input per_trigger_debug_0 ; output [31:0] csr_op_wr_data_1 ; input [31:0] ex_retr_pipe_exu_result_retr ; input [31:0] tdata2_match_data_1 ; input [31:0] tdata2_match_data ; input ifu_expipe_resp_ireg_vaddr_net_0 ; input ifu_expipe_resp_ireg_vaddr_net_1 ; input ifu_expipe_resp_ireg_vaddr_net_2 ; input ifu_expipe_resp_ireg_vaddr_net_3 ; input ifu_expipe_resp_ireg_vaddr_net_4 ; input ifu_expipe_resp_ireg_vaddr_net_5 ; input ifu_expipe_resp_ireg_vaddr_net_6 ; input ifu_expipe_resp_ireg_vaddr_net_7 ; input ifu_expipe_resp_ireg_vaddr_net_8 ; input ifu_expipe_resp_ireg_vaddr_net_13 ; input ifu_expipe_resp_ireg_vaddr_net_28 ; input ifu_expipe_resp_ireg_vaddr_net_29 ; output step_debug_enter_pending6 ; input de_ex_pipe_implicit_pseudo_instr_ex_2 ; input instr_accepted_ex ; output trigger_debug_enter_pending6 ; input interrupt_could_commit ; input trigger_op_addr_valid_de ; output debug_active_retr5 ; input debug_reset_pending ; input un1_instr_completing_retr_d ; input un1_instr_completing_retr_c ; output machine_sw_wr_tdata1_mcontrol_execute_wr_en ; input mepc_sw_wr_sel_3 ; input tdata1_sw_rd_sel_7 ; input lsu_op_complete_retr_0 ; output cause_excpt_code_excpt_ss6_1z ; input un3_instr_inhibit_ex_8 ; input ex_retr_pipe_illegal_instr_retr ; output sw_csr_wr_valid_qual_1z ; input tdata1_mcontrol_execute ; input lsu_flush ; input lsu_expipe_resp_str_amo_addr_misalign_net ; input gpr_wr_completing_retr_3_0_d ; output un1_excpt_i_access_fault_1z ; input i_access_mem_error_retr ; input tdata1_mcontrol_hit ; input dcsr_stopcount ; input dcsr_stoptime ; input dcsr_stepie ; input status_mie ; input status_mpie ; output implicit_wr_dcsr_cause_wr_data_1_ss0 ; input mip_sw_rd_sel_3 ; input mcause_interrupt ; input mcause_sw_rd_sel_1 ; output wfi_waiting_reg6_1z ; input dpc_debugger_wr_sel_1 ; input mtvec_sw_rd_sel_1 ; input mie_sw_wr_sel_1 ; output clr_wfi_waiting_i ; output un29_trap_val ; input un1_req_resp_state_1_i ; input lsu_expipe_resp_ld_addr_misalign_0 ; output implicit_wr_dcsr_cause_wr_data_1_sm0 ; output set_wfi_waiting_1z ; input ex_retr_pipe_wfi_retr ; output debug_mode6 ; output cpu_debug_halt_ack_net ; input ex_retr_pipe_m_env_call_retr ; output debug_exit_retr_i ; output cpu_debug_csr_op_rd_data_valid_net ; input req_resp_state_valid ; output un2_exception_taken_1z ; output cause_excpt_code_excpt_sm3 ; input m_env_call_retr ; output implicit_wr_dpc_pc_en ; output haltreq_debug_enter_pending6 ; output debug_exit_retr ; output init_wr_dcsr_step_en ; output formal_trace_reset_taken ; input cpu_debug_resume_req_net ; output debug_mode_retire_mask_retr ; output sw_csr_op_ready_retr ; input exu_result_valid_retr ; input ie_meie ; output debug_enter_retr_i ; output machine_sw_wr_tdata2_match_data_wr_en_0 ; input tdata2_sw_rd_sel_7 ; output csr_op_rd_valid_1z ; input ex_retr_pipe_sw_csr_rd_op_retr ; input dbreak_retr ; output un11_trap_val_1z ; input un3_instr_inhibit_ex_6 ; output un7_trap_val_1z ; input illegal_instr_retr ; input ex_retr_debug_enter_req_retr ; output haltreq_debug_enter_taken_1z ; output dcsr_debugger_wr_sel_0 ; input mimpid_sw_rd_sel_3 ; output trigger_debug_enter_taken_1z ; input debug_active_retr ; input dcsr_ebreakm ; input haltreq_debug_enter_pending ; input step_debug_enter_pending ; input trigger_debug_enter_pending ; output step_debug_enter_taken_1z ; output ebreak_debug_enter_taken_1z ; input interrupt_captured_sw ; input interrupt_captured_timer ; output exu_csr_op_wr_data14_1z ; input N_1397_i ; input N_1398_i ; input cpu_debug_halt_req_net ; input ie_mtie ; input ex_retr_pipe_i_access_mem_error_retr ; input ex_retr_pipe_dbreak_retr ; output d_N_3_mux_3 ; input un6_instr_is_lsu_op_retr ; input un1_lsu_resp_valid38_1_i ; input lsu_resp_valid40 ; output debug_enter_req_de ; input soft_reset_pending ; input ie_msie ; input interrupt_pending_a3_0 ; input un1_lsu_resp_valid ; output machine_implicit_wr_mtval_tval_wr_en_1z ; input interrupt_taken_timer ; input interrupt_taken_sw ; input trace_priv_i ; input lsu_expipe_resp_access_mem_error_net ; input stage_state_retr ; input gpr_wr_en_retr ; input un14_gpr_rs1_stall_lsu ; input interrupt_pending_2 ; output debug_enter_retr ; input mepc_sw_rd_sel_3 ; input mepc_sw_rd_sel_1 ; input N_367 ; input N_298 ; input N_369 ; input N_368 ; input N_371 ; input N_370 ; input N_373 ; input N_372 ; input N_375 ; input N_374 ; input N_377 ; input N_376 ; input N_379 ; input N_378 ; input N_380 ; input N_382 ; input N_381 ; input N_383 ; input N_424 ; input N_306 ; input dff ; input wr_en_data_or ; input PF_CCC_0_0_OUT0_FABCLK_0 ; output dcsr_step ; wire un3_mtvec_warl_wr_en_14_0 ; wire un3_mtvec_warl_wr_en_15_0 ; wire cause_excpt_code_excpt_2 ; wire cause_excpt_code_excpt_0 ; wire un1_u_miv_rv32_csr_decode_0_2_0 ; wire un1_u_miv_rv32_csr_decode_0_2_3 ; wire cause_excpt_code_excpt_m2_0 ; wire cause_excpt_code_excpt_m5_0 ; wire un1_u_miv_rv32_csr_decode_0_47 ; wire un1_u_miv_rv32_csr_decode_0_42 ; wire un1_u_miv_rv32_csr_decode_0_41 ; wire un1_u_miv_rv32_csr_decode_0_50 ; wire un1_u_miv_rv32_csr_decode_0_37 ; wire un1_u_miv_rv32_csr_decode_0_53 ; wire un1_u_miv_rv32_csr_decode_0_58 ; wire un1_u_miv_rv32_csr_decode_0_16 ; wire un1_u_miv_rv32_csr_decode_0_15 ; wire un1_u_miv_rv32_csr_decode_0_1 ; wire un1_u_miv_rv32_csr_decode_0_0 ; wire un1_u_miv_rv32_csr_decode_0_40 ; wire un1_u_miv_rv32_csr_decode_0_3 ; wire un1_u_miv_rv32_csr_decode_0_56 ; wire un1_u_miv_rv32_csr_decode_0_43 ; wire un1_u_miv_rv32_csr_decode_0_4 ; wire un1_u_miv_rv32_csr_decode_0_60 ; wire ex_retr_pipe_sw_csr_addr_retr_8 ; wire ex_retr_pipe_sw_csr_addr_retr_0 ; wire per_trigger_debug_0 ; wire ifu_expipe_resp_ireg_vaddr_net_0 ; wire ifu_expipe_resp_ireg_vaddr_net_1 ; wire ifu_expipe_resp_ireg_vaddr_net_2 ; wire ifu_expipe_resp_ireg_vaddr_net_3 ; wire ifu_expipe_resp_ireg_vaddr_net_4 ; wire ifu_expipe_resp_ireg_vaddr_net_5 ; wire ifu_expipe_resp_ireg_vaddr_net_6 ; wire ifu_expipe_resp_ireg_vaddr_net_7 ; wire ifu_expipe_resp_ireg_vaddr_net_8 ; wire ifu_expipe_resp_ireg_vaddr_net_13 ; wire ifu_expipe_resp_ireg_vaddr_net_28 ; wire ifu_expipe_resp_ireg_vaddr_net_29 ; wire step_debug_enter_pending6 ; wire de_ex_pipe_implicit_pseudo_instr_ex_2 ; wire instr_accepted_ex ; wire trigger_debug_enter_pending6 ; wire interrupt_could_commit ; wire trigger_op_addr_valid_de ; wire debug_active_retr5 ; wire debug_reset_pending ; wire un1_instr_completing_retr_d ; wire un1_instr_completing_retr_c ; wire machine_sw_wr_tdata1_mcontrol_execute_wr_en ; wire mepc_sw_wr_sel_3 ; wire tdata1_sw_rd_sel_7 ; wire lsu_op_complete_retr_0 ; wire cause_excpt_code_excpt_ss6_1z ; wire un3_instr_inhibit_ex_8 ; wire ex_retr_pipe_illegal_instr_retr ; wire sw_csr_wr_valid_qual_1z ; wire tdata1_mcontrol_execute ; wire lsu_flush ; wire lsu_expipe_resp_str_amo_addr_misalign_net ; wire gpr_wr_completing_retr_3_0_d ; wire un1_excpt_i_access_fault_1z ; wire i_access_mem_error_retr ; wire tdata1_mcontrol_hit ; wire dcsr_stopcount ; wire dcsr_stoptime ; wire dcsr_stepie ; wire status_mie ; wire status_mpie ; wire implicit_wr_dcsr_cause_wr_data_1_ss0 ; wire mip_sw_rd_sel_3 ; wire mcause_interrupt ; wire mcause_sw_rd_sel_1 ; wire wfi_waiting_reg6_1z ; wire dpc_debugger_wr_sel_1 ; wire mtvec_sw_rd_sel_1 ; wire mie_sw_wr_sel_1 ; wire clr_wfi_waiting_i ; wire un29_trap_val ; wire un1_req_resp_state_1_i ; wire lsu_expipe_resp_ld_addr_misalign_0 ; wire implicit_wr_dcsr_cause_wr_data_1_sm0 ; wire set_wfi_waiting_1z ; wire ex_retr_pipe_wfi_retr ; wire debug_mode6 ; wire cpu_debug_halt_ack_net ; wire ex_retr_pipe_m_env_call_retr ; wire debug_exit_retr_i ; wire cpu_debug_csr_op_rd_data_valid_net ; wire req_resp_state_valid ; wire un2_exception_taken_1z ; wire cause_excpt_code_excpt_sm3 ; wire m_env_call_retr ; wire implicit_wr_dpc_pc_en ; wire haltreq_debug_enter_pending6 ; wire debug_exit_retr ; wire init_wr_dcsr_step_en ; wire formal_trace_reset_taken ; wire cpu_debug_resume_req_net ; wire debug_mode_retire_mask_retr ; wire sw_csr_op_ready_retr ; wire exu_result_valid_retr ; wire ie_meie ; wire debug_enter_retr_i ; wire machine_sw_wr_tdata2_match_data_wr_en_0 ; wire tdata2_sw_rd_sel_7 ; wire csr_op_rd_valid_1z ; wire ex_retr_pipe_sw_csr_rd_op_retr ; wire dbreak_retr ; wire un11_trap_val_1z ; wire un3_instr_inhibit_ex_6 ; wire un7_trap_val_1z ; wire illegal_instr_retr ; wire ex_retr_debug_enter_req_retr ; wire haltreq_debug_enter_taken_1z ; wire dcsr_debugger_wr_sel_0 ; wire mimpid_sw_rd_sel_3 ; wire trigger_debug_enter_taken_1z ; wire debug_active_retr ; wire dcsr_ebreakm ; wire haltreq_debug_enter_pending ; wire step_debug_enter_pending ; wire trigger_debug_enter_pending ; wire step_debug_enter_taken_1z ; wire ebreak_debug_enter_taken_1z ; wire interrupt_captured_sw ; wire interrupt_captured_timer ; wire exu_csr_op_wr_data14_1z ; wire N_1397_i ; wire N_1398_i ; wire cpu_debug_halt_req_net ; wire ie_mtie ; wire ex_retr_pipe_i_access_mem_error_retr ; wire ex_retr_pipe_dbreak_retr ; wire d_N_3_mux_3 ; wire un6_instr_is_lsu_op_retr ; wire un1_lsu_resp_valid38_1_i ; wire lsu_resp_valid40 ; wire debug_enter_req_de ; wire soft_reset_pending ; wire ie_msie ; wire interrupt_pending_a3_0 ; wire un1_lsu_resp_valid ; wire machine_implicit_wr_mtval_tval_wr_en_1z ; wire interrupt_taken_timer ; wire interrupt_taken_sw ; wire trace_priv_i ; wire lsu_expipe_resp_access_mem_error_net ; wire stage_state_retr ; wire gpr_wr_en_retr ; wire un14_gpr_rs1_stall_lsu ; wire interrupt_pending_2 ; wire debug_enter_retr ; wire mepc_sw_rd_sel_3 ; wire mepc_sw_rd_sel_1 ; wire N_367 ; wire N_298 ; wire N_369 ; wire N_368 ; wire N_371 ; wire N_370 ; wire N_373 ; wire N_372 ; wire N_375 ; wire N_374 ; wire N_377 ; wire N_376 ; wire N_379 ; wire N_378 ; wire N_380 ; wire N_382 ; wire N_381 ; wire N_383 ; wire N_424 ; wire N_306 ; wire dff ; wire wr_en_data_or ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire dcsr_step ; wire [0:0] state_val_12; wire [15:0] un5_trigger_iaddr_match_0_data_tmp; wire [1:0] trigger_match_RNO_14_S; wire [1:0] trigger_match_RNO_14_Y; wire [1:0] trigger_match_RNO_13_S; wire [1:0] trigger_match_RNO_13_Y; wire [1:0] trigger_match_RNO_12_S; wire [1:0] trigger_match_RNO_12_Y; wire [1:0] trigger_match_RNO_11_S; wire [1:0] trigger_match_RNO_11_Y; wire [1:0] trigger_match_RNO_10_S; wire [1:0] trigger_match_RNO_10_Y; wire [1:0] trigger_match_RNO_9_S; wire [1:0] trigger_match_RNO_9_Y; wire [1:0] trigger_match_RNO_8_S; wire [1:0] trigger_match_RNO_8_Y; wire [1:0] trigger_match_RNO_7_S; wire [1:0] trigger_match_RNO_7_Y; wire [1:0] trigger_match_RNO_6_S; wire [1:0] trigger_match_RNO_6_Y; wire [1:0] trigger_match_RNO_5_S; wire [1:0] trigger_match_RNO_5_Y; wire [1:0] trigger_match_RNO_4_S; wire [1:0] trigger_match_RNO_4_Y; wire [1:0] trigger_match_RNO_3_S; wire [1:0] trigger_match_RNO_3_Y; wire [1:0] trigger_match_RNO_2_S; wire [1:0] trigger_match_RNO_2_Y; wire [1:0] trigger_match_RNO_1_S; wire [1:0] trigger_match_RNO_1_Y; wire [1:0] trigger_match_RNO_0_S; wire [1:0] trigger_match_RNO_0_Y; wire [1:0] trigger_match_RNO_S; wire [1:0] trigger_match_RNO_Y; wire [15:0] un2_trigger_iaddr_match_0_data_tmp; wire [31:0] debug_csr_op_rd_data_3_Z; wire [31:0] debug_csr_op_rd_data_6_Z; wire [3:3] mip_rd_data_1_Z; wire [3:3] debug_csr_op_rd_data_1_0_Z; wire [31:0] debug_csr_op_rd_data_2_Z; wire [31:0] debug_csr_op_rd_data_1_Z; wire [3:3] debug_csr_op_rd_data_10_1_Z; wire [7:2] debug_csr_op_rd_data_9_Z; wire [29:1] debug_csr_op_rd_data_4_Z; wire [31:0] csr_op_wr_data_1_2; wire [22:22] mie_rd_data_Z; wire [30:30] mtvec_rd_data_Z; wire [7:7] mepc_rd_data_Z; wire [8:8] mscratch_rd_data_Z; wire [29:1] utime_rd_data_Z; wire [31:0] utimeh_rd_data_Z; wire [6:6] dcsr_rd_data_Z; wire [29:1] dpc_rd_data_Z; wire [31:31] mcause_rd_data_Z; wire [30:2] debug_csr_op_rd_data_0_Z; wire [31:2] debug_csr_op_rd_data_5_Z; wire [12:7] debug_csr_op_rd_data_8_Z; wire [3:3] cause_excpt_code_excpt_m2_Z; wire [29:6] debug_csr_op_rd_data_7_Z; wire [0:0] un3_mtvec_warl_wr_en_11_Z; wire [0:0] un3_mtvec_warl_wr_en_10_Z; wire [0:0] un3_mtvec_warl_wr_en_9_Z; wire [0:0] un3_mtvec_warl_wr_en_8_Z; wire VCC ; wire GND ; wire un4_exception_taken_5_Z ; wire exception_m6_0_1_1 ; wire exception_m6_0_1 ; wire machine_implicit_wr_mtval_tval_wr_en_1_Z ; wire d_N_5_mux_3 ; wire exception_N_5 ; wire exception_N_10_mux ; wire csr_N_9_mux_i_2_1_Z ; wire un1_soft_reset_taken_retr_s_out ; wire csr_N_9_mux_i_2 ; wire csr_op_wr_data_1_sn_N_3 ; wire csr_op_wr_data_1_sn_N_4 ; wire set_step_debug_enter_pending_0 ; wire un4_exception_taken_0_Z ; wire un1_set_wfi_waiting_1_Z ; wire exception_N_4 ; wire un2_haltreq_debug_enter_taken ; wire clr_wfi_waiting_0_Z ; wire un1_soft_reset_taken_retr_s_s_0_Z ; wire excpt_ebreak_Z ; wire un1_set_wfi_waiting_Z ; wire exception_m5_1 ; wire un4_exception_taken_3_Z ; wire csr_N_9_mux_i_0_a0_0_Z ; wire debug_csr_op_rd_data_1159_Z ; wire machine_implicit_wr_mtval_tval_wr_en_1_RNO_2_Z ; wire csr_m6_0_a4_1_1 ; wire N_679 ; wire csr_op_wr_valid_Z ; wire csr_N_9_mux_i_4 ; wire un1_soft_reset_taken_retr_Z ; wire un46_mtvec_warl_wr_enlt3 ; // @46:5705 SLE \gen_bit_reset.state_val[0] ( .Q(dcsr_step), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_12[0]), .EN(wr_en_data_or), .LAT(GND), .SD(GND), .SLn(dff) ); // @46:11165 ARI1 \gen_tdata1_2.trigger_match_RNO_14[1] ( .FCO(un5_trigger_iaddr_match_0_data_tmp[0]), .S(trigger_match_RNO_14_S[1]), .Y(trigger_match_RNO_14_Y[1]), .B(N_306), .C(N_424), .D(tdata2_match_data[0]), .A(tdata2_match_data[1]), .FCI(GND) ); defparam \gen_tdata1_2.trigger_match_RNO_14[1] .INIT=20'h62814; // @46:11165 ARI1 \gen_tdata1_2.trigger_match_RNO_13[1] ( .FCO(un5_trigger_iaddr_match_0_data_tmp[1]), .S(trigger_match_RNO_13_S[1]), .Y(trigger_match_RNO_13_Y[1]), .B(ifu_expipe_resp_ireg_vaddr_net_0), .C(ifu_expipe_resp_ireg_vaddr_net_1), .D(tdata2_match_data[2]), .A(tdata2_match_data[3]), .FCI(un5_trigger_iaddr_match_0_data_tmp[0]) ); defparam \gen_tdata1_2.trigger_match_RNO_13[1] .INIT=20'h68421; // @46:11165 ARI1 \gen_tdata1_2.trigger_match_RNO_12[1] ( .FCO(un5_trigger_iaddr_match_0_data_tmp[2]), .S(trigger_match_RNO_12_S[1]), .Y(trigger_match_RNO_12_Y[1]), .B(ifu_expipe_resp_ireg_vaddr_net_2), .C(ifu_expipe_resp_ireg_vaddr_net_3), .D(tdata2_match_data[4]), .A(tdata2_match_data[5]), .FCI(un5_trigger_iaddr_match_0_data_tmp[1]) ); defparam \gen_tdata1_2.trigger_match_RNO_12[1] .INIT=20'h68421; // @46:11165 ARI1 \gen_tdata1_2.trigger_match_RNO_11[1] ( .FCO(un5_trigger_iaddr_match_0_data_tmp[3]), .S(trigger_match_RNO_11_S[1]), .Y(trigger_match_RNO_11_Y[1]), .B(ifu_expipe_resp_ireg_vaddr_net_4), .C(ifu_expipe_resp_ireg_vaddr_net_5), .D(tdata2_match_data[6]), .A(tdata2_match_data[7]), .FCI(un5_trigger_iaddr_match_0_data_tmp[2]) ); defparam \gen_tdata1_2.trigger_match_RNO_11[1] .INIT=20'h68421; // @46:11165 ARI1 \gen_tdata1_2.trigger_match_RNO_10[1] ( .FCO(un5_trigger_iaddr_match_0_data_tmp[4]), .S(trigger_match_RNO_10_S[1]), .Y(trigger_match_RNO_10_Y[1]), .B(ifu_expipe_resp_ireg_vaddr_net_6), .C(ifu_expipe_resp_ireg_vaddr_net_7), .D(tdata2_match_data[8]), .A(tdata2_match_data[9]), .FCI(un5_trigger_iaddr_match_0_data_tmp[3]) ); defparam \gen_tdata1_2.trigger_match_RNO_10[1] .INIT=20'h68421; // @46:11165 ARI1 \gen_tdata1_2.trigger_match_RNO_9[1] ( .FCO(un5_trigger_iaddr_match_0_data_tmp[5]), .S(trigger_match_RNO_9_S[1]), .Y(trigger_match_RNO_9_Y[1]), .B(N_383), .C(ifu_expipe_resp_ireg_vaddr_net_8), .D(tdata2_match_data[10]), .A(tdata2_match_data[11]), .FCI(un5_trigger_iaddr_match_0_data_tmp[4]) ); defparam \gen_tdata1_2.trigger_match_RNO_9[1] .INIT=20'h68241; // @46:11165 ARI1 \gen_tdata1_2.trigger_match_RNO_8[1] ( .FCO(un5_trigger_iaddr_match_0_data_tmp[6]), .S(trigger_match_RNO_8_S[1]), .Y(trigger_match_RNO_8_Y[1]), .B(N_381), .C(N_382), .D(tdata2_match_data[12]), .A(tdata2_match_data[13]), .FCI(un5_trigger_iaddr_match_0_data_tmp[5]) ); defparam \gen_tdata1_2.trigger_match_RNO_8[1] .INIT=20'h68241; // @46:11165 ARI1 \gen_tdata1_2.trigger_match_RNO_7[1] ( .FCO(un5_trigger_iaddr_match_0_data_tmp[7]), .S(trigger_match_RNO_7_S[1]), .Y(trigger_match_RNO_7_Y[1]), .B(N_380), .C(ifu_expipe_resp_ireg_vaddr_net_13), .D(tdata2_match_data[14]), .A(tdata2_match_data[15]), .FCI(un5_trigger_iaddr_match_0_data_tmp[6]) ); defparam \gen_tdata1_2.trigger_match_RNO_7[1] .INIT=20'h68421; // @46:11165 ARI1 \gen_tdata1_2.trigger_match_RNO_6[1] ( .FCO(un5_trigger_iaddr_match_0_data_tmp[8]), .S(trigger_match_RNO_6_S[1]), .Y(trigger_match_RNO_6_Y[1]), .B(N_378), .C(N_379), .D(tdata2_match_data[16]), .A(tdata2_match_data[17]), .FCI(un5_trigger_iaddr_match_0_data_tmp[7]) ); defparam \gen_tdata1_2.trigger_match_RNO_6[1] .INIT=20'h68241; // @46:11165 ARI1 \gen_tdata1_2.trigger_match_RNO_5[1] ( .FCO(un5_trigger_iaddr_match_0_data_tmp[9]), .S(trigger_match_RNO_5_S[1]), .Y(trigger_match_RNO_5_Y[1]), .B(N_376), .C(N_377), .D(tdata2_match_data[18]), .A(tdata2_match_data[19]), .FCI(un5_trigger_iaddr_match_0_data_tmp[8]) ); defparam \gen_tdata1_2.trigger_match_RNO_5[1] .INIT=20'h68241; // @46:11165 ARI1 \gen_tdata1_2.trigger_match_RNO_4[1] ( .FCO(un5_trigger_iaddr_match_0_data_tmp[10]), .S(trigger_match_RNO_4_S[1]), .Y(trigger_match_RNO_4_Y[1]), .B(N_374), .C(N_375), .D(tdata2_match_data[20]), .A(tdata2_match_data[21]), .FCI(un5_trigger_iaddr_match_0_data_tmp[9]) ); defparam \gen_tdata1_2.trigger_match_RNO_4[1] .INIT=20'h68241; // @46:11165 ARI1 \gen_tdata1_2.trigger_match_RNO_3[1] ( .FCO(un5_trigger_iaddr_match_0_data_tmp[11]), .S(trigger_match_RNO_3_S[1]), .Y(trigger_match_RNO_3_Y[1]), .B(N_372), .C(N_373), .D(tdata2_match_data[22]), .A(tdata2_match_data[23]), .FCI(un5_trigger_iaddr_match_0_data_tmp[10]) ); defparam \gen_tdata1_2.trigger_match_RNO_3[1] .INIT=20'h68241; // @46:11165 ARI1 \gen_tdata1_2.trigger_match_RNO_2[1] ( .FCO(un5_trigger_iaddr_match_0_data_tmp[12]), .S(trigger_match_RNO_2_S[1]), .Y(trigger_match_RNO_2_Y[1]), .B(N_370), .C(N_371), .D(tdata2_match_data[24]), .A(tdata2_match_data[25]), .FCI(un5_trigger_iaddr_match_0_data_tmp[11]) ); defparam \gen_tdata1_2.trigger_match_RNO_2[1] .INIT=20'h68241; // @46:11165 ARI1 \gen_tdata1_2.trigger_match_RNO_1[1] ( .FCO(un5_trigger_iaddr_match_0_data_tmp[13]), .S(trigger_match_RNO_1_S[1]), .Y(trigger_match_RNO_1_Y[1]), .B(N_368), .C(N_369), .D(tdata2_match_data[26]), .A(tdata2_match_data[27]), .FCI(un5_trigger_iaddr_match_0_data_tmp[12]) ); defparam \gen_tdata1_2.trigger_match_RNO_1[1] .INIT=20'h68241; // @46:11165 ARI1 \gen_tdata1_2.trigger_match_RNO_0[1] ( .FCO(un5_trigger_iaddr_match_0_data_tmp[14]), .S(trigger_match_RNO_0_S[1]), .Y(trigger_match_RNO_0_Y[1]), .B(N_298), .C(N_367), .D(tdata2_match_data[28]), .A(tdata2_match_data[29]), .FCI(un5_trigger_iaddr_match_0_data_tmp[13]) ); defparam \gen_tdata1_2.trigger_match_RNO_0[1] .INIT=20'h64182; // @46:11165 ARI1 \gen_tdata1_2.trigger_match_RNO[1] ( .FCO(un5_trigger_iaddr_match_0_data_tmp[15]), .S(trigger_match_RNO_S[1]), .Y(trigger_match_RNO_Y[1]), .B(ifu_expipe_resp_ireg_vaddr_net_28), .C(ifu_expipe_resp_ireg_vaddr_net_29), .D(tdata2_match_data[30]), .A(tdata2_match_data[31]), .FCI(un5_trigger_iaddr_match_0_data_tmp[14]) ); defparam \gen_tdata1_2.trigger_match_RNO[1] .INIT=20'h68421; // @46:11165 ARI1 \gen_tdata1_2.trigger_match_RNO_14[0] ( .FCO(un2_trigger_iaddr_match_0_data_tmp[0]), .S(trigger_match_RNO_14_S[0]), .Y(trigger_match_RNO_14_Y[0]), .B(N_306), .C(N_424), .D(tdata2_match_data_1[0]), .A(tdata2_match_data_1[1]), .FCI(GND) ); defparam \gen_tdata1_2.trigger_match_RNO_14[0] .INIT=20'h62814; // @46:11165 ARI1 \gen_tdata1_2.trigger_match_RNO_13[0] ( .FCO(un2_trigger_iaddr_match_0_data_tmp[1]), .S(trigger_match_RNO_13_S[0]), .Y(trigger_match_RNO_13_Y[0]), .B(ifu_expipe_resp_ireg_vaddr_net_0), .C(ifu_expipe_resp_ireg_vaddr_net_1), .D(tdata2_match_data_1[2]), .A(tdata2_match_data_1[3]), .FCI(un2_trigger_iaddr_match_0_data_tmp[0]) ); defparam \gen_tdata1_2.trigger_match_RNO_13[0] .INIT=20'h68421; // @46:11165 ARI1 \gen_tdata1_2.trigger_match_RNO_12[0] ( .FCO(un2_trigger_iaddr_match_0_data_tmp[2]), .S(trigger_match_RNO_12_S[0]), .Y(trigger_match_RNO_12_Y[0]), .B(ifu_expipe_resp_ireg_vaddr_net_2), .C(ifu_expipe_resp_ireg_vaddr_net_3), .D(tdata2_match_data_1[4]), .A(tdata2_match_data_1[5]), .FCI(un2_trigger_iaddr_match_0_data_tmp[1]) ); defparam \gen_tdata1_2.trigger_match_RNO_12[0] .INIT=20'h68421; // @46:11165 ARI1 \gen_tdata1_2.trigger_match_RNO_11[0] ( .FCO(un2_trigger_iaddr_match_0_data_tmp[3]), .S(trigger_match_RNO_11_S[0]), .Y(trigger_match_RNO_11_Y[0]), .B(ifu_expipe_resp_ireg_vaddr_net_4), .C(ifu_expipe_resp_ireg_vaddr_net_5), .D(tdata2_match_data_1[6]), .A(tdata2_match_data_1[7]), .FCI(un2_trigger_iaddr_match_0_data_tmp[2]) ); defparam \gen_tdata1_2.trigger_match_RNO_11[0] .INIT=20'h68421; // @46:11165 ARI1 \gen_tdata1_2.trigger_match_RNO_10[0] ( .FCO(un2_trigger_iaddr_match_0_data_tmp[4]), .S(trigger_match_RNO_10_S[0]), .Y(trigger_match_RNO_10_Y[0]), .B(ifu_expipe_resp_ireg_vaddr_net_6), .C(ifu_expipe_resp_ireg_vaddr_net_7), .D(tdata2_match_data_1[8]), .A(tdata2_match_data_1[9]), .FCI(un2_trigger_iaddr_match_0_data_tmp[3]) ); defparam \gen_tdata1_2.trigger_match_RNO_10[0] .INIT=20'h68421; // @46:11165 ARI1 \gen_tdata1_2.trigger_match_RNO_9[0] ( .FCO(un2_trigger_iaddr_match_0_data_tmp[5]), .S(trigger_match_RNO_9_S[0]), .Y(trigger_match_RNO_9_Y[0]), .B(N_383), .C(ifu_expipe_resp_ireg_vaddr_net_8), .D(tdata2_match_data_1[10]), .A(tdata2_match_data_1[11]), .FCI(un2_trigger_iaddr_match_0_data_tmp[4]) ); defparam \gen_tdata1_2.trigger_match_RNO_9[0] .INIT=20'h68241; // @46:11165 ARI1 \gen_tdata1_2.trigger_match_RNO_8[0] ( .FCO(un2_trigger_iaddr_match_0_data_tmp[6]), .S(trigger_match_RNO_8_S[0]), .Y(trigger_match_RNO_8_Y[0]), .B(N_381), .C(N_382), .D(tdata2_match_data_1[12]), .A(tdata2_match_data_1[13]), .FCI(un2_trigger_iaddr_match_0_data_tmp[5]) ); defparam \gen_tdata1_2.trigger_match_RNO_8[0] .INIT=20'h68241; // @46:11165 ARI1 \gen_tdata1_2.trigger_match_RNO_7[0] ( .FCO(un2_trigger_iaddr_match_0_data_tmp[7]), .S(trigger_match_RNO_7_S[0]), .Y(trigger_match_RNO_7_Y[0]), .B(N_380), .C(ifu_expipe_resp_ireg_vaddr_net_13), .D(tdata2_match_data_1[14]), .A(tdata2_match_data_1[15]), .FCI(un2_trigger_iaddr_match_0_data_tmp[6]) ); defparam \gen_tdata1_2.trigger_match_RNO_7[0] .INIT=20'h68421; // @46:11165 ARI1 \gen_tdata1_2.trigger_match_RNO_6[0] ( .FCO(un2_trigger_iaddr_match_0_data_tmp[8]), .S(trigger_match_RNO_6_S[0]), .Y(trigger_match_RNO_6_Y[0]), .B(N_378), .C(N_379), .D(tdata2_match_data_1[16]), .A(tdata2_match_data_1[17]), .FCI(un2_trigger_iaddr_match_0_data_tmp[7]) ); defparam \gen_tdata1_2.trigger_match_RNO_6[0] .INIT=20'h68241; // @46:11165 ARI1 \gen_tdata1_2.trigger_match_RNO_5[0] ( .FCO(un2_trigger_iaddr_match_0_data_tmp[9]), .S(trigger_match_RNO_5_S[0]), .Y(trigger_match_RNO_5_Y[0]), .B(N_376), .C(N_377), .D(tdata2_match_data_1[18]), .A(tdata2_match_data_1[19]), .FCI(un2_trigger_iaddr_match_0_data_tmp[8]) ); defparam \gen_tdata1_2.trigger_match_RNO_5[0] .INIT=20'h68241; // @46:11165 ARI1 \gen_tdata1_2.trigger_match_RNO_4[0] ( .FCO(un2_trigger_iaddr_match_0_data_tmp[10]), .S(trigger_match_RNO_4_S[0]), .Y(trigger_match_RNO_4_Y[0]), .B(N_374), .C(N_375), .D(tdata2_match_data_1[20]), .A(tdata2_match_data_1[21]), .FCI(un2_trigger_iaddr_match_0_data_tmp[9]) ); defparam \gen_tdata1_2.trigger_match_RNO_4[0] .INIT=20'h68241; // @46:11165 ARI1 \gen_tdata1_2.trigger_match_RNO_3[0] ( .FCO(un2_trigger_iaddr_match_0_data_tmp[11]), .S(trigger_match_RNO_3_S[0]), .Y(trigger_match_RNO_3_Y[0]), .B(N_372), .C(N_373), .D(tdata2_match_data_1[22]), .A(tdata2_match_data_1[23]), .FCI(un2_trigger_iaddr_match_0_data_tmp[10]) ); defparam \gen_tdata1_2.trigger_match_RNO_3[0] .INIT=20'h68241; // @46:11165 ARI1 \gen_tdata1_2.trigger_match_RNO_2[0] ( .FCO(un2_trigger_iaddr_match_0_data_tmp[12]), .S(trigger_match_RNO_2_S[0]), .Y(trigger_match_RNO_2_Y[0]), .B(N_370), .C(N_371), .D(tdata2_match_data_1[24]), .A(tdata2_match_data_1[25]), .FCI(un2_trigger_iaddr_match_0_data_tmp[11]) ); defparam \gen_tdata1_2.trigger_match_RNO_2[0] .INIT=20'h68241; // @46:11165 ARI1 \gen_tdata1_2.trigger_match_RNO_1[0] ( .FCO(un2_trigger_iaddr_match_0_data_tmp[13]), .S(trigger_match_RNO_1_S[0]), .Y(trigger_match_RNO_1_Y[0]), .B(N_368), .C(N_369), .D(tdata2_match_data_1[26]), .A(tdata2_match_data_1[27]), .FCI(un2_trigger_iaddr_match_0_data_tmp[12]) ); defparam \gen_tdata1_2.trigger_match_RNO_1[0] .INIT=20'h68241; // @46:11165 ARI1 \gen_tdata1_2.trigger_match_RNO_0[0] ( .FCO(un2_trigger_iaddr_match_0_data_tmp[14]), .S(trigger_match_RNO_0_S[0]), .Y(trigger_match_RNO_0_Y[0]), .B(N_298), .C(N_367), .D(tdata2_match_data_1[28]), .A(tdata2_match_data_1[29]), .FCI(un2_trigger_iaddr_match_0_data_tmp[13]) ); defparam \gen_tdata1_2.trigger_match_RNO_0[0] .INIT=20'h64182; // @46:11165 ARI1 \gen_tdata1_2.trigger_match_RNO[0] ( .FCO(un2_trigger_iaddr_match_0_data_tmp[15]), .S(trigger_match_RNO_S[0]), .Y(trigger_match_RNO_Y[0]), .B(ifu_expipe_resp_ireg_vaddr_net_28), .C(ifu_expipe_resp_ireg_vaddr_net_29), .D(tdata2_match_data_1[30]), .A(tdata2_match_data_1[31]), .FCI(un2_trigger_iaddr_match_0_data_tmp[14]) ); defparam \gen_tdata1_2.trigger_match_RNO[0] .INIT=20'h68421; // @46:5144 CFG4 \debug_csr_op_rd_data_6[31] ( .A(mepc_sw_rd_sel_1), .B(debug_csr_op_rd_data_3_Z[31]), .C(csr_priv_mtvec_epc_retr[31]), .D(mepc_sw_rd_sel_3), .Y(debug_csr_op_rd_data_6_Z[31]) ); defparam \debug_csr_op_rd_data_6[31] .INIT=16'hECCC; // @46:3318 CFG4 \mip_rd_data_1[3] ( .A(debug_enter_retr), .B(interrupt_pending_2), .C(un14_gpr_rs1_stall_lsu), .D(gpr_wr_en_retr), .Y(mip_rd_data_1_Z[3]) ); defparam \mip_rd_data_1[3] .INIT=16'h8CCC; // @46:2351 CFG4 machine_implicit_wr_mtval_tval_wr_en_RNO ( .A(un4_exception_taken_5_Z), .B(stage_state_retr), .C(lsu_expipe_resp_access_mem_error_net), .D(exception_m6_0_1_1), .Y(exception_m6_0_1) ); defparam machine_implicit_wr_mtval_tval_wr_en_RNO.INIT=16'h37FF; // @46:2351 CFG2 machine_implicit_wr_mtval_tval_wr_en_RNO_0 ( .A(debug_enter_retr), .B(trace_priv_i), .Y(exception_m6_0_1_1) ); defparam machine_implicit_wr_mtval_tval_wr_en_RNO_0.INIT=4'h1; // @46:2426 CFG4 machine_implicit_wr_mtval_tval_wr_en ( .A(machine_implicit_wr_mtval_tval_wr_en_1_Z), .B(exception_m6_0_1), .C(interrupt_taken_sw), .D(interrupt_taken_timer), .Y(machine_implicit_wr_mtval_tval_wr_en_1z) ); defparam machine_implicit_wr_mtval_tval_wr_en.INIT=16'hFFF2; // @46:2426 CFG4 machine_implicit_wr_mtval_tval_wr_en_1 ( .A(un1_lsu_resp_valid), .B(d_N_5_mux_3), .C(exception_N_5), .D(exception_N_10_mux), .Y(machine_implicit_wr_mtval_tval_wr_en_1_Z) ); defparam machine_implicit_wr_mtval_tval_wr_en_1.INIT=16'h0A03; // @46:5144 CFG4 \debug_csr_op_rd_data[3] ( .A(interrupt_pending_a3_0), .B(un1_u_miv_rv32_csr_decode_0_47), .C(debug_csr_op_rd_data_1_0_Z[3]), .D(mip_rd_data_1_Z[3]), .Y(cpu_debug_csr_op_rd_data_net[3]) ); defparam \debug_csr_op_rd_data[3] .INIT=16'h4F0F; // @46:5144 CFG4 \debug_csr_op_rd_data_1_0[3] ( .A(debug_csr_op_rd_data_2_Z[3]), .B(debug_csr_op_rd_data_1_Z[3]), .C(debug_csr_op_rd_data_10_1_Z[3]), .D(debug_csr_op_rd_data_9_Z[3]), .Y(debug_csr_op_rd_data_1_0_Z[3]) ); defparam \debug_csr_op_rd_data_1_0[3] .INIT=16'h0010; // @46:5144 CFG4 \debug_csr_op_rd_data[1] ( .A(debug_csr_op_rd_data_4_Z[1]), .B(debug_csr_op_rd_data_2_Z[1]), .C(debug_csr_op_rd_data_1_Z[1]), .D(debug_csr_op_rd_data_3_Z[1]), .Y(cpu_debug_csr_op_rd_data_net[1]) ); defparam \debug_csr_op_rd_data[1] .INIT=16'hFFEF; // @46:5144 CFG4 \debug_csr_op_rd_data_1[1] ( .A(csr_priv_mtvec_epc_retr[1]), .B(csr_priv_cause_excpt_code[1]), .C(un1_u_miv_rv32_csr_decode_0_42), .D(un1_u_miv_rv32_csr_decode_0_41), .Y(debug_csr_op_rd_data_1_Z[1]) ); defparam \debug_csr_op_rd_data_1[1] .INIT=16'h135F; // @46:5144 CFG4 \debug_csr_op_rd_data_10_1[3] ( .A(mscratch_scratch[3]), .B(ie_msie), .C(un1_u_miv_rv32_csr_decode_0_50), .D(un1_u_miv_rv32_csr_decode_0_37), .Y(debug_csr_op_rd_data_10_1_Z[3]) ); defparam \debug_csr_op_rd_data_10_1[3] .INIT=16'h153F; // @46:2484 CFG4 un1_soft_reset_taken_retr_s_s_RNIOH34R ( .A(csr_N_9_mux_i_2_1_Z), .B(un1_soft_reset_taken_retr_s_out), .C(soft_reset_pending), .D(debug_enter_req_de), .Y(csr_N_9_mux_i_2) ); defparam un1_soft_reset_taken_retr_s_s_RNIOH34R.INIT=16'h00E0; // @46:2484 CFG4 csr_N_9_mux_i_2_1 ( .A(lsu_resp_valid40), .B(un1_lsu_resp_valid38_1_i), .C(un6_instr_is_lsu_op_retr), .D(d_N_3_mux_3), .Y(csr_N_9_mux_i_2_1_Z) ); defparam csr_N_9_mux_i_2_1.INIT=16'h00FE; // @46:2329 CFG4 \csr_op_wr_data_1_cZ[7] ( .A(csr_op_wr_data_1_sn_N_3), .B(csr_op_wr_data_1_2[7]), .C(ex_retr_pipe_exu_result_retr[7]), .D(csr_op_wr_data_1_sn_N_4), .Y(csr_op_wr_data_1[7]) ); defparam \csr_op_wr_data_1_cZ[7] .INIT=16'hCCDC; // @46:2329 CFG4 \csr_op_wr_data_1_cZ[3] ( .A(csr_op_wr_data_1_sn_N_3), .B(csr_op_wr_data_1_2[3]), .C(ex_retr_pipe_exu_result_retr[3]), .D(csr_op_wr_data_1_sn_N_4), .Y(csr_op_wr_data_1[3]) ); defparam \csr_op_wr_data_1_cZ[3] .INIT=16'hCCDC; // @46:2329 CFG4 \csr_op_wr_data_1_cZ[12] ( .A(csr_op_wr_data_1_sn_N_3), .B(csr_op_wr_data_1_2[12]), .C(ex_retr_pipe_exu_result_retr[12]), .D(csr_op_wr_data_1_sn_N_4), .Y(csr_op_wr_data_1[12]) ); defparam \csr_op_wr_data_1_cZ[12] .INIT=16'hCCDC; // @46:2329 CFG4 \csr_op_wr_data_1_cZ[2] ( .A(csr_op_wr_data_1_sn_N_3), .B(csr_op_wr_data_1_2[2]), .C(ex_retr_pipe_exu_result_retr[2]), .D(csr_op_wr_data_1_sn_N_4), .Y(csr_op_wr_data_1[2]) ); defparam \csr_op_wr_data_1_cZ[2] .INIT=16'hCCDC; // @46:2329 CFG4 \csr_op_wr_data_1_cZ[16] ( .A(csr_op_wr_data_1_sn_N_3), .B(csr_op_wr_data_1_2[16]), .C(ex_retr_pipe_exu_result_retr[16]), .D(csr_op_wr_data_1_sn_N_4), .Y(csr_op_wr_data_1[16]) ); defparam \csr_op_wr_data_1_cZ[16] .INIT=16'hCCDC; // @46:2329 CFG4 \csr_op_wr_data_1_cZ[29] ( .A(csr_op_wr_data_1_sn_N_3), .B(csr_op_wr_data_1_2[29]), .C(ex_retr_pipe_exu_result_retr[29]), .D(csr_op_wr_data_1_sn_N_4), .Y(csr_op_wr_data_1[29]) ); defparam \csr_op_wr_data_1_cZ[29] .INIT=16'hCCDC; // @46:2329 CFG4 \csr_op_wr_data_1_cZ[25] ( .A(csr_op_wr_data_1_sn_N_3), .B(csr_op_wr_data_1_2[25]), .C(ex_retr_pipe_exu_result_retr[25]), .D(csr_op_wr_data_1_sn_N_4), .Y(csr_op_wr_data_1[25]) ); defparam \csr_op_wr_data_1_cZ[25] .INIT=16'hCCDC; // @46:2329 CFG4 \csr_op_wr_data_1_cZ[24] ( .A(csr_op_wr_data_1_sn_N_3), .B(csr_op_wr_data_1_2[24]), .C(ex_retr_pipe_exu_result_retr[24]), .D(csr_op_wr_data_1_sn_N_4), .Y(csr_op_wr_data_1[24]) ); defparam \csr_op_wr_data_1_cZ[24] .INIT=16'hCCDC; // @46:2329 CFG4 \csr_op_wr_data_1_cZ[5] ( .A(csr_op_wr_data_1_sn_N_3), .B(csr_op_wr_data_1_2[5]), .C(ex_retr_pipe_exu_result_retr[5]), .D(csr_op_wr_data_1_sn_N_4), .Y(csr_op_wr_data_1[5]) ); defparam \csr_op_wr_data_1_cZ[5] .INIT=16'hCCDC; // @46:2329 CFG4 \csr_op_wr_data_1_cZ[30] ( .A(csr_op_wr_data_1_sn_N_3), .B(csr_op_wr_data_1_2[30]), .C(ex_retr_pipe_exu_result_retr[30]), .D(csr_op_wr_data_1_sn_N_4), .Y(csr_op_wr_data_1[30]) ); defparam \csr_op_wr_data_1_cZ[30] .INIT=16'hCCDC; // @46:2329 CFG4 \csr_op_wr_data_1_cZ[26] ( .A(csr_op_wr_data_1_sn_N_3), .B(csr_op_wr_data_1_2[26]), .C(ex_retr_pipe_exu_result_retr[26]), .D(csr_op_wr_data_1_sn_N_4), .Y(csr_op_wr_data_1[26]) ); defparam \csr_op_wr_data_1_cZ[26] .INIT=16'hCCDC; // @46:2329 CFG4 \csr_op_wr_data_1_cZ[31] ( .A(csr_op_wr_data_1_sn_N_3), .B(csr_op_wr_data_1_2[31]), .C(ex_retr_pipe_exu_result_retr[31]), .D(csr_op_wr_data_1_sn_N_4), .Y(csr_op_wr_data_1[31]) ); defparam \csr_op_wr_data_1_cZ[31] .INIT=16'hCCDC; // @46:2329 CFG4 \csr_op_wr_data_1_cZ[6] ( .A(csr_op_wr_data_1_sn_N_3), .B(csr_op_wr_data_1_2[6]), .C(ex_retr_pipe_exu_result_retr[6]), .D(csr_op_wr_data_1_sn_N_4), .Y(csr_op_wr_data_1[6]) ); defparam \csr_op_wr_data_1_cZ[6] .INIT=16'hCCDC; // @46:2329 CFG4 \csr_op_wr_data_1_cZ[27] ( .A(csr_op_wr_data_1_sn_N_3), .B(csr_op_wr_data_1_2[27]), .C(ex_retr_pipe_exu_result_retr[27]), .D(csr_op_wr_data_1_sn_N_4), .Y(csr_op_wr_data_1[27]) ); defparam \csr_op_wr_data_1_cZ[27] .INIT=16'hCCDC; // @46:2329 CFG4 \csr_op_wr_data_1_cZ[9] ( .A(csr_op_wr_data_1_sn_N_3), .B(csr_op_wr_data_1_2[9]), .C(ex_retr_pipe_exu_result_retr[9]), .D(csr_op_wr_data_1_sn_N_4), .Y(csr_op_wr_data_1[9]) ); defparam \csr_op_wr_data_1_cZ[9] .INIT=16'hCCDC; // @46:2329 CFG4 \csr_op_wr_data_1_cZ[1] ( .A(csr_op_wr_data_1_sn_N_3), .B(csr_op_wr_data_1_2[1]), .C(ex_retr_pipe_exu_result_retr[1]), .D(csr_op_wr_data_1_sn_N_4), .Y(csr_op_wr_data_1[1]) ); defparam \csr_op_wr_data_1_cZ[1] .INIT=16'hCCDC; // @46:2329 CFG4 \csr_op_wr_data_1_cZ[14] ( .A(csr_op_wr_data_1_sn_N_3), .B(csr_op_wr_data_1_2[14]), .C(ex_retr_pipe_exu_result_retr[14]), .D(csr_op_wr_data_1_sn_N_4), .Y(csr_op_wr_data_1[14]) ); defparam \csr_op_wr_data_1_cZ[14] .INIT=16'hCCDC; // @46:2329 CFG4 \csr_op_wr_data_1_cZ[11] ( .A(csr_op_wr_data_1_sn_N_3), .B(csr_op_wr_data_1_2[11]), .C(ex_retr_pipe_exu_result_retr[11]), .D(csr_op_wr_data_1_sn_N_4), .Y(csr_op_wr_data_1[11]) ); defparam \csr_op_wr_data_1_cZ[11] .INIT=16'hCCDC; // @46:2329 CFG4 \csr_op_wr_data_1_cZ[10] ( .A(csr_op_wr_data_1_sn_N_3), .B(csr_op_wr_data_1_2[10]), .C(ex_retr_pipe_exu_result_retr[10]), .D(csr_op_wr_data_1_sn_N_4), .Y(csr_op_wr_data_1[10]) ); defparam \csr_op_wr_data_1_cZ[10] .INIT=16'hCCDC; // @46:2329 CFG4 \csr_op_wr_data_1_cZ[17] ( .A(csr_op_wr_data_1_sn_N_3), .B(csr_op_wr_data_1_2[17]), .C(ex_retr_pipe_exu_result_retr[17]), .D(csr_op_wr_data_1_sn_N_4), .Y(csr_op_wr_data_1[17]) ); defparam \csr_op_wr_data_1_cZ[17] .INIT=16'hCCDC; // @46:2329 CFG4 \csr_op_wr_data_1_cZ[19] ( .A(csr_op_wr_data_1_sn_N_3), .B(csr_op_wr_data_1_2[19]), .C(ex_retr_pipe_exu_result_retr[19]), .D(csr_op_wr_data_1_sn_N_4), .Y(csr_op_wr_data_1[19]) ); defparam \csr_op_wr_data_1_cZ[19] .INIT=16'hCCDC; // @46:2329 CFG4 \csr_op_wr_data_1_cZ[20] ( .A(csr_op_wr_data_1_sn_N_3), .B(csr_op_wr_data_1_2[20]), .C(ex_retr_pipe_exu_result_retr[20]), .D(csr_op_wr_data_1_sn_N_4), .Y(csr_op_wr_data_1[20]) ); defparam \csr_op_wr_data_1_cZ[20] .INIT=16'hCCDC; // @46:2329 CFG4 \csr_op_wr_data_1_cZ[15] ( .A(csr_op_wr_data_1_sn_N_3), .B(csr_op_wr_data_1_2[15]), .C(ex_retr_pipe_exu_result_retr[15]), .D(csr_op_wr_data_1_sn_N_4), .Y(csr_op_wr_data_1[15]) ); defparam \csr_op_wr_data_1_cZ[15] .INIT=16'hCCDC; // @46:2329 CFG4 \csr_op_wr_data_1_cZ[4] ( .A(csr_op_wr_data_1_sn_N_3), .B(csr_op_wr_data_1_2[4]), .C(ex_retr_pipe_exu_result_retr[4]), .D(csr_op_wr_data_1_sn_N_4), .Y(csr_op_wr_data_1[4]) ); defparam \csr_op_wr_data_1_cZ[4] .INIT=16'hCCDC; // @46:2329 CFG4 \csr_op_wr_data_1_cZ[28] ( .A(csr_op_wr_data_1_sn_N_3), .B(csr_op_wr_data_1_2[28]), .C(ex_retr_pipe_exu_result_retr[28]), .D(csr_op_wr_data_1_sn_N_4), .Y(csr_op_wr_data_1[28]) ); defparam \csr_op_wr_data_1_cZ[28] .INIT=16'hCCDC; // @46:2329 CFG4 \csr_op_wr_data_1_cZ[8] ( .A(csr_op_wr_data_1_sn_N_3), .B(csr_op_wr_data_1_2[8]), .C(ex_retr_pipe_exu_result_retr[8]), .D(csr_op_wr_data_1_sn_N_4), .Y(csr_op_wr_data_1[8]) ); defparam \csr_op_wr_data_1_cZ[8] .INIT=16'hCCDC; // @46:2329 CFG4 \csr_op_wr_data_1_cZ[22] ( .A(csr_op_wr_data_1_sn_N_3), .B(csr_op_wr_data_1_2[22]), .C(ex_retr_pipe_exu_result_retr[22]), .D(csr_op_wr_data_1_sn_N_4), .Y(csr_op_wr_data_1[22]) ); defparam \csr_op_wr_data_1_cZ[22] .INIT=16'hCCDC; // @46:2329 CFG4 \csr_op_wr_data_1_cZ[21] ( .A(csr_op_wr_data_1_sn_N_3), .B(csr_op_wr_data_1_2[21]), .C(ex_retr_pipe_exu_result_retr[21]), .D(csr_op_wr_data_1_sn_N_4), .Y(csr_op_wr_data_1[21]) ); defparam \csr_op_wr_data_1_cZ[21] .INIT=16'hCCDC; // @46:2329 CFG4 \csr_op_wr_data_1_cZ[23] ( .A(csr_op_wr_data_1_sn_N_3), .B(csr_op_wr_data_1_2[23]), .C(ex_retr_pipe_exu_result_retr[23]), .D(csr_op_wr_data_1_sn_N_4), .Y(csr_op_wr_data_1[23]) ); defparam \csr_op_wr_data_1_cZ[23] .INIT=16'hCCDC; // @46:2329 CFG4 \csr_op_wr_data_1_cZ[13] ( .A(csr_op_wr_data_1_sn_N_3), .B(csr_op_wr_data_1_2[13]), .C(ex_retr_pipe_exu_result_retr[13]), .D(csr_op_wr_data_1_sn_N_4), .Y(csr_op_wr_data_1[13]) ); defparam \csr_op_wr_data_1_cZ[13] .INIT=16'hCCDC; // @46:2329 CFG4 \csr_op_wr_data_1_cZ[18] ( .A(csr_op_wr_data_1_sn_N_3), .B(csr_op_wr_data_1_2[18]), .C(ex_retr_pipe_exu_result_retr[18]), .D(csr_op_wr_data_1_sn_N_4), .Y(csr_op_wr_data_1[18]) ); defparam \csr_op_wr_data_1_cZ[18] .INIT=16'hCCDC; // @46:2329 CFG4 \csr_op_wr_data_1_cZ[0] ( .A(csr_op_wr_data_1_sn_N_3), .B(csr_op_wr_data_1_2[0]), .C(ex_retr_pipe_exu_result_retr[0]), .D(csr_op_wr_data_1_sn_N_4), .Y(csr_op_wr_data_1[0]) ); defparam \csr_op_wr_data_1_cZ[0] .INIT=16'hCCDC; // @46:4933 CFG2 \gen_debug.set_step_debug_enter_pending_0 ( .A(trace_priv_i), .B(dcsr_step), .Y(set_step_debug_enter_pending_0) ); defparam \gen_debug.set_step_debug_enter_pending_0 .INIT=4'h4; // @46:2353 CFG2 un4_exception_taken_0 ( .A(ex_retr_pipe_dbreak_retr), .B(ex_retr_pipe_i_access_mem_error_retr), .Y(un4_exception_taken_0_Z) ); defparam un4_exception_taken_0.INIT=4'hE; // @46:5241 CFG2 un1_set_wfi_waiting_1 ( .A(ie_mtie), .B(ie_mextsysie[1]), .Y(un1_set_wfi_waiting_1_Z) ); defparam un1_set_wfi_waiting_1.INIT=4'hE; // @46:2351 CFG2 machine_implicit_wr_mtval_tval_wr_en_1_RNO_3 ( .A(un1_lsu_resp_valid38_1_i), .B(lsu_resp_valid40), .Y(exception_N_4) ); defparam machine_implicit_wr_mtval_tval_wr_en_1_RNO_3.INIT=4'h1; // @46:4997 CFG2 \gen_debug.un2_haltreq_debug_enter_taken ( .A(trace_priv_i), .B(cpu_debug_halt_req_net), .Y(un2_haltreq_debug_enter_taken) ); defparam \gen_debug.un2_haltreq_debug_enter_taken .INIT=4'h8; // @46:2285 CFG2 csr_op_wr_data_1_sn_m2 ( .A(N_1398_i), .B(trace_priv_i), .Y(csr_op_wr_data_1_sn_N_3) ); defparam csr_op_wr_data_1_sn_m2.INIT=4'h1; // @46:2311 CFG2 exu_csr_op_wr_data14 ( .A(N_1398_i), .B(N_1397_i), .Y(exu_csr_op_wr_data14_1z) ); defparam exu_csr_op_wr_data14.INIT=4'h1; // @46:2285 CFG2 csr_op_wr_data_1_sn_m3 ( .A(trace_priv_i), .B(N_1397_i), .Y(csr_op_wr_data_1_sn_N_4) ); defparam csr_op_wr_data_1_sn_m3.INIT=4'h4; // @46:5242 CFG4 clr_wfi_waiting_0 ( .A(interrupt_captured_timer), .B(interrupt_captured_sw), .C(ie_msie), .D(ie_mtie), .Y(clr_wfi_waiting_0_Z) ); defparam clr_wfi_waiting_0.INIT=16'hEAC0; // @46:2484 CFG3 un1_soft_reset_taken_retr_s_s_0 ( .A(ebreak_debug_enter_taken_1z), .B(stage_state_retr), .C(step_debug_enter_taken_1z), .Y(un1_soft_reset_taken_retr_s_s_0_Z) ); defparam un1_soft_reset_taken_retr_s_s_0.INIT=8'hFB; // @46:5030 CFG3 debug_mode_enter_req ( .A(trigger_debug_enter_pending), .B(step_debug_enter_pending), .C(haltreq_debug_enter_pending), .Y(debug_enter_req_de) ); defparam debug_mode_enter_req.INIT=8'hFE; // @46:4971 CFG4 ebreak_debug_enter_taken ( .A(dcsr_ebreakm), .B(debug_active_retr), .C(stage_state_retr), .D(ex_retr_pipe_dbreak_retr), .Y(ebreak_debug_enter_taken_1z) ); defparam ebreak_debug_enter_taken.INIT=16'h8000; // @46:4974 CFG3 trigger_debug_enter_taken ( .A(stage_state_retr), .B(per_trigger_debug_0), .C(debug_active_retr), .Y(trigger_debug_enter_taken_1z) ); defparam trigger_debug_enter_taken.INIT=8'h80; // @46:4299 CFG2 \gen_tdata1_2.gen_per_trig_tdata1[0].machine_sw_wr_tdata1_mcontrol_execute_wr_en_0 ( .A(mimpid_sw_rd_sel_3), .B(trace_priv_i), .Y(dcsr_debugger_wr_sel_0) ); defparam \gen_tdata1_2.gen_per_trig_tdata1[0].machine_sw_wr_tdata1_mcontrol_execute_wr_en_0 .INIT=4'h8; // @46:5032 CFG4 debug_mode_enter ( .A(ebreak_debug_enter_taken_1z), .B(step_debug_enter_taken_1z), .C(trigger_debug_enter_taken_1z), .D(haltreq_debug_enter_taken_1z), .Y(debug_enter_retr) ); defparam debug_mode_enter.INIT=16'hFFFE; // @46:4945 CFG3 step_debug_enter_taken ( .A(stage_state_retr), .B(step_debug_enter_pending), .C(ex_retr_debug_enter_req_retr), .Y(step_debug_enter_taken_1z) ); defparam step_debug_enter_taken.INIT=8'h80; // @46:1851 CFG3 un7_trap_val ( .A(interrupt_taken_sw), .B(illegal_instr_retr), .C(interrupt_taken_timer), .Y(un7_trap_val_1z) ); defparam un7_trap_val.INIT=8'h04; // @46:1850 CFG3 un11_trap_val ( .A(un3_instr_inhibit_ex_6), .B(interrupt_taken_timer), .C(interrupt_taken_sw), .Y(un11_trap_val_1z) ); defparam un11_trap_val.INIT=8'h01; // @46:2341 CFG3 excpt_ebreak ( .A(debug_active_retr), .B(dcsr_ebreakm), .C(dbreak_retr), .Y(excpt_ebreak_Z) ); defparam excpt_ebreak.INIT=8'h70; // @46:2334 CFG3 csr_op_rd_valid ( .A(ex_retr_pipe_sw_csr_rd_op_retr), .B(stage_state_retr), .C(trace_priv_i), .Y(csr_op_rd_valid_1z) ); defparam csr_op_rd_valid.INIT=8'hA8; // @46:4511 CFG2 \gen_tdata1_2.gen_per_trig_tdata1[0].machine_sw_wr_tdata2_match_data_wr_en_0 ( .A(dcsr_debugger_wr_sel_0), .B(tdata2_sw_rd_sel_7), .Y(machine_sw_wr_tdata2_match_data_wr_en_0) ); defparam \gen_tdata1_2.gen_per_trig_tdata1[0].machine_sw_wr_tdata2_match_data_wr_en_0 .INIT=4'h8; // @46:9335 CFG4 step_debug_enter_taken_RNIRN07L ( .A(ebreak_debug_enter_taken_1z), .B(step_debug_enter_taken_1z), .C(trigger_debug_enter_taken_1z), .D(haltreq_debug_enter_taken_1z), .Y(debug_enter_retr_i) ); defparam step_debug_enter_taken_RNIRN07L.INIT=16'h0001; // @46:2484 CFG3 un1_soft_reset_taken_retr_s_s ( .A(un1_soft_reset_taken_retr_s_s_0_Z), .B(haltreq_debug_enter_taken_1z), .C(trigger_debug_enter_taken_1z), .Y(un1_soft_reset_taken_retr_s_out) ); defparam un1_soft_reset_taken_retr_s_s.INIT=8'hFE; // @46:5241 CFG4 un1_set_wfi_waiting ( .A(ie_msie), .B(un1_set_wfi_waiting_1_Z), .C(ie_mextsysie[0]), .D(ie_meie), .Y(un1_set_wfi_waiting_Z) ); defparam un1_set_wfi_waiting.INIT=16'hFFFE; // @46:2332 CFG3 csr_op_ready ( .A(exu_result_valid_retr), .B(exu_csr_op_wr_data14_1z), .C(trace_priv_i), .Y(sw_csr_op_ready_retr) ); defparam csr_op_ready.INIT=8'hFE; // @46:5043 CFG4 debug_mode_retire_mask ( .A(ebreak_debug_enter_taken_1z), .B(step_debug_enter_taken_1z), .C(trigger_debug_enter_taken_1z), .D(haltreq_debug_enter_taken_1z), .Y(debug_mode_retire_mask_retr) ); defparam debug_mode_retire_mask.INIT=16'hF5F4; // @46:5038 CFG4 debug_mode_exit ( .A(cpu_debug_resume_req_net), .B(trace_priv_i), .C(formal_trace_reset_taken), .D(init_wr_dcsr_step_en), .Y(debug_exit_retr) ); defparam debug_mode_exit.INIT=16'hCCC8; // @46:4992 CFG2 \gen_debug.haltreq_debug_enter_pending6 ( .A(debug_enter_retr), .B(cpu_debug_halt_req_net), .Y(haltreq_debug_enter_pending6) ); defparam \gen_debug.haltreq_debug_enter_pending6 .INIT=4'hE; // @46:4996 CFG4 haltreq_debug_enter_taken ( .A(ex_retr_debug_enter_req_retr), .B(haltreq_debug_enter_pending), .C(un2_haltreq_debug_enter_taken), .D(stage_state_retr), .Y(haltreq_debug_enter_taken_1z) ); defparam haltreq_debug_enter_taken.INIT=16'hF8F0; // @46:4897 CFG2 \gen_debug.implicit_wr_dpc_pc_en ( .A(debug_enter_retr), .B(trace_priv_i), .Y(implicit_wr_dpc_pc_en) ); defparam \gen_debug.implicit_wr_dpc_pc_en .INIT=4'h2; // @46:2430 CFG2 cause_excpt_code_excpt_m5s2 ( .A(m_env_call_retr), .B(excpt_ebreak_Z), .Y(cause_excpt_code_excpt_sm3) ); defparam cause_excpt_code_excpt_m5s2.INIT=4'hE; // @46:2352 CFG2 un2_exception_taken ( .A(debug_enter_retr), .B(trace_priv_i), .Y(un2_exception_taken_1z) ); defparam un2_exception_taken.INIT=4'hE; // @46:2484 CFG4 csr_m6_0_a4_0_a0_2_1 ( .A(trace_priv_i), .B(req_resp_state_valid), .C(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .D(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .Y(exception_m5_1) ); defparam csr_m6_0_a4_0_a0_2_1.INIT=16'h0400; // @46:5211 CFG2 debug_csr_op_rd_data_valid ( .A(trace_priv_i), .B(ex_retr_pipe_sw_csr_rd_op_retr), .Y(cpu_debug_csr_op_rd_data_valid_net) ); defparam debug_csr_op_rd_data_valid.INIT=4'h8; // @46:8240 CFG4 \gen_debug.init_wr_dcsr_step_en_RNIG2M9T2 ( .A(cpu_debug_resume_req_net), .B(trace_priv_i), .C(formal_trace_reset_taken), .D(init_wr_dcsr_step_en), .Y(debug_exit_retr_i) ); defparam \gen_debug.init_wr_dcsr_step_en_RNIG2M9T2 .INIT=16'h3337; // @46:2353 CFG4 un4_exception_taken_3 ( .A(ex_retr_pipe_m_env_call_retr), .B(un4_exception_taken_0_Z), .C(illegal_instr_retr), .D(un3_instr_inhibit_ex_6), .Y(un4_exception_taken_3_Z) ); defparam un4_exception_taken_3.INIT=16'hFFFE; // @46:2484 CFG2 csr_m6_0_a5_0_0 ( .A(un6_instr_is_lsu_op_retr), .B(req_resp_state_valid), .Y(d_N_3_mux_3) ); defparam csr_m6_0_a5_0_0.INIT=4'h1; // @46:4998 CFG3 debug_halt_ack ( .A(debug_enter_retr), .B(cpu_debug_halt_req_net), .C(haltreq_debug_enter_taken_1z), .Y(cpu_debug_halt_ack_net) ); defparam debug_halt_ack.INIT=8'hF8; // @46:5054 CFG2 \gen_debug.debug_mode6 ( .A(debug_exit_retr), .B(debug_enter_retr), .Y(debug_mode6) ); defparam \gen_debug.debug_mode6 .INIT=4'hE; // @46:5241 CFG4 set_wfi_waiting ( .A(un1_set_wfi_waiting_Z), .B(debug_mode_retire_mask_retr), .C(ex_retr_pipe_wfi_retr), .D(stage_state_retr), .Y(set_wfi_waiting_1z) ); defparam set_wfi_waiting.INIT=16'h2000; // @46:4831 CFG3 \gen_debug.implicit_wr_dcsr_cause_wr_data_1_m2s2 ( .A(haltreq_debug_enter_taken_1z), .B(step_debug_enter_taken_1z), .C(ebreak_debug_enter_taken_1z), .Y(implicit_wr_dcsr_cause_wr_data_1_sm0) ); defparam \gen_debug.implicit_wr_dcsr_cause_wr_data_1_m2s2 .INIT=8'hF4; // @46:1850 CFG4 un23_trap_val ( .A(lsu_expipe_resp_ld_addr_misalign_0), .B(cause_excpt_code_excpt_sm3), .C(un11_trap_val_1z), .D(un1_req_resp_state_1_i), .Y(un29_trap_val) ); defparam un23_trap_val.INIT=16'h1030; // @46:5244 CFG3 clr_wfi_waiting_0_RNI059SR2 ( .A(formal_trace_reset_taken), .B(clr_wfi_waiting_0_Z), .C(debug_enter_retr), .Y(clr_wfi_waiting_i) ); defparam clr_wfi_waiting_0_RNI059SR2.INIT=8'h01; // @46:2484 CFG3 csr_N_9_mux_i_0_a0_0 ( .A(exception_m5_1), .B(lsu_resp_valid40), .C(un1_lsu_resp_valid38_1_i), .Y(csr_N_9_mux_i_0_a0_0_Z) ); defparam csr_N_9_mux_i_0_a0_0.INIT=8'h57; // @46:2351 CFG4 machine_implicit_wr_mtval_tval_wr_en_1_RNO_1 ( .A(exception_m5_1), .B(gpr_wr_en_retr), .C(exception_N_4), .D(debug_enter_retr), .Y(exception_N_10_mux) ); defparam machine_implicit_wr_mtval_tval_wr_en_1_RNO_1.INIT=16'h0008; CFG2 debug_csr_op_rd_data_1159 ( .A(un1_u_miv_rv32_csr_decode_0_53), .B(un1_u_miv_rv32_csr_decode_0_58), .Y(debug_csr_op_rd_data_1159_Z) ); defparam debug_csr_op_rd_data_1159.INIT=4'hE; // @46:3228 CFG4 \mie_rd_data[22] ( .A(ex_retr_pipe_sw_csr_addr_retr_8), .B(ie_mextsysie[0]), .C(mie_sw_wr_sel_1), .D(csr_op_rd_valid_1z), .Y(mie_rd_data_Z[22]) ); defparam \mie_rd_data[22] .INIT=16'h8000; // @46:3435 CFG4 \mtvec_rd_data[30] ( .A(csr_priv_mtvec_excpt_vec_retr[30]), .B(ex_retr_pipe_sw_csr_addr_retr_0), .C(csr_op_rd_valid_1z), .D(mtvec_sw_rd_sel_1), .Y(mtvec_rd_data_Z[30]) ); defparam \mtvec_rd_data[30] .INIT=16'h2000; // @46:3467 CFG2 \mepc_rd_data[7] ( .A(un1_u_miv_rv32_csr_decode_0_42), .B(csr_priv_mtvec_epc_retr[7]), .Y(mepc_rd_data_Z[7]) ); defparam \mepc_rd_data[7] .INIT=4'h8; // @46:3722 CFG2 \mscratch_rd_data[8] ( .A(un1_u_miv_rv32_csr_decode_0_37), .B(mscratch_scratch[8]), .Y(mscratch_rd_data_Z[8]) ); defparam \mscratch_rd_data[8] .INIT=4'h8; // @46:3962 CFG2 \utime_rd_data[1] ( .A(un1_u_miv_rv32_csr_decode_0_16), .B(mtime_count_out[1]), .Y(utime_rd_data_Z[1]) ); defparam \utime_rd_data[1] .INIT=4'h8; // @46:3962 CFG2 \utime_rd_data[29] ( .A(un1_u_miv_rv32_csr_decode_0_16), .B(mtime_count_out[29]), .Y(utime_rd_data_Z[29]) ); defparam \utime_rd_data[29] .INIT=4'h8; // @46:3963 CFG2 \utimeh_rd_data[3] ( .A(un1_u_miv_rv32_csr_decode_0_15), .B(mtime_count_out[35]), .Y(utimeh_rd_data_Z[3]) ); defparam \utimeh_rd_data[3] .INIT=4'h8; // @46:3963 CFG2 \utimeh_rd_data[9] ( .A(un1_u_miv_rv32_csr_decode_0_15), .B(mtime_count_out[41]), .Y(utimeh_rd_data_Z[9]) ); defparam \utimeh_rd_data[9] .INIT=4'h8; // @46:5120 CFG2 \dcsr_rd_data[6] ( .A(un1_u_miv_rv32_csr_decode_0_1), .B(dcsr_cause[0]), .Y(dcsr_rd_data_Z[6]) ); defparam \dcsr_rd_data[6] .INIT=4'h8; // @46:5130 CFG2 \dpc_rd_data[1] ( .A(un1_u_miv_rv32_csr_decode_0_0), .B(csr_priv_dpc_retr[1]), .Y(dpc_rd_data_Z[1]) ); defparam \dpc_rd_data[1] .INIT=4'h8; // @46:5130 CFG4 \dpc_rd_data[29] ( .A(dpc_debugger_wr_sel_1), .B(csr_op_rd_valid_1z), .C(csr_priv_dpc_retr[29]), .D(un1_u_miv_rv32_csr_decode_0_2_0), .Y(dpc_rd_data_Z[29]) ); defparam \dpc_rd_data[29] .INIT=16'h8000; // @46:5249 CFG4 wfi_waiting_reg6 ( .A(clr_wfi_waiting_0_Z), .B(set_wfi_waiting_1z), .C(debug_enter_retr), .D(formal_trace_reset_taken), .Y(wfi_waiting_reg6_1z) ); defparam wfi_waiting_reg6.INIT=16'hFFFE; // @46:3963 CFG2 \utimeh_rd_data[0] ( .A(un1_u_miv_rv32_csr_decode_0_15), .B(mtime_count_out[32]), .Y(utimeh_rd_data_Z[0]) ); defparam \utimeh_rd_data[0] .INIT=4'h8; // @46:3963 CFG2 \utimeh_rd_data[31] ( .A(un1_u_miv_rv32_csr_decode_0_15), .B(mtime_count_out[63]), .Y(utimeh_rd_data_Z[31]) ); defparam \utimeh_rd_data[31] .INIT=4'h8; // @46:3525 CFG3 \mcause_rd_data[31] ( .A(mcause_sw_rd_sel_1), .B(mcause_interrupt), .C(mip_sw_rd_sel_3), .Y(mcause_rd_data_Z[31]) ); defparam \mcause_rd_data[31] .INIT=8'h80; // @46:2351 CFG4 machine_implicit_wr_mtval_tval_wr_en_1_RNO_2 ( .A(un6_instr_is_lsu_op_retr), .B(req_resp_state_valid), .C(un1_lsu_resp_valid38_1_i), .D(lsu_resp_valid40), .Y(machine_implicit_wr_mtval_tval_wr_en_1_RNO_2_Z) ); defparam machine_implicit_wr_mtval_tval_wr_en_1_RNO_2.INIT=16'h1115; // @46:4831 CFG3 \gen_debug.implicit_wr_dcsr_cause_wr_data_1_ss0 ( .A(implicit_wr_dcsr_cause_wr_data_1_sm0), .B(ebreak_debug_enter_taken_1z), .C(haltreq_debug_enter_taken_1z), .Y(implicit_wr_dcsr_cause_wr_data_1_ss0) ); defparam \gen_debug.implicit_wr_dcsr_cause_wr_data_1_ss0 .INIT=8'hD8; // @46:5144 CFG4 \debug_csr_op_rd_data_3[7] ( .A(mscratch_scratch[7]), .B(csr_priv_mtval[7]), .C(un1_u_miv_rv32_csr_decode_0_40), .D(un1_u_miv_rv32_csr_decode_0_37), .Y(debug_csr_op_rd_data_3_Z[7]) ); defparam \debug_csr_op_rd_data_3[7] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_2[7] ( .A(dcsr_cause[1]), .B(tdata2_match_data_1[7]), .C(un1_u_miv_rv32_csr_decode_0_1), .D(un1_u_miv_rv32_csr_decode_0_3), .Y(debug_csr_op_rd_data_2_Z[7]) ); defparam \debug_csr_op_rd_data_2[7] .INIT=16'hECA0; // @46:5144 CFG4 \debug_csr_op_rd_data_1[7] ( .A(mtime_count_out[7]), .B(status_mpie), .C(un1_u_miv_rv32_csr_decode_0_56), .D(un1_u_miv_rv32_csr_decode_0_16), .Y(debug_csr_op_rd_data_1_Z[7]) ); defparam \debug_csr_op_rd_data_1[7] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_0[7] ( .A(mtime_count_out[39]), .B(csr_priv_dpc_retr[7]), .C(un1_u_miv_rv32_csr_decode_0_15), .D(un1_u_miv_rv32_csr_decode_0_0), .Y(debug_csr_op_rd_data_0_Z[7]) ); defparam \debug_csr_op_rd_data_0[7] .INIT=16'hECA0; // @46:5144 CFG4 \debug_csr_op_rd_data_6[3] ( .A(csr_priv_mtvec_excpt_vec_retr[3]), .B(csr_priv_cause_excpt_code[3]), .C(un1_u_miv_rv32_csr_decode_0_43), .D(un1_u_miv_rv32_csr_decode_0_41), .Y(debug_csr_op_rd_data_6_Z[3]) ); defparam \debug_csr_op_rd_data_6[3] .INIT=16'hECA0; // @46:5144 CFG4 \debug_csr_op_rd_data_3[3] ( .A(csr_priv_mtval[3]), .B(tdata2_match_data_1[3]), .C(un1_u_miv_rv32_csr_decode_0_3), .D(un1_u_miv_rv32_csr_decode_0_40), .Y(debug_csr_op_rd_data_3_Z[3]) ); defparam \debug_csr_op_rd_data_3[3] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_2[3] ( .A(mtime_count_out[3]), .B(status_mie), .C(un1_u_miv_rv32_csr_decode_0_56), .D(un1_u_miv_rv32_csr_decode_0_16), .Y(debug_csr_op_rd_data_2_Z[3]) ); defparam \debug_csr_op_rd_data_2[3] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_2[8] ( .A(csr_priv_mtval[8]), .B(tdata2_match_data_1[8]), .C(un1_u_miv_rv32_csr_decode_0_3), .D(un1_u_miv_rv32_csr_decode_0_40), .Y(debug_csr_op_rd_data_2_Z[8]) ); defparam \debug_csr_op_rd_data_2[8] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_1[8] ( .A(dcsr_cause[2]), .B(mtime_count_out[8]), .C(un1_u_miv_rv32_csr_decode_0_16), .D(un1_u_miv_rv32_csr_decode_0_1), .Y(debug_csr_op_rd_data_1_Z[8]) ); defparam \debug_csr_op_rd_data_1[8] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_0[8] ( .A(mtime_count_out[40]), .B(csr_priv_dpc_retr[8]), .C(un1_u_miv_rv32_csr_decode_0_15), .D(un1_u_miv_rv32_csr_decode_0_0), .Y(debug_csr_op_rd_data_0_Z[8]) ); defparam \debug_csr_op_rd_data_0[8] .INIT=16'hECA0; // @46:5144 CFG4 \debug_csr_op_rd_data_3[11] ( .A(mscratch_scratch[11]), .B(csr_priv_mtval[11]), .C(un1_u_miv_rv32_csr_decode_0_40), .D(un1_u_miv_rv32_csr_decode_0_37), .Y(debug_csr_op_rd_data_3_Z[11]) ); defparam \debug_csr_op_rd_data_3[11] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_2[11] ( .A(dcsr_stepie), .B(tdata2_match_data_1[11]), .C(un1_u_miv_rv32_csr_decode_0_3), .D(un1_u_miv_rv32_csr_decode_0_1), .Y(debug_csr_op_rd_data_2_Z[11]) ); defparam \debug_csr_op_rd_data_2[11] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_1[11] ( .A(mtime_count_out[43]), .B(mtime_count_out[11]), .C(un1_u_miv_rv32_csr_decode_0_16), .D(un1_u_miv_rv32_csr_decode_0_15), .Y(debug_csr_op_rd_data_1_Z[11]) ); defparam \debug_csr_op_rd_data_1[11] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_2[22] ( .A(mscratch_scratch[22]), .B(csr_priv_mtval[22]), .C(un1_u_miv_rv32_csr_decode_0_40), .D(un1_u_miv_rv32_csr_decode_0_37), .Y(debug_csr_op_rd_data_2_Z[22]) ); defparam \debug_csr_op_rd_data_2[22] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_1[22] ( .A(tdata2_match_data_1[22]), .B(mtime_count_out[22]), .C(un1_u_miv_rv32_csr_decode_0_16), .D(un1_u_miv_rv32_csr_decode_0_3), .Y(debug_csr_op_rd_data_1_Z[22]) ); defparam \debug_csr_op_rd_data_1[22] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_0[22] ( .A(mtime_count_out[54]), .B(csr_priv_dpc_retr[22]), .C(un1_u_miv_rv32_csr_decode_0_15), .D(un1_u_miv_rv32_csr_decode_0_0), .Y(debug_csr_op_rd_data_0_Z[22]) ); defparam \debug_csr_op_rd_data_0[22] .INIT=16'hECA0; // @46:5144 CFG4 \debug_csr_op_rd_data_3[30] ( .A(mscratch_scratch[30]), .B(csr_priv_mtval[30]), .C(un1_u_miv_rv32_csr_decode_0_40), .D(un1_u_miv_rv32_csr_decode_0_37), .Y(debug_csr_op_rd_data_3_Z[30]) ); defparam \debug_csr_op_rd_data_3[30] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_1[30] ( .A(csr_priv_dpc_retr[30]), .B(mtime_count_out[30]), .C(un1_u_miv_rv32_csr_decode_0_16), .D(un1_u_miv_rv32_csr_decode_0_0), .Y(debug_csr_op_rd_data_1_Z[30]) ); defparam \debug_csr_op_rd_data_1[30] .INIT=16'hEAC0; // @46:5144 CFG3 \debug_csr_op_rd_data_0[30] ( .A(mtime_count_out[62]), .B(un1_u_miv_rv32_csr_decode_0_1), .C(un1_u_miv_rv32_csr_decode_0_15), .Y(debug_csr_op_rd_data_0_Z[30]) ); defparam \debug_csr_op_rd_data_0[30] .INIT=8'hEC; // @46:5144 CFG4 \debug_csr_op_rd_data_2[23] ( .A(mscratch_scratch[23]), .B(csr_priv_mtval[23]), .C(un1_u_miv_rv32_csr_decode_0_40), .D(un1_u_miv_rv32_csr_decode_0_37), .Y(debug_csr_op_rd_data_2_Z[23]) ); defparam \debug_csr_op_rd_data_2[23] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_1[23] ( .A(tdata2_match_data_1[23]), .B(mtime_count_out[23]), .C(un1_u_miv_rv32_csr_decode_0_16), .D(un1_u_miv_rv32_csr_decode_0_3), .Y(debug_csr_op_rd_data_1_Z[23]) ); defparam \debug_csr_op_rd_data_1[23] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_0[23] ( .A(mtime_count_out[55]), .B(csr_priv_dpc_retr[23]), .C(un1_u_miv_rv32_csr_decode_0_15), .D(un1_u_miv_rv32_csr_decode_0_0), .Y(debug_csr_op_rd_data_0_Z[23]) ); defparam \debug_csr_op_rd_data_0[23] .INIT=16'hECA0; // @46:5144 CFG4 \debug_csr_op_rd_data_3[9] ( .A(mscratch_scratch[9]), .B(tdata2_match_data_1[9]), .C(un1_u_miv_rv32_csr_decode_0_3), .D(un1_u_miv_rv32_csr_decode_0_37), .Y(debug_csr_op_rd_data_3_Z[9]) ); defparam \debug_csr_op_rd_data_3[9] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_2[9] ( .A(dcsr_stoptime), .B(mtime_count_out[9]), .C(un1_u_miv_rv32_csr_decode_0_16), .D(un1_u_miv_rv32_csr_decode_0_1), .Y(debug_csr_op_rd_data_2_Z[9]) ); defparam \debug_csr_op_rd_data_2[9] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_4[2] ( .A(mscratch_scratch[2]), .B(csr_priv_mtval[2]), .C(un1_u_miv_rv32_csr_decode_0_40), .D(un1_u_miv_rv32_csr_decode_0_37), .Y(debug_csr_op_rd_data_4_Z[2]) ); defparam \debug_csr_op_rd_data_4[2] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_3[2] ( .A(dcsr_step), .B(tdata2_match_data_1[2]), .C(un1_u_miv_rv32_csr_decode_0_3), .D(un1_u_miv_rv32_csr_decode_0_1), .Y(debug_csr_op_rd_data_3_Z[2]) ); defparam \debug_csr_op_rd_data_3[2] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_1[2] ( .A(csr_priv_dpc_retr[2]), .B(mtime_count_out[2]), .C(un1_u_miv_rv32_csr_decode_0_16), .D(un1_u_miv_rv32_csr_decode_0_0), .Y(debug_csr_op_rd_data_1_Z[2]) ); defparam \debug_csr_op_rd_data_1[2] .INIT=16'hEAC0; // @46:5144 CFG3 \debug_csr_op_rd_data_0[2] ( .A(un1_u_miv_rv32_csr_decode_0_15), .B(mtime_count_out[34]), .C(un1_u_miv_rv32_csr_decode_0_53), .Y(debug_csr_op_rd_data_0_Z[2]) ); defparam \debug_csr_op_rd_data_0[2] .INIT=8'hF8; // @46:5144 CFG4 \debug_csr_op_rd_data_4[12] ( .A(mscratch_scratch[12]), .B(tdata2_match_data_1[12]), .C(un1_u_miv_rv32_csr_decode_0_3), .D(un1_u_miv_rv32_csr_decode_0_37), .Y(debug_csr_op_rd_data_4_Z[12]) ); defparam \debug_csr_op_rd_data_4[12] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_2[12] ( .A(csr_priv_dpc_retr[12]), .B(mtime_count_out[12]), .C(un1_u_miv_rv32_csr_decode_0_16), .D(un1_u_miv_rv32_csr_decode_0_0), .Y(debug_csr_op_rd_data_2_Z[12]) ); defparam \debug_csr_op_rd_data_2[12] .INIT=16'hEAC0; // @46:5144 CFG3 \debug_csr_op_rd_data_0[12] ( .A(un1_u_miv_rv32_csr_decode_0_15), .B(mtime_count_out[44]), .C(un1_u_miv_rv32_csr_decode_0_53), .Y(debug_csr_op_rd_data_0_Z[12]) ); defparam \debug_csr_op_rd_data_0[12] .INIT=8'hF8; // @46:5144 CFG4 \debug_csr_op_rd_data_2[15] ( .A(mscratch_scratch[15]), .B(tdata2_match_data_1[15]), .C(un1_u_miv_rv32_csr_decode_0_3), .D(un1_u_miv_rv32_csr_decode_0_37), .Y(debug_csr_op_rd_data_2_Z[15]) ); defparam \debug_csr_op_rd_data_2[15] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_1[15] ( .A(dcsr_ebreakm), .B(mtime_count_out[15]), .C(un1_u_miv_rv32_csr_decode_0_16), .D(un1_u_miv_rv32_csr_decode_0_1), .Y(debug_csr_op_rd_data_1_Z[15]) ); defparam \debug_csr_op_rd_data_1[15] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_0[15] ( .A(mtime_count_out[47]), .B(csr_priv_dpc_retr[15]), .C(un1_u_miv_rv32_csr_decode_0_15), .D(un1_u_miv_rv32_csr_decode_0_0), .Y(debug_csr_op_rd_data_0_Z[15]) ); defparam \debug_csr_op_rd_data_0[15] .INIT=16'hECA0; // @46:5144 CFG4 \debug_csr_op_rd_data_2[10] ( .A(mscratch_scratch[10]), .B(tdata2_match_data_1[10]), .C(un1_u_miv_rv32_csr_decode_0_3), .D(un1_u_miv_rv32_csr_decode_0_37), .Y(debug_csr_op_rd_data_2_Z[10]) ); defparam \debug_csr_op_rd_data_2[10] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_1[10] ( .A(dcsr_stopcount), .B(mtime_count_out[10]), .C(un1_u_miv_rv32_csr_decode_0_16), .D(un1_u_miv_rv32_csr_decode_0_1), .Y(debug_csr_op_rd_data_1_Z[10]) ); defparam \debug_csr_op_rd_data_1[10] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_0[10] ( .A(mtime_count_out[42]), .B(csr_priv_dpc_retr[10]), .C(un1_u_miv_rv32_csr_decode_0_15), .D(un1_u_miv_rv32_csr_decode_0_0), .Y(debug_csr_op_rd_data_0_Z[10]) ); defparam \debug_csr_op_rd_data_0[10] .INIT=16'hECA0; // @46:5144 CFG4 \debug_csr_op_rd_data_3[6] ( .A(mscratch_scratch[6]), .B(tdata2_match_data_1[6]), .C(un1_u_miv_rv32_csr_decode_0_3), .D(un1_u_miv_rv32_csr_decode_0_37), .Y(debug_csr_op_rd_data_3_Z[6]) ); defparam \debug_csr_op_rd_data_3[6] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_1[6] ( .A(csr_priv_dpc_retr[6]), .B(mtime_count_out[6]), .C(un1_u_miv_rv32_csr_decode_0_16), .D(un1_u_miv_rv32_csr_decode_0_0), .Y(debug_csr_op_rd_data_1_Z[6]) ); defparam \debug_csr_op_rd_data_1[6] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_3[1] ( .A(mscratch_scratch[1]), .B(tdata2_match_data_1[1]), .C(un1_u_miv_rv32_csr_decode_0_3), .D(un1_u_miv_rv32_csr_decode_0_37), .Y(debug_csr_op_rd_data_3_Z[1]) ); defparam \debug_csr_op_rd_data_3[1] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_2[20] ( .A(csr_priv_mtval[20]), .B(tdata2_match_data_1[20]), .C(un1_u_miv_rv32_csr_decode_0_3), .D(un1_u_miv_rv32_csr_decode_0_40), .Y(debug_csr_op_rd_data_2_Z[20]) ); defparam \debug_csr_op_rd_data_2[20] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_1[20] ( .A(tdata1_mcontrol_hit), .B(mtime_count_out[20]), .C(un1_u_miv_rv32_csr_decode_0_16), .D(un1_u_miv_rv32_csr_decode_0_4), .Y(debug_csr_op_rd_data_1_Z[20]) ); defparam \debug_csr_op_rd_data_1[20] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_0[20] ( .A(mtime_count_out[52]), .B(csr_priv_dpc_retr[20]), .C(un1_u_miv_rv32_csr_decode_0_15), .D(un1_u_miv_rv32_csr_decode_0_0), .Y(debug_csr_op_rd_data_0_Z[20]) ); defparam \debug_csr_op_rd_data_0[20] .INIT=16'hECA0; // @46:5144 CFG4 \debug_csr_op_rd_data_3[29] ( .A(mscratch_scratch[29]), .B(tdata2_match_data_1[29]), .C(un1_u_miv_rv32_csr_decode_0_3), .D(un1_u_miv_rv32_csr_decode_0_37), .Y(debug_csr_op_rd_data_3_Z[29]) ); defparam \debug_csr_op_rd_data_3[29] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_3[25] ( .A(mscratch_scratch[25]), .B(csr_priv_mtval[25]), .C(un1_u_miv_rv32_csr_decode_0_40), .D(un1_u_miv_rv32_csr_decode_0_37), .Y(debug_csr_op_rd_data_3_Z[25]) ); defparam \debug_csr_op_rd_data_3[25] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_1[25] ( .A(csr_priv_dpc_retr[25]), .B(mtime_count_out[25]), .C(un1_u_miv_rv32_csr_decode_0_16), .D(un1_u_miv_rv32_csr_decode_0_0), .Y(debug_csr_op_rd_data_1_Z[25]) ); defparam \debug_csr_op_rd_data_1[25] .INIT=16'hEAC0; // @46:5144 CFG3 \debug_csr_op_rd_data_0[25] ( .A(un1_u_miv_rv32_csr_decode_0_15), .B(mtime_count_out[57]), .C(un1_u_miv_rv32_csr_decode_0_53), .Y(debug_csr_op_rd_data_0_Z[25]) ); defparam \debug_csr_op_rd_data_0[25] .INIT=8'hF8; // @46:5144 CFG4 \debug_csr_op_rd_data_3[5] ( .A(mscratch_scratch[5]), .B(csr_priv_mtval[5]), .C(un1_u_miv_rv32_csr_decode_0_40), .D(un1_u_miv_rv32_csr_decode_0_37), .Y(debug_csr_op_rd_data_3_Z[5]) ); defparam \debug_csr_op_rd_data_3[5] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_2[5] ( .A(tdata2_match_data_1[5]), .B(mtime_count_out[5]), .C(un1_u_miv_rv32_csr_decode_0_16), .D(un1_u_miv_rv32_csr_decode_0_3), .Y(debug_csr_op_rd_data_2_Z[5]) ); defparam \debug_csr_op_rd_data_2[5] .INIT=16'hEAC0; // @46:5144 CFG3 \debug_csr_op_rd_data_0[5] ( .A(un1_u_miv_rv32_csr_decode_0_15), .B(mtime_count_out[37]), .C(un1_u_miv_rv32_csr_decode_0_60), .Y(debug_csr_op_rd_data_0_Z[5]) ); defparam \debug_csr_op_rd_data_0[5] .INIT=8'hF8; // @46:5144 CFG4 \debug_csr_op_rd_data_2[21] ( .A(mscratch_scratch[21]), .B(csr_priv_mtval[21]), .C(un1_u_miv_rv32_csr_decode_0_40), .D(un1_u_miv_rv32_csr_decode_0_37), .Y(debug_csr_op_rd_data_2_Z[21]) ); defparam \debug_csr_op_rd_data_2[21] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_1[21] ( .A(tdata2_match_data_1[21]), .B(mtime_count_out[21]), .C(un1_u_miv_rv32_csr_decode_0_16), .D(un1_u_miv_rv32_csr_decode_0_3), .Y(debug_csr_op_rd_data_1_Z[21]) ); defparam \debug_csr_op_rd_data_1[21] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_0[21] ( .A(mtime_count_out[53]), .B(csr_priv_dpc_retr[21]), .C(un1_u_miv_rv32_csr_decode_0_15), .D(un1_u_miv_rv32_csr_decode_0_0), .Y(debug_csr_op_rd_data_0_Z[21]) ); defparam \debug_csr_op_rd_data_0[21] .INIT=16'hECA0; // @46:5144 CFG4 \debug_csr_op_rd_data_3[26] ( .A(mscratch_scratch[26]), .B(csr_priv_mtval[26]), .C(un1_u_miv_rv32_csr_decode_0_40), .D(un1_u_miv_rv32_csr_decode_0_37), .Y(debug_csr_op_rd_data_3_Z[26]) ); defparam \debug_csr_op_rd_data_3[26] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_2[26] ( .A(tdata2_match_data_1[26]), .B(mtime_count_out[26]), .C(un1_u_miv_rv32_csr_decode_0_16), .D(un1_u_miv_rv32_csr_decode_0_3), .Y(debug_csr_op_rd_data_2_Z[26]) ); defparam \debug_csr_op_rd_data_2[26] .INIT=16'hEAC0; // @46:5144 CFG3 \debug_csr_op_rd_data_0[26] ( .A(un1_u_miv_rv32_csr_decode_0_15), .B(mtime_count_out[58]), .C(un1_u_miv_rv32_csr_decode_0_58), .Y(debug_csr_op_rd_data_0_Z[26]) ); defparam \debug_csr_op_rd_data_0[26] .INIT=8'hF8; // @46:5144 CFG4 \debug_csr_op_rd_data_2[17] ( .A(mscratch_scratch[17]), .B(csr_priv_mtval[17]), .C(un1_u_miv_rv32_csr_decode_0_40), .D(un1_u_miv_rv32_csr_decode_0_37), .Y(debug_csr_op_rd_data_2_Z[17]) ); defparam \debug_csr_op_rd_data_2[17] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_1[17] ( .A(tdata2_match_data_1[17]), .B(mtime_count_out[17]), .C(un1_u_miv_rv32_csr_decode_0_16), .D(un1_u_miv_rv32_csr_decode_0_3), .Y(debug_csr_op_rd_data_1_Z[17]) ); defparam \debug_csr_op_rd_data_1[17] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_0[17] ( .A(mtime_count_out[49]), .B(csr_priv_dpc_retr[17]), .C(un1_u_miv_rv32_csr_decode_0_15), .D(un1_u_miv_rv32_csr_decode_0_0), .Y(debug_csr_op_rd_data_0_Z[17]) ); defparam \debug_csr_op_rd_data_0[17] .INIT=16'hECA0; // @46:5144 CFG4 \debug_csr_op_rd_data_2[19] ( .A(mscratch_scratch[19]), .B(csr_priv_mtval[19]), .C(un1_u_miv_rv32_csr_decode_0_40), .D(un1_u_miv_rv32_csr_decode_0_37), .Y(debug_csr_op_rd_data_2_Z[19]) ); defparam \debug_csr_op_rd_data_2[19] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_1[19] ( .A(tdata2_match_data_1[19]), .B(mtime_count_out[19]), .C(un1_u_miv_rv32_csr_decode_0_16), .D(un1_u_miv_rv32_csr_decode_0_3), .Y(debug_csr_op_rd_data_1_Z[19]) ); defparam \debug_csr_op_rd_data_1[19] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_0[19] ( .A(mtime_count_out[51]), .B(csr_priv_dpc_retr[19]), .C(un1_u_miv_rv32_csr_decode_0_15), .D(un1_u_miv_rv32_csr_decode_0_0), .Y(debug_csr_op_rd_data_0_Z[19]) ); defparam \debug_csr_op_rd_data_0[19] .INIT=16'hECA0; // @46:5144 CFG4 \debug_csr_op_rd_data_3[27] ( .A(mscratch_scratch[27]), .B(csr_priv_mtval[27]), .C(un1_u_miv_rv32_csr_decode_0_40), .D(un1_u_miv_rv32_csr_decode_0_37), .Y(debug_csr_op_rd_data_3_Z[27]) ); defparam \debug_csr_op_rd_data_3[27] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_1[27] ( .A(csr_priv_dpc_retr[27]), .B(mtime_count_out[27]), .C(un1_u_miv_rv32_csr_decode_0_16), .D(un1_u_miv_rv32_csr_decode_0_0), .Y(debug_csr_op_rd_data_1_Z[27]) ); defparam \debug_csr_op_rd_data_1[27] .INIT=16'hEAC0; // @46:5144 CFG3 \debug_csr_op_rd_data_0[27] ( .A(mtime_count_out[59]), .B(un1_u_miv_rv32_csr_decode_0_4), .C(un1_u_miv_rv32_csr_decode_0_15), .Y(debug_csr_op_rd_data_0_Z[27]) ); defparam \debug_csr_op_rd_data_0[27] .INIT=8'hEC; // @46:5144 CFG4 \debug_csr_op_rd_data_2[4] ( .A(mscratch_scratch[4]), .B(csr_priv_mtval[4]), .C(un1_u_miv_rv32_csr_decode_0_40), .D(un1_u_miv_rv32_csr_decode_0_37), .Y(debug_csr_op_rd_data_2_Z[4]) ); defparam \debug_csr_op_rd_data_2[4] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_1[4] ( .A(tdata2_match_data_1[4]), .B(mtime_count_out[4]), .C(un1_u_miv_rv32_csr_decode_0_16), .D(un1_u_miv_rv32_csr_decode_0_3), .Y(debug_csr_op_rd_data_1_Z[4]) ); defparam \debug_csr_op_rd_data_1[4] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_0[4] ( .A(mtime_count_out[36]), .B(csr_priv_dpc_retr[4]), .C(un1_u_miv_rv32_csr_decode_0_15), .D(un1_u_miv_rv32_csr_decode_0_0), .Y(debug_csr_op_rd_data_0_Z[4]) ); defparam \debug_csr_op_rd_data_0[4] .INIT=16'hECA0; // @46:5144 CFG4 \debug_csr_op_rd_data_3[24] ( .A(mscratch_scratch[24]), .B(csr_priv_mtval[24]), .C(un1_u_miv_rv32_csr_decode_0_40), .D(un1_u_miv_rv32_csr_decode_0_37), .Y(debug_csr_op_rd_data_3_Z[24]) ); defparam \debug_csr_op_rd_data_3[24] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_2[24] ( .A(tdata2_match_data_1[24]), .B(mtime_count_out[24]), .C(un1_u_miv_rv32_csr_decode_0_16), .D(un1_u_miv_rv32_csr_decode_0_3), .Y(debug_csr_op_rd_data_2_Z[24]) ); defparam \debug_csr_op_rd_data_2[24] .INIT=16'hEAC0; // @46:5144 CFG3 \debug_csr_op_rd_data_0[24] ( .A(un1_u_miv_rv32_csr_decode_0_15), .B(mtime_count_out[56]), .C(un1_u_miv_rv32_csr_decode_0_58), .Y(debug_csr_op_rd_data_0_Z[24]) ); defparam \debug_csr_op_rd_data_0[24] .INIT=8'hF8; // @46:5144 CFG4 \debug_csr_op_rd_data_2[14] ( .A(mscratch_scratch[14]), .B(csr_priv_mtval[14]), .C(un1_u_miv_rv32_csr_decode_0_40), .D(un1_u_miv_rv32_csr_decode_0_37), .Y(debug_csr_op_rd_data_2_Z[14]) ); defparam \debug_csr_op_rd_data_2[14] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_1[14] ( .A(tdata2_match_data_1[14]), .B(mtime_count_out[14]), .C(un1_u_miv_rv32_csr_decode_0_16), .D(un1_u_miv_rv32_csr_decode_0_3), .Y(debug_csr_op_rd_data_1_Z[14]) ); defparam \debug_csr_op_rd_data_1[14] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_0[14] ( .A(mtime_count_out[46]), .B(csr_priv_dpc_retr[14]), .C(un1_u_miv_rv32_csr_decode_0_15), .D(un1_u_miv_rv32_csr_decode_0_0), .Y(debug_csr_op_rd_data_0_Z[14]) ); defparam \debug_csr_op_rd_data_0[14] .INIT=16'hECA0; // @46:5144 CFG4 \debug_csr_op_rd_data_3[31] ( .A(mscratch_scratch[31]), .B(csr_priv_mtval[31]), .C(un1_u_miv_rv32_csr_decode_0_40), .D(un1_u_miv_rv32_csr_decode_0_37), .Y(debug_csr_op_rd_data_3_Z[31]) ); defparam \debug_csr_op_rd_data_3[31] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_2[31] ( .A(tdata2_match_data_1[31]), .B(mtime_count_out[31]), .C(un1_u_miv_rv32_csr_decode_0_16), .D(un1_u_miv_rv32_csr_decode_0_3), .Y(debug_csr_op_rd_data_2_Z[31]) ); defparam \debug_csr_op_rd_data_2[31] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_2[13] ( .A(mscratch_scratch[13]), .B(csr_priv_mtval[13]), .C(un1_u_miv_rv32_csr_decode_0_40), .D(un1_u_miv_rv32_csr_decode_0_37), .Y(debug_csr_op_rd_data_2_Z[13]) ); defparam \debug_csr_op_rd_data_2[13] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_1[13] ( .A(tdata2_match_data_1[13]), .B(mtime_count_out[13]), .C(un1_u_miv_rv32_csr_decode_0_16), .D(un1_u_miv_rv32_csr_decode_0_3), .Y(debug_csr_op_rd_data_1_Z[13]) ); defparam \debug_csr_op_rd_data_1[13] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_0[13] ( .A(mtime_count_out[45]), .B(csr_priv_dpc_retr[13]), .C(un1_u_miv_rv32_csr_decode_0_15), .D(un1_u_miv_rv32_csr_decode_0_0), .Y(debug_csr_op_rd_data_0_Z[13]) ); defparam \debug_csr_op_rd_data_0[13] .INIT=16'hECA0; // @46:5144 CFG4 \debug_csr_op_rd_data_3[16] ( .A(mscratch_scratch[16]), .B(csr_priv_mtval[16]), .C(un1_u_miv_rv32_csr_decode_0_40), .D(un1_u_miv_rv32_csr_decode_0_37), .Y(debug_csr_op_rd_data_3_Z[16]) ); defparam \debug_csr_op_rd_data_3[16] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_2[16] ( .A(tdata2_match_data_1[16]), .B(mtime_count_out[16]), .C(un1_u_miv_rv32_csr_decode_0_16), .D(un1_u_miv_rv32_csr_decode_0_3), .Y(debug_csr_op_rd_data_2_Z[16]) ); defparam \debug_csr_op_rd_data_2[16] .INIT=16'hEAC0; // @46:5144 CFG3 \debug_csr_op_rd_data_0[16] ( .A(un1_u_miv_rv32_csr_decode_0_15), .B(mtime_count_out[48]), .C(un1_u_miv_rv32_csr_decode_0_58), .Y(debug_csr_op_rd_data_0_Z[16]) ); defparam \debug_csr_op_rd_data_0[16] .INIT=8'hF8; // @46:5144 CFG4 \debug_csr_op_rd_data_2[18] ( .A(mscratch_scratch[18]), .B(csr_priv_mtval[18]), .C(un1_u_miv_rv32_csr_decode_0_40), .D(un1_u_miv_rv32_csr_decode_0_37), .Y(debug_csr_op_rd_data_2_Z[18]) ); defparam \debug_csr_op_rd_data_2[18] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_1[18] ( .A(tdata2_match_data_1[18]), .B(mtime_count_out[18]), .C(un1_u_miv_rv32_csr_decode_0_16), .D(un1_u_miv_rv32_csr_decode_0_3), .Y(debug_csr_op_rd_data_1_Z[18]) ); defparam \debug_csr_op_rd_data_1[18] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_0[18] ( .A(mtime_count_out[50]), .B(csr_priv_dpc_retr[18]), .C(un1_u_miv_rv32_csr_decode_0_15), .D(un1_u_miv_rv32_csr_decode_0_0), .Y(debug_csr_op_rd_data_0_Z[18]) ); defparam \debug_csr_op_rd_data_0[18] .INIT=16'hECA0; // @46:5144 CFG4 \debug_csr_op_rd_data_2[28] ( .A(mscratch_scratch[28]), .B(csr_priv_mtval[28]), .C(un1_u_miv_rv32_csr_decode_0_40), .D(un1_u_miv_rv32_csr_decode_0_37), .Y(debug_csr_op_rd_data_2_Z[28]) ); defparam \debug_csr_op_rd_data_2[28] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_1[28] ( .A(tdata2_match_data_1[28]), .B(mtime_count_out[28]), .C(un1_u_miv_rv32_csr_decode_0_16), .D(un1_u_miv_rv32_csr_decode_0_3), .Y(debug_csr_op_rd_data_1_Z[28]) ); defparam \debug_csr_op_rd_data_1[28] .INIT=16'hEAC0; // @46:5144 CFG4 \debug_csr_op_rd_data_0[28] ( .A(mtime_count_out[60]), .B(csr_priv_dpc_retr[28]), .C(un1_u_miv_rv32_csr_decode_0_15), .D(un1_u_miv_rv32_csr_decode_0_0), .Y(debug_csr_op_rd_data_0_Z[28]) ); defparam \debug_csr_op_rd_data_0[28] .INIT=16'hECA0; // @46:5144 CFG4 \debug_csr_op_rd_data_3[0] ( .A(csr_priv_mtval[0]), .B(tdata2_match_data_1[0]), .C(un1_u_miv_rv32_csr_decode_0_3), .D(un1_u_miv_rv32_csr_decode_0_40), .Y(debug_csr_op_rd_data_3_Z[0]) ); defparam \debug_csr_op_rd_data_3[0] .INIT=16'hEAC0; // @46:5144 CFG3 \debug_csr_op_rd_data_1[0] ( .A(un1_u_miv_rv32_csr_decode_0_0), .B(csr_priv_dpc_retr[0]), .C(un1_u_miv_rv32_csr_decode_0_1), .Y(debug_csr_op_rd_data_1_Z[0]) ); defparam \debug_csr_op_rd_data_1[0] .INIT=8'hF8; // @46:2448 CFG4 un1_excpt_i_access_fault ( .A(excpt_ebreak_Z), .B(un3_instr_inhibit_ex_6), .C(i_access_mem_error_retr), .D(un29_trap_val), .Y(un1_excpt_i_access_fault_1z) ); defparam un1_excpt_i_access_fault.INIT=16'hFEEE; // @46:2484 CFG4 un1_soft_reset_taken_retr_s_s_RNIEE3QL ( .A(gpr_wr_en_retr), .B(un14_gpr_rs1_stall_lsu), .C(un1_soft_reset_taken_retr_s_out), .D(gpr_wr_completing_retr_3_0_d), .Y(csr_m6_0_a4_1_1) ); defparam un1_soft_reset_taken_retr_s_s_RNIEE3QL.INIT=16'h080A; // @46:2351 CFG4 machine_implicit_wr_mtval_tval_wr_en_1_RNO ( .A(gpr_wr_completing_retr_3_0_d), .B(debug_enter_retr), .C(un14_gpr_rs1_stall_lsu), .D(gpr_wr_en_retr), .Y(d_N_5_mux_3) ); defparam machine_implicit_wr_mtval_tval_wr_en_1_RNO.INIT=16'h3100; // @46:2430 CFG2 \cause_excpt_code_excpt_m5[1] ( .A(lsu_expipe_resp_str_amo_addr_misalign_net), .B(cause_excpt_code_excpt_sm3), .Y(cause_excpt_code_excpt_m5_0) ); defparam \cause_excpt_code_excpt_m5[1] .INIT=4'hE; // @46:5144 CFG3 \debug_csr_op_rd_data_6[7] ( .A(debug_csr_op_rd_data_3_Z[7]), .B(csr_priv_mtvec_excpt_vec_retr[7]), .C(un1_u_miv_rv32_csr_decode_0_43), .Y(debug_csr_op_rd_data_6_Z[7]) ); defparam \debug_csr_op_rd_data_6[7] .INIT=8'hEA; // @46:5144 CFG4 \debug_csr_op_rd_data_1[3] ( .A(csr_priv_dpc_retr[3]), .B(un1_u_miv_rv32_csr_decode_0_60), .C(un1_u_miv_rv32_csr_decode_0_0), .D(utimeh_rd_data_Z[3]), .Y(debug_csr_op_rd_data_1_Z[3]) ); defparam \debug_csr_op_rd_data_1[3] .INIT=16'hFFEC; // @46:5144 CFG3 \debug_csr_op_rd_data_5[8] ( .A(debug_csr_op_rd_data_2_Z[8]), .B(csr_priv_mtvec_excpt_vec_retr[8]), .C(un1_u_miv_rv32_csr_decode_0_43), .Y(debug_csr_op_rd_data_5_Z[8]) ); defparam \debug_csr_op_rd_data_5[8] .INIT=8'hEA; // @46:5144 CFG3 \debug_csr_op_rd_data_6[11] ( .A(debug_csr_op_rd_data_3_Z[11]), .B(csr_priv_mtvec_excpt_vec_retr[11]), .C(un1_u_miv_rv32_csr_decode_0_43), .Y(debug_csr_op_rd_data_6_Z[11]) ); defparam \debug_csr_op_rd_data_6[11] .INIT=8'hEA; // @46:5144 CFG4 \debug_csr_op_rd_data_4[11] ( .A(un1_u_miv_rv32_csr_decode_0_0), .B(csr_priv_dpc_retr[11]), .C(debug_csr_op_rd_data_1_Z[11]), .D(un1_u_miv_rv32_csr_decode_0_56), .Y(debug_csr_op_rd_data_4_Z[11]) ); defparam \debug_csr_op_rd_data_4[11] .INIT=16'hFFF8; // @46:5144 CFG3 \debug_csr_op_rd_data_5[22] ( .A(debug_csr_op_rd_data_2_Z[22]), .B(csr_priv_mtvec_epc_retr[22]), .C(un1_u_miv_rv32_csr_decode_0_42), .Y(debug_csr_op_rd_data_5_Z[22]) ); defparam \debug_csr_op_rd_data_5[22] .INIT=8'hEA; // @46:5144 CFG3 \debug_csr_op_rd_data_4[22] ( .A(csr_priv_mtvec_excpt_vec_retr[22]), .B(debug_csr_op_rd_data_1_Z[22]), .C(un1_u_miv_rv32_csr_decode_0_43), .Y(debug_csr_op_rd_data_4_Z[22]) ); defparam \debug_csr_op_rd_data_4[22] .INIT=8'hEC; // @46:5144 CFG3 \debug_csr_op_rd_data_6[30] ( .A(debug_csr_op_rd_data_3_Z[30]), .B(csr_priv_mtvec_epc_retr[30]), .C(un1_u_miv_rv32_csr_decode_0_42), .Y(debug_csr_op_rd_data_6_Z[30]) ); defparam \debug_csr_op_rd_data_6[30] .INIT=8'hEA; // @46:5144 CFG3 \debug_csr_op_rd_data_4[23] ( .A(csr_priv_mtvec_excpt_vec_retr[23]), .B(debug_csr_op_rd_data_1_Z[23]), .C(un1_u_miv_rv32_csr_decode_0_43), .Y(debug_csr_op_rd_data_4_Z[23]) ); defparam \debug_csr_op_rd_data_4[23] .INIT=8'hEC; // @46:5144 CFG3 \debug_csr_op_rd_data_5[9] ( .A(csr_priv_mtvec_excpt_vec_retr[9]), .B(debug_csr_op_rd_data_2_Z[9]), .C(un1_u_miv_rv32_csr_decode_0_43), .Y(debug_csr_op_rd_data_5_Z[9]) ); defparam \debug_csr_op_rd_data_5[9] .INIT=8'hEC; // @46:5144 CFG4 \debug_csr_op_rd_data_1[9] ( .A(csr_priv_dpc_retr[9]), .B(un1_u_miv_rv32_csr_decode_0_58), .C(un1_u_miv_rv32_csr_decode_0_0), .D(utimeh_rd_data_Z[9]), .Y(debug_csr_op_rd_data_1_Z[9]) ); defparam \debug_csr_op_rd_data_1[9] .INIT=16'hFFEC; // @46:5144 CFG3 \debug_csr_op_rd_data_6[2] ( .A(debug_csr_op_rd_data_3_Z[2]), .B(csr_priv_cause_excpt_code[2]), .C(un1_u_miv_rv32_csr_decode_0_41), .Y(debug_csr_op_rd_data_6_Z[2]) ); defparam \debug_csr_op_rd_data_6[2] .INIT=8'hEA; // @46:5144 CFG3 \debug_csr_op_rd_data_5[12] ( .A(debug_csr_op_rd_data_2_Z[12]), .B(csr_priv_mtval[12]), .C(un1_u_miv_rv32_csr_decode_0_40), .Y(debug_csr_op_rd_data_5_Z[12]) ); defparam \debug_csr_op_rd_data_5[12] .INIT=8'hEA; // @46:5144 CFG3 \debug_csr_op_rd_data_3[12] ( .A(un1_u_miv_rv32_csr_decode_0_56), .B(debug_csr_op_rd_data_0_Z[12]), .C(un1_u_miv_rv32_csr_decode_0_4), .Y(debug_csr_op_rd_data_3_Z[12]) ); defparam \debug_csr_op_rd_data_3[12] .INIT=8'hFE; // @46:5144 CFG3 \debug_csr_op_rd_data_4[15] ( .A(csr_priv_mtvec_excpt_vec_retr[15]), .B(debug_csr_op_rd_data_1_Z[15]), .C(un1_u_miv_rv32_csr_decode_0_43), .Y(debug_csr_op_rd_data_4_Z[15]) ); defparam \debug_csr_op_rd_data_4[15] .INIT=8'hEC; // @46:5144 CFG3 \debug_csr_op_rd_data_4[10] ( .A(csr_priv_mtvec_excpt_vec_retr[10]), .B(debug_csr_op_rd_data_1_Z[10]), .C(un1_u_miv_rv32_csr_decode_0_43), .Y(debug_csr_op_rd_data_4_Z[10]) ); defparam \debug_csr_op_rd_data_4[10] .INIT=8'hEC; // @46:5144 CFG3 \debug_csr_op_rd_data_4[6] ( .A(debug_csr_op_rd_data_1_Z[6]), .B(csr_priv_mtval[6]), .C(un1_u_miv_rv32_csr_decode_0_40), .Y(debug_csr_op_rd_data_4_Z[6]) ); defparam \debug_csr_op_rd_data_4[6] .INIT=8'hEA; // @46:5144 CFG4 \debug_csr_op_rd_data_2[6] ( .A(mtime_count_out[38]), .B(un1_u_miv_rv32_csr_decode_0_4), .C(dcsr_rd_data_Z[6]), .D(un1_u_miv_rv32_csr_decode_0_15), .Y(debug_csr_op_rd_data_2_Z[6]) ); defparam \debug_csr_op_rd_data_2[6] .INIT=16'hFEFC; // @46:5144 CFG4 \debug_csr_op_rd_data_4[1] ( .A(un1_u_miv_rv32_csr_decode_0_1), .B(csr_priv_mtval[1]), .C(dpc_rd_data_Z[1]), .D(un1_u_miv_rv32_csr_decode_0_40), .Y(debug_csr_op_rd_data_4_Z[1]) ); defparam \debug_csr_op_rd_data_4[1] .INIT=16'hFEFA; // @46:5144 CFG4 \debug_csr_op_rd_data_2[1] ( .A(un1_u_miv_rv32_csr_decode_0_58), .B(mtime_count_out[33]), .C(un1_u_miv_rv32_csr_decode_0_15), .D(utime_rd_data_Z[1]), .Y(debug_csr_op_rd_data_2_Z[1]) ); defparam \debug_csr_op_rd_data_2[1] .INIT=16'hFFEA; // @46:5144 CFG3 \debug_csr_op_rd_data_4[20] ( .A(csr_priv_mtvec_excpt_vec_retr[20]), .B(debug_csr_op_rd_data_1_Z[20]), .C(un1_u_miv_rv32_csr_decode_0_43), .Y(debug_csr_op_rd_data_4_Z[20]) ); defparam \debug_csr_op_rd_data_4[20] .INIT=8'hEC; // @46:5144 CFG4 \debug_csr_op_rd_data_4[29] ( .A(csr_priv_mtval[29]), .B(dpc_rd_data_Z[29]), .C(un1_u_miv_rv32_csr_decode_0_4), .D(un1_u_miv_rv32_csr_decode_0_40), .Y(debug_csr_op_rd_data_4_Z[29]) ); defparam \debug_csr_op_rd_data_4[29] .INIT=16'hFEFC; // @46:5144 CFG4 \debug_csr_op_rd_data_2[29] ( .A(un1_u_miv_rv32_csr_decode_0_58), .B(mtime_count_out[61]), .C(un1_u_miv_rv32_csr_decode_0_15), .D(utime_rd_data_Z[29]), .Y(debug_csr_op_rd_data_2_Z[29]) ); defparam \debug_csr_op_rd_data_2[29] .INIT=16'hFFEA; // @46:5144 CFG3 \debug_csr_op_rd_data_5[25] ( .A(debug_csr_op_rd_data_3_Z[25]), .B(csr_priv_mtvec_excpt_vec_retr[25]), .C(un1_u_miv_rv32_csr_decode_0_43), .Y(debug_csr_op_rd_data_5_Z[25]) ); defparam \debug_csr_op_rd_data_5[25] .INIT=8'hEA; // @46:5144 CFG3 \debug_csr_op_rd_data_5[5] ( .A(debug_csr_op_rd_data_3_Z[5]), .B(csr_priv_mtvec_excpt_vec_retr[5]), .C(un1_u_miv_rv32_csr_decode_0_43), .Y(debug_csr_op_rd_data_5_Z[5]) ); defparam \debug_csr_op_rd_data_5[5] .INIT=8'hEA; // @46:5144 CFG3 \debug_csr_op_rd_data_5[26] ( .A(debug_csr_op_rd_data_3_Z[26]), .B(csr_priv_mtvec_excpt_vec_retr[26]), .C(un1_u_miv_rv32_csr_decode_0_43), .Y(debug_csr_op_rd_data_5_Z[26]) ); defparam \debug_csr_op_rd_data_5[26] .INIT=8'hEA; // @46:5144 CFG3 \debug_csr_op_rd_data_5[27] ( .A(debug_csr_op_rd_data_3_Z[27]), .B(csr_priv_mtvec_excpt_vec_retr[27]), .C(un1_u_miv_rv32_csr_decode_0_43), .Y(debug_csr_op_rd_data_5_Z[27]) ); defparam \debug_csr_op_rd_data_5[27] .INIT=8'hEA; // @46:5144 CFG3 \debug_csr_op_rd_data_4[4] ( .A(csr_priv_mtvec_excpt_vec_retr[4]), .B(debug_csr_op_rd_data_1_Z[4]), .C(un1_u_miv_rv32_csr_decode_0_43), .Y(debug_csr_op_rd_data_4_Z[4]) ); defparam \debug_csr_op_rd_data_4[4] .INIT=8'hEC; // @46:5144 CFG3 \debug_csr_op_rd_data_5[24] ( .A(debug_csr_op_rd_data_3_Z[24]), .B(csr_priv_mtvec_excpt_vec_retr[24]), .C(un1_u_miv_rv32_csr_decode_0_43), .Y(debug_csr_op_rd_data_5_Z[24]) ); defparam \debug_csr_op_rd_data_5[24] .INIT=8'hEA; // @46:5144 CFG3 \debug_csr_op_rd_data_5[31] ( .A(csr_priv_mtvec_excpt_vec_retr[31]), .B(debug_csr_op_rd_data_2_Z[31]), .C(un1_u_miv_rv32_csr_decode_0_43), .Y(debug_csr_op_rd_data_5_Z[31]) ); defparam \debug_csr_op_rd_data_5[31] .INIT=8'hEC; // @46:5144 CFG4 \debug_csr_op_rd_data_1[31] ( .A(csr_priv_dpc_retr[31]), .B(un1_u_miv_rv32_csr_decode_0_58), .C(un1_u_miv_rv32_csr_decode_0_0), .D(utimeh_rd_data_Z[31]), .Y(debug_csr_op_rd_data_1_Z[31]) ); defparam \debug_csr_op_rd_data_1[31] .INIT=16'hFFEC; // @46:5144 CFG3 \debug_csr_op_rd_data_5[16] ( .A(debug_csr_op_rd_data_3_Z[16]), .B(csr_priv_mtvec_excpt_vec_retr[16]), .C(un1_u_miv_rv32_csr_decode_0_43), .Y(debug_csr_op_rd_data_5_Z[16]) ); defparam \debug_csr_op_rd_data_5[16] .INIT=8'hEA; // @46:5144 CFG4 \debug_csr_op_rd_data_2[0] ( .A(mtime_count_out[0]), .B(un1_u_miv_rv32_csr_decode_0_16), .C(un1_u_miv_rv32_csr_decode_0_60), .D(utimeh_rd_data_Z[0]), .Y(debug_csr_op_rd_data_2_Z[0]) ); defparam \debug_csr_op_rd_data_2[0] .INIT=16'hFFF8; // @46:2353 CFG4 un4_exception_taken_5 ( .A(un1_req_resp_state_1_i), .B(lsu_expipe_resp_str_amo_addr_misalign_net), .C(un4_exception_taken_3_Z), .D(lsu_expipe_resp_ld_addr_misalign_0), .Y(un4_exception_taken_5_Z) ); defparam un4_exception_taken_5.INIT=16'hFEFC; // @46:2430 CFG3 cause_excpt_code_excpt_m5s4 ( .A(un1_req_resp_state_1_i), .B(cause_excpt_code_excpt_m5_0), .C(lsu_expipe_resp_ld_addr_misalign_0), .Y(N_679) ); defparam cause_excpt_code_excpt_m5s4.INIT=8'hEC; // @46:2331 CFG4 csr_op_wr_valid ( .A(trace_priv_i), .B(lsu_flush), .C(ex_retr_pipe_sw_csr_wr_op_retr[1]), .D(ex_retr_pipe_sw_csr_wr_op_retr[0]), .Y(csr_op_wr_valid_Z) ); defparam csr_op_wr_valid.INIT=16'h1B11; // @46:5144 CFG4 \debug_csr_op_rd_data_8[7] ( .A(ie_mtie), .B(un1_u_miv_rv32_csr_decode_0_50), .C(debug_csr_op_rd_data_2_Z[7]), .D(debug_csr_op_rd_data_6_Z[7]), .Y(debug_csr_op_rd_data_8_Z[7]) ); defparam \debug_csr_op_rd_data_8[7] .INIT=16'hFFF8; // @46:5144 CFG4 \debug_csr_op_rd_data_9[3] ( .A(debug_csr_op_rd_data_3_Z[3]), .B(csr_priv_mtvec_epc_retr[3]), .C(debug_csr_op_rd_data_6_Z[3]), .D(un1_u_miv_rv32_csr_decode_0_42), .Y(debug_csr_op_rd_data_9_Z[3]) ); defparam \debug_csr_op_rd_data_9[3] .INIT=16'hFEFA; // @46:5144 CFG4 \debug_csr_op_rd_data_6[8] ( .A(csr_priv_mtvec_epc_retr[8]), .B(debug_csr_op_rd_data_0_Z[8]), .C(mscratch_rd_data_Z[8]), .D(un1_u_miv_rv32_csr_decode_0_42), .Y(debug_csr_op_rd_data_6_Z[8]) ); defparam \debug_csr_op_rd_data_6[8] .INIT=16'hFEFC; // @46:5144 CFG4 \debug_csr_op_rd_data_8[11] ( .A(ie_meie), .B(un1_u_miv_rv32_csr_decode_0_50), .C(debug_csr_op_rd_data_2_Z[11]), .D(debug_csr_op_rd_data_6_Z[11]), .Y(debug_csr_op_rd_data_8_Z[11]) ); defparam \debug_csr_op_rd_data_8[11] .INIT=16'hFFF8; // @46:5144 CFG4 \debug_csr_op_rd_data_5[30] ( .A(un1_u_miv_rv32_csr_decode_0_3), .B(debug_csr_op_rd_data_0_Z[30]), .C(tdata2_match_data_1[30]), .D(mtvec_rd_data_Z[30]), .Y(debug_csr_op_rd_data_5_Z[30]) ); defparam \debug_csr_op_rd_data_5[30] .INIT=16'hFFEC; // @46:5144 CFG4 \debug_csr_op_rd_data_6[23] ( .A(ie_mextsysie[1]), .B(un1_u_miv_rv32_csr_decode_0_50), .C(debug_csr_op_rd_data_0_Z[23]), .D(debug_csr_op_rd_data_4_Z[23]), .Y(debug_csr_op_rd_data_6_Z[23]) ); defparam \debug_csr_op_rd_data_6[23] .INIT=16'hFFF8; // @46:5144 CFG4 \debug_csr_op_rd_data_9[2] ( .A(debug_csr_op_rd_data_6_Z[2]), .B(debug_csr_op_rd_data_4_Z[2]), .C(csr_priv_mtvec_excpt_vec_retr[2]), .D(un1_u_miv_rv32_csr_decode_0_43), .Y(debug_csr_op_rd_data_9_Z[2]) ); defparam \debug_csr_op_rd_data_9[2] .INIT=16'hFEEE; // @46:5144 CFG4 \debug_csr_op_rd_data_5[2] ( .A(tdata1_mcontrol_execute), .B(un1_u_miv_rv32_csr_decode_0_4), .C(debug_csr_op_rd_data_0_Z[2]), .D(debug_csr_op_rd_data_1_Z[2]), .Y(debug_csr_op_rd_data_5_Z[2]) ); defparam \debug_csr_op_rd_data_5[2] .INIT=16'hFFF8; // @46:5144 CFG4 \debug_csr_op_rd_data_6[15] ( .A(debug_csr_op_rd_data_0_Z[15]), .B(debug_csr_op_rd_data_4_Z[15]), .C(csr_priv_mtval[15]), .D(un1_u_miv_rv32_csr_decode_0_40), .Y(debug_csr_op_rd_data_6_Z[15]) ); defparam \debug_csr_op_rd_data_6[15] .INIT=16'hFEEE; // @46:5144 CFG4 \debug_csr_op_rd_data_6[10] ( .A(debug_csr_op_rd_data_0_Z[10]), .B(debug_csr_op_rd_data_4_Z[10]), .C(csr_priv_mtval[10]), .D(un1_u_miv_rv32_csr_decode_0_40), .Y(debug_csr_op_rd_data_6_Z[10]) ); defparam \debug_csr_op_rd_data_6[10] .INIT=16'hFEEE; // @46:5144 CFG4 \debug_csr_op_rd_data_6[20] ( .A(mscratch_scratch[20]), .B(un1_u_miv_rv32_csr_decode_0_37), .C(debug_csr_op_rd_data_0_Z[20]), .D(debug_csr_op_rd_data_4_Z[20]), .Y(debug_csr_op_rd_data_6_Z[20]) ); defparam \debug_csr_op_rd_data_6[20] .INIT=16'hFFF8; // @46:5144 CFG4 \debug_csr_op_rd_data_4[25] ( .A(tdata2_match_data_1[25]), .B(un1_u_miv_rv32_csr_decode_0_3), .C(debug_csr_op_rd_data_0_Z[25]), .D(debug_csr_op_rd_data_1_Z[25]), .Y(debug_csr_op_rd_data_4_Z[25]) ); defparam \debug_csr_op_rd_data_4[25] .INIT=16'hFFF8; // @46:5144 CFG4 \debug_csr_op_rd_data_4[5] ( .A(debug_csr_op_rd_data_0_Z[5]), .B(debug_csr_op_rd_data_2_Z[5]), .C(csr_priv_dpc_retr[5]), .D(un1_u_miv_rv32_csr_decode_0_0), .Y(debug_csr_op_rd_data_4_Z[5]) ); defparam \debug_csr_op_rd_data_4[5] .INIT=16'hFEEE; // @46:5144 CFG4 \debug_csr_op_rd_data_5[21] ( .A(csr_priv_mtvec_epc_retr[21]), .B(debug_csr_op_rd_data_1_Z[21]), .C(debug_csr_op_rd_data_0_Z[21]), .D(un1_u_miv_rv32_csr_decode_0_42), .Y(debug_csr_op_rd_data_5_Z[21]) ); defparam \debug_csr_op_rd_data_5[21] .INIT=16'hFEFC; // @46:5144 CFG4 \debug_csr_op_rd_data_4[26] ( .A(debug_csr_op_rd_data_0_Z[26]), .B(debug_csr_op_rd_data_2_Z[26]), .C(csr_priv_dpc_retr[26]), .D(un1_u_miv_rv32_csr_decode_0_0), .Y(debug_csr_op_rd_data_4_Z[26]) ); defparam \debug_csr_op_rd_data_4[26] .INIT=16'hFEEE; // @46:5144 CFG4 \debug_csr_op_rd_data_5[17] ( .A(csr_priv_mtvec_epc_retr[17]), .B(debug_csr_op_rd_data_1_Z[17]), .C(debug_csr_op_rd_data_0_Z[17]), .D(un1_u_miv_rv32_csr_decode_0_42), .Y(debug_csr_op_rd_data_5_Z[17]) ); defparam \debug_csr_op_rd_data_5[17] .INIT=16'hFEFC; // @46:5144 CFG4 \debug_csr_op_rd_data_5[19] ( .A(csr_priv_mtvec_epc_retr[19]), .B(debug_csr_op_rd_data_1_Z[19]), .C(debug_csr_op_rd_data_0_Z[19]), .D(un1_u_miv_rv32_csr_decode_0_42), .Y(debug_csr_op_rd_data_5_Z[19]) ); defparam \debug_csr_op_rd_data_5[19] .INIT=16'hFEFC; // @46:5144 CFG4 \debug_csr_op_rd_data_4[27] ( .A(un1_u_miv_rv32_csr_decode_0_3), .B(tdata2_match_data_1[27]), .C(debug_csr_op_rd_data_0_Z[27]), .D(debug_csr_op_rd_data_1_Z[27]), .Y(debug_csr_op_rd_data_4_Z[27]) ); defparam \debug_csr_op_rd_data_4[27] .INIT=16'hFFF8; // @46:5144 CFG4 \debug_csr_op_rd_data_6[4] ( .A(debug_csr_op_rd_data_0_Z[4]), .B(debug_csr_op_rd_data_4_Z[4]), .C(csr_priv_cause_excpt_code[4]), .D(un1_u_miv_rv32_csr_decode_0_41), .Y(debug_csr_op_rd_data_6_Z[4]) ); defparam \debug_csr_op_rd_data_6[4] .INIT=16'hFEEE; // @46:5144 CFG4 \debug_csr_op_rd_data_4[24] ( .A(debug_csr_op_rd_data_0_Z[24]), .B(debug_csr_op_rd_data_2_Z[24]), .C(csr_priv_dpc_retr[24]), .D(un1_u_miv_rv32_csr_decode_0_0), .Y(debug_csr_op_rd_data_4_Z[24]) ); defparam \debug_csr_op_rd_data_4[24] .INIT=16'hFEEE; // @46:5144 CFG4 \debug_csr_op_rd_data_5[14] ( .A(csr_priv_mtvec_epc_retr[14]), .B(debug_csr_op_rd_data_1_Z[14]), .C(debug_csr_op_rd_data_0_Z[14]), .D(un1_u_miv_rv32_csr_decode_0_42), .Y(debug_csr_op_rd_data_5_Z[14]) ); defparam \debug_csr_op_rd_data_5[14] .INIT=16'hFEFC; // @46:5144 CFG4 \debug_csr_op_rd_data_5[13] ( .A(csr_priv_mtvec_epc_retr[13]), .B(debug_csr_op_rd_data_1_Z[13]), .C(debug_csr_op_rd_data_0_Z[13]), .D(un1_u_miv_rv32_csr_decode_0_42), .Y(debug_csr_op_rd_data_5_Z[13]) ); defparam \debug_csr_op_rd_data_5[13] .INIT=16'hFEFC; // @46:5144 CFG4 \debug_csr_op_rd_data_4[16] ( .A(debug_csr_op_rd_data_0_Z[16]), .B(debug_csr_op_rd_data_2_Z[16]), .C(csr_priv_dpc_retr[16]), .D(un1_u_miv_rv32_csr_decode_0_0), .Y(debug_csr_op_rd_data_4_Z[16]) ); defparam \debug_csr_op_rd_data_4[16] .INIT=16'hFEEE; // @46:5144 CFG4 \debug_csr_op_rd_data_5[18] ( .A(csr_priv_mtvec_epc_retr[18]), .B(debug_csr_op_rd_data_1_Z[18]), .C(debug_csr_op_rd_data_0_Z[18]), .D(un1_u_miv_rv32_csr_decode_0_42), .Y(debug_csr_op_rd_data_5_Z[18]) ); defparam \debug_csr_op_rd_data_5[18] .INIT=16'hFEFC; // @46:5144 CFG4 \debug_csr_op_rd_data_5[28] ( .A(csr_priv_mtvec_epc_retr[28]), .B(debug_csr_op_rd_data_1_Z[28]), .C(debug_csr_op_rd_data_0_Z[28]), .D(un1_u_miv_rv32_csr_decode_0_42), .Y(debug_csr_op_rd_data_5_Z[28]) ); defparam \debug_csr_op_rd_data_5[28] .INIT=16'hFEFC; // @46:5144 CFG4 \debug_csr_op_rd_data_6[0] ( .A(mscratch_scratch[0]), .B(debug_csr_op_rd_data_1_Z[0]), .C(un1_u_miv_rv32_csr_decode_0_37), .D(debug_csr_op_rd_data_3_Z[0]), .Y(debug_csr_op_rd_data_6_Z[0]) ); defparam \debug_csr_op_rd_data_6[0] .INIT=16'hFFEC; // @46:2498 CFG4 sw_csr_wr_valid_qual ( .A(trace_priv_i), .B(exu_result_valid_retr), .C(exu_csr_op_wr_data14_1z), .D(csr_op_wr_valid_Z), .Y(sw_csr_wr_valid_qual_1z) ); defparam sw_csr_wr_valid_qual.INIT=16'hAE00; // @46:2430 CFG2 \cause_excpt_code_excpt_m2[3] ( .A(lsu_expipe_resp_access_mem_error_net), .B(i_access_mem_error_retr), .Y(cause_excpt_code_excpt_m2_Z[3]) ); defparam \cause_excpt_code_excpt_m2[3] .INIT=4'hE; // @46:2430 CFG2 \cause_excpt_code_excpt_m2[1] ( .A(lsu_expipe_resp_access_mem_error_net), .B(i_access_mem_error_retr), .Y(cause_excpt_code_excpt_m2_0) ); defparam \cause_excpt_code_excpt_m2[1] .INIT=4'h2; // @46:5144 CFG4 \debug_csr_op_rd_data_9[7] ( .A(debug_csr_op_rd_data_1_Z[7]), .B(debug_csr_op_rd_data_0_Z[7]), .C(debug_csr_op_rd_data_8_Z[7]), .D(mepc_rd_data_Z[7]), .Y(debug_csr_op_rd_data_9_Z[7]) ); defparam \debug_csr_op_rd_data_9[7] .INIT=16'hFFFE; // @46:5144 CFG4 \debug_csr_op_rd_data_7[9] ( .A(debug_csr_op_rd_data_1_Z[9]), .B(debug_csr_op_rd_data_5_Z[9]), .C(csr_priv_mtval[9]), .D(un1_u_miv_rv32_csr_decode_0_40), .Y(debug_csr_op_rd_data_7_Z[9]) ); defparam \debug_csr_op_rd_data_7[9] .INIT=16'hFEEE; // @46:5144 CFG4 \debug_csr_op_rd_data_8[12] ( .A(debug_csr_op_rd_data_3_Z[12]), .B(csr_priv_mtvec_excpt_vec_retr[12]), .C(debug_csr_op_rd_data_5_Z[12]), .D(un1_u_miv_rv32_csr_decode_0_43), .Y(debug_csr_op_rd_data_8_Z[12]) ); defparam \debug_csr_op_rd_data_8[12] .INIT=16'hFEFA; // @46:5144 CFG4 \debug_csr_op_rd_data_7[6] ( .A(debug_csr_op_rd_data_2_Z[6]), .B(csr_priv_mtvec_excpt_vec_retr[6]), .C(debug_csr_op_rd_data_4_Z[6]), .D(un1_u_miv_rv32_csr_decode_0_43), .Y(debug_csr_op_rd_data_7_Z[6]) ); defparam \debug_csr_op_rd_data_7[6] .INIT=16'hFEFA; // @46:5144 CFG4 \debug_csr_op_rd_data_7[29] ( .A(debug_csr_op_rd_data_2_Z[29]), .B(csr_priv_mtvec_excpt_vec_retr[29]), .C(debug_csr_op_rd_data_4_Z[29]), .D(un1_u_miv_rv32_csr_decode_0_43), .Y(debug_csr_op_rd_data_7_Z[29]) ); defparam \debug_csr_op_rd_data_7[29] .INIT=16'hFEFA; // @46:5144 CFG4 \debug_csr_op_rd_data[8] ( .A(debug_csr_op_rd_data_5_Z[8]), .B(debug_csr_op_rd_data_6_Z[8]), .C(debug_csr_op_rd_data_1_Z[8]), .D(debug_csr_op_rd_data_1159_Z), .Y(cpu_debug_csr_op_rd_data_net[8]) ); defparam \debug_csr_op_rd_data[8] .INIT=16'hFFFE; // @46:5144 CFG4 \debug_csr_op_rd_data[10] ( .A(debug_csr_op_rd_data_2_Z[10]), .B(debug_csr_op_rd_data_6_Z[10]), .C(csr_priv_mtvec_epc_retr[10]), .D(un1_u_miv_rv32_csr_decode_0_42), .Y(cpu_debug_csr_op_rd_data_net[10]) ); defparam \debug_csr_op_rd_data[10] .INIT=16'hFEEE; // @46:5144 CFG4 \debug_csr_op_rd_data[13] ( .A(debug_csr_op_rd_data_2_Z[13]), .B(debug_csr_op_rd_data_5_Z[13]), .C(csr_priv_mtvec_excpt_vec_retr[13]), .D(un1_u_miv_rv32_csr_decode_0_43), .Y(cpu_debug_csr_op_rd_data_net[13]) ); defparam \debug_csr_op_rd_data[13] .INIT=16'hFEEE; // @46:5144 CFG4 \debug_csr_op_rd_data[14] ( .A(debug_csr_op_rd_data_2_Z[14]), .B(debug_csr_op_rd_data_5_Z[14]), .C(csr_priv_mtvec_excpt_vec_retr[14]), .D(un1_u_miv_rv32_csr_decode_0_43), .Y(cpu_debug_csr_op_rd_data_net[14]) ); defparam \debug_csr_op_rd_data[14] .INIT=16'hFEEE; // @46:5144 CFG4 \debug_csr_op_rd_data[17] ( .A(debug_csr_op_rd_data_2_Z[17]), .B(debug_csr_op_rd_data_5_Z[17]), .C(csr_priv_mtvec_excpt_vec_retr[17]), .D(un1_u_miv_rv32_csr_decode_0_43), .Y(cpu_debug_csr_op_rd_data_net[17]) ); defparam \debug_csr_op_rd_data[17] .INIT=16'hFEEE; // @46:5144 CFG4 \debug_csr_op_rd_data[18] ( .A(debug_csr_op_rd_data_2_Z[18]), .B(debug_csr_op_rd_data_5_Z[18]), .C(csr_priv_mtvec_excpt_vec_retr[18]), .D(un1_u_miv_rv32_csr_decode_0_43), .Y(cpu_debug_csr_op_rd_data_net[18]) ); defparam \debug_csr_op_rd_data[18] .INIT=16'hFEEE; // @46:5144 CFG4 \debug_csr_op_rd_data[19] ( .A(debug_csr_op_rd_data_2_Z[19]), .B(debug_csr_op_rd_data_5_Z[19]), .C(csr_priv_mtvec_excpt_vec_retr[19]), .D(un1_u_miv_rv32_csr_decode_0_43), .Y(cpu_debug_csr_op_rd_data_net[19]) ); defparam \debug_csr_op_rd_data[19] .INIT=16'hFEEE; // @46:5144 CFG4 \debug_csr_op_rd_data[21] ( .A(debug_csr_op_rd_data_2_Z[21]), .B(debug_csr_op_rd_data_5_Z[21]), .C(csr_priv_mtvec_excpt_vec_retr[21]), .D(un1_u_miv_rv32_csr_decode_0_43), .Y(cpu_debug_csr_op_rd_data_net[21]) ); defparam \debug_csr_op_rd_data[21] .INIT=16'hFEEE; // @46:5144 CFG4 \debug_csr_op_rd_data[28] ( .A(debug_csr_op_rd_data_2_Z[28]), .B(debug_csr_op_rd_data_5_Z[28]), .C(csr_priv_mtvec_excpt_vec_retr[28]), .D(un1_u_miv_rv32_csr_decode_0_43), .Y(cpu_debug_csr_op_rd_data_net[28]) ); defparam \debug_csr_op_rd_data[28] .INIT=16'hFEEE; // @46:5144 CFG4 \debug_csr_op_rd_data[22] ( .A(debug_csr_op_rd_data_4_Z[22]), .B(debug_csr_op_rd_data_5_Z[22]), .C(mie_rd_data_Z[22]), .D(debug_csr_op_rd_data_0_Z[22]), .Y(cpu_debug_csr_op_rd_data_net[22]) ); defparam \debug_csr_op_rd_data[22] .INIT=16'hFFFE; // @46:5144 CFG4 \debug_csr_op_rd_data[23] ( .A(debug_csr_op_rd_data_2_Z[23]), .B(debug_csr_op_rd_data_6_Z[23]), .C(csr_priv_mtvec_epc_retr[23]), .D(un1_u_miv_rv32_csr_decode_0_42), .Y(cpu_debug_csr_op_rd_data_net[23]) ); defparam \debug_csr_op_rd_data[23] .INIT=16'hFEEE; // @46:5144 CFG4 \debug_csr_op_rd_data[11] ( .A(debug_csr_op_rd_data_4_Z[11]), .B(debug_csr_op_rd_data_8_Z[11]), .C(csr_priv_mtvec_epc_retr[11]), .D(un1_u_miv_rv32_csr_decode_0_42), .Y(cpu_debug_csr_op_rd_data_net[11]) ); defparam \debug_csr_op_rd_data[11] .INIT=16'hFEEE; // @46:5144 CFG4 \debug_csr_op_rd_data[20] ( .A(debug_csr_op_rd_data_2_Z[20]), .B(csr_priv_mtvec_epc_retr[20]), .C(debug_csr_op_rd_data_6_Z[20]), .D(un1_u_miv_rv32_csr_decode_0_42), .Y(cpu_debug_csr_op_rd_data_net[20]) ); defparam \debug_csr_op_rd_data[20] .INIT=16'hFEFA; // @46:5144 CFG4 \debug_csr_op_rd_data[4] ( .A(debug_csr_op_rd_data_2_Z[4]), .B(debug_csr_op_rd_data_6_Z[4]), .C(csr_priv_mtvec_epc_retr[4]), .D(un1_u_miv_rv32_csr_decode_0_42), .Y(cpu_debug_csr_op_rd_data_net[4]) ); defparam \debug_csr_op_rd_data[4] .INIT=16'hFEEE; // @46:5144 CFG4 \debug_csr_op_rd_data[0] ( .A(debug_csr_op_rd_data_2_Z[0]), .B(debug_csr_op_rd_data_6_Z[0]), .C(csr_priv_cause_excpt_code[0]), .D(un1_u_miv_rv32_csr_decode_0_41), .Y(cpu_debug_csr_op_rd_data_net[0]) ); defparam \debug_csr_op_rd_data[0] .INIT=16'hFEEE; // @46:5144 CFG4 \debug_csr_op_rd_data[15] ( .A(debug_csr_op_rd_data_2_Z[15]), .B(debug_csr_op_rd_data_6_Z[15]), .C(csr_priv_mtvec_epc_retr[15]), .D(un1_u_miv_rv32_csr_decode_0_42), .Y(cpu_debug_csr_op_rd_data_net[15]) ); defparam \debug_csr_op_rd_data[15] .INIT=16'hFEEE; // @46:2430 CFG3 cause_excpt_code_excpt_ss6 ( .A(N_679), .B(ex_retr_pipe_illegal_instr_retr), .C(un3_instr_inhibit_ex_8), .Y(cause_excpt_code_excpt_ss6_1z) ); defparam cause_excpt_code_excpt_ss6.INIT=8'hCA; // @46:2484 CFG4 un1_soft_reset_taken_retr_s_s_RNIA0DB32 ( .A(csr_N_9_mux_i_2), .B(csr_m6_0_a4_1_1), .C(un1_lsu_resp_valid), .D(csr_N_9_mux_i_0_a0_0_Z), .Y(csr_N_9_mux_i_4) ); defparam un1_soft_reset_taken_retr_s_s_RNIA0DB32.INIT=16'h22A2; // @46:2446 CFG2 \machine_implicit_wr_mcause_excpt_code_wr_data_0_cZ[4] ( .A(cause_excpt_code_excpt_m2_Z[3]), .B(cause_excpt_code_excpt_ss6_1z), .Y(machine_implicit_wr_mcause_excpt_code_wr_data_0[4]) ); defparam \machine_implicit_wr_mcause_excpt_code_wr_data_0_cZ[4] .INIT=4'h2; // @46:5144 CFG4 \debug_csr_op_rd_data[2] ( .A(debug_csr_op_rd_data_5_Z[2]), .B(debug_csr_op_rd_data_9_Z[2]), .C(csr_priv_mtvec_epc_retr[2]), .D(un1_u_miv_rv32_csr_decode_0_42), .Y(cpu_debug_csr_op_rd_data_net[2]) ); defparam \debug_csr_op_rd_data[2] .INIT=16'hFEEE; // @46:5144 CFG4 \debug_csr_op_rd_data[5] ( .A(debug_csr_op_rd_data_4_Z[5]), .B(debug_csr_op_rd_data_5_Z[5]), .C(csr_priv_mtvec_epc_retr[5]), .D(un1_u_miv_rv32_csr_decode_0_42), .Y(cpu_debug_csr_op_rd_data_net[5]) ); defparam \debug_csr_op_rd_data[5] .INIT=16'hFEEE; // @46:5144 CFG4 \debug_csr_op_rd_data[6] ( .A(debug_csr_op_rd_data_3_Z[6]), .B(debug_csr_op_rd_data_7_Z[6]), .C(csr_priv_mtvec_epc_retr[6]), .D(un1_u_miv_rv32_csr_decode_0_42), .Y(cpu_debug_csr_op_rd_data_net[6]) ); defparam \debug_csr_op_rd_data[6] .INIT=16'hFEEE; // @46:5144 CFG4 \debug_csr_op_rd_data[9] ( .A(debug_csr_op_rd_data_3_Z[9]), .B(debug_csr_op_rd_data_7_Z[9]), .C(csr_priv_mtvec_epc_retr[9]), .D(un1_u_miv_rv32_csr_decode_0_42), .Y(cpu_debug_csr_op_rd_data_net[9]) ); defparam \debug_csr_op_rd_data[9] .INIT=16'hFEEE; // @46:5144 CFG4 \debug_csr_op_rd_data[12] ( .A(debug_csr_op_rd_data_4_Z[12]), .B(debug_csr_op_rd_data_8_Z[12]), .C(csr_priv_mtvec_epc_retr[12]), .D(un1_u_miv_rv32_csr_decode_0_42), .Y(cpu_debug_csr_op_rd_data_net[12]) ); defparam \debug_csr_op_rd_data[12] .INIT=16'hFEEE; // @46:5144 CFG4 \debug_csr_op_rd_data[24] ( .A(debug_csr_op_rd_data_4_Z[24]), .B(debug_csr_op_rd_data_5_Z[24]), .C(csr_priv_mtvec_epc_retr[24]), .D(un1_u_miv_rv32_csr_decode_0_42), .Y(cpu_debug_csr_op_rd_data_net[24]) ); defparam \debug_csr_op_rd_data[24] .INIT=16'hFEEE; // @46:5144 CFG4 \debug_csr_op_rd_data[26] ( .A(debug_csr_op_rd_data_4_Z[26]), .B(debug_csr_op_rd_data_5_Z[26]), .C(csr_priv_mtvec_epc_retr[26]), .D(un1_u_miv_rv32_csr_decode_0_42), .Y(cpu_debug_csr_op_rd_data_net[26]) ); defparam \debug_csr_op_rd_data[26] .INIT=16'hFEEE; // @46:5144 CFG4 \debug_csr_op_rd_data[27] ( .A(debug_csr_op_rd_data_4_Z[27]), .B(debug_csr_op_rd_data_5_Z[27]), .C(csr_priv_mtvec_epc_retr[27]), .D(un1_u_miv_rv32_csr_decode_0_42), .Y(cpu_debug_csr_op_rd_data_net[27]) ); defparam \debug_csr_op_rd_data[27] .INIT=16'hFEEE; // @46:5144 CFG4 \debug_csr_op_rd_data[29] ( .A(debug_csr_op_rd_data_3_Z[29]), .B(debug_csr_op_rd_data_7_Z[29]), .C(csr_priv_mtvec_epc_retr[29]), .D(un1_u_miv_rv32_csr_decode_0_42), .Y(cpu_debug_csr_op_rd_data_net[29]) ); defparam \debug_csr_op_rd_data[29] .INIT=16'hFEEE; // @46:5144 CFG4 \debug_csr_op_rd_data[30] ( .A(debug_csr_op_rd_data_5_Z[30]), .B(debug_csr_op_rd_data_6_Z[30]), .C(debug_csr_op_rd_data_1159_Z), .D(debug_csr_op_rd_data_1_Z[30]), .Y(cpu_debug_csr_op_rd_data_net[30]) ); defparam \debug_csr_op_rd_data[30] .INIT=16'hFFFE; // @46:5144 CFG4 \debug_csr_op_rd_data[16] ( .A(debug_csr_op_rd_data_4_Z[16]), .B(debug_csr_op_rd_data_5_Z[16]), .C(csr_priv_mtvec_epc_retr[16]), .D(un1_u_miv_rv32_csr_decode_0_42), .Y(cpu_debug_csr_op_rd_data_net[16]) ); defparam \debug_csr_op_rd_data[16] .INIT=16'hFEEE; // @46:2430 CFG3 \cause_excpt_code_excpt[2] ( .A(cause_excpt_code_excpt_ss6_1z), .B(un3_instr_inhibit_ex_8), .C(cause_excpt_code_excpt_sm3), .Y(cause_excpt_code_excpt_2) ); defparam \cause_excpt_code_excpt[2] .INIT=8'h02; // @46:5144 CFG4 \debug_csr_op_rd_data[25] ( .A(debug_csr_op_rd_data_4_Z[25]), .B(debug_csr_op_rd_data_5_Z[25]), .C(csr_priv_mtvec_epc_retr[25]), .D(un1_u_miv_rv32_csr_decode_0_42), .Y(cpu_debug_csr_op_rd_data_net[25]) ); defparam \debug_csr_op_rd_data[25] .INIT=16'hFEEE; // @46:5144 CFG4 \debug_csr_op_rd_data[31] ( .A(debug_csr_op_rd_data_5_Z[31]), .B(debug_csr_op_rd_data_6_Z[31]), .C(mcause_rd_data_Z[31]), .D(debug_csr_op_rd_data_1_Z[31]), .Y(cpu_debug_csr_op_rd_data_net[31]) ); defparam \debug_csr_op_rd_data[31] .INIT=16'hFFFE; // @46:2351 CFG3 machine_implicit_wr_mtval_tval_wr_en_1_RNO_0 ( .A(lsu_op_complete_retr_0), .B(debug_enter_retr), .C(machine_implicit_wr_mtval_tval_wr_en_1_RNO_2_Z), .Y(exception_N_5) ); defparam machine_implicit_wr_mtval_tval_wr_en_1_RNO_0.INIT=8'h31; // @46:2484 CFG3 un1_soft_reset_taken_retr_s_s_RNI3ANUG2 ( .A(lsu_op_complete_retr_0), .B(csr_N_9_mux_i_4), .C(un1_soft_reset_taken_retr_s_out), .Y(formal_trace_reset_taken) ); defparam un1_soft_reset_taken_retr_s_s_RNI3ANUG2.INIT=8'hC8; // @46:4299 CFG4 \gen_tdata1_2.gen_per_trig_tdata1[0].machine_sw_wr_tdata1_mcontrol_execute_wr_en ( .A(dcsr_debugger_wr_sel_0), .B(tdata1_sw_rd_sel_7), .C(mepc_sw_wr_sel_3), .D(un1_u_miv_rv32_csr_decode_0_2_3), .Y(machine_sw_wr_tdata1_mcontrol_execute_wr_en) ); defparam \gen_tdata1_2.gen_per_trig_tdata1[0].machine_sw_wr_tdata1_mcontrol_execute_wr_en .INIT=16'h8000; // @46:2446 CFG4 \machine_implicit_wr_mcause_excpt_code_wr_data_0_cZ[3] ( .A(N_679), .B(cause_excpt_code_excpt_m2_Z[3]), .C(m_env_call_retr), .D(un3_instr_inhibit_ex_8), .Y(machine_implicit_wr_mcause_excpt_code_wr_data_0[3]) ); defparam \machine_implicit_wr_mcause_excpt_code_wr_data_0_cZ[3] .INIT=16'h00E4; // @46:2430 CFG4 \cause_excpt_code_excpt[0] ( .A(cause_excpt_code_excpt_ss6_1z), .B(machine_implicit_wr_mtval_tval_wr_en_1z), .C(un3_instr_inhibit_ex_8), .D(cause_excpt_code_excpt_sm3), .Y(cause_excpt_code_excpt_0) ); defparam \cause_excpt_code_excpt[0] .INIT=16'h0B01; // @46:2484 CFG3 un1_soft_reset_taken_retr ( .A(un1_soft_reset_taken_retr_s_out), .B(un1_instr_completing_retr_c), .C(un1_instr_completing_retr_d), .Y(un1_soft_reset_taken_retr_Z) ); defparam un1_soft_reset_taken_retr.INIT=8'hFE; // @46:2329 CFG4 \csr_op_wr_data_1_2_0[0] ( .A(csr_op_wr_data_1_sn_N_4), .B(cpu_debug_csr_op_rd_data_net[0]), .C(ex_retr_pipe_exu_result_retr[0]), .D(N_1398_i), .Y(csr_op_wr_data_1_2[0]) ); defparam \csr_op_wr_data_1_2_0[0] .INIT=16'h08A8; // @46:2329 CFG4 \csr_op_wr_data_1_2_0[18] ( .A(csr_op_wr_data_1_sn_N_4), .B(cpu_debug_csr_op_rd_data_net[18]), .C(ex_retr_pipe_exu_result_retr[18]), .D(N_1398_i), .Y(csr_op_wr_data_1_2[18]) ); defparam \csr_op_wr_data_1_2_0[18] .INIT=16'h08A8; // @46:2329 CFG4 \csr_op_wr_data_1_2_0[13] ( .A(csr_op_wr_data_1_sn_N_4), .B(cpu_debug_csr_op_rd_data_net[13]), .C(ex_retr_pipe_exu_result_retr[13]), .D(N_1398_i), .Y(csr_op_wr_data_1_2[13]) ); defparam \csr_op_wr_data_1_2_0[13] .INIT=16'h08A8; // @46:2329 CFG4 \csr_op_wr_data_1_2_0[23] ( .A(csr_op_wr_data_1_sn_N_4), .B(cpu_debug_csr_op_rd_data_net[23]), .C(ex_retr_pipe_exu_result_retr[23]), .D(N_1398_i), .Y(csr_op_wr_data_1_2[23]) ); defparam \csr_op_wr_data_1_2_0[23] .INIT=16'h08A8; // @46:2329 CFG4 \csr_op_wr_data_1_2_0[21] ( .A(csr_op_wr_data_1_sn_N_4), .B(cpu_debug_csr_op_rd_data_net[21]), .C(ex_retr_pipe_exu_result_retr[21]), .D(N_1398_i), .Y(csr_op_wr_data_1_2[21]) ); defparam \csr_op_wr_data_1_2_0[21] .INIT=16'h08A8; // @46:2329 CFG4 \csr_op_wr_data_1_2_0[22] ( .A(csr_op_wr_data_1_sn_N_4), .B(cpu_debug_csr_op_rd_data_net[22]), .C(ex_retr_pipe_exu_result_retr[22]), .D(N_1398_i), .Y(csr_op_wr_data_1_2[22]) ); defparam \csr_op_wr_data_1_2_0[22] .INIT=16'h08A8; // @46:2329 CFG4 \csr_op_wr_data_1_2_0[8] ( .A(csr_op_wr_data_1_sn_N_4), .B(cpu_debug_csr_op_rd_data_net[8]), .C(ex_retr_pipe_exu_result_retr[8]), .D(N_1398_i), .Y(csr_op_wr_data_1_2[8]) ); defparam \csr_op_wr_data_1_2_0[8] .INIT=16'h08A8; // @46:2329 CFG4 \csr_op_wr_data_1_2_0[28] ( .A(csr_op_wr_data_1_sn_N_4), .B(cpu_debug_csr_op_rd_data_net[28]), .C(ex_retr_pipe_exu_result_retr[28]), .D(N_1398_i), .Y(csr_op_wr_data_1_2[28]) ); defparam \csr_op_wr_data_1_2_0[28] .INIT=16'h08A8; // @46:2329 CFG4 \csr_op_wr_data_1_2_0[4] ( .A(csr_op_wr_data_1_sn_N_4), .B(cpu_debug_csr_op_rd_data_net[4]), .C(ex_retr_pipe_exu_result_retr[4]), .D(N_1398_i), .Y(csr_op_wr_data_1_2[4]) ); defparam \csr_op_wr_data_1_2_0[4] .INIT=16'h08A8; // @46:2329 CFG4 \csr_op_wr_data_1_2_0[15] ( .A(csr_op_wr_data_1_sn_N_4), .B(cpu_debug_csr_op_rd_data_net[15]), .C(ex_retr_pipe_exu_result_retr[15]), .D(N_1398_i), .Y(csr_op_wr_data_1_2[15]) ); defparam \csr_op_wr_data_1_2_0[15] .INIT=16'h08A8; // @46:2329 CFG4 \csr_op_wr_data_1_2_0[20] ( .A(csr_op_wr_data_1_sn_N_4), .B(cpu_debug_csr_op_rd_data_net[20]), .C(ex_retr_pipe_exu_result_retr[20]), .D(N_1398_i), .Y(csr_op_wr_data_1_2[20]) ); defparam \csr_op_wr_data_1_2_0[20] .INIT=16'h08A8; // @46:2329 CFG4 \csr_op_wr_data_1_2_0[19] ( .A(csr_op_wr_data_1_sn_N_4), .B(cpu_debug_csr_op_rd_data_net[19]), .C(ex_retr_pipe_exu_result_retr[19]), .D(N_1398_i), .Y(csr_op_wr_data_1_2[19]) ); defparam \csr_op_wr_data_1_2_0[19] .INIT=16'h08A8; // @46:2329 CFG4 \csr_op_wr_data_1_2_0[17] ( .A(csr_op_wr_data_1_sn_N_4), .B(cpu_debug_csr_op_rd_data_net[17]), .C(ex_retr_pipe_exu_result_retr[17]), .D(N_1398_i), .Y(csr_op_wr_data_1_2[17]) ); defparam \csr_op_wr_data_1_2_0[17] .INIT=16'h08A8; // @46:2329 CFG4 \csr_op_wr_data_1_2_0[10] ( .A(csr_op_wr_data_1_sn_N_4), .B(cpu_debug_csr_op_rd_data_net[10]), .C(ex_retr_pipe_exu_result_retr[10]), .D(N_1398_i), .Y(csr_op_wr_data_1_2[10]) ); defparam \csr_op_wr_data_1_2_0[10] .INIT=16'h08A8; // @46:2329 CFG4 \csr_op_wr_data_1_2_0[11] ( .A(csr_op_wr_data_1_sn_N_4), .B(cpu_debug_csr_op_rd_data_net[11]), .C(ex_retr_pipe_exu_result_retr[11]), .D(N_1398_i), .Y(csr_op_wr_data_1_2[11]) ); defparam \csr_op_wr_data_1_2_0[11] .INIT=16'h08A8; // @46:2329 CFG4 \csr_op_wr_data_1_2_0[14] ( .A(csr_op_wr_data_1_sn_N_4), .B(cpu_debug_csr_op_rd_data_net[14]), .C(ex_retr_pipe_exu_result_retr[14]), .D(N_1398_i), .Y(csr_op_wr_data_1_2[14]) ); defparam \csr_op_wr_data_1_2_0[14] .INIT=16'h08A8; // @46:4702 CFG3 \gen_debug.init_wr_dcsr_step_en ( .A(debug_enter_req_de), .B(un1_soft_reset_taken_retr_Z), .C(debug_reset_pending), .Y(init_wr_dcsr_step_en) ); defparam \gen_debug.init_wr_dcsr_step_en .INIT=8'h40; // @46:4710 CFG2 \gen_debug.debug_active_retr5 ( .A(un1_soft_reset_taken_retr_Z), .B(debug_enter_req_de), .Y(debug_active_retr5) ); defparam \gen_debug.debug_active_retr5 .INIT=4'h2; // @46:2329 CFG4 \csr_op_wr_data_1_2_0[1] ( .A(csr_op_wr_data_1_sn_N_4), .B(cpu_debug_csr_op_rd_data_net[1]), .C(ex_retr_pipe_exu_result_retr[1]), .D(N_1398_i), .Y(csr_op_wr_data_1_2[1]) ); defparam \csr_op_wr_data_1_2_0[1] .INIT=16'h08A8; // @46:2329 CFG4 \csr_op_wr_data_1_2_0[9] ( .A(csr_op_wr_data_1_sn_N_4), .B(cpu_debug_csr_op_rd_data_net[9]), .C(ex_retr_pipe_exu_result_retr[9]), .D(N_1398_i), .Y(csr_op_wr_data_1_2[9]) ); defparam \csr_op_wr_data_1_2_0[9] .INIT=16'h08A8; // @46:2329 CFG4 \csr_op_wr_data_1_2_0[27] ( .A(csr_op_wr_data_1_sn_N_4), .B(cpu_debug_csr_op_rd_data_net[27]), .C(ex_retr_pipe_exu_result_retr[27]), .D(N_1398_i), .Y(csr_op_wr_data_1_2[27]) ); defparam \csr_op_wr_data_1_2_0[27] .INIT=16'h08A8; // @46:2329 CFG4 \csr_op_wr_data_1_2_0[6] ( .A(csr_op_wr_data_1_sn_N_4), .B(cpu_debug_csr_op_rd_data_net[6]), .C(ex_retr_pipe_exu_result_retr[6]), .D(N_1398_i), .Y(csr_op_wr_data_1_2[6]) ); defparam \csr_op_wr_data_1_2_0[6] .INIT=16'h08A8; // @46:2329 CFG4 \csr_op_wr_data_1_2_0[31] ( .A(csr_op_wr_data_1_sn_N_4), .B(cpu_debug_csr_op_rd_data_net[31]), .C(ex_retr_pipe_exu_result_retr[31]), .D(N_1398_i), .Y(csr_op_wr_data_1_2[31]) ); defparam \csr_op_wr_data_1_2_0[31] .INIT=16'h08A8; // @46:2329 CFG4 \csr_op_wr_data_1_2_0[26] ( .A(csr_op_wr_data_1_sn_N_4), .B(cpu_debug_csr_op_rd_data_net[26]), .C(ex_retr_pipe_exu_result_retr[26]), .D(N_1398_i), .Y(csr_op_wr_data_1_2[26]) ); defparam \csr_op_wr_data_1_2_0[26] .INIT=16'h08A8; // @46:2329 CFG4 \csr_op_wr_data_1_2_0[30] ( .A(csr_op_wr_data_1_sn_N_4), .B(cpu_debug_csr_op_rd_data_net[30]), .C(ex_retr_pipe_exu_result_retr[30]), .D(N_1398_i), .Y(csr_op_wr_data_1_2[30]) ); defparam \csr_op_wr_data_1_2_0[30] .INIT=16'h08A8; // @46:2329 CFG4 \csr_op_wr_data_1_2_0[5] ( .A(csr_op_wr_data_1_sn_N_4), .B(cpu_debug_csr_op_rd_data_net[5]), .C(ex_retr_pipe_exu_result_retr[5]), .D(N_1398_i), .Y(csr_op_wr_data_1_2[5]) ); defparam \csr_op_wr_data_1_2_0[5] .INIT=16'h08A8; // @46:2329 CFG4 \csr_op_wr_data_1_2_0[24] ( .A(csr_op_wr_data_1_sn_N_4), .B(cpu_debug_csr_op_rd_data_net[24]), .C(ex_retr_pipe_exu_result_retr[24]), .D(N_1398_i), .Y(csr_op_wr_data_1_2[24]) ); defparam \csr_op_wr_data_1_2_0[24] .INIT=16'h08A8; // @46:2329 CFG4 \csr_op_wr_data_1_2_0[25] ( .A(csr_op_wr_data_1_sn_N_4), .B(cpu_debug_csr_op_rd_data_net[25]), .C(ex_retr_pipe_exu_result_retr[25]), .D(N_1398_i), .Y(csr_op_wr_data_1_2[25]) ); defparam \csr_op_wr_data_1_2_0[25] .INIT=16'h08A8; // @46:2329 CFG4 \csr_op_wr_data_1_2_0[29] ( .A(csr_op_wr_data_1_sn_N_4), .B(cpu_debug_csr_op_rd_data_net[29]), .C(ex_retr_pipe_exu_result_retr[29]), .D(N_1398_i), .Y(csr_op_wr_data_1_2[29]) ); defparam \csr_op_wr_data_1_2_0[29] .INIT=16'h08A8; // @46:2329 CFG4 \csr_op_wr_data_1_2_0[16] ( .A(csr_op_wr_data_1_sn_N_4), .B(cpu_debug_csr_op_rd_data_net[16]), .C(ex_retr_pipe_exu_result_retr[16]), .D(N_1398_i), .Y(csr_op_wr_data_1_2[16]) ); defparam \csr_op_wr_data_1_2_0[16] .INIT=16'h08A8; // @46:2329 CFG4 \csr_op_wr_data_1_2_0[2] ( .A(csr_op_wr_data_1_sn_N_4), .B(cpu_debug_csr_op_rd_data_net[2]), .C(ex_retr_pipe_exu_result_retr[2]), .D(N_1398_i), .Y(csr_op_wr_data_1_2[2]) ); defparam \csr_op_wr_data_1_2_0[2] .INIT=16'h08A8; // @46:2329 CFG4 \csr_op_wr_data_1_2_0[12] ( .A(csr_op_wr_data_1_sn_N_4), .B(cpu_debug_csr_op_rd_data_net[12]), .C(ex_retr_pipe_exu_result_retr[12]), .D(N_1398_i), .Y(csr_op_wr_data_1_2[12]) ); defparam \csr_op_wr_data_1_2_0[12] .INIT=16'h08A8; // @46:4550 CFG3 \gen_tdata1_2.trigger_match[0] ( .A(un2_trigger_iaddr_match_0_data_tmp[15]), .B(trigger_op_addr_valid_de), .C(tdata1_mcontrol_execute), .Y(trigger_req_de[0]) ); defparam \gen_tdata1_2.trigger_match[0] .INIT=8'h40; // @46:4550 CFG3 \gen_tdata1_2.trigger_match[1] ( .A(tdata2_match_data[6]), .B(un5_trigger_iaddr_match_0_data_tmp[15]), .C(trigger_op_addr_valid_de), .Y(trigger_req_de[1]) ); defparam \gen_tdata1_2.trigger_match[1] .INIT=8'h20; // @46:5144 CFG4 \debug_csr_op_rd_data[7] ( .A(interrupt_captured_timer), .B(un1_u_miv_rv32_csr_decode_0_47), .C(debug_csr_op_rd_data_9_Z[7]), .D(interrupt_could_commit), .Y(cpu_debug_csr_op_rd_data_net[7]) ); defparam \debug_csr_op_rd_data[7] .INIT=16'hF8F0; // @46:2329 CFG4 \csr_op_wr_data_1_2_0[3] ( .A(csr_op_wr_data_1_sn_N_4), .B(cpu_debug_csr_op_rd_data_net[3]), .C(ex_retr_pipe_exu_result_retr[3]), .D(N_1398_i), .Y(csr_op_wr_data_1_2[3]) ); defparam \csr_op_wr_data_1_2_0[3] .INIT=16'h08A8; // @46:3401 CFG3 un46_mtvec_warl_wr_enlto2 ( .A(csr_op_wr_data_1[13]), .B(csr_op_wr_data_1[12]), .C(csr_op_wr_data_1[14]), .Y(un46_mtvec_warl_wr_enlt3) ); defparam un46_mtvec_warl_wr_enlto2.INIT=8'hFE; // @46:4966 CFG3 \gen_debug.trigger_debug_enter_pending6 ( .A(lsu_flush), .B(trigger_req_de[0]), .C(trigger_req_de[1]), .Y(trigger_debug_enter_pending6) ); defparam \gen_debug.trigger_debug_enter_pending6 .INIT=8'hFE; // @46:5707 CFG2 \gen_bit_reset.state_val_12_u[0] ( .A(init_wr_dcsr_step_en), .B(csr_op_wr_data_1[2]), .Y(state_val_12[0]) ); defparam \gen_bit_reset.state_val_12_u[0] .INIT=4'h4; // @46:3396 CFG4 \un3_mtvec_warl_wr_en_11[0] ( .A(csr_op_wr_data_1[31]), .B(csr_op_wr_data_1[20]), .C(csr_op_wr_data_1[25]), .D(csr_op_wr_data_1[29]), .Y(un3_mtvec_warl_wr_en_11_Z[0]) ); defparam \un3_mtvec_warl_wr_en_11[0] .INIT=16'h0002; // @46:3396 CFG4 \un3_mtvec_warl_wr_en_10[0] ( .A(csr_op_wr_data_1[24]), .B(csr_op_wr_data_1[21]), .C(csr_op_wr_data_1[18]), .D(csr_op_wr_data_1[17]), .Y(un3_mtvec_warl_wr_en_10_Z[0]) ); defparam \un3_mtvec_warl_wr_en_10[0] .INIT=16'h0001; // @46:3396 CFG4 \un3_mtvec_warl_wr_en_9[0] ( .A(csr_op_wr_data_1[27]), .B(csr_op_wr_data_1[16]), .C(csr_op_wr_data_1[28]), .D(csr_op_wr_data_1[19]), .Y(un3_mtvec_warl_wr_en_9_Z[0]) ); defparam \un3_mtvec_warl_wr_en_9[0] .INIT=16'h0001; // @46:3396 CFG3 \un3_mtvec_warl_wr_en_8[0] ( .A(mtvec_sw_rd_sel_1), .B(csr_op_wr_data_1[26]), .C(csr_op_wr_data_1[23]), .Y(un3_mtvec_warl_wr_en_8_Z[0]) ); defparam \un3_mtvec_warl_wr_en_8[0] .INIT=8'h02; // @46:4941 CFG4 \gen_debug.step_debug_enter_pending6 ( .A(debug_enter_retr), .B(set_step_debug_enter_pending_0), .C(instr_accepted_ex), .D(de_ex_pipe_implicit_pseudo_instr_ex_2), .Y(step_debug_enter_pending6) ); defparam \gen_debug.step_debug_enter_pending6 .INIT=16'hAAEA; // @46:2329 CFG4 \csr_op_wr_data_1_2_0[7] ( .A(csr_op_wr_data_1_sn_N_4), .B(cpu_debug_csr_op_rd_data_net[7]), .C(ex_retr_pipe_exu_result_retr[7]), .D(N_1398_i), .Y(csr_op_wr_data_1_2[7]) ); defparam \csr_op_wr_data_1_2_0[7] .INIT=16'h08A8; // @46:3396 CFG4 \un3_mtvec_warl_wr_en_15[0] ( .A(un3_mtvec_warl_wr_en_10_Z[0]), .B(un3_mtvec_warl_wr_en_9_Z[0]), .C(csr_op_wr_data_1[15]), .D(un46_mtvec_warl_wr_enlt3), .Y(un3_mtvec_warl_wr_en_15_0) ); defparam \un3_mtvec_warl_wr_en_15[0] .INIT=16'h0888; // @46:3396 CFG4 \un3_mtvec_warl_wr_en_14[0] ( .A(csr_op_wr_data_1[22]), .B(csr_op_wr_data_1[30]), .C(un3_mtvec_warl_wr_en_11_Z[0]), .D(un3_mtvec_warl_wr_en_8_Z[0]), .Y(un3_mtvec_warl_wr_en_14_0) ); defparam \un3_mtvec_warl_wr_en_14[0] .INIT=16'h1000; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_csr_gpr_state_reg_1s_1s_0s_9_4 */ module miv_rv32_csr_gpr_state_reg_32s_1s_18446744071562067968 ( csr_op_wr_data_1, un1_u_miv_rv32_csr_decode_0_1_0, ex_retr_pipe_curr_pc_retr, csr_priv_dpc_retr, debug_enter_retr, implicit_wr_dpc_pc_en, dff, formal_trace_reset_taken, PF_CCC_0_0_OUT0_FABCLK_0 ) ; input [31:0] csr_op_wr_data_1 ; input un1_u_miv_rv32_csr_decode_0_1_0 ; input [31:0] ex_retr_pipe_curr_pc_retr ; output [31:0] csr_priv_dpc_retr ; input debug_enter_retr ; input implicit_wr_dpc_pc_en ; input dff ; input formal_trace_reset_taken ; input PF_CCC_0_0_OUT0_FABCLK_0 ; wire un1_u_miv_rv32_csr_decode_0_1_0 ; wire debug_enter_retr ; wire implicit_wr_dpc_pc_en ; wire dff ; wire formal_trace_reset_taken ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire VCC ; wire N_863 ; wire wr_en_data_or_Z ; wire GND ; wire N_13973_i ; wire N_862 ; wire N_861 ; wire N_860 ; wire N_859 ; wire N_858 ; wire N_857 ; wire N_856 ; wire N_855 ; wire N_854 ; wire N_853 ; wire N_852 ; wire N_851 ; wire N_850 ; wire N_849 ; wire N_848 ; wire N_847 ; wire N_846 ; wire N_845 ; wire N_844 ; wire N_843 ; wire N_842 ; wire N_841 ; wire N_840 ; wire N_839 ; wire N_838 ; wire N_837 ; wire N_836 ; wire N_835 ; wire N_834 ; wire N_833 ; wire N_832 ; wire N_851_2 ; wire N_847_2 ; wire N_855_2 ; wire N_857_2 ; wire N_832_2 ; wire N_853_2 ; wire N_854_2 ; wire N_850_2 ; wire N_856_2 ; wire N_861_2 ; wire N_836_2 ; wire N_859_2 ; wire N_862_2 ; wire N_860_2 ; wire N_852_2 ; wire N_842_2 ; wire N_844_2 ; wire N_858_2 ; wire N_841_2 ; wire N_845_2 ; wire N_863_2 ; wire N_849_2 ; wire N_848_2 ; wire N_843_2 ; wire N_846_2 ; wire N_840_2 ; wire N_839_2 ; wire N_837_2 ; wire N_833_2 ; wire N_834_2 ; wire N_838_2 ; wire N_835_2 ; // @46:5705 SLE \gen_bit_reset.state_val[31] ( .Q(csr_priv_dpc_retr[31]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_863), .EN(wr_en_data_or_Z), .LAT(GND), .SD(VCC), .SLn(N_13973_i) ); // @46:5705 SLE \gen_bit_reset.state_val[30] ( .Q(csr_priv_dpc_retr[30]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_862), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(N_13973_i) ); // @46:5705 SLE \gen_bit_reset.state_val[29] ( .Q(csr_priv_dpc_retr[29]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_861), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(N_13973_i) ); // @46:5705 SLE \gen_bit_reset.state_val[28] ( .Q(csr_priv_dpc_retr[28]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_860), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(N_13973_i) ); // @46:5705 SLE \gen_bit_reset.state_val[27] ( .Q(csr_priv_dpc_retr[27]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_859), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(N_13973_i) ); // @46:5705 SLE \gen_bit_reset.state_val[26] ( .Q(csr_priv_dpc_retr[26]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_858), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(N_13973_i) ); // @46:5705 SLE \gen_bit_reset.state_val[25] ( .Q(csr_priv_dpc_retr[25]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_857), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(N_13973_i) ); // @46:5705 SLE \gen_bit_reset.state_val[24] ( .Q(csr_priv_dpc_retr[24]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_856), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(N_13973_i) ); // @46:5705 SLE \gen_bit_reset.state_val[23] ( .Q(csr_priv_dpc_retr[23]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_855), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(N_13973_i) ); // @46:5705 SLE \gen_bit_reset.state_val[22] ( .Q(csr_priv_dpc_retr[22]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_854), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(N_13973_i) ); // @46:5705 SLE \gen_bit_reset.state_val[21] ( .Q(csr_priv_dpc_retr[21]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_853), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(N_13973_i) ); // @46:5705 SLE \gen_bit_reset.state_val[20] ( .Q(csr_priv_dpc_retr[20]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_852), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(N_13973_i) ); // @46:5705 SLE \gen_bit_reset.state_val[19] ( .Q(csr_priv_dpc_retr[19]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_851), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(N_13973_i) ); // @46:5705 SLE \gen_bit_reset.state_val[18] ( .Q(csr_priv_dpc_retr[18]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_850), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(N_13973_i) ); // @46:5705 SLE \gen_bit_reset.state_val[17] ( .Q(csr_priv_dpc_retr[17]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_849), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(N_13973_i) ); // @46:5705 SLE \gen_bit_reset.state_val[16] ( .Q(csr_priv_dpc_retr[16]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_848), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(N_13973_i) ); // @46:5705 SLE \gen_bit_reset.state_val[15] ( .Q(csr_priv_dpc_retr[15]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_847), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(N_13973_i) ); // @46:5705 SLE \gen_bit_reset.state_val[14] ( .Q(csr_priv_dpc_retr[14]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_846), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(N_13973_i) ); // @46:5705 SLE \gen_bit_reset.state_val[13] ( .Q(csr_priv_dpc_retr[13]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_845), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(N_13973_i) ); // @46:5705 SLE \gen_bit_reset.state_val[12] ( .Q(csr_priv_dpc_retr[12]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_844), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(N_13973_i) ); // @46:5705 SLE \gen_bit_reset.state_val[11] ( .Q(csr_priv_dpc_retr[11]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_843), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(N_13973_i) ); // @46:5705 SLE \gen_bit_reset.state_val[10] ( .Q(csr_priv_dpc_retr[10]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_842), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(N_13973_i) ); // @46:5705 SLE \gen_bit_reset.state_val[9] ( .Q(csr_priv_dpc_retr[9]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_841), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(N_13973_i) ); // @46:5705 SLE \gen_bit_reset.state_val[8] ( .Q(csr_priv_dpc_retr[8]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_840), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(N_13973_i) ); // @46:5705 SLE \gen_bit_reset.state_val[7] ( .Q(csr_priv_dpc_retr[7]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_839), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(N_13973_i) ); // @46:5705 SLE \gen_bit_reset.state_val[6] ( .Q(csr_priv_dpc_retr[6]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_838), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(N_13973_i) ); // @46:5705 SLE \gen_bit_reset.state_val[5] ( .Q(csr_priv_dpc_retr[5]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_837), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(N_13973_i) ); // @46:5705 SLE \gen_bit_reset.state_val[4] ( .Q(csr_priv_dpc_retr[4]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_836), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(N_13973_i) ); // @46:5705 SLE \gen_bit_reset.state_val[3] ( .Q(csr_priv_dpc_retr[3]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_835), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(N_13973_i) ); // @46:5705 SLE \gen_bit_reset.state_val[2] ( .Q(csr_priv_dpc_retr[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_834), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(N_13973_i) ); // @46:5705 SLE \gen_bit_reset.state_val[1] ( .Q(csr_priv_dpc_retr[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_833), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(N_13973_i) ); // @46:5705 SLE \gen_bit_reset.state_val[0] ( .Q(csr_priv_dpc_retr[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_832), .EN(wr_en_data_or_Z), .LAT(GND), .SD(GND), .SLn(N_13973_i) ); CFG2 \gen_bit_reset.state_val_2132_fast ( .A(formal_trace_reset_taken), .B(dff), .Y(N_13973_i) ); defparam \gen_bit_reset.state_val_2132_fast .INIT=4'h4; // @46:5707 CFG4 \gen_bit_reset.state_val_37_0_2[19] ( .A(csr_priv_dpc_retr[19]), .B(ex_retr_pipe_curr_pc_retr[19]), .C(implicit_wr_dpc_pc_en), .D(debug_enter_retr), .Y(N_851_2) ); defparam \gen_bit_reset.state_val_37_0_2[19] .INIT=16'hC0A0; // @46:5707 CFG4 \gen_bit_reset.state_val_37_0_2[15] ( .A(csr_priv_dpc_retr[15]), .B(ex_retr_pipe_curr_pc_retr[15]), .C(implicit_wr_dpc_pc_en), .D(debug_enter_retr), .Y(N_847_2) ); defparam \gen_bit_reset.state_val_37_0_2[15] .INIT=16'hC0A0; // @46:5707 CFG4 \gen_bit_reset.state_val_37_0_2[23] ( .A(csr_priv_dpc_retr[23]), .B(ex_retr_pipe_curr_pc_retr[23]), .C(implicit_wr_dpc_pc_en), .D(debug_enter_retr), .Y(N_855_2) ); defparam \gen_bit_reset.state_val_37_0_2[23] .INIT=16'hC0A0; // @46:5707 CFG4 \gen_bit_reset.state_val_37_0_2[25] ( .A(csr_priv_dpc_retr[25]), .B(ex_retr_pipe_curr_pc_retr[25]), .C(implicit_wr_dpc_pc_en), .D(debug_enter_retr), .Y(N_857_2) ); defparam \gen_bit_reset.state_val_37_0_2[25] .INIT=16'hC0A0; // @46:5707 CFG4 \gen_bit_reset.state_val_37_0_2[0] ( .A(csr_priv_dpc_retr[0]), .B(ex_retr_pipe_curr_pc_retr[0]), .C(implicit_wr_dpc_pc_en), .D(debug_enter_retr), .Y(N_832_2) ); defparam \gen_bit_reset.state_val_37_0_2[0] .INIT=16'hC0A0; // @46:5707 CFG4 \gen_bit_reset.state_val_37_0_2[21] ( .A(csr_priv_dpc_retr[21]), .B(ex_retr_pipe_curr_pc_retr[21]), .C(implicit_wr_dpc_pc_en), .D(debug_enter_retr), .Y(N_853_2) ); defparam \gen_bit_reset.state_val_37_0_2[21] .INIT=16'hC0A0; // @46:5707 CFG4 \gen_bit_reset.state_val_37_0_2[22] ( .A(csr_priv_dpc_retr[22]), .B(ex_retr_pipe_curr_pc_retr[22]), .C(implicit_wr_dpc_pc_en), .D(debug_enter_retr), .Y(N_854_2) ); defparam \gen_bit_reset.state_val_37_0_2[22] .INIT=16'hC0A0; // @46:5707 CFG4 \gen_bit_reset.state_val_37_0_2[18] ( .A(csr_priv_dpc_retr[18]), .B(ex_retr_pipe_curr_pc_retr[18]), .C(implicit_wr_dpc_pc_en), .D(debug_enter_retr), .Y(N_850_2) ); defparam \gen_bit_reset.state_val_37_0_2[18] .INIT=16'hC0A0; // @46:5707 CFG4 \gen_bit_reset.state_val_37_0_2[24] ( .A(csr_priv_dpc_retr[24]), .B(ex_retr_pipe_curr_pc_retr[24]), .C(implicit_wr_dpc_pc_en), .D(debug_enter_retr), .Y(N_856_2) ); defparam \gen_bit_reset.state_val_37_0_2[24] .INIT=16'hC0A0; // @46:5707 CFG4 \gen_bit_reset.state_val_37_0_2[29] ( .A(csr_priv_dpc_retr[29]), .B(ex_retr_pipe_curr_pc_retr[29]), .C(implicit_wr_dpc_pc_en), .D(debug_enter_retr), .Y(N_861_2) ); defparam \gen_bit_reset.state_val_37_0_2[29] .INIT=16'hC0A0; // @46:5707 CFG4 \gen_bit_reset.state_val_37_0_2[4] ( .A(csr_priv_dpc_retr[4]), .B(ex_retr_pipe_curr_pc_retr[4]), .C(implicit_wr_dpc_pc_en), .D(debug_enter_retr), .Y(N_836_2) ); defparam \gen_bit_reset.state_val_37_0_2[4] .INIT=16'hC0A0; // @46:5707 CFG4 \gen_bit_reset.state_val_37_0_2[27] ( .A(csr_priv_dpc_retr[27]), .B(ex_retr_pipe_curr_pc_retr[27]), .C(implicit_wr_dpc_pc_en), .D(debug_enter_retr), .Y(N_859_2) ); defparam \gen_bit_reset.state_val_37_0_2[27] .INIT=16'hC0A0; // @46:5707 CFG4 \gen_bit_reset.state_val_37_0_2[30] ( .A(csr_priv_dpc_retr[30]), .B(ex_retr_pipe_curr_pc_retr[30]), .C(implicit_wr_dpc_pc_en), .D(debug_enter_retr), .Y(N_862_2) ); defparam \gen_bit_reset.state_val_37_0_2[30] .INIT=16'hC0A0; // @46:5707 CFG4 \gen_bit_reset.state_val_37_0_2[28] ( .A(csr_priv_dpc_retr[28]), .B(ex_retr_pipe_curr_pc_retr[28]), .C(implicit_wr_dpc_pc_en), .D(debug_enter_retr), .Y(N_860_2) ); defparam \gen_bit_reset.state_val_37_0_2[28] .INIT=16'hC0A0; // @46:5707 CFG4 \gen_bit_reset.state_val_37_0_2[20] ( .A(csr_priv_dpc_retr[20]), .B(ex_retr_pipe_curr_pc_retr[20]), .C(implicit_wr_dpc_pc_en), .D(debug_enter_retr), .Y(N_852_2) ); defparam \gen_bit_reset.state_val_37_0_2[20] .INIT=16'hC0A0; // @46:5707 CFG4 \gen_bit_reset.state_val_37_0_2[10] ( .A(csr_priv_dpc_retr[10]), .B(ex_retr_pipe_curr_pc_retr[10]), .C(implicit_wr_dpc_pc_en), .D(debug_enter_retr), .Y(N_842_2) ); defparam \gen_bit_reset.state_val_37_0_2[10] .INIT=16'hC0A0; // @46:5707 CFG4 \gen_bit_reset.state_val_37_0_2[12] ( .A(csr_priv_dpc_retr[12]), .B(ex_retr_pipe_curr_pc_retr[12]), .C(implicit_wr_dpc_pc_en), .D(debug_enter_retr), .Y(N_844_2) ); defparam \gen_bit_reset.state_val_37_0_2[12] .INIT=16'hC0A0; // @46:5707 CFG4 \gen_bit_reset.state_val_37_0_2[26] ( .A(csr_priv_dpc_retr[26]), .B(ex_retr_pipe_curr_pc_retr[26]), .C(implicit_wr_dpc_pc_en), .D(debug_enter_retr), .Y(N_858_2) ); defparam \gen_bit_reset.state_val_37_0_2[26] .INIT=16'hC0A0; // @46:5707 CFG4 \gen_bit_reset.state_val_37_0_2[9] ( .A(csr_priv_dpc_retr[9]), .B(ex_retr_pipe_curr_pc_retr[9]), .C(implicit_wr_dpc_pc_en), .D(debug_enter_retr), .Y(N_841_2) ); defparam \gen_bit_reset.state_val_37_0_2[9] .INIT=16'hC0A0; // @46:5707 CFG4 \gen_bit_reset.state_val_37_0_2[13] ( .A(csr_priv_dpc_retr[13]), .B(ex_retr_pipe_curr_pc_retr[13]), .C(implicit_wr_dpc_pc_en), .D(debug_enter_retr), .Y(N_845_2) ); defparam \gen_bit_reset.state_val_37_0_2[13] .INIT=16'hC0A0; // @46:5707 CFG4 \gen_bit_reset.state_val_37_0_2[31] ( .A(csr_priv_dpc_retr[31]), .B(ex_retr_pipe_curr_pc_retr[31]), .C(implicit_wr_dpc_pc_en), .D(debug_enter_retr), .Y(N_863_2) ); defparam \gen_bit_reset.state_val_37_0_2[31] .INIT=16'hC0A0; // @46:5707 CFG4 \gen_bit_reset.state_val_37_0_2[17] ( .A(csr_priv_dpc_retr[17]), .B(ex_retr_pipe_curr_pc_retr[17]), .C(implicit_wr_dpc_pc_en), .D(debug_enter_retr), .Y(N_849_2) ); defparam \gen_bit_reset.state_val_37_0_2[17] .INIT=16'hC0A0; // @46:5707 CFG4 \gen_bit_reset.state_val_37_0_2[16] ( .A(csr_priv_dpc_retr[16]), .B(ex_retr_pipe_curr_pc_retr[16]), .C(implicit_wr_dpc_pc_en), .D(debug_enter_retr), .Y(N_848_2) ); defparam \gen_bit_reset.state_val_37_0_2[16] .INIT=16'hC0A0; // @46:5707 CFG4 \gen_bit_reset.state_val_37_0_2[11] ( .A(csr_priv_dpc_retr[11]), .B(ex_retr_pipe_curr_pc_retr[11]), .C(implicit_wr_dpc_pc_en), .D(debug_enter_retr), .Y(N_843_2) ); defparam \gen_bit_reset.state_val_37_0_2[11] .INIT=16'hC0A0; // @46:5707 CFG4 \gen_bit_reset.state_val_37_0_2[14] ( .A(csr_priv_dpc_retr[14]), .B(ex_retr_pipe_curr_pc_retr[14]), .C(implicit_wr_dpc_pc_en), .D(debug_enter_retr), .Y(N_846_2) ); defparam \gen_bit_reset.state_val_37_0_2[14] .INIT=16'hC0A0; // @46:5707 CFG4 \gen_bit_reset.state_val_37_0_2[8] ( .A(csr_priv_dpc_retr[8]), .B(ex_retr_pipe_curr_pc_retr[8]), .C(implicit_wr_dpc_pc_en), .D(debug_enter_retr), .Y(N_840_2) ); defparam \gen_bit_reset.state_val_37_0_2[8] .INIT=16'hC0A0; // @46:5707 CFG4 \gen_bit_reset.state_val_37_0_2[7] ( .A(csr_priv_dpc_retr[7]), .B(ex_retr_pipe_curr_pc_retr[7]), .C(implicit_wr_dpc_pc_en), .D(debug_enter_retr), .Y(N_839_2) ); defparam \gen_bit_reset.state_val_37_0_2[7] .INIT=16'hC0A0; // @46:5707 CFG4 \gen_bit_reset.state_val_37_0_2[5] ( .A(csr_priv_dpc_retr[5]), .B(ex_retr_pipe_curr_pc_retr[5]), .C(implicit_wr_dpc_pc_en), .D(debug_enter_retr), .Y(N_837_2) ); defparam \gen_bit_reset.state_val_37_0_2[5] .INIT=16'hC0A0; // @46:5707 CFG4 \gen_bit_reset.state_val_37_0_2[1] ( .A(csr_priv_dpc_retr[1]), .B(ex_retr_pipe_curr_pc_retr[1]), .C(implicit_wr_dpc_pc_en), .D(debug_enter_retr), .Y(N_833_2) ); defparam \gen_bit_reset.state_val_37_0_2[1] .INIT=16'hC0A0; // @46:5707 CFG4 \gen_bit_reset.state_val_37_0_2[2] ( .A(csr_priv_dpc_retr[2]), .B(ex_retr_pipe_curr_pc_retr[2]), .C(implicit_wr_dpc_pc_en), .D(debug_enter_retr), .Y(N_834_2) ); defparam \gen_bit_reset.state_val_37_0_2[2] .INIT=16'hC0A0; // @46:5707 CFG4 \gen_bit_reset.state_val_37_0_2[6] ( .A(csr_priv_dpc_retr[6]), .B(ex_retr_pipe_curr_pc_retr[6]), .C(implicit_wr_dpc_pc_en), .D(debug_enter_retr), .Y(N_838_2) ); defparam \gen_bit_reset.state_val_37_0_2[6] .INIT=16'hC0A0; // @46:5707 CFG4 \gen_bit_reset.state_val_37_0_2[3] ( .A(csr_priv_dpc_retr[3]), .B(ex_retr_pipe_curr_pc_retr[3]), .C(implicit_wr_dpc_pc_en), .D(debug_enter_retr), .Y(N_835_2) ); defparam \gen_bit_reset.state_val_37_0_2[3] .INIT=16'hC0A0; // @46:4910 CFG4 wr_en_data_or ( .A(implicit_wr_dpc_pc_en), .B(dff), .C(un1_u_miv_rv32_csr_decode_0_1_0), .D(formal_trace_reset_taken), .Y(wr_en_data_or_Z) ); defparam wr_en_data_or.INIT=16'hFFFB; // @46:5707 CFG3 \gen_bit_reset.state_val_37_0[19] ( .A(csr_op_wr_data_1[19]), .B(implicit_wr_dpc_pc_en), .C(N_851_2), .Y(N_851) ); defparam \gen_bit_reset.state_val_37_0[19] .INIT=8'hF2; // @46:5707 CFG3 \gen_bit_reset.state_val_37_0[15] ( .A(csr_op_wr_data_1[15]), .B(implicit_wr_dpc_pc_en), .C(N_847_2), .Y(N_847) ); defparam \gen_bit_reset.state_val_37_0[15] .INIT=8'hF2; // @46:5707 CFG3 \gen_bit_reset.state_val_37_0[23] ( .A(csr_op_wr_data_1[23]), .B(implicit_wr_dpc_pc_en), .C(N_855_2), .Y(N_855) ); defparam \gen_bit_reset.state_val_37_0[23] .INIT=8'hF2; // @46:5707 CFG3 \gen_bit_reset.state_val_37_0[0] ( .A(csr_op_wr_data_1[0]), .B(implicit_wr_dpc_pc_en), .C(N_832_2), .Y(N_832) ); defparam \gen_bit_reset.state_val_37_0[0] .INIT=8'hF2; // @46:5707 CFG3 \gen_bit_reset.state_val_37_0[21] ( .A(csr_op_wr_data_1[21]), .B(implicit_wr_dpc_pc_en), .C(N_853_2), .Y(N_853) ); defparam \gen_bit_reset.state_val_37_0[21] .INIT=8'hF2; // @46:5707 CFG3 \gen_bit_reset.state_val_37_0[22] ( .A(csr_op_wr_data_1[22]), .B(implicit_wr_dpc_pc_en), .C(N_854_2), .Y(N_854) ); defparam \gen_bit_reset.state_val_37_0[22] .INIT=8'hF2; // @46:5707 CFG3 \gen_bit_reset.state_val_37_0[18] ( .A(csr_op_wr_data_1[18]), .B(implicit_wr_dpc_pc_en), .C(N_850_2), .Y(N_850) ); defparam \gen_bit_reset.state_val_37_0[18] .INIT=8'hF2; // @46:5707 CFG3 \gen_bit_reset.state_val_37_0[4] ( .A(csr_op_wr_data_1[4]), .B(implicit_wr_dpc_pc_en), .C(N_836_2), .Y(N_836) ); defparam \gen_bit_reset.state_val_37_0[4] .INIT=8'hF2; // @46:5707 CFG3 \gen_bit_reset.state_val_37_0[28] ( .A(csr_op_wr_data_1[28]), .B(implicit_wr_dpc_pc_en), .C(N_860_2), .Y(N_860) ); defparam \gen_bit_reset.state_val_37_0[28] .INIT=8'hF2; // @46:5707 CFG3 \gen_bit_reset.state_val_37_0[20] ( .A(csr_op_wr_data_1[20]), .B(implicit_wr_dpc_pc_en), .C(N_852_2), .Y(N_852) ); defparam \gen_bit_reset.state_val_37_0[20] .INIT=8'hF2; // @46:5707 CFG3 \gen_bit_reset.state_val_37_0[10] ( .A(csr_op_wr_data_1[10]), .B(implicit_wr_dpc_pc_en), .C(N_842_2), .Y(N_842) ); defparam \gen_bit_reset.state_val_37_0[10] .INIT=8'hF2; // @46:5707 CFG3 \gen_bit_reset.state_val_37_0[13] ( .A(csr_op_wr_data_1[13]), .B(implicit_wr_dpc_pc_en), .C(N_845_2), .Y(N_845) ); defparam \gen_bit_reset.state_val_37_0[13] .INIT=8'hF2; // @46:5707 CFG3 \gen_bit_reset.state_val_37_0[17] ( .A(csr_op_wr_data_1[17]), .B(implicit_wr_dpc_pc_en), .C(N_849_2), .Y(N_849) ); defparam \gen_bit_reset.state_val_37_0[17] .INIT=8'hF2; // @46:5707 CFG3 \gen_bit_reset.state_val_37_0[11] ( .A(csr_op_wr_data_1[11]), .B(implicit_wr_dpc_pc_en), .C(N_843_2), .Y(N_843) ); defparam \gen_bit_reset.state_val_37_0[11] .INIT=8'hF2; // @46:5707 CFG3 \gen_bit_reset.state_val_37_0[14] ( .A(csr_op_wr_data_1[14]), .B(implicit_wr_dpc_pc_en), .C(N_846_2), .Y(N_846) ); defparam \gen_bit_reset.state_val_37_0[14] .INIT=8'hF2; // @46:5707 CFG3 \gen_bit_reset.state_val_37_0[8] ( .A(csr_op_wr_data_1[8]), .B(implicit_wr_dpc_pc_en), .C(N_840_2), .Y(N_840) ); defparam \gen_bit_reset.state_val_37_0[8] .INIT=8'hF2; // @46:5707 CFG3 \gen_bit_reset.state_val_37_0[25] ( .A(csr_op_wr_data_1[25]), .B(implicit_wr_dpc_pc_en), .C(N_857_2), .Y(N_857) ); defparam \gen_bit_reset.state_val_37_0[25] .INIT=8'hF2; // @46:5707 CFG3 \gen_bit_reset.state_val_37_0[24] ( .A(csr_op_wr_data_1[24]), .B(implicit_wr_dpc_pc_en), .C(N_856_2), .Y(N_856) ); defparam \gen_bit_reset.state_val_37_0[24] .INIT=8'hF2; // @46:5707 CFG3 \gen_bit_reset.state_val_37_0[29] ( .A(csr_op_wr_data_1[29]), .B(implicit_wr_dpc_pc_en), .C(N_861_2), .Y(N_861) ); defparam \gen_bit_reset.state_val_37_0[29] .INIT=8'hF2; // @46:5707 CFG3 \gen_bit_reset.state_val_37_0[27] ( .A(csr_op_wr_data_1[27]), .B(implicit_wr_dpc_pc_en), .C(N_859_2), .Y(N_859) ); defparam \gen_bit_reset.state_val_37_0[27] .INIT=8'hF2; // @46:5707 CFG3 \gen_bit_reset.state_val_37_0[30] ( .A(csr_op_wr_data_1[30]), .B(implicit_wr_dpc_pc_en), .C(N_862_2), .Y(N_862) ); defparam \gen_bit_reset.state_val_37_0[30] .INIT=8'hF2; // @46:5707 CFG3 \gen_bit_reset.state_val_37_0[12] ( .A(csr_op_wr_data_1[12]), .B(implicit_wr_dpc_pc_en), .C(N_844_2), .Y(N_844) ); defparam \gen_bit_reset.state_val_37_0[12] .INIT=8'hF2; // @46:5707 CFG3 \gen_bit_reset.state_val_37_0[26] ( .A(csr_op_wr_data_1[26]), .B(implicit_wr_dpc_pc_en), .C(N_858_2), .Y(N_858) ); defparam \gen_bit_reset.state_val_37_0[26] .INIT=8'hF2; // @46:5707 CFG3 \gen_bit_reset.state_val_37_0[9] ( .A(csr_op_wr_data_1[9]), .B(implicit_wr_dpc_pc_en), .C(N_841_2), .Y(N_841) ); defparam \gen_bit_reset.state_val_37_0[9] .INIT=8'hF2; // @46:5707 CFG3 \gen_bit_reset.state_val_37_0[31] ( .A(csr_op_wr_data_1[31]), .B(implicit_wr_dpc_pc_en), .C(N_863_2), .Y(N_863) ); defparam \gen_bit_reset.state_val_37_0[31] .INIT=8'hF2; // @46:5707 CFG3 \gen_bit_reset.state_val_37_0[16] ( .A(csr_op_wr_data_1[16]), .B(implicit_wr_dpc_pc_en), .C(N_848_2), .Y(N_848) ); defparam \gen_bit_reset.state_val_37_0[16] .INIT=8'hF2; // @46:5707 CFG3 \gen_bit_reset.state_val_37_0[5] ( .A(csr_op_wr_data_1[5]), .B(implicit_wr_dpc_pc_en), .C(N_837_2), .Y(N_837) ); defparam \gen_bit_reset.state_val_37_0[5] .INIT=8'hF2; // @46:5707 CFG3 \gen_bit_reset.state_val_37_0[1] ( .A(csr_op_wr_data_1[1]), .B(implicit_wr_dpc_pc_en), .C(N_833_2), .Y(N_833) ); defparam \gen_bit_reset.state_val_37_0[1] .INIT=8'hF2; // @46:5707 CFG3 \gen_bit_reset.state_val_37_0[2] ( .A(csr_op_wr_data_1[2]), .B(implicit_wr_dpc_pc_en), .C(N_834_2), .Y(N_834) ); defparam \gen_bit_reset.state_val_37_0[2] .INIT=8'hF2; // @46:5707 CFG3 \gen_bit_reset.state_val_37_0[6] ( .A(csr_op_wr_data_1[6]), .B(implicit_wr_dpc_pc_en), .C(N_838_2), .Y(N_838) ); defparam \gen_bit_reset.state_val_37_0[6] .INIT=8'hF2; // @46:5707 CFG3 \gen_bit_reset.state_val_37_0[3] ( .A(csr_op_wr_data_1[3]), .B(implicit_wr_dpc_pc_en), .C(N_835_2), .Y(N_835) ); defparam \gen_bit_reset.state_val_37_0[3] .INIT=8'hF2; // @46:5707 CFG3 \gen_bit_reset.state_val_37_0[7] ( .A(csr_op_wr_data_1[7]), .B(implicit_wr_dpc_pc_en), .C(N_839_2), .Y(N_839) ); defparam \gen_bit_reset.state_val_37_0[7] .INIT=8'hF2; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_csr_gpr_state_reg_32s_1s_18446744071562067968 */ module miv_rv32_csr_privarch_Z15 ( ifu_expipe_resp_ireg_vaddr_net_0, ifu_expipe_resp_ireg_vaddr_net_1, ifu_expipe_resp_ireg_vaddr_net_2, ifu_expipe_resp_ireg_vaddr_net_3, ifu_expipe_resp_ireg_vaddr_net_4, ifu_expipe_resp_ireg_vaddr_net_5, ifu_expipe_resp_ireg_vaddr_net_6, ifu_expipe_resp_ireg_vaddr_net_7, ifu_expipe_resp_ireg_vaddr_net_8, ifu_expipe_resp_ireg_vaddr_net_13, ifu_expipe_resp_ireg_vaddr_net_28, ifu_expipe_resp_ireg_vaddr_net_29, ex_retr_pipe_gpr_wr_mux_sel_retr, mtime_count_out, ex_retr_pipe_sw_csr_wr_op_retr, csr_priv_dpc_retr, trigger_req_de, cpu_debug_csr_op_rd_data_net, csr_priv_mtvec_epc_retr, csr_priv_mtvec_excpt_vec_retr, ex_retr_pipe_sw_csr_addr_retr, req_buff_resp_state_valid, ex_retr_pipe_curr_pc_retr, ex_retr_pipe_exu_result_retr, ex_retr_pipe_curr_instr_enc_retr, ex_retr_pipe_trigger_retr_0, N_306, N_424, N_383, N_381, N_382, N_380, N_378, N_379, N_376, N_377, N_374, N_375, N_372, N_373, N_370, N_371, N_368, N_369, N_298, N_367, debug_enter_req_de, ex_retr_pipe_dbreak_retr, ex_retr_pipe_i_access_mem_error_retr, cpu_debug_halt_req_net, N_1398_i, N_1397_i, exu_csr_op_wr_data14, ex_retr_debug_enter_req_retr, illegal_instr_retr, dbreak_retr, exu_result_valid_retr, sw_csr_op_ready_retr, cpu_debug_resume_req_net, debug_exit_retr, un2_exception_taken, ex_retr_pipe_m_env_call_retr, cpu_debug_halt_ack_net, ex_retr_pipe_wfi_retr, set_wfi_waiting, lsu_expipe_resp_ld_addr_misalign_0, un1_req_resp_state_1_i, lsu_flush, ex_retr_pipe_illegal_instr_retr, un1_instr_completing_retr_c, un1_instr_completing_retr_d, trigger_op_addr_valid_de, instr_accepted_ex, de_ex_pipe_implicit_pseudo_instr_ex_2, bcu_operand1_valid_6_i_a2_0_2, un29_csr_trigger_wr_hzd_de_4, N_1410_2, un29_csr_trigger_wr_hzd_de_1, N_1410_4, ex_retr_pipe_sw_csr_rd_op_retr, cpu_debug_csr_op_rd_data_valid_net, interrupt_could_commit_0, un3_irq_stall_lsu_req, un1_irq_stall_lsu_req, un5_m_timer_irq_cry_63, interrupt_could_commit, lsu_resp_valid40, un6_instr_is_lsu_op_retr, un14_gpr_rs1_stall_lsu, ex_retr_pipe_gpr_wr_en_retr, un1_lsu_resp_valid38_1_i, req_resp_state_valid, lsu_op_complete_retr_0_0_0, debug_enter_retr, un5_m_timer_irq_cry_63_i, gpr_wr_completing_retr_3_0_d, lsu_op_complete_retr_0, gpr_wr_en_retr, un1_lsu_resp_valid, hart_soft_irq_net, un3_instr_inhibit_ex_8, lsu_expipe_resp_str_amo_addr_misalign_net, ex_retr_pipe_trap_ret_retr, machine_implicit_wr_mtval_tval_wr_en, debug_mode_retire_mask_retr, init_wr_dcsr_step_en, stage_state_retr, debug_sys_reset, formal_trace_reset_taken, hart_soft_reset_net, i_access_mem_error_retr, lsu_expipe_resp_access_mem_error_net, un3_instr_inhibit_ex_6, m_env_call_retr, lsu_flush_net_i, wfi_waiting_reg_1z, cpu_debug_active_net, PF_CCC_0_0_OUT0_FABCLK_0, dff, trace_priv_i_i, trace_priv_i ) ; input ifu_expipe_resp_ireg_vaddr_net_0 ; input ifu_expipe_resp_ireg_vaddr_net_1 ; input ifu_expipe_resp_ireg_vaddr_net_2 ; input ifu_expipe_resp_ireg_vaddr_net_3 ; input ifu_expipe_resp_ireg_vaddr_net_4 ; input ifu_expipe_resp_ireg_vaddr_net_5 ; input ifu_expipe_resp_ireg_vaddr_net_6 ; input ifu_expipe_resp_ireg_vaddr_net_7 ; input ifu_expipe_resp_ireg_vaddr_net_8 ; input ifu_expipe_resp_ireg_vaddr_net_13 ; input ifu_expipe_resp_ireg_vaddr_net_28 ; input ifu_expipe_resp_ireg_vaddr_net_29 ; input [1:0] ex_retr_pipe_gpr_wr_mux_sel_retr ; input [63:0] mtime_count_out ; input [1:0] ex_retr_pipe_sw_csr_wr_op_retr ; output [31:0] csr_priv_dpc_retr ; output [1:0] trigger_req_de ; output [31:0] cpu_debug_csr_op_rd_data_net ; output [31:1] csr_priv_mtvec_epc_retr ; output [31:2] csr_priv_mtvec_excpt_vec_retr ; input [11:0] ex_retr_pipe_sw_csr_addr_retr ; input [1:0] req_buff_resp_state_valid ; input [31:0] ex_retr_pipe_curr_pc_retr ; input [31:0] ex_retr_pipe_exu_result_retr ; input [31:0] ex_retr_pipe_curr_instr_enc_retr ; input ex_retr_pipe_trigger_retr_0 ; input N_306 ; input N_424 ; input N_383 ; input N_381 ; input N_382 ; input N_380 ; input N_378 ; input N_379 ; input N_376 ; input N_377 ; input N_374 ; input N_375 ; input N_372 ; input N_373 ; input N_370 ; input N_371 ; input N_368 ; input N_369 ; input N_298 ; input N_367 ; output debug_enter_req_de ; input ex_retr_pipe_dbreak_retr ; input ex_retr_pipe_i_access_mem_error_retr ; input cpu_debug_halt_req_net ; input N_1398_i ; input N_1397_i ; output exu_csr_op_wr_data14 ; input ex_retr_debug_enter_req_retr ; input illegal_instr_retr ; input dbreak_retr ; input exu_result_valid_retr ; output sw_csr_op_ready_retr ; input cpu_debug_resume_req_net ; output debug_exit_retr ; output un2_exception_taken ; input ex_retr_pipe_m_env_call_retr ; output cpu_debug_halt_ack_net ; input ex_retr_pipe_wfi_retr ; output set_wfi_waiting ; input lsu_expipe_resp_ld_addr_misalign_0 ; input un1_req_resp_state_1_i ; input lsu_flush ; input ex_retr_pipe_illegal_instr_retr ; input un1_instr_completing_retr_c ; input un1_instr_completing_retr_d ; input trigger_op_addr_valid_de ; input instr_accepted_ex ; input de_ex_pipe_implicit_pseudo_instr_ex_2 ; input bcu_operand1_valid_6_i_a2_0_2 ; input un29_csr_trigger_wr_hzd_de_4 ; input N_1410_2 ; input un29_csr_trigger_wr_hzd_de_1 ; input N_1410_4 ; input ex_retr_pipe_sw_csr_rd_op_retr ; output cpu_debug_csr_op_rd_data_valid_net ; output interrupt_could_commit_0 ; output un3_irq_stall_lsu_req ; output un1_irq_stall_lsu_req ; input un5_m_timer_irq_cry_63 ; input interrupt_could_commit ; input lsu_resp_valid40 ; input un6_instr_is_lsu_op_retr ; input un14_gpr_rs1_stall_lsu ; input ex_retr_pipe_gpr_wr_en_retr ; input un1_lsu_resp_valid38_1_i ; input req_resp_state_valid ; input lsu_op_complete_retr_0_0_0 ; output debug_enter_retr ; input un5_m_timer_irq_cry_63_i ; input gpr_wr_completing_retr_3_0_d ; input lsu_op_complete_retr_0 ; input gpr_wr_en_retr ; input un1_lsu_resp_valid ; input hart_soft_irq_net ; input un3_instr_inhibit_ex_8 ; input lsu_expipe_resp_str_amo_addr_misalign_net ; input ex_retr_pipe_trap_ret_retr ; output machine_implicit_wr_mtval_tval_wr_en ; output debug_mode_retire_mask_retr ; output init_wr_dcsr_step_en ; input stage_state_retr ; input debug_sys_reset ; output formal_trace_reset_taken ; input hart_soft_reset_net ; input i_access_mem_error_retr ; input lsu_expipe_resp_access_mem_error_net ; input un3_instr_inhibit_ex_6 ; input m_env_call_retr ; input lsu_flush_net_i ; output wfi_waiting_reg_1z ; input cpu_debug_active_net ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input dff ; output trace_priv_i_i ; output trace_priv_i ; wire ifu_expipe_resp_ireg_vaddr_net_0 ; wire ifu_expipe_resp_ireg_vaddr_net_1 ; wire ifu_expipe_resp_ireg_vaddr_net_2 ; wire ifu_expipe_resp_ireg_vaddr_net_3 ; wire ifu_expipe_resp_ireg_vaddr_net_4 ; wire ifu_expipe_resp_ireg_vaddr_net_5 ; wire ifu_expipe_resp_ireg_vaddr_net_6 ; wire ifu_expipe_resp_ireg_vaddr_net_7 ; wire ifu_expipe_resp_ireg_vaddr_net_8 ; wire ifu_expipe_resp_ireg_vaddr_net_13 ; wire ifu_expipe_resp_ireg_vaddr_net_28 ; wire ifu_expipe_resp_ireg_vaddr_net_29 ; wire ex_retr_pipe_trigger_retr_0 ; wire N_306 ; wire N_424 ; wire N_383 ; wire N_381 ; wire N_382 ; wire N_380 ; wire N_378 ; wire N_379 ; wire N_376 ; wire N_377 ; wire N_374 ; wire N_375 ; wire N_372 ; wire N_373 ; wire N_370 ; wire N_371 ; wire N_368 ; wire N_369 ; wire N_298 ; wire N_367 ; wire debug_enter_req_de ; wire ex_retr_pipe_dbreak_retr ; wire ex_retr_pipe_i_access_mem_error_retr ; wire cpu_debug_halt_req_net ; wire N_1398_i ; wire N_1397_i ; wire exu_csr_op_wr_data14 ; wire ex_retr_debug_enter_req_retr ; wire illegal_instr_retr ; wire dbreak_retr ; wire exu_result_valid_retr ; wire sw_csr_op_ready_retr ; wire cpu_debug_resume_req_net ; wire debug_exit_retr ; wire un2_exception_taken ; wire ex_retr_pipe_m_env_call_retr ; wire cpu_debug_halt_ack_net ; wire ex_retr_pipe_wfi_retr ; wire set_wfi_waiting ; wire lsu_expipe_resp_ld_addr_misalign_0 ; wire un1_req_resp_state_1_i ; wire lsu_flush ; wire ex_retr_pipe_illegal_instr_retr ; wire un1_instr_completing_retr_c ; wire un1_instr_completing_retr_d ; wire trigger_op_addr_valid_de ; wire instr_accepted_ex ; wire de_ex_pipe_implicit_pseudo_instr_ex_2 ; wire bcu_operand1_valid_6_i_a2_0_2 ; wire un29_csr_trigger_wr_hzd_de_4 ; wire N_1410_2 ; wire un29_csr_trigger_wr_hzd_de_1 ; wire N_1410_4 ; wire ex_retr_pipe_sw_csr_rd_op_retr ; wire cpu_debug_csr_op_rd_data_valid_net ; wire interrupt_could_commit_0 ; wire un3_irq_stall_lsu_req ; wire un1_irq_stall_lsu_req ; wire un5_m_timer_irq_cry_63 ; wire interrupt_could_commit ; wire lsu_resp_valid40 ; wire un6_instr_is_lsu_op_retr ; wire un14_gpr_rs1_stall_lsu ; wire ex_retr_pipe_gpr_wr_en_retr ; wire un1_lsu_resp_valid38_1_i ; wire req_resp_state_valid ; wire lsu_op_complete_retr_0_0_0 ; wire debug_enter_retr ; wire un5_m_timer_irq_cry_63_i ; wire gpr_wr_completing_retr_3_0_d ; wire lsu_op_complete_retr_0 ; wire gpr_wr_en_retr ; wire un1_lsu_resp_valid ; wire hart_soft_irq_net ; wire un3_instr_inhibit_ex_8 ; wire lsu_expipe_resp_str_amo_addr_misalign_net ; wire ex_retr_pipe_trap_ret_retr ; wire machine_implicit_wr_mtval_tval_wr_en ; wire debug_mode_retire_mask_retr ; wire init_wr_dcsr_step_en ; wire stage_state_retr ; wire debug_sys_reset ; wire formal_trace_reset_taken ; wire hart_soft_reset_net ; wire i_access_mem_error_retr ; wire lsu_expipe_resp_access_mem_error_net ; wire un3_instr_inhibit_ex_6 ; wire m_env_call_retr ; wire lsu_flush_net_i ; wire wfi_waiting_reg_1z ; wire cpu_debug_active_net ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire dff ; wire trace_priv_i_i ; wire trace_priv_i ; wire [1:1] cause_excpt_code_irq; wire [0:0] per_trigger_debug; wire [31:0] machine_implicit_wr_mtval_tval_wr_data_2; wire [31:0] machine_implicit_wr_mtval_tval_wr_data_1_Z; wire [1:1] cause_excpt_code_excpt_m5; wire [1:1] cause_excpt_code_excpt_m2; wire [1:1] cause_excpt_code_excpt_Z; wire [5:5] un1_u_miv_rv32_csr_decode_0_1; wire [65:5] un1_u_miv_rv32_csr_decode_0; wire [8:5] un1_u_miv_rv32_csr_decode_0_2; wire [31:0] csr_op_wr_data_1; wire [1:0] ie_mextsysie; wire [0:0] un3_mtvec_warl_wr_en_14; wire [0:0] un3_mtvec_warl_wr_en_15; wire [4:3] machine_implicit_wr_mcause_excpt_code_wr_data_0; wire [2:0] cause_excpt_code_excpt; wire [4:0] csr_priv_cause_excpt_code; wire [0:0] state_val_or_0; wire [31:0] csr_priv_mtval; wire [31:0] mscratch_scratch; wire [31:0] state_val_33; wire [31:0] tdata2_match_data; wire [31:0] tdata2_match_data_1; wire [2:0] dcsr_cause; wire debug_reset_pending ; wire VCC ; wire debug_reset_pending_2_Z ; wire GND ; wire soft_reset_pending_Z ; wire ram_init_soft_debug_reset_Z ; wire debug_active_retr ; wire debug_active_retr5 ; wire haltreq_debug_enter_pending ; wire debug_enter_retr_i ; wire haltreq_debug_enter_pending6 ; wire debug_exit_retr_i ; wire debug_mode6 ; wire step_debug_enter_pending ; wire step_debug_enter_pending6 ; wire clr_wfi_waiting_i ; wire wfi_waiting_reg6 ; wire trigger_debug_enter_pending ; wire trigger_debug_enter_pending6 ; wire machine_implicit_wr_mtval_tval_wr_data_m0s2_Z ; wire machine_implicit_wr_mtval_tval_wr_datas2_1_Z ; wire machine_implicit_wr_mtval_tval_wr_data_sm1 ; wire un29_trap_val ; wire machine_implicit_wr_status_mpie_wr_en_Z ; wire cause_excpt_code_excpt_sm3 ; wire un11_trap_val ; wire un7_trap_val ; wire un1_excpt_i_access_fault ; wire cause_excpt_code_excpt_ss6 ; wire trigger_debug_enter_taken ; wire step_debug_enter_taken ; wire ebreak_debug_enter_taken ; wire haltreq_debug_enter_taken ; wire interrupt_pending_2 ; wire d_N_3_mux_3 ; wire interrupt_pending_a3_0 ; wire interrupt_captured_timer ; wire interrupt_captured_sw ; wire ie_msie ; wire dcsr_stepie ; wire dcsr_step ; wire status_mie ; wire un1_interrupt_taken_timer_2_i ; wire interrupt_taken_timer ; wire interrupt_taken_sw ; wire ie_mtie ; wire mie_sw_wr_sel ; wire mscratch_sw_wr_sel ; wire mepc_sw_wr_sel_3 ; wire mcause_sw_wr_sel_3 ; wire sw_csr_wr_valid_qual ; wire csr_op_rd_valid ; wire mie_sw_wr_sel_1 ; wire mtval_sw_wr_sel_1 ; wire mepc_sw_rd_sel_1 ; wire mtvec_sw_rd_sel_1 ; wire mcause_sw_rd_sel_1 ; wire mstatus_sw_rd_sel_1 ; wire dcsr_debugger_wr_sel_1 ; wire dcsr_debugger_wr_sel_0 ; wire mip_sw_rd_sel_3 ; wire mepc_sw_rd_sel_3 ; wire dpc_debugger_wr_sel_1 ; wire tdata1_sw_rd_sel_7 ; wire tdata2_sw_rd_sel_7 ; wire mimpid_sw_rd_sel_3 ; wire status_mpie ; wire wr_en_data_or_0 ; wire ie_meie ; wire state_val_2196 ; wire N_6062_i ; wire mcause_interrupt ; wire machine_sw_wr_tdata1_mcontrol_execute_wr_en ; wire tdata1_mcontrol_hit ; wire tdata1_mcontrol_execute ; wire N_15117 ; wire N_15118 ; wire N_15119 ; wire machine_sw_wr_tdata2_match_data_wr_en_0 ; wire wr_en_data_or ; wire dcsr_ebreakm ; wire dcsr_stopcount ; wire dcsr_stoptime ; wire implicit_wr_dcsr_cause_wr_data_1_sm0 ; wire implicit_wr_dcsr_cause_wr_data_1_ss0 ; wire implicit_wr_dpc_pc_en ; CFG1 \gen_debug.debug_mode_RNID1IC5 ( .A(trace_priv_i), .Y(trace_priv_i_i) ); defparam \gen_debug.debug_mode_RNID1IC5 .INIT=2'h1; // @46:4694 SLE \gen_debug.debug_reset_pending ( .Q(debug_reset_pending), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(debug_reset_pending_2_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:2476 SLE soft_reset_pending ( .Q(soft_reset_pending_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ram_init_soft_debug_reset_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:4705 SLE \gen_debug.debug_active_retr ( .Q(debug_active_retr), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_active_net), .EN(debug_active_retr5), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:4987 SLE \gen_debug.haltreq_debug_enter_pending ( .Q(haltreq_debug_enter_pending), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(debug_enter_retr_i), .EN(haltreq_debug_enter_pending6), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5049 SLE \gen_debug.debug_mode ( .Q(trace_priv_i), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(debug_exit_retr_i), .EN(debug_mode6), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:4936 SLE \gen_debug.step_debug_enter_pending ( .Q(step_debug_enter_pending), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(debug_enter_retr_i), .EN(step_debug_enter_pending6), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:5244 SLE wfi_waiting_reg ( .Q(wfi_waiting_reg_1z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(clr_wfi_waiting_i), .EN(wfi_waiting_reg6), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:4961 SLE \gen_debug.trigger_debug_enter_pending ( .Q(trigger_debug_enter_pending), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lsu_flush_net_i), .EN(trigger_debug_enter_pending6), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:2448 CFG4 machine_implicit_wr_mtval_tval_wr_datas2 ( .A(m_env_call_retr), .B(un3_instr_inhibit_ex_6), .C(machine_implicit_wr_mtval_tval_wr_data_m0s2_Z), .D(machine_implicit_wr_mtval_tval_wr_datas2_1_Z), .Y(machine_implicit_wr_mtval_tval_wr_data_sm1) ); defparam machine_implicit_wr_mtval_tval_wr_datas2.INIT=16'hF2FF; // @46:2448 CFG4 machine_implicit_wr_mtval_tval_wr_datas2_1 ( .A(lsu_expipe_resp_access_mem_error_net), .B(i_access_mem_error_retr), .C(un29_trap_val), .D(cause_excpt_code_irq[1]), .Y(machine_implicit_wr_mtval_tval_wr_datas2_1_Z) ); defparam machine_implicit_wr_mtval_tval_wr_datas2_1.INIT=16'h00EF; // @46:2474 CFG4 ram_init_soft_debug_reset ( .A(hart_soft_reset_net), .B(soft_reset_pending_Z), .C(formal_trace_reset_taken), .D(debug_sys_reset), .Y(ram_init_soft_debug_reset_Z) ); defparam ram_init_soft_debug_reset.INIT=16'hFFAE; // @46:4293 CFG3 \gen_tdata1_2.per_trigger_debug[0] ( .A(ex_retr_pipe_trigger_retr_0), .B(stage_state_retr), .C(trace_priv_i), .Y(per_trigger_debug[0]) ); defparam \gen_tdata1_2.per_trigger_debug[0] .INIT=8'h08; // @46:4692 CFG3 debug_reset_pending_2 ( .A(cpu_debug_active_net), .B(init_wr_dcsr_step_en), .C(debug_reset_pending), .Y(debug_reset_pending_2_Z) ); defparam debug_reset_pending_2.INIT=8'h75; // @46:2647 CFG4 machine_implicit_wr_status_mpie_wr_en ( .A(debug_mode_retire_mask_retr), .B(machine_implicit_wr_mtval_tval_wr_en), .C(ex_retr_pipe_trap_ret_retr), .D(stage_state_retr), .Y(machine_implicit_wr_status_mpie_wr_en_Z) ); defparam machine_implicit_wr_status_mpie_wr_en.INIT=16'hDCCC; // @46:2448 CFG4 machine_implicit_wr_mtval_tval_wr_data_m0s2 ( .A(cause_excpt_code_excpt_sm3), .B(lsu_expipe_resp_str_amo_addr_misalign_net), .C(un11_trap_val), .D(un7_trap_val), .Y(machine_implicit_wr_mtval_tval_wr_data_m0s2_Z) ); defparam machine_implicit_wr_mtval_tval_wr_data_m0s2.INIT=16'hFF40; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_m2[31] ( .A(ex_retr_pipe_curr_instr_enc_retr[31]), .B(ex_retr_pipe_exu_result_retr[31]), .C(un7_trap_val), .D(machine_implicit_wr_mtval_tval_wr_data_m0s2_Z), .Y(machine_implicit_wr_mtval_tval_wr_data_2[31]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_m2[31] .INIT=16'hAC00; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_m2[30] ( .A(ex_retr_pipe_curr_instr_enc_retr[30]), .B(ex_retr_pipe_exu_result_retr[30]), .C(un7_trap_val), .D(machine_implicit_wr_mtval_tval_wr_data_m0s2_Z), .Y(machine_implicit_wr_mtval_tval_wr_data_2[30]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_m2[30] .INIT=16'hAC00; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_m2[29] ( .A(ex_retr_pipe_curr_instr_enc_retr[29]), .B(ex_retr_pipe_exu_result_retr[29]), .C(un7_trap_val), .D(machine_implicit_wr_mtval_tval_wr_data_m0s2_Z), .Y(machine_implicit_wr_mtval_tval_wr_data_2[29]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_m2[29] .INIT=16'hAC00; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_m2[28] ( .A(ex_retr_pipe_curr_instr_enc_retr[28]), .B(ex_retr_pipe_exu_result_retr[28]), .C(un7_trap_val), .D(machine_implicit_wr_mtval_tval_wr_data_m0s2_Z), .Y(machine_implicit_wr_mtval_tval_wr_data_2[28]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_m2[28] .INIT=16'hAC00; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_m2[27] ( .A(ex_retr_pipe_curr_instr_enc_retr[27]), .B(ex_retr_pipe_exu_result_retr[27]), .C(un7_trap_val), .D(machine_implicit_wr_mtval_tval_wr_data_m0s2_Z), .Y(machine_implicit_wr_mtval_tval_wr_data_2[27]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_m2[27] .INIT=16'hAC00; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_m2[26] ( .A(ex_retr_pipe_curr_instr_enc_retr[26]), .B(ex_retr_pipe_exu_result_retr[26]), .C(un7_trap_val), .D(machine_implicit_wr_mtval_tval_wr_data_m0s2_Z), .Y(machine_implicit_wr_mtval_tval_wr_data_2[26]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_m2[26] .INIT=16'hAC00; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_m2[25] ( .A(ex_retr_pipe_curr_instr_enc_retr[25]), .B(ex_retr_pipe_exu_result_retr[25]), .C(un7_trap_val), .D(machine_implicit_wr_mtval_tval_wr_data_m0s2_Z), .Y(machine_implicit_wr_mtval_tval_wr_data_2[25]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_m2[25] .INIT=16'hAC00; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_m2[24] ( .A(ex_retr_pipe_curr_instr_enc_retr[24]), .B(ex_retr_pipe_exu_result_retr[24]), .C(un7_trap_val), .D(machine_implicit_wr_mtval_tval_wr_data_m0s2_Z), .Y(machine_implicit_wr_mtval_tval_wr_data_2[24]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_m2[24] .INIT=16'hAC00; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_m2[23] ( .A(ex_retr_pipe_curr_instr_enc_retr[23]), .B(ex_retr_pipe_exu_result_retr[23]), .C(un7_trap_val), .D(machine_implicit_wr_mtval_tval_wr_data_m0s2_Z), .Y(machine_implicit_wr_mtval_tval_wr_data_2[23]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_m2[23] .INIT=16'hAC00; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_m2[22] ( .A(ex_retr_pipe_curr_instr_enc_retr[22]), .B(ex_retr_pipe_exu_result_retr[22]), .C(un7_trap_val), .D(machine_implicit_wr_mtval_tval_wr_data_m0s2_Z), .Y(machine_implicit_wr_mtval_tval_wr_data_2[22]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_m2[22] .INIT=16'hAC00; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_m2[21] ( .A(ex_retr_pipe_curr_instr_enc_retr[21]), .B(ex_retr_pipe_exu_result_retr[21]), .C(un7_trap_val), .D(machine_implicit_wr_mtval_tval_wr_data_m0s2_Z), .Y(machine_implicit_wr_mtval_tval_wr_data_2[21]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_m2[21] .INIT=16'hAC00; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_m2[20] ( .A(ex_retr_pipe_curr_instr_enc_retr[20]), .B(ex_retr_pipe_exu_result_retr[20]), .C(un7_trap_val), .D(machine_implicit_wr_mtval_tval_wr_data_m0s2_Z), .Y(machine_implicit_wr_mtval_tval_wr_data_2[20]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_m2[20] .INIT=16'hAC00; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_m2[19] ( .A(ex_retr_pipe_curr_instr_enc_retr[19]), .B(ex_retr_pipe_exu_result_retr[19]), .C(un7_trap_val), .D(machine_implicit_wr_mtval_tval_wr_data_m0s2_Z), .Y(machine_implicit_wr_mtval_tval_wr_data_2[19]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_m2[19] .INIT=16'hAC00; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_m2[18] ( .A(ex_retr_pipe_curr_instr_enc_retr[18]), .B(ex_retr_pipe_exu_result_retr[18]), .C(un7_trap_val), .D(machine_implicit_wr_mtval_tval_wr_data_m0s2_Z), .Y(machine_implicit_wr_mtval_tval_wr_data_2[18]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_m2[18] .INIT=16'hAC00; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_m2[17] ( .A(ex_retr_pipe_curr_instr_enc_retr[17]), .B(ex_retr_pipe_exu_result_retr[17]), .C(un7_trap_val), .D(machine_implicit_wr_mtval_tval_wr_data_m0s2_Z), .Y(machine_implicit_wr_mtval_tval_wr_data_2[17]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_m2[17] .INIT=16'hAC00; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_m2[16] ( .A(ex_retr_pipe_curr_instr_enc_retr[16]), .B(ex_retr_pipe_exu_result_retr[16]), .C(un7_trap_val), .D(machine_implicit_wr_mtval_tval_wr_data_m0s2_Z), .Y(machine_implicit_wr_mtval_tval_wr_data_2[16]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_m2[16] .INIT=16'hAC00; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_m2[15] ( .A(ex_retr_pipe_curr_instr_enc_retr[15]), .B(ex_retr_pipe_exu_result_retr[15]), .C(un7_trap_val), .D(machine_implicit_wr_mtval_tval_wr_data_m0s2_Z), .Y(machine_implicit_wr_mtval_tval_wr_data_2[15]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_m2[15] .INIT=16'hAC00; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_m2[14] ( .A(ex_retr_pipe_curr_instr_enc_retr[14]), .B(ex_retr_pipe_exu_result_retr[14]), .C(un7_trap_val), .D(machine_implicit_wr_mtval_tval_wr_data_m0s2_Z), .Y(machine_implicit_wr_mtval_tval_wr_data_2[14]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_m2[14] .INIT=16'hAC00; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_m2[13] ( .A(ex_retr_pipe_curr_instr_enc_retr[13]), .B(ex_retr_pipe_exu_result_retr[13]), .C(un7_trap_val), .D(machine_implicit_wr_mtval_tval_wr_data_m0s2_Z), .Y(machine_implicit_wr_mtval_tval_wr_data_2[13]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_m2[13] .INIT=16'hAC00; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_m2[12] ( .A(ex_retr_pipe_curr_instr_enc_retr[12]), .B(ex_retr_pipe_exu_result_retr[12]), .C(un7_trap_val), .D(machine_implicit_wr_mtval_tval_wr_data_m0s2_Z), .Y(machine_implicit_wr_mtval_tval_wr_data_2[12]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_m2[12] .INIT=16'hAC00; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_m2[11] ( .A(ex_retr_pipe_curr_instr_enc_retr[11]), .B(ex_retr_pipe_exu_result_retr[11]), .C(un7_trap_val), .D(machine_implicit_wr_mtval_tval_wr_data_m0s2_Z), .Y(machine_implicit_wr_mtval_tval_wr_data_2[11]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_m2[11] .INIT=16'hAC00; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_m2[10] ( .A(ex_retr_pipe_curr_instr_enc_retr[10]), .B(ex_retr_pipe_exu_result_retr[10]), .C(un7_trap_val), .D(machine_implicit_wr_mtval_tval_wr_data_m0s2_Z), .Y(machine_implicit_wr_mtval_tval_wr_data_2[10]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_m2[10] .INIT=16'hAC00; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_m2[9] ( .A(ex_retr_pipe_curr_instr_enc_retr[9]), .B(ex_retr_pipe_exu_result_retr[9]), .C(un7_trap_val), .D(machine_implicit_wr_mtval_tval_wr_data_m0s2_Z), .Y(machine_implicit_wr_mtval_tval_wr_data_2[9]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_m2[9] .INIT=16'hAC00; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_m2[8] ( .A(ex_retr_pipe_curr_instr_enc_retr[8]), .B(ex_retr_pipe_exu_result_retr[8]), .C(un7_trap_val), .D(machine_implicit_wr_mtval_tval_wr_data_m0s2_Z), .Y(machine_implicit_wr_mtval_tval_wr_data_2[8]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_m2[8] .INIT=16'hAC00; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_m2[7] ( .A(ex_retr_pipe_curr_instr_enc_retr[7]), .B(ex_retr_pipe_exu_result_retr[7]), .C(un7_trap_val), .D(machine_implicit_wr_mtval_tval_wr_data_m0s2_Z), .Y(machine_implicit_wr_mtval_tval_wr_data_2[7]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_m2[7] .INIT=16'hAC00; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_m2[6] ( .A(ex_retr_pipe_curr_instr_enc_retr[6]), .B(ex_retr_pipe_exu_result_retr[6]), .C(un7_trap_val), .D(machine_implicit_wr_mtval_tval_wr_data_m0s2_Z), .Y(machine_implicit_wr_mtval_tval_wr_data_2[6]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_m2[6] .INIT=16'hAC00; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_m2[5] ( .A(ex_retr_pipe_curr_instr_enc_retr[5]), .B(ex_retr_pipe_exu_result_retr[5]), .C(un7_trap_val), .D(machine_implicit_wr_mtval_tval_wr_data_m0s2_Z), .Y(machine_implicit_wr_mtval_tval_wr_data_2[5]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_m2[5] .INIT=16'hAC00; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_m2[4] ( .A(ex_retr_pipe_curr_instr_enc_retr[4]), .B(ex_retr_pipe_exu_result_retr[4]), .C(un7_trap_val), .D(machine_implicit_wr_mtval_tval_wr_data_m0s2_Z), .Y(machine_implicit_wr_mtval_tval_wr_data_2[4]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_m2[4] .INIT=16'hAC00; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_m2[3] ( .A(ex_retr_pipe_curr_instr_enc_retr[3]), .B(ex_retr_pipe_exu_result_retr[3]), .C(un7_trap_val), .D(machine_implicit_wr_mtval_tval_wr_data_m0s2_Z), .Y(machine_implicit_wr_mtval_tval_wr_data_2[3]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_m2[3] .INIT=16'hAC00; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_m2[2] ( .A(ex_retr_pipe_curr_instr_enc_retr[2]), .B(ex_retr_pipe_exu_result_retr[2]), .C(un7_trap_val), .D(machine_implicit_wr_mtval_tval_wr_data_m0s2_Z), .Y(machine_implicit_wr_mtval_tval_wr_data_2[2]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_m2[2] .INIT=16'hAC00; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_m2[1] ( .A(ex_retr_pipe_curr_instr_enc_retr[1]), .B(ex_retr_pipe_exu_result_retr[1]), .C(un7_trap_val), .D(machine_implicit_wr_mtval_tval_wr_data_m0s2_Z), .Y(machine_implicit_wr_mtval_tval_wr_data_2[1]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_m2[1] .INIT=16'hAC00; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_m2[0] ( .A(ex_retr_pipe_curr_instr_enc_retr[0]), .B(ex_retr_pipe_exu_result_retr[0]), .C(un7_trap_val), .D(machine_implicit_wr_mtval_tval_wr_data_m0s2_Z), .Y(machine_implicit_wr_mtval_tval_wr_data_2[0]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_m2[0] .INIT=16'hAC00; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_1[23] ( .A(ex_retr_pipe_curr_pc_retr[23]), .B(ex_retr_pipe_exu_result_retr[23]), .C(un1_excpt_i_access_fault), .D(machine_implicit_wr_mtval_tval_wr_data_sm1), .Y(machine_implicit_wr_mtval_tval_wr_data_1_Z[23]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_1[23] .INIT=16'h00AC; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_1[8] ( .A(ex_retr_pipe_curr_pc_retr[8]), .B(ex_retr_pipe_exu_result_retr[8]), .C(un1_excpt_i_access_fault), .D(machine_implicit_wr_mtval_tval_wr_data_sm1), .Y(machine_implicit_wr_mtval_tval_wr_data_1_Z[8]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_1[8] .INIT=16'h00AC; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_1[19] ( .A(ex_retr_pipe_curr_pc_retr[19]), .B(ex_retr_pipe_exu_result_retr[19]), .C(un1_excpt_i_access_fault), .D(machine_implicit_wr_mtval_tval_wr_data_sm1), .Y(machine_implicit_wr_mtval_tval_wr_data_1_Z[19]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_1[19] .INIT=16'h00AC; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_1[18] ( .A(ex_retr_pipe_curr_pc_retr[18]), .B(ex_retr_pipe_exu_result_retr[18]), .C(un1_excpt_i_access_fault), .D(machine_implicit_wr_mtval_tval_wr_data_sm1), .Y(machine_implicit_wr_mtval_tval_wr_data_1_Z[18]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_1[18] .INIT=16'h00AC; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_1[22] ( .A(ex_retr_pipe_curr_pc_retr[22]), .B(ex_retr_pipe_exu_result_retr[22]), .C(un1_excpt_i_access_fault), .D(machine_implicit_wr_mtval_tval_wr_data_sm1), .Y(machine_implicit_wr_mtval_tval_wr_data_1_Z[22]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_1[22] .INIT=16'h00AC; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_1[17] ( .A(ex_retr_pipe_curr_pc_retr[17]), .B(ex_retr_pipe_exu_result_retr[17]), .C(un1_excpt_i_access_fault), .D(machine_implicit_wr_mtval_tval_wr_data_sm1), .Y(machine_implicit_wr_mtval_tval_wr_data_1_Z[17]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_1[17] .INIT=16'h00AC; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_1[21] ( .A(ex_retr_pipe_curr_pc_retr[21]), .B(ex_retr_pipe_exu_result_retr[21]), .C(un1_excpt_i_access_fault), .D(machine_implicit_wr_mtval_tval_wr_data_sm1), .Y(machine_implicit_wr_mtval_tval_wr_data_1_Z[21]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_1[21] .INIT=16'h00AC; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_1[30] ( .A(ex_retr_pipe_curr_pc_retr[30]), .B(ex_retr_pipe_exu_result_retr[30]), .C(un1_excpt_i_access_fault), .D(machine_implicit_wr_mtval_tval_wr_data_sm1), .Y(machine_implicit_wr_mtval_tval_wr_data_1_Z[30]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_1[30] .INIT=16'h00AC; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_1[25] ( .A(ex_retr_pipe_curr_pc_retr[25]), .B(ex_retr_pipe_exu_result_retr[25]), .C(un1_excpt_i_access_fault), .D(machine_implicit_wr_mtval_tval_wr_data_sm1), .Y(machine_implicit_wr_mtval_tval_wr_data_1_Z[25]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_1[25] .INIT=16'h00AC; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_1[24] ( .A(ex_retr_pipe_curr_pc_retr[24]), .B(ex_retr_pipe_exu_result_retr[24]), .C(un1_excpt_i_access_fault), .D(machine_implicit_wr_mtval_tval_wr_data_sm1), .Y(machine_implicit_wr_mtval_tval_wr_data_1_Z[24]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_1[24] .INIT=16'h00AC; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_1[16] ( .A(ex_retr_pipe_curr_pc_retr[16]), .B(ex_retr_pipe_exu_result_retr[16]), .C(un1_excpt_i_access_fault), .D(machine_implicit_wr_mtval_tval_wr_data_sm1), .Y(machine_implicit_wr_mtval_tval_wr_data_1_Z[16]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_1[16] .INIT=16'h00AC; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_1[6] ( .A(ex_retr_pipe_curr_pc_retr[6]), .B(ex_retr_pipe_exu_result_retr[6]), .C(un1_excpt_i_access_fault), .D(machine_implicit_wr_mtval_tval_wr_data_sm1), .Y(machine_implicit_wr_mtval_tval_wr_data_1_Z[6]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_1[6] .INIT=16'h00AC; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_1[5] ( .A(ex_retr_pipe_curr_pc_retr[5]), .B(ex_retr_pipe_exu_result_retr[5]), .C(un1_excpt_i_access_fault), .D(machine_implicit_wr_mtval_tval_wr_data_sm1), .Y(machine_implicit_wr_mtval_tval_wr_data_1_Z[5]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_1[5] .INIT=16'h00AC; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_1[9] ( .A(ex_retr_pipe_curr_pc_retr[9]), .B(ex_retr_pipe_exu_result_retr[9]), .C(un1_excpt_i_access_fault), .D(machine_implicit_wr_mtval_tval_wr_data_sm1), .Y(machine_implicit_wr_mtval_tval_wr_data_1_Z[9]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_1[9] .INIT=16'h00AC; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_1[20] ( .A(ex_retr_pipe_curr_pc_retr[20]), .B(ex_retr_pipe_exu_result_retr[20]), .C(un1_excpt_i_access_fault), .D(machine_implicit_wr_mtval_tval_wr_data_sm1), .Y(machine_implicit_wr_mtval_tval_wr_data_1_Z[20]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_1[20] .INIT=16'h00AC; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_1[29] ( .A(ex_retr_pipe_curr_pc_retr[29]), .B(ex_retr_pipe_exu_result_retr[29]), .C(un1_excpt_i_access_fault), .D(machine_implicit_wr_mtval_tval_wr_data_sm1), .Y(machine_implicit_wr_mtval_tval_wr_data_1_Z[29]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_1[29] .INIT=16'h00AC; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_1[31] ( .A(ex_retr_pipe_curr_pc_retr[31]), .B(ex_retr_pipe_exu_result_retr[31]), .C(un1_excpt_i_access_fault), .D(machine_implicit_wr_mtval_tval_wr_data_sm1), .Y(machine_implicit_wr_mtval_tval_wr_data_1_Z[31]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_1[31] .INIT=16'h00AC; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_1[1] ( .A(ex_retr_pipe_curr_pc_retr[1]), .B(ex_retr_pipe_exu_result_retr[1]), .C(un1_excpt_i_access_fault), .D(machine_implicit_wr_mtval_tval_wr_data_sm1), .Y(machine_implicit_wr_mtval_tval_wr_data_1_Z[1]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_1[1] .INIT=16'h00AC; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_1[7] ( .A(ex_retr_pipe_curr_pc_retr[7]), .B(ex_retr_pipe_exu_result_retr[7]), .C(un1_excpt_i_access_fault), .D(machine_implicit_wr_mtval_tval_wr_data_sm1), .Y(machine_implicit_wr_mtval_tval_wr_data_1_Z[7]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_1[7] .INIT=16'h00AC; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_1[3] ( .A(ex_retr_pipe_curr_pc_retr[3]), .B(ex_retr_pipe_exu_result_retr[3]), .C(un1_excpt_i_access_fault), .D(machine_implicit_wr_mtval_tval_wr_data_sm1), .Y(machine_implicit_wr_mtval_tval_wr_data_1_Z[3]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_1[3] .INIT=16'h00AC; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_1[10] ( .A(ex_retr_pipe_curr_pc_retr[10]), .B(ex_retr_pipe_exu_result_retr[10]), .C(un1_excpt_i_access_fault), .D(machine_implicit_wr_mtval_tval_wr_data_sm1), .Y(machine_implicit_wr_mtval_tval_wr_data_1_Z[10]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_1[10] .INIT=16'h00AC; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_1[26] ( .A(ex_retr_pipe_curr_pc_retr[26]), .B(ex_retr_pipe_exu_result_retr[26]), .C(un1_excpt_i_access_fault), .D(machine_implicit_wr_mtval_tval_wr_data_sm1), .Y(machine_implicit_wr_mtval_tval_wr_data_1_Z[26]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_1[26] .INIT=16'h00AC; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_1[28] ( .A(ex_retr_pipe_curr_pc_retr[28]), .B(ex_retr_pipe_exu_result_retr[28]), .C(un1_excpt_i_access_fault), .D(machine_implicit_wr_mtval_tval_wr_data_sm1), .Y(machine_implicit_wr_mtval_tval_wr_data_1_Z[28]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_1[28] .INIT=16'h00AC; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_1[0] ( .A(ex_retr_pipe_curr_pc_retr[0]), .B(ex_retr_pipe_exu_result_retr[0]), .C(un1_excpt_i_access_fault), .D(machine_implicit_wr_mtval_tval_wr_data_sm1), .Y(machine_implicit_wr_mtval_tval_wr_data_1_Z[0]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_1[0] .INIT=16'h00AC; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_1[4] ( .A(ex_retr_pipe_curr_pc_retr[4]), .B(ex_retr_pipe_exu_result_retr[4]), .C(un1_excpt_i_access_fault), .D(machine_implicit_wr_mtval_tval_wr_data_sm1), .Y(machine_implicit_wr_mtval_tval_wr_data_1_Z[4]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_1[4] .INIT=16'h00AC; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_1[15] ( .A(ex_retr_pipe_curr_pc_retr[15]), .B(ex_retr_pipe_exu_result_retr[15]), .C(un1_excpt_i_access_fault), .D(machine_implicit_wr_mtval_tval_wr_data_sm1), .Y(machine_implicit_wr_mtval_tval_wr_data_1_Z[15]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_1[15] .INIT=16'h00AC; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_1[12] ( .A(ex_retr_pipe_curr_pc_retr[12]), .B(ex_retr_pipe_exu_result_retr[12]), .C(un1_excpt_i_access_fault), .D(machine_implicit_wr_mtval_tval_wr_data_sm1), .Y(machine_implicit_wr_mtval_tval_wr_data_1_Z[12]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_1[12] .INIT=16'h00AC; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_1[11] ( .A(ex_retr_pipe_curr_pc_retr[11]), .B(ex_retr_pipe_exu_result_retr[11]), .C(un1_excpt_i_access_fault), .D(machine_implicit_wr_mtval_tval_wr_data_sm1), .Y(machine_implicit_wr_mtval_tval_wr_data_1_Z[11]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_1[11] .INIT=16'h00AC; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_1[27] ( .A(ex_retr_pipe_curr_pc_retr[27]), .B(ex_retr_pipe_exu_result_retr[27]), .C(un1_excpt_i_access_fault), .D(machine_implicit_wr_mtval_tval_wr_data_sm1), .Y(machine_implicit_wr_mtval_tval_wr_data_1_Z[27]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_1[27] .INIT=16'h00AC; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_1[2] ( .A(ex_retr_pipe_curr_pc_retr[2]), .B(ex_retr_pipe_exu_result_retr[2]), .C(un1_excpt_i_access_fault), .D(machine_implicit_wr_mtval_tval_wr_data_sm1), .Y(machine_implicit_wr_mtval_tval_wr_data_1_Z[2]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_1[2] .INIT=16'h00AC; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_1[14] ( .A(ex_retr_pipe_curr_pc_retr[14]), .B(ex_retr_pipe_exu_result_retr[14]), .C(un1_excpt_i_access_fault), .D(machine_implicit_wr_mtval_tval_wr_data_sm1), .Y(machine_implicit_wr_mtval_tval_wr_data_1_Z[14]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_1[14] .INIT=16'h00AC; // @46:2448 CFG4 \machine_implicit_wr_mtval_tval_wr_data_1[13] ( .A(ex_retr_pipe_curr_pc_retr[13]), .B(ex_retr_pipe_exu_result_retr[13]), .C(un1_excpt_i_access_fault), .D(machine_implicit_wr_mtval_tval_wr_data_sm1), .Y(machine_implicit_wr_mtval_tval_wr_data_1_Z[13]) ); defparam \machine_implicit_wr_mtval_tval_wr_data_1[13] .INIT=16'h00AC; // @46:2430 CFG4 \cause_excpt_code_excpt[1] ( .A(un3_instr_inhibit_ex_8), .B(cause_excpt_code_excpt_m5[1]), .C(cause_excpt_code_excpt_ss6), .D(cause_excpt_code_excpt_m2[1]), .Y(cause_excpt_code_excpt_Z[1]) ); defparam \cause_excpt_code_excpt[1] .INIT=16'hE5E0; // @46:2380 miv_rv32_priv_irq_2s_0_0 u_miv_rv32_priv_irq_0 ( .req_buff_resp_state_valid(req_buff_resp_state_valid[1:0]), .cause_excpt_code_irq_0(cause_excpt_code_irq[1]), .hart_soft_irq_net(hart_soft_irq_net), .trigger_debug_enter_taken(trigger_debug_enter_taken), .step_debug_enter_taken(step_debug_enter_taken), .ebreak_debug_enter_taken(ebreak_debug_enter_taken), .haltreq_debug_enter_taken(haltreq_debug_enter_taken), .un1_lsu_resp_valid(un1_lsu_resp_valid), .gpr_wr_en_retr(gpr_wr_en_retr), .interrupt_pending_2(interrupt_pending_2), .lsu_op_complete_retr_0(lsu_op_complete_retr_0), .gpr_wr_completing_retr_3_0_d(gpr_wr_completing_retr_3_0_d), .d_N_3_mux_3(d_N_3_mux_3), .interrupt_pending_a3_0(interrupt_pending_a3_0), .dff(dff), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .un5_m_timer_irq_cry_63_i(un5_m_timer_irq_cry_63_i), .debug_enter_retr(debug_enter_retr), .lsu_op_complete_retr_0_0_0(lsu_op_complete_retr_0_0_0), .req_resp_state_valid(req_resp_state_valid), .un1_lsu_resp_valid38_1_i(un1_lsu_resp_valid38_1_i), .ex_retr_pipe_gpr_wr_en_retr(ex_retr_pipe_gpr_wr_en_retr), .un14_gpr_rs1_stall_lsu(un14_gpr_rs1_stall_lsu), .un6_instr_is_lsu_op_retr(un6_instr_is_lsu_op_retr), .lsu_resp_valid40(lsu_resp_valid40), .interrupt_could_commit(interrupt_could_commit), .un5_m_timer_irq_cry_63(un5_m_timer_irq_cry_63), .un1_irq_stall_lsu_req_1z(un1_irq_stall_lsu_req), .interrupt_captured_timer(interrupt_captured_timer), .interrupt_captured_sw(interrupt_captured_sw), .ie_msie(ie_msie), .un3_irq_stall_lsu_req_1z(un3_irq_stall_lsu_req), .dcsr_stepie(dcsr_stepie), .dcsr_step(dcsr_step), .status_mie(status_mie), .interrupt_could_commit_0_1z(interrupt_could_commit_0), .stage_state_retr(stage_state_retr), .un1_interrupt_taken_timer_2_i(un1_interrupt_taken_timer_2_i), .interrupt_taken_timer(interrupt_taken_timer), .interrupt_taken_sw(interrupt_taken_sw), .ie_mtie(ie_mtie), .trace_priv_i(trace_priv_i) ); // @46:2507 miv_rv32_csr_decode_0s_1s_0s u_miv_rv32_csr_decode_0 ( .un1_u_miv_rv32_csr_decode_0_1_0(un1_u_miv_rv32_csr_decode_0_1[5]), .un1_u_miv_rv32_csr_decode_0_60(un1_u_miv_rv32_csr_decode_0[65]), .un1_u_miv_rv32_csr_decode_0_58(un1_u_miv_rv32_csr_decode_0[63]), .un1_u_miv_rv32_csr_decode_0_53(un1_u_miv_rv32_csr_decode_0[58]), .un1_u_miv_rv32_csr_decode_0_47(un1_u_miv_rv32_csr_decode_0[52]), .un1_u_miv_rv32_csr_decode_0_4(un1_u_miv_rv32_csr_decode_0[9]), .un1_u_miv_rv32_csr_decode_0_3(un1_u_miv_rv32_csr_decode_0[8]), .un1_u_miv_rv32_csr_decode_0_1_d0(un1_u_miv_rv32_csr_decode_0[6]), .un1_u_miv_rv32_csr_decode_0_0(un1_u_miv_rv32_csr_decode_0[5]), .un1_u_miv_rv32_csr_decode_0_16(un1_u_miv_rv32_csr_decode_0[21]), .un1_u_miv_rv32_csr_decode_0_15(un1_u_miv_rv32_csr_decode_0[20]), .un1_u_miv_rv32_csr_decode_0_40(un1_u_miv_rv32_csr_decode_0[45]), .un1_u_miv_rv32_csr_decode_0_37(un1_u_miv_rv32_csr_decode_0[42]), .un1_u_miv_rv32_csr_decode_0_41(un1_u_miv_rv32_csr_decode_0[46]), .un1_u_miv_rv32_csr_decode_0_42(un1_u_miv_rv32_csr_decode_0[47]), .un1_u_miv_rv32_csr_decode_0_43(un1_u_miv_rv32_csr_decode_0[48]), .un1_u_miv_rv32_csr_decode_0_50(un1_u_miv_rv32_csr_decode_0[55]), .un1_u_miv_rv32_csr_decode_0_56(un1_u_miv_rv32_csr_decode_0[61]), .un1_u_miv_rv32_csr_decode_0_2_3(un1_u_miv_rv32_csr_decode_0_2[8]), .un1_u_miv_rv32_csr_decode_0_2_0(un1_u_miv_rv32_csr_decode_0_2[5]), .ex_retr_pipe_sw_csr_addr_retr(ex_retr_pipe_sw_csr_addr_retr[11:0]), .mie_sw_wr_sel(mie_sw_wr_sel), .mscratch_sw_wr_sel(mscratch_sw_wr_sel), .mepc_sw_wr_sel_3(mepc_sw_wr_sel_3), .mcause_sw_wr_sel_3(mcause_sw_wr_sel_3), .sw_csr_wr_valid_qual(sw_csr_wr_valid_qual), .cpu_debug_csr_op_rd_data_valid_net(cpu_debug_csr_op_rd_data_valid_net), .csr_op_rd_valid(csr_op_rd_valid), .mie_sw_wr_sel_1(mie_sw_wr_sel_1), .mtval_sw_wr_sel_1(mtval_sw_wr_sel_1), .mepc_sw_rd_sel_1(mepc_sw_rd_sel_1), .mtvec_sw_rd_sel_1(mtvec_sw_rd_sel_1), .mcause_sw_rd_sel_1(mcause_sw_rd_sel_1), .mstatus_sw_rd_sel_1(mstatus_sw_rd_sel_1), .dcsr_debugger_wr_sel_1(dcsr_debugger_wr_sel_1), .dcsr_debugger_wr_sel_0(dcsr_debugger_wr_sel_0), .mip_sw_rd_sel_3(mip_sw_rd_sel_3), .mepc_sw_rd_sel_3(mepc_sw_rd_sel_3), .stage_state_retr(stage_state_retr), .ex_retr_pipe_sw_csr_rd_op_retr(ex_retr_pipe_sw_csr_rd_op_retr), .N_1410_4(N_1410_4), .dpc_debugger_wr_sel_1(dpc_debugger_wr_sel_1), .un29_csr_trigger_wr_hzd_de_1(un29_csr_trigger_wr_hzd_de_1), .N_1410_2(N_1410_2), .trace_priv_i(trace_priv_i), .un29_csr_trigger_wr_hzd_de_4(un29_csr_trigger_wr_hzd_de_4), .bcu_operand1_valid_6_i_a2_0_2(bcu_operand1_valid_6_i_a2_0_2), .tdata1_sw_rd_sel_7(tdata1_sw_rd_sel_7), .tdata2_sw_rd_sel_7(tdata2_sw_rd_sel_7), .mimpid_sw_rd_sel_3(mimpid_sw_rd_sel_3) ); // @46:2658 miv_rv32_csr_gpr_state_reg_1s_1s_0s_12 u_csr_gpr_state_reg_status_mie ( .csr_op_wr_data_1_0(csr_op_wr_data_1[3]), .status_mpie(status_mpie), .machine_implicit_wr_mtval_tval_wr_en(machine_implicit_wr_mtval_tval_wr_en), .wr_en_data_or_0(wr_en_data_or_0), .mstatus_sw_rd_sel_1(mstatus_sw_rd_sel_1), .mcause_sw_wr_sel_3(mcause_sw_wr_sel_3), .machine_implicit_wr_status_mpie_wr_en(machine_implicit_wr_status_mpie_wr_en_Z), .dff(dff), .formal_trace_reset_taken(formal_trace_reset_taken), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .status_mie(status_mie) ); // @46:2691 miv_rv32_csr_gpr_state_reg_1s_0s_0s_5 u_csr_gpr_state_reg_status_mpie ( .csr_op_wr_data_1_0(csr_op_wr_data_1[7]), .ex_retr_pipe_sw_csr_addr_retr_0(ex_retr_pipe_sw_csr_addr_retr[0]), .machine_implicit_wr_mtval_tval_wr_en(machine_implicit_wr_mtval_tval_wr_en), .status_mie(status_mie), .mstatus_sw_rd_sel_1(mstatus_sw_rd_sel_1), .sw_csr_wr_valid_qual(sw_csr_wr_valid_qual), .machine_implicit_wr_status_mpie_wr_en(machine_implicit_wr_status_mpie_wr_en_Z), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .status_mpie(status_mpie) ); // @46:2898 miv_rv32_csr_gpr_state_reg_1s_0s_0s u_csr_gpr_state_reg_ie_msie ( .csr_op_wr_data_1_0(csr_op_wr_data_1[3]), .mie_sw_wr_sel(mie_sw_wr_sel), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .ie_msie(ie_msie) ); // @46:2926 miv_rv32_csr_gpr_state_reg_1s_0s_0s_0 u_csr_gpr_state_reg_ie_mtie ( .csr_op_wr_data_1_0(csr_op_wr_data_1[7]), .mie_sw_wr_sel(mie_sw_wr_sel), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .ie_mtie(ie_mtie) ); // @46:2955 miv_rv32_csr_gpr_state_reg_1s_0s_0s_1 u_csr_gpr_state_reg_ie_meie ( .csr_op_wr_data_1_0(csr_op_wr_data_1[11]), .mie_sw_wr_sel(mie_sw_wr_sel), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .ie_meie(ie_meie) ); // @46:2990 miv_rv32_csr_gpr_state_reg_1s_0s_0s_2 \gen_ext_sys_irq[0].gen_ext_sys_irq_bit.u_csr_gpr_state_reg_ie_mextsysie ( .csr_op_wr_data_1_0(csr_op_wr_data_1[22]), .ie_mextsysie_0(ie_mextsysie[0]), .mie_sw_wr_sel(mie_sw_wr_sel), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0) ); // @46:2990 miv_rv32_csr_gpr_state_reg_1s_0s_0s_3 \gen_ext_sys_irq[1].gen_ext_sys_irq_bit.u_csr_gpr_state_reg_ie_mextsysie ( .csr_op_wr_data_1_0(csr_op_wr_data_1[23]), .ie_mextsysie_0(ie_mextsysie[1]), .mie_sw_wr_sel(mie_sw_wr_sel), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0) ); // @46:3416 miv_rv32_csr_gpr_state_reg_30s_1s_536870913 \gen_mtvec_base_writable.u_csr_gpr_state_reg_mtvec_base ( .un3_mtvec_warl_wr_en_14_0(un3_mtvec_warl_wr_en_14[0]), .un3_mtvec_warl_wr_en_15_0(un3_mtvec_warl_wr_en_15[0]), .csr_op_wr_data_1(csr_op_wr_data_1[31:2]), .csr_priv_mtvec_excpt_vec_retr(csr_priv_mtvec_excpt_vec_retr[31:2]), .mepc_sw_wr_sel_3(mepc_sw_wr_sel_3), .dff(dff), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0) ); // @46:3453 miv_rv32_csr_gpr_state_reg_31s_0s_0s u_csr_gpr_state_reg_mepc_epc ( .ex_retr_pipe_curr_pc_retr(ex_retr_pipe_curr_pc_retr[31:1]), .csr_op_wr_data_1(csr_op_wr_data_1[31:1]), .ex_retr_pipe_sw_csr_addr_retr_0(ex_retr_pipe_sw_csr_addr_retr[1]), .csr_priv_mtvec_epc_retr(csr_priv_mtvec_epc_retr[31:1]), .mepc_sw_rd_sel_1(mepc_sw_rd_sel_1), .sw_csr_wr_valid_qual(sw_csr_wr_valid_qual), .machine_implicit_wr_mtval_tval_wr_en(machine_implicit_wr_mtval_tval_wr_en), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0) ); // @46:3485 miv_rv32_csr_gpr_state_reg_5s_1s_0 u_csr_gpr_state_reg_mcause_excpt_code ( .csr_op_wr_data_1(csr_op_wr_data_1[4:0]), .machine_implicit_wr_mcause_excpt_code_wr_data_0(machine_implicit_wr_mcause_excpt_code_wr_data_0[4:3]), .cause_excpt_code_excpt({cause_excpt_code_excpt[2], cause_excpt_code_excpt_Z[1], cause_excpt_code_excpt[0]}), .cause_excpt_code_irq_0(cause_excpt_code_irq[1]), .csr_priv_cause_excpt_code(csr_priv_cause_excpt_code[4:0]), .state_val_or_0_0(state_val_or_0[0]), .un11_trap_val(un11_trap_val), .un1_interrupt_taken_timer_2_i(un1_interrupt_taken_timer_2_i), .wr_en_data_or_0(wr_en_data_or_0), .mcause_sw_rd_sel_1(mcause_sw_rd_sel_1), .mcause_sw_wr_sel_3(mcause_sw_wr_sel_3), .machine_implicit_wr_mtval_tval_wr_en(machine_implicit_wr_mtval_tval_wr_en), .state_val_2196(state_val_2196), .N_6062_i(N_6062_i), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0) ); // @46:3511 miv_rv32_csr_gpr_state_reg_1s_1s_0s_12_0 u_csr_gpr_state_reg_mcause_interrupt ( .csr_op_wr_data_1_0(csr_op_wr_data_1[31]), .cause_excpt_code_irq_0(cause_excpt_code_irq[1]), .state_val_or_0_0(state_val_or_0[0]), .machine_implicit_wr_mtval_tval_wr_en(machine_implicit_wr_mtval_tval_wr_en), .dff(dff), .formal_trace_reset_taken(formal_trace_reset_taken), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .mcause_interrupt(mcause_interrupt), .N_6062_i(N_6062_i), .state_val_2196(state_val_2196) ); // @46:3541 miv_rv32_csr_gpr_state_reg_32s_0s_0s_1 u_csr_gpr_state_reg_mtval_tval ( .csr_op_wr_data_1(csr_op_wr_data_1[31:0]), .machine_implicit_wr_mtval_tval_wr_data_1(machine_implicit_wr_mtval_tval_wr_data_1_Z[31:0]), .machine_implicit_wr_mtval_tval_wr_data_2(machine_implicit_wr_mtval_tval_wr_data_2[31:0]), .ex_retr_pipe_sw_csr_addr_retr_0(ex_retr_pipe_sw_csr_addr_retr[9]), .csr_priv_mtval(csr_priv_mtval[31:0]), .mtval_sw_wr_sel_1(mtval_sw_wr_sel_1), .sw_csr_wr_valid_qual(sw_csr_wr_valid_qual), .machine_implicit_wr_mtval_tval_wr_en(machine_implicit_wr_mtval_tval_wr_en), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0) ); // @46:3708 miv_rv32_csr_gpr_state_reg_32s_0s_0s_0 u_csr_gpr_state_reg_mscratch_scratch ( .csr_op_wr_data_1(csr_op_wr_data_1[31:0]), .mscratch_scratch(mscratch_scratch[31:0]), .mscratch_sw_wr_sel(mscratch_sw_wr_sel), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0) ); // @46:4310 miv_rv32_csr_gpr_state_reg_1s_1s_0s_7 \gen_tdata1_2.gen_per_trig_tdata1[0].u_tdata1_mcontrol_hit ( .csr_op_wr_data_1_0(csr_op_wr_data_1[20]), .per_trigger_debug_0(per_trigger_debug[0]), .formal_trace_reset_taken(formal_trace_reset_taken), .machine_sw_wr_tdata1_mcontrol_execute_wr_en(machine_sw_wr_tdata1_mcontrol_execute_wr_en), .dff(dff), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .tdata1_mcontrol_hit(tdata1_mcontrol_hit) ); // @46:4468 miv_rv32_csr_gpr_state_reg_1s_1s_0s_9 \gen_tdata1_2.gen_per_trig_tdata1[0].u_tdata1_mcontrol_execute ( .csr_op_wr_data_1_0(csr_op_wr_data_1[6]), .state_val_33_0(state_val_33[6]), .formal_trace_reset_taken(formal_trace_reset_taken), .machine_sw_wr_tdata1_mcontrol_execute_wr_en(machine_sw_wr_tdata1_mcontrol_execute_wr_en), .dff(dff), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .tdata1_mcontrol_execute(tdata1_mcontrol_execute) ); // @46:4468 miv_rv32_csr_gpr_state_reg_1s_1s_0s_5 \gen_tdata1_2.gen_per_trig_tdata1[1].u_tdata1_mcontrol_execute ( .state_val_33_0(state_val_33[6]), .tdata2_match_data_0(tdata2_match_data[6]), .dff(dff), .wr_en_data_or_0(wr_en_data_or_0), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0) ); // @46:4522 miv_rv32_csr_gpr_state_reg_32s_1s_0_1 \gen_tdata1_2.gen_per_trig_tdata1[1].u_tdata2_match_data ( .state_val_33({state_val_33[31:7], N_15117, state_val_33[5:0]}), .tdata2_match_data({tdata2_match_data[31:7], N_15118, tdata2_match_data[5:0]}), .dff(dff), .wr_en_data_or_0(wr_en_data_or_0), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0) ); // @46:4522 miv_rv32_csr_gpr_state_reg_32s_1s_0_0 \gen_tdata1_2.gen_per_trig_tdata1[0].u_tdata2_match_data ( .csr_op_wr_data_1({csr_op_wr_data_1[31:7], N_15119, csr_op_wr_data_1[5:0]}), .un1_u_miv_rv32_csr_decode_0_2_0(un1_u_miv_rv32_csr_decode_0_2[8]), .state_val_33(state_val_33[31:0]), .tdata2_match_data_1(tdata2_match_data_1[31:0]), .machine_sw_wr_tdata2_match_data_wr_en_0(machine_sw_wr_tdata2_match_data_wr_en_0), .mcause_sw_wr_sel_3(mcause_sw_wr_sel_3), .wr_en_data_or_0_1z(wr_en_data_or_0), .formal_trace_reset_taken(formal_trace_reset_taken), .dff(dff), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0) ); // @46:4732 miv_rv32_csr_gpr_state_reg_1s_1s_0s_9_0 \gen_debug.u_csr_gpr_state_reg_dcsr_ebreakm ( .csr_op_wr_data_1_0(csr_op_wr_data_1[15]), .init_wr_dcsr_step_en(init_wr_dcsr_step_en), .sw_csr_wr_valid_qual(sw_csr_wr_valid_qual), .dcsr_debugger_wr_sel_1(dcsr_debugger_wr_sel_1), .dff(dff), .wr_en_data_or_1z(wr_en_data_or), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .dcsr_ebreakm(dcsr_ebreakm) ); // @46:4763 miv_rv32_csr_gpr_state_reg_1s_1s_0s_9_1 \gen_debug.u_csr_gpr_state_reg_dcsr_stepie ( .csr_op_wr_data_1_0(csr_op_wr_data_1[11]), .init_wr_dcsr_step_en(init_wr_dcsr_step_en), .dff(dff), .wr_en_data_or(wr_en_data_or), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .dcsr_stepie(dcsr_stepie) ); // @46:4788 miv_rv32_csr_gpr_state_reg_1s_1s_0s_9_2 \gen_debug.u_csr_gpr_state_reg_dcsr_stopcount ( .csr_op_wr_data_1_0(csr_op_wr_data_1[10]), .init_wr_dcsr_step_en(init_wr_dcsr_step_en), .dff(dff), .wr_en_data_or(wr_en_data_or), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .dcsr_stopcount(dcsr_stopcount) ); // @46:4813 miv_rv32_csr_gpr_state_reg_1s_1s_0s_9_3 \gen_debug.u_csr_gpr_state_reg_dcsr_stoptime ( .csr_op_wr_data_1_0(csr_op_wr_data_1[9]), .init_wr_dcsr_step_en(init_wr_dcsr_step_en), .dff(dff), .wr_en_data_or(wr_en_data_or), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .dcsr_stoptime(dcsr_stoptime) ); // @46:4843 miv_rv32_csr_gpr_state_reg_3s_1s_0s_0 \gen_debug.u_csr_gpr_state_reg_dcsr_cause ( .dcsr_cause(dcsr_cause[2:0]), .implicit_wr_dcsr_cause_wr_data_1_sm0(implicit_wr_dcsr_cause_wr_data_1_sm0), .debug_enter_retr(debug_enter_retr), .implicit_wr_dcsr_cause_wr_data_1_ss0(implicit_wr_dcsr_cause_wr_data_1_ss0), .trigger_debug_enter_taken(trigger_debug_enter_taken), .init_wr_dcsr_step_en(init_wr_dcsr_step_en), .dff(dff), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0) ); // @46:4874 miv_rv32_csr_gpr_state_reg_1s_1s_0s_9_4 \gen_debug.u_csr_gpr_state_reg_dcsr_step ( .un3_mtvec_warl_wr_en_14_0(un3_mtvec_warl_wr_en_14[0]), .un3_mtvec_warl_wr_en_15_0(un3_mtvec_warl_wr_en_15[0]), .cpu_debug_csr_op_rd_data_net(cpu_debug_csr_op_rd_data_net[31:0]), .trigger_req_de(trigger_req_de[1:0]), .cause_excpt_code_excpt_2(cause_excpt_code_excpt[2]), .cause_excpt_code_excpt_0(cause_excpt_code_excpt[0]), .machine_implicit_wr_mcause_excpt_code_wr_data_0(machine_implicit_wr_mcause_excpt_code_wr_data_0[4:3]), .un1_u_miv_rv32_csr_decode_0_2_0(un1_u_miv_rv32_csr_decode_0_2[5]), .un1_u_miv_rv32_csr_decode_0_2_3(un1_u_miv_rv32_csr_decode_0_2[8]), .csr_priv_mtvec_epc_retr(csr_priv_mtvec_epc_retr[31:1]), .csr_priv_cause_excpt_code(csr_priv_cause_excpt_code[4:0]), .csr_priv_mtvec_excpt_vec_retr(csr_priv_mtvec_excpt_vec_retr[31:2]), .csr_priv_mtval(csr_priv_mtval[31:0]), .cause_excpt_code_excpt_m2_0(cause_excpt_code_excpt_m2[1]), .mscratch_scratch(mscratch_scratch[31:0]), .csr_priv_dpc_retr(csr_priv_dpc_retr[31:0]), .ex_retr_pipe_sw_csr_wr_op_retr(ex_retr_pipe_sw_csr_wr_op_retr[1:0]), .mtime_count_out(mtime_count_out[63:0]), .cause_excpt_code_excpt_m5_0(cause_excpt_code_excpt_m5[1]), .un1_u_miv_rv32_csr_decode_0_47(un1_u_miv_rv32_csr_decode_0[52]), .un1_u_miv_rv32_csr_decode_0_42(un1_u_miv_rv32_csr_decode_0[47]), .un1_u_miv_rv32_csr_decode_0_41(un1_u_miv_rv32_csr_decode_0[46]), .un1_u_miv_rv32_csr_decode_0_50(un1_u_miv_rv32_csr_decode_0[55]), .un1_u_miv_rv32_csr_decode_0_37(un1_u_miv_rv32_csr_decode_0[42]), .un1_u_miv_rv32_csr_decode_0_53(un1_u_miv_rv32_csr_decode_0[58]), .un1_u_miv_rv32_csr_decode_0_58(un1_u_miv_rv32_csr_decode_0[63]), .un1_u_miv_rv32_csr_decode_0_16(un1_u_miv_rv32_csr_decode_0[21]), .un1_u_miv_rv32_csr_decode_0_15(un1_u_miv_rv32_csr_decode_0[20]), .un1_u_miv_rv32_csr_decode_0_1(un1_u_miv_rv32_csr_decode_0[6]), .un1_u_miv_rv32_csr_decode_0_0(un1_u_miv_rv32_csr_decode_0[5]), .un1_u_miv_rv32_csr_decode_0_40(un1_u_miv_rv32_csr_decode_0[45]), .un1_u_miv_rv32_csr_decode_0_3(un1_u_miv_rv32_csr_decode_0[8]), .un1_u_miv_rv32_csr_decode_0_56(un1_u_miv_rv32_csr_decode_0[61]), .un1_u_miv_rv32_csr_decode_0_43(un1_u_miv_rv32_csr_decode_0[48]), .un1_u_miv_rv32_csr_decode_0_4(un1_u_miv_rv32_csr_decode_0[9]), .un1_u_miv_rv32_csr_decode_0_60(un1_u_miv_rv32_csr_decode_0[65]), .dcsr_cause(dcsr_cause[2:0]), .ex_retr_pipe_sw_csr_addr_retr_8(ex_retr_pipe_sw_csr_addr_retr[9]), .ex_retr_pipe_sw_csr_addr_retr_0(ex_retr_pipe_sw_csr_addr_retr[1]), .ex_retr_pipe_gpr_wr_mux_sel_retr(ex_retr_pipe_gpr_wr_mux_sel_retr[1:0]), .ie_mextsysie(ie_mextsysie[1:0]), .per_trigger_debug_0(per_trigger_debug[0]), .csr_op_wr_data_1(csr_op_wr_data_1[31:0]), .ex_retr_pipe_exu_result_retr(ex_retr_pipe_exu_result_retr[31:0]), .tdata2_match_data_1(tdata2_match_data_1[31:0]), .tdata2_match_data(tdata2_match_data[31:0]), .ifu_expipe_resp_ireg_vaddr_net_0(ifu_expipe_resp_ireg_vaddr_net_0), .ifu_expipe_resp_ireg_vaddr_net_1(ifu_expipe_resp_ireg_vaddr_net_1), .ifu_expipe_resp_ireg_vaddr_net_2(ifu_expipe_resp_ireg_vaddr_net_2), .ifu_expipe_resp_ireg_vaddr_net_3(ifu_expipe_resp_ireg_vaddr_net_3), .ifu_expipe_resp_ireg_vaddr_net_4(ifu_expipe_resp_ireg_vaddr_net_4), .ifu_expipe_resp_ireg_vaddr_net_5(ifu_expipe_resp_ireg_vaddr_net_5), .ifu_expipe_resp_ireg_vaddr_net_6(ifu_expipe_resp_ireg_vaddr_net_6), .ifu_expipe_resp_ireg_vaddr_net_7(ifu_expipe_resp_ireg_vaddr_net_7), .ifu_expipe_resp_ireg_vaddr_net_8(ifu_expipe_resp_ireg_vaddr_net_8), .ifu_expipe_resp_ireg_vaddr_net_13(ifu_expipe_resp_ireg_vaddr_net_13), .ifu_expipe_resp_ireg_vaddr_net_28(ifu_expipe_resp_ireg_vaddr_net_28), .ifu_expipe_resp_ireg_vaddr_net_29(ifu_expipe_resp_ireg_vaddr_net_29), .step_debug_enter_pending6(step_debug_enter_pending6), .de_ex_pipe_implicit_pseudo_instr_ex_2(de_ex_pipe_implicit_pseudo_instr_ex_2), .instr_accepted_ex(instr_accepted_ex), .trigger_debug_enter_pending6(trigger_debug_enter_pending6), .interrupt_could_commit(interrupt_could_commit), .trigger_op_addr_valid_de(trigger_op_addr_valid_de), .debug_active_retr5(debug_active_retr5), .debug_reset_pending(debug_reset_pending), .un1_instr_completing_retr_d(un1_instr_completing_retr_d), .un1_instr_completing_retr_c(un1_instr_completing_retr_c), .machine_sw_wr_tdata1_mcontrol_execute_wr_en(machine_sw_wr_tdata1_mcontrol_execute_wr_en), .mepc_sw_wr_sel_3(mepc_sw_wr_sel_3), .tdata1_sw_rd_sel_7(tdata1_sw_rd_sel_7), .lsu_op_complete_retr_0(lsu_op_complete_retr_0), .cause_excpt_code_excpt_ss6_1z(cause_excpt_code_excpt_ss6), .un3_instr_inhibit_ex_8(un3_instr_inhibit_ex_8), .ex_retr_pipe_illegal_instr_retr(ex_retr_pipe_illegal_instr_retr), .sw_csr_wr_valid_qual_1z(sw_csr_wr_valid_qual), .tdata1_mcontrol_execute(tdata1_mcontrol_execute), .lsu_flush(lsu_flush), .lsu_expipe_resp_str_amo_addr_misalign_net(lsu_expipe_resp_str_amo_addr_misalign_net), .gpr_wr_completing_retr_3_0_d(gpr_wr_completing_retr_3_0_d), .un1_excpt_i_access_fault_1z(un1_excpt_i_access_fault), .i_access_mem_error_retr(i_access_mem_error_retr), .tdata1_mcontrol_hit(tdata1_mcontrol_hit), .dcsr_stopcount(dcsr_stopcount), .dcsr_stoptime(dcsr_stoptime), .dcsr_stepie(dcsr_stepie), .status_mie(status_mie), .status_mpie(status_mpie), .implicit_wr_dcsr_cause_wr_data_1_ss0(implicit_wr_dcsr_cause_wr_data_1_ss0), .mip_sw_rd_sel_3(mip_sw_rd_sel_3), .mcause_interrupt(mcause_interrupt), .mcause_sw_rd_sel_1(mcause_sw_rd_sel_1), .wfi_waiting_reg6_1z(wfi_waiting_reg6), .dpc_debugger_wr_sel_1(dpc_debugger_wr_sel_1), .mtvec_sw_rd_sel_1(mtvec_sw_rd_sel_1), .mie_sw_wr_sel_1(mie_sw_wr_sel_1), .clr_wfi_waiting_i(clr_wfi_waiting_i), .un29_trap_val(un29_trap_val), .un1_req_resp_state_1_i(un1_req_resp_state_1_i), .lsu_expipe_resp_ld_addr_misalign_0(lsu_expipe_resp_ld_addr_misalign_0), .implicit_wr_dcsr_cause_wr_data_1_sm0(implicit_wr_dcsr_cause_wr_data_1_sm0), .set_wfi_waiting_1z(set_wfi_waiting), .ex_retr_pipe_wfi_retr(ex_retr_pipe_wfi_retr), .debug_mode6(debug_mode6), .cpu_debug_halt_ack_net(cpu_debug_halt_ack_net), .ex_retr_pipe_m_env_call_retr(ex_retr_pipe_m_env_call_retr), .debug_exit_retr_i(debug_exit_retr_i), .cpu_debug_csr_op_rd_data_valid_net(cpu_debug_csr_op_rd_data_valid_net), .req_resp_state_valid(req_resp_state_valid), .un2_exception_taken_1z(un2_exception_taken), .cause_excpt_code_excpt_sm3(cause_excpt_code_excpt_sm3), .m_env_call_retr(m_env_call_retr), .implicit_wr_dpc_pc_en(implicit_wr_dpc_pc_en), .haltreq_debug_enter_pending6(haltreq_debug_enter_pending6), .debug_exit_retr(debug_exit_retr), .init_wr_dcsr_step_en(init_wr_dcsr_step_en), .formal_trace_reset_taken(formal_trace_reset_taken), .cpu_debug_resume_req_net(cpu_debug_resume_req_net), .debug_mode_retire_mask_retr(debug_mode_retire_mask_retr), .sw_csr_op_ready_retr(sw_csr_op_ready_retr), .exu_result_valid_retr(exu_result_valid_retr), .ie_meie(ie_meie), .debug_enter_retr_i(debug_enter_retr_i), .machine_sw_wr_tdata2_match_data_wr_en_0(machine_sw_wr_tdata2_match_data_wr_en_0), .tdata2_sw_rd_sel_7(tdata2_sw_rd_sel_7), .csr_op_rd_valid_1z(csr_op_rd_valid), .ex_retr_pipe_sw_csr_rd_op_retr(ex_retr_pipe_sw_csr_rd_op_retr), .dbreak_retr(dbreak_retr), .un11_trap_val_1z(un11_trap_val), .un3_instr_inhibit_ex_6(un3_instr_inhibit_ex_6), .un7_trap_val_1z(un7_trap_val), .illegal_instr_retr(illegal_instr_retr), .ex_retr_debug_enter_req_retr(ex_retr_debug_enter_req_retr), .haltreq_debug_enter_taken_1z(haltreq_debug_enter_taken), .dcsr_debugger_wr_sel_0(dcsr_debugger_wr_sel_0), .mimpid_sw_rd_sel_3(mimpid_sw_rd_sel_3), .trigger_debug_enter_taken_1z(trigger_debug_enter_taken), .debug_active_retr(debug_active_retr), .dcsr_ebreakm(dcsr_ebreakm), .haltreq_debug_enter_pending(haltreq_debug_enter_pending), .step_debug_enter_pending(step_debug_enter_pending), .trigger_debug_enter_pending(trigger_debug_enter_pending), .step_debug_enter_taken_1z(step_debug_enter_taken), .ebreak_debug_enter_taken_1z(ebreak_debug_enter_taken), .interrupt_captured_sw(interrupt_captured_sw), .interrupt_captured_timer(interrupt_captured_timer), .exu_csr_op_wr_data14_1z(exu_csr_op_wr_data14), .N_1397_i(N_1397_i), .N_1398_i(N_1398_i), .cpu_debug_halt_req_net(cpu_debug_halt_req_net), .ie_mtie(ie_mtie), .ex_retr_pipe_i_access_mem_error_retr(ex_retr_pipe_i_access_mem_error_retr), .ex_retr_pipe_dbreak_retr(ex_retr_pipe_dbreak_retr), .d_N_3_mux_3(d_N_3_mux_3), .un6_instr_is_lsu_op_retr(un6_instr_is_lsu_op_retr), .un1_lsu_resp_valid38_1_i(un1_lsu_resp_valid38_1_i), .lsu_resp_valid40(lsu_resp_valid40), .debug_enter_req_de(debug_enter_req_de), .soft_reset_pending(soft_reset_pending_Z), .ie_msie(ie_msie), .interrupt_pending_a3_0(interrupt_pending_a3_0), .un1_lsu_resp_valid(un1_lsu_resp_valid), .machine_implicit_wr_mtval_tval_wr_en_1z(machine_implicit_wr_mtval_tval_wr_en), .interrupt_taken_timer(interrupt_taken_timer), .interrupt_taken_sw(interrupt_taken_sw), .trace_priv_i(trace_priv_i), .lsu_expipe_resp_access_mem_error_net(lsu_expipe_resp_access_mem_error_net), .stage_state_retr(stage_state_retr), .gpr_wr_en_retr(gpr_wr_en_retr), .un14_gpr_rs1_stall_lsu(un14_gpr_rs1_stall_lsu), .interrupt_pending_2(interrupt_pending_2), .debug_enter_retr(debug_enter_retr), .mepc_sw_rd_sel_3(mepc_sw_rd_sel_3), .mepc_sw_rd_sel_1(mepc_sw_rd_sel_1), .N_367(N_367), .N_298(N_298), .N_369(N_369), .N_368(N_368), .N_371(N_371), .N_370(N_370), .N_373(N_373), .N_372(N_372), .N_375(N_375), .N_374(N_374), .N_377(N_377), .N_376(N_376), .N_379(N_379), .N_378(N_378), .N_380(N_380), .N_382(N_382), .N_381(N_381), .N_383(N_383), .N_424(N_424), .N_306(N_306), .dff(dff), .wr_en_data_or(wr_en_data_or), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .dcsr_step(dcsr_step) ); // @46:4910 miv_rv32_csr_gpr_state_reg_32s_1s_18446744071562067968 \gen_debug.u_csr_gpr_state_reg_dpc_pc ( .csr_op_wr_data_1(csr_op_wr_data_1[31:0]), .un1_u_miv_rv32_csr_decode_0_1_0(un1_u_miv_rv32_csr_decode_0_1[5]), .ex_retr_pipe_curr_pc_retr(ex_retr_pipe_curr_pc_retr[31:0]), .csr_priv_dpc_retr(csr_priv_dpc_retr[31:0]), .debug_enter_retr(debug_enter_retr), .implicit_wr_dpc_pc_en(implicit_wr_dpc_pc_en), .dff(dff), .formal_trace_reset_taken(formal_trace_reset_taken), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_csr_privarch_Z15 */ module miv_rv32_expipe_Z16 ( mtime_count_out, cpu_debug_gpr_op_rd_data_net, exu_alu_operand1_0, exu_alu_operand0_0, cpu_debug_op_wr_data_net, exu_alu_result_iv_8_0_0, cpu_d_req_wr_data_net, req_masked, req_buff_fence_os_0, req_buff_resp_state_valid, req_buff_resp_state_1_, lsu_expipe_req_op_net, cpu_debug_csr_op_addr_net, cpu_debug_gpr_op_addr_net, cpu_d_req_addr_net, lsu_expipe_resp_rd_data_net, cpu_debug_csr_op_rd_data_net, next_req_fetch_ptr_xx_0, next_req_fetch_ptr_yy_0, next_req_fetch_ptr_0, apb_i_req_addr_net, ifu_expipe_resp_ireg_vaddr_net_29, ifu_expipe_resp_ireg_vaddr_net_28, ifu_expipe_resp_ireg_vaddr_net_1, ifu_expipe_resp_ireg_vaddr_net_13, ifu_expipe_resp_ireg_vaddr_net_0, ifu_expipe_resp_ireg_vaddr_net_2, ifu_expipe_resp_ireg_vaddr_net_4, ifu_expipe_resp_ireg_vaddr_net_3, ifu_expipe_resp_ireg_vaddr_net_5, ifu_expipe_resp_ireg_vaddr_net_6, ifu_expipe_resp_ireg_vaddr_net_7, ifu_expipe_resp_ireg_vaddr_net_8, un3_branch_cond_ex, ifu_expipe_resp_ireg_net, cpu_debug_active_net, lsu_expipe_resp_access_mem_error_net, hart_soft_reset_net, debug_sys_reset, init_wr_dcsr_step_en, lsu_expipe_resp_str_amo_addr_misalign_net, hart_soft_irq_net, un5_m_timer_irq_cry_63_i, un5_m_timer_irq_cry_63, cpu_debug_csr_op_rd_data_valid_net, un1_req_resp_state_1_i, lsu_expipe_resp_ld_addr_misalign_0, cpu_debug_halt_ack_net, cpu_debug_resume_req_net, cpu_debug_halt_req_net, gpr_rs2_rd_data_valid_sig, exu_alu_result_int_cry_0_Y, div_finish, exu_result_valid_iv_1_0, exu_result_valid_iv_1, un1_exu_alu_result212_3_i_0, un1_alu_op_sel_int, exu_m1_e_0, N_26_0, exu_m3_0_2, exu_alu_result192_1, exu_m4_0_1, d_m2_e_1_0, exu_m4_1, un128_exu_alu_result_cry_31_RNI01RTHF, exu_alu_result_iv_10_out, un5_N_8, bcu_result_cry_0_Y, cpu_N_6, un11_lsu_resp_ready_d, un8_cpu_i_req_is_tcm0lto18_12_1, cpu_m8_0_a3_0_2, cpu_i_req_is_tcm0_5_0, cpu_m8_0_a3_0_3, cpu_i_req_is_dummy_target, un3_cpu_i_req_ready, un2_cpu_i_req_ready_x, cpu_i_req_is_apb, un1_cpu_i_req_ready_x, cpu_d_resp_valid_d, un11_lsu_resp_ready_1_1, un1_lsu_resp_valid_1, tcm0_i_req_valid_1, tcm0_i_req_ready_net_tz, apb_i_req_ready_net_tz, un1_cpu_i_req_ready, N_127, N_123, N_125, cpu_debug_gpr_op_valid_net, cpu_debug_gpr_wr_en_net, un6_req_buff_load_os, un1_instr_inhibit_ex, ifu_expipe_req_branch_excpt_req_fenci_net, lsu_expipe_req_valid_net, alloc_req_buff_1_1_0, debug_exit_retr, cpu_debug_gpr_rd_en_net, N_14_i, N_8_i, N_10_i, un8_cpu_i_req_is_tcm0lt18, req_resp_state_valid, un1_lsu_resp_valid38_1_i, lsu_resp_valid40, lsu_flush, lsu_expipe_resp_valid_0, un1_lsu_resp_valid, ifu_expipe_req_fenci_proceed_net, ifu_expipe_req_branch_excpt_req_valid_1_0, i_trx_os_buff_ready, N_108, N_194, N_246, lsu_expipe_resp_rd_data_sn_N_9_mux, N_192, N_244, N_188, N_240, N_764, iab_ready, N_64, alloc_req_buff_1_1, cpu_d_req_is_apb, alloc_exception, exu_result_valid_ex, ifu_expipe_req_branch_excpt_req_valid_1_0_0, un5_N_4_0_i, cmp_cond, ifu_expipe_req_branch_excpt_req_valid_net, gen_m3, cpu_i_req_is_tcm0_4_2, un8_cpu_i_req_is_tcm0lt19_12, cpu_m1_e_1, cpu_i_req_is_tcm0_5, un2_cpu_i_req_ready, ifu_expipe_resp_ready_net, N_292, N_424, N_306, N_298, N_377, N_378, N_379, N_383, N_381, N_368, N_372, N_382, N_367, N_369, N_370, N_374, N_376, N_380, N_371, N_375, N_373, un1_ifu_expipe_resp_next_vaddr, cpu_debug_csr_rd_en_net, cpu_debug_csr_wr_en_net, cpu_debug_csr_op_valid_net, trace_priv_i, dealloc_resp_buff_10, dff, stage_state_ex_1z, ifu_expipe_resp_access_mem_error_net, ifu_expipe_resp_access_misalign_error_i_1, N_291_i, N_137_i, N_139_i, N_141_i, N_289_i, N_290_i, N_115_i, N_117_i, N_119_i, N_121_i, N_123_i, N_125_i, N_127_i, N_129_i, N_131_i, N_133_i, PF_CCC_0_0_OUT0_FABCLK_0 ) ; input [63:0] mtime_count_out ; output [31:0] cpu_debug_gpr_op_rd_data_net ; output exu_alu_operand1_0 ; output exu_alu_operand0_0 ; input [31:0] cpu_debug_op_wr_data_net ; output exu_alu_result_iv_8_0_0 ; output [31:0] cpu_d_req_wr_data_net ; input [1:0] req_masked ; input req_buff_fence_os_0 ; input [1:0] req_buff_resp_state_valid ; input [3:0] req_buff_resp_state_1_ ; output [3:0] lsu_expipe_req_op_net ; input [11:0] cpu_debug_csr_op_addr_net ; input [5:0] cpu_debug_gpr_op_addr_net ; output [31:1] cpu_d_req_addr_net ; input [31:0] lsu_expipe_resp_rd_data_net ; output [31:0] cpu_debug_csr_op_rd_data_net ; input next_req_fetch_ptr_xx_0 ; input next_req_fetch_ptr_yy_0 ; input next_req_fetch_ptr_0 ; input [31:2] apb_i_req_addr_net ; input ifu_expipe_resp_ireg_vaddr_net_29 ; input ifu_expipe_resp_ireg_vaddr_net_28 ; input ifu_expipe_resp_ireg_vaddr_net_1 ; input ifu_expipe_resp_ireg_vaddr_net_13 ; input ifu_expipe_resp_ireg_vaddr_net_0 ; input ifu_expipe_resp_ireg_vaddr_net_2 ; input ifu_expipe_resp_ireg_vaddr_net_4 ; input ifu_expipe_resp_ireg_vaddr_net_3 ; input ifu_expipe_resp_ireg_vaddr_net_5 ; input ifu_expipe_resp_ireg_vaddr_net_6 ; input ifu_expipe_resp_ireg_vaddr_net_7 ; input ifu_expipe_resp_ireg_vaddr_net_8 ; output [1:0] un3_branch_cond_ex ; input [31:16] ifu_expipe_resp_ireg_net ; input cpu_debug_active_net ; input lsu_expipe_resp_access_mem_error_net ; input hart_soft_reset_net ; input debug_sys_reset ; output init_wr_dcsr_step_en ; input lsu_expipe_resp_str_amo_addr_misalign_net ; input hart_soft_irq_net ; input un5_m_timer_irq_cry_63_i ; input un5_m_timer_irq_cry_63 ; output cpu_debug_csr_op_rd_data_valid_net ; input un1_req_resp_state_1_i ; input lsu_expipe_resp_ld_addr_misalign_0 ; output cpu_debug_halt_ack_net ; input cpu_debug_resume_req_net ; input cpu_debug_halt_req_net ; output gpr_rs2_rd_data_valid_sig ; output exu_alu_result_int_cry_0_Y ; output div_finish ; output exu_result_valid_iv_1_0 ; output exu_result_valid_iv_1 ; output un1_exu_alu_result212_3_i_0 ; output un1_alu_op_sel_int ; output exu_m1_e_0 ; output N_26_0 ; output exu_m3_0_2 ; output exu_alu_result192_1 ; output exu_m4_0_1 ; input d_m2_e_1_0 ; output exu_m4_1 ; output un128_exu_alu_result_cry_31_RNI01RTHF ; output exu_alu_result_iv_10_out ; input un5_N_8 ; output bcu_result_cry_0_Y ; input cpu_N_6 ; output un11_lsu_resp_ready_d ; input un8_cpu_i_req_is_tcm0lto18_12_1 ; input cpu_m8_0_a3_0_2 ; input cpu_i_req_is_tcm0_5_0 ; input cpu_m8_0_a3_0_3 ; input cpu_i_req_is_dummy_target ; input un3_cpu_i_req_ready ; input un2_cpu_i_req_ready_x ; input cpu_i_req_is_apb ; input un1_cpu_i_req_ready_x ; input cpu_d_resp_valid_d ; output un11_lsu_resp_ready_1_1 ; input un1_lsu_resp_valid_1 ; input tcm0_i_req_valid_1 ; input tcm0_i_req_ready_net_tz ; input apb_i_req_ready_net_tz ; input un1_cpu_i_req_ready ; input N_127 ; input N_123 ; input N_125 ; input cpu_debug_gpr_op_valid_net ; input cpu_debug_gpr_wr_en_net ; input un6_req_buff_load_os ; output un1_instr_inhibit_ex ; output ifu_expipe_req_branch_excpt_req_fenci_net ; output lsu_expipe_req_valid_net ; input alloc_req_buff_1_1_0 ; output debug_exit_retr ; input cpu_debug_gpr_rd_en_net ; output N_14_i ; output N_8_i ; output N_10_i ; output un8_cpu_i_req_is_tcm0lt18 ; input req_resp_state_valid ; input un1_lsu_resp_valid38_1_i ; input lsu_resp_valid40 ; output lsu_flush ; input lsu_expipe_resp_valid_0 ; input un1_lsu_resp_valid ; output ifu_expipe_req_fenci_proceed_net ; output ifu_expipe_req_branch_excpt_req_valid_1_0 ; input i_trx_os_buff_ready ; input N_108 ; input N_194 ; input N_246 ; input lsu_expipe_resp_rd_data_sn_N_9_mux ; input N_192 ; input N_244 ; input N_188 ; input N_240 ; output N_764 ; input iab_ready ; input N_64 ; input alloc_req_buff_1_1 ; input cpu_d_req_is_apb ; input alloc_exception ; output exu_result_valid_ex ; output ifu_expipe_req_branch_excpt_req_valid_1_0_0 ; input un5_N_4_0_i ; output cmp_cond ; output ifu_expipe_req_branch_excpt_req_valid_net ; input gen_m3 ; input cpu_i_req_is_tcm0_4_2 ; input un8_cpu_i_req_is_tcm0lt19_12 ; input cpu_m1_e_1 ; input cpu_i_req_is_tcm0_5 ; input un2_cpu_i_req_ready ; output ifu_expipe_resp_ready_net ; input N_292 ; input N_424 ; input N_306 ; input N_298 ; input N_377 ; input N_378 ; input N_379 ; input N_383 ; input N_381 ; input N_368 ; input N_372 ; input N_382 ; input N_367 ; input N_369 ; input N_370 ; input N_374 ; input N_376 ; input N_380 ; input N_371 ; input N_375 ; input N_373 ; input un1_ifu_expipe_resp_next_vaddr ; input cpu_debug_csr_rd_en_net ; input cpu_debug_csr_wr_en_net ; input cpu_debug_csr_op_valid_net ; output trace_priv_i ; input dealloc_resp_buff_10 ; input dff ; output stage_state_ex_1z ; input ifu_expipe_resp_access_mem_error_net ; input ifu_expipe_resp_access_misalign_error_i_1 ; input N_291_i ; input N_137_i ; input N_139_i ; input N_141_i ; input N_289_i ; input N_290_i ; input N_115_i ; input N_117_i ; input N_119_i ; input N_121_i ; input N_123_i ; input N_125_i ; input N_127_i ; input N_129_i ; input N_131_i ; input N_133_i ; input PF_CCC_0_0_OUT0_FABCLK_0 ; wire exu_alu_operand1_0 ; wire exu_alu_operand0_0 ; wire exu_alu_result_iv_8_0_0 ; wire req_buff_fence_os_0 ; wire next_req_fetch_ptr_xx_0 ; wire next_req_fetch_ptr_yy_0 ; wire next_req_fetch_ptr_0 ; wire ifu_expipe_resp_ireg_vaddr_net_29 ; wire ifu_expipe_resp_ireg_vaddr_net_28 ; wire ifu_expipe_resp_ireg_vaddr_net_1 ; wire ifu_expipe_resp_ireg_vaddr_net_13 ; wire ifu_expipe_resp_ireg_vaddr_net_0 ; wire ifu_expipe_resp_ireg_vaddr_net_2 ; wire ifu_expipe_resp_ireg_vaddr_net_4 ; wire ifu_expipe_resp_ireg_vaddr_net_3 ; wire ifu_expipe_resp_ireg_vaddr_net_5 ; wire ifu_expipe_resp_ireg_vaddr_net_6 ; wire ifu_expipe_resp_ireg_vaddr_net_7 ; wire ifu_expipe_resp_ireg_vaddr_net_8 ; wire cpu_debug_active_net ; wire lsu_expipe_resp_access_mem_error_net ; wire hart_soft_reset_net ; wire debug_sys_reset ; wire init_wr_dcsr_step_en ; wire lsu_expipe_resp_str_amo_addr_misalign_net ; wire hart_soft_irq_net ; wire un5_m_timer_irq_cry_63_i ; wire un5_m_timer_irq_cry_63 ; wire cpu_debug_csr_op_rd_data_valid_net ; wire un1_req_resp_state_1_i ; wire lsu_expipe_resp_ld_addr_misalign_0 ; wire cpu_debug_halt_ack_net ; wire cpu_debug_resume_req_net ; wire cpu_debug_halt_req_net ; wire gpr_rs2_rd_data_valid_sig ; wire exu_alu_result_int_cry_0_Y ; wire div_finish ; wire exu_result_valid_iv_1_0 ; wire exu_result_valid_iv_1 ; wire un1_exu_alu_result212_3_i_0 ; wire un1_alu_op_sel_int ; wire exu_m1_e_0 ; wire N_26_0 ; wire exu_m3_0_2 ; wire exu_alu_result192_1 ; wire exu_m4_0_1 ; wire d_m2_e_1_0 ; wire exu_m4_1 ; wire un128_exu_alu_result_cry_31_RNI01RTHF ; wire exu_alu_result_iv_10_out ; wire un5_N_8 ; wire bcu_result_cry_0_Y ; wire cpu_N_6 ; wire un11_lsu_resp_ready_d ; wire un8_cpu_i_req_is_tcm0lto18_12_1 ; wire cpu_m8_0_a3_0_2 ; wire cpu_i_req_is_tcm0_5_0 ; wire cpu_m8_0_a3_0_3 ; wire cpu_i_req_is_dummy_target ; wire un3_cpu_i_req_ready ; wire un2_cpu_i_req_ready_x ; wire cpu_i_req_is_apb ; wire un1_cpu_i_req_ready_x ; wire cpu_d_resp_valid_d ; wire un11_lsu_resp_ready_1_1 ; wire un1_lsu_resp_valid_1 ; wire tcm0_i_req_valid_1 ; wire tcm0_i_req_ready_net_tz ; wire apb_i_req_ready_net_tz ; wire un1_cpu_i_req_ready ; wire N_127 ; wire N_123 ; wire N_125 ; wire cpu_debug_gpr_op_valid_net ; wire cpu_debug_gpr_wr_en_net ; wire un6_req_buff_load_os ; wire un1_instr_inhibit_ex ; wire ifu_expipe_req_branch_excpt_req_fenci_net ; wire lsu_expipe_req_valid_net ; wire alloc_req_buff_1_1_0 ; wire debug_exit_retr ; wire cpu_debug_gpr_rd_en_net ; wire N_14_i ; wire N_8_i ; wire N_10_i ; wire un8_cpu_i_req_is_tcm0lt18 ; wire req_resp_state_valid ; wire un1_lsu_resp_valid38_1_i ; wire lsu_resp_valid40 ; wire lsu_flush ; wire lsu_expipe_resp_valid_0 ; wire un1_lsu_resp_valid ; wire ifu_expipe_req_fenci_proceed_net ; wire ifu_expipe_req_branch_excpt_req_valid_1_0 ; wire i_trx_os_buff_ready ; wire N_108 ; wire N_194 ; wire N_246 ; wire lsu_expipe_resp_rd_data_sn_N_9_mux ; wire N_192 ; wire N_244 ; wire N_188 ; wire N_240 ; wire N_764 ; wire iab_ready ; wire N_64 ; wire alloc_req_buff_1_1 ; wire cpu_d_req_is_apb ; wire alloc_exception ; wire exu_result_valid_ex ; wire ifu_expipe_req_branch_excpt_req_valid_1_0_0 ; wire un5_N_4_0_i ; wire cmp_cond ; wire ifu_expipe_req_branch_excpt_req_valid_net ; wire gen_m3 ; wire cpu_i_req_is_tcm0_4_2 ; wire un8_cpu_i_req_is_tcm0lt19_12 ; wire cpu_m1_e_1 ; wire cpu_i_req_is_tcm0_5 ; wire un2_cpu_i_req_ready ; wire ifu_expipe_resp_ready_net ; wire N_292 ; wire N_424 ; wire N_306 ; wire N_298 ; wire N_377 ; wire N_378 ; wire N_379 ; wire N_383 ; wire N_381 ; wire N_368 ; wire N_372 ; wire N_382 ; wire N_367 ; wire N_369 ; wire N_370 ; wire N_374 ; wire N_376 ; wire N_380 ; wire N_371 ; wire N_375 ; wire N_373 ; wire un1_ifu_expipe_resp_next_vaddr ; wire cpu_debug_csr_rd_en_net ; wire cpu_debug_csr_wr_en_net ; wire cpu_debug_csr_op_valid_net ; wire trace_priv_i ; wire dealloc_resp_buff_10 ; wire dff ; wire stage_state_ex_1z ; wire ifu_expipe_resp_access_mem_error_net ; wire ifu_expipe_resp_access_misalign_error_i_1 ; wire N_291_i ; wire N_137_i ; wire N_139_i ; wire N_141_i ; wire N_289_i ; wire N_290_i ; wire N_115_i ; wire N_117_i ; wire N_119_i ; wire N_121_i ; wire N_123_i ; wire N_125_i ; wire N_127_i ; wire N_129_i ; wire N_131_i ; wire N_133_i ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire [31:0] de_ex_pipe_curr_instr_enc_ex_Z; wire [1:0] ex_retr_pipe_gpr_wr_mux_sel_retr; wire [0:0] un1_next_stage_state_ex_i; wire [0:0] un1_next_stage_state_retr_i; wire [0:0] de_ex_pipe_bcu_operand0_mux_sel_ex_Z; wire [0:0] bcu_operand0_mux_sel_1_iv_i; wire [0:0] de_ex_pipe_operand0_mux_sel_ex_Z; wire [0:0] operand0_mux_sel_de; wire [31:0] ex_retr_pipe_curr_pc_retr; wire [31:0] ex_retr_pipe_curr_pc_retr_2; wire [4:0] de_ex_pipe_alu_op_sel_ex_Z; wire [4:2] de_ex_pipe_alu_op_sel_ex_RNO_Z; wire [0:0] de_ex_pipe_alu_op_sel_exce_Z; wire [3:0] de_ex_pipe_alu_op_sel_ex_1_Z; wire [3:0] ex_retr_pipe_lsu_op_retr_Z; wire [3:0] ex_retr_pipe_lsu_op_retr_1_Z; wire [0:0] ex_retr_pipe_lsu_op_retrce_Z; wire [3:0] de_ex_pipe_lsu_op_ex_Z; wire [3:0] de_ex_pipe_lsu_op_ex_1_Z; wire [0:0] de_ex_pipe_lsu_op_exce_Z; wire [1:0] de_ex_pipe_branch_cond_ex_Z; wire [1:0] de_ex_pipe_branch_cond_ex_1_Z; wire [0:0] de_ex_pipe_branch_cond_exce_Z; wire [1:0] de_ex_pipe_shifter_unit_op_sel_ex_Z; wire [1:0] de_ex_pipe_shifter_unit_op_sel_ex_1_Z; wire [31:0] de_ex_pipe_immediate_ex_Z; wire [1:0] ex_retr_pipe_sw_csr_wr_op_retr; wire [1:0] ex_retr_pipe_sw_csr_wr_op_retr_2; wire [5:0] ex_retr_pipe_gpr_wr_sel_retr; wire [5:0] ex_retr_pipe_gpr_wr_sel_retr_2; wire [11:0] ex_retr_pipe_sw_csr_addr_retr; wire [11:0] ex_retr_pipe_sw_csr_addr_retr_2; wire [11:0] de_ex_pipe_sw_csr_addr_ex_Z; wire [11:0] sw_csr_addr_de; wire [1:0] de_ex_pipe_sw_csr_wr_op_ex_Z; wire [1:0] sw_csr_wr_op_de; wire [1:0] shifter_operand_sel; wire [1:1] shifter_unit_operand_sel_de; wire [1:1] ex_retr_pipe_gpr_wr_mux_sel_retr_2; wire [1:0] de_ex_pipe_gpr_wr_mux_sel_ex_Z; wire [1:0] gpr_wr_mux_sel_de; wire [4:0] de_ex_pipe_gpr_rs1_rd_sel_ex; wire [4:0] gpr_rs1_rd_sel_de; wire [31:0] de_ex_pipe_curr_pc_ex; wire [31:0] de_ex_pipe_curr_pc_ex_2; wire [31:0] ex_retr_pipe_curr_instr_enc_retr_Z; wire [0:0] ex_retr_pipe_trigger_retr; wire [1:0] de_ex_pipe_trigger_ex; wire [5:0] de_ex_pipe_gpr_rs2_rd_sel_ex; wire [4:0] de_ex_pipe_gpr_rs2_rd_sel_ex_2; wire [1:0] trigger_req_de; wire [3:0] lsu_op_ex_pipe_reg_Z; wire [3:0] lsu_op_de; wire [2:0] de_ex_pipe_bcu_operand1_mux_sel_ex_Z; wire [1:0] bcu_operand1_mux_sel_de; wire [4:0] de_ex_pipe_gpr_wr_sel_ex_Z; wire [4:0] gpr_wr_sel_de; wire [1:0] de_ex_pipe_operand1_mux_sel_ex_Z; wire [1:0] operand1_mux_sel_de; wire [2:0] exu_result_mux_sel; wire [2:0] exu_result_mux_sel_de; wire [31:0] immediate_de; wire [1:1] shifter_unit_places_sel; wire [2:0] shifter_unit_places_sel_de; wire [0:0] de_ex_pipe_shifter_unit_places_sel_ex_Z; wire [4:2] rv32i_dec_alu_op_sel_m_0; wire [2:2] rv32c_dec_alu_op_sel_0; wire [0:0] rv32m_dec_alu_op_sel_m_1; wire [1:1] branch_cond_de; wire [0:0] rv32c_dec_branch_cond_m; wire [0:0] branch_cond_iv_0; wire [1:1] rv32i_dec_shifter_unit_op_sel_m; wire [0:0] rv32m_dec_alu_op_sel_m_0; wire [1:0] alu_op_sel_1_iv_0; wire [1:1] rv32c_dec_alu_op_sel; wire [0:0] rv32i_dec_shifter_unit_op_sel; wire [0:0] rv32c_dec_shifter_unit_op_sel_m; wire [31:0] gpr_wr_data_retr; wire [31:0] ex_retr_pipe_exu_result_retr; wire [1:1] sw_csr_addr_de_1; wire [1:0] shifter_unit_op_sel; wire [31:0] gpr_rs1_rd_data_sig; wire [31:1] csr_priv_mtvec_epc_retr; wire [31:0] csr_priv_dpc_retr; wire [31:2] csr_priv_mtvec_excpt_vec_retr; wire VCC ; wire instr_accepted_ex_2_1_RNISIFQHS3 ; wire GND ; wire N_5927_i ; wire de_ex_pipe_i_access_misalign_error_ex_Z ; wire de_ex_pipe_i_access_mem_error_ex_Z ; wire ex_retr_pipe_gpr_wr_mux_sel_retrc ; wire N_1394_i ; wire trace_priv_i_i ; wire stage_state_retr_Z ; wire instr_accepted_ex ; wire ex_retr_pipe_dbreak_retr_Z ; wire de_ex_pipe_dbreak_ex_Z ; wire instr_accepted_retr_2 ; wire ex_retr_pipe_i_access_mem_error_retr_Z ; wire ex_retr_pipe_i_access_misalign_error_retr_Z ; wire ex_retr_pipe_illegal_instr_retr_Z ; wire un3_instr_inhibit_ex_3 ; wire ex_retr_pipe_m_env_call_retr_Z ; wire de_ex_pipe_m_env_call_ex_Z ; wire ex_retr_pipe_trap_ret_retr_Z ; wire de_ex_pipe_trap_ret_ex_Z ; wire ex_retr_pipe_wfi_retr_Z ; wire de_ex_pipe_wfi_ex_Z ; wire ex_retr_debug_enter_req_retr ; wire de_ex_pipe_debug_enter_req_ex ; wire de_ex_pipe_gpr_rs1_rd_valid_ex ; wire de_ex_pipe_gpr_rs1_rd_valid_ex_2 ; wire de_ex_pipe_gpr_rs1_rd_valid_ex6 ; wire de_ex_pipe_bcu_op_sel_ex_Z ; wire de_ex_pipe_bcu_op_sel_ex_2 ; wire de_ex_pipe_bcu_op_sel_ex7 ; wire stage_state_de_Z ; wire un2_next_stage_state_de ; wire next_stage_state_de_1_sqmuxa_i ; wire de_ex_pipe_gpr_rs2_rd_valid_ex ; wire de_ex_pipe_gpr_rs2_rd_valid_ex_2 ; wire de_ex_pipe_gpr_rs2_rd_valid_ex9 ; wire de_ex_pipe_gpr_rs3_rd_valid_ex ; wire de_ex_pipe_gpr_rs3_rd_valid_ex_2 ; wire de_ex_pipe_gpr_rs3_rd_valid_ex9 ; wire ex_retr_pipe_sw_csr_rd_op_retr ; wire ex_retr_pipe_sw_csr_rd_op_retr_2 ; wire ex_retr_pipe_sw_csr_wr_op_retr18 ; wire dbreak_de ; wire de_ex_pipe_fence_ex_Z ; wire fence_de ; wire de_ex_pipe_fence_i_ex_Z ; wire fence_i_de ; wire de_ex_pipe_illegal_instr_ex_2 ; wire de_ex_pipe_implicit_pseudo_instr_ex_Z ; wire de_ex_pipe_implicit_pseudo_instr_ex_2 ; wire m_env_call_de ; wire de_ex_pipe_trap_ret_ex_2 ; wire wfi_de ; wire debug_enter_req_de ; wire de_ex_pipe_gpr_wr_en_ex_Z ; wire gpr_wr_en_de ; wire de_ex_pipe_sw_csr_rd_op_ex_Z ; wire sw_csr_rd_op_de ; wire ex_retr_pipe_fence_i_retr_Z ; wire ex_retr_pipe_fence_i_retr_2 ; wire ex_retr_pipe_gpr_wr_en_retr ; wire N_12_i ; wire ex_retr_pipe_gpr_wr_en_retr10 ; wire de_ex_pipe_shifter_unit_op_sel_ex7 ; wire N_1387_i ; wire N_1388_i ; wire N_26_i ; wire de_ex_pipe_gpr_rs2_rd_sel_ex5 ; wire soft_reset_taken_retr ; wire N_14072_i ; wire bcu_op_completing_ex ; wire lsu_op_completing_ex_a0 ; wire lsu_op_completing_ex_1_0 ; wire de_ex_pipe_alu_op_sel_ex7_0 ; wire case_dec_gpr_rs2_rd_sel_2_sqmuxa ; wire g1_0 ; wire g2 ; wire g0_0_a3_1_1 ; wire N_566_1 ; wire N_10 ; wire g0_0_a3_0_2 ; wire N_26 ; wire N_6 ; wire case_dec_gpr_rs2_rd_sel_0_sqmuxa ; wire un1_instruction_29_1 ; wire g0_0_a3_2 ; wire un1_gpr_wr_mux_sel_ex_i ; wire N_40 ; wire un3_ex_retr_pipe_sw_csr_wr_op_retr ; wire exu_mux_result34 ; wire un4_ex_retr_pipe_sw_csr_rd_op_retr ; wire ex_retr_pipe_lsu_op_retr9 ; wire un1_ex_retr_pipe_lsu_op_retr_i_0 ; wire un1_ex_retr_pipe_curr_pc_retr ; wire rv32m_dec_mnemonic847 ; wire de_ex_pipe_alu_op_sel_ex7 ; wire de_ex_pipe_lsu_op_ex7 ; wire un1_instruction_27 ; wire N_164 ; wire N_167 ; wire force_debug_nop_de ; wire N_1807 ; wire N_1806 ; wire N_1486 ; wire N_748 ; wire N_98 ; wire N_97 ; wire N_96 ; wire N_95 ; wire N_94 ; wire N_93 ; wire N_92 ; wire N_15110 ; wire N_15111 ; wire N_15112 ; wire N_15113 ; wire N_15114 ; wire N_15115 ; wire exu_update_result_reg ; wire lsu_align_result_valid_0 ; wire exu_shifter_places_valid ; wire lsu_req_addr_valid ; wire gpr_wr_valid_retr ; wire start_m1_e_1 ; wire trigger_op_addr_valid_de ; wire un1_rs2_rd_hzd_4 ; wire interrupt_could_commit ; wire un1_instr_completing_retr_d ; wire interrupt_could_commit_0 ; wire un1_instr_completing_retr_c ; wire gpr_wr_valid_retr_2_0_0 ; wire debug_mode_retire_mask_retr ; wire gpr_rs2_rd_valid_dbgpipe ; wire un1_instr_inhibit_ex_0 ; wire lsu_op_complete_retr_0_0_0 ; wire lsu_flush_net_i ; wire gpr_wr_valid_retr_0 ; wire exu_op_abort_ex ; wire un2_exception_taken ; wire un11_gpr_rs1_stall_exu ; wire un7_gpr_rs1_stall_exu_NE ; wire wfi_waiting_reg ; wire set_wfi_waiting ; wire sw_csr_op_ready_retr ; wire gpr_wr_completing_retr_3_0_d ; wire exu_op_abort_ex_1 ; wire un11_gpr_rs2_stall_exu ; wire un5_instr_inhibit_ex_0 ; wire formal_trace_reset_taken ; wire gpr_wr_valid_retr_1_1 ; wire soft_reset_taken_retr_0 ; wire gpr_wr_valid_retr_1_1_0 ; wire N_6_i ; wire N_4_i ; wire N_1398_i ; wire N_1397_i ; wire gpr_wr_en_retr ; wire ex_retr_pipe_exu_result_valid_retr ; wire gpr_rs2_stall_csr_2_0 ; wire gpr_rs2_stall_csr_2_1 ; wire gpr_rs2_stall_csr_2_2 ; wire un1_instruction_33_i ; wire un3_instr_inhibit_ex_8 ; wire dbreak_retr ; wire un14_gpr_rs1_stall_lsu ; wire trace_exception ; wire i_access_mem_error_retr ; wire m_env_call_retr ; wire un3_instr_inhibit_ex_6 ; wire illegal_instr_retr ; wire un29_csr_trigger_wr_hzd_de_4 ; wire un29_csr_trigger_wr_hzd_de_1 ; wire gpr_rs1_rd_valid_mux ; wire gpr_rs1_rd_valid_mux_0 ; wire d_m5_a0_0 ; wire un1_irq_stall_lsu_req ; wire un3_irq_stall_lsu_req ; wire machine_implicit_wr_mtval_tval_wr_en ; wire debug_enter_retr ; wire gpr_rs2_rd_data_valid_ex ; wire gpr_rs2_rd_data_valid_7 ; wire gpr_N_10_mux_i_0_0 ; wire N_17 ; wire csr_wr_illegal_i_4 ; wire csr_rd_illegal_i_4 ; wire exu_result_valid_retr ; wire lsu_op_complete_retr_0 ; wire exu_csr_op_wr_data14 ; wire un6_instr_is_lsu_op_retr ; wire ex_retr_exu_res_accept_retr_3 ; wire instr_inhibit_ex ; wire un3_bcu_op_sel_ex ; wire N_88 ; wire N_72 ; wire N_84 ; wire N_58 ; wire N_42 ; wire N_15116 ; wire gpr_rs1_rd_data_valid_6 ; wire un1_rs1_rd_hzd_4 ; wire gpr_rs1_rd_data_valid_6_5 ; wire N_1410_4 ; wire N_1410_2 ; wire bcu_operand1_valid_6_i_a2_0_2 ; // @46:8721 SLE \de_ex_pipe_curr_instr_enc_ex[19] ( .Q(de_ex_pipe_curr_instr_enc_ex_Z[19]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ifu_expipe_resp_ireg_net[19]), .EN(instr_accepted_ex_2_1_RNISIFQHS3), .LAT(GND), .SD(GND), .SLn(N_5927_i) ); // @46:8721 SLE \de_ex_pipe_curr_instr_enc_ex[20] ( .Q(de_ex_pipe_curr_instr_enc_ex_Z[20]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ifu_expipe_resp_ireg_net[20]), .EN(instr_accepted_ex_2_1_RNISIFQHS3), .LAT(GND), .SD(GND), .SLn(N_5927_i) ); // @46:8721 SLE \de_ex_pipe_curr_instr_enc_ex[21] ( .Q(de_ex_pipe_curr_instr_enc_ex_Z[21]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ifu_expipe_resp_ireg_net[21]), .EN(instr_accepted_ex_2_1_RNISIFQHS3), .LAT(GND), .SD(GND), .SLn(N_5927_i) ); // @46:8721 SLE \de_ex_pipe_curr_instr_enc_ex[22] ( .Q(de_ex_pipe_curr_instr_enc_ex_Z[22]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ifu_expipe_resp_ireg_net[22]), .EN(instr_accepted_ex_2_1_RNISIFQHS3), .LAT(GND), .SD(GND), .SLn(N_5927_i) ); // @46:8721 SLE \de_ex_pipe_curr_instr_enc_ex[23] ( .Q(de_ex_pipe_curr_instr_enc_ex_Z[23]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ifu_expipe_resp_ireg_net[23]), .EN(instr_accepted_ex_2_1_RNISIFQHS3), .LAT(GND), .SD(GND), .SLn(N_5927_i) ); // @46:8721 SLE \de_ex_pipe_curr_instr_enc_ex[24] ( .Q(de_ex_pipe_curr_instr_enc_ex_Z[24]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ifu_expipe_resp_ireg_net[24]), .EN(instr_accepted_ex_2_1_RNISIFQHS3), .LAT(GND), .SD(GND), .SLn(N_5927_i) ); // @46:8721 SLE \de_ex_pipe_curr_instr_enc_ex[25] ( .Q(de_ex_pipe_curr_instr_enc_ex_Z[25]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ifu_expipe_resp_ireg_net[25]), .EN(instr_accepted_ex_2_1_RNISIFQHS3), .LAT(GND), .SD(GND), .SLn(N_5927_i) ); // @46:8721 SLE \de_ex_pipe_curr_instr_enc_ex[26] ( .Q(de_ex_pipe_curr_instr_enc_ex_Z[26]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ifu_expipe_resp_ireg_net[26]), .EN(instr_accepted_ex_2_1_RNISIFQHS3), .LAT(GND), .SD(GND), .SLn(N_5927_i) ); // @46:8721 SLE \de_ex_pipe_curr_instr_enc_ex[27] ( .Q(de_ex_pipe_curr_instr_enc_ex_Z[27]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ifu_expipe_resp_ireg_net[27]), .EN(instr_accepted_ex_2_1_RNISIFQHS3), .LAT(GND), .SD(GND), .SLn(N_5927_i) ); // @46:8721 SLE \de_ex_pipe_curr_instr_enc_ex[28] ( .Q(de_ex_pipe_curr_instr_enc_ex_Z[28]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ifu_expipe_resp_ireg_net[28]), .EN(instr_accepted_ex_2_1_RNISIFQHS3), .LAT(GND), .SD(GND), .SLn(N_5927_i) ); // @46:8721 SLE \de_ex_pipe_curr_instr_enc_ex[29] ( .Q(de_ex_pipe_curr_instr_enc_ex_Z[29]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ifu_expipe_resp_ireg_net[29]), .EN(instr_accepted_ex_2_1_RNISIFQHS3), .LAT(GND), .SD(GND), .SLn(N_5927_i) ); // @46:8721 SLE \de_ex_pipe_curr_instr_enc_ex[30] ( .Q(de_ex_pipe_curr_instr_enc_ex_Z[30]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ifu_expipe_resp_ireg_net[30]), .EN(instr_accepted_ex_2_1_RNISIFQHS3), .LAT(GND), .SD(GND), .SLn(N_5927_i) ); // @46:8721 SLE \de_ex_pipe_curr_instr_enc_ex[31] ( .Q(de_ex_pipe_curr_instr_enc_ex_Z[31]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ifu_expipe_resp_ireg_net[31]), .EN(instr_accepted_ex_2_1_RNISIFQHS3), .LAT(GND), .SD(GND), .SLn(N_5927_i) ); // @46:8721 SLE \de_ex_pipe_curr_instr_enc_ex[4] ( .Q(de_ex_pipe_curr_instr_enc_ex_Z[4]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_133_i), .EN(instr_accepted_ex_2_1_RNISIFQHS3), .LAT(GND), .SD(GND), .SLn(N_5927_i) ); // @46:8721 SLE \de_ex_pipe_curr_instr_enc_ex[5] ( .Q(de_ex_pipe_curr_instr_enc_ex_Z[5]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_131_i), .EN(instr_accepted_ex_2_1_RNISIFQHS3), .LAT(GND), .SD(GND), .SLn(N_5927_i) ); // @46:8721 SLE \de_ex_pipe_curr_instr_enc_ex[6] ( .Q(de_ex_pipe_curr_instr_enc_ex_Z[6]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_129_i), .EN(instr_accepted_ex_2_1_RNISIFQHS3), .LAT(GND), .SD(GND), .SLn(N_5927_i) ); // @46:8721 SLE \de_ex_pipe_curr_instr_enc_ex[7] ( .Q(de_ex_pipe_curr_instr_enc_ex_Z[7]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_127_i), .EN(instr_accepted_ex_2_1_RNISIFQHS3), .LAT(GND), .SD(GND), .SLn(N_5927_i) ); // @46:8721 SLE \de_ex_pipe_curr_instr_enc_ex[8] ( .Q(de_ex_pipe_curr_instr_enc_ex_Z[8]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_125_i), .EN(instr_accepted_ex_2_1_RNISIFQHS3), .LAT(GND), .SD(GND), .SLn(N_5927_i) ); // @46:8721 SLE \de_ex_pipe_curr_instr_enc_ex[9] ( .Q(de_ex_pipe_curr_instr_enc_ex_Z[9]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_123_i), .EN(instr_accepted_ex_2_1_RNISIFQHS3), .LAT(GND), .SD(GND), .SLn(N_5927_i) ); // @46:8721 SLE \de_ex_pipe_curr_instr_enc_ex[10] ( .Q(de_ex_pipe_curr_instr_enc_ex_Z[10]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_121_i), .EN(instr_accepted_ex_2_1_RNISIFQHS3), .LAT(GND), .SD(GND), .SLn(N_5927_i) ); // @46:8721 SLE \de_ex_pipe_curr_instr_enc_ex[11] ( .Q(de_ex_pipe_curr_instr_enc_ex_Z[11]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_119_i), .EN(instr_accepted_ex_2_1_RNISIFQHS3), .LAT(GND), .SD(GND), .SLn(N_5927_i) ); // @46:8721 SLE \de_ex_pipe_curr_instr_enc_ex[12] ( .Q(de_ex_pipe_curr_instr_enc_ex_Z[12]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_117_i), .EN(instr_accepted_ex_2_1_RNISIFQHS3), .LAT(GND), .SD(GND), .SLn(N_5927_i) ); // @46:8721 SLE \de_ex_pipe_curr_instr_enc_ex[13] ( .Q(de_ex_pipe_curr_instr_enc_ex_Z[13]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_115_i), .EN(instr_accepted_ex_2_1_RNISIFQHS3), .LAT(GND), .SD(GND), .SLn(N_5927_i) ); // @46:8721 SLE \de_ex_pipe_curr_instr_enc_ex[14] ( .Q(de_ex_pipe_curr_instr_enc_ex_Z[14]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_290_i), .EN(instr_accepted_ex_2_1_RNISIFQHS3), .LAT(GND), .SD(GND), .SLn(N_5927_i) ); // @46:8721 SLE \de_ex_pipe_curr_instr_enc_ex[15] ( .Q(de_ex_pipe_curr_instr_enc_ex_Z[15]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_289_i), .EN(instr_accepted_ex_2_1_RNISIFQHS3), .LAT(GND), .SD(GND), .SLn(N_5927_i) ); // @46:8721 SLE \de_ex_pipe_curr_instr_enc_ex[16] ( .Q(de_ex_pipe_curr_instr_enc_ex_Z[16]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ifu_expipe_resp_ireg_net[16]), .EN(instr_accepted_ex_2_1_RNISIFQHS3), .LAT(GND), .SD(GND), .SLn(N_5927_i) ); // @46:8721 SLE \de_ex_pipe_curr_instr_enc_ex[17] ( .Q(de_ex_pipe_curr_instr_enc_ex_Z[17]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ifu_expipe_resp_ireg_net[17]), .EN(instr_accepted_ex_2_1_RNISIFQHS3), .LAT(GND), .SD(GND), .SLn(N_5927_i) ); // @46:8721 SLE \de_ex_pipe_curr_instr_enc_ex[18] ( .Q(de_ex_pipe_curr_instr_enc_ex_Z[18]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ifu_expipe_resp_ireg_net[18]), .EN(instr_accepted_ex_2_1_RNISIFQHS3), .LAT(GND), .SD(GND), .SLn(N_5927_i) ); // @46:8721 SLE \de_ex_pipe_curr_instr_enc_ex[0] ( .Q(de_ex_pipe_curr_instr_enc_ex_Z[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_141_i), .EN(instr_accepted_ex_2_1_RNISIFQHS3), .LAT(GND), .SD(GND), .SLn(N_5927_i) ); // @46:8721 SLE \de_ex_pipe_curr_instr_enc_ex[1] ( .Q(de_ex_pipe_curr_instr_enc_ex_Z[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_139_i), .EN(instr_accepted_ex_2_1_RNISIFQHS3), .LAT(GND), .SD(GND), .SLn(N_5927_i) ); // @46:8721 SLE \de_ex_pipe_curr_instr_enc_ex[2] ( .Q(de_ex_pipe_curr_instr_enc_ex_Z[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_137_i), .EN(instr_accepted_ex_2_1_RNISIFQHS3), .LAT(GND), .SD(GND), .SLn(N_5927_i) ); // @46:8721 SLE \de_ex_pipe_curr_instr_enc_ex[3] ( .Q(de_ex_pipe_curr_instr_enc_ex_Z[3]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_291_i), .EN(instr_accepted_ex_2_1_RNISIFQHS3), .LAT(GND), .SD(GND), .SLn(N_5927_i) ); // @46:8721 SLE de_ex_pipe_i_access_misalign_error_ex ( .Q(de_ex_pipe_i_access_misalign_error_ex_Z), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ifu_expipe_resp_access_misalign_error_i_1), .EN(instr_accepted_ex_2_1_RNISIFQHS3), .LAT(GND), .SD(GND), .SLn(N_5927_i) ); // @46:8721 SLE de_ex_pipe_i_access_mem_error_ex ( .Q(de_ex_pipe_i_access_mem_error_ex_Z), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ifu_expipe_resp_access_mem_error_net), .EN(instr_accepted_ex_2_1_RNISIFQHS3), .LAT(GND), .SD(GND), .SLn(N_5927_i) ); // @46:9953 SLE \gen_debug_gpr_ctrl_pipeline.ex_retr_pipe_gpr_wr_mux_sel_retr[0] ( .Q(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_gpr_wr_mux_sel_retrc), .EN(N_1394_i), .LAT(GND), .SD(GND), .SLn(trace_priv_i_i) ); // @46:8694 SLE stage_state_ex ( .Q(stage_state_ex_1z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un1_next_stage_state_ex_i[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9756 SLE stage_state_retr ( .Q(stage_state_retr_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un1_next_stage_state_retr_i[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9519 SLE \de_ex_pipe_bcu_operand0_mux_sel_ex[0] ( .Q(de_ex_pipe_bcu_operand0_mux_sel_ex_Z[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(bcu_operand0_mux_sel_1_iv_i[0]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE ex_retr_pipe_dbreak_retr ( .Q(ex_retr_pipe_dbreak_retr_Z), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_dbreak_ex_Z), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE ex_retr_pipe_i_access_mem_error_retr ( .Q(ex_retr_pipe_i_access_mem_error_retr_Z), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_i_access_mem_error_ex_Z), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE ex_retr_pipe_i_access_misalign_error_retr ( .Q(ex_retr_pipe_i_access_misalign_error_retr_Z), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_i_access_misalign_error_ex_Z), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE ex_retr_pipe_illegal_instr_retr ( .Q(ex_retr_pipe_illegal_instr_retr_Z), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un3_instr_inhibit_ex_3), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE ex_retr_pipe_m_env_call_retr ( .Q(ex_retr_pipe_m_env_call_retr_Z), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_m_env_call_ex_Z), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE ex_retr_pipe_trap_ret_retr ( .Q(ex_retr_pipe_trap_ret_retr_Z), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_trap_ret_ex_Z), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE ex_retr_pipe_wfi_retr ( .Q(ex_retr_pipe_wfi_retr_Z), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_wfi_ex_Z), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9821 SLE \gen_pipe_debug_enter_req_ex_retr.ex_retr_debug_enter_req_retr ( .Q(ex_retr_debug_enter_req_retr), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_debug_enter_req_ex), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9185 SLE \gen_gpr_ex_attbs_rd_ex.de_ex_pipe_gpr_rs1_rd_valid_ex ( .Q(de_ex_pipe_gpr_rs1_rd_valid_ex), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_gpr_rs1_rd_valid_ex_2), .EN(de_ex_pipe_gpr_rs1_rd_valid_ex6), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9510 SLE de_ex_pipe_bcu_op_sel_ex ( .Q(de_ex_pipe_bcu_op_sel_ex_Z), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_bcu_op_sel_ex_2), .EN(de_ex_pipe_bcu_op_sel_ex7), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8207 SLE stage_state_de ( .Q(stage_state_de_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un2_next_stage_state_de), .EN(next_stage_state_de_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9227 SLE \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_valid_ex ( .Q(de_ex_pipe_gpr_rs2_rd_valid_ex), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_gpr_rs2_rd_valid_ex_2), .EN(de_ex_pipe_gpr_rs2_rd_valid_ex9), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9239 SLE \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs3_rd_valid_ex ( .Q(de_ex_pipe_gpr_rs3_rd_valid_ex), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_gpr_rs3_rd_valid_ex_2), .EN(de_ex_pipe_gpr_rs3_rd_valid_ex9), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9414 SLE \de_ex_pipe_operand0_mux_sel_ex[0] ( .Q(de_ex_pipe_operand0_mux_sel_ex_Z[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(operand0_mux_sel_de[0]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:10182 SLE \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_rd_op_retr ( .Q(ex_retr_pipe_sw_csr_rd_op_retr), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_sw_csr_rd_op_retr_2), .EN(ex_retr_pipe_sw_csr_wr_op_retr18), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8721 SLE de_ex_pipe_dbreak_ex ( .Q(de_ex_pipe_dbreak_ex_Z), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dbreak_de), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8721 SLE de_ex_pipe_fence_ex ( .Q(de_ex_pipe_fence_ex_Z), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(fence_de), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8721 SLE de_ex_pipe_fence_i_ex ( .Q(de_ex_pipe_fence_i_ex_Z), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(fence_i_de), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8721 SLE de_ex_pipe_illegal_instr_ex ( .Q(un3_instr_inhibit_ex_3), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_illegal_instr_ex_2), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8721 SLE de_ex_pipe_implicit_pseudo_instr_ex ( .Q(de_ex_pipe_implicit_pseudo_instr_ex_Z), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_implicit_pseudo_instr_ex_2), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8721 SLE de_ex_pipe_m_env_call_ex ( .Q(de_ex_pipe_m_env_call_ex_Z), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(m_env_call_de), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8721 SLE de_ex_pipe_trap_ret_ex ( .Q(de_ex_pipe_trap_ret_ex_Z), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_trap_ret_ex_2), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8721 SLE de_ex_pipe_wfi_ex ( .Q(de_ex_pipe_wfi_ex_Z), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wfi_de), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8771 SLE \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_debug_enter_req_ex ( .Q(de_ex_pipe_debug_enter_req_ex), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(debug_enter_req_de), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9171 SLE de_ex_pipe_gpr_wr_en_ex ( .Q(de_ex_pipe_gpr_wr_en_ex_Z), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(gpr_wr_en_de), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9365 SLE de_ex_pipe_sw_csr_rd_op_ex ( .Q(de_ex_pipe_sw_csr_rd_op_ex_Z), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sw_csr_rd_op_de), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE ex_retr_pipe_fence_i_retr ( .Q(ex_retr_pipe_fence_i_retr_Z), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_fence_i_retr_2), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9944 SLE \gen_debug_gpr_ctrl_pipeline.ex_retr_pipe_gpr_wr_en_retr ( .Q(ex_retr_pipe_gpr_wr_en_retr), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_12_i), .EN(ex_retr_pipe_gpr_wr_en_retr10), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9827 SLE \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr[10] ( .Q(ex_retr_pipe_curr_pc_retr[10]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_curr_pc_retr_2[10]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9827 SLE \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr[9] ( .Q(ex_retr_pipe_curr_pc_retr[9]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_curr_pc_retr_2[9]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9827 SLE \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr[8] ( .Q(ex_retr_pipe_curr_pc_retr[8]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_curr_pc_retr_2[8]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9827 SLE \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr[7] ( .Q(ex_retr_pipe_curr_pc_retr[7]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_curr_pc_retr_2[7]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9827 SLE \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr[6] ( .Q(ex_retr_pipe_curr_pc_retr[6]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_curr_pc_retr_2[6]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9827 SLE \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr[5] ( .Q(ex_retr_pipe_curr_pc_retr[5]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_curr_pc_retr_2[5]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9827 SLE \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr[4] ( .Q(ex_retr_pipe_curr_pc_retr[4]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_curr_pc_retr_2[4]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9827 SLE \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr[3] ( .Q(ex_retr_pipe_curr_pc_retr[3]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_curr_pc_retr_2[3]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9827 SLE \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr[2] ( .Q(ex_retr_pipe_curr_pc_retr[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_curr_pc_retr_2[2]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9827 SLE \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr[1] ( .Q(ex_retr_pipe_curr_pc_retr[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_curr_pc_retr_2[1]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9827 SLE \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr[0] ( .Q(ex_retr_pipe_curr_pc_retr[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_curr_pc_retr_2[0]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9827 SLE \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr[25] ( .Q(ex_retr_pipe_curr_pc_retr[25]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_curr_pc_retr_2[25]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9827 SLE \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr[24] ( .Q(ex_retr_pipe_curr_pc_retr[24]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_curr_pc_retr_2[24]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9827 SLE \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr[23] ( .Q(ex_retr_pipe_curr_pc_retr[23]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_curr_pc_retr_2[23]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9827 SLE \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr[22] ( .Q(ex_retr_pipe_curr_pc_retr[22]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_curr_pc_retr_2[22]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9827 SLE \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr[21] ( .Q(ex_retr_pipe_curr_pc_retr[21]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_curr_pc_retr_2[21]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9827 SLE \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr[20] ( .Q(ex_retr_pipe_curr_pc_retr[20]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_curr_pc_retr_2[20]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9827 SLE \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr[19] ( .Q(ex_retr_pipe_curr_pc_retr[19]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_curr_pc_retr_2[19]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9827 SLE \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr[18] ( .Q(ex_retr_pipe_curr_pc_retr[18]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_curr_pc_retr_2[18]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9827 SLE \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr[17] ( .Q(ex_retr_pipe_curr_pc_retr[17]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_curr_pc_retr_2[17]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9827 SLE \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr[16] ( .Q(ex_retr_pipe_curr_pc_retr[16]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_curr_pc_retr_2[16]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9827 SLE \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr[15] ( .Q(ex_retr_pipe_curr_pc_retr[15]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_curr_pc_retr_2[15]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9827 SLE \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr[14] ( .Q(ex_retr_pipe_curr_pc_retr[14]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_curr_pc_retr_2[14]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9827 SLE \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr[13] ( .Q(ex_retr_pipe_curr_pc_retr[13]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_curr_pc_retr_2[13]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9827 SLE \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr[12] ( .Q(ex_retr_pipe_curr_pc_retr[12]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_curr_pc_retr_2[12]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9827 SLE \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr[11] ( .Q(ex_retr_pipe_curr_pc_retr[11]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_curr_pc_retr_2[11]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9395 SLE \de_ex_pipe_alu_op_sel_ex[4] ( .Q(de_ex_pipe_alu_op_sel_ex_Z[4]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_alu_op_sel_ex_RNO_Z[4]), .EN(de_ex_pipe_alu_op_sel_exce_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9395 SLE \de_ex_pipe_alu_op_sel_ex[3] ( .Q(de_ex_pipe_alu_op_sel_ex_Z[3]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_alu_op_sel_ex_1_Z[3]), .EN(de_ex_pipe_alu_op_sel_exce_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9395 SLE \de_ex_pipe_alu_op_sel_ex[2] ( .Q(de_ex_pipe_alu_op_sel_ex_Z[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_alu_op_sel_ex_RNO_Z[2]), .EN(de_ex_pipe_alu_op_sel_exce_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9395 SLE \de_ex_pipe_alu_op_sel_ex[1] ( .Q(de_ex_pipe_alu_op_sel_ex_Z[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_alu_op_sel_ex_1_Z[1]), .EN(de_ex_pipe_alu_op_sel_exce_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9395 SLE \de_ex_pipe_alu_op_sel_ex[0] ( .Q(de_ex_pipe_alu_op_sel_ex_Z[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_alu_op_sel_ex_1_Z[0]), .EN(de_ex_pipe_alu_op_sel_exce_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:10352 SLE \ex_retr_pipe_lsu_op_retr[3] ( .Q(ex_retr_pipe_lsu_op_retr_Z[3]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_lsu_op_retr_1_Z[3]), .EN(ex_retr_pipe_lsu_op_retrce_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:10352 SLE \ex_retr_pipe_lsu_op_retr[2] ( .Q(ex_retr_pipe_lsu_op_retr_Z[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_lsu_op_retr_1_Z[2]), .EN(ex_retr_pipe_lsu_op_retrce_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:10352 SLE \ex_retr_pipe_lsu_op_retr[1] ( .Q(ex_retr_pipe_lsu_op_retr_Z[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_lsu_op_retr_1_Z[1]), .EN(ex_retr_pipe_lsu_op_retrce_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:10352 SLE \ex_retr_pipe_lsu_op_retr[0] ( .Q(ex_retr_pipe_lsu_op_retr_Z[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_lsu_op_retr_1_Z[0]), .EN(ex_retr_pipe_lsu_op_retrce_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9827 SLE \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr[31] ( .Q(ex_retr_pipe_curr_pc_retr[31]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_curr_pc_retr_2[31]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9827 SLE \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr[30] ( .Q(ex_retr_pipe_curr_pc_retr[30]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_curr_pc_retr_2[30]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9827 SLE \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr[29] ( .Q(ex_retr_pipe_curr_pc_retr[29]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_curr_pc_retr_2[29]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9827 SLE \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr[28] ( .Q(ex_retr_pipe_curr_pc_retr[28]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_curr_pc_retr_2[28]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9827 SLE \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr[27] ( .Q(ex_retr_pipe_curr_pc_retr[27]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_curr_pc_retr_2[27]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9827 SLE \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr[26] ( .Q(ex_retr_pipe_curr_pc_retr[26]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_curr_pc_retr_2[26]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9612 SLE \de_ex_pipe_lsu_op_ex[3] ( .Q(de_ex_pipe_lsu_op_ex_Z[3]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_lsu_op_ex_1_Z[3]), .EN(de_ex_pipe_lsu_op_exce_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9612 SLE \de_ex_pipe_lsu_op_ex[2] ( .Q(de_ex_pipe_lsu_op_ex_Z[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_lsu_op_ex_1_Z[2]), .EN(de_ex_pipe_lsu_op_exce_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9612 SLE \de_ex_pipe_lsu_op_ex[1] ( .Q(de_ex_pipe_lsu_op_ex_Z[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_lsu_op_ex_1_Z[1]), .EN(de_ex_pipe_lsu_op_exce_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9612 SLE \de_ex_pipe_lsu_op_ex[0] ( .Q(de_ex_pipe_lsu_op_ex_Z[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_lsu_op_ex_1_Z[0]), .EN(de_ex_pipe_lsu_op_exce_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9510 SLE \de_ex_pipe_branch_cond_ex[1] ( .Q(de_ex_pipe_branch_cond_ex_Z[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_branch_cond_ex_1_Z[1]), .EN(de_ex_pipe_branch_cond_exce_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9510 SLE \de_ex_pipe_branch_cond_ex[0] ( .Q(de_ex_pipe_branch_cond_ex_Z[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_branch_cond_ex_1_Z[0]), .EN(de_ex_pipe_branch_cond_exce_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9406 SLE \de_ex_pipe_shifter_unit_op_sel_ex[1] ( .Q(de_ex_pipe_shifter_unit_op_sel_ex_Z[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_shifter_unit_op_sel_ex_1_Z[1]), .EN(de_ex_pipe_shifter_unit_op_sel_ex7), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9406 SLE \de_ex_pipe_shifter_unit_op_sel_ex[0] ( .Q(de_ex_pipe_shifter_unit_op_sel_ex_Z[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_shifter_unit_op_sel_ex_1_Z[0]), .EN(de_ex_pipe_shifter_unit_op_sel_ex7), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8721 SLE \de_ex_pipe_immediate_ex[24] ( .Q(de_ex_pipe_immediate_ex_Z[24]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_1387_i), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8721 SLE \de_ex_pipe_immediate_ex[23] ( .Q(de_ex_pipe_immediate_ex_Z[23]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_1388_i), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8721 SLE \de_ex_pipe_immediate_ex[21] ( .Q(de_ex_pipe_immediate_ex_Z[21]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_26_i), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:10182 SLE \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_wr_op_retr[1] ( .Q(ex_retr_pipe_sw_csr_wr_op_retr[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_sw_csr_wr_op_retr_2[1]), .EN(ex_retr_pipe_sw_csr_wr_op_retr18), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:10182 SLE \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_wr_op_retr[0] ( .Q(ex_retr_pipe_sw_csr_wr_op_retr[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_sw_csr_wr_op_retr_2[0]), .EN(ex_retr_pipe_sw_csr_wr_op_retr18), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9953 SLE \gen_debug_gpr_ctrl_pipeline.ex_retr_pipe_gpr_wr_sel_retr[2] ( .Q(ex_retr_pipe_gpr_wr_sel_retr[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_gpr_wr_sel_retr_2[2]), .EN(N_1394_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9953 SLE \gen_debug_gpr_ctrl_pipeline.ex_retr_pipe_gpr_wr_sel_retr[1] ( .Q(ex_retr_pipe_gpr_wr_sel_retr[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_gpr_wr_sel_retr_2[1]), .EN(N_1394_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9953 SLE \gen_debug_gpr_ctrl_pipeline.ex_retr_pipe_gpr_wr_sel_retr[0] ( .Q(ex_retr_pipe_gpr_wr_sel_retr[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_gpr_wr_sel_retr_2[0]), .EN(N_1394_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:10193 SLE \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_addr_retr[11] ( .Q(ex_retr_pipe_sw_csr_addr_retr[11]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_sw_csr_addr_retr_2[11]), .EN(N_1394_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:10193 SLE \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_addr_retr[10] ( .Q(ex_retr_pipe_sw_csr_addr_retr[10]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_sw_csr_addr_retr_2[10]), .EN(N_1394_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:10193 SLE \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_addr_retr[9] ( .Q(ex_retr_pipe_sw_csr_addr_retr[9]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_sw_csr_addr_retr_2[9]), .EN(N_1394_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:10193 SLE \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_addr_retr[8] ( .Q(ex_retr_pipe_sw_csr_addr_retr[8]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_sw_csr_addr_retr_2[8]), .EN(N_1394_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:10193 SLE \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_addr_retr[7] ( .Q(ex_retr_pipe_sw_csr_addr_retr[7]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_sw_csr_addr_retr_2[7]), .EN(N_1394_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:10193 SLE \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_addr_retr[6] ( .Q(ex_retr_pipe_sw_csr_addr_retr[6]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_sw_csr_addr_retr_2[6]), .EN(N_1394_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:10193 SLE \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_addr_retr[5] ( .Q(ex_retr_pipe_sw_csr_addr_retr[5]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_sw_csr_addr_retr_2[5]), .EN(N_1394_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:10193 SLE \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_addr_retr[4] ( .Q(ex_retr_pipe_sw_csr_addr_retr[4]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_sw_csr_addr_retr_2[4]), .EN(N_1394_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:10193 SLE \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_addr_retr[3] ( .Q(ex_retr_pipe_sw_csr_addr_retr[3]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_sw_csr_addr_retr_2[3]), .EN(N_1394_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:10193 SLE \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_addr_retr[2] ( .Q(ex_retr_pipe_sw_csr_addr_retr[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_sw_csr_addr_retr_2[2]), .EN(N_1394_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:10193 SLE \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_addr_retr[1] ( .Q(ex_retr_pipe_sw_csr_addr_retr[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_sw_csr_addr_retr_2[1]), .EN(N_1394_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:10193 SLE \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_addr_retr[0] ( .Q(ex_retr_pipe_sw_csr_addr_retr[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_sw_csr_addr_retr_2[0]), .EN(N_1394_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9365 SLE \de_ex_pipe_sw_csr_addr_ex[2] ( .Q(de_ex_pipe_sw_csr_addr_ex_Z[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sw_csr_addr_de[2]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9365 SLE \de_ex_pipe_sw_csr_addr_ex[1] ( .Q(de_ex_pipe_sw_csr_addr_ex_Z[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sw_csr_addr_de[1]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9365 SLE \de_ex_pipe_sw_csr_addr_ex[0] ( .Q(de_ex_pipe_sw_csr_addr_ex_Z[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sw_csr_addr_de[0]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9365 SLE \de_ex_pipe_sw_csr_wr_op_ex[1] ( .Q(de_ex_pipe_sw_csr_wr_op_ex_Z[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sw_csr_wr_op_de[1]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9365 SLE \de_ex_pipe_sw_csr_wr_op_ex[0] ( .Q(de_ex_pipe_sw_csr_wr_op_ex_Z[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sw_csr_wr_op_de[0]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9414 SLE \de_ex_pipe_shifter_unit_operand_sel_ex[1] ( .Q(shifter_operand_sel[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(shifter_unit_operand_sel_de[1]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9953 SLE \gen_debug_gpr_ctrl_pipeline.ex_retr_pipe_gpr_wr_mux_sel_retr[1] ( .Q(ex_retr_pipe_gpr_wr_mux_sel_retr[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_gpr_wr_mux_sel_retr_2[1]), .EN(N_1394_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9953 SLE \gen_debug_gpr_ctrl_pipeline.ex_retr_pipe_gpr_wr_sel_retr[5] ( .Q(ex_retr_pipe_gpr_wr_sel_retr[5]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_gpr_wr_sel_retr_2[5]), .EN(N_1394_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9953 SLE \gen_debug_gpr_ctrl_pipeline.ex_retr_pipe_gpr_wr_sel_retr[4] ( .Q(ex_retr_pipe_gpr_wr_sel_retr[4]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_gpr_wr_sel_retr_2[4]), .EN(N_1394_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9953 SLE \gen_debug_gpr_ctrl_pipeline.ex_retr_pipe_gpr_wr_sel_retr[3] ( .Q(ex_retr_pipe_gpr_wr_sel_retr[3]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_gpr_wr_sel_retr_2[3]), .EN(N_1394_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9171 SLE \de_ex_pipe_gpr_wr_mux_sel_ex[0] ( .Q(de_ex_pipe_gpr_wr_mux_sel_ex_Z[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(gpr_wr_mux_sel_de[0]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9191 SLE \gen_gpr_ex_attbs_rd_ex.de_ex_pipe_gpr_rs1_rd_sel_ex[4] ( .Q(de_ex_pipe_gpr_rs1_rd_sel_ex[4]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(gpr_rs1_rd_sel_de[4]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9191 SLE \gen_gpr_ex_attbs_rd_ex.de_ex_pipe_gpr_rs1_rd_sel_ex[3] ( .Q(de_ex_pipe_gpr_rs1_rd_sel_ex[3]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(gpr_rs1_rd_sel_de[3]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9191 SLE \gen_gpr_ex_attbs_rd_ex.de_ex_pipe_gpr_rs1_rd_sel_ex[2] ( .Q(de_ex_pipe_gpr_rs1_rd_sel_ex[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(gpr_rs1_rd_sel_de[2]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9191 SLE \gen_gpr_ex_attbs_rd_ex.de_ex_pipe_gpr_rs1_rd_sel_ex[1] ( .Q(de_ex_pipe_gpr_rs1_rd_sel_ex[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(gpr_rs1_rd_sel_de[1]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9191 SLE \gen_gpr_ex_attbs_rd_ex.de_ex_pipe_gpr_rs1_rd_sel_ex[0] ( .Q(de_ex_pipe_gpr_rs1_rd_sel_ex[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(gpr_rs1_rd_sel_de[0]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9365 SLE \de_ex_pipe_sw_csr_addr_ex[11] ( .Q(de_ex_pipe_sw_csr_addr_ex_Z[11]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sw_csr_addr_de[11]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9365 SLE \de_ex_pipe_sw_csr_addr_ex[10] ( .Q(de_ex_pipe_sw_csr_addr_ex_Z[10]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sw_csr_addr_de[10]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9365 SLE \de_ex_pipe_sw_csr_addr_ex[9] ( .Q(de_ex_pipe_sw_csr_addr_ex_Z[9]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sw_csr_addr_de[9]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9365 SLE \de_ex_pipe_sw_csr_addr_ex[8] ( .Q(de_ex_pipe_sw_csr_addr_ex_Z[8]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sw_csr_addr_de[8]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9365 SLE \de_ex_pipe_sw_csr_addr_ex[7] ( .Q(de_ex_pipe_sw_csr_addr_ex_Z[7]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sw_csr_addr_de[7]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9365 SLE \de_ex_pipe_sw_csr_addr_ex[6] ( .Q(de_ex_pipe_sw_csr_addr_ex_Z[6]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sw_csr_addr_de[6]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9365 SLE \de_ex_pipe_sw_csr_addr_ex[5] ( .Q(de_ex_pipe_sw_csr_addr_ex_Z[5]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sw_csr_addr_de[5]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9365 SLE \de_ex_pipe_sw_csr_addr_ex[4] ( .Q(de_ex_pipe_sw_csr_addr_ex_Z[4]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sw_csr_addr_de[4]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9365 SLE \de_ex_pipe_sw_csr_addr_ex[3] ( .Q(de_ex_pipe_sw_csr_addr_ex_Z[3]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sw_csr_addr_de[3]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8771 SLE \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex[13] ( .Q(de_ex_pipe_curr_pc_ex[13]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_pc_ex_2[13]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8771 SLE \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex[12] ( .Q(de_ex_pipe_curr_pc_ex[12]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_pc_ex_2[12]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8771 SLE \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex[11] ( .Q(de_ex_pipe_curr_pc_ex[11]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_pc_ex_2[11]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8771 SLE \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex[10] ( .Q(de_ex_pipe_curr_pc_ex[10]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_pc_ex_2[10]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8771 SLE \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex[9] ( .Q(de_ex_pipe_curr_pc_ex[9]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_pc_ex_2[9]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8771 SLE \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex[8] ( .Q(de_ex_pipe_curr_pc_ex[8]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_pc_ex_2[8]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8771 SLE \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex[7] ( .Q(de_ex_pipe_curr_pc_ex[7]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_pc_ex_2[7]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8771 SLE \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex[6] ( .Q(de_ex_pipe_curr_pc_ex[6]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_pc_ex_2[6]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8771 SLE \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex[5] ( .Q(de_ex_pipe_curr_pc_ex[5]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_pc_ex_2[5]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8771 SLE \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex[4] ( .Q(de_ex_pipe_curr_pc_ex[4]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_pc_ex_2[4]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8771 SLE \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex[3] ( .Q(de_ex_pipe_curr_pc_ex[3]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_pc_ex_2[3]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8771 SLE \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex[2] ( .Q(de_ex_pipe_curr_pc_ex[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_pc_ex_2[2]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8771 SLE \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex[1] ( .Q(de_ex_pipe_curr_pc_ex[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_pc_ex_2[1]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8771 SLE \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex[0] ( .Q(de_ex_pipe_curr_pc_ex[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_pc_ex_2[0]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9171 SLE \de_ex_pipe_gpr_wr_mux_sel_ex[1] ( .Q(de_ex_pipe_gpr_wr_mux_sel_ex_Z[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(gpr_wr_mux_sel_de[1]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8771 SLE \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex[28] ( .Q(de_ex_pipe_curr_pc_ex[28]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_pc_ex_2[28]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8771 SLE \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex[27] ( .Q(de_ex_pipe_curr_pc_ex[27]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_pc_ex_2[27]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8771 SLE \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex[26] ( .Q(de_ex_pipe_curr_pc_ex[26]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_pc_ex_2[26]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8771 SLE \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex[25] ( .Q(de_ex_pipe_curr_pc_ex[25]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_pc_ex_2[25]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8771 SLE \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex[24] ( .Q(de_ex_pipe_curr_pc_ex[24]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_pc_ex_2[24]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8771 SLE \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex[23] ( .Q(de_ex_pipe_curr_pc_ex[23]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_pc_ex_2[23]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8771 SLE \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex[22] ( .Q(de_ex_pipe_curr_pc_ex[22]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_pc_ex_2[22]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8771 SLE \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex[21] ( .Q(de_ex_pipe_curr_pc_ex[21]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_pc_ex_2[21]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8771 SLE \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex[20] ( .Q(de_ex_pipe_curr_pc_ex[20]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_pc_ex_2[20]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8771 SLE \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex[19] ( .Q(de_ex_pipe_curr_pc_ex[19]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_pc_ex_2[19]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8771 SLE \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex[18] ( .Q(de_ex_pipe_curr_pc_ex[18]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_pc_ex_2[18]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8771 SLE \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex[17] ( .Q(de_ex_pipe_curr_pc_ex[17]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_pc_ex_2[17]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8771 SLE \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex[16] ( .Q(de_ex_pipe_curr_pc_ex[16]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_pc_ex_2[16]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8771 SLE \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex[15] ( .Q(de_ex_pipe_curr_pc_ex[15]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_pc_ex_2[15]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8771 SLE \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex[14] ( .Q(de_ex_pipe_curr_pc_ex[14]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_pc_ex_2[14]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE \ex_retr_pipe_curr_instr_enc_retr[2] ( .Q(ex_retr_pipe_curr_instr_enc_retr_Z[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_instr_enc_ex_Z[2]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE \ex_retr_pipe_curr_instr_enc_retr[1] ( .Q(ex_retr_pipe_curr_instr_enc_retr_Z[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_instr_enc_ex_Z[1]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE \ex_retr_pipe_curr_instr_enc_retr[0] ( .Q(ex_retr_pipe_curr_instr_enc_retr_Z[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_instr_enc_ex_Z[0]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9798 SLE \gen_trig_pipe_reg_ex_retr.ex_retr_pipe_trigger_retr[0] ( .Q(ex_retr_pipe_trigger_retr[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_trigger_ex[0]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9233 SLE \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_sel_ex[5] ( .Q(de_ex_pipe_gpr_rs2_rd_sel_ex[5]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(ex_retr_pipe_gpr_wr_sel_retr_2[5]), .EN(de_ex_pipe_gpr_rs2_rd_sel_ex5), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9233 SLE \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_sel_ex[4] ( .Q(de_ex_pipe_gpr_rs2_rd_sel_ex[4]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_gpr_rs2_rd_sel_ex_2[4]), .EN(de_ex_pipe_gpr_rs2_rd_sel_ex5), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9233 SLE \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_sel_ex[3] ( .Q(de_ex_pipe_gpr_rs2_rd_sel_ex[3]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_gpr_rs2_rd_sel_ex_2[3]), .EN(de_ex_pipe_gpr_rs2_rd_sel_ex5), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9233 SLE \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_sel_ex[2] ( .Q(de_ex_pipe_gpr_rs2_rd_sel_ex[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_gpr_rs2_rd_sel_ex_2[2]), .EN(de_ex_pipe_gpr_rs2_rd_sel_ex5), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9233 SLE \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_sel_ex[1] ( .Q(de_ex_pipe_gpr_rs2_rd_sel_ex[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_gpr_rs2_rd_sel_ex_2[1]), .EN(de_ex_pipe_gpr_rs2_rd_sel_ex5), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9233 SLE \gen_gpr_ex_attbs_rd_ex.gen_debug_gpr_rd_sel_pipeline.de_ex_pipe_gpr_rs2_rd_sel_ex[0] ( .Q(de_ex_pipe_gpr_rs2_rd_sel_ex[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_gpr_rs2_rd_sel_ex_2[0]), .EN(de_ex_pipe_gpr_rs2_rd_sel_ex5), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8747 SLE \gen_trig_pipe_reg_de_ex.de_ex_pipe_trigger_ex[1] ( .Q(de_ex_pipe_trigger_ex[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(trigger_req_de[1]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8747 SLE \gen_trig_pipe_reg_de_ex.de_ex_pipe_trigger_ex[0] ( .Q(de_ex_pipe_trigger_ex[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(trigger_req_de[0]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8771 SLE \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex[31] ( .Q(de_ex_pipe_curr_pc_ex[31]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_pc_ex_2[31]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8771 SLE \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex[30] ( .Q(de_ex_pipe_curr_pc_ex[30]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_pc_ex_2[30]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8771 SLE \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex[29] ( .Q(de_ex_pipe_curr_pc_ex[29]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_pc_ex_2[29]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE \ex_retr_pipe_curr_instr_enc_retr[17] ( .Q(ex_retr_pipe_curr_instr_enc_retr_Z[17]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_instr_enc_ex_Z[17]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE \ex_retr_pipe_curr_instr_enc_retr[16] ( .Q(ex_retr_pipe_curr_instr_enc_retr_Z[16]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_instr_enc_ex_Z[16]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE \ex_retr_pipe_curr_instr_enc_retr[15] ( .Q(ex_retr_pipe_curr_instr_enc_retr_Z[15]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_instr_enc_ex_Z[15]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE \ex_retr_pipe_curr_instr_enc_retr[14] ( .Q(ex_retr_pipe_curr_instr_enc_retr_Z[14]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_instr_enc_ex_Z[14]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE \ex_retr_pipe_curr_instr_enc_retr[13] ( .Q(ex_retr_pipe_curr_instr_enc_retr_Z[13]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_instr_enc_ex_Z[13]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE \ex_retr_pipe_curr_instr_enc_retr[12] ( .Q(ex_retr_pipe_curr_instr_enc_retr_Z[12]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_instr_enc_ex_Z[12]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE \ex_retr_pipe_curr_instr_enc_retr[11] ( .Q(ex_retr_pipe_curr_instr_enc_retr_Z[11]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_instr_enc_ex_Z[11]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE \ex_retr_pipe_curr_instr_enc_retr[10] ( .Q(ex_retr_pipe_curr_instr_enc_retr_Z[10]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_instr_enc_ex_Z[10]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE \ex_retr_pipe_curr_instr_enc_retr[9] ( .Q(ex_retr_pipe_curr_instr_enc_retr_Z[9]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_instr_enc_ex_Z[9]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE \ex_retr_pipe_curr_instr_enc_retr[8] ( .Q(ex_retr_pipe_curr_instr_enc_retr_Z[8]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_instr_enc_ex_Z[8]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE \ex_retr_pipe_curr_instr_enc_retr[7] ( .Q(ex_retr_pipe_curr_instr_enc_retr_Z[7]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_instr_enc_ex_Z[7]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE \ex_retr_pipe_curr_instr_enc_retr[6] ( .Q(ex_retr_pipe_curr_instr_enc_retr_Z[6]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_instr_enc_ex_Z[6]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE \ex_retr_pipe_curr_instr_enc_retr[5] ( .Q(ex_retr_pipe_curr_instr_enc_retr_Z[5]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_instr_enc_ex_Z[5]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE \ex_retr_pipe_curr_instr_enc_retr[4] ( .Q(ex_retr_pipe_curr_instr_enc_retr_Z[4]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_instr_enc_ex_Z[4]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE \ex_retr_pipe_curr_instr_enc_retr[3] ( .Q(ex_retr_pipe_curr_instr_enc_retr_Z[3]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_instr_enc_ex_Z[3]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9622 SLE \lsu_op_ex_pipe_reg[0] ( .Q(lsu_op_ex_pipe_reg_Z[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lsu_op_de[0]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE \ex_retr_pipe_curr_instr_enc_retr[31] ( .Q(ex_retr_pipe_curr_instr_enc_retr_Z[31]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_instr_enc_ex_Z[31]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE \ex_retr_pipe_curr_instr_enc_retr[30] ( .Q(ex_retr_pipe_curr_instr_enc_retr_Z[30]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_instr_enc_ex_Z[30]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE \ex_retr_pipe_curr_instr_enc_retr[29] ( .Q(ex_retr_pipe_curr_instr_enc_retr_Z[29]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_instr_enc_ex_Z[29]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE \ex_retr_pipe_curr_instr_enc_retr[28] ( .Q(ex_retr_pipe_curr_instr_enc_retr_Z[28]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_instr_enc_ex_Z[28]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE \ex_retr_pipe_curr_instr_enc_retr[27] ( .Q(ex_retr_pipe_curr_instr_enc_retr_Z[27]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_instr_enc_ex_Z[27]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE \ex_retr_pipe_curr_instr_enc_retr[26] ( .Q(ex_retr_pipe_curr_instr_enc_retr_Z[26]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_instr_enc_ex_Z[26]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE \ex_retr_pipe_curr_instr_enc_retr[25] ( .Q(ex_retr_pipe_curr_instr_enc_retr_Z[25]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_instr_enc_ex_Z[25]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE \ex_retr_pipe_curr_instr_enc_retr[24] ( .Q(ex_retr_pipe_curr_instr_enc_retr_Z[24]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_instr_enc_ex_Z[24]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE \ex_retr_pipe_curr_instr_enc_retr[23] ( .Q(ex_retr_pipe_curr_instr_enc_retr_Z[23]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_instr_enc_ex_Z[23]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE \ex_retr_pipe_curr_instr_enc_retr[22] ( .Q(ex_retr_pipe_curr_instr_enc_retr_Z[22]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_instr_enc_ex_Z[22]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE \ex_retr_pipe_curr_instr_enc_retr[21] ( .Q(ex_retr_pipe_curr_instr_enc_retr_Z[21]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_instr_enc_ex_Z[21]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE \ex_retr_pipe_curr_instr_enc_retr[20] ( .Q(ex_retr_pipe_curr_instr_enc_retr_Z[20]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_instr_enc_ex_Z[20]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE \ex_retr_pipe_curr_instr_enc_retr[19] ( .Q(ex_retr_pipe_curr_instr_enc_retr_Z[19]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_instr_enc_ex_Z[19]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9775 SLE \ex_retr_pipe_curr_instr_enc_retr[18] ( .Q(ex_retr_pipe_curr_instr_enc_retr_Z[18]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(de_ex_pipe_curr_instr_enc_ex_Z[18]), .EN(instr_accepted_retr_2), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9519 SLE \de_ex_pipe_bcu_operand1_mux_sel_ex[2] ( .Q(de_ex_pipe_bcu_operand1_mux_sel_ex_Z[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(soft_reset_taken_retr), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9519 SLE \de_ex_pipe_bcu_operand1_mux_sel_ex[1] ( .Q(de_ex_pipe_bcu_operand1_mux_sel_ex_Z[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(bcu_operand1_mux_sel_de[1]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9519 SLE \de_ex_pipe_bcu_operand1_mux_sel_ex[0] ( .Q(de_ex_pipe_bcu_operand1_mux_sel_ex_Z[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(bcu_operand1_mux_sel_de[0]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9622 SLE \lsu_op_ex_pipe_reg[3] ( .Q(lsu_op_ex_pipe_reg_Z[3]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lsu_op_de[3]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9622 SLE \lsu_op_ex_pipe_reg[2] ( .Q(lsu_op_ex_pipe_reg_Z[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lsu_op_de[2]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9622 SLE \lsu_op_ex_pipe_reg[1] ( .Q(lsu_op_ex_pipe_reg_Z[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(lsu_op_de[1]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9171 SLE \de_ex_pipe_gpr_wr_sel_ex[4] ( .Q(de_ex_pipe_gpr_wr_sel_ex_Z[4]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(gpr_wr_sel_de[4]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9171 SLE \de_ex_pipe_gpr_wr_sel_ex[3] ( .Q(de_ex_pipe_gpr_wr_sel_ex_Z[3]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(gpr_wr_sel_de[3]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9171 SLE \de_ex_pipe_gpr_wr_sel_ex[2] ( .Q(de_ex_pipe_gpr_wr_sel_ex_Z[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(gpr_wr_sel_de[2]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9171 SLE \de_ex_pipe_gpr_wr_sel_ex[1] ( .Q(de_ex_pipe_gpr_wr_sel_ex_Z[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(gpr_wr_sel_de[1]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9171 SLE \de_ex_pipe_gpr_wr_sel_ex[0] ( .Q(de_ex_pipe_gpr_wr_sel_ex_Z[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(gpr_wr_sel_de[0]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9414 SLE \de_ex_pipe_operand1_mux_sel_ex[1] ( .Q(de_ex_pipe_operand1_mux_sel_ex_Z[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(operand1_mux_sel_de[1]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9414 SLE \de_ex_pipe_operand1_mux_sel_ex[0] ( .Q(de_ex_pipe_operand1_mux_sel_ex_Z[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(operand1_mux_sel_de[0]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9414 SLE \de_ex_pipe_exu_result_mux_sel_ex[2] ( .Q(exu_result_mux_sel[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(exu_result_mux_sel_de[2]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9414 SLE \de_ex_pipe_exu_result_mux_sel_ex[1] ( .Q(exu_result_mux_sel[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(exu_result_mux_sel_de[1]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:9414 SLE \de_ex_pipe_exu_result_mux_sel_ex[0] ( .Q(exu_result_mux_sel[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(exu_result_mux_sel_de[0]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(VCC) ); // @46:8721 SLE \de_ex_pipe_immediate_ex[31] ( .Q(de_ex_pipe_immediate_ex_Z[31]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(immediate_de[31]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(N_14072_i) ); // @46:8721 SLE \de_ex_pipe_immediate_ex[30] ( .Q(de_ex_pipe_immediate_ex_Z[30]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(immediate_de[30]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(N_14072_i) ); // @46:8721 SLE \de_ex_pipe_immediate_ex[29] ( .Q(de_ex_pipe_immediate_ex_Z[29]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(immediate_de[29]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(N_14072_i) ); // @46:8721 SLE \de_ex_pipe_immediate_ex[28] ( .Q(de_ex_pipe_immediate_ex_Z[28]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(immediate_de[28]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(N_14072_i) ); // @46:8721 SLE \de_ex_pipe_immediate_ex[27] ( .Q(de_ex_pipe_immediate_ex_Z[27]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(immediate_de[27]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(N_14072_i) ); // @46:8721 SLE \de_ex_pipe_immediate_ex[26] ( .Q(de_ex_pipe_immediate_ex_Z[26]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(immediate_de[26]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(N_14072_i) ); // @46:8721 SLE \de_ex_pipe_immediate_ex[25] ( .Q(de_ex_pipe_immediate_ex_Z[25]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(immediate_de[25]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(N_14072_i) ); // @46:8721 SLE \de_ex_pipe_immediate_ex[22] ( .Q(de_ex_pipe_immediate_ex_Z[22]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(immediate_de[22]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(N_14072_i) ); // @46:8721 SLE \de_ex_pipe_immediate_ex[20] ( .Q(de_ex_pipe_immediate_ex_Z[20]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(immediate_de[20]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(N_14072_i) ); // @46:8721 SLE \de_ex_pipe_immediate_ex[19] ( .Q(de_ex_pipe_immediate_ex_Z[19]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(immediate_de[19]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(N_14072_i) ); // @46:8721 SLE \de_ex_pipe_immediate_ex[18] ( .Q(de_ex_pipe_immediate_ex_Z[18]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(immediate_de[18]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(N_14072_i) ); // @46:8721 SLE \de_ex_pipe_immediate_ex[17] ( .Q(de_ex_pipe_immediate_ex_Z[17]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(immediate_de[17]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(N_14072_i) ); // @46:8721 SLE \de_ex_pipe_immediate_ex[16] ( .Q(de_ex_pipe_immediate_ex_Z[16]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(immediate_de[16]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(N_14072_i) ); // @46:8721 SLE \de_ex_pipe_immediate_ex[15] ( .Q(de_ex_pipe_immediate_ex_Z[15]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(immediate_de[15]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(N_14072_i) ); // @46:8721 SLE \de_ex_pipe_immediate_ex[14] ( .Q(de_ex_pipe_immediate_ex_Z[14]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(immediate_de[14]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(N_14072_i) ); // @46:8721 SLE \de_ex_pipe_immediate_ex[13] ( .Q(de_ex_pipe_immediate_ex_Z[13]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(immediate_de[13]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(N_14072_i) ); // @46:8721 SLE \de_ex_pipe_immediate_ex[12] ( .Q(de_ex_pipe_immediate_ex_Z[12]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(immediate_de[12]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(N_14072_i) ); // @46:8721 SLE \de_ex_pipe_immediate_ex[11] ( .Q(de_ex_pipe_immediate_ex_Z[11]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(immediate_de[11]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(N_14072_i) ); // @46:8721 SLE \de_ex_pipe_immediate_ex[10] ( .Q(de_ex_pipe_immediate_ex_Z[10]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(immediate_de[10]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(N_14072_i) ); // @46:9414 SLE \de_ex_pipe_shifter_unit_places_sel_ex[1] ( .Q(shifter_unit_places_sel[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(shifter_unit_places_sel_de[1]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(N_14072_i) ); // @46:9414 SLE \de_ex_pipe_shifter_unit_places_sel_ex[0] ( .Q(de_ex_pipe_shifter_unit_places_sel_ex_Z[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(shifter_unit_places_sel_de[0]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(N_14072_i) ); // @46:9414 SLE \de_ex_pipe_shifter_unit_operand_sel_ex[0] ( .Q(shifter_operand_sel[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(shifter_unit_places_sel_de[2]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(N_14072_i) ); // @46:8721 SLE \de_ex_pipe_immediate_ex[9] ( .Q(de_ex_pipe_immediate_ex_Z[9]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(immediate_de[9]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(N_14072_i) ); // @46:8721 SLE \de_ex_pipe_immediate_ex[8] ( .Q(de_ex_pipe_immediate_ex_Z[8]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(immediate_de[8]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(N_14072_i) ); // @46:8721 SLE \de_ex_pipe_immediate_ex[7] ( .Q(de_ex_pipe_immediate_ex_Z[7]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(immediate_de[7]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(N_14072_i) ); // @46:8721 SLE \de_ex_pipe_immediate_ex[6] ( .Q(de_ex_pipe_immediate_ex_Z[6]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(immediate_de[6]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(N_14072_i) ); // @46:8721 SLE \de_ex_pipe_immediate_ex[5] ( .Q(de_ex_pipe_immediate_ex_Z[5]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(immediate_de[5]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(N_14072_i) ); // @46:8721 SLE \de_ex_pipe_immediate_ex[4] ( .Q(de_ex_pipe_immediate_ex_Z[4]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(immediate_de[4]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(N_14072_i) ); // @46:8721 SLE \de_ex_pipe_immediate_ex[3] ( .Q(de_ex_pipe_immediate_ex_Z[3]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(immediate_de[3]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(N_14072_i) ); // @46:8721 SLE \de_ex_pipe_immediate_ex[2] ( .Q(de_ex_pipe_immediate_ex_Z[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(immediate_de[2]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(N_14072_i) ); // @46:8721 SLE \de_ex_pipe_immediate_ex[1] ( .Q(de_ex_pipe_immediate_ex_Z[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(immediate_de[1]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(N_14072_i) ); // @46:8721 SLE \de_ex_pipe_immediate_ex[0] ( .Q(de_ex_pipe_immediate_ex_Z[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(immediate_de[0]), .EN(instr_accepted_ex), .LAT(GND), .SD(GND), .SLn(N_14072_i) ); // @46:9510 CFG2 \de_ex_pipe_branch_cond_exce[0] ( .A(instr_accepted_ex), .B(bcu_op_completing_ex), .Y(de_ex_pipe_branch_cond_exce_Z[0]) ); defparam \de_ex_pipe_branch_cond_exce[0] .INIT=4'hE; // @46:9612 CFG3 \de_ex_pipe_lsu_op_exce[0] ( .A(lsu_op_completing_ex_a0), .B(instr_accepted_ex), .C(lsu_op_completing_ex_1_0), .Y(de_ex_pipe_lsu_op_exce_Z[0]) ); defparam \de_ex_pipe_lsu_op_exce[0] .INIT=8'hFE; // @46:9395 CFG2 \de_ex_pipe_alu_op_sel_exce[0] ( .A(instr_accepted_ex), .B(de_ex_pipe_alu_op_sel_ex7_0), .Y(de_ex_pipe_alu_op_sel_exce_Z[0]) ); defparam \de_ex_pipe_alu_op_sel_exce[0] .INIT=4'hE; // @46:10352 CFG2 \ex_retr_pipe_lsu_op_retrce[0] ( .A(instr_accepted_retr_2), .B(dealloc_resp_buff_10), .Y(ex_retr_pipe_lsu_op_retrce_Z[0]) ); defparam \ex_retr_pipe_lsu_op_retrce[0] .INIT=4'hE; // @46:9395 CFG4 \de_ex_pipe_alu_op_sel_ex_RNO_0[2] ( .A(rv32i_dec_alu_op_sel_m_0[2]), .B(case_dec_gpr_rs2_rd_sel_2_sqmuxa), .C(rv32c_dec_alu_op_sel_0[2]), .D(g1_0), .Y(g2) ); defparam \de_ex_pipe_alu_op_sel_ex_RNO_0[2] .INIT=16'hFFEA; // @46:9395 CFG3 \de_ex_pipe_alu_op_sel_ex_RNO[2] ( .A(instr_accepted_ex), .B(de_ex_pipe_alu_op_sel_ex7_0), .C(g2), .Y(de_ex_pipe_alu_op_sel_ex_RNO_Z[2]) ); defparam \de_ex_pipe_alu_op_sel_ex_RNO[2] .INIT=8'hB0; CFG4 \de_ex_pipe_alu_op_sel_ex_RNO_3[4] ( .A(N_133_i), .B(N_129_i), .C(N_115_i), .D(N_290_i), .Y(g0_0_a3_1_1) ); defparam \de_ex_pipe_alu_op_sel_ex_RNO_3[4] .INIT=16'h0020; // @46:9395 CFG4 \de_ex_pipe_alu_op_sel_ex_RNO_4[4] ( .A(N_290_i), .B(N_566_1), .C(N_133_i), .D(N_115_i), .Y(N_10) ); defparam \de_ex_pipe_alu_op_sel_ex_RNO_4[4] .INIT=16'h080C; CFG4 \de_ex_pipe_alu_op_sel_ex_RNO_1[4] ( .A(N_289_i), .B(N_141_i), .C(case_dec_gpr_rs2_rd_sel_2_sqmuxa), .D(N_290_i), .Y(g0_0_a3_0_2) ); defparam \de_ex_pipe_alu_op_sel_ex_RNO_1[4] .INIT=16'h8000; // @46:9395 CFG4 \de_ex_pipe_alu_op_sel_ex_RNO_2[4] ( .A(N_131_i), .B(g0_0_a3_1_1), .C(N_10), .D(N_26), .Y(N_6) ); defparam \de_ex_pipe_alu_op_sel_ex_RNO_2[4] .INIT=16'hFCF4; CFG4 \de_ex_pipe_alu_op_sel_ex_RNO_0[4] ( .A(N_6), .B(case_dec_gpr_rs2_rd_sel_0_sqmuxa), .C(rv32i_dec_alu_op_sel_m_0[4]), .D(un1_instruction_29_1), .Y(g0_0_a3_2) ); defparam \de_ex_pipe_alu_op_sel_ex_RNO_0[4] .INIT=16'h8000; // @46:9395 CFG4 \de_ex_pipe_alu_op_sel_ex_RNO[4] ( .A(g0_0_a3_2), .B(de_ex_pipe_alu_op_sel_ex7_0), .C(g0_0_a3_0_2), .D(instr_accepted_ex), .Y(de_ex_pipe_alu_op_sel_ex_RNO_Z[4]) ); defparam \de_ex_pipe_alu_op_sel_ex_RNO[4] .INIT=16'hFA32; // @46:9953 CFG2 \gen_debug_gpr_ctrl_pipeline.ex_retr_pipe_gpr_wr_mux_sel_retrc ( .A(un1_gpr_wr_mux_sel_ex_i), .B(de_ex_pipe_gpr_wr_mux_sel_ex_Z[0]), .Y(ex_retr_pipe_gpr_wr_mux_sel_retrc) ); defparam \gen_debug_gpr_ctrl_pipeline.ex_retr_pipe_gpr_wr_mux_sel_retrc .INIT=4'h8; // @46:9531 CFG2 \gen_pipe_debug_enter_req_ex_retr.un3_branch_cond_ex[0] ( .A(stage_state_ex_1z), .B(de_ex_pipe_branch_cond_ex_Z[0]), .Y(un3_branch_cond_ex[0]) ); defparam \gen_pipe_debug_enter_req_ex_retr.un3_branch_cond_ex[0] .INIT=4'h8; // @46:9531 CFG2 \gen_pipe_debug_enter_req_ex_retr.un3_branch_cond_ex[1] ( .A(stage_state_ex_1z), .B(de_ex_pipe_branch_cond_ex_Z[1]), .Y(un3_branch_cond_ex[1]) ); defparam \gen_pipe_debug_enter_req_ex_retr.un3_branch_cond_ex[1] .INIT=4'h8; // @46:8234 CFG2 \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_wr_op_retr_RNINOH7A[0] ( .A(ex_retr_pipe_sw_csr_wr_op_retr[0]), .B(ex_retr_pipe_sw_csr_wr_op_retr[1]), .Y(N_40) ); defparam \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_wr_op_retr_RNINOH7A[0] .INIT=4'hE; // @46:9957 CFG2 \gen_debug_gpr_ctrl_pipeline.ex_retr_pipe_gpr_wr_sel_retr_2[5] ( .A(trace_priv_i), .B(cpu_debug_gpr_op_addr_net[5]), .Y(ex_retr_pipe_gpr_wr_sel_retr_2[5]) ); defparam \gen_debug_gpr_ctrl_pipeline.ex_retr_pipe_gpr_wr_sel_retr_2[5] .INIT=4'h8; // @46:10186 CFG2 \gen_debug_csr_ctrl_pipeline.un3_ex_retr_pipe_sw_csr_wr_op_retr ( .A(cpu_debug_csr_op_valid_net), .B(cpu_debug_csr_wr_en_net), .Y(un3_ex_retr_pipe_sw_csr_wr_op_retr) ); defparam \gen_debug_csr_ctrl_pipeline.un3_ex_retr_pipe_sw_csr_wr_op_retr .INIT=4'h8; // @46:10196 CFG3 \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_addr_retr_2[0] ( .A(trace_priv_i), .B(de_ex_pipe_sw_csr_addr_ex_Z[0]), .C(cpu_debug_csr_op_addr_net[0]), .Y(ex_retr_pipe_sw_csr_addr_retr_2[0]) ); defparam \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_addr_retr_2[0] .INIT=8'hE4; // @46:10196 CFG3 \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_addr_retr_2[1] ( .A(trace_priv_i), .B(de_ex_pipe_sw_csr_addr_ex_Z[1]), .C(cpu_debug_csr_op_addr_net[1]), .Y(ex_retr_pipe_sw_csr_addr_retr_2[1]) ); defparam \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_addr_retr_2[1] .INIT=8'hE4; // @46:9639 CFG3 un4_exu_res_req_retr ( .A(exu_result_mux_sel[1]), .B(exu_result_mux_sel[2]), .C(exu_result_mux_sel[0]), .Y(exu_mux_result34) ); defparam un4_exu_res_req_retr.INIT=8'h80; // @46:8081 CFG3 \gen_debug_csr_ctrl_pipeline.un4_ex_retr_pipe_sw_csr_rd_op_retr ( .A(cpu_debug_csr_op_valid_net), .B(cpu_debug_csr_rd_en_net), .C(trace_priv_i), .Y(un4_ex_retr_pipe_sw_csr_rd_op_retr) ); defparam \gen_debug_csr_ctrl_pipeline.un4_ex_retr_pipe_sw_csr_rd_op_retr .INIT=8'h80; // @46:10352 CFG3 \ex_retr_pipe_lsu_op_retr_1[0] ( .A(ex_retr_pipe_lsu_op_retr9), .B(un1_ex_retr_pipe_lsu_op_retr_i_0), .C(lsu_op_ex_pipe_reg_Z[0]), .Y(ex_retr_pipe_lsu_op_retr_1_Z[0]) ); defparam \ex_retr_pipe_lsu_op_retr_1[0] .INIT=8'hD0; // @46:10352 CFG3 \ex_retr_pipe_lsu_op_retr_1[1] ( .A(ex_retr_pipe_lsu_op_retr9), .B(un1_ex_retr_pipe_lsu_op_retr_i_0), .C(lsu_op_ex_pipe_reg_Z[1]), .Y(ex_retr_pipe_lsu_op_retr_1_Z[1]) ); defparam \ex_retr_pipe_lsu_op_retr_1[1] .INIT=8'hD0; // @46:10352 CFG3 \ex_retr_pipe_lsu_op_retr_1[2] ( .A(ex_retr_pipe_lsu_op_retr9), .B(un1_ex_retr_pipe_lsu_op_retr_i_0), .C(lsu_op_ex_pipe_reg_Z[2]), .Y(ex_retr_pipe_lsu_op_retr_1_Z[2]) ); defparam \ex_retr_pipe_lsu_op_retr_1[2] .INIT=8'hD0; // @46:10352 CFG3 \ex_retr_pipe_lsu_op_retr_1[3] ( .A(ex_retr_pipe_lsu_op_retr9), .B(un1_ex_retr_pipe_lsu_op_retr_i_0), .C(lsu_op_ex_pipe_reg_Z[3]), .Y(ex_retr_pipe_lsu_op_retr_1_Z[3]) ); defparam \ex_retr_pipe_lsu_op_retr_1[3] .INIT=8'hD0; // @46:10188 CFG3 \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_rd_op_retr_2_iv ( .A(de_ex_pipe_sw_csr_rd_op_ex_Z), .B(un4_ex_retr_pipe_sw_csr_rd_op_retr), .C(un1_ex_retr_pipe_lsu_op_retr_i_0), .Y(ex_retr_pipe_sw_csr_rd_op_retr_2) ); defparam \gen_debug_csr_ctrl_pipeline.ex_retr_pipe_sw_csr_rd_op_retr_2_iv .INIT=8'hEC; // @46:9833 CFG4 \gen_pipe_debug_enter_req_ex_retr.un1_ex_retr_pipe_curr_pc_retr ( .A(de_ex_pipe_debug_enter_req_ex), .B(de_ex_pipe_implicit_pseudo_instr_ex_Z), .C(un3_branch_cond_ex[0]), .D(un3_branch_cond_ex[1]), .Y(un1_ex_retr_pipe_curr_pc_retr) ); defparam \gen_pipe_debug_enter_req_ex_retr.un1_ex_retr_pipe_curr_pc_retr .INIT=16'h0080; // @46:9395 CFG4 \de_ex_pipe_alu_op_sel_ex_1[3] ( .A(rv32m_dec_alu_op_sel_m_1[0]), .B(rv32m_dec_mnemonic847), .C(de_ex_pipe_alu_op_sel_ex7), .D(instr_accepted_ex), .Y(de_ex_pipe_alu_op_sel_ex_1_Z[3]) ); defparam \de_ex_pipe_alu_op_sel_ex_1[3] .INIT=16'h2202; // @46:9833 CFG3 \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[31] ( .A(un1_ex_retr_pipe_curr_pc_retr), .B(cpu_d_req_addr_net[31]), .C(de_ex_pipe_curr_pc_ex[31]), .Y(ex_retr_pipe_curr_pc_retr_2[31]) ); defparam \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[31] .INIT=8'hD8; // @46:9833 CFG3 \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[30] ( .A(un1_ex_retr_pipe_curr_pc_retr), .B(cpu_d_req_addr_net[30]), .C(de_ex_pipe_curr_pc_ex[30]), .Y(ex_retr_pipe_curr_pc_retr_2[30]) ); defparam \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[30] .INIT=8'hD8; // @46:9833 CFG3 \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[29] ( .A(un1_ex_retr_pipe_curr_pc_retr), .B(cpu_d_req_addr_net[29]), .C(de_ex_pipe_curr_pc_ex[29]), .Y(ex_retr_pipe_curr_pc_retr_2[29]) ); defparam \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[29] .INIT=8'hD8; // @46:9833 CFG3 \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[27] ( .A(un1_ex_retr_pipe_curr_pc_retr), .B(cpu_d_req_addr_net[27]), .C(de_ex_pipe_curr_pc_ex[27]), .Y(ex_retr_pipe_curr_pc_retr_2[27]) ); defparam \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[27] .INIT=8'hD8; // @46:9833 CFG3 \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[26] ( .A(un1_ex_retr_pipe_curr_pc_retr), .B(cpu_d_req_addr_net[26]), .C(de_ex_pipe_curr_pc_ex[26]), .Y(ex_retr_pipe_curr_pc_retr_2[26]) ); defparam \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[26] .INIT=8'hD8; // @46:9833 CFG3 \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[25] ( .A(un1_ex_retr_pipe_curr_pc_retr), .B(cpu_d_req_addr_net[25]), .C(de_ex_pipe_curr_pc_ex[25]), .Y(ex_retr_pipe_curr_pc_retr_2[25]) ); defparam \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[25] .INIT=8'hD8; // @46:9833 CFG3 \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[24] ( .A(un1_ex_retr_pipe_curr_pc_retr), .B(cpu_d_req_addr_net[24]), .C(de_ex_pipe_curr_pc_ex[24]), .Y(ex_retr_pipe_curr_pc_retr_2[24]) ); defparam \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[24] .INIT=8'hD8; // @46:9833 CFG3 \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[23] ( .A(un1_ex_retr_pipe_curr_pc_retr), .B(cpu_d_req_addr_net[23]), .C(de_ex_pipe_curr_pc_ex[23]), .Y(ex_retr_pipe_curr_pc_retr_2[23]) ); defparam \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[23] .INIT=8'hD8; // @46:9833 CFG3 \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[22] ( .A(un1_ex_retr_pipe_curr_pc_retr), .B(cpu_d_req_addr_net[22]), .C(de_ex_pipe_curr_pc_ex[22]), .Y(ex_retr_pipe_curr_pc_retr_2[22]) ); defparam \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[22] .INIT=8'hD8; // @46:9833 CFG3 \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[21] ( .A(un1_ex_retr_pipe_curr_pc_retr), .B(cpu_d_req_addr_net[21]), .C(de_ex_pipe_curr_pc_ex[21]), .Y(ex_retr_pipe_curr_pc_retr_2[21]) ); defparam \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[21] .INIT=8'hD8; // @46:9833 CFG3 \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[20] ( .A(un1_ex_retr_pipe_curr_pc_retr), .B(cpu_d_req_addr_net[20]), .C(de_ex_pipe_curr_pc_ex[20]), .Y(ex_retr_pipe_curr_pc_retr_2[20]) ); defparam \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[20] .INIT=8'hD8; // @46:9833 CFG3 \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[19] ( .A(un1_ex_retr_pipe_curr_pc_retr), .B(cpu_d_req_addr_net[19]), .C(de_ex_pipe_curr_pc_ex[19]), .Y(ex_retr_pipe_curr_pc_retr_2[19]) ); defparam \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[19] .INIT=8'hD8; // @46:9833 CFG3 \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[18] ( .A(un1_ex_retr_pipe_curr_pc_retr), .B(cpu_d_req_addr_net[18]), .C(de_ex_pipe_curr_pc_ex[18]), .Y(ex_retr_pipe_curr_pc_retr_2[18]) ); defparam \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[18] .INIT=8'hD8; // @46:9833 CFG3 \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[17] ( .A(un1_ex_retr_pipe_curr_pc_retr), .B(cpu_d_req_addr_net[17]), .C(de_ex_pipe_curr_pc_ex[17]), .Y(ex_retr_pipe_curr_pc_retr_2[17]) ); defparam \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[17] .INIT=8'hD8; // @46:9833 CFG3 \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[15] ( .A(un1_ex_retr_pipe_curr_pc_retr), .B(cpu_d_req_addr_net[15]), .C(de_ex_pipe_curr_pc_ex[15]), .Y(ex_retr_pipe_curr_pc_retr_2[15]) ); defparam \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[15] .INIT=8'hD8; // @46:9833 CFG3 \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[14] ( .A(un1_ex_retr_pipe_curr_pc_retr), .B(cpu_d_req_addr_net[14]), .C(de_ex_pipe_curr_pc_ex[14]), .Y(ex_retr_pipe_curr_pc_retr_2[14]) ); defparam \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[14] .INIT=8'hD8; // @46:9833 CFG3 \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[13] ( .A(un1_ex_retr_pipe_curr_pc_retr), .B(cpu_d_req_addr_net[13]), .C(de_ex_pipe_curr_pc_ex[13]), .Y(ex_retr_pipe_curr_pc_retr_2[13]) ); defparam \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[13] .INIT=8'hD8; // @46:9833 CFG3 \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[11] ( .A(un1_ex_retr_pipe_curr_pc_retr), .B(cpu_d_req_addr_net[11]), .C(de_ex_pipe_curr_pc_ex[11]), .Y(ex_retr_pipe_curr_pc_retr_2[11]) ); defparam \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[11] .INIT=8'hD8; // @46:9833 CFG3 \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[10] ( .A(un1_ex_retr_pipe_curr_pc_retr), .B(cpu_d_req_addr_net[10]), .C(de_ex_pipe_curr_pc_ex[10]), .Y(ex_retr_pipe_curr_pc_retr_2[10]) ); defparam \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[10] .INIT=8'hD8; // @46:9833 CFG3 \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[7] ( .A(un1_ex_retr_pipe_curr_pc_retr), .B(cpu_d_req_addr_net[7]), .C(de_ex_pipe_curr_pc_ex[7]), .Y(ex_retr_pipe_curr_pc_retr_2[7]) ); defparam \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[7] .INIT=8'hD8; // @46:9833 CFG3 \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[6] ( .A(un1_ex_retr_pipe_curr_pc_retr), .B(cpu_d_req_addr_net[6]), .C(de_ex_pipe_curr_pc_ex[6]), .Y(ex_retr_pipe_curr_pc_retr_2[6]) ); defparam \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[6] .INIT=8'hD8; // @46:9833 CFG3 \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[5] ( .A(un1_ex_retr_pipe_curr_pc_retr), .B(cpu_d_req_addr_net[5]), .C(de_ex_pipe_curr_pc_ex[5]), .Y(ex_retr_pipe_curr_pc_retr_2[5]) ); defparam \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[5] .INIT=8'hD8; // @46:9833 CFG3 \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[4] ( .A(un1_ex_retr_pipe_curr_pc_retr), .B(cpu_d_req_addr_net[4]), .C(de_ex_pipe_curr_pc_ex[4]), .Y(ex_retr_pipe_curr_pc_retr_2[4]) ); defparam \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[4] .INIT=8'hD8; // @46:9833 CFG3 \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[3] ( .A(un1_ex_retr_pipe_curr_pc_retr), .B(cpu_d_req_addr_net[3]), .C(de_ex_pipe_curr_pc_ex[3]), .Y(ex_retr_pipe_curr_pc_retr_2[3]) ); defparam \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[3] .INIT=8'hD8; // @46:9833 CFG3 \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[16] ( .A(un1_ex_retr_pipe_curr_pc_retr), .B(cpu_d_req_addr_net[16]), .C(de_ex_pipe_curr_pc_ex[16]), .Y(ex_retr_pipe_curr_pc_retr_2[16]) ); defparam \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[16] .INIT=8'hD8; // @46:9833 CFG3 \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[9] ( .A(un1_ex_retr_pipe_curr_pc_retr), .B(cpu_d_req_addr_net[9]), .C(de_ex_pipe_curr_pc_ex[9]), .Y(ex_retr_pipe_curr_pc_retr_2[9]) ); defparam \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[9] .INIT=8'hD8; // @46:9833 CFG3 \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[8] ( .A(un1_ex_retr_pipe_curr_pc_retr), .B(cpu_d_req_addr_net[8]), .C(de_ex_pipe_curr_pc_ex[8]), .Y(ex_retr_pipe_curr_pc_retr_2[8]) ); defparam \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[8] .INIT=8'hD8; // @46:9833 CFG3 \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[28] ( .A(un1_ex_retr_pipe_curr_pc_retr), .B(cpu_d_req_addr_net[28]), .C(de_ex_pipe_curr_pc_ex[28]), .Y(ex_retr_pipe_curr_pc_retr_2[28]) ); defparam \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[28] .INIT=8'hD8; // @46:9833 CFG3 \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[12] ( .A(un1_ex_retr_pipe_curr_pc_retr), .B(cpu_d_req_addr_net[12]), .C(de_ex_pipe_curr_pc_ex[12]), .Y(ex_retr_pipe_curr_pc_retr_2[12]) ); defparam \gen_pipe_debug_enter_req_ex_retr.ex_retr_pipe_curr_pc_retr_2[12] .INIT=8'hD8; // @46:9510 CFG3 \de_ex_pipe_branch_cond_ex_1[1] ( .A(de_ex_pipe_bcu_op_sel_ex7), .B(branch_cond_de[1]), .C(instr_accepted_ex), .Y(de_ex_pipe_branch_cond_ex_1_Z[1]) ); defparam \de_ex_pipe_branch_cond_ex_1[1] .INIT=8'hC4; // @46:9612 CFG3 \de_ex_pipe_lsu_op_ex_1[2] ( .A(lsu_op_de[2]), .B(instr_accepted_ex), .C(de_ex_pipe_lsu_op_ex7), .Y(de_ex_pipe_lsu_op_ex_1_Z[2]) ); defparam \de_ex_pipe_lsu_op_ex_1[2] .INIT=8'h8A; // @46:9612 CFG3 \de_ex_pipe_lsu_op_ex_1[3] ( .A(lsu_op_de[3]), .B(instr_accepted_ex), .C(de_ex_pipe_lsu_op_ex7), .Y(de_ex_pipe_lsu_op_ex_1_Z[3]) ); defparam \de_ex_pipe_lsu_op_ex_1[3] .INIT=8'h8A; // @46:9510 CFG4 \de_ex_pipe_branch_cond_ex_1[0] ( .A(rv32c_dec_branch_cond_m[0]), .B(branch_cond_iv_0[0]), .C(de_ex_pipe_bcu_op_sel_ex7), .D(instr_accepted_ex), .Y(de_ex_pipe_branch_cond_ex_1_Z[0]) ); defparam \de_ex_pipe_branch_cond_ex_1[0] .INIT=16'hEE0E; // @46:9406 CFG4 \de_ex_pipe_shifter_unit_op_sel_ex_1[1] ( .A(un1_instruction_27), .B(rv32i_dec_shifter_unit_op_sel_m[1]), .C(case_dec_gpr_rs2_rd_sel_2_sqmuxa), .D(N_164), .Y(de_ex_pipe_shifter_unit_op_sel_ex_1_Z[1]) ); defparam \de_ex_pipe_shifter_unit_op_sel_ex_1[1] .INIT=16'h00EC; // @46:9395 CFG4 \de_ex_pipe_alu_op_sel_ex_1[0] ( .A(rv32m_dec_alu_op_sel_m_1[0]), .B(rv32m_dec_alu_op_sel_m_0[0]), .C(N_167), .D(alu_op_sel_1_iv_0[0]), .Y(de_ex_pipe_alu_op_sel_ex_1_Z[0]) ); defparam \de_ex_pipe_alu_op_sel_ex_1[0] .INIT=16'h0F08; // @46:9395 CFG4 \de_ex_pipe_alu_op_sel_ex_1[1] ( .A(rv32c_dec_alu_op_sel[1]), .B(alu_op_sel_1_iv_0[1]), .C(case_dec_gpr_rs2_rd_sel_2_sqmuxa), .D(N_167), .Y(de_ex_pipe_alu_op_sel_ex_1_Z[1]) ); defparam \de_ex_pipe_alu_op_sel_ex_1[1] .INIT=16'h00EC; // @46:9612 CFG3 \de_ex_pipe_lsu_op_ex_1[1] ( .A(lsu_op_de[1]), .B(instr_accepted_ex), .C(de_ex_pipe_lsu_op_ex7), .Y(de_ex_pipe_lsu_op_ex_1_Z[1]) ); defparam \de_ex_pipe_lsu_op_ex_1[1] .INIT=8'h8A; // @46:9612 CFG3 \de_ex_pipe_lsu_op_ex_1[0] ( .A(lsu_op_de[0]), .B(instr_accepted_ex), .C(de_ex_pipe_lsu_op_ex7), .Y(de_ex_pipe_lsu_op_ex_1_Z[0]) ); defparam \de_ex_pipe_lsu_op_ex_1[0] .INIT=8'h8A; // @46:9406 CFG4 \de_ex_pipe_shifter_unit_op_sel_ex_1[0] ( .A(rv32i_dec_shifter_unit_op_sel[0]), .B(case_dec_gpr_rs2_rd_sel_0_sqmuxa), .C(rv32c_dec_shifter_unit_op_sel_m[0]), .D(N_164), .Y(de_ex_pipe_shifter_unit_op_sel_ex_1_Z[0]) ); defparam \de_ex_pipe_shifter_unit_op_sel_ex_1[0] .INIT=16'h00F8; // @46:8776 CFG4 \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[31] ( .A(ifu_expipe_resp_ireg_vaddr_net_29), .B(apb_i_req_addr_net[31]), .C(un1_ifu_expipe_resp_next_vaddr), .D(force_debug_nop_de), .Y(de_ex_pipe_curr_pc_ex_2[31]) ); defparam \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[31] .INIT=16'hCAAA; // @46:8776 CFG4 \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[30] ( .A(ifu_expipe_resp_ireg_vaddr_net_28), .B(apb_i_req_addr_net[30]), .C(un1_ifu_expipe_resp_next_vaddr), .D(force_debug_nop_de), .Y(de_ex_pipe_curr_pc_ex_2[30]) ); defparam \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[30] .INIT=16'hCAAA; // @46:8776 CFG4 \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[22] ( .A(N_373), .B(apb_i_req_addr_net[22]), .C(un1_ifu_expipe_resp_next_vaddr), .D(force_debug_nop_de), .Y(de_ex_pipe_curr_pc_ex_2[22]) ); defparam \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[22] .INIT=16'hCAAA; // @46:8776 CFG4 \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[3] ( .A(ifu_expipe_resp_ireg_vaddr_net_1), .B(apb_i_req_addr_net[3]), .C(un1_ifu_expipe_resp_next_vaddr), .D(force_debug_nop_de), .Y(de_ex_pipe_curr_pc_ex_2[3]) ); defparam \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[3] .INIT=16'hCAAA; // @46:8776 CFG4 \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[20] ( .A(N_375), .B(apb_i_req_addr_net[20]), .C(un1_ifu_expipe_resp_next_vaddr), .D(force_debug_nop_de), .Y(de_ex_pipe_curr_pc_ex_2[20]) ); defparam \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[20] .INIT=16'hCAAA; // @46:8776 CFG4 \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[15] ( .A(ifu_expipe_resp_ireg_vaddr_net_13), .B(apb_i_req_addr_net[15]), .C(un1_ifu_expipe_resp_next_vaddr), .D(force_debug_nop_de), .Y(de_ex_pipe_curr_pc_ex_2[15]) ); defparam \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[15] .INIT=16'hCAAA; // @46:8776 CFG4 \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[24] ( .A(N_371), .B(apb_i_req_addr_net[24]), .C(un1_ifu_expipe_resp_next_vaddr), .D(force_debug_nop_de), .Y(de_ex_pipe_curr_pc_ex_2[24]) ); defparam \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[24] .INIT=16'hCAAA; // @46:8776 CFG4 \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[14] ( .A(N_380), .B(apb_i_req_addr_net[14]), .C(un1_ifu_expipe_resp_next_vaddr), .D(force_debug_nop_de), .Y(de_ex_pipe_curr_pc_ex_2[14]) ); defparam \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[14] .INIT=16'hCAAA; // @46:8776 CFG4 \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[19] ( .A(N_376), .B(apb_i_req_addr_net[19]), .C(un1_ifu_expipe_resp_next_vaddr), .D(force_debug_nop_de), .Y(de_ex_pipe_curr_pc_ex_2[19]) ); defparam \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[19] .INIT=16'hCAAA; // @46:8776 CFG4 \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[21] ( .A(N_374), .B(apb_i_req_addr_net[21]), .C(un1_ifu_expipe_resp_next_vaddr), .D(force_debug_nop_de), .Y(de_ex_pipe_curr_pc_ex_2[21]) ); defparam \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[21] .INIT=16'hCAAA; // @46:8776 CFG4 \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[2] ( .A(ifu_expipe_resp_ireg_vaddr_net_0), .B(apb_i_req_addr_net[2]), .C(un1_ifu_expipe_resp_next_vaddr), .D(force_debug_nop_de), .Y(de_ex_pipe_curr_pc_ex_2[2]) ); defparam \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[2] .INIT=16'hCAAA; // @46:8776 CFG4 \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[4] ( .A(ifu_expipe_resp_ireg_vaddr_net_2), .B(apb_i_req_addr_net[4]), .C(un1_ifu_expipe_resp_next_vaddr), .D(force_debug_nop_de), .Y(de_ex_pipe_curr_pc_ex_2[4]) ); defparam \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[4] .INIT=16'hCAAA; // @46:8776 CFG4 \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[25] ( .A(N_370), .B(apb_i_req_addr_net[25]), .C(un1_ifu_expipe_resp_next_vaddr), .D(force_debug_nop_de), .Y(de_ex_pipe_curr_pc_ex_2[25]) ); defparam \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[25] .INIT=16'hCAAA; // @46:8776 CFG4 \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[6] ( .A(ifu_expipe_resp_ireg_vaddr_net_4), .B(apb_i_req_addr_net[6]), .C(un1_ifu_expipe_resp_next_vaddr), .D(force_debug_nop_de), .Y(de_ex_pipe_curr_pc_ex_2[6]) ); defparam \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[6] .INIT=16'hCAAA; // @46:8776 CFG4 \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[26] ( .A(N_369), .B(apb_i_req_addr_net[26]), .C(un1_ifu_expipe_resp_next_vaddr), .D(force_debug_nop_de), .Y(de_ex_pipe_curr_pc_ex_2[26]) ); defparam \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[26] .INIT=16'hCAAA; // @46:8776 CFG4 \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[28] ( .A(N_367), .B(apb_i_req_addr_net[28]), .C(un1_ifu_expipe_resp_next_vaddr), .D(force_debug_nop_de), .Y(de_ex_pipe_curr_pc_ex_2[28]) ); defparam \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[28] .INIT=16'hCAAA; // @46:8776 CFG4 \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[5] ( .A(ifu_expipe_resp_ireg_vaddr_net_3), .B(apb_i_req_addr_net[5]), .C(un1_ifu_expipe_resp_next_vaddr), .D(force_debug_nop_de), .Y(de_ex_pipe_curr_pc_ex_2[5]) ); defparam \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[5] .INIT=16'hCAAA; // @46:8776 CFG4 \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[7] ( .A(ifu_expipe_resp_ireg_vaddr_net_5), .B(apb_i_req_addr_net[7]), .C(un1_ifu_expipe_resp_next_vaddr), .D(force_debug_nop_de), .Y(de_ex_pipe_curr_pc_ex_2[7]) ); defparam \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[7] .INIT=16'hCAAA; // @46:8776 CFG4 \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[12] ( .A(N_382), .B(apb_i_req_addr_net[12]), .C(un1_ifu_expipe_resp_next_vaddr), .D(force_debug_nop_de), .Y(de_ex_pipe_curr_pc_ex_2[12]) ); defparam \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[12] .INIT=16'hCAAA; // @46:8776 CFG4 \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[8] ( .A(ifu_expipe_resp_ireg_vaddr_net_6), .B(apb_i_req_addr_net[8]), .C(un1_ifu_expipe_resp_next_vaddr), .D(force_debug_nop_de), .Y(de_ex_pipe_curr_pc_ex_2[8]) ); defparam \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[8] .INIT=16'hCAAA; // @46:8776 CFG4 \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[9] ( .A(ifu_expipe_resp_ireg_vaddr_net_7), .B(apb_i_req_addr_net[9]), .C(un1_ifu_expipe_resp_next_vaddr), .D(force_debug_nop_de), .Y(de_ex_pipe_curr_pc_ex_2[9]) ); defparam \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[9] .INIT=16'hCAAA; // @46:8776 CFG4 \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[23] ( .A(N_372), .B(apb_i_req_addr_net[23]), .C(un1_ifu_expipe_resp_next_vaddr), .D(force_debug_nop_de), .Y(de_ex_pipe_curr_pc_ex_2[23]) ); defparam \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[23] .INIT=16'hCAAA; // @46:8776 CFG4 \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[27] ( .A(N_368), .B(apb_i_req_addr_net[27]), .C(un1_ifu_expipe_resp_next_vaddr), .D(force_debug_nop_de), .Y(de_ex_pipe_curr_pc_ex_2[27]) ); defparam \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[27] .INIT=16'hCAAA; // @46:8776 CFG4 \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[13] ( .A(N_381), .B(apb_i_req_addr_net[13]), .C(un1_ifu_expipe_resp_next_vaddr), .D(force_debug_nop_de), .Y(de_ex_pipe_curr_pc_ex_2[13]) ); defparam \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[13] .INIT=16'hCAAA; // @46:8776 CFG4 \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[11] ( .A(N_383), .B(apb_i_req_addr_net[11]), .C(un1_ifu_expipe_resp_next_vaddr), .D(force_debug_nop_de), .Y(de_ex_pipe_curr_pc_ex_2[11]) ); defparam \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[11] .INIT=16'hCAAA; // @46:8776 CFG4 \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[16] ( .A(N_379), .B(apb_i_req_addr_net[16]), .C(un1_ifu_expipe_resp_next_vaddr), .D(force_debug_nop_de), .Y(de_ex_pipe_curr_pc_ex_2[16]) ); defparam \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[16] .INIT=16'hCAAA; // @46:8776 CFG4 \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[17] ( .A(N_378), .B(apb_i_req_addr_net[17]), .C(un1_ifu_expipe_resp_next_vaddr), .D(force_debug_nop_de), .Y(de_ex_pipe_curr_pc_ex_2[17]) ); defparam \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[17] .INIT=16'hCAAA; // @46:8776 CFG4 \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[10] ( .A(ifu_expipe_resp_ireg_vaddr_net_8), .B(apb_i_req_addr_net[10]), .C(un1_ifu_expipe_resp_next_vaddr), .D(force_debug_nop_de), .Y(de_ex_pipe_curr_pc_ex_2[10]) ); defparam \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[10] .INIT=16'hCAAA; // @46:8776 CFG4 \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[18] ( .A(N_377), .B(apb_i_req_addr_net[18]), .C(un1_ifu_expipe_resp_next_vaddr), .D(force_debug_nop_de), .Y(de_ex_pipe_curr_pc_ex_2[18]) ); defparam \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[18] .INIT=16'hCAAA; // @46:8776 CFG4 \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[29] ( .A(N_298), .B(apb_i_req_addr_net[29]), .C(un1_ifu_expipe_resp_next_vaddr), .D(force_debug_nop_de), .Y(de_ex_pipe_curr_pc_ex_2[29]) ); defparam \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[29] .INIT=16'hC555; // @46:8776 CFG4 \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[1] ( .A(next_req_fetch_ptr_0), .B(N_306), .C(force_debug_nop_de), .D(un1_ifu_expipe_resp_next_vaddr), .Y(de_ex_pipe_curr_pc_ex_2[1]) ); defparam \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[1] .INIT=16'hACCC; // @46:8776 CFG4 \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[0] ( .A(N_424), .B(N_292), .C(un1_ifu_expipe_resp_next_vaddr), .D(force_debug_nop_de), .Y(de_ex_pipe_curr_pc_ex_2[0]) ); defparam \gen_pipe_debug_enter_req_de_ex.de_ex_pipe_curr_pc_ex_2[0] .INIT=16'h3555; // @46:8300 miv_rv32_idecode_1_1s_1s_0s u_idecode_0 ( .un1_next_stage_state_ex_i_0(un1_next_stage_state_ex_i[0]), .apb_i_req_addr_net_18(apb_i_req_addr_net[30]), .apb_i_req_addr_net_2(apb_i_req_addr_net[14]), .apb_i_req_addr_net_1(apb_i_req_addr_net[13]), .apb_i_req_addr_net_0(apb_i_req_addr_net[12]), .apb_i_req_addr_net_3(apb_i_req_addr_net[15]), .apb_i_req_addr_net_8(apb_i_req_addr_net[20]), .de_ex_pipe_operand0_mux_sel_ex_0(de_ex_pipe_operand0_mux_sel_ex_Z[0]), .next_req_fetch_ptr_yy_0(next_req_fetch_ptr_yy_0), .next_req_fetch_ptr_xx_0(next_req_fetch_ptr_xx_0), .immediate_de({immediate_de[31:25], N_15112, N_15111, immediate_de[22], N_15110, immediate_de[20:0]}), .gpr_wr_sel_de(gpr_wr_sel_de[4:0]), .gpr_rs1_rd_sel_de(gpr_rs1_rd_sel_de[4:0]), .de_ex_pipe_gpr_rs2_rd_sel_ex_2(de_ex_pipe_gpr_rs2_rd_sel_ex_2[4:0]), .gpr_wr_data_retr(gpr_wr_data_retr[31:0]), .ex_retr_pipe_exu_result_retr(ex_retr_pipe_exu_result_retr[31:0]), .cpu_debug_csr_op_rd_data_net(cpu_debug_csr_op_rd_data_net[31:0]), .lsu_expipe_resp_rd_data_net({lsu_expipe_resp_rd_data_net[31:15], N_15115, lsu_expipe_resp_rd_data_net[13], N_15114, lsu_expipe_resp_rd_data_net[11:9], N_15113, lsu_expipe_resp_rd_data_net[7:0]}), .un1_next_stage_state_retr_i_0(un1_next_stage_state_retr_i[0]), .sw_csr_addr_de(sw_csr_addr_de[11:0]), .ifu_expipe_resp_ireg_net(ifu_expipe_resp_ireg_net[31:16]), .sw_csr_addr_de_1_0(sw_csr_addr_de_1[1]), .bcu_operand0_mux_sel_1_iv_i_0(bcu_operand0_mux_sel_1_iv_i[0]), .shifter_unit_places_sel_de(shifter_unit_places_sel_de[2:0]), .exu_result_mux_sel_de(exu_result_mux_sel_de[2:0]), .operand1_mux_sel_de(operand1_mux_sel_de[1:0]), .lsu_op_de(lsu_op_de[3:0]), .gpr_wr_mux_sel_de(gpr_wr_mux_sel_de[1:0]), .alu_op_sel_1_iv_0(alu_op_sel_1_iv_0[1:0]), .rv32i_dec_shifter_unit_op_sel_m_0(rv32i_dec_shifter_unit_op_sel_m[1]), .branch_cond_iv_0_0(branch_cond_iv_0[0]), .operand0_mux_sel_de_0(operand0_mux_sel_de[0]), .rv32c_dec_shifter_unit_op_sel_m_0(rv32c_dec_shifter_unit_op_sel_m[0]), .rv32c_dec_alu_op_sel_0_d0(rv32c_dec_alu_op_sel[1]), .ex_retr_pipe_curr_pc_retr_2(ex_retr_pipe_curr_pc_retr_2[2:0]), .de_ex_pipe_curr_pc_ex(de_ex_pipe_curr_pc_ex[2:0]), .cpu_d_req_addr_net(cpu_d_req_addr_net[2:1]), .shifter_unit_operand_sel_de_0(shifter_unit_operand_sel_de[1]), .branch_cond_de_0(branch_cond_de[1]), .rv32c_dec_branch_cond_m_0(rv32c_dec_branch_cond_m[0]), .ex_retr_pipe_sw_csr_wr_op_retr_2(ex_retr_pipe_sw_csr_wr_op_retr_2[1:0]), .lsu_op_ex_pipe_reg(lsu_op_ex_pipe_reg_Z[3:0]), .bcu_operand1_mux_sel_de(bcu_operand1_mux_sel_de[1:0]), .ex_retr_pipe_sw_csr_addr_retr(ex_retr_pipe_sw_csr_addr_retr[11:2]), .de_ex_pipe_trigger_ex(de_ex_pipe_trigger_ex[1:0]), .shifter_operand_sel(shifter_operand_sel[1:0]), .shifter_unit_places_sel_0(shifter_unit_places_sel[1]), .de_ex_pipe_shifter_unit_places_sel_ex_0(de_ex_pipe_shifter_unit_places_sel_ex_Z[0]), .de_ex_pipe_alu_op_sel_ex(de_ex_pipe_alu_op_sel_ex_Z[4:0]), .ex_retr_pipe_sw_csr_wr_op_retr(ex_retr_pipe_sw_csr_wr_op_retr[1:0]), .ex_retr_pipe_gpr_wr_mux_sel_retr_2_0(ex_retr_pipe_gpr_wr_mux_sel_retr_2[1]), .de_ex_pipe_gpr_wr_mux_sel_ex_0(de_ex_pipe_gpr_wr_mux_sel_ex_Z[1]), .ex_retr_pipe_gpr_wr_sel_retr(ex_retr_pipe_gpr_wr_sel_retr[5:0]), .de_ex_pipe_gpr_rs2_rd_sel_ex(de_ex_pipe_gpr_rs2_rd_sel_ex[5:0]), .ex_retr_pipe_lsu_op_retr(ex_retr_pipe_lsu_op_retr_Z[3:0]), .ex_retr_pipe_gpr_wr_sel_retr_2(ex_retr_pipe_gpr_wr_sel_retr_2[4:0]), .cpu_debug_gpr_op_addr_net(cpu_debug_gpr_op_addr_net[4:0]), .de_ex_pipe_gpr_wr_sel_ex(de_ex_pipe_gpr_wr_sel_ex_Z[4:0]), .ex_retr_pipe_sw_csr_addr_retr_2(ex_retr_pipe_sw_csr_addr_retr_2[11:2]), .de_ex_pipe_sw_csr_addr_ex(de_ex_pipe_sw_csr_addr_ex_Z[11:2]), .cpu_debug_csr_op_addr_net(cpu_debug_csr_op_addr_net[11:2]), .rv32m_dec_alu_op_sel_m_1_0(rv32m_dec_alu_op_sel_m_1[0]), .shifter_unit_op_sel(shifter_unit_op_sel[1:0]), .de_ex_pipe_shifter_unit_op_sel_ex(de_ex_pipe_shifter_unit_op_sel_ex_Z[1:0]), .lsu_expipe_req_op_net(lsu_expipe_req_op_net[3:0]), .de_ex_pipe_lsu_op_ex(de_ex_pipe_lsu_op_ex_Z[3:0]), .de_ex_pipe_sw_csr_wr_op_ex(de_ex_pipe_sw_csr_wr_op_ex_Z[1:0]), .rv32i_dec_alu_op_sel_m_0_0(rv32i_dec_alu_op_sel_m_0[2]), .rv32i_dec_alu_op_sel_m_0_2(rv32i_dec_alu_op_sel_m_0[4]), .rv32m_dec_alu_op_sel_m_0_0(rv32m_dec_alu_op_sel_m_0[0]), .req_buff_resp_state_1_(req_buff_resp_state_1_[3:0]), .req_buff_resp_state_valid(req_buff_resp_state_valid[1:0]), .req_buff_fence_os_0(req_buff_fence_os_0), .rv32i_dec_shifter_unit_op_sel_0(rv32i_dec_shifter_unit_op_sel[0]), .de_ex_pipe_operand1_mux_sel_ex(de_ex_pipe_operand1_mux_sel_ex_Z[1:0]), .rv32c_dec_alu_op_sel_0_0(rv32c_dec_alu_op_sel_0[2]), .un3_branch_cond_ex(un3_branch_cond_ex[1:0]), .req_masked(req_masked[1:0]), .sw_csr_wr_op_de(sw_csr_wr_op_de[1:0]), .ex_retr_pipe_gpr_wr_mux_sel_retr(ex_retr_pipe_gpr_wr_mux_sel_retr[1:0]), .un2_next_stage_state_de_1z(un2_next_stage_state_de), .next_stage_state_de_1_sqmuxa_i(next_stage_state_de_1_sqmuxa_i), .ifu_expipe_resp_ready_net(ifu_expipe_resp_ready_net), .de_ex_pipe_gpr_rs1_rd_valid_ex6(de_ex_pipe_gpr_rs1_rd_valid_ex6), .de_ex_pipe_gpr_rs2_rd_valid_ex9(de_ex_pipe_gpr_rs2_rd_valid_ex9), .de_ex_pipe_gpr_rs3_rd_valid_ex9(de_ex_pipe_gpr_rs3_rd_valid_ex9), .de_ex_pipe_bcu_op_sel_ex7_1z(de_ex_pipe_bcu_op_sel_ex7), .de_ex_pipe_alu_op_sel_ex7_0(de_ex_pipe_alu_op_sel_ex7_0), .un2_cpu_i_req_ready(un2_cpu_i_req_ready), .de_ex_pipe_lsu_op_ex7_1z(de_ex_pipe_lsu_op_ex7), .cpu_i_req_is_tcm0_5(cpu_i_req_is_tcm0_5), .cpu_m1_e_1(cpu_m1_e_1), .un8_cpu_i_req_is_tcm0lt19_12(un8_cpu_i_req_is_tcm0lt19_12), .cpu_i_req_is_tcm0_4_2(cpu_i_req_is_tcm0_4_2), .gen_m3(gen_m3), .ifu_expipe_req_branch_excpt_req_valid_net(ifu_expipe_req_branch_excpt_req_valid_net), .exu_update_result_reg_1z(exu_update_result_reg), .cmp_cond(cmp_cond), .exu_mux_result34(exu_mux_result34), .un5_N_4_0_i(un5_N_4_0_i), .lsu_op_completing_ex_a0_1z(lsu_op_completing_ex_a0), .ifu_expipe_req_branch_excpt_req_valid_1_0_0_1z(ifu_expipe_req_branch_excpt_req_valid_1_0_0), .exu_result_valid_ex(exu_result_valid_ex), .alloc_exception(alloc_exception), .cpu_d_req_is_apb(cpu_d_req_is_apb), .alloc_req_buff_1_1(alloc_req_buff_1_1), .N_64(N_64), .de_ex_pipe_gpr_rs1_rd_valid_ex_2(de_ex_pipe_gpr_rs1_rd_valid_ex_2), .fence_de(fence_de), .lsu_align_result_valid_0(lsu_align_result_valid_0), .exu_shifter_places_valid(exu_shifter_places_valid), .gpr_wr_en_de(gpr_wr_en_de), .N_26_i(N_26_i), .N_1388_i(N_1388_i), .N_1387_i(N_1387_i), .iab_ready(iab_ready), .N_764(N_764), .lsu_req_addr_valid(lsu_req_addr_valid), .de_ex_pipe_fence_ex(de_ex_pipe_fence_ex_Z), .de_ex_pipe_bcu_op_sel_ex_2_1z(de_ex_pipe_bcu_op_sel_ex_2), .de_ex_pipe_gpr_rs2_rd_valid_ex_2(de_ex_pipe_gpr_rs2_rd_valid_ex_2), .N_240(N_240), .N_188(N_188), .N_244(N_244), .N_192(N_192), .lsu_expipe_resp_rd_data_sn_N_9_mux(lsu_expipe_resp_rd_data_sn_N_9_mux), .N_246(N_246), .N_194(N_194), .ifu_expipe_resp_access_mem_error_net(ifu_expipe_resp_access_mem_error_net), .ifu_expipe_resp_access_misalign_error_i_1(ifu_expipe_resp_access_misalign_error_i_1), .gpr_wr_valid_retr(gpr_wr_valid_retr), .start_m1_e_1(start_m1_e_1), .de_ex_pipe_implicit_pseudo_instr_ex_2_1z(de_ex_pipe_implicit_pseudo_instr_ex_2), .trigger_op_addr_valid_de_1z(trigger_op_addr_valid_de), .force_debug_nop_de_1z(force_debug_nop_de), .N_108_0(N_108), .debug_enter_req_de(debug_enter_req_de), .un1_rs2_rd_hzd_4(un1_rs2_rd_hzd_4), .ex_retr_pipe_gpr_wr_en_retr10(ex_retr_pipe_gpr_wr_en_retr10), .interrupt_could_commit(interrupt_could_commit), .i_trx_os_buff_ready(i_trx_os_buff_ready), .un1_instr_completing_retr_d_1z(un1_instr_completing_retr_d), .interrupt_could_commit_0(interrupt_could_commit_0), .un1_instr_completing_retr_c_1z(un1_instr_completing_retr_c), .ex_retr_pipe_lsu_op_retr9_1z(ex_retr_pipe_lsu_op_retr9), .un1_ex_retr_pipe_lsu_op_retr_i_0(un1_ex_retr_pipe_lsu_op_retr_i_0), .ifu_expipe_req_branch_excpt_req_valid_1_0_1z(ifu_expipe_req_branch_excpt_req_valid_1_0), .gpr_wr_valid_retr_2_0_0(gpr_wr_valid_retr_2_0_0), .ifu_expipe_req_fenci_proceed_net(ifu_expipe_req_fenci_proceed_net), .dealloc_resp_buff_10(dealloc_resp_buff_10), .debug_mode_retire_mask_retr(debug_mode_retire_mask_retr), .gpr_rs2_rd_valid_dbgpipe(gpr_rs2_rd_valid_dbgpipe), .un1_lsu_resp_valid(un1_lsu_resp_valid), .lsu_expipe_resp_valid_0(lsu_expipe_resp_valid_0), .de_ex_pipe_gpr_rs2_rd_valid_ex(de_ex_pipe_gpr_rs2_rd_valid_ex), .sw_csr_rd_op_de(sw_csr_rd_op_de), .un1_instr_inhibit_ex_0_1z(un1_instr_inhibit_ex_0), .de_ex_pipe_debug_enter_req_ex(de_ex_pipe_debug_enter_req_ex), .de_ex_pipe_implicit_pseudo_instr_ex(de_ex_pipe_implicit_pseudo_instr_ex_Z), .lsu_op_complete_retr_0_0_0_1z(lsu_op_complete_retr_0_0_0), .lsu_flush_net_i(lsu_flush_net_i), .gpr_wr_valid_retr_0(gpr_wr_valid_retr_0), .stage_state_de(stage_state_de_Z), .lsu_flush_1z(lsu_flush), .N_14072_i(N_14072_i), .lsu_resp_valid40(lsu_resp_valid40), .un1_lsu_resp_valid38_1_i(un1_lsu_resp_valid38_1_i), .req_resp_state_valid(req_resp_state_valid), .exu_op_abort_ex_1z(exu_op_abort_ex), .un2_exception_taken(un2_exception_taken), .un11_gpr_rs1_stall_exu(un11_gpr_rs1_stall_exu), .un7_gpr_rs1_stall_exu_NE(un7_gpr_rs1_stall_exu_NE), .rv32m_dec_mnemonic847(rv32m_dec_mnemonic847), .wfi_waiting_reg(wfi_waiting_reg), .set_wfi_waiting(set_wfi_waiting), .ex_retr_pipe_sw_csr_wr_op_retr18(ex_retr_pipe_sw_csr_wr_op_retr18), .sw_csr_op_ready_retr(sw_csr_op_ready_retr), .gpr_wr_completing_retr_3_0_d_1z(gpr_wr_completing_retr_3_0_d), .un8_cpu_i_req_is_tcm0lt18(un8_cpu_i_req_is_tcm0lt18), .exu_op_abort_ex_1_1z(exu_op_abort_ex_1), .un11_gpr_rs2_stall_exu(un11_gpr_rs2_stall_exu), .un5_instr_inhibit_ex_0_1z(un5_instr_inhibit_ex_0), .un1_ex_retr_pipe_curr_pc_retr(un1_ex_retr_pipe_curr_pc_retr), .dbreak_de(dbreak_de), .formal_trace_reset_taken(formal_trace_reset_taken), .gpr_wr_valid_retr_1_1_1z(gpr_wr_valid_retr_1_1), .N_40(N_40), .fence_i_de(fence_i_de), .ex_retr_pipe_sw_csr_rd_op_retr(ex_retr_pipe_sw_csr_rd_op_retr), .un3_ex_retr_pipe_sw_csr_wr_op_retr(un3_ex_retr_pipe_sw_csr_wr_op_retr), .soft_reset_taken_retr_0(soft_reset_taken_retr_0), .N_26(N_26), .un1_instruction_27_1z(un1_instruction_27), .de_ex_pipe_m_env_call_ex(de_ex_pipe_m_env_call_ex_Z), .un3_instr_inhibit_ex_3(un3_instr_inhibit_ex_3), .gpr_wr_valid_retr_1_1_0_1z(gpr_wr_valid_retr_1_1_0), .N_6_i_1z(N_6_i), .N_4_i_1z(N_4_i), .N_10_i_1z(N_10_i), .N_8_i_1z(N_8_i), .N_14_i_1z(N_14_i), .N_1398_i_1z(N_1398_i), .N_1397_i_1z(N_1397_i), .de_ex_pipe_trap_ret_ex_2_1z(de_ex_pipe_trap_ret_ex_2), .gpr_wr_en_retr_1z(gpr_wr_en_retr), .ex_retr_pipe_gpr_wr_en_retr(ex_retr_pipe_gpr_wr_en_retr), .ex_retr_pipe_exu_result_valid_retr(ex_retr_pipe_exu_result_valid_retr), .de_ex_pipe_gpr_rs3_rd_valid_ex(de_ex_pipe_gpr_rs3_rd_valid_ex), .gpr_rs2_stall_csr_2_0_1z(gpr_rs2_stall_csr_2_0), .gpr_rs2_stall_csr_2_1_1z(gpr_rs2_stall_csr_2_1), .gpr_rs2_stall_csr_2_2_1z(gpr_rs2_stall_csr_2_2), .N_1394_i(N_1394_i), .un1_instruction_33_i(un1_instruction_33_i), .de_ex_pipe_dbreak_ex(de_ex_pipe_dbreak_ex_Z), .de_ex_pipe_i_access_mem_error_ex(de_ex_pipe_i_access_mem_error_ex_Z), .de_ex_pipe_i_access_misalign_error_ex(de_ex_pipe_i_access_misalign_error_ex_Z), .un3_instr_inhibit_ex_8_1z(un3_instr_inhibit_ex_8), .dbreak_retr_1z(dbreak_retr), .ex_retr_pipe_dbreak_retr(ex_retr_pipe_dbreak_retr_Z), .N_167(N_167), .de_ex_pipe_alu_op_sel_ex7_1z(de_ex_pipe_alu_op_sel_ex7), .un14_gpr_rs1_stall_lsu(un14_gpr_rs1_stall_lsu), .ex_retr_pipe_fence_i_retr(ex_retr_pipe_fence_i_retr_Z), .trace_exception(trace_exception), .N_164(N_164), .de_ex_pipe_shifter_unit_op_sel_ex7_1z(de_ex_pipe_shifter_unit_op_sel_ex7), .de_ex_pipe_gpr_rs3_rd_valid_ex_2(de_ex_pipe_gpr_rs3_rd_valid_ex_2), .cpu_debug_gpr_rd_en_net(cpu_debug_gpr_rd_en_net), .i_access_mem_error_retr_1z(i_access_mem_error_retr), .ex_retr_pipe_i_access_mem_error_retr(ex_retr_pipe_i_access_mem_error_retr_Z), .m_env_call_retr_1z(m_env_call_retr), .ex_retr_pipe_m_env_call_retr(ex_retr_pipe_m_env_call_retr_Z), .un3_instr_inhibit_ex_6(un3_instr_inhibit_ex_6), .ex_retr_pipe_i_access_misalign_error_retr(ex_retr_pipe_i_access_misalign_error_retr_Z), .illegal_instr_retr_1z(illegal_instr_retr), .ex_retr_pipe_illegal_instr_retr(ex_retr_pipe_illegal_instr_retr_Z), .stage_state_retr(stage_state_retr_Z), .de_ex_pipe_bcu_op_sel_ex(de_ex_pipe_bcu_op_sel_ex_Z), .de_ex_pipe_fence_i_ex(de_ex_pipe_fence_i_ex_Z), .stage_state_ex(stage_state_ex_1z), .un29_csr_trigger_wr_hzd_de_4(un29_csr_trigger_wr_hzd_de_4), .de_ex_pipe_gpr_rs2_rd_sel_ex5(de_ex_pipe_gpr_rs2_rd_sel_ex5), .wfi_de(wfi_de), .debug_exit_retr(debug_exit_retr), .m_env_call_de(m_env_call_de), .un1_gpr_wr_mux_sel_ex_i(un1_gpr_wr_mux_sel_ex_i), .un29_csr_trigger_wr_hzd_de_1(un29_csr_trigger_wr_hzd_de_1), .N_566_1(N_566_1), .N_119_i(N_119_i), .alloc_req_buff_1_1_0(alloc_req_buff_1_1_0), .lsu_expipe_req_valid_net(lsu_expipe_req_valid_net), .gpr_rs1_rd_valid_mux_1z(gpr_rs1_rd_valid_mux), .gpr_rs1_rd_valid_mux_0_1z(gpr_rs1_rd_valid_mux_0), .d_m5_a0_0(d_m5_a0_0), .ifu_expipe_req_branch_excpt_req_fenci_net(ifu_expipe_req_branch_excpt_req_fenci_net), .ex_retr_pipe_fence_i_retr_2_1z(ex_retr_pipe_fence_i_retr_2), .un1_instr_inhibit_ex_1z(un1_instr_inhibit_ex), .N_117_i(N_117_i), .un6_req_buff_load_os(un6_req_buff_load_os), .un1_irq_stall_lsu_req(un1_irq_stall_lsu_req), .un3_irq_stall_lsu_req(un3_irq_stall_lsu_req), .N_115_i(N_115_i), .N_121_i(N_121_i), .N_133_i(N_133_i), .un1_instruction_29_1_1z(un1_instruction_29_1), .cpu_debug_gpr_wr_en_net(cpu_debug_gpr_wr_en_net), .cpu_debug_gpr_op_valid_net(cpu_debug_gpr_op_valid_net), .N_12_i(N_12_i), .de_ex_pipe_gpr_wr_en_ex(de_ex_pipe_gpr_wr_en_ex_Z), .instr_accepted_retr_2(instr_accepted_retr_2), .N_129_i(N_129_i), .soft_reset_taken_retr_1z(soft_reset_taken_retr), .machine_implicit_wr_mtval_tval_wr_en(machine_implicit_wr_mtval_tval_wr_en), .debug_enter_retr(debug_enter_retr), .gpr_rs2_rd_data_valid_ex(gpr_rs2_rd_data_valid_ex), .gpr_rs2_rd_data_valid_7(gpr_rs2_rd_data_valid_7), .gpr_N_10_mux_i_0_0_1z(gpr_N_10_mux_i_0_0), .N_125(N_125), .N_289_i(N_289_i), .N_123(N_123), .N_127(N_127), .case_dec_gpr_rs2_rd_sel_2_sqmuxa_1z(case_dec_gpr_rs2_rd_sel_2_sqmuxa), .un1_cpu_i_req_ready(un1_cpu_i_req_ready), .bcu_op_completing_ex(bcu_op_completing_ex), .apb_i_req_ready_net_tz(apb_i_req_ready_net_tz), .tcm0_i_req_ready_net_tz(tcm0_i_req_ready_net_tz), .tcm0_i_req_valid_1(tcm0_i_req_valid_1), .case_dec_gpr_rs2_rd_sel_0_sqmuxa_1z(case_dec_gpr_rs2_rd_sel_0_sqmuxa), .g1_0(g1_0), .N_290_i(N_290_i), .un1_lsu_resp_valid_1(un1_lsu_resp_valid_1), .un11_lsu_resp_ready_1_1(un11_lsu_resp_ready_1_1), .cpu_d_resp_valid_d(cpu_d_resp_valid_d), .de_ex_pipe_illegal_instr_ex_2_1z(de_ex_pipe_illegal_instr_ex_2), .N_17(N_17), .N_139_i(N_139_i), .N_141_i(N_141_i), .csr_wr_illegal_i_4(csr_wr_illegal_i_4), .csr_rd_illegal_i_4(csr_rd_illegal_i_4), .un1_cpu_i_req_ready_x(un1_cpu_i_req_ready_x), .exu_result_valid_retr_1z(exu_result_valid_retr), .lsu_op_complete_retr_0(lsu_op_complete_retr_0), .exu_csr_op_wr_data14(exu_csr_op_wr_data14), .un6_instr_is_lsu_op_retr_1z(un6_instr_is_lsu_op_retr), .ex_retr_exu_res_accept_retr_3_1z(ex_retr_exu_res_accept_retr_3), .cpu_i_req_is_apb(cpu_i_req_is_apb), .instr_inhibit_ex(instr_inhibit_ex), .un3_bcu_op_sel_ex_1z(un3_bcu_op_sel_ex), .un2_cpu_i_req_ready_x(un2_cpu_i_req_ready_x), .un3_cpu_i_req_ready(un3_cpu_i_req_ready), .cpu_i_req_is_dummy_target(cpu_i_req_is_dummy_target), .lsu_op_completing_ex_1_0_1z(lsu_op_completing_ex_1_0), .cpu_m8_0_a3_0_3(cpu_m8_0_a3_0_3), .cpu_i_req_is_tcm0_5_0(cpu_i_req_is_tcm0_5_0), .cpu_m8_0_a3_0_2(cpu_m8_0_a3_0_2), .un8_cpu_i_req_is_tcm0lto18_12_1(un8_cpu_i_req_is_tcm0lto18_12_1), .N_88(N_88), .N_72(N_72), .N_84(N_84), .N_58(N_58), .N_42(N_42), .N_137_i(N_137_i), .N_131_i(N_131_i), .N_291_i(N_291_i), .un11_lsu_resp_ready_d_1z(un11_lsu_resp_ready_d), .trace_priv_i(trace_priv_i), .cpu_N_6(cpu_N_6), .instr_accepted_ex_2_1_RNISIFQHS3_1z(instr_accepted_ex_2_1_RNISIFQHS3), .instr_accepted_ex(instr_accepted_ex), .N_5927_i(N_5927_i) ); // @46:8372 miv_rv32_csr_decode_1s_1s_0s u_miv_rv32_csr_decode_de_0 ( .sw_csr_addr_de(sw_csr_addr_de[11:0]), .ifu_expipe_resp_ireg_net({ifu_expipe_resp_ireg_net[31:30], N_15116, ifu_expipe_resp_ireg_net[28:22]}), .sw_csr_addr_de_1_0(sw_csr_addr_de_1[1]), .N_17(N_17), .sw_csr_rd_op_de(sw_csr_rd_op_de), .N_72(N_72), .csr_wr_illegal_i_4_1z(csr_wr_illegal_i_4), .N_42(N_42), .N_58(N_58), .N_88(N_88), .N_84(N_84), .un1_instruction_33_i(un1_instruction_33_i), .case_dec_gpr_rs2_rd_sel_0_sqmuxa(case_dec_gpr_rs2_rd_sel_0_sqmuxa), .csr_rd_illegal_i_4(csr_rd_illegal_i_4) ); // @46:9457 miv_rv32_exu_1s_1s_1s_1s_0s_0s_0s_1_0_1 u_exu_0 ( .cpu_d_req_wr_data_net(cpu_d_req_wr_data_net[31:0]), .cpu_d_req_addr_net(cpu_d_req_addr_net[31:1]), .exu_alu_result_iv_8_0_0(exu_alu_result_iv_8_0_0), .shifter_unit_op_sel(shifter_unit_op_sel[1:0]), .cpu_debug_op_wr_data_net(cpu_debug_op_wr_data_net[31:0]), .shifter_unit_places_sel_0(shifter_unit_places_sel[1]), .shifter_operand_sel(shifter_operand_sel[1:0]), .de_ex_pipe_shifter_unit_places_sel_ex_0(de_ex_pipe_shifter_unit_places_sel_ex_Z[0]), .ex_retr_pipe_gpr_wr_mux_sel_retr_0(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .exu_result_mux_sel(exu_result_mux_sel[2:0]), .exu_alu_operand0_0(exu_alu_operand0_0), .gpr_rs1_rd_data_sig(gpr_rs1_rd_data_sig[31:0]), .de_ex_pipe_curr_pc_ex(de_ex_pipe_curr_pc_ex[31:0]), .exu_alu_operand1_0(exu_alu_operand1_0), .de_ex_pipe_immediate_ex(de_ex_pipe_immediate_ex_Z[31:0]), .cpu_debug_gpr_op_rd_data_net(cpu_debug_gpr_op_rd_data_net[31:0]), .de_ex_pipe_operand1_mux_sel_ex(de_ex_pipe_operand1_mux_sel_ex_Z[1:0]), .de_ex_pipe_operand0_mux_sel_ex_0(de_ex_pipe_operand0_mux_sel_ex_Z[0]), .ex_retr_pipe_exu_result_retr(ex_retr_pipe_exu_result_retr[31:0]), .ex_retr_exu_res_accept_retr_3(ex_retr_exu_res_accept_retr_3), .lsu_req_addr_valid(lsu_req_addr_valid), .exu_shifter_places_valid_1z(exu_shifter_places_valid), .lsu_align_result_valid_0_1z(lsu_align_result_valid_0), .gpr_wr_valid_retr_0(gpr_wr_valid_retr_0), .gpr_rs1_rd_data_valid_6(gpr_rs1_rd_data_valid_6), .gpr_rs2_rd_data_valid_7(gpr_rs2_rd_data_valid_7), .bcu_result_cry_0_Y(bcu_result_cry_0_Y), .exu_mux_result34(exu_mux_result34), .soft_reset_taken_retr_0(soft_reset_taken_retr_0), .gpr_rs1_rd_valid_mux(gpr_rs1_rd_valid_mux), .gpr_N_10_mux_i_0_0(gpr_N_10_mux_i_0_0), .soft_reset_taken_retr(soft_reset_taken_retr), .gpr_wr_valid_retr_2_0_0(gpr_wr_valid_retr_2_0_0), .gpr_rs1_rd_valid_mux_0(gpr_rs1_rd_valid_mux_0), .cmp_cond(cmp_cond), .un5_N_8(un5_N_8), .un1_instr_inhibit_ex(un1_instr_inhibit_ex), .exu_alu_result_iv_10_out(exu_alu_result_iv_10_out), .un128_exu_alu_result_cry_31_RNI01RTHF_1z(un128_exu_alu_result_cry_31_RNI01RTHF), .formal_trace_reset_taken(formal_trace_reset_taken), .exu_op_abort_ex_1(exu_op_abort_ex_1), .gpr_wr_valid_retr_1_1(gpr_wr_valid_retr_1_1), .exu_m4_1(exu_m4_1), .gpr_wr_valid_retr_1_1_0(gpr_wr_valid_retr_1_1_0), .gpr_wr_en_retr(gpr_wr_en_retr), .un1_rs1_rd_hzd_4(un1_rs1_rd_hzd_4), .gpr_rs1_rd_data_valid_6_5(gpr_rs1_rd_data_valid_6_5), .un1_rs2_rd_hzd_4(un1_rs2_rd_hzd_4), .d_m2_e_1_0(d_m2_e_1_0), .start_m1_e_1_1z(start_m1_e_1), .exu_m4_0_1(exu_m4_0_1), .trace_exception(trace_exception), .debug_enter_retr(debug_enter_retr), .exu_alu_result192_1_1z(exu_alu_result192_1), .exu_m3_0_2(exu_m3_0_2), .N_26_0(N_26_0), .exu_m1_e_0_1z(exu_m1_e_0), .d_m5_a0_0(d_m5_a0_0), .de_ex_pipe_gpr_rs1_rd_valid_ex(de_ex_pipe_gpr_rs1_rd_valid_ex), .un1_alu_op_sel_int(un1_alu_op_sel_int), .exu_result_valid_ex(exu_result_valid_ex), .un1_exu_alu_result212_3_i_0(un1_exu_alu_result212_3_i_0), .exu_result_valid_iv_1_1z(exu_result_valid_iv_1), .exu_result_valid_iv_1_0_1z(exu_result_valid_iv_1_0), .div_finish(div_finish), .N_14_i(N_14_i), .N_8_i(N_8_i), .N_6_i(N_6_i), .N_10_i(N_10_i), .trace_priv_i(trace_priv_i), .un2_exception_taken(un2_exception_taken), .machine_implicit_wr_mtval_tval_wr_en(machine_implicit_wr_mtval_tval_wr_en), .gpr_rs2_rd_data_valid_ex(gpr_rs2_rd_data_valid_ex), .stage_state_ex(stage_state_ex_1z), .exu_op_abort_ex(exu_op_abort_ex), .exu_alu_result_int_cry_0_Y(exu_alu_result_int_cry_0_Y), .N_4_i(N_4_i), .exu_update_result_reg(exu_update_result_reg), .ex_retr_pipe_exu_result_valid_retr(ex_retr_pipe_exu_result_valid_retr), .dff(dff), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0) ); // @46:9570 miv_rv32_bcu u_bcu_0 ( .ex_retr_pipe_gpr_wr_mux_sel_retr_0(ex_retr_pipe_gpr_wr_mux_sel_retr[0]), .ex_retr_pipe_sw_csr_addr_retr(ex_retr_pipe_sw_csr_addr_retr[11:0]), .csr_priv_mtvec_epc_retr(csr_priv_mtvec_epc_retr[31:1]), .de_ex_pipe_immediate_ex(de_ex_pipe_immediate_ex_Z[31:0]), .csr_priv_dpc_retr(csr_priv_dpc_retr[31:0]), .de_ex_pipe_curr_pc_ex(de_ex_pipe_curr_pc_ex[31:0]), .gpr_rs1_rd_data_sig(gpr_rs1_rd_data_sig[31:0]), .de_ex_pipe_bcu_operand0_mux_sel_ex_0(de_ex_pipe_bcu_operand0_mux_sel_ex_Z[0]), .csr_priv_mtvec_excpt_vec_retr(csr_priv_mtvec_excpt_vec_retr[31:2]), .de_ex_pipe_bcu_operand1_mux_sel_ex(de_ex_pipe_bcu_operand1_mux_sel_ex_Z[2:0]), .cpu_d_req_addr_net(cpu_d_req_addr_net[31:1]), .lsu_req_addr_valid(lsu_req_addr_valid), .machine_implicit_wr_mtval_tval_wr_en(machine_implicit_wr_mtval_tval_wr_en), .un2_exception_taken(un2_exception_taken), .gpr_wr_valid_retr_2_0_0(gpr_wr_valid_retr_2_0_0), .formal_trace_reset_taken(formal_trace_reset_taken), .soft_reset_taken_retr_0(soft_reset_taken_retr_0), .gpr_wr_valid_retr_0(gpr_wr_valid_retr_0), .gpr_rs1_rd_data_valid_6(gpr_rs1_rd_data_valid_6), .un1_rs1_rd_hzd_4(un1_rs1_rd_hzd_4), .gpr_rs1_rd_valid_mux(gpr_rs1_rd_valid_mux), .gpr_rs1_rd_data_valid_6_5(gpr_rs1_rd_data_valid_6_5), .trace_priv_i(trace_priv_i), .un3_bcu_op_sel_ex(un3_bcu_op_sel_ex), .stage_state_retr(stage_state_retr_Z), .N_40(N_40), .N_1410_4(N_1410_4), .N_1410_2(N_1410_2), .bcu_operand1_valid_6_i_a2_0_2_1z(bcu_operand1_valid_6_i_a2_0_2), .bcu_result_cry_0_Y(bcu_result_cry_0_Y) ); // @46:10091 miv_rv32_gpr_ram_0s_0_0s_32s \gen_gpr_ram.u_gpr_0 ( .gpr_wr_data_retr(gpr_wr_data_retr[31:0]), .cpu_debug_gpr_op_rd_data_net(cpu_debug_gpr_op_rd_data_net[31:0]), .gpr_rs1_rd_data_sig(gpr_rs1_rd_data_sig[31:0]), .de_ex_pipe_gpr_rs1_rd_sel_ex(de_ex_pipe_gpr_rs1_rd_sel_ex[4:0]), .de_ex_pipe_gpr_rs2_rd_sel_ex(de_ex_pipe_gpr_rs2_rd_sel_ex[5:0]), .ex_retr_pipe_gpr_wr_sel_retr(ex_retr_pipe_gpr_wr_sel_retr[5:0]), .un11_gpr_rs2_stall_exu(un11_gpr_rs2_stall_exu), .un11_gpr_rs1_stall_exu(un11_gpr_rs1_stall_exu), .gpr_rs2_rd_data_valid_sig(gpr_rs2_rd_data_valid_sig), .gpr_rs1_rd_data_valid_6_1z(gpr_rs1_rd_data_valid_6), .d_m5_a0_0(d_m5_a0_0), .gpr_rs1_rd_valid_mux_0(gpr_rs1_rd_valid_mux_0), .gpr_rs2_rd_data_valid_7_1z(gpr_rs2_rd_data_valid_7), .un1_gpr_wr_mux_sel_ex_i(un1_gpr_wr_mux_sel_ex_i), .instr_inhibit_ex_1z(instr_inhibit_ex), .un5_instr_inhibit_ex_0(un5_instr_inhibit_ex_0), .stage_state_ex(stage_state_ex_1z), .un1_instr_inhibit_ex_0(un1_instr_inhibit_ex_0), .un1_irq_stall_lsu_req(un1_irq_stall_lsu_req), .gpr_rs1_rd_data_valid_6_5_1z(gpr_rs1_rd_data_valid_6_5), .un1_rs2_rd_hzd_4_1z(un1_rs2_rd_hzd_4), .gpr_rs2_stall_csr_2_0(gpr_rs2_stall_csr_2_0), .gpr_rs2_stall_csr_2_1(gpr_rs2_stall_csr_2_1), .gpr_rs2_stall_csr_2_2(gpr_rs2_stall_csr_2_2), .un1_rs1_rd_hzd_4_1z(un1_rs1_rd_hzd_4), .un7_gpr_rs1_stall_exu_NE(un7_gpr_rs1_stall_exu_NE), .gpr_rs1_rd_valid_mux(gpr_rs1_rd_valid_mux), .gpr_rs2_rd_valid_dbgpipe(gpr_rs2_rd_valid_dbgpipe), .gpr_wr_valid_retr(gpr_wr_valid_retr), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .dff(dff) ); // @46:10236 miv_rv32_csr_privarch_Z15 u_csr_privarch_0 ( .ifu_expipe_resp_ireg_vaddr_net_0(ifu_expipe_resp_ireg_vaddr_net_0), .ifu_expipe_resp_ireg_vaddr_net_1(ifu_expipe_resp_ireg_vaddr_net_1), .ifu_expipe_resp_ireg_vaddr_net_2(ifu_expipe_resp_ireg_vaddr_net_2), .ifu_expipe_resp_ireg_vaddr_net_3(ifu_expipe_resp_ireg_vaddr_net_3), .ifu_expipe_resp_ireg_vaddr_net_4(ifu_expipe_resp_ireg_vaddr_net_4), .ifu_expipe_resp_ireg_vaddr_net_5(ifu_expipe_resp_ireg_vaddr_net_5), .ifu_expipe_resp_ireg_vaddr_net_6(ifu_expipe_resp_ireg_vaddr_net_6), .ifu_expipe_resp_ireg_vaddr_net_7(ifu_expipe_resp_ireg_vaddr_net_7), .ifu_expipe_resp_ireg_vaddr_net_8(ifu_expipe_resp_ireg_vaddr_net_8), .ifu_expipe_resp_ireg_vaddr_net_13(ifu_expipe_resp_ireg_vaddr_net_13), .ifu_expipe_resp_ireg_vaddr_net_28(ifu_expipe_resp_ireg_vaddr_net_28), .ifu_expipe_resp_ireg_vaddr_net_29(ifu_expipe_resp_ireg_vaddr_net_29), .ex_retr_pipe_gpr_wr_mux_sel_retr(ex_retr_pipe_gpr_wr_mux_sel_retr[1:0]), .mtime_count_out(mtime_count_out[63:0]), .ex_retr_pipe_sw_csr_wr_op_retr(ex_retr_pipe_sw_csr_wr_op_retr[1:0]), .csr_priv_dpc_retr(csr_priv_dpc_retr[31:0]), .trigger_req_de(trigger_req_de[1:0]), .cpu_debug_csr_op_rd_data_net(cpu_debug_csr_op_rd_data_net[31:0]), .csr_priv_mtvec_epc_retr(csr_priv_mtvec_epc_retr[31:1]), .csr_priv_mtvec_excpt_vec_retr(csr_priv_mtvec_excpt_vec_retr[31:2]), .ex_retr_pipe_sw_csr_addr_retr(ex_retr_pipe_sw_csr_addr_retr[11:0]), .req_buff_resp_state_valid(req_buff_resp_state_valid[1:0]), .ex_retr_pipe_curr_pc_retr(ex_retr_pipe_curr_pc_retr[31:0]), .ex_retr_pipe_exu_result_retr(ex_retr_pipe_exu_result_retr[31:0]), .ex_retr_pipe_curr_instr_enc_retr(ex_retr_pipe_curr_instr_enc_retr_Z[31:0]), .ex_retr_pipe_trigger_retr_0(ex_retr_pipe_trigger_retr[0]), .N_306(N_306), .N_424(N_424), .N_383(N_383), .N_381(N_381), .N_382(N_382), .N_380(N_380), .N_378(N_378), .N_379(N_379), .N_376(N_376), .N_377(N_377), .N_374(N_374), .N_375(N_375), .N_372(N_372), .N_373(N_373), .N_370(N_370), .N_371(N_371), .N_368(N_368), .N_369(N_369), .N_298(N_298), .N_367(N_367), .debug_enter_req_de(debug_enter_req_de), .ex_retr_pipe_dbreak_retr(ex_retr_pipe_dbreak_retr_Z), .ex_retr_pipe_i_access_mem_error_retr(ex_retr_pipe_i_access_mem_error_retr_Z), .cpu_debug_halt_req_net(cpu_debug_halt_req_net), .N_1398_i(N_1398_i), .N_1397_i(N_1397_i), .exu_csr_op_wr_data14(exu_csr_op_wr_data14), .ex_retr_debug_enter_req_retr(ex_retr_debug_enter_req_retr), .illegal_instr_retr(illegal_instr_retr), .dbreak_retr(dbreak_retr), .exu_result_valid_retr(exu_result_valid_retr), .sw_csr_op_ready_retr(sw_csr_op_ready_retr), .cpu_debug_resume_req_net(cpu_debug_resume_req_net), .debug_exit_retr(debug_exit_retr), .un2_exception_taken(un2_exception_taken), .ex_retr_pipe_m_env_call_retr(ex_retr_pipe_m_env_call_retr_Z), .cpu_debug_halt_ack_net(cpu_debug_halt_ack_net), .ex_retr_pipe_wfi_retr(ex_retr_pipe_wfi_retr_Z), .set_wfi_waiting(set_wfi_waiting), .lsu_expipe_resp_ld_addr_misalign_0(lsu_expipe_resp_ld_addr_misalign_0), .un1_req_resp_state_1_i(un1_req_resp_state_1_i), .lsu_flush(lsu_flush), .ex_retr_pipe_illegal_instr_retr(ex_retr_pipe_illegal_instr_retr_Z), .un1_instr_completing_retr_c(un1_instr_completing_retr_c), .un1_instr_completing_retr_d(un1_instr_completing_retr_d), .trigger_op_addr_valid_de(trigger_op_addr_valid_de), .instr_accepted_ex(instr_accepted_ex), .de_ex_pipe_implicit_pseudo_instr_ex_2(de_ex_pipe_implicit_pseudo_instr_ex_2), .bcu_operand1_valid_6_i_a2_0_2(bcu_operand1_valid_6_i_a2_0_2), .un29_csr_trigger_wr_hzd_de_4(un29_csr_trigger_wr_hzd_de_4), .N_1410_2(N_1410_2), .un29_csr_trigger_wr_hzd_de_1(un29_csr_trigger_wr_hzd_de_1), .N_1410_4(N_1410_4), .ex_retr_pipe_sw_csr_rd_op_retr(ex_retr_pipe_sw_csr_rd_op_retr), .cpu_debug_csr_op_rd_data_valid_net(cpu_debug_csr_op_rd_data_valid_net), .interrupt_could_commit_0(interrupt_could_commit_0), .un3_irq_stall_lsu_req(un3_irq_stall_lsu_req), .un1_irq_stall_lsu_req(un1_irq_stall_lsu_req), .un5_m_timer_irq_cry_63(un5_m_timer_irq_cry_63), .interrupt_could_commit(interrupt_could_commit), .lsu_resp_valid40(lsu_resp_valid40), .un6_instr_is_lsu_op_retr(un6_instr_is_lsu_op_retr), .un14_gpr_rs1_stall_lsu(un14_gpr_rs1_stall_lsu), .ex_retr_pipe_gpr_wr_en_retr(ex_retr_pipe_gpr_wr_en_retr), .un1_lsu_resp_valid38_1_i(un1_lsu_resp_valid38_1_i), .req_resp_state_valid(req_resp_state_valid), .lsu_op_complete_retr_0_0_0(lsu_op_complete_retr_0_0_0), .debug_enter_retr(debug_enter_retr), .un5_m_timer_irq_cry_63_i(un5_m_timer_irq_cry_63_i), .gpr_wr_completing_retr_3_0_d(gpr_wr_completing_retr_3_0_d), .lsu_op_complete_retr_0(lsu_op_complete_retr_0), .gpr_wr_en_retr(gpr_wr_en_retr), .un1_lsu_resp_valid(un1_lsu_resp_valid), .hart_soft_irq_net(hart_soft_irq_net), .un3_instr_inhibit_ex_8(un3_instr_inhibit_ex_8), .lsu_expipe_resp_str_amo_addr_misalign_net(lsu_expipe_resp_str_amo_addr_misalign_net), .ex_retr_pipe_trap_ret_retr(ex_retr_pipe_trap_ret_retr_Z), .machine_implicit_wr_mtval_tval_wr_en(machine_implicit_wr_mtval_tval_wr_en), .debug_mode_retire_mask_retr(debug_mode_retire_mask_retr), .init_wr_dcsr_step_en(init_wr_dcsr_step_en), .stage_state_retr(stage_state_retr_Z), .debug_sys_reset(debug_sys_reset), .formal_trace_reset_taken(formal_trace_reset_taken), .hart_soft_reset_net(hart_soft_reset_net), .i_access_mem_error_retr(i_access_mem_error_retr), .lsu_expipe_resp_access_mem_error_net(lsu_expipe_resp_access_mem_error_net), .un3_instr_inhibit_ex_6(un3_instr_inhibit_ex_6), .m_env_call_retr(m_env_call_retr), .lsu_flush_net_i(lsu_flush_net_i), .wfi_waiting_reg_1z(wfi_waiting_reg), .cpu_debug_active_net(cpu_debug_active_net), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .dff(dff), .trace_priv_i_i(trace_priv_i_i), .trace_priv_i(trace_priv_i) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_expipe_Z16 */ module miv_rv32_hart_Z17 ( un3_branch_cond_ex, cpu_debug_csr_op_rd_data_net, cpu_debug_gpr_op_addr_net, cpu_debug_csr_op_addr_net, req_masked, cpu_d_req_wr_data_net, cpu_debug_op_wr_data_net, cpu_debug_gpr_op_rd_data_net, mtime_count_out, buff_rd_ptr_0, req_buff_resp_fault_0__0, req_buff_resp_fault_1__0, un19_cpu_d_resp_rd_data_sig_0, debug_sysbus_resp_rd_data_0_0, lsu_expipe_req_op_net_0, lsu_expipe_req_op_net_3, un2_req_resp_str_req_buff_addr_misalign_0, lsu_emi_req_rd_byte_en_2_0, cpu_d_req_wr_byte_en_net_1_0, lsu_emi_req_rd_byte_en_iv_0_0, lsu_emi_req_rd_byte_en_3_m_0, cpu_d_resp_rd_data_net, cpu_d_req_rd_byte_en_net_1_0, cpu_d_req_wr_byte_en_net_2_2, cpu_d_req_wr_byte_en_net_2_0, next_req_fetch_ptr_yy, cpu_i_resp_rd_data_sel, cpu_d_req_addr_net, apb_i_req_addr_net, stage_state_ex, cpu_debug_csr_op_valid_net, cpu_debug_csr_wr_en_net, cpu_debug_csr_rd_en_net, un2_cpu_i_req_ready, cpu_i_req_is_tcm0_5, cpu_m1_e_1, un8_cpu_i_req_is_tcm0lt19_12, cpu_i_req_is_tcm0_4_2, gen_m3, cmp_cond, exu_result_valid_ex, cpu_d_req_is_apb, N_64, un8_cpu_i_req_is_tcm0lt18, N_10_i, N_8_i, cpu_debug_gpr_rd_en_net, debug_exit_retr, un1_instr_inhibit_ex, cpu_debug_gpr_wr_en_net, cpu_debug_gpr_op_valid_net, apb_i_req_ready_net_tz, tcm0_i_req_ready_net_tz, tcm0_i_req_valid_1, un1_lsu_resp_valid_1, cpu_d_resp_valid_d, un1_cpu_i_req_ready_x, cpu_i_req_is_apb, un2_cpu_i_req_ready_x, un3_cpu_i_req_ready, cpu_i_req_is_dummy_target, cpu_m8_0_a3_0_3, cpu_i_req_is_tcm0_5_0, cpu_m8_0_a3_0_2, un8_cpu_i_req_is_tcm0lto18_12_1, cpu_N_6, d_m2_e_1_0, gpr_rs2_rd_data_valid_sig, cpu_debug_halt_req_net, cpu_debug_resume_req_net, cpu_debug_halt_ack_net, cpu_debug_csr_op_rd_data_valid_net, un5_m_timer_irq_cry_63, un5_m_timer_irq_cry_63_i, hart_soft_irq_net, init_wr_dcsr_step_en, debug_sys_reset, hart_soft_reset_net, cpu_debug_active_net, bcu_result_cry_0_Y, lsu_emi_req_valid49, lsu_emi_req_valid47, un1_lsu_emi_req_valid46_1, N_90, un1_lsu_emi_req_valid46, N_84, un1_lsu_expipe_req_op_4, un5_lsu_emi_req_rd_byte_en, un24_lsu_emi_req_rd_byte_en, N_145, cpu_d_resp_error_sig, un1_lsu_resp_valid, cpu_d_req_valid_net, cpu_d_req_ready_sig, dff, PF_CCC_0_0_OUT0_FABCLK_0, sticky_reset_reg, un3_next_req_fetch_ptr_cry_15_S, un3_next_req_fetch_ptr_cry_16_S, un3_next_req_fetch_ptr_cry_18_S, un3_next_req_fetch_ptr_cry_21_S, un3_next_req_fetch_ptr_cry_22_S, un3_next_req_fetch_ptr_cry_23_S, un3_next_req_fetch_ptr_cry_25_S, un3_next_req_fetch_ptr_cry_26_S, un3_next_req_fetch_ptr_cry_27_S, un3_next_req_fetch_ptr_s_29_S, un5_N_4_0_i, ifu_expipe_req_branch_excpt_req_valid_1_0, ifu_emi_req_valid_i_o2_1_0, ifu_N_11, N_764, ifu_expipe_req_branch_excpt_req_fenci_net, cpu_i_resp_valid_sel, trace_priv_i, ifu_emi_req_valid_i_0, cpu_i_resp_error_sel, un1_cpu_i_req_ready, i_trx_os_buff_ready ) ; output [1:0] un3_branch_cond_ex ; output [31:0] cpu_debug_csr_op_rd_data_net ; input [5:0] cpu_debug_gpr_op_addr_net ; input [11:0] cpu_debug_csr_op_addr_net ; input [1:0] req_masked ; output [31:0] cpu_d_req_wr_data_net ; input [31:0] cpu_debug_op_wr_data_net ; output [31:0] cpu_debug_gpr_op_rd_data_net ; input [63:0] mtime_count_out ; output buff_rd_ptr_0 ; output req_buff_resp_fault_0__0 ; output req_buff_resp_fault_1__0 ; input un19_cpu_d_resp_rd_data_sig_0 ; input debug_sysbus_resp_rd_data_0_0 ; output lsu_expipe_req_op_net_0 ; output lsu_expipe_req_op_net_3 ; output un2_req_resp_str_req_buff_addr_misalign_0 ; output lsu_emi_req_rd_byte_en_2_0 ; output cpu_d_req_wr_byte_en_net_1_0 ; output lsu_emi_req_rd_byte_en_iv_0_0 ; output lsu_emi_req_rd_byte_en_3_m_0 ; input [31:0] cpu_d_resp_rd_data_net ; output cpu_d_req_rd_byte_en_net_1_0 ; output cpu_d_req_wr_byte_en_net_2_2 ; output cpu_d_req_wr_byte_en_net_2_0 ; output [22:21] next_req_fetch_ptr_yy ; input [31:0] cpu_i_resp_rd_data_sel ; output [31:1] cpu_d_req_addr_net ; output [31:2] apb_i_req_addr_net ; output stage_state_ex ; input cpu_debug_csr_op_valid_net ; input cpu_debug_csr_wr_en_net ; input cpu_debug_csr_rd_en_net ; input un2_cpu_i_req_ready ; input cpu_i_req_is_tcm0_5 ; input cpu_m1_e_1 ; input un8_cpu_i_req_is_tcm0lt19_12 ; input cpu_i_req_is_tcm0_4_2 ; input gen_m3 ; output cmp_cond ; output exu_result_valid_ex ; input cpu_d_req_is_apb ; input N_64 ; output un8_cpu_i_req_is_tcm0lt18 ; output N_10_i ; output N_8_i ; input cpu_debug_gpr_rd_en_net ; output debug_exit_retr ; output un1_instr_inhibit_ex ; input cpu_debug_gpr_wr_en_net ; input cpu_debug_gpr_op_valid_net ; input apb_i_req_ready_net_tz ; input tcm0_i_req_ready_net_tz ; input tcm0_i_req_valid_1 ; input un1_lsu_resp_valid_1 ; input cpu_d_resp_valid_d ; input un1_cpu_i_req_ready_x ; input cpu_i_req_is_apb ; input un2_cpu_i_req_ready_x ; input un3_cpu_i_req_ready ; input cpu_i_req_is_dummy_target ; input cpu_m8_0_a3_0_3 ; input cpu_i_req_is_tcm0_5_0 ; input cpu_m8_0_a3_0_2 ; input un8_cpu_i_req_is_tcm0lto18_12_1 ; input cpu_N_6 ; input d_m2_e_1_0 ; output gpr_rs2_rd_data_valid_sig ; input cpu_debug_halt_req_net ; input cpu_debug_resume_req_net ; output cpu_debug_halt_ack_net ; output cpu_debug_csr_op_rd_data_valid_net ; input un5_m_timer_irq_cry_63 ; input un5_m_timer_irq_cry_63_i ; input hart_soft_irq_net ; output init_wr_dcsr_step_en ; input debug_sys_reset ; input hart_soft_reset_net ; input cpu_debug_active_net ; output bcu_result_cry_0_Y ; output lsu_emi_req_valid49 ; output lsu_emi_req_valid47 ; output un1_lsu_emi_req_valid46_1 ; output N_90 ; output un1_lsu_emi_req_valid46 ; output N_84 ; output un1_lsu_expipe_req_op_4 ; output un5_lsu_emi_req_rd_byte_en ; output un24_lsu_emi_req_rd_byte_en ; output N_145 ; input cpu_d_resp_error_sig ; input un1_lsu_resp_valid ; output cpu_d_req_valid_net ; input cpu_d_req_ready_sig ; input dff ; input PF_CCC_0_0_OUT0_FABCLK_0 ; output sticky_reset_reg ; output un3_next_req_fetch_ptr_cry_15_S ; output un3_next_req_fetch_ptr_cry_16_S ; output un3_next_req_fetch_ptr_cry_18_S ; output un3_next_req_fetch_ptr_cry_21_S ; output un3_next_req_fetch_ptr_cry_22_S ; output un3_next_req_fetch_ptr_cry_23_S ; output un3_next_req_fetch_ptr_cry_25_S ; output un3_next_req_fetch_ptr_cry_26_S ; output un3_next_req_fetch_ptr_cry_27_S ; output un3_next_req_fetch_ptr_s_29_S ; output un5_N_4_0_i ; output ifu_expipe_req_branch_excpt_req_valid_1_0 ; output ifu_emi_req_valid_i_o2_1_0 ; output ifu_N_11 ; output N_764 ; output ifu_expipe_req_branch_excpt_req_fenci_net ; input cpu_i_resp_valid_sel ; output trace_priv_i ; output ifu_emi_req_valid_i_0 ; input cpu_i_resp_error_sel ; input un1_cpu_i_req_ready ; input i_trx_os_buff_ready ; wire buff_rd_ptr_0 ; wire req_buff_resp_fault_0__0 ; wire req_buff_resp_fault_1__0 ; wire un19_cpu_d_resp_rd_data_sig_0 ; wire debug_sysbus_resp_rd_data_0_0 ; wire lsu_expipe_req_op_net_0 ; wire lsu_expipe_req_op_net_3 ; wire un2_req_resp_str_req_buff_addr_misalign_0 ; wire lsu_emi_req_rd_byte_en_2_0 ; wire cpu_d_req_wr_byte_en_net_1_0 ; wire lsu_emi_req_rd_byte_en_iv_0_0 ; wire lsu_emi_req_rd_byte_en_3_m_0 ; wire cpu_d_req_rd_byte_en_net_1_0 ; wire cpu_d_req_wr_byte_en_net_2_2 ; wire cpu_d_req_wr_byte_en_net_2_0 ; wire stage_state_ex ; wire cpu_debug_csr_op_valid_net ; wire cpu_debug_csr_wr_en_net ; wire cpu_debug_csr_rd_en_net ; wire un2_cpu_i_req_ready ; wire cpu_i_req_is_tcm0_5 ; wire cpu_m1_e_1 ; wire un8_cpu_i_req_is_tcm0lt19_12 ; wire cpu_i_req_is_tcm0_4_2 ; wire gen_m3 ; wire cmp_cond ; wire exu_result_valid_ex ; wire cpu_d_req_is_apb ; wire N_64 ; wire un8_cpu_i_req_is_tcm0lt18 ; wire N_10_i ; wire N_8_i ; wire cpu_debug_gpr_rd_en_net ; wire debug_exit_retr ; wire un1_instr_inhibit_ex ; wire cpu_debug_gpr_wr_en_net ; wire cpu_debug_gpr_op_valid_net ; wire apb_i_req_ready_net_tz ; wire tcm0_i_req_ready_net_tz ; wire tcm0_i_req_valid_1 ; wire un1_lsu_resp_valid_1 ; wire cpu_d_resp_valid_d ; wire un1_cpu_i_req_ready_x ; wire cpu_i_req_is_apb ; wire un2_cpu_i_req_ready_x ; wire un3_cpu_i_req_ready ; wire cpu_i_req_is_dummy_target ; wire cpu_m8_0_a3_0_3 ; wire cpu_i_req_is_tcm0_5_0 ; wire cpu_m8_0_a3_0_2 ; wire un8_cpu_i_req_is_tcm0lto18_12_1 ; wire cpu_N_6 ; wire d_m2_e_1_0 ; wire gpr_rs2_rd_data_valid_sig ; wire cpu_debug_halt_req_net ; wire cpu_debug_resume_req_net ; wire cpu_debug_halt_ack_net ; wire cpu_debug_csr_op_rd_data_valid_net ; wire un5_m_timer_irq_cry_63 ; wire un5_m_timer_irq_cry_63_i ; wire hart_soft_irq_net ; wire init_wr_dcsr_step_en ; wire debug_sys_reset ; wire hart_soft_reset_net ; wire cpu_debug_active_net ; wire bcu_result_cry_0_Y ; wire lsu_emi_req_valid49 ; wire lsu_emi_req_valid47 ; wire un1_lsu_emi_req_valid46_1 ; wire N_90 ; wire un1_lsu_emi_req_valid46 ; wire N_84 ; wire un1_lsu_expipe_req_op_4 ; wire un5_lsu_emi_req_rd_byte_en ; wire un24_lsu_emi_req_rd_byte_en ; wire N_145 ; wire cpu_d_resp_error_sig ; wire un1_lsu_resp_valid ; wire cpu_d_req_valid_net ; wire cpu_d_req_ready_sig ; wire dff ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire sticky_reset_reg ; wire un3_next_req_fetch_ptr_cry_15_S ; wire un3_next_req_fetch_ptr_cry_16_S ; wire un3_next_req_fetch_ptr_cry_18_S ; wire un3_next_req_fetch_ptr_cry_21_S ; wire un3_next_req_fetch_ptr_cry_22_S ; wire un3_next_req_fetch_ptr_cry_23_S ; wire un3_next_req_fetch_ptr_cry_25_S ; wire un3_next_req_fetch_ptr_cry_26_S ; wire un3_next_req_fetch_ptr_cry_27_S ; wire un3_next_req_fetch_ptr_s_29_S ; wire un5_N_4_0_i ; wire ifu_expipe_req_branch_excpt_req_valid_1_0 ; wire ifu_emi_req_valid_i_o2_1_0 ; wire ifu_N_11 ; wire N_764 ; wire ifu_expipe_req_branch_excpt_req_fenci_net ; wire cpu_i_resp_valid_sel ; wire trace_priv_i ; wire ifu_emi_req_valid_i_0 ; wire cpu_i_resp_error_sel ; wire un1_cpu_i_req_ready ; wire i_trx_os_buff_ready ; wire [31:2] ifu_expipe_resp_ireg_vaddr_net; wire [0:0] exu_alu_result_iv_8_0; wire [31:16] ifu_expipe_resp_ireg_net; wire [19:19] next_req_fetch_ptr_yy_Z; wire [0:0] exu_alu_operand1; wire [0:0] exu_alu_operand0; wire [1:1] next_req_fetch_ptr; wire [19:19] next_req_fetch_ptr_xx; wire [31:0] lsu_expipe_resp_rd_data_net; wire [0:0] req_buff_fence_os; wire [2:1] lsu_expipe_req_op_net; wire [3:0] req_buff_resp_state_1_; wire [1:0] req_buff_resp_state_valid; wire N_374 ; wire N_375 ; wire N_378 ; wire N_372 ; wire N_371 ; wire N_379 ; wire N_380 ; wire N_373 ; wire N_377 ; wire N_369 ; wire N_370 ; wire N_368 ; wire N_376 ; wire N_381 ; wire N_367 ; wire N_382 ; wire N_383 ; wire N_298 ; wire N_292 ; wire ifu_expipe_req_fenci_proceed_net ; wire lsu_flush ; wire un1_ifu_expipe_resp_next_vaddr ; wire ifu_expipe_req_branch_excpt_req_valid_net ; wire ifu_expipe_req_branch_excpt_req_valid_1_0_0 ; wire N_133_i ; wire N_131_i ; wire N_129_i ; wire N_121_i ; wire N_119_i ; wire N_117_i ; wire N_115_i ; wire N_289_i ; wire N_141_i ; wire N_139_i ; wire N_137_i ; wire N_291_i ; wire N_123_i ; wire N_127_i ; wire N_125_i ; wire N_125 ; wire N_123 ; wire N_127 ; wire N_108 ; wire ifu_expipe_resp_access_mem_error_net ; wire ifu_expipe_resp_ready_net ; wire exu_m4_0_1 ; wire exu_m3_0_2 ; wire exu_alu_result_iv_10_out ; wire ifu_expipe_resp_access_misalign_error_i_1 ; wire un5_N_8 ; wire N_26_0 ; wire exu_alu_result192_1 ; wire N_424 ; wire iab_ready ; wire N_306 ; wire exu_result_valid_iv_1_0 ; wire un1_exu_alu_result212_3_i_0 ; wire exu_result_valid_iv_1 ; wire div_finish ; wire un1_alu_op_sel_int ; wire exu_m1_e_0 ; wire N_14_i ; wire un128_exu_alu_result_cry_31_RNI01RTHF ; wire exu_alu_result_int_cry_0_Y ; wire exu_m4_1 ; wire N_290_i ; wire N_15107 ; wire N_15108 ; wire N_15109 ; wire alloc_req_buff_1_1 ; wire lsu_expipe_req_valid_net ; wire N_240 ; wire N_246 ; wire N_244 ; wire dealloc_resp_buff_10 ; wire un11_lsu_resp_ready_1_1 ; wire un11_lsu_resp_ready_d ; wire lsu_expipe_resp_access_mem_error_net ; wire N_188 ; wire alloc_exception ; wire N_194 ; wire lsu_expipe_resp_str_amo_addr_misalign_net ; wire un6_req_buff_load_os ; wire lsu_expipe_resp_valid_0 ; wire lsu_resp_valid40 ; wire lsu_expipe_resp_ld_addr_misalign_0 ; wire req_resp_state_valid ; wire lsu_expipe_resp_rd_data_sn_N_9_mux ; wire alloc_req_buff_1_1_0 ; wire un1_lsu_resp_valid38_1_i ; wire un1_req_resp_state_1_i ; wire N_192 ; wire N_15120 ; wire N_15121 ; wire N_15122 ; wire GND ; wire VCC ; // @46:792 miv_rv32_fetch_unit_32s_18446744071562067968_0s_3s_2s_3s_2s_2s_0s_1s_Z14 u_fetch_unit_0 ( .ifu_expipe_resp_ireg_vaddr_net_5(ifu_expipe_resp_ireg_vaddr_net[7]), .ifu_expipe_resp_ireg_vaddr_net_13(ifu_expipe_resp_ireg_vaddr_net[15]), .ifu_expipe_resp_ireg_vaddr_net_3(ifu_expipe_resp_ireg_vaddr_net[5]), .ifu_expipe_resp_ireg_vaddr_net_4(ifu_expipe_resp_ireg_vaddr_net[6]), .ifu_expipe_resp_ireg_vaddr_net_8(ifu_expipe_resp_ireg_vaddr_net[10]), .ifu_expipe_resp_ireg_vaddr_net_6(ifu_expipe_resp_ireg_vaddr_net[8]), .ifu_expipe_resp_ireg_vaddr_net_1(ifu_expipe_resp_ireg_vaddr_net[3]), .ifu_expipe_resp_ireg_vaddr_net_7(ifu_expipe_resp_ireg_vaddr_net[9]), .ifu_expipe_resp_ireg_vaddr_net_2(ifu_expipe_resp_ireg_vaddr_net[4]), .ifu_expipe_resp_ireg_vaddr_net_28(ifu_expipe_resp_ireg_vaddr_net[30]), .ifu_expipe_resp_ireg_vaddr_net_0(ifu_expipe_resp_ireg_vaddr_net[2]), .ifu_expipe_resp_ireg_vaddr_net_29(ifu_expipe_resp_ireg_vaddr_net[31]), .exu_alu_result_iv_8_0_0(exu_alu_result_iv_8_0[0]), .ifu_expipe_resp_ireg_net(ifu_expipe_resp_ireg_net[31:16]), .apb_i_req_addr_net(apb_i_req_addr_net[31:2]), .cpu_d_req_addr_net(cpu_d_req_addr_net[31:1]), .cpu_i_resp_rd_data_sel(cpu_i_resp_rd_data_sel[31:0]), .next_req_fetch_ptr_yy_3(next_req_fetch_ptr_yy[22]), .next_req_fetch_ptr_yy_2(next_req_fetch_ptr_yy[21]), .next_req_fetch_ptr_yy_0(next_req_fetch_ptr_yy_Z[19]), .exu_alu_operand1_0(exu_alu_operand1[0]), .exu_alu_operand0_0(exu_alu_operand0[0]), .next_req_fetch_ptr_0(next_req_fetch_ptr[1]), .un3_branch_cond_ex_0(un3_branch_cond_ex[0]), .next_req_fetch_ptr_xx_0(next_req_fetch_ptr_xx[19]), .N_374(N_374), .N_375(N_375), .N_378(N_378), .N_372(N_372), .N_371(N_371), .N_379(N_379), .N_380(N_380), .N_373(N_373), .N_377(N_377), .N_369(N_369), .N_370(N_370), .N_368(N_368), .N_376(N_376), .N_381(N_381), .N_367(N_367), .N_382(N_382), .N_383(N_383), .N_298(N_298), .N_292(N_292), .i_trx_os_buff_ready(i_trx_os_buff_ready), .un1_cpu_i_req_ready(un1_cpu_i_req_ready), .ifu_expipe_req_fenci_proceed_net(ifu_expipe_req_fenci_proceed_net), .lsu_flush(lsu_flush), .un1_ifu_expipe_resp_next_vaddr_1z(un1_ifu_expipe_resp_next_vaddr), .ifu_expipe_req_branch_excpt_req_valid_net(ifu_expipe_req_branch_excpt_req_valid_net), .ifu_expipe_req_branch_excpt_req_valid_1_0_0(ifu_expipe_req_branch_excpt_req_valid_1_0_0), .N_133_i(N_133_i), .N_131_i(N_131_i), .N_129_i(N_129_i), .N_121_i(N_121_i), .N_119_i(N_119_i), .N_117_i(N_117_i), .N_115_i(N_115_i), .N_289_i(N_289_i), .N_141_i(N_141_i), .N_139_i(N_139_i), .N_137_i(N_137_i), .N_291_i(N_291_i), .N_123_i(N_123_i), .N_127_i(N_127_i), .N_125_i(N_125_i), .N_125(N_125), .N_123(N_123), .N_127(N_127), .N_108(N_108), .ifu_expipe_resp_access_mem_error_net(ifu_expipe_resp_access_mem_error_net), .cpu_i_resp_error_sel(cpu_i_resp_error_sel), .ifu_expipe_resp_ready_net(ifu_expipe_resp_ready_net), .exu_m4_0_1(exu_m4_0_1), .exu_m3_0_2(exu_m3_0_2), .exu_alu_result_iv_10_out(exu_alu_result_iv_10_out), .ifu_expipe_resp_access_misalign_error_i_1(ifu_expipe_resp_access_misalign_error_i_1), .un5_N_8(un5_N_8), .N_26_0(N_26_0), .exu_alu_result192_1(exu_alu_result192_1), .N_424(N_424), .ifu_emi_req_valid_i_0(ifu_emi_req_valid_i_0), .trace_priv_i(trace_priv_i), .iab_ready_1z(iab_ready), .cpu_i_resp_valid_sel(cpu_i_resp_valid_sel), .N_306(N_306), .ifu_expipe_req_branch_excpt_req_fenci_net(ifu_expipe_req_branch_excpt_req_fenci_net), .N_764(N_764), .ifu_N_11(ifu_N_11), .ifu_emi_req_valid_i_o2_1_0_1z(ifu_emi_req_valid_i_o2_1_0), .exu_result_valid_iv_1_0(exu_result_valid_iv_1_0), .ifu_expipe_req_branch_excpt_req_valid_1_0(ifu_expipe_req_branch_excpt_req_valid_1_0), .un1_exu_alu_result212_3_i_0(un1_exu_alu_result212_3_i_0), .exu_result_valid_iv_1(exu_result_valid_iv_1), .div_finish(div_finish), .un1_alu_op_sel_int(un1_alu_op_sel_int), .exu_m1_e_0(exu_m1_e_0), .N_14_i(N_14_i), .un128_exu_alu_result_cry_31_RNI01RTHF(un128_exu_alu_result_cry_31_RNI01RTHF), .exu_alu_result_int_cry_0_Y(exu_alu_result_int_cry_0_Y), .exu_m4_1(exu_m4_1), .N_290_i(N_290_i), .un5_N_4_0_i(un5_N_4_0_i), .un3_next_req_fetch_ptr_s_29_S(un3_next_req_fetch_ptr_s_29_S), .un3_next_req_fetch_ptr_cry_27_S(un3_next_req_fetch_ptr_cry_27_S), .un3_next_req_fetch_ptr_cry_26_S(un3_next_req_fetch_ptr_cry_26_S), .un3_next_req_fetch_ptr_cry_25_S(un3_next_req_fetch_ptr_cry_25_S), .un3_next_req_fetch_ptr_cry_23_S(un3_next_req_fetch_ptr_cry_23_S), .un3_next_req_fetch_ptr_cry_22_S(un3_next_req_fetch_ptr_cry_22_S), .un3_next_req_fetch_ptr_cry_21_S(un3_next_req_fetch_ptr_cry_21_S), .un3_next_req_fetch_ptr_cry_18_S(un3_next_req_fetch_ptr_cry_18_S), .un3_next_req_fetch_ptr_cry_16_S(un3_next_req_fetch_ptr_cry_16_S), .un3_next_req_fetch_ptr_cry_15_S(un3_next_req_fetch_ptr_cry_15_S), .sticky_reset_reg_1z(sticky_reset_reg), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .dff(dff) ); // @46:841 miv_rv32_lsu_32s_2s_1s_2s_2s u_lsu_0 ( .lsu_expipe_resp_rd_data_net({lsu_expipe_resp_rd_data_net[31:15], N_15109, lsu_expipe_resp_rd_data_net[13], N_15108, lsu_expipe_resp_rd_data_net[11:9], N_15107, lsu_expipe_resp_rd_data_net[7:0]}), .cpu_d_req_wr_byte_en_net_2_2(cpu_d_req_wr_byte_en_net_2_2), .cpu_d_req_wr_byte_en_net_2_0(cpu_d_req_wr_byte_en_net_2_0), .cpu_d_req_rd_byte_en_net_1_0(cpu_d_req_rd_byte_en_net_1_0), .cpu_d_resp_rd_data_net(cpu_d_resp_rd_data_net[31:0]), .lsu_emi_req_rd_byte_en_3_m_0(lsu_emi_req_rd_byte_en_3_m_0), .lsu_emi_req_rd_byte_en_iv_0_0(lsu_emi_req_rd_byte_en_iv_0_0), .cpu_d_req_wr_byte_en_net_1_0(cpu_d_req_wr_byte_en_net_1_0), .lsu_emi_req_rd_byte_en_2_0(lsu_emi_req_rd_byte_en_2_0), .req_buff_fence_os_0(req_buff_fence_os[0]), .un2_req_resp_str_req_buff_addr_misalign_0(un2_req_resp_str_req_buff_addr_misalign_0), .lsu_expipe_req_op_net({lsu_expipe_req_op_net_3, lsu_expipe_req_op_net[2:1], lsu_expipe_req_op_net_0}), .debug_sysbus_resp_rd_data_0_0(debug_sysbus_resp_rd_data_0_0), .un19_cpu_d_resp_rd_data_sig_0(un19_cpu_d_resp_rd_data_sig_0), .cpu_d_req_addr_net_0(cpu_d_req_addr_net[1]), .req_buff_resp_state_1_(req_buff_resp_state_1_[3:0]), .req_buff_resp_fault_1__0(req_buff_resp_fault_1__0), .req_buff_resp_fault_0__0(req_buff_resp_fault_0__0), .buff_rd_ptr_0(buff_rd_ptr_0), .req_buff_resp_state_valid(req_buff_resp_state_valid[1:0]), .cpu_d_req_ready_sig(cpu_d_req_ready_sig), .cpu_d_req_valid_net(cpu_d_req_valid_net), .alloc_req_buff_1_1_1z(alloc_req_buff_1_1), .lsu_expipe_req_valid_net(lsu_expipe_req_valid_net), .N_240(N_240), .N_246_0(N_246), .N_244(N_244), .dealloc_resp_buff_10_1z(dealloc_resp_buff_10), .un1_lsu_resp_valid(un1_lsu_resp_valid), .un11_lsu_resp_ready_1_1(un11_lsu_resp_ready_1_1), .un11_lsu_resp_ready_d(un11_lsu_resp_ready_d), .lsu_expipe_resp_access_mem_error_net(lsu_expipe_resp_access_mem_error_net), .cpu_d_resp_error_sig(cpu_d_resp_error_sig), .trace_priv_i(trace_priv_i), .N_188(N_188), .alloc_exception_1z(alloc_exception), .N_194(N_194), .lsu_expipe_resp_str_amo_addr_misalign_net(lsu_expipe_resp_str_amo_addr_misalign_net), .N_145(N_145), .un24_lsu_emi_req_rd_byte_en_1z(un24_lsu_emi_req_rd_byte_en), .un5_lsu_emi_req_rd_byte_en_1z(un5_lsu_emi_req_rd_byte_en), .un6_req_buff_load_os(un6_req_buff_load_os), .un1_lsu_expipe_req_op_4_1z(un1_lsu_expipe_req_op_4), .N_84(N_84), .lsu_expipe_resp_valid_0_1z(lsu_expipe_resp_valid_0), .lsu_resp_valid40_1z(lsu_resp_valid40), .lsu_expipe_resp_ld_addr_misalign_0_1z(lsu_expipe_resp_ld_addr_misalign_0), .un1_lsu_emi_req_valid46_1z(un1_lsu_emi_req_valid46), .N_90(N_90), .req_resp_state_valid_1z(req_resp_state_valid), .un1_lsu_emi_req_valid46_1_1z(un1_lsu_emi_req_valid46_1), .lsu_emi_req_valid47_1z(lsu_emi_req_valid47), .lsu_emi_req_valid49(lsu_emi_req_valid49), .lsu_expipe_resp_rd_data_sn_N_9_mux(lsu_expipe_resp_rd_data_sn_N_9_mux), .alloc_req_buff_1_1_0_1z(alloc_req_buff_1_1_0), .un1_lsu_resp_valid38_1_i(un1_lsu_resp_valid38_1_i), .un1_req_resp_state_1_i(un1_req_resp_state_1_i), .N_192(N_192), .bcu_result_cry_0_Y(bcu_result_cry_0_Y), .lsu_flush(lsu_flush), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .dff(dff) ); // @46:925 miv_rv32_expipe_Z16 u_expipe_0 ( .mtime_count_out(mtime_count_out[63:0]), .cpu_debug_gpr_op_rd_data_net(cpu_debug_gpr_op_rd_data_net[31:0]), .exu_alu_operand1_0(exu_alu_operand1[0]), .exu_alu_operand0_0(exu_alu_operand0[0]), .cpu_debug_op_wr_data_net(cpu_debug_op_wr_data_net[31:0]), .exu_alu_result_iv_8_0_0(exu_alu_result_iv_8_0[0]), .cpu_d_req_wr_data_net(cpu_d_req_wr_data_net[31:0]), .req_masked(req_masked[1:0]), .req_buff_fence_os_0(req_buff_fence_os[0]), .req_buff_resp_state_valid(req_buff_resp_state_valid[1:0]), .req_buff_resp_state_1_(req_buff_resp_state_1_[3:0]), .lsu_expipe_req_op_net({lsu_expipe_req_op_net_3, lsu_expipe_req_op_net[2:1], lsu_expipe_req_op_net_0}), .cpu_debug_csr_op_addr_net(cpu_debug_csr_op_addr_net[11:0]), .cpu_debug_gpr_op_addr_net(cpu_debug_gpr_op_addr_net[5:0]), .cpu_d_req_addr_net(cpu_d_req_addr_net[31:1]), .lsu_expipe_resp_rd_data_net({lsu_expipe_resp_rd_data_net[31:15], N_15122, lsu_expipe_resp_rd_data_net[13], N_15121, lsu_expipe_resp_rd_data_net[11:9], N_15120, lsu_expipe_resp_rd_data_net[7:0]}), .cpu_debug_csr_op_rd_data_net(cpu_debug_csr_op_rd_data_net[31:0]), .next_req_fetch_ptr_xx_0(next_req_fetch_ptr_xx[19]), .next_req_fetch_ptr_yy_0(next_req_fetch_ptr_yy_Z[19]), .next_req_fetch_ptr_0(next_req_fetch_ptr[1]), .apb_i_req_addr_net(apb_i_req_addr_net[31:2]), .ifu_expipe_resp_ireg_vaddr_net_29(ifu_expipe_resp_ireg_vaddr_net[31]), .ifu_expipe_resp_ireg_vaddr_net_28(ifu_expipe_resp_ireg_vaddr_net[30]), .ifu_expipe_resp_ireg_vaddr_net_1(ifu_expipe_resp_ireg_vaddr_net[3]), .ifu_expipe_resp_ireg_vaddr_net_13(ifu_expipe_resp_ireg_vaddr_net[15]), .ifu_expipe_resp_ireg_vaddr_net_0(ifu_expipe_resp_ireg_vaddr_net[2]), .ifu_expipe_resp_ireg_vaddr_net_2(ifu_expipe_resp_ireg_vaddr_net[4]), .ifu_expipe_resp_ireg_vaddr_net_4(ifu_expipe_resp_ireg_vaddr_net[6]), .ifu_expipe_resp_ireg_vaddr_net_3(ifu_expipe_resp_ireg_vaddr_net[5]), .ifu_expipe_resp_ireg_vaddr_net_5(ifu_expipe_resp_ireg_vaddr_net[7]), .ifu_expipe_resp_ireg_vaddr_net_6(ifu_expipe_resp_ireg_vaddr_net[8]), .ifu_expipe_resp_ireg_vaddr_net_7(ifu_expipe_resp_ireg_vaddr_net[9]), .ifu_expipe_resp_ireg_vaddr_net_8(ifu_expipe_resp_ireg_vaddr_net[10]), .un3_branch_cond_ex(un3_branch_cond_ex[1:0]), .ifu_expipe_resp_ireg_net(ifu_expipe_resp_ireg_net[31:16]), .cpu_debug_active_net(cpu_debug_active_net), .lsu_expipe_resp_access_mem_error_net(lsu_expipe_resp_access_mem_error_net), .hart_soft_reset_net(hart_soft_reset_net), .debug_sys_reset(debug_sys_reset), .init_wr_dcsr_step_en(init_wr_dcsr_step_en), .lsu_expipe_resp_str_amo_addr_misalign_net(lsu_expipe_resp_str_amo_addr_misalign_net), .hart_soft_irq_net(hart_soft_irq_net), .un5_m_timer_irq_cry_63_i(un5_m_timer_irq_cry_63_i), .un5_m_timer_irq_cry_63(un5_m_timer_irq_cry_63), .cpu_debug_csr_op_rd_data_valid_net(cpu_debug_csr_op_rd_data_valid_net), .un1_req_resp_state_1_i(un1_req_resp_state_1_i), .lsu_expipe_resp_ld_addr_misalign_0(lsu_expipe_resp_ld_addr_misalign_0), .cpu_debug_halt_ack_net(cpu_debug_halt_ack_net), .cpu_debug_resume_req_net(cpu_debug_resume_req_net), .cpu_debug_halt_req_net(cpu_debug_halt_req_net), .gpr_rs2_rd_data_valid_sig(gpr_rs2_rd_data_valid_sig), .exu_alu_result_int_cry_0_Y(exu_alu_result_int_cry_0_Y), .div_finish(div_finish), .exu_result_valid_iv_1_0(exu_result_valid_iv_1_0), .exu_result_valid_iv_1(exu_result_valid_iv_1), .un1_exu_alu_result212_3_i_0(un1_exu_alu_result212_3_i_0), .un1_alu_op_sel_int(un1_alu_op_sel_int), .exu_m1_e_0(exu_m1_e_0), .N_26_0(N_26_0), .exu_m3_0_2(exu_m3_0_2), .exu_alu_result192_1(exu_alu_result192_1), .exu_m4_0_1(exu_m4_0_1), .d_m2_e_1_0(d_m2_e_1_0), .exu_m4_1(exu_m4_1), .un128_exu_alu_result_cry_31_RNI01RTHF(un128_exu_alu_result_cry_31_RNI01RTHF), .exu_alu_result_iv_10_out(exu_alu_result_iv_10_out), .un5_N_8(un5_N_8), .bcu_result_cry_0_Y(bcu_result_cry_0_Y), .cpu_N_6(cpu_N_6), .un11_lsu_resp_ready_d(un11_lsu_resp_ready_d), .un8_cpu_i_req_is_tcm0lto18_12_1(un8_cpu_i_req_is_tcm0lto18_12_1), .cpu_m8_0_a3_0_2(cpu_m8_0_a3_0_2), .cpu_i_req_is_tcm0_5_0(cpu_i_req_is_tcm0_5_0), .cpu_m8_0_a3_0_3(cpu_m8_0_a3_0_3), .cpu_i_req_is_dummy_target(cpu_i_req_is_dummy_target), .un3_cpu_i_req_ready(un3_cpu_i_req_ready), .un2_cpu_i_req_ready_x(un2_cpu_i_req_ready_x), .cpu_i_req_is_apb(cpu_i_req_is_apb), .un1_cpu_i_req_ready_x(un1_cpu_i_req_ready_x), .cpu_d_resp_valid_d(cpu_d_resp_valid_d), .un11_lsu_resp_ready_1_1(un11_lsu_resp_ready_1_1), .un1_lsu_resp_valid_1(un1_lsu_resp_valid_1), .tcm0_i_req_valid_1(tcm0_i_req_valid_1), .tcm0_i_req_ready_net_tz(tcm0_i_req_ready_net_tz), .apb_i_req_ready_net_tz(apb_i_req_ready_net_tz), .un1_cpu_i_req_ready(un1_cpu_i_req_ready), .N_127(N_127), .N_123(N_123), .N_125(N_125), .cpu_debug_gpr_op_valid_net(cpu_debug_gpr_op_valid_net), .cpu_debug_gpr_wr_en_net(cpu_debug_gpr_wr_en_net), .un6_req_buff_load_os(un6_req_buff_load_os), .un1_instr_inhibit_ex(un1_instr_inhibit_ex), .ifu_expipe_req_branch_excpt_req_fenci_net(ifu_expipe_req_branch_excpt_req_fenci_net), .lsu_expipe_req_valid_net(lsu_expipe_req_valid_net), .alloc_req_buff_1_1_0(alloc_req_buff_1_1_0), .debug_exit_retr(debug_exit_retr), .cpu_debug_gpr_rd_en_net(cpu_debug_gpr_rd_en_net), .N_14_i(N_14_i), .N_8_i(N_8_i), .N_10_i(N_10_i), .un8_cpu_i_req_is_tcm0lt18(un8_cpu_i_req_is_tcm0lt18), .req_resp_state_valid(req_resp_state_valid), .un1_lsu_resp_valid38_1_i(un1_lsu_resp_valid38_1_i), .lsu_resp_valid40(lsu_resp_valid40), .lsu_flush(lsu_flush), .lsu_expipe_resp_valid_0(lsu_expipe_resp_valid_0), .un1_lsu_resp_valid(un1_lsu_resp_valid), .ifu_expipe_req_fenci_proceed_net(ifu_expipe_req_fenci_proceed_net), .ifu_expipe_req_branch_excpt_req_valid_1_0(ifu_expipe_req_branch_excpt_req_valid_1_0), .i_trx_os_buff_ready(i_trx_os_buff_ready), .N_108(N_108), .N_194(N_194), .N_246(N_246), .lsu_expipe_resp_rd_data_sn_N_9_mux(lsu_expipe_resp_rd_data_sn_N_9_mux), .N_192(N_192), .N_244(N_244), .N_188(N_188), .N_240(N_240), .N_764(N_764), .iab_ready(iab_ready), .N_64(N_64), .alloc_req_buff_1_1(alloc_req_buff_1_1), .cpu_d_req_is_apb(cpu_d_req_is_apb), .alloc_exception(alloc_exception), .exu_result_valid_ex(exu_result_valid_ex), .ifu_expipe_req_branch_excpt_req_valid_1_0_0(ifu_expipe_req_branch_excpt_req_valid_1_0_0), .un5_N_4_0_i(un5_N_4_0_i), .cmp_cond(cmp_cond), .ifu_expipe_req_branch_excpt_req_valid_net(ifu_expipe_req_branch_excpt_req_valid_net), .gen_m3(gen_m3), .cpu_i_req_is_tcm0_4_2(cpu_i_req_is_tcm0_4_2), .un8_cpu_i_req_is_tcm0lt19_12(un8_cpu_i_req_is_tcm0lt19_12), .cpu_m1_e_1(cpu_m1_e_1), .cpu_i_req_is_tcm0_5(cpu_i_req_is_tcm0_5), .un2_cpu_i_req_ready(un2_cpu_i_req_ready), .ifu_expipe_resp_ready_net(ifu_expipe_resp_ready_net), .N_292(N_292), .N_424(N_424), .N_306(N_306), .N_298(N_298), .N_377(N_377), .N_378(N_378), .N_379(N_379), .N_383(N_383), .N_381(N_381), .N_368(N_368), .N_372(N_372), .N_382(N_382), .N_367(N_367), .N_369(N_369), .N_370(N_370), .N_374(N_374), .N_376(N_376), .N_380(N_380), .N_371(N_371), .N_375(N_375), .N_373(N_373), .un1_ifu_expipe_resp_next_vaddr(un1_ifu_expipe_resp_next_vaddr), .cpu_debug_csr_rd_en_net(cpu_debug_csr_rd_en_net), .cpu_debug_csr_wr_en_net(cpu_debug_csr_wr_en_net), .cpu_debug_csr_op_valid_net(cpu_debug_csr_op_valid_net), .trace_priv_i(trace_priv_i), .dealloc_resp_buff_10(dealloc_resp_buff_10), .dff(dff), .stage_state_ex_1z(stage_state_ex), .ifu_expipe_resp_access_mem_error_net(ifu_expipe_resp_access_mem_error_net), .ifu_expipe_resp_access_misalign_error_i_1(ifu_expipe_resp_access_misalign_error_i_1), .N_291_i(N_291_i), .N_137_i(N_137_i), .N_139_i(N_139_i), .N_141_i(N_141_i), .N_289_i(N_289_i), .N_290_i(N_290_i), .N_115_i(N_115_i), .N_117_i(N_117_i), .N_119_i(N_119_i), .N_121_i(N_121_i), .N_123_i(N_123_i), .N_125_i(N_125_i), .N_127_i(N_127_i), .N_129_i(N_129_i), .N_131_i(N_131_i), .N_133_i(N_133_i), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_hart_Z17 */ module miv_rv32_debug_dtm_jtag_1s ( wr_ptr_0, fifo_memory, rd_ptr_0, dtm_req_data_0, dtm_req_data_4, dtm_req_data_7, dtm_req_data_9, dtm_req_data_10, dtm_req_data_11, dtm_req_data_13, dtm_req_data_39, dtm_req_data_33, dtm_req_data_32, dtm_req_data_30, dtm_req_data_29, dtm_req_data_28, dtm_req_data_27, dtm_req_data_26, dtm_req_data_25, dtm_req_data_24, dtm_req_data_23, dtm_req_data_22, dtm_req_data_21, dtm_req_data_20, dtm_req_data_19, dtm_req_data_18, dtm_req_data_16, dtm_req_data_15, dtm_req_data_8, dtm_req_data_6, dtm_req_data_3, dtm_req_data_2, dtm_resp_data_0, shiftDMI_6, shiftDMI_2, shiftDMI_1, shiftDMI_0, shiftDMI_18, shiftDMI_15, shiftDMI_13, shiftDMI_37, shiftDMI_36, shiftDMI_35, shiftDMI_32, shiftDMI_39, shiftDMI_38, currTapState_0, currTapState_7, currTapState_4, delay_sel_0, CO0_1, write_en_1, ram0_29, ram1_29, un1_shiftDR20, COREJTAGDEBUG_C0_0_TGT_TDI_0, COREJTAGDEBUG_C0_0_TGT_TMS_0, N_974, shiftDR21, empty_rd, shiftBP_ne_0, COREJTAGDEBUG_C0_0_TGT_TCK_0_i, shiftIR_ne_0, COREJTAGDEBUG_C0_0_TGT_TCK_0, dtm_resp_ready, fifo_reset_arst_i, fifo_reset ) ; input wr_ptr_0 ; input [33:2] fifo_memory ; input rd_ptr_0 ; output dtm_req_data_0 ; output dtm_req_data_4 ; output dtm_req_data_7 ; output dtm_req_data_9 ; output dtm_req_data_10 ; output dtm_req_data_11 ; output dtm_req_data_13 ; output dtm_req_data_39 ; output dtm_req_data_33 ; output dtm_req_data_32 ; output dtm_req_data_30 ; output dtm_req_data_29 ; output dtm_req_data_28 ; output dtm_req_data_27 ; output dtm_req_data_26 ; output dtm_req_data_25 ; output dtm_req_data_24 ; output dtm_req_data_23 ; output dtm_req_data_22 ; output dtm_req_data_21 ; output dtm_req_data_20 ; output dtm_req_data_19 ; output dtm_req_data_18 ; output dtm_req_data_16 ; output dtm_req_data_15 ; output dtm_req_data_8 ; output dtm_req_data_6 ; output dtm_req_data_3 ; output dtm_req_data_2 ; input dtm_resp_data_0 ; output shiftDMI_6 ; output shiftDMI_2 ; output shiftDMI_1 ; output shiftDMI_0 ; output shiftDMI_18 ; output shiftDMI_15 ; output shiftDMI_13 ; output shiftDMI_37 ; output shiftDMI_36 ; output shiftDMI_35 ; output shiftDMI_32 ; output shiftDMI_39 ; output shiftDMI_38 ; output currTapState_0 ; output currTapState_7 ; output currTapState_4 ; input delay_sel_0 ; output CO0_1 ; input write_en_1 ; input ram0_29 ; input ram1_29 ; output un1_shiftDR20 ; input COREJTAGDEBUG_C0_0_TGT_TDI_0 ; input COREJTAGDEBUG_C0_0_TGT_TMS_0 ; output N_974 ; output shiftDR21 ; input empty_rd ; output shiftBP_ne_0 ; input COREJTAGDEBUG_C0_0_TGT_TCK_0_i ; output shiftIR_ne_0 ; input COREJTAGDEBUG_C0_0_TGT_TCK_0 ; output dtm_resp_ready ; output fifo_reset_arst_i ; output fifo_reset ; wire wr_ptr_0 ; wire rd_ptr_0 ; wire dtm_req_data_0 ; wire dtm_req_data_4 ; wire dtm_req_data_7 ; wire dtm_req_data_9 ; wire dtm_req_data_10 ; wire dtm_req_data_11 ; wire dtm_req_data_13 ; wire dtm_req_data_39 ; wire dtm_req_data_33 ; wire dtm_req_data_32 ; wire dtm_req_data_30 ; wire dtm_req_data_29 ; wire dtm_req_data_28 ; wire dtm_req_data_27 ; wire dtm_req_data_26 ; wire dtm_req_data_25 ; wire dtm_req_data_24 ; wire dtm_req_data_23 ; wire dtm_req_data_22 ; wire dtm_req_data_21 ; wire dtm_req_data_20 ; wire dtm_req_data_19 ; wire dtm_req_data_18 ; wire dtm_req_data_16 ; wire dtm_req_data_15 ; wire dtm_req_data_8 ; wire dtm_req_data_6 ; wire dtm_req_data_3 ; wire dtm_req_data_2 ; wire dtm_resp_data_0 ; wire shiftDMI_6 ; wire shiftDMI_2 ; wire shiftDMI_1 ; wire shiftDMI_0 ; wire shiftDMI_18 ; wire shiftDMI_15 ; wire shiftDMI_13 ; wire shiftDMI_37 ; wire shiftDMI_36 ; wire shiftDMI_35 ; wire shiftDMI_32 ; wire shiftDMI_39 ; wire shiftDMI_38 ; wire currTapState_0 ; wire currTapState_7 ; wire currTapState_4 ; wire delay_sel_0 ; wire CO0_1 ; wire write_en_1 ; wire ram0_29 ; wire ram1_29 ; wire un1_shiftDR20 ; wire COREJTAGDEBUG_C0_0_TGT_TDI_0 ; wire COREJTAGDEBUG_C0_0_TGT_TMS_0 ; wire N_974 ; wire shiftDR21 ; wire empty_rd ; wire shiftBP_ne_0 ; wire COREJTAGDEBUG_C0_0_TGT_TCK_0_i ; wire shiftIR_ne_0 ; wire COREJTAGDEBUG_C0_0_TGT_TCK_0 ; wire dtm_resp_ready ; wire fifo_reset_arst_i ; wire fifo_reset ; wire [15:1] currTapState; wire [14:1] currTapState_ns; wire [4:0] irReg; wire [4:0] irReg_4; wire [1:0] dtmcs_dmistat; wire [40:3] shiftDMI; wire [39:1] shiftDMI_7; wire [31:0] shiftDR; wire [31:1] shiftDR_8; wire [6:0] shiftDR_8_0_iv_i; wire [4:0] shiftIR; wire [4:1] shiftIR_4; wire [0:0] shiftIR_4_iv_i; wire [2:2] shiftDMI_m; wire [28:28] dtm_resp_data_m_1; wire VCC ; wire shiftDMI_0_sqmuxa_3 ; wire GND ; wire shiftIR_ne_0_3 ; wire shiftDR_ne_0 ; wire shiftDR_ne_0_3 ; wire shiftDMI_ne_0 ; wire shiftDMI_ne_0_3 ; wire shiftBP_ne_0_3 ; wire fifo_reset_3_Z ; wire gen_N_3_mux_0_5 ; wire gen_N_3_mux_0_4 ; wire gen_N_3_mux_0_6 ; wire gen_N_3_mux_0 ; wire gen_N_3_mux_0_2 ; wire gen_N_3_mux_0_3 ; wire gen_N_3_mux_0_7 ; wire gen_N_3_mux_0_1 ; wire gen_N_3_mux_0_0 ; wire N_136_i ; wire dtmcs_dmihardreset ; wire dtmcs_dmihardreset_3 ; wire dtmcs_dmihardreset_0 ; wire dtmcs_dmireset ; wire dtmcs_dmireset_3 ; wire shiftBP ; wire shiftBP_ldmx ; wire shiftBP_1_sqmuxa_i_Z ; wire N_1126_i ; wire i7_mux_i ; wire un1_shiftDMI_0_sqmuxa_i ; wire N_58_i ; wire N_61_i ; wire m63_N_6 ; wire N_40_i ; wire N_43_i ; wire N_46_i ; wire N_49_i ; wire N_52_i ; wire N_55_i ; wire N_16_0_i ; wire N_19_0_i ; wire N_22_0_i ; wire N_25_0_i ; wire N_28_0_i ; wire N_31_i ; wire N_34_i ; wire N_37_i ; wire N_78_mux_i ; wire un1_shiftDMI_0_sqmuxa_2_i ; wire N_79_mux_i ; wire N_75_mux_i ; wire shiftIR_0_sqmuxa_i_Z ; wire m66_0 ; wire m70_0 ; wire gen_m1_e_1 ; wire dtmcs_dmistat12 ; wire dtmcs_dmistat13 ; wire dtmcs_dmistat14 ; wire dtmcs_dmistat15 ; wire shiftDR19_1 ; wire shiftDMI_1_sqmuxa_1_Z ; wire shiftDMI_2_sqmuxa_Z ; wire gen_m1_e_27_2 ; wire shiftDR19_1_0 ; wire d_N_3_mux_6 ; wire N_139 ; wire N_140 ; wire N_80 ; wire gen_m1_e_27_1 ; wire shiftDR20 ; wire shiftDR_1_sqmuxa_Z ; wire shiftDR_2_sqmuxa_Z ; wire m54_a0_1 ; wire m27_a0_1 ; wire m36_a0_1 ; wire m60_a0_1 ; wire m57_a0_1 ; wire m30_a0_1 ; wire m15_a0_1 ; wire m39_a0_1 ; wire m48_a0_1 ; wire m51_a0_1 ; wire m42_a0_1 ; wire m21_m4_0 ; wire gen_m2_i_a3_9_1 ; wire gen_m2_i_a3_1 ; wire gen_m2_i_a3_12_1 ; wire gen_m2_i_a3_8_1 ; wire gen_m2_i_a3_2_1 ; wire gen_m2_i_a3_10_1 ; wire dtm_m1_0_a2_1 ; wire gen_m2_i_a3_0_1 ; wire gen_m2_i_a3_3_1 ; wire gen_m2_i_a3_1_1 ; wire m33_a0_1 ; wire gen_m2_i_a3_6_1 ; wire gen_m2_i_a3_5_1 ; wire gen_m2_i_a3_4_1 ; wire m45_m1_e_1 ; wire gen_m2_i_a3_7_1 ; wire m24_m1_e_1 ; wire gen_m2_i_a3_11_1 ; wire m18_m1_e_1 ; wire N_7395 ; wire N_146 ; wire N_145 ; wire N_144 ; wire N_143 ; wire N_17 ; wire N_16 ; wire N_15 ; wire N_14 ; wire N_13 ; wire N_12 ; wire N_11 ; wire N_10 ; wire N_9 ; wire N_8 ; wire N_7 ; wire N_6 ; wire N_5 ; wire N_4 ; wire N_3 ; wire N_2 ; wire N_1 ; CFG1 \gen_shift_register_active_high.gen_shift_register_active_low.fifo_reset_RNI1JOL1 ( .A(fifo_reset), .Y(fifo_reset_arst_i) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.fifo_reset_RNI1JOL1 .INIT=2'h1; // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.dtm_resp_ready ( .Q(dtm_resp_ready), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDMI_0_sqmuxa_3), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16308 SLE \genblk3.shift_active_high.shift_active_low.shiftIR_ne_0 ( .Q(shiftIR_ne_0), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(shiftIR_ne_0_3), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16308 SLE \genblk3.shift_active_high.shift_active_low.shiftDR_ne_0 ( .Q(shiftDR_ne_0), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(shiftDR_ne_0_3), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16308 SLE \genblk3.shift_active_high.shift_active_low.shiftDMI_ne_0 ( .Q(shiftDMI_ne_0), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(shiftDMI_ne_0_3), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16308 SLE \genblk3.shift_active_high.shift_active_low.shiftBP_ne_0 ( .Q(shiftBP_ne_0), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(shiftBP_ne_0_3), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.fifo_reset ( .Q(fifo_reset), .ADn(GND), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(fifo_reset_3_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16013 SLE \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState[7] ( .Q(currTapState[7]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(currTapState_ns[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16013 SLE \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState[6] ( .Q(currTapState[6]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(gen_N_3_mux_0_5), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16013 SLE \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState[5] ( .Q(currTapState[5]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(gen_N_3_mux_0_4), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16013 SLE \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState[4] ( .Q(currTapState_0), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(gen_N_3_mux_0_6), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16013 SLE \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState[3] ( .Q(currTapState[3]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(currTapState_ns[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16013 SLE \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState[2] ( .Q(currTapState[2]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(gen_N_3_mux_0), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16013 SLE \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState[1] ( .Q(currTapState[1]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(currTapState_ns[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16013 SLE \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState[15] ( .Q(currTapState[15]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(gen_N_3_mux_0_2), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16013 SLE \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState[14] ( .Q(currTapState[14]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(currTapState_ns[14]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16013 SLE \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState[13] ( .Q(currTapState[13]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(gen_N_3_mux_0_3), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16013 SLE \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState[12] ( .Q(currTapState[12]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(gen_N_3_mux_0_7), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16013 SLE \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState[11] ( .Q(currTapState_7), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(gen_N_3_mux_0_1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16013 SLE \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState[10] ( .Q(currTapState[10]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(currTapState_ns[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16013 SLE \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState[9] ( .Q(currTapState[9]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(currTapState_ns[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16013 SLE \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState[8] ( .Q(currTapState_4), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(gen_N_3_mux_0_0), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16366 SLE \ir_and_Instruction_register.gen_ir_and_Instruction_register_active_low.irReg[3] ( .Q(irReg[3]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(irReg_4[3]), .EN(N_136_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16366 SLE \ir_and_Instruction_register.gen_ir_and_Instruction_register_active_low.irReg[2] ( .Q(irReg[2]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(irReg_4[2]), .EN(N_136_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16366 SLE \ir_and_Instruction_register.gen_ir_and_Instruction_register_active_low.irReg[1] ( .Q(irReg[1]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(irReg_4[1]), .EN(N_136_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16366 SLE \ir_and_Instruction_register.gen_ir_and_Instruction_register_active_low.irReg[0] ( .Q(irReg[0]), .ADn(GND), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(irReg_4[0]), .EN(N_136_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16242 SLE \dmi_outputs_and_dtmcs_resets.dtmcs_resets_active_low.dtmcs_dmihardreset ( .Q(dtmcs_dmihardreset), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(dtmcs_dmihardreset_3), .EN(dtmcs_dmihardreset_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16242 SLE \dmi_outputs_and_dtmcs_resets.dtmcs_resets_active_low.dtmcs_dmireset ( .Q(dtmcs_dmireset), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(dtmcs_dmireset_3), .EN(dtmcs_dmihardreset_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftBP ( .Q(shiftBP), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftBP_ldmx), .EN(shiftBP_1_sqmuxa_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.dtmcs_dmistat[1] ( .Q(dtmcs_dmistat[1]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(N_1126_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.dtmcs_dmistat[0] ( .Q(dtmcs_dmistat[0]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(i7_mux_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16366 SLE \ir_and_Instruction_register.gen_ir_and_Instruction_register_active_low.irReg[4] ( .Q(irReg[4]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(irReg_4[4]), .EN(N_136_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[7] ( .Q(shiftDMI[7]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDMI_7[7]), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[6] ( .Q(shiftDMI_6), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(N_58_i), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[5] ( .Q(shiftDMI[5]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDMI_7[5]), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[4] ( .Q(shiftDMI[4]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDMI_7[4]), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[3] ( .Q(shiftDMI[3]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDMI_7[3]), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[2] ( .Q(shiftDMI_2), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(N_61_i), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[1] ( .Q(shiftDMI_1), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDMI_7[1]), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[0] ( .Q(shiftDMI_0), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(m63_N_6), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[22] ( .Q(shiftDMI[22]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(N_40_i), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[21] ( .Q(shiftDMI[21]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(N_43_i), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[20] ( .Q(shiftDMI[20]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(N_46_i), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[19] ( .Q(shiftDMI[19]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDMI_7[19]), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[18] ( .Q(shiftDMI_18), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(N_49_i), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[17] ( .Q(shiftDMI[17]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDMI_7[17]), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[16] ( .Q(shiftDMI[16]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(N_52_i), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[15] ( .Q(shiftDMI_15), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(N_55_i), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[14] ( .Q(shiftDMI[14]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDMI_7[14]), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[13] ( .Q(shiftDMI_13), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDMI_7[13]), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[12] ( .Q(shiftDMI[12]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDMI_7[12]), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[11] ( .Q(shiftDMI[11]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDMI_7[11]), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[10] ( .Q(shiftDMI[10]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDMI_7[10]), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[9] ( .Q(shiftDMI[9]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDMI_7[9]), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[8] ( .Q(shiftDMI[8]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDMI_7[8]), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[37] ( .Q(shiftDMI_37), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDMI_7[37]), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[36] ( .Q(shiftDMI_36), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDMI_7[36]), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[35] ( .Q(shiftDMI_35), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDMI_7[35]), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[34] ( .Q(shiftDMI[34]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDMI_7[34]), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[33] ( .Q(shiftDMI[33]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDMI_7[33]), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[32] ( .Q(shiftDMI_32), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(N_16_0_i), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[31] ( .Q(shiftDMI[31]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(N_19_0_i), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[30] ( .Q(shiftDMI[30]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDMI_7[30]), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[29] ( .Q(shiftDMI[29]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(N_22_0_i), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[28] ( .Q(shiftDMI[28]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDMI_7[28]), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[27] ( .Q(shiftDMI[27]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(N_25_0_i), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[26] ( .Q(shiftDMI[26]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(N_28_0_i), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[25] ( .Q(shiftDMI[25]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(N_31_i), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[24] ( .Q(shiftDMI[24]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(N_34_i), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[23] ( .Q(shiftDMI[23]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(N_37_i), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR[11] ( .Q(shiftDR[11]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(N_78_mux_i), .EN(un1_shiftDMI_0_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR[10] ( .Q(shiftDR[10]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(N_79_mux_i), .EN(un1_shiftDMI_0_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR[9] ( .Q(shiftDR[9]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDR_8[9]), .EN(un1_shiftDMI_0_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR[8] ( .Q(shiftDR[8]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDR_8[8]), .EN(un1_shiftDMI_0_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR[7] ( .Q(shiftDR[7]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDR_8[7]), .EN(un1_shiftDMI_0_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR[6] ( .Q(shiftDR[6]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDR_8_0_iv_i[6]), .EN(un1_shiftDMI_0_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR[5] ( .Q(shiftDR[5]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(N_75_mux_i), .EN(un1_shiftDMI_0_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR[4] ( .Q(shiftDR[4]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDR_8_0_iv_i[4]), .EN(un1_shiftDMI_0_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR[3] ( .Q(shiftDR[3]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDR_8[3]), .EN(un1_shiftDMI_0_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR[2] ( .Q(shiftDR[2]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDR_8[2]), .EN(un1_shiftDMI_0_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR[1] ( .Q(shiftDR[1]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDR_8[1]), .EN(un1_shiftDMI_0_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR[0] ( .Q(shiftDR[0]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDR_8_0_iv_i[0]), .EN(un1_shiftDMI_0_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[40] ( .Q(shiftDMI[40]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDR_8[31]), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[39] ( .Q(shiftDMI_39), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDMI_7[39]), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI[38] ( .Q(shiftDMI_38), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDMI_7[38]), .EN(un1_shiftDMI_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR[26] ( .Q(shiftDR[26]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDR_8[26]), .EN(un1_shiftDMI_0_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR[25] ( .Q(shiftDR[25]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDR_8[25]), .EN(un1_shiftDMI_0_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR[24] ( .Q(shiftDR[24]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDR_8[24]), .EN(un1_shiftDMI_0_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR[23] ( .Q(shiftDR[23]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDR_8[23]), .EN(un1_shiftDMI_0_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR[22] ( .Q(shiftDR[22]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDR_8[22]), .EN(un1_shiftDMI_0_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR[21] ( .Q(shiftDR[21]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDR_8[21]), .EN(un1_shiftDMI_0_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR[20] ( .Q(shiftDR[20]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDR_8[20]), .EN(un1_shiftDMI_0_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR[19] ( .Q(shiftDR[19]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDR_8[19]), .EN(un1_shiftDMI_0_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR[18] ( .Q(shiftDR[18]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDR_8[18]), .EN(un1_shiftDMI_0_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR[17] ( .Q(shiftDR[17]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDR_8[17]), .EN(un1_shiftDMI_0_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR[16] ( .Q(shiftDR[16]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDR_8[16]), .EN(un1_shiftDMI_0_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR[15] ( .Q(shiftDR[15]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDR_8[15]), .EN(un1_shiftDMI_0_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR[14] ( .Q(shiftDR[14]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDR_8[14]), .EN(un1_shiftDMI_0_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR[13] ( .Q(shiftDR[13]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDR_8[13]), .EN(un1_shiftDMI_0_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR[12] ( .Q(shiftDR[12]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDR_8[12]), .EN(un1_shiftDMI_0_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftIR[4] ( .Q(shiftIR[4]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftIR_4[4]), .EN(shiftIR_0_sqmuxa_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftIR[3] ( .Q(shiftIR[3]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftIR_4[3]), .EN(shiftIR_0_sqmuxa_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftIR[2] ( .Q(shiftIR[2]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftIR_4[2]), .EN(shiftIR_0_sqmuxa_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftIR[1] ( .Q(shiftIR[1]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftIR_4[1]), .EN(shiftIR_0_sqmuxa_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftIR[0] ( .Q(shiftIR[0]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftIR_4_iv_i[0]), .EN(shiftIR_0_sqmuxa_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR[31] ( .Q(shiftDR[31]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDR_8[31]), .EN(un1_shiftDMI_0_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR[30] ( .Q(shiftDR[30]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDR_8[30]), .EN(un1_shiftDMI_0_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR[29] ( .Q(shiftDR[29]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDR_8[29]), .EN(un1_shiftDMI_0_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR[28] ( .Q(shiftDR[28]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDR_8[28]), .EN(un1_shiftDMI_0_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:16135 SLE \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR[27] ( .Q(shiftDR[27]), .ADn(VCC), .ALn(delay_sel_0), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(shiftDR_8[27]), .EN(un1_shiftDMI_0_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @51:466 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.dtmcs_dmistat_RNO_0[1] ( .A(dtm_resp_data_0), .B(dtmcs_dmistat[0]), .Y(m66_0) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.dtmcs_dmistat_RNO_0[1] .INIT=4'h2; // @51:466 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.dtmcs_dmistat_RNO_0[0] ( .A(dtm_resp_data_0), .B(dtmcs_dmistat[1]), .Y(m70_0) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.dtmcs_dmistat_RNO_0[0] .INIT=4'h2; // @48:16013 CFG2 \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_ns_i_a2_0[2] ( .A(currTapState[15]), .B(currTapState[1]), .Y(gen_m1_e_1) ); defparam \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_ns_i_a2_0[2] .INIT=4'h1; // @48:16310 CFG2 \genblk3.shift_active_high.shift_active_low.shiftDMI_ne_0_3 ( .A(dtmcs_dmihardreset), .B(shiftDMI_0), .Y(shiftDMI_ne_0_3) ); defparam \genblk3.shift_active_high.shift_active_low.shiftDMI_ne_0_3 .INIT=4'h4; // @48:16137 CFG2 fifo_reset_3 ( .A(dtmcs_dmihardreset), .B(dtmcs_dmireset), .Y(fifo_reset_3_Z) ); defparam fifo_reset_3.INIT=4'hE; // @48:15987 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.dtmcs_dmistat12 ( .A(dtmcs_dmireset), .B(currTapState[10]), .Y(dtmcs_dmistat12) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.dtmcs_dmistat12 .INIT=4'h4; // @48:15987 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.dtmcs_dmistat13 ( .A(dtmcs_dmireset), .B(currTapState[3]), .Y(dtmcs_dmistat13) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.dtmcs_dmistat13 .INIT=4'h4; // @48:15987 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.dtmcs_dmistat14 ( .A(dtmcs_dmireset), .B(currTapState_7), .Y(dtmcs_dmistat14) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.dtmcs_dmistat14 .INIT=4'h4; // @48:15987 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.dtmcs_dmistat15 ( .A(dtmcs_dmireset), .B(currTapState_0), .Y(dtmcs_dmistat15) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.dtmcs_dmistat15 .INIT=4'h4; // @48:16166 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR19_1 ( .A(irReg[1]), .B(irReg[2]), .Y(shiftDR19_1) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR19_1 .INIT=4'h1; // @51:466 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.dtm_resp_ready_RNO ( .A(shiftDMI_1_sqmuxa_1_Z), .B(empty_rd), .Y(shiftDMI_0_sqmuxa_3) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.dtm_resp_ready_RNO .INIT=4'h8; // @48:16244 CFG2 \dmi_outputs_and_dtmcs_resets.dtmcs_resets_active_low.dtmcs_dmihardreset_3 ( .A(dtmcs_dmihardreset), .B(shiftDR[17]), .Y(dtmcs_dmihardreset_3) ); defparam \dmi_outputs_and_dtmcs_resets.dtmcs_resets_active_low.dtmcs_dmihardreset_3 .INIT=4'h4; // @48:16368 CFG2 \ir_and_Instruction_register.gen_ir_and_Instruction_register_active_low.irReg_4[1] ( .A(dtmcs_dmihardreset), .B(shiftIR[1]), .Y(irReg_4[1]) ); defparam \ir_and_Instruction_register.gen_ir_and_Instruction_register_active_low.irReg_4[1] .INIT=4'h4; // @48:16368 CFG2 \ir_and_Instruction_register.gen_ir_and_Instruction_register_active_low.irReg_4[2] ( .A(dtmcs_dmihardreset), .B(shiftIR[2]), .Y(irReg_4[2]) ); defparam \ir_and_Instruction_register.gen_ir_and_Instruction_register_active_low.irReg_4[2] .INIT=4'h4; // @48:16368 CFG2 \ir_and_Instruction_register.gen_ir_and_Instruction_register_active_low.irReg_4[3] ( .A(dtmcs_dmihardreset), .B(shiftIR[3]), .Y(irReg_4[3]) ); defparam \ir_and_Instruction_register.gen_ir_and_Instruction_register_active_low.irReg_4[3] .INIT=4'h4; // @48:16368 CFG2 \ir_and_Instruction_register.gen_ir_and_Instruction_register_active_low.irReg_4[0] ( .A(dtmcs_dmihardreset), .B(shiftIR[0]), .Y(irReg_4[0]) ); defparam \ir_and_Instruction_register.gen_ir_and_Instruction_register_active_low.irReg_4[0] .INIT=4'hE; // @48:16368 CFG2 \ir_and_Instruction_register.gen_ir_and_Instruction_register_active_low.irReg_4[4] ( .A(dtmcs_dmihardreset), .B(shiftIR[4]), .Y(irReg_4[4]) ); defparam \ir_and_Instruction_register.gen_ir_and_Instruction_register_active_low.irReg_4[4] .INIT=4'h4; // @48:16310 CFG2 \genblk3.shift_active_high.shift_active_low.shiftIR_ne_0_3 ( .A(dtmcs_dmihardreset), .B(shiftIR[0]), .Y(shiftIR_ne_0_3) ); defparam \genblk3.shift_active_high.shift_active_low.shiftIR_ne_0_3 .INIT=4'h4; // @48:16366 CFG2 shiftDMI_2_sqmuxa ( .A(dtmcs_dmistat15), .B(dtmcs_dmihardreset), .Y(shiftDMI_2_sqmuxa_Z) ); defparam shiftDMI_2_sqmuxa.INIT=4'h2; // @51:466 CFG2 \dmi_outputs_and_dtmcs_resets.dtmcs_resets_active_low.dtmcs_dmireset_RNO ( .A(fifo_reset_3_Z), .B(shiftDR[16]), .Y(dtmcs_dmireset_3) ); defparam \dmi_outputs_and_dtmcs_resets.dtmcs_resets_active_low.dtmcs_dmireset_RNO .INIT=4'h4; // @48:16310 CFG2 \genblk3.shift_active_high.shift_active_low.shiftDR_ne_0_3 ( .A(dtmcs_dmihardreset), .B(shiftDR[0]), .Y(shiftDR_ne_0_3) ); defparam \genblk3.shift_active_high.shift_active_low.shiftDR_ne_0_3 .INIT=4'h4; // @48:16310 CFG2 \genblk3.shift_active_high.shift_active_low.shiftBP_ne_0_3 ( .A(dtmcs_dmihardreset), .B(shiftBP), .Y(shiftBP_ne_0_3) ); defparam \genblk3.shift_active_high.shift_active_low.shiftBP_ne_0_3 .INIT=4'h4; // @48:16266 CFG3 tdo_0 ( .A(shiftDR_ne_0), .B(shiftDMI_ne_0), .C(shiftDR21), .Y(N_974) ); defparam tdo_0.INIT=8'hCA; // @48:16013 CFG4 \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNO_1[1] ( .A(currTapState[13]), .B(currTapState[12]), .C(currTapState[6]), .D(currTapState[5]), .Y(gen_m1_e_27_2) ); defparam \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNO_1[1] .INIT=16'h0001; // @48:16166 CFG3 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR19_1_0 ( .A(irReg[4]), .B(irReg[3]), .C(irReg[0]), .Y(shiftDR19_1_0) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR19_1_0 .INIT=8'h10; // @48:16013 CFG3 \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNO[10] ( .A(currTapState[9]), .B(dtmcs_dmihardreset), .C(COREJTAGDEBUG_C0_0_TGT_TMS_0), .Y(currTapState_ns[10]) ); defparam \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNO[10] .INIT=8'h02; // @48:16013 CFG3 \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNO[7] ( .A(currTapState[6]), .B(dtmcs_dmihardreset), .C(COREJTAGDEBUG_C0_0_TGT_TMS_0), .Y(currTapState_ns[7]) ); defparam \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNO[7] .INIT=8'h20; // @48:16013 CFG3 \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNO[14] ( .A(currTapState[13]), .B(dtmcs_dmihardreset), .C(COREJTAGDEBUG_C0_0_TGT_TMS_0), .Y(currTapState_ns[14]) ); defparam \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNO[14] .INIT=8'h20; // @48:16013 CFG3 \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNO[3] ( .A(currTapState[2]), .B(dtmcs_dmihardreset), .C(COREJTAGDEBUG_C0_0_TGT_TMS_0), .Y(currTapState_ns[3]) ); defparam \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNO[3] .INIT=8'h02; // @48:16013 CFG3 \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNO[9] ( .A(currTapState[2]), .B(dtmcs_dmihardreset), .C(COREJTAGDEBUG_C0_0_TGT_TMS_0), .Y(currTapState_ns[9]) ); defparam \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNO[9] .INIT=8'h20; // @51:466 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_1[29] ( .A(shiftDMI_2_sqmuxa_Z), .B(shiftDMI[30]), .Y(d_N_3_mux_6) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_1[29] .INIT=4'h8; // @48:16216 CFG3 \dtm_req_data[1] ( .A(shiftDR21), .B(shiftDMI_1), .C(currTapState_4), .Y(dtm_req_data_0) ); defparam \dtm_req_data[1] .INIT=8'h80; // @48:16216 CFG3 \dtm_req_data[5] ( .A(shiftDR21), .B(shiftDMI[5]), .C(currTapState_4), .Y(dtm_req_data_4) ); defparam \dtm_req_data[5] .INIT=8'h80; // @48:16216 CFG3 \dtm_req_data[8] ( .A(shiftDR21), .B(shiftDMI[8]), .C(currTapState_4), .Y(dtm_req_data_7) ); defparam \dtm_req_data[8] .INIT=8'h80; // @48:16216 CFG3 \dtm_req_data[10] ( .A(shiftDR21), .B(shiftDMI[10]), .C(currTapState_4), .Y(dtm_req_data_9) ); defparam \dtm_req_data[10] .INIT=8'h80; // @48:16216 CFG3 \dtm_req_data[11] ( .A(shiftDR21), .B(shiftDMI[11]), .C(currTapState_4), .Y(dtm_req_data_10) ); defparam \dtm_req_data[11] .INIT=8'h80; // @48:16216 CFG3 \dtm_req_data[12] ( .A(shiftDR21), .B(shiftDMI[12]), .C(currTapState_4), .Y(dtm_req_data_11) ); defparam \dtm_req_data[12] .INIT=8'h80; // @48:16216 CFG3 \dtm_req_data[14] ( .A(shiftDR21), .B(shiftDMI[14]), .C(currTapState_4), .Y(dtm_req_data_13) ); defparam \dtm_req_data[14] .INIT=8'h80; // @48:16013 CFG3 \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_ns_i_a2[4] ( .A(currTapState_0), .B(currTapState[7]), .C(currTapState[3]), .Y(N_139) ); defparam \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_ns_i_a2[4] .INIT=8'h01; // @48:16013 CFG3 \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_ns_i_a2[11] ( .A(currTapState_7), .B(currTapState[14]), .C(currTapState[10]), .Y(N_140) ); defparam \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_ns_i_a2[11] .INIT=8'h01; // @51:466 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[0] ( .A(shiftDMI_2_sqmuxa_Z), .B(shiftDMI_1), .Y(N_80) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[0] .INIT=4'h8; // @48:16366 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[39] ( .A(shiftDMI_2_sqmuxa_Z), .B(shiftDMI[40]), .Y(shiftDMI_7[39]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[39] .INIT=4'h8; // @48:16216 CFG3 \dtm_req_data[40] ( .A(shiftDR21), .B(shiftDMI[40]), .C(currTapState_4), .Y(dtm_req_data_39) ); defparam \dtm_req_data[40] .INIT=8'h80; // @48:16216 CFG3 \dtm_req_data[34] ( .A(shiftDR21), .B(shiftDMI[34]), .C(currTapState_4), .Y(dtm_req_data_33) ); defparam \dtm_req_data[34] .INIT=8'h80; // @48:16216 CFG3 \dtm_req_data[33] ( .A(shiftDR21), .B(shiftDMI[33]), .C(currTapState_4), .Y(dtm_req_data_32) ); defparam \dtm_req_data[33] .INIT=8'h80; // @48:16216 CFG3 \dtm_req_data[31] ( .A(shiftDR21), .B(shiftDMI[31]), .C(currTapState_4), .Y(dtm_req_data_30) ); defparam \dtm_req_data[31] .INIT=8'h80; // @48:16216 CFG3 \dtm_req_data[30] ( .A(shiftDR21), .B(shiftDMI[30]), .C(currTapState_4), .Y(dtm_req_data_29) ); defparam \dtm_req_data[30] .INIT=8'h80; // @48:16216 CFG3 \dtm_req_data[29] ( .A(shiftDR21), .B(shiftDMI[29]), .C(currTapState_4), .Y(dtm_req_data_28) ); defparam \dtm_req_data[29] .INIT=8'h80; // @48:16216 CFG3 \dtm_req_data[28] ( .A(shiftDR21), .B(shiftDMI[28]), .C(currTapState_4), .Y(dtm_req_data_27) ); defparam \dtm_req_data[28] .INIT=8'h80; // @48:16216 CFG3 \dtm_req_data[27] ( .A(shiftDR21), .B(shiftDMI[27]), .C(currTapState_4), .Y(dtm_req_data_26) ); defparam \dtm_req_data[27] .INIT=8'h80; // @48:16216 CFG3 \dtm_req_data[26] ( .A(shiftDR21), .B(shiftDMI[26]), .C(currTapState_4), .Y(dtm_req_data_25) ); defparam \dtm_req_data[26] .INIT=8'h80; // @48:16216 CFG3 \dtm_req_data[25] ( .A(shiftDR21), .B(shiftDMI[25]), .C(currTapState_4), .Y(dtm_req_data_24) ); defparam \dtm_req_data[25] .INIT=8'h80; // @48:16216 CFG3 \dtm_req_data[24] ( .A(shiftDR21), .B(shiftDMI[24]), .C(currTapState_4), .Y(dtm_req_data_23) ); defparam \dtm_req_data[24] .INIT=8'h80; // @48:16216 CFG3 \dtm_req_data[23] ( .A(shiftDR21), .B(shiftDMI[23]), .C(currTapState_4), .Y(dtm_req_data_22) ); defparam \dtm_req_data[23] .INIT=8'h80; // @48:16216 CFG3 \dtm_req_data[22] ( .A(shiftDR21), .B(shiftDMI[22]), .C(currTapState_4), .Y(dtm_req_data_21) ); defparam \dtm_req_data[22] .INIT=8'h80; // @48:16216 CFG3 \dtm_req_data[21] ( .A(shiftDR21), .B(shiftDMI[21]), .C(currTapState_4), .Y(dtm_req_data_20) ); defparam \dtm_req_data[21] .INIT=8'h80; // @48:16216 CFG3 \dtm_req_data[20] ( .A(shiftDR21), .B(shiftDMI[20]), .C(currTapState_4), .Y(dtm_req_data_19) ); defparam \dtm_req_data[20] .INIT=8'h80; // @48:16216 CFG3 \dtm_req_data[19] ( .A(shiftDR21), .B(shiftDMI[19]), .C(currTapState_4), .Y(dtm_req_data_18) ); defparam \dtm_req_data[19] .INIT=8'h80; // @48:16216 CFG3 \dtm_req_data[17] ( .A(shiftDR21), .B(shiftDMI[17]), .C(currTapState_4), .Y(dtm_req_data_16) ); defparam \dtm_req_data[17] .INIT=8'h80; // @48:16216 CFG3 \dtm_req_data[16] ( .A(shiftDR21), .B(shiftDMI[16]), .C(currTapState_4), .Y(dtm_req_data_15) ); defparam \dtm_req_data[16] .INIT=8'h80; // @48:16216 CFG3 \dtm_req_data[9] ( .A(shiftDR21), .B(shiftDMI[9]), .C(currTapState_4), .Y(dtm_req_data_8) ); defparam \dtm_req_data[9] .INIT=8'h80; // @48:16216 CFG3 \dtm_req_data[7] ( .A(shiftDR21), .B(shiftDMI[7]), .C(currTapState_4), .Y(dtm_req_data_6) ); defparam \dtm_req_data[7] .INIT=8'h80; // @48:16216 CFG3 \dtm_req_data[4] ( .A(shiftDR21), .B(shiftDMI[4]), .C(currTapState_4), .Y(dtm_req_data_3) ); defparam \dtm_req_data[4] .INIT=8'h80; // @48:16216 CFG3 \dtm_req_data[3] ( .A(shiftDR21), .B(shiftDMI[3]), .C(currTapState_4), .Y(dtm_req_data_2) ); defparam \dtm_req_data[3] .INIT=8'h80; // @48:16366 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_RNO[24] ( .A(shiftDMI_2_sqmuxa_Z), .B(shiftDR[25]), .Y(shiftDR_8[24]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_RNO[24] .INIT=4'h8; // @48:16366 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_RNO[23] ( .A(shiftDMI_2_sqmuxa_Z), .B(shiftDR[24]), .Y(shiftDR_8[23]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_RNO[23] .INIT=4'h8; // @48:16366 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_RNO[21] ( .A(shiftDMI_2_sqmuxa_Z), .B(shiftDR[22]), .Y(shiftDR_8[21]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_RNO[21] .INIT=4'h8; // @48:16366 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_RNO[19] ( .A(shiftDMI_2_sqmuxa_Z), .B(shiftDR[20]), .Y(shiftDR_8[19]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_RNO[19] .INIT=4'h8; // @48:16366 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_RNO[18] ( .A(shiftDMI_2_sqmuxa_Z), .B(shiftDR[19]), .Y(shiftDR_8[18]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_RNO[18] .INIT=4'h8; // @48:16366 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_RNO[17] ( .A(shiftDMI_2_sqmuxa_Z), .B(shiftDR[18]), .Y(shiftDR_8[17]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_RNO[17] .INIT=4'h8; // @48:16366 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_RNO[14] ( .A(shiftDMI_2_sqmuxa_Z), .B(shiftDR[15]), .Y(shiftDR_8[14]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_RNO[14] .INIT=4'h8; // @48:16366 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_RNO[9] ( .A(shiftDMI_2_sqmuxa_Z), .B(shiftDR[10]), .Y(shiftDR_8[9]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_RNO[9] .INIT=4'h8; // @48:16366 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_RNO[8] ( .A(shiftDMI_2_sqmuxa_Z), .B(shiftDR[9]), .Y(shiftDR_8[8]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_RNO[8] .INIT=4'h8; // @48:16366 CFG3 \gen_shift_register_active_high.gen_shift_register_active_low.shiftIR_RNO[4] ( .A(dtmcs_dmistat14), .B(COREJTAGDEBUG_C0_0_TGT_TDI_0), .C(dtmcs_dmihardreset), .Y(shiftIR_4[4]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftIR_RNO[4] .INIT=8'h08; // @48:16366 CFG3 \gen_shift_register_active_high.gen_shift_register_active_low.shiftIR_RNO[2] ( .A(dtmcs_dmistat14), .B(shiftIR[3]), .C(dtmcs_dmihardreset), .Y(shiftIR_4[2]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftIR_RNO[2] .INIT=8'h08; // @48:16366 CFG3 \gen_shift_register_active_high.gen_shift_register_active_low.shiftIR_RNO[1] ( .A(dtmcs_dmistat14), .B(shiftIR[2]), .C(dtmcs_dmihardreset), .Y(shiftIR_4[1]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftIR_RNO[1] .INIT=8'h08; // @48:16366 CFG3 \gen_shift_register_active_high.gen_shift_register_active_low.shiftIR_RNO[3] ( .A(dtmcs_dmistat14), .B(shiftIR[4]), .C(dtmcs_dmihardreset), .Y(shiftIR_4[3]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftIR_RNO[3] .INIT=8'h08; // @48:16366 CFG2 shiftDMI_2_sqmuxa_RNIQU23F ( .A(COREJTAGDEBUG_C0_0_TGT_TDI_0), .B(shiftDMI_2_sqmuxa_Z), .Y(shiftDR_8[31]) ); defparam shiftDMI_2_sqmuxa_RNIQU23F.INIT=4'h8; // @48:16366 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_RNO[7] ( .A(shiftDMI_2_sqmuxa_Z), .B(shiftDR[8]), .Y(shiftDR_8[7]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_RNO[7] .INIT=4'h8; // @48:16366 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_RNO[13] ( .A(shiftDMI_2_sqmuxa_Z), .B(shiftDR[14]), .Y(shiftDR_8[13]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_RNO[13] .INIT=4'h8; // @48:16366 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_RNO[29] ( .A(shiftDMI_2_sqmuxa_Z), .B(shiftDR[30]), .Y(shiftDR_8[29]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_RNO[29] .INIT=4'h8; // @48:16366 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_RNO[28] ( .A(shiftDMI_2_sqmuxa_Z), .B(shiftDR[29]), .Y(shiftDR_8[28]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_RNO[28] .INIT=4'h8; // @48:16366 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[38] ( .A(shiftDMI_2_sqmuxa_Z), .B(shiftDMI_39), .Y(shiftDMI_7[38]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[38] .INIT=4'h8; // @48:16366 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[37] ( .A(shiftDMI_2_sqmuxa_Z), .B(shiftDMI_38), .Y(shiftDMI_7[37]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[37] .INIT=4'h8; // @48:16366 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[36] ( .A(shiftDMI_2_sqmuxa_Z), .B(shiftDMI_37), .Y(shiftDMI_7[36]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[36] .INIT=4'h8; // @48:16366 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[35] ( .A(shiftDMI_2_sqmuxa_Z), .B(shiftDMI_36), .Y(shiftDMI_7[35]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[35] .INIT=4'h8; // @48:16366 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[34] ( .A(shiftDMI_2_sqmuxa_Z), .B(shiftDMI_35), .Y(shiftDMI_7[34]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[34] .INIT=4'h8; // @48:16366 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_RNO[16] ( .A(shiftDMI_2_sqmuxa_Z), .B(shiftDR[17]), .Y(shiftDR_8[16]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_RNO[16] .INIT=4'h8; // @51:466 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_RNO[15] ( .A(shiftDMI_2_sqmuxa_Z), .B(shiftDR[16]), .Y(shiftDR_8[15]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_RNO[15] .INIT=4'h8; // @48:16137 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[1] ( .A(shiftDMI_2_sqmuxa_Z), .B(shiftDMI_2), .Y(shiftDMI_m[2]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[1] .INIT=4'h8; // @48:16366 CFG2 \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNIKCAA3[15] ( .A(dtmcs_dmihardreset), .B(currTapState[15]), .Y(N_136_i) ); defparam \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNIKCAA3[15] .INIT=4'hE; // @48:16135 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftBP_ldmx ( .A(shiftBP), .B(dtmcs_dmihardreset), .C(dtmcs_dmistat15), .D(COREJTAGDEBUG_C0_0_TGT_TDI_0), .Y(shiftBP_ldmx) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftBP_ldmx .INIT=16'h3202; // @48:16013 CFG4 \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNO_0[1] ( .A(gen_m1_e_27_2), .B(dtmcs_dmihardreset), .C(currTapState[9]), .D(currTapState[2]), .Y(gen_m1_e_27_1) ); defparam \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNO_0[1] .INIT=16'h0002; // @48:16013 CFG4 \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNO[15] ( .A(currTapState[14]), .B(currTapState[12]), .C(dtmcs_dmihardreset), .D(COREJTAGDEBUG_C0_0_TGT_TMS_0), .Y(gen_N_3_mux_0_2) ); defparam \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNO[15] .INIT=16'h0E00; // @48:16013 CFG4 \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNO[8] ( .A(currTapState[7]), .B(currTapState[5]), .C(dtmcs_dmihardreset), .D(COREJTAGDEBUG_C0_0_TGT_TMS_0), .Y(gen_N_3_mux_0_0) ); defparam \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNO[8] .INIT=16'h0E00; // @48:16167 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR20 ( .A(irReg[4]), .B(irReg[3]), .C(irReg[0]), .D(shiftDR19_1), .Y(shiftDR20) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR20 .INIT=16'h0200; // @48:16168 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR21 ( .A(irReg[4]), .B(irReg[3]), .C(irReg[0]), .D(shiftDR19_1), .Y(shiftDR21) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR21 .INIT=16'h2000; // @48:16013 CFG4 \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNO[13] ( .A(currTapState[13]), .B(currTapState[12]), .C(dtmcs_dmihardreset), .D(COREJTAGDEBUG_C0_0_TGT_TMS_0), .Y(gen_N_3_mux_0_3) ); defparam \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNO[13] .INIT=16'h000E; // @48:16013 CFG4 \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNO[5] ( .A(currTapState_0), .B(currTapState[3]), .C(COREJTAGDEBUG_C0_0_TGT_TMS_0), .D(dtmcs_dmihardreset), .Y(gen_N_3_mux_0_4) ); defparam \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNO[5] .INIT=16'h00E0; // @48:16013 CFG4 \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNO[6] ( .A(currTapState[6]), .B(currTapState[5]), .C(dtmcs_dmihardreset), .D(COREJTAGDEBUG_C0_0_TGT_TMS_0), .Y(gen_N_3_mux_0_5) ); defparam \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNO[6] .INIT=16'h000E; // @48:16013 CFG4 \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNO[12] ( .A(currTapState_7), .B(currTapState[10]), .C(COREJTAGDEBUG_C0_0_TGT_TMS_0), .D(dtmcs_dmihardreset), .Y(gen_N_3_mux_0_7) ); defparam \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNO[12] .INIT=16'h00E0; // @48:16137 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[1] ( .A(dtm_resp_data_0), .B(empty_rd), .C(shiftDMI_1_sqmuxa_1_Z), .D(shiftDMI_m[2]), .Y(shiftDMI_7[1]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[1] .INIT=16'hFF80; // @51:466 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[0] ( .A(N_80), .B(shiftDMI_1_sqmuxa_1_Z), .C(empty_rd), .D(dtm_resp_data_0), .Y(m63_N_6) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[0] .INIT=16'hEAAA; // @48:16366 CFG3 shiftDMI_1_sqmuxa_1 ( .A(dtmcs_dmihardreset), .B(dtmcs_dmistat13), .C(shiftDR21), .Y(shiftDMI_1_sqmuxa_1_Z) ); defparam shiftDMI_1_sqmuxa_1.INIT=8'h40; // @48:16137 CFG3 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_8_0_iv[1] ( .A(shiftDR[2]), .B(shiftDMI_2_sqmuxa_Z), .C(shiftDR_1_sqmuxa_Z), .Y(shiftDR_8[1]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_8_0_iv[1] .INIT=8'hF8; // @48:16137 CFG3 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_8_0_iv[30] ( .A(shiftDR[31]), .B(shiftDMI_2_sqmuxa_Z), .C(shiftDR_1_sqmuxa_Z), .Y(shiftDR_8[30]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_8_0_iv[30] .INIT=8'hF8; // @48:16137 CFG3 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_8_0_iv[27] ( .A(shiftDR[28]), .B(shiftDMI_2_sqmuxa_Z), .C(shiftDR_1_sqmuxa_Z), .Y(shiftDR_8[27]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_8_0_iv[27] .INIT=8'hF8; // @48:16137 CFG3 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_8_0_iv[26] ( .A(shiftDR[27]), .B(shiftDMI_2_sqmuxa_Z), .C(shiftDR_1_sqmuxa_Z), .Y(shiftDR_8[26]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_8_0_iv[26] .INIT=8'hF8; // @48:16137 CFG3 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_8_0_iv[25] ( .A(shiftDR[26]), .B(shiftDMI_2_sqmuxa_Z), .C(shiftDR_1_sqmuxa_Z), .Y(shiftDR_8[25]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_8_0_iv[25] .INIT=8'hF8; // @48:16137 CFG3 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_8_0_iv[22] ( .A(shiftDR[23]), .B(shiftDMI_2_sqmuxa_Z), .C(shiftDR_1_sqmuxa_Z), .Y(shiftDR_8[22]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_8_0_iv[22] .INIT=8'hF8; // @48:16137 CFG3 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_8_0_iv[20] ( .A(shiftDR[21]), .B(shiftDMI_2_sqmuxa_Z), .C(shiftDR_1_sqmuxa_Z), .Y(shiftDR_8[20]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_8_0_iv[20] .INIT=8'hF8; // @48:16137 CFG3 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_8_0_iv[12] ( .A(shiftDR[13]), .B(shiftDMI_2_sqmuxa_Z), .C(shiftDR_1_sqmuxa_Z), .Y(shiftDR_8[12]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_8_0_iv[12] .INIT=8'hF8; // @48:16137 CFG3 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_8_0_iv[3] ( .A(shiftDR[4]), .B(shiftDMI_2_sqmuxa_Z), .C(shiftDR_1_sqmuxa_Z), .Y(shiftDR_8[3]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_8_0_iv[3] .INIT=8'hF8; // @48:16137 CFG3 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_8_0_iv[2] ( .A(shiftDR[3]), .B(shiftDMI_2_sqmuxa_Z), .C(shiftDR_1_sqmuxa_Z), .Y(shiftDR_8[2]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_8_0_iv[2] .INIT=8'hF8; // @48:16135 CFG3 shiftBP_1_sqmuxa_i ( .A(shiftDMI_2_sqmuxa_Z), .B(un1_shiftDR20), .C(shiftDR21), .Y(shiftBP_1_sqmuxa_i_Z) ); defparam shiftBP_1_sqmuxa_i.INIT=8'h57; // @48:16135 CFG3 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_8_0_iv_i[6] ( .A(dtmcs_dmistat15), .B(shiftDR[7]), .C(dtmcs_dmihardreset), .Y(shiftDR_8_0_iv_i[6]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_8_0_iv_i[6] .INIT=8'h0D; // @48:16135 CFG3 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_8_0_iv_i[0] ( .A(dtmcs_dmistat15), .B(shiftDR[1]), .C(dtmcs_dmihardreset), .Y(shiftDR_8_0_iv_i[0]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_8_0_iv_i[0] .INIT=8'h0D; // @48:16135 CFG3 shiftIR_0_sqmuxa_i ( .A(dtmcs_dmihardreset), .B(dtmcs_dmistat14), .C(dtmcs_dmistat12), .Y(shiftIR_0_sqmuxa_i_Z) ); defparam shiftIR_0_sqmuxa_i.INIT=8'hFE; // @48:16135 CFG3 \gen_shift_register_active_high.gen_shift_register_active_low.shiftIR_4_iv_i[0] ( .A(dtmcs_dmistat14), .B(shiftIR[1]), .C(dtmcs_dmihardreset), .Y(shiftIR_4_iv_i[0]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftIR_4_iv_i[0] .INIT=8'h0D; // @48:16135 CFG3 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_RNO[5] ( .A(shiftDR[6]), .B(shiftDMI_2_sqmuxa_Z), .C(shiftDR_2_sqmuxa_Z), .Y(N_75_mux_i) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_RNO[5] .INIT=8'hF8; // @51:466 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[15] ( .A(empty_rd), .B(fifo_memory[15]), .Y(m54_a0_1) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[15] .INIT=4'h8; // @51:466 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[26] ( .A(empty_rd), .B(fifo_memory[26]), .Y(m27_a0_1) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[26] .INIT=4'h8; // @51:466 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[23] ( .A(empty_rd), .B(fifo_memory[23]), .Y(m36_a0_1) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[23] .INIT=4'h8; // @51:466 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[2] ( .A(empty_rd), .B(fifo_memory[2]), .Y(m60_a0_1) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[2] .INIT=4'h8; // @51:466 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[6] ( .A(empty_rd), .B(fifo_memory[6]), .Y(m57_a0_1) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[6] .INIT=4'h8; // @51:466 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[25] ( .A(empty_rd), .B(fifo_memory[25]), .Y(m30_a0_1) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[25] .INIT=4'h8; // @51:466 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[32] ( .A(empty_rd), .B(fifo_memory[32]), .Y(m15_a0_1) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[32] .INIT=4'h8; // @51:466 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[22] ( .A(empty_rd), .B(fifo_memory[22]), .Y(m39_a0_1) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[22] .INIT=4'h8; // @51:466 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[18] ( .A(empty_rd), .B(fifo_memory[18]), .Y(m48_a0_1) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[18] .INIT=4'h8; // @51:466 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[16] ( .A(empty_rd), .B(fifo_memory[16]), .Y(m51_a0_1) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[16] .INIT=4'h8; // @51:466 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[21] ( .A(empty_rd), .B(fifo_memory[21]), .Y(m42_a0_1) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[21] .INIT=4'h8; // @51:466 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[29] ( .A(rd_ptr_0), .B(empty_rd), .C(ram1_29), .D(ram0_29), .Y(m21_m4_0) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[29] .INIT=16'hC480; // @48:16013 CFG3 \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNO[11] ( .A(dtmcs_dmihardreset), .B(COREJTAGDEBUG_C0_0_TGT_TMS_0), .C(N_140), .Y(gen_N_3_mux_0_1) ); defparam \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNO[11] .INIT=8'h01; // @48:16013 CFG4 \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNO[2] ( .A(gen_m1_e_1), .B(currTapState_4), .C(dtmcs_dmihardreset), .D(COREJTAGDEBUG_C0_0_TGT_TMS_0), .Y(gen_N_3_mux_0) ); defparam \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNO[2] .INIT=16'h0D00; // @48:16013 CFG3 \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNO[4] ( .A(dtmcs_dmihardreset), .B(COREJTAGDEBUG_C0_0_TGT_TMS_0), .C(N_139), .Y(gen_N_3_mux_0_6) ); defparam \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNO[4] .INIT=8'h01; // @48:16165 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.un1_shiftDR20 ( .A(irReg[4]), .B(irReg[3]), .C(irReg[0]), .D(shiftDR19_1), .Y(un1_shiftDR20) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.un1_shiftDR20 .INIT=16'h1200; // @48:16366 CFG4 shiftDR_1_sqmuxa ( .A(dtmcs_dmihardreset), .B(dtmcs_dmistat13), .C(shiftDR19_1), .D(shiftDR19_1_0), .Y(shiftDR_1_sqmuxa_Z) ); defparam shiftDR_1_sqmuxa.INIT=16'h4000; // @48:16366 CFG3 shiftDR_2_sqmuxa ( .A(dtmcs_dmihardreset), .B(dtmcs_dmistat13), .C(shiftDR20), .Y(shiftDR_2_sqmuxa_Z) ); defparam shiftDR_2_sqmuxa.INIT=8'h40; // @48:16135 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_RNO[11] ( .A(dtmcs_dmistat[1]), .B(shiftDR[12]), .C(shiftDR_2_sqmuxa_Z), .D(shiftDMI_2_sqmuxa_Z), .Y(N_78_mux_i) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_RNO[11] .INIT=16'hECA0; // @48:16135 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_RNO[10] ( .A(dtmcs_dmistat[0]), .B(shiftDR[11]), .C(shiftDR_2_sqmuxa_Z), .D(shiftDMI_2_sqmuxa_Z), .Y(N_79_mux_i) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_RNO[10] .INIT=16'hECA0; // @48:16135 CFG3 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_8_0_iv_i[4] ( .A(dtmcs_dmihardreset), .B(shiftDMI_2_sqmuxa_Z), .C(shiftDR[5]), .Y(shiftDR_8_0_iv_i[4]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDR_8_0_iv_i[4] .INIT=8'h51; // @48:16135 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.dtmcs_dmistat_RNO[1] ( .A(fifo_reset_3_Z), .B(dtmcs_dmistat[1]), .C(shiftDMI_1_sqmuxa_1_Z), .D(m66_0), .Y(N_1126_i) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.dtmcs_dmistat_RNO[1] .INIT=16'h7444; // @48:16135 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.dtmcs_dmistat_RNO[0] ( .A(fifo_reset_3_Z), .B(dtmcs_dmistat[0]), .C(shiftDMI_1_sqmuxa_1_Z), .D(m70_0), .Y(i7_mux_i) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.dtmcs_dmistat_RNO[0] .INIT=16'h7444; // @48:16137 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[30] ( .A(empty_rd), .B(fifo_memory[30]), .Y(gen_m2_i_a3_9_1) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[30] .INIT=4'h8; // @48:16137 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[11] ( .A(empty_rd), .B(fifo_memory[11]), .Y(gen_m2_i_a3_1) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[11] .INIT=4'h8; // @48:16137 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[3] ( .A(empty_rd), .B(fifo_memory[3]), .Y(gen_m2_i_a3_12_1) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[3] .INIT=4'h8; // @48:16137 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[10] ( .A(empty_rd), .B(fifo_memory[10]), .Y(gen_m2_i_a3_8_1) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[10] .INIT=4'h8; // @48:16137 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[14] ( .A(empty_rd), .B(fifo_memory[14]), .Y(gen_m2_i_a3_2_1) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[14] .INIT=4'h8; // @48:16137 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[13] ( .A(empty_rd), .B(fifo_memory[13]), .Y(gen_m2_i_a3_10_1) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[13] .INIT=4'h8; // @48:16137 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_7_iv_RNO[33] ( .A(empty_rd), .B(fifo_memory[33]), .Y(dtm_m1_0_a2_1) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_7_iv_RNO[33] .INIT=4'h8; // @48:16137 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[4] ( .A(empty_rd), .B(fifo_memory[4]), .Y(gen_m2_i_a3_0_1) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[4] .INIT=4'h8; // @48:16137 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[17] ( .A(empty_rd), .B(fifo_memory[17]), .Y(gen_m2_i_a3_3_1) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[17] .INIT=4'h8; // @48:16137 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[7] ( .A(empty_rd), .B(fifo_memory[7]), .Y(gen_m2_i_a3_1_1) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[7] .INIT=4'h8; // @51:466 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[24] ( .A(empty_rd), .B(fifo_memory[24]), .Y(m33_a0_1) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[24] .INIT=4'h8; // @48:16137 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_7_iv_RNO[28] ( .A(empty_rd), .B(fifo_memory[28]), .Y(dtm_resp_data_m_1[28]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_7_iv_RNO[28] .INIT=4'h8; // @48:16137 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[8] ( .A(empty_rd), .B(fifo_memory[8]), .Y(gen_m2_i_a3_6_1) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[8] .INIT=4'h8; // @48:16137 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[19] ( .A(empty_rd), .B(fifo_memory[19]), .Y(gen_m2_i_a3_5_1) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[19] .INIT=4'h8; // @48:16137 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[12] ( .A(empty_rd), .B(fifo_memory[12]), .Y(gen_m2_i_a3_4_1) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[12] .INIT=4'h8; // @51:466 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[20] ( .A(empty_rd), .B(fifo_memory[20]), .Y(m45_m1_e_1) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[20] .INIT=4'h8; // @48:16137 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[5] ( .A(empty_rd), .B(fifo_memory[5]), .Y(gen_m2_i_a3_7_1) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[5] .INIT=4'h8; // @51:466 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[27] ( .A(empty_rd), .B(fifo_memory[27]), .Y(m24_m1_e_1) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[27] .INIT=4'h8; // @48:16137 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[9] ( .A(empty_rd), .B(fifo_memory[9]), .Y(gen_m2_i_a3_11_1) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[9] .INIT=4'h8; // @51:466 CFG2 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[31] ( .A(empty_rd), .B(fifo_memory[31]), .Y(m18_m1_e_1) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO_0[31] .INIT=4'h8; // @48:16015 CFG3 \dmi_outputs_and_dtmcs_resets.dtmcs_resets_active_low.un1_dmi_outputs_and_dtmcs_resets.dtmcs_resets_active_low.dtmcs_dmihardreset ( .A(dtmcs_dmihardreset), .B(shiftDR20), .C(currTapState_4), .Y(dtmcs_dmihardreset_0) ); defparam \dmi_outputs_and_dtmcs_resets.dtmcs_resets_active_low.un1_dmi_outputs_and_dtmcs_resets.dtmcs_resets_active_low.dtmcs_dmihardreset .INIT=8'hEA; // @48:16135 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.un1_shiftDR20_RNIJ92RC ( .A(dtmcs_dmihardreset), .B(dtmcs_dmistat13), .C(dtmcs_dmistat15), .D(un1_shiftDR20), .Y(un1_shiftDMI_0_sqmuxa_2_i) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.un1_shiftDR20_RNIJ92RC .INIT=16'hFEAA; // @48:16013 CFG4 \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNO[1] ( .A(gen_m1_e_27_1), .B(COREJTAGDEBUG_C0_0_TGT_TMS_0), .C(N_140), .D(N_139), .Y(currTapState_ns[1]) ); defparam \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNO[1] .INIT=16'h2000; // @48:15729 CFG4 \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNI6QHQ6[8] ( .A(currTapState_4), .B(write_en_1), .C(wr_ptr_0), .D(shiftDR21), .Y(CO0_1) ); defparam \gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState_RNI6QHQ6[8] .INIT=16'h8000; // @48:16135 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.dtmcs_dmistat13_RNI1RVGA ( .A(dtmcs_dmihardreset), .B(dtmcs_dmistat13), .C(dtmcs_dmistat15), .D(shiftDR21), .Y(un1_shiftDMI_0_sqmuxa_i) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.dtmcs_dmistat13_RNI1RVGA .INIT=16'hFEAA; // @48:16137 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[3] ( .A(shiftDMI[4]), .B(gen_m2_i_a3_12_1), .C(shiftDMI_2_sqmuxa_Z), .D(shiftDMI_1_sqmuxa_1_Z), .Y(shiftDMI_7[3]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[3] .INIT=16'hECA0; // @48:16137 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[9] ( .A(shiftDMI[10]), .B(gen_m2_i_a3_11_1), .C(shiftDMI_2_sqmuxa_Z), .D(shiftDMI_1_sqmuxa_1_Z), .Y(shiftDMI_7[9]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[9] .INIT=16'hECA0; // @48:16137 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[13] ( .A(shiftDMI[14]), .B(gen_m2_i_a3_10_1), .C(shiftDMI_2_sqmuxa_Z), .D(shiftDMI_1_sqmuxa_1_Z), .Y(shiftDMI_7[13]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[13] .INIT=16'hECA0; // @48:16137 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[30] ( .A(shiftDMI[31]), .B(gen_m2_i_a3_9_1), .C(shiftDMI_2_sqmuxa_Z), .D(shiftDMI_1_sqmuxa_1_Z), .Y(shiftDMI_7[30]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[30] .INIT=16'hECA0; // @48:16137 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[10] ( .A(shiftDMI[11]), .B(gen_m2_i_a3_8_1), .C(shiftDMI_2_sqmuxa_Z), .D(shiftDMI_1_sqmuxa_1_Z), .Y(shiftDMI_7[10]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[10] .INIT=16'hECA0; // @48:16137 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[5] ( .A(shiftDMI_6), .B(gen_m2_i_a3_7_1), .C(shiftDMI_2_sqmuxa_Z), .D(shiftDMI_1_sqmuxa_1_Z), .Y(shiftDMI_7[5]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[5] .INIT=16'hECA0; // @48:16137 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[8] ( .A(shiftDMI[9]), .B(gen_m2_i_a3_6_1), .C(shiftDMI_2_sqmuxa_Z), .D(shiftDMI_1_sqmuxa_1_Z), .Y(shiftDMI_7[8]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[8] .INIT=16'hECA0; // @48:16137 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[19] ( .A(shiftDMI[20]), .B(gen_m2_i_a3_5_1), .C(shiftDMI_2_sqmuxa_Z), .D(shiftDMI_1_sqmuxa_1_Z), .Y(shiftDMI_7[19]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[19] .INIT=16'hECA0; // @48:16137 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[12] ( .A(shiftDMI_13), .B(gen_m2_i_a3_4_1), .C(shiftDMI_2_sqmuxa_Z), .D(shiftDMI_1_sqmuxa_1_Z), .Y(shiftDMI_7[12]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[12] .INIT=16'hECA0; // @48:16137 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[17] ( .A(shiftDMI_18), .B(gen_m2_i_a3_3_1), .C(shiftDMI_2_sqmuxa_Z), .D(shiftDMI_1_sqmuxa_1_Z), .Y(shiftDMI_7[17]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[17] .INIT=16'hECA0; // @48:16137 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[14] ( .A(shiftDMI_15), .B(gen_m2_i_a3_2_1), .C(shiftDMI_2_sqmuxa_Z), .D(shiftDMI_1_sqmuxa_1_Z), .Y(shiftDMI_7[14]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[14] .INIT=16'hECA0; // @48:16137 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[7] ( .A(shiftDMI[8]), .B(gen_m2_i_a3_1_1), .C(shiftDMI_2_sqmuxa_Z), .D(shiftDMI_1_sqmuxa_1_Z), .Y(shiftDMI_7[7]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[7] .INIT=16'hECA0; // @48:16137 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[4] ( .A(shiftDMI[5]), .B(gen_m2_i_a3_0_1), .C(shiftDMI_2_sqmuxa_Z), .D(shiftDMI_1_sqmuxa_1_Z), .Y(shiftDMI_7[4]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[4] .INIT=16'hECA0; // @48:16137 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[11] ( .A(shiftDMI[12]), .B(gen_m2_i_a3_1), .C(shiftDMI_2_sqmuxa_Z), .D(shiftDMI_1_sqmuxa_1_Z), .Y(shiftDMI_7[11]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[11] .INIT=16'hECA0; // @48:16137 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_7_iv[28] ( .A(shiftDMI[29]), .B(dtm_resp_data_m_1[28]), .C(shiftDMI_2_sqmuxa_Z), .D(shiftDMI_1_sqmuxa_1_Z), .Y(shiftDMI_7[28]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_7_iv[28] .INIT=16'hECA0; // @48:16137 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_7_iv[33] ( .A(shiftDMI[34]), .B(dtm_m1_0_a2_1), .C(shiftDMI_2_sqmuxa_Z), .D(shiftDMI_1_sqmuxa_1_Z), .Y(shiftDMI_7[33]) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_7_iv[33] .INIT=16'hECA0; // @48:16135 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[6] ( .A(m57_a0_1), .B(shiftDMI[7]), .C(shiftDMI_1_sqmuxa_1_Z), .D(shiftDMI_2_sqmuxa_Z), .Y(N_58_i) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[6] .INIT=16'hECA0; // @48:16135 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[2] ( .A(m60_a0_1), .B(shiftDMI[3]), .C(shiftDMI_1_sqmuxa_1_Z), .D(shiftDMI_2_sqmuxa_Z), .Y(N_61_i) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[2] .INIT=16'hECA0; // @48:16135 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[22] ( .A(m39_a0_1), .B(shiftDMI[23]), .C(shiftDMI_1_sqmuxa_1_Z), .D(shiftDMI_2_sqmuxa_Z), .Y(N_40_i) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[22] .INIT=16'hECA0; // @48:16135 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[21] ( .A(m42_a0_1), .B(shiftDMI[22]), .C(shiftDMI_1_sqmuxa_1_Z), .D(shiftDMI_2_sqmuxa_Z), .Y(N_43_i) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[21] .INIT=16'hECA0; // @48:16135 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[18] ( .A(m48_a0_1), .B(shiftDMI[19]), .C(shiftDMI_1_sqmuxa_1_Z), .D(shiftDMI_2_sqmuxa_Z), .Y(N_49_i) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[18] .INIT=16'hECA0; // @48:16135 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[16] ( .A(m51_a0_1), .B(shiftDMI[17]), .C(shiftDMI_1_sqmuxa_1_Z), .D(shiftDMI_2_sqmuxa_Z), .Y(N_52_i) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[16] .INIT=16'hECA0; // @48:16135 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[15] ( .A(m54_a0_1), .B(shiftDMI[16]), .C(shiftDMI_1_sqmuxa_1_Z), .D(shiftDMI_2_sqmuxa_Z), .Y(N_55_i) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[15] .INIT=16'hECA0; // @48:16135 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[32] ( .A(m15_a0_1), .B(shiftDMI[33]), .C(shiftDMI_1_sqmuxa_1_Z), .D(shiftDMI_2_sqmuxa_Z), .Y(N_16_0_i) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[32] .INIT=16'hECA0; // @48:16135 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[26] ( .A(m27_a0_1), .B(shiftDMI[27]), .C(shiftDMI_1_sqmuxa_1_Z), .D(shiftDMI_2_sqmuxa_Z), .Y(N_28_0_i) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[26] .INIT=16'hECA0; // @48:16135 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[25] ( .A(m30_a0_1), .B(shiftDMI[26]), .C(shiftDMI_1_sqmuxa_1_Z), .D(shiftDMI_2_sqmuxa_Z), .Y(N_31_i) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[25] .INIT=16'hECA0; // @48:16135 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[23] ( .A(m36_a0_1), .B(shiftDMI[24]), .C(shiftDMI_1_sqmuxa_1_Z), .D(shiftDMI_2_sqmuxa_Z), .Y(N_37_i) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[23] .INIT=16'hECA0; // @48:16135 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[20] ( .A(m45_m1_e_1), .B(shiftDMI[21]), .C(shiftDMI_1_sqmuxa_1_Z), .D(shiftDMI_2_sqmuxa_Z), .Y(N_46_i) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[20] .INIT=16'hECA0; // @48:16135 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[31] ( .A(m18_m1_e_1), .B(shiftDMI_32), .C(shiftDMI_1_sqmuxa_1_Z), .D(shiftDMI_2_sqmuxa_Z), .Y(N_19_0_i) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[31] .INIT=16'hECA0; // @48:16135 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[27] ( .A(m24_m1_e_1), .B(shiftDMI[28]), .C(shiftDMI_1_sqmuxa_1_Z), .D(shiftDMI_2_sqmuxa_Z), .Y(N_25_0_i) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[27] .INIT=16'hECA0; // @48:16135 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[24] ( .A(m33_a0_1), .B(shiftDMI[25]), .C(shiftDMI_1_sqmuxa_1_Z), .D(shiftDMI_2_sqmuxa_Z), .Y(N_34_i) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[24] .INIT=16'hECA0; // @48:16135 CFG4 \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[29] ( .A(m21_m4_0), .B(empty_rd), .C(shiftDMI_1_sqmuxa_1_Z), .D(d_N_3_mux_6), .Y(N_22_0_i) ); defparam \gen_shift_register_active_high.gen_shift_register_active_low.shiftDMI_RNO[29] .INIT=16'hFF80; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_debug_dtm_jtag_1s */ module miv_rv32_debug_fifo_41s_1s_1s ( currTapState_0, dmi_req_data, shiftDMI_2, shiftDMI_0, shiftDMI_6, shiftDMI_18, shiftDMI_15, shiftDMI_13, shiftDMI_32, shiftDMI_39, shiftDMI_38, shiftDMI_37, shiftDMI_36, shiftDMI_35, shiftDMI_1, dtm_req_data_2, dtm_req_data_0, dtm_req_data_10, dtm_req_data_9, dtm_req_data_8, dtm_req_data_7, dtm_req_data_6, dtm_req_data_4, dtm_req_data_3, dtm_req_data_16, dtm_req_data_15, dtm_req_data_13, dtm_req_data_11, dtm_req_data_25, dtm_req_data_24, dtm_req_data_23, dtm_req_data_22, dtm_req_data_21, dtm_req_data_20, dtm_req_data_19, dtm_req_data_18, dtm_req_data_32, dtm_req_data_30, dtm_req_data_29, dtm_req_data_28, dtm_req_data_27, dtm_req_data_26, dtm_req_data_39, dtm_req_data_33, wr_ptr_0, shiftDR21, N_812, write_en_1_1z, fifo_reset, empty_rd_1z, dff, CO0_1, PF_CCC_0_0_OUT0_FABCLK_0, COREJTAGDEBUG_C0_0_TGT_TCK_0_i, fifo_reset_arst_i ) ; input currTapState_0 ; output [40:0] dmi_req_data ; input shiftDMI_2 ; input shiftDMI_0 ; input shiftDMI_6 ; input shiftDMI_18 ; input shiftDMI_15 ; input shiftDMI_13 ; input shiftDMI_32 ; input shiftDMI_39 ; input shiftDMI_38 ; input shiftDMI_37 ; input shiftDMI_36 ; input shiftDMI_35 ; input shiftDMI_1 ; input dtm_req_data_2 ; input dtm_req_data_0 ; input dtm_req_data_10 ; input dtm_req_data_9 ; input dtm_req_data_8 ; input dtm_req_data_7 ; input dtm_req_data_6 ; input dtm_req_data_4 ; input dtm_req_data_3 ; input dtm_req_data_16 ; input dtm_req_data_15 ; input dtm_req_data_13 ; input dtm_req_data_11 ; input dtm_req_data_25 ; input dtm_req_data_24 ; input dtm_req_data_23 ; input dtm_req_data_22 ; input dtm_req_data_21 ; input dtm_req_data_20 ; input dtm_req_data_19 ; input dtm_req_data_18 ; input dtm_req_data_32 ; input dtm_req_data_30 ; input dtm_req_data_29 ; input dtm_req_data_28 ; input dtm_req_data_27 ; input dtm_req_data_26 ; input dtm_req_data_39 ; input dtm_req_data_33 ; output wr_ptr_0 ; input shiftDR21 ; input N_812 ; output write_en_1_1z ; input fifo_reset ; output empty_rd_1z ; input dff ; input CO0_1 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input COREJTAGDEBUG_C0_0_TGT_TCK_0_i ; input fifo_reset_arst_i ; wire currTapState_0 ; wire shiftDMI_2 ; wire shiftDMI_0 ; wire shiftDMI_6 ; wire shiftDMI_18 ; wire shiftDMI_15 ; wire shiftDMI_13 ; wire shiftDMI_32 ; wire shiftDMI_39 ; wire shiftDMI_38 ; wire shiftDMI_37 ; wire shiftDMI_36 ; wire shiftDMI_35 ; wire shiftDMI_1 ; wire dtm_req_data_2 ; wire dtm_req_data_0 ; wire dtm_req_data_10 ; wire dtm_req_data_9 ; wire dtm_req_data_8 ; wire dtm_req_data_7 ; wire dtm_req_data_6 ; wire dtm_req_data_4 ; wire dtm_req_data_3 ; wire dtm_req_data_16 ; wire dtm_req_data_15 ; wire dtm_req_data_13 ; wire dtm_req_data_11 ; wire dtm_req_data_25 ; wire dtm_req_data_24 ; wire dtm_req_data_23 ; wire dtm_req_data_22 ; wire dtm_req_data_21 ; wire dtm_req_data_20 ; wire dtm_req_data_19 ; wire dtm_req_data_18 ; wire dtm_req_data_32 ; wire dtm_req_data_30 ; wire dtm_req_data_29 ; wire dtm_req_data_28 ; wire dtm_req_data_27 ; wire dtm_req_data_26 ; wire dtm_req_data_39 ; wire dtm_req_data_33 ; wire wr_ptr_0 ; wire shiftDR21 ; wire N_812 ; wire write_en_1_1z ; wire fifo_reset ; wire empty_rd_1z ; wire dff ; wire CO0_1 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire COREJTAGDEBUG_C0_0_TGT_TCK_0_i ; wire fifo_reset_arst_i ; wire [1:0] wr_ptr_next; wire [0:0] rd_ptr_Z; wire [1:0] rd_ptr_next; wire [1:0] wr_gray_ptr_Z; wire [0:0] wr_gray_ptr_2_Z; wire [1:0] rd_gray_ptr_Z; wire [0:0] rd_gray_ptr_2_Z; wire [1:0] wr_gray_ptr_synch_Z; wire [1:0] rst_synch_reg; wire [1:0] rd_gray_ptr_in_write_Z; wire [1:0] rd_gray_ptr_synch_Z; wire VCC ; wire GND ; wire rd_reset_Z ; wire ram0_3 ; wire awe0 ; wire ram0_2 ; wire ram0_1 ; wire ram0_0 ; wire ram0_11 ; wire ram0_10 ; wire ram0_9 ; wire ram0_8 ; wire ram0_7 ; wire ram0_6 ; wire ram0_5 ; wire ram0_4 ; wire ram0_18 ; wire ram0_17 ; wire ram0_16 ; wire ram0_15 ; wire ram0_14 ; wire ram0_13 ; wire ram0_12 ; wire ram0_26 ; wire ram0_25 ; wire ram0_24 ; wire ram0_23 ; wire ram0_22 ; wire ram0_21 ; wire ram0_20 ; wire ram0_19 ; wire ram0_33 ; wire ram0_32 ; wire ram0_31 ; wire ram0_30 ; wire ram0_29 ; wire ram0_28 ; wire ram0_27 ; wire ram1_0 ; wire ram0_40 ; wire ram0_39 ; wire ram0_38 ; wire ram0_37 ; wire ram0_36 ; wire ram0_35 ; wire ram0_34 ; wire ram1_7 ; wire ram1_6 ; wire ram1_5 ; wire ram1_4 ; wire ram1_3 ; wire ram1_2 ; wire ram1_1 ; wire ram1_15 ; wire ram1_14 ; wire ram1_13 ; wire ram1_12 ; wire ram1_11 ; wire ram1_10 ; wire ram1_9 ; wire ram1_8 ; wire ram1_22 ; wire ram1_21 ; wire ram1_20 ; wire ram1_19 ; wire ram1_18 ; wire ram1_17 ; wire ram1_16 ; wire ram1_30 ; wire ram1_29 ; wire ram1_28 ; wire ram1_27 ; wire ram1_26 ; wire ram1_25 ; wire ram1_24 ; wire ram1_23 ; wire ram1_37 ; wire ram1_36 ; wire ram1_35 ; wire ram1_34 ; wire ram1_33 ; wire ram1_32 ; wire ram1_31 ; wire ram1_40 ; wire ram1_39 ; wire ram1_38 ; wire un3_empty_rd_1_Z ; wire un7_full_wr_i ; // @48:15785 SLE \wr_ptr[0] ( .Q(wr_ptr_0), .ADn(VCC), .ALn(fifo_reset_arst_i), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(wr_ptr_next[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15791 SLE \rd_ptr[0] ( .Q(rd_ptr_Z[0]), .ADn(VCC), .ALn(rd_reset_Z), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rd_ptr_next[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15785 SLE \wr_gray_ptr[1] ( .Q(wr_gray_ptr_Z[1]), .ADn(VCC), .ALn(fifo_reset_arst_i), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(wr_ptr_next[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15785 SLE \wr_gray_ptr[0] ( .Q(wr_gray_ptr_Z[0]), .ADn(VCC), .ALn(fifo_reset_arst_i), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(wr_gray_ptr_2_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15791 SLE \rd_gray_ptr[1] ( .Q(rd_gray_ptr_Z[1]), .ADn(VCC), .ALn(rd_reset_Z), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rd_ptr_next[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15791 SLE \rd_gray_ptr[0] ( .Q(rd_gray_ptr_Z[0]), .ADn(VCC), .ALn(rd_reset_Z), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rd_gray_ptr_2_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15811 SLE \wr_gray_ptr_synch[1] ( .Q(wr_gray_ptr_synch_Z[1]), .ADn(VCC), .ALn(rd_reset_Z), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wr_gray_ptr_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15811 SLE \wr_gray_ptr_synch[0] ( .Q(wr_gray_ptr_synch_Z[0]), .ADn(VCC), .ALn(rd_reset_Z), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wr_gray_ptr_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15748 SLE \genblk1.rst_synch_reg[1] ( .Q(rst_synch_reg[1]), .ADn(VCC), .ALn(fifo_reset_arst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(VCC), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15748 SLE \genblk1.rst_synch_reg[0] ( .Q(rst_synch_reg[0]), .ADn(VCC), .ALn(fifo_reset_arst_i), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rst_synch_reg[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15803 SLE \rd_gray_ptr_in_write[1] ( .Q(rd_gray_ptr_in_write_Z[1]), .ADn(VCC), .ALn(fifo_reset_arst_i), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(rd_gray_ptr_synch_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15803 SLE \rd_gray_ptr_in_write[0] ( .Q(rd_gray_ptr_in_write_Z[0]), .ADn(VCC), .ALn(fifo_reset_arst_i), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(rd_gray_ptr_synch_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15803 SLE \rd_gray_ptr_synch[1] ( .Q(rd_gray_ptr_synch_Z[1]), .ADn(VCC), .ALn(fifo_reset_arst_i), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(rd_gray_ptr_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15803 SLE \rd_gray_ptr_synch[0] ( .Q(rd_gray_ptr_synch_Z[0]), .ADn(VCC), .ALn(fifo_reset_arst_i), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(rd_gray_ptr_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[3] ( .Q(ram0_3), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_2), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[2] ( .Q(ram0_2), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(shiftDMI_2), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[1] ( .Q(ram0_1), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_0), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[0] ( .Q(ram0_0), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(shiftDMI_0), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[11] ( .Q(ram0_11), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_10), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[10] ( .Q(ram0_10), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_9), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[9] ( .Q(ram0_9), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_8), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[8] ( .Q(ram0_8), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_7), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[7] ( .Q(ram0_7), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_6), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[6] ( .Q(ram0_6), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(shiftDMI_6), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[5] ( .Q(ram0_5), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_4), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[4] ( .Q(ram0_4), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_3), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[18] ( .Q(ram0_18), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(shiftDMI_18), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[17] ( .Q(ram0_17), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_16), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[16] ( .Q(ram0_16), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_15), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[15] ( .Q(ram0_15), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(shiftDMI_15), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[14] ( .Q(ram0_14), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_13), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[13] ( .Q(ram0_13), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(shiftDMI_13), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[12] ( .Q(ram0_12), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_11), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[26] ( .Q(ram0_26), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_25), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[25] ( .Q(ram0_25), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_24), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[24] ( .Q(ram0_24), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_23), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[23] ( .Q(ram0_23), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_22), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[22] ( .Q(ram0_22), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_21), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[21] ( .Q(ram0_21), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_20), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[20] ( .Q(ram0_20), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_19), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[19] ( .Q(ram0_19), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_18), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[33] ( .Q(ram0_33), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_32), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[32] ( .Q(ram0_32), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(shiftDMI_32), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[31] ( .Q(ram0_31), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_30), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[30] ( .Q(ram0_30), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_29), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[29] ( .Q(ram0_29), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_28), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[28] ( .Q(ram0_28), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_27), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[27] ( .Q(ram0_27), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_26), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[0] ( .Q(ram1_0), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(shiftDMI_0), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[40] ( .Q(ram0_40), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_39), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[39] ( .Q(ram0_39), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(shiftDMI_39), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[38] ( .Q(ram0_38), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(shiftDMI_38), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[37] ( .Q(ram0_37), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(shiftDMI_37), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[36] ( .Q(ram0_36), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(shiftDMI_36), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[35] ( .Q(ram0_35), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(shiftDMI_35), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram0_[34] ( .Q(ram0_34), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_33), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[7] ( .Q(ram1_7), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_6), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[6] ( .Q(ram1_6), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(shiftDMI_6), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[5] ( .Q(ram1_5), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_4), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[4] ( .Q(ram1_4), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_3), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[3] ( .Q(ram1_3), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_2), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[2] ( .Q(ram1_2), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(shiftDMI_2), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[1] ( .Q(ram1_1), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_0), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[15] ( .Q(ram1_15), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(shiftDMI_15), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[14] ( .Q(ram1_14), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_13), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[13] ( .Q(ram1_13), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(shiftDMI_13), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[12] ( .Q(ram1_12), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_11), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[11] ( .Q(ram1_11), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_10), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[10] ( .Q(ram1_10), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_9), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[9] ( .Q(ram1_9), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_8), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[8] ( .Q(ram1_8), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_7), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[22] ( .Q(ram1_22), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_21), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[21] ( .Q(ram1_21), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_20), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[20] ( .Q(ram1_20), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_19), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[19] ( .Q(ram1_19), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_18), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[18] ( .Q(ram1_18), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(shiftDMI_18), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[17] ( .Q(ram1_17), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_16), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[16] ( .Q(ram1_16), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_15), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[30] ( .Q(ram1_30), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_29), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[29] ( .Q(ram1_29), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_28), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[28] ( .Q(ram1_28), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_27), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[27] ( .Q(ram1_27), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_26), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[26] ( .Q(ram1_26), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_25), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[25] ( .Q(ram1_25), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_24), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[24] ( .Q(ram1_24), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_23), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[23] ( .Q(ram1_23), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_22), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[37] ( .Q(ram1_37), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(shiftDMI_37), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[36] ( .Q(ram1_36), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(shiftDMI_36), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[35] ( .Q(ram1_35), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(shiftDMI_35), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[34] ( .Q(ram1_34), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_33), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[33] ( .Q(ram1_33), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_32), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[32] ( .Q(ram1_32), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(shiftDMI_32), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[31] ( .Q(ram1_31), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_30), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[40] ( .Q(ram1_40), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(dtm_req_data_39), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[39] ( .Q(ram1_39), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(shiftDMI_39), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_req_fifo.fifo_memory_ram1_[38] ( .Q(ram1_38), .ADn(VCC), .ALn(VCC), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .D(shiftDMI_38), .EN(CO0_1), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15759 CFG2 rd_reset ( .A(dff), .B(rst_synch_reg[0]), .Y(rd_reset_Z) ); defparam rd_reset.INIT=4'hE; // @48:15823 CFG2 un3_empty_rd_1 ( .A(rd_gray_ptr_Z[1]), .B(wr_gray_ptr_synch_Z[1]), .Y(un3_empty_rd_1_Z) ); defparam un3_empty_rd_1.INIT=4'h6; // @48:15832 CFG4 un7_full_wr_NE ( .A(rd_gray_ptr_in_write_Z[0]), .B(rd_gray_ptr_in_write_Z[1]), .C(wr_gray_ptr_Z[1]), .D(wr_gray_ptr_Z[0]), .Y(un7_full_wr_i) ); defparam un7_full_wr_NE.INIT=16'hD7EB; // @48:15823 CFG4 empty_rd ( .A(un3_empty_rd_1_Z), .B(rd_reset_Z), .C(wr_gray_ptr_synch_Z[0]), .D(rd_gray_ptr_Z[0]), .Y(empty_rd_1z) ); defparam empty_rd.INIT=16'h4004; // @48:15726 CFG4 write_en_1 ( .A(fifo_reset), .B(un7_full_wr_i), .C(shiftDMI_0), .D(shiftDMI_1), .Y(write_en_1_1z) ); defparam write_en_1.INIT=16'h4440; // @48:15843 CFG4 \data_rd[0] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_0), .D(ram0_0), .Y(dmi_req_data[0]) ); defparam \data_rd[0] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[3] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_3), .D(ram0_3), .Y(dmi_req_data[3]) ); defparam \data_rd[3] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[4] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_4), .D(ram0_4), .Y(dmi_req_data[4]) ); defparam \data_rd[4] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[6] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_6), .D(ram0_6), .Y(dmi_req_data[6]) ); defparam \data_rd[6] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[7] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_7), .D(ram0_7), .Y(dmi_req_data[7]) ); defparam \data_rd[7] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[8] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_8), .D(ram0_8), .Y(dmi_req_data[8]) ); defparam \data_rd[8] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[9] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_9), .D(ram0_9), .Y(dmi_req_data[9]) ); defparam \data_rd[9] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[10] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_10), .D(ram0_10), .Y(dmi_req_data[10]) ); defparam \data_rd[10] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[11] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_11), .D(ram0_11), .Y(dmi_req_data[11]) ); defparam \data_rd[11] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[14] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_14), .D(ram0_14), .Y(dmi_req_data[14]) ); defparam \data_rd[14] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[15] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_15), .D(ram0_15), .Y(dmi_req_data[15]) ); defparam \data_rd[15] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[17] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_17), .D(ram0_17), .Y(dmi_req_data[17]) ); defparam \data_rd[17] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[19] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_19), .D(ram0_19), .Y(dmi_req_data[19]) ); defparam \data_rd[19] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[20] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_20), .D(ram0_20), .Y(dmi_req_data[20]) ); defparam \data_rd[20] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[21] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_21), .D(ram0_21), .Y(dmi_req_data[21]) ); defparam \data_rd[21] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[25] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_25), .D(ram0_25), .Y(dmi_req_data[25]) ); defparam \data_rd[25] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[26] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_26), .D(ram0_26), .Y(dmi_req_data[26]) ); defparam \data_rd[26] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[27] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_27), .D(ram0_27), .Y(dmi_req_data[27]) ); defparam \data_rd[27] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[28] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_28), .D(ram0_28), .Y(dmi_req_data[28]) ); defparam \data_rd[28] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[29] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_29), .D(ram0_29), .Y(dmi_req_data[29]) ); defparam \data_rd[29] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[30] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_30), .D(ram0_30), .Y(dmi_req_data[30]) ); defparam \data_rd[30] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[31] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_31), .D(ram0_31), .Y(dmi_req_data[31]) ); defparam \data_rd[31] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[40] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_40), .D(ram0_40), .Y(dmi_req_data[40]) ); defparam \data_rd[40] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[39] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_39), .D(ram0_39), .Y(dmi_req_data[39]) ); defparam \data_rd[39] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[38] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_38), .D(ram0_38), .Y(dmi_req_data[38]) ); defparam \data_rd[38] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[36] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_36), .D(ram0_36), .Y(dmi_req_data[36]) ); defparam \data_rd[36] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[35] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_35), .D(ram0_35), .Y(dmi_req_data[35]) ); defparam \data_rd[35] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[34] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_34), .D(ram0_34), .Y(dmi_req_data[34]) ); defparam \data_rd[34] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[33] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_33), .D(ram0_33), .Y(dmi_req_data[33]) ); defparam \data_rd[33] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[32] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_32), .D(ram0_32), .Y(dmi_req_data[32]) ); defparam \data_rd[32] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[18] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_18), .D(ram0_18), .Y(dmi_req_data[18]) ); defparam \data_rd[18] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[12] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_12), .D(ram0_12), .Y(dmi_req_data[12]) ); defparam \data_rd[12] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[37] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_37), .D(ram0_37), .Y(dmi_req_data[37]) ); defparam \data_rd[37] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[24] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_24), .D(ram0_24), .Y(dmi_req_data[24]) ); defparam \data_rd[24] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[23] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_23), .D(ram0_23), .Y(dmi_req_data[23]) ); defparam \data_rd[23] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[22] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_22), .D(ram0_22), .Y(dmi_req_data[22]) ); defparam \data_rd[22] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[5] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_5), .D(ram0_5), .Y(dmi_req_data[5]) ); defparam \data_rd[5] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[16] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_16), .D(ram0_16), .Y(dmi_req_data[16]) ); defparam \data_rd[16] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[13] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_13), .D(ram0_13), .Y(dmi_req_data[13]) ); defparam \data_rd[13] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[2] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_2), .D(ram0_2), .Y(dmi_req_data[2]) ); defparam \data_rd[2] .INIT=16'h3120; // @48:15843 CFG4 \data_rd[1] ( .A(rd_ptr_Z[0]), .B(empty_rd_1z), .C(ram1_1), .D(ram0_1), .Y(dmi_req_data[1]) ); defparam \data_rd[1] .INIT=16'h3120; // @48:15730 CFG2 \rd_ptr_RNI5NJ77[0] ( .A(N_812), .B(rd_ptr_Z[0]), .Y(rd_ptr_next[0]) ); defparam \rd_ptr_RNI5NJ77[0] .INIT=4'h9; // @48:15729 CFG4 \wr_ptr_RNI6QHQ6[0] ( .A(currTapState_0), .B(write_en_1_1z), .C(wr_ptr_0), .D(shiftDR21), .Y(wr_ptr_next[0]) ); defparam \wr_ptr_RNI6QHQ6[0] .INIT=16'h78F0; // @48:15839 CFG4 \fifo_memory.awe0 ( .A(currTapState_0), .B(write_en_1_1z), .C(wr_ptr_0), .D(shiftDR21), .Y(awe0) ); defparam \fifo_memory.awe0 .INIT=16'h0800; // @48:15730 CFG3 \rd_gray_ptr_RNI0LOMD[1] ( .A(rd_gray_ptr_Z[1]), .B(rd_ptr_Z[0]), .C(N_812), .Y(rd_ptr_next[1]) ); defparam \rd_gray_ptr_RNI0LOMD[1] .INIT=8'hA6; // @48:15729 CFG2 \wr_gray_ptr_RNO[1] ( .A(CO0_1), .B(wr_gray_ptr_Z[1]), .Y(wr_ptr_next[1]) ); defparam \wr_gray_ptr_RNO[1] .INIT=4'h6; // @48:15733 CFG2 \rd_gray_ptr_2[0] ( .A(rd_ptr_next[1]), .B(rd_ptr_next[0]), .Y(rd_gray_ptr_2_Z[0]) ); defparam \rd_gray_ptr_2[0] .INIT=4'h6; // @48:15732 CFG3 \wr_gray_ptr_2[0] ( .A(wr_ptr_next[0]), .B(CO0_1), .C(wr_gray_ptr_Z[1]), .Y(wr_gray_ptr_2_Z[0]) ); defparam \wr_gray_ptr_2[0] .INIT=8'h96; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_debug_fifo_41s_1s_1s */ module miv_rv32_debug_fifo_34s_1s_1s ( dtm_resp_data_0, fifo_memory, dmi_resp_data, rd_ptr_0, sbcs_busyerror_1_sqmuxa_1, N_1547, dmi_resp_valid_0_0, dtm_resp_ready, empty_rd_1z, fifo_reset, ram1_29, ram0_29, COREJTAGDEBUG_C0_0_TGT_TCK_0, PF_CCC_0_0_OUT0_FABCLK_0, dff ) ; output dtm_resp_data_0 ; output [33:2] fifo_memory ; input [33:0] dmi_resp_data ; output rd_ptr_0 ; input sbcs_busyerror_1_sqmuxa_1 ; input N_1547 ; input dmi_resp_valid_0_0 ; input dtm_resp_ready ; output empty_rd_1z ; input fifo_reset ; output ram1_29 ; output ram0_29 ; input COREJTAGDEBUG_C0_0_TGT_TCK_0 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input dff ; wire dtm_resp_data_0 ; wire rd_ptr_0 ; wire sbcs_busyerror_1_sqmuxa_1 ; wire N_1547 ; wire dmi_resp_valid_0_0 ; wire dtm_resp_ready ; wire empty_rd_1z ; wire fifo_reset ; wire ram1_29 ; wire ram0_29 ; wire COREJTAGDEBUG_C0_0_TGT_TCK_0 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire dff ; wire [0:0] wr_ptr_Z; wire [0:0] wr_ptr_RNO_Z; wire [0:0] rd_ptr_RNIIHIB7_Z; wire [1:0] rst_synch_reg; wire [1:0] rd_gray_ptr_in_write_Z; wire [1:0] rd_gray_ptr_synch_Z; wire [1:0] rd_gray_ptr_Z; wire [1:0] wr_gray_ptr_Z; wire [1:1] wr_gray_ptr_RNO_Z; wire [0:0] wr_gray_ptr_5_Z; wire [1:1] rd_gray_ptr_RNIV073C_Z; wire [0:0] rd_gray_ptr_5_Z; wire [1:0] wr_gray_ptr_synch_Z; wire VCC ; wire GND ; wire rd_reset_Z ; wire ram0_5 ; wire awe0 ; wire ram0_4 ; wire ram0_3 ; wire ram0_2 ; wire ram0_0 ; wire ram0_12 ; wire ram0_11 ; wire ram0_10 ; wire ram0_9 ; wire ram0_8 ; wire ram0_7 ; wire ram0_6 ; wire ram0_20 ; wire ram0_19 ; wire ram0_18 ; wire ram0_17 ; wire ram0_16 ; wire ram0_15 ; wire ram0_14 ; wire ram0_13 ; wire ram0_27 ; wire ram0_26 ; wire ram0_25 ; wire ram0_24 ; wire ram0_23 ; wire ram0_22 ; wire ram0_21 ; wire ram1_0 ; wire CO0 ; wire ram0_33 ; wire ram0_32 ; wire ram0_31 ; wire ram0_30 ; wire ram0_28 ; wire ram1_8 ; wire ram1_7 ; wire ram1_6 ; wire ram1_5 ; wire ram1_4 ; wire ram1_3 ; wire ram1_2 ; wire ram1_16 ; wire ram1_15 ; wire ram1_14 ; wire ram1_13 ; wire ram1_12 ; wire ram1_11 ; wire ram1_10 ; wire ram1_9 ; wire ram1_23 ; wire ram1_22 ; wire ram1_21 ; wire ram1_20 ; wire ram1_19 ; wire ram1_18 ; wire ram1_17 ; wire ram1_31 ; wire ram1_30 ; wire ram1_28 ; wire ram1_27 ; wire ram1_26 ; wire ram1_25 ; wire ram1_24 ; wire ram1_33 ; wire ram1_32 ; wire un9_empty_rd_1_Z ; wire un17_full_wr_0_Z ; wire write_en_0_Z ; wire write_en_Z ; // @48:15785 SLE \wr_ptr[0] ( .Q(wr_ptr_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wr_ptr_RNO_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15791 SLE \rd_ptr[0] ( .Q(rd_ptr_0), .ADn(VCC), .ALn(rd_reset_Z), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(rd_ptr_RNIIHIB7_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15748 SLE \genblk1.rst_synch_reg[0] ( .Q(rst_synch_reg[0]), .ADn(VCC), .ALn(dff), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(rst_synch_reg[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15803 SLE \rd_gray_ptr_in_write[1] ( .Q(rd_gray_ptr_in_write_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rd_gray_ptr_synch_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15803 SLE \rd_gray_ptr_in_write[0] ( .Q(rd_gray_ptr_in_write_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rd_gray_ptr_synch_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15803 SLE \rd_gray_ptr_synch[1] ( .Q(rd_gray_ptr_synch_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rd_gray_ptr_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15803 SLE \rd_gray_ptr_synch[0] ( .Q(rd_gray_ptr_synch_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rd_gray_ptr_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15785 SLE \wr_gray_ptr[1] ( .Q(wr_gray_ptr_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wr_gray_ptr_RNO_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15785 SLE \wr_gray_ptr[0] ( .Q(wr_gray_ptr_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wr_gray_ptr_5_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15791 SLE \rd_gray_ptr[1] ( .Q(rd_gray_ptr_Z[1]), .ADn(VCC), .ALn(rd_reset_Z), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(rd_gray_ptr_RNIV073C_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15791 SLE \rd_gray_ptr[0] ( .Q(rd_gray_ptr_Z[0]), .ADn(VCC), .ALn(rd_reset_Z), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(rd_gray_ptr_5_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15811 SLE \wr_gray_ptr_synch[1] ( .Q(wr_gray_ptr_synch_Z[1]), .ADn(VCC), .ALn(rd_reset_Z), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(wr_gray_ptr_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15811 SLE \wr_gray_ptr_synch[0] ( .Q(wr_gray_ptr_synch_Z[0]), .ADn(VCC), .ALn(rd_reset_Z), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(wr_gray_ptr_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15748 SLE \genblk1.rst_synch_reg[1] ( .Q(rst_synch_reg[1]), .ADn(VCC), .ALn(dff), .CLK(COREJTAGDEBUG_C0_0_TGT_TCK_0), .D(VCC), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0_[5] ( .Q(ram0_5), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[5]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0_[4] ( .Q(ram0_4), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[4]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0_[3] ( .Q(ram0_3), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[3]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0_[2] ( .Q(ram0_2), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[2]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0_[0] ( .Q(ram0_0), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[0]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0_[12] ( .Q(ram0_12), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[12]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0_[11] ( .Q(ram0_11), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[11]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0_[10] ( .Q(ram0_10), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[10]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0_[9] ( .Q(ram0_9), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[9]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0_[8] ( .Q(ram0_8), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[8]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0_[7] ( .Q(ram0_7), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[7]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0_[6] ( .Q(ram0_6), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[6]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0_[20] ( .Q(ram0_20), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[20]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0_[19] ( .Q(ram0_19), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[19]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0_[18] ( .Q(ram0_18), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[18]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0_[17] ( .Q(ram0_17), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[17]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0_[16] ( .Q(ram0_16), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[16]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0_[15] ( .Q(ram0_15), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[15]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0_[14] ( .Q(ram0_14), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[14]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0_[13] ( .Q(ram0_13), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[13]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0_[27] ( .Q(ram0_27), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[27]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0_[26] ( .Q(ram0_26), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[26]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0_[25] ( .Q(ram0_25), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[25]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0_[24] ( .Q(ram0_24), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[24]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0_[23] ( .Q(ram0_23), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[23]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0_[22] ( .Q(ram0_22), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[22]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0_[21] ( .Q(ram0_21), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[21]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram1_[0] ( .Q(ram1_0), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[0]), .EN(CO0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0_[33] ( .Q(ram0_33), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[33]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0_[32] ( .Q(ram0_32), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[32]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0_[31] ( .Q(ram0_31), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[31]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0_[30] ( .Q(ram0_30), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[30]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0_[29] ( .Q(ram0_29), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[29]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0_[28] ( .Q(ram0_28), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[28]), .EN(awe0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram1_[8] ( .Q(ram1_8), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[8]), .EN(CO0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram1_[7] ( .Q(ram1_7), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[7]), .EN(CO0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram1_[6] ( .Q(ram1_6), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[6]), .EN(CO0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram1_[5] ( .Q(ram1_5), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[5]), .EN(CO0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram1_[4] ( .Q(ram1_4), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[4]), .EN(CO0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram1_[3] ( .Q(ram1_3), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[3]), .EN(CO0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram1_[2] ( .Q(ram1_2), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[2]), .EN(CO0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram1_[16] ( .Q(ram1_16), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[16]), .EN(CO0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram1_[15] ( .Q(ram1_15), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[15]), .EN(CO0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram1_[14] ( .Q(ram1_14), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[14]), .EN(CO0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram1_[13] ( .Q(ram1_13), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[13]), .EN(CO0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram1_[12] ( .Q(ram1_12), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[12]), .EN(CO0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram1_[11] ( .Q(ram1_11), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[11]), .EN(CO0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram1_[10] ( .Q(ram1_10), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[10]), .EN(CO0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram1_[9] ( .Q(ram1_9), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[9]), .EN(CO0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram1_[23] ( .Q(ram1_23), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[23]), .EN(CO0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram1_[22] ( .Q(ram1_22), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[22]), .EN(CO0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram1_[21] ( .Q(ram1_21), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[21]), .EN(CO0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram1_[20] ( .Q(ram1_20), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[20]), .EN(CO0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram1_[19] ( .Q(ram1_19), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[19]), .EN(CO0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram1_[18] ( .Q(ram1_18), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[18]), .EN(CO0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram1_[17] ( .Q(ram1_17), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[17]), .EN(CO0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram1_[31] ( .Q(ram1_31), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[31]), .EN(CO0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram1_[30] ( .Q(ram1_30), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[30]), .EN(CO0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram1_[29] ( .Q(ram1_29), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[29]), .EN(CO0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram1_[28] ( .Q(ram1_28), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[28]), .EN(CO0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram1_[27] ( .Q(ram1_27), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[27]), .EN(CO0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram1_[26] ( .Q(ram1_26), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[26]), .EN(CO0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram1_[25] ( .Q(ram1_25), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[25]), .EN(CO0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram1_[24] ( .Q(ram1_24), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[24]), .EN(CO0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram1_[33] ( .Q(ram1_33), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[33]), .EN(CO0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 SLE \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram1_[32] ( .Q(ram1_32), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_resp_data[32]), .EN(CO0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15823 CFG2 un9_empty_rd_1 ( .A(rd_gray_ptr_Z[1]), .B(wr_gray_ptr_synch_Z[1]), .Y(un9_empty_rd_1_Z) ); defparam un9_empty_rd_1.INIT=4'h6; // @48:15759 CFG2 rd_reset ( .A(fifo_reset), .B(rst_synch_reg[0]), .Y(rd_reset_Z) ); defparam rd_reset.INIT=4'hD; // @48:15832 CFG2 un17_full_wr_0 ( .A(wr_gray_ptr_Z[0]), .B(rd_gray_ptr_in_write_Z[0]), .Y(un17_full_wr_0_Z) ); defparam un17_full_wr_0.INIT=4'h6; // @48:15839 CFG3 \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNIJBFFD[3] ( .A(ram0_3), .B(rd_ptr_0), .C(ram1_3), .Y(fifo_memory[3]) ); defparam \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNIJBFFD[3] .INIT=8'hE2; // @48:15839 CFG3 \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNINFFFD[5] ( .A(ram0_5), .B(rd_ptr_0), .C(ram1_5), .Y(fifo_memory[5]) ); defparam \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNINFFFD[5] .INIT=8'hE2; // @48:15839 CFG3 \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNIJ9RQ8[12] ( .A(ram0_12), .B(rd_ptr_0), .C(ram1_12), .Y(fifo_memory[12]) ); defparam \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNIJ9RQ8[12] .INIT=8'hE2; // @48:15839 CFG3 \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNI1ORQ8[19] ( .A(ram0_19), .B(rd_ptr_0), .C(ram1_19), .Y(fifo_memory[19]) ); defparam \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNI1ORQ8[19] .INIT=8'hE2; // @48:15839 CFG3 \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNI1QTQ8[28] ( .A(ram0_28), .B(rd_ptr_0), .C(ram1_28), .Y(fifo_memory[28]) ); defparam \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNI1QTQ8[28] .INIT=8'hE2; // @48:15839 CFG3 \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNINHVQ8[32] ( .A(ram0_32), .B(rd_ptr_0), .C(ram1_32), .Y(fifo_memory[32]) ); defparam \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNINHVQ8[32] .INIT=8'hE2; // @48:15839 CFG3 \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNILFVQ8[31] ( .A(ram0_31), .B(rd_ptr_0), .C(ram1_31), .Y(fifo_memory[31]) ); defparam \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNILFVQ8[31] .INIT=8'hE2; // @48:15839 CFG3 \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNIVNTQ8[27] ( .A(ram0_27), .B(rd_ptr_0), .C(ram1_27), .Y(fifo_memory[27]) ); defparam \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNIVNTQ8[27] .INIT=8'hE2; // @48:15839 CFG3 \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNITLTQ8[26] ( .A(ram0_26), .B(rd_ptr_0), .C(ram1_26), .Y(fifo_memory[26]) ); defparam \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNITLTQ8[26] .INIT=8'hE2; // @48:15839 CFG3 \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNIRJTQ8[25] ( .A(ram0_25), .B(rd_ptr_0), .C(ram1_25), .Y(fifo_memory[25]) ); defparam \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNIRJTQ8[25] .INIT=8'hE2; // @48:15839 CFG3 \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNIPHTQ8[24] ( .A(ram0_24), .B(rd_ptr_0), .C(ram1_24), .Y(fifo_memory[24]) ); defparam \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNIPHTQ8[24] .INIT=8'hE2; // @48:15839 CFG3 \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNINFTQ8[23] ( .A(ram0_23), .B(rd_ptr_0), .C(ram1_23), .Y(fifo_memory[23]) ); defparam \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNINFTQ8[23] .INIT=8'hE2; // @48:15839 CFG3 \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNILDTQ8[22] ( .A(ram0_22), .B(rd_ptr_0), .C(ram1_22), .Y(fifo_memory[22]) ); defparam \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNILDTQ8[22] .INIT=8'hE2; // @48:15839 CFG3 \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNIJBTQ8[21] ( .A(ram0_21), .B(rd_ptr_0), .C(ram1_21), .Y(fifo_memory[21]) ); defparam \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNIJBTQ8[21] .INIT=8'hE2; // @48:15839 CFG3 \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNIH9TQ8[20] ( .A(ram0_20), .B(rd_ptr_0), .C(ram1_20), .Y(fifo_memory[20]) ); defparam \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNIH9TQ8[20] .INIT=8'hE2; // @48:15839 CFG3 \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNIVLRQ8[18] ( .A(ram0_18), .B(rd_ptr_0), .C(ram1_18), .Y(fifo_memory[18]) ); defparam \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNIVLRQ8[18] .INIT=8'hE2; // @48:15839 CFG3 \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNIRHRQ8[16] ( .A(ram0_16), .B(rd_ptr_0), .C(ram1_16), .Y(fifo_memory[16]) ); defparam \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNIRHRQ8[16] .INIT=8'hE2; // @48:15839 CFG3 \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNIPFRQ8[15] ( .A(ram0_15), .B(rd_ptr_0), .C(ram1_15), .Y(fifo_memory[15]) ); defparam \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNIPFRQ8[15] .INIT=8'hE2; // @48:15839 CFG3 \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNILBRQ8[13] ( .A(ram0_13), .B(rd_ptr_0), .C(ram1_13), .Y(fifo_memory[13]) ); defparam \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNILBRQ8[13] .INIT=8'hE2; // @48:15839 CFG3 \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNIH7RQ8[11] ( .A(ram0_11), .B(rd_ptr_0), .C(ram1_11), .Y(fifo_memory[11]) ); defparam \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNIH7RQ8[11] .INIT=8'hE2; // @48:15839 CFG3 \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNIF5RQ8[10] ( .A(ram0_10), .B(rd_ptr_0), .C(ram1_10), .Y(fifo_memory[10]) ); defparam \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNIF5RQ8[10] .INIT=8'hE2; // @48:15839 CFG3 \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNIVNFFD[9] ( .A(ram0_9), .B(rd_ptr_0), .C(ram1_9), .Y(fifo_memory[9]) ); defparam \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNIVNFFD[9] .INIT=8'hE2; // @48:15839 CFG3 \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNIPHFFD[6] ( .A(ram0_6), .B(rd_ptr_0), .C(ram1_6), .Y(fifo_memory[6]) ); defparam \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNIPHFFD[6] .INIT=8'hE2; // @48:15839 CFG3 \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNILDFFD[4] ( .A(ram0_4), .B(rd_ptr_0), .C(ram1_4), .Y(fifo_memory[4]) ); defparam \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNILDFFD[4] .INIT=8'hE2; // @48:15839 CFG3 \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNIH9FFD[2] ( .A(ram0_2), .B(rd_ptr_0), .C(ram1_2), .Y(fifo_memory[2]) ); defparam \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNIH9FFD[2] .INIT=8'hE2; // @48:15839 CFG3 \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNIRJFFD[7] ( .A(ram0_7), .B(rd_ptr_0), .C(ram1_7), .Y(fifo_memory[7]) ); defparam \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNIRJFFD[7] .INIT=8'hE2; // @48:15839 CFG3 \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNINDRQ8[14] ( .A(ram0_14), .B(rd_ptr_0), .C(ram1_14), .Y(fifo_memory[14]) ); defparam \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNINDRQ8[14] .INIT=8'hE2; // @48:15839 CFG3 \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNIPJVQ8[33] ( .A(ram0_33), .B(rd_ptr_0), .C(ram1_33), .Y(fifo_memory[33]) ); defparam \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNIPJVQ8[33] .INIT=8'hE2; // @48:15839 CFG3 \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNIJDVQ8[30] ( .A(ram0_30), .B(rd_ptr_0), .C(ram1_30), .Y(fifo_memory[30]) ); defparam \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNIJDVQ8[30] .INIT=8'hE2; // @48:15839 CFG3 \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNITJRQ8[17] ( .A(ram0_17), .B(rd_ptr_0), .C(ram1_17), .Y(fifo_memory[17]) ); defparam \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNITJRQ8[17] .INIT=8'hE2; // @48:15839 CFG3 \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNITLFFD[8] ( .A(ram0_8), .B(rd_ptr_0), .C(ram1_8), .Y(fifo_memory[8]) ); defparam \fifo_memory.gen_subsys_debug.u_subsys_debug_unit_0.debug_resp_fifo.fifo_memory_ram0__RNITLFFD[8] .INIT=8'hE2; // @48:15726 CFG4 write_en_0 ( .A(rd_gray_ptr_in_write_Z[1]), .B(un17_full_wr_0_Z), .C(wr_gray_ptr_Z[1]), .D(dff), .Y(write_en_0_Z) ); defparam write_en_0.INIT=16'hED00; // @48:15823 CFG4 empty_rd ( .A(rd_reset_Z), .B(un9_empty_rd_1_Z), .C(wr_gray_ptr_synch_Z[0]), .D(rd_gray_ptr_Z[0]), .Y(empty_rd_1z) ); defparam empty_rd.INIT=16'hDFFD; // @48:15843 CFG4 \data_rd[0] ( .A(rd_ptr_0), .B(empty_rd_1z), .C(ram1_0), .D(ram0_0), .Y(dtm_resp_data_0) ); defparam \data_rd[0] .INIT=16'hC480; // @48:15730 CFG3 \rd_ptr_RNIIHIB7[0] ( .A(dtm_resp_ready), .B(rd_ptr_0), .C(empty_rd_1z), .Y(rd_ptr_RNIIHIB7_Z[0]) ); defparam \rd_ptr_RNIIHIB7[0] .INIT=8'h6C; // @48:15730 CFG4 \rd_gray_ptr_RNIV073C[1] ( .A(dtm_resp_ready), .B(rd_gray_ptr_Z[1]), .C(rd_ptr_0), .D(empty_rd_1z), .Y(rd_gray_ptr_RNIV073C_Z[1]) ); defparam \rd_gray_ptr_RNIV073C[1] .INIT=16'h6CCC; // @48:15733 CFG2 \rd_gray_ptr_5[0] ( .A(rd_gray_ptr_RNIV073C_Z[1]), .B(rd_ptr_RNIIHIB7_Z[0]), .Y(rd_gray_ptr_5_Z[0]) ); defparam \rd_gray_ptr_5[0] .INIT=4'h6; // @48:15726 CFG4 write_en ( .A(dmi_resp_valid_0_0), .B(N_1547), .C(write_en_0_Z), .D(sbcs_busyerror_1_sqmuxa_1), .Y(write_en_Z) ); defparam write_en.INIT=16'hA0E0; // @48:15729 CFG2 write_en_RNIHEV46 ( .A(write_en_Z), .B(wr_ptr_Z[0]), .Y(CO0) ); defparam write_en_RNIHEV46.INIT=4'h8; // @48:15839 CFG2 \fifo_memory.awe0 ( .A(write_en_Z), .B(wr_ptr_Z[0]), .Y(awe0) ); defparam \fifo_memory.awe0 .INIT=4'h2; // @48:15729 CFG2 \wr_ptr_RNO[0] ( .A(write_en_Z), .B(wr_ptr_Z[0]), .Y(wr_ptr_RNO_Z[0]) ); defparam \wr_ptr_RNO[0] .INIT=4'h6; // @48:15729 CFG3 \wr_gray_ptr_RNO[1] ( .A(wr_gray_ptr_Z[1]), .B(wr_ptr_Z[0]), .C(write_en_Z), .Y(wr_gray_ptr_RNO_Z[1]) ); defparam \wr_gray_ptr_RNO[1] .INIT=8'h6A; // @48:15732 CFG3 \wr_gray_ptr_5[0] ( .A(wr_gray_ptr_Z[1]), .B(wr_ptr_Z[0]), .C(write_en_Z), .Y(wr_gray_ptr_5_Z[0]) ); defparam \wr_gray_ptr_5[0] .INIT=8'h56; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_debug_fifo_34s_1s_1s */ module miv_rv32_debug_sba ( command_reg_state_4, command_reg, dmi_resp_data, data_0_reg_5_m1_26, data_0_reg_5_m1_25, data_0_reg_5_m1_24, data_0_reg_5_m1_23, data_0_reg_5_m1_22, data_0_reg_5_m1_8, data_0_reg_5_m1_7, data_0_reg_5_m1_6, data_0_reg_5_m1_17, data_0_reg_5_m1_18, data_0_reg_5_m1_19, data_0_reg_5_m1_20, data_0_reg_5_m1_21, data_0_reg_5_m1_4, data_0_reg_5_m1_0, data_0_reg, cpu_d_resp_rd_data_net, debug_state_ns, cmderr_ff_4_0, cmderr_ff_4_2, debug_state, dmi_req_data, debug_sysbus_req_wr_byte_en_net, command_reg_state, debug_sysbus_req_rd_byte_en_net, req_masked_0, abstractcs_cmderr, sba_req_wr_data_int, sba_req_addr_int, command_reg_state_4_0_fast_0, un1_cpu_d_req_ready_sig_0_0, N_723, N_76_i, cpu_debug_csr_op_rd_data_valid_net, cpu_d_resp_error_sig, cpu_d_resp_valid_sig, debug_gpr_addr_0_sqmuxa_i, debug_csr_rd_data_ready_1_sqmuxa_i, debug_sysbus_resp_error_net, un1_dmcontrol_ndmreset13_4_i, un1_dmi_req_command_0_a3_RNIGP7L31_1z, N_719, N_15, data_0_reg_5_sm0, N_190_i, N_136_i, N_134_i, N_132_i, N_130_i, N_128_i, dmi_resp_valid_0_0_1z, N_123_i_1z, cpu_debug_halt_ack_net, un1_dmcontrol_ndmreset13_2_i, N_52_i, debug_resume_req_3, debug_exit_retr, init_wr_dcsr_step_en, N_88_i, N_170_i, dmstatus_allany_havereset, N_112_i_1z, N_110_i_1z, N_812, empty_rd, havereset_skip_pwrup_4, N_361, N_807, debug_trx_os_net, N_1108, debug_sys_reset, un1_debug_csr_rd_en, abstractcs_busy, N_88_1, sba_req_addr_1, N_990, N_1547, dmcontrol_ackhavereset, dmcontrol_haltreq, dmcontrol_resumereq, dmstatus_allany_resumeack, abs_cmd_transfer_ff, havereset_skip_pwrup, cpu_debug_halt_req_net, N_75_i, N_59_tz, gpr_rs2_rd_data_valid_sig, N_78_i, trace_priv_i, cpu_m8_0_a3_0_3, cpu_i_req_is_tcm0_5, cpu_m8_0_a3_0_2, cpu_N_6, cpu_N_14_mux, un1_cpu_d_req_ready_sig_d_0, un1_cpu_d_req_ready_sig_c, un1_dmcontrol_ndmreset13_i, dmcontrol_dmactive4, sbcs_busyerror_1_sqmuxa_1, N_53_1, dmstatus_allany_halted, N_53, cpu_debug_active_net, cpu_debug_csr_rd_en_net, cpu_debug_gpr_rd_en_net, N_81_i, debug_sysbus_resp_ready_net, debug_sysbus_req_valid_net, PF_CCC_0_0_OUT0_FABCLK_0, dff, next_state_0_sqmuxa_i_RNI4B2FB_1z, un1_dmi_req_command_0_a3_RNIERK9D_0_1z, un1_dmi_req_command_0_a3_RNICPK9D_0_1z, un1_dmi_req_command_0_a3_RNIANK9D_0_1z, un1_dmi_req_command_0_a3_RNI8LK9D_0_1z, un1_dmi_req_command_0_a3_RNIIVK9D_0_1z, un1_dmi_req_command_0_a3_RNIGTK9D_1z, un1_dmi_req_command_0_a3_RNIERK9D_1z, un1_dmi_req_command_0_a3_RNICPK9D_1z, un1_dmi_req_command_0_a3_RNIANK9D_1z, un1_dmi_req_command_0_a3_RNI8LK9D_1z, un1_dmi_req_command_0_a3_RNICTI09_1z, un1_dmi_req_command_0_a3_RNIARI09_1z, un1_dmi_req_command_0_a3_RNI10U4D_1z, un1_dmi_req_command_0_a3_RNIVTT4D_1z, un1_dmi_req_command_0_a3_RNIM3L9D_1z, un1_dmi_req_command_0_a3_RNIK1L9D_1z, un1_dmi_req_command_0_a3_RNIIVK9D_1z, un1_dmi_req_command_0_a3_RNIGTK9D_0_1z ) ; output [2:1] command_reg_state_4 ; input [31:0] command_reg ; output [33:0] dmi_resp_data ; output data_0_reg_5_m1_26 ; output data_0_reg_5_m1_25 ; output data_0_reg_5_m1_24 ; output data_0_reg_5_m1_23 ; output data_0_reg_5_m1_22 ; output data_0_reg_5_m1_8 ; output data_0_reg_5_m1_7 ; output data_0_reg_5_m1_6 ; output data_0_reg_5_m1_17 ; output data_0_reg_5_m1_18 ; output data_0_reg_5_m1_19 ; output data_0_reg_5_m1_20 ; output data_0_reg_5_m1_21 ; output data_0_reg_5_m1_4 ; output data_0_reg_5_m1_0 ; input [31:0] data_0_reg ; input [31:0] cpu_d_resp_rd_data_net ; output [5:1] debug_state_ns ; output cmderr_ff_4_0 ; output cmderr_ff_4_2 ; input [5:0] debug_state ; input [40:0] dmi_req_data ; output [3:0] debug_sysbus_req_wr_byte_en_net ; input [5:0] command_reg_state ; output [3:0] debug_sysbus_req_rd_byte_en_net ; input req_masked_0 ; input [2:0] abstractcs_cmderr ; output [31:0] sba_req_wr_data_int ; output [31:0] sba_req_addr_int ; output command_reg_state_4_0_fast_0 ; input un1_cpu_d_req_ready_sig_0_0 ; output N_723 ; output N_76_i ; input cpu_debug_csr_op_rd_data_valid_net ; input cpu_d_resp_error_sig ; input cpu_d_resp_valid_sig ; output debug_gpr_addr_0_sqmuxa_i ; output debug_csr_rd_data_ready_1_sqmuxa_i ; input debug_sysbus_resp_error_net ; output un1_dmcontrol_ndmreset13_4_i ; output un1_dmi_req_command_0_a3_RNIGP7L31_1z ; output N_719 ; output N_15 ; output data_0_reg_5_sm0 ; output N_190_i ; output N_136_i ; output N_134_i ; output N_132_i ; output N_130_i ; output N_128_i ; output dmi_resp_valid_0_0_1z ; output N_123_i_1z ; input cpu_debug_halt_ack_net ; output un1_dmcontrol_ndmreset13_2_i ; output N_52_i ; output debug_resume_req_3 ; input debug_exit_retr ; input init_wr_dcsr_step_en ; output N_88_i ; output N_170_i ; input dmstatus_allany_havereset ; output N_112_i_1z ; output N_110_i_1z ; output N_812 ; input empty_rd ; output havereset_skip_pwrup_4 ; output N_361 ; output N_807 ; input debug_trx_os_net ; output N_1108 ; input debug_sys_reset ; input un1_debug_csr_rd_en ; input abstractcs_busy ; output N_88_1 ; output sba_req_addr_1 ; output N_990 ; output N_1547 ; input dmcontrol_ackhavereset ; input dmcontrol_haltreq ; input dmcontrol_resumereq ; input dmstatus_allany_resumeack ; input abs_cmd_transfer_ff ; input havereset_skip_pwrup ; input cpu_debug_halt_req_net ; output N_75_i ; output N_59_tz ; input gpr_rs2_rd_data_valid_sig ; output N_78_i ; input trace_priv_i ; input cpu_m8_0_a3_0_3 ; input cpu_i_req_is_tcm0_5 ; input cpu_m8_0_a3_0_2 ; input cpu_N_6 ; input cpu_N_14_mux ; input un1_cpu_d_req_ready_sig_d_0 ; input un1_cpu_d_req_ready_sig_c ; output un1_dmcontrol_ndmreset13_i ; output dmcontrol_dmactive4 ; output sbcs_busyerror_1_sqmuxa_1 ; output N_53_1 ; input dmstatus_allany_halted ; output N_53 ; input cpu_debug_active_net ; input cpu_debug_csr_rd_en_net ; input cpu_debug_gpr_rd_en_net ; input N_81_i ; output debug_sysbus_resp_ready_net ; output debug_sysbus_req_valid_net ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input dff ; output next_state_0_sqmuxa_i_RNI4B2FB_1z ; output un1_dmi_req_command_0_a3_RNIERK9D_0_1z ; output un1_dmi_req_command_0_a3_RNICPK9D_0_1z ; output un1_dmi_req_command_0_a3_RNIANK9D_0_1z ; output un1_dmi_req_command_0_a3_RNI8LK9D_0_1z ; output un1_dmi_req_command_0_a3_RNIIVK9D_0_1z ; output un1_dmi_req_command_0_a3_RNIGTK9D_1z ; output un1_dmi_req_command_0_a3_RNIERK9D_1z ; output un1_dmi_req_command_0_a3_RNICPK9D_1z ; output un1_dmi_req_command_0_a3_RNIANK9D_1z ; output un1_dmi_req_command_0_a3_RNI8LK9D_1z ; output un1_dmi_req_command_0_a3_RNICTI09_1z ; output un1_dmi_req_command_0_a3_RNIARI09_1z ; output un1_dmi_req_command_0_a3_RNI10U4D_1z ; output un1_dmi_req_command_0_a3_RNIVTT4D_1z ; output un1_dmi_req_command_0_a3_RNIM3L9D_1z ; output un1_dmi_req_command_0_a3_RNIK1L9D_1z ; output un1_dmi_req_command_0_a3_RNIIVK9D_1z ; output un1_dmi_req_command_0_a3_RNIGTK9D_0_1z ; wire data_0_reg_5_m1_26 ; wire data_0_reg_5_m1_25 ; wire data_0_reg_5_m1_24 ; wire data_0_reg_5_m1_23 ; wire data_0_reg_5_m1_22 ; wire data_0_reg_5_m1_8 ; wire data_0_reg_5_m1_7 ; wire data_0_reg_5_m1_6 ; wire data_0_reg_5_m1_17 ; wire data_0_reg_5_m1_18 ; wire data_0_reg_5_m1_19 ; wire data_0_reg_5_m1_20 ; wire data_0_reg_5_m1_21 ; wire data_0_reg_5_m1_4 ; wire data_0_reg_5_m1_0 ; wire cmderr_ff_4_0 ; wire cmderr_ff_4_2 ; wire req_masked_0 ; wire command_reg_state_4_0_fast_0 ; wire un1_cpu_d_req_ready_sig_0_0 ; wire N_723 ; wire N_76_i ; wire cpu_debug_csr_op_rd_data_valid_net ; wire cpu_d_resp_error_sig ; wire cpu_d_resp_valid_sig ; wire debug_gpr_addr_0_sqmuxa_i ; wire debug_csr_rd_data_ready_1_sqmuxa_i ; wire debug_sysbus_resp_error_net ; wire un1_dmcontrol_ndmreset13_4_i ; wire un1_dmi_req_command_0_a3_RNIGP7L31_1z ; wire N_719 ; wire N_15 ; wire data_0_reg_5_sm0 ; wire N_190_i ; wire N_136_i ; wire N_134_i ; wire N_132_i ; wire N_130_i ; wire N_128_i ; wire dmi_resp_valid_0_0_1z ; wire N_123_i_1z ; wire cpu_debug_halt_ack_net ; wire un1_dmcontrol_ndmreset13_2_i ; wire N_52_i ; wire debug_resume_req_3 ; wire debug_exit_retr ; wire init_wr_dcsr_step_en ; wire N_88_i ; wire N_170_i ; wire dmstatus_allany_havereset ; wire N_112_i_1z ; wire N_110_i_1z ; wire N_812 ; wire empty_rd ; wire havereset_skip_pwrup_4 ; wire N_361 ; wire N_807 ; wire debug_trx_os_net ; wire N_1108 ; wire debug_sys_reset ; wire un1_debug_csr_rd_en ; wire abstractcs_busy ; wire N_88_1 ; wire sba_req_addr_1 ; wire N_990 ; wire N_1547 ; wire dmcontrol_ackhavereset ; wire dmcontrol_haltreq ; wire dmcontrol_resumereq ; wire dmstatus_allany_resumeack ; wire abs_cmd_transfer_ff ; wire havereset_skip_pwrup ; wire cpu_debug_halt_req_net ; wire N_75_i ; wire N_59_tz ; wire gpr_rs2_rd_data_valid_sig ; wire N_78_i ; wire trace_priv_i ; wire cpu_m8_0_a3_0_3 ; wire cpu_i_req_is_tcm0_5 ; wire cpu_m8_0_a3_0_2 ; wire cpu_N_6 ; wire cpu_N_14_mux ; wire un1_cpu_d_req_ready_sig_d_0 ; wire un1_cpu_d_req_ready_sig_c ; wire un1_dmcontrol_ndmreset13_i ; wire dmcontrol_dmactive4 ; wire sbcs_busyerror_1_sqmuxa_1 ; wire N_53_1 ; wire dmstatus_allany_halted ; wire N_53 ; wire cpu_debug_active_net ; wire cpu_debug_csr_rd_en_net ; wire cpu_debug_gpr_rd_en_net ; wire N_81_i ; wire debug_sysbus_resp_ready_net ; wire debug_sysbus_req_valid_net ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire dff ; wire next_state_0_sqmuxa_i_RNI4B2FB_1z ; wire un1_dmi_req_command_0_a3_RNIERK9D_0_1z ; wire un1_dmi_req_command_0_a3_RNICPK9D_0_1z ; wire un1_dmi_req_command_0_a3_RNIANK9D_0_1z ; wire un1_dmi_req_command_0_a3_RNI8LK9D_0_1z ; wire un1_dmi_req_command_0_a3_RNIIVK9D_0_1z ; wire un1_dmi_req_command_0_a3_RNIGTK9D_1z ; wire un1_dmi_req_command_0_a3_RNIERK9D_1z ; wire un1_dmi_req_command_0_a3_RNICPK9D_1z ; wire un1_dmi_req_command_0_a3_RNIANK9D_1z ; wire un1_dmi_req_command_0_a3_RNI8LK9D_1z ; wire un1_dmi_req_command_0_a3_RNICTI09_1z ; wire un1_dmi_req_command_0_a3_RNIARI09_1z ; wire un1_dmi_req_command_0_a3_RNI10U4D_1z ; wire un1_dmi_req_command_0_a3_RNIVTT4D_1z ; wire un1_dmi_req_command_0_a3_RNIM3L9D_1z ; wire un1_dmi_req_command_0_a3_RNIK1L9D_1z ; wire un1_dmi_req_command_0_a3_RNIIVK9D_1z ; wire un1_dmi_req_command_0_a3_RNIGTK9D_0_1z ; wire [7:0] counter_Z; wire [0:0] counter_lm_0_fast_Z; wire [7:7] counter_s_Z; wire [6:1] counter_s; wire [1:0] sba_state_Z; wire [0:0] sba_state_ns; wire [2:0] sbcs_access_ff_Z; wire [1:1] sbcs_access_ff_3; wire [31:0] sba_req_addr_int_16; wire [3:0] sba_req_wr_byte_en_int_Z; wire [3:0] sba_req_wr_byte_en_int_13_Z; wire [3:0] sba_req_rd_byte_en_int_Z; wire [3:0] sba_req_rd_byte_en_int_13_Z; wire [31:0] sbaddr_ff_Z; wire [31:1] sbaddr_ff_6; wire [3:0] prescale_counter_Z; wire [3:0] prescale_counter_4_Z; wire [31:0] sbdata_ff_Z; wire [31:0] sbdata_ff_9; wire [31:0] sba_req_wr_data_int_10; wire [2:0] un1_access_valid_0_a3_Z; wire [6:1] counter_cry_Z; wire [6:1] counter_cry_Y; wire [7:7] counter_s_FCO; wire [7:7] counter_s_Y; wire [3:0] sba_req_wr_byte_en_int_13_m2_2_Z; wire [31:0] dmi_rdata_0_iv_0_0_Z; wire [19:0] dmi_rdata_0_iv_0_2_Z; wire [2:0] sbcs_access; wire [7:0] sbdata_ff_9_iv_0_0_Z; wire [7:0] sbdata_ff_9_iv_0_1_0_Z; wire [2:0] sba_req_rd_byte_en_int_13_m2_1_Z; wire [3:0] sba_req_rd_byte_en_int_13_1_Z; wire [2:2] sba_req_wr_byte_en_int_13_m2_1_Z; wire [0:0] dmi_rdata_0_iv_0_a3_3_1_Z; wire [1:1] debug_state_ns_0_a3_1_0_Z; wire [3:3] debug_state_ns_0_a3_0; wire [0:0] dmi_rdata_0_iv_0_a3_3_3_Z; wire [0:0] dmi_rdata_0_iv_0_a3_1_1_Z; wire [0:0] sba_state_ns_1; wire [1:1] debug_state_ns_0_1_Z; wire [3:3] debug_state_ns_0_0_Z; wire [15:8] sbdata_ff_9_0_iv_0_0_Z; wire [23:8] sba_req_wr_data_int_10_1_iv_0_0_Z; wire [30:24] sba_req_wr_data_int_10_0_iv_0_0_Z; wire [22:13] dmi_rdata_0_iv_0_1_Z; wire [0:0] dmi_rdata_0_iv_0_4_Z; wire un1_dmi_req_command_i ; wire un1_next_state_0_sqmuxa_3_i_0 ; wire N_101 ; wire N_911 ; wire next_state_1_sqmuxa_3 ; wire VCC ; wire GND ; wire counter_1_sqmuxa_Z ; wire sba_rd_req_ff_Z ; wire sba_rd_req_ff_4_Z ; wire sbcs_autoincrement_ff_Z ; wire N_695_i ; wire sbcs_to_err_ff_Z ; wire sbcs_to_err_ff_10 ; wire sbcs_ba_err_ff_Z ; wire sbcs_ba_err_ff_7 ; wire sbcs_uar_err_ff_Z ; wire sbcs_uar_err_ff_6_iv_i_Z ; wire sba_wr_req_ff_Z ; wire sba_wr_req_ff_4_Z ; wire m14_0 ; wire N_415_i ; wire N_419_i ; wire sbcs_readonaddr_ff_Z ; wire N_693_i ; wire sbcs_readonaddr_1_sqmuxa_i ; wire sbcs_readondata_ff_Z ; wire N_691_i ; wire N_375_i ; wire sbcs_busyerror_3_sqmuxa_i ; wire timeout_Z ; wire timeout_4_Z ; wire counter_1_sqmuxa_i ; wire sba_busy ; wire N_699_i ; wire sbcs_busy_ff_2_sqmuxa_i_Z ; wire sba_req_valid_int_9_Z ; wire sba_req_valid_int_2_sqmuxa_i_Z ; wire un1_sbcs_readonaddr_ff7_7_i ; wire N_401 ; wire sbaddr_ff_6_cry_0_0_Y ; wire un12lto14 ; wire un12lt14 ; wire sbaddr_ff_6_cry_0 ; wire sbaddr_ff_6_cry_0_0_S ; wire N_957 ; wire sbaddr_ff_6_cry_1 ; wire sbaddr_ff_6_cry_1_0_Y ; wire N_956 ; wire sbaddr_ff_6_cry_2 ; wire sbaddr_ff_6_cry_2_0_Y ; wire N_868 ; wire sbaddr_ff_6_cry_3_Z ; wire sbaddr_ff_6_cry_3_Y ; wire N_733 ; wire sbaddr_ff_6_cry_4_Z ; wire sbaddr_ff_6_cry_4_Y ; wire sbaddr_ff_6_cry_5_Z ; wire sbaddr_ff_6_cry_5_Y ; wire sbaddr_ff_6_cry_6_Z ; wire sbaddr_ff_6_cry_6_Y ; wire sbaddr_ff_6_cry_7_Z ; wire sbaddr_ff_6_cry_7_Y ; wire sbaddr_ff_6_cry_8_Z ; wire sbaddr_ff_6_cry_8_Y ; wire sbaddr_ff_6_cry_9_Z ; wire sbaddr_ff_6_cry_9_Y ; wire sbaddr_ff_6_cry_10_Z ; wire sbaddr_ff_6_cry_10_Y ; wire sbaddr_ff_6_cry_11_Z ; wire sbaddr_ff_6_cry_11_Y ; wire sbaddr_ff_6_cry_12_Z ; wire sbaddr_ff_6_cry_12_Y ; wire sbaddr_ff_6_cry_13_Z ; wire sbaddr_ff_6_cry_13_Y ; wire sbaddr_ff_6_cry_14_Z ; wire sbaddr_ff_6_cry_14_Y ; wire sbaddr_ff_6_cry_15_Z ; wire sbaddr_ff_6_cry_15_Y ; wire sbaddr_ff_6_cry_16_Z ; wire sbaddr_ff_6_cry_16_Y ; wire sbaddr_ff_6_cry_17_Z ; wire sbaddr_ff_6_cry_17_Y ; wire sbaddr_ff_6_cry_18_Z ; wire sbaddr_ff_6_cry_18_Y ; wire sbaddr_ff_6_cry_19_Z ; wire sbaddr_ff_6_cry_19_Y ; wire sbaddr_ff_6_cry_20_Z ; wire sbaddr_ff_6_cry_20_Y ; wire sbaddr_ff_6_cry_21_Z ; wire sbaddr_ff_6_cry_21_Y ; wire sbaddr_ff_6_cry_22_Z ; wire sbaddr_ff_6_cry_22_Y ; wire sbaddr_ff_6_cry_23_Z ; wire sbaddr_ff_6_cry_23_Y ; wire sbaddr_ff_6_cry_24_Z ; wire sbaddr_ff_6_cry_24_Y ; wire sbaddr_ff_6_cry_25_Z ; wire sbaddr_ff_6_cry_25_Y ; wire sbaddr_ff_6_cry_26_Z ; wire sbaddr_ff_6_cry_26_Y ; wire sbaddr_ff_6_cry_27_Z ; wire sbaddr_ff_6_cry_27_Y ; wire sbaddr_ff_6_cry_28_Z ; wire sbaddr_ff_6_cry_28_Y ; wire sbaddr_ff_6_cry_29_Z ; wire sbaddr_ff_6_cry_29_Y ; wire sbaddr_ff_6_s_31_FCO ; wire sbaddr_ff_6_s_31_Y ; wire sbaddr_ff_6_cry_30_Z ; wire sbaddr_ff_6_cry_30_Y ; wire counter_s_4132_FCO ; wire counter_s_4132_S ; wire counter_s_4132_Y ; wire N_1567 ; wire sba_req_wr_byte_en_int_13_sm0 ; wire un1_sbcs_readonaddr_ff7_4_sn ; wire N_1400 ; wire N_1552 ; wire N_1741 ; wire N_1617 ; wire mem_rd ; wire sba_rd_req_cmb_1_sqmuxa_1_0_a3_1_Z ; wire sba_rd_req_cmb_1_sqmuxa_1 ; wire N_28_i ; wire abstractcs_busy_cmb7 ; wire N_867 ; wire N_94 ; wire sba_req_wr_byte_en_int_13_ss0_0_a2cf0_1_Z ; wire sba_req_addr_int26_Z ; wire N_685_i ; wire N_1832 ; wire N_1541 ; wire N_99 ; wire N_1551 ; wire N_820 ; wire sba_req_wr_data_int_10_0_iv_0_N_4L7_Z ; wire N_1563 ; wire N_1562 ; wire N_934 ; wire sba_req_wr_data_int_10_0_iv_0_N_5L9_Z ; wire N_825 ; wire sba_req_valid_int35_0_Z ; wire sba_resp_ready_int21_Z ; wire sba_req_addr_int_0_sqmuxa_0_1_0_Z ; wire sba_req_addr_int_0_sqmuxa ; wire next_state7 ; wire next_state21_1_1_Z ; wire next_state21_a1_Z ; wire next_state21 ; wire N_1661 ; wire N_1655 ; wire N_1660 ; wire N_806 ; wire cmderr_cmb_0_sqmuxa_2_i_a3_3_1_Z ; wire cmderr_cmb_0_sqmuxa_2_i_a3_0_Z ; wire cmderr_cmb_0_sqmuxa_2_i_a2_0_0_2_Z ; wire cmderr_cmb_0_sqmuxa_2_i_a3_3_Z ; wire N_1669 ; wire N_805 ; wire N_1743 ; wire un1_sbcs_readonaddr_ff7_5_Z ; wire N_1518 ; wire N_1559 ; wire N_111 ; wire N_107 ; wire N_1823 ; wire N_1625 ; wire N_1624 ; wire N_1589 ; wire N_1544 ; wire N_1542 ; wire N_115 ; wire sbcs_busy_ff15_0_a3_0_Z ; wire un1_m3_e_1 ; wire N_26_i ; wire sba_rd_req_cmb_f1_0_Z ; wire debug_gpr_addr_1_sqmuxa_0_268_a2_0_a2_0_0 ; wire prescale_counter6_3_Z ; wire sba_req_valid_int_0_sqmuxa_Z ; wire N_1553 ; wire dmstatus_allany_havereset10 ; wire N_127 ; wire un16_dmi_valid_i ; wire mem_wr ; wire sbcs_ba_err_0_sqmuxa_2_Z ; wire sba_rd_req_cmb ; wire sba_wr_req_cmb ; wire un1_sba_rd_req_cmb_1_Z ; wire N_100 ; wire N_743 ; wire N_813 ; wire N_835 ; wire N_369_i ; wire N_847 ; wire un1_sbcs_busy_ff13_3_i ; wire sbcs_busyerror_0_sqmuxa ; wire N_969 ; wire N_798 ; wire N_737 ; wire sba_req_rd_byte_en_int_13_ss0_0_a2_0_0_Z ; wire un1_next_state_0_sqmuxa_3_0_0_Z ; wire debug_resume_req_3_1 ; wire cmderr_cmb_3_sqmuxa_0_a2_1_5_Z ; wire cmderr_cmb_3_sqmuxa_0_a2_1_4_Z ; wire sba_rd_req_cmb_2_sqmuxa_i_a2_0_0_0_12_Z ; wire sba_rd_req_cmb_2_sqmuxa_i_a2_0_0_0_11_Z ; wire sba_rd_req_cmb_2_sqmuxa_i_a2_0_0_0_10_Z ; wire sba_rd_req_cmb_2_sqmuxa_i_a2_0_0_0_9_Z ; wire prescale_counter6_4_Z ; wire mem_rdata34 ; wire un12_dmi_valid_i ; wire N_979 ; wire N_837 ; wire N_728 ; wire N_1528_i ; wire N_963 ; wire N_986 ; wire next_state28_Z ; wire count_en_0_sqmuxa_1 ; wire sba_req_valid_int_1_sqmuxa_Z ; wire N_101_0 ; wire N_1549 ; wire N_1652 ; wire sba_req_addr_int14 ; wire N_1744 ; wire N_801 ; wire N_1750 ; wire N_1738 ; wire N_403_i ; wire sbcs_busy_ff14_i_o3_0_Z ; wire sba_rd_req_cmb_2_sqmuxa_i_a2_0_0_0_13_Z ; wire N_717_i ; wire N_1322 ; wire prescale_counter6_Z ; wire N_1829 ; wire N_800 ; wire N_1612 ; wire count_en_0_Z ; wire N_723_1 ; wire N_1560 ; wire N_1564 ; wire N_915 ; wire N_1626 ; wire N_103 ; wire N_24_i ; wire N_1078 ; wire sba_resp_ready_int_2_sqmuxa_i_a3_0_Z ; wire N_802 ; wire N_1647 ; wire N_1656 ; wire N_846 ; wire N_1752 ; wire debug_gpr_addr_1_sqmuxa_0_268_a2_0_a2_1_Z ; wire un1_dmcontrol_ndmreset13_4_0_o2_0_Z ; wire cmderr_cmb_3_sqmuxa_0_a2_2_3_Z ; wire N_1524 ; wire N_1651 ; wire N_1840 ; wire N_1083 ; wire N_1303 ; wire N_1786 ; wire N_1650 ; wire CO1 ; wire sba_req_rd_byte_en_int_3_sqmuxa_1_Z ; wire N_1659 ; wire N_1649 ; wire N_1841 ; wire N_712_i ; wire N_704_i ; wire N_814 ; wire N_816 ; wire N_819 ; wire N_821 ; wire N_822 ; wire N_826 ; wire N_827 ; wire N_828 ; wire N_829 ; wire N_830 ; wire N_831 ; wire N_832 ; wire N_870 ; wire N_871 ; wire N_872 ; wire N_873 ; wire N_874 ; wire N_875 ; wire N_876 ; wire N_878 ; wire N_879 ; wire N_881 ; wire N_882 ; wire N_883 ; wire N_884 ; wire N_885 ; wire N_886 ; wire N_887 ; wire N_888 ; wire N_889 ; wire N_890 ; wire N_891 ; wire N_892 ; wire N_893 ; wire N_894 ; wire N_895 ; wire N_896 ; wire N_897 ; wire N_919 ; wire N_920 ; wire N_921 ; wire N_922 ; wire N_924 ; wire N_925 ; wire N_926 ; wire N_927 ; wire N_928 ; wire N_929 ; wire N_930 ; wire N_931 ; wire N_932 ; wire N_933 ; wire N_923 ; wire N_880 ; wire N_869 ; wire N_818 ; wire N_877 ; wire N_817 ; wire N_358_i ; wire cmderr_cmb_3_sqmuxa ; wire N_946 ; wire N_815 ; wire sba_rd_req_cmb_2_sqmuxa_1_i_a2_4_Z ; wire un1_dmi_req_command_0_a3_1_Z ; wire cmderr_cmb_3_sqmuxa_0_a2_2_4_Z ; wire sbcs_to_err_0_sqmuxa_Z ; wire sbcs_ba_err_0_sqmuxa_Z ; wire N_1654 ; wire sba_req_wr_byte_en_int_0_sqmuxa_Z ; wire N_1658 ; wire sba_req_wr_byte_en_int_13_ss0 ; wire N_1570 ; wire N_1569 ; wire N_1831 ; wire sba_rd_req_cmb_2_sqmuxa_1_i_a2_6_Z ; wire sba_req_addr_int_1_sqmuxa_1_Z ; wire sba_req_addr_int_1_sqmuxa_2_Z ; wire N_18_mux ; wire d_N_7_1 ; wire N_997 ; wire N_1001 ; wire N_1005 ; wire N_1013 ; wire N_1017 ; wire N_1021 ; wire N_1087 ; wire N_1109 ; wire N_1129 ; wire N_1139 ; wire N_1143 ; wire N_1170 ; wire N_1242 ; wire N_1266 ; wire N_1274 ; wire N_1296 ; wire cmderr_cmb_1_sqmuxa_1 ; wire N_1098_1 ; wire N_95 ; wire sbcs_busy_ff15 ; wire sbcs_uar_err_Z ; wire un1_sbcs_readonaddr_ff7_5_2_Z ; wire N_1282 ; wire N_1270 ; wire N_1278 ; wire N_1262 ; wire N_1657 ; wire N_1009 ; wire N_1134 ; wire N_1113 ; wire un1_sbcs_ba_err_ff_0_sqmuxa_i_0 ; wire sbcs_to_err_ff_10_f1_0_Z ; wire sbcs_ba_err_ff_0_sqmuxa_1_Z ; wire sbcs_ba_err_ff_7_f1_0_Z ; wire sba_rd_req_cmb_2_sqmuxa_1_i_a2_7_Z ; wire N_78 ; wire sbcs_to_err_ff_0_sqmuxa_Z ; wire un1_sbcs_ba_err_1_Z ; wire N_1839 ; wire cmderr_cmb_3_sqmuxa_i_tz_tz ; wire un1_sbcs_busy_ff13_i_0 ; wire sbcs_ba_err_ff9_Z ; wire sbcs_ba_err_ff_0_sqmuxa_1_2_Z ; wire un1_sbcs_uar_err_ff_0_sqmuxa_i ; wire N_1097_1 ; wire un1_sba_resp_ready_int21_1_Z ; wire sba_req_addr_int_0_sqmuxa_1_Z ; wire un1_sbcs_busy_ff13_3_0 ; wire un1_sbcs_busy_ff13_3_1 ; wire next_state21_a1_0_a0_Z ; wire sba_req_valid_int35_Z ; wire un1_sba_req_valid_int35_1_Z ; wire sba_resp_ready_int_1_sqmuxa_1_Z ; wire un1_sbcs_busy_ff13_2_0_Z ; wire un1_sbcs_busy_ff13_1_Z ; wire N_10 ; wire N_9 ; wire N_8 ; wire N_7 ; // @48:14495 CFG3 un1_dmi_req_command_0_a3_RNIGTK9D_0 ( .A(dmi_req_data[6]), .B(un1_dmi_req_command_i), .C(command_reg[4]), .Y(un1_dmi_req_command_0_a3_RNIGTK9D_0_1z) ); defparam un1_dmi_req_command_0_a3_RNIGTK9D_0.INIT=8'hB8; // @48:14495 CFG3 un1_dmi_req_command_0_a3_RNIIVK9D ( .A(dmi_req_data[7]), .B(un1_dmi_req_command_i), .C(command_reg[5]), .Y(un1_dmi_req_command_0_a3_RNIIVK9D_1z) ); defparam un1_dmi_req_command_0_a3_RNIIVK9D.INIT=8'hB8; // @48:14495 CFG3 un1_dmi_req_command_0_a3_RNIK1L9D ( .A(dmi_req_data[8]), .B(un1_dmi_req_command_i), .C(command_reg[6]), .Y(un1_dmi_req_command_0_a3_RNIK1L9D_1z) ); defparam un1_dmi_req_command_0_a3_RNIK1L9D.INIT=8'hB8; // @48:14495 CFG3 un1_dmi_req_command_0_a3_RNIM3L9D ( .A(dmi_req_data[9]), .B(un1_dmi_req_command_i), .C(command_reg[7]), .Y(un1_dmi_req_command_0_a3_RNIM3L9D_1z) ); defparam un1_dmi_req_command_0_a3_RNIM3L9D.INIT=8'hB8; // @48:14495 CFG3 un1_dmi_req_command_0_a3_RNIVTT4D ( .A(dmi_req_data[10]), .B(un1_dmi_req_command_i), .C(command_reg[8]), .Y(un1_dmi_req_command_0_a3_RNIVTT4D_1z) ); defparam un1_dmi_req_command_0_a3_RNIVTT4D.INIT=8'hB8; // @48:14495 CFG3 un1_dmi_req_command_0_a3_RNI10U4D ( .A(dmi_req_data[11]), .B(un1_dmi_req_command_i), .C(command_reg[9]), .Y(un1_dmi_req_command_0_a3_RNI10U4D_1z) ); defparam un1_dmi_req_command_0_a3_RNI10U4D.INIT=8'hB8; // @48:14495 CFG3 un1_dmi_req_command_0_a3_RNIARI09 ( .A(dmi_req_data[12]), .B(un1_dmi_req_command_i), .C(command_reg[10]), .Y(un1_dmi_req_command_0_a3_RNIARI09_1z) ); defparam un1_dmi_req_command_0_a3_RNIARI09.INIT=8'hB8; // @48:14495 CFG3 un1_dmi_req_command_0_a3_RNICTI09 ( .A(dmi_req_data[13]), .B(un1_dmi_req_command_i), .C(command_reg[11]), .Y(un1_dmi_req_command_0_a3_RNICTI09_1z) ); defparam un1_dmi_req_command_0_a3_RNICTI09.INIT=8'hB8; // @48:14495 CFG3 un1_dmi_req_command_0_a3_RNI8LK9D ( .A(dmi_req_data[2]), .B(un1_dmi_req_command_i), .C(command_reg[0]), .Y(un1_dmi_req_command_0_a3_RNI8LK9D_1z) ); defparam un1_dmi_req_command_0_a3_RNI8LK9D.INIT=8'hB8; // @48:14495 CFG3 un1_dmi_req_command_0_a3_RNIANK9D ( .A(dmi_req_data[3]), .B(un1_dmi_req_command_i), .C(command_reg[1]), .Y(un1_dmi_req_command_0_a3_RNIANK9D_1z) ); defparam un1_dmi_req_command_0_a3_RNIANK9D.INIT=8'hB8; // @48:14495 CFG3 un1_dmi_req_command_0_a3_RNICPK9D ( .A(dmi_req_data[4]), .B(un1_dmi_req_command_i), .C(command_reg[2]), .Y(un1_dmi_req_command_0_a3_RNICPK9D_1z) ); defparam un1_dmi_req_command_0_a3_RNICPK9D.INIT=8'hB8; // @48:14495 CFG3 un1_dmi_req_command_0_a3_RNIERK9D ( .A(dmi_req_data[5]), .B(un1_dmi_req_command_i), .C(command_reg[3]), .Y(un1_dmi_req_command_0_a3_RNIERK9D_1z) ); defparam un1_dmi_req_command_0_a3_RNIERK9D.INIT=8'hB8; // @48:14495 CFG3 un1_dmi_req_command_0_a3_RNIGTK9D ( .A(dmi_req_data[6]), .B(un1_dmi_req_command_i), .C(command_reg[4]), .Y(un1_dmi_req_command_0_a3_RNIGTK9D_1z) ); defparam un1_dmi_req_command_0_a3_RNIGTK9D.INIT=8'hB8; // @48:14495 CFG3 un1_dmi_req_command_0_a3_RNIIVK9D_0 ( .A(dmi_req_data[7]), .B(un1_dmi_req_command_i), .C(command_reg[5]), .Y(un1_dmi_req_command_0_a3_RNIIVK9D_0_1z) ); defparam un1_dmi_req_command_0_a3_RNIIVK9D_0.INIT=8'hB8; // @48:14495 CFG3 un1_dmi_req_command_0_a3_RNI8LK9D_0 ( .A(dmi_req_data[2]), .B(un1_dmi_req_command_i), .C(command_reg[0]), .Y(un1_dmi_req_command_0_a3_RNI8LK9D_0_1z) ); defparam un1_dmi_req_command_0_a3_RNI8LK9D_0.INIT=8'hB8; // @48:14495 CFG3 un1_dmi_req_command_0_a3_RNIANK9D_0 ( .A(dmi_req_data[3]), .B(un1_dmi_req_command_i), .C(command_reg[1]), .Y(un1_dmi_req_command_0_a3_RNIANK9D_0_1z) ); defparam un1_dmi_req_command_0_a3_RNIANK9D_0.INIT=8'hB8; // @48:14495 CFG3 un1_dmi_req_command_0_a3_RNICPK9D_0 ( .A(dmi_req_data[4]), .B(un1_dmi_req_command_i), .C(command_reg[2]), .Y(un1_dmi_req_command_0_a3_RNICPK9D_0_1z) ); defparam un1_dmi_req_command_0_a3_RNICPK9D_0.INIT=8'hB8; // @48:14495 CFG3 un1_dmi_req_command_0_a3_RNIERK9D_0 ( .A(dmi_req_data[5]), .B(un1_dmi_req_command_i), .C(command_reg[3]), .Y(un1_dmi_req_command_0_a3_RNIERK9D_0_1z) ); defparam un1_dmi_req_command_0_a3_RNIERK9D_0.INIT=8'hB8; // @48:14339 CFG3 \command_reg_state_4_0_fast[0] ( .A(command_reg_state[2]), .B(un1_next_state_0_sqmuxa_3_i_0), .C(command_reg_state[5]), .Y(command_reg_state_4_0_fast_0) ); defparam \command_reg_state_4_0_fast[0] .INIT=8'hF1; // @48:14337 CFG3 next_state_0_sqmuxa_i_RNI4B2FB ( .A(N_101), .B(N_911), .C(next_state_1_sqmuxa_3), .Y(next_state_0_sqmuxa_i_RNI4B2FB_1z) ); defparam next_state_0_sqmuxa_i_RNI4B2FB.INIT=8'h74; // @48:15548 CFG1 \counter_lm_0_fast[0] ( .A(counter_Z[0]), .Y(counter_lm_0_fast_Z[0]) ); defparam \counter_lm_0_fast[0] .INIT=2'h1; // @48:15548 SLE \counter[7] ( .Q(counter_Z[7]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(counter_s_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(counter_1_sqmuxa_Z) ); // @48:15548 SLE \counter[6] ( .Q(counter_Z[6]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(counter_s[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(counter_1_sqmuxa_Z) ); // @48:15548 SLE \counter[5] ( .Q(counter_Z[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(counter_s[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(counter_1_sqmuxa_Z) ); // @48:15548 SLE \counter[4] ( .Q(counter_Z[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(counter_s[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(counter_1_sqmuxa_Z) ); // @48:15548 SLE \counter[3] ( .Q(counter_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(counter_s[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(counter_1_sqmuxa_Z) ); // @48:15548 SLE \counter[2] ( .Q(counter_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(counter_s[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(counter_1_sqmuxa_Z) ); // @48:15548 SLE \counter[1] ( .Q(counter_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(counter_s[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(counter_1_sqmuxa_Z) ); // @48:15548 SLE \counter[0] ( .Q(counter_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(counter_lm_0_fast_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(counter_1_sqmuxa_Z) ); // @48:15259 SLE sba_rd_req_ff ( .Q(sba_rd_req_ff_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_rd_req_ff_4_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE sbcs_autoincrement_ff ( .Q(sbcs_autoincrement_ff_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_695_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE sbcs_to_err_ff ( .Q(sbcs_to_err_ff_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbcs_to_err_ff_10), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE sbcs_ba_err_ff ( .Q(sbcs_ba_err_ff_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbcs_ba_err_ff_7), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE sbcs_uar_err_ff ( .Q(sbcs_uar_err_ff_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbcs_uar_err_ff_6_iv_i_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE sba_wr_req_ff ( .Q(sba_wr_req_ff_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_wr_req_ff_4_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15192 SLE \sba_state[1] ( .Q(sba_state_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(m14_0), .EN(sba_state_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15192 SLE \sba_state[0] ( .Q(sba_state_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_state_ns[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbcs_access_ff[2] ( .Q(sbcs_access_ff_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_415_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbcs_access_ff[1] ( .Q(sbcs_access_ff_Z[1]), .ADn(GND), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbcs_access_ff_3[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbcs_access_ff[0] ( .Q(sbcs_access_ff_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_419_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE sbcs_readonaddr_ff ( .Q(sbcs_readonaddr_ff_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_693_i), .EN(sbcs_readonaddr_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE sbcs_readondata_ff ( .Q(sbcs_readondata_ff_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_691_i), .EN(sbcs_readonaddr_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE sbcs_busyerror_ff ( .Q(dmi_resp_data[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_375_i), .EN(sbcs_busyerror_3_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15548 SLE timeout ( .Q(timeout_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(timeout_4_Z), .EN(counter_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE sbcs_busy_ff ( .Q(sba_busy), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_699_i), .EN(sbcs_busy_ff_2_sqmuxa_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE sba_req_valid_int ( .Q(debug_sysbus_req_valid_net), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_valid_int_9_Z), .EN(sba_req_valid_int_2_sqmuxa_i_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE sba_resp_ready_int ( .Q(debug_sysbus_resp_ready_net), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un1_sbcs_readonaddr_ff7_7_i), .EN(N_401), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_addr_int_Z[6] ( .Q(sba_req_addr_int[6]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_addr_int_16[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_addr_int_Z[5] ( .Q(sba_req_addr_int[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_addr_int_16[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_addr_int_Z[4] ( .Q(sba_req_addr_int[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_addr_int_16[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_addr_int_Z[3] ( .Q(sba_req_addr_int[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_addr_int_16[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_addr_int_Z[2] ( .Q(sba_req_addr_int[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_addr_int_16[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_addr_int_Z[1] ( .Q(sba_req_addr_int[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_addr_int_16[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_addr_int_Z[0] ( .Q(sba_req_addr_int[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_addr_int_16[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_wr_byte_en_int[3] ( .Q(sba_req_wr_byte_en_int_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_wr_byte_en_int_13_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_wr_byte_en_int[2] ( .Q(sba_req_wr_byte_en_int_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_wr_byte_en_int_13_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_wr_byte_en_int[1] ( .Q(sba_req_wr_byte_en_int_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_wr_byte_en_int_13_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_wr_byte_en_int[0] ( .Q(sba_req_wr_byte_en_int_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_wr_byte_en_int_13_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_rd_byte_en_int[3] ( .Q(sba_req_rd_byte_en_int_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_rd_byte_en_int_13_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_rd_byte_en_int[2] ( .Q(sba_req_rd_byte_en_int_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_rd_byte_en_int_13_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_rd_byte_en_int[1] ( .Q(sba_req_rd_byte_en_int_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_rd_byte_en_int_13_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_rd_byte_en_int[0] ( .Q(sba_req_rd_byte_en_int_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_rd_byte_en_int_13_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_addr_int_Z[21] ( .Q(sba_req_addr_int[21]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_addr_int_16[21]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_addr_int_Z[20] ( .Q(sba_req_addr_int[20]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_addr_int_16[20]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_addr_int_Z[19] ( .Q(sba_req_addr_int[19]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_addr_int_16[19]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_addr_int_Z[18] ( .Q(sba_req_addr_int[18]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_addr_int_16[18]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_addr_int_Z[17] ( .Q(sba_req_addr_int[17]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_addr_int_16[17]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_addr_int_Z[16] ( .Q(sba_req_addr_int[16]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_addr_int_16[16]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_addr_int_Z[15] ( .Q(sba_req_addr_int[15]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_addr_int_16[15]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_addr_int_Z[14] ( .Q(sba_req_addr_int[14]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_addr_int_16[14]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_addr_int_Z[13] ( .Q(sba_req_addr_int[13]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_addr_int_16[13]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_addr_int_Z[12] ( .Q(sba_req_addr_int[12]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_addr_int_16[12]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_addr_int_Z[11] ( .Q(sba_req_addr_int[11]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_addr_int_16[11]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_addr_int_Z[10] ( .Q(sba_req_addr_int[10]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_addr_int_16[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_addr_int_Z[9] ( .Q(sba_req_addr_int[9]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_addr_int_16[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_addr_int_Z[8] ( .Q(sba_req_addr_int[8]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_addr_int_16[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_addr_int_Z[7] ( .Q(sba_req_addr_int[7]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_addr_int_16[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbaddr_ff[4] ( .Q(sbaddr_ff_Z[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbaddr_ff_6[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbaddr_ff[3] ( .Q(sbaddr_ff_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbaddr_ff_6[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbaddr_ff[2] ( .Q(sbaddr_ff_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbaddr_ff_6[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbaddr_ff[1] ( .Q(sbaddr_ff_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbaddr_ff_6[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbaddr_ff[0] ( .Q(sbaddr_ff_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbaddr_ff_6_cry_0_0_Y), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_addr_int_Z[31] ( .Q(sba_req_addr_int[31]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_addr_int_16[31]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_addr_int_Z[30] ( .Q(sba_req_addr_int[30]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_addr_int_16[30]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_addr_int_Z[29] ( .Q(sba_req_addr_int[29]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_addr_int_16[29]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_addr_int_Z[28] ( .Q(sba_req_addr_int[28]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_addr_int_16[28]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_addr_int_Z[27] ( .Q(sba_req_addr_int[27]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_addr_int_16[27]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_addr_int_Z[26] ( .Q(sba_req_addr_int[26]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_addr_int_16[26]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_addr_int_Z[25] ( .Q(sba_req_addr_int[25]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_addr_int_16[25]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_addr_int_Z[24] ( .Q(sba_req_addr_int[24]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_addr_int_16[24]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_addr_int_Z[23] ( .Q(sba_req_addr_int[23]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_addr_int_16[23]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_addr_int_Z[22] ( .Q(sba_req_addr_int[22]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_addr_int_16[22]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbaddr_ff[19] ( .Q(sbaddr_ff_Z[19]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbaddr_ff_6[19]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbaddr_ff[18] ( .Q(sbaddr_ff_Z[18]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbaddr_ff_6[18]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbaddr_ff[17] ( .Q(sbaddr_ff_Z[17]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbaddr_ff_6[17]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbaddr_ff[16] ( .Q(sbaddr_ff_Z[16]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbaddr_ff_6[16]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbaddr_ff[15] ( .Q(sbaddr_ff_Z[15]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbaddr_ff_6[15]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbaddr_ff[14] ( .Q(un12lto14), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbaddr_ff_6[14]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbaddr_ff[13] ( .Q(un12lt14), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbaddr_ff_6[13]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbaddr_ff[12] ( .Q(sbaddr_ff_Z[12]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbaddr_ff_6[12]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbaddr_ff[11] ( .Q(sbaddr_ff_Z[11]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbaddr_ff_6[11]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbaddr_ff[10] ( .Q(sbaddr_ff_Z[10]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbaddr_ff_6[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbaddr_ff[9] ( .Q(sbaddr_ff_Z[9]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbaddr_ff_6[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbaddr_ff[8] ( .Q(sbaddr_ff_Z[8]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbaddr_ff_6[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbaddr_ff[7] ( .Q(sbaddr_ff_Z[7]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbaddr_ff_6[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbaddr_ff[6] ( .Q(sbaddr_ff_Z[6]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbaddr_ff_6[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbaddr_ff[5] ( .Q(sbaddr_ff_Z[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbaddr_ff_6[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15548 SLE \prescale_counter[2] ( .Q(prescale_counter_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(prescale_counter_4_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15548 SLE \prescale_counter[1] ( .Q(prescale_counter_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(prescale_counter_4_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15548 SLE \prescale_counter[0] ( .Q(prescale_counter_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(prescale_counter_4_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbaddr_ff[31] ( .Q(sbaddr_ff_Z[31]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbaddr_ff_6[31]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbaddr_ff[30] ( .Q(sbaddr_ff_Z[30]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbaddr_ff_6[30]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbaddr_ff[29] ( .Q(sbaddr_ff_Z[29]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbaddr_ff_6[29]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbaddr_ff[28] ( .Q(sbaddr_ff_Z[28]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbaddr_ff_6[28]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbaddr_ff[27] ( .Q(sbaddr_ff_Z[27]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbaddr_ff_6[27]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbaddr_ff[26] ( .Q(sbaddr_ff_Z[26]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbaddr_ff_6[26]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbaddr_ff[25] ( .Q(sbaddr_ff_Z[25]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbaddr_ff_6[25]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbaddr_ff[24] ( .Q(sbaddr_ff_Z[24]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbaddr_ff_6[24]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbaddr_ff[23] ( .Q(sbaddr_ff_Z[23]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbaddr_ff_6[23]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbaddr_ff[22] ( .Q(sbaddr_ff_Z[22]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbaddr_ff_6[22]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbaddr_ff[21] ( .Q(sbaddr_ff_Z[21]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbaddr_ff_6[21]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbaddr_ff[20] ( .Q(sbaddr_ff_Z[20]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbaddr_ff_6[20]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbdata_ff[13] ( .Q(sbdata_ff_Z[13]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbdata_ff_9[13]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbdata_ff[12] ( .Q(sbdata_ff_Z[12]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbdata_ff_9[12]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbdata_ff[11] ( .Q(sbdata_ff_Z[11]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbdata_ff_9[11]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbdata_ff[10] ( .Q(sbdata_ff_Z[10]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbdata_ff_9[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbdata_ff[9] ( .Q(sbdata_ff_Z[9]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbdata_ff_9[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbdata_ff[8] ( .Q(sbdata_ff_Z[8]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbdata_ff_9[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbdata_ff[7] ( .Q(sbdata_ff_Z[7]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbdata_ff_9[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbdata_ff[6] ( .Q(sbdata_ff_Z[6]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbdata_ff_9[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbdata_ff[5] ( .Q(sbdata_ff_Z[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbdata_ff_9[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbdata_ff[4] ( .Q(sbdata_ff_Z[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbdata_ff_9[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbdata_ff[3] ( .Q(sbdata_ff_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbdata_ff_9[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbdata_ff[2] ( .Q(sbdata_ff_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbdata_ff_9[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbdata_ff[1] ( .Q(sbdata_ff_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbdata_ff_9[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbdata_ff[0] ( .Q(sbdata_ff_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbdata_ff_9[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15548 SLE \prescale_counter[3] ( .Q(prescale_counter_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(prescale_counter_4_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbdata_ff[28] ( .Q(sbdata_ff_Z[28]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbdata_ff_9[28]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbdata_ff[27] ( .Q(sbdata_ff_Z[27]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbdata_ff_9[27]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbdata_ff[26] ( .Q(sbdata_ff_Z[26]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbdata_ff_9[26]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbdata_ff[25] ( .Q(sbdata_ff_Z[25]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbdata_ff_9[25]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbdata_ff[24] ( .Q(sbdata_ff_Z[24]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbdata_ff_9[24]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbdata_ff[23] ( .Q(sbdata_ff_Z[23]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbdata_ff_9[23]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbdata_ff[22] ( .Q(sbdata_ff_Z[22]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbdata_ff_9[22]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbdata_ff[21] ( .Q(sbdata_ff_Z[21]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbdata_ff_9[21]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbdata_ff[20] ( .Q(sbdata_ff_Z[20]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbdata_ff_9[20]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbdata_ff[19] ( .Q(sbdata_ff_Z[19]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbdata_ff_9[19]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbdata_ff[18] ( .Q(sbdata_ff_Z[18]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbdata_ff_9[18]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbdata_ff[17] ( .Q(sbdata_ff_Z[17]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbdata_ff_9[17]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbdata_ff[16] ( .Q(sbdata_ff_Z[16]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbdata_ff_9[16]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbdata_ff[15] ( .Q(sbdata_ff_Z[15]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbdata_ff_9[15]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbdata_ff[14] ( .Q(sbdata_ff_Z[14]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbdata_ff_9[14]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_wr_data_int_Z[11] ( .Q(sba_req_wr_data_int[11]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_wr_data_int_10[11]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_wr_data_int_Z[10] ( .Q(sba_req_wr_data_int[10]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_wr_data_int_10[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_wr_data_int_Z[9] ( .Q(sba_req_wr_data_int[9]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_wr_data_int_10[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_wr_data_int_Z[8] ( .Q(sba_req_wr_data_int[8]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_wr_data_int_10[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_wr_data_int_Z[7] ( .Q(sba_req_wr_data_int[7]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_wr_data_int_10[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_wr_data_int_Z[6] ( .Q(sba_req_wr_data_int[6]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_wr_data_int_10[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_wr_data_int_Z[5] ( .Q(sba_req_wr_data_int[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_wr_data_int_10[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_wr_data_int_Z[4] ( .Q(sba_req_wr_data_int[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_wr_data_int_10[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_wr_data_int_Z[3] ( .Q(sba_req_wr_data_int[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_wr_data_int_10[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_wr_data_int_Z[2] ( .Q(sba_req_wr_data_int[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_wr_data_int_10[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_wr_data_int_Z[1] ( .Q(sba_req_wr_data_int[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_wr_data_int_10[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_wr_data_int_Z[0] ( .Q(sba_req_wr_data_int[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_wr_data_int_10[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbdata_ff[31] ( .Q(sbdata_ff_Z[31]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbdata_ff_9[31]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbdata_ff[30] ( .Q(sbdata_ff_Z[30]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbdata_ff_9[30]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sbdata_ff[29] ( .Q(sbdata_ff_Z[29]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sbdata_ff_9[29]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_wr_data_int_Z[26] ( .Q(sba_req_wr_data_int[26]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_wr_data_int_10[26]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_wr_data_int_Z[25] ( .Q(sba_req_wr_data_int[25]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_wr_data_int_10[25]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_wr_data_int_Z[24] ( .Q(sba_req_wr_data_int[24]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_wr_data_int_10[24]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_wr_data_int_Z[23] ( .Q(sba_req_wr_data_int[23]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_wr_data_int_10[23]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_wr_data_int_Z[22] ( .Q(sba_req_wr_data_int[22]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_wr_data_int_10[22]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_wr_data_int_Z[21] ( .Q(sba_req_wr_data_int[21]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_wr_data_int_10[21]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_wr_data_int_Z[20] ( .Q(sba_req_wr_data_int[20]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_wr_data_int_10[20]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_wr_data_int_Z[19] ( .Q(sba_req_wr_data_int[19]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_wr_data_int_10[19]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_wr_data_int_Z[18] ( .Q(sba_req_wr_data_int[18]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_wr_data_int_10[18]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_wr_data_int_Z[17] ( .Q(sba_req_wr_data_int[17]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_wr_data_int_10[17]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_wr_data_int_Z[16] ( .Q(sba_req_wr_data_int[16]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_wr_data_int_10[16]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_wr_data_int_Z[15] ( .Q(sba_req_wr_data_int[15]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_wr_data_int_10[15]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_wr_data_int_Z[14] ( .Q(sba_req_wr_data_int[14]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_wr_data_int_10[14]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_wr_data_int_Z[13] ( .Q(sba_req_wr_data_int[13]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_wr_data_int_10[13]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_wr_data_int_Z[12] ( .Q(sba_req_wr_data_int[12]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_wr_data_int_10[12]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_wr_data_int_Z[31] ( .Q(sba_req_wr_data_int[31]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_wr_data_int_10[31]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_wr_data_int_Z[30] ( .Q(sba_req_wr_data_int[30]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_wr_data_int_10[30]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_wr_data_int_Z[29] ( .Q(sba_req_wr_data_int[29]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_wr_data_int_10[29]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_wr_data_int_Z[28] ( .Q(sba_req_wr_data_int[28]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_wr_data_int_10[28]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15259 SLE \sba_req_wr_data_int_Z[27] ( .Q(sba_req_wr_data_int[27]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(sba_req_wr_data_int_10[27]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15261 ARI1 sbaddr_ff_6_cry_0_0 ( .FCO(sbaddr_ff_6_cry_0), .S(sbaddr_ff_6_cry_0_0_S), .Y(sbaddr_ff_6_cry_0_0_Y), .B(un1_access_valid_0_a3_Z[0]), .C(N_81_i), .D(GND), .A(N_957), .FCI(GND) ); defparam sbaddr_ff_6_cry_0_0.INIT=20'h54488; // @48:15261 ARI1 sbaddr_ff_6_cry_1_0 ( .FCO(sbaddr_ff_6_cry_1), .S(sbaddr_ff_6[1]), .Y(sbaddr_ff_6_cry_1_0_Y), .B(un1_access_valid_0_a3_Z[1]), .C(N_81_i), .D(GND), .A(N_956), .FCI(sbaddr_ff_6_cry_0) ); defparam sbaddr_ff_6_cry_1_0.INIT=20'h54488; // @48:15261 ARI1 sbaddr_ff_6_cry_2_0 ( .FCO(sbaddr_ff_6_cry_2), .S(sbaddr_ff_6[2]), .Y(sbaddr_ff_6_cry_2_0_Y), .B(un1_access_valid_0_a3_Z[2]), .C(N_81_i), .D(GND), .A(N_868), .FCI(sbaddr_ff_6_cry_1) ); defparam sbaddr_ff_6_cry_2_0.INIT=20'h54488; // @48:15261 ARI1 sbaddr_ff_6_cry_3 ( .FCO(sbaddr_ff_6_cry_3_Z), .S(sbaddr_ff_6[3]), .Y(sbaddr_ff_6_cry_3_Y), .B(dmi_req_data[5]), .C(N_733), .D(N_81_i), .A(sbaddr_ff_Z[3]), .FCI(sbaddr_ff_6_cry_2) ); defparam sbaddr_ff_6_cry_3.INIT=20'h4E020; // @48:15261 ARI1 sbaddr_ff_6_cry_4 ( .FCO(sbaddr_ff_6_cry_4_Z), .S(sbaddr_ff_6[4]), .Y(sbaddr_ff_6_cry_4_Y), .B(dmi_req_data[6]), .C(N_733), .D(N_81_i), .A(sbaddr_ff_Z[4]), .FCI(sbaddr_ff_6_cry_3_Z) ); defparam sbaddr_ff_6_cry_4.INIT=20'h4E020; // @48:15261 ARI1 sbaddr_ff_6_cry_5 ( .FCO(sbaddr_ff_6_cry_5_Z), .S(sbaddr_ff_6[5]), .Y(sbaddr_ff_6_cry_5_Y), .B(dmi_req_data[7]), .C(N_733), .D(N_81_i), .A(sbaddr_ff_Z[5]), .FCI(sbaddr_ff_6_cry_4_Z) ); defparam sbaddr_ff_6_cry_5.INIT=20'h4E020; // @48:15261 ARI1 sbaddr_ff_6_cry_6 ( .FCO(sbaddr_ff_6_cry_6_Z), .S(sbaddr_ff_6[6]), .Y(sbaddr_ff_6_cry_6_Y), .B(dmi_req_data[8]), .C(N_733), .D(N_81_i), .A(sbaddr_ff_Z[6]), .FCI(sbaddr_ff_6_cry_5_Z) ); defparam sbaddr_ff_6_cry_6.INIT=20'h4E020; // @48:15261 ARI1 sbaddr_ff_6_cry_7 ( .FCO(sbaddr_ff_6_cry_7_Z), .S(sbaddr_ff_6[7]), .Y(sbaddr_ff_6_cry_7_Y), .B(dmi_req_data[9]), .C(N_733), .D(N_81_i), .A(sbaddr_ff_Z[7]), .FCI(sbaddr_ff_6_cry_6_Z) ); defparam sbaddr_ff_6_cry_7.INIT=20'h4E020; // @48:15261 ARI1 sbaddr_ff_6_cry_8 ( .FCO(sbaddr_ff_6_cry_8_Z), .S(sbaddr_ff_6[8]), .Y(sbaddr_ff_6_cry_8_Y), .B(dmi_req_data[10]), .C(N_733), .D(N_81_i), .A(sbaddr_ff_Z[8]), .FCI(sbaddr_ff_6_cry_7_Z) ); defparam sbaddr_ff_6_cry_8.INIT=20'h4E020; // @48:15261 ARI1 sbaddr_ff_6_cry_9 ( .FCO(sbaddr_ff_6_cry_9_Z), .S(sbaddr_ff_6[9]), .Y(sbaddr_ff_6_cry_9_Y), .B(dmi_req_data[11]), .C(N_733), .D(N_81_i), .A(sbaddr_ff_Z[9]), .FCI(sbaddr_ff_6_cry_8_Z) ); defparam sbaddr_ff_6_cry_9.INIT=20'h4E020; // @48:15261 ARI1 sbaddr_ff_6_cry_10 ( .FCO(sbaddr_ff_6_cry_10_Z), .S(sbaddr_ff_6[10]), .Y(sbaddr_ff_6_cry_10_Y), .B(dmi_req_data[12]), .C(N_733), .D(N_81_i), .A(sbaddr_ff_Z[10]), .FCI(sbaddr_ff_6_cry_9_Z) ); defparam sbaddr_ff_6_cry_10.INIT=20'h4E020; // @48:15261 ARI1 sbaddr_ff_6_cry_11 ( .FCO(sbaddr_ff_6_cry_11_Z), .S(sbaddr_ff_6[11]), .Y(sbaddr_ff_6_cry_11_Y), .B(dmi_req_data[13]), .C(N_733), .D(N_81_i), .A(sbaddr_ff_Z[11]), .FCI(sbaddr_ff_6_cry_10_Z) ); defparam sbaddr_ff_6_cry_11.INIT=20'h4E020; // @48:15261 ARI1 sbaddr_ff_6_cry_12 ( .FCO(sbaddr_ff_6_cry_12_Z), .S(sbaddr_ff_6[12]), .Y(sbaddr_ff_6_cry_12_Y), .B(dmi_req_data[14]), .C(N_733), .D(N_81_i), .A(sbaddr_ff_Z[12]), .FCI(sbaddr_ff_6_cry_11_Z) ); defparam sbaddr_ff_6_cry_12.INIT=20'h4E020; // @48:15261 ARI1 sbaddr_ff_6_cry_13 ( .FCO(sbaddr_ff_6_cry_13_Z), .S(sbaddr_ff_6[13]), .Y(sbaddr_ff_6_cry_13_Y), .B(dmi_req_data[15]), .C(N_733), .D(N_81_i), .A(un12lt14), .FCI(sbaddr_ff_6_cry_12_Z) ); defparam sbaddr_ff_6_cry_13.INIT=20'h4E020; // @48:15261 ARI1 sbaddr_ff_6_cry_14 ( .FCO(sbaddr_ff_6_cry_14_Z), .S(sbaddr_ff_6[14]), .Y(sbaddr_ff_6_cry_14_Y), .B(dmi_req_data[16]), .C(N_733), .D(N_81_i), .A(un12lto14), .FCI(sbaddr_ff_6_cry_13_Z) ); defparam sbaddr_ff_6_cry_14.INIT=20'h4E020; // @48:15261 ARI1 sbaddr_ff_6_cry_15 ( .FCO(sbaddr_ff_6_cry_15_Z), .S(sbaddr_ff_6[15]), .Y(sbaddr_ff_6_cry_15_Y), .B(dmi_req_data[17]), .C(N_733), .D(N_81_i), .A(sbaddr_ff_Z[15]), .FCI(sbaddr_ff_6_cry_14_Z) ); defparam sbaddr_ff_6_cry_15.INIT=20'h4E020; // @48:15261 ARI1 sbaddr_ff_6_cry_16 ( .FCO(sbaddr_ff_6_cry_16_Z), .S(sbaddr_ff_6[16]), .Y(sbaddr_ff_6_cry_16_Y), .B(dmi_req_data[18]), .C(N_733), .D(N_81_i), .A(sbaddr_ff_Z[16]), .FCI(sbaddr_ff_6_cry_15_Z) ); defparam sbaddr_ff_6_cry_16.INIT=20'h4E020; // @48:15261 ARI1 sbaddr_ff_6_cry_17 ( .FCO(sbaddr_ff_6_cry_17_Z), .S(sbaddr_ff_6[17]), .Y(sbaddr_ff_6_cry_17_Y), .B(dmi_req_data[19]), .C(N_733), .D(N_81_i), .A(sbaddr_ff_Z[17]), .FCI(sbaddr_ff_6_cry_16_Z) ); defparam sbaddr_ff_6_cry_17.INIT=20'h4E020; // @48:15261 ARI1 sbaddr_ff_6_cry_18 ( .FCO(sbaddr_ff_6_cry_18_Z), .S(sbaddr_ff_6[18]), .Y(sbaddr_ff_6_cry_18_Y), .B(dmi_req_data[20]), .C(N_733), .D(N_81_i), .A(sbaddr_ff_Z[18]), .FCI(sbaddr_ff_6_cry_17_Z) ); defparam sbaddr_ff_6_cry_18.INIT=20'h4E020; // @48:15261 ARI1 sbaddr_ff_6_cry_19 ( .FCO(sbaddr_ff_6_cry_19_Z), .S(sbaddr_ff_6[19]), .Y(sbaddr_ff_6_cry_19_Y), .B(dmi_req_data[21]), .C(N_733), .D(N_81_i), .A(sbaddr_ff_Z[19]), .FCI(sbaddr_ff_6_cry_18_Z) ); defparam sbaddr_ff_6_cry_19.INIT=20'h4E020; // @48:15261 ARI1 sbaddr_ff_6_cry_20 ( .FCO(sbaddr_ff_6_cry_20_Z), .S(sbaddr_ff_6[20]), .Y(sbaddr_ff_6_cry_20_Y), .B(dmi_req_data[22]), .C(N_733), .D(N_81_i), .A(sbaddr_ff_Z[20]), .FCI(sbaddr_ff_6_cry_19_Z) ); defparam sbaddr_ff_6_cry_20.INIT=20'h4E020; // @48:15261 ARI1 sbaddr_ff_6_cry_21 ( .FCO(sbaddr_ff_6_cry_21_Z), .S(sbaddr_ff_6[21]), .Y(sbaddr_ff_6_cry_21_Y), .B(dmi_req_data[23]), .C(N_733), .D(N_81_i), .A(sbaddr_ff_Z[21]), .FCI(sbaddr_ff_6_cry_20_Z) ); defparam sbaddr_ff_6_cry_21.INIT=20'h4E020; // @48:15261 ARI1 sbaddr_ff_6_cry_22 ( .FCO(sbaddr_ff_6_cry_22_Z), .S(sbaddr_ff_6[22]), .Y(sbaddr_ff_6_cry_22_Y), .B(dmi_req_data[24]), .C(N_733), .D(N_81_i), .A(sbaddr_ff_Z[22]), .FCI(sbaddr_ff_6_cry_21_Z) ); defparam sbaddr_ff_6_cry_22.INIT=20'h4E020; // @48:15261 ARI1 sbaddr_ff_6_cry_23 ( .FCO(sbaddr_ff_6_cry_23_Z), .S(sbaddr_ff_6[23]), .Y(sbaddr_ff_6_cry_23_Y), .B(dmi_req_data[25]), .C(N_733), .D(N_81_i), .A(sbaddr_ff_Z[23]), .FCI(sbaddr_ff_6_cry_22_Z) ); defparam sbaddr_ff_6_cry_23.INIT=20'h4E020; // @48:15261 ARI1 sbaddr_ff_6_cry_24 ( .FCO(sbaddr_ff_6_cry_24_Z), .S(sbaddr_ff_6[24]), .Y(sbaddr_ff_6_cry_24_Y), .B(dmi_req_data[26]), .C(N_733), .D(N_81_i), .A(sbaddr_ff_Z[24]), .FCI(sbaddr_ff_6_cry_23_Z) ); defparam sbaddr_ff_6_cry_24.INIT=20'h4E020; // @48:15261 ARI1 sbaddr_ff_6_cry_25 ( .FCO(sbaddr_ff_6_cry_25_Z), .S(sbaddr_ff_6[25]), .Y(sbaddr_ff_6_cry_25_Y), .B(dmi_req_data[27]), .C(N_733), .D(N_81_i), .A(sbaddr_ff_Z[25]), .FCI(sbaddr_ff_6_cry_24_Z) ); defparam sbaddr_ff_6_cry_25.INIT=20'h4E020; // @48:15261 ARI1 sbaddr_ff_6_cry_26 ( .FCO(sbaddr_ff_6_cry_26_Z), .S(sbaddr_ff_6[26]), .Y(sbaddr_ff_6_cry_26_Y), .B(dmi_req_data[28]), .C(N_733), .D(N_81_i), .A(sbaddr_ff_Z[26]), .FCI(sbaddr_ff_6_cry_25_Z) ); defparam sbaddr_ff_6_cry_26.INIT=20'h4E020; // @48:15261 ARI1 sbaddr_ff_6_cry_27 ( .FCO(sbaddr_ff_6_cry_27_Z), .S(sbaddr_ff_6[27]), .Y(sbaddr_ff_6_cry_27_Y), .B(dmi_req_data[29]), .C(N_733), .D(N_81_i), .A(sbaddr_ff_Z[27]), .FCI(sbaddr_ff_6_cry_26_Z) ); defparam sbaddr_ff_6_cry_27.INIT=20'h4E020; // @48:15261 ARI1 sbaddr_ff_6_cry_28 ( .FCO(sbaddr_ff_6_cry_28_Z), .S(sbaddr_ff_6[28]), .Y(sbaddr_ff_6_cry_28_Y), .B(dmi_req_data[30]), .C(N_733), .D(N_81_i), .A(sbaddr_ff_Z[28]), .FCI(sbaddr_ff_6_cry_27_Z) ); defparam sbaddr_ff_6_cry_28.INIT=20'h4E020; // @48:15261 ARI1 sbaddr_ff_6_cry_29 ( .FCO(sbaddr_ff_6_cry_29_Z), .S(sbaddr_ff_6[29]), .Y(sbaddr_ff_6_cry_29_Y), .B(dmi_req_data[31]), .C(N_733), .D(N_81_i), .A(sbaddr_ff_Z[29]), .FCI(sbaddr_ff_6_cry_28_Z) ); defparam sbaddr_ff_6_cry_29.INIT=20'h4E020; // @48:15261 ARI1 sbaddr_ff_6_s_31 ( .FCO(sbaddr_ff_6_s_31_FCO), .S(sbaddr_ff_6[31]), .Y(sbaddr_ff_6_s_31_Y), .B(dmi_req_data[33]), .C(N_733), .D(N_81_i), .A(sbaddr_ff_Z[31]), .FCI(sbaddr_ff_6_cry_30_Z) ); defparam sbaddr_ff_6_s_31.INIT=20'h4E020; // @48:15261 ARI1 sbaddr_ff_6_cry_30 ( .FCO(sbaddr_ff_6_cry_30_Z), .S(sbaddr_ff_6[30]), .Y(sbaddr_ff_6_cry_30_Y), .B(dmi_req_data[32]), .C(N_733), .D(N_81_i), .A(sbaddr_ff_Z[30]), .FCI(sbaddr_ff_6_cry_29_Z) ); defparam sbaddr_ff_6_cry_30.INIT=20'h4E020; // @48:15548 ARI1 counter_s_4132 ( .FCO(counter_s_4132_FCO), .S(counter_s_4132_S), .Y(counter_s_4132_Y), .B(counter_Z[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam counter_s_4132.INIT=20'h4AA00; // @48:15548 ARI1 \counter_cry[1] ( .FCO(counter_cry_Z[1]), .S(counter_s[1]), .Y(counter_cry_Y[1]), .B(counter_Z[1]), .C(GND), .D(GND), .A(VCC), .FCI(counter_s_4132_FCO) ); defparam \counter_cry[1] .INIT=20'h4AA00; // @48:15548 ARI1 \counter_cry[2] ( .FCO(counter_cry_Z[2]), .S(counter_s[2]), .Y(counter_cry_Y[2]), .B(counter_Z[2]), .C(GND), .D(GND), .A(VCC), .FCI(counter_cry_Z[1]) ); defparam \counter_cry[2] .INIT=20'h4AA00; // @48:15548 ARI1 \counter_cry[3] ( .FCO(counter_cry_Z[3]), .S(counter_s[3]), .Y(counter_cry_Y[3]), .B(counter_Z[3]), .C(GND), .D(GND), .A(VCC), .FCI(counter_cry_Z[2]) ); defparam \counter_cry[3] .INIT=20'h4AA00; // @48:15548 ARI1 \counter_cry[4] ( .FCO(counter_cry_Z[4]), .S(counter_s[4]), .Y(counter_cry_Y[4]), .B(counter_Z[4]), .C(GND), .D(GND), .A(VCC), .FCI(counter_cry_Z[3]) ); defparam \counter_cry[4] .INIT=20'h4AA00; // @48:15548 ARI1 \counter_cry[5] ( .FCO(counter_cry_Z[5]), .S(counter_s[5]), .Y(counter_cry_Y[5]), .B(counter_Z[5]), .C(GND), .D(GND), .A(VCC), .FCI(counter_cry_Z[4]) ); defparam \counter_cry[5] .INIT=20'h4AA00; // @48:15548 ARI1 \counter_s[7] ( .FCO(counter_s_FCO[7]), .S(counter_s_Z[7]), .Y(counter_s_Y[7]), .B(counter_Z[7]), .C(GND), .D(GND), .A(VCC), .FCI(counter_cry_Z[6]) ); defparam \counter_s[7] .INIT=20'h4AA00; // @48:15548 ARI1 \counter_cry[6] ( .FCO(counter_cry_Z[6]), .S(counter_s[6]), .Y(counter_cry_Y[6]), .B(counter_Z[6]), .C(GND), .D(GND), .A(VCC), .FCI(counter_cry_Z[5]) ); defparam \counter_cry[6] .INIT=20'h4AA00; // @48:14495 CFG4 un1_clk_en_dm_1_i ( .A(cpu_debug_gpr_rd_en_net), .B(cpu_debug_csr_rd_en_net), .C(cpu_debug_active_net), .D(N_1567), .Y(N_53) ); defparam un1_clk_en_dm_1_i.INIT=16'hFFEF; // @48:15261 CFG4 \sba_req_wr_byte_en_int_13[1] ( .A(sba_req_wr_byte_en_int_13_sm0), .B(un1_sbcs_readonaddr_ff7_4_sn), .C(sba_req_wr_byte_en_int_13_m2_2_Z[1]), .D(N_1400), .Y(sba_req_wr_byte_en_int_13_Z[1]) ); defparam \sba_req_wr_byte_en_int_13[1] .INIT=16'h3031; // @48:15261 CFG4 \sba_req_wr_byte_en_int_13[0] ( .A(sba_req_wr_byte_en_int_13_sm0), .B(un1_sbcs_readonaddr_ff7_4_sn), .C(sba_req_wr_byte_en_int_13_m2_2_Z[0]), .D(N_1400), .Y(sba_req_wr_byte_en_int_13_Z[0]) ); defparam \sba_req_wr_byte_en_int_13[0] .INIT=16'h3031; // @48:14023 CFG4 \dmi_rdata_0_iv_0_0[11] ( .A(data_0_reg[11]), .B(dmstatus_allany_halted), .C(N_1552), .D(N_1741), .Y(dmi_rdata_0_iv_0_0_Z[11]) ); defparam \dmi_rdata_0_iv_0_0[11] .INIT=16'hB3A0; // @48:14023 CFG4 \dmi_rdata_0_iv_0_2[10] ( .A(dmstatus_allany_halted), .B(N_1741), .C(dmi_rdata_0_iv_0_0_Z[10]), .D(N_1617), .Y(dmi_rdata_0_iv_0_2_Z[10]) ); defparam \dmi_rdata_0_iv_0_2[10] .INIT=16'hFFF4; // @48:14495 CFG3 un1_clk_en_dm_1_i_1 ( .A(cpu_debug_active_net), .B(N_1567), .C(cpu_debug_csr_rd_en_net), .Y(N_53_1) ); defparam un1_clk_en_dm_1_i_1.INIT=8'hFD; // @48:15129 CFG4 sba_rd_req_cmb_1_sqmuxa_1_0_a3 ( .A(sbcs_busyerror_1_sqmuxa_1), .B(N_733), .C(mem_rd), .D(sba_rd_req_cmb_1_sqmuxa_1_0_a3_1_Z), .Y(sba_rd_req_cmb_1_sqmuxa_1) ); defparam sba_rd_req_cmb_1_sqmuxa_1_0_a3.INIT=16'h1300; // @48:15070 CFG4 sba_rd_req_cmb_f0_RNO_0 ( .A(sbcs_busyerror_1_sqmuxa_1), .B(N_733), .C(mem_rd), .D(sba_rd_req_cmb_1_sqmuxa_1_0_a3_1_Z), .Y(N_28_i) ); defparam sba_rd_req_cmb_f0_RNO_0.INIT=16'h2033; // @48:14337 CFG4 dmcontrol_dmactive4_0_a3_RNI68VTE ( .A(N_81_i), .B(cpu_debug_active_net), .C(dmcontrol_dmactive4), .D(un1_dmi_req_command_i), .Y(un1_dmcontrol_ndmreset13_i) ); defparam dmcontrol_dmactive4_0_a3_RNI68VTE.INIT=16'hFE54; // @48:14383 CFG4 \abs_busy_cmb_mux.abstractcs_busy_cmb7_0_a3 ( .A(abstractcs_cmderr[0]), .B(abstractcs_cmderr[1]), .C(abstractcs_cmderr[2]), .D(un1_dmi_req_command_i), .Y(abstractcs_busy_cmb7) ); defparam \abs_busy_cmb_mux.abstractcs_busy_cmb7_0_a3 .INIT=16'h0100; // @48:15366 CFG4 sba_resp_ready_int_0_sqmuxa_1_i_0_o3_0 ( .A(sbcs_access[0]), .B(N_867), .C(sbcs_access[2]), .D(sbcs_access[1]), .Y(N_94) ); defparam sba_resp_ready_int_0_sqmuxa_1_i_0_o3_0.INIT=16'hFEFC; // @48:15261 CFG3 sba_req_wr_byte_en_int_13_ss0_0_a2 ( .A(sba_req_wr_byte_en_int_13_ss0_0_a2cf0_1_Z), .B(sba_req_addr_int26_Z), .C(N_685_i), .Y(N_1832) ); defparam sba_req_wr_byte_en_int_13_ss0_0_a2.INIT=8'h04; // @48:15261 CFG4 sba_req_wr_byte_en_int_13_ss0_0_a2cf0_1 ( .A(sbcs_access[0]), .B(N_81_i), .C(N_1541), .D(N_957), .Y(sba_req_wr_byte_en_int_13_ss0_0_a2cf0_1_Z) ); defparam sba_req_wr_byte_en_int_13_ss0_0_a2cf0_1.INIT=16'hFF7F; // @48:15261 CFG4 sba_req_wr_data_int_10_0_iv_0_N_4L7 ( .A(N_99), .B(N_1551), .C(N_820), .D(sbcs_access[0]), .Y(sba_req_wr_data_int_10_0_iv_0_N_4L7_Z) ); defparam sba_req_wr_data_int_10_0_iv_0_N_4L7.INIT=16'hFFBF; // @48:15261 CFG4 sba_req_wr_data_int_10_0_iv_0_N_5L9 ( .A(N_1563), .B(N_1562), .C(sba_req_wr_data_int[31]), .D(N_934), .Y(sba_req_wr_data_int_10_0_iv_0_N_5L9_Z) ); defparam sba_req_wr_data_int_10_0_iv_0_N_5L9.INIT=16'h135F; // @48:15261 CFG4 \sba_req_wr_data_int_10_0_iv_0[31] ( .A(sba_req_wr_data_int_10_0_iv_0_N_4L7_Z), .B(N_825), .C(N_1400), .D(sba_req_wr_data_int_10_0_iv_0_N_5L9_Z), .Y(sba_req_wr_data_int_10[31]) ); defparam \sba_req_wr_data_int_10_0_iv_0[31] .INIT=16'hD5FF; // @48:15482 CFG4 sba_req_addr_int_0_sqmuxa_0 ( .A(timeout_Z), .B(sba_req_valid_int35_0_Z), .C(sba_resp_ready_int21_Z), .D(sba_req_addr_int_0_sqmuxa_0_1_0_Z), .Y(sba_req_addr_int_0_sqmuxa) ); defparam sba_req_addr_int_0_sqmuxa_0.INIT=16'h0A02; // @48:15482 CFG4 sba_req_addr_int_0_sqmuxa_0_1_0 ( .A(un1_cpu_d_req_ready_sig_c), .B(un1_cpu_d_req_ready_sig_d_0), .C(cpu_N_14_mux), .D(req_masked_0), .Y(sba_req_addr_int_0_sqmuxa_0_1_0_Z) ); defparam sba_req_addr_int_0_sqmuxa_0_1_0.INIT=16'h5010; // @48:15222 CFG4 next_state21_1 ( .A(next_state7), .B(un1_cpu_d_req_ready_sig_d_0), .C(next_state21_1_1_Z), .D(next_state21_a1_Z), .Y(next_state21) ); defparam next_state21_1.INIT=16'h00A8; // @48:15222 CFG4 next_state21_1_1 ( .A(cpu_N_6), .B(cpu_m8_0_a3_0_2), .C(cpu_i_req_is_tcm0_5), .D(cpu_m8_0_a3_0_3), .Y(next_state21_1_1_Z) ); defparam next_state21_1_1.INIT=16'h1555; // @48:15261 CFG4 \sbdata_ff_9_iv_0[2] ( .A(cpu_d_resp_rd_data_net[18]), .B(N_1661), .C(sbdata_ff_9_iv_0_0_Z[2]), .D(sbdata_ff_9_iv_0_1_0_Z[2]), .Y(sbdata_ff_9[2]) ); defparam \sbdata_ff_9_iv_0[2] .INIT=16'hF8FF; // @48:15261 CFG4 \sbdata_ff_9_iv_0_1_0[2] ( .A(cpu_d_resp_rd_data_net[26]), .B(cpu_d_resp_rd_data_net[10]), .C(N_1655), .D(N_1660), .Y(sbdata_ff_9_iv_0_1_0_Z[2]) ); defparam \sbdata_ff_9_iv_0_1_0[2] .INIT=16'h153F; // @48:15261 CFG4 \sbdata_ff_9_iv_0[1] ( .A(cpu_d_resp_rd_data_net[17]), .B(N_1661), .C(sbdata_ff_9_iv_0_0_Z[1]), .D(sbdata_ff_9_iv_0_1_0_Z[1]), .Y(sbdata_ff_9[1]) ); defparam \sbdata_ff_9_iv_0[1] .INIT=16'hF8FF; // @48:15261 CFG4 \sbdata_ff_9_iv_0_1_0[1] ( .A(cpu_d_resp_rd_data_net[25]), .B(cpu_d_resp_rd_data_net[9]), .C(N_1655), .D(N_1660), .Y(sbdata_ff_9_iv_0_1_0_Z[1]) ); defparam \sbdata_ff_9_iv_0_1_0[1] .INIT=16'h153F; // @48:15261 CFG4 \sbdata_ff_9_iv_0[0] ( .A(cpu_d_resp_rd_data_net[16]), .B(N_1661), .C(sbdata_ff_9_iv_0_0_Z[0]), .D(sbdata_ff_9_iv_0_1_0_Z[0]), .Y(sbdata_ff_9[0]) ); defparam \sbdata_ff_9_iv_0[0] .INIT=16'hF8FF; // @48:15261 CFG4 \sbdata_ff_9_iv_0_1_0[0] ( .A(cpu_d_resp_rd_data_net[24]), .B(cpu_d_resp_rd_data_net[8]), .C(N_1655), .D(N_1660), .Y(sbdata_ff_9_iv_0_1_0_Z[0]) ); defparam \sbdata_ff_9_iv_0_1_0[0] .INIT=16'h153F; // @48:15261 CFG4 \sbdata_ff_9_iv_0[5] ( .A(cpu_d_resp_rd_data_net[29]), .B(N_1660), .C(sbdata_ff_9_iv_0_0_Z[5]), .D(sbdata_ff_9_iv_0_1_0_Z[5]), .Y(sbdata_ff_9[5]) ); defparam \sbdata_ff_9_iv_0[5] .INIT=16'hF8FF; // @48:15261 CFG4 \sbdata_ff_9_iv_0_1_0[5] ( .A(cpu_d_resp_rd_data_net[21]), .B(cpu_d_resp_rd_data_net[13]), .C(N_1655), .D(N_1661), .Y(sbdata_ff_9_iv_0_1_0_Z[5]) ); defparam \sbdata_ff_9_iv_0_1_0[5] .INIT=16'h153F; // @48:15261 CFG4 \sbdata_ff_9_iv_0[4] ( .A(cpu_d_resp_rd_data_net[20]), .B(N_1661), .C(sbdata_ff_9_iv_0_0_Z[4]), .D(sbdata_ff_9_iv_0_1_0_Z[4]), .Y(sbdata_ff_9[4]) ); defparam \sbdata_ff_9_iv_0[4] .INIT=16'hF8FF; // @48:15261 CFG4 \sbdata_ff_9_iv_0_1_0[4] ( .A(cpu_d_resp_rd_data_net[28]), .B(cpu_d_resp_rd_data_net[12]), .C(N_1655), .D(N_1660), .Y(sbdata_ff_9_iv_0_1_0_Z[4]) ); defparam \sbdata_ff_9_iv_0_1_0[4] .INIT=16'h153F; // @48:15261 CFG4 \sbdata_ff_9_iv_0[3] ( .A(cpu_d_resp_rd_data_net[27]), .B(N_1660), .C(sbdata_ff_9_iv_0_0_Z[3]), .D(sbdata_ff_9_iv_0_1_0_Z[3]), .Y(sbdata_ff_9[3]) ); defparam \sbdata_ff_9_iv_0[3] .INIT=16'hF8FF; // @48:15261 CFG4 \sbdata_ff_9_iv_0_1_0[3] ( .A(cpu_d_resp_rd_data_net[19]), .B(cpu_d_resp_rd_data_net[11]), .C(N_1655), .D(N_1661), .Y(sbdata_ff_9_iv_0_1_0_Z[3]) ); defparam \sbdata_ff_9_iv_0_1_0[3] .INIT=16'h153F; // @48:15261 CFG4 \sbdata_ff_9_iv_0[7] ( .A(cpu_d_resp_rd_data_net[31]), .B(N_1660), .C(sbdata_ff_9_iv_0_0_Z[7]), .D(sbdata_ff_9_iv_0_1_0_Z[7]), .Y(sbdata_ff_9[7]) ); defparam \sbdata_ff_9_iv_0[7] .INIT=16'hF8FF; // @48:15261 CFG4 \sbdata_ff_9_iv_0_1_0[7] ( .A(cpu_d_resp_rd_data_net[23]), .B(cpu_d_resp_rd_data_net[15]), .C(N_1655), .D(N_1661), .Y(sbdata_ff_9_iv_0_1_0_Z[7]) ); defparam \sbdata_ff_9_iv_0_1_0[7] .INIT=16'h153F; // @48:15261 CFG4 \sbdata_ff_9_iv_0[6] ( .A(cpu_d_resp_rd_data_net[22]), .B(N_1661), .C(sbdata_ff_9_iv_0_0_Z[6]), .D(sbdata_ff_9_iv_0_1_0_Z[6]), .Y(sbdata_ff_9[6]) ); defparam \sbdata_ff_9_iv_0[6] .INIT=16'hF8FF; // @48:15261 CFG4 \sbdata_ff_9_iv_0_1_0[6] ( .A(cpu_d_resp_rd_data_net[30]), .B(cpu_d_resp_rd_data_net[14]), .C(N_1655), .D(N_1660), .Y(sbdata_ff_9_iv_0_1_0_Z[6]) ); defparam \sbdata_ff_9_iv_0_1_0[6] .INIT=16'h153F; // @48:14398 CFG4 cmderr_cmb_0_sqmuxa_2_i_a3_3 ( .A(N_806), .B(cmderr_cmb_0_sqmuxa_2_i_a3_3_1_Z), .C(cmderr_cmb_0_sqmuxa_2_i_a3_0_Z), .D(cmderr_cmb_0_sqmuxa_2_i_a2_0_0_2_Z), .Y(cmderr_cmb_0_sqmuxa_2_i_a3_3_Z) ); defparam cmderr_cmb_0_sqmuxa_2_i_a3_3.INIT=16'h4050; // @48:14398 CFG4 cmderr_cmb_0_sqmuxa_2_i_a3_3_1 ( .A(N_1669), .B(N_805), .C(N_1743), .D(un1_dmi_req_command_i), .Y(cmderr_cmb_0_sqmuxa_2_i_a3_3_1_Z) ); defparam cmderr_cmb_0_sqmuxa_2_i_a3_3_1.INIT=16'h373F; // @48:15261 CFG3 \sba_req_rd_byte_en_int_13[3] ( .A(sba_req_rd_byte_en_int_13_m2_1_Z[2]), .B(un1_sbcs_readonaddr_ff7_5_Z), .C(sba_req_rd_byte_en_int_13_1_Z[3]), .Y(sba_req_rd_byte_en_int_13_Z[3]) ); defparam \sba_req_rd_byte_en_int_13[3] .INIT=8'h23; // @48:15261 CFG4 \sba_req_rd_byte_en_int_13_1[3] ( .A(N_1518), .B(N_1559), .C(debug_sysbus_req_rd_byte_en_net[3]), .D(N_99), .Y(sba_req_rd_byte_en_int_13_1_Z[3]) ); defparam \sba_req_rd_byte_en_int_13_1[3] .INIT=16'h3F1D; // @48:15261 CFG3 \sba_req_rd_byte_en_int_13[2] ( .A(sba_req_rd_byte_en_int_13_m2_1_Z[2]), .B(un1_sbcs_readonaddr_ff7_5_Z), .C(sba_req_rd_byte_en_int_13_1_Z[2]), .Y(sba_req_rd_byte_en_int_13_Z[2]) ); defparam \sba_req_rd_byte_en_int_13[2] .INIT=8'h23; // @48:15261 CFG4 \sba_req_rd_byte_en_int_13_1[2] ( .A(N_1518), .B(N_1559), .C(debug_sysbus_req_rd_byte_en_net[2]), .D(N_111), .Y(sba_req_rd_byte_en_int_13_1_Z[2]) ); defparam \sba_req_rd_byte_en_int_13_1[2] .INIT=16'h1D3F; // @48:15261 CFG3 \sba_req_rd_byte_en_int_13[1] ( .A(sba_req_rd_byte_en_int_13_m2_1_Z[0]), .B(un1_sbcs_readonaddr_ff7_5_Z), .C(sba_req_rd_byte_en_int_13_1_Z[1]), .Y(sba_req_rd_byte_en_int_13_Z[1]) ); defparam \sba_req_rd_byte_en_int_13[1] .INIT=8'h23; // @48:15261 CFG4 \sba_req_rd_byte_en_int_13_1[1] ( .A(N_1518), .B(N_1559), .C(debug_sysbus_req_rd_byte_en_net[1]), .D(N_107), .Y(sba_req_rd_byte_en_int_13_1_Z[1]) ); defparam \sba_req_rd_byte_en_int_13_1[1] .INIT=16'h1D3F; // @48:15261 CFG3 \sba_req_rd_byte_en_int_13[0] ( .A(sba_req_rd_byte_en_int_13_m2_1_Z[0]), .B(un1_sbcs_readonaddr_ff7_5_Z), .C(sba_req_rd_byte_en_int_13_1_Z[0]), .Y(sba_req_rd_byte_en_int_13_Z[0]) ); defparam \sba_req_rd_byte_en_int_13[0] .INIT=8'h23; // @48:15261 CFG4 \sba_req_rd_byte_en_int_13_1[0] ( .A(N_1518), .B(N_1559), .C(debug_sysbus_req_rd_byte_en_net[0]), .D(N_1823), .Y(sba_req_rd_byte_en_int_13_1_Z[0]) ); defparam \sba_req_rd_byte_en_int_13_1[0] .INIT=16'h1D3F; // @48:13641 CFG4 un1_dmi_req_command_0_a3_RNI1UT441 ( .A(N_1625), .B(N_1624), .C(N_806), .D(trace_priv_i), .Y(N_78_i) ); defparam un1_dmi_req_command_0_a3_RNI1UT441.INIT=16'hE000; // @48:15261 CFG2 \sba_req_wr_data_int_10_1_iv_0_a2_1[7] ( .A(N_1589), .B(N_867), .Y(N_1544) ); defparam \sba_req_wr_data_int_10_1_iv_0_a2_1[7] .INIT=4'h2; // @48:15261 CFG3 \sba_req_wr_data_int_10_0_iv_0_a2[24] ( .A(sbcs_access[1]), .B(N_94), .C(N_1542), .Y(N_1562) ); defparam \sba_req_wr_data_int_10_0_iv_0_a2[24] .INIT=8'h20; // @48:15351 CFG2 un1_sbcs_busy_ff13_3_2_RNO_0 ( .A(N_115), .B(sbcs_busy_ff15_0_a3_0_Z), .Y(un1_m3_e_1) ); defparam un1_sbcs_busy_ff13_3_2_RNO_0.INIT=4'h4; // @48:15261 CFG3 \sba_req_wr_byte_en_int_13_m2_1[2] ( .A(sba_req_wr_byte_en_int_13_sm0), .B(N_956), .C(N_1832), .Y(sba_req_wr_byte_en_int_13_m2_1_Z[2]) ); defparam \sba_req_wr_byte_en_int_13_m2_1[2] .INIT=8'h45; // @48:13641 CFG2 debug_csr_rd_data_ready_3_0_RNICPD96 ( .A(gpr_rs2_rd_data_valid_sig), .B(N_59_tz), .Y(N_75_i) ); defparam debug_csr_rd_data_ready_3_0_RNICPD96.INIT=4'h8; // @48:15070 CFG2 sba_rd_req_cmb_f1_0 ( .A(N_26_i), .B(sba_rd_req_ff_Z), .Y(sba_rd_req_cmb_f1_0_Z) ); defparam sba_rd_req_cmb_f1_0.INIT=4'hE; // @48:14495 CFG2 debug_gpr_addr_1_sqmuxa_0_268_a2_0_a2_0_0_0 ( .A(command_reg[14]), .B(command_reg[15]), .Y(debug_gpr_addr_1_sqmuxa_0_268_a2_0_a2_0_0) ); defparam debug_gpr_addr_1_sqmuxa_0_268_a2_0_a2_0_0_0.INIT=4'h1; // @48:14023 CFG2 \dmi_rdata_0_iv_0_a3_3_1[0] ( .A(dmi_req_data[35]), .B(dmi_req_data[40]), .Y(dmi_rdata_0_iv_0_a3_3_1_Z[0]) ); defparam \dmi_rdata_0_iv_0_a3_3_1[0] .INIT=4'h4; // @48:15559 CFG2 prescale_counter6_3 ( .A(counter_Z[2]), .B(counter_Z[3]), .Y(prescale_counter6_3_Z) ); defparam prescale_counter6_3.INIT=4'h8; // @48:14736 CFG2 \debug_state_ns_0_a3_1_0[1] ( .A(cpu_debug_halt_req_net), .B(debug_state[1]), .Y(debug_state_ns_0_a3_1_0_Z[1]) ); defparam \debug_state_ns_0_a3_1_0[1] .INIT=4'h4; // @48:15261 CFG2 \sba_req_addr_int_16_iv_0_a2[31] ( .A(sba_req_valid_int_0_sqmuxa_Z), .B(N_81_i), .Y(N_1553) ); defparam \sba_req_addr_int_16_iv_0_a2[31] .INIT=4'h8; // @48:14180 CFG2 dmstatus_allany_havereset10_0_a3 ( .A(debug_state[0]), .B(havereset_skip_pwrup), .Y(dmstatus_allany_havereset10) ); defparam dmstatus_allany_havereset10_0_a3.INIT=4'h2; // @48:15016 CFG2 sba_req_addr_1_0_a2_0 ( .A(sba_state_Z[0]), .B(sba_state_Z[1]), .Y(N_127) ); defparam sba_req_addr_1_0_a2_0.INIT=4'h4; // @48:15129 CFG2 sbcs_ba_err_0_sqmuxa_2 ( .A(un16_dmi_valid_i), .B(mem_wr), .Y(sbcs_ba_err_0_sqmuxa_2_Z) ); defparam sbcs_ba_err_0_sqmuxa_2.INIT=4'h8; // @48:15070 CFG2 un1_sba_rd_req_cmb_1 ( .A(sba_rd_req_cmb), .B(sba_wr_req_cmb), .Y(un1_sba_rd_req_cmb_1_Z) ); defparam un1_sba_rd_req_cmb_1.INIT=4'hE; // @48:15070 CFG2 sba_req_addr_int26 ( .A(sba_rd_req_cmb), .B(sba_wr_req_cmb), .Y(sba_req_addr_int26_Z) ); defparam sba_req_addr_int26.INIT=4'h4; // @48:15366 CFG2 sba_resp_ready_int_1_sqmuxa_i_o3 ( .A(next_state7), .B(sba_state_Z[0]), .Y(N_100) ); defparam sba_resp_ready_int_1_sqmuxa_i_o3.INIT=4'hD; // @48:14495 CFG2 debug_gpr_addr_1_sqmuxa_0_268_a2_0_o2 ( .A(command_reg_state[3]), .B(command_reg_state[4]), .Y(N_806) ); defparam debug_gpr_addr_1_sqmuxa_0_268_a2_0_o2.INIT=4'hE; // @48:14934 CFG2 un19_sba_req_rd_byte_en_int_0_a3_0_a3 ( .A(N_956), .B(N_957), .Y(N_111) ); defparam un19_sba_req_rd_byte_en_int_0_a3_0_a3.INIT=4'h2; // @48:14934 CFG2 un12_sba_req_rd_byte_en_int_0_a3_0_a3 ( .A(N_956), .B(N_957), .Y(N_107) ); defparam un12_sba_req_rd_byte_en_int_0_a3_0_a3.INIT=4'h4; // @48:15261 CFG2 \sbdata_ff_9_iv_0_o2_0[2] ( .A(N_957), .B(sbcs_access[0]), .Y(N_743) ); defparam \sbdata_ff_9_iv_0_o2_0[2] .INIT=4'hD; // @48:14495 CFG2 un1_clk_en_dm_1_i_o3 ( .A(cpu_debug_active_net), .B(cpu_debug_csr_rd_en_net), .Y(N_813) ); defparam un1_clk_en_dm_1_i_o3.INIT=4'hD; // @48:15261 CFG2 sbcs_busyerror_ff_3_f0_i_o2 ( .A(sbcs_busyerror_1_sqmuxa_1), .B(mem_rd), .Y(N_835) ); defparam sbcs_busyerror_ff_3_f0_i_o2.INIT=4'h7; // @48:14398 CFG2 un1_next_state_0_sqmuxa_3_0_a3_0 ( .A(N_369_i), .B(command_reg_state[4]), .Y(next_state_1_sqmuxa_3) ); defparam un1_next_state_0_sqmuxa_3_0_a3_0.INIT=4'h4; // @48:14444 CFG2 next_state_0_sqmuxa_i ( .A(command_reg_state[2]), .B(abs_cmd_transfer_ff), .Y(N_101) ); defparam next_state_0_sqmuxa_i.INIT=4'h7; // @48:14339 CFG2 \command_reg_state_4_i_o3[3] ( .A(command_reg_state[2]), .B(command_reg_state[5]), .Y(N_911) ); defparam \command_reg_state_4_i_o3[3] .INIT=4'hE; // @48:14339 CFG2 \command_reg_state_4_i_o2[3] ( .A(trace_priv_i), .B(command_reg_state[3]), .Y(N_847) ); defparam \command_reg_state_4_i_o2[3] .INIT=4'hB; // @48:15261 CFG2 \sbdata_ff_9_iv_0_a2_6[2] ( .A(N_956), .B(N_957), .Y(N_1823) ); defparam \sbdata_ff_9_iv_0_a2_6[2] .INIT=4'h1; // @48:15261 CFG2 sba_req_rd_byte_en_int_13_ss0_0_a2 ( .A(un1_sbcs_busy_ff13_3_i), .B(N_81_i), .Y(N_1559) ); defparam sba_req_rd_byte_en_int_13_ss0_0_a2.INIT=4'h8; // @48:14934 CFG2 un26_sba_req_rd_byte_en_int_i_o3 ( .A(N_956), .B(N_957), .Y(N_99) ); defparam un26_sba_req_rd_byte_en_int_i_o3.INIT=4'h7; // @48:15261 CFG2 \un1_access_valid_0_a2[1] ( .A(sbcs_access[1]), .B(sbcs_access[2]), .Y(N_1541) ); defparam \un1_access_valid_0_a2[1] .INIT=4'h1; // @48:15129 CFG2 sba_rd_req_cmb_1_sqmuxa_i_o2 ( .A(sbcs_busyerror_0_sqmuxa), .B(mem_rd), .Y(N_969) ); defparam sba_rd_req_cmb_1_sqmuxa_i_o2.INIT=4'h7; // @48:14023 CFG2 \dmi_rdata_0_iv_0_o2[1] ( .A(dmi_req_data[37]), .B(dmi_req_data[39]), .Y(N_798) ); defparam \dmi_rdata_0_iv_0_o2[1] .INIT=4'hE; // @48:13976 CFG2 un12_valid_sba_0_o2_2 ( .A(dmi_req_data[35]), .B(dmi_req_data[40]), .Y(N_737) ); defparam un12_valid_sba_0_o2_2.INIT=4'hE; // @48:15261 CFG4 sba_req_rd_byte_en_int_13_ss0_0_a2_0_0 ( .A(sbcs_access[2]), .B(sbcs_access[1]), .C(sbcs_access[0]), .D(N_957), .Y(sba_req_rd_byte_en_int_13_ss0_0_a2_0_0_Z) ); defparam sba_req_rd_byte_en_int_13_ss0_0_a2_0_0.INIT=16'h0010; // @48:14398 CFG2 un1_next_state_0_sqmuxa_3_0_0 ( .A(N_847), .B(command_reg_state[1]), .Y(un1_next_state_0_sqmuxa_3_0_0_Z) ); defparam un1_next_state_0_sqmuxa_3_0_0.INIT=4'hD; // @48:14718 CFG4 \sba_state_ns_1_0_.debug_resume_req_3_1 ( .A(debug_state[5]), .B(debug_state[3]), .C(dmstatus_allany_resumeack), .D(dmcontrol_resumereq), .Y(debug_resume_req_3_1) ); defparam \sba_state_ns_1_0_.debug_resume_req_3_1 .INIT=16'h0E00; // @48:14398 CFG4 cmderr_cmb_3_sqmuxa_0_a2_1_5 ( .A(command_reg[30]), .B(command_reg[29]), .C(command_reg[28]), .D(command_reg[27]), .Y(cmderr_cmb_3_sqmuxa_0_a2_1_5_Z) ); defparam cmderr_cmb_3_sqmuxa_0_a2_1_5.INIT=16'h0001; // @48:14398 CFG4 cmderr_cmb_3_sqmuxa_0_a2_1_4 ( .A(command_reg[31]), .B(command_reg[26]), .C(command_reg[25]), .D(command_reg[24]), .Y(cmderr_cmb_3_sqmuxa_0_a2_1_4_Z) ); defparam cmderr_cmb_3_sqmuxa_0_a2_1_4.INIT=16'h0001; // @48:14398 CFG4 cmderr_cmb_0_sqmuxa_2_i_a2_0_0_2 ( .A(command_reg_state[0]), .B(dmcontrol_haltreq), .C(dmcontrol_ackhavereset), .D(dmcontrol_resumereq), .Y(cmderr_cmb_0_sqmuxa_2_i_a2_0_0_2_Z) ); defparam cmderr_cmb_0_sqmuxa_2_i_a2_0_0_2.INIT=16'h0002; // @48:15129 CFG4 sba_rd_req_cmb_2_sqmuxa_i_a2_0_0_0_12 ( .A(sbaddr_ff_Z[30]), .B(sbaddr_ff_Z[29]), .C(sbaddr_ff_Z[28]), .D(sbaddr_ff_Z[26]), .Y(sba_rd_req_cmb_2_sqmuxa_i_a2_0_0_0_12_Z) ); defparam sba_rd_req_cmb_2_sqmuxa_i_a2_0_0_0_12.INIT=16'h0001; // @48:15129 CFG4 sba_rd_req_cmb_2_sqmuxa_i_a2_0_0_0_11 ( .A(sbaddr_ff_Z[27]), .B(sbaddr_ff_Z[25]), .C(sbaddr_ff_Z[24]), .D(sbaddr_ff_Z[23]), .Y(sba_rd_req_cmb_2_sqmuxa_i_a2_0_0_0_11_Z) ); defparam sba_rd_req_cmb_2_sqmuxa_i_a2_0_0_0_11.INIT=16'h0001; // @48:15129 CFG4 sba_rd_req_cmb_2_sqmuxa_i_a2_0_0_0_10 ( .A(sbaddr_ff_Z[22]), .B(sbaddr_ff_Z[21]), .C(sbaddr_ff_Z[20]), .D(sbaddr_ff_Z[18]), .Y(sba_rd_req_cmb_2_sqmuxa_i_a2_0_0_0_10_Z) ); defparam sba_rd_req_cmb_2_sqmuxa_i_a2_0_0_0_10.INIT=16'h0001; // @48:15129 CFG4 sba_rd_req_cmb_2_sqmuxa_i_a2_0_0_0_9 ( .A(sbaddr_ff_Z[19]), .B(sbaddr_ff_Z[17]), .C(sbaddr_ff_Z[16]), .D(sbaddr_ff_Z[15]), .Y(sba_rd_req_cmb_2_sqmuxa_i_a2_0_0_0_9_Z) ); defparam sba_rd_req_cmb_2_sqmuxa_i_a2_0_0_0_9.INIT=16'h0001; // @48:15559 CFG4 prescale_counter6_4 ( .A(counter_Z[7]), .B(counter_Z[6]), .C(counter_Z[5]), .D(counter_Z[4]), .Y(prescale_counter6_4_Z) ); defparam prescale_counter6_4.INIT=16'h8000; // @48:13980 CFG3 dmi_resp_valid_0_a2_0 ( .A(mem_rdata34), .B(mem_rd), .C(mem_wr), .Y(N_1547) ); defparam dmi_resp_valid_0_a2_0.INIT=8'h08; // @48:15129 CFG4 sba_rd_req_cmb_2_sqmuxa_1_i_o3 ( .A(sba_busy), .B(mem_wr), .C(un12_dmi_valid_i), .D(mem_rdata34), .Y(N_733) ); defparam sba_rd_req_cmb_2_sqmuxa_1_i_o3.INIT=16'hBFFF; // @48:14128 CFG3 clk_en_dm_cmb_i_0_a3 ( .A(cpu_debug_active_net), .B(N_81_i), .C(dmcontrol_dmactive4), .Y(N_990) ); defparam clk_en_dm_cmb_i_0_a3.INIT=8'hFE; // @48:14398 CFG3 cmderr_cmb_3_sqmuxa_0_o2 ( .A(abstractcs_cmderr[2]), .B(abstractcs_cmderr[1]), .C(abstractcs_cmderr[0]), .Y(N_805) ); defparam cmderr_cmb_3_sqmuxa_0_o2.INIT=8'hFE; // @48:15168 CFG4 sba_wr_req_cmb7_i_o3 ( .A(sbcs_uar_err_ff_Z), .B(sbcs_to_err_ff_Z), .C(sbcs_ba_err_ff_Z), .D(dmi_resp_data[0]), .Y(N_979) ); defparam sba_wr_req_cmb7_i_o3.INIT=16'hFFFE; // @48:14023 CFG3 \dmi_rdata_0_iv_0_o2_2[0] ( .A(dmi_req_data[38]), .B(dmi_req_data[40]), .C(dmi_req_data[35]), .Y(N_837) ); defparam \dmi_rdata_0_iv_0_o2_2[0] .INIT=8'hDF; // @48:15070 CFG3 sba_wr_req_cmb_iv_0_o2_0 ( .A(sbcs_busyerror_0_sqmuxa), .B(mem_rdata34), .C(mem_wr), .Y(N_728) ); defparam sba_wr_req_cmb_iv_0_o2_0.INIT=8'h7F; // @48:15070 CFG3 sba_wr_req_cmb_iv_0_o2 ( .A(N_1528_i), .B(mem_rdata34), .C(mem_wr), .Y(N_963) ); defparam sba_wr_req_cmb_iv_0_o2.INIT=8'hBF; // @48:14736 CFG3 \debug_state_ns_i_0_o2[4] ( .A(dmcontrol_resumereq), .B(debug_state[3]), .C(dmstatus_allany_resumeack), .Y(N_986) ); defparam \debug_state_ns_i_0_o2[4] .INIT=8'h3B; // @48:15016 CFG2 sba_req_addr_1_0 ( .A(sba_state_Z[0]), .B(sba_state_Z[1]), .Y(sba_req_addr_1) ); defparam sba_req_addr_1_0.INIT=4'h6; // @48:15243 CFG2 count_en_0_sqmuxa_1_0_a3 ( .A(next_state28_Z), .B(N_127), .Y(count_en_0_sqmuxa_1) ); defparam count_en_0_sqmuxa_1_0_a3.INIT=4'h8; // @48:15368 CFG2 sba_req_valid_int_1_sqmuxa ( .A(N_685_i), .B(un1_sba_rd_req_cmb_1_Z), .Y(sba_req_valid_int_1_sqmuxa_Z) ); defparam sba_req_valid_int_1_sqmuxa.INIT=4'h1; // @48:15028 CFG3 misaligned_sbaddr_i_o2 ( .A(sbcs_access[1]), .B(sbcs_access[0]), .C(N_957), .Y(N_101_0) ); defparam misaligned_sbaddr_i_o2.INIT=8'hE2; // @48:14339 CFG2 \command_reg_state_4_i_1[3] ( .A(N_911), .B(N_81_i), .Y(N_88_1) ); defparam \command_reg_state_4_i_1[3] .INIT=4'hB; // @48:15261 CFG3 \sbdata_ff_9_0_iv_0_a2_1[31] ( .A(sba_resp_ready_int21_Z), .B(count_en_0_sqmuxa_1), .C(N_81_i), .Y(N_1549) ); defparam \sbdata_ff_9_0_iv_0_a2_1[31] .INIT=8'h80; // @48:15261 CFG3 \sbdata_ff_9_iv_0_a2[2] ( .A(sba_resp_ready_int21_Z), .B(count_en_0_sqmuxa_1), .C(N_81_i), .Y(N_1652) ); defparam \sbdata_ff_9_iv_0_a2[2] .INIT=8'h70; // @48:15026 CFG3 access_valid_i_o3 ( .A(sbcs_access[2]), .B(sbcs_access[1]), .C(sbcs_access[0]), .Y(sba_req_addr_int14) ); defparam access_valid_i_o3.INIT=8'hEA; // @48:15261 CFG3 sba_req_rd_byte_en_int_13_m2s2_0_a2 ( .A(sbcs_access[2]), .B(sbcs_access[1]), .C(sbcs_access[0]), .Y(N_1744) ); defparam sba_req_rd_byte_en_int_13_m2s2_0_a2.INIT=8'h01; // @48:14023 CFG3 \dmi_rdata_0_iv_0_o2_0[0] ( .A(dmi_req_data[39]), .B(dmi_req_data[37]), .C(dmi_req_data[34]), .Y(N_801) ); defparam \dmi_rdata_0_iv_0_o2_0[0] .INIT=8'hFE; // @48:14736 CFG3 \debug_state_ns_i_0_a2[4] ( .A(abstractcs_busy), .B(un1_debug_csr_rd_en), .C(abstractcs_busy_cmb7), .Y(N_1750) ); defparam \debug_state_ns_i_0_a2[4] .INIT=8'h0D; // @48:14023 CFG2 \dmi_rdata_0_iv_0_a2[0] ( .A(N_798), .B(dmi_req_data[34]), .Y(N_1738) ); defparam \dmi_rdata_0_iv_0_a2[0] .INIT=4'h4; // @48:15259 CFG2 mem_rdata34_0_0_RNIKKCRJ ( .A(N_403_i), .B(N_81_i), .Y(sbcs_readonaddr_1_sqmuxa_i) ); defparam mem_rdata34_0_0_RNIKKCRJ.INIT=4'hB; // @48:15259 CFG2 sbcs_busyerror_ff_RNO_0 ( .A(mem_rdata34), .B(N_81_i), .Y(sbcs_busyerror_3_sqmuxa_i) ); defparam sbcs_busyerror_ff_RNO_0.INIT=4'hB; // @48:15070 CFG2 sba_wr_req_cmb_iv_0_o2_RNO ( .A(sbcs_busyerror_1_sqmuxa_1), .B(dmi_req_data[36]), .Y(N_1528_i) ); defparam sba_wr_req_cmb_iv_0_o2_RNO.INIT=4'hB; // @48:15366 CFG4 sbcs_busy_ff14_i_o3_0 ( .A(timeout_Z), .B(sba_state_Z[1]), .C(sba_state_Z[0]), .D(next_state7), .Y(sbcs_busy_ff14_i_o3_0_Z) ); defparam sbcs_busy_ff14_i_o3_0.INIT=16'hECEF; // @48:14398 CFG4 cmderr_cmb_0_sqmuxa_2_i_a3_0 ( .A(command_reg_state[2]), .B(command_reg_state[1]), .C(command_reg_state[5]), .D(abs_cmd_transfer_ff), .Y(cmderr_cmb_0_sqmuxa_2_i_a3_0_Z) ); defparam cmderr_cmb_0_sqmuxa_2_i_a3_0.INIT=16'h010F; // @48:14736 CFG3 \debug_state_ns_0_a3_0_0[3] ( .A(N_986), .B(debug_sys_reset), .C(trace_priv_i), .Y(debug_state_ns_0_a3_0[3]) ); defparam \debug_state_ns_0_a3_0_0[3] .INIT=8'h54; // @48:14023 CFG4 \dmi_rdata_0_iv_0_a3_3_3[0] ( .A(dmi_req_data[36]), .B(dmi_rdata_0_iv_0_a3_3_1_Z[0]), .C(dmstatus_allany_halted), .D(dmi_req_data[38]), .Y(dmi_rdata_0_iv_0_a3_3_3_Z[0]) ); defparam \dmi_rdata_0_iv_0_a3_3_3[0] .INIT=16'h0040; // @48:14023 CFG3 \dmi_rdata_0_iv_0_a3_1_1[0] ( .A(dmstatus_allany_halted), .B(dmi_req_data[36]), .C(N_837), .Y(dmi_rdata_0_iv_0_a3_1_1_Z[0]) ); defparam \dmi_rdata_0_iv_0_a3_1_1[0] .INIT=8'h02; // @48:15129 CFG4 sba_rd_req_cmb_2_sqmuxa_i_a2_0_0_0_13 ( .A(un12lto14), .B(un12lt14), .C(sbaddr_ff_Z[31]), .D(sba_rd_req_cmb_2_sqmuxa_i_a2_0_0_0_9_Z), .Y(sba_rd_req_cmb_2_sqmuxa_i_a2_0_0_0_13_Z) ); defparam sba_rd_req_cmb_2_sqmuxa_i_a2_0_0_0_13.INIT=16'h0700; // @48:15261 CFG4 sbcs_busyerror_ff_3_f0_i_a3 ( .A(mem_wr), .B(dmi_resp_data[0]), .C(N_835), .D(N_717_i), .Y(N_1322) ); defparam sbcs_busyerror_ff_3_f0_i_a3.INIT=16'h1030; // @48:15559 CFG4 prescale_counter6 ( .A(prescale_counter6_4_Z), .B(counter_Z[0]), .C(counter_Z[1]), .D(prescale_counter6_3_Z), .Y(prescale_counter6_Z) ); defparam prescale_counter6.INIT=16'h8000; // @48:14398 CFG3 next_states2_i_a3 ( .A(command_reg_state[1]), .B(N_911), .C(N_806), .Y(N_1108) ); defparam next_states2_i_a3.INIT=8'h01; // @48:15261 CFG4 sba_req_rd_byte_en_int_13_ss0_0_a2_0 ( .A(sba_req_rd_byte_en_int_13_ss0_0_a2_0_0_Z), .B(N_685_i), .C(N_81_i), .D(sba_rd_req_cmb), .Y(N_1829) ); defparam sba_req_rd_byte_en_int_13_ss0_0_a2_0.INIT=16'h2000; // @48:13976 CFG4 un12_valid_sba_0_o2 ( .A(dmi_req_data[39]), .B(dmi_req_data[37]), .C(dmi_req_data[38]), .D(N_737), .Y(N_800) ); defparam un12_valid_sba_0_o2.INIT=16'hFF7F; // @48:15222 CFG4 next_state21_1_0 ( .A(sba_wr_req_cmb), .B(sba_rd_req_cmb), .C(trace_priv_i), .D(debug_trx_os_net), .Y(next_state7) ); defparam next_state21_1_0.INIT=16'h00E0; // @48:15482 CFG3 sba_req_valid_int35_0 ( .A(sba_wr_req_cmb), .B(trace_priv_i), .C(debug_trx_os_net), .Y(sba_req_valid_int35_0_Z) ); defparam sba_req_valid_int35_0.INIT=8'h08; // @48:15261 CFG3 \sba_req_wr_data_int_10_1_iv_0_a2_0[7] ( .A(sba_req_addr_int26_Z), .B(N_685_i), .C(N_81_i), .Y(N_1542) ); defparam \sba_req_wr_data_int_10_1_iv_0_a2_0[7] .INIT=8'h20; // @48:15261 CFG4 \sbdata_ff_9_0_iv_0_a2_0[31] ( .A(sbcs_access[2]), .B(sbcs_access[1]), .C(sbcs_access[0]), .D(N_1549), .Y(N_1612) ); defparam \sbdata_ff_9_0_iv_0_a2_0[31] .INIT=16'h0400; // @48:15019 CFG3 \sba_req_wr_data_i_o3[31] ( .A(sba_wr_req_ff_Z), .B(sba_state_Z[1]), .C(sba_state_Z[0]), .Y(N_807) ); defparam \sba_req_wr_data_i_o3[31] .INIT=8'hD7; // @48:14383 CFG2 abstractcs_cmderr_cmb_0_sqmuxa_i ( .A(N_1750), .B(N_81_i), .Y(N_361) ); defparam abstractcs_cmderr_cmb_0_sqmuxa_i.INIT=4'h4; // @48:15211 CFG4 count_en_0 ( .A(timeout_Z), .B(sba_state_Z[1]), .C(sba_state_Z[0]), .D(next_state28_Z), .Y(count_en_0_Z) ); defparam count_en_0.INIT=16'h101C; // @48:15366 CFG4 sba_resp_ready_int_0_sqmuxa_1_i_0_o3_0_o3 ( .A(sbcs_access[0]), .B(sbcs_access[1]), .C(N_956), .D(N_957), .Y(N_867) ); defparam sba_resp_ready_int_0_sqmuxa_1_i_0_o3_0_o3.INIT=16'hAEC0; // @48:14168 CFG4 havereset_skip_pwrup_4_u_0 ( .A(debug_state[0]), .B(havereset_skip_pwrup), .C(N_81_i), .D(debug_sys_reset), .Y(havereset_skip_pwrup_4) ); defparam havereset_skip_pwrup_4_u_0.INIT=16'h0F8F; // @48:14339 CFG4 \abs_busy_cmb_mux.abstractcs_busy_cmb7_0_a3_RNIHOBJ9 ( .A(debug_state[4]), .B(abstractcs_busy), .C(un1_debug_csr_rd_en), .D(abstractcs_busy_cmb7), .Y(N_723_1) ); defparam \abs_busy_cmb_mux.abstractcs_busy_cmb7_0_a3_RNIHOBJ9 .INIT=16'h55F7; // @48:15261 CFG4 \sbdata_ff_9_0_iv_0_a2[31] ( .A(N_81_i), .B(N_1541), .C(sba_resp_ready_int21_Z), .D(count_en_0_sqmuxa_1), .Y(N_1560) ); defparam \sbdata_ff_9_0_iv_0_a2[31] .INIT=16'h8AAA; // @48:15261 CFG4 sba_req_rd_byte_en_int_13_m2s2_0_a3 ( .A(N_81_i), .B(sba_rd_req_cmb), .C(N_1744), .D(N_685_i), .Y(N_1518) ); defparam sba_req_rd_byte_en_int_13_m2s2_0_a3.INIT=16'h0080; // @48:15261 CFG3 \sba_req_addr_int_16_iv_0_a2_0[31] ( .A(N_81_i), .B(sba_req_addr_1), .C(un1_sbcs_busy_ff13_3_i), .Y(N_1564) ); defparam \sba_req_addr_int_16_iv_0_a2_0[31] .INIT=8'h80; // @48:15129 CFG4 sba_rd_req_cmb_2_sqmuxa_i_o3 ( .A(mem_wr), .B(mem_rdata34), .C(sba_busy), .D(dmi_req_data[34]), .Y(N_915) ); defparam sba_rd_req_cmb_2_sqmuxa_i_o3.INIT=16'h3B33; // @48:14023 CFG3 \dmi_rdata_0_iv_0_a2_0[1] ( .A(dmi_req_data[38]), .B(dmi_req_data[36]), .C(N_737), .Y(N_1626) ); defparam \dmi_rdata_0_iv_0_a2_0[1] .INIT=8'h02; // @48:15261 CFG3 sbcs_busyerror_ff_3_f0_i_a3_RNO ( .A(dmi_req_data[36]), .B(sba_busy), .C(dmi_req_data[34]), .Y(N_717_i) ); defparam sbcs_busyerror_ff_3_f0_i_a3_RNO.INIT=8'hC8; // @48:15261 CFG3 mem_rdata34_0_0_RNIDMOIC ( .A(un16_dmi_valid_i), .B(mem_rdata34), .C(mem_wr), .Y(N_403_i) ); defparam mem_rdata34_0_0_RNIDMOIC.INIT=8'h80; // @48:15366 CFG3 sbcs_busy_ff14_i_o3 ( .A(sbcs_busy_ff14_i_o3_0_Z), .B(next_state21), .C(sba_state_Z[0]), .Y(N_103) ); defparam sbcs_busy_ff14_i_o3.INIT=8'hEA; // @48:15192 CFG4 \sba_state_ns_1_0_.m13_1_0 ( .A(sba_state_Z[0]), .B(sba_state_Z[1]), .C(next_state28_Z), .D(next_state7), .Y(sba_state_ns_1[0]) ); defparam \sba_state_ns_1_0_.m13_1_0 .INIT=16'h5140; // @48:15261 CFG4 sba_req_wr_byte_en_int_13_m2s2_0_a2_0 ( .A(N_81_i), .B(N_1541), .C(sba_req_addr_int26_Z), .D(N_685_i), .Y(N_1551) ); defparam sba_req_wr_byte_en_int_13_m2s2_0_a2_0.INIT=16'h0080; // @48:14495 CFG4 un1_dmi_req_command_0_a3_RNIOA2JA ( .A(cpu_debug_active_net), .B(un1_dmi_req_command_i), .C(command_reg[13]), .D(debug_gpr_addr_1_sqmuxa_0_268_a2_0_a2_0_0), .Y(N_1625) ); defparam un1_dmi_req_command_0_a3_RNIOA2JA.INIT=16'h0200; // @48:15070 CFG4 sba_rd_req_cmb_f0 ( .A(sba_rd_req_cmb_f1_0_Z), .B(N_24_i), .C(sba_rd_req_cmb_1_sqmuxa_1), .D(N_28_i), .Y(sba_rd_req_cmb) ); defparam sba_rd_req_cmb_f0.INIT=16'h0032; // @48:14736 CFG4 \debug_state_ns_0_a3[1] ( .A(N_986), .B(N_1750), .C(debug_sys_reset), .D(trace_priv_i), .Y(N_1078) ); defparam \debug_state_ns_0_a3[1] .INIT=16'h0004; // @48:14398 CFG3 cmderr_cmb_3_sqmuxa_0_a2_1 ( .A(cmderr_cmb_3_sqmuxa_0_a2_1_4_Z), .B(un1_dmi_req_command_i), .C(cmderr_cmb_3_sqmuxa_0_a2_1_5_Z), .Y(N_1743) ); defparam cmderr_cmb_3_sqmuxa_0_a2_1.INIT=8'h20; // @48:13979 CFG3 dmi_req_ready_0_o2 ( .A(sba_busy), .B(empty_rd), .C(abstractcs_busy), .Y(N_812) ); defparam dmi_req_ready_0_o2.INIT=8'hFE; // @48:13976 CFG3 un12_valid_sba_0_a3 ( .A(dmi_req_data[36]), .B(N_800), .C(dmi_req_data[34]), .Y(un12_dmi_valid_i) ); defparam un12_valid_sba_0_a3.INIT=8'h10; // @48:14023 CFG4 \dmi_rdata_0_iv_0_a2[8] ( .A(dmi_req_data[36]), .B(dmi_req_data[38]), .C(N_801), .D(N_737), .Y(N_1552) ); defparam \dmi_rdata_0_iv_0_a2[8] .INIT=16'h0002; // @48:15351 CFG2 sba_resp_ready_int_2_sqmuxa_i_a3_0 ( .A(N_867), .B(sba_req_addr_int14), .Y(sba_resp_ready_int_2_sqmuxa_i_a3_0_Z) ); defparam sba_resp_ready_int_2_sqmuxa_i_a3_0.INIT=4'h1; // @48:15261 CFG4 \sbdata_ff_9_iv_0_a2_0[2] ( .A(N_1541), .B(N_956), .C(N_1549), .D(N_743), .Y(N_1655) ); defparam \sbdata_ff_9_iv_0_a2_0[2] .INIT=16'h0020; // @48:13980 CFG3 dmi_resp_valid_0_o2 ( .A(dmi_req_data[36]), .B(N_800), .C(dmi_req_data[34]), .Y(N_802) ); defparam dmi_resp_valid_0_o2.INIT=8'hEC; // @48:15261 CFG4 \sbdata_ff_9_0_iv_0_a2_2[13] ( .A(sbcs_access[2]), .B(sbcs_access[1]), .C(sbcs_access[0]), .D(N_956), .Y(N_1589) ); defparam \sbdata_ff_9_0_iv_0_a2_2[13] .INIT=16'h0414; // @48:15550 CFG2 timeout_4 ( .A(count_en_0_Z), .B(prescale_counter_Z[3]), .Y(timeout_4_Z) ); defparam timeout_4.INIT=4'h8; // @48:15559 CFG2 counter_1_sqmuxa ( .A(count_en_0_Z), .B(prescale_counter6_Z), .Y(counter_1_sqmuxa_Z) ); defparam counter_1_sqmuxa.INIT=4'h2; // @48:15017 CFG4 \sba_req_rd_byte_en[3] ( .A(sba_req_rd_byte_en_int_Z[3]), .B(sba_rd_req_ff_Z), .C(sba_state_Z[1]), .D(sba_state_Z[0]), .Y(debug_sysbus_req_rd_byte_en_net[3]) ); defparam \sba_req_rd_byte_en[3] .INIT=16'h0880; // @48:15017 CFG4 \sba_req_rd_byte_en[2] ( .A(sba_req_rd_byte_en_int_Z[2]), .B(sba_rd_req_ff_Z), .C(sba_state_Z[1]), .D(sba_state_Z[0]), .Y(debug_sysbus_req_rd_byte_en_net[2]) ); defparam \sba_req_rd_byte_en[2] .INIT=16'h0880; // @48:15017 CFG4 \sba_req_rd_byte_en[1] ( .A(sba_req_rd_byte_en_int_Z[1]), .B(sba_rd_req_ff_Z), .C(sba_state_Z[1]), .D(sba_state_Z[0]), .Y(debug_sysbus_req_rd_byte_en_net[1]) ); defparam \sba_req_rd_byte_en[1] .INIT=16'h0880; // @48:15017 CFG4 \sba_req_rd_byte_en[0] ( .A(sba_req_rd_byte_en_int_Z[0]), .B(sba_rd_req_ff_Z), .C(sba_state_Z[1]), .D(sba_state_Z[0]), .Y(debug_sysbus_req_rd_byte_en_net[0]) ); defparam \sba_req_rd_byte_en[0] .INIT=16'h0880; // @48:14398 CFG3 cmderr_cmb_3_sqmuxa_0_a2 ( .A(debug_state[4]), .B(N_1750), .C(command_reg_state[0]), .Y(N_1647) ); defparam cmderr_cmb_3_sqmuxa_0_a2.INIT=8'h20; // @48:15018 CFG4 \sba_req_wr_byte_en[2] ( .A(sba_state_Z[1]), .B(sba_state_Z[0]), .C(sba_req_wr_byte_en_int_Z[2]), .D(sba_wr_req_ff_Z), .Y(debug_sysbus_req_wr_byte_en_net[2]) ); defparam \sba_req_wr_byte_en[2] .INIT=16'h6000; // @48:15018 CFG4 \sba_req_wr_byte_en[3] ( .A(sba_state_Z[1]), .B(sba_state_Z[0]), .C(sba_req_wr_byte_en_int_Z[3]), .D(sba_wr_req_ff_Z), .Y(debug_sysbus_req_wr_byte_en_net[3]) ); defparam \sba_req_wr_byte_en[3] .INIT=16'h6000; // @48:15018 CFG4 \sba_req_wr_byte_en[0] ( .A(sba_state_Z[1]), .B(sba_state_Z[0]), .C(sba_req_wr_byte_en_int_Z[0]), .D(sba_wr_req_ff_Z), .Y(debug_sysbus_req_wr_byte_en_net[0]) ); defparam \sba_req_wr_byte_en[0] .INIT=16'h6000; // @48:15018 CFG4 \sba_req_wr_byte_en[1] ( .A(sba_state_Z[1]), .B(sba_state_Z[0]), .C(sba_req_wr_byte_en_int_Z[1]), .D(sba_wr_req_ff_Z), .Y(debug_sysbus_req_wr_byte_en_net[1]) ); defparam \sba_req_wr_byte_en[1] .INIT=16'h6000; // @48:15261 CFG4 \sbdata_ff_9_0_iv_0_a2_0[13] ( .A(N_81_i), .B(N_1744), .C(sba_resp_ready_int21_Z), .D(count_en_0_sqmuxa_1), .Y(N_1656) ); defparam \sbdata_ff_9_0_iv_0_a2_0[13] .INIT=16'h8AAA; // @48:14023 CFG3 \dmi_rdata_0_iv_0_o2[0] ( .A(dmi_req_data[36]), .B(N_837), .C(N_801), .Y(N_846) ); defparam \dmi_rdata_0_iv_0_o2[0] .INIT=8'hFD; // @48:14023 CFG2 \dmi_rdata_0_iv_0_a2_0[0] ( .A(N_1626), .B(N_801), .Y(N_1752) ); defparam \dmi_rdata_0_iv_0_a2_0[0] .INIT=4'h2; // @48:14023 CFG2 \dmi_rdata_0_iv_0_a2[1] ( .A(N_1626), .B(N_1738), .Y(N_1741) ); defparam \dmi_rdata_0_iv_0_a2[1] .INIT=4'h8; // @48:14251 CFG4 N_110_i ( .A(debug_state[3]), .B(debug_state[1]), .C(dmstatus_allany_halted), .D(N_81_i), .Y(N_110_i_1z) ); defparam N_110_i.INIT=16'h3200; // @48:14278 CFG4 N_112_i ( .A(dmcontrol_resumereq), .B(N_81_i), .C(debug_state[1]), .D(dmstatus_allany_resumeack), .Y(N_112_i_1z) ); defparam N_112_i.INIT=16'h8880; // @48:14159 CFG4 dmstatus_allany_havereset10_0_a3_RNIIO92L ( .A(dmstatus_allany_havereset), .B(dmcontrol_ackhavereset), .C(dmstatus_allany_havereset10), .D(N_81_i), .Y(N_170_i) ); defparam dmstatus_allany_havereset10_0_a3_RNIIO92L.INIT=16'hF200; // @48:14337 CFG4 \command_reg_state_4_i_o2_RNILR2O6[3] ( .A(abs_cmd_transfer_ff), .B(command_reg_state[1]), .C(N_88_1), .D(N_847), .Y(N_88_i) ); defparam \command_reg_state_4_i_o2_RNILR2O6[3] .INIT=16'h080F; // @48:14736 CFG4 \debug_state_ns_0_1[1] ( .A(trace_priv_i), .B(N_1078), .C(debug_state[0]), .D(debug_state_ns_0_a3_1_0_Z[1]), .Y(debug_state_ns_0_1_Z[1]) ); defparam \debug_state_ns_0_1[1] .INIT=16'hFDFC; // @48:14023 CFG4 \dmi_rdata_0_iv_0_0[0] ( .A(N_1738), .B(dmi_rdata_0_iv_0_a3_3_3_Z[0]), .C(dmi_rdata_0_iv_0_a3_1_1_Z[0]), .D(N_801), .Y(dmi_rdata_0_iv_0_0_Z[0]) ); defparam \dmi_rdata_0_iv_0_0[0] .INIT=16'hA0EC; // @48:14023 CFG4 \dmi_rdata_0_iv_0_0[1] ( .A(debug_sys_reset), .B(N_798), .C(N_1626), .D(N_1741), .Y(dmi_rdata_0_iv_0_0_Z[1]) ); defparam \dmi_rdata_0_iv_0_0[1] .INIT=16'hFF20; // @48:14495 CFG2 debug_gpr_addr_1_sqmuxa_0_268_a2_0_a2_1 ( .A(dmi_req_data[16]), .B(dmi_req_data[17]), .Y(debug_gpr_addr_1_sqmuxa_0_268_a2_0_a2_1_Z) ); defparam debug_gpr_addr_1_sqmuxa_0_268_a2_0_a2_1.INIT=4'h1; // @48:14339 CFG2 un1_dmcontrol_ndmreset13_4_0_o2_0 ( .A(N_812), .B(N_805), .Y(un1_dmcontrol_ndmreset13_4_0_o2_0_Z) ); defparam un1_dmcontrol_ndmreset13_4_0_o2_0.INIT=4'hB; // @48:14398 CFG2 cmderr_cmb_3_sqmuxa_0_a2_2_3 ( .A(dmi_req_data[32]), .B(dmi_req_data[33]), .Y(cmderr_cmb_3_sqmuxa_0_a2_2_3_Z) ); defparam cmderr_cmb_3_sqmuxa_0_a2_2_3.INIT=4'h1; // @48:15129 CFG4 sba_rd_req_cmb_2_sqmuxa_i_a2_0_0_0 ( .A(sba_rd_req_cmb_2_sqmuxa_i_a2_0_0_0_10_Z), .B(sba_rd_req_cmb_2_sqmuxa_i_a2_0_0_0_13_Z), .C(sba_rd_req_cmb_2_sqmuxa_i_a2_0_0_0_12_Z), .D(sba_rd_req_cmb_2_sqmuxa_i_a2_0_0_0_11_Z), .Y(N_1524) ); defparam sba_rd_req_cmb_2_sqmuxa_i_a2_0_0_0.INIT=16'h8000; // @48:15261 CFG4 \sba_req_wr_byte_en_int_13_m0_i_a3_0[0] ( .A(sbcs_access[0]), .B(N_957), .C(N_956), .D(N_1551), .Y(N_1400) ); defparam \sba_req_wr_byte_en_int_13_m0_i_a3_0[0] .INIT=16'h2000; // @48:15261 CFG3 \sba_req_wr_data_int_10_1_iv_0_a2[22] ( .A(N_956), .B(N_99), .C(N_1551), .Y(N_1651) ); defparam \sba_req_wr_data_int_10_1_iv_0_a2[22] .INIT=8'h80; // @48:14339 CFG4 \command_reg_state_4_0_a2_1[1] ( .A(command_reg[22]), .B(command_reg[21]), .C(command_reg[20]), .D(N_1743), .Y(N_1840) ); defparam \command_reg_state_4_0_a2_1[1] .INIT=16'h0400; // @48:14718 CFG4 \sba_state_ns_1_0_.debug_resume_req_3 ( .A(debug_resume_req_3_1), .B(debug_trx_os_net), .C(init_wr_dcsr_step_en), .D(debug_exit_retr), .Y(debug_resume_req_3) ); defparam \sba_state_ns_1_0_.debug_resume_req_3 .INIT=16'h2022; // @48:15480 CFG4 sbcs_busy_ff15_0_a3_0 ( .A(sba_state_Z[1]), .B(sba_state_Z[0]), .C(sba_req_addr_int14), .D(N_867), .Y(sbcs_busy_ff15_0_a3_0_Z) ); defparam sbcs_busy_ff15_0_a3_0.INIT=16'h0004; // @48:14023 CFG2 \dmi_rdata_0_iv_0_a3_1[8] ( .A(N_1741), .B(dmstatus_allany_halted), .Y(N_1083) ); defparam \dmi_rdata_0_iv_0_a3_1[8] .INIT=4'h8; // @48:14736 CFG3 \debug_state_ns_0_a3[5] ( .A(debug_exit_retr), .B(debug_state[5]), .C(init_wr_dcsr_step_en), .Y(N_1303) ); defparam \debug_state_ns_0_a3[5] .INIT=8'hC4; // @48:13980 CFG2 dmi_resp_valid_0_a2 ( .A(dmi_req_data[0]), .B(dmi_req_data[1]), .Y(mem_wr) ); defparam dmi_resp_valid_0_a2.INIT=4'h4; // @48:15129 CFG2 sba_rd_req_cmb_2_sqmuxa_1_i_a2_0 ( .A(dmi_req_data[22]), .B(dmi_req_data[24]), .Y(N_1786) ); defparam sba_rd_req_cmb_2_sqmuxa_1_i_a2_0.INIT=4'h1; // @48:13958 CFG2 un3_dmi_rd_0_a2 ( .A(dmi_req_data[0]), .B(dmi_req_data[1]), .Y(mem_rd) ); defparam un3_dmi_rd_0_a2.INIT=4'h2; // @48:15261 CFG4 \sbdata_ff_9_0_iv_0_a2[13] ( .A(N_81_i), .B(N_1589), .C(sba_resp_ready_int21_Z), .D(count_en_0_sqmuxa_1), .Y(N_1650) ); defparam \sbdata_ff_9_0_iv_0_a2[13] .INIT=16'h8000; // @48:15561 CFG3 \un1_prescale_counter_1.CO1 ( .A(prescale_counter_Z[1]), .B(prescale_counter_Z[0]), .C(prescale_counter6_Z), .Y(CO1) ); defparam \un1_prescale_counter_1.CO1 .INIT=8'h80; // @48:15353 CFG4 sbcs_busy_ff13_i_a3 ( .A(timeout_Z), .B(sba_state_Z[1]), .C(sba_state_Z[0]), .D(N_94), .Y(N_115) ); defparam sbcs_busy_ff13_i_a3.INIT=16'h0010; // @48:15368 CFG2 sba_req_rd_byte_en_int_3_sqmuxa_1 ( .A(N_685_i), .B(N_94), .Y(sba_req_rd_byte_en_int_3_sqmuxa_1_Z) ); defparam sba_req_rd_byte_en_int_3_sqmuxa_1.INIT=4'h1; // @48:15261 CFG4 \sba_req_addr_int_16_iv_0[0] ( .A(sba_req_addr_int[0]), .B(N_957), .C(N_1553), .D(N_1564), .Y(sba_req_addr_int_16[0]) ); defparam \sba_req_addr_int_16_iv_0[0] .INIT=16'hEAC0; // @48:15550 CFG3 \prescale_counter_4[0] ( .A(prescale_counter_Z[0]), .B(prescale_counter6_Z), .C(count_en_0_Z), .Y(prescale_counter_4_Z[0]) ); defparam \prescale_counter_4[0] .INIT=8'h60; // @48:15261 CFG4 \sba_req_addr_int_16_iv_0[1] ( .A(sba_req_addr_int[1]), .B(N_956), .C(N_1553), .D(N_1564), .Y(sba_req_addr_int_16[1]) ); defparam \sba_req_addr_int_16_iv_0[1] .INIT=16'hEAC0; // @48:15261 CFG4 \sbdata_ff_9_iv_0_a2_3[2] ( .A(N_1541), .B(N_956), .C(N_1549), .D(N_743), .Y(N_1661) ); defparam \sbdata_ff_9_iv_0_a2_3[2] .INIT=16'h8000; // @48:15261 CFG4 \sbdata_ff_9_iv_0_a2_2[2] ( .A(N_1541), .B(N_956), .C(N_1549), .D(N_743), .Y(N_1660) ); defparam \sbdata_ff_9_iv_0_a2_2[2] .INIT=16'h0080; // @48:15261 CFG4 \sbdata_ff_9_0_iv_0_a2_1[13] ( .A(N_956), .B(sbcs_access[0]), .C(N_1549), .D(N_1541), .Y(N_1659) ); defparam \sbdata_ff_9_0_iv_0_a2_1[13] .INIT=16'h8000; // @48:15261 CFG3 \sba_req_wr_data_int_10_1_iv_0_a2[15] ( .A(N_1551), .B(N_956), .C(N_743), .Y(N_1649) ); defparam \sba_req_wr_data_int_10_1_iv_0_a2[15] .INIT=8'h02; // @48:15070 CFG3 mem_rdata34_0_a2 ( .A(dmi_req_data[36]), .B(N_800), .C(dmi_req_data[34]), .Y(N_1841) ); defparam mem_rdata34_0_a2.INIT=8'h02; // @48:13975 CFG3 un16_valid_sba_0_a3 ( .A(dmi_req_data[36]), .B(N_800), .C(dmi_req_data[34]), .Y(un16_dmi_valid_i) ); defparam un16_valid_sba_0_a3.INIT=8'h01; // @48:14736 CFG3 \debug_state_ns_i_0_o2_RNIK9BH2[4] ( .A(N_1750), .B(debug_state[4]), .C(N_986), .Y(N_52_i) ); defparam \debug_state_ns_i_0_o2_RNIK9BH2[4] .INIT=8'h45; // @48:14337 CFG2 abstractcs_cmderr_cmb_0_sqmuxa_i_RNILV1N9 ( .A(N_990), .B(N_361), .Y(un1_dmcontrol_ndmreset13_2_i) ); defparam abstractcs_cmderr_cmb_0_sqmuxa_i_RNILV1N9.INIT=4'h2; // @48:15259 CFG4 sbcs_busyerror_ff_RNO ( .A(N_712_i), .B(N_1322), .C(N_81_i), .D(mem_wr), .Y(N_375_i) ); defparam sbcs_busyerror_ff_RNO.INIT=16'h1030; // @48:15548 CFG2 timeout_RNO ( .A(count_en_0_Z), .B(prescale_counter6_Z), .Y(counter_1_sqmuxa_i) ); defparam timeout_RNO.INIT=4'hD; // @48:15261 CFG4 sba_wr_req_cmb_iv_0_o2_RNIVVRAO ( .A(sba_wr_req_ff_Z), .B(N_704_i), .C(N_963), .D(N_728), .Y(sba_wr_req_cmb) ); defparam sba_wr_req_cmb_iv_0_o2_RNIVVRAO.INIT=16'hAF8C; // @48:15261 CFG3 \sba_req_wr_data_int_10_0_iv_0_m2[25] ( .A(N_728), .B(sbdata_ff_Z[1]), .C(dmi_req_data[3]), .Y(N_814) ); defparam \sba_req_wr_data_int_10_0_iv_0_m2[25] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_wr_data_int_10_0_iv_0_m2[29] ( .A(N_728), .B(sbdata_ff_Z[5]), .C(dmi_req_data[7]), .Y(N_816) ); defparam \sba_req_wr_data_int_10_0_iv_0_m2[29] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_wr_data_int_10_0_iv_0_m2[26] ( .A(N_728), .B(sbdata_ff_Z[2]), .C(dmi_req_data[4]), .Y(N_819) ); defparam \sba_req_wr_data_int_10_0_iv_0_m2[26] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_wr_data_int_10_0_iv_0_m2[31] ( .A(N_728), .B(sbdata_ff_Z[7]), .C(dmi_req_data[9]), .Y(N_820) ); defparam \sba_req_wr_data_int_10_0_iv_0_m2[31] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_wr_data_int_10_0_iv_0_m2[30] ( .A(N_728), .B(sbdata_ff_Z[6]), .C(dmi_req_data[8]), .Y(N_821) ); defparam \sba_req_wr_data_int_10_0_iv_0_m2[30] .INIT=8'hD8; // @48:15261 CFG3 sbcs_autoincrement_ff_3_i_m2 ( .A(N_403_i), .B(sbcs_autoincrement_ff_Z), .C(dmi_req_data[18]), .Y(N_822) ); defparam sbcs_autoincrement_ff_3_i_m2.INIT=8'hE4; // @48:15261 CFG3 \sba_req_wr_data_int_10_0_iv_0_m2_0[31] ( .A(N_728), .B(sbdata_ff_Z[15]), .C(dmi_req_data[17]), .Y(N_825) ); defparam \sba_req_wr_data_int_10_0_iv_0_m2_0[31] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_wr_data_int_10_0_iv_0_m2_0[28] ( .A(N_728), .B(sbdata_ff_Z[12]), .C(dmi_req_data[14]), .Y(N_826) ); defparam \sba_req_wr_data_int_10_0_iv_0_m2_0[28] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_wr_data_int_10_0_iv_0_m2_0[29] ( .A(N_728), .B(sbdata_ff_Z[13]), .C(dmi_req_data[15]), .Y(N_827) ); defparam \sba_req_wr_data_int_10_0_iv_0_m2_0[29] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_wr_data_int_10_0_iv_0_m2_0[30] ( .A(N_728), .B(sbdata_ff_Z[14]), .C(dmi_req_data[16]), .Y(N_828) ); defparam \sba_req_wr_data_int_10_0_iv_0_m2_0[30] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_wr_data_int_10_0_iv_0_m2_0[25] ( .A(N_728), .B(sbdata_ff_Z[9]), .C(dmi_req_data[11]), .Y(N_829) ); defparam \sba_req_wr_data_int_10_0_iv_0_m2_0[25] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_wr_data_int_10_0_iv_0_m2_0[26] ( .A(N_728), .B(sbdata_ff_Z[10]), .C(dmi_req_data[12]), .Y(N_830) ); defparam \sba_req_wr_data_int_10_0_iv_0_m2_0[26] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_wr_data_int_10_0_iv_0_m2_0[27] ( .A(N_728), .B(sbdata_ff_Z[11]), .C(dmi_req_data[13]), .Y(N_831) ); defparam \sba_req_wr_data_int_10_0_iv_0_m2_0[27] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_wr_data_int_10_0_iv_0_m2_0[24] ( .A(N_728), .B(sbdata_ff_Z[8]), .C(dmi_req_data[10]), .Y(N_832) ); defparam \sba_req_wr_data_int_10_0_iv_0_m2_0[24] .INIT=8'hD8; // @48:15261 CFG3 \sbcs_access_ff_3_0_m3[1] ( .A(dmi_req_data[20]), .B(N_403_i), .C(sbcs_access_ff_Z[1]), .Y(sbcs_access[1]) ); defparam \sbcs_access_ff_3_0_m3[1] .INIT=8'hB8; // @48:15261 CFG3 \sbcs_access_ff_3_i_m2[2] ( .A(dmi_req_data[21]), .B(N_403_i), .C(sbcs_access_ff_Z[2]), .Y(sbcs_access[2]) ); defparam \sbcs_access_ff_3_i_m2[2] .INIT=8'hB8; // @48:15261 CFG3 \sbcs_access_ff_3_i_m2[0] ( .A(dmi_req_data[19]), .B(N_403_i), .C(sbcs_access_ff_Z[0]), .Y(sbcs_access[0]) ); defparam \sbcs_access_ff_3_i_m2[0] .INIT=8'hB8; // @48:15261 CFG3 \sba_req_addr_int_16_iv_0_m2[2] ( .A(N_733), .B(sbaddr_ff_Z[2]), .C(dmi_req_data[4]), .Y(N_868) ); defparam \sba_req_addr_int_16_iv_0_m2[2] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_addr_int_16_iv_0_m2[4] ( .A(N_733), .B(sbaddr_ff_Z[4]), .C(dmi_req_data[6]), .Y(N_870) ); defparam \sba_req_addr_int_16_iv_0_m2[4] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_addr_int_16_iv_0_m2[5] ( .A(N_733), .B(sbaddr_ff_Z[5]), .C(dmi_req_data[7]), .Y(N_871) ); defparam \sba_req_addr_int_16_iv_0_m2[5] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_addr_int_16_iv_0_m2[6] ( .A(N_733), .B(sbaddr_ff_Z[6]), .C(dmi_req_data[8]), .Y(N_872) ); defparam \sba_req_addr_int_16_iv_0_m2[6] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_addr_int_16_iv_0_m2[7] ( .A(N_733), .B(sbaddr_ff_Z[7]), .C(dmi_req_data[9]), .Y(N_873) ); defparam \sba_req_addr_int_16_iv_0_m2[7] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_addr_int_16_iv_0_m2[8] ( .A(N_733), .B(sbaddr_ff_Z[8]), .C(dmi_req_data[10]), .Y(N_874) ); defparam \sba_req_addr_int_16_iv_0_m2[8] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_addr_int_16_iv_0_m2[9] ( .A(N_733), .B(sbaddr_ff_Z[9]), .C(dmi_req_data[11]), .Y(N_875) ); defparam \sba_req_addr_int_16_iv_0_m2[9] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_addr_int_16_iv_0_m2[10] ( .A(N_733), .B(sbaddr_ff_Z[10]), .C(dmi_req_data[12]), .Y(N_876) ); defparam \sba_req_addr_int_16_iv_0_m2[10] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_addr_int_16_iv_0_m2[12] ( .A(N_733), .B(sbaddr_ff_Z[12]), .C(dmi_req_data[14]), .Y(N_878) ); defparam \sba_req_addr_int_16_iv_0_m2[12] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_addr_int_16_iv_0_m2[13] ( .A(N_733), .B(un12lt14), .C(dmi_req_data[15]), .Y(N_879) ); defparam \sba_req_addr_int_16_iv_0_m2[13] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_addr_int_16_iv_0_m2[15] ( .A(N_733), .B(sbaddr_ff_Z[15]), .C(dmi_req_data[17]), .Y(N_881) ); defparam \sba_req_addr_int_16_iv_0_m2[15] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_addr_int_16_iv_0_m2[16] ( .A(N_733), .B(sbaddr_ff_Z[16]), .C(dmi_req_data[18]), .Y(N_882) ); defparam \sba_req_addr_int_16_iv_0_m2[16] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_addr_int_16_iv_0_m2[17] ( .A(N_733), .B(sbaddr_ff_Z[17]), .C(dmi_req_data[19]), .Y(N_883) ); defparam \sba_req_addr_int_16_iv_0_m2[17] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_addr_int_16_iv_0_m2[18] ( .A(N_733), .B(sbaddr_ff_Z[18]), .C(dmi_req_data[20]), .Y(N_884) ); defparam \sba_req_addr_int_16_iv_0_m2[18] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_addr_int_16_iv_0_m2[19] ( .A(N_733), .B(sbaddr_ff_Z[19]), .C(dmi_req_data[21]), .Y(N_885) ); defparam \sba_req_addr_int_16_iv_0_m2[19] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_addr_int_16_iv_0_m2[20] ( .A(N_733), .B(sbaddr_ff_Z[20]), .C(dmi_req_data[22]), .Y(N_886) ); defparam \sba_req_addr_int_16_iv_0_m2[20] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_addr_int_16_iv_0_m2[21] ( .A(N_733), .B(sbaddr_ff_Z[21]), .C(dmi_req_data[23]), .Y(N_887) ); defparam \sba_req_addr_int_16_iv_0_m2[21] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_addr_int_16_iv_0_m2[22] ( .A(N_733), .B(sbaddr_ff_Z[22]), .C(dmi_req_data[24]), .Y(N_888) ); defparam \sba_req_addr_int_16_iv_0_m2[22] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_addr_int_16_iv_0_m2[23] ( .A(N_733), .B(sbaddr_ff_Z[23]), .C(dmi_req_data[25]), .Y(N_889) ); defparam \sba_req_addr_int_16_iv_0_m2[23] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_addr_int_16_iv_0_m2[24] ( .A(N_733), .B(sbaddr_ff_Z[24]), .C(dmi_req_data[26]), .Y(N_890) ); defparam \sba_req_addr_int_16_iv_0_m2[24] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_addr_int_16_iv_0_m2[25] ( .A(N_733), .B(sbaddr_ff_Z[25]), .C(dmi_req_data[27]), .Y(N_891) ); defparam \sba_req_addr_int_16_iv_0_m2[25] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_addr_int_16_iv_0_m2[26] ( .A(N_733), .B(sbaddr_ff_Z[26]), .C(dmi_req_data[28]), .Y(N_892) ); defparam \sba_req_addr_int_16_iv_0_m2[26] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_addr_int_16_iv_0_m2[27] ( .A(N_733), .B(sbaddr_ff_Z[27]), .C(dmi_req_data[29]), .Y(N_893) ); defparam \sba_req_addr_int_16_iv_0_m2[27] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_addr_int_16_iv_0_m2[28] ( .A(N_733), .B(sbaddr_ff_Z[28]), .C(dmi_req_data[30]), .Y(N_894) ); defparam \sba_req_addr_int_16_iv_0_m2[28] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_addr_int_16_iv_0_m2[29] ( .A(N_733), .B(sbaddr_ff_Z[29]), .C(dmi_req_data[31]), .Y(N_895) ); defparam \sba_req_addr_int_16_iv_0_m2[29] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_addr_int_16_iv_0_m2[30] ( .A(N_733), .B(sbaddr_ff_Z[30]), .C(dmi_req_data[32]), .Y(N_896) ); defparam \sba_req_addr_int_16_iv_0_m2[30] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_addr_int_16_iv_0_m2[31] ( .A(N_733), .B(sbaddr_ff_Z[31]), .C(dmi_req_data[33]), .Y(N_897) ); defparam \sba_req_addr_int_16_iv_0_m2[31] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_wr_data_int_10_1_iv_0_m2[16] ( .A(N_728), .B(sbdata_ff_Z[16]), .C(dmi_req_data[18]), .Y(N_919) ); defparam \sba_req_wr_data_int_10_1_iv_0_m2[16] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_wr_data_int_10_1_iv_0_m2[17] ( .A(N_728), .B(sbdata_ff_Z[17]), .C(dmi_req_data[19]), .Y(N_920) ); defparam \sba_req_wr_data_int_10_1_iv_0_m2[17] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_wr_data_int_10_1_iv_0_m2[18] ( .A(N_728), .B(sbdata_ff_Z[18]), .C(dmi_req_data[20]), .Y(N_921) ); defparam \sba_req_wr_data_int_10_1_iv_0_m2[18] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_wr_data_int_10_1_iv_0_m2[19] ( .A(N_728), .B(sbdata_ff_Z[19]), .C(dmi_req_data[21]), .Y(N_922) ); defparam \sba_req_wr_data_int_10_1_iv_0_m2[19] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_wr_data_int_10_1_iv_0_m2[21] ( .A(N_728), .B(sbdata_ff_Z[21]), .C(dmi_req_data[23]), .Y(N_924) ); defparam \sba_req_wr_data_int_10_1_iv_0_m2[21] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_wr_data_int_10_1_iv_0_m2[22] ( .A(N_728), .B(sbdata_ff_Z[22]), .C(dmi_req_data[24]), .Y(N_925) ); defparam \sba_req_wr_data_int_10_1_iv_0_m2[22] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_wr_data_int_10_1_iv_0_m2[23] ( .A(N_728), .B(sbdata_ff_Z[23]), .C(dmi_req_data[25]), .Y(N_926) ); defparam \sba_req_wr_data_int_10_1_iv_0_m2[23] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_wr_data_int_10_0_iv_0_m2_1[24] ( .A(N_728), .B(sbdata_ff_Z[24]), .C(dmi_req_data[26]), .Y(N_927) ); defparam \sba_req_wr_data_int_10_0_iv_0_m2_1[24] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_wr_data_int_10_0_iv_0_m2_1[25] ( .A(N_728), .B(sbdata_ff_Z[25]), .C(dmi_req_data[27]), .Y(N_928) ); defparam \sba_req_wr_data_int_10_0_iv_0_m2_1[25] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_wr_data_int_10_0_iv_0_m2_1[26] ( .A(N_728), .B(sbdata_ff_Z[26]), .C(dmi_req_data[28]), .Y(N_929) ); defparam \sba_req_wr_data_int_10_0_iv_0_m2_1[26] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_wr_data_int_10_0_iv_0_m2_1[27] ( .A(N_728), .B(sbdata_ff_Z[27]), .C(dmi_req_data[29]), .Y(N_930) ); defparam \sba_req_wr_data_int_10_0_iv_0_m2_1[27] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_wr_data_int_10_0_iv_0_m2_1[28] ( .A(N_728), .B(sbdata_ff_Z[28]), .C(dmi_req_data[30]), .Y(N_931) ); defparam \sba_req_wr_data_int_10_0_iv_0_m2_1[28] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_wr_data_int_10_0_iv_0_m2_1[29] ( .A(N_728), .B(sbdata_ff_Z[29]), .C(dmi_req_data[31]), .Y(N_932) ); defparam \sba_req_wr_data_int_10_0_iv_0_m2_1[29] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_wr_data_int_10_0_iv_0_m2_1[30] ( .A(N_728), .B(sbdata_ff_Z[30]), .C(dmi_req_data[32]), .Y(N_933) ); defparam \sba_req_wr_data_int_10_0_iv_0_m2_1[30] .INIT=8'hD8; // @48:15070 CFG3 \sbaddr_i_1_m2[1] ( .A(N_733), .B(sbaddr_ff_Z[1]), .C(dmi_req_data[3]), .Y(N_956) ); defparam \sbaddr_i_1_m2[1] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_wr_data_int_10_1_iv_0_m2[20] ( .A(N_728), .B(sbdata_ff_Z[20]), .C(dmi_req_data[22]), .Y(N_923) ); defparam \sba_req_wr_data_int_10_1_iv_0_m2[20] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_wr_data_int_10_0_iv_0_m2_1[31] ( .A(N_728), .B(sbdata_ff_Z[31]), .C(dmi_req_data[33]), .Y(N_934) ); defparam \sba_req_wr_data_int_10_0_iv_0_m2_1[31] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_addr_int_16_iv_0_m2[14] ( .A(N_733), .B(un12lto14), .C(dmi_req_data[16]), .Y(N_880) ); defparam \sba_req_addr_int_16_iv_0_m2[14] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_addr_int_16_iv_0_m2[3] ( .A(N_733), .B(sbaddr_ff_Z[3]), .C(dmi_req_data[5]), .Y(N_869) ); defparam \sba_req_addr_int_16_iv_0_m2[3] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_wr_data_int_10_0_iv_0_m2[27] ( .A(N_728), .B(sbdata_ff_Z[3]), .C(dmi_req_data[5]), .Y(N_818) ); defparam \sba_req_wr_data_int_10_0_iv_0_m2[27] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_addr_int_16_iv_0_m2[11] ( .A(N_733), .B(sbaddr_ff_Z[11]), .C(dmi_req_data[13]), .Y(N_877) ); defparam \sba_req_addr_int_16_iv_0_m2[11] .INIT=8'hD8; // @48:15261 CFG3 \sba_req_wr_data_int_10_0_iv_0_m2[28] ( .A(N_728), .B(sbdata_ff_Z[4]), .C(dmi_req_data[6]), .Y(N_817) ); defparam \sba_req_wr_data_int_10_0_iv_0_m2[28] .INIT=8'hD8; // @48:15070 CFG3 \sbaddr_i_1_m2[0] ( .A(N_733), .B(sbaddr_ff_Z[0]), .C(dmi_req_data[2]), .Y(N_957) ); defparam \sbaddr_i_1_m2[0] .INIT=8'hD8; // @48:14339 CFG3 \cmderr_ff_4_i_m3[1] ( .A(dmi_req_data[11]), .B(N_358_i), .C(cmderr_cmb_3_sqmuxa), .Y(N_946) ); defparam \cmderr_ff_4_i_m3[1] .INIT=8'hB8; // @48:15261 CFG3 \sba_req_wr_data_int_10_0_iv_0_m2[24] ( .A(N_728), .B(sbdata_ff_Z[0]), .C(dmi_req_data[2]), .Y(N_815) ); defparam \sba_req_wr_data_int_10_0_iv_0_m2[24] .INIT=8'hD8; // @48:14023 CFG4 \dmi_rdata_0_iv_0_0[9] ( .A(abstractcs_cmderr[1]), .B(data_0_reg[9]), .C(N_1552), .D(N_846), .Y(dmi_rdata_0_iv_0_0_Z[9]) ); defparam \dmi_rdata_0_iv_0_0[9] .INIT=16'hC0EA; // @48:14023 CFG4 \dmi_rdata_0_iv_0_0[8] ( .A(abstractcs_cmderr[0]), .B(data_0_reg[8]), .C(N_1552), .D(N_846), .Y(dmi_rdata_0_iv_0_0_Z[8]) ); defparam \dmi_rdata_0_iv_0_0[8] .INIT=16'hC0EA; // @48:14023 CFG4 \dmi_rdata_0_iv_0_0[18] ( .A(data_0_reg[18]), .B(dmstatus_allany_havereset), .C(N_1552), .D(N_1741), .Y(dmi_rdata_0_iv_0_0_Z[18]) ); defparam \dmi_rdata_0_iv_0_0[18] .INIT=16'hECA0; // @48:14023 CFG4 \dmi_rdata_0_iv_0_0[19] ( .A(data_0_reg[19]), .B(dmstatus_allany_havereset), .C(N_1552), .D(N_1741), .Y(dmi_rdata_0_iv_0_0_Z[19]) ); defparam \dmi_rdata_0_iv_0_0[19] .INIT=16'hECA0; // @48:14023 CFG4 \dmi_rdata_0_iv_0_0[16] ( .A(data_0_reg[16]), .B(dmstatus_allany_resumeack), .C(N_1552), .D(N_1741), .Y(dmi_rdata_0_iv_0_0_Z[16]) ); defparam \dmi_rdata_0_iv_0_0[16] .INIT=16'hECA0; // @48:14023 CFG4 \dmi_rdata_0_iv_0_0[17] ( .A(data_0_reg[17]), .B(dmstatus_allany_resumeack), .C(N_1552), .D(N_1741), .Y(dmi_rdata_0_iv_0_0_Z[17]) ); defparam \dmi_rdata_0_iv_0_0[17] .INIT=16'hECA0; // @48:14023 CFG4 \dmi_rdata_0_iv_0_0[10] ( .A(abstractcs_cmderr[2]), .B(data_0_reg[10]), .C(N_1552), .D(N_846), .Y(dmi_rdata_0_iv_0_0_Z[10]) ); defparam \dmi_rdata_0_iv_0_0[10] .INIT=16'hC0EA; // @48:14023 CFG4 \dmi_rdata_0_iv_0_0[12] ( .A(abstractcs_busy), .B(data_0_reg[12]), .C(N_1552), .D(N_846), .Y(dmi_rdata_0_iv_0_0_Z[12]) ); defparam \dmi_rdata_0_iv_0_0[12] .INIT=16'hC0EA; // @48:14023 CFG3 \dmi_rdata_0_iv_0_0[7] ( .A(N_1741), .B(data_0_reg[7]), .C(N_1552), .Y(dmi_rdata_0_iv_0_0_Z[7]) ); defparam \dmi_rdata_0_iv_0_0[7] .INIT=8'hEA; // @48:14023 CFG4 \dmi_rdata_0_iv_0_0[28] ( .A(data_0_reg[28]), .B(dmcontrol_ackhavereset), .C(N_1552), .D(N_1752), .Y(dmi_rdata_0_iv_0_0_Z[28]) ); defparam \dmi_rdata_0_iv_0_0[28] .INIT=16'hECA0; // @48:14023 CFG4 \dmi_rdata_0_iv_0_0[31] ( .A(data_0_reg[31]), .B(dmcontrol_haltreq), .C(N_1552), .D(N_1752), .Y(dmi_rdata_0_iv_0_0_Z[31]) ); defparam \dmi_rdata_0_iv_0_0[31] .INIT=16'hECA0; // @48:14023 CFG4 \dmi_rdata_0_iv_0_0[30] ( .A(data_0_reg[30]), .B(dmcontrol_resumereq), .C(N_1552), .D(N_1752), .Y(dmi_rdata_0_iv_0_0_Z[30]) ); defparam \dmi_rdata_0_iv_0_0[30] .INIT=16'hECA0; // @48:14736 CFG4 \debug_state_ns_0_0[3] ( .A(trace_priv_i), .B(cpu_debug_halt_ack_net), .C(debug_state[2]), .D(debug_state_ns_0_a3_1_0_Z[1]), .Y(debug_state_ns_0_0_Z[3]) ); defparam \debug_state_ns_0_0[3] .INIT=16'hEAC0; // @48:15129 CFG4 sba_rd_req_cmb_2_sqmuxa_1_i_a2_4 ( .A(dmi_req_data[23]), .B(dmi_req_data[21]), .C(dmi_req_data[16]), .D(dmi_req_data[15]), .Y(sba_rd_req_cmb_2_sqmuxa_1_i_a2_4_Z) ); defparam sba_rd_req_cmb_2_sqmuxa_1_i_a2_4.INIT=16'h0111; // @48:13965 CFG4 un1_dmi_req_command_0_a3_1 ( .A(dmi_req_data[36]), .B(N_798), .C(N_812), .D(dmi_req_data[34]), .Y(un1_dmi_req_command_0_a3_1_Z) ); defparam un1_dmi_req_command_0_a3_1.INIT=16'h0200; // @48:14398 CFG4 cmderr_cmb_3_sqmuxa_0_a2_2_4 ( .A(dmi_req_data[31]), .B(dmi_req_data[29]), .C(dmi_req_data[28]), .D(dmi_req_data[26]), .Y(cmderr_cmb_3_sqmuxa_0_a2_2_4_Z) ); defparam cmderr_cmb_3_sqmuxa_0_a2_2_4.INIT=16'h0001; // @48:15129 CFG3 sbcs_to_err_0_sqmuxa ( .A(mem_rdata34), .B(dmi_req_data[14]), .C(sbcs_ba_err_0_sqmuxa_2_Z), .Y(sbcs_to_err_0_sqmuxa_Z) ); defparam sbcs_to_err_0_sqmuxa.INIT=8'h80; // @48:15129 CFG3 sbcs_ba_err_0_sqmuxa ( .A(mem_rdata34), .B(dmi_req_data[15]), .C(sbcs_ba_err_0_sqmuxa_2_Z), .Y(sbcs_ba_err_0_sqmuxa_Z) ); defparam sbcs_ba_err_0_sqmuxa.INIT=8'h80; // @48:14398 CFG4 un1_next_state_0_sqmuxa_3_0 ( .A(N_723_1), .B(next_state_1_sqmuxa_3), .C(N_806), .D(un1_next_state_0_sqmuxa_3_0_0_Z), .Y(un1_next_state_0_sqmuxa_3_i_0) ); defparam un1_next_state_0_sqmuxa_3_0.INIT=16'hFFCD; // @48:14736 CFG4 \debug_state_ns_0[1] ( .A(debug_state_ns_0_1_Z[1]), .B(debug_state[5]), .C(debug_exit_retr), .D(init_wr_dcsr_step_en), .Y(debug_state_ns[1]) ); defparam \debug_state_ns_0[1] .INIT=16'hAAEA; // @48:14736 CFG4 \debug_state_ns_0[5] ( .A(dmstatus_allany_resumeack), .B(debug_state[3]), .C(N_1303), .D(dmcontrol_resumereq), .Y(debug_state_ns[5]) ); defparam \debug_state_ns_0[5] .INIT=16'hF4F0; // @48:15192 CFG3 \sba_state_ns_1_0_.m14 ( .A(next_state21), .B(sba_state_Z[1]), .C(N_94), .Y(m14_0) ); defparam \sba_state_ns_1_0_.m14 .INIT=8'h02; // @48:15261 CFG3 \sba_req_wr_data_int_10_1_iv_0_a2_0[15] ( .A(N_94), .B(N_1542), .C(N_1589), .Y(N_1654) ); defparam \sba_req_wr_data_int_10_1_iv_0_a2_0[15] .INIT=8'h40; // @48:15550 CFG4 \prescale_counter_4[1] ( .A(prescale_counter_Z[1]), .B(prescale_counter_Z[0]), .C(prescale_counter6_Z), .D(count_en_0_Z), .Y(prescale_counter_4_Z[1]) ); defparam \prescale_counter_4[1] .INIT=16'h6A00; // @48:15368 CFG3 sba_req_wr_byte_en_int_0_sqmuxa ( .A(sba_req_addr_int26_Z), .B(N_94), .C(N_685_i), .Y(sba_req_wr_byte_en_int_0_sqmuxa_Z) ); defparam sba_req_wr_byte_en_int_0_sqmuxa.INIT=8'h01; // @48:15368 CFG3 sba_req_valid_int_0_sqmuxa ( .A(un1_sba_rd_req_cmb_1_Z), .B(N_94), .C(N_685_i), .Y(sba_req_valid_int_0_sqmuxa_Z) ); defparam sba_req_valid_int_0_sqmuxa.INIT=8'h02; // @48:15261 CFG4 \sbdata_ff_9_iv_0_a2_1[2] ( .A(N_1589), .B(N_1549), .C(N_1541), .D(N_1823), .Y(N_1658) ); defparam \sbdata_ff_9_iv_0_a2_1[2] .INIT=16'hC888; // @48:14736 CFG4 \debug_state_ns_0[2] ( .A(debug_state[2]), .B(debug_state[1]), .C(cpu_debug_halt_req_net), .D(cpu_debug_halt_ack_net), .Y(debug_state_ns[2]) ); defparam \debug_state_ns_0[2] .INIT=16'hC0EA; // @48:15261 CFG3 sba_req_wr_byte_en_int_13_ss0_0 ( .A(N_1832), .B(un1_sbcs_busy_ff13_3_i), .C(N_81_i), .Y(sba_req_wr_byte_en_int_13_ss0) ); defparam sba_req_wr_byte_en_int_13_ss0_0.INIT=8'hEA; // @48:15261 CFG4 sba_req_wr_byte_en_int_13_m2s2_0 ( .A(un1_sbcs_busy_ff13_3_i), .B(N_1551), .C(N_81_i), .D(sbcs_access[0]), .Y(sba_req_wr_byte_en_int_13_sm0) ); defparam sba_req_wr_byte_en_int_13_m2s2_0.INIT=16'hA0EC; // @48:14023 CFG3 \dmi_rdata_0_iv_0_a2[10] ( .A(N_1547), .B(un16_dmi_valid_i), .C(N_802), .Y(N_1617) ); defparam \dmi_rdata_0_iv_0_a2[10] .INIT=8'h08; // @48:14023 CFG3 \dmi_rdata_0_iv_0_a2_1[8] ( .A(N_1547), .B(N_802), .C(sbcs_busyerror_0_sqmuxa), .Y(N_1570) ); defparam \dmi_rdata_0_iv_0_a2_1[8] .INIT=8'h20; // @48:14023 CFG3 \dmi_rdata_0_iv_0_a2_0[8] ( .A(N_1547), .B(un12_dmi_valid_i), .C(N_802), .Y(N_1569) ); defparam \dmi_rdata_0_iv_0_a2_0[8] .INIT=8'h08; // @48:15100 CFG4 sbcs_busyerror_0_sqmuxa_0_a3 ( .A(sba_busy), .B(dmi_req_data[34]), .C(dmi_req_data[36]), .D(N_800), .Y(sbcs_busyerror_0_sqmuxa) ); defparam sbcs_busyerror_0_sqmuxa_0_a3.INIT=16'h0010; // @48:15100 CFG4 sbcs_busyerror_1_sqmuxa_1_0_a3 ( .A(sba_busy), .B(dmi_req_data[34]), .C(dmi_req_data[36]), .D(N_800), .Y(sbcs_busyerror_1_sqmuxa_1) ); defparam sbcs_busyerror_1_sqmuxa_1_0_a3.INIT=16'h0020; // @48:14698 CFG4 N_123_i ( .A(dmcontrol_haltreq), .B(debug_state[2]), .C(cpu_debug_halt_ack_net), .D(debug_state[1]), .Y(N_123_i_1z) ); defparam N_123_i.INIT=16'h0A08; // @48:15259 CFG2 sbcs_readonaddr_ff_RNO ( .A(dmi_req_data[22]), .B(N_81_i), .Y(N_693_i) ); defparam sbcs_readonaddr_ff_RNO.INIT=4'h8; // @48:15259 CFG2 sbcs_readondata_ff_RNO ( .A(dmi_req_data[17]), .B(N_81_i), .Y(N_691_i) ); defparam sbcs_readondata_ff_RNO.INIT=4'h8; // @48:15259 CFG4 sbcs_busy_ff_RNO ( .A(N_81_i), .B(sba_req_addr_int14), .C(N_867), .D(N_103), .Y(N_699_i) ); defparam sbcs_busy_ff_RNO.INIT=16'h0002; // @48:15261 CFG2 sbcs_busyerror_ff_RNO_1 ( .A(un16_dmi_valid_i), .B(dmi_req_data[24]), .Y(N_712_i) ); defparam sbcs_busyerror_ff_RNO_1.INIT=4'h8; // @48:15261 CFG3 \un1_access_valid_0_a2_0[2] ( .A(sba_state_Z[1]), .B(sba_state_Z[0]), .C(N_822), .Y(N_1831) ); defparam \un1_access_valid_0_a2_0[2] .INIT=8'h80; // @48:15261 CFG4 \sbcs_access_ff_3_0[1] ( .A(dmi_req_data[20]), .B(N_403_i), .C(sbcs_access_ff_Z[1]), .D(N_81_i), .Y(sbcs_access_ff_3[1]) ); defparam \sbcs_access_ff_3_0[1] .INIT=16'hB8FF; // @48:14023 CFG4 \dmi_rdata_0_iv_0_2[0] ( .A(data_0_reg[0]), .B(dmi_rdata_0_iv_0_0_Z[0]), .C(N_846), .D(N_1552), .Y(dmi_rdata_0_iv_0_2_Z[0]) ); defparam \dmi_rdata_0_iv_0_2[0] .INIT=16'hEFCF; // @48:14023 CFG4 \dmi_rdata_0_iv_0_2[1] ( .A(data_0_reg[1]), .B(N_1552), .C(dmi_rdata_0_iv_0_0_Z[1]), .D(N_1617), .Y(dmi_rdata_0_iv_0_2_Z[1]) ); defparam \dmi_rdata_0_iv_0_2[1] .INIT=16'hFFF8; // @48:14023 CFG3 \dmi_rdata_0_iv_0_0[2] ( .A(N_1617), .B(data_0_reg[2]), .C(N_1552), .Y(dmi_rdata_0_iv_0_0_Z[2]) ); defparam \dmi_rdata_0_iv_0_0[2] .INIT=8'hEA; // @48:14023 CFG3 \dmi_rdata_0_iv_0_0[29] ( .A(N_1617), .B(data_0_reg[29]), .C(N_1552), .Y(dmi_rdata_0_iv_0_0_Z[29]) ); defparam \dmi_rdata_0_iv_0_0[29] .INIT=8'hEA; // @48:13980 CFG3 dmi_resp_valid_0_0 ( .A(mem_wr), .B(N_802), .C(mem_rd), .Y(dmi_resp_valid_0_0_1z) ); defparam dmi_resp_valid_0_0.INIT=8'hEA; // @48:15129 CFG4 sba_rd_req_cmb_2_sqmuxa_1_i_a2_6 ( .A(dmi_req_data[18]), .B(sba_rd_req_cmb_2_sqmuxa_1_i_a2_4_Z), .C(dmi_req_data[25]), .D(dmi_req_data[20]), .Y(sba_rd_req_cmb_2_sqmuxa_1_i_a2_6_Z) ); defparam sba_rd_req_cmb_2_sqmuxa_1_i_a2_6.INIT=16'h0004; // @48:14398 CFG4 cmderr_cmb_3_sqmuxa_0_a2_2 ( .A(dmi_req_data[27]), .B(dmi_req_data[30]), .C(cmderr_cmb_3_sqmuxa_0_a2_2_3_Z), .D(cmderr_cmb_3_sqmuxa_0_a2_2_4_Z), .Y(N_1669) ); defparam cmderr_cmb_3_sqmuxa_0_a2_2.INIT=16'h1000; // @48:13965 CFG2 un1_dmi_req_command_0_a3 ( .A(un1_dmi_req_command_0_a3_1_Z), .B(N_837), .Y(un1_dmi_req_command_i) ); defparam un1_dmi_req_command_0_a3.INIT=4'h2; // @48:15261 CFG4 un1_sbcs_readonaddr_ff7_4 ( .A(N_81_i), .B(sba_req_addr_int_1_sqmuxa_1_Z), .C(sba_req_addr_int_1_sqmuxa_2_Z), .D(sba_req_wr_byte_en_int_0_sqmuxa_Z), .Y(un1_sbcs_readonaddr_ff7_4_sn) ); defparam un1_sbcs_readonaddr_ff7_4.INIT=16'hFFFD; // @48:15192 CFG4 \sba_state_ns_1_0_.m12 ( .A(sba_state_Z[1]), .B(timeout_Z), .C(next_state21), .D(N_94), .Y(N_18_mux) ); defparam \sba_state_ns_1_0_.m12 .INIT=16'h0001; // @48:14495 CFG4 un1_dmi_req_command_0_a3_RNIR9T5J ( .A(cpu_debug_active_net), .B(dmi_req_data[15]), .C(debug_gpr_addr_1_sqmuxa_0_268_a2_0_a2_1_Z), .D(un1_dmi_req_command_i), .Y(N_1624) ); defparam un1_dmi_req_command_0_a3_RNIR9T5J.INIT=16'h2000; // @48:15351 CFG4 un1_sbcs_busy_ff13_3_2_RNO ( .A(sba_state_Z[0]), .B(N_127), .C(next_state7), .D(N_115), .Y(d_N_7_1) ); defparam un1_sbcs_busy_ff13_3_2_RNO.INIT=16'h0023; // @48:15261 CFG4 \sba_req_wr_data_int_10_0_iv_0_a3_1[24] ( .A(N_99), .B(N_1551), .C(N_815), .D(sbcs_access[0]), .Y(N_997) ); defparam \sba_req_wr_data_int_10_0_iv_0_a3_1[24] .INIT=16'h0040; // @48:15261 CFG4 \sba_req_wr_data_int_10_0_iv_0_a3_1[27] ( .A(N_99), .B(N_1551), .C(N_818), .D(sbcs_access[0]), .Y(N_1001) ); defparam \sba_req_wr_data_int_10_0_iv_0_a3_1[27] .INIT=16'h0040; // @48:15261 CFG4 \sba_req_wr_data_int_10_0_iv_0_a3_1[26] ( .A(N_99), .B(N_1551), .C(N_819), .D(sbcs_access[0]), .Y(N_1005) ); defparam \sba_req_wr_data_int_10_0_iv_0_a3_1[26] .INIT=16'h0040; // @48:15261 CFG4 \sba_req_wr_data_int_10_0_iv_0_a3_1[30] ( .A(N_99), .B(N_1551), .C(N_821), .D(sbcs_access[0]), .Y(N_1013) ); defparam \sba_req_wr_data_int_10_0_iv_0_a3_1[30] .INIT=16'h0040; // @48:15261 CFG4 \sba_req_wr_data_int_10_0_iv_0_a3_1[29] ( .A(N_99), .B(N_1551), .C(N_816), .D(sbcs_access[0]), .Y(N_1017) ); defparam \sba_req_wr_data_int_10_0_iv_0_a3_1[29] .INIT=16'h0040; // @48:15261 CFG4 \sba_req_wr_data_int_10_0_iv_0_a3_1[28] ( .A(N_99), .B(N_1551), .C(N_817), .D(sbcs_access[0]), .Y(N_1021) ); defparam \sba_req_wr_data_int_10_0_iv_0_a3_1[28] .INIT=16'h0040; // @48:14023 CFG4 \dmi_rdata_0_iv_0_a3_0[10] ( .A(sbaddr_ff_Z[10]), .B(un12_dmi_valid_i), .C(N_802), .D(N_1547), .Y(N_1087) ); defparam \dmi_rdata_0_iv_0_a3_0[10] .INIT=16'h0800; // @48:14023 CFG4 \dmi_rdata_0_iv_0_a3[1] ( .A(sbcs_busyerror_0_sqmuxa), .B(N_1547), .C(sbdata_ff_Z[1]), .D(N_802), .Y(N_1109) ); defparam \dmi_rdata_0_iv_0_a3[1] .INIT=16'h0080; // @48:14023 CFG4 \dmi_rdata_0_iv_0_a3_0[7] ( .A(sbaddr_ff_Z[7]), .B(un12_dmi_valid_i), .C(N_802), .D(N_1547), .Y(N_1129) ); defparam \dmi_rdata_0_iv_0_a3_0[7] .INIT=16'h0800; // @48:14023 CFG4 \dmi_rdata_0_iv_0_a3_0[28] ( .A(sbaddr_ff_Z[28]), .B(un12_dmi_valid_i), .C(N_802), .D(N_1547), .Y(N_1139) ); defparam \dmi_rdata_0_iv_0_a3_0[28] .INIT=16'h0800; // @48:14023 CFG4 \dmi_rdata_0_iv_0_a3_0[30] ( .A(sbaddr_ff_Z[30]), .B(un12_dmi_valid_i), .C(N_802), .D(N_1547), .Y(N_1143) ); defparam \dmi_rdata_0_iv_0_a3_0[30] .INIT=16'h0800; // @48:14023 CFG4 \dmi_rdata_0_iv_0_a3_0[11] ( .A(sbaddr_ff_Z[11]), .B(un12_dmi_valid_i), .C(N_802), .D(N_1547), .Y(N_1170) ); defparam \dmi_rdata_0_iv_0_a3_0[11] .INIT=16'h0800; // @48:14023 CFG4 \dmi_rdata_0_iv_0_a3[29] ( .A(sbcs_busyerror_0_sqmuxa), .B(N_1547), .C(sbdata_ff_Z[29]), .D(N_802), .Y(N_1242) ); defparam \dmi_rdata_0_iv_0_a3[29] .INIT=16'h0080; // @48:14023 CFG4 \dmi_rdata_0_iv_0_a3_1[21] ( .A(un16_dmi_valid_i), .B(sba_busy), .C(N_1547), .D(N_802), .Y(N_1266) ); defparam \dmi_rdata_0_iv_0_a3_1[21] .INIT=16'h0080; // @48:14023 CFG4 \dmi_rdata_0_iv_0_a3_1[15] ( .A(sbcs_readondata_ff_Z), .B(un16_dmi_valid_i), .C(N_802), .D(N_1547), .Y(N_1274) ); defparam \dmi_rdata_0_iv_0_a3_1[15] .INIT=16'h0800; // @48:14023 CFG4 \dmi_rdata_0_iv_0_a3[2] ( .A(sbcs_busyerror_0_sqmuxa), .B(N_1547), .C(sbdata_ff_Z[2]), .D(N_802), .Y(N_1296) ); defparam \dmi_rdata_0_iv_0_a3[2] .INIT=16'h0080; // @48:14339 CFG4 \cmderr_ff_4_0[0] ( .A(dmi_req_data[10]), .B(abstractcs_cmderr[0]), .C(cmderr_cmb_1_sqmuxa_1), .D(N_358_i), .Y(cmderr_ff_4_0) ); defparam \cmderr_ff_4_0[0] .INIT=16'h44F0; // @48:14339 CFG4 \command_reg_state_4_0_a3_0_1[2] ( .A(N_805), .B(N_81_i), .C(N_1647), .D(N_1840), .Y(N_1098_1) ); defparam \command_reg_state_4_0_a3_0_1[2] .INIT=16'h4000; // @48:15550 CFG3 \prescale_counter_4[2] ( .A(CO1), .B(count_en_0_Z), .C(prescale_counter_Z[2]), .Y(prescale_counter_4_Z[2]) ); defparam \prescale_counter_4[2] .INIT=8'h48; // @48:15353 CFG3 sbcs_busy_ff13_i_o3 ( .A(next_state21), .B(N_127), .C(sbcs_busy_ff15_0_a3_0_Z), .Y(N_95) ); defparam sbcs_busy_ff13_i_o3.INIT=8'hEC; // @48:15480 CFG4 sbcs_busy_ff15_0 ( .A(next_state28_Z), .B(next_state21), .C(N_127), .D(sbcs_busy_ff15_0_a3_0_Z), .Y(sbcs_busy_ff15) ); defparam sbcs_busy_ff15_0.INIT=16'hDC50; // @48:15070 CFG4 sbcs_uar_err ( .A(sbcs_ba_err_0_sqmuxa_2_Z), .B(mem_rdata34), .C(sbcs_uar_err_ff_Z), .D(dmi_req_data[16]), .Y(sbcs_uar_err_Z) ); defparam sbcs_uar_err.INIT=16'h70F0; // @48:15261 CFG4 un1_sbcs_readonaddr_ff7_5_2 ( .A(sba_rd_req_cmb), .B(N_81_i), .C(N_685_i), .D(N_94), .Y(un1_sbcs_readonaddr_ff7_5_2_Z) ); defparam un1_sbcs_readonaddr_ff7_5_2.INIT=16'h3337; // @48:14023 CFG4 \dmi_rdata_0_iv_0_a3_1[13] ( .A(sbcs_ba_err_ff_Z), .B(un16_dmi_valid_i), .C(N_802), .D(N_1547), .Y(N_1282) ); defparam \dmi_rdata_0_iv_0_a3_1[13] .INIT=16'h0800; // @48:14023 CFG4 \dmi_rdata_0_iv_0_a3_1[20] ( .A(sbcs_readonaddr_ff_Z), .B(un16_dmi_valid_i), .C(N_802), .D(N_1547), .Y(N_1270) ); defparam \dmi_rdata_0_iv_0_a3_1[20] .INIT=16'h0800; // @48:14495 CFG3 un1_clk_en_dm_1_i_a2 ( .A(N_1552), .B(N_812), .C(mem_wr), .Y(N_1567) ); defparam un1_clk_en_dm_1_i_a2.INIT=8'h20; // @48:14023 CFG4 \dmi_rdata_0_iv_0_a3_1[14] ( .A(sbcs_uar_err_ff_Z), .B(un16_dmi_valid_i), .C(N_802), .D(N_1547), .Y(N_1278) ); defparam \dmi_rdata_0_iv_0_a3_1[14] .INIT=16'h0800; // @48:14023 CFG4 \dmi_rdata_0_iv_0_a3_1[22] ( .A(N_802), .B(N_1547), .C(dmi_resp_data[0]), .D(un16_dmi_valid_i), .Y(N_1262) ); defparam \dmi_rdata_0_iv_0_a3_1[22] .INIT=16'h4000; // @48:15261 CFG4 \sba_req_wr_data_int_10_1_iv_0_a2[7] ( .A(N_1823), .B(N_1744), .C(N_1542), .D(N_1544), .Y(N_1657) ); defparam \sba_req_wr_data_int_10_1_iv_0_a2[7] .INIT=16'hF080; // @48:15261 CFG4 \sba_req_wr_data_int_10_0_iv_0_a3_1[25] ( .A(N_99), .B(N_1551), .C(N_814), .D(sbcs_access[0]), .Y(N_1009) ); defparam \sba_req_wr_data_int_10_0_iv_0_a3_1[25] .INIT=16'h0040; // @48:14023 CFG4 \dmi_rdata_0_iv_0_a3[31] ( .A(sbcs_busyerror_0_sqmuxa), .B(N_1547), .C(sbdata_ff_Z[31]), .D(N_802), .Y(N_1134) ); defparam \dmi_rdata_0_iv_0_a3[31] .INIT=16'h0080; // @48:14339 CFG4 \cmderr_ff_4_0[2] ( .A(dmi_req_data[12]), .B(abstractcs_cmderr[2]), .C(cmderr_cmb_3_sqmuxa), .D(N_358_i), .Y(cmderr_ff_4_2) ); defparam \cmderr_ff_4_0[2] .INIT=16'h44F0; // @48:14120 CFG3 dmcontrol_dmactive4_0_a3 ( .A(N_1752), .B(N_812), .C(mem_wr), .Y(dmcontrol_dmactive4) ); defparam dmcontrol_dmactive4_0_a3.INIT=8'h20; // @48:14023 CFG4 \dmi_rdata_0_iv_0_a3[0] ( .A(sbcs_busyerror_0_sqmuxa), .B(N_1547), .C(sbdata_ff_Z[0]), .D(N_802), .Y(N_1113) ); defparam \dmi_rdata_0_iv_0_a3[0] .INIT=16'h0080; // @48:15261 CFG4 \sbdata_ff_9_0_iv_0_0[14] ( .A(cpu_d_resp_rd_data_net[14]), .B(N_828), .C(N_1656), .D(N_1650), .Y(sbdata_ff_9_0_iv_0_0_Z[14]) ); defparam \sbdata_ff_9_0_iv_0_0[14] .INIT=16'hEAC0; // @48:15261 CFG4 \sbdata_ff_9_0_iv_0_0[9] ( .A(cpu_d_resp_rd_data_net[9]), .B(N_829), .C(N_1656), .D(N_1650), .Y(sbdata_ff_9_0_iv_0_0_Z[9]) ); defparam \sbdata_ff_9_0_iv_0_0[9] .INIT=16'hEAC0; // @48:15261 CFG4 \sbdata_ff_9_0_iv_0_0[8] ( .A(cpu_d_resp_rd_data_net[8]), .B(N_832), .C(N_1656), .D(N_1650), .Y(sbdata_ff_9_0_iv_0_0_Z[8]) ); defparam \sbdata_ff_9_0_iv_0_0[8] .INIT=16'hEAC0; // @48:15261 CFG4 \sbdata_ff_9_0_iv_0_0[12] ( .A(cpu_d_resp_rd_data_net[12]), .B(N_826), .C(N_1656), .D(N_1650), .Y(sbdata_ff_9_0_iv_0_0_Z[12]) ); defparam \sbdata_ff_9_0_iv_0_0[12] .INIT=16'hEAC0; // @48:15261 CFG4 \sbdata_ff_9_0_iv_0_0[13] ( .A(cpu_d_resp_rd_data_net[13]), .B(N_827), .C(N_1656), .D(N_1650), .Y(sbdata_ff_9_0_iv_0_0_Z[13]) ); defparam \sbdata_ff_9_0_iv_0_0[13] .INIT=16'hEAC0; // @48:15261 CFG4 \sbdata_ff_9_0_iv_0_0[11] ( .A(cpu_d_resp_rd_data_net[11]), .B(N_831), .C(N_1656), .D(N_1650), .Y(sbdata_ff_9_0_iv_0_0_Z[11]) ); defparam \sbdata_ff_9_0_iv_0_0[11] .INIT=16'hEAC0; // @48:15261 CFG4 \sbdata_ff_9_0_iv_0_0[15] ( .A(cpu_d_resp_rd_data_net[15]), .B(N_825), .C(N_1656), .D(N_1650), .Y(sbdata_ff_9_0_iv_0_0_Z[15]) ); defparam \sbdata_ff_9_0_iv_0_0[15] .INIT=16'hEAC0; // @48:15261 CFG4 \sbdata_ff_9_0_iv_0_0[10] ( .A(cpu_d_resp_rd_data_net[10]), .B(N_830), .C(N_1656), .D(N_1650), .Y(sbdata_ff_9_0_iv_0_0_Z[10]) ); defparam \sbdata_ff_9_0_iv_0_0[10] .INIT=16'hEAC0; // @48:15261 CFG4 \un1_access_valid_0_a3[2] ( .A(sbcs_access[1]), .B(sbcs_access[2]), .C(sbcs_access[0]), .D(N_1831), .Y(un1_access_valid_0_a3_Z[2]) ); defparam \un1_access_valid_0_a3[2] .INIT=16'h0200; // @48:15261 CFG4 \sbdata_ff_9_0_iv_0[30] ( .A(cpu_d_resp_rd_data_net[30]), .B(N_933), .C(N_1612), .D(N_1560), .Y(sbdata_ff_9[30]) ); defparam \sbdata_ff_9_0_iv_0[30] .INIT=16'hECA0; // @48:15261 CFG4 \sbdata_ff_9_0_iv_0[29] ( .A(cpu_d_resp_rd_data_net[29]), .B(N_932), .C(N_1612), .D(N_1560), .Y(sbdata_ff_9[29]) ); defparam \sbdata_ff_9_0_iv_0[29] .INIT=16'hECA0; // @48:15261 CFG4 \sbdata_ff_9_0_iv_0[28] ( .A(cpu_d_resp_rd_data_net[28]), .B(N_931), .C(N_1612), .D(N_1560), .Y(sbdata_ff_9[28]) ); defparam \sbdata_ff_9_0_iv_0[28] .INIT=16'hECA0; // @48:15261 CFG4 \sbdata_ff_9_0_iv_0[27] ( .A(cpu_d_resp_rd_data_net[27]), .B(N_930), .C(N_1612), .D(N_1560), .Y(sbdata_ff_9[27]) ); defparam \sbdata_ff_9_0_iv_0[27] .INIT=16'hECA0; // @48:15261 CFG4 \sbdata_ff_9_0_iv_0[26] ( .A(cpu_d_resp_rd_data_net[26]), .B(N_929), .C(N_1612), .D(N_1560), .Y(sbdata_ff_9[26]) ); defparam \sbdata_ff_9_0_iv_0[26] .INIT=16'hECA0; // @48:15261 CFG4 \sbdata_ff_9_0_iv_0[25] ( .A(cpu_d_resp_rd_data_net[25]), .B(N_928), .C(N_1612), .D(N_1560), .Y(sbdata_ff_9[25]) ); defparam \sbdata_ff_9_0_iv_0[25] .INIT=16'hECA0; // @48:15261 CFG4 \sbdata_ff_9_0_iv_0[22] ( .A(cpu_d_resp_rd_data_net[22]), .B(N_925), .C(N_1612), .D(N_1560), .Y(sbdata_ff_9[22]) ); defparam \sbdata_ff_9_0_iv_0[22] .INIT=16'hECA0; // @48:15261 CFG4 \sbdata_ff_9_0_iv_0[21] ( .A(cpu_d_resp_rd_data_net[21]), .B(N_924), .C(N_1612), .D(N_1560), .Y(sbdata_ff_9[21]) ); defparam \sbdata_ff_9_0_iv_0[21] .INIT=16'hECA0; // @48:15261 CFG4 \sbdata_ff_9_0_iv_0[18] ( .A(cpu_d_resp_rd_data_net[18]), .B(N_921), .C(N_1612), .D(N_1560), .Y(sbdata_ff_9[18]) ); defparam \sbdata_ff_9_0_iv_0[18] .INIT=16'hECA0; // @48:15261 CFG4 \sbdata_ff_9_0_iv_0[16] ( .A(cpu_d_resp_rd_data_net[16]), .B(N_919), .C(N_1612), .D(N_1560), .Y(sbdata_ff_9[16]) ); defparam \sbdata_ff_9_0_iv_0[16] .INIT=16'hECA0; // @48:15261 CFG4 \sba_req_addr_int_16_iv_0[31] ( .A(N_1553), .B(N_1564), .C(sba_req_addr_int[31]), .D(N_897), .Y(sba_req_addr_int_16[31]) ); defparam \sba_req_addr_int_16_iv_0[31] .INIT=16'hEAC0; // @48:15261 CFG4 \sba_req_addr_int_16_iv_0[30] ( .A(N_1553), .B(N_1564), .C(sba_req_addr_int[30]), .D(N_896), .Y(sba_req_addr_int_16[30]) ); defparam \sba_req_addr_int_16_iv_0[30] .INIT=16'hEAC0; // @48:15261 CFG4 \sba_req_addr_int_16_iv_0[29] ( .A(N_1553), .B(N_1564), .C(sba_req_addr_int[29]), .D(N_895), .Y(sba_req_addr_int_16[29]) ); defparam \sba_req_addr_int_16_iv_0[29] .INIT=16'hEAC0; // @48:15261 CFG4 \sba_req_addr_int_16_iv_0[28] ( .A(N_1553), .B(N_1564), .C(sba_req_addr_int[28]), .D(N_894), .Y(sba_req_addr_int_16[28]) ); defparam \sba_req_addr_int_16_iv_0[28] .INIT=16'hEAC0; // @48:15261 CFG4 \sba_req_addr_int_16_iv_0[27] ( .A(N_1553), .B(N_1564), .C(sba_req_addr_int[27]), .D(N_893), .Y(sba_req_addr_int_16[27]) ); defparam \sba_req_addr_int_16_iv_0[27] .INIT=16'hEAC0; // @48:15261 CFG4 \sba_req_addr_int_16_iv_0[26] ( .A(N_1553), .B(N_1564), .C(sba_req_addr_int[26]), .D(N_892), .Y(sba_req_addr_int_16[26]) ); defparam \sba_req_addr_int_16_iv_0[26] .INIT=16'hEAC0; // @48:15261 CFG4 \sba_req_addr_int_16_iv_0[25] ( .A(N_1553), .B(N_1564), .C(sba_req_addr_int[25]), .D(N_891), .Y(sba_req_addr_int_16[25]) ); defparam \sba_req_addr_int_16_iv_0[25] .INIT=16'hEAC0; // @48:15261 CFG4 \sba_req_addr_int_16_iv_0[24] ( .A(N_1553), .B(N_1564), .C(sba_req_addr_int[24]), .D(N_890), .Y(sba_req_addr_int_16[24]) ); defparam \sba_req_addr_int_16_iv_0[24] .INIT=16'hEAC0; // @48:15261 CFG4 \sba_req_addr_int_16_iv_0[23] ( .A(N_1553), .B(N_1564), .C(sba_req_addr_int[23]), .D(N_889), .Y(sba_req_addr_int_16[23]) ); defparam \sba_req_addr_int_16_iv_0[23] .INIT=16'hEAC0; // @48:15261 CFG4 \sba_req_addr_int_16_iv_0[22] ( .A(N_1553), .B(N_1564), .C(sba_req_addr_int[22]), .D(N_888), .Y(sba_req_addr_int_16[22]) ); defparam \sba_req_addr_int_16_iv_0[22] .INIT=16'hEAC0; // @48:15261 CFG4 \sba_req_addr_int_16_iv_0[21] ( .A(N_1553), .B(N_1564), .C(sba_req_addr_int[21]), .D(N_887), .Y(sba_req_addr_int_16[21]) ); defparam \sba_req_addr_int_16_iv_0[21] .INIT=16'hEAC0; // @48:15261 CFG4 \sba_req_addr_int_16_iv_0[20] ( .A(N_1553), .B(N_1564), .C(sba_req_addr_int[20]), .D(N_886), .Y(sba_req_addr_int_16[20]) ); defparam \sba_req_addr_int_16_iv_0[20] .INIT=16'hEAC0; // @48:15261 CFG4 \sba_req_addr_int_16_iv_0[19] ( .A(N_1553), .B(N_1564), .C(sba_req_addr_int[19]), .D(N_885), .Y(sba_req_addr_int_16[19]) ); defparam \sba_req_addr_int_16_iv_0[19] .INIT=16'hEAC0; // @48:15261 CFG4 \sba_req_addr_int_16_iv_0[18] ( .A(N_1553), .B(N_1564), .C(sba_req_addr_int[18]), .D(N_884), .Y(sba_req_addr_int_16[18]) ); defparam \sba_req_addr_int_16_iv_0[18] .INIT=16'hEAC0; // @48:15261 CFG4 \sba_req_addr_int_16_iv_0[17] ( .A(N_1553), .B(N_1564), .C(sba_req_addr_int[17]), .D(N_883), .Y(sba_req_addr_int_16[17]) ); defparam \sba_req_addr_int_16_iv_0[17] .INIT=16'hEAC0; // @48:15261 CFG4 \sba_req_addr_int_16_iv_0[16] ( .A(N_1553), .B(N_1564), .C(sba_req_addr_int[16]), .D(N_882), .Y(sba_req_addr_int_16[16]) ); defparam \sba_req_addr_int_16_iv_0[16] .INIT=16'hEAC0; // @48:15261 CFG4 \sba_req_addr_int_16_iv_0[12] ( .A(N_1553), .B(N_1564), .C(sba_req_addr_int[12]), .D(N_878), .Y(sba_req_addr_int_16[12]) ); defparam \sba_req_addr_int_16_iv_0[12] .INIT=16'hEAC0; // @48:15261 CFG4 \sba_req_addr_int_16_iv_0[10] ( .A(N_1553), .B(N_1564), .C(sba_req_addr_int[10]), .D(N_876), .Y(sba_req_addr_int_16[10]) ); defparam \sba_req_addr_int_16_iv_0[10] .INIT=16'hEAC0; // @48:15261 CFG4 \sba_req_addr_int_16_iv_0[9] ( .A(N_1553), .B(N_1564), .C(sba_req_addr_int[9]), .D(N_875), .Y(sba_req_addr_int_16[9]) ); defparam \sba_req_addr_int_16_iv_0[9] .INIT=16'hEAC0; // @48:15261 CFG4 \sba_req_addr_int_16_iv_0[8] ( .A(N_1553), .B(N_1564), .C(sba_req_addr_int[8]), .D(N_874), .Y(sba_req_addr_int_16[8]) ); defparam \sba_req_addr_int_16_iv_0[8] .INIT=16'hEAC0; // @48:15261 CFG4 \sba_req_addr_int_16_iv_0[7] ( .A(N_1553), .B(N_1564), .C(sba_req_addr_int[7]), .D(N_873), .Y(sba_req_addr_int_16[7]) ); defparam \sba_req_addr_int_16_iv_0[7] .INIT=16'hEAC0; // @48:15261 CFG4 \sba_req_addr_int_16_iv_0[6] ( .A(N_1553), .B(N_1564), .C(sba_req_addr_int[6]), .D(N_872), .Y(sba_req_addr_int_16[6]) ); defparam \sba_req_addr_int_16_iv_0[6] .INIT=16'hEAC0; // @48:15261 CFG4 \sba_req_addr_int_16_iv_0[4] ( .A(N_1553), .B(N_1564), .C(sba_req_addr_int[4]), .D(N_870), .Y(sba_req_addr_int_16[4]) ); defparam \sba_req_addr_int_16_iv_0[4] .INIT=16'hEAC0; // @48:15261 CFG4 \sba_req_addr_int_16_iv_0[3] ( .A(N_1553), .B(N_1564), .C(sba_req_addr_int[3]), .D(N_869), .Y(sba_req_addr_int_16[3]) ); defparam \sba_req_addr_int_16_iv_0[3] .INIT=16'hEAC0; // @48:15261 CFG4 \sba_req_addr_int_16_iv_0[2] ( .A(N_1553), .B(N_1564), .C(sba_req_addr_int[2]), .D(N_868), .Y(sba_req_addr_int_16[2]) ); defparam \sba_req_addr_int_16_iv_0[2] .INIT=16'hEAC0; // @48:15261 CFG4 \sba_req_addr_int_16_iv_0[13] ( .A(N_1553), .B(N_1564), .C(sba_req_addr_int[13]), .D(N_879), .Y(sba_req_addr_int_16[13]) ); defparam \sba_req_addr_int_16_iv_0[13] .INIT=16'hEAC0; // @48:15261 CFG4 \sba_req_addr_int_16_iv_0[14] ( .A(N_1553), .B(N_1564), .C(sba_req_addr_int[14]), .D(N_880), .Y(sba_req_addr_int_16[14]) ); defparam \sba_req_addr_int_16_iv_0[14] .INIT=16'hEAC0; // @48:15261 CFG4 \sbdata_ff_9_0_iv_0[31] ( .A(cpu_d_resp_rd_data_net[31]), .B(N_934), .C(N_1612), .D(N_1560), .Y(sbdata_ff_9[31]) ); defparam \sbdata_ff_9_0_iv_0[31] .INIT=16'hECA0; // @48:15261 CFG4 \sbdata_ff_9_0_iv_0[17] ( .A(cpu_d_resp_rd_data_net[17]), .B(N_920), .C(N_1612), .D(N_1560), .Y(sbdata_ff_9[17]) ); defparam \sbdata_ff_9_0_iv_0[17] .INIT=16'hECA0; // @48:15261 CFG4 \sbdata_ff_9_0_iv_0[20] ( .A(cpu_d_resp_rd_data_net[20]), .B(N_923), .C(N_1612), .D(N_1560), .Y(sbdata_ff_9[20]) ); defparam \sbdata_ff_9_0_iv_0[20] .INIT=16'hECA0; // @48:15261 CFG4 \sbdata_ff_9_0_iv_0[19] ( .A(cpu_d_resp_rd_data_net[19]), .B(N_922), .C(N_1612), .D(N_1560), .Y(sbdata_ff_9[19]) ); defparam \sbdata_ff_9_0_iv_0[19] .INIT=16'hECA0; // @48:15261 CFG4 \sbdata_ff_9_0_iv_0[24] ( .A(cpu_d_resp_rd_data_net[24]), .B(N_927), .C(N_1612), .D(N_1560), .Y(sbdata_ff_9[24]) ); defparam \sbdata_ff_9_0_iv_0[24] .INIT=16'hECA0; // @48:15261 CFG4 \sba_req_addr_int_16_iv_0[5] ( .A(N_1553), .B(N_1564), .C(sba_req_addr_int[5]), .D(N_871), .Y(sba_req_addr_int_16[5]) ); defparam \sba_req_addr_int_16_iv_0[5] .INIT=16'hEAC0; // @48:15261 CFG4 \sba_req_addr_int_16_iv_0[11] ( .A(N_1553), .B(N_1564), .C(sba_req_addr_int[11]), .D(N_877), .Y(sba_req_addr_int_16[11]) ); defparam \sba_req_addr_int_16_iv_0[11] .INIT=16'hEAC0; // @48:15261 CFG4 \sbdata_ff_9_0_iv_0[23] ( .A(cpu_d_resp_rd_data_net[23]), .B(N_926), .C(N_1612), .D(N_1560), .Y(sbdata_ff_9[23]) ); defparam \sbdata_ff_9_0_iv_0[23] .INIT=16'hECA0; // @48:15261 CFG4 \sba_req_addr_int_16_iv_0[15] ( .A(N_1553), .B(N_1564), .C(sba_req_addr_int[15]), .D(N_881), .Y(sba_req_addr_int_16[15]) ); defparam \sba_req_addr_int_16_iv_0[15] .INIT=16'hEAC0; // @48:15261 CFG4 \un1_access_valid_0_a3[0] ( .A(sbcs_access[1]), .B(sbcs_access[2]), .C(sbcs_access[0]), .D(N_1831), .Y(un1_access_valid_0_a3_Z[0]) ); defparam \un1_access_valid_0_a3[0] .INIT=16'h0100; // @48:14132 CFG4 dmcontrol_dmactive4_0_a3_RNI3B5AH ( .A(dmi_req_data[30]), .B(dmcontrol_dmactive4), .C(dmcontrol_ackhavereset), .D(N_81_i), .Y(N_128_i) ); defparam dmcontrol_dmactive4_0_a3_RNI3B5AH.INIT=16'hB800; // @48:14132 CFG4 dmcontrol_dmactive4_0_a3_RNIVTR8H ( .A(debug_sys_reset), .B(N_81_i), .C(dmi_req_data[3]), .D(dmcontrol_dmactive4), .Y(N_130_i) ); defparam dmcontrol_dmactive4_0_a3_RNIVTR8H.INIT=16'hC088; // @48:14225 CFG4 dmcontrol_dmactive4_0_a3_RNI1K99I ( .A(N_81_i), .B(dmcontrol_haltreq), .C(dmcontrol_dmactive4), .D(dmi_req_data[33]), .Y(N_132_i) ); defparam dmcontrol_dmactive4_0_a3_RNI1K99I.INIT=16'hA808; // @48:14225 CFG4 dmcontrol_dmactive4_0_a3_RNI8UM8I ( .A(N_81_i), .B(dmcontrol_resumereq), .C(dmcontrol_dmactive4), .D(dmi_req_data[32]), .Y(N_134_i) ); defparam dmcontrol_dmactive4_0_a3_RNI8UM8I.INIT=16'hA808; // @48:14337 CFG4 un1_dmi_req_command_0_a3_RNIV779G ( .A(dmi_req_data[19]), .B(un1_dmi_req_command_i), .C(command_reg[17]), .D(N_81_i), .Y(N_136_i) ); defparam un1_dmi_req_command_0_a3_RNIV779G.INIT=16'hB800; // @48:14337 CFG4 \cmderr_ff_4_i_m3_RNI3639C1[1] ( .A(N_81_i), .B(abstractcs_cmderr[1]), .C(N_946), .D(N_358_i), .Y(N_190_i) ); defparam \cmderr_ff_4_i_m3_RNI3639C1[1] .INIT=16'h0C0A; // @48:15259 CFG4 sbcs_autoincrement_ff_RNO ( .A(N_81_i), .B(sbcs_autoincrement_ff_Z), .C(N_403_i), .D(dmi_req_data[18]), .Y(N_695_i) ); defparam sbcs_autoincrement_ff_RNO.INIT=16'hA808; // @48:15259 CFG4 \sbcs_access_ff_RNO[2] ( .A(dmi_req_data[21]), .B(N_403_i), .C(sbcs_access_ff_Z[2]), .D(N_81_i), .Y(N_415_i) ); defparam \sbcs_access_ff_RNO[2] .INIT=16'hB800; // @48:15259 CFG4 \sbcs_access_ff_RNO[0] ( .A(dmi_req_data[19]), .B(N_403_i), .C(sbcs_access_ff_Z[0]), .D(N_81_i), .Y(N_419_i) ); defparam \sbcs_access_ff_RNO[0] .INIT=16'hB800; // @48:15261 CFG4 \sba_req_rd_byte_en_int_13_m2_1[0] ( .A(N_1829), .B(N_956), .C(N_1559), .D(N_1518), .Y(sba_req_rd_byte_en_int_13_m2_1_Z[0]) ); defparam \sba_req_rd_byte_en_int_13_m2_1[0] .INIT=16'h0007; // @48:15261 CFG4 \sba_req_rd_byte_en_int_13_m2_1[2] ( .A(N_1829), .B(N_956), .C(N_1559), .D(N_1518), .Y(sba_req_rd_byte_en_int_13_m2_1_Z[2]) ); defparam \sba_req_rd_byte_en_int_13_m2_1[2] .INIT=16'h000D; // @48:15261 CFG4 \sba_req_wr_data_int_10_1_iv_0_0[17] ( .A(N_814), .B(N_920), .C(N_1651), .D(N_1562), .Y(sba_req_wr_data_int_10_1_iv_0_0_Z[17]) ); defparam \sba_req_wr_data_int_10_1_iv_0_0[17] .INIT=16'hECA0; // @48:15261 CFG4 \sba_req_wr_data_int_10_1_iv_0_0[11] ( .A(N_831), .B(N_818), .C(N_1654), .D(N_1649), .Y(sba_req_wr_data_int_10_1_iv_0_0_Z[11]) ); defparam \sba_req_wr_data_int_10_1_iv_0_0[11] .INIT=16'hECA0; // @48:15261 CFG4 \sba_req_wr_data_int_10_0_iv_0_0[27] ( .A(N_930), .B(N_831), .C(N_1562), .D(N_1400), .Y(sba_req_wr_data_int_10_0_iv_0_0_Z[27]) ); defparam \sba_req_wr_data_int_10_0_iv_0_0[27] .INIT=16'hECA0; // @48:15261 CFG4 \sba_req_wr_data_int_10_1_iv_0_0[18] ( .A(N_819), .B(N_921), .C(N_1651), .D(N_1562), .Y(sba_req_wr_data_int_10_1_iv_0_0_Z[18]) ); defparam \sba_req_wr_data_int_10_1_iv_0_0[18] .INIT=16'hECA0; // @48:15261 CFG4 \sba_req_wr_data_int_10_1_iv_0_0[22] ( .A(N_821), .B(N_925), .C(N_1651), .D(N_1562), .Y(sba_req_wr_data_int_10_1_iv_0_0_Z[22]) ); defparam \sba_req_wr_data_int_10_1_iv_0_0[22] .INIT=16'hECA0; // @48:15261 CFG4 \sba_req_wr_data_int_10_1_iv_0_0[20] ( .A(N_817), .B(N_923), .C(N_1651), .D(N_1562), .Y(sba_req_wr_data_int_10_1_iv_0_0_Z[20]) ); defparam \sba_req_wr_data_int_10_1_iv_0_0[20] .INIT=16'hECA0; // @48:15261 CFG4 \sba_req_wr_data_int_10_0_iv_0_0[28] ( .A(N_931), .B(N_826), .C(N_1562), .D(N_1400), .Y(sba_req_wr_data_int_10_0_iv_0_0_Z[28]) ); defparam \sba_req_wr_data_int_10_0_iv_0_0[28] .INIT=16'hECA0; // @48:15261 CFG4 \sba_req_wr_data_int_10_0_iv_0_0[29] ( .A(N_932), .B(N_827), .C(N_1562), .D(N_1400), .Y(sba_req_wr_data_int_10_0_iv_0_0_Z[29]) ); defparam \sba_req_wr_data_int_10_0_iv_0_0[29] .INIT=16'hECA0; // @48:15261 CFG4 \sba_req_wr_data_int_10_0_iv_0_0[24] ( .A(N_927), .B(N_832), .C(N_1562), .D(N_1400), .Y(sba_req_wr_data_int_10_0_iv_0_0_Z[24]) ); defparam \sba_req_wr_data_int_10_0_iv_0_0[24] .INIT=16'hECA0; // @48:15261 CFG4 \sba_req_wr_data_int_10_1_iv_0_0[21] ( .A(N_816), .B(N_924), .C(N_1651), .D(N_1562), .Y(sba_req_wr_data_int_10_1_iv_0_0_Z[21]) ); defparam \sba_req_wr_data_int_10_1_iv_0_0[21] .INIT=16'hECA0; // @48:15261 CFG4 \sba_req_wr_data_int_10_1_iv_0_0[23] ( .A(N_820), .B(N_926), .C(N_1651), .D(N_1562), .Y(sba_req_wr_data_int_10_1_iv_0_0_Z[23]) ); defparam \sba_req_wr_data_int_10_1_iv_0_0[23] .INIT=16'hECA0; // @48:15261 CFG4 \sba_req_wr_data_int_10_1_iv_0_0[14] ( .A(N_828), .B(N_821), .C(N_1654), .D(N_1649), .Y(sba_req_wr_data_int_10_1_iv_0_0_Z[14]) ); defparam \sba_req_wr_data_int_10_1_iv_0_0[14] .INIT=16'hECA0; // @48:15261 CFG4 \sba_req_wr_data_int_10_1_iv_0_0[8] ( .A(N_832), .B(N_815), .C(N_1654), .D(N_1649), .Y(sba_req_wr_data_int_10_1_iv_0_0_Z[8]) ); defparam \sba_req_wr_data_int_10_1_iv_0_0[8] .INIT=16'hECA0; // @48:15261 CFG4 \sba_req_wr_data_int_10_1_iv_0_0[16] ( .A(N_815), .B(N_919), .C(N_1651), .D(N_1562), .Y(sba_req_wr_data_int_10_1_iv_0_0_Z[16]) ); defparam \sba_req_wr_data_int_10_1_iv_0_0[16] .INIT=16'hECA0; // @48:15261 CFG4 \sba_req_wr_data_int_10_1_iv_0_0[15] ( .A(N_825), .B(N_820), .C(N_1654), .D(N_1649), .Y(sba_req_wr_data_int_10_1_iv_0_0_Z[15]) ); defparam \sba_req_wr_data_int_10_1_iv_0_0[15] .INIT=16'hECA0; // @48:15261 CFG4 \sba_req_wr_data_int_10_1_iv_0_0[19] ( .A(N_818), .B(N_922), .C(N_1651), .D(N_1562), .Y(sba_req_wr_data_int_10_1_iv_0_0_Z[19]) ); defparam \sba_req_wr_data_int_10_1_iv_0_0[19] .INIT=16'hECA0; // @48:15261 CFG4 \sba_req_wr_data_int_10_0_iv_0_0[25] ( .A(N_928), .B(N_829), .C(N_1562), .D(N_1400), .Y(sba_req_wr_data_int_10_0_iv_0_0_Z[25]) ); defparam \sba_req_wr_data_int_10_0_iv_0_0[25] .INIT=16'hECA0; // @48:15261 CFG4 \sba_req_wr_data_int_10_0_iv_0_0[26] ( .A(N_929), .B(N_830), .C(N_1562), .D(N_1400), .Y(sba_req_wr_data_int_10_0_iv_0_0_Z[26]) ); defparam \sba_req_wr_data_int_10_0_iv_0_0[26] .INIT=16'hECA0; // @48:15261 CFG4 \sba_req_wr_data_int_10_1_iv_0_0[13] ( .A(N_827), .B(N_816), .C(N_1654), .D(N_1649), .Y(sba_req_wr_data_int_10_1_iv_0_0_Z[13]) ); defparam \sba_req_wr_data_int_10_1_iv_0_0[13] .INIT=16'hECA0; // @48:15261 CFG4 \sba_req_wr_data_int_10_0_iv_0_0[30] ( .A(N_933), .B(N_828), .C(N_1562), .D(N_1400), .Y(sba_req_wr_data_int_10_0_iv_0_0_Z[30]) ); defparam \sba_req_wr_data_int_10_0_iv_0_0[30] .INIT=16'hECA0; // @48:15261 CFG4 \sba_req_wr_data_int_10_1_iv_0_0[10] ( .A(N_830), .B(N_819), .C(N_1654), .D(N_1649), .Y(sba_req_wr_data_int_10_1_iv_0_0_Z[10]) ); defparam \sba_req_wr_data_int_10_1_iv_0_0[10] .INIT=16'hECA0; // @48:15261 CFG4 \sba_req_wr_data_int_10_1_iv_0_0[9] ( .A(N_829), .B(N_814), .C(N_1654), .D(N_1649), .Y(sba_req_wr_data_int_10_1_iv_0_0_Z[9]) ); defparam \sba_req_wr_data_int_10_1_iv_0_0[9] .INIT=16'hECA0; // @48:15261 CFG4 \sba_req_wr_data_int_10_1_iv_0_0[12] ( .A(N_826), .B(N_817), .C(N_1654), .D(N_1649), .Y(sba_req_wr_data_int_10_1_iv_0_0_Z[12]) ); defparam \sba_req_wr_data_int_10_1_iv_0_0[12] .INIT=16'hECA0; // @48:15261 CFG3 sbcs_to_err_ff_10_f1_0 ( .A(sbcs_to_err_0_sqmuxa_Z), .B(un1_sbcs_ba_err_ff_0_sqmuxa_i_0), .C(sbcs_to_err_ff_Z), .Y(sbcs_to_err_ff_10_f1_0_Z) ); defparam sbcs_to_err_ff_10_f1_0.INIT=8'hDC; // @48:15261 CFG3 sbcs_ba_err_ff_7_f1_0 ( .A(sbcs_ba_err_0_sqmuxa_Z), .B(sbcs_ba_err_ff_0_sqmuxa_1_Z), .C(sbcs_ba_err_ff_Z), .Y(sbcs_ba_err_ff_7_f1_0_Z) ); defparam sbcs_ba_err_ff_7_f1_0.INIT=8'hDC; // @48:15261 CFG4 \sbdata_ff_9_iv_0_0[4] ( .A(cpu_d_resp_rd_data_net[4]), .B(N_817), .C(N_1652), .D(N_1658), .Y(sbdata_ff_9_iv_0_0_Z[4]) ); defparam \sbdata_ff_9_iv_0_0[4] .INIT=16'hEAC0; // @48:15261 CFG4 \sbdata_ff_9_iv_0_0[3] ( .A(cpu_d_resp_rd_data_net[3]), .B(N_818), .C(N_1652), .D(N_1658), .Y(sbdata_ff_9_iv_0_0_Z[3]) ); defparam \sbdata_ff_9_iv_0_0[3] .INIT=16'hEAC0; // @48:15261 CFG4 \sbdata_ff_9_iv_0_0[5] ( .A(cpu_d_resp_rd_data_net[5]), .B(N_816), .C(N_1658), .D(N_1652), .Y(sbdata_ff_9_iv_0_0_Z[5]) ); defparam \sbdata_ff_9_iv_0_0[5] .INIT=16'hECA0; // @48:15261 CFG4 \sbdata_ff_9_iv_0_0[6] ( .A(cpu_d_resp_rd_data_net[6]), .B(N_821), .C(N_1658), .D(N_1652), .Y(sbdata_ff_9_iv_0_0_Z[6]) ); defparam \sbdata_ff_9_iv_0_0[6] .INIT=16'hECA0; // @48:15261 CFG4 \sbdata_ff_9_iv_0_0[7] ( .A(cpu_d_resp_rd_data_net[7]), .B(N_820), .C(N_1658), .D(N_1652), .Y(sbdata_ff_9_iv_0_0_Z[7]) ); defparam \sbdata_ff_9_iv_0_0[7] .INIT=16'hECA0; // @48:14023 CFG4 \dmi_rdata_0_iv_0_2[9] ( .A(dmi_rdata_0_iv_0_0_Z[9]), .B(sbdata_ff_Z[9]), .C(N_1570), .D(N_1083), .Y(dmi_rdata_0_iv_0_2_Z[9]) ); defparam \dmi_rdata_0_iv_0_2[9] .INIT=16'hFFEA; // @48:14023 CFG4 \dmi_rdata_0_iv_0_2[8] ( .A(dmi_rdata_0_iv_0_0_Z[8]), .B(sbdata_ff_Z[8]), .C(N_1570), .D(N_1083), .Y(dmi_rdata_0_iv_0_2_Z[8]) ); defparam \dmi_rdata_0_iv_0_2[8] .INIT=16'hFFEA; // @48:14023 CFG4 \dmi_rdata_0_iv_0_2[18] ( .A(sbdata_ff_Z[18]), .B(sbaddr_ff_Z[18]), .C(N_1570), .D(N_1569), .Y(dmi_rdata_0_iv_0_2_Z[18]) ); defparam \dmi_rdata_0_iv_0_2[18] .INIT=16'hECA0; // @48:14023 CFG4 \dmi_rdata_0_iv_0_2[19] ( .A(sbdata_ff_Z[19]), .B(sbaddr_ff_Z[19]), .C(N_1570), .D(N_1569), .Y(dmi_rdata_0_iv_0_2_Z[19]) ); defparam \dmi_rdata_0_iv_0_2[19] .INIT=16'hECA0; // @48:14023 CFG4 \dmi_rdata_0_iv_0_2[16] ( .A(sbdata_ff_Z[16]), .B(sbaddr_ff_Z[16]), .C(N_1570), .D(N_1569), .Y(dmi_rdata_0_iv_0_2_Z[16]) ); defparam \dmi_rdata_0_iv_0_2[16] .INIT=16'hECA0; // @48:14023 CFG4 \dmi_rdata_0_iv_0_2[17] ( .A(sbdata_ff_Z[17]), .B(sbaddr_ff_Z[17]), .C(N_1570), .D(N_1569), .Y(dmi_rdata_0_iv_0_2_Z[17]) ); defparam \dmi_rdata_0_iv_0_2[17] .INIT=16'hECA0; // @48:14023 CFG4 \dmi_rdata_0_iv_0_2[12] ( .A(sbdata_ff_Z[12]), .B(sbaddr_ff_Z[12]), .C(N_1570), .D(N_1569), .Y(dmi_rdata_0_iv_0_2_Z[12]) ); defparam \dmi_rdata_0_iv_0_2[12] .INIT=16'hECA0; // @48:14023 CFG4 \dmi_rdata_0_iv_0_0[23] ( .A(data_0_reg[23]), .B(sbdata_ff_Z[23]), .C(N_1570), .D(N_1552), .Y(dmi_rdata_0_iv_0_0_Z[23]) ); defparam \dmi_rdata_0_iv_0_0[23] .INIT=16'hEAC0; // @48:14023 CFG4 \dmi_rdata_0_iv_0_0[3] ( .A(data_0_reg[3]), .B(sbdata_ff_Z[3]), .C(N_1570), .D(N_1552), .Y(dmi_rdata_0_iv_0_0_Z[3]) ); defparam \dmi_rdata_0_iv_0_0[3] .INIT=16'hEAC0; // @48:14023 CFG4 \dmi_rdata_0_iv_0_1[20] ( .A(sbdata_ff_Z[20]), .B(sbaddr_ff_Z[20]), .C(N_1570), .D(N_1569), .Y(dmi_rdata_0_iv_0_1_Z[20]) ); defparam \dmi_rdata_0_iv_0_1[20] .INIT=16'hECA0; // @48:14023 CFG4 \dmi_rdata_0_iv_0_0[24] ( .A(data_0_reg[24]), .B(sbdata_ff_Z[24]), .C(N_1570), .D(N_1552), .Y(dmi_rdata_0_iv_0_0_Z[24]) ); defparam \dmi_rdata_0_iv_0_0[24] .INIT=16'hEAC0; // @48:14023 CFG4 \dmi_rdata_0_iv_0_1[13] ( .A(un12lt14), .B(sbdata_ff_Z[13]), .C(N_1569), .D(N_1570), .Y(dmi_rdata_0_iv_0_1_Z[13]) ); defparam \dmi_rdata_0_iv_0_1[13] .INIT=16'hECA0; // @48:14023 CFG4 \dmi_rdata_0_iv_0_0[5] ( .A(data_0_reg[5]), .B(sbdata_ff_Z[5]), .C(N_1570), .D(N_1552), .Y(dmi_rdata_0_iv_0_0_Z[5]) ); defparam \dmi_rdata_0_iv_0_0[5] .INIT=16'hEAC0; // @48:14023 CFG4 \dmi_rdata_0_iv_0_0[26] ( .A(data_0_reg[26]), .B(sbdata_ff_Z[26]), .C(N_1570), .D(N_1552), .Y(dmi_rdata_0_iv_0_0_Z[26]) ); defparam \dmi_rdata_0_iv_0_0[26] .INIT=16'hEAC0; // @48:14023 CFG4 \dmi_rdata_0_iv_0_1[14] ( .A(un12lto14), .B(sbdata_ff_Z[14]), .C(N_1569), .D(N_1570), .Y(dmi_rdata_0_iv_0_1_Z[14]) ); defparam \dmi_rdata_0_iv_0_1[14] .INIT=16'hECA0; // @48:14023 CFG4 \dmi_rdata_0_iv_0_0[4] ( .A(data_0_reg[4]), .B(sbdata_ff_Z[4]), .C(N_1570), .D(N_1552), .Y(dmi_rdata_0_iv_0_0_Z[4]) ); defparam \dmi_rdata_0_iv_0_0[4] .INIT=16'hEAC0; // @48:14023 CFG4 \dmi_rdata_0_iv_0_0[27] ( .A(data_0_reg[27]), .B(sbdata_ff_Z[27]), .C(N_1570), .D(N_1552), .Y(dmi_rdata_0_iv_0_0_Z[27]) ); defparam \dmi_rdata_0_iv_0_0[27] .INIT=16'hEAC0; // @48:14023 CFG4 \dmi_rdata_0_iv_0_0[6] ( .A(data_0_reg[6]), .B(sbdata_ff_Z[6]), .C(N_1570), .D(N_1552), .Y(dmi_rdata_0_iv_0_0_Z[6]) ); defparam \dmi_rdata_0_iv_0_0[6] .INIT=16'hEAC0; // @48:14023 CFG4 \dmi_rdata_0_iv_0_1[15] ( .A(sbdata_ff_Z[15]), .B(sbaddr_ff_Z[15]), .C(N_1570), .D(N_1569), .Y(dmi_rdata_0_iv_0_1_Z[15]) ); defparam \dmi_rdata_0_iv_0_1[15] .INIT=16'hECA0; // @48:14023 CFG4 \dmi_rdata_0_iv_0_0[25] ( .A(data_0_reg[25]), .B(sbdata_ff_Z[25]), .C(N_1570), .D(N_1552), .Y(dmi_rdata_0_iv_0_0_Z[25]) ); defparam \dmi_rdata_0_iv_0_0[25] .INIT=16'hEAC0; // @48:14023 CFG4 \dmi_rdata_0_iv_0_1[22] ( .A(sbdata_ff_Z[22]), .B(sbaddr_ff_Z[22]), .C(N_1570), .D(N_1569), .Y(dmi_rdata_0_iv_0_1_Z[22]) ); defparam \dmi_rdata_0_iv_0_1[22] .INIT=16'hECA0; // @48:14023 CFG4 \dmi_rdata_0_iv_0_1[21] ( .A(sbdata_ff_Z[21]), .B(sbaddr_ff_Z[21]), .C(N_1570), .D(N_1569), .Y(dmi_rdata_0_iv_0_1_Z[21]) ); defparam \dmi_rdata_0_iv_0_1[21] .INIT=16'hECA0; // @48:15129 CFG4 sba_rd_req_cmb_2_sqmuxa_1_i_a2_7 ( .A(dmi_req_data[17]), .B(dmi_req_data[19]), .C(N_1786), .D(sba_rd_req_cmb_2_sqmuxa_1_i_a2_6_Z), .Y(sba_rd_req_cmb_2_sqmuxa_1_i_a2_7_Z) ); defparam sba_rd_req_cmb_2_sqmuxa_1_i_a2_7.INIT=16'h1000; // @48:14736 CFG4 \debug_state_ns_0[3] ( .A(debug_state_ns_0_a3_0[3]), .B(debug_state[4]), .C(N_1750), .D(debug_state_ns_0_0_Z[3]), .Y(debug_state_ns[3]) ); defparam \debug_state_ns_0[3] .INIT=16'hFFE0; // @48:15353 CFG3 sbcs_busy_ff13_i ( .A(N_115), .B(N_95), .C(N_100), .Y(N_78) ); defparam sbcs_busy_ff13_i.INIT=8'hEF; // @48:15070 CFG4 mem_rdata34_0_0 ( .A(N_812), .B(N_1841), .C(un12_dmi_valid_i), .D(un16_dmi_valid_i), .Y(mem_rdata34) ); defparam mem_rdata34_0_0.INIT=16'h5554; // @48:15261 CFG3 un1_sbcs_readonaddr_ff7_5 ( .A(sba_req_addr_int_1_sqmuxa_1_Z), .B(sba_req_addr_int_1_sqmuxa_2_Z), .C(un1_sbcs_readonaddr_ff7_5_2_Z), .Y(un1_sbcs_readonaddr_ff7_5_Z) ); defparam un1_sbcs_readonaddr_ff7_5.INIT=8'hFE; // @48:15261 CFG4 \sba_req_wr_data_int_10_0_iv_0_a2_0[24] ( .A(N_807), .B(N_81_i), .C(sba_req_rd_byte_en_int_3_sqmuxa_1_Z), .D(sba_rd_req_cmb), .Y(N_1563) ); defparam \sba_req_wr_data_int_10_0_iv_0_a2_0[24] .INIT=16'h4404; // @48:15550 CFG4 \prescale_counter_4[3] ( .A(CO1), .B(count_en_0_Z), .C(prescale_counter_Z[3]), .D(prescale_counter_Z[2]), .Y(prescale_counter_4_Z[3]) ); defparam \prescale_counter_4[3] .INIT=16'h48C0; // @48:15548 CFG3 sbcs_to_err_ff_0_sqmuxa ( .A(timeout_Z), .B(sbcs_to_err_0_sqmuxa_Z), .C(sbcs_to_err_ff_Z), .Y(sbcs_to_err_ff_0_sqmuxa_Z) ); defparam sbcs_to_err_ff_0_sqmuxa.INIT=8'h8A; // @48:15473 CFG4 un1_sbcs_ba_err_1 ( .A(sbcs_to_err_ff_Z), .B(sbcs_ba_err_ff_Z), .C(sbcs_to_err_0_sqmuxa_Z), .D(sbcs_ba_err_0_sqmuxa_Z), .Y(un1_sbcs_ba_err_1_Z) ); defparam un1_sbcs_ba_err_1.INIT=16'hFFF7; // @48:14647 CFG2 data_0_reg_5s2_0 ( .A(N_1567), .B(cpu_debug_active_net), .Y(data_0_reg_5_sm0) ); defparam data_0_reg_5s2_0.INIT=4'hB; // @48:15070 CFG4 sba_wr_req_cmb7_i_o3_RNIFL5ND ( .A(N_979), .B(N_1524), .C(mem_rd), .D(sbcs_busyerror_1_sqmuxa_1), .Y(N_704_i) ); defparam sba_wr_req_cmb7_i_o3_RNIFL5ND.INIT=16'h0111; // @48:15261 CFG4 sba_resp_ready_int_2_sqmuxa_i_a3_0_RNIF7HK8 ( .A(sbcs_busy_ff14_i_o3_0_Z), .B(next_state21), .C(sba_state_Z[0]), .D(sba_resp_ready_int_2_sqmuxa_i_a3_0_Z), .Y(N_685_i) ); defparam sba_resp_ready_int_2_sqmuxa_i_a3_0_RNIF7HK8.INIT=16'hEAFA; // @48:15261 CFG4 \sbdata_ff_9_iv_0_0[2] ( .A(cpu_d_resp_rd_data_net[2]), .B(N_819), .C(N_1658), .D(N_1652), .Y(sbdata_ff_9_iv_0_0_Z[2]) ); defparam \sbdata_ff_9_iv_0_0[2] .INIT=16'hECA0; // @48:15261 CFG4 \sbdata_ff_9_iv_0_0[0] ( .A(cpu_d_resp_rd_data_net[0]), .B(N_815), .C(N_1658), .D(N_1652), .Y(sbdata_ff_9_iv_0_0_Z[0]) ); defparam \sbdata_ff_9_iv_0_0[0] .INIT=16'hECA0; // @48:15261 CFG4 \sbdata_ff_9_iv_0_0[1] ( .A(cpu_d_resp_rd_data_net[1]), .B(N_814), .C(N_1658), .D(N_1652), .Y(sbdata_ff_9_iv_0_0_Z[1]) ); defparam \sbdata_ff_9_iv_0_0[1] .INIT=16'hECA0; // @48:15261 CFG3 \sbdata_ff_9_0_iv_0[12] ( .A(N_1659), .B(cpu_d_resp_rd_data_net[28]), .C(sbdata_ff_9_0_iv_0_0_Z[12]), .Y(sbdata_ff_9[12]) ); defparam \sbdata_ff_9_0_iv_0[12] .INIT=8'hF8; // @48:15261 CFG3 \sbdata_ff_9_0_iv_0[11] ( .A(N_1659), .B(cpu_d_resp_rd_data_net[27]), .C(sbdata_ff_9_0_iv_0_0_Z[11]), .Y(sbdata_ff_9[11]) ); defparam \sbdata_ff_9_0_iv_0[11] .INIT=8'hF8; // @48:15261 CFG3 \sbdata_ff_9_0_iv_0[10] ( .A(N_1659), .B(cpu_d_resp_rd_data_net[26]), .C(sbdata_ff_9_0_iv_0_0_Z[10]), .Y(sbdata_ff_9[10]) ); defparam \sbdata_ff_9_0_iv_0[10] .INIT=8'hF8; // @48:15261 CFG3 \sbdata_ff_9_0_iv_0[9] ( .A(N_1659), .B(cpu_d_resp_rd_data_net[25]), .C(sbdata_ff_9_0_iv_0_0_Z[9]), .Y(sbdata_ff_9[9]) ); defparam \sbdata_ff_9_0_iv_0[9] .INIT=8'hF8; // @48:15261 CFG3 \sbdata_ff_9_0_iv_0[15] ( .A(N_1659), .B(cpu_d_resp_rd_data_net[31]), .C(sbdata_ff_9_0_iv_0_0_Z[15]), .Y(sbdata_ff_9[15]) ); defparam \sbdata_ff_9_0_iv_0[15] .INIT=8'hF8; // @48:15261 CFG3 \sbdata_ff_9_0_iv_0[13] ( .A(N_1659), .B(cpu_d_resp_rd_data_net[29]), .C(sbdata_ff_9_0_iv_0_0_Z[13]), .Y(sbdata_ff_9[13]) ); defparam \sbdata_ff_9_0_iv_0[13] .INIT=8'hF8; // @48:15261 CFG3 \sbdata_ff_9_0_iv_0[8] ( .A(N_1659), .B(cpu_d_resp_rd_data_net[24]), .C(sbdata_ff_9_0_iv_0_0_Z[8]), .Y(sbdata_ff_9[8]) ); defparam \sbdata_ff_9_0_iv_0[8] .INIT=8'hF8; // @48:15261 CFG3 \sbdata_ff_9_0_iv_0[14] ( .A(N_1659), .B(cpu_d_resp_rd_data_net[30]), .C(sbdata_ff_9_0_iv_0_0_Z[14]), .Y(sbdata_ff_9[14]) ); defparam \sbdata_ff_9_0_iv_0[14] .INIT=8'hF8; // @48:15261 CFG4 \un1_access_valid_0_a3[1] ( .A(sbcs_access[1]), .B(sbcs_access[2]), .C(sbcs_access[0]), .D(N_1831), .Y(un1_access_valid_0_a3_Z[1]) ); defparam \un1_access_valid_0_a3[1] .INIT=16'h1000; // @48:15261 CFG4 \sba_req_wr_byte_en_int_13_m2_2[0] ( .A(N_1823), .B(debug_sysbus_req_wr_byte_en_net[0]), .C(sba_req_wr_byte_en_int_13_sm0), .D(sba_req_wr_byte_en_int_13_ss0), .Y(sba_req_wr_byte_en_int_13_m2_2_Z[0]) ); defparam \sba_req_wr_byte_en_int_13_m2_2[0] .INIT=16'hC0A0; // @48:15261 CFG4 \sba_req_wr_byte_en_int_13_m2_2[3] ( .A(N_99), .B(debug_sysbus_req_wr_byte_en_net[3]), .C(sba_req_wr_byte_en_int_13_sm0), .D(sba_req_wr_byte_en_int_13_ss0), .Y(sba_req_wr_byte_en_int_13_m2_2_Z[3]) ); defparam \sba_req_wr_byte_en_int_13_m2_2[3] .INIT=16'hC050; // @48:15261 CFG4 \sba_req_wr_byte_en_int_13_m2_2[1] ( .A(N_107), .B(debug_sysbus_req_wr_byte_en_net[1]), .C(sba_req_wr_byte_en_int_13_sm0), .D(sba_req_wr_byte_en_int_13_ss0), .Y(sba_req_wr_byte_en_int_13_m2_2_Z[1]) ); defparam \sba_req_wr_byte_en_int_13_m2_2[1] .INIT=16'hC0A0; // @48:15261 CFG4 \sba_req_wr_byte_en_int_13_m2_2[2] ( .A(N_111), .B(debug_sysbus_req_wr_byte_en_net[2]), .C(sba_req_wr_byte_en_int_13_sm0), .D(sba_req_wr_byte_en_int_13_ss0), .Y(sba_req_wr_byte_en_int_13_m2_2_Z[2]) ); defparam \sba_req_wr_byte_en_int_13_m2_2[2] .INIT=16'hC0A0; // @48:14023 CFG4 \dmi_rdata_0_iv_0_4[0] ( .A(dmi_rdata_0_iv_0_2_Z[0]), .B(N_1617), .C(N_81_i), .D(N_1752), .Y(dmi_rdata_0_iv_0_4_Z[0]) ); defparam \dmi_rdata_0_iv_0_4[0] .INIT=16'hFEEE; // @48:14023 CFG4 \dmi_rdata_0_iv_0[2] ( .A(N_1569), .B(dmi_rdata_0_iv_0_0_Z[2]), .C(sbaddr_ff_Z[2]), .D(N_1296), .Y(dmi_resp_data[4]) ); defparam \dmi_rdata_0_iv_0[2] .INIT=16'hFFEC; // @48:14023 CFG4 \dmi_rdata_0_iv_0[15] ( .A(N_1274), .B(dmi_rdata_0_iv_0_1_Z[15]), .C(data_0_reg[15]), .D(N_1552), .Y(dmi_resp_data[17]) ); defparam \dmi_rdata_0_iv_0[15] .INIT=16'hFEEE; // @48:14023 CFG4 \dmi_rdata_0_iv_0[21] ( .A(N_1266), .B(dmi_rdata_0_iv_0_1_Z[21]), .C(data_0_reg[21]), .D(N_1552), .Y(dmi_resp_data[23]) ); defparam \dmi_rdata_0_iv_0[21] .INIT=16'hFEEE; // @48:14023 CFG4 \dmi_rdata_0_iv_0[29] ( .A(N_1569), .B(dmi_rdata_0_iv_0_0_Z[29]), .C(sbaddr_ff_Z[29]), .D(N_1242), .Y(dmi_resp_data[31]) ); defparam \dmi_rdata_0_iv_0[29] .INIT=16'hFFEC; // @48:14023 CFG4 \dmi_rdata_0_iv_0[11] ( .A(dmi_rdata_0_iv_0_0_Z[11]), .B(sbdata_ff_Z[11]), .C(N_1570), .D(N_1170), .Y(dmi_resp_data[13]) ); defparam \dmi_rdata_0_iv_0[11] .INIT=16'hFFEA; // @48:14023 CFG4 \dmi_rdata_0_iv_0[16] ( .A(dmi_rdata_0_iv_0_0_Z[16]), .B(sbcs_autoincrement_ff_Z), .C(dmi_rdata_0_iv_0_2_Z[16]), .D(N_1617), .Y(dmi_resp_data[18]) ); defparam \dmi_rdata_0_iv_0[16] .INIT=16'hFEFA; // @48:14023 CFG4 \dmi_rdata_0_iv_0[12] ( .A(dmi_rdata_0_iv_0_0_Z[12]), .B(sbcs_to_err_ff_Z), .C(dmi_rdata_0_iv_0_2_Z[12]), .D(N_1617), .Y(dmi_resp_data[14]) ); defparam \dmi_rdata_0_iv_0[12] .INIT=16'hFEFA; // @48:14023 CFG4 \dmi_rdata_0_iv_0[19] ( .A(dmi_rdata_0_iv_0_0_Z[19]), .B(sbcs_access_ff_Z[2]), .C(dmi_rdata_0_iv_0_2_Z[19]), .D(N_1617), .Y(dmi_resp_data[21]) ); defparam \dmi_rdata_0_iv_0[19] .INIT=16'hFEFA; // @48:14023 CFG4 \dmi_rdata_0_iv_0[18] ( .A(dmi_rdata_0_iv_0_0_Z[18]), .B(sbcs_access_ff_Z[1]), .C(dmi_rdata_0_iv_0_2_Z[18]), .D(N_1617), .Y(dmi_resp_data[20]) ); defparam \dmi_rdata_0_iv_0[18] .INIT=16'hFEFA; // @48:14023 CFG4 \dmi_rdata_0_iv_0[30] ( .A(dmi_rdata_0_iv_0_0_Z[30]), .B(sbdata_ff_Z[30]), .C(N_1570), .D(N_1143), .Y(dmi_resp_data[32]) ); defparam \dmi_rdata_0_iv_0[30] .INIT=16'hFFEA; // @48:14023 CFG4 \dmi_rdata_0_iv_0[28] ( .A(dmi_rdata_0_iv_0_0_Z[28]), .B(sbdata_ff_Z[28]), .C(N_1570), .D(N_1139), .Y(dmi_resp_data[30]) ); defparam \dmi_rdata_0_iv_0[28] .INIT=16'hFFEA; // @48:14023 CFG4 \dmi_rdata_0_iv_0[7] ( .A(dmi_rdata_0_iv_0_0_Z[7]), .B(sbdata_ff_Z[7]), .C(N_1570), .D(N_1129), .Y(dmi_resp_data[9]) ); defparam \dmi_rdata_0_iv_0[7] .INIT=16'hFFEA; // @48:14023 CFG4 \dmi_rdata_0_iv_0[1] ( .A(N_1569), .B(dmi_rdata_0_iv_0_2_Z[1]), .C(sbaddr_ff_Z[1]), .D(N_1109), .Y(dmi_resp_data[3]) ); defparam \dmi_rdata_0_iv_0[1] .INIT=16'hFFEC; // @48:14023 CFG3 \dmi_rdata_0_iv_0[9] ( .A(dmi_rdata_0_iv_0_2_Z[9]), .B(sbaddr_ff_Z[9]), .C(N_1569), .Y(dmi_resp_data[11]) ); defparam \dmi_rdata_0_iv_0[9] .INIT=8'hEA; // @48:14023 CFG3 \dmi_rdata_0_iv_0[8] ( .A(dmi_rdata_0_iv_0_2_Z[8]), .B(sbaddr_ff_Z[8]), .C(N_1569), .Y(dmi_resp_data[10]) ); defparam \dmi_rdata_0_iv_0[8] .INIT=8'hEA; // @48:14023 CFG3 \dmi_rdata_0_iv_0[3] ( .A(dmi_rdata_0_iv_0_0_Z[3]), .B(sbaddr_ff_Z[3]), .C(N_1569), .Y(dmi_resp_data[5]) ); defparam \dmi_rdata_0_iv_0[3] .INIT=8'hEA; // @48:14023 CFG3 \dmi_rdata_0_iv_0[4] ( .A(dmi_rdata_0_iv_0_0_Z[4]), .B(sbaddr_ff_Z[4]), .C(N_1569), .Y(dmi_resp_data[6]) ); defparam \dmi_rdata_0_iv_0[4] .INIT=8'hEA; // @48:14023 CFG3 \dmi_rdata_0_iv_0[5] ( .A(dmi_rdata_0_iv_0_0_Z[5]), .B(sbaddr_ff_Z[5]), .C(N_1569), .Y(dmi_resp_data[7]) ); defparam \dmi_rdata_0_iv_0[5] .INIT=8'hEA; // @48:14023 CFG3 \dmi_rdata_0_iv_0[6] ( .A(dmi_rdata_0_iv_0_0_Z[6]), .B(sbaddr_ff_Z[6]), .C(N_1569), .Y(dmi_resp_data[8]) ); defparam \dmi_rdata_0_iv_0[6] .INIT=8'hEA; // @48:14023 CFG3 \dmi_rdata_0_iv_0[23] ( .A(dmi_rdata_0_iv_0_0_Z[23]), .B(sbaddr_ff_Z[23]), .C(N_1569), .Y(dmi_resp_data[25]) ); defparam \dmi_rdata_0_iv_0[23] .INIT=8'hEA; // @48:14023 CFG3 \dmi_rdata_0_iv_0[25] ( .A(dmi_rdata_0_iv_0_0_Z[25]), .B(sbaddr_ff_Z[25]), .C(N_1569), .Y(dmi_resp_data[27]) ); defparam \dmi_rdata_0_iv_0[25] .INIT=8'hEA; // @48:14023 CFG3 \dmi_rdata_0_iv_0[26] ( .A(dmi_rdata_0_iv_0_0_Z[26]), .B(sbaddr_ff_Z[26]), .C(N_1569), .Y(dmi_resp_data[28]) ); defparam \dmi_rdata_0_iv_0[26] .INIT=8'hEA; // @48:14339 CFG4 \command_reg_state_4_0_a2_0[1] ( .A(dmi_req_data[23]), .B(N_1786), .C(N_1669), .D(un1_dmi_req_command_i), .Y(N_1839) ); defparam \command_reg_state_4_0_a2_0[1] .INIT=16'h8000; // @48:14023 CFG4 \dmi_rdata_0_iv_0[17] ( .A(dmi_rdata_0_iv_0_0_Z[17]), .B(sbcs_access_ff_Z[0]), .C(dmi_rdata_0_iv_0_2_Z[17]), .D(N_1617), .Y(dmi_resp_data[19]) ); defparam \dmi_rdata_0_iv_0[17] .INIT=16'hFEFA; // @48:14023 CFG4 \dmi_rdata_0_iv_0[20] ( .A(N_1270), .B(dmi_rdata_0_iv_0_1_Z[20]), .C(data_0_reg[20]), .D(N_1552), .Y(dmi_resp_data[22]) ); defparam \dmi_rdata_0_iv_0[20] .INIT=16'hFEEE; // @48:14023 CFG4 \dmi_rdata_0_iv_0[13] ( .A(N_1282), .B(dmi_rdata_0_iv_0_1_Z[13]), .C(data_0_reg[13]), .D(N_1552), .Y(dmi_resp_data[15]) ); defparam \dmi_rdata_0_iv_0[13] .INIT=16'hFEEE; // @48:14023 CFG3 \dmi_rdata_0_iv_0[27] ( .A(dmi_rdata_0_iv_0_0_Z[27]), .B(sbaddr_ff_Z[27]), .C(N_1569), .Y(dmi_resp_data[29]) ); defparam \dmi_rdata_0_iv_0[27] .INIT=8'hEA; // @48:14023 CFG4 \dmi_rdata_0_iv_0[14] ( .A(N_1278), .B(dmi_rdata_0_iv_0_1_Z[14]), .C(data_0_reg[14]), .D(N_1552), .Y(dmi_resp_data[16]) ); defparam \dmi_rdata_0_iv_0[14] .INIT=16'hFEEE; // @48:14023 CFG3 \dmi_rdata_0_iv_0[24] ( .A(dmi_rdata_0_iv_0_0_Z[24]), .B(sbaddr_ff_Z[24]), .C(N_1569), .Y(dmi_resp_data[26]) ); defparam \dmi_rdata_0_iv_0[24] .INIT=8'hEA; // @48:14023 CFG4 \dmi_rdata_0_iv_0[22] ( .A(N_1262), .B(dmi_rdata_0_iv_0_1_Z[22]), .C(data_0_reg[22]), .D(N_1552), .Y(dmi_resp_data[24]) ); defparam \dmi_rdata_0_iv_0[22] .INIT=16'hFEEE; // @48:14023 CFG4 \dmi_rdata_0_iv_0[31] ( .A(dmi_rdata_0_iv_0_0_Z[31]), .B(sbaddr_ff_Z[31]), .C(N_1569), .D(N_1134), .Y(dmi_resp_data[33]) ); defparam \dmi_rdata_0_iv_0[31] .INIT=16'hFFEA; // @48:14398 CFG3 cmderr_cmb_3_sqmuxa_0_tz_tz ( .A(N_1743), .B(N_1669), .C(un1_dmi_req_command_i), .Y(cmderr_cmb_3_sqmuxa_i_tz_tz) ); defparam cmderr_cmb_3_sqmuxa_0_tz_tz.INIT=8'hEA; // @48:14647 CFG3 \data_0_reg_5_m1_0_tz[0] ( .A(cpu_debug_active_net), .B(N_813), .C(N_1567), .Y(N_15) ); defparam \data_0_reg_5_m1_0_tz[0] .INIT=8'hB3; // @48:15351 CFG4 un1_sbcs_busy_ff13 ( .A(sba_req_addr_int_1_sqmuxa_1_Z), .B(N_95), .C(N_100), .D(N_115), .Y(un1_sbcs_busy_ff13_i_0) ); defparam un1_sbcs_busy_ff13.INIT=16'hAABA; // @48:13641 CFG4 un1_dmi_req_command_0_a3_RNI1UT441_0 ( .A(N_1625), .B(N_1624), .C(N_806), .D(trace_priv_i), .Y(N_719) ); defparam un1_dmi_req_command_0_a3_RNI1UT441_0.INIT=16'hE000; // @48:14495 CFG4 un1_dmi_req_command_0_a3_RNIGP7L31 ( .A(trace_priv_i), .B(command_reg_state[3]), .C(N_1624), .D(N_1625), .Y(un1_dmi_req_command_0_a3_RNIGP7L31_1z) ); defparam un1_dmi_req_command_0_a3_RNIGP7L31.INIT=16'h8880; // @48:14517 CFG4 debug_csr_rd_data_ready_3_0 ( .A(trace_priv_i), .B(command_reg_state[4]), .C(N_1624), .D(N_1625), .Y(N_59_tz) ); defparam debug_csr_rd_data_ready_3_0.INIT=16'h8880; // @48:14337 CFG4 un1_dmcontrol_ndmreset13_4_0_o2_0_RNI620SL1 ( .A(N_990), .B(N_358_i), .C(un1_dmcontrol_ndmreset13_4_0_o2_0_Z), .D(N_846), .Y(un1_dmcontrol_ndmreset13_4_i) ); defparam un1_dmcontrol_ndmreset13_4_0_o2_0_RNI620SL1.INIT=16'h222A; // @48:15070 CFG4 sba_rd_req_cmb_f0_RNO ( .A(sbcs_readondata_ff_Z), .B(N_1524), .C(N_969), .D(N_915), .Y(N_24_i) ); defparam sba_rd_req_cmb_f0_RNO.INIT=16'h000D; // @48:15070 CFG4 sba_rd_req_cmb_f1_0_RNO ( .A(sbcs_readondata_ff_Z), .B(N_1524), .C(N_969), .D(N_915), .Y(N_26_i) ); defparam sba_rd_req_cmb_f1_0_RNO.INIT=16'h0002; // @48:15361 CFG3 sbcs_ba_err_ff9 ( .A(sbcs_ba_err_0_sqmuxa_Z), .B(sbcs_ba_err_ff_Z), .C(debug_sysbus_resp_error_net), .Y(sbcs_ba_err_ff9_Z) ); defparam sbcs_ba_err_ff9.INIT=8'hB0; // @48:15473 CFG4 sbcs_ba_err_ff_0_sqmuxa_1_2 ( .A(un1_sbcs_ba_err_1_Z), .B(sbcs_access[0]), .C(sba_req_addr_int14), .D(N_99), .Y(sbcs_ba_err_ff_0_sqmuxa_1_2_Z) ); defparam sbcs_ba_err_ff_0_sqmuxa_1_2.INIT=16'h0A08; // @48:15129 CFG4 sba_rd_req_cmb_1_sqmuxa_1_0_a3_1 ( .A(sba_rd_req_cmb_2_sqmuxa_1_i_a2_7_Z), .B(N_1669), .C(sbcs_readonaddr_ff_Z), .D(N_979), .Y(sba_rd_req_cmb_1_sqmuxa_1_0_a3_1_Z) ); defparam sba_rd_req_cmb_1_sqmuxa_1_0_a3_1.INIT=16'h0070; // @48:14023 CFG4 \dmi_rdata_0_iv_0[10] ( .A(N_1570), .B(dmi_rdata_0_iv_0_2_Z[10]), .C(sbdata_ff_Z[10]), .D(N_1087), .Y(dmi_resp_data[12]) ); defparam \dmi_rdata_0_iv_0[10] .INIT=16'hFFEC; // @48:15261 CFG4 \sba_req_wr_data_int_10_0_iv_0[28] ( .A(N_1021), .B(sba_req_wr_data_int[28]), .C(sba_req_wr_data_int_10_0_iv_0_0_Z[28]), .D(N_1563), .Y(sba_req_wr_data_int_10[28]) ); defparam \sba_req_wr_data_int_10_0_iv_0[28] .INIT=16'hFEFA; // @48:15261 CFG4 \sba_req_wr_data_int_10_0_iv_0[29] ( .A(N_1017), .B(sba_req_wr_data_int[29]), .C(sba_req_wr_data_int_10_0_iv_0_0_Z[29]), .D(N_1563), .Y(sba_req_wr_data_int_10[29]) ); defparam \sba_req_wr_data_int_10_0_iv_0[29] .INIT=16'hFEFA; // @48:15261 CFG4 \sba_req_wr_data_int_10_0_iv_0[30] ( .A(N_1013), .B(sba_req_wr_data_int[30]), .C(sba_req_wr_data_int_10_0_iv_0_0_Z[30]), .D(N_1563), .Y(sba_req_wr_data_int_10[30]) ); defparam \sba_req_wr_data_int_10_0_iv_0[30] .INIT=16'hFEFA; // @48:15261 CFG4 \sba_req_wr_data_int_10_0_iv_0[26] ( .A(N_1005), .B(sba_req_wr_data_int[26]), .C(sba_req_wr_data_int_10_0_iv_0_0_Z[26]), .D(N_1563), .Y(sba_req_wr_data_int_10[26]) ); defparam \sba_req_wr_data_int_10_0_iv_0[26] .INIT=16'hFEFA; // @48:15261 CFG4 \sba_req_wr_data_int_10_0_iv_0[27] ( .A(N_1001), .B(sba_req_wr_data_int[27]), .C(sba_req_wr_data_int_10_0_iv_0_0_Z[27]), .D(N_1563), .Y(sba_req_wr_data_int_10[27]) ); defparam \sba_req_wr_data_int_10_0_iv_0[27] .INIT=16'hFEFA; // @48:15261 CFG4 \sba_req_wr_data_int_10_0_iv_0[24] ( .A(N_997), .B(sba_req_wr_data_int[24]), .C(sba_req_wr_data_int_10_0_iv_0_0_Z[24]), .D(N_1563), .Y(sba_req_wr_data_int_10[24]) ); defparam \sba_req_wr_data_int_10_0_iv_0[24] .INIT=16'hFEFA; // @48:15261 CFG3 \sba_req_wr_data_int_10_1_iv_0[9] ( .A(N_1563), .B(sba_req_wr_data_int_10_1_iv_0_0_Z[9]), .C(sba_req_wr_data_int[9]), .Y(sba_req_wr_data_int_10[9]) ); defparam \sba_req_wr_data_int_10_1_iv_0[9] .INIT=8'hEC; // @48:15261 CFG3 \sba_req_wr_data_int_10_1_iv_0[8] ( .A(N_1563), .B(sba_req_wr_data_int_10_1_iv_0_0_Z[8]), .C(sba_req_wr_data_int[8]), .Y(sba_req_wr_data_int_10[8]) ); defparam \sba_req_wr_data_int_10_1_iv_0[8] .INIT=8'hEC; // @48:15261 CFG3 \sba_req_wr_data_int_10_1_iv_0[14] ( .A(N_1563), .B(sba_req_wr_data_int_10_1_iv_0_0_Z[14]), .C(sba_req_wr_data_int[14]), .Y(sba_req_wr_data_int_10[14]) ); defparam \sba_req_wr_data_int_10_1_iv_0[14] .INIT=8'hEC; // @48:15261 CFG3 \sba_req_wr_data_int_10_1_iv_0[13] ( .A(N_1563), .B(sba_req_wr_data_int_10_1_iv_0_0_Z[13]), .C(sba_req_wr_data_int[13]), .Y(sba_req_wr_data_int_10[13]) ); defparam \sba_req_wr_data_int_10_1_iv_0[13] .INIT=8'hEC; // @48:15261 CFG3 \sba_req_wr_data_int_10_1_iv_0[12] ( .A(N_1563), .B(sba_req_wr_data_int_10_1_iv_0_0_Z[12]), .C(sba_req_wr_data_int[12]), .Y(sba_req_wr_data_int_10[12]) ); defparam \sba_req_wr_data_int_10_1_iv_0[12] .INIT=8'hEC; // @48:15261 CFG3 \sba_req_wr_data_int_10_1_iv_0[11] ( .A(N_1563), .B(sba_req_wr_data_int_10_1_iv_0_0_Z[11]), .C(sba_req_wr_data_int[11]), .Y(sba_req_wr_data_int_10[11]) ); defparam \sba_req_wr_data_int_10_1_iv_0[11] .INIT=8'hEC; // @48:15261 CFG3 \sba_req_wr_data_int_10_1_iv_0[17] ( .A(N_1563), .B(sba_req_wr_data_int_10_1_iv_0_0_Z[17]), .C(sba_req_wr_data_int[17]), .Y(sba_req_wr_data_int_10[17]) ); defparam \sba_req_wr_data_int_10_1_iv_0[17] .INIT=8'hEC; // @48:15261 CFG3 \sba_req_wr_data_int_10_1_iv_0[16] ( .A(N_1563), .B(sba_req_wr_data_int_10_1_iv_0_0_Z[16]), .C(sba_req_wr_data_int[16]), .Y(sba_req_wr_data_int_10[16]) ); defparam \sba_req_wr_data_int_10_1_iv_0[16] .INIT=8'hEC; // @48:15261 CFG3 \sba_req_wr_data_int_10_1_iv_0[15] ( .A(N_1563), .B(sba_req_wr_data_int_10_1_iv_0_0_Z[15]), .C(sba_req_wr_data_int[15]), .Y(sba_req_wr_data_int_10[15]) ); defparam \sba_req_wr_data_int_10_1_iv_0[15] .INIT=8'hEC; // @48:15261 CFG3 \sba_req_wr_data_int_10_1_iv_0[21] ( .A(N_1563), .B(sba_req_wr_data_int_10_1_iv_0_0_Z[21]), .C(sba_req_wr_data_int[21]), .Y(sba_req_wr_data_int_10[21]) ); defparam \sba_req_wr_data_int_10_1_iv_0[21] .INIT=8'hEC; // @48:15261 CFG3 \sba_req_wr_data_int_10_1_iv_0[19] ( .A(N_1563), .B(sba_req_wr_data_int_10_1_iv_0_0_Z[19]), .C(sba_req_wr_data_int[19]), .Y(sba_req_wr_data_int_10[19]) ); defparam \sba_req_wr_data_int_10_1_iv_0[19] .INIT=8'hEC; // @48:15261 CFG3 \sba_req_wr_data_int_10_1_iv_0[18] ( .A(N_1563), .B(sba_req_wr_data_int_10_1_iv_0_0_Z[18]), .C(sba_req_wr_data_int[18]), .Y(sba_req_wr_data_int_10[18]) ); defparam \sba_req_wr_data_int_10_1_iv_0[18] .INIT=8'hEC; // @48:15261 CFG3 \sba_req_wr_data_int_10_1_iv_0[23] ( .A(N_1563), .B(sba_req_wr_data_int_10_1_iv_0_0_Z[23]), .C(sba_req_wr_data_int[23]), .Y(sba_req_wr_data_int_10[23]) ); defparam \sba_req_wr_data_int_10_1_iv_0[23] .INIT=8'hEC; // @48:15261 CFG3 \sba_req_wr_data_int_10_1_iv_0[22] ( .A(N_1563), .B(sba_req_wr_data_int_10_1_iv_0_0_Z[22]), .C(sba_req_wr_data_int[22]), .Y(sba_req_wr_data_int_10[22]) ); defparam \sba_req_wr_data_int_10_1_iv_0[22] .INIT=8'hEC; // @48:15261 CFG3 \sba_req_wr_data_int_10_1_iv_0[10] ( .A(N_1563), .B(sba_req_wr_data_int_10_1_iv_0_0_Z[10]), .C(sba_req_wr_data_int[10]), .Y(sba_req_wr_data_int_10[10]) ); defparam \sba_req_wr_data_int_10_1_iv_0[10] .INIT=8'hEC; // @48:15261 CFG3 \sba_req_wr_data_int_10_1_iv_0[20] ( .A(N_1563), .B(sba_req_wr_data_int_10_1_iv_0_0_Z[20]), .C(sba_req_wr_data_int[20]), .Y(sba_req_wr_data_int_10[20]) ); defparam \sba_req_wr_data_int_10_1_iv_0[20] .INIT=8'hEC; // @48:15261 CFG4 \sba_req_wr_data_int_10_0_iv_0[25] ( .A(N_1009), .B(sba_req_wr_data_int[25]), .C(sba_req_wr_data_int_10_0_iv_0_0_Z[25]), .D(N_1563), .Y(sba_req_wr_data_int_10[25]) ); defparam \sba_req_wr_data_int_10_0_iv_0[25] .INIT=16'hFEFA; // @48:15351 CFG4 un1_sbcs_uar_err_ff_0_sqmuxa ( .A(sbcs_uar_err_Z), .B(sba_req_addr_int14), .C(N_685_i), .D(N_78), .Y(un1_sbcs_uar_err_ff_0_sqmuxa_i) ); defparam un1_sbcs_uar_err_ff_0_sqmuxa.INIT=16'h0444; // @48:14647 CFG4 \data_0_reg_5_m1_0[26] ( .A(cpu_debug_active_net), .B(N_813), .C(dmi_req_data[28]), .D(N_1567), .Y(data_0_reg_5_m1_26) ); defparam \data_0_reg_5_m1_0[26] .INIT=16'hB030; // @48:14647 CFG4 \data_0_reg_5_m1_0[25] ( .A(cpu_debug_active_net), .B(N_813), .C(dmi_req_data[27]), .D(N_1567), .Y(data_0_reg_5_m1_25) ); defparam \data_0_reg_5_m1_0[25] .INIT=16'hB030; // @48:14647 CFG4 \data_0_reg_5_m1_0[24] ( .A(cpu_debug_active_net), .B(N_813), .C(dmi_req_data[26]), .D(N_1567), .Y(data_0_reg_5_m1_24) ); defparam \data_0_reg_5_m1_0[24] .INIT=16'hB030; // @48:14647 CFG4 \data_0_reg_5_m1_0[23] ( .A(cpu_debug_active_net), .B(N_813), .C(dmi_req_data[25]), .D(N_1567), .Y(data_0_reg_5_m1_23) ); defparam \data_0_reg_5_m1_0[23] .INIT=16'hB030; // @48:14647 CFG4 \data_0_reg_5_m1_0[22] ( .A(cpu_debug_active_net), .B(N_813), .C(dmi_req_data[24]), .D(N_1567), .Y(data_0_reg_5_m1_22) ); defparam \data_0_reg_5_m1_0[22] .INIT=16'hB030; // @48:14647 CFG4 \data_0_reg_5_m1_0[8] ( .A(cpu_debug_active_net), .B(N_813), .C(dmi_req_data[10]), .D(N_1567), .Y(data_0_reg_5_m1_8) ); defparam \data_0_reg_5_m1_0[8] .INIT=16'hB030; // @48:14647 CFG4 \data_0_reg_5_m1_0[7] ( .A(cpu_debug_active_net), .B(N_813), .C(dmi_req_data[9]), .D(N_1567), .Y(data_0_reg_5_m1_7) ); defparam \data_0_reg_5_m1_0[7] .INIT=16'hB030; // @48:14647 CFG4 \data_0_reg_5_m1_0[6] ( .A(cpu_debug_active_net), .B(N_813), .C(dmi_req_data[8]), .D(N_1567), .Y(data_0_reg_5_m1_6) ); defparam \data_0_reg_5_m1_0[6] .INIT=16'hB030; // @48:14647 CFG4 \data_0_reg_5_m1_0[17] ( .A(cpu_debug_active_net), .B(N_813), .C(dmi_req_data[19]), .D(N_1567), .Y(data_0_reg_5_m1_17) ); defparam \data_0_reg_5_m1_0[17] .INIT=16'hB030; // @48:14647 CFG4 \data_0_reg_5_m1_0[18] ( .A(cpu_debug_active_net), .B(N_813), .C(dmi_req_data[20]), .D(N_1567), .Y(data_0_reg_5_m1_18) ); defparam \data_0_reg_5_m1_0[18] .INIT=16'hB030; // @48:14647 CFG4 \data_0_reg_5_m1_0[19] ( .A(cpu_debug_active_net), .B(N_813), .C(dmi_req_data[21]), .D(N_1567), .Y(data_0_reg_5_m1_19) ); defparam \data_0_reg_5_m1_0[19] .INIT=16'hB030; // @48:14647 CFG4 \data_0_reg_5_m1_0[20] ( .A(cpu_debug_active_net), .B(N_813), .C(dmi_req_data[22]), .D(N_1567), .Y(data_0_reg_5_m1_20) ); defparam \data_0_reg_5_m1_0[20] .INIT=16'hB030; // @48:14647 CFG4 \data_0_reg_5_m1_0[21] ( .A(cpu_debug_active_net), .B(N_813), .C(dmi_req_data[23]), .D(N_1567), .Y(data_0_reg_5_m1_21) ); defparam \data_0_reg_5_m1_0[21] .INIT=16'hB030; // @48:14647 CFG4 \data_0_reg_5_m1_0[4] ( .A(cpu_debug_active_net), .B(N_813), .C(dmi_req_data[6]), .D(N_1567), .Y(data_0_reg_5_m1_4) ); defparam \data_0_reg_5_m1_0[4] .INIT=16'hB030; // @48:14647 CFG4 \data_0_reg_5_m1_0[0] ( .A(cpu_debug_active_net), .B(N_813), .C(dmi_req_data[2]), .D(N_1567), .Y(data_0_reg_5_m1_0) ); defparam \data_0_reg_5_m1_0[0] .INIT=16'hB030; // @48:15261 CFG4 \sba_req_wr_data_int_10_1_iv_0[7] ( .A(N_1563), .B(N_1657), .C(sba_req_wr_data_int[7]), .D(N_820), .Y(sba_req_wr_data_int_10[7]) ); defparam \sba_req_wr_data_int_10_1_iv_0[7] .INIT=16'hECA0; // @48:15261 CFG4 \sba_req_wr_data_int_10_1_iv_0[6] ( .A(N_1563), .B(N_1657), .C(sba_req_wr_data_int[6]), .D(N_821), .Y(sba_req_wr_data_int_10[6]) ); defparam \sba_req_wr_data_int_10_1_iv_0[6] .INIT=16'hECA0; // @48:15261 CFG4 \sba_req_wr_data_int_10_1_iv_0[4] ( .A(N_1563), .B(N_1657), .C(sba_req_wr_data_int[4]), .D(N_817), .Y(sba_req_wr_data_int_10[4]) ); defparam \sba_req_wr_data_int_10_1_iv_0[4] .INIT=16'hECA0; // @48:15261 CFG4 \sba_req_wr_data_int_10_1_iv_0[3] ( .A(N_1563), .B(N_1657), .C(sba_req_wr_data_int[3]), .D(N_818), .Y(sba_req_wr_data_int_10[3]) ); defparam \sba_req_wr_data_int_10_1_iv_0[3] .INIT=16'hECA0; // @48:14339 CFG4 \command_reg_state_4_0_a3_1[2] ( .A(N_805), .B(N_81_i), .C(N_1647), .D(N_1839), .Y(N_1097_1) ); defparam \command_reg_state_4_0_a3_1[2] .INIT=16'h4000; // @48:15261 CFG4 sbcs_to_err_ff_10_f0 ( .A(sbcs_to_err_ff_0_sqmuxa_Z), .B(N_81_i), .C(sbcs_to_err_ff_10_f1_0_Z), .D(un1_sbcs_busy_ff13_i_0), .Y(sbcs_to_err_ff_10) ); defparam sbcs_to_err_ff_10_f0.INIT=16'hC8C0; // @48:15261 CFG3 sba_wr_req_ff_4 ( .A(sba_wr_req_cmb), .B(N_78), .C(N_81_i), .Y(sba_wr_req_ff_4_Z) ); defparam sba_wr_req_ff_4.INIT=8'h80; // @48:15261 CFG3 sba_rd_req_ff_4 ( .A(sba_rd_req_cmb), .B(N_78), .C(N_81_i), .Y(sba_rd_req_ff_4_Z) ); defparam sba_rd_req_ff_4.INIT=8'h80; // @48:15261 CFG4 sbcs_ba_err_ff_7_f0 ( .A(sbcs_ba_err_ff9_Z), .B(N_81_i), .C(sbcs_ba_err_ff_7_f1_0_Z), .D(un1_sbcs_busy_ff13_i_0), .Y(sbcs_ba_err_ff_7) ); defparam sbcs_ba_err_ff_7_f0.INIT=16'hC8C0; // @48:15261 CFG4 \sba_req_wr_data_int_10_1_iv_0[1] ( .A(N_1563), .B(N_1657), .C(sba_req_wr_data_int[1]), .D(N_814), .Y(sba_req_wr_data_int_10[1]) ); defparam \sba_req_wr_data_int_10_1_iv_0[1] .INIT=16'hECA0; // @48:15261 CFG4 \sba_req_wr_data_int_10_1_iv_0[0] ( .A(N_1563), .B(N_1657), .C(sba_req_wr_data_int[0]), .D(N_815), .Y(sba_req_wr_data_int_10[0]) ); defparam \sba_req_wr_data_int_10_1_iv_0[0] .INIT=16'hECA0; // @48:15261 CFG4 \sba_req_wr_data_int_10_1_iv_0[2] ( .A(N_1563), .B(N_1657), .C(sba_req_wr_data_int[2]), .D(N_819), .Y(sba_req_wr_data_int_10[2]) ); defparam \sba_req_wr_data_int_10_1_iv_0[2] .INIT=16'hECA0; // @48:15261 CFG4 \sba_req_wr_data_int_10_1_iv_0[5] ( .A(N_1563), .B(N_1657), .C(sba_req_wr_data_int[5]), .D(N_816), .Y(sba_req_wr_data_int_10[5]) ); defparam \sba_req_wr_data_int_10_1_iv_0[5] .INIT=16'hECA0; // @48:14495 CFG4 un1_dmi_req_command_0_a3_RNIKVKJ31_0 ( .A(N_1625), .B(N_1624), .C(command_reg[12]), .D(dmi_req_data[14]), .Y(debug_csr_rd_data_ready_1_sqmuxa_i) ); defparam un1_dmi_req_command_0_a3_RNIKVKJ31_0.INIT=16'h135F; // @48:14495 CFG4 un1_dmi_req_command_0_a3_RNIKVKJ31 ( .A(N_1625), .B(N_1624), .C(command_reg[12]), .D(dmi_req_data[14]), .Y(debug_gpr_addr_0_sqmuxa_i) ); defparam un1_dmi_req_command_0_a3_RNIKVKJ31.INIT=16'hF531; // @48:15259 CFG3 sbcs_uar_err_ff_6_iv_i ( .A(N_81_i), .B(sbcs_uar_err_Z), .C(un1_sbcs_uar_err_ff_0_sqmuxa_i), .Y(sbcs_uar_err_ff_6_iv_i_Z) ); defparam sbcs_uar_err_ff_6_iv_i.INIT=8'hA8; // @48:15259 CFG4 sbcs_busy_ff_2_sqmuxa_i ( .A(N_100), .B(N_95), .C(N_81_i), .D(N_94), .Y(sbcs_busy_ff_2_sqmuxa_i_Z) ); defparam sbcs_busy_ff_2_sqmuxa_i.INIT=16'h2F3F; // @48:15508 CFG4 sba_resp_ready_int21 ( .A(cpu_d_resp_valid_sig), .B(trace_priv_i), .C(sba_rd_req_cmb), .D(cpu_d_resp_error_sig), .Y(sba_resp_ready_int21_Z) ); defparam sba_resp_ready_int21.INIT=16'h0080; // @48:15508 CFG3 un1_sba_resp_ready_int21_1 ( .A(sba_resp_ready_int21_Z), .B(timeout_Z), .C(debug_sysbus_resp_error_net), .Y(un1_sba_resp_ready_int21_1_Z) ); defparam un1_sba_resp_ready_int21_1.INIT=8'hFE; // @48:15243 CFG4 next_state28 ( .A(trace_priv_i), .B(cpu_d_resp_valid_sig), .C(debug_sysbus_resp_error_net), .D(un1_sba_rd_req_cmb_1_Z), .Y(next_state28_Z) ); defparam next_state28.INIT=16'hF800; // @48:15192 CFG3 \sba_state_ns_1_0_.m13 ( .A(sba_state_Z[0]), .B(sba_state_ns_1[0]), .C(N_18_mux), .Y(sba_state_ns[0]) ); defparam \sba_state_ns_1_0_.m13 .INIT=8'hEC; // @48:14023 CFG4 \dmi_rdata_0_iv_0[0] ( .A(N_1569), .B(dmi_rdata_0_iv_0_4_Z[0]), .C(sbaddr_ff_Z[0]), .D(N_1113), .Y(dmi_resp_data[2]) ); defparam \dmi_rdata_0_iv_0[0] .INIT=16'hFFEC; // @48:14398 CFG4 cmderr_cmb_1_sqmuxa_1_0 ( .A(cmderr_cmb_3_sqmuxa_i_tz_tz), .B(N_1647), .C(N_81_i), .D(N_805), .Y(cmderr_cmb_1_sqmuxa_1) ); defparam cmderr_cmb_1_sqmuxa_1_0.INIT=16'h0080; // @48:14398 CFG4 cmderr_cmb_3_sqmuxa_0 ( .A(cmderr_cmb_3_sqmuxa_i_tz_tz), .B(N_1647), .C(N_81_i), .D(N_805), .Y(cmderr_cmb_3_sqmuxa) ); defparam cmderr_cmb_3_sqmuxa_0.INIT=16'h8000; // @48:13641 CFG2 debug_csr_rd_data_ready_3_0_RNIAAFA7 ( .A(N_59_tz), .B(cpu_debug_csr_op_rd_data_valid_net), .Y(N_76_i) ); defparam debug_csr_rd_data_ready_3_0_RNIAAFA7.INIT=4'h8; // @48:15548 CFG4 sba_req_addr_int_0_sqmuxa_1 ( .A(sba_resp_ready_int21_Z), .B(count_en_0_sqmuxa_1), .C(timeout_Z), .D(debug_sysbus_resp_error_net), .Y(sba_req_addr_int_0_sqmuxa_1_Z) ); defparam sba_req_addr_int_0_sqmuxa_1.INIT=16'h888C; // @48:15548 CFG4 sba_req_addr_int_1_sqmuxa_1 ( .A(sba_resp_ready_int21_Z), .B(count_en_0_sqmuxa_1), .C(timeout_Z), .D(debug_sysbus_resp_error_net), .Y(sba_req_addr_int_1_sqmuxa_1_Z) ); defparam sba_req_addr_int_1_sqmuxa_1.INIT=16'h4440; // @48:15473 CFG4 sbcs_ba_err_ff_0_sqmuxa_1 ( .A(N_101_0), .B(N_1823), .C(sbcs_ba_err_ff_0_sqmuxa_1_2_Z), .D(N_685_i), .Y(sbcs_ba_err_ff_0_sqmuxa_1_Z) ); defparam sbcs_ba_err_ff_0_sqmuxa_1.INIT=16'h0020; // @48:14339 CFG4 \command_reg_state_4_0_a2_0_RNIQH3GK[1] ( .A(N_723_1), .B(N_1840), .C(N_805), .D(N_1839), .Y(N_723) ); defparam \command_reg_state_4_0_a2_0_RNIQH3GK[1] .INIT=16'hAFAE; // @48:15261 CFG3 \sba_req_wr_byte_en_int_13[3] ( .A(sba_req_wr_byte_en_int_13_m2_2_Z[3]), .B(un1_sbcs_readonaddr_ff7_4_sn), .C(sba_req_wr_byte_en_int_13_m2_1_Z[2]), .Y(sba_req_wr_byte_en_int_13_Z[3]) ); defparam \sba_req_wr_byte_en_int_13[3] .INIT=8'h32; // @48:15261 CFG3 \sba_req_wr_byte_en_int_13[2] ( .A(sba_req_wr_byte_en_int_13_m2_2_Z[2]), .B(un1_sbcs_readonaddr_ff7_4_sn), .C(sba_req_wr_byte_en_int_13_m2_1_Z[2]), .Y(sba_req_wr_byte_en_int_13_Z[2]) ); defparam \sba_req_wr_byte_en_int_13[2] .INIT=8'h32; // @48:14339 CFG4 \command_reg_state_4_0[2] ( .A(N_1098_1), .B(N_1097_1), .C(command_reg[16]), .D(dmi_req_data[18]), .Y(command_reg_state_4[2]) ); defparam \command_reg_state_4_0[2] .INIT=16'h0ACE; // @48:14339 CFG4 \command_reg_state_4_0[1] ( .A(N_1098_1), .B(N_1097_1), .C(command_reg[16]), .D(dmi_req_data[18]), .Y(command_reg_state_4[1]) ); defparam \command_reg_state_4_0[1] .INIT=16'hECA0; // @48:15351 CFG4 un1_sbcs_busy_ff13_3_0_0 ( .A(N_100), .B(sba_req_addr_int_0_sqmuxa_1_Z), .C(sba_state_Z[1]), .D(N_94), .Y(un1_sbcs_busy_ff13_3_0) ); defparam un1_sbcs_busy_ff13_3_0_0.INIT=16'hCDCC; // @48:15351 CFG4 un1_sbcs_busy_ff13_3_2 ( .A(d_N_7_1), .B(un1_m3_e_1), .C(next_state21), .D(un1_sbcs_busy_ff13_3_0), .Y(un1_sbcs_busy_ff13_3_1) ); defparam un1_sbcs_busy_ff13_3_2.INIT=16'hFF2E; // @48:14339 CFG4 cmderr_cmb_0_sqmuxa_2_i_a3_3_RNI09IF31 ( .A(cmderr_cmb_0_sqmuxa_2_i_a3_3_Z), .B(N_723), .C(command_reg_state[0]), .D(N_81_i), .Y(N_358_i) ); defparam cmderr_cmb_0_sqmuxa_2_i_a3_3_RNI09IF31.INIT=16'hD500; // @48:14398 CFG3 un1_next_state_0_sqmuxa_3_0_a3_0_RNO ( .A(cpu_debug_csr_op_rd_data_valid_net), .B(gpr_rs2_rd_data_valid_sig), .C(trace_priv_i), .Y(N_369_i) ); defparam un1_next_state_0_sqmuxa_3_0_a3_0_RNO.INIT=8'hE0; // @48:15222 CFG4 next_state21_a1_0_a0 ( .A(cpu_m8_0_a3_0_2), .B(un1_cpu_d_req_ready_sig_c), .C(cpu_m8_0_a3_0_3), .D(cpu_i_req_is_tcm0_5), .Y(next_state21_a1_0_a0_Z) ); defparam next_state21_a1_0_a0.INIT=16'h2000; // @48:15222 CFG4 next_state21_a1 ( .A(req_masked_0), .B(next_state21_a1_0_a0_Z), .C(cpu_N_6), .D(un1_cpu_d_req_ready_sig_c), .Y(next_state21_a1_Z) ); defparam next_state21_a1.INIT=16'h88A8; // @48:15482 CFG4 sba_req_valid_int35 ( .A(sba_req_valid_int35_0_Z), .B(un1_cpu_d_req_ready_sig_d_0), .C(req_masked_0), .D(un1_cpu_d_req_ready_sig_0_0), .Y(sba_req_valid_int35_Z) ); defparam sba_req_valid_int35.INIT=16'hAA08; // @48:15482 CFG2 sba_req_addr_int_1_sqmuxa_2 ( .A(sbcs_busy_ff15), .B(sba_req_addr_int_0_sqmuxa), .Y(sba_req_addr_int_1_sqmuxa_2_Z) ); defparam sba_req_addr_int_1_sqmuxa_2.INIT=4'h8; // @48:15351 CFG3 un1_sbcs_busy_ff13_3 ( .A(sbcs_busy_ff15), .B(sba_req_addr_int_0_sqmuxa), .C(un1_sbcs_busy_ff13_3_1), .Y(un1_sbcs_busy_ff13_3_i) ); defparam un1_sbcs_busy_ff13_3.INIT=8'hF2; // @48:15482 CFG2 un1_sba_req_valid_int35_1 ( .A(sba_req_valid_int35_Z), .B(sba_resp_ready_int21_Z), .Y(un1_sba_req_valid_int35_1_Z) ); defparam un1_sba_req_valid_int35_1.INIT=4'hE; // @48:15548 CFG3 sba_resp_ready_int_1_sqmuxa_1 ( .A(sba_req_valid_int35_Z), .B(sbcs_busy_ff15), .C(sba_resp_ready_int21_Z), .Y(sba_resp_ready_int_1_sqmuxa_1_Z) ); defparam sba_resp_ready_int_1_sqmuxa_1.INIT=8'h40; // @48:15351 CFG4 un1_sbcs_busy_ff13_2_0 ( .A(un1_sba_req_valid_int35_1_Z), .B(timeout_Z), .C(sba_req_valid_int_1_sqmuxa_Z), .D(sbcs_busy_ff15), .Y(un1_sbcs_busy_ff13_2_0_Z) ); defparam un1_sbcs_busy_ff13_2_0.INIT=16'hFEF0; // @48:15351 CFG4 un1_sbcs_busy_ff13_1 ( .A(un1_sba_resp_ready_int21_1_Z), .B(count_en_0_sqmuxa_1), .C(sba_resp_ready_int_1_sqmuxa_1_Z), .D(N_78), .Y(un1_sbcs_busy_ff13_1_Z) ); defparam un1_sbcs_busy_ff13_1.INIT=16'hF8FF; // @48:15351 CFG4 un1_sbcs_ba_err_ff_0_sqmuxa ( .A(un1_sba_req_valid_int35_1_Z), .B(sbcs_to_err_ff_0_sqmuxa_Z), .C(sbcs_ba_err_ff_0_sqmuxa_1_Z), .D(sbcs_busy_ff15), .Y(un1_sbcs_ba_err_ff_0_sqmuxa_i_0) ); defparam un1_sbcs_ba_err_ff_0_sqmuxa.INIT=16'hF4F0; // @48:15351 CFG4 sba_resp_ready_int_2_sqmuxa_i_0 ( .A(N_103), .B(un1_sbcs_busy_ff13_1_Z), .C(N_81_i), .D(sba_resp_ready_int_2_sqmuxa_i_a3_0_Z), .Y(N_401) ); defparam sba_resp_ready_int_2_sqmuxa_i_0.INIT=16'hDFCF; // @48:15261 CFG4 sba_req_valid_int_9 ( .A(un1_sbcs_busy_ff13_2_0_Z), .B(N_78), .C(N_81_i), .D(sba_req_addr_int14), .Y(sba_req_valid_int_9_Z) ); defparam sba_req_valid_int_9.INIT=16'h0040; // @48:15259 CFG2 sba_resp_ready_int_RNO ( .A(un1_sbcs_busy_ff13_1_Z), .B(N_81_i), .Y(un1_sbcs_readonaddr_ff7_7_i) ); defparam sba_resp_ready_int_RNO.INIT=4'h4; // @48:15259 CFG4 sba_req_valid_int_2_sqmuxa_i ( .A(un1_sbcs_busy_ff13_2_0_Z), .B(N_78), .C(N_81_i), .D(sba_req_valid_int_0_sqmuxa_Z), .Y(sba_req_valid_int_2_sqmuxa_i_Z) ); defparam sba_req_valid_int_2_sqmuxa_i.INIT=16'hFFBF; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_debug_sba */ module miv_rv32_debug_du ( sba_req_addr_int, sba_req_wr_data_int, req_masked_0, debug_sysbus_req_rd_byte_en_net, debug_sysbus_req_wr_byte_en_net, dmi_req_data, cpu_d_resp_rd_data_net, dmi_resp_data, cpu_debug_op_wr_data_net, cpu_debug_csr_op_addr_net, cpu_debug_gpr_op_addr_net, cpu_debug_csr_op_rd_data_net, cpu_debug_gpr_op_rd_data_net, debug_sysbus_req_valid_net, debug_sysbus_resp_ready_net, sbcs_busyerror_1_sqmuxa_1, un1_cpu_d_req_ready_sig_c, un1_cpu_d_req_ready_sig_d_0, cpu_N_14_mux, cpu_N_6, cpu_m8_0_a3_0_2, cpu_i_req_is_tcm0_5, cpu_m8_0_a3_0_3, trace_priv_i, gpr_rs2_rd_data_valid_sig, N_1547, sba_req_addr_1, debug_trx_os_net, N_807, empty_rd, N_812, init_wr_dcsr_step_en, debug_exit_retr, cpu_debug_halt_ack_net, dmi_resp_valid_0_0, debug_sysbus_resp_error_net, cpu_d_resp_valid_sig, cpu_d_resp_error_sig, cpu_debug_csr_op_rd_data_valid_net, un1_cpu_d_req_ready_sig_0_0, cpu_debug_gpr_rd_en_net, cpu_debug_csr_rd_en_net, cpu_debug_gpr_wr_en_net, cpu_debug_gpr_op_valid_net, cpu_debug_csr_wr_en_net, cpu_debug_csr_op_valid_net, debug_sys_reset, cpu_debug_halt_req_net, cpu_debug_resume_req_net, PF_CCC_0_0_OUT0_FABCLK_0, dff, cpu_debug_active_net ) ; output [31:0] sba_req_addr_int ; output [31:0] sba_req_wr_data_int ; input req_masked_0 ; output [3:0] debug_sysbus_req_rd_byte_en_net ; output [3:0] debug_sysbus_req_wr_byte_en_net ; input [40:0] dmi_req_data ; input [31:0] cpu_d_resp_rd_data_net ; output [33:0] dmi_resp_data ; output [31:0] cpu_debug_op_wr_data_net ; output [11:0] cpu_debug_csr_op_addr_net ; output [5:0] cpu_debug_gpr_op_addr_net ; input [31:0] cpu_debug_csr_op_rd_data_net ; input [31:0] cpu_debug_gpr_op_rd_data_net ; output debug_sysbus_req_valid_net ; output debug_sysbus_resp_ready_net ; output sbcs_busyerror_1_sqmuxa_1 ; input un1_cpu_d_req_ready_sig_c ; input un1_cpu_d_req_ready_sig_d_0 ; input cpu_N_14_mux ; input cpu_N_6 ; input cpu_m8_0_a3_0_2 ; input cpu_i_req_is_tcm0_5 ; input cpu_m8_0_a3_0_3 ; input trace_priv_i ; input gpr_rs2_rd_data_valid_sig ; output N_1547 ; output sba_req_addr_1 ; input debug_trx_os_net ; output N_807 ; input empty_rd ; output N_812 ; input init_wr_dcsr_step_en ; input debug_exit_retr ; input cpu_debug_halt_ack_net ; output dmi_resp_valid_0_0 ; input debug_sysbus_resp_error_net ; input cpu_d_resp_valid_sig ; input cpu_d_resp_error_sig ; input cpu_debug_csr_op_rd_data_valid_net ; input un1_cpu_d_req_ready_sig_0_0 ; output cpu_debug_gpr_rd_en_net ; output cpu_debug_csr_rd_en_net ; output cpu_debug_gpr_wr_en_net ; output cpu_debug_gpr_op_valid_net ; output cpu_debug_csr_wr_en_net ; output cpu_debug_csr_op_valid_net ; output debug_sys_reset ; output cpu_debug_halt_req_net ; output cpu_debug_resume_req_net ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input dff ; output cpu_debug_active_net ; wire req_masked_0 ; wire debug_sysbus_req_valid_net ; wire debug_sysbus_resp_ready_net ; wire sbcs_busyerror_1_sqmuxa_1 ; wire un1_cpu_d_req_ready_sig_c ; wire un1_cpu_d_req_ready_sig_d_0 ; wire cpu_N_14_mux ; wire cpu_N_6 ; wire cpu_m8_0_a3_0_2 ; wire cpu_i_req_is_tcm0_5 ; wire cpu_m8_0_a3_0_3 ; wire trace_priv_i ; wire gpr_rs2_rd_data_valid_sig ; wire N_1547 ; wire sba_req_addr_1 ; wire debug_trx_os_net ; wire N_807 ; wire empty_rd ; wire N_812 ; wire init_wr_dcsr_step_en ; wire debug_exit_retr ; wire cpu_debug_halt_ack_net ; wire dmi_resp_valid_0_0 ; wire debug_sysbus_resp_error_net ; wire cpu_d_resp_valid_sig ; wire cpu_d_resp_error_sig ; wire cpu_debug_csr_op_rd_data_valid_net ; wire un1_cpu_d_req_ready_sig_0_0 ; wire cpu_debug_gpr_rd_en_net ; wire cpu_debug_csr_rd_en_net ; wire cpu_debug_gpr_wr_en_net ; wire cpu_debug_gpr_op_valid_net ; wire cpu_debug_csr_wr_en_net ; wire cpu_debug_csr_op_valid_net ; wire debug_sys_reset ; wire cpu_debug_halt_req_net ; wire cpu_debug_resume_req_net ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire dff ; wire cpu_debug_active_net ; wire [5:5] command_reg_state_4_1_0_Z; wire [5:5] command_reg_state_4_fast_Z; wire [5:0] debug_state_Z; wire [5:1] debug_state_ns; wire [5:0] command_reg_state_Z; wire [2:1] command_reg_state_4; wire [0:0] command_reg_state_4_0_fast; wire [31:0] data_0_reg_Z; wire [31:0] data_0_reg_5_Z; wire [31:0] command_reg_Z; wire [2:0] cmderr_ff_Z; wire [2:0] cmderr_ff_4; wire [31:0] data_gpr_reg_Z; wire [2:0] abstractcs_cmderr_Z; wire [31:0] data_csr_reg_Z; wire [31:0] data_0_reg_5_1_Z; wire [26:0] data_0_reg_5_m1; wire N_723 ; wire N_1108 ; wire VCC ; wire N_81_i ; wire GND ; wire debug_resume_req_3 ; wire N_123_i ; wire N_52_i ; wire dmstatus_allany_halted_Z ; wire N_110_i ; wire N_990 ; wire dmstatus_allany_resumeack_Z ; wire N_112_i ; wire dmstatus_allany_havereset_Z ; wire N_170_i ; wire dmcontrol_ackhavereset_Z ; wire N_128_i ; wire N_130_i ; wire dmcontrol_haltreq_Z ; wire N_132_i ; wire dmcontrol_resumereq_Z ; wire N_134_i ; wire abs_cmd_transfer_ff_Z ; wire N_136_i ; wire N_719 ; wire debug_csr_rd_data_ready_1_sqmuxa_i ; wire un1_dmi_req_command_0_a3_RNIGP7L31 ; wire debug_gpr_addr_0_sqmuxa_i ; wire abstractcs_busy_Z ; wire N_361 ; wire N_59_tz ; wire next_state_0_sqmuxa_i_RNI4B2FB ; wire N_88_i ; wire dmcontrol_dmactive4 ; wire havereset_skip_pwrup_Z ; wire havereset_skip_pwrup_4 ; wire N_53 ; wire un1_dmcontrol_ndmreset13_i ; wire un1_dmcontrol_ndmreset13_4_i ; wire N_190_i ; wire N_75_i ; wire un1_dmcontrol_ndmreset13_2_i ; wire N_76_i ; wire un1_dmi_req_command_0_a3_RNIERK9D_0 ; wire N_78_i ; wire un1_dmi_req_command_0_a3_RNICPK9D_0 ; wire un1_dmi_req_command_0_a3_RNIANK9D_0 ; wire un1_dmi_req_command_0_a3_RNI8LK9D_0 ; wire un1_dmi_req_command_0_a3_RNIIVK9D_0 ; wire un1_dmi_req_command_0_a3_RNIGTK9D ; wire un1_dmi_req_command_0_a3_RNIERK9D ; wire un1_dmi_req_command_0_a3_RNICPK9D ; wire un1_dmi_req_command_0_a3_RNIANK9D ; wire un1_dmi_req_command_0_a3_RNI8LK9D ; wire un1_dmi_req_command_0_a3_RNICTI09 ; wire un1_dmi_req_command_0_a3_RNIARI09 ; wire un1_dmi_req_command_0_a3_RNI10U4D ; wire un1_dmi_req_command_0_a3_RNIVTT4D ; wire un1_dmi_req_command_0_a3_RNIM3L9D ; wire un1_dmi_req_command_0_a3_RNIK1L9D ; wire un1_dmi_req_command_0_a3_RNIIVK9D ; wire un1_dmi_req_command_0_a3_RNIGTK9D_0 ; wire N_88_1 ; wire data_0_reg_5_sm0 ; wire un1_debug_csr_rd_en_1 ; wire un1_debug_csr_rd_en ; wire N_53_1 ; wire N_15 ; wire N_6 ; wire N_5 ; wire N_4 ; wire N_3 ; wire N_2 ; wire N_1 ; wire N_15126 ; wire N_15127 ; wire N_15128 ; wire N_15129 ; wire N_15130 ; // @48:14339 CFG3 \command_reg_state_4_fast[5] ( .A(command_reg_state_4_1_0_Z[5]), .B(N_723), .C(N_1108), .Y(command_reg_state_4_fast_Z[5]) ); defparam \command_reg_state_4_fast[5] .INIT=8'hBA; // @48:14111 SLE clk_en_dm ( .Q(cpu_debug_active_net), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_81_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14716 SLE debug_resume_req ( .Q(cpu_debug_resume_req_net), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(debug_resume_req_3), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14698 SLE debug_halt_req ( .Q(cpu_debug_halt_req_net), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_123_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14736 SLE \debug_state[5] ( .Q(debug_state_Z[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(debug_state_ns[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14736 SLE \debug_state[4] ( .Q(debug_state_Z[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_52_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14736 SLE \debug_state[3] ( .Q(debug_state_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(debug_state_ns[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14736 SLE \debug_state[2] ( .Q(debug_state_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(debug_state_ns[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14736 SLE \debug_state[1] ( .Q(debug_state_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(debug_state_ns[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14736 SLE \debug_state[0] ( .Q(debug_state_Z[0]), .ADn(GND), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(GND), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14251 SLE dmstatus_allany_halted ( .Q(dmstatus_allany_halted_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_110_i), .EN(N_990), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14278 SLE dmstatus_allany_resumeack ( .Q(dmstatus_allany_resumeack_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_112_i), .EN(N_990), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14159 SLE dmstatus_allany_havereset ( .Q(dmstatus_allany_havereset_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_170_i), .EN(N_990), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14132 SLE dmcontrol_ackhavereset ( .Q(dmcontrol_ackhavereset_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_128_i), .EN(N_990), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14132 SLE dmcontrol_ndmreset ( .Q(debug_sys_reset), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_130_i), .EN(N_990), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14225 SLE dmcontrol_haltreq ( .Q(dmcontrol_haltreq_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_132_i), .EN(N_990), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14225 SLE dmcontrol_resumereq ( .Q(dmcontrol_resumereq_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_134_i), .EN(N_990), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14337 SLE abs_cmd_transfer_ff ( .Q(abs_cmd_transfer_ff_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_136_i), .EN(N_990), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14495 SLE debug_csr_valid ( .Q(cpu_debug_csr_op_valid_net), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_719), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14495 SLE debug_csr_wr_en ( .Q(cpu_debug_csr_wr_en_net), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un1_dmi_req_command_0_a3_RNIGP7L31), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14495 SLE debug_gpr_valid ( .Q(cpu_debug_gpr_op_valid_net), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_719), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14495 SLE debug_gpr_wr_en ( .Q(cpu_debug_gpr_wr_en_net), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un1_dmi_req_command_0_a3_RNIGP7L31), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14337 SLE abstractcs_busy ( .Q(abstractcs_busy_Z), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_361), .EN(N_990), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14495 SLE debug_csr_rd_en ( .Q(cpu_debug_csr_rd_en_net), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_59_tz), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14495 SLE debug_gpr_rd_en ( .Q(cpu_debug_gpr_rd_en_net), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_59_tz), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14337 SLE \command_reg_state[5] ( .Q(command_reg_state_Z[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(command_reg_state_4_fast_Z[5]), .EN(N_990), .LAT(GND), .SD(GND), .SLn(N_81_i) ); // @48:14337 SLE \command_reg_state[4] ( .Q(command_reg_state_Z[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_state_0_sqmuxa_i_RNI4B2FB), .EN(N_990), .LAT(GND), .SD(GND), .SLn(N_81_i) ); // @48:14337 SLE \command_reg_state[3] ( .Q(command_reg_state_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_88_i), .EN(N_990), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14337 SLE \command_reg_state[2] ( .Q(command_reg_state_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(command_reg_state_4[2]), .EN(N_990), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14337 SLE \command_reg_state[1] ( .Q(command_reg_state_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(command_reg_state_4[1]), .EN(N_990), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14337 SLE \command_reg_state[0] ( .Q(command_reg_state_Z[0]), .ADn(GND), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(command_reg_state_4_0_fast[0]), .EN(N_990), .LAT(GND), .SD(VCC), .SLn(N_81_i) ); // @48:14111 SLE dmcontrol_dmactive ( .Q(N_81_i), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_req_data[2]), .EN(dmcontrol_dmactive4), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14159 SLE havereset_skip_pwrup ( .Q(havereset_skip_pwrup_Z), .ADn(GND), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(havereset_skip_pwrup_4), .EN(N_990), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14639 SLE \data_0_reg[5] ( .Q(data_0_reg_Z[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_5_Z[5]), .EN(N_53), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14639 SLE \data_0_reg[4] ( .Q(data_0_reg_Z[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_5_Z[4]), .EN(N_53), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14639 SLE \data_0_reg[3] ( .Q(data_0_reg_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_5_Z[3]), .EN(N_53), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14639 SLE \data_0_reg[2] ( .Q(data_0_reg_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_5_Z[2]), .EN(N_53), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14639 SLE \data_0_reg[1] ( .Q(data_0_reg_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_5_Z[1]), .EN(N_53), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14639 SLE \data_0_reg[0] ( .Q(data_0_reg_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_5_Z[0]), .EN(N_53), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14639 SLE \data_0_reg[20] ( .Q(data_0_reg_Z[20]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_5_Z[20]), .EN(N_53), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14639 SLE \data_0_reg[19] ( .Q(data_0_reg_Z[19]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_5_Z[19]), .EN(N_53), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14639 SLE \data_0_reg[18] ( .Q(data_0_reg_Z[18]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_5_Z[18]), .EN(N_53), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14639 SLE \data_0_reg[17] ( .Q(data_0_reg_Z[17]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_5_Z[17]), .EN(N_53), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14639 SLE \data_0_reg[16] ( .Q(data_0_reg_Z[16]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_5_Z[16]), .EN(N_53), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14639 SLE \data_0_reg[15] ( .Q(data_0_reg_Z[15]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_5_Z[15]), .EN(N_53), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14639 SLE \data_0_reg[14] ( .Q(data_0_reg_Z[14]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_5_Z[14]), .EN(N_53), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14639 SLE \data_0_reg[13] ( .Q(data_0_reg_Z[13]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_5_Z[13]), .EN(N_53), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14639 SLE \data_0_reg[12] ( .Q(data_0_reg_Z[12]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_5_Z[12]), .EN(N_53), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14639 SLE \data_0_reg[11] ( .Q(data_0_reg_Z[11]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_5_Z[11]), .EN(N_53), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14639 SLE \data_0_reg[10] ( .Q(data_0_reg_Z[10]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_5_Z[10]), .EN(N_53), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14639 SLE \data_0_reg[9] ( .Q(data_0_reg_Z[9]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_5_Z[9]), .EN(N_53), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14639 SLE \data_0_reg[8] ( .Q(data_0_reg_Z[8]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_5_Z[8]), .EN(N_53), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14639 SLE \data_0_reg[7] ( .Q(data_0_reg_Z[7]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_5_Z[7]), .EN(N_53), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14639 SLE \data_0_reg[6] ( .Q(data_0_reg_Z[6]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_5_Z[6]), .EN(N_53), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14337 SLE \command_reg[27] ( .Q(command_reg_Z[27]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_req_data[29]), .EN(un1_dmcontrol_ndmreset13_i), .LAT(GND), .SD(GND), .SLn(N_81_i) ); // @48:14337 SLE \command_reg[26] ( .Q(command_reg_Z[26]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_req_data[28]), .EN(un1_dmcontrol_ndmreset13_i), .LAT(GND), .SD(GND), .SLn(N_81_i) ); // @48:14337 SLE \command_reg[25] ( .Q(command_reg_Z[25]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_req_data[27]), .EN(un1_dmcontrol_ndmreset13_i), .LAT(GND), .SD(GND), .SLn(N_81_i) ); // @48:14337 SLE \command_reg[24] ( .Q(command_reg_Z[24]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_req_data[26]), .EN(un1_dmcontrol_ndmreset13_i), .LAT(GND), .SD(GND), .SLn(N_81_i) ); // @48:14639 SLE \data_0_reg[31] ( .Q(data_0_reg_Z[31]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_5_Z[31]), .EN(N_53), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14639 SLE \data_0_reg[30] ( .Q(data_0_reg_Z[30]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_5_Z[30]), .EN(N_53), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14639 SLE \data_0_reg[29] ( .Q(data_0_reg_Z[29]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_5_Z[29]), .EN(N_53), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14639 SLE \data_0_reg[28] ( .Q(data_0_reg_Z[28]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_5_Z[28]), .EN(N_53), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14639 SLE \data_0_reg[27] ( .Q(data_0_reg_Z[27]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_5_Z[27]), .EN(N_53), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14639 SLE \data_0_reg[26] ( .Q(data_0_reg_Z[26]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_5_Z[26]), .EN(N_53), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14639 SLE \data_0_reg[25] ( .Q(data_0_reg_Z[25]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_5_Z[25]), .EN(N_53), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14639 SLE \data_0_reg[24] ( .Q(data_0_reg_Z[24]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_5_Z[24]), .EN(N_53), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14639 SLE \data_0_reg[23] ( .Q(data_0_reg_Z[23]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_5_Z[23]), .EN(N_53), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14639 SLE \data_0_reg[22] ( .Q(data_0_reg_Z[22]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_5_Z[22]), .EN(N_53), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14639 SLE \data_0_reg[21] ( .Q(data_0_reg_Z[21]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_5_Z[21]), .EN(N_53), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14337 SLE \command_reg[7] ( .Q(command_reg_Z[7]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_req_data[9]), .EN(un1_dmcontrol_ndmreset13_i), .LAT(GND), .SD(GND), .SLn(N_81_i) ); // @48:14337 SLE \command_reg[6] ( .Q(command_reg_Z[6]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_req_data[8]), .EN(un1_dmcontrol_ndmreset13_i), .LAT(GND), .SD(GND), .SLn(N_81_i) ); // @48:14337 SLE \command_reg[5] ( .Q(command_reg_Z[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_req_data[7]), .EN(un1_dmcontrol_ndmreset13_i), .LAT(GND), .SD(GND), .SLn(N_81_i) ); // @48:14337 SLE \command_reg[4] ( .Q(command_reg_Z[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_req_data[6]), .EN(un1_dmcontrol_ndmreset13_i), .LAT(GND), .SD(GND), .SLn(N_81_i) ); // @48:14337 SLE \command_reg[3] ( .Q(command_reg_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_req_data[5]), .EN(un1_dmcontrol_ndmreset13_i), .LAT(GND), .SD(GND), .SLn(N_81_i) ); // @48:14337 SLE \command_reg[2] ( .Q(command_reg_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_req_data[4]), .EN(un1_dmcontrol_ndmreset13_i), .LAT(GND), .SD(GND), .SLn(N_81_i) ); // @48:14337 SLE \command_reg[1] ( .Q(command_reg_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_req_data[3]), .EN(un1_dmcontrol_ndmreset13_i), .LAT(GND), .SD(GND), .SLn(N_81_i) ); // @48:14337 SLE \command_reg[0] ( .Q(command_reg_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_req_data[2]), .EN(un1_dmcontrol_ndmreset13_i), .LAT(GND), .SD(GND), .SLn(N_81_i) ); // @48:14337 SLE \command_reg[22] ( .Q(command_reg_Z[22]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_req_data[24]), .EN(un1_dmcontrol_ndmreset13_i), .LAT(GND), .SD(GND), .SLn(N_81_i) ); // @48:14337 SLE \command_reg[21] ( .Q(command_reg_Z[21]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_req_data[23]), .EN(un1_dmcontrol_ndmreset13_i), .LAT(GND), .SD(GND), .SLn(N_81_i) ); // @48:14337 SLE \command_reg[20] ( .Q(command_reg_Z[20]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_req_data[22]), .EN(un1_dmcontrol_ndmreset13_i), .LAT(GND), .SD(GND), .SLn(N_81_i) ); // @48:14337 SLE \command_reg[31] ( .Q(command_reg_Z[31]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_req_data[33]), .EN(un1_dmcontrol_ndmreset13_i), .LAT(GND), .SD(GND), .SLn(N_81_i) ); // @48:14337 SLE \command_reg[30] ( .Q(command_reg_Z[30]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_req_data[32]), .EN(un1_dmcontrol_ndmreset13_i), .LAT(GND), .SD(GND), .SLn(N_81_i) ); // @48:14337 SLE \command_reg[29] ( .Q(command_reg_Z[29]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_req_data[31]), .EN(un1_dmcontrol_ndmreset13_i), .LAT(GND), .SD(GND), .SLn(N_81_i) ); // @48:14337 SLE \command_reg[28] ( .Q(command_reg_Z[28]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_req_data[30]), .EN(un1_dmcontrol_ndmreset13_i), .LAT(GND), .SD(GND), .SLn(N_81_i) ); // @48:14337 SLE \cmderr_ff[2] ( .Q(cmderr_ff_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cmderr_ff_4[2]), .EN(un1_dmcontrol_ndmreset13_4_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14337 SLE \cmderr_ff[1] ( .Q(cmderr_ff_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_190_i), .EN(un1_dmcontrol_ndmreset13_4_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14337 SLE \cmderr_ff[0] ( .Q(cmderr_ff_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cmderr_ff_4[0]), .EN(un1_dmcontrol_ndmreset13_4_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:14337 SLE \command_reg[17] ( .Q(command_reg_Z[17]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_req_data[19]), .EN(un1_dmcontrol_ndmreset13_i), .LAT(GND), .SD(GND), .SLn(N_81_i) ); // @48:14337 SLE \command_reg[16] ( .Q(command_reg_Z[16]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_req_data[18]), .EN(un1_dmcontrol_ndmreset13_i), .LAT(GND), .SD(GND), .SLn(N_81_i) ); // @48:14337 SLE \command_reg[15] ( .Q(command_reg_Z[15]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_req_data[17]), .EN(un1_dmcontrol_ndmreset13_i), .LAT(GND), .SD(GND), .SLn(N_81_i) ); // @48:14337 SLE \command_reg[14] ( .Q(command_reg_Z[14]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_req_data[16]), .EN(un1_dmcontrol_ndmreset13_i), .LAT(GND), .SD(GND), .SLn(N_81_i) ); // @48:14337 SLE \command_reg[13] ( .Q(command_reg_Z[13]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_req_data[15]), .EN(un1_dmcontrol_ndmreset13_i), .LAT(GND), .SD(GND), .SLn(N_81_i) ); // @48:14337 SLE \command_reg[12] ( .Q(command_reg_Z[12]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_req_data[14]), .EN(un1_dmcontrol_ndmreset13_i), .LAT(GND), .SD(GND), .SLn(N_81_i) ); // @48:14337 SLE \command_reg[11] ( .Q(command_reg_Z[11]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_req_data[13]), .EN(un1_dmcontrol_ndmreset13_i), .LAT(GND), .SD(GND), .SLn(N_81_i) ); // @48:14337 SLE \command_reg[10] ( .Q(command_reg_Z[10]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_req_data[12]), .EN(un1_dmcontrol_ndmreset13_i), .LAT(GND), .SD(GND), .SLn(N_81_i) ); // @48:14337 SLE \command_reg[9] ( .Q(command_reg_Z[9]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_req_data[11]), .EN(un1_dmcontrol_ndmreset13_i), .LAT(GND), .SD(GND), .SLn(N_81_i) ); // @48:14337 SLE \command_reg[8] ( .Q(command_reg_Z[8]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(dmi_req_data[10]), .EN(un1_dmcontrol_ndmreset13_i), .LAT(GND), .SD(GND), .SLn(N_81_i) ); // @48:14495 SLE \data_gpr_reg[7] ( .Q(data_gpr_reg_Z[7]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_gpr_op_rd_data_net[7]), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_75_i) ); // @48:14495 SLE \data_gpr_reg[6] ( .Q(data_gpr_reg_Z[6]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_gpr_op_rd_data_net[6]), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_75_i) ); // @48:14495 SLE \data_gpr_reg[5] ( .Q(data_gpr_reg_Z[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_gpr_op_rd_data_net[5]), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_75_i) ); // @48:14495 SLE \data_gpr_reg[4] ( .Q(data_gpr_reg_Z[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_gpr_op_rd_data_net[4]), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_75_i) ); // @48:14495 SLE \data_gpr_reg[3] ( .Q(data_gpr_reg_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_gpr_op_rd_data_net[3]), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_75_i) ); // @48:14495 SLE \data_gpr_reg[2] ( .Q(data_gpr_reg_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_gpr_op_rd_data_net[2]), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_75_i) ); // @48:14495 SLE \data_gpr_reg[1] ( .Q(data_gpr_reg_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_gpr_op_rd_data_net[1]), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_75_i) ); // @48:14495 SLE \data_gpr_reg[0] ( .Q(data_gpr_reg_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_gpr_op_rd_data_net[0]), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_75_i) ); // @48:14337 SLE \abstractcs_cmderr[2] ( .Q(abstractcs_cmderr_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cmderr_ff_Z[2]), .EN(un1_dmcontrol_ndmreset13_2_i), .LAT(GND), .SD(GND), .SLn(N_81_i) ); // @48:14337 SLE \abstractcs_cmderr[1] ( .Q(abstractcs_cmderr_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cmderr_ff_Z[1]), .EN(un1_dmcontrol_ndmreset13_2_i), .LAT(GND), .SD(GND), .SLn(N_81_i) ); // @48:14337 SLE \abstractcs_cmderr[0] ( .Q(abstractcs_cmderr_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cmderr_ff_Z[0]), .EN(un1_dmcontrol_ndmreset13_2_i), .LAT(GND), .SD(GND), .SLn(N_81_i) ); // @48:14495 SLE \data_gpr_reg[22] ( .Q(data_gpr_reg_Z[22]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_gpr_op_rd_data_net[22]), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_75_i) ); // @48:14495 SLE \data_gpr_reg[21] ( .Q(data_gpr_reg_Z[21]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_gpr_op_rd_data_net[21]), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_75_i) ); // @48:14495 SLE \data_gpr_reg[20] ( .Q(data_gpr_reg_Z[20]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_gpr_op_rd_data_net[20]), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_75_i) ); // @48:14495 SLE \data_gpr_reg[19] ( .Q(data_gpr_reg_Z[19]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_gpr_op_rd_data_net[19]), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_75_i) ); // @48:14495 SLE \data_gpr_reg[18] ( .Q(data_gpr_reg_Z[18]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_gpr_op_rd_data_net[18]), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_75_i) ); // @48:14495 SLE \data_gpr_reg[17] ( .Q(data_gpr_reg_Z[17]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_gpr_op_rd_data_net[17]), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_75_i) ); // @48:14495 SLE \data_gpr_reg[16] ( .Q(data_gpr_reg_Z[16]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_gpr_op_rd_data_net[16]), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_75_i) ); // @48:14495 SLE \data_gpr_reg[15] ( .Q(data_gpr_reg_Z[15]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_gpr_op_rd_data_net[15]), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_75_i) ); // @48:14495 SLE \data_gpr_reg[14] ( .Q(data_gpr_reg_Z[14]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_gpr_op_rd_data_net[14]), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_75_i) ); // @48:14495 SLE \data_gpr_reg[13] ( .Q(data_gpr_reg_Z[13]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_gpr_op_rd_data_net[13]), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_75_i) ); // @48:14495 SLE \data_gpr_reg[12] ( .Q(data_gpr_reg_Z[12]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_gpr_op_rd_data_net[12]), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_75_i) ); // @48:14495 SLE \data_gpr_reg[11] ( .Q(data_gpr_reg_Z[11]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_gpr_op_rd_data_net[11]), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_75_i) ); // @48:14495 SLE \data_gpr_reg[10] ( .Q(data_gpr_reg_Z[10]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_gpr_op_rd_data_net[10]), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_75_i) ); // @48:14495 SLE \data_gpr_reg[9] ( .Q(data_gpr_reg_Z[9]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_gpr_op_rd_data_net[9]), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_75_i) ); // @48:14495 SLE \data_gpr_reg[8] ( .Q(data_gpr_reg_Z[8]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_gpr_op_rd_data_net[8]), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_75_i) ); // @48:14495 SLE \data_csr_reg[5] ( .Q(data_csr_reg_Z[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_csr_op_rd_data_net[5]), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_76_i) ); // @48:14495 SLE \data_csr_reg[4] ( .Q(data_csr_reg_Z[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_csr_op_rd_data_net[4]), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_76_i) ); // @48:14495 SLE \data_csr_reg[3] ( .Q(data_csr_reg_Z[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_csr_op_rd_data_net[3]), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_76_i) ); // @48:14495 SLE \data_csr_reg[2] ( .Q(data_csr_reg_Z[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_csr_op_rd_data_net[2]), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_76_i) ); // @48:14495 SLE \data_csr_reg[1] ( .Q(data_csr_reg_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_csr_op_rd_data_net[1]), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_76_i) ); // @48:14495 SLE \data_csr_reg[0] ( .Q(data_csr_reg_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_csr_op_rd_data_net[0]), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_76_i) ); // @48:14495 SLE \data_gpr_reg[31] ( .Q(data_gpr_reg_Z[31]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_gpr_op_rd_data_net[31]), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_75_i) ); // @48:14495 SLE \data_gpr_reg[30] ( .Q(data_gpr_reg_Z[30]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_gpr_op_rd_data_net[30]), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_75_i) ); // @48:14495 SLE \data_gpr_reg[29] ( .Q(data_gpr_reg_Z[29]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_gpr_op_rd_data_net[29]), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_75_i) ); // @48:14495 SLE \data_gpr_reg[28] ( .Q(data_gpr_reg_Z[28]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_gpr_op_rd_data_net[28]), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_75_i) ); // @48:14495 SLE \data_gpr_reg[27] ( .Q(data_gpr_reg_Z[27]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_gpr_op_rd_data_net[27]), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_75_i) ); // @48:14495 SLE \data_gpr_reg[26] ( .Q(data_gpr_reg_Z[26]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_gpr_op_rd_data_net[26]), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_75_i) ); // @48:14495 SLE \data_gpr_reg[25] ( .Q(data_gpr_reg_Z[25]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_gpr_op_rd_data_net[25]), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_75_i) ); // @48:14495 SLE \data_gpr_reg[24] ( .Q(data_gpr_reg_Z[24]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_gpr_op_rd_data_net[24]), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_75_i) ); // @48:14495 SLE \data_gpr_reg[23] ( .Q(data_gpr_reg_Z[23]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_gpr_op_rd_data_net[23]), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_75_i) ); // @48:14495 SLE \data_csr_reg[20] ( .Q(data_csr_reg_Z[20]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_csr_op_rd_data_net[20]), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_76_i) ); // @48:14495 SLE \data_csr_reg[19] ( .Q(data_csr_reg_Z[19]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_csr_op_rd_data_net[19]), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_76_i) ); // @48:14495 SLE \data_csr_reg[18] ( .Q(data_csr_reg_Z[18]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_csr_op_rd_data_net[18]), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_76_i) ); // @48:14495 SLE \data_csr_reg[17] ( .Q(data_csr_reg_Z[17]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_csr_op_rd_data_net[17]), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_76_i) ); // @48:14495 SLE \data_csr_reg[16] ( .Q(data_csr_reg_Z[16]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_csr_op_rd_data_net[16]), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_76_i) ); // @48:14495 SLE \data_csr_reg[15] ( .Q(data_csr_reg_Z[15]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_csr_op_rd_data_net[15]), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_76_i) ); // @48:14495 SLE \data_csr_reg[14] ( .Q(data_csr_reg_Z[14]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_csr_op_rd_data_net[14]), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_76_i) ); // @48:14495 SLE \data_csr_reg[13] ( .Q(data_csr_reg_Z[13]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_csr_op_rd_data_net[13]), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_76_i) ); // @48:14495 SLE \data_csr_reg[12] ( .Q(data_csr_reg_Z[12]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_csr_op_rd_data_net[12]), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_76_i) ); // @48:14495 SLE \data_csr_reg[11] ( .Q(data_csr_reg_Z[11]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_csr_op_rd_data_net[11]), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_76_i) ); // @48:14495 SLE \data_csr_reg[10] ( .Q(data_csr_reg_Z[10]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_csr_op_rd_data_net[10]), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_76_i) ); // @48:14495 SLE \data_csr_reg[9] ( .Q(data_csr_reg_Z[9]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_csr_op_rd_data_net[9]), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_76_i) ); // @48:14495 SLE \data_csr_reg[8] ( .Q(data_csr_reg_Z[8]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_csr_op_rd_data_net[8]), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_76_i) ); // @48:14495 SLE \data_csr_reg[7] ( .Q(data_csr_reg_Z[7]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_csr_op_rd_data_net[7]), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_76_i) ); // @48:14495 SLE \data_csr_reg[6] ( .Q(data_csr_reg_Z[6]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_csr_op_rd_data_net[6]), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_76_i) ); // @48:14495 SLE \debug_csr_addr[3] ( .Q(cpu_debug_csr_op_addr_net[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un1_dmi_req_command_0_a3_RNIERK9D_0), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_78_i) ); // @48:14495 SLE \debug_csr_addr[2] ( .Q(cpu_debug_csr_op_addr_net[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un1_dmi_req_command_0_a3_RNICPK9D_0), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_78_i) ); // @48:14495 SLE \debug_csr_addr[1] ( .Q(cpu_debug_csr_op_addr_net[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un1_dmi_req_command_0_a3_RNIANK9D_0), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_78_i) ); // @48:14495 SLE \debug_csr_addr[0] ( .Q(cpu_debug_csr_op_addr_net[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un1_dmi_req_command_0_a3_RNI8LK9D_0), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_78_i) ); // @48:14495 SLE \data_csr_reg[31] ( .Q(data_csr_reg_Z[31]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_csr_op_rd_data_net[31]), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_76_i) ); // @48:14495 SLE \data_csr_reg[30] ( .Q(data_csr_reg_Z[30]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_csr_op_rd_data_net[30]), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_76_i) ); // @48:14495 SLE \data_csr_reg[29] ( .Q(data_csr_reg_Z[29]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_csr_op_rd_data_net[29]), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_76_i) ); // @48:14495 SLE \data_csr_reg[28] ( .Q(data_csr_reg_Z[28]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_csr_op_rd_data_net[28]), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_76_i) ); // @48:14495 SLE \data_csr_reg[27] ( .Q(data_csr_reg_Z[27]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_csr_op_rd_data_net[27]), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_76_i) ); // @48:14495 SLE \data_csr_reg[26] ( .Q(data_csr_reg_Z[26]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_csr_op_rd_data_net[26]), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_76_i) ); // @48:14495 SLE \data_csr_reg[25] ( .Q(data_csr_reg_Z[25]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_csr_op_rd_data_net[25]), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_76_i) ); // @48:14495 SLE \data_csr_reg[24] ( .Q(data_csr_reg_Z[24]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_csr_op_rd_data_net[24]), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_76_i) ); // @48:14495 SLE \data_csr_reg[23] ( .Q(data_csr_reg_Z[23]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_csr_op_rd_data_net[23]), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_76_i) ); // @48:14495 SLE \data_csr_reg[22] ( .Q(data_csr_reg_Z[22]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_csr_op_rd_data_net[22]), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_76_i) ); // @48:14495 SLE \data_csr_reg[21] ( .Q(data_csr_reg_Z[21]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_debug_csr_op_rd_data_net[21]), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_76_i) ); // @48:14495 SLE \debug_op_wr_data[0] ( .Q(cpu_debug_op_wr_data_net[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(un1_dmi_req_command_0_a3_RNIGP7L31) ); // @48:14495 SLE \debug_gpr_addr[5] ( .Q(cpu_debug_gpr_op_addr_net[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un1_dmi_req_command_0_a3_RNIIVK9D_0), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_78_i) ); // @48:14495 SLE \debug_gpr_addr[4] ( .Q(cpu_debug_gpr_op_addr_net[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un1_dmi_req_command_0_a3_RNIGTK9D), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_78_i) ); // @48:14495 SLE \debug_gpr_addr[3] ( .Q(cpu_debug_gpr_op_addr_net[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un1_dmi_req_command_0_a3_RNIERK9D), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_78_i) ); // @48:14495 SLE \debug_gpr_addr[2] ( .Q(cpu_debug_gpr_op_addr_net[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un1_dmi_req_command_0_a3_RNICPK9D), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_78_i) ); // @48:14495 SLE \debug_gpr_addr[1] ( .Q(cpu_debug_gpr_op_addr_net[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un1_dmi_req_command_0_a3_RNIANK9D), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_78_i) ); // @48:14495 SLE \debug_gpr_addr[0] ( .Q(cpu_debug_gpr_op_addr_net[0]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un1_dmi_req_command_0_a3_RNI8LK9D), .EN(debug_gpr_addr_0_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_78_i) ); // @48:14495 SLE \debug_csr_addr[11] ( .Q(cpu_debug_csr_op_addr_net[11]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un1_dmi_req_command_0_a3_RNICTI09), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_78_i) ); // @48:14495 SLE \debug_csr_addr[10] ( .Q(cpu_debug_csr_op_addr_net[10]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un1_dmi_req_command_0_a3_RNIARI09), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_78_i) ); // @48:14495 SLE \debug_csr_addr[9] ( .Q(cpu_debug_csr_op_addr_net[9]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un1_dmi_req_command_0_a3_RNI10U4D), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_78_i) ); // @48:14495 SLE \debug_csr_addr[8] ( .Q(cpu_debug_csr_op_addr_net[8]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un1_dmi_req_command_0_a3_RNIVTT4D), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_78_i) ); // @48:14495 SLE \debug_csr_addr[7] ( .Q(cpu_debug_csr_op_addr_net[7]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un1_dmi_req_command_0_a3_RNIM3L9D), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_78_i) ); // @48:14495 SLE \debug_csr_addr[6] ( .Q(cpu_debug_csr_op_addr_net[6]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un1_dmi_req_command_0_a3_RNIK1L9D), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_78_i) ); // @48:14495 SLE \debug_csr_addr[5] ( .Q(cpu_debug_csr_op_addr_net[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un1_dmi_req_command_0_a3_RNIIVK9D), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_78_i) ); // @48:14495 SLE \debug_csr_addr[4] ( .Q(cpu_debug_csr_op_addr_net[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un1_dmi_req_command_0_a3_RNIGTK9D_0), .EN(debug_csr_rd_data_ready_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(N_78_i) ); // @48:14495 SLE \debug_op_wr_data[15] ( .Q(cpu_debug_op_wr_data_net[15]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_Z[15]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(un1_dmi_req_command_0_a3_RNIGP7L31) ); // @48:14495 SLE \debug_op_wr_data[14] ( .Q(cpu_debug_op_wr_data_net[14]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_Z[14]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(un1_dmi_req_command_0_a3_RNIGP7L31) ); // @48:14495 SLE \debug_op_wr_data[13] ( .Q(cpu_debug_op_wr_data_net[13]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_Z[13]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(un1_dmi_req_command_0_a3_RNIGP7L31) ); // @48:14495 SLE \debug_op_wr_data[12] ( .Q(cpu_debug_op_wr_data_net[12]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_Z[12]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(un1_dmi_req_command_0_a3_RNIGP7L31) ); // @48:14495 SLE \debug_op_wr_data[11] ( .Q(cpu_debug_op_wr_data_net[11]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_Z[11]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(un1_dmi_req_command_0_a3_RNIGP7L31) ); // @48:14495 SLE \debug_op_wr_data[10] ( .Q(cpu_debug_op_wr_data_net[10]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_Z[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(un1_dmi_req_command_0_a3_RNIGP7L31) ); // @48:14495 SLE \debug_op_wr_data[9] ( .Q(cpu_debug_op_wr_data_net[9]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_Z[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(un1_dmi_req_command_0_a3_RNIGP7L31) ); // @48:14495 SLE \debug_op_wr_data[8] ( .Q(cpu_debug_op_wr_data_net[8]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_Z[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(un1_dmi_req_command_0_a3_RNIGP7L31) ); // @48:14495 SLE \debug_op_wr_data[7] ( .Q(cpu_debug_op_wr_data_net[7]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_Z[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(un1_dmi_req_command_0_a3_RNIGP7L31) ); // @48:14495 SLE \debug_op_wr_data[6] ( .Q(cpu_debug_op_wr_data_net[6]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(un1_dmi_req_command_0_a3_RNIGP7L31) ); // @48:14495 SLE \debug_op_wr_data[5] ( .Q(cpu_debug_op_wr_data_net[5]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(un1_dmi_req_command_0_a3_RNIGP7L31) ); // @48:14495 SLE \debug_op_wr_data[4] ( .Q(cpu_debug_op_wr_data_net[4]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_Z[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(un1_dmi_req_command_0_a3_RNIGP7L31) ); // @48:14495 SLE \debug_op_wr_data[3] ( .Q(cpu_debug_op_wr_data_net[3]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(un1_dmi_req_command_0_a3_RNIGP7L31) ); // @48:14495 SLE \debug_op_wr_data[2] ( .Q(cpu_debug_op_wr_data_net[2]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(un1_dmi_req_command_0_a3_RNIGP7L31) ); // @48:14495 SLE \debug_op_wr_data[1] ( .Q(cpu_debug_op_wr_data_net[1]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(un1_dmi_req_command_0_a3_RNIGP7L31) ); // @48:14495 SLE \debug_op_wr_data[30] ( .Q(cpu_debug_op_wr_data_net[30]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_Z[30]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(un1_dmi_req_command_0_a3_RNIGP7L31) ); // @48:14495 SLE \debug_op_wr_data[29] ( .Q(cpu_debug_op_wr_data_net[29]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_Z[29]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(un1_dmi_req_command_0_a3_RNIGP7L31) ); // @48:14495 SLE \debug_op_wr_data[28] ( .Q(cpu_debug_op_wr_data_net[28]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_Z[28]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(un1_dmi_req_command_0_a3_RNIGP7L31) ); // @48:14495 SLE \debug_op_wr_data[27] ( .Q(cpu_debug_op_wr_data_net[27]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_Z[27]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(un1_dmi_req_command_0_a3_RNIGP7L31) ); // @48:14495 SLE \debug_op_wr_data[26] ( .Q(cpu_debug_op_wr_data_net[26]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_Z[26]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(un1_dmi_req_command_0_a3_RNIGP7L31) ); // @48:14495 SLE \debug_op_wr_data[25] ( .Q(cpu_debug_op_wr_data_net[25]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_Z[25]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(un1_dmi_req_command_0_a3_RNIGP7L31) ); // @48:14495 SLE \debug_op_wr_data[24] ( .Q(cpu_debug_op_wr_data_net[24]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_Z[24]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(un1_dmi_req_command_0_a3_RNIGP7L31) ); // @48:14495 SLE \debug_op_wr_data[23] ( .Q(cpu_debug_op_wr_data_net[23]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_Z[23]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(un1_dmi_req_command_0_a3_RNIGP7L31) ); // @48:14495 SLE \debug_op_wr_data[22] ( .Q(cpu_debug_op_wr_data_net[22]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_Z[22]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(un1_dmi_req_command_0_a3_RNIGP7L31) ); // @48:14495 SLE \debug_op_wr_data[21] ( .Q(cpu_debug_op_wr_data_net[21]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_Z[21]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(un1_dmi_req_command_0_a3_RNIGP7L31) ); // @48:14495 SLE \debug_op_wr_data[20] ( .Q(cpu_debug_op_wr_data_net[20]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_Z[20]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(un1_dmi_req_command_0_a3_RNIGP7L31) ); // @48:14495 SLE \debug_op_wr_data[19] ( .Q(cpu_debug_op_wr_data_net[19]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_Z[19]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(un1_dmi_req_command_0_a3_RNIGP7L31) ); // @48:14495 SLE \debug_op_wr_data[18] ( .Q(cpu_debug_op_wr_data_net[18]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_Z[18]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(un1_dmi_req_command_0_a3_RNIGP7L31) ); // @48:14495 SLE \debug_op_wr_data[17] ( .Q(cpu_debug_op_wr_data_net[17]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_Z[17]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(un1_dmi_req_command_0_a3_RNIGP7L31) ); // @48:14495 SLE \debug_op_wr_data[16] ( .Q(cpu_debug_op_wr_data_net[16]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_Z[16]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(un1_dmi_req_command_0_a3_RNIGP7L31) ); // @48:14495 SLE \debug_op_wr_data[31] ( .Q(cpu_debug_op_wr_data_net[31]), .ADn(VCC), .ALn(dff), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(data_0_reg_Z[31]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(un1_dmi_req_command_0_a3_RNIGP7L31) ); // @48:14339 CFG4 \command_reg_state_4_1_0[5] ( .A(command_reg_state_Z[2]), .B(abs_cmd_transfer_ff_Z), .C(N_88_1), .D(command_reg_state_Z[1]), .Y(command_reg_state_4_1_0_Z[5]) ); defparam \command_reg_state_4_1_0[5] .INIT=16'h2322; // @48:14647 CFG4 \data_0_reg_5[14] ( .A(dmi_req_data[16]), .B(cpu_debug_active_net), .C(data_0_reg_5_1_Z[14]), .D(data_0_reg_5_sm0), .Y(data_0_reg_5_Z[14]) ); defparam \data_0_reg_5[14] .INIT=16'hF8F0; // @48:14647 CFG4 \data_0_reg_5[29] ( .A(dmi_req_data[31]), .B(cpu_debug_active_net), .C(data_0_reg_5_1_Z[29]), .D(data_0_reg_5_sm0), .Y(data_0_reg_5_Z[29]) ); defparam \data_0_reg_5[29] .INIT=16'hF8F0; // @48:14647 CFG4 \data_0_reg_5[30] ( .A(dmi_req_data[32]), .B(cpu_debug_active_net), .C(data_0_reg_5_1_Z[30]), .D(data_0_reg_5_sm0), .Y(data_0_reg_5_Z[30]) ); defparam \data_0_reg_5[30] .INIT=16'hF8F0; // @48:14647 CFG4 \data_0_reg_5[27] ( .A(dmi_req_data[29]), .B(cpu_debug_active_net), .C(data_0_reg_5_1_Z[27]), .D(data_0_reg_5_sm0), .Y(data_0_reg_5_Z[27]) ); defparam \data_0_reg_5[27] .INIT=16'hF8F0; // @48:14647 CFG4 \data_0_reg_5[28] ( .A(dmi_req_data[30]), .B(cpu_debug_active_net), .C(data_0_reg_5_1_Z[28]), .D(data_0_reg_5_sm0), .Y(data_0_reg_5_Z[28]) ); defparam \data_0_reg_5[28] .INIT=16'hF8F0; // @48:14647 CFG4 \data_0_reg_5[5] ( .A(dmi_req_data[7]), .B(cpu_debug_active_net), .C(data_0_reg_5_1_Z[5]), .D(data_0_reg_5_sm0), .Y(data_0_reg_5_Z[5]) ); defparam \data_0_reg_5[5] .INIT=16'hF8F0; // @48:14647 CFG4 \data_0_reg_5[31] ( .A(dmi_req_data[33]), .B(cpu_debug_active_net), .C(data_0_reg_5_1_Z[31]), .D(data_0_reg_5_sm0), .Y(data_0_reg_5_Z[31]) ); defparam \data_0_reg_5[31] .INIT=16'hF8F0; // @48:14647 CFG4 \data_0_reg_5[3] ( .A(dmi_req_data[5]), .B(cpu_debug_active_net), .C(data_0_reg_5_1_Z[3]), .D(data_0_reg_5_sm0), .Y(data_0_reg_5_Z[3]) ); defparam \data_0_reg_5[3] .INIT=16'hF8F0; // @48:14647 CFG4 \data_0_reg_5[1] ( .A(dmi_req_data[3]), .B(cpu_debug_active_net), .C(data_0_reg_5_1_Z[1]), .D(data_0_reg_5_sm0), .Y(data_0_reg_5_Z[1]) ); defparam \data_0_reg_5[1] .INIT=16'hF8F0; // @48:14647 CFG4 \data_0_reg_5[11] ( .A(dmi_req_data[13]), .B(cpu_debug_active_net), .C(data_0_reg_5_1_Z[11]), .D(data_0_reg_5_sm0), .Y(data_0_reg_5_Z[11]) ); defparam \data_0_reg_5[11] .INIT=16'hF8F0; // @48:14647 CFG4 \data_0_reg_5[9] ( .A(dmi_req_data[11]), .B(cpu_debug_active_net), .C(data_0_reg_5_1_Z[9]), .D(data_0_reg_5_sm0), .Y(data_0_reg_5_Z[9]) ); defparam \data_0_reg_5[9] .INIT=16'hF8F0; // @48:14647 CFG4 \data_0_reg_5[12] ( .A(dmi_req_data[14]), .B(cpu_debug_active_net), .C(data_0_reg_5_1_Z[12]), .D(data_0_reg_5_sm0), .Y(data_0_reg_5_Z[12]) ); defparam \data_0_reg_5[12] .INIT=16'hF8F0; // @48:14647 CFG4 \data_0_reg_5[2] ( .A(dmi_req_data[4]), .B(cpu_debug_active_net), .C(data_0_reg_5_1_Z[2]), .D(data_0_reg_5_sm0), .Y(data_0_reg_5_Z[2]) ); defparam \data_0_reg_5[2] .INIT=16'hF8F0; // @48:14647 CFG4 \data_0_reg_5[15] ( .A(dmi_req_data[17]), .B(cpu_debug_active_net), .C(data_0_reg_5_1_Z[15]), .D(data_0_reg_5_sm0), .Y(data_0_reg_5_Z[15]) ); defparam \data_0_reg_5[15] .INIT=16'hF8F0; // @48:14385 CFG2 \abs_busy_cmb_mux.un1_debug_csr_rd_en_1 ( .A(cpu_debug_csr_rd_en_net), .B(cpu_debug_gpr_rd_en_net), .Y(un1_debug_csr_rd_en_1) ); defparam \abs_busy_cmb_mux.un1_debug_csr_rd_en_1 .INIT=4'hE; // @48:14385 CFG4 \abs_busy_cmb_mux.un1_debug_csr_rd_en ( .A(cpu_debug_gpr_wr_en_net), .B(cpu_debug_csr_wr_en_net), .C(command_reg_state_Z[5]), .D(un1_debug_csr_rd_en_1), .Y(un1_debug_csr_rd_en) ); defparam \abs_busy_cmb_mux.un1_debug_csr_rd_en .INIT=16'hFFFE; // @48:14647 CFG4 \data_0_reg_5_1[23] ( .A(data_csr_reg_Z[23]), .B(data_gpr_reg_Z[23]), .C(data_0_reg_5_sm0), .D(N_53_1), .Y(data_0_reg_5_1_Z[23]) ); defparam \data_0_reg_5_1[23] .INIT=16'h0A0C; // @48:14647 CFG4 \data_0_reg_5_1[22] ( .A(data_csr_reg_Z[22]), .B(data_gpr_reg_Z[22]), .C(data_0_reg_5_sm0), .D(N_53_1), .Y(data_0_reg_5_1_Z[22]) ); defparam \data_0_reg_5_1[22] .INIT=16'h0A0C; // @48:14647 CFG4 \data_0_reg_5_1[15] ( .A(data_csr_reg_Z[15]), .B(data_gpr_reg_Z[15]), .C(data_0_reg_5_sm0), .D(N_53_1), .Y(data_0_reg_5_1_Z[15]) ); defparam \data_0_reg_5_1[15] .INIT=16'h0A0C; // @48:14647 CFG4 \data_0_reg_5_1[24] ( .A(data_csr_reg_Z[24]), .B(data_gpr_reg_Z[24]), .C(data_0_reg_5_sm0), .D(N_53_1), .Y(data_0_reg_5_1_Z[24]) ); defparam \data_0_reg_5_1[24] .INIT=16'h0A0C; // @48:14647 CFG4 \data_0_reg_5_1[18] ( .A(data_csr_reg_Z[18]), .B(data_gpr_reg_Z[18]), .C(data_0_reg_5_sm0), .D(N_53_1), .Y(data_0_reg_5_1_Z[18]) ); defparam \data_0_reg_5_1[18] .INIT=16'h0A0C; // @48:14647 CFG4 \data_0_reg_5_1[2] ( .A(data_csr_reg_Z[2]), .B(data_gpr_reg_Z[2]), .C(data_0_reg_5_sm0), .D(N_53_1), .Y(data_0_reg_5_1_Z[2]) ); defparam \data_0_reg_5_1[2] .INIT=16'h0A0C; // @48:14647 CFG4 \data_0_reg_5_1[20] ( .A(data_csr_reg_Z[20]), .B(data_gpr_reg_Z[20]), .C(data_0_reg_5_sm0), .D(N_53_1), .Y(data_0_reg_5_1_Z[20]) ); defparam \data_0_reg_5_1[20] .INIT=16'h0A0C; // @48:14647 CFG4 \data_0_reg_5_1[12] ( .A(data_csr_reg_Z[12]), .B(data_gpr_reg_Z[12]), .C(data_0_reg_5_sm0), .D(N_53_1), .Y(data_0_reg_5_1_Z[12]) ); defparam \data_0_reg_5_1[12] .INIT=16'h0A0C; // @48:14647 CFG4 \data_0_reg_5_1[17] ( .A(data_csr_reg_Z[17]), .B(data_gpr_reg_Z[17]), .C(data_0_reg_5_sm0), .D(N_53_1), .Y(data_0_reg_5_1_Z[17]) ); defparam \data_0_reg_5_1[17] .INIT=16'h0A0C; // @48:14647 CFG4 \data_0_reg_5_1[9] ( .A(data_csr_reg_Z[9]), .B(data_gpr_reg_Z[9]), .C(data_0_reg_5_sm0), .D(N_53_1), .Y(data_0_reg_5_1_Z[9]) ); defparam \data_0_reg_5_1[9] .INIT=16'h0A0C; // @48:14647 CFG4 \data_0_reg_5_1[21] ( .A(data_csr_reg_Z[21]), .B(data_gpr_reg_Z[21]), .C(data_0_reg_5_sm0), .D(N_53_1), .Y(data_0_reg_5_1_Z[21]) ); defparam \data_0_reg_5_1[21] .INIT=16'h0A0C; // @48:14647 CFG4 \data_0_reg_5_1[11] ( .A(data_csr_reg_Z[11]), .B(data_gpr_reg_Z[11]), .C(data_0_reg_5_sm0), .D(N_53_1), .Y(data_0_reg_5_1_Z[11]) ); defparam \data_0_reg_5_1[11] .INIT=16'h0A0C; // @48:14647 CFG4 \data_0_reg_5_1[19] ( .A(data_csr_reg_Z[19]), .B(data_gpr_reg_Z[19]), .C(data_0_reg_5_sm0), .D(N_53_1), .Y(data_0_reg_5_1_Z[19]) ); defparam \data_0_reg_5_1[19] .INIT=16'h0A0C; // @48:14647 CFG4 \data_0_reg_5_1[26] ( .A(data_csr_reg_Z[26]), .B(data_gpr_reg_Z[26]), .C(data_0_reg_5_sm0), .D(N_53_1), .Y(data_0_reg_5_1_Z[26]) ); defparam \data_0_reg_5_1[26] .INIT=16'h0A0C; // @48:14647 CFG4 \data_0_reg_5_1[1] ( .A(data_csr_reg_Z[1]), .B(data_gpr_reg_Z[1]), .C(data_0_reg_5_sm0), .D(N_53_1), .Y(data_0_reg_5_1_Z[1]) ); defparam \data_0_reg_5_1[1] .INIT=16'h0A0C; // @48:14647 CFG4 \data_0_reg_5_1[3] ( .A(data_csr_reg_Z[3]), .B(data_gpr_reg_Z[3]), .C(data_0_reg_5_sm0), .D(N_53_1), .Y(data_0_reg_5_1_Z[3]) ); defparam \data_0_reg_5_1[3] .INIT=16'h0A0C; // @48:14647 CFG4 \data_0_reg_5_1[7] ( .A(data_csr_reg_Z[7]), .B(data_gpr_reg_Z[7]), .C(data_0_reg_5_sm0), .D(N_53_1), .Y(data_0_reg_5_1_Z[7]) ); defparam \data_0_reg_5_1[7] .INIT=16'h0A0C; // @48:14647 CFG4 \data_0_reg_5_1[4] ( .A(data_csr_reg_Z[4]), .B(data_gpr_reg_Z[4]), .C(data_0_reg_5_sm0), .D(N_53_1), .Y(data_0_reg_5_1_Z[4]) ); defparam \data_0_reg_5_1[4] .INIT=16'h0A0C; // @48:14647 CFG4 \data_0_reg_5_1[8] ( .A(data_csr_reg_Z[8]), .B(data_gpr_reg_Z[8]), .C(data_0_reg_5_sm0), .D(N_53_1), .Y(data_0_reg_5_1_Z[8]) ); defparam \data_0_reg_5_1[8] .INIT=16'h0A0C; // @48:14647 CFG4 \data_0_reg_5_1[31] ( .A(data_csr_reg_Z[31]), .B(data_gpr_reg_Z[31]), .C(data_0_reg_5_sm0), .D(N_53_1), .Y(data_0_reg_5_1_Z[31]) ); defparam \data_0_reg_5_1[31] .INIT=16'h0A0C; // @48:14647 CFG4 \data_0_reg_5_1[6] ( .A(data_csr_reg_Z[6]), .B(data_gpr_reg_Z[6]), .C(data_0_reg_5_sm0), .D(N_53_1), .Y(data_0_reg_5_1_Z[6]) ); defparam \data_0_reg_5_1[6] .INIT=16'h0A0C; // @48:14647 CFG4 \data_0_reg_5_1[5] ( .A(data_csr_reg_Z[5]), .B(data_gpr_reg_Z[5]), .C(data_0_reg_5_sm0), .D(N_53_1), .Y(data_0_reg_5_1_Z[5]) ); defparam \data_0_reg_5_1[5] .INIT=16'h0A0C; // @48:14647 CFG4 \data_0_reg_5_1[0] ( .A(data_csr_reg_Z[0]), .B(data_gpr_reg_Z[0]), .C(data_0_reg_5_sm0), .D(N_53_1), .Y(data_0_reg_5_1_Z[0]) ); defparam \data_0_reg_5_1[0] .INIT=16'h0A0C; // @48:14647 CFG4 \data_0_reg_5_1[28] ( .A(data_csr_reg_Z[28]), .B(data_gpr_reg_Z[28]), .C(data_0_reg_5_sm0), .D(N_53_1), .Y(data_0_reg_5_1_Z[28]) ); defparam \data_0_reg_5_1[28] .INIT=16'h0A0C; // @48:14647 CFG4 \data_0_reg_5_1[27] ( .A(data_csr_reg_Z[27]), .B(data_gpr_reg_Z[27]), .C(data_0_reg_5_sm0), .D(N_53_1), .Y(data_0_reg_5_1_Z[27]) ); defparam \data_0_reg_5_1[27] .INIT=16'h0A0C; // @48:14647 CFG4 \data_0_reg_5_1[25] ( .A(data_csr_reg_Z[25]), .B(data_gpr_reg_Z[25]), .C(data_0_reg_5_sm0), .D(N_53_1), .Y(data_0_reg_5_1_Z[25]) ); defparam \data_0_reg_5_1[25] .INIT=16'h0A0C; // @48:14647 CFG4 \data_0_reg_5_1[30] ( .A(data_csr_reg_Z[30]), .B(data_gpr_reg_Z[30]), .C(data_0_reg_5_sm0), .D(N_53_1), .Y(data_0_reg_5_1_Z[30]) ); defparam \data_0_reg_5_1[30] .INIT=16'h0A0C; // @48:14647 CFG4 \data_0_reg_5_1[29] ( .A(data_csr_reg_Z[29]), .B(data_gpr_reg_Z[29]), .C(data_0_reg_5_sm0), .D(N_53_1), .Y(data_0_reg_5_1_Z[29]) ); defparam \data_0_reg_5_1[29] .INIT=16'h0A0C; // @48:14647 CFG4 \data_0_reg_5_1[14] ( .A(data_csr_reg_Z[14]), .B(data_gpr_reg_Z[14]), .C(data_0_reg_5_sm0), .D(N_53_1), .Y(data_0_reg_5_1_Z[14]) ); defparam \data_0_reg_5_1[14] .INIT=16'h0A0C; // @48:14647 CFG4 \data_0_reg_5_1[10] ( .A(data_csr_reg_Z[10]), .B(data_gpr_reg_Z[10]), .C(data_0_reg_5_sm0), .D(N_15), .Y(data_0_reg_5_1_Z[10]) ); defparam \data_0_reg_5_1[10] .INIT=16'h0C0A; // @48:14647 CFG4 \data_0_reg_5_1[13] ( .A(data_csr_reg_Z[13]), .B(data_gpr_reg_Z[13]), .C(data_0_reg_5_sm0), .D(N_15), .Y(data_0_reg_5_1_Z[13]) ); defparam \data_0_reg_5_1[13] .INIT=16'h0C0A; // @48:14647 CFG4 \data_0_reg_5_1[16] ( .A(data_csr_reg_Z[16]), .B(data_gpr_reg_Z[16]), .C(data_0_reg_5_sm0), .D(N_15), .Y(data_0_reg_5_1_Z[16]) ); defparam \data_0_reg_5_1[16] .INIT=16'h0C0A; // @48:14647 CFG3 \data_0_reg_5[23] ( .A(data_0_reg_5_sm0), .B(data_0_reg_5_1_Z[23]), .C(data_0_reg_5_m1[23]), .Y(data_0_reg_5_Z[23]) ); defparam \data_0_reg_5[23] .INIT=8'hEC; // @48:14647 CFG3 \data_0_reg_5[22] ( .A(data_0_reg_5_sm0), .B(data_0_reg_5_1_Z[22]), .C(data_0_reg_5_m1[22]), .Y(data_0_reg_5_Z[22]) ); defparam \data_0_reg_5[22] .INIT=8'hEC; // @48:14647 CFG3 \data_0_reg_5[24] ( .A(data_0_reg_5_sm0), .B(data_0_reg_5_1_Z[24]), .C(data_0_reg_5_m1[24]), .Y(data_0_reg_5_Z[24]) ); defparam \data_0_reg_5[24] .INIT=8'hEC; // @48:14647 CFG3 \data_0_reg_5[18] ( .A(data_0_reg_5_sm0), .B(data_0_reg_5_1_Z[18]), .C(data_0_reg_5_m1[18]), .Y(data_0_reg_5_Z[18]) ); defparam \data_0_reg_5[18] .INIT=8'hEC; // @48:14647 CFG3 \data_0_reg_5[20] ( .A(data_0_reg_5_sm0), .B(data_0_reg_5_1_Z[20]), .C(data_0_reg_5_m1[20]), .Y(data_0_reg_5_Z[20]) ); defparam \data_0_reg_5[20] .INIT=8'hEC; // @48:14647 CFG4 \data_0_reg_5[10] ( .A(N_15), .B(dmi_req_data[12]), .C(data_0_reg_5_1_Z[10]), .D(data_0_reg_5_sm0), .Y(data_0_reg_5_Z[10]) ); defparam \data_0_reg_5[10] .INIT=16'hF8F0; // @48:14647 CFG3 \data_0_reg_5[17] ( .A(data_0_reg_5_sm0), .B(data_0_reg_5_1_Z[17]), .C(data_0_reg_5_m1[17]), .Y(data_0_reg_5_Z[17]) ); defparam \data_0_reg_5[17] .INIT=8'hEC; // @48:14647 CFG4 \data_0_reg_5[13] ( .A(N_15), .B(dmi_req_data[15]), .C(data_0_reg_5_1_Z[13]), .D(data_0_reg_5_sm0), .Y(data_0_reg_5_Z[13]) ); defparam \data_0_reg_5[13] .INIT=16'hF8F0; // @48:14647 CFG3 \data_0_reg_5[21] ( .A(data_0_reg_5_sm0), .B(data_0_reg_5_1_Z[21]), .C(data_0_reg_5_m1[21]), .Y(data_0_reg_5_Z[21]) ); defparam \data_0_reg_5[21] .INIT=8'hEC; // @48:14647 CFG3 \data_0_reg_5[19] ( .A(data_0_reg_5_sm0), .B(data_0_reg_5_1_Z[19]), .C(data_0_reg_5_m1[19]), .Y(data_0_reg_5_Z[19]) ); defparam \data_0_reg_5[19] .INIT=8'hEC; // @48:14647 CFG3 \data_0_reg_5[26] ( .A(data_0_reg_5_sm0), .B(data_0_reg_5_1_Z[26]), .C(data_0_reg_5_m1[26]), .Y(data_0_reg_5_Z[26]) ); defparam \data_0_reg_5[26] .INIT=8'hEC; // @48:14647 CFG3 \data_0_reg_5[7] ( .A(data_0_reg_5_sm0), .B(data_0_reg_5_1_Z[7]), .C(data_0_reg_5_m1[7]), .Y(data_0_reg_5_Z[7]) ); defparam \data_0_reg_5[7] .INIT=8'hEC; // @48:14647 CFG3 \data_0_reg_5[4] ( .A(data_0_reg_5_sm0), .B(data_0_reg_5_1_Z[4]), .C(data_0_reg_5_m1[4]), .Y(data_0_reg_5_Z[4]) ); defparam \data_0_reg_5[4] .INIT=8'hEC; // @48:14647 CFG3 \data_0_reg_5[8] ( .A(data_0_reg_5_sm0), .B(data_0_reg_5_1_Z[8]), .C(data_0_reg_5_m1[8]), .Y(data_0_reg_5_Z[8]) ); defparam \data_0_reg_5[8] .INIT=8'hEC; // @48:14647 CFG3 \data_0_reg_5[6] ( .A(data_0_reg_5_sm0), .B(data_0_reg_5_1_Z[6]), .C(data_0_reg_5_m1[6]), .Y(data_0_reg_5_Z[6]) ); defparam \data_0_reg_5[6] .INIT=8'hEC; // @48:14647 CFG3 \data_0_reg_5[0] ( .A(data_0_reg_5_sm0), .B(data_0_reg_5_1_Z[0]), .C(data_0_reg_5_m1[0]), .Y(data_0_reg_5_Z[0]) ); defparam \data_0_reg_5[0] .INIT=8'hEC; // @48:14647 CFG3 \data_0_reg_5[25] ( .A(data_0_reg_5_sm0), .B(data_0_reg_5_1_Z[25]), .C(data_0_reg_5_m1[25]), .Y(data_0_reg_5_Z[25]) ); defparam \data_0_reg_5[25] .INIT=8'hEC; // @48:14647 CFG4 \data_0_reg_5[16] ( .A(N_15), .B(dmi_req_data[18]), .C(data_0_reg_5_1_Z[16]), .D(data_0_reg_5_sm0), .Y(data_0_reg_5_Z[16]) ); defparam \data_0_reg_5[16] .INIT=16'hF8F0; // @48:13988 miv_rv32_debug_sba miv_rv32_debug_sba_0 ( .command_reg_state_4(command_reg_state_4[2:1]), .command_reg({command_reg_Z[31:24], N_15128, command_reg_Z[22:20], N_15127, N_15126, command_reg_Z[17:0]}), .dmi_resp_data({dmi_resp_data[33:2], N_15129, dmi_resp_data[0]}), .data_0_reg_5_m1_26(data_0_reg_5_m1[26]), .data_0_reg_5_m1_25(data_0_reg_5_m1[25]), .data_0_reg_5_m1_24(data_0_reg_5_m1[24]), .data_0_reg_5_m1_23(data_0_reg_5_m1[23]), .data_0_reg_5_m1_22(data_0_reg_5_m1[22]), .data_0_reg_5_m1_8(data_0_reg_5_m1[8]), .data_0_reg_5_m1_7(data_0_reg_5_m1[7]), .data_0_reg_5_m1_6(data_0_reg_5_m1[6]), .data_0_reg_5_m1_17(data_0_reg_5_m1[17]), .data_0_reg_5_m1_18(data_0_reg_5_m1[18]), .data_0_reg_5_m1_19(data_0_reg_5_m1[19]), .data_0_reg_5_m1_20(data_0_reg_5_m1[20]), .data_0_reg_5_m1_21(data_0_reg_5_m1[21]), .data_0_reg_5_m1_4(data_0_reg_5_m1[4]), .data_0_reg_5_m1_0(data_0_reg_5_m1[0]), .data_0_reg(data_0_reg_Z[31:0]), .cpu_d_resp_rd_data_net(cpu_d_resp_rd_data_net[31:0]), .debug_state_ns({debug_state_ns[5], N_15130, debug_state_ns[3:1]}), .cmderr_ff_4_0(cmderr_ff_4[0]), .cmderr_ff_4_2(cmderr_ff_4[2]), .debug_state(debug_state_Z[5:0]), .dmi_req_data(dmi_req_data[40:0]), .debug_sysbus_req_wr_byte_en_net(debug_sysbus_req_wr_byte_en_net[3:0]), .command_reg_state(command_reg_state_Z[5:0]), .debug_sysbus_req_rd_byte_en_net(debug_sysbus_req_rd_byte_en_net[3:0]), .req_masked_0(req_masked_0), .abstractcs_cmderr(abstractcs_cmderr_Z[2:0]), .sba_req_wr_data_int(sba_req_wr_data_int[31:0]), .sba_req_addr_int(sba_req_addr_int[31:0]), .command_reg_state_4_0_fast_0(command_reg_state_4_0_fast[0]), .un1_cpu_d_req_ready_sig_0_0(un1_cpu_d_req_ready_sig_0_0), .N_723(N_723), .N_76_i(N_76_i), .cpu_debug_csr_op_rd_data_valid_net(cpu_debug_csr_op_rd_data_valid_net), .cpu_d_resp_error_sig(cpu_d_resp_error_sig), .cpu_d_resp_valid_sig(cpu_d_resp_valid_sig), .debug_gpr_addr_0_sqmuxa_i(debug_gpr_addr_0_sqmuxa_i), .debug_csr_rd_data_ready_1_sqmuxa_i(debug_csr_rd_data_ready_1_sqmuxa_i), .debug_sysbus_resp_error_net(debug_sysbus_resp_error_net), .un1_dmcontrol_ndmreset13_4_i(un1_dmcontrol_ndmreset13_4_i), .un1_dmi_req_command_0_a3_RNIGP7L31_1z(un1_dmi_req_command_0_a3_RNIGP7L31), .N_719(N_719), .N_15(N_15), .data_0_reg_5_sm0(data_0_reg_5_sm0), .N_190_i(N_190_i), .N_136_i(N_136_i), .N_134_i(N_134_i), .N_132_i(N_132_i), .N_130_i(N_130_i), .N_128_i(N_128_i), .dmi_resp_valid_0_0_1z(dmi_resp_valid_0_0), .N_123_i_1z(N_123_i), .cpu_debug_halt_ack_net(cpu_debug_halt_ack_net), .un1_dmcontrol_ndmreset13_2_i(un1_dmcontrol_ndmreset13_2_i), .N_52_i(N_52_i), .debug_resume_req_3(debug_resume_req_3), .debug_exit_retr(debug_exit_retr), .init_wr_dcsr_step_en(init_wr_dcsr_step_en), .N_88_i(N_88_i), .N_170_i(N_170_i), .dmstatus_allany_havereset(dmstatus_allany_havereset_Z), .N_112_i_1z(N_112_i), .N_110_i_1z(N_110_i), .N_812(N_812), .empty_rd(empty_rd), .havereset_skip_pwrup_4(havereset_skip_pwrup_4), .N_361(N_361), .N_807(N_807), .debug_trx_os_net(debug_trx_os_net), .N_1108(N_1108), .debug_sys_reset(debug_sys_reset), .un1_debug_csr_rd_en(un1_debug_csr_rd_en), .abstractcs_busy(abstractcs_busy_Z), .N_88_1(N_88_1), .sba_req_addr_1(sba_req_addr_1), .N_990(N_990), .N_1547(N_1547), .dmcontrol_ackhavereset(dmcontrol_ackhavereset_Z), .dmcontrol_haltreq(dmcontrol_haltreq_Z), .dmcontrol_resumereq(dmcontrol_resumereq_Z), .dmstatus_allany_resumeack(dmstatus_allany_resumeack_Z), .abs_cmd_transfer_ff(abs_cmd_transfer_ff_Z), .havereset_skip_pwrup(havereset_skip_pwrup_Z), .cpu_debug_halt_req_net(cpu_debug_halt_req_net), .N_75_i(N_75_i), .N_59_tz(N_59_tz), .gpr_rs2_rd_data_valid_sig(gpr_rs2_rd_data_valid_sig), .N_78_i(N_78_i), .trace_priv_i(trace_priv_i), .cpu_m8_0_a3_0_3(cpu_m8_0_a3_0_3), .cpu_i_req_is_tcm0_5(cpu_i_req_is_tcm0_5), .cpu_m8_0_a3_0_2(cpu_m8_0_a3_0_2), .cpu_N_6(cpu_N_6), .cpu_N_14_mux(cpu_N_14_mux), .un1_cpu_d_req_ready_sig_d_0(un1_cpu_d_req_ready_sig_d_0), .un1_cpu_d_req_ready_sig_c(un1_cpu_d_req_ready_sig_c), .un1_dmcontrol_ndmreset13_i(un1_dmcontrol_ndmreset13_i), .dmcontrol_dmactive4(dmcontrol_dmactive4), .sbcs_busyerror_1_sqmuxa_1(sbcs_busyerror_1_sqmuxa_1), .N_53_1(N_53_1), .dmstatus_allany_halted(dmstatus_allany_halted_Z), .N_53(N_53), .cpu_debug_active_net(cpu_debug_active_net), .cpu_debug_csr_rd_en_net(cpu_debug_csr_rd_en_net), .cpu_debug_gpr_rd_en_net(cpu_debug_gpr_rd_en_net), .N_81_i(N_81_i), .debug_sysbus_resp_ready_net(debug_sysbus_resp_ready_net), .debug_sysbus_req_valid_net(debug_sysbus_req_valid_net), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .dff(dff), .next_state_0_sqmuxa_i_RNI4B2FB_1z(next_state_0_sqmuxa_i_RNI4B2FB), .un1_dmi_req_command_0_a3_RNIERK9D_0_1z(un1_dmi_req_command_0_a3_RNIERK9D_0), .un1_dmi_req_command_0_a3_RNICPK9D_0_1z(un1_dmi_req_command_0_a3_RNICPK9D_0), .un1_dmi_req_command_0_a3_RNIANK9D_0_1z(un1_dmi_req_command_0_a3_RNIANK9D_0), .un1_dmi_req_command_0_a3_RNI8LK9D_0_1z(un1_dmi_req_command_0_a3_RNI8LK9D_0), .un1_dmi_req_command_0_a3_RNIIVK9D_0_1z(un1_dmi_req_command_0_a3_RNIIVK9D_0), .un1_dmi_req_command_0_a3_RNIGTK9D_1z(un1_dmi_req_command_0_a3_RNIGTK9D), .un1_dmi_req_command_0_a3_RNIERK9D_1z(un1_dmi_req_command_0_a3_RNIERK9D), .un1_dmi_req_command_0_a3_RNICPK9D_1z(un1_dmi_req_command_0_a3_RNICPK9D), .un1_dmi_req_command_0_a3_RNIANK9D_1z(un1_dmi_req_command_0_a3_RNIANK9D), .un1_dmi_req_command_0_a3_RNI8LK9D_1z(un1_dmi_req_command_0_a3_RNI8LK9D), .un1_dmi_req_command_0_a3_RNICTI09_1z(un1_dmi_req_command_0_a3_RNICTI09), .un1_dmi_req_command_0_a3_RNIARI09_1z(un1_dmi_req_command_0_a3_RNIARI09), .un1_dmi_req_command_0_a3_RNI10U4D_1z(un1_dmi_req_command_0_a3_RNI10U4D), .un1_dmi_req_command_0_a3_RNIVTT4D_1z(un1_dmi_req_command_0_a3_RNIVTT4D), .un1_dmi_req_command_0_a3_RNIM3L9D_1z(un1_dmi_req_command_0_a3_RNIM3L9D), .un1_dmi_req_command_0_a3_RNIK1L9D_1z(un1_dmi_req_command_0_a3_RNIK1L9D), .un1_dmi_req_command_0_a3_RNIIVK9D_1z(un1_dmi_req_command_0_a3_RNIIVK9D), .un1_dmi_req_command_0_a3_RNIGTK9D_0_1z(un1_dmi_req_command_0_a3_RNIGTK9D_0) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_debug_du */ module miv_rv32_subsys_debug_1s ( cpu_debug_gpr_op_rd_data_net, cpu_debug_csr_op_rd_data_net, cpu_debug_gpr_op_addr_net, cpu_debug_csr_op_addr_net, cpu_debug_op_wr_data_net, cpu_d_resp_rd_data_net, debug_sysbus_req_wr_byte_en_net, debug_sysbus_req_rd_byte_en_net, req_masked_0, sba_req_wr_data_int, sba_req_addr_int, delay_sel_0, currTapState_0, currTapState_7, cpu_debug_active_net, cpu_debug_resume_req_net, cpu_debug_halt_req_net, debug_sys_reset, cpu_debug_csr_op_valid_net, cpu_debug_csr_wr_en_net, cpu_debug_gpr_op_valid_net, cpu_debug_gpr_wr_en_net, cpu_debug_csr_rd_en_net, cpu_debug_gpr_rd_en_net, un1_cpu_d_req_ready_sig_0_0, cpu_debug_csr_op_rd_data_valid_net, cpu_d_resp_error_sig, cpu_d_resp_valid_sig, debug_sysbus_resp_error_net, cpu_debug_halt_ack_net, debug_exit_retr, init_wr_dcsr_step_en, N_807, debug_trx_os_net, sba_req_addr_1, gpr_rs2_rd_data_valid_sig, trace_priv_i, cpu_m8_0_a3_0_3, cpu_i_req_is_tcm0_5, cpu_m8_0_a3_0_2, cpu_N_6, cpu_N_14_mux, un1_cpu_d_req_ready_sig_d_0, un1_cpu_d_req_ready_sig_c, debug_sysbus_resp_ready_net, debug_sysbus_req_valid_net, PF_CCC_0_0_OUT0_FABCLK_0, dff, COREJTAGDEBUG_C0_0_TGT_TCK_0, shiftIR_ne_0, COREJTAGDEBUG_C0_0_TGT_TCK_0_i, shiftBP_ne_0, shiftDR21, N_974, COREJTAGDEBUG_C0_0_TGT_TMS_0, COREJTAGDEBUG_C0_0_TGT_TDI_0, un1_shiftDR20 ) ; input [31:0] cpu_debug_gpr_op_rd_data_net ; input [31:0] cpu_debug_csr_op_rd_data_net ; output [5:0] cpu_debug_gpr_op_addr_net ; output [11:0] cpu_debug_csr_op_addr_net ; output [31:0] cpu_debug_op_wr_data_net ; input [31:0] cpu_d_resp_rd_data_net ; output [3:0] debug_sysbus_req_wr_byte_en_net ; output [3:0] debug_sysbus_req_rd_byte_en_net ; input req_masked_0 ; output [31:0] sba_req_wr_data_int ; output [31:0] sba_req_addr_int ; input delay_sel_0 ; output currTapState_0 ; output currTapState_7 ; output cpu_debug_active_net ; output cpu_debug_resume_req_net ; output cpu_debug_halt_req_net ; output debug_sys_reset ; output cpu_debug_csr_op_valid_net ; output cpu_debug_csr_wr_en_net ; output cpu_debug_gpr_op_valid_net ; output cpu_debug_gpr_wr_en_net ; output cpu_debug_csr_rd_en_net ; output cpu_debug_gpr_rd_en_net ; input un1_cpu_d_req_ready_sig_0_0 ; input cpu_debug_csr_op_rd_data_valid_net ; input cpu_d_resp_error_sig ; input cpu_d_resp_valid_sig ; input debug_sysbus_resp_error_net ; input cpu_debug_halt_ack_net ; input debug_exit_retr ; input init_wr_dcsr_step_en ; output N_807 ; input debug_trx_os_net ; output sba_req_addr_1 ; input gpr_rs2_rd_data_valid_sig ; input trace_priv_i ; input cpu_m8_0_a3_0_3 ; input cpu_i_req_is_tcm0_5 ; input cpu_m8_0_a3_0_2 ; input cpu_N_6 ; input cpu_N_14_mux ; input un1_cpu_d_req_ready_sig_d_0 ; input un1_cpu_d_req_ready_sig_c ; output debug_sysbus_resp_ready_net ; output debug_sysbus_req_valid_net ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input dff ; input COREJTAGDEBUG_C0_0_TGT_TCK_0 ; output shiftIR_ne_0 ; input COREJTAGDEBUG_C0_0_TGT_TCK_0_i ; output shiftBP_ne_0 ; output shiftDR21 ; output N_974 ; input COREJTAGDEBUG_C0_0_TGT_TMS_0 ; input COREJTAGDEBUG_C0_0_TGT_TDI_0 ; output un1_shiftDR20 ; wire req_masked_0 ; wire delay_sel_0 ; wire currTapState_0 ; wire currTapState_7 ; wire cpu_debug_active_net ; wire cpu_debug_resume_req_net ; wire cpu_debug_halt_req_net ; wire debug_sys_reset ; wire cpu_debug_csr_op_valid_net ; wire cpu_debug_csr_wr_en_net ; wire cpu_debug_gpr_op_valid_net ; wire cpu_debug_gpr_wr_en_net ; wire cpu_debug_csr_rd_en_net ; wire cpu_debug_gpr_rd_en_net ; wire un1_cpu_d_req_ready_sig_0_0 ; wire cpu_debug_csr_op_rd_data_valid_net ; wire cpu_d_resp_error_sig ; wire cpu_d_resp_valid_sig ; wire debug_sysbus_resp_error_net ; wire cpu_debug_halt_ack_net ; wire debug_exit_retr ; wire init_wr_dcsr_step_en ; wire N_807 ; wire debug_trx_os_net ; wire sba_req_addr_1 ; wire gpr_rs2_rd_data_valid_sig ; wire trace_priv_i ; wire cpu_m8_0_a3_0_3 ; wire cpu_i_req_is_tcm0_5 ; wire cpu_m8_0_a3_0_2 ; wire cpu_N_6 ; wire cpu_N_14_mux ; wire un1_cpu_d_req_ready_sig_d_0 ; wire un1_cpu_d_req_ready_sig_c ; wire debug_sysbus_resp_ready_net ; wire debug_sysbus_req_valid_net ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire dff ; wire COREJTAGDEBUG_C0_0_TGT_TCK_0 ; wire shiftIR_ne_0 ; wire COREJTAGDEBUG_C0_0_TGT_TCK_0_i ; wire shiftBP_ne_0 ; wire shiftDR21 ; wire N_974 ; wire COREJTAGDEBUG_C0_0_TGT_TMS_0 ; wire COREJTAGDEBUG_C0_0_TGT_TDI_0 ; wire un1_shiftDR20 ; wire [0:0] wr_ptr; wire [33:2] fifo_memory; wire [0:0] rd_ptr; wire [40:1] dtm_req_data; wire [0:0] dtm_resp_data; wire [39:0] shiftDMI; wire [8:8] currTapState; wire [40:0] dmi_req_data; wire [33:0] dmi_resp_data; wire N_15123 ; wire CO0_1 ; wire write_en_1 ; wire ram0_29 ; wire ram1_29 ; wire empty_rd ; wire dtm_resp_ready ; wire fifo_reset_arst_i ; wire fifo_reset ; wire N_812 ; wire empty_rd_0 ; wire N_15124 ; wire N_15125 ; wire sbcs_busyerror_1_sqmuxa_1 ; wire N_1547 ; wire dmi_resp_valid_0_0 ; wire N_15131 ; wire GND ; wire VCC ; // @48:13572 miv_rv32_debug_dtm_jtag_1s MIV_subsys_debug_transport_module_jtag_0 ( .wr_ptr_0(wr_ptr[0]), .fifo_memory({fifo_memory[33:30], N_15123, fifo_memory[28:2]}), .rd_ptr_0(rd_ptr[0]), .dtm_req_data_0(dtm_req_data[1]), .dtm_req_data_4(dtm_req_data[5]), .dtm_req_data_7(dtm_req_data[8]), .dtm_req_data_9(dtm_req_data[10]), .dtm_req_data_10(dtm_req_data[11]), .dtm_req_data_11(dtm_req_data[12]), .dtm_req_data_13(dtm_req_data[14]), .dtm_req_data_39(dtm_req_data[40]), .dtm_req_data_33(dtm_req_data[34]), .dtm_req_data_32(dtm_req_data[33]), .dtm_req_data_30(dtm_req_data[31]), .dtm_req_data_29(dtm_req_data[30]), .dtm_req_data_28(dtm_req_data[29]), .dtm_req_data_27(dtm_req_data[28]), .dtm_req_data_26(dtm_req_data[27]), .dtm_req_data_25(dtm_req_data[26]), .dtm_req_data_24(dtm_req_data[25]), .dtm_req_data_23(dtm_req_data[24]), .dtm_req_data_22(dtm_req_data[23]), .dtm_req_data_21(dtm_req_data[22]), .dtm_req_data_20(dtm_req_data[21]), .dtm_req_data_19(dtm_req_data[20]), .dtm_req_data_18(dtm_req_data[19]), .dtm_req_data_16(dtm_req_data[17]), .dtm_req_data_15(dtm_req_data[16]), .dtm_req_data_8(dtm_req_data[9]), .dtm_req_data_6(dtm_req_data[7]), .dtm_req_data_3(dtm_req_data[4]), .dtm_req_data_2(dtm_req_data[3]), .dtm_resp_data_0(dtm_resp_data[0]), .shiftDMI_6(shiftDMI[6]), .shiftDMI_2(shiftDMI[2]), .shiftDMI_1(shiftDMI[1]), .shiftDMI_0(shiftDMI[0]), .shiftDMI_18(shiftDMI[18]), .shiftDMI_15(shiftDMI[15]), .shiftDMI_13(shiftDMI[13]), .shiftDMI_37(shiftDMI[37]), .shiftDMI_36(shiftDMI[36]), .shiftDMI_35(shiftDMI[35]), .shiftDMI_32(shiftDMI[32]), .shiftDMI_39(shiftDMI[39]), .shiftDMI_38(shiftDMI[38]), .currTapState_0(currTapState_0), .currTapState_7(currTapState_7), .currTapState_4(currTapState[8]), .delay_sel_0(delay_sel_0), .CO0_1(CO0_1), .write_en_1(write_en_1), .ram0_29(ram0_29), .ram1_29(ram1_29), .un1_shiftDR20(un1_shiftDR20), .COREJTAGDEBUG_C0_0_TGT_TDI_0(COREJTAGDEBUG_C0_0_TGT_TDI_0), .COREJTAGDEBUG_C0_0_TGT_TMS_0(COREJTAGDEBUG_C0_0_TGT_TMS_0), .N_974(N_974), .shiftDR21(shiftDR21), .empty_rd(empty_rd), .shiftBP_ne_0(shiftBP_ne_0), .COREJTAGDEBUG_C0_0_TGT_TCK_0_i(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .shiftIR_ne_0(shiftIR_ne_0), .COREJTAGDEBUG_C0_0_TGT_TCK_0(COREJTAGDEBUG_C0_0_TGT_TCK_0), .dtm_resp_ready(dtm_resp_ready), .fifo_reset_arst_i(fifo_reset_arst_i), .fifo_reset(fifo_reset) ); // @48:13602 miv_rv32_debug_fifo_41s_1s_1s debug_req_fifo ( .currTapState_0(currTapState[8]), .dmi_req_data(dmi_req_data[40:0]), .shiftDMI_2(shiftDMI[2]), .shiftDMI_0(shiftDMI[0]), .shiftDMI_6(shiftDMI[6]), .shiftDMI_18(shiftDMI[18]), .shiftDMI_15(shiftDMI[15]), .shiftDMI_13(shiftDMI[13]), .shiftDMI_32(shiftDMI[32]), .shiftDMI_39(shiftDMI[39]), .shiftDMI_38(shiftDMI[38]), .shiftDMI_37(shiftDMI[37]), .shiftDMI_36(shiftDMI[36]), .shiftDMI_35(shiftDMI[35]), .shiftDMI_1(shiftDMI[1]), .dtm_req_data_2(dtm_req_data[3]), .dtm_req_data_0(dtm_req_data[1]), .dtm_req_data_10(dtm_req_data[11]), .dtm_req_data_9(dtm_req_data[10]), .dtm_req_data_8(dtm_req_data[9]), .dtm_req_data_7(dtm_req_data[8]), .dtm_req_data_6(dtm_req_data[7]), .dtm_req_data_4(dtm_req_data[5]), .dtm_req_data_3(dtm_req_data[4]), .dtm_req_data_16(dtm_req_data[17]), .dtm_req_data_15(dtm_req_data[16]), .dtm_req_data_13(dtm_req_data[14]), .dtm_req_data_11(dtm_req_data[12]), .dtm_req_data_25(dtm_req_data[26]), .dtm_req_data_24(dtm_req_data[25]), .dtm_req_data_23(dtm_req_data[24]), .dtm_req_data_22(dtm_req_data[23]), .dtm_req_data_21(dtm_req_data[22]), .dtm_req_data_20(dtm_req_data[21]), .dtm_req_data_19(dtm_req_data[20]), .dtm_req_data_18(dtm_req_data[19]), .dtm_req_data_32(dtm_req_data[33]), .dtm_req_data_30(dtm_req_data[31]), .dtm_req_data_29(dtm_req_data[30]), .dtm_req_data_28(dtm_req_data[29]), .dtm_req_data_27(dtm_req_data[28]), .dtm_req_data_26(dtm_req_data[27]), .dtm_req_data_39(dtm_req_data[40]), .dtm_req_data_33(dtm_req_data[34]), .wr_ptr_0(wr_ptr[0]), .shiftDR21(shiftDR21), .N_812(N_812), .write_en_1_1z(write_en_1), .fifo_reset(fifo_reset), .empty_rd_1z(empty_rd_0), .dff(dff), .CO0_1(CO0_1), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .COREJTAGDEBUG_C0_0_TGT_TCK_0_i(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .fifo_reset_arst_i(fifo_reset_arst_i) ); // @48:13623 miv_rv32_debug_fifo_34s_1s_1s debug_resp_fifo ( .dtm_resp_data_0(dtm_resp_data[0]), .fifo_memory({fifo_memory[33:30], N_15124, fifo_memory[28:2]}), .dmi_resp_data({dmi_resp_data[33:2], N_15125, dmi_resp_data[0]}), .rd_ptr_0(rd_ptr[0]), .sbcs_busyerror_1_sqmuxa_1(sbcs_busyerror_1_sqmuxa_1), .N_1547(N_1547), .dmi_resp_valid_0_0(dmi_resp_valid_0_0), .dtm_resp_ready(dtm_resp_ready), .empty_rd_1z(empty_rd), .fifo_reset(fifo_reset), .ram1_29(ram1_29), .ram0_29(ram0_29), .COREJTAGDEBUG_C0_0_TGT_TCK_0(COREJTAGDEBUG_C0_0_TGT_TCK_0), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .dff(dff) ); // @48:13641 miv_rv32_debug_du miv_rv32_debug_du_0 ( .sba_req_addr_int(sba_req_addr_int[31:0]), .sba_req_wr_data_int(sba_req_wr_data_int[31:0]), .req_masked_0(req_masked_0), .debug_sysbus_req_rd_byte_en_net(debug_sysbus_req_rd_byte_en_net[3:0]), .debug_sysbus_req_wr_byte_en_net(debug_sysbus_req_wr_byte_en_net[3:0]), .dmi_req_data(dmi_req_data[40:0]), .cpu_d_resp_rd_data_net(cpu_d_resp_rd_data_net[31:0]), .dmi_resp_data({dmi_resp_data[33:2], N_15131, dmi_resp_data[0]}), .cpu_debug_op_wr_data_net(cpu_debug_op_wr_data_net[31:0]), .cpu_debug_csr_op_addr_net(cpu_debug_csr_op_addr_net[11:0]), .cpu_debug_gpr_op_addr_net(cpu_debug_gpr_op_addr_net[5:0]), .cpu_debug_csr_op_rd_data_net(cpu_debug_csr_op_rd_data_net[31:0]), .cpu_debug_gpr_op_rd_data_net(cpu_debug_gpr_op_rd_data_net[31:0]), .debug_sysbus_req_valid_net(debug_sysbus_req_valid_net), .debug_sysbus_resp_ready_net(debug_sysbus_resp_ready_net), .sbcs_busyerror_1_sqmuxa_1(sbcs_busyerror_1_sqmuxa_1), .un1_cpu_d_req_ready_sig_c(un1_cpu_d_req_ready_sig_c), .un1_cpu_d_req_ready_sig_d_0(un1_cpu_d_req_ready_sig_d_0), .cpu_N_14_mux(cpu_N_14_mux), .cpu_N_6(cpu_N_6), .cpu_m8_0_a3_0_2(cpu_m8_0_a3_0_2), .cpu_i_req_is_tcm0_5(cpu_i_req_is_tcm0_5), .cpu_m8_0_a3_0_3(cpu_m8_0_a3_0_3), .trace_priv_i(trace_priv_i), .gpr_rs2_rd_data_valid_sig(gpr_rs2_rd_data_valid_sig), .N_1547(N_1547), .sba_req_addr_1(sba_req_addr_1), .debug_trx_os_net(debug_trx_os_net), .N_807(N_807), .empty_rd(empty_rd_0), .N_812(N_812), .init_wr_dcsr_step_en(init_wr_dcsr_step_en), .debug_exit_retr(debug_exit_retr), .cpu_debug_halt_ack_net(cpu_debug_halt_ack_net), .dmi_resp_valid_0_0(dmi_resp_valid_0_0), .debug_sysbus_resp_error_net(debug_sysbus_resp_error_net), .cpu_d_resp_valid_sig(cpu_d_resp_valid_sig), .cpu_d_resp_error_sig(cpu_d_resp_error_sig), .cpu_debug_csr_op_rd_data_valid_net(cpu_debug_csr_op_rd_data_valid_net), .un1_cpu_d_req_ready_sig_0_0(un1_cpu_d_req_ready_sig_0_0), .cpu_debug_gpr_rd_en_net(cpu_debug_gpr_rd_en_net), .cpu_debug_csr_rd_en_net(cpu_debug_csr_rd_en_net), .cpu_debug_gpr_wr_en_net(cpu_debug_gpr_wr_en_net), .cpu_debug_gpr_op_valid_net(cpu_debug_gpr_op_valid_net), .cpu_debug_csr_wr_en_net(cpu_debug_csr_wr_en_net), .cpu_debug_csr_op_valid_net(cpu_debug_csr_op_valid_net), .debug_sys_reset(debug_sys_reset), .cpu_debug_halt_req_net(cpu_debug_halt_req_net), .cpu_debug_resume_req_net(cpu_debug_resume_req_net), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .dff(dff), .cpu_debug_active_net(cpu_debug_active_net) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_subsys_debug_1s */ module miv_rv32_buffer_11s_2s_1s_1s ( d_trx_resp_10, d_trx_resp_2, d_trx_resp_3, d_trx_resp_1, d_trx_resp_0, d_trx_resp_9, d_trx_resp_6, d_trx_resp_pkd_4, d_trx_resp_pkd_15, d_trx_resp_pkd_18, d_trx_resp_pkd_1, d_trx_resp_pkd_0, d_trx_resp_pkd_8, d_trx_resp_pkd_7, d_trx_resp_pkd_12, d_trx_resp_pkd_11, d_trx_resp_pkd_19, buff_rd_ptr_0, d_trx_resp_valid_pkd, cpu_d_req_valid_mux_1, cpu_d_req_ready_sig, un1_cpu_d_req_accepted, N_1155, N_1154, d_trx_resp_valid, cpu_d_resp_valid_sig, debug_trx_os_net, trace_priv_i, debug_sysbus_resp_ready_net, subsys_resetn, d_trx_os_buff_ready, ram0_1, cpu_d_req_type_1_sm0, ram1_1, cpu_d_req_type_1_ss0_i, cpu_d_req_is_apb, cpu_d_req_is_subsys_cfg, cpu_d_req_is_tcm0, cpu_d_req_is_dummy_target, cpu_d_req_is_fence, PF_CCC_0_0_OUT0_FABCLK_0 ) ; output d_trx_resp_10 ; output d_trx_resp_2 ; output d_trx_resp_3 ; output d_trx_resp_1 ; output d_trx_resp_0 ; output d_trx_resp_9 ; output d_trx_resp_6 ; output d_trx_resp_pkd_4 ; output d_trx_resp_pkd_15 ; output d_trx_resp_pkd_18 ; output d_trx_resp_pkd_1 ; output d_trx_resp_pkd_0 ; output d_trx_resp_pkd_8 ; output d_trx_resp_pkd_7 ; output d_trx_resp_pkd_12 ; output d_trx_resp_pkd_11 ; output d_trx_resp_pkd_19 ; output buff_rd_ptr_0 ; output [1:0] d_trx_resp_valid_pkd ; input cpu_d_req_valid_mux_1 ; input cpu_d_req_ready_sig ; input un1_cpu_d_req_accepted ; output N_1155 ; output N_1154 ; output d_trx_resp_valid ; input cpu_d_resp_valid_sig ; input debug_trx_os_net ; input trace_priv_i ; input debug_sysbus_resp_ready_net ; input subsys_resetn ; output d_trx_os_buff_ready ; output ram0_1 ; input cpu_d_req_type_1_sm0 ; output ram1_1 ; input cpu_d_req_type_1_ss0_i ; input cpu_d_req_is_apb ; input cpu_d_req_is_subsys_cfg ; input cpu_d_req_is_tcm0 ; input cpu_d_req_is_dummy_target ; input cpu_d_req_is_fence ; input PF_CCC_0_0_OUT0_FABCLK_0 ; wire d_trx_resp_10 ; wire d_trx_resp_2 ; wire d_trx_resp_3 ; wire d_trx_resp_1 ; wire d_trx_resp_0 ; wire d_trx_resp_9 ; wire d_trx_resp_6 ; wire d_trx_resp_pkd_4 ; wire d_trx_resp_pkd_15 ; wire d_trx_resp_pkd_18 ; wire d_trx_resp_pkd_1 ; wire d_trx_resp_pkd_0 ; wire d_trx_resp_pkd_8 ; wire d_trx_resp_pkd_7 ; wire d_trx_resp_pkd_12 ; wire d_trx_resp_pkd_11 ; wire d_trx_resp_pkd_19 ; wire buff_rd_ptr_0 ; wire cpu_d_req_valid_mux_1 ; wire cpu_d_req_ready_sig ; wire un1_cpu_d_req_accepted ; wire N_1155 ; wire N_1154 ; wire d_trx_resp_valid ; wire cpu_d_resp_valid_sig ; wire debug_trx_os_net ; wire trace_priv_i ; wire debug_sysbus_resp_ready_net ; wire subsys_resetn ; wire d_trx_os_buff_ready ; wire ram0_1 ; wire cpu_d_req_type_1_sm0 ; wire ram1_1 ; wire cpu_d_req_type_1_ss0_i ; wire cpu_d_req_is_apb ; wire cpu_d_req_is_subsys_cfg ; wire cpu_d_req_is_tcm0 ; wire cpu_d_req_is_dummy_target ; wire cpu_d_req_is_fence ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire [1:0] buff_wr_strb_Z; wire [1:0] next_buff_valid_Z; wire [0:0] buff_rd_ptr_0_0_Z; wire [0:0] buff_wr_ptr_Z; wire [0:0] buff_wr_ptr_0_0; wire ram1_2 ; wire VCC ; wire GND ; wire ram1_3 ; wire ram1_4 ; wire ram1_5 ; wire ram1_6 ; wire ram0_4 ; wire ram0_5 ; wire ram0_6 ; wire ram1_0 ; wire ram0_0 ; wire ram0_2 ; wire ram0_3 ; wire un3_next_buff_ready_i ; wire rd_data_Z ; wire wr_data_Z ; wire N_633 ; wire N_632 ; wire N_631 ; wire N_630 ; SLE \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_d_trx_os_buffer.gen_buff_loop[0].buff_data_ram1_[2] ( .Q(ram1_2), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_is_fence), .EN(buff_wr_strb_Z[1]), .LAT(GND), .SD(GND), .SLn(VCC) ); SLE \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_d_trx_os_buffer.gen_buff_loop[0].buff_data_ram1_[3] ( .Q(ram1_3), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_is_dummy_target), .EN(buff_wr_strb_Z[1]), .LAT(GND), .SD(GND), .SLn(VCC) ); SLE \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_d_trx_os_buffer.gen_buff_loop[0].buff_data_ram1_[4] ( .Q(ram1_4), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_is_tcm0), .EN(buff_wr_strb_Z[1]), .LAT(GND), .SD(GND), .SLn(VCC) ); SLE \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_d_trx_os_buffer.gen_buff_loop[0].buff_data_ram1_[5] ( .Q(ram1_5), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_is_subsys_cfg), .EN(buff_wr_strb_Z[1]), .LAT(GND), .SD(GND), .SLn(VCC) ); SLE \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_d_trx_os_buffer.gen_buff_loop[0].buff_data_ram1_[6] ( .Q(ram1_6), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_is_apb), .EN(buff_wr_strb_Z[1]), .LAT(GND), .SD(GND), .SLn(VCC) ); SLE \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_d_trx_os_buffer.gen_buff_loop[0].buff_data_ram0_[4] ( .Q(ram0_4), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_is_tcm0), .EN(buff_wr_strb_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); SLE \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_d_trx_os_buffer.gen_buff_loop[0].buff_data_ram0_[5] ( .Q(ram0_5), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_is_subsys_cfg), .EN(buff_wr_strb_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); SLE \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_d_trx_os_buffer.gen_buff_loop[0].buff_data_ram0_[6] ( .Q(ram0_6), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_is_apb), .EN(buff_wr_strb_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); SLE \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_d_trx_os_buffer.gen_buff_loop[0].buff_data_ram1_[0] ( .Q(ram1_0), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_type_1_ss0_i), .EN(buff_wr_strb_Z[1]), .LAT(GND), .SD(GND), .SLn(VCC) ); SLE \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_d_trx_os_buffer.gen_buff_loop[0].buff_data_ram1_[1] ( .Q(ram1_1), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_type_1_sm0), .EN(buff_wr_strb_Z[1]), .LAT(GND), .SD(GND), .SLn(VCC) ); SLE \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_d_trx_os_buffer.gen_buff_loop[0].buff_data_ram0_[0] ( .Q(ram0_0), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_type_1_ss0_i), .EN(buff_wr_strb_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); SLE \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_d_trx_os_buffer.gen_buff_loop[0].buff_data_ram0_[1] ( .Q(ram0_1), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_type_1_sm0), .EN(buff_wr_strb_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); SLE \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_d_trx_os_buffer.gen_buff_loop[0].buff_data_ram0_[2] ( .Q(ram0_2), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_is_fence), .EN(buff_wr_strb_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); SLE \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_d_trx_os_buffer.gen_buff_loop[0].buff_data_ram0_[3] ( .Q(ram0_3), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_is_dummy_target), .EN(buff_wr_strb_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10075 SLE buff_ready_reg ( .Q(d_trx_os_buff_ready), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un3_next_buff_ready_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10059 SLE \gen_buff_loop[1].buff_valid[1] ( .Q(d_trx_resp_valid_pkd[1]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_buff_valid_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10059 SLE \gen_buff_loop[0].buff_valid[0] ( .Q(d_trx_resp_valid_pkd[0]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_buff_valid_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10009 SLE \buff_rd_ptr[0] ( .Q(buff_rd_ptr_0), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(buff_rd_ptr_0_0_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10018 SLE \buff_wr_ptr[0] ( .Q(buff_wr_ptr_Z[0]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(buff_wr_ptr_0_0[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10047 SLE \gen_buff_loop[0].buff_data[0][6] ( .Q(d_trx_resp_pkd_4), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_is_tcm0), .EN(buff_wr_strb_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10047 SLE \gen_buff_loop[1].buff_data[1][6] ( .Q(d_trx_resp_pkd_15), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_is_tcm0), .EN(buff_wr_strb_Z[1]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10047 SLE \gen_buff_loop[1].buff_data[1][9] ( .Q(d_trx_resp_pkd_18), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_is_subsys_cfg), .EN(buff_wr_strb_Z[1]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10047 SLE \gen_buff_loop[0].buff_data[0][3] ( .Q(d_trx_resp_pkd_1), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_is_dummy_target), .EN(buff_wr_strb_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10047 SLE \gen_buff_loop[0].buff_data[0][2] ( .Q(d_trx_resp_pkd_0), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_is_fence), .EN(buff_wr_strb_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10047 SLE \gen_buff_loop[0].buff_data[0][10] ( .Q(d_trx_resp_pkd_8), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_is_apb), .EN(buff_wr_strb_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10047 SLE \gen_buff_loop[0].buff_data[0][9] ( .Q(d_trx_resp_pkd_7), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_is_subsys_cfg), .EN(buff_wr_strb_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10047 SLE \gen_buff_loop[1].buff_data[1][3] ( .Q(d_trx_resp_pkd_12), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_is_dummy_target), .EN(buff_wr_strb_Z[1]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10047 SLE \gen_buff_loop[1].buff_data[1][2] ( .Q(d_trx_resp_pkd_11), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_is_fence), .EN(buff_wr_strb_Z[1]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10047 SLE \gen_buff_loop[1].buff_data[1][10] ( .Q(d_trx_resp_pkd_19), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_is_apb), .EN(buff_wr_strb_Z[1]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10005 CFG4 rd_data ( .A(debug_sysbus_resp_ready_net), .B(trace_priv_i), .C(debug_trx_os_net), .D(cpu_d_resp_valid_sig), .Y(rd_data_Z) ); defparam rd_data.INIT=16'hB000; // @48:15839 CFG3 \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_d_trx_os_buffer.gen_buff_loop[0].buff_data_ram0__RNIJE4LE[6] ( .A(ram1_6), .B(ram0_6), .C(buff_rd_ptr_0), .Y(d_trx_resp_10) ); defparam \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_d_trx_os_buffer.gen_buff_loop[0].buff_data_ram0__RNIJE4LE[6] .INIT=8'hAC; // @48:15839 CFG3 \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_d_trx_os_buffer.gen_buff_loop[0].buff_data_ram0__RNIB64LE[2] ( .A(ram1_2), .B(ram0_2), .C(buff_rd_ptr_0), .Y(d_trx_resp_2) ); defparam \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_d_trx_os_buffer.gen_buff_loop[0].buff_data_ram0__RNIB64LE[2] .INIT=8'hAC; // @48:15839 CFG3 \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_d_trx_os_buffer.gen_buff_loop[0].buff_data_ram0__RNID84LE[3] ( .A(ram1_3), .B(ram0_3), .C(buff_rd_ptr_0), .Y(d_trx_resp_3) ); defparam \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_d_trx_os_buffer.gen_buff_loop[0].buff_data_ram0__RNID84LE[3] .INIT=8'hAC; // @48:10071 CFG3 valid_out ( .A(d_trx_resp_valid_pkd[0]), .B(buff_rd_ptr_0), .C(d_trx_resp_valid_pkd[1]), .Y(d_trx_resp_valid) ); defparam valid_out.INIT=8'hE2; // @48:15839 CFG3 \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_d_trx_os_buffer.gen_buff_loop[0].buff_data_ram0__RNI944LE[1] ( .A(ram1_1), .B(ram0_1), .C(buff_rd_ptr_0), .Y(d_trx_resp_1) ); defparam \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_d_trx_os_buffer.gen_buff_loop[0].buff_data_ram0__RNI944LE[1] .INIT=8'hAC; // @48:15839 CFG3 \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_d_trx_os_buffer.gen_buff_loop[0].buff_data_ram0__RNI724LE[0] ( .A(ram1_0), .B(ram0_0), .C(buff_rd_ptr_0), .Y(d_trx_resp_0) ); defparam \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_d_trx_os_buffer.gen_buff_loop[0].buff_data_ram0__RNI724LE[0] .INIT=8'hAC; // @48:15839 CFG3 \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_d_trx_os_buffer.gen_buff_loop[0].buff_data_ram0__RNIHC4LE[5] ( .A(ram1_5), .B(ram0_5), .C(buff_rd_ptr_0), .Y(d_trx_resp_9) ); defparam \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_d_trx_os_buffer.gen_buff_loop[0].buff_data_ram0__RNIHC4LE[5] .INIT=8'hAC; // @48:15839 CFG3 \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_d_trx_os_buffer.gen_buff_loop[0].buff_data_ram0__RNIFA4LE[4] ( .A(ram1_4), .B(ram0_4), .C(buff_rd_ptr_0), .Y(d_trx_resp_6) ); defparam \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_d_trx_os_buffer.gen_buff_loop[0].buff_data_ram0__RNIFA4LE[4] .INIT=8'hAC; // @48:3337 CFG4 \gen_buff_loop[1].buff_data[1]_RNICLNUF[2] ( .A(d_trx_resp_pkd_11), .B(d_trx_resp_pkd_0), .C(d_trx_resp_valid_pkd[1]), .D(d_trx_resp_valid_pkd[0]), .Y(N_1154) ); defparam \gen_buff_loop[1].buff_data[1]_RNICLNUF[2] .INIT=16'hECA0; // @48:3682 CFG4 \gen_buff_loop[1].buff_data[1]_RNIAKDAI[10] ( .A(d_trx_resp_pkd_19), .B(d_trx_resp_pkd_8), .C(d_trx_resp_valid_pkd[1]), .D(d_trx_resp_valid_pkd[0]), .Y(N_1155) ); defparam \gen_buff_loop[1].buff_data[1]_RNIAKDAI[10] .INIT=16'hECA0; // @48:10009 CFG2 \buff_rd_ptr_0_0[0] ( .A(rd_data_Z), .B(buff_rd_ptr_0), .Y(buff_rd_ptr_0_0_Z[0]) ); defparam \buff_rd_ptr_0_0[0] .INIT=4'h6; // @48:10004 CFG4 wr_data ( .A(un1_cpu_d_req_accepted), .B(d_trx_os_buff_ready), .C(cpu_d_req_ready_sig), .D(cpu_d_req_valid_mux_1), .Y(wr_data_Z) ); defparam wr_data.INIT=16'h8000; // @48:10018 CFG2 \buff_wr_ptr_0[0] ( .A(wr_data_Z), .B(buff_wr_ptr_Z[0]), .Y(buff_wr_ptr_0_0[0]) ); defparam \buff_wr_ptr_0[0] .INIT=4'h6; // @48:10037 CFG2 \buff_wr_strb[1] ( .A(wr_data_Z), .B(buff_wr_ptr_Z[0]), .Y(buff_wr_strb_Z[1]) ); defparam \buff_wr_strb[1] .INIT=4'h8; // @48:10037 CFG2 \buff_wr_strb[0] ( .A(wr_data_Z), .B(buff_wr_ptr_Z[0]), .Y(buff_wr_strb_Z[0]) ); defparam \buff_wr_strb[0] .INIT=4'h2; // @48:10056 CFG4 \next_buff_valid[0] ( .A(buff_rd_ptr_0), .B(d_trx_resp_valid_pkd[0]), .C(buff_wr_strb_Z[0]), .D(rd_data_Z), .Y(next_buff_valid_Z[0]) ); defparam \next_buff_valid[0] .INIT=16'hF8FC; // @48:10056 CFG4 \next_buff_valid[1] ( .A(buff_rd_ptr_0), .B(d_trx_resp_valid_pkd[1]), .C(buff_wr_strb_Z[1]), .D(rd_data_Z), .Y(next_buff_valid_Z[1]) ); defparam \next_buff_valid[1] .INIT=16'hF4FC; // @48:10075 CFG2 buff_ready_reg_RNO ( .A(next_buff_valid_Z[0]), .B(next_buff_valid_Z[1]), .Y(un3_next_buff_ready_i) ); defparam buff_ready_reg_RNO.INIT=4'h7; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_buffer_11s_2s_1s_1s */ module miv_rv32_csr_gpr_state_reg_1s_1s_0s ( apb_d_req_wr_data_net_0, toggle_hart_soft_reset, write_subsys_hart_gpr_ded_reset, subsys_resetn, PF_CCC_0_0_OUT0_FABCLK_0, hart_soft_reset_net_i, hart_soft_reset_net ) ; input apb_d_req_wr_data_net_0 ; input toggle_hart_soft_reset ; input write_subsys_hart_gpr_ded_reset ; input subsys_resetn ; input PF_CCC_0_0_OUT0_FABCLK_0 ; output hart_soft_reset_net_i ; output hart_soft_reset_net ; wire apb_d_req_wr_data_net_0 ; wire toggle_hart_soft_reset ; wire write_subsys_hart_gpr_ded_reset ; wire subsys_resetn ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hart_soft_reset_net_i ; wire hart_soft_reset_net ; wire [0:0] state_val_1; wire VCC ; wire GND ; CFG1 \gen_bit_reset.state_val_RNI7LT92[0] ( .A(hart_soft_reset_net), .Y(hart_soft_reset_net_i) ); defparam \gen_bit_reset.state_val_RNI7LT92[0] .INIT=2'h1; // @46:5705 SLE \gen_bit_reset.state_val[0] ( .Q(hart_soft_reset_net), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(state_val_1[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @46:5705 CFG4 \gen_bit_reset.state_val_1[0] ( .A(apb_d_req_wr_data_net_0), .B(write_subsys_hart_gpr_ded_reset), .C(toggle_hart_soft_reset), .D(hart_soft_reset_net), .Y(state_val_1[0]) ); defparam \gen_bit_reset.state_val_1[0] .INIT=16'hB080; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_csr_gpr_state_reg_1s_1s_0s */ module miv_rv32_csr_gpr_state_reg_1s_1s_0s_0 ( apb_d_req_wr_data_net_0, subsys_resetn, wr_en_data_or, PF_CCC_0_0_OUT0_FABCLK_0, hart_soft_irq_net ) ; input apb_d_req_wr_data_net_0 ; input subsys_resetn ; input wr_en_data_or ; input PF_CCC_0_0_OUT0_FABCLK_0 ; output hart_soft_irq_net ; wire apb_d_req_wr_data_net_0 ; wire subsys_resetn ; wire wr_en_data_or ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire hart_soft_irq_net ; wire VCC ; wire GND ; // @46:5705 SLE \gen_bit_reset.state_val[0] ( .Q(hart_soft_irq_net), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_d_req_wr_data_net_0), .EN(wr_en_data_or), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_csr_gpr_state_reg_1s_1s_0s_0 */ module miv_rv32_csr_gpr_state_reg_1s_1s_0s_1 ( apb_d_req_wr_data_net_0, write_subsys_hart_gpr_ded_reset, subsys_resetn, wr_en_data_or_1z, PF_CCC_0_0_OUT0_FABCLK_0, subsys_hart_gpr_ded_reset_reg ) ; input apb_d_req_wr_data_net_0 ; input write_subsys_hart_gpr_ded_reset ; input subsys_resetn ; output wr_en_data_or_1z ; input PF_CCC_0_0_OUT0_FABCLK_0 ; output subsys_hart_gpr_ded_reset_reg ; wire apb_d_req_wr_data_net_0 ; wire write_subsys_hart_gpr_ded_reset ; wire subsys_resetn ; wire wr_en_data_or_1z ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire subsys_hart_gpr_ded_reset_reg ; wire VCC ; wire GND ; // @46:5705 SLE \gen_bit_reset.state_val[0] ( .Q(subsys_hart_gpr_ded_reset_reg), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_d_req_wr_data_net_0), .EN(wr_en_data_or_1z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:5217 CFG2 wr_en_data_or ( .A(write_subsys_hart_gpr_ded_reset), .B(subsys_resetn), .Y(wr_en_data_or_1z) ); defparam wr_en_data_or.INIT=4'hB; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_csr_gpr_state_reg_1s_1s_0s_1 */ module miv_rv32_buffer_7s_2s_1s_1s ( req_buffer_reg_sel_i_2_0, apb_d_req_addr_net_2, apb_d_req_addr_net_0, req_buffer_resp_sel, buff_rd_ptr_0, buff_valid, N_91_9, N_1169, N_137, N_1170, N_68, subsys_cfg_d_req_valid, subsys_cfg_d_resp_ready, subsys_cfg_d_resp_valid, req_is_subsys_hart_soft_reg, tcm0_d_req_read, PF_CCC_0_0_OUT0_FABCLK_0, subsys_resetn, subsys_cfg_d_req_ready ) ; input req_buffer_reg_sel_i_2_0 ; input apb_d_req_addr_net_2 ; input apb_d_req_addr_net_0 ; output [5:0] req_buffer_resp_sel ; output buff_rd_ptr_0 ; output [1:0] buff_valid ; input N_91_9 ; input N_1169 ; input N_137 ; input N_1170 ; input N_68 ; input subsys_cfg_d_req_valid ; input subsys_cfg_d_resp_ready ; output subsys_cfg_d_resp_valid ; input req_is_subsys_hart_soft_reg ; input tcm0_d_req_read ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input subsys_resetn ; output subsys_cfg_d_req_ready ; wire req_buffer_reg_sel_i_2_0 ; wire apb_d_req_addr_net_2 ; wire apb_d_req_addr_net_0 ; wire buff_rd_ptr_0 ; wire N_91_9 ; wire N_1169 ; wire N_137 ; wire N_1170 ; wire N_68 ; wire subsys_cfg_d_req_valid ; wire subsys_cfg_d_resp_ready ; wire subsys_cfg_d_resp_valid ; wire req_is_subsys_hart_soft_reg ; wire tcm0_d_req_read ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire subsys_resetn ; wire subsys_cfg_d_req_ready ; wire [1:0] next_buff_valid_Z; wire [0:0] buff_rd_ptr_0_1; wire [0:0] buff_wr_ptr_Z; wire [0:0] buff_wr_ptr_0_1; wire [11:6] buff_data_0_0_R_DATA; wire [1:1] buff_rd_strb_Z; wire [0:0] buff_wr_strb_Z; wire VCC ; wire un5_next_buff_ready_i ; wire GND ; wire wr_data_Z ; wire N_1159_i ; wire N_26_i ; wire N_28_i ; wire N_1158_i ; wire N_17 ; wire N_16 ; wire N_15 ; wire N_14 ; wire N_13 ; wire N_12 ; wire N_11 ; wire N_10 ; wire N_9 ; wire N_8 ; wire N_7 ; wire N_6 ; wire NC0 ; // @48:10075 SLE buff_ready_reg ( .Q(subsys_cfg_d_req_ready), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un5_next_buff_ready_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10059 SLE \gen_buff_loop[1].buff_valid[1] ( .Q(buff_valid[1]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_buff_valid_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10059 SLE \gen_buff_loop[0].buff_valid[0] ( .Q(buff_valid[0]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_buff_valid_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10009 SLE \buff_rd_ptr[0] ( .Q(buff_rd_ptr_0), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(buff_rd_ptr_0_1[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10018 SLE \buff_wr_ptr[0] ( .Q(buff_wr_ptr_Z[0]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(buff_wr_ptr_0_1[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10047 RAM64x12 \gen_buff_loop[0].buff_data_gen_buff_loop[0].buff_data_0_0 ( .BUSY_FB(GND), .W_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .W_ADDR({GND, GND, GND, GND, GND, buff_wr_ptr_Z[0]}), .W_EN(wr_data_Z), .W_DATA({GND, GND, GND, GND, GND, GND, N_1158_i, req_is_subsys_hart_soft_reg, N_28_i, N_26_i, N_1159_i, tcm0_d_req_read}), .BLK_EN(VCC), .R_CLK(VCC), .R_ADDR({GND, GND, GND, GND, GND, buff_rd_ptr_0}), .R_DATA({buff_data_0_0_R_DATA[11:6], req_buffer_resp_sel[5:0]}), .R_ADDR_BYPASS(VCC), .R_ADDR_EN(VCC), .R_ADDR_SL_N(VCC), .R_ADDR_SD(GND), .R_ADDR_AL_N(VCC), .R_ADDR_AD_N(VCC), .R_DATA_BYPASS(VCC), .R_DATA_EN(VCC), .R_DATA_SL_N(VCC), .R_DATA_SD(GND), .R_DATA_AL_N(VCC), .R_DATA_AD_N(VCC), .ACCESS_BUSY(NC0) ); defparam \gen_buff_loop[0].buff_data_gen_buff_loop[0].buff_data_0_0 .RAMINDEX="gen_buff_loop[0].buff_data[6:0]%2%6%SPEED%0%0%MICRO_RAM"; defparam \gen_buff_loop[0].buff_data_gen_buff_loop[0].buff_data_0_0 .INIT0=64'h0000000000000000; defparam \gen_buff_loop[0].buff_data_gen_buff_loop[0].buff_data_0_0 .INIT1=64'h0000000000000000; defparam \gen_buff_loop[0].buff_data_gen_buff_loop[0].buff_data_0_0 .INIT2=64'h0000000000000000; defparam \gen_buff_loop[0].buff_data_gen_buff_loop[0].buff_data_0_0 .INIT3=64'h0000000000000000; defparam \gen_buff_loop[0].buff_data_gen_buff_loop[0].buff_data_0_0 .INIT4=64'h0000000000000000; defparam \gen_buff_loop[0].buff_data_gen_buff_loop[0].buff_data_0_0 .INIT5=64'h0000000000000000; defparam \gen_buff_loop[0].buff_data_gen_buff_loop[0].buff_data_0_0 .INIT6=64'h0000000000000000; defparam \gen_buff_loop[0].buff_data_gen_buff_loop[0].buff_data_0_0 .INIT7=64'h0000000000000000; defparam \gen_buff_loop[0].buff_data_gen_buff_loop[0].buff_data_0_0 .INIT8=64'h0000000000000000; defparam \gen_buff_loop[0].buff_data_gen_buff_loop[0].buff_data_0_0 .INIT9=64'h0000000000000000; defparam \gen_buff_loop[0].buff_data_gen_buff_loop[0].buff_data_0_0 .INIT10=64'h0000000000000000; defparam \gen_buff_loop[0].buff_data_gen_buff_loop[0].buff_data_0_0 .INIT11=64'h0000000000000000; // @48:10071 CFG3 valid_out ( .A(buff_valid[1]), .B(buff_valid[0]), .C(buff_rd_ptr_0), .Y(subsys_cfg_d_resp_valid) ); defparam valid_out.INIT=8'hAC; // @48:10039 CFG4 \buff_rd_strb[1] ( .A(buff_valid[1]), .B(buff_valid[0]), .C(buff_rd_ptr_0), .D(subsys_cfg_d_resp_ready), .Y(buff_rd_strb_Z[1]) ); defparam \buff_rd_strb[1] .INIT=16'hE000; // @48:10009 CFG4 \buff_rd_ptr_0[0] ( .A(buff_valid[1]), .B(buff_valid[0]), .C(buff_rd_ptr_0), .D(subsys_cfg_d_resp_ready), .Y(buff_rd_ptr_0_1[0]) ); defparam \buff_rd_ptr_0[0] .INIT=16'h1EF0; // @48:10004 CFG2 wr_data ( .A(subsys_cfg_d_req_valid), .B(subsys_cfg_d_req_ready), .Y(wr_data_Z) ); defparam wr_data.INIT=4'h8; // @48:10037 CFG3 \buff_wr_strb[0] ( .A(subsys_cfg_d_req_valid), .B(subsys_cfg_d_req_ready), .C(buff_wr_ptr_Z[0]), .Y(buff_wr_strb_Z[0]) ); defparam \buff_wr_strb[0] .INIT=8'h08; // @48:10018 CFG3 \buff_wr_ptr_0[0] ( .A(subsys_cfg_d_req_valid), .B(subsys_cfg_d_req_ready), .C(buff_wr_ptr_Z[0]), .Y(buff_wr_ptr_0_1[0]) ); defparam \buff_wr_ptr_0[0] .INIT=8'h78; // @48:10047 CFG4 \gen_buff_loop[0].buff_data_gen_buff_loop[0].buff_data_0_0_RNO ( .A(apb_d_req_addr_net_2), .B(apb_d_req_addr_net_0), .C(N_68), .D(N_1170), .Y(N_1159_i) ); defparam \gen_buff_loop[0].buff_data_gen_buff_loop[0].buff_data_0_0_RNO .INIT=16'h0001; // @48:10056 CFG4 \next_buff_valid[0] ( .A(buff_rd_ptr_0), .B(buff_valid[0]), .C(buff_wr_strb_Z[0]), .D(subsys_cfg_d_resp_ready), .Y(next_buff_valid_Z[0]) ); defparam \next_buff_valid[0] .INIT=16'hF8FC; // @48:10056 CFG4 \next_buff_valid[1] ( .A(buff_rd_strb_Z[1]), .B(wr_data_Z), .C(buff_valid[1]), .D(buff_wr_ptr_Z[0]), .Y(next_buff_valid_Z[1]) ); defparam \next_buff_valid[1] .INIT=16'hDC50; // @48:10047 CFG4 \gen_buff_loop[0].buff_data_gen_buff_loop[0].buff_data_0_0_RNO_2 ( .A(N_137), .B(N_1169), .C(N_91_9), .D(req_buffer_reg_sel_i_2_0), .Y(N_1158_i) ); defparam \gen_buff_loop[0].buff_data_gen_buff_loop[0].buff_data_0_0_RNO_2 .INIT=16'h0020; // @48:10047 CFG4 \gen_buff_loop[0].buff_data_gen_buff_loop[0].buff_data_0_0_RNO_1 ( .A(apb_d_req_addr_net_2), .B(apb_d_req_addr_net_0), .C(N_68), .D(N_1170), .Y(N_28_i) ); defparam \gen_buff_loop[0].buff_data_gen_buff_loop[0].buff_data_0_0_RNO_1 .INIT=16'h0008; // @48:10047 CFG4 \gen_buff_loop[0].buff_data_gen_buff_loop[0].buff_data_0_0_RNO_0 ( .A(apb_d_req_addr_net_2), .B(apb_d_req_addr_net_0), .C(N_68), .D(N_1170), .Y(N_26_i) ); defparam \gen_buff_loop[0].buff_data_gen_buff_loop[0].buff_data_0_0_RNO_0 .INIT=16'h0002; // @48:10075 CFG2 buff_ready_reg_RNO ( .A(next_buff_valid_Z[1]), .B(next_buff_valid_Z[0]), .Y(un5_next_buff_ready_i) ); defparam buff_ready_reg_RNO.INIT=4'h7; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_buffer_7s_2s_1s_1s */ module miv_rv32_subsys_regs_12s_0s_1s_0s_1_0s_50397384_7s_2s_1s ( buff_valid, buff_rd_ptr_0, req_buffer_resp_sel, apb_d_req_wr_data_net, apb_d_req_wr_byte_en_net_0, req_buffer_reg_sel_2_0_0, apb_d_req_addr_net, d_trx_resp_valid_pkd_0, d_trx_resp_pkd, tcm0_d_req_read, N_91_9, subsys_hart_gpr_ded_reset_reg, hart_soft_irq_net, hart_soft_reset_net, tcm0_d_req_write, subsys_cfg_d_req_ready, subsys_cfg_d_req_valid, d_trx_os_buff_ready, cpu_d_req_valid_mux_1, N_137, N_90_1, N_91_3, read_subsys_hart_soft_reg_1z, subsys_cfg_d_resp_ready, subsys_cfg_d_resp_valid, N_114, subsys_cfg_d_req_valid_0_o2_1_0, subsys_resetn, PF_CCC_0_0_OUT0_FABCLK_0 ) ; output [1:0] buff_valid ; output buff_rd_ptr_0 ; output [5:0] req_buffer_resp_sel ; input [2:0] apb_d_req_wr_data_net ; input apb_d_req_wr_byte_en_net_0 ; output req_buffer_reg_sel_2_0_0 ; input [11:0] apb_d_req_addr_net ; input d_trx_resp_valid_pkd_0 ; input [14:13] d_trx_resp_pkd ; input tcm0_d_req_read ; input N_91_9 ; output subsys_hart_gpr_ded_reset_reg ; output hart_soft_irq_net ; output hart_soft_reset_net ; input tcm0_d_req_write ; output subsys_cfg_d_req_ready ; input subsys_cfg_d_req_valid ; input d_trx_os_buff_ready ; input cpu_d_req_valid_mux_1 ; input N_137 ; input N_90_1 ; input N_91_3 ; output read_subsys_hart_soft_reg_1z ; input subsys_cfg_d_resp_ready ; output subsys_cfg_d_resp_valid ; output N_114 ; input subsys_cfg_d_req_valid_0_o2_1_0 ; input subsys_resetn ; input PF_CCC_0_0_OUT0_FABCLK_0 ; wire buff_rd_ptr_0 ; wire apb_d_req_wr_byte_en_net_0 ; wire req_buffer_reg_sel_2_0_0 ; wire d_trx_resp_valid_pkd_0 ; wire tcm0_d_req_read ; wire N_91_9 ; wire subsys_hart_gpr_ded_reset_reg ; wire hart_soft_irq_net ; wire hart_soft_reset_net ; wire tcm0_d_req_write ; wire subsys_cfg_d_req_ready ; wire subsys_cfg_d_req_valid ; wire d_trx_os_buff_ready ; wire cpu_d_req_valid_mux_1 ; wire N_137 ; wire N_90_1 ; wire N_91_3 ; wire read_subsys_hart_soft_reg_1z ; wire subsys_cfg_d_resp_ready ; wire subsys_cfg_d_resp_valid ; wire N_114 ; wire subsys_cfg_d_req_valid_0_o2_1_0 ; wire subsys_resetn ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire [1:1] req_buffer_reg_sel_2_0_0_a2_0_Z; wire [5:5] req_buffer_reg_sel_i_2_Z; wire toggle_hart_soft_reset_Z ; wire VCC ; wire hart_soft_reset_net_i ; wire GND ; wire N_1168 ; wire req_is_subsys_hart_soft_reg_2_Z ; wire N_1170 ; wire N_68 ; wire req_is_subsys_hart_soft_reg_Z ; wire N_1169 ; wire write_subsys_hart_gpr_ded_reset_Z ; wire wr_en_data_or ; // @48:5131 SLE toggle_hart_soft_reset ( .Q(toggle_hart_soft_reset_Z), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(hart_soft_reset_net_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:4639 CFG4 \req_buffer_reg_sel_i_a2_0[1] ( .A(d_trx_resp_pkd[14]), .B(d_trx_resp_pkd[13]), .C(subsys_cfg_d_req_valid_0_o2_1_0), .D(d_trx_resp_valid_pkd_0), .Y(N_114) ); defparam \req_buffer_reg_sel_i_a2_0[1] .INIT=16'hFE00; // @48:5118 CFG4 read_subsys_hart_soft_reg ( .A(req_buffer_resp_sel[4]), .B(subsys_cfg_d_resp_valid), .C(subsys_cfg_d_resp_ready), .D(req_buffer_resp_sel[0]), .Y(read_subsys_hart_soft_reg_1z) ); defparam read_subsys_hart_soft_reg.INIT=16'h8000; // @48:4639 CFG2 \req_buffer_reg_sel_2_0_0_a2_0[1] ( .A(apb_d_req_addr_net[8]), .B(apb_d_req_addr_net[7]), .Y(req_buffer_reg_sel_2_0_0_a2_0_Z[1]) ); defparam \req_buffer_reg_sel_2_0_0_a2_0[1] .INIT=4'h1; // @48:4704 CFG2 \req_buffer_reg_sel_2_i_o2[2] ( .A(apb_d_req_addr_net[1]), .B(apb_d_req_addr_net[0]), .Y(N_1168) ); defparam \req_buffer_reg_sel_2_i_o2[2] .INIT=4'hE; // @48:5304 CFG4 \req_buffer_reg_sel_i_2[5] ( .A(apb_d_req_addr_net[10]), .B(N_91_3), .C(apb_d_req_addr_net[2]), .D(apb_d_req_addr_net[5]), .Y(req_buffer_reg_sel_i_2_Z[5]) ); defparam \req_buffer_reg_sel_i_2[5] .INIT=16'hBFFF; // @48:5117 CFG4 req_is_subsys_hart_soft_reg_2 ( .A(apb_d_req_addr_net[2]), .B(N_1168), .C(apb_d_req_addr_net[4]), .D(apb_d_req_addr_net[5]), .Y(req_is_subsys_hart_soft_reg_2_Z) ); defparam req_is_subsys_hart_soft_reg_2.INIT=16'h0100; // @48:4639 CFG4 \req_buffer_reg_sel_2_0_0_a2[1] ( .A(apb_d_req_addr_net[9]), .B(apb_d_req_addr_net[11]), .C(apb_d_req_addr_net[10]), .D(req_buffer_reg_sel_2_0_0_a2_0_Z[1]), .Y(req_buffer_reg_sel_2_0_0) ); defparam \req_buffer_reg_sel_2_0_0_a2[1] .INIT=16'h0100; // @48:4639 CFG4 \req_buffer_reg_sel_i_o2_0[1] ( .A(apb_d_req_addr_net[5]), .B(N_90_1), .C(req_buffer_reg_sel_2_0_0), .D(N_137), .Y(N_1170) ); defparam \req_buffer_reg_sel_i_o2_0[1] .INIT=16'hBFFF; // @48:4639 CFG4 \req_buffer_reg_sel_i_o2[1] ( .A(N_1168), .B(cpu_d_req_valid_mux_1), .C(d_trx_os_buff_ready), .D(N_114), .Y(N_68) ); defparam \req_buffer_reg_sel_i_o2[1] .INIT=16'hFFBF; // @48:5117 CFG4 req_is_subsys_hart_soft_reg ( .A(req_buffer_reg_sel_2_0_0), .B(subsys_cfg_d_req_valid), .C(req_is_subsys_hart_soft_reg_2_Z), .D(N_90_1), .Y(req_is_subsys_hart_soft_reg_Z) ); defparam req_is_subsys_hart_soft_reg.INIT=16'h8000; // @48:5304 CFG2 \req_buffer_reg_sel_i_o2[5] ( .A(N_68), .B(apb_d_req_addr_net[4]), .Y(N_1169) ); defparam \req_buffer_reg_sel_i_o2[5] .INIT=4'hB; // @48:5123 CFG4 write_subsys_hart_gpr_ded_reset ( .A(apb_d_req_wr_byte_en_net_0), .B(req_is_subsys_hart_soft_reg_Z), .C(subsys_cfg_d_req_ready), .D(tcm0_d_req_write), .Y(write_subsys_hart_gpr_ded_reset_Z) ); defparam write_subsys_hart_gpr_ded_reset.INIT=16'h8000; // @48:5167 miv_rv32_csr_gpr_state_reg_1s_1s_0s u_subsys_hart_soft_reset_reg ( .apb_d_req_wr_data_net_0(apb_d_req_wr_data_net[0]), .toggle_hart_soft_reset(toggle_hart_soft_reset_Z), .write_subsys_hart_gpr_ded_reset(write_subsys_hart_gpr_ded_reset_Z), .subsys_resetn(subsys_resetn), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hart_soft_reset_net_i(hart_soft_reset_net_i), .hart_soft_reset_net(hart_soft_reset_net) ); // @48:5192 miv_rv32_csr_gpr_state_reg_1s_1s_0s_0 u_subsys_hart_soft_irq_reg ( .apb_d_req_wr_data_net_0(apb_d_req_wr_data_net[1]), .subsys_resetn(subsys_resetn), .wr_en_data_or(wr_en_data_or), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .hart_soft_irq_net(hart_soft_irq_net) ); // @48:5217 miv_rv32_csr_gpr_state_reg_1s_1s_0s_1 u_subsys_hart_gpr_ded_reset_reg ( .apb_d_req_wr_data_net_0(apb_d_req_wr_data_net[2]), .write_subsys_hart_gpr_ded_reset(write_subsys_hart_gpr_ded_reset_Z), .subsys_resetn(subsys_resetn), .wr_en_data_or_1z(wr_en_data_or), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .subsys_hart_gpr_ded_reset_reg(subsys_hart_gpr_ded_reset_reg) ); // @48:5359 miv_rv32_buffer_7s_2s_1s_1s u_req_buffer ( .req_buffer_reg_sel_i_2_0(req_buffer_reg_sel_i_2_Z[5]), .apb_d_req_addr_net_2(apb_d_req_addr_net[4]), .apb_d_req_addr_net_0(apb_d_req_addr_net[2]), .req_buffer_resp_sel(req_buffer_resp_sel[5:0]), .buff_rd_ptr_0(buff_rd_ptr_0), .buff_valid(buff_valid[1:0]), .N_91_9(N_91_9), .N_1169(N_1169), .N_137(N_137), .N_1170(N_1170), .N_68(N_68), .subsys_cfg_d_req_valid(subsys_cfg_d_req_valid), .subsys_cfg_d_resp_ready(subsys_cfg_d_resp_ready), .subsys_cfg_d_resp_valid(subsys_cfg_d_resp_valid), .req_is_subsys_hart_soft_reg(req_is_subsys_hart_soft_reg_Z), .tcm0_d_req_read(tcm0_d_req_read), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .subsys_resetn(subsys_resetn), .subsys_cfg_d_req_ready(subsys_cfg_d_req_ready) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_subsys_regs_12s_0s_1s_0s_1_0s_50397384_7s_2s_1s */ module miv_rv32_buffer_6s_2s_1s_1s ( i_trx_resp_2, i_trx_resp_5, i_trx_resp_0, i_trx_resp_pkd_0, i_trx_resp_pkd_2, i_trx_resp_pkd_5, i_trx_resp_pkd_6, i_trx_resp_pkd_8, i_trx_resp_pkd_11, buff_rd_ptr_0, i_trx_resp_valid_pkd, ifu_emi_req_valid_i_0, un1_cpu_i_req_ready, ifu_N_11, cpu_i_resp_valid_sel, subsys_resetn, i_trx_os_buff_ready, cpu_i_req_is_tcm0, cpu_i_req_is_dummy_target, cpu_i_req_is_apb, PF_CCC_0_0_OUT0_FABCLK_0 ) ; output i_trx_resp_2 ; output i_trx_resp_5 ; output i_trx_resp_0 ; output i_trx_resp_pkd_0 ; output i_trx_resp_pkd_2 ; output i_trx_resp_pkd_5 ; output i_trx_resp_pkd_6 ; output i_trx_resp_pkd_8 ; output i_trx_resp_pkd_11 ; output buff_rd_ptr_0 ; output [1:0] i_trx_resp_valid_pkd ; input ifu_emi_req_valid_i_0 ; input un1_cpu_i_req_ready ; input ifu_N_11 ; input cpu_i_resp_valid_sel ; input subsys_resetn ; output i_trx_os_buff_ready ; input cpu_i_req_is_tcm0 ; input cpu_i_req_is_dummy_target ; input cpu_i_req_is_apb ; input PF_CCC_0_0_OUT0_FABCLK_0 ; wire i_trx_resp_2 ; wire i_trx_resp_5 ; wire i_trx_resp_0 ; wire i_trx_resp_pkd_0 ; wire i_trx_resp_pkd_2 ; wire i_trx_resp_pkd_5 ; wire i_trx_resp_pkd_6 ; wire i_trx_resp_pkd_8 ; wire i_trx_resp_pkd_11 ; wire buff_rd_ptr_0 ; wire ifu_emi_req_valid_i_0 ; wire un1_cpu_i_req_ready ; wire ifu_N_11 ; wire cpu_i_resp_valid_sel ; wire subsys_resetn ; wire i_trx_os_buff_ready ; wire cpu_i_req_is_tcm0 ; wire cpu_i_req_is_dummy_target ; wire cpu_i_req_is_apb ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire [1:0] buff_wr_strb_Z; wire [1:0] next_buff_valid_Z; wire [0:0] buff_rd_ptr_0_0_0; wire [0:0] buff_wr_ptr_Z; wire [0:0] buff_wr_ptr_0_2; wire ram1_2 ; wire VCC ; wire GND ; wire ram0_0 ; wire ram0_1 ; wire ram0_2 ; wire ram1_0 ; wire ram1_1 ; wire un1_next_buff_ready_i ; wire wr_data_1_Z ; SLE \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_i_trx_os_buffer.gen_buff_loop[0].buff_data_ram1_[2] ( .Q(ram1_2), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_req_is_apb), .EN(buff_wr_strb_Z[1]), .LAT(GND), .SD(GND), .SLn(VCC) ); SLE \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_i_trx_os_buffer.gen_buff_loop[0].buff_data_ram0_[0] ( .Q(ram0_0), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_req_is_dummy_target), .EN(buff_wr_strb_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); SLE \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_i_trx_os_buffer.gen_buff_loop[0].buff_data_ram0_[1] ( .Q(ram0_1), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_req_is_tcm0), .EN(buff_wr_strb_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); SLE \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_i_trx_os_buffer.gen_buff_loop[0].buff_data_ram0_[2] ( .Q(ram0_2), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_req_is_apb), .EN(buff_wr_strb_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); SLE \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_i_trx_os_buffer.gen_buff_loop[0].buff_data_ram1_[0] ( .Q(ram1_0), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_req_is_dummy_target), .EN(buff_wr_strb_Z[1]), .LAT(GND), .SD(GND), .SLn(VCC) ); SLE \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_i_trx_os_buffer.gen_buff_loop[0].buff_data_ram1_[1] ( .Q(ram1_1), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_req_is_tcm0), .EN(buff_wr_strb_Z[1]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10075 SLE buff_ready_reg ( .Q(i_trx_os_buff_ready), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(un1_next_buff_ready_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10059 SLE \gen_buff_loop[1].buff_valid[1] ( .Q(i_trx_resp_valid_pkd[1]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_buff_valid_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10059 SLE \gen_buff_loop[0].buff_valid[0] ( .Q(i_trx_resp_valid_pkd[0]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(next_buff_valid_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10009 SLE \buff_rd_ptr[0] ( .Q(buff_rd_ptr_0), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(buff_rd_ptr_0_0_0[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10018 SLE \buff_wr_ptr[0] ( .Q(buff_wr_ptr_Z[0]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(buff_wr_ptr_0_2[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10047 SLE \gen_buff_loop[0].buff_data[0][0] ( .Q(i_trx_resp_pkd_0), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_req_is_dummy_target), .EN(buff_wr_strb_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10047 SLE \gen_buff_loop[0].buff_data[0][2] ( .Q(i_trx_resp_pkd_2), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_req_is_tcm0), .EN(buff_wr_strb_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10047 SLE \gen_buff_loop[0].buff_data[0][5] ( .Q(i_trx_resp_pkd_5), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_req_is_apb), .EN(buff_wr_strb_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10047 SLE \gen_buff_loop[1].buff_data[1][0] ( .Q(i_trx_resp_pkd_6), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_req_is_dummy_target), .EN(buff_wr_strb_Z[1]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10047 SLE \gen_buff_loop[1].buff_data[1][2] ( .Q(i_trx_resp_pkd_8), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_req_is_tcm0), .EN(buff_wr_strb_Z[1]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10047 SLE \gen_buff_loop[1].buff_data[1][5] ( .Q(i_trx_resp_pkd_11), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_i_req_is_apb), .EN(buff_wr_strb_Z[1]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:15839 CFG3 \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_i_trx_os_buffer.gen_buff_loop[0].buff_data_ram0__RNI2G7JA[1] ( .A(ram1_1), .B(ram0_1), .C(buff_rd_ptr_0), .Y(i_trx_resp_2) ); defparam \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_i_trx_os_buffer.gen_buff_loop[0].buff_data_ram0__RNI2G7JA[1] .INIT=8'hAC; // @48:15839 CFG3 \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_i_trx_os_buffer.gen_buff_loop[0].buff_data_ram0__RNI4I7JA[2] ( .A(ram1_2), .B(ram0_2), .C(buff_rd_ptr_0), .Y(i_trx_resp_5) ); defparam \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_i_trx_os_buffer.gen_buff_loop[0].buff_data_ram0__RNI4I7JA[2] .INIT=8'hAC; // @48:15839 CFG3 \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_i_trx_os_buffer.gen_buff_loop[0].buff_data_ram0__RNI0E7JA[0] ( .A(ram1_0), .B(ram0_0), .C(buff_rd_ptr_0), .Y(i_trx_resp_0) ); defparam \gen_buff_loop[0].buff_data.u_subsys_interconnect_0.u_i_trx_os_buffer.gen_buff_loop[0].buff_data_ram0__RNI0E7JA[0] .INIT=8'hAC; // @48:10009 CFG4 \buff_rd_ptr_0_0[0] ( .A(buff_rd_ptr_0), .B(cpu_i_resp_valid_sel), .C(i_trx_resp_valid_pkd[1]), .D(i_trx_resp_valid_pkd[0]), .Y(buff_rd_ptr_0_0_0[0]) ); defparam \buff_rd_ptr_0_0[0] .INIT=16'h666A; // @48:10004 CFG4 wr_data_1 ( .A(ifu_N_11), .B(un1_cpu_i_req_ready), .C(i_trx_os_buff_ready), .D(ifu_emi_req_valid_i_0), .Y(wr_data_1_Z) ); defparam wr_data_1.INIT=16'h0080; // @48:10018 CFG2 \buff_wr_ptr_0[0] ( .A(wr_data_1_Z), .B(buff_wr_ptr_Z[0]), .Y(buff_wr_ptr_0_2[0]) ); defparam \buff_wr_ptr_0[0] .INIT=4'h6; // @48:10037 CFG2 \buff_wr_strb[1] ( .A(wr_data_1_Z), .B(buff_wr_ptr_Z[0]), .Y(buff_wr_strb_Z[1]) ); defparam \buff_wr_strb[1] .INIT=4'h8; // @48:10037 CFG2 \buff_wr_strb[0] ( .A(wr_data_1_Z), .B(buff_wr_ptr_Z[0]), .Y(buff_wr_strb_Z[0]) ); defparam \buff_wr_strb[0] .INIT=4'h2; // @48:10056 CFG4 \next_buff_valid[1] ( .A(cpu_i_resp_valid_sel), .B(buff_wr_strb_Z[1]), .C(i_trx_resp_valid_pkd[1]), .D(buff_rd_ptr_0), .Y(next_buff_valid_Z[1]) ); defparam \next_buff_valid[1] .INIT=16'hDCFC; // @48:10056 CFG4 \next_buff_valid[0] ( .A(cpu_i_resp_valid_sel), .B(buff_wr_strb_Z[0]), .C(i_trx_resp_valid_pkd[0]), .D(buff_rd_ptr_0), .Y(next_buff_valid_Z[0]) ); defparam \next_buff_valid[0] .INIT=16'hFCDC; // @48:10075 CFG2 buff_ready_reg_RNO ( .A(next_buff_valid_Z[0]), .B(next_buff_valid_Z[1]), .Y(un1_next_buff_ready_i) ); defparam buff_ready_reg_RNO.INIT=4'h7; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_buffer_6s_2s_1s_1s */ module miv_rv32_subsys_interconnect_Z18 ( i_trx_resp_pkd_0, i_trx_resp_pkd_6, apb_d_req_wr_data_net, cpu_d_req_wr_data_net, sba_req_wr_data_int, apb_d_req_wr_byte_en_net, cpu_d_req_wr_byte_en_net_2_0, cpu_d_req_wr_byte_en_net_2_2, cpu_d_req_wr_byte_en_net_1_0, req_masked, lsu_emi_req_rd_byte_en_3_m_0, lsu_emi_req_rd_byte_en_iv_0_0, cpu_d_req_rd_byte_en_net_1_0, un3_branch_cond_ex, lsu_emi_req_rd_byte_en_2_0, cpu_d_resp_rd_data_net, debug_sysbus_req_wr_byte_en_net, debug_sysbus_req_rd_byte_en_net, apb_d_req_addr_net, sba_req_addr_int, hipri_req_ptr_0, hipri_req_ptr_3, cpu_d_req_addr_net, un19_cpu_d_resp_rd_data_sig_0, debug_sysbus_resp_rd_data_0_0, apb_i_req_addr_net, cpu_i_resp_rd_data_sel, tcm0_d_resp_rd_data_net, apb_d_resp_rd_data_net, next_req_fetch_ptr_yy, lsu_expipe_req_op_net_0, lsu_expipe_req_op_net_3, i_trx_resp_valid_pkd, apb_resp_sel, req_buff_resp_fault_0__0, req_buff_resp_fault_1__0, un2_req_resp_str_req_buff_addr_misalign_0, buff_rd_ptr_0_0, req_os_d_src_0, cpu_d_wr_rd_state, resp_dest_0, PF_CCC_0_0_OUT0_FABCLK_0, subsys_resetn, tcm0_i_req_valid_net, cpu_d_req_ready_sig, un1_cpu_d_req_ready_sig_0_0, cpu_N_14_mux, ifu_N_11, cpu_m8_0_a3_0_2, cmp_cond, exu_result_valid_ex, cpu_d_req_valid_mux_1_1z, cpu_d_req_valid_net, debug_sysbus_req_valid_net, N_764, ifu_expipe_req_branch_excpt_req_fenci_net, un1_cpu_d_req_accepted_1_0, N_807, un1_cpu_d_req_ready_sig_c_1z, N_64, un1_cpu_d_req_ready_sig_d_0_1z, ifu_expipe_req_branch_excpt_req_valid_1_0, ifu_emi_req_valid_i_0, cpu_d_req_is_apb, stage_state_ex, un1_instr_inhibit_ex, un1_lsu_emi_req_valid46_1, N_145, debug_sysbus_resp_error_net, un1_lsu_resp_valid, lsu_emi_req_valid47, N_90, cpu_d_resp_valid_sig_1z, un1_lsu_emi_req_valid46, un1_lsu_expipe_req_op_4, un24_lsu_emi_req_rd_byte_en, N_84, un5_lsu_emi_req_rd_byte_en, un1_lsu_resp_valid_1, cpu_i_req_is_tcm0_5_1z, hart_soft_reset_net, hart_soft_irq_net, cpu_d_resp_valid_d_1z, un8_cpu_i_req_is_tcm0lt19_12, un24_cpu_i_req_is_apb_1, bcu_result_cry_0_Y, tcm0_d_req_valid_2_1z, N_1154, sba_req_addr_1, cpu_i_resp_valid_sel, tcm0_i_resp_valid_net, un24_cpu_i_req_is_apb_17_1z, debug_sysbus_resp_ready_net, cpu_i_resp_error_sel, lsu_emi_req_valid49, trace_priv_i, N_1157, apb_i_req_valid_net_3, i_trx_os_buff_ready, req_complete_reg, un3_next_req_fetch_ptr_cry_27_S, un3_next_req_fetch_ptr_cry_26_S, ifu_emi_req_valid_i_o2_1_0, debug_trx_os_net, un3_next_req_fetch_ptr_cry_22_S, un3_next_req_fetch_ptr_cry_21_S, un3_next_req_fetch_ptr_cry_16_S, un3_next_req_fetch_ptr_cry_15_S, apb_d_req_valid_3_0_1z, cpu_d_req_ready_1, cpu_d_req_is_tcm0_1z, cpu_N_6, tcm0_d_req_valid_net, cpu_d_resp_error_sig_1z, apb_d_resp_error_net, un3_next_req_fetch_ptr_cry_25_S, cpu_m1_e_1, un1_cpu_i_req_ready_x_1z, un2_cpu_i_req_ready_1z, un3_cpu_i_req_ready_1z, apb_i_req_ready_net_tz, cpu_i_req_is_apb_1z, un4_cpu_i_req_is_apb_1z, un16_cpu_i_req_is_apb_1z, un8_cpu_i_req_is_tcm0lt18, un8_cpu_i_req_is_tcm0lto18_12_1, cpu_i_req_is_tcm0_5_0_1z, un3_next_req_fetch_ptr_s_29_S, cpu_i_req_is_tcm0_4_2_1z, un3_next_req_fetch_ptr_cry_18_S, gen_m3_1z, un5_N_4_0_i, un3_next_req_fetch_ptr_cry_23_S, sticky_reset_reg, un24_cpu_i_req_is_apb_19_11_1z, tcm0_i_req_valid_1, tcm0_i_req_ready_net_tz, cpu_m8_0_a3_0_3, un1_cpu_i_req_ready_1z, cpu_i_req_is_dummy_target_1z, un2_cpu_i_req_ready_x_1z ) ; output i_trx_resp_pkd_0 ; output i_trx_resp_pkd_6 ; output [31:0] apb_d_req_wr_data_net ; input [31:0] cpu_d_req_wr_data_net ; input [31:0] sba_req_wr_data_int ; output [3:0] apb_d_req_wr_byte_en_net ; input cpu_d_req_wr_byte_en_net_2_0 ; input cpu_d_req_wr_byte_en_net_2_2 ; input cpu_d_req_wr_byte_en_net_1_0 ; input [1:0] req_masked ; input lsu_emi_req_rd_byte_en_3_m_0 ; input lsu_emi_req_rd_byte_en_iv_0_0 ; input cpu_d_req_rd_byte_en_net_1_0 ; input [1:0] un3_branch_cond_ex ; input lsu_emi_req_rd_byte_en_2_0 ; output [31:0] cpu_d_resp_rd_data_net ; input [3:0] debug_sysbus_req_wr_byte_en_net ; input [3:0] debug_sysbus_req_rd_byte_en_net ; output [31:0] apb_d_req_addr_net ; input [31:0] sba_req_addr_int ; input hipri_req_ptr_0 ; input hipri_req_ptr_3 ; input [31:1] cpu_d_req_addr_net ; output un19_cpu_d_resp_rd_data_sig_0 ; output debug_sysbus_resp_rd_data_0_0 ; input [31:3] apb_i_req_addr_net ; output [31:0] cpu_i_resp_rd_data_sel ; input [31:0] tcm0_d_resp_rd_data_net ; input [31:0] apb_d_resp_rd_data_net ; input [22:21] next_req_fetch_ptr_yy ; input lsu_expipe_req_op_net_0 ; input lsu_expipe_req_op_net_3 ; output [1:0] i_trx_resp_valid_pkd ; input [1:0] apb_resp_sel ; input req_buff_resp_fault_0__0 ; input req_buff_resp_fault_1__0 ; input un2_req_resp_str_req_buff_addr_misalign_0 ; input buff_rd_ptr_0_0 ; output req_os_d_src_0 ; input [1:0] cpu_d_wr_rd_state ; input resp_dest_0 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input subsys_resetn ; output tcm0_i_req_valid_net ; output cpu_d_req_ready_sig ; output un1_cpu_d_req_ready_sig_0_0 ; output cpu_N_14_mux ; input ifu_N_11 ; output cpu_m8_0_a3_0_2 ; input cmp_cond ; input exu_result_valid_ex ; output cpu_d_req_valid_mux_1_1z ; input cpu_d_req_valid_net ; input debug_sysbus_req_valid_net ; input N_764 ; input ifu_expipe_req_branch_excpt_req_fenci_net ; input un1_cpu_d_req_accepted_1_0 ; input N_807 ; output un1_cpu_d_req_ready_sig_c_1z ; input N_64 ; output un1_cpu_d_req_ready_sig_d_0_1z ; input ifu_expipe_req_branch_excpt_req_valid_1_0 ; input ifu_emi_req_valid_i_0 ; output cpu_d_req_is_apb ; input stage_state_ex ; input un1_instr_inhibit_ex ; input un1_lsu_emi_req_valid46_1 ; input N_145 ; output debug_sysbus_resp_error_net ; output un1_lsu_resp_valid ; input lsu_emi_req_valid47 ; input N_90 ; output cpu_d_resp_valid_sig_1z ; input un1_lsu_emi_req_valid46 ; input un1_lsu_expipe_req_op_4 ; input un24_lsu_emi_req_rd_byte_en ; input N_84 ; input un5_lsu_emi_req_rd_byte_en ; output un1_lsu_resp_valid_1 ; output cpu_i_req_is_tcm0_5_1z ; output hart_soft_reset_net ; output hart_soft_irq_net ; output cpu_d_resp_valid_d_1z ; output un8_cpu_i_req_is_tcm0lt19_12 ; output un24_cpu_i_req_is_apb_1 ; input bcu_result_cry_0_Y ; output tcm0_d_req_valid_2_1z ; output N_1154 ; input sba_req_addr_1 ; output cpu_i_resp_valid_sel ; input tcm0_i_resp_valid_net ; output un24_cpu_i_req_is_apb_17_1z ; input debug_sysbus_resp_ready_net ; output cpu_i_resp_error_sel ; input lsu_emi_req_valid49 ; input trace_priv_i ; output N_1157 ; output apb_i_req_valid_net_3 ; output i_trx_os_buff_ready ; input req_complete_reg ; input un3_next_req_fetch_ptr_cry_27_S ; input un3_next_req_fetch_ptr_cry_26_S ; input ifu_emi_req_valid_i_o2_1_0 ; output debug_trx_os_net ; input un3_next_req_fetch_ptr_cry_22_S ; input un3_next_req_fetch_ptr_cry_21_S ; input un3_next_req_fetch_ptr_cry_16_S ; input un3_next_req_fetch_ptr_cry_15_S ; output apb_d_req_valid_3_0_1z ; input cpu_d_req_ready_1 ; output cpu_d_req_is_tcm0_1z ; output cpu_N_6 ; output tcm0_d_req_valid_net ; output cpu_d_resp_error_sig_1z ; input apb_d_resp_error_net ; input un3_next_req_fetch_ptr_cry_25_S ; output cpu_m1_e_1 ; output un1_cpu_i_req_ready_x_1z ; output un2_cpu_i_req_ready_1z ; output un3_cpu_i_req_ready_1z ; input apb_i_req_ready_net_tz ; output cpu_i_req_is_apb_1z ; output un4_cpu_i_req_is_apb_1z ; output un16_cpu_i_req_is_apb_1z ; input un8_cpu_i_req_is_tcm0lt18 ; output un8_cpu_i_req_is_tcm0lto18_12_1 ; output cpu_i_req_is_tcm0_5_0_1z ; input un3_next_req_fetch_ptr_s_29_S ; output cpu_i_req_is_tcm0_4_2_1z ; input un3_next_req_fetch_ptr_cry_18_S ; output gen_m3_1z ; input un5_N_4_0_i ; input un3_next_req_fetch_ptr_cry_23_S ; input sticky_reset_reg ; output un24_cpu_i_req_is_apb_19_11_1z ; output tcm0_i_req_valid_1 ; input tcm0_i_req_ready_net_tz ; output cpu_m8_0_a3_0_3 ; output un1_cpu_i_req_ready_1z ; output cpu_i_req_is_dummy_target_1z ; output un2_cpu_i_req_ready_x_1z ; wire i_trx_resp_pkd_0 ; wire i_trx_resp_pkd_6 ; wire cpu_d_req_wr_byte_en_net_2_0 ; wire cpu_d_req_wr_byte_en_net_2_2 ; wire cpu_d_req_wr_byte_en_net_1_0 ; wire lsu_emi_req_rd_byte_en_3_m_0 ; wire lsu_emi_req_rd_byte_en_iv_0_0 ; wire cpu_d_req_rd_byte_en_net_1_0 ; wire lsu_emi_req_rd_byte_en_2_0 ; wire hipri_req_ptr_0 ; wire hipri_req_ptr_3 ; wire un19_cpu_d_resp_rd_data_sig_0 ; wire debug_sysbus_resp_rd_data_0_0 ; wire lsu_expipe_req_op_net_0 ; wire lsu_expipe_req_op_net_3 ; wire req_buff_resp_fault_0__0 ; wire req_buff_resp_fault_1__0 ; wire un2_req_resp_str_req_buff_addr_misalign_0 ; wire buff_rd_ptr_0_0 ; wire req_os_d_src_0 ; wire resp_dest_0 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire subsys_resetn ; wire tcm0_i_req_valid_net ; wire cpu_d_req_ready_sig ; wire un1_cpu_d_req_ready_sig_0_0 ; wire cpu_N_14_mux ; wire ifu_N_11 ; wire cpu_m8_0_a3_0_2 ; wire cmp_cond ; wire exu_result_valid_ex ; wire cpu_d_req_valid_mux_1_1z ; wire cpu_d_req_valid_net ; wire debug_sysbus_req_valid_net ; wire N_764 ; wire ifu_expipe_req_branch_excpt_req_fenci_net ; wire un1_cpu_d_req_accepted_1_0 ; wire N_807 ; wire un1_cpu_d_req_ready_sig_c_1z ; wire N_64 ; wire un1_cpu_d_req_ready_sig_d_0_1z ; wire ifu_expipe_req_branch_excpt_req_valid_1_0 ; wire ifu_emi_req_valid_i_0 ; wire cpu_d_req_is_apb ; wire stage_state_ex ; wire un1_instr_inhibit_ex ; wire un1_lsu_emi_req_valid46_1 ; wire N_145 ; wire debug_sysbus_resp_error_net ; wire un1_lsu_resp_valid ; wire lsu_emi_req_valid47 ; wire N_90 ; wire cpu_d_resp_valid_sig_1z ; wire un1_lsu_emi_req_valid46 ; wire un1_lsu_expipe_req_op_4 ; wire un24_lsu_emi_req_rd_byte_en ; wire N_84 ; wire un5_lsu_emi_req_rd_byte_en ; wire un1_lsu_resp_valid_1 ; wire cpu_i_req_is_tcm0_5_1z ; wire hart_soft_reset_net ; wire hart_soft_irq_net ; wire cpu_d_resp_valid_d_1z ; wire un8_cpu_i_req_is_tcm0lt19_12 ; wire un24_cpu_i_req_is_apb_1 ; wire bcu_result_cry_0_Y ; wire tcm0_d_req_valid_2_1z ; wire N_1154 ; wire sba_req_addr_1 ; wire cpu_i_resp_valid_sel ; wire tcm0_i_resp_valid_net ; wire un24_cpu_i_req_is_apb_17_1z ; wire debug_sysbus_resp_ready_net ; wire cpu_i_resp_error_sel ; wire lsu_emi_req_valid49 ; wire trace_priv_i ; wire N_1157 ; wire apb_i_req_valid_net_3 ; wire i_trx_os_buff_ready ; wire req_complete_reg ; wire un3_next_req_fetch_ptr_cry_27_S ; wire un3_next_req_fetch_ptr_cry_26_S ; wire ifu_emi_req_valid_i_o2_1_0 ; wire debug_trx_os_net ; wire un3_next_req_fetch_ptr_cry_22_S ; wire un3_next_req_fetch_ptr_cry_21_S ; wire un3_next_req_fetch_ptr_cry_16_S ; wire un3_next_req_fetch_ptr_cry_15_S ; wire apb_d_req_valid_3_0_1z ; wire cpu_d_req_ready_1 ; wire cpu_d_req_is_tcm0_1z ; wire cpu_N_6 ; wire tcm0_d_req_valid_net ; wire cpu_d_resp_error_sig_1z ; wire apb_d_resp_error_net ; wire un3_next_req_fetch_ptr_cry_25_S ; wire cpu_m1_e_1 ; wire un1_cpu_i_req_ready_x_1z ; wire un2_cpu_i_req_ready_1z ; wire un3_cpu_i_req_ready_1z ; wire apb_i_req_ready_net_tz ; wire cpu_i_req_is_apb_1z ; wire un4_cpu_i_req_is_apb_1z ; wire un16_cpu_i_req_is_apb_1z ; wire un8_cpu_i_req_is_tcm0lt18 ; wire un8_cpu_i_req_is_tcm0lto18_12_1 ; wire cpu_i_req_is_tcm0_5_0_1z ; wire un3_next_req_fetch_ptr_s_29_S ; wire cpu_i_req_is_tcm0_4_2_1z ; wire un3_next_req_fetch_ptr_cry_18_S ; wire gen_m3_1z ; wire un5_N_4_0_i ; wire un3_next_req_fetch_ptr_cry_23_S ; wire sticky_reset_reg ; wire un24_cpu_i_req_is_apb_19_11_1z ; wire tcm0_i_req_valid_1 ; wire tcm0_i_req_ready_net_tz ; wire cpu_m8_0_a3_0_3 ; wire un1_cpu_i_req_ready_1z ; wire cpu_i_req_is_dummy_target_1z ; wire un2_cpu_i_req_ready_x_1z ; wire [10:0] d_trx_resp; wire [5:0] req_buffer_resp_sel; wire [10:6] un2_cpu_d_resp_type_Z; wire [21:2] d_trx_resp_pkd; wire [11:0] i_trx_resp_pkd; wire [5:0] un12_req_os_i_src; wire [1:0] d_trx_resp_valid_pkd; wire [0:0] buff_rd_ptr; wire [1:0] buff_valid; wire [0:0] buff_rd_ptr_1; wire [5:0] i_trx_resp; wire [0:0] buff_rd_ptr_2; wire [7:3] un1_cpu_d_resp_rd_data_sig_Z; wire [25:16] un10_cpu_d_resp_rd_data_sig_Z; wire [2:0] debug_sysbus_resp_rd_data_0_Z; wire [3:0] tcm0_d_req_rd_byte_en_Z; wire [2:2] apb_d_req_wr_byte_en_net_1; wire [1:1] req_buffer_reg_sel_2_0; wire un1_cpu_i_req_ready_1_Z ; wire un24_cpu_i_req_is_apb_19_8_Z ; wire un24_cpu_i_req_is_apb_19_7_Z ; wire un24_cpu_i_req_is_apb_19_8_sx_Z ; wire un8_cpu_i_req_is_tcm0lto18_10_sx ; wire un8_cpu_i_req_is_tcm0lt19_10 ; wire cpu_i_req_is_tcm0_4_2_sx_Z ; wire cpu_m1_e_sx_sx ; wire cpu_m1_e_sx ; wire un8_cpu_i_req_is_tcm0lto18_10_RNIRSJ9QO3 ; wire cpu_i_req_is_tcm0 ; wire cpu_i_req_is_dummy_target_sx_Z ; wire un24_cpu_i_req_is_apb_Z ; wire un8_cpu_i_req_is_tcm0lto18_12_1_sx ; wire gen_m3_2_Z ; wire cpu_d_resp_valid_rd_1_Z ; wire d_trx_resp_valid ; wire un1_cpu_d_resp_valid_rd_out ; wire un7_cpu_d_resp_valid_rd_0_Z ; wire cpu_d_resp_valid_rd_Z ; wire un16_cpu_i_req_is_apb_17_Z ; wire un16_cpu_i_req_is_apb_1_Z ; wire un16_cpu_i_req_is_apb_23_1_Z ; wire un16_cpu_i_req_is_apb_22_Z ; wire un16_cpu_i_req_is_apb_16_Z ; wire un16_cpu_i_req_is_apb_11_Z ; wire un16_cpu_i_req_is_apb_22_N_2L1_Z ; wire un16_cpu_i_req_is_apb_22_1 ; wire cpu_i_req_is_tcm0_4_2_0_Z ; wire cpu_d_resp_error_sig_N_2L1_Z ; wire subsys_cfg_d_resp_valid ; wire cpu_d_resp_error_sig_N_3L3_Z ; wire un7_cpu_d_resp_error_rd_4_Z ; wire cpu_d_resp_error_sig_N_4L5_Z ; wire un16_cpu_i_req_is_apb_23_Z ; wire un16_cpu_i_req_is_apb_15_Z ; wire cpu_d_req_ready_sig_1_Z ; wire cpu_m8_0_a3_1 ; wire un9_cpu_d_resp_valid_sig_1_0_Z ; wire un9_cpu_d_resp_valid_sig_Z ; wire N_1155 ; wire cpu_i_req_is_tcm0_5_0_1_Z ; wire cpu_i_req_is_tcm0_5_0_1_0_Z ; wire gen_N_3_mux_1 ; wire tcm0_d_req_read_Z ; wire cpu_d_req_is_fence_Z ; wire cpu_d_req_type_1_ss0_i ; wire subsys_cfg_d_req_valid_0_o2_1_0_Z ; wire N_1177 ; wire ram1_1 ; wire ram0_1 ; wire un8_cpu_d_resp_valid_sig_0_0_Z ; wire N_110 ; wire cpu_m8_0_a3_0_2_a1_0_Z ; wire gen_N_5_mux_2 ; wire gen_N_3_mux_2 ; wire gen_N_3_mux ; wire cpu_d_resp_valid_c_0_0_Z ; wire un1_cpu_i_resp_valid_Z ; wire dummy_target_i_resp_valid_Z ; wire d_trx_os_buff_ready ; wire subsys_cfg_d_resp_ready_Z ; wire tcm0_i_req_valid_2_1_Z ; wire un24_cpu_i_req_is_apb_19_9_Z ; wire cpu_m8_0_a3_0_5_1 ; wire cpu_d_resp_valid_c_c_Z ; wire cpu_d_req_is_apb_0_a2_1_1_Z ; wire N_90_1 ; wire N_91_3 ; wire un8_cpu_d_req_is_tcm0lt19_8 ; wire N_115 ; wire un8_cpu_d_req_is_tcm0lt19_7 ; wire cpu_d_resp_valid_sig_0_Z ; wire un1_cpu_d_req_read_mux_Z ; wire un1_cpu_d_req_write_mux_Z ; wire un24_cpu_i_req_is_apb_0_Z ; wire cpu_d_req_is_tcm0_3_0_Z ; wire cpu_d_req_is_tcm0_2_0_Z ; wire cpu_d_req_is_tcm0_1_0_Z ; wire cpu_d_req_is_apb_0_a2_0_4_Z ; wire cpu_d_req_is_apb_0_a2_1_5_Z ; wire cpu_d_req_is_apb_0_a2_3_0_Z ; wire N_91_9 ; wire read_subsys_hart_soft_reg ; wire subsys_hart_gpr_ded_reset_reg ; wire cpu_d_req_is_apb_0_a2_0_5_Z ; wire cpu_d_req_is_apb_0_a2_1_6_Z ; wire un8_cpu_d_req_is_tcm0lt18 ; wire tcm0_d_req_write_Z ; wire cpu_d_req_is_tcm0_7_Z ; wire N_126 ; wire N_1162 ; wire cpu_d_req_type_1_sm0 ; wire un1_cpu_d_req_accepted_1_Z ; wire cpu_d_req_is_apb_0_a2_1_9_Z ; wire N_1178 ; wire N_129 ; wire N_90_0 ; wire cpu_d_req_is_subsys_cfg ; wire N_137 ; wire cpu_m8_0_a3_0_2_a0_0_Z ; wire cpu_m8_0_a3_0_5_3 ; wire cpu_d_req_is_dummy_target_Z ; wire subsys_cfg_d_req_ready ; wire un1_cpu_d_req_accepted_Z ; wire cpu_m8_0_a3_0_5_4 ; wire cpu_m8_0_a3_0_5_5 ; wire cpu_m8_0_a3_0_2_a0_2_Z ; wire N_114 ; wire subsys_cfg_d_req_valid ; wire cpu_m8_0_a3_0_5_7 ; wire tcm0_m3_e_1 ; wire N_15132 ; wire N_15133 ; wire GND ; wire VCC ; // @48:3146 CFG4 un1_cpu_i_req_ready ( .A(un1_cpu_i_req_ready_1_Z), .B(un2_cpu_i_req_ready_x_1z), .C(req_masked[0]), .D(cpu_i_req_is_dummy_target_1z), .Y(un1_cpu_i_req_ready_1z) ); defparam un1_cpu_i_req_ready.INIT=16'hFFD5; // @48:3146 CFG3 un1_cpu_i_req_ready_1 ( .A(cpu_m8_0_a3_0_3), .B(tcm0_i_req_ready_net_tz), .C(tcm0_i_req_valid_1), .Y(un1_cpu_i_req_ready_1_Z) ); defparam un1_cpu_i_req_ready_1.INIT=8'h7F; // @48:3014 CFG4 un24_cpu_i_req_is_apb_19_11 ( .A(apb_i_req_addr_net[7]), .B(apb_i_req_addr_net[3]), .C(un24_cpu_i_req_is_apb_19_8_Z), .D(un24_cpu_i_req_is_apb_19_7_Z), .Y(un24_cpu_i_req_is_apb_19_11_1z) ); defparam un24_cpu_i_req_is_apb_19_11.INIT=16'h1000; // @48:3014 CFG3 un24_cpu_i_req_is_apb_19_8 ( .A(un24_cpu_i_req_is_apb_19_8_sx_Z), .B(apb_i_req_addr_net[11]), .C(apb_i_req_addr_net[10]), .Y(un24_cpu_i_req_is_apb_19_8_Z) ); defparam un24_cpu_i_req_is_apb_19_8.INIT=8'h01; // @48:3014 CFG4 un24_cpu_i_req_is_apb_19_8_sx ( .A(sticky_reset_reg), .B(un3_next_req_fetch_ptr_cry_23_S), .C(cpu_d_req_addr_net[25]), .D(un5_N_4_0_i), .Y(un24_cpu_i_req_is_apb_19_8_sx_Z) ); defparam un24_cpu_i_req_is_apb_19_8_sx.INIT=16'hBBAF; // @48:3076 CFG3 \gen_tcm0_i_decode.un8_cpu_i_req_is_tcm0lto18_10 ( .A(gen_m3_1z), .B(un8_cpu_i_req_is_tcm0lto18_10_sx), .C(apb_i_req_addr_net[19]), .Y(un8_cpu_i_req_is_tcm0lt19_10) ); defparam \gen_tcm0_i_decode.un8_cpu_i_req_is_tcm0lto18_10 .INIT=8'hFD; // @48:3076 CFG4 \gen_tcm0_i_decode.un8_cpu_i_req_is_tcm0lto18_10_sx ( .A(sticky_reset_reg), .B(un3_next_req_fetch_ptr_cry_18_S), .C(cpu_d_req_addr_net[20]), .D(un5_N_4_0_i), .Y(un8_cpu_i_req_is_tcm0lto18_10_sx) ); defparam \gen_tcm0_i_decode.un8_cpu_i_req_is_tcm0lto18_10_sx .INIT=16'h4450; // @48:3075 CFG4 cpu_i_req_is_tcm0_4_2 ( .A(cpu_i_req_is_tcm0_4_2_sx_Z), .B(apb_i_req_addr_net[26]), .C(apb_i_req_addr_net[25]), .D(apb_i_req_addr_net[16]), .Y(cpu_i_req_is_tcm0_4_2_1z) ); defparam cpu_i_req_is_tcm0_4_2.INIT=16'h0001; // @48:3075 CFG4 cpu_i_req_is_tcm0_4_2_sx ( .A(sticky_reset_reg), .B(un3_next_req_fetch_ptr_s_29_S), .C(cpu_d_req_addr_net[31]), .D(un5_N_4_0_i), .Y(cpu_i_req_is_tcm0_4_2_sx_Z) ); defparam cpu_i_req_is_tcm0_4_2_sx.INIT=16'h1105; // @48:3075 CFG4 cpu_i_req_is_dummy_target_RNO ( .A(apb_i_req_addr_net[30]), .B(cpu_i_req_is_tcm0_5_0_1z), .C(un8_cpu_i_req_is_tcm0lt19_10), .D(cpu_m1_e_sx_sx), .Y(cpu_m1_e_sx) ); defparam cpu_i_req_is_dummy_target_RNO.INIT=16'hFFFB; // @48:3075 CFG4 cpu_i_req_is_dummy_target_RNO_0 ( .A(apb_i_req_addr_net[16]), .B(apb_i_req_addr_net[31]), .C(apb_i_req_addr_net[26]), .D(apb_i_req_addr_net[25]), .Y(cpu_m1_e_sx_sx) ); defparam cpu_i_req_is_dummy_target_RNO_0.INIT=16'hFFFB; // @48:3075 CFG4 cpu_i_req_is_tcm0_4_2_RNIF8II0R2 ( .A(cpu_i_req_is_tcm0_4_2_1z), .B(un8_cpu_i_req_is_tcm0lto18_10_RNIRSJ9QO3), .C(un8_cpu_i_req_is_tcm0lto18_12_1), .D(un8_cpu_i_req_is_tcm0lt18), .Y(cpu_i_req_is_tcm0) ); defparam cpu_i_req_is_tcm0_4_2_RNIF8II0R2.INIT=16'h0002; // @48:3075 CFG3 \gen_tcm0_i_decode.un8_cpu_i_req_is_tcm0lto18_10_RNIRSJ9QO3 ( .A(apb_i_req_addr_net[30]), .B(un8_cpu_i_req_is_tcm0lt19_10), .C(cpu_i_req_is_tcm0_5_0_1z), .Y(un8_cpu_i_req_is_tcm0lto18_10_RNIRSJ9QO3) ); defparam \gen_tcm0_i_decode.un8_cpu_i_req_is_tcm0lto18_10_RNIRSJ9QO3 .INIT=8'hEF; // @48:3128 CFG4 cpu_i_req_is_dummy_target ( .A(un8_cpu_i_req_is_tcm0lto18_12_1), .B(un8_cpu_i_req_is_tcm0lt18), .C(cpu_m1_e_sx), .D(cpu_i_req_is_dummy_target_sx_Z), .Y(cpu_i_req_is_dummy_target_1z) ); defparam cpu_i_req_is_dummy_target.INIT=16'h00FE; // @48:3128 CFG3 cpu_i_req_is_dummy_target_sx ( .A(un16_cpu_i_req_is_apb_1z), .B(un4_cpu_i_req_is_apb_1z), .C(un24_cpu_i_req_is_apb_Z), .Y(cpu_i_req_is_dummy_target_sx_Z) ); defparam cpu_i_req_is_dummy_target_sx.INIT=8'hFE; // @48:3146 CFG2 un2_cpu_i_req_ready_x ( .A(cpu_i_req_is_apb_1z), .B(apb_i_req_ready_net_tz), .Y(un2_cpu_i_req_ready_x_1z) ); defparam un2_cpu_i_req_ready_x.INIT=4'h8; // @48:3146 CFG2 un1_cpu_i_req_ready_x ( .A(un3_cpu_i_req_ready_1z), .B(un2_cpu_i_req_ready_1z), .Y(un1_cpu_i_req_ready_x_1z) ); defparam un1_cpu_i_req_ready_x.INIT=4'hE; // @48:3075 CFG4 \gen_tcm0_i_decode.un8_cpu_i_req_is_tcm0lto18_12_1_sx_RNI6H24CH3 ( .A(un8_cpu_i_req_is_tcm0lto18_12_1_sx), .B(gen_m3_2_Z), .C(cpu_i_req_is_tcm0_5_0_1z), .D(apb_i_req_addr_net[30]), .Y(cpu_m1_e_1) ); defparam \gen_tcm0_i_decode.un8_cpu_i_req_is_tcm0lto18_12_1_sx_RNI6H24CH3 .INIT=16'h0040; // @48:3076 CFG2 \gen_tcm0_i_decode.un8_cpu_i_req_is_tcm0lto18_12_1 ( .A(gen_m3_2_Z), .B(un8_cpu_i_req_is_tcm0lto18_12_1_sx), .Y(un8_cpu_i_req_is_tcm0lto18_12_1) ); defparam \gen_tcm0_i_decode.un8_cpu_i_req_is_tcm0lto18_12_1 .INIT=4'hD; // @48:3076 CFG4 \gen_tcm0_i_decode.un8_cpu_i_req_is_tcm0lto18_12_1_sx ( .A(sticky_reset_reg), .B(un3_next_req_fetch_ptr_cry_25_S), .C(cpu_d_req_addr_net[27]), .D(un5_N_4_0_i), .Y(un8_cpu_i_req_is_tcm0lto18_12_1_sx) ); defparam \gen_tcm0_i_decode.un8_cpu_i_req_is_tcm0lto18_12_1_sx .INIT=16'h4450; // @48:3667 CFG4 cpu_d_resp_valid_rd ( .A(cpu_d_resp_valid_rd_1_Z), .B(d_trx_resp_valid), .C(un1_cpu_d_resp_valid_rd_out), .D(un7_cpu_d_resp_valid_rd_0_Z), .Y(cpu_d_resp_valid_rd_Z) ); defparam cpu_d_resp_valid_rd.INIT=16'hFFF7; // @48:3667 CFG4 cpu_d_resp_valid_rd_1 ( .A(d_trx_resp[6]), .B(resp_dest_0), .C(cpu_d_wr_rd_state[0]), .D(d_trx_resp[3]), .Y(cpu_d_resp_valid_rd_1_Z) ); defparam cpu_d_resp_valid_rd_1.INIT=16'h00F7; // @48:3012 CFG4 un16_cpu_i_req_is_apb ( .A(un16_cpu_i_req_is_apb_17_Z), .B(un16_cpu_i_req_is_apb_1_Z), .C(un16_cpu_i_req_is_apb_23_1_Z), .D(un16_cpu_i_req_is_apb_22_Z), .Y(un16_cpu_i_req_is_apb_1z) ); defparam un16_cpu_i_req_is_apb.INIT=16'h2000; // @48:3012 CFG2 un16_cpu_i_req_is_apb_1 ( .A(un16_cpu_i_req_is_apb_16_Z), .B(un16_cpu_i_req_is_apb_11_Z), .Y(un16_cpu_i_req_is_apb_1_Z) ); defparam un16_cpu_i_req_is_apb_1.INIT=4'h7; // @48:3012 CFG4 un16_cpu_i_req_is_apb_22_N_2L1 ( .A(apb_i_req_addr_net[24]), .B(apb_i_req_addr_net[23]), .C(apb_i_req_addr_net[18]), .D(apb_i_req_addr_net[17]), .Y(un16_cpu_i_req_is_apb_22_N_2L1_Z) ); defparam un16_cpu_i_req_is_apb_22_N_2L1.INIT=16'h0001; // @48:3012 CFG4 un16_cpu_i_req_is_apb_22_N_3L3 ( .A(apb_i_req_addr_net[19]), .B(gen_m3_2_Z), .C(apb_i_req_addr_net[27]), .D(apb_i_req_addr_net[5]), .Y(un16_cpu_i_req_is_apb_22_1) ); defparam un16_cpu_i_req_is_apb_22_N_3L3.INIT=16'h0400; // @48:3012 CFG4 un16_cpu_i_req_is_apb_22 ( .A(apb_i_req_addr_net[30]), .B(cpu_i_req_is_tcm0_4_2_0_Z), .C(un16_cpu_i_req_is_apb_22_1), .D(un16_cpu_i_req_is_apb_22_N_2L1_Z), .Y(un16_cpu_i_req_is_apb_22_Z) ); defparam un16_cpu_i_req_is_apb_22.INIT=16'h4000; // @48:3707 CFG2 cpu_d_resp_error_sig_N_2L1 ( .A(d_trx_resp_valid), .B(d_trx_resp[1]), .Y(cpu_d_resp_error_sig_N_2L1_Z) ); defparam cpu_d_resp_error_sig_N_2L1.INIT=4'h2; // @48:3707 CFG3 cpu_d_resp_error_sig_N_3L3 ( .A(req_buffer_resp_sel[1]), .B(subsys_cfg_d_resp_valid), .C(req_buffer_resp_sel[2]), .Y(cpu_d_resp_error_sig_N_3L3_Z) ); defparam cpu_d_resp_error_sig_N_3L3.INIT=8'h04; // @48:3707 CFG4 cpu_d_resp_error_sig_N_4L5 ( .A(cpu_d_resp_error_sig_N_3L3_Z), .B(un7_cpu_d_resp_error_rd_4_Z), .C(d_trx_resp[3]), .D(un2_cpu_d_resp_type_Z[9]), .Y(cpu_d_resp_error_sig_N_4L5_Z) ); defparam cpu_d_resp_error_sig_N_4L5.INIT=16'h070F; // @48:3707 CFG4 cpu_d_resp_error_sig ( .A(cpu_d_resp_error_sig_N_2L1_Z), .B(apb_d_resp_error_net), .C(cpu_d_resp_error_sig_N_4L5_Z), .D(un2_cpu_d_resp_type_Z[10]), .Y(cpu_d_resp_error_sig_1z) ); defparam cpu_d_resp_error_sig.INIT=16'h8A0A; // @48:3012 CFG4 un16_cpu_i_req_is_apb_23 ( .A(un16_cpu_i_req_is_apb_11_Z), .B(un16_cpu_i_req_is_apb_16_Z), .C(un16_cpu_i_req_is_apb_17_Z), .D(un16_cpu_i_req_is_apb_23_1_Z), .Y(un16_cpu_i_req_is_apb_23_Z) ); defparam un16_cpu_i_req_is_apb_23.INIT=16'h8000; // @48:3012 CFG4 un16_cpu_i_req_is_apb_23_1 ( .A(apb_i_req_addr_net[14]), .B(un16_cpu_i_req_is_apb_15_Z), .C(apb_i_req_addr_net[22]), .D(apb_i_req_addr_net[21]), .Y(un16_cpu_i_req_is_apb_23_1_Z) ); defparam un16_cpu_i_req_is_apb_23_1.INIT=16'h0004; // @48:3652 CFG4 cpu_d_req_ready_sig_1_RNI65U5Q ( .A(cpu_d_req_ready_sig_1_Z), .B(cpu_d_wr_rd_state[1]), .C(tcm0_d_req_valid_net), .D(cpu_m8_0_a3_1), .Y(cpu_N_6) ); defparam cpu_d_req_ready_sig_1_RNI65U5Q.INIT=16'h5501; // @48:3652 CFG4 cpu_d_req_is_tcm0_RNIBQJDE ( .A(cpu_d_req_is_tcm0_1z), .B(cpu_d_req_ready_1), .C(cpu_d_wr_rd_state[1]), .D(resp_dest_0), .Y(cpu_m8_0_a3_1) ); defparam cpu_d_req_is_tcm0_RNIBQJDE.INIT=16'h57F7; // @48:3682 CFG4 un9_cpu_d_resp_valid_sig ( .A(d_trx_resp[0]), .B(d_trx_resp[1]), .C(d_trx_resp_valid), .D(un9_cpu_d_resp_valid_sig_1_0_Z), .Y(un9_cpu_d_resp_valid_sig_Z) ); defparam un9_cpu_d_resp_valid_sig.INIT=16'h4000; // @48:3682 CFG4 un9_cpu_d_resp_valid_sig_1_0 ( .A(N_1155), .B(d_trx_resp[2]), .C(apb_d_req_valid_3_0_1z), .D(req_os_d_src_0), .Y(un9_cpu_d_resp_valid_sig_1_0_Z) ); defparam un9_cpu_d_resp_valid_sig_1_0.INIT=16'h0040; // @48:3075 CFG4 cpu_i_req_is_tcm0_5_0 ( .A(cpu_i_req_is_tcm0_5_0_1_Z), .B(un5_N_4_0_i), .C(sticky_reset_reg), .D(cpu_i_req_is_tcm0_5_0_1_0_Z), .Y(cpu_i_req_is_tcm0_5_0_1z) ); defparam cpu_i_req_is_tcm0_5_0.INIT=16'hDDD1; // @48:3075 CFG4 cpu_i_req_is_tcm0_5_0_1_0 ( .A(un3_next_req_fetch_ptr_cry_15_S), .B(un3_next_req_fetch_ptr_cry_16_S), .C(un3_next_req_fetch_ptr_cry_21_S), .D(un3_next_req_fetch_ptr_cry_22_S), .Y(cpu_i_req_is_tcm0_5_0_1_0_Z) ); defparam cpu_i_req_is_tcm0_5_0_1_0.INIT=16'h0001; // @48:3075 CFG4 cpu_i_req_is_tcm0_5_0_1 ( .A(cpu_d_req_addr_net[17]), .B(sticky_reset_reg), .C(gen_N_3_mux_1), .D(cpu_d_req_addr_net[18]), .Y(cpu_i_req_is_tcm0_5_0_1_Z) ); defparam cpu_i_req_is_tcm0_5_0_1.INIT=16'h3F2F; CFG2 tcm0_d_req_read_RNIIHG39 ( .A(tcm0_d_req_read_Z), .B(cpu_d_req_is_fence_Z), .Y(cpu_d_req_type_1_ss0_i) ); defparam tcm0_d_req_read_RNIIHG39.INIT=4'h1; // @48:3149 CFG3 un3_cpu_i_req_ready ( .A(cpu_m8_0_a3_0_3), .B(tcm0_i_req_ready_net_tz), .C(tcm0_i_req_valid_1), .Y(un3_cpu_i_req_ready_1z) ); defparam un3_cpu_i_req_ready.INIT=8'h80; // @48:3337 CFG2 subsys_cfg_d_req_valid_0_o2_1_0 ( .A(d_trx_resp_pkd[17]), .B(d_trx_resp_pkd[21]), .Y(subsys_cfg_d_req_valid_0_o2_1_0_Z) ); defparam subsys_cfg_d_req_valid_0_o2_1_0.INIT=4'hE; // @48:2995 CFG2 \extract_os_i_loop_l1.un12_req_os_i_src[5] ( .A(i_trx_resp_valid_pkd[1]), .B(i_trx_resp_pkd[11]), .Y(un12_req_os_i_src[5]) ); defparam \extract_os_i_loop_l1.un12_req_os_i_src[5] .INIT=4'h8; // @48:2995 CFG2 \extract_os_i_loop_l1.un12_req_os_i_src[0] ( .A(i_trx_resp_valid_pkd[1]), .B(i_trx_resp_pkd[6]), .Y(un12_req_os_i_src[0]) ); defparam \extract_os_i_loop_l1.un12_req_os_i_src[0] .INIT=4'h8; // @48:3197 CFG2 debug_trx_os ( .A(d_trx_resp_valid_pkd[0]), .B(d_trx_resp_valid_pkd[1]), .Y(debug_trx_os_net) ); defparam debug_trx_os.INIT=4'hE; // @48:3314 CFG2 apb_d_req_valid_2_i_a2_0 ( .A(d_trx_resp_valid_pkd[0]), .B(d_trx_resp_pkd[3]), .Y(N_1177) ); defparam apb_d_req_valid_2_i_a2_0.INIT=4'h8; // @48:3693 CFG4 un7_cpu_d_resp_error_rd_4 ( .A(req_buffer_resp_sel[5]), .B(req_buffer_resp_sel[3]), .C(req_buffer_resp_sel[0]), .D(req_buffer_resp_sel[4]), .Y(un7_cpu_d_resp_error_rd_4_Z) ); defparam un7_cpu_d_resp_error_rd_4.INIT=16'h0001; // @48:2448 CFG3 un8_cpu_d_resp_valid_sig_0_0 ( .A(ram1_1), .B(ram0_1), .C(buff_rd_ptr[0]), .Y(un8_cpu_d_resp_valid_sig_0_0_Z) ); defparam un8_cpu_d_resp_valid_sig_0_0.INIT=8'h53; // @48:3314 CFG4 apb_d_req_valid_3_0 ( .A(d_trx_resp_pkd[17]), .B(d_trx_resp_pkd[6]), .C(d_trx_resp_valid_pkd[1]), .D(d_trx_resp_valid_pkd[0]), .Y(apb_d_req_valid_3_0_1z) ); defparam apb_d_req_valid_3_0.INIT=16'h135F; // @48:3337 CFG4 subsys_cfg_d_req_valid_0_a2_1 ( .A(d_trx_resp_pkd[10]), .B(d_trx_resp_pkd[6]), .C(d_trx_resp_pkd[3]), .D(d_trx_resp_pkd[2]), .Y(N_110) ); defparam subsys_cfg_d_req_valid_0_a2_1.INIT=16'h0001; // @48:3652 CFG2 cpu_m8_0_a3_0_2_a1_0 ( .A(un3_branch_cond_ex[0]), .B(ifu_emi_req_valid_i_o2_1_0), .Y(cpu_m8_0_a3_0_2_a1_0_Z) ); defparam cpu_m8_0_a3_0_2_a1_0.INIT=4'h1; // @48:3076 CFG3 gen_m2_0_a2_2 ( .A(sticky_reset_reg), .B(un3_next_req_fetch_ptr_cry_26_S), .C(un3_next_req_fetch_ptr_cry_27_S), .Y(gen_N_5_mux_2) ); defparam gen_m2_0_a2_2.INIT=8'hAB; // @48:3076 CFG3 gen_m1_0_a2_2 ( .A(cpu_d_req_addr_net[29]), .B(sticky_reset_reg), .C(cpu_d_req_addr_net[28]), .Y(gen_N_3_mux_2) ); defparam gen_m1_0_a2_2.INIT=8'hCD; // @48:3076 CFG3 cpu_i_req_is_tcm0_5_0_1_RNO ( .A(cpu_d_req_addr_net[24]), .B(sticky_reset_reg), .C(cpu_d_req_addr_net[23]), .Y(gen_N_3_mux_1) ); defparam cpu_i_req_is_tcm0_5_0_1_RNO.INIT=8'hCD; // @48:3076 CFG3 gen_m1_0_a2 ( .A(cpu_d_req_addr_net[22]), .B(sticky_reset_reg), .C(cpu_d_req_addr_net[21]), .Y(gen_N_3_mux) ); defparam gen_m1_0_a2.INIT=8'hCD; // @48:3276 CFG4 \req_os_d_src[7] ( .A(d_trx_resp_pkd[20]), .B(d_trx_resp_pkd[9]), .C(d_trx_resp_valid_pkd[1]), .D(d_trx_resp_valid_pkd[0]), .Y(req_os_d_src_0) ); defparam \req_os_d_src[7] .INIT=16'hECA0; // @48:3684 CFG4 cpu_d_resp_valid_c_0_0 ( .A(buff_rd_ptr_0_0), .B(un2_req_resp_str_req_buff_addr_misalign_0), .C(req_buff_resp_fault_1__0), .D(req_buff_resp_fault_0__0), .Y(cpu_d_resp_valid_c_0_0_Z) ); defparam cpu_d_resp_valid_c_0_0.INIT=16'hFDEC; // @48:3673 CFG4 un7_cpu_d_resp_valid_rd_0 ( .A(buff_valid[1]), .B(buff_valid[0]), .C(buff_rd_ptr_1[0]), .D(d_trx_resp[9]), .Y(un7_cpu_d_resp_valid_rd_0_Z) ); defparam un7_cpu_d_resp_valid_rd_0.INIT=16'hAC00; // @48:3667 CFG3 un1_cpu_d_resp_valid_rd_s ( .A(apb_resp_sel[1]), .B(d_trx_resp[10]), .C(req_complete_reg), .Y(un1_cpu_d_resp_valid_rd_out) ); defparam un1_cpu_d_resp_valid_rd_s.INIT=8'h80; // @48:3158 CFG3 un1_cpu_i_resp_valid ( .A(apb_resp_sel[0]), .B(req_complete_reg), .C(i_trx_resp[5]), .Y(un1_cpu_i_resp_valid_Z) ); defparam un1_cpu_i_resp_valid.INIT=8'h80; // @48:3263 CFG4 \un2_cpu_d_resp_type[10] ( .A(buff_rd_ptr[0]), .B(d_trx_resp[10]), .C(d_trx_resp_valid_pkd[1]), .D(d_trx_resp_valid_pkd[0]), .Y(un2_cpu_d_resp_type_Z[10]) ); defparam \un2_cpu_d_resp_type[10] .INIT=16'hC480; // @48:3746 CFG4 dummy_target_i_resp_valid ( .A(buff_rd_ptr_2[0]), .B(i_trx_resp[0]), .C(i_trx_resp_valid_pkd[1]), .D(i_trx_resp_valid_pkd[0]), .Y(dummy_target_i_resp_valid_Z) ); defparam dummy_target_i_resp_valid.INIT=16'hC480; // @48:3263 CFG4 \un2_cpu_d_resp_type[9] ( .A(buff_rd_ptr[0]), .B(d_trx_resp[9]), .C(d_trx_resp_valid_pkd[1]), .D(d_trx_resp_valid_pkd[0]), .Y(un2_cpu_d_resp_type_Z[9]) ); defparam \un2_cpu_d_resp_type[9] .INIT=16'hC480; // @48:3263 CFG4 \un2_cpu_d_resp_type[6] ( .A(buff_rd_ptr[0]), .B(d_trx_resp[6]), .C(d_trx_resp_valid_pkd[1]), .D(d_trx_resp_valid_pkd[0]), .Y(un2_cpu_d_resp_type_Z[6]) ); defparam \un2_cpu_d_resp_type[6] .INIT=16'hC480; // @48:3020 CFG4 apb_i_req_valid_3 ( .A(i_trx_resp_valid_pkd[0]), .B(i_trx_resp_pkd[0]), .C(un12_req_os_i_src[0]), .D(i_trx_os_buff_ready), .Y(apb_i_req_valid_net_3) ); defparam apb_i_req_valid_3.INIT=16'h0700; // @48:3314 CFG4 apb_d_req_valid_2_i ( .A(d_trx_resp_valid_pkd[1]), .B(N_1177), .C(d_trx_resp_pkd[14]), .D(d_trx_os_buff_ready), .Y(N_1157) ); defparam apb_d_req_valid_2_i.INIT=16'hECFF; // @48:3204 CFG4 cpu_d_req_is_fence ( .A(lsu_expipe_req_op_net_0), .B(trace_priv_i), .C(lsu_emi_req_valid49), .D(lsu_expipe_req_op_net_3), .Y(cpu_d_req_is_fence_Z) ); defparam cpu_d_req_is_fence.INIT=16'h2000; // @48:3012 CFG2 un16_cpu_i_req_is_apb_11 ( .A(apb_i_req_addr_net[13]), .B(apb_i_req_addr_net[20]), .Y(un16_cpu_i_req_is_apb_11_Z) ); defparam un16_cpu_i_req_is_apb_11.INIT=4'h2; // @48:3075 CFG2 cpu_i_req_is_tcm0_4_2_0 ( .A(apb_i_req_addr_net[16]), .B(apb_i_req_addr_net[26]), .Y(cpu_i_req_is_tcm0_4_2_0_Z) ); defparam cpu_i_req_is_tcm0_4_2_0.INIT=4'h1; // @48:3076 CFG3 gen_m3_2 ( .A(gen_N_5_mux_2), .B(gen_N_3_mux_2), .C(un5_N_4_0_i), .Y(gen_m3_2_Z) ); defparam gen_m3_2.INIT=8'hAC; // @48:3076 CFG4 gen_m3 ( .A(next_req_fetch_ptr_yy[21]), .B(next_req_fetch_ptr_yy[22]), .C(gen_N_3_mux), .D(un5_N_4_0_i), .Y(gen_m3_1z) ); defparam gen_m3.INIT=16'h11F0; // @48:3172 CFG4 \cpu_i_resp_rd_data[8] ( .A(i_trx_resp[2]), .B(apb_d_resp_rd_data_net[8]), .C(tcm0_d_resp_rd_data_net[8]), .D(i_trx_resp[5]), .Y(cpu_i_resp_rd_data_sel[8]) ); defparam \cpu_i_resp_rd_data[8] .INIT=16'hECA0; // @48:3172 CFG4 \cpu_i_resp_rd_data[12] ( .A(i_trx_resp[2]), .B(apb_d_resp_rd_data_net[12]), .C(tcm0_d_resp_rd_data_net[12]), .D(i_trx_resp[5]), .Y(cpu_i_resp_rd_data_sel[12]) ); defparam \cpu_i_resp_rd_data[12] .INIT=16'hECA0; // @48:3172 CFG4 \cpu_i_resp_rd_data[13] ( .A(i_trx_resp[2]), .B(apb_d_resp_rd_data_net[13]), .C(tcm0_d_resp_rd_data_net[13]), .D(i_trx_resp[5]), .Y(cpu_i_resp_rd_data_sel[13]) ); defparam \cpu_i_resp_rd_data[13] .INIT=16'hECA0; // @48:3172 CFG4 \cpu_i_resp_rd_data[17] ( .A(i_trx_resp[2]), .B(apb_d_resp_rd_data_net[17]), .C(tcm0_d_resp_rd_data_net[17]), .D(i_trx_resp[5]), .Y(cpu_i_resp_rd_data_sel[17]) ); defparam \cpu_i_resp_rd_data[17] .INIT=16'hECA0; // @48:3172 CFG4 \cpu_i_resp_rd_data[24] ( .A(i_trx_resp[2]), .B(apb_d_resp_rd_data_net[24]), .C(tcm0_d_resp_rd_data_net[24]), .D(i_trx_resp[5]), .Y(cpu_i_resp_rd_data_sel[24]) ); defparam \cpu_i_resp_rd_data[24] .INIT=16'hECA0; // @48:3172 CFG4 \cpu_i_resp_rd_data[25] ( .A(i_trx_resp[2]), .B(apb_d_resp_rd_data_net[25]), .C(tcm0_d_resp_rd_data_net[25]), .D(i_trx_resp[5]), .Y(cpu_i_resp_rd_data_sel[25]) ); defparam \cpu_i_resp_rd_data[25] .INIT=16'hECA0; // @48:3172 CFG4 \cpu_i_resp_rd_data[18] ( .A(i_trx_resp[2]), .B(apb_d_resp_rd_data_net[18]), .C(tcm0_d_resp_rd_data_net[18]), .D(i_trx_resp[5]), .Y(cpu_i_resp_rd_data_sel[18]) ); defparam \cpu_i_resp_rd_data[18] .INIT=16'hECA0; // @48:3172 CFG4 \cpu_i_resp_rd_data[0] ( .A(i_trx_resp[2]), .B(apb_d_resp_rd_data_net[0]), .C(tcm0_d_resp_rd_data_net[0]), .D(i_trx_resp[5]), .Y(cpu_i_resp_rd_data_sel[0]) ); defparam \cpu_i_resp_rd_data[0] .INIT=16'hECA0; // @48:3172 CFG4 \cpu_i_resp_rd_data[1] ( .A(i_trx_resp[2]), .B(apb_d_resp_rd_data_net[1]), .C(tcm0_d_resp_rd_data_net[1]), .D(i_trx_resp[5]), .Y(cpu_i_resp_rd_data_sel[1]) ); defparam \cpu_i_resp_rd_data[1] .INIT=16'hECA0; // @48:3172 CFG4 \cpu_i_resp_rd_data[2] ( .A(i_trx_resp[2]), .B(apb_d_resp_rd_data_net[2]), .C(tcm0_d_resp_rd_data_net[2]), .D(i_trx_resp[5]), .Y(cpu_i_resp_rd_data_sel[2]) ); defparam \cpu_i_resp_rd_data[2] .INIT=16'hECA0; // @48:3715 CFG2 \un1_cpu_d_resp_rd_data_sig[3] ( .A(un2_cpu_d_resp_type_Z[10]), .B(apb_d_resp_rd_data_net[3]), .Y(un1_cpu_d_resp_rd_data_sig_Z[3]) ); defparam \un1_cpu_d_resp_rd_data_sig[3] .INIT=4'h8; // @48:3718 CFG2 \un10_cpu_d_resp_rd_data_sig[16] ( .A(tcm0_d_resp_rd_data_net[16]), .B(un2_cpu_d_resp_type_Z[6]), .Y(un10_cpu_d_resp_rd_data_sig_Z[16]) ); defparam \un10_cpu_d_resp_rd_data_sig[16] .INIT=4'h8; // @48:3172 CFG4 \cpu_i_resp_rd_data[3] ( .A(i_trx_resp[2]), .B(apb_d_resp_rd_data_net[3]), .C(tcm0_d_resp_rd_data_net[3]), .D(i_trx_resp[5]), .Y(cpu_i_resp_rd_data_sel[3]) ); defparam \cpu_i_resp_rd_data[3] .INIT=16'hECA0; // @48:3172 CFG4 \cpu_i_resp_rd_data[4] ( .A(i_trx_resp[2]), .B(apb_d_resp_rd_data_net[4]), .C(tcm0_d_resp_rd_data_net[4]), .D(i_trx_resp[5]), .Y(cpu_i_resp_rd_data_sel[4]) ); defparam \cpu_i_resp_rd_data[4] .INIT=16'hECA0; // @48:3172 CFG4 \cpu_i_resp_rd_data[5] ( .A(i_trx_resp[2]), .B(apb_d_resp_rd_data_net[5]), .C(tcm0_d_resp_rd_data_net[5]), .D(i_trx_resp[5]), .Y(cpu_i_resp_rd_data_sel[5]) ); defparam \cpu_i_resp_rd_data[5] .INIT=16'hECA0; // @48:3172 CFG4 \cpu_i_resp_rd_data[6] ( .A(i_trx_resp[2]), .B(apb_d_resp_rd_data_net[6]), .C(tcm0_d_resp_rd_data_net[6]), .D(i_trx_resp[5]), .Y(cpu_i_resp_rd_data_sel[6]) ); defparam \cpu_i_resp_rd_data[6] .INIT=16'hECA0; // @48:3172 CFG4 \cpu_i_resp_rd_data[7] ( .A(i_trx_resp[2]), .B(apb_d_resp_rd_data_net[7]), .C(tcm0_d_resp_rd_data_net[7]), .D(i_trx_resp[5]), .Y(cpu_i_resp_rd_data_sel[7]) ); defparam \cpu_i_resp_rd_data[7] .INIT=16'hECA0; // @48:3172 CFG4 \cpu_i_resp_rd_data[14] ( .A(i_trx_resp[2]), .B(apb_d_resp_rd_data_net[14]), .C(tcm0_d_resp_rd_data_net[14]), .D(i_trx_resp[5]), .Y(cpu_i_resp_rd_data_sel[14]) ); defparam \cpu_i_resp_rd_data[14] .INIT=16'hECA0; // @48:3172 CFG4 \cpu_i_resp_rd_data[16] ( .A(i_trx_resp[2]), .B(apb_d_resp_rd_data_net[16]), .C(tcm0_d_resp_rd_data_net[16]), .D(i_trx_resp[5]), .Y(cpu_i_resp_rd_data_sel[16]) ); defparam \cpu_i_resp_rd_data[16] .INIT=16'hECA0; // @48:3172 CFG4 \cpu_i_resp_rd_data[19] ( .A(i_trx_resp[2]), .B(apb_d_resp_rd_data_net[19]), .C(tcm0_d_resp_rd_data_net[19]), .D(i_trx_resp[5]), .Y(cpu_i_resp_rd_data_sel[19]) ); defparam \cpu_i_resp_rd_data[19] .INIT=16'hECA0; // @48:3172 CFG4 \cpu_i_resp_rd_data[20] ( .A(i_trx_resp[2]), .B(apb_d_resp_rd_data_net[20]), .C(tcm0_d_resp_rd_data_net[20]), .D(i_trx_resp[5]), .Y(cpu_i_resp_rd_data_sel[20]) ); defparam \cpu_i_resp_rd_data[20] .INIT=16'hECA0; // @48:3172 CFG4 \cpu_i_resp_rd_data[22] ( .A(i_trx_resp[2]), .B(apb_d_resp_rd_data_net[22]), .C(tcm0_d_resp_rd_data_net[22]), .D(i_trx_resp[5]), .Y(cpu_i_resp_rd_data_sel[22]) ); defparam \cpu_i_resp_rd_data[22] .INIT=16'hECA0; // @48:3172 CFG4 \cpu_i_resp_rd_data[23] ( .A(i_trx_resp[2]), .B(apb_d_resp_rd_data_net[23]), .C(tcm0_d_resp_rd_data_net[23]), .D(i_trx_resp[5]), .Y(cpu_i_resp_rd_data_sel[23]) ); defparam \cpu_i_resp_rd_data[23] .INIT=16'hECA0; // @48:3172 CFG4 \cpu_i_resp_rd_data[27] ( .A(i_trx_resp[2]), .B(apb_d_resp_rd_data_net[27]), .C(tcm0_d_resp_rd_data_net[27]), .D(i_trx_resp[5]), .Y(cpu_i_resp_rd_data_sel[27]) ); defparam \cpu_i_resp_rd_data[27] .INIT=16'hECA0; // @48:3172 CFG4 \cpu_i_resp_rd_data[30] ( .A(i_trx_resp[2]), .B(apb_d_resp_rd_data_net[30]), .C(tcm0_d_resp_rd_data_net[30]), .D(i_trx_resp[5]), .Y(cpu_i_resp_rd_data_sel[30]) ); defparam \cpu_i_resp_rd_data[30] .INIT=16'hECA0; // @48:3165 CFG3 cpu_i_resp_error ( .A(apb_d_resp_error_net), .B(i_trx_resp[0]), .C(i_trx_resp[5]), .Y(cpu_i_resp_error_sel) ); defparam cpu_i_resp_error.INIT=8'hEC; // @48:3346 CFG4 subsys_cfg_d_resp_ready ( .A(debug_sysbus_resp_ready_net), .B(trace_priv_i), .C(d_trx_resp[9]), .D(d_trx_resp_valid), .Y(subsys_cfg_d_resp_ready_Z) ); defparam subsys_cfg_d_resp_ready.INIT=16'hB000; // @48:3718 CFG2 \un10_cpu_d_resp_rd_data_sig[25] ( .A(tcm0_d_resp_rd_data_net[25]), .B(un2_cpu_d_resp_type_Z[6]), .Y(un10_cpu_d_resp_rd_data_sig_Z[25]) ); defparam \un10_cpu_d_resp_rd_data_sig[25] .INIT=4'h8; // @48:3718 CFG2 \un10_cpu_d_resp_rd_data_sig[24] ( .A(tcm0_d_resp_rd_data_net[24]), .B(un2_cpu_d_resp_type_Z[6]), .Y(un10_cpu_d_resp_rd_data_sig_Z[24]) ); defparam \un10_cpu_d_resp_rd_data_sig[24] .INIT=4'h8; // @48:3172 CFG4 \cpu_i_resp_rd_data[10] ( .A(i_trx_resp[2]), .B(apb_d_resp_rd_data_net[10]), .C(tcm0_d_resp_rd_data_net[10]), .D(i_trx_resp[5]), .Y(cpu_i_resp_rd_data_sel[10]) ); defparam \cpu_i_resp_rd_data[10] .INIT=16'hECA0; // @48:3172 CFG4 \cpu_i_resp_rd_data[21] ( .A(i_trx_resp[2]), .B(apb_d_resp_rd_data_net[21]), .C(tcm0_d_resp_rd_data_net[21]), .D(i_trx_resp[5]), .Y(cpu_i_resp_rd_data_sel[21]) ); defparam \cpu_i_resp_rd_data[21] .INIT=16'hECA0; // @48:3172 CFG4 \cpu_i_resp_rd_data[28] ( .A(i_trx_resp[2]), .B(apb_d_resp_rd_data_net[28]), .C(tcm0_d_resp_rd_data_net[28]), .D(i_trx_resp[5]), .Y(cpu_i_resp_rd_data_sel[28]) ); defparam \cpu_i_resp_rd_data[28] .INIT=16'hECA0; // @48:3172 CFG4 \cpu_i_resp_rd_data[9] ( .A(i_trx_resp[2]), .B(apb_d_resp_rd_data_net[9]), .C(tcm0_d_resp_rd_data_net[9]), .D(i_trx_resp[5]), .Y(cpu_i_resp_rd_data_sel[9]) ); defparam \cpu_i_resp_rd_data[9] .INIT=16'hECA0; // @48:3172 CFG4 \cpu_i_resp_rd_data[29] ( .A(i_trx_resp[2]), .B(apb_d_resp_rd_data_net[29]), .C(tcm0_d_resp_rd_data_net[29]), .D(i_trx_resp[5]), .Y(cpu_i_resp_rd_data_sel[29]) ); defparam \cpu_i_resp_rd_data[29] .INIT=16'hECA0; // @48:3172 CFG4 \cpu_i_resp_rd_data[26] ( .A(i_trx_resp[2]), .B(apb_d_resp_rd_data_net[26]), .C(tcm0_d_resp_rd_data_net[26]), .D(i_trx_resp[5]), .Y(cpu_i_resp_rd_data_sel[26]) ); defparam \cpu_i_resp_rd_data[26] .INIT=16'hECA0; // @48:3172 CFG4 \cpu_i_resp_rd_data[31] ( .A(i_trx_resp[2]), .B(apb_d_resp_rd_data_net[31]), .C(tcm0_d_resp_rd_data_net[31]), .D(i_trx_resp[5]), .Y(cpu_i_resp_rd_data_sel[31]) ); defparam \cpu_i_resp_rd_data[31] .INIT=16'hECA0; // @48:3172 CFG4 \cpu_i_resp_rd_data[15] ( .A(i_trx_resp[2]), .B(apb_d_resp_rd_data_net[15]), .C(tcm0_d_resp_rd_data_net[15]), .D(i_trx_resp[5]), .Y(cpu_i_resp_rd_data_sel[15]) ); defparam \cpu_i_resp_rd_data[15] .INIT=16'hECA0; // @48:3715 CFG3 \un1_cpu_d_resp_rd_data_sig[7] ( .A(apb_d_resp_rd_data_net[7]), .B(d_trx_resp[10]), .C(d_trx_resp_valid), .Y(un1_cpu_d_resp_rd_data_sig_Z[7]) ); defparam \un1_cpu_d_resp_rd_data_sig[7] .INIT=8'h80; // @48:3172 CFG4 \cpu_i_resp_rd_data[11] ( .A(i_trx_resp[2]), .B(apb_d_resp_rd_data_net[11]), .C(tcm0_d_resp_rd_data_net[11]), .D(i_trx_resp[5]), .Y(cpu_i_resp_rd_data_sel[11]) ); defparam \cpu_i_resp_rd_data[11] .INIT=16'hECA0; // @48:3082 CFG4 tcm0_i_req_valid_2_1 ( .A(i_trx_resp_valid_pkd[0]), .B(i_trx_resp_pkd[5]), .C(apb_i_req_valid_net_3), .D(un12_req_os_i_src[5]), .Y(tcm0_i_req_valid_2_1_Z) ); defparam tcm0_i_req_valid_2_1.INIT=16'h0070; // @48:3012 CFG4 un16_cpu_i_req_is_apb_17 ( .A(apb_i_req_addr_net[12]), .B(apb_i_req_addr_net[4]), .C(apb_i_req_addr_net[31]), .D(apb_i_req_addr_net[15]), .Y(un16_cpu_i_req_is_apb_17_Z) ); defparam un16_cpu_i_req_is_apb_17.INIT=16'h0800; // @48:3012 CFG4 un16_cpu_i_req_is_apb_16 ( .A(apb_i_req_addr_net[25]), .B(apb_i_req_addr_net[11]), .C(apb_i_req_addr_net[10]), .D(apb_i_req_addr_net[9]), .Y(un16_cpu_i_req_is_apb_16_Z) ); defparam un16_cpu_i_req_is_apb_16.INIT=16'h8000; // @48:3012 CFG4 un16_cpu_i_req_is_apb_15 ( .A(apb_i_req_addr_net[8]), .B(apb_i_req_addr_net[7]), .C(apb_i_req_addr_net[6]), .D(apb_i_req_addr_net[3]), .Y(un16_cpu_i_req_is_apb_15_Z) ); defparam un16_cpu_i_req_is_apb_15.INIT=16'h8000; // @48:3014 CFG4 un24_cpu_i_req_is_apb_19_9 ( .A(apb_i_req_addr_net[8]), .B(apb_i_req_addr_net[6]), .C(apb_i_req_addr_net[15]), .D(apb_i_req_addr_net[14]), .Y(un24_cpu_i_req_is_apb_19_9_Z) ); defparam un24_cpu_i_req_is_apb_19_9.INIT=16'h0100; // @48:3014 CFG3 un24_cpu_i_req_is_apb_19_7 ( .A(apb_i_req_addr_net[29]), .B(apb_i_req_addr_net[28]), .C(apb_i_req_addr_net[9]), .Y(un24_cpu_i_req_is_apb_19_7_Z) ); defparam un24_cpu_i_req_is_apb_19_7.INIT=8'h01; // @48:3715 CFG4 \debug_sysbus_resp_rd_data_0[0] ( .A(un2_cpu_d_resp_type_Z[6]), .B(apb_d_resp_rd_data_net[0]), .C(tcm0_d_resp_rd_data_net[0]), .D(un2_cpu_d_resp_type_Z[10]), .Y(debug_sysbus_resp_rd_data_0_Z[0]) ); defparam \debug_sysbus_resp_rd_data_0[0] .INIT=16'hECA0; // @48:3715 CFG4 \debug_sysbus_resp_rd_data_0[2] ( .A(un2_cpu_d_resp_type_Z[6]), .B(apb_d_resp_rd_data_net[2]), .C(tcm0_d_resp_rd_data_net[2]), .D(un2_cpu_d_resp_type_Z[10]), .Y(debug_sysbus_resp_rd_data_0_Z[2]) ); defparam \debug_sysbus_resp_rd_data_0[2] .INIT=16'hECA0; // @48:3715 CFG4 \debug_sysbus_resp_rd_data_0[1] ( .A(un2_cpu_d_resp_type_Z[6]), .B(apb_d_resp_rd_data_net[1]), .C(tcm0_d_resp_rd_data_net[1]), .D(un2_cpu_d_resp_type_Z[10]), .Y(debug_sysbus_resp_rd_data_0_Z[1]) ); defparam \debug_sysbus_resp_rd_data_0[1] .INIT=16'hECA0; // @48:3715 CFG4 \debug_sysbus_resp_rd_data_0[6] ( .A(un2_cpu_d_resp_type_Z[6]), .B(apb_d_resp_rd_data_net[6]), .C(tcm0_d_resp_rd_data_net[6]), .D(un2_cpu_d_resp_type_Z[10]), .Y(debug_sysbus_resp_rd_data_0_0) ); defparam \debug_sysbus_resp_rd_data_0[6] .INIT=16'hECA0; // @48:3014 CFG4 un24_cpu_i_req_is_apb_17 ( .A(apb_i_req_addr_net[4]), .B(apb_i_req_addr_net[5]), .C(apb_i_req_addr_net[30]), .D(apb_i_req_addr_net[27]), .Y(un24_cpu_i_req_is_apb_17_1z) ); defparam un24_cpu_i_req_is_apb_17.INIT=16'h0001; // @48:3010 CFG4 un4_cpu_i_req_is_apb ( .A(apb_i_req_addr_net[29]), .B(apb_i_req_addr_net[28]), .C(apb_i_req_addr_net[31]), .D(apb_i_req_addr_net[30]), .Y(un4_cpu_i_req_is_apb_1z) ); defparam un4_cpu_i_req_is_apb.INIT=16'h0200; // @48:3158 CFG4 cpu_i_resp_valid ( .A(tcm0_i_resp_valid_net), .B(dummy_target_i_resp_valid_Z), .C(i_trx_resp[2]), .D(un1_cpu_i_resp_valid_Z), .Y(cpu_i_resp_valid_sel) ); defparam cpu_i_resp_valid.INIT=16'hFFEC; // @48:3721 CFG4 \un19_cpu_d_resp_rd_data_sig[3] ( .A(req_buffer_resp_sel[5]), .B(subsys_cfg_d_resp_valid), .C(subsys_cfg_d_resp_ready_Z), .D(req_buffer_resp_sel[0]), .Y(un19_cpu_d_resp_rd_data_sig_0) ); defparam \un19_cpu_d_resp_rd_data_sig[3] .INIT=16'h8000; // @48:3715 CFG4 \debug_sysbus_resp_rd_data[26] ( .A(un2_cpu_d_resp_type_Z[6]), .B(apb_d_resp_rd_data_net[26]), .C(tcm0_d_resp_rd_data_net[26]), .D(un2_cpu_d_resp_type_Z[10]), .Y(cpu_d_resp_rd_data_net[26]) ); defparam \debug_sysbus_resp_rd_data[26] .INIT=16'hECA0; // @48:3715 CFG4 \debug_sysbus_resp_rd_data[27] ( .A(un2_cpu_d_resp_type_Z[6]), .B(apb_d_resp_rd_data_net[27]), .C(tcm0_d_resp_rd_data_net[27]), .D(un2_cpu_d_resp_type_Z[10]), .Y(cpu_d_resp_rd_data_net[27]) ); defparam \debug_sysbus_resp_rd_data[27] .INIT=16'hECA0; // @48:3715 CFG4 \debug_sysbus_resp_rd_data[20] ( .A(un2_cpu_d_resp_type_Z[6]), .B(apb_d_resp_rd_data_net[20]), .C(tcm0_d_resp_rd_data_net[20]), .D(un2_cpu_d_resp_type_Z[10]), .Y(cpu_d_resp_rd_data_net[20]) ); defparam \debug_sysbus_resp_rd_data[20] .INIT=16'hECA0; // @48:3715 CFG4 \debug_sysbus_resp_rd_data[19] ( .A(un2_cpu_d_resp_type_Z[6]), .B(apb_d_resp_rd_data_net[19]), .C(tcm0_d_resp_rd_data_net[19]), .D(un2_cpu_d_resp_type_Z[10]), .Y(cpu_d_resp_rd_data_net[19]) ); defparam \debug_sysbus_resp_rd_data[19] .INIT=16'hECA0; // @48:3715 CFG4 \debug_sysbus_resp_rd_data[18] ( .A(un2_cpu_d_resp_type_Z[6]), .B(apb_d_resp_rd_data_net[18]), .C(tcm0_d_resp_rd_data_net[18]), .D(un2_cpu_d_resp_type_Z[10]), .Y(cpu_d_resp_rd_data_net[18]) ); defparam \debug_sysbus_resp_rd_data[18] .INIT=16'hECA0; // @48:3715 CFG4 \debug_sysbus_resp_rd_data[13] ( .A(un2_cpu_d_resp_type_Z[6]), .B(apb_d_resp_rd_data_net[13]), .C(tcm0_d_resp_rd_data_net[13]), .D(un2_cpu_d_resp_type_Z[10]), .Y(cpu_d_resp_rd_data_net[13]) ); defparam \debug_sysbus_resp_rd_data[13] .INIT=16'hECA0; // @48:3715 CFG4 \debug_sysbus_resp_rd_data[12] ( .A(un2_cpu_d_resp_type_Z[6]), .B(apb_d_resp_rd_data_net[12]), .C(tcm0_d_resp_rd_data_net[12]), .D(un2_cpu_d_resp_type_Z[10]), .Y(cpu_d_resp_rd_data_net[12]) ); defparam \debug_sysbus_resp_rd_data[12] .INIT=16'hECA0; // @48:3715 CFG4 \debug_sysbus_resp_rd_data[11] ( .A(un2_cpu_d_resp_type_Z[6]), .B(apb_d_resp_rd_data_net[11]), .C(tcm0_d_resp_rd_data_net[11]), .D(un2_cpu_d_resp_type_Z[10]), .Y(cpu_d_resp_rd_data_net[11]) ); defparam \debug_sysbus_resp_rd_data[11] .INIT=16'hECA0; // @48:3715 CFG4 \debug_sysbus_resp_rd_data[10] ( .A(un2_cpu_d_resp_type_Z[6]), .B(apb_d_resp_rd_data_net[10]), .C(tcm0_d_resp_rd_data_net[10]), .D(un2_cpu_d_resp_type_Z[10]), .Y(cpu_d_resp_rd_data_net[10]) ); defparam \debug_sysbus_resp_rd_data[10] .INIT=16'hECA0; // @48:3202 CFG4 \tcm0_d_req_addr[3] ( .A(trace_priv_i), .B(sba_req_addr_int[3]), .C(cpu_d_req_addr_net[3]), .D(sba_req_addr_1), .Y(apb_d_req_addr_net[3]) ); defparam \tcm0_d_req_addr[3] .INIT=16'hD850; // @48:3202 CFG4 \tcm0_d_req_addr[4] ( .A(trace_priv_i), .B(sba_req_addr_int[4]), .C(cpu_d_req_addr_net[4]), .D(sba_req_addr_1), .Y(apb_d_req_addr_net[4]) ); defparam \tcm0_d_req_addr[4] .INIT=16'hD850; // @48:3202 CFG4 \tcm0_d_req_addr[5] ( .A(trace_priv_i), .B(sba_req_addr_int[5]), .C(cpu_d_req_addr_net[5]), .D(sba_req_addr_1), .Y(apb_d_req_addr_net[5]) ); defparam \tcm0_d_req_addr[5] .INIT=16'hD850; // @48:3202 CFG4 \tcm0_d_req_addr[6] ( .A(trace_priv_i), .B(sba_req_addr_int[6]), .C(cpu_d_req_addr_net[6]), .D(sba_req_addr_1), .Y(apb_d_req_addr_net[6]) ); defparam \tcm0_d_req_addr[6] .INIT=16'hD850; // @48:3202 CFG4 \tcm0_d_req_addr[7] ( .A(trace_priv_i), .B(sba_req_addr_int[7]), .C(cpu_d_req_addr_net[7]), .D(sba_req_addr_1), .Y(apb_d_req_addr_net[7]) ); defparam \tcm0_d_req_addr[7] .INIT=16'hD850; // @48:3202 CFG4 \tcm0_d_req_addr[8] ( .A(trace_priv_i), .B(sba_req_addr_int[8]), .C(cpu_d_req_addr_net[8]), .D(sba_req_addr_1), .Y(apb_d_req_addr_net[8]) ); defparam \tcm0_d_req_addr[8] .INIT=16'hD850; // @48:3202 CFG4 \tcm0_d_req_addr[9] ( .A(trace_priv_i), .B(sba_req_addr_int[9]), .C(cpu_d_req_addr_net[9]), .D(sba_req_addr_1), .Y(apb_d_req_addr_net[9]) ); defparam \tcm0_d_req_addr[9] .INIT=16'hD850; // @48:3202 CFG4 \tcm0_d_req_addr[11] ( .A(trace_priv_i), .B(sba_req_addr_int[11]), .C(cpu_d_req_addr_net[11]), .D(sba_req_addr_1), .Y(apb_d_req_addr_net[11]) ); defparam \tcm0_d_req_addr[11] .INIT=16'hD850; // @48:3202 CFG4 \tcm0_d_req_addr[13] ( .A(trace_priv_i), .B(sba_req_addr_int[13]), .C(cpu_d_req_addr_net[13]), .D(sba_req_addr_1), .Y(apb_d_req_addr_net[13]) ); defparam \tcm0_d_req_addr[13] .INIT=16'hD850; // @48:3202 CFG4 \tcm0_d_req_addr[15] ( .A(trace_priv_i), .B(sba_req_addr_int[15]), .C(cpu_d_req_addr_net[15]), .D(sba_req_addr_1), .Y(apb_d_req_addr_net[15]) ); defparam \tcm0_d_req_addr[15] .INIT=16'hD850; // @48:3202 CFG4 \tcm0_d_req_addr[17] ( .A(trace_priv_i), .B(sba_req_addr_int[17]), .C(cpu_d_req_addr_net[17]), .D(sba_req_addr_1), .Y(apb_d_req_addr_net[17]) ); defparam \tcm0_d_req_addr[17] .INIT=16'hD850; // @48:3202 CFG4 \tcm0_d_req_addr[18] ( .A(trace_priv_i), .B(sba_req_addr_int[18]), .C(cpu_d_req_addr_net[18]), .D(sba_req_addr_1), .Y(apb_d_req_addr_net[18]) ); defparam \tcm0_d_req_addr[18] .INIT=16'hD850; // @48:3202 CFG4 \tcm0_d_req_addr[19] ( .A(trace_priv_i), .B(sba_req_addr_int[19]), .C(cpu_d_req_addr_net[19]), .D(sba_req_addr_1), .Y(apb_d_req_addr_net[19]) ); defparam \tcm0_d_req_addr[19] .INIT=16'hD850; // @48:3202 CFG4 \tcm0_d_req_addr[21] ( .A(trace_priv_i), .B(sba_req_addr_int[21]), .C(cpu_d_req_addr_net[21]), .D(sba_req_addr_1), .Y(apb_d_req_addr_net[21]) ); defparam \tcm0_d_req_addr[21] .INIT=16'hD850; // @48:3202 CFG4 \tcm0_d_req_addr[22] ( .A(trace_priv_i), .B(sba_req_addr_int[22]), .C(cpu_d_req_addr_net[22]), .D(sba_req_addr_1), .Y(apb_d_req_addr_net[22]) ); defparam \tcm0_d_req_addr[22] .INIT=16'hD850; // @48:3202 CFG4 \tcm0_d_req_addr[23] ( .A(trace_priv_i), .B(sba_req_addr_int[23]), .C(cpu_d_req_addr_net[23]), .D(sba_req_addr_1), .Y(apb_d_req_addr_net[23]) ); defparam \tcm0_d_req_addr[23] .INIT=16'hD850; // @48:3202 CFG4 \tcm0_d_req_addr[24] ( .A(trace_priv_i), .B(sba_req_addr_int[24]), .C(cpu_d_req_addr_net[24]), .D(sba_req_addr_1), .Y(apb_d_req_addr_net[24]) ); defparam \tcm0_d_req_addr[24] .INIT=16'hD850; // @48:3202 CFG4 \tcm0_d_req_addr[25] ( .A(trace_priv_i), .B(sba_req_addr_int[25]), .C(cpu_d_req_addr_net[25]), .D(sba_req_addr_1), .Y(apb_d_req_addr_net[25]) ); defparam \tcm0_d_req_addr[25] .INIT=16'hD850; // @48:3202 CFG4 \tcm0_d_req_addr[26] ( .A(trace_priv_i), .B(sba_req_addr_int[26]), .C(cpu_d_req_addr_net[26]), .D(sba_req_addr_1), .Y(apb_d_req_addr_net[26]) ); defparam \tcm0_d_req_addr[26] .INIT=16'hD850; // @48:3202 CFG4 \tcm0_d_req_addr[27] ( .A(trace_priv_i), .B(sba_req_addr_int[27]), .C(cpu_d_req_addr_net[27]), .D(sba_req_addr_1), .Y(apb_d_req_addr_net[27]) ); defparam \tcm0_d_req_addr[27] .INIT=16'hD850; // @48:3202 CFG4 \tcm0_d_req_addr[29] ( .A(trace_priv_i), .B(sba_req_addr_int[29]), .C(cpu_d_req_addr_net[29]), .D(sba_req_addr_1), .Y(apb_d_req_addr_net[29]) ); defparam \tcm0_d_req_addr[29] .INIT=16'hD850; // @48:3202 CFG4 \tcm0_d_req_addr[30] ( .A(trace_priv_i), .B(sba_req_addr_int[30]), .C(cpu_d_req_addr_net[30]), .D(sba_req_addr_1), .Y(apb_d_req_addr_net[30]) ); defparam \tcm0_d_req_addr[30] .INIT=16'hD850; // @48:3715 CFG4 \debug_sysbus_resp_rd_data[30] ( .A(un2_cpu_d_resp_type_Z[6]), .B(apb_d_resp_rd_data_net[30]), .C(tcm0_d_resp_rd_data_net[30]), .D(un2_cpu_d_resp_type_Z[10]), .Y(cpu_d_resp_rd_data_net[30]) ); defparam \debug_sysbus_resp_rd_data[30] .INIT=16'hECA0; // @48:3715 CFG4 \debug_sysbus_resp_rd_data[28] ( .A(un2_cpu_d_resp_type_Z[6]), .B(apb_d_resp_rd_data_net[28]), .C(tcm0_d_resp_rd_data_net[28]), .D(un2_cpu_d_resp_type_Z[10]), .Y(cpu_d_resp_rd_data_net[28]) ); defparam \debug_sysbus_resp_rd_data[28] .INIT=16'hECA0; // @48:3715 CFG4 \debug_sysbus_resp_rd_data[21] ( .A(un2_cpu_d_resp_type_Z[6]), .B(apb_d_resp_rd_data_net[21]), .C(tcm0_d_resp_rd_data_net[21]), .D(un2_cpu_d_resp_type_Z[10]), .Y(cpu_d_resp_rd_data_net[21]) ); defparam \debug_sysbus_resp_rd_data[21] .INIT=16'hECA0; // @48:3715 CFG4 \debug_sysbus_resp_rd_data[15] ( .A(un2_cpu_d_resp_type_Z[6]), .B(apb_d_resp_rd_data_net[15]), .C(tcm0_d_resp_rd_data_net[15]), .D(un2_cpu_d_resp_type_Z[10]), .Y(cpu_d_resp_rd_data_net[15]) ); defparam \debug_sysbus_resp_rd_data[15] .INIT=16'hECA0; // @48:3715 CFG4 \debug_sysbus_resp_rd_data[14] ( .A(un2_cpu_d_resp_type_Z[6]), .B(apb_d_resp_rd_data_net[14]), .C(tcm0_d_resp_rd_data_net[14]), .D(un2_cpu_d_resp_type_Z[10]), .Y(cpu_d_resp_rd_data_net[14]) ); defparam \debug_sysbus_resp_rd_data[14] .INIT=16'hECA0; // @48:3715 CFG4 \debug_sysbus_resp_rd_data[5] ( .A(un2_cpu_d_resp_type_Z[6]), .B(apb_d_resp_rd_data_net[5]), .C(tcm0_d_resp_rd_data_net[5]), .D(un2_cpu_d_resp_type_Z[10]), .Y(cpu_d_resp_rd_data_net[5]) ); defparam \debug_sysbus_resp_rd_data[5] .INIT=16'hECA0; // @48:3715 CFG4 \debug_sysbus_resp_rd_data[4] ( .A(un2_cpu_d_resp_type_Z[6]), .B(apb_d_resp_rd_data_net[4]), .C(tcm0_d_resp_rd_data_net[4]), .D(un2_cpu_d_resp_type_Z[10]), .Y(cpu_d_resp_rd_data_net[4]) ); defparam \debug_sysbus_resp_rd_data[4] .INIT=16'hECA0; // @48:3202 CFG4 \tcm0_d_req_addr[20] ( .A(trace_priv_i), .B(sba_req_addr_int[20]), .C(cpu_d_req_addr_net[20]), .D(sba_req_addr_1), .Y(apb_d_req_addr_net[20]) ); defparam \tcm0_d_req_addr[20] .INIT=16'hD850; // @48:3202 CFG4 \tcm0_d_req_addr[2] ( .A(trace_priv_i), .B(sba_req_addr_int[2]), .C(cpu_d_req_addr_net[2]), .D(sba_req_addr_1), .Y(apb_d_req_addr_net[2]) ); defparam \tcm0_d_req_addr[2] .INIT=16'hD850; // @48:3202 CFG4 \tcm0_d_req_addr[10] ( .A(trace_priv_i), .B(sba_req_addr_int[10]), .C(cpu_d_req_addr_net[10]), .D(sba_req_addr_1), .Y(apb_d_req_addr_net[10]) ); defparam \tcm0_d_req_addr[10] .INIT=16'hD850; // @48:3202 CFG4 \tcm0_d_req_addr[16] ( .A(trace_priv_i), .B(sba_req_addr_int[16]), .C(cpu_d_req_addr_net[16]), .D(sba_req_addr_1), .Y(apb_d_req_addr_net[16]) ); defparam \tcm0_d_req_addr[16] .INIT=16'hD850; // @48:3202 CFG4 \tcm0_d_req_addr[14] ( .A(trace_priv_i), .B(sba_req_addr_int[14]), .C(cpu_d_req_addr_net[14]), .D(sba_req_addr_1), .Y(apb_d_req_addr_net[14]) ); defparam \tcm0_d_req_addr[14] .INIT=16'hD850; // @48:3202 CFG4 \tcm0_d_req_addr[12] ( .A(trace_priv_i), .B(sba_req_addr_int[12]), .C(cpu_d_req_addr_net[12]), .D(sba_req_addr_1), .Y(apb_d_req_addr_net[12]) ); defparam \tcm0_d_req_addr[12] .INIT=16'hD850; // @48:3202 CFG4 \tcm0_d_req_addr[1] ( .A(trace_priv_i), .B(sba_req_addr_int[1]), .C(cpu_d_req_addr_net[1]), .D(sba_req_addr_1), .Y(apb_d_req_addr_net[1]) ); defparam \tcm0_d_req_addr[1] .INIT=16'hD850; // @48:3715 CFG4 \debug_sysbus_resp_rd_data[31] ( .A(un2_cpu_d_resp_type_Z[6]), .B(apb_d_resp_rd_data_net[31]), .C(tcm0_d_resp_rd_data_net[31]), .D(un2_cpu_d_resp_type_Z[10]), .Y(cpu_d_resp_rd_data_net[31]) ); defparam \debug_sysbus_resp_rd_data[31] .INIT=16'hECA0; // @48:3715 CFG4 \debug_sysbus_resp_rd_data[22] ( .A(un2_cpu_d_resp_type_Z[6]), .B(apb_d_resp_rd_data_net[22]), .C(tcm0_d_resp_rd_data_net[22]), .D(un2_cpu_d_resp_type_Z[10]), .Y(cpu_d_resp_rd_data_net[22]) ); defparam \debug_sysbus_resp_rd_data[22] .INIT=16'hECA0; // @48:3202 CFG4 \tcm0_d_req_addr[31] ( .A(trace_priv_i), .B(sba_req_addr_int[31]), .C(cpu_d_req_addr_net[31]), .D(sba_req_addr_1), .Y(apb_d_req_addr_net[31]) ); defparam \tcm0_d_req_addr[31] .INIT=16'hD850; // @48:3202 CFG4 \tcm0_d_req_addr[28] ( .A(trace_priv_i), .B(sba_req_addr_int[28]), .C(cpu_d_req_addr_net[28]), .D(sba_req_addr_1), .Y(apb_d_req_addr_net[28]) ); defparam \tcm0_d_req_addr[28] .INIT=16'hD850; // @48:3715 CFG4 \debug_sysbus_resp_rd_data[9] ( .A(un2_cpu_d_resp_type_Z[6]), .B(apb_d_resp_rd_data_net[9]), .C(tcm0_d_resp_rd_data_net[9]), .D(un2_cpu_d_resp_type_Z[10]), .Y(cpu_d_resp_rd_data_net[9]) ); defparam \debug_sysbus_resp_rd_data[9] .INIT=16'hECA0; // @48:3715 CFG4 \debug_sysbus_resp_rd_data[17] ( .A(un2_cpu_d_resp_type_Z[6]), .B(apb_d_resp_rd_data_net[17]), .C(tcm0_d_resp_rd_data_net[17]), .D(un2_cpu_d_resp_type_Z[10]), .Y(cpu_d_resp_rd_data_net[17]) ); defparam \debug_sysbus_resp_rd_data[17] .INIT=16'hECA0; // @48:3715 CFG4 \debug_sysbus_resp_rd_data[29] ( .A(un2_cpu_d_resp_type_Z[6]), .B(apb_d_resp_rd_data_net[29]), .C(tcm0_d_resp_rd_data_net[29]), .D(un2_cpu_d_resp_type_Z[10]), .Y(cpu_d_resp_rd_data_net[29]) ); defparam \debug_sysbus_resp_rd_data[29] .INIT=16'hECA0; // @48:3715 CFG4 \debug_sysbus_resp_rd_data[8] ( .A(un2_cpu_d_resp_type_Z[6]), .B(apb_d_resp_rd_data_net[8]), .C(tcm0_d_resp_rd_data_net[8]), .D(un2_cpu_d_resp_type_Z[10]), .Y(cpu_d_resp_rd_data_net[8]) ); defparam \debug_sysbus_resp_rd_data[8] .INIT=16'hECA0; // @48:3715 CFG4 \debug_sysbus_resp_rd_data[23] ( .A(un2_cpu_d_resp_type_Z[6]), .B(apb_d_resp_rd_data_net[23]), .C(tcm0_d_resp_rd_data_net[23]), .D(un2_cpu_d_resp_type_Z[10]), .Y(cpu_d_resp_rd_data_net[23]) ); defparam \debug_sysbus_resp_rd_data[23] .INIT=16'hECA0; // @48:3652 CFG4 tcm0_i_req_valid_2_1_RNIQPJ3N ( .A(cpu_d_wr_rd_state[1]), .B(tcm0_i_req_valid_2_1_Z), .C(hipri_req_ptr_0), .D(hipri_req_ptr_3), .Y(cpu_m8_0_a3_0_5_1) ); defparam tcm0_i_req_valid_2_1_RNIQPJ3N.INIT=16'h4440; // @48:3493 CFG4 tcm0_d_req_valid_2 ( .A(N_1154), .B(N_1155), .C(req_os_d_src_0), .D(N_1157), .Y(tcm0_d_req_valid_2_1z) ); defparam tcm0_d_req_valid_2.INIT=16'h0001; // @48:3684 CFG4 cpu_d_resp_valid_c_c ( .A(d_trx_resp[0]), .B(d_trx_resp_valid), .C(un8_cpu_d_resp_valid_sig_0_0_Z), .D(trace_priv_i), .Y(cpu_d_resp_valid_c_c_Z) ); defparam cpu_d_resp_valid_c_c.INIT=16'h0080; // @48:3202 CFG4 \tcm0_d_req_addr[0] ( .A(trace_priv_i), .B(sba_req_addr_int[0]), .C(bcu_result_cry_0_Y), .D(sba_req_addr_1), .Y(apb_d_req_addr_net[0]) ); defparam \tcm0_d_req_addr[0] .INIT=16'hD850; // @48:3014 CFG4 un24_cpu_i_req_is_apb_19_12 ( .A(apb_i_req_addr_net[13]), .B(apb_i_req_addr_net[31]), .C(un24_cpu_i_req_is_apb_19_9_Z), .D(cpu_i_req_is_tcm0_4_2_0_Z), .Y(un24_cpu_i_req_is_apb_1) ); defparam un24_cpu_i_req_is_apb_19_12.INIT=16'h1000; // @48:3299 CFG2 cpu_d_req_is_apb_0_a2_1_1 ( .A(apb_d_req_addr_net[12]), .B(apb_d_req_addr_net[10]), .Y(cpu_d_req_is_apb_0_a2_1_1_Z) ); defparam cpu_d_req_is_apb_0_a2_1_1.INIT=4'h8; // @48:3076 CFG3 \gen_tcm0_i_decode.un8_cpu_i_req_is_tcm0lto18_12 ( .A(apb_i_req_addr_net[30]), .B(gen_m3_2_Z), .C(apb_i_req_addr_net[27]), .Y(un8_cpu_i_req_is_tcm0lt19_12) ); defparam \gen_tcm0_i_decode.un8_cpu_i_req_is_tcm0lto18_12 .INIT=8'hFB; // @48:3715 CFG4 \debug_sysbus_resp_rd_data[3] ( .A(un19_cpu_d_resp_rd_data_sig_0), .B(tcm0_d_resp_rd_data_net[3]), .C(un2_cpu_d_resp_type_Z[6]), .D(un1_cpu_d_resp_rd_data_sig_Z[3]), .Y(cpu_d_resp_rd_data_net[3]) ); defparam \debug_sysbus_resp_rd_data[3] .INIT=16'hFFEA; // @48:3715 CFG4 \debug_sysbus_resp_rd_data[16] ( .A(un2_cpu_d_resp_type_Z[10]), .B(apb_d_resp_rd_data_net[16]), .C(un10_cpu_d_resp_rd_data_sig_Z[16]), .D(un19_cpu_d_resp_rd_data_sig_0), .Y(cpu_d_resp_rd_data_net[16]) ); defparam \debug_sysbus_resp_rd_data[16] .INIT=16'hFFF8; // @48:3715 CFG4 \debug_sysbus_resp_rd_data[25] ( .A(un2_cpu_d_resp_type_Z[10]), .B(apb_d_resp_rd_data_net[25]), .C(un10_cpu_d_resp_rd_data_sig_Z[25]), .D(un19_cpu_d_resp_rd_data_sig_0), .Y(cpu_d_resp_rd_data_net[25]) ); defparam \debug_sysbus_resp_rd_data[25] .INIT=16'hFFF8; // @48:3715 CFG4 \debug_sysbus_resp_rd_data[24] ( .A(un2_cpu_d_resp_type_Z[10]), .B(apb_d_resp_rd_data_net[24]), .C(un10_cpu_d_resp_rd_data_sig_Z[24]), .D(un19_cpu_d_resp_rd_data_sig_0), .Y(cpu_d_resp_rd_data_net[24]) ); defparam \debug_sysbus_resp_rd_data[24] .INIT=16'hFFF8; // @48:3715 CFG2 \debug_sysbus_resp_rd_data[6] ( .A(debug_sysbus_resp_rd_data_0_0), .B(un19_cpu_d_resp_rd_data_sig_0), .Y(cpu_d_resp_rd_data_net[6]) ); defparam \debug_sysbus_resp_rd_data[6] .INIT=4'hE; // @48:3715 CFG4 \debug_sysbus_resp_rd_data[7] ( .A(un19_cpu_d_resp_rd_data_sig_0), .B(tcm0_d_resp_rd_data_net[7]), .C(un1_cpu_d_resp_rd_data_sig_Z[7]), .D(un2_cpu_d_resp_type_Z[6]), .Y(cpu_d_resp_rd_data_net[7]) ); defparam \debug_sysbus_resp_rd_data[7] .INIT=16'hFEFA; // @48:3299 CFG2 cpu_d_req_is_apb_0_a2_0_1 ( .A(apb_d_req_addr_net[6]), .B(apb_d_req_addr_net[3]), .Y(N_90_1) ); defparam cpu_d_req_is_apb_0_a2_0_1.INIT=4'h1; // @48:3299 CFG2 cpu_d_req_is_apb_0_a2_1_3 ( .A(apb_d_req_addr_net[6]), .B(apb_d_req_addr_net[3]), .Y(N_91_3) ); defparam cpu_d_req_is_apb_0_a2_1_3.INIT=4'h8; // @48:3482 CFG2 \gen_tcm0_d_decode.un8_cpu_d_req_is_tcm0lto18_8 ( .A(apb_d_req_addr_net[29]), .B(apb_d_req_addr_net[30]), .Y(un8_cpu_d_req_is_tcm0lt19_8) ); defparam \gen_tcm0_d_decode.un8_cpu_d_req_is_tcm0lto18_8 .INIT=4'hE; // @48:3299 CFG2 cpu_d_req_is_apb_0_a2_2 ( .A(apb_d_req_addr_net[31]), .B(apb_d_req_addr_net[28]), .Y(N_115) ); defparam cpu_d_req_is_apb_0_a2_2.INIT=4'h1; // @48:3482 CFG2 \gen_tcm0_d_decode.un8_cpu_d_req_is_tcm0lto18_7 ( .A(apb_d_req_addr_net[28]), .B(apb_d_req_addr_net[27]), .Y(un8_cpu_d_req_is_tcm0lt19_7) ); defparam \gen_tcm0_d_decode.un8_cpu_d_req_is_tcm0lto18_7 .INIT=4'hE; // @48:3680 CFG4 cpu_d_resp_valid_sig_0 ( .A(d_trx_resp[0]), .B(un8_cpu_d_resp_valid_sig_0_0_Z), .C(un9_cpu_d_resp_valid_sig_Z), .D(d_trx_resp_valid), .Y(cpu_d_resp_valid_sig_0_Z) ); defparam cpu_d_resp_valid_sig_0.INIT=16'hF8F0; // @48:3200 CFG4 un1_cpu_d_req_read_mux ( .A(debug_sysbus_req_rd_byte_en_net[3]), .B(debug_sysbus_req_rd_byte_en_net[2]), .C(debug_sysbus_req_rd_byte_en_net[1]), .D(debug_sysbus_req_rd_byte_en_net[0]), .Y(un1_cpu_d_req_read_mux_Z) ); defparam un1_cpu_d_req_read_mux.INIT=16'hFFFE; // @48:3201 CFG4 un1_cpu_d_req_write_mux ( .A(debug_sysbus_req_wr_byte_en_net[3]), .B(debug_sysbus_req_wr_byte_en_net[2]), .C(debug_sysbus_req_wr_byte_en_net[1]), .D(debug_sysbus_req_wr_byte_en_net[0]), .Y(un1_cpu_d_req_write_mux_Z) ); defparam un1_cpu_d_req_write_mux.INIT=16'hFFFE; // @48:3014 CFG4 un24_cpu_i_req_is_apb_0 ( .A(cpu_i_req_is_tcm0_5_0_1z), .B(apb_i_req_addr_net[19]), .C(gen_m3_1z), .D(apb_i_req_addr_net[20]), .Y(un24_cpu_i_req_is_apb_0_Z) ); defparam un24_cpu_i_req_is_apb_0.INIT=16'h0020; // @48:3481 CFG4 cpu_d_req_is_tcm0_3_0 ( .A(apb_d_req_addr_net[22]), .B(apb_d_req_addr_net[23]), .C(apb_d_req_addr_net[24]), .D(apb_d_req_addr_net[26]), .Y(cpu_d_req_is_tcm0_3_0_Z) ); defparam cpu_d_req_is_tcm0_3_0.INIT=16'h0001; // @48:3481 CFG4 cpu_d_req_is_tcm0_2_0 ( .A(apb_d_req_addr_net[18]), .B(apb_d_req_addr_net[19]), .C(apb_d_req_addr_net[21]), .D(apb_d_req_addr_net[20]), .Y(cpu_d_req_is_tcm0_2_0_Z) ); defparam cpu_d_req_is_tcm0_2_0.INIT=16'h0001; // @48:3481 CFG4 cpu_d_req_is_tcm0_1_0 ( .A(apb_d_req_addr_net[16]), .B(apb_d_req_addr_net[17]), .C(apb_d_req_addr_net[25]), .D(apb_d_req_addr_net[31]), .Y(cpu_d_req_is_tcm0_1_0_Z) ); defparam cpu_d_req_is_tcm0_1_0.INIT=16'h0100; // @48:3299 CFG4 cpu_d_req_is_apb_0_a2_0_4 ( .A(apb_d_req_addr_net[13]), .B(apb_d_req_addr_net[14]), .C(apb_d_req_addr_net[25]), .D(apb_d_req_addr_net[29]), .Y(cpu_d_req_is_apb_0_a2_0_4_Z) ); defparam cpu_d_req_is_apb_0_a2_0_4.INIT=16'h0040; // @48:3299 CFG4 cpu_d_req_is_apb_0_a2_1_5 ( .A(apb_d_req_addr_net[13]), .B(apb_d_req_addr_net[15]), .C(apb_d_req_addr_net[14]), .D(apb_d_req_addr_net[25]), .Y(cpu_d_req_is_apb_0_a2_1_5_Z) ); defparam cpu_d_req_is_apb_0_a2_1_5.INIT=16'h0800; // @48:3299 CFG3 cpu_d_req_is_apb_0_a2_3_0 ( .A(apb_d_req_addr_net[16]), .B(apb_d_req_addr_net[17]), .C(apb_d_req_addr_net[27]), .Y(cpu_d_req_is_apb_0_a2_3_0_Z) ); defparam cpu_d_req_is_apb_0_a2_3_0.INIT=8'h01; // @48:3684 CFG4 cpu_d_resp_valid_d ( .A(d_trx_resp[1]), .B(trace_priv_i), .C(cpu_d_resp_valid_rd_Z), .D(d_trx_resp_valid), .Y(cpu_d_resp_valid_d_1z) ); defparam cpu_d_resp_valid_d.INIT=16'h1000; // @48:3299 CFG4 cpu_d_req_is_apb_0_a2_1_9 ( .A(apb_d_req_addr_net[7]), .B(apb_d_req_addr_net[8]), .C(apb_d_req_addr_net[9]), .D(apb_d_req_addr_net[11]), .Y(N_91_9) ); defparam cpu_d_req_is_apb_0_a2_1_9.INIT=16'h8000; // @48:3715 CFG3 \debug_sysbus_resp_rd_data[1] ( .A(debug_sysbus_resp_rd_data_0_Z[1]), .B(hart_soft_irq_net), .C(read_subsys_hart_soft_reg), .Y(cpu_d_resp_rd_data_net[1]) ); defparam \debug_sysbus_resp_rd_data[1] .INIT=8'hEA; // @48:3715 CFG3 \debug_sysbus_resp_rd_data[2] ( .A(subsys_hart_gpr_ded_reset_reg), .B(read_subsys_hart_soft_reg), .C(debug_sysbus_resp_rd_data_0_Z[2]), .Y(cpu_d_resp_rd_data_net[2]) ); defparam \debug_sysbus_resp_rd_data[2] .INIT=8'hF8; // @48:3715 CFG3 \debug_sysbus_resp_rd_data[0] ( .A(debug_sysbus_resp_rd_data_0_Z[0]), .B(hart_soft_reset_net), .C(read_subsys_hart_soft_reg), .Y(cpu_d_resp_rd_data_net[0]) ); defparam \debug_sysbus_resp_rd_data[0] .INIT=8'hEA; // @48:3075 CFG4 cpu_i_req_is_tcm0_5 ( .A(cpu_i_req_is_tcm0_5_0_1z), .B(gen_m3_2_Z), .C(apb_i_req_addr_net[30]), .D(apb_i_req_addr_net[27]), .Y(cpu_i_req_is_tcm0_5_1z) ); defparam cpu_i_req_is_tcm0_5.INIT=16'h0008; // @48:3684 CFG4 cpu_d_resp_valid_c_0 ( .A(trace_priv_i), .B(cpu_d_resp_valid_c_0_0_Z), .C(un9_cpu_d_resp_valid_sig_Z), .D(cpu_d_resp_valid_c_c_Z), .Y(un1_lsu_resp_valid_1) ); defparam cpu_d_resp_valid_c_0.INIT=16'hFFDC; // @48:3198 CFG4 \tcm0_d_req_rd_byte_en[0] ( .A(trace_priv_i), .B(debug_sysbus_req_rd_byte_en_net[0]), .C(un5_lsu_emi_req_rd_byte_en), .D(N_84), .Y(tcm0_d_req_rd_byte_en_Z[0]) ); defparam \tcm0_d_req_rd_byte_en[0] .INIT=16'h88D8; // @48:3198 CFG4 \tcm0_d_req_rd_byte_en[3] ( .A(trace_priv_i), .B(debug_sysbus_req_rd_byte_en_net[3]), .C(un24_lsu_emi_req_rd_byte_en), .D(un1_lsu_expipe_req_op_4), .Y(tcm0_d_req_rd_byte_en_Z[3]) ); defparam \tcm0_d_req_rd_byte_en[3] .INIT=16'hD888; // @48:3199 CFG4 \tcm0_d_req_wr_byte_en[0] ( .A(trace_priv_i), .B(debug_sysbus_req_wr_byte_en_net[0]), .C(un5_lsu_emi_req_rd_byte_en), .D(un1_lsu_emi_req_valid46), .Y(apb_d_req_wr_byte_en_net[0]) ); defparam \tcm0_d_req_wr_byte_en[0] .INIT=16'hD888; // @48:3299 CFG4 cpu_d_req_is_apb_0_a2_0_5 ( .A(apb_d_req_addr_net[30]), .B(N_90_1), .C(apb_d_req_addr_net[5]), .D(apb_d_req_addr_net[4]), .Y(cpu_d_req_is_apb_0_a2_0_5_Z) ); defparam cpu_d_req_is_apb_0_a2_0_5.INIT=16'h0004; // @48:3299 CFG4 cpu_d_req_is_apb_0_a2_1_6 ( .A(N_91_3), .B(cpu_d_req_is_apb_0_a2_1_1_Z), .C(apb_d_req_addr_net[5]), .D(apb_d_req_addr_net[4]), .Y(cpu_d_req_is_apb_0_a2_1_6_Z) ); defparam cpu_d_req_is_apb_0_a2_1_6.INIT=16'h8000; // @48:3075 CFG3 cpu_i_req_is_tcm0_0 ( .A(un8_cpu_i_req_is_tcm0lt19_10), .B(un8_cpu_i_req_is_tcm0lt18), .C(cpu_i_req_is_tcm0_4_2_1z), .Y(cpu_m8_0_a3_0_3) ); defparam cpu_i_req_is_tcm0_0.INIT=8'h10; // @48:3680 CFG4 cpu_d_resp_valid_sig ( .A(d_trx_resp[1]), .B(d_trx_resp_valid), .C(cpu_d_resp_valid_rd_Z), .D(cpu_d_resp_valid_sig_0_Z), .Y(cpu_d_resp_valid_sig_1z) ); defparam cpu_d_resp_valid_sig.INIT=16'hFF40; // @48:3482 CFG4 \gen_tcm0_d_decode.un8_cpu_d_req_is_tcm0lto3 ( .A(apb_d_req_addr_net[13]), .B(apb_d_req_addr_net[12]), .C(apb_d_req_addr_net[14]), .D(apb_d_req_addr_net[15]), .Y(un8_cpu_d_req_is_tcm0lt18) ); defparam \gen_tcm0_d_decode.un8_cpu_d_req_is_tcm0lto3 .INIT=16'hFE00; // @48:3200 CFG3 tcm0_d_req_read ( .A(N_84), .B(trace_priv_i), .C(un1_cpu_d_req_read_mux_Z), .Y(tcm0_d_req_read_Z) ); defparam tcm0_d_req_read.INIT=8'hD1; // @48:3201 CFG4 tcm0_d_req_write ( .A(N_90), .B(lsu_emi_req_valid47), .C(trace_priv_i), .D(un1_cpu_d_req_write_mux_Z), .Y(tcm0_d_req_write_Z) ); defparam tcm0_d_req_write.INIT=16'hFE0E; // @46:19416 CFG2 cpu_d_resp_valid_c_0_RNI6PJI7 ( .A(un1_lsu_resp_valid_1), .B(cpu_d_resp_valid_d_1z), .Y(un1_lsu_resp_valid) ); defparam cpu_d_resp_valid_c_0_RNI6PJI7.INIT=4'hE; // @48:3481 CFG4 cpu_d_req_is_tcm0_7 ( .A(cpu_d_req_is_tcm0_1_0_Z), .B(un8_cpu_d_req_is_tcm0lt19_8), .C(cpu_d_req_is_tcm0_2_0_Z), .D(un8_cpu_d_req_is_tcm0lt19_7), .Y(cpu_d_req_is_tcm0_7_Z) ); defparam cpu_d_req_is_tcm0_7.INIT=16'h0020; // @48:3299 CFG4 cpu_d_req_is_apb_0_a2_3 ( .A(cpu_d_req_is_tcm0_2_0_Z), .B(cpu_d_req_is_tcm0_3_0_Z), .C(N_115), .D(cpu_d_req_is_apb_0_a2_3_0_Z), .Y(N_126) ); defparam cpu_d_req_is_apb_0_a2_3.INIT=16'h8000; // @48:3014 CFG4 un24_cpu_i_req_is_apb ( .A(un24_cpu_i_req_is_apb_17_1z), .B(un24_cpu_i_req_is_apb_0_Z), .C(un24_cpu_i_req_is_apb_1), .D(un24_cpu_i_req_is_apb_19_11_1z), .Y(un24_cpu_i_req_is_apb_Z) ); defparam un24_cpu_i_req_is_apb.INIT=16'h8000; // @48:3326 CFG4 cpu_d_req_is_subsys_cfg_0_o2 ( .A(apb_d_req_addr_net[12]), .B(apb_d_req_addr_net[13]), .C(apb_d_req_addr_net[14]), .D(un8_cpu_d_req_is_tcm0lt19_7), .Y(N_1162) ); defparam cpu_d_req_is_subsys_cfg_0_o2.INIT=16'h7F40; // @48:3712 CFG2 debug_sysbus_resp_error ( .A(cpu_d_resp_error_sig_1z), .B(trace_priv_i), .Y(debug_sysbus_resp_error_net) ); defparam debug_sysbus_resp_error.INIT=4'h8; // @48:3217 CFG2 cpu_d_req_type_1s2 ( .A(tcm0_d_req_write_Z), .B(tcm0_d_req_read_Z), .Y(cpu_d_req_type_1_sm0) ); defparam cpu_d_req_type_1s2.INIT=4'h1; // @48:3293 CFG3 un1_cpu_d_req_accepted_1 ( .A(cpu_d_req_is_fence_Z), .B(tcm0_d_req_rd_byte_en_Z[3]), .C(tcm0_d_req_rd_byte_en_Z[0]), .Y(un1_cpu_d_req_accepted_1_Z) ); defparam un1_cpu_d_req_accepted_1.INIT=8'hFE; // @48:3299 CFG4 cpu_d_req_is_apb_0_a2_1_9_2 ( .A(N_91_9), .B(cpu_d_req_is_apb_0_a2_1_6_Z), .C(cpu_d_req_is_apb_0_a2_1_5_Z), .D(un8_cpu_d_req_is_tcm0lt19_8), .Y(cpu_d_req_is_apb_0_a2_1_9_Z) ); defparam cpu_d_req_is_apb_0_a2_1_9_2.INIT=16'h0080; // @48:3299 CFG4 cpu_d_req_is_apb_0_a2 ( .A(N_115), .B(cpu_d_req_type_1_sm0), .C(apb_d_req_addr_net[30]), .D(apb_d_req_addr_net[29]), .Y(N_1178) ); defparam cpu_d_req_is_apb_0_a2.INIT=16'h2000; // @48:3299 CFG2 cpu_d_req_is_apb_0_a2_4 ( .A(N_126), .B(apb_d_req_addr_net[15]), .Y(N_129) ); defparam cpu_d_req_is_apb_0_a2_4.INIT=4'h2; // @48:3199 CFG4 \tcm0_d_req_wr_byte_en_1[2] ( .A(N_145), .B(trace_priv_i), .C(lsu_emi_req_rd_byte_en_2_0), .D(un1_lsu_emi_req_valid46_1), .Y(apb_d_req_wr_byte_en_net_1[2]) ); defparam \tcm0_d_req_wr_byte_en_1[2] .INIT=16'h3022; // @48:3299 CFG4 cpu_d_req_is_apb_0_a2_0 ( .A(N_129), .B(req_buffer_reg_sel_2_0[1]), .C(cpu_d_req_is_apb_0_a2_0_4_Z), .D(cpu_d_req_is_apb_0_a2_0_5_Z), .Y(N_90_0) ); defparam cpu_d_req_is_apb_0_a2_0.INIT=16'h8000; // @48:3010 CFG4 cpu_i_req_is_apb ( .A(un4_cpu_i_req_is_apb_1z), .B(un24_cpu_i_req_is_apb_Z), .C(un16_cpu_i_req_is_apb_22_Z), .D(un16_cpu_i_req_is_apb_23_Z), .Y(cpu_i_req_is_apb_1z) ); defparam cpu_i_req_is_apb.INIT=16'hFEEE; // @48:3481 CFG4 cpu_d_req_is_tcm0 ( .A(cpu_d_req_is_tcm0_7_Z), .B(cpu_d_req_type_1_sm0), .C(cpu_d_req_is_tcm0_3_0_Z), .D(un8_cpu_d_req_is_tcm0lt18), .Y(cpu_d_req_is_tcm0_1z) ); defparam cpu_d_req_is_tcm0.INIT=16'h0020; // @48:3326 CFG4 cpu_d_req_is_subsys_cfg_0_a2 ( .A(un8_cpu_d_req_is_tcm0lt19_8), .B(N_129), .C(apb_d_req_addr_net[25]), .D(N_1162), .Y(cpu_d_req_is_subsys_cfg) ); defparam cpu_d_req_is_subsys_cfg_0_a2.INIT=16'h0400; // @48:3199 CFG3 \tcm0_d_req_wr_byte_en[2] ( .A(trace_priv_i), .B(debug_sysbus_req_wr_byte_en_net[2]), .C(apb_d_req_wr_byte_en_net_1[2]), .Y(apb_d_req_wr_byte_en_net[2]) ); defparam \tcm0_d_req_wr_byte_en[2] .INIT=8'hF8; // @48:3337 CFG3 subsys_cfg_d_req_valid_0_a2_0 ( .A(cpu_d_req_is_subsys_cfg), .B(N_110), .C(d_trx_resp_valid_pkd[0]), .Y(N_137) ); defparam subsys_cfg_d_req_valid_0_a2_0.INIT=8'h8A; // @48:3652 CFG4 cpu_m8_0_a3_0_2_a0_0 ( .A(un3_branch_cond_ex[0]), .B(un1_instr_inhibit_ex), .C(stage_state_ex), .D(un3_branch_cond_ex[1]), .Y(cpu_m8_0_a3_0_2_a0_0_Z) ); defparam cpu_m8_0_a3_0_2_a0_0.INIT=16'h1500; // @48:3299 CFG4 cpu_d_req_is_apb_0_0 ( .A(N_126), .B(N_90_0), .C(cpu_d_req_is_apb_0_a2_1_9_Z), .D(N_1178), .Y(cpu_d_req_is_apb) ); defparam cpu_d_req_is_apb_0_0.INIT=16'hFFEC; // @48:3146 CFG3 un2_cpu_i_req_ready ( .A(req_masked[0]), .B(apb_i_req_ready_net_tz), .C(cpu_i_req_is_apb_1z), .Y(un2_cpu_i_req_ready_1z) ); defparam un2_cpu_i_req_ready.INIT=8'h80; // @48:3198 CFG3 \tcm0_d_req_rd_byte_en[1] ( .A(trace_priv_i), .B(debug_sysbus_req_rd_byte_en_net[1]), .C(cpu_d_req_rd_byte_en_net_1_0), .Y(tcm0_d_req_rd_byte_en_Z[1]) ); defparam \tcm0_d_req_rd_byte_en[1] .INIT=8'hD8; // @48:3198 CFG4 \tcm0_d_req_rd_byte_en[2] ( .A(debug_sysbus_req_rd_byte_en_net[2]), .B(trace_priv_i), .C(lsu_emi_req_rd_byte_en_iv_0_0), .D(lsu_emi_req_rd_byte_en_3_m_0), .Y(tcm0_d_req_rd_byte_en_Z[2]) ); defparam \tcm0_d_req_rd_byte_en[2] .INIT=16'hBBB8; // @48:3652 CFG4 tcm0_i_req_valid_2_1_RNIPTG3A1 ( .A(cpu_m8_0_a3_0_5_1), .B(ifu_emi_req_valid_i_0), .C(cpu_m8_0_a3_0_2_a1_0_Z), .D(ifu_expipe_req_branch_excpt_req_valid_1_0), .Y(cpu_m8_0_a3_0_5_3) ); defparam tcm0_i_req_valid_2_1_RNIPTG3A1.INIT=16'h2202; // @48:3600 CFG4 cpu_d_req_is_dummy_target ( .A(cpu_d_req_type_1_sm0), .B(cpu_d_req_is_subsys_cfg), .C(cpu_d_req_is_apb), .D(cpu_d_req_is_tcm0_1z), .Y(cpu_d_req_is_dummy_target_Z) ); defparam cpu_d_req_is_dummy_target.INIT=16'h0001; // @48:3652 CFG2 un1_cpu_d_req_ready_sig_d_0 ( .A(req_masked[1]), .B(cpu_d_req_is_apb), .Y(un1_cpu_d_req_ready_sig_d_0_1z) ); defparam un1_cpu_d_req_ready_sig_d_0.INIT=4'h8; // @48:3652 CFG3 un1_cpu_d_req_ready_sig_c ( .A(req_masked[1]), .B(N_64), .C(cpu_d_req_is_apb), .Y(un1_cpu_d_req_ready_sig_c_1z) ); defparam un1_cpu_d_req_ready_sig_c.INIT=8'h80; // @48:3205 CFG4 \tcm0_d_req_wr_data[18] ( .A(trace_priv_i), .B(sba_req_wr_data_int[18]), .C(cpu_d_req_wr_data_net[18]), .D(N_807), .Y(apb_d_req_wr_data_net[18]) ); defparam \tcm0_d_req_wr_data[18] .INIT=16'h50D8; // @48:3205 CFG4 \tcm0_d_req_wr_data[17] ( .A(trace_priv_i), .B(sba_req_wr_data_int[17]), .C(cpu_d_req_wr_data_net[17]), .D(N_807), .Y(apb_d_req_wr_data_net[17]) ); defparam \tcm0_d_req_wr_data[17] .INIT=16'h50D8; // @48:3652 CFG4 cpu_d_req_ready_sig_1 ( .A(subsys_cfg_d_req_ready), .B(cpu_d_req_is_fence_Z), .C(cpu_d_req_is_subsys_cfg), .D(cpu_d_req_is_dummy_target_Z), .Y(cpu_d_req_ready_sig_1_Z) ); defparam cpu_d_req_ready_sig_1.INIT=16'hFFEC; // @48:3205 CFG4 \tcm0_d_req_wr_data[19] ( .A(trace_priv_i), .B(sba_req_wr_data_int[19]), .C(cpu_d_req_wr_data_net[19]), .D(N_807), .Y(apb_d_req_wr_data_net[19]) ); defparam \tcm0_d_req_wr_data[19] .INIT=16'h50D8; // @48:3205 CFG4 \tcm0_d_req_wr_data[20] ( .A(trace_priv_i), .B(sba_req_wr_data_int[20]), .C(cpu_d_req_wr_data_net[20]), .D(N_807), .Y(apb_d_req_wr_data_net[20]) ); defparam \tcm0_d_req_wr_data[20] .INIT=16'h50D8; // @48:3199 CFG4 \tcm0_d_req_wr_byte_en[1] ( .A(debug_sysbus_req_wr_byte_en_net[1]), .B(trace_priv_i), .C(cpu_d_req_wr_byte_en_net_2_0), .D(cpu_d_req_wr_byte_en_net_1_0), .Y(apb_d_req_wr_byte_en_net[1]) ); defparam \tcm0_d_req_wr_byte_en[1] .INIT=16'hBBB8; // @48:3199 CFG4 \tcm0_d_req_wr_byte_en[3] ( .A(debug_sysbus_req_wr_byte_en_net[3]), .B(trace_priv_i), .C(cpu_d_req_wr_byte_en_net_2_2), .D(cpu_d_req_wr_byte_en_net_1_0), .Y(apb_d_req_wr_byte_en_net[3]) ); defparam \tcm0_d_req_wr_byte_en[3] .INIT=16'hBBB8; // @48:3205 CFG4 \tcm0_d_req_wr_data[21] ( .A(trace_priv_i), .B(sba_req_wr_data_int[21]), .C(cpu_d_req_wr_data_net[21]), .D(N_807), .Y(apb_d_req_wr_data_net[21]) ); defparam \tcm0_d_req_wr_data[21] .INIT=16'h50D8; // @48:3205 CFG4 \tcm0_d_req_wr_data[23] ( .A(trace_priv_i), .B(sba_req_wr_data_int[23]), .C(cpu_d_req_wr_data_net[23]), .D(N_807), .Y(apb_d_req_wr_data_net[23]) ); defparam \tcm0_d_req_wr_data[23] .INIT=16'h50D8; // @48:3205 CFG4 \tcm0_d_req_wr_data[22] ( .A(trace_priv_i), .B(sba_req_wr_data_int[22]), .C(cpu_d_req_wr_data_net[22]), .D(N_807), .Y(apb_d_req_wr_data_net[22]) ); defparam \tcm0_d_req_wr_data[22] .INIT=16'h50D8; // @48:3205 CFG4 \tcm0_d_req_wr_data[8] ( .A(trace_priv_i), .B(sba_req_wr_data_int[8]), .C(cpu_d_req_wr_data_net[8]), .D(N_807), .Y(apb_d_req_wr_data_net[8]) ); defparam \tcm0_d_req_wr_data[8] .INIT=16'h50D8; // @48:3205 CFG4 \tcm0_d_req_wr_data[10] ( .A(trace_priv_i), .B(sba_req_wr_data_int[10]), .C(cpu_d_req_wr_data_net[10]), .D(N_807), .Y(apb_d_req_wr_data_net[10]) ); defparam \tcm0_d_req_wr_data[10] .INIT=16'h50D8; // @48:3205 CFG4 \tcm0_d_req_wr_data[12] ( .A(trace_priv_i), .B(sba_req_wr_data_int[12]), .C(cpu_d_req_wr_data_net[12]), .D(N_807), .Y(apb_d_req_wr_data_net[12]) ); defparam \tcm0_d_req_wr_data[12] .INIT=16'h50D8; // @48:3205 CFG4 \tcm0_d_req_wr_data[13] ( .A(trace_priv_i), .B(sba_req_wr_data_int[13]), .C(cpu_d_req_wr_data_net[13]), .D(N_807), .Y(apb_d_req_wr_data_net[13]) ); defparam \tcm0_d_req_wr_data[13] .INIT=16'h50D8; // @48:3205 CFG4 \tcm0_d_req_wr_data[14] ( .A(trace_priv_i), .B(sba_req_wr_data_int[14]), .C(cpu_d_req_wr_data_net[14]), .D(N_807), .Y(apb_d_req_wr_data_net[14]) ); defparam \tcm0_d_req_wr_data[14] .INIT=16'h50D8; // @48:3205 CFG4 \tcm0_d_req_wr_data[15] ( .A(trace_priv_i), .B(sba_req_wr_data_int[15]), .C(cpu_d_req_wr_data_net[15]), .D(N_807), .Y(apb_d_req_wr_data_net[15]) ); defparam \tcm0_d_req_wr_data[15] .INIT=16'h50D8; // @48:3205 CFG4 \tcm0_d_req_wr_data[5] ( .A(trace_priv_i), .B(sba_req_wr_data_int[5]), .C(cpu_d_req_wr_data_net[5]), .D(N_807), .Y(apb_d_req_wr_data_net[5]) ); defparam \tcm0_d_req_wr_data[5] .INIT=16'h50D8; // @48:3205 CFG4 \tcm0_d_req_wr_data[4] ( .A(trace_priv_i), .B(sba_req_wr_data_int[4]), .C(cpu_d_req_wr_data_net[4]), .D(N_807), .Y(apb_d_req_wr_data_net[4]) ); defparam \tcm0_d_req_wr_data[4] .INIT=16'h50D8; // @48:3205 CFG4 \tcm0_d_req_wr_data[3] ( .A(trace_priv_i), .B(sba_req_wr_data_int[3]), .C(cpu_d_req_wr_data_net[3]), .D(N_807), .Y(apb_d_req_wr_data_net[3]) ); defparam \tcm0_d_req_wr_data[3] .INIT=16'h50D8; // @48:3205 CFG4 \tcm0_d_req_wr_data[2] ( .A(trace_priv_i), .B(sba_req_wr_data_int[2]), .C(cpu_d_req_wr_data_net[2]), .D(N_807), .Y(apb_d_req_wr_data_net[2]) ); defparam \tcm0_d_req_wr_data[2] .INIT=16'h50D8; // @48:3205 CFG4 \tcm0_d_req_wr_data[11] ( .A(trace_priv_i), .B(sba_req_wr_data_int[11]), .C(cpu_d_req_wr_data_net[11]), .D(N_807), .Y(apb_d_req_wr_data_net[11]) ); defparam \tcm0_d_req_wr_data[11] .INIT=16'h50D8; // @48:3205 CFG4 \tcm0_d_req_wr_data[9] ( .A(trace_priv_i), .B(sba_req_wr_data_int[9]), .C(cpu_d_req_wr_data_net[9]), .D(N_807), .Y(apb_d_req_wr_data_net[9]) ); defparam \tcm0_d_req_wr_data[9] .INIT=16'h50D8; // @48:3205 CFG4 \tcm0_d_req_wr_data[6] ( .A(trace_priv_i), .B(sba_req_wr_data_int[6]), .C(cpu_d_req_wr_data_net[6]), .D(N_807), .Y(apb_d_req_wr_data_net[6]) ); defparam \tcm0_d_req_wr_data[6] .INIT=16'h50D8; // @48:3205 CFG4 \tcm0_d_req_wr_data[7] ( .A(trace_priv_i), .B(sba_req_wr_data_int[7]), .C(cpu_d_req_wr_data_net[7]), .D(N_807), .Y(apb_d_req_wr_data_net[7]) ); defparam \tcm0_d_req_wr_data[7] .INIT=16'h50D8; // @48:3205 CFG4 \tcm0_d_req_wr_data[24] ( .A(trace_priv_i), .B(sba_req_wr_data_int[24]), .C(cpu_d_req_wr_data_net[24]), .D(N_807), .Y(apb_d_req_wr_data_net[24]) ); defparam \tcm0_d_req_wr_data[24] .INIT=16'h50D8; // @48:3205 CFG4 \tcm0_d_req_wr_data[25] ( .A(trace_priv_i), .B(sba_req_wr_data_int[25]), .C(cpu_d_req_wr_data_net[25]), .D(N_807), .Y(apb_d_req_wr_data_net[25]) ); defparam \tcm0_d_req_wr_data[25] .INIT=16'h50D8; // @48:3205 CFG4 \tcm0_d_req_wr_data[26] ( .A(trace_priv_i), .B(sba_req_wr_data_int[26]), .C(cpu_d_req_wr_data_net[26]), .D(N_807), .Y(apb_d_req_wr_data_net[26]) ); defparam \tcm0_d_req_wr_data[26] .INIT=16'h50D8; // @48:3205 CFG4 \tcm0_d_req_wr_data[27] ( .A(trace_priv_i), .B(sba_req_wr_data_int[27]), .C(cpu_d_req_wr_data_net[27]), .D(N_807), .Y(apb_d_req_wr_data_net[27]) ); defparam \tcm0_d_req_wr_data[27] .INIT=16'h50D8; // @48:3205 CFG4 \tcm0_d_req_wr_data[29] ( .A(trace_priv_i), .B(sba_req_wr_data_int[29]), .C(cpu_d_req_wr_data_net[29]), .D(N_807), .Y(apb_d_req_wr_data_net[29]) ); defparam \tcm0_d_req_wr_data[29] .INIT=16'h50D8; // @48:3205 CFG4 \tcm0_d_req_wr_data[1] ( .A(trace_priv_i), .B(sba_req_wr_data_int[1]), .C(cpu_d_req_wr_data_net[1]), .D(N_807), .Y(apb_d_req_wr_data_net[1]) ); defparam \tcm0_d_req_wr_data[1] .INIT=16'h50D8; // @48:3205 CFG4 \tcm0_d_req_wr_data[28] ( .A(trace_priv_i), .B(sba_req_wr_data_int[28]), .C(cpu_d_req_wr_data_net[28]), .D(N_807), .Y(apb_d_req_wr_data_net[28]) ); defparam \tcm0_d_req_wr_data[28] .INIT=16'h50D8; // @48:3205 CFG4 \tcm0_d_req_wr_data[0] ( .A(trace_priv_i), .B(sba_req_wr_data_int[0]), .C(cpu_d_req_wr_data_net[0]), .D(N_807), .Y(apb_d_req_wr_data_net[0]) ); defparam \tcm0_d_req_wr_data[0] .INIT=16'h50D8; // @48:3293 CFG4 un1_cpu_d_req_accepted ( .A(tcm0_d_req_rd_byte_en_Z[1]), .B(un1_cpu_d_req_accepted_1_0), .C(un1_cpu_d_req_accepted_1_Z), .D(tcm0_d_req_rd_byte_en_Z[2]), .Y(un1_cpu_d_req_accepted_Z) ); defparam un1_cpu_d_req_accepted.INIT=16'hFFFE; // @48:3205 CFG4 \tcm0_d_req_wr_data[30] ( .A(trace_priv_i), .B(sba_req_wr_data_int[30]), .C(cpu_d_req_wr_data_net[30]), .D(N_807), .Y(apb_d_req_wr_data_net[30]) ); defparam \tcm0_d_req_wr_data[30] .INIT=16'h50D8; // @48:3205 CFG4 \tcm0_d_req_wr_data[16] ( .A(trace_priv_i), .B(sba_req_wr_data_int[16]), .C(cpu_d_req_wr_data_net[16]), .D(N_807), .Y(apb_d_req_wr_data_net[16]) ); defparam \tcm0_d_req_wr_data[16] .INIT=16'h50D8; // @48:3652 CFG4 tcm0_i_req_valid_2_1_RNI913KJ1 ( .A(un3_branch_cond_ex[0]), .B(ifu_expipe_req_branch_excpt_req_fenci_net), .C(cpu_m8_0_a3_0_5_3), .D(N_764), .Y(cpu_m8_0_a3_0_5_4) ); defparam tcm0_i_req_valid_2_1_RNI913KJ1.INIT=16'h70F0; // @48:3652 CFG4 tcm0_i_req_valid_2_1_RNI4S3512 ( .A(N_764), .B(cpu_m8_0_a3_0_5_4), .C(ifu_emi_req_valid_i_o2_1_0), .D(un3_branch_cond_ex[0]), .Y(cpu_m8_0_a3_0_5_5) ); defparam tcm0_i_req_valid_2_1_RNI4S3512.INIT=16'hC8CC; // @48:3205 CFG4 \tcm0_d_req_wr_data[31] ( .A(trace_priv_i), .B(sba_req_wr_data_int[31]), .C(cpu_d_req_wr_data_net[31]), .D(N_807), .Y(apb_d_req_wr_data_net[31]) ); defparam \tcm0_d_req_wr_data[31] .INIT=16'h50D8; // @48:3197 CFG4 cpu_d_req_valid_mux_1 ( .A(trace_priv_i), .B(debug_sysbus_req_valid_net), .C(cpu_d_req_valid_net), .D(debug_trx_os_net), .Y(cpu_d_req_valid_mux_1_1z) ); defparam cpu_d_req_valid_mux_1.INIT=16'h50D8; // @48:3652 CFG3 cpu_m8_0_a3_0_2_a0_2 ( .A(exu_result_valid_ex), .B(cpu_m8_0_a3_0_2_a0_0_Z), .C(ifu_expipe_req_branch_excpt_req_fenci_net), .Y(cpu_m8_0_a3_0_2_a0_2_Z) ); defparam cpu_m8_0_a3_0_2_a0_2.INIT=8'h80; // @48:3337 CFG4 subsys_cfg_d_req_valid_0_a2 ( .A(N_137), .B(cpu_d_req_valid_mux_1_1z), .C(d_trx_os_buff_ready), .D(N_114), .Y(subsys_cfg_d_req_valid) ); defparam subsys_cfg_d_req_valid_0_a2.INIT=16'h0080; // @48:3493 CFG3 tcm0_d_req_valid ( .A(cpu_d_req_valid_mux_1_1z), .B(tcm0_d_req_valid_2_1z), .C(cpu_d_req_is_tcm0_1z), .Y(tcm0_d_req_valid_net) ); defparam tcm0_d_req_valid.INIT=8'h80; // @48:3652 CFG4 cpu_d_req_ready_sig_1_RNIJFC2E2 ( .A(cpu_m8_0_a3_0_5_5), .B(exu_result_valid_ex), .C(cpu_m8_0_a3_0_2_a1_0_Z), .D(cpu_d_req_ready_sig_1_Z), .Y(cpu_m8_0_a3_0_5_7) ); defparam cpu_d_req_ready_sig_1_RNIJFC2E2.INIT=16'h008A; // @48:3652 CFG4 cpu_d_req_ready_sig_1_RNI75KT83 ( .A(cpu_m8_0_a3_0_5_7), .B(cmp_cond), .C(cpu_m8_0_a3_0_2_a1_0_Z), .D(cpu_m8_0_a3_0_2_a0_2_Z), .Y(cpu_m8_0_a3_0_2) ); defparam cpu_d_req_ready_sig_1_RNI75KT83.INIT=16'h028A; // @48:3082 CFG3 tcm0_i_req_valid_2_1_RNI76ICHS1 ( .A(tcm0_i_req_valid_2_1_Z), .B(ifu_emi_req_valid_i_0), .C(ifu_N_11), .Y(tcm0_m3_e_1) ); defparam tcm0_i_req_valid_2_1_RNI76ICHS1.INIT=8'h20; // @48:3652 CFG4 cpu_i_req_is_tcm0_5_RNI62P334 ( .A(cpu_N_6), .B(cpu_m8_0_a3_0_2), .C(cpu_i_req_is_tcm0_5_1z), .D(cpu_m8_0_a3_0_3), .Y(cpu_N_14_mux) ); defparam cpu_i_req_is_tcm0_5_RNI62P334.INIT=16'hEAAA; // @48:3652 CFG2 un1_cpu_d_req_ready_sig_c_RNI9BM3B4 ( .A(cpu_N_14_mux), .B(un1_cpu_d_req_ready_sig_c_1z), .Y(un1_cpu_d_req_ready_sig_0_0) ); defparam un1_cpu_d_req_ready_sig_c_RNI9BM3B4.INIT=4'hD; // @48:3082 CFG4 \gen_tcm0_i_decode.un8_cpu_i_req_is_tcm0lto18_12_1_RNIKGARAL1 ( .A(cpu_i_req_is_tcm0_5_0_1z), .B(tcm0_m3_e_1), .C(un8_cpu_i_req_is_tcm0lto18_12_1), .D(apb_i_req_addr_net[30]), .Y(tcm0_i_req_valid_1) ); defparam \gen_tcm0_i_decode.un8_cpu_i_req_is_tcm0lto18_12_1_RNIKGARAL1 .INIT=16'h0008; // @48:3652 CFG4 un1_cpu_d_req_ready_sig_d_0_RNIC3CB5C1 ( .A(un1_cpu_d_req_ready_sig_c_1z), .B(un1_cpu_d_req_ready_sig_d_0_1z), .C(cpu_N_14_mux), .D(req_masked[0]), .Y(cpu_d_req_ready_sig) ); defparam un1_cpu_d_req_ready_sig_d_0_RNIC3CB5C1.INIT=16'hAFEF; // @48:3082 CFG4 tcm0_i_req_valid ( .A(cpu_i_req_is_tcm0_4_2_1z), .B(tcm0_i_req_valid_1), .C(un8_cpu_i_req_is_tcm0lt19_10), .D(un8_cpu_i_req_is_tcm0lt18), .Y(tcm0_i_req_valid_net) ); defparam tcm0_i_req_valid.INIT=16'h0008; // @48:3239 miv_rv32_buffer_11s_2s_1s_1s u_d_trx_os_buffer ( .d_trx_resp_10(d_trx_resp[10]), .d_trx_resp_2(d_trx_resp[2]), .d_trx_resp_3(d_trx_resp[3]), .d_trx_resp_1(d_trx_resp[1]), .d_trx_resp_0(d_trx_resp[0]), .d_trx_resp_9(d_trx_resp[9]), .d_trx_resp_6(d_trx_resp[6]), .d_trx_resp_pkd_4(d_trx_resp_pkd[6]), .d_trx_resp_pkd_15(d_trx_resp_pkd[17]), .d_trx_resp_pkd_18(d_trx_resp_pkd[20]), .d_trx_resp_pkd_1(d_trx_resp_pkd[3]), .d_trx_resp_pkd_0(d_trx_resp_pkd[2]), .d_trx_resp_pkd_8(d_trx_resp_pkd[10]), .d_trx_resp_pkd_7(d_trx_resp_pkd[9]), .d_trx_resp_pkd_12(d_trx_resp_pkd[14]), .d_trx_resp_pkd_11(d_trx_resp_pkd[13]), .d_trx_resp_pkd_19(d_trx_resp_pkd[21]), .buff_rd_ptr_0(buff_rd_ptr[0]), .d_trx_resp_valid_pkd(d_trx_resp_valid_pkd[1:0]), .cpu_d_req_valid_mux_1(cpu_d_req_valid_mux_1_1z), .cpu_d_req_ready_sig(cpu_d_req_ready_sig), .un1_cpu_d_req_accepted(un1_cpu_d_req_accepted_Z), .N_1155(N_1155), .N_1154(N_1154), .d_trx_resp_valid(d_trx_resp_valid), .cpu_d_resp_valid_sig(cpu_d_resp_valid_sig_1z), .debug_trx_os_net(debug_trx_os_net), .trace_priv_i(trace_priv_i), .debug_sysbus_resp_ready_net(debug_sysbus_resp_ready_net), .subsys_resetn(subsys_resetn), .d_trx_os_buff_ready(d_trx_os_buff_ready), .ram0_1(ram0_1), .cpu_d_req_type_1_sm0(cpu_d_req_type_1_sm0), .ram1_1(ram1_1), .cpu_d_req_type_1_ss0_i(cpu_d_req_type_1_ss0_i), .cpu_d_req_is_apb(cpu_d_req_is_apb), .cpu_d_req_is_subsys_cfg(cpu_d_req_is_subsys_cfg), .cpu_d_req_is_tcm0(cpu_d_req_is_tcm0_1z), .cpu_d_req_is_dummy_target(cpu_d_req_is_dummy_target_Z), .cpu_d_req_is_fence(cpu_d_req_is_fence_Z), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0) ); // @48:3359 miv_rv32_subsys_regs_12s_0s_1s_0s_1_0s_50397384_7s_2s_1s u_subsys_regs ( .buff_valid(buff_valid[1:0]), .buff_rd_ptr_0(buff_rd_ptr_1[0]), .req_buffer_resp_sel(req_buffer_resp_sel[5:0]), .apb_d_req_wr_data_net(apb_d_req_wr_data_net[2:0]), .apb_d_req_wr_byte_en_net_0(apb_d_req_wr_byte_en_net[0]), .req_buffer_reg_sel_2_0_0(req_buffer_reg_sel_2_0[1]), .apb_d_req_addr_net({apb_d_req_addr_net[11:7], N_15133, apb_d_req_addr_net[5:4], N_15132, apb_d_req_addr_net[2:0]}), .d_trx_resp_valid_pkd_0(d_trx_resp_valid_pkd[1]), .d_trx_resp_pkd(d_trx_resp_pkd[14:13]), .tcm0_d_req_read(tcm0_d_req_read_Z), .N_91_9(N_91_9), .subsys_hart_gpr_ded_reset_reg(subsys_hart_gpr_ded_reset_reg), .hart_soft_irq_net(hart_soft_irq_net), .hart_soft_reset_net(hart_soft_reset_net), .tcm0_d_req_write(tcm0_d_req_write_Z), .subsys_cfg_d_req_ready(subsys_cfg_d_req_ready), .subsys_cfg_d_req_valid(subsys_cfg_d_req_valid), .d_trx_os_buff_ready(d_trx_os_buff_ready), .cpu_d_req_valid_mux_1(cpu_d_req_valid_mux_1_1z), .N_137(N_137), .N_90_1(N_90_1), .N_91_3(N_91_3), .read_subsys_hart_soft_reg_1z(read_subsys_hart_soft_reg), .subsys_cfg_d_resp_ready(subsys_cfg_d_resp_ready_Z), .subsys_cfg_d_resp_valid(subsys_cfg_d_resp_valid), .N_114(N_114), .subsys_cfg_d_req_valid_0_o2_1_0(subsys_cfg_d_req_valid_0_o2_1_0_Z), .subsys_resetn(subsys_resetn), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0) ); miv_rv32_buffer_6s_2s_1s_1s u_i_trx_os_buffer ( .i_trx_resp_2(i_trx_resp[2]), .i_trx_resp_5(i_trx_resp[5]), .i_trx_resp_0(i_trx_resp[0]), .i_trx_resp_pkd_0(i_trx_resp_pkd[0]), .i_trx_resp_pkd_2(i_trx_resp_pkd_0), .i_trx_resp_pkd_5(i_trx_resp_pkd[5]), .i_trx_resp_pkd_6(i_trx_resp_pkd[6]), .i_trx_resp_pkd_8(i_trx_resp_pkd_6), .i_trx_resp_pkd_11(i_trx_resp_pkd[11]), .buff_rd_ptr_0(buff_rd_ptr_2[0]), .i_trx_resp_valid_pkd(i_trx_resp_valid_pkd[1:0]), .ifu_emi_req_valid_i_0(ifu_emi_req_valid_i_0), .un1_cpu_i_req_ready(un1_cpu_i_req_ready_1z), .ifu_N_11(ifu_N_11), .cpu_i_resp_valid_sel(cpu_i_resp_valid_sel), .subsys_resetn(subsys_resetn), .i_trx_os_buff_ready(i_trx_os_buff_ready), .cpu_i_req_is_tcm0(cpu_i_req_is_tcm0), .cpu_i_req_is_dummy_target(cpu_i_req_is_dummy_target_1z), .cpu_i_req_is_apb(cpu_i_req_is_apb_1z), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_subsys_interconnect_Z18 */ module miv_rv32_rr_pri_arb_2s_1s_1s ( apb_i_req_addr_net, req_os_d_src_0, apb_src_sel, i_trx_resp_valid_pkd, i_trx_resp_pkd_6, i_trx_resp_pkd_0, req_masked, apb_resp_sel, un4_cpu_i_req_is_apb, un16_cpu_i_req_is_apb, ifu_emi_req_valid_i_0, ifu_N_11, cpu_d_req_valid_mux_1, cpu_d_req_is_apb, un24_cpu_i_req_is_apb_19_11, un24_cpu_i_req_is_apb_1, un24_cpu_i_req_is_apb_17, gen_m3, cpu_i_req_is_tcm0_5_0, req_complete_reg, apb_d_req_valid_3_0, N_1157, req_valid_mux, apb_i_req_valid_net_3, N_1154, apb_i_req_ready_net_tz, apb_i_req_ready_net, apb_d_req_ready_net, PF_CCC_0_0_OUT0_FABCLK_0, subsys_resetn, N_64, is_locked_1z ) ; input [20:19] apb_i_req_addr_net ; input req_os_d_src_0 ; output [1:0] apb_src_sel ; input [1:0] i_trx_resp_valid_pkd ; input i_trx_resp_pkd_6 ; input i_trx_resp_pkd_0 ; output [1:0] req_masked ; output [1:0] apb_resp_sel ; input un4_cpu_i_req_is_apb ; input un16_cpu_i_req_is_apb ; input ifu_emi_req_valid_i_0 ; input ifu_N_11 ; input cpu_d_req_valid_mux_1 ; input cpu_d_req_is_apb ; input un24_cpu_i_req_is_apb_19_11 ; input un24_cpu_i_req_is_apb_1 ; input un24_cpu_i_req_is_apb_17 ; input gen_m3 ; input cpu_i_req_is_tcm0_5_0 ; input req_complete_reg ; input apb_d_req_valid_3_0 ; input N_1157 ; output req_valid_mux ; input apb_i_req_valid_net_3 ; input N_1154 ; output apb_i_req_ready_net_tz ; output apb_i_req_ready_net ; output apb_d_req_ready_net ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input subsys_resetn ; output N_64 ; output is_locked_1z ; wire req_os_d_src_0 ; wire i_trx_resp_pkd_6 ; wire i_trx_resp_pkd_0 ; wire un4_cpu_i_req_is_apb ; wire un16_cpu_i_req_is_apb ; wire ifu_emi_req_valid_i_0 ; wire ifu_N_11 ; wire cpu_d_req_valid_mux_1 ; wire cpu_d_req_is_apb ; wire un24_cpu_i_req_is_apb_19_11 ; wire un24_cpu_i_req_is_apb_1 ; wire un24_cpu_i_req_is_apb_17 ; wire gen_m3 ; wire cpu_i_req_is_tcm0_5_0 ; wire req_complete_reg ; wire apb_d_req_valid_3_0 ; wire N_1157 ; wire req_valid_mux ; wire apb_i_req_valid_net_3 ; wire N_1154 ; wire apb_i_req_ready_net_tz ; wire apb_i_req_ready_net ; wire apb_d_req_ready_net ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire subsys_resetn ; wire N_64 ; wire is_locked_1z ; wire [1:1] req_masked_0; wire [1:1] req_masked_2_Z; wire is_locked_i ; wire VCC ; wire N_52_i ; wire GND ; wire is_locked_2_Z ; wire N_106 ; wire req_m5_0_0 ; wire req_m5_0_2 ; wire req_m2_e_2_Z ; wire req_m2_e_Z ; wire req_m5_0_3 ; wire N_1808 ; wire N_7 ; wire N_6 ; wire N_5 ; CFG1 is_locked_RNIE5UH4 ( .A(is_locked_1z), .Y(is_locked_i) ); defparam is_locked_RNIE5UH4.INIT=2'h1; // @48:10391 SLE \hipri_req_ptr[0] ( .Q(N_64), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_52_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10452 SLE is_locked ( .Q(is_locked_1z), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(is_locked_2_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10461 SLE \sel_reg[1] ( .Q(apb_resp_sel[1]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_d_req_ready_net), .EN(is_locked_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10461 SLE \sel_reg[0] ( .Q(apb_resp_sel[0]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_i_req_ready_net), .EN(is_locked_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10444 CFG2 \gnt_0_a3[1] ( .A(req_masked[1]), .B(N_64), .Y(N_106) ); defparam \gnt_0_a3[1] .INIT=4'h8; // @48:10408 CFG3 is_locked_RNI0FNBG ( .A(i_trx_resp_valid_pkd[1]), .B(is_locked_1z), .C(i_trx_resp_pkd_6), .Y(req_m5_0_0) ); defparam is_locked_RNI0FNBG.INIT=8'hEC; // @48:10444 CFG2 \gnt_0_tz[0] ( .A(req_masked[1]), .B(N_64), .Y(apb_i_req_ready_net_tz) ); defparam \gnt_0_tz[0] .INIT=4'h7; // @48:10444 CFG3 \gnt_0[1] ( .A(req_masked[0]), .B(req_masked[1]), .C(N_106), .Y(apb_d_req_ready_net) ); defparam \gnt_0[1] .INIT=8'hF4; // @48:10408 CFG2 \req_masked_0_0[1] ( .A(N_1154), .B(is_locked_1z), .Y(req_masked_0[1]) ); defparam \req_masked_0_0[1] .INIT=4'h1; // @48:10444 CFG2 \gnt_0[0] ( .A(req_masked[0]), .B(apb_i_req_ready_net_tz), .Y(apb_i_req_ready_net) ); defparam \gnt_0[0] .INIT=4'h8; // @48:10391 CFG3 \hipri_req_ptr_RNO[0] ( .A(N_64), .B(N_106), .C(req_masked[0]), .Y(N_52_i) ); defparam \hipri_req_ptr_RNO[0] .INIT=8'h32; // @48:10469 CFG3 \sel_early[1] ( .A(is_locked_1z), .B(apb_d_req_ready_net), .C(apb_resp_sel[1]), .Y(apb_src_sel[1]) ); defparam \sel_early[1] .INIT=8'hE4; // @48:10408 CFG4 is_locked_RNINLBGM ( .A(i_trx_resp_pkd_0), .B(i_trx_resp_valid_pkd[0]), .C(apb_i_req_valid_net_3), .D(req_m5_0_0), .Y(req_m5_0_2) ); defparam is_locked_RNINLBGM.INIT=16'hFF8F; // @48:10457 CFG2 un2_is_locked_1 ( .A(req_masked[0]), .B(req_masked[1]), .Y(req_valid_mux) ); defparam un2_is_locked_1.INIT=4'hE; // @48:10469 CFG4 \sel_early[0] ( .A(apb_i_req_ready_net_tz), .B(req_masked[0]), .C(apb_resp_sel[0]), .D(is_locked_1z), .Y(apb_src_sel[0]) ); defparam \sel_early[0] .INIT=16'hF088; // @48:10408 CFG4 \req_masked_2[1] ( .A(N_1157), .B(apb_d_req_valid_3_0), .C(req_os_d_src_0), .D(req_masked_0[1]), .Y(req_masked_2_Z[1]) ); defparam \req_masked_2[1] .INIT=16'h0400; // @48:10457 CFG4 is_locked_2 ( .A(is_locked_1z), .B(req_complete_reg), .C(apb_d_req_ready_net), .D(apb_i_req_ready_net), .Y(is_locked_2_Z) ); defparam is_locked_2.INIT=16'h3332; // @48:10408 CFG4 req_m2_e_2 ( .A(cpu_i_req_is_tcm0_5_0), .B(apb_i_req_addr_net[19]), .C(gen_m3), .D(apb_i_req_addr_net[20]), .Y(req_m2_e_2_Z) ); defparam req_m2_e_2.INIT=16'h0020; // @48:10408 CFG4 req_m2_e ( .A(un24_cpu_i_req_is_apb_17), .B(req_m2_e_2_Z), .C(un24_cpu_i_req_is_apb_1), .D(un24_cpu_i_req_is_apb_19_11), .Y(req_m2_e_Z) ); defparam req_m2_e.INIT=16'h8000; // @48:10408 CFG3 \req_masked_cZ[1] ( .A(req_masked_2_Z[1]), .B(cpu_d_req_is_apb), .C(cpu_d_req_valid_mux_1), .Y(req_masked[1]) ); defparam \req_masked_cZ[1] .INIT=8'h80; // @48:10408 CFG3 is_locked_RNI5HTC1T1 ( .A(ifu_N_11), .B(req_m5_0_2), .C(ifu_emi_req_valid_i_0), .Y(req_m5_0_3) ); defparam is_locked_RNI5HTC1T1.INIT=8'hFD; // @48:10391 CFG4 is_locked_RNIG3V3L71 ( .A(req_m2_e_Z), .B(un16_cpu_i_req_is_apb), .C(req_m5_0_3), .D(un4_cpu_i_req_is_apb), .Y(req_masked[0]) ); defparam is_locked_RNIG3V3L71.INIT=16'h0F0E; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_rr_pri_arb_2s_1s_1s */ module miv_rv32_subsys_apb_initiator_32s_1s_1_0_1_2_3_4_5 ( apb_resp_sel, i_trx_resp_pkd_6, i_trx_resp_pkd_0, i_trx_resp_valid_pkd, req_os_d_src_0, apb_d_req_wr_data_net, apb_d_req_wr_byte_en_net, apb_i_req_addr_net, apb_d_req_addr_net, req_masked, apb_prdata_net, apb_d_resp_rd_data_net, apb_paddr_1, apb_paddr_0, apb_paddr_20, apb_paddr_19, apb_paddr_18, apb_paddr_17, apb_paddr_16, apb_paddr_11, apb_paddr_10, apb_paddr_31, apb_paddr_30, apb_paddr_29, apb_paddr_28, apb_paddr_27, apb_paddr_26, apb_paddr_25, apb_paddr_24, apb_paddr_23, apb_paddr_22, apb_paddr_21, paddr_0, CoreAPB3_0_0_APBmslave0_PADDR_3, CoreAPB3_0_0_APBmslave0_PADDR_1, CoreAPB3_0_0_APBmslave0_PADDR_0, CoreAPB3_0_0_APBmslave0_PADDR_25, CoreAPB3_0_0_APBmslave0_PADDR_24, CoreAPB3_0_0_APBmslave0_PADDR_23, CoreAPB3_0_0_APBmslave0_PADDR_22, CoreAPB3_0_0_APBmslave0_PADDR_7, CoreAPB3_0_0_APBmslave0_PADDR_6, CoreAPB3_0_0_APBmslave0_PADDR_5, CoreAPB3_0_0_APBmslave0_PWDATA, PADDR_1z_0, wrdata_0, N_64, apb_i_req_ready_net_tz, N_1154, apb_i_req_valid_net_3, N_1157, apb_d_req_valid_3_0, cpu_i_req_is_tcm0_5_0, gen_m3, un24_cpu_i_req_is_apb_17, un24_cpu_i_req_is_apb_1, un24_cpu_i_req_is_apb_19_11, cpu_d_req_is_apb, cpu_d_req_valid_mux_1, ifu_N_11, ifu_emi_req_valid_i_0, un16_cpu_i_req_is_apb, un4_cpu_i_req_is_apb, un1_cpu_d_req_ready, Oi0O1, iPRDATA_0_sqmuxa, un3_apb_int_sel, N_88, N_1153, CoreAPB3_0_0_APBmslave0_PENABLE, N_1225, MIV_RV32_C0_0_APB_INITIATOR_PSELx, N_1212, N_1411, CoreAPB3_0_0_APBmslave0_PWRITE, apb_penable_net, apb_psel_net, req_complete_reg, apb_pslverr_net, PF_CCC_0_0_OUT0_FABCLK_0, subsys_resetn, apb_d_resp_error_net ) ; output [1:0] apb_resp_sel ; input i_trx_resp_pkd_6 ; input i_trx_resp_pkd_0 ; input [1:0] i_trx_resp_valid_pkd ; input req_os_d_src_0 ; input [31:0] apb_d_req_wr_data_net ; input [3:0] apb_d_req_wr_byte_en_net ; input [31:2] apb_i_req_addr_net ; input [31:0] apb_d_req_addr_net ; output [1:0] req_masked ; input [31:0] apb_prdata_net ; output [31:0] apb_d_resp_rd_data_net ; output apb_paddr_1 ; output apb_paddr_0 ; output apb_paddr_20 ; output apb_paddr_19 ; output apb_paddr_18 ; output apb_paddr_17 ; output apb_paddr_16 ; output apb_paddr_11 ; output apb_paddr_10 ; output apb_paddr_31 ; output apb_paddr_30 ; output apb_paddr_29 ; output apb_paddr_28 ; output apb_paddr_27 ; output apb_paddr_26 ; output apb_paddr_25 ; output apb_paddr_24 ; output apb_paddr_23 ; output apb_paddr_22 ; output apb_paddr_21 ; output paddr_0 ; output CoreAPB3_0_0_APBmslave0_PADDR_3 ; output CoreAPB3_0_0_APBmslave0_PADDR_1 ; output CoreAPB3_0_0_APBmslave0_PADDR_0 ; output CoreAPB3_0_0_APBmslave0_PADDR_25 ; output CoreAPB3_0_0_APBmslave0_PADDR_24 ; output CoreAPB3_0_0_APBmslave0_PADDR_23 ; output CoreAPB3_0_0_APBmslave0_PADDR_22 ; output CoreAPB3_0_0_APBmslave0_PADDR_7 ; output CoreAPB3_0_0_APBmslave0_PADDR_6 ; output CoreAPB3_0_0_APBmslave0_PADDR_5 ; output [31:1] CoreAPB3_0_0_APBmslave0_PWDATA ; output PADDR_1z_0 ; output wrdata_0 ; output N_64 ; output apb_i_req_ready_net_tz ; input N_1154 ; input apb_i_req_valid_net_3 ; input N_1157 ; input apb_d_req_valid_3_0 ; input cpu_i_req_is_tcm0_5_0 ; input gen_m3 ; input un24_cpu_i_req_is_apb_17 ; input un24_cpu_i_req_is_apb_1 ; input un24_cpu_i_req_is_apb_19_11 ; input cpu_d_req_is_apb ; input cpu_d_req_valid_mux_1 ; input ifu_N_11 ; input ifu_emi_req_valid_i_0 ; input un16_cpu_i_req_is_apb ; input un4_cpu_i_req_is_apb ; input un1_cpu_d_req_ready ; input Oi0O1 ; input iPRDATA_0_sqmuxa ; input un3_apb_int_sel ; output N_88 ; input N_1153 ; output CoreAPB3_0_0_APBmslave0_PENABLE ; input N_1225 ; output MIV_RV32_C0_0_APB_INITIATOR_PSELx ; input N_1212 ; input N_1411 ; output CoreAPB3_0_0_APBmslave0_PWRITE ; output apb_penable_net ; output apb_psel_net ; output req_complete_reg ; input apb_pslverr_net ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input subsys_resetn ; output apb_d_resp_error_net ; wire i_trx_resp_pkd_6 ; wire i_trx_resp_pkd_0 ; wire req_os_d_src_0 ; wire apb_paddr_1 ; wire apb_paddr_0 ; wire apb_paddr_20 ; wire apb_paddr_19 ; wire apb_paddr_18 ; wire apb_paddr_17 ; wire apb_paddr_16 ; wire apb_paddr_11 ; wire apb_paddr_10 ; wire apb_paddr_31 ; wire apb_paddr_30 ; wire apb_paddr_29 ; wire apb_paddr_28 ; wire apb_paddr_27 ; wire apb_paddr_26 ; wire apb_paddr_25 ; wire apb_paddr_24 ; wire apb_paddr_23 ; wire apb_paddr_22 ; wire apb_paddr_21 ; wire paddr_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_3 ; wire CoreAPB3_0_0_APBmslave0_PADDR_1 ; wire CoreAPB3_0_0_APBmslave0_PADDR_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_25 ; wire CoreAPB3_0_0_APBmslave0_PADDR_24 ; wire CoreAPB3_0_0_APBmslave0_PADDR_23 ; wire CoreAPB3_0_0_APBmslave0_PADDR_22 ; wire CoreAPB3_0_0_APBmslave0_PADDR_7 ; wire CoreAPB3_0_0_APBmslave0_PADDR_6 ; wire CoreAPB3_0_0_APBmslave0_PADDR_5 ; wire PADDR_1z_0 ; wire wrdata_0 ; wire N_64 ; wire apb_i_req_ready_net_tz ; wire N_1154 ; wire apb_i_req_valid_net_3 ; wire N_1157 ; wire apb_d_req_valid_3_0 ; wire cpu_i_req_is_tcm0_5_0 ; wire gen_m3 ; wire un24_cpu_i_req_is_apb_17 ; wire un24_cpu_i_req_is_apb_1 ; wire un24_cpu_i_req_is_apb_19_11 ; wire cpu_d_req_is_apb ; wire cpu_d_req_valid_mux_1 ; wire ifu_N_11 ; wire ifu_emi_req_valid_i_0 ; wire un16_cpu_i_req_is_apb ; wire un4_cpu_i_req_is_apb ; wire un1_cpu_d_req_ready ; wire Oi0O1 ; wire iPRDATA_0_sqmuxa ; wire un3_apb_int_sel ; wire N_88 ; wire N_1153 ; wire CoreAPB3_0_0_APBmslave0_PENABLE ; wire N_1225 ; wire MIV_RV32_C0_0_APB_INITIATOR_PSELx ; wire N_1212 ; wire N_1411 ; wire CoreAPB3_0_0_APBmslave0_PWRITE ; wire apb_penable_net ; wire apb_psel_net ; wire req_complete_reg ; wire apb_pslverr_net ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire subsys_resetn ; wire apb_d_resp_error_net ; wire [5:0] apb_st; wire [5:0] apb_st_ns; wire [1:1] apb_st_ns_i_i; wire [31:2] pwdata_8_Z; wire [1:0] pwdata_8; wire [11:0] req_addr_mux; wire [31:2] req_addr_mux_Z; wire [3:0] pstrb; wire [31:2] pwdata_8_2_Z; wire [1:0] apb_src_sel; wire [31:2] un10_req_wr_data_mux; wire VCC ; wire GND ; wire N_1152_i ; wire N_94_i ; wire N_81_i ; wire un1_req_complete_reg11_3_0_0_Z ; wire apb_st_0_o4_0_0 ; wire un1_penable_0_sqmuxa_0_0_Z ; wire N_89_i ; wire N_72 ; wire N_1134 ; wire req_valid_mux ; wire N_1132_i ; wire N_86_i ; wire N_1131_i ; wire N_1130_i ; wire N_73_1 ; wire N_1145_2 ; wire N_1139 ; wire N_1141 ; wire N_1140 ; wire N_86 ; wire is_locked ; wire apb_d_req_ready_net ; wire apb_i_req_ready_net ; wire N_73_2 ; wire N_1135 ; wire N_1137 ; wire N_43 ; wire N_42 ; wire N_41 ; wire N_40 ; wire N_39 ; wire N_38 ; wire N_37 ; wire N_36 ; wire N_35 ; wire N_34 ; wire N_11 ; // @48:6372 SLE pslverr_reg ( .Q(apb_d_resp_error_net), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_pslverr_net), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.apb_st[5] ( .Q(apb_st[5]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_st_ns[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.apb_st[4] ( .Q(apb_st[4]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_1152_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.apb_st[3] ( .Q(apb_st[3]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_94_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.apb_st[2] ( .Q(apb_st[2]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_81_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.apb_st[1] ( .Q(apb_st[1]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_st_ns_i_i[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.apb_st[0] ( .Q(apb_st[0]), .ADn(GND), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_st_ns[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.req_complete_reg ( .Q(req_complete_reg), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_st[2]), .EN(un1_req_complete_reg11_3_0_0_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.psel ( .Q(apb_psel_net), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_st_0_o4_0_0), .EN(un1_penable_0_sqmuxa_0_0_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.penable ( .Q(apb_penable_net), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_89_i), .EN(N_72), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pwrite ( .Q(CoreAPB3_0_0_APBmslave0_PWRITE), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_1134), .EN(apb_st_0_o4_0_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pwdata[7] ( .Q(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(pwdata_8_Z[7]), .EN(apb_st_0_o4_0_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pwdata[6] ( .Q(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(pwdata_8_Z[6]), .EN(apb_st_0_o4_0_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pwdata[5] ( .Q(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(pwdata_8_Z[5]), .EN(apb_st_0_o4_0_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pwdata[4] ( .Q(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(pwdata_8_Z[4]), .EN(apb_st_0_o4_0_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pwdata[3] ( .Q(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(pwdata_8_Z[3]), .EN(apb_st_0_o4_0_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pwdata[2] ( .Q(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(pwdata_8_Z[2]), .EN(apb_st_0_o4_0_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pwdata[1] ( .Q(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(pwdata_8[1]), .EN(apb_st_0_o4_0_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pwdata[0] ( .Q(wrdata_0), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(pwdata_8[0]), .EN(apb_st_0_o4_0_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pwdata[22] ( .Q(CoreAPB3_0_0_APBmslave0_PWDATA[22]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(pwdata_8_Z[22]), .EN(apb_st_0_o4_0_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pwdata[21] ( .Q(CoreAPB3_0_0_APBmslave0_PWDATA[21]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(pwdata_8_Z[21]), .EN(apb_st_0_o4_0_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pwdata[20] ( .Q(CoreAPB3_0_0_APBmslave0_PWDATA[20]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(pwdata_8_Z[20]), .EN(apb_st_0_o4_0_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pwdata[19] ( .Q(CoreAPB3_0_0_APBmslave0_PWDATA[19]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(pwdata_8_Z[19]), .EN(apb_st_0_o4_0_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pwdata[18] ( .Q(CoreAPB3_0_0_APBmslave0_PWDATA[18]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(pwdata_8_Z[18]), .EN(apb_st_0_o4_0_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pwdata[17] ( .Q(CoreAPB3_0_0_APBmslave0_PWDATA[17]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(pwdata_8_Z[17]), .EN(apb_st_0_o4_0_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pwdata[16] ( .Q(CoreAPB3_0_0_APBmslave0_PWDATA[16]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(pwdata_8_Z[16]), .EN(apb_st_0_o4_0_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pwdata[15] ( .Q(CoreAPB3_0_0_APBmslave0_PWDATA[15]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(pwdata_8_Z[15]), .EN(apb_st_0_o4_0_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pwdata[14] ( .Q(CoreAPB3_0_0_APBmslave0_PWDATA[14]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(pwdata_8_Z[14]), .EN(apb_st_0_o4_0_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pwdata[13] ( .Q(CoreAPB3_0_0_APBmslave0_PWDATA[13]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(pwdata_8_Z[13]), .EN(apb_st_0_o4_0_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pwdata[12] ( .Q(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(pwdata_8_Z[12]), .EN(apb_st_0_o4_0_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pwdata[11] ( .Q(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(pwdata_8_Z[11]), .EN(apb_st_0_o4_0_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pwdata[10] ( .Q(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(pwdata_8_Z[10]), .EN(apb_st_0_o4_0_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pwdata[9] ( .Q(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(pwdata_8_Z[9]), .EN(apb_st_0_o4_0_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pwdata[8] ( .Q(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(pwdata_8_Z[8]), .EN(apb_st_0_o4_0_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6361 SLE \paddr[5] ( .Q(CoreAPB3_0_0_APBmslave0_PADDR_3), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_addr_mux[5]), .EN(req_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6361 SLE \paddr[4] ( .Q(PADDR_1z_0), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_addr_mux_Z[4]), .EN(req_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6361 SLE \paddr[3] ( .Q(CoreAPB3_0_0_APBmslave0_PADDR_1), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_addr_mux_Z[3]), .EN(req_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6361 SLE \paddr[2] ( .Q(CoreAPB3_0_0_APBmslave0_PADDR_0), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_addr_mux_Z[2]), .EN(req_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6361 SLE \paddr[1] ( .Q(apb_paddr_1), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_addr_mux[1]), .EN(req_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6361 SLE \paddr[0] ( .Q(apb_paddr_0), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_addr_mux[0]), .EN(req_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pwdata[31] ( .Q(CoreAPB3_0_0_APBmslave0_PWDATA[31]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(pwdata_8_Z[31]), .EN(apb_st_0_o4_0_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pwdata[30] ( .Q(CoreAPB3_0_0_APBmslave0_PWDATA[30]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(pwdata_8_Z[30]), .EN(apb_st_0_o4_0_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pwdata[29] ( .Q(CoreAPB3_0_0_APBmslave0_PWDATA[29]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(pwdata_8_Z[29]), .EN(apb_st_0_o4_0_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pwdata[28] ( .Q(CoreAPB3_0_0_APBmslave0_PWDATA[28]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(pwdata_8_Z[28]), .EN(apb_st_0_o4_0_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pwdata[27] ( .Q(CoreAPB3_0_0_APBmslave0_PWDATA[27]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(pwdata_8_Z[27]), .EN(apb_st_0_o4_0_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pwdata[26] ( .Q(CoreAPB3_0_0_APBmslave0_PWDATA[26]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(pwdata_8_Z[26]), .EN(apb_st_0_o4_0_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pwdata[25] ( .Q(CoreAPB3_0_0_APBmslave0_PWDATA[25]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(pwdata_8_Z[25]), .EN(apb_st_0_o4_0_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pwdata[24] ( .Q(CoreAPB3_0_0_APBmslave0_PWDATA[24]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(pwdata_8_Z[24]), .EN(apb_st_0_o4_0_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pwdata[23] ( .Q(CoreAPB3_0_0_APBmslave0_PWDATA[23]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(pwdata_8_Z[23]), .EN(apb_st_0_o4_0_0), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6361 SLE \paddr[20] ( .Q(apb_paddr_20), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_addr_mux_Z[20]), .EN(req_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6361 SLE \paddr[19] ( .Q(apb_paddr_19), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_addr_mux_Z[19]), .EN(req_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6361 SLE \paddr[18] ( .Q(apb_paddr_18), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_addr_mux_Z[18]), .EN(req_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6361 SLE \paddr[17] ( .Q(apb_paddr_17), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_addr_mux_Z[17]), .EN(req_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6361 SLE \paddr[16] ( .Q(apb_paddr_16), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_addr_mux_Z[16]), .EN(req_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6361 SLE \paddr[15] ( .Q(CoreAPB3_0_0_APBmslave0_PADDR_25), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_addr_mux_Z[15]), .EN(req_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6361 SLE \paddr[14] ( .Q(CoreAPB3_0_0_APBmslave0_PADDR_24), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_addr_mux_Z[14]), .EN(req_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6361 SLE \paddr[13] ( .Q(CoreAPB3_0_0_APBmslave0_PADDR_23), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_addr_mux_Z[13]), .EN(req_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6361 SLE \paddr[12] ( .Q(CoreAPB3_0_0_APBmslave0_PADDR_22), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_addr_mux_Z[12]), .EN(req_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6361 SLE \paddr[11] ( .Q(apb_paddr_11), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_addr_mux[11]), .EN(req_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6361 SLE \paddr[10] ( .Q(apb_paddr_10), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_addr_mux[10]), .EN(req_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6361 SLE \paddr[9] ( .Q(CoreAPB3_0_0_APBmslave0_PADDR_7), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_addr_mux[9]), .EN(req_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6361 SLE \paddr[8] ( .Q(CoreAPB3_0_0_APBmslave0_PADDR_6), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_addr_mux[8]), .EN(req_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6361 SLE \paddr[7] ( .Q(CoreAPB3_0_0_APBmslave0_PADDR_5), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_addr_mux[7]), .EN(req_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6361 SLE \paddr[6] ( .Q(paddr_0), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_addr_mux[6]), .EN(req_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pstrb[3] ( .Q(pstrb[3]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_1132_i), .EN(N_86_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pstrb[2] ( .Q(pstrb[2]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_1131_i), .EN(N_86_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pstrb[1] ( .Q(pstrb[1]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_1130_i), .EN(N_86_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 SLE \gen_apb_byte_shim.pstrb[0] ( .Q(pstrb[0]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_73_1), .EN(N_86_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6361 SLE \paddr[31] ( .Q(apb_paddr_31), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_addr_mux_Z[31]), .EN(req_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6361 SLE \paddr[30] ( .Q(apb_paddr_30), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_addr_mux_Z[30]), .EN(req_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6361 SLE \paddr[29] ( .Q(apb_paddr_29), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_addr_mux_Z[29]), .EN(req_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6361 SLE \paddr[28] ( .Q(apb_paddr_28), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_addr_mux_Z[28]), .EN(req_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6361 SLE \paddr[27] ( .Q(apb_paddr_27), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_addr_mux_Z[27]), .EN(req_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6361 SLE \paddr[26] ( .Q(apb_paddr_26), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_addr_mux_Z[26]), .EN(req_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6361 SLE \paddr[25] ( .Q(apb_paddr_25), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_addr_mux_Z[25]), .EN(req_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6361 SLE \paddr[24] ( .Q(apb_paddr_24), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_addr_mux_Z[24]), .EN(req_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6361 SLE \paddr[23] ( .Q(apb_paddr_23), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_addr_mux_Z[23]), .EN(req_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6361 SLE \paddr[22] ( .Q(apb_paddr_22), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_addr_mux_Z[22]), .EN(req_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6361 SLE \paddr[21] ( .Q(apb_paddr_21), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(req_addr_mux_Z[21]), .EN(req_valid_mux), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6372 SLE \prdata_reg[14] ( .Q(apb_d_resp_rd_data_net[14]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_prdata_net[14]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6372 SLE \prdata_reg[13] ( .Q(apb_d_resp_rd_data_net[13]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_prdata_net[13]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6372 SLE \prdata_reg[12] ( .Q(apb_d_resp_rd_data_net[12]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_prdata_net[12]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6372 SLE \prdata_reg[11] ( .Q(apb_d_resp_rd_data_net[11]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_prdata_net[11]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6372 SLE \prdata_reg[10] ( .Q(apb_d_resp_rd_data_net[10]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_prdata_net[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6372 SLE \prdata_reg[9] ( .Q(apb_d_resp_rd_data_net[9]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_prdata_net[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6372 SLE \prdata_reg[8] ( .Q(apb_d_resp_rd_data_net[8]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_prdata_net[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6372 SLE \prdata_reg[7] ( .Q(apb_d_resp_rd_data_net[7]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_prdata_net[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6372 SLE \prdata_reg[6] ( .Q(apb_d_resp_rd_data_net[6]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_prdata_net[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6372 SLE \prdata_reg[5] ( .Q(apb_d_resp_rd_data_net[5]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_prdata_net[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6372 SLE \prdata_reg[4] ( .Q(apb_d_resp_rd_data_net[4]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_prdata_net[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6372 SLE \prdata_reg[3] ( .Q(apb_d_resp_rd_data_net[3]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_prdata_net[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6372 SLE \prdata_reg[2] ( .Q(apb_d_resp_rd_data_net[2]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_prdata_net[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6372 SLE \prdata_reg[1] ( .Q(apb_d_resp_rd_data_net[1]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_prdata_net[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6372 SLE \prdata_reg[0] ( .Q(apb_d_resp_rd_data_net[0]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_prdata_net[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6372 SLE \prdata_reg[29] ( .Q(apb_d_resp_rd_data_net[29]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_prdata_net[29]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6372 SLE \prdata_reg[28] ( .Q(apb_d_resp_rd_data_net[28]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_prdata_net[28]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6372 SLE \prdata_reg[27] ( .Q(apb_d_resp_rd_data_net[27]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_prdata_net[27]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6372 SLE \prdata_reg[26] ( .Q(apb_d_resp_rd_data_net[26]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_prdata_net[26]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6372 SLE \prdata_reg[25] ( .Q(apb_d_resp_rd_data_net[25]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_prdata_net[25]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6372 SLE \prdata_reg[24] ( .Q(apb_d_resp_rd_data_net[24]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_prdata_net[24]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6372 SLE \prdata_reg[23] ( .Q(apb_d_resp_rd_data_net[23]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_prdata_net[23]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6372 SLE \prdata_reg[22] ( .Q(apb_d_resp_rd_data_net[22]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_prdata_net[22]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6372 SLE \prdata_reg[21] ( .Q(apb_d_resp_rd_data_net[21]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_prdata_net[21]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6372 SLE \prdata_reg[20] ( .Q(apb_d_resp_rd_data_net[20]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_prdata_net[20]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6372 SLE \prdata_reg[19] ( .Q(apb_d_resp_rd_data_net[19]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_prdata_net[19]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6372 SLE \prdata_reg[18] ( .Q(apb_d_resp_rd_data_net[18]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_prdata_net[18]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6372 SLE \prdata_reg[17] ( .Q(apb_d_resp_rd_data_net[17]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_prdata_net[17]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6372 SLE \prdata_reg[16] ( .Q(apb_d_resp_rd_data_net[16]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_prdata_net[16]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6372 SLE \prdata_reg[15] ( .Q(apb_d_resp_rd_data_net[15]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_prdata_net[15]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6372 SLE \prdata_reg[31] ( .Q(apb_d_resp_rd_data_net[31]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_prdata_net[31]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6372 SLE \prdata_reg[30] ( .Q(apb_d_resp_rd_data_net[30]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_prdata_net[30]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:6231 CFG4 \gen_apb_byte_shim.apb_st_ns_i_i_a2_2[1] ( .A(apb_st[3]), .B(apb_st[1]), .C(apb_st[2]), .D(apb_st[4]), .Y(N_1145_2) ); defparam \gen_apb_byte_shim.apb_st_ns_i_i_a2_2[1] .INIT=16'h0001; // @48:6243 CFG2 un1_penable_0_sqmuxa_0_0_o2 ( .A(apb_st[2]), .B(apb_st[4]), .Y(N_1139) ); defparam un1_penable_0_sqmuxa_0_0_o2.INIT=4'hE; // @48:6243 CFG3 \pwdata_8_0_i_m2[0] ( .A(pstrb[0]), .B(wrdata_0), .C(apb_d_resp_rd_data_net[0]), .Y(N_1141) ); defparam \pwdata_8_0_i_m2[0] .INIT=8'hD8; // @48:6243 CFG3 \pwdata_8_0_i_m2[1] ( .A(pstrb[0]), .B(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .C(apb_d_resp_rd_data_net[1]), .Y(N_1140) ); defparam \pwdata_8_0_i_m2[1] .INIT=8'hD8; // @48:6231 CFG2 \gen_apb_byte_shim.penable_RNO ( .A(apb_st[1]), .B(apb_st[3]), .Y(N_89_i) ); defparam \gen_apb_byte_shim.penable_RNO .INIT=4'hE; // @48:6243 CFG4 \pwdata_8_2[13] ( .A(apb_d_resp_rd_data_net[13]), .B(pstrb[1]), .C(CoreAPB3_0_0_APBmslave0_PWDATA[13]), .D(apb_st[5]), .Y(pwdata_8_2_Z[13]) ); defparam \pwdata_8_2[13] .INIT=16'hE200; // @48:6243 CFG4 \pwdata_8_2[4] ( .A(apb_d_resp_rd_data_net[4]), .B(pstrb[0]), .C(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .D(apb_st[5]), .Y(pwdata_8_2_Z[4]) ); defparam \pwdata_8_2[4] .INIT=16'hE200; // @48:6243 CFG4 \pwdata_8_2[5] ( .A(apb_d_resp_rd_data_net[5]), .B(pstrb[0]), .C(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .D(apb_st[5]), .Y(pwdata_8_2_Z[5]) ); defparam \pwdata_8_2[5] .INIT=16'hE200; // @48:6243 CFG4 \pwdata_8_2[7] ( .A(apb_d_resp_rd_data_net[7]), .B(pstrb[0]), .C(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .D(apb_st[5]), .Y(pwdata_8_2_Z[7]) ); defparam \pwdata_8_2[7] .INIT=16'hE200; // @48:6243 CFG4 \pwdata_8_2[12] ( .A(apb_d_resp_rd_data_net[12]), .B(pstrb[1]), .C(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .D(apb_st[5]), .Y(pwdata_8_2_Z[12]) ); defparam \pwdata_8_2[12] .INIT=16'hE200; // @48:6243 CFG4 \pwdata_8_2[27] ( .A(apb_d_resp_rd_data_net[27]), .B(pstrb[3]), .C(CoreAPB3_0_0_APBmslave0_PWDATA[27]), .D(apb_st[5]), .Y(pwdata_8_2_Z[27]) ); defparam \pwdata_8_2[27] .INIT=16'hE200; // @48:6243 CFG4 \pwdata_8_2[14] ( .A(apb_d_resp_rd_data_net[14]), .B(pstrb[1]), .C(CoreAPB3_0_0_APBmslave0_PWDATA[14]), .D(apb_st[5]), .Y(pwdata_8_2_Z[14]) ); defparam \pwdata_8_2[14] .INIT=16'hE200; // @48:6243 CFG4 \pwdata_8_2[15] ( .A(apb_d_resp_rd_data_net[15]), .B(pstrb[1]), .C(CoreAPB3_0_0_APBmslave0_PWDATA[15]), .D(apb_st[5]), .Y(pwdata_8_2_Z[15]) ); defparam \pwdata_8_2[15] .INIT=16'hE200; // @48:6243 CFG4 \pwdata_8_2[6] ( .A(apb_d_resp_rd_data_net[6]), .B(pstrb[0]), .C(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .D(apb_st[5]), .Y(pwdata_8_2_Z[6]) ); defparam \pwdata_8_2[6] .INIT=16'hE200; // @48:6243 CFG4 \pwdata_8_2[23] ( .A(apb_d_resp_rd_data_net[23]), .B(pstrb[2]), .C(CoreAPB3_0_0_APBmslave0_PWDATA[23]), .D(apb_st[5]), .Y(pwdata_8_2_Z[23]) ); defparam \pwdata_8_2[23] .INIT=16'hE200; // @48:6243 CFG4 \pwdata_8_2[2] ( .A(apb_d_resp_rd_data_net[2]), .B(pstrb[0]), .C(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .D(apb_st[5]), .Y(pwdata_8_2_Z[2]) ); defparam \pwdata_8_2[2] .INIT=16'hE200; // @48:6243 CFG4 \pwdata_8_2[28] ( .A(apb_d_resp_rd_data_net[28]), .B(pstrb[3]), .C(CoreAPB3_0_0_APBmslave0_PWDATA[28]), .D(apb_st[5]), .Y(pwdata_8_2_Z[28]) ); defparam \pwdata_8_2[28] .INIT=16'hE200; // @48:6243 CFG4 \pwdata_8_2[25] ( .A(apb_d_resp_rd_data_net[25]), .B(pstrb[3]), .C(CoreAPB3_0_0_APBmslave0_PWDATA[25]), .D(apb_st[5]), .Y(pwdata_8_2_Z[25]) ); defparam \pwdata_8_2[25] .INIT=16'hE200; // @48:6243 CFG4 \pwdata_8_2[3] ( .A(apb_d_resp_rd_data_net[3]), .B(pstrb[0]), .C(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .D(apb_st[5]), .Y(pwdata_8_2_Z[3]) ); defparam \pwdata_8_2[3] .INIT=16'hE200; // @48:6243 CFG4 \pwdata_8_2[8] ( .A(apb_d_resp_rd_data_net[8]), .B(pstrb[1]), .C(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .D(apb_st[5]), .Y(pwdata_8_2_Z[8]) ); defparam \pwdata_8_2[8] .INIT=16'hE200; // @48:6243 CFG4 \pwdata_8_2[9] ( .A(apb_d_resp_rd_data_net[9]), .B(pstrb[1]), .C(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .D(apb_st[5]), .Y(pwdata_8_2_Z[9]) ); defparam \pwdata_8_2[9] .INIT=16'hE200; // @48:6243 CFG4 \pwdata_8_2[20] ( .A(apb_d_resp_rd_data_net[20]), .B(pstrb[2]), .C(CoreAPB3_0_0_APBmslave0_PWDATA[20]), .D(apb_st[5]), .Y(pwdata_8_2_Z[20]) ); defparam \pwdata_8_2[20] .INIT=16'hE200; // @48:6243 CFG4 \pwdata_8_2[31] ( .A(apb_d_resp_rd_data_net[31]), .B(pstrb[3]), .C(CoreAPB3_0_0_APBmslave0_PWDATA[31]), .D(apb_st[5]), .Y(pwdata_8_2_Z[31]) ); defparam \pwdata_8_2[31] .INIT=16'hE200; // @48:6243 CFG4 \pwdata_8_2[24] ( .A(apb_d_resp_rd_data_net[24]), .B(pstrb[3]), .C(CoreAPB3_0_0_APBmslave0_PWDATA[24]), .D(apb_st[5]), .Y(pwdata_8_2_Z[24]) ); defparam \pwdata_8_2[24] .INIT=16'hE200; // @48:6243 CFG4 \pwdata_8_2[17] ( .A(apb_d_resp_rd_data_net[17]), .B(pstrb[2]), .C(CoreAPB3_0_0_APBmslave0_PWDATA[17]), .D(apb_st[5]), .Y(pwdata_8_2_Z[17]) ); defparam \pwdata_8_2[17] .INIT=16'hE200; // @48:6243 CFG4 \pwdata_8_2[21] ( .A(apb_d_resp_rd_data_net[21]), .B(pstrb[2]), .C(CoreAPB3_0_0_APBmslave0_PWDATA[21]), .D(apb_st[5]), .Y(pwdata_8_2_Z[21]) ); defparam \pwdata_8_2[21] .INIT=16'hE200; // @48:6243 CFG4 \pwdata_8_2[30] ( .A(apb_d_resp_rd_data_net[30]), .B(pstrb[3]), .C(CoreAPB3_0_0_APBmslave0_PWDATA[30]), .D(apb_st[5]), .Y(pwdata_8_2_Z[30]) ); defparam \pwdata_8_2[30] .INIT=16'hE200; // @48:6243 CFG4 \pwdata_8_2[29] ( .A(apb_d_resp_rd_data_net[29]), .B(pstrb[3]), .C(CoreAPB3_0_0_APBmslave0_PWDATA[29]), .D(apb_st[5]), .Y(pwdata_8_2_Z[29]) ); defparam \pwdata_8_2[29] .INIT=16'hE200; // @48:6243 CFG4 \pwdata_8_2[22] ( .A(apb_d_resp_rd_data_net[22]), .B(pstrb[2]), .C(CoreAPB3_0_0_APBmslave0_PWDATA[22]), .D(apb_st[5]), .Y(pwdata_8_2_Z[22]) ); defparam \pwdata_8_2[22] .INIT=16'hE200; // @48:6243 CFG4 \pwdata_8_2[18] ( .A(apb_d_resp_rd_data_net[18]), .B(pstrb[2]), .C(CoreAPB3_0_0_APBmslave0_PWDATA[18]), .D(apb_st[5]), .Y(pwdata_8_2_Z[18]) ); defparam \pwdata_8_2[18] .INIT=16'hE200; // @48:6243 CFG4 \pwdata_8_2[11] ( .A(apb_d_resp_rd_data_net[11]), .B(pstrb[1]), .C(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .D(apb_st[5]), .Y(pwdata_8_2_Z[11]) ); defparam \pwdata_8_2[11] .INIT=16'hE200; // @48:6243 CFG4 \pwdata_8_2[19] ( .A(apb_d_resp_rd_data_net[19]), .B(pstrb[2]), .C(CoreAPB3_0_0_APBmslave0_PWDATA[19]), .D(apb_st[5]), .Y(pwdata_8_2_Z[19]) ); defparam \pwdata_8_2[19] .INIT=16'hE200; // @48:6243 CFG4 \pwdata_8_2[16] ( .A(apb_d_resp_rd_data_net[16]), .B(pstrb[2]), .C(CoreAPB3_0_0_APBmslave0_PWDATA[16]), .D(apb_st[5]), .Y(pwdata_8_2_Z[16]) ); defparam \pwdata_8_2[16] .INIT=16'hE200; // @48:6243 CFG4 \pwdata_8_2[26] ( .A(apb_d_resp_rd_data_net[26]), .B(pstrb[3]), .C(CoreAPB3_0_0_APBmslave0_PWDATA[26]), .D(apb_st[5]), .Y(pwdata_8_2_Z[26]) ); defparam \pwdata_8_2[26] .INIT=16'hE200; // @48:6243 CFG4 \pwdata_8_2[10] ( .A(apb_d_resp_rd_data_net[10]), .B(pstrb[1]), .C(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .D(apb_st[5]), .Y(pwdata_8_2_Z[10]) ); defparam \pwdata_8_2[10] .INIT=16'hE200; // @48:6231 CFG3 \gen_apb_byte_shim.apb_st_ns_i_0_o2_0[3] ( .A(req_masked[0]), .B(apb_st[0]), .C(req_masked[1]), .Y(N_86) ); defparam \gen_apb_byte_shim.apb_st_ns_i_0_o2_0[3] .INIT=8'h37; // @48:6218 CFG4 \raddr_mux_loop_l1.un8_req_addr_mux[1] ( .A(apb_resp_sel[1]), .B(is_locked), .C(apb_d_req_addr_net[1]), .D(apb_d_req_ready_net), .Y(req_addr_mux[1]) ); defparam \raddr_mux_loop_l1.un8_req_addr_mux[1] .INIT=16'hB080; // @48:6243 CFG3 \gen_apb_byte_shim.apb_st_RNI59A5T71[0] ( .A(req_masked[0]), .B(apb_st[0]), .C(req_masked[1]), .Y(N_86_i) ); defparam \gen_apb_byte_shim.apb_st_RNI59A5T71[0] .INIT=8'hC8; // @48:6218 CFG4 \raddr_mux_loop_l1.un8_req_addr_mux[0] ( .A(apb_resp_sel[1]), .B(is_locked), .C(apb_d_req_addr_net[0]), .D(apb_d_req_ready_net), .Y(req_addr_mux[0]) ); defparam \raddr_mux_loop_l1.un8_req_addr_mux[0] .INIT=16'hB080; // @48:6243 CFG4 \un1_gen_apb_byte_shim.apb_st_0_o4_0_0 ( .A(apb_st[5]), .B(apb_st[0]), .C(apb_d_req_ready_net), .D(apb_i_req_ready_net), .Y(apb_st_0_o4_0_0) ); defparam \un1_gen_apb_byte_shim.apb_st_0_o4_0_0 .INIT=16'hEEEA; // @48:6218 CFG4 \req_addr_mux[17] ( .A(apb_d_req_addr_net[17]), .B(apb_i_req_addr_net[17]), .C(apb_src_sel[0]), .D(apb_src_sel[1]), .Y(req_addr_mux_Z[17]) ); defparam \req_addr_mux[17] .INIT=16'hEAC0; // @48:6218 CFG4 \req_addr_mux[21] ( .A(apb_d_req_addr_net[21]), .B(apb_i_req_addr_net[21]), .C(apb_src_sel[0]), .D(apb_src_sel[1]), .Y(req_addr_mux_Z[21]) ); defparam \req_addr_mux[21] .INIT=16'hEAC0; // @48:6218 CFG4 \req_addr_mux[22] ( .A(apb_d_req_addr_net[22]), .B(apb_i_req_addr_net[22]), .C(apb_src_sel[0]), .D(apb_src_sel[1]), .Y(req_addr_mux_Z[22]) ); defparam \req_addr_mux[22] .INIT=16'hEAC0; // @48:6218 CFG4 \req_addr_mux[23] ( .A(apb_d_req_addr_net[23]), .B(apb_i_req_addr_net[23]), .C(apb_src_sel[0]), .D(apb_src_sel[1]), .Y(req_addr_mux_Z[23]) ); defparam \req_addr_mux[23] .INIT=16'hEAC0; // @48:6218 CFG4 \req_addr_mux[24] ( .A(apb_d_req_addr_net[24]), .B(apb_i_req_addr_net[24]), .C(apb_src_sel[0]), .D(apb_src_sel[1]), .Y(req_addr_mux_Z[24]) ); defparam \req_addr_mux[24] .INIT=16'hEAC0; // @48:6218 CFG4 \req_addr_mux[25] ( .A(apb_d_req_addr_net[25]), .B(apb_i_req_addr_net[25]), .C(apb_src_sel[0]), .D(apb_src_sel[1]), .Y(req_addr_mux_Z[25]) ); defparam \req_addr_mux[25] .INIT=16'hEAC0; // @48:6218 CFG4 \req_addr_mux[26] ( .A(apb_d_req_addr_net[26]), .B(apb_i_req_addr_net[26]), .C(apb_src_sel[0]), .D(apb_src_sel[1]), .Y(req_addr_mux_Z[26]) ); defparam \req_addr_mux[26] .INIT=16'hEAC0; // @48:6218 CFG4 \req_addr_mux[27] ( .A(apb_d_req_addr_net[27]), .B(apb_i_req_addr_net[27]), .C(apb_src_sel[0]), .D(apb_src_sel[1]), .Y(req_addr_mux_Z[27]) ); defparam \req_addr_mux[27] .INIT=16'hEAC0; // @48:6218 CFG4 \req_addr_mux[29] ( .A(apb_d_req_addr_net[29]), .B(apb_i_req_addr_net[29]), .C(apb_src_sel[0]), .D(apb_src_sel[1]), .Y(req_addr_mux_Z[29]) ); defparam \req_addr_mux[29] .INIT=16'hEAC0; // @48:6218 CFG4 \req_addr_mux[30] ( .A(apb_d_req_addr_net[30]), .B(apb_i_req_addr_net[30]), .C(apb_src_sel[0]), .D(apb_src_sel[1]), .Y(req_addr_mux_Z[30]) ); defparam \req_addr_mux[30] .INIT=16'hEAC0; // @48:6218 CFG4 \req_addr_mux[12] ( .A(apb_d_req_addr_net[12]), .B(apb_i_req_addr_net[12]), .C(apb_src_sel[0]), .D(apb_src_sel[1]), .Y(req_addr_mux_Z[12]) ); defparam \req_addr_mux[12] .INIT=16'hEAC0; // @48:6218 CFG4 \req_addr_mux[18] ( .A(apb_d_req_addr_net[18]), .B(apb_i_req_addr_net[18]), .C(apb_src_sel[0]), .D(apb_src_sel[1]), .Y(req_addr_mux_Z[18]) ); defparam \req_addr_mux[18] .INIT=16'hEAC0; // @48:6218 CFG4 \req_addr_mux[19] ( .A(apb_d_req_addr_net[19]), .B(apb_i_req_addr_net[19]), .C(apb_src_sel[0]), .D(apb_src_sel[1]), .Y(req_addr_mux_Z[19]) ); defparam \req_addr_mux[19] .INIT=16'hEAC0; // @48:6218 CFG4 \req_addr_mux_0[5] ( .A(apb_d_req_addr_net[5]), .B(apb_i_req_addr_net[5]), .C(apb_src_sel[0]), .D(apb_src_sel[1]), .Y(req_addr_mux[5]) ); defparam \req_addr_mux_0[5] .INIT=16'hEAC0; // @48:6218 CFG4 \req_addr_mux_0[6] ( .A(apb_d_req_addr_net[6]), .B(apb_i_req_addr_net[6]), .C(apb_src_sel[0]), .D(apb_src_sel[1]), .Y(req_addr_mux[6]) ); defparam \req_addr_mux_0[6] .INIT=16'hEAC0; // @48:6218 CFG4 \req_addr_mux_0[7] ( .A(apb_d_req_addr_net[7]), .B(apb_i_req_addr_net[7]), .C(apb_src_sel[0]), .D(apb_src_sel[1]), .Y(req_addr_mux[7]) ); defparam \req_addr_mux_0[7] .INIT=16'hEAC0; // @48:6218 CFG4 \req_addr_mux_0[8] ( .A(apb_d_req_addr_net[8]), .B(apb_i_req_addr_net[8]), .C(apb_src_sel[0]), .D(apb_src_sel[1]), .Y(req_addr_mux[8]) ); defparam \req_addr_mux_0[8] .INIT=16'hEAC0; // @48:6218 CFG4 \req_addr_mux_0[10] ( .A(apb_d_req_addr_net[10]), .B(apb_i_req_addr_net[10]), .C(apb_src_sel[0]), .D(apb_src_sel[1]), .Y(req_addr_mux[10]) ); defparam \req_addr_mux_0[10] .INIT=16'hEAC0; // @48:6218 CFG4 \req_addr_mux_0[11] ( .A(apb_d_req_addr_net[11]), .B(apb_i_req_addr_net[11]), .C(apb_src_sel[0]), .D(apb_src_sel[1]), .Y(req_addr_mux[11]) ); defparam \req_addr_mux_0[11] .INIT=16'hEAC0; // @48:6218 CFG4 \req_addr_mux[4] ( .A(apb_d_req_addr_net[4]), .B(apb_i_req_addr_net[4]), .C(apb_src_sel[0]), .D(apb_src_sel[1]), .Y(req_addr_mux_Z[4]) ); defparam \req_addr_mux[4] .INIT=16'hEAC0; // @48:6218 CFG4 \req_addr_mux[31] ( .A(apb_d_req_addr_net[31]), .B(apb_i_req_addr_net[31]), .C(apb_src_sel[0]), .D(apb_src_sel[1]), .Y(req_addr_mux_Z[31]) ); defparam \req_addr_mux[31] .INIT=16'hEAC0; // @48:6218 CFG4 \req_addr_mux[16] ( .A(apb_d_req_addr_net[16]), .B(apb_i_req_addr_net[16]), .C(apb_src_sel[0]), .D(apb_src_sel[1]), .Y(req_addr_mux_Z[16]) ); defparam \req_addr_mux[16] .INIT=16'hEAC0; // @48:6218 CFG4 \req_addr_mux[3] ( .A(apb_d_req_addr_net[3]), .B(apb_i_req_addr_net[3]), .C(apb_src_sel[0]), .D(apb_src_sel[1]), .Y(req_addr_mux_Z[3]) ); defparam \req_addr_mux[3] .INIT=16'hEAC0; // @48:6218 CFG4 \req_addr_mux[20] ( .A(apb_d_req_addr_net[20]), .B(apb_i_req_addr_net[20]), .C(apb_src_sel[0]), .D(apb_src_sel[1]), .Y(req_addr_mux_Z[20]) ); defparam \req_addr_mux[20] .INIT=16'hEAC0; // @48:6218 CFG4 \req_addr_mux[13] ( .A(apb_d_req_addr_net[13]), .B(apb_i_req_addr_net[13]), .C(apb_src_sel[0]), .D(apb_src_sel[1]), .Y(req_addr_mux_Z[13]) ); defparam \req_addr_mux[13] .INIT=16'hEAC0; // @48:6218 CFG4 \req_addr_mux[15] ( .A(apb_d_req_addr_net[15]), .B(apb_i_req_addr_net[15]), .C(apb_src_sel[0]), .D(apb_src_sel[1]), .Y(req_addr_mux_Z[15]) ); defparam \req_addr_mux[15] .INIT=16'hEAC0; // @48:6218 CFG4 \req_addr_mux[14] ( .A(apb_d_req_addr_net[14]), .B(apb_i_req_addr_net[14]), .C(apb_src_sel[0]), .D(apb_src_sel[1]), .Y(req_addr_mux_Z[14]) ); defparam \req_addr_mux[14] .INIT=16'hEAC0; // @48:6218 CFG4 \req_addr_mux_0[9] ( .A(apb_d_req_addr_net[9]), .B(apb_i_req_addr_net[9]), .C(apb_src_sel[0]), .D(apb_src_sel[1]), .Y(req_addr_mux[9]) ); defparam \req_addr_mux_0[9] .INIT=16'hEAC0; // @48:6218 CFG4 \req_addr_mux[28] ( .A(apb_d_req_addr_net[28]), .B(apb_i_req_addr_net[28]), .C(apb_src_sel[0]), .D(apb_src_sel[1]), .Y(req_addr_mux_Z[28]) ); defparam \req_addr_mux[28] .INIT=16'hEAC0; // @48:2176 CFG3 apb_psel_0_a2 ( .A(apb_psel_net), .B(N_1411), .C(N_1212), .Y(MIV_RV32_C0_0_APB_INITIATOR_PSELx) ); defparam apb_psel_0_a2.INIT=8'h2A; // @48:6231 CFG4 \gen_apb_byte_shim.pwrite_5_0_0_127_i_a2_i_a2_1 ( .A(is_locked), .B(apb_resp_sel[1]), .C(apb_d_req_ready_net), .D(apb_d_req_wr_byte_en_net[0]), .Y(N_73_1) ); defparam \gen_apb_byte_shim.pwrite_5_0_0_127_i_a2_i_a2_1 .INIT=16'hD800; // @48:2177 CFG4 apb_penable_0_a2 ( .A(apb_penable_net), .B(N_1411), .C(N_1225), .D(N_1212), .Y(CoreAPB3_0_0_APBmslave0_PENABLE) ); defparam apb_penable_0_a2.INIT=16'h222A; // @48:6218 CFG4 \req_addr_mux[2] ( .A(apb_d_req_addr_net[2]), .B(apb_i_req_addr_net[2]), .C(apb_src_sel[0]), .D(apb_src_sel[1]), .Y(req_addr_mux_Z[2]) ); defparam \req_addr_mux[2] .INIT=16'hEAC0; // @48:6243 CFG2 un1_req_complete_reg11_3_0_0_a3_0 ( .A(N_1153), .B(apb_penable_net), .Y(N_88) ); defparam un1_req_complete_reg11_3_0_0_a3_0.INIT=4'h8; // @48:6231 CFG4 \gen_apb_byte_shim.pstrb_RNO[2] ( .A(is_locked), .B(apb_resp_sel[1]), .C(apb_d_req_ready_net), .D(apb_d_req_wr_byte_en_net[2]), .Y(N_1131_i) ); defparam \gen_apb_byte_shim.pstrb_RNO[2] .INIT=16'hD800; // @48:6219 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[18] ( .A(is_locked), .B(apb_resp_sel[1]), .C(apb_d_req_ready_net), .D(apb_d_req_wr_data_net[18]), .Y(un10_req_wr_data_mux[18]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[18] .INIT=16'hD800; // @48:6219 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[17] ( .A(is_locked), .B(apb_resp_sel[1]), .C(apb_d_req_ready_net), .D(apb_d_req_wr_data_net[17]), .Y(un10_req_wr_data_mux[17]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[17] .INIT=16'hD800; // @48:6219 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[19] ( .A(is_locked), .B(apb_resp_sel[1]), .C(apb_d_req_ready_net), .D(apb_d_req_wr_data_net[19]), .Y(un10_req_wr_data_mux[19]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[19] .INIT=16'hD800; // @48:6219 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[20] ( .A(is_locked), .B(apb_resp_sel[1]), .C(apb_d_req_ready_net), .D(apb_d_req_wr_data_net[20]), .Y(un10_req_wr_data_mux[20]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[20] .INIT=16'hD800; // @48:6231 CFG2 \gen_apb_byte_shim.pwrite_5_0_0_127_i_a2_i_a2_2 ( .A(apb_d_req_wr_byte_en_net[2]), .B(apb_d_req_wr_byte_en_net[3]), .Y(N_73_2) ); defparam \gen_apb_byte_shim.pwrite_5_0_0_127_i_a2_i_a2_2 .INIT=4'h8; // @48:6219 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[21] ( .A(is_locked), .B(apb_resp_sel[1]), .C(apb_d_req_ready_net), .D(apb_d_req_wr_data_net[21]), .Y(un10_req_wr_data_mux[21]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[21] .INIT=16'hD800; // @48:6219 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[22] ( .A(is_locked), .B(apb_resp_sel[1]), .C(apb_d_req_ready_net), .D(apb_d_req_wr_data_net[22]), .Y(un10_req_wr_data_mux[22]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[22] .INIT=16'hD800; // @48:6219 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[23] ( .A(is_locked), .B(apb_resp_sel[1]), .C(apb_d_req_ready_net), .D(apb_d_req_wr_data_net[23]), .Y(un10_req_wr_data_mux[23]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[23] .INIT=16'hD800; // @48:6243 CFG4 un1_req_complete_reg11_3_0_0_o2 ( .A(un3_apb_int_sel), .B(N_88), .C(iPRDATA_0_sqmuxa), .D(Oi0O1), .Y(N_1135) ); defparam un1_req_complete_reg11_3_0_0_o2.INIT=16'hDDCD; // @48:6219 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[2] ( .A(is_locked), .B(apb_resp_sel[1]), .C(apb_d_req_ready_net), .D(apb_d_req_wr_data_net[2]), .Y(un10_req_wr_data_mux[2]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[2] .INIT=16'hD800; // @48:6219 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[4] ( .A(is_locked), .B(apb_resp_sel[1]), .C(apb_d_req_ready_net), .D(apb_d_req_wr_data_net[4]), .Y(un10_req_wr_data_mux[4]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[4] .INIT=16'hD800; // @48:6219 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[5] ( .A(is_locked), .B(apb_resp_sel[1]), .C(apb_d_req_ready_net), .D(apb_d_req_wr_data_net[5]), .Y(un10_req_wr_data_mux[5]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[5] .INIT=16'hD800; // @48:6219 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[10] ( .A(is_locked), .B(apb_resp_sel[1]), .C(apb_d_req_ready_net), .D(apb_d_req_wr_data_net[10]), .Y(un10_req_wr_data_mux[10]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[10] .INIT=16'hD800; // @48:6219 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[12] ( .A(is_locked), .B(apb_resp_sel[1]), .C(apb_d_req_ready_net), .D(apb_d_req_wr_data_net[12]), .Y(un10_req_wr_data_mux[12]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[12] .INIT=16'hD800; // @48:6219 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[13] ( .A(is_locked), .B(apb_resp_sel[1]), .C(apb_d_req_ready_net), .D(apb_d_req_wr_data_net[13]), .Y(un10_req_wr_data_mux[13]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[13] .INIT=16'hD800; // @48:6219 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[14] ( .A(is_locked), .B(apb_resp_sel[1]), .C(apb_d_req_ready_net), .D(apb_d_req_wr_data_net[14]), .Y(un10_req_wr_data_mux[14]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[14] .INIT=16'hD800; // @48:6219 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[15] ( .A(is_locked), .B(apb_resp_sel[1]), .C(apb_d_req_ready_net), .D(apb_d_req_wr_data_net[15]), .Y(un10_req_wr_data_mux[15]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[15] .INIT=16'hD800; // @48:6219 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[11] ( .A(is_locked), .B(apb_resp_sel[1]), .C(apb_d_req_ready_net), .D(apb_d_req_wr_data_net[11]), .Y(un10_req_wr_data_mux[11]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[11] .INIT=16'hD800; // @48:6219 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[7] ( .A(is_locked), .B(apb_resp_sel[1]), .C(apb_d_req_ready_net), .D(apb_d_req_wr_data_net[7]), .Y(un10_req_wr_data_mux[7]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[7] .INIT=16'hD800; // @48:6219 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[9] ( .A(is_locked), .B(apb_resp_sel[1]), .C(apb_d_req_ready_net), .D(apb_d_req_wr_data_net[9]), .Y(un10_req_wr_data_mux[9]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[9] .INIT=16'hD800; // @48:6219 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[8] ( .A(is_locked), .B(apb_resp_sel[1]), .C(apb_d_req_ready_net), .D(apb_d_req_wr_data_net[8]), .Y(un10_req_wr_data_mux[8]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[8] .INIT=16'hD800; // @48:6219 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[3] ( .A(is_locked), .B(apb_resp_sel[1]), .C(apb_d_req_ready_net), .D(apb_d_req_wr_data_net[3]), .Y(un10_req_wr_data_mux[3]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[3] .INIT=16'hD800; // @48:6219 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[6] ( .A(is_locked), .B(apb_resp_sel[1]), .C(apb_d_req_ready_net), .D(apb_d_req_wr_data_net[6]), .Y(un10_req_wr_data_mux[6]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[6] .INIT=16'hD800; // @48:6231 CFG4 \gen_apb_byte_shim.pstrb_RNO[3] ( .A(is_locked), .B(apb_resp_sel[1]), .C(apb_d_req_ready_net), .D(apb_d_req_wr_byte_en_net[3]), .Y(N_1132_i) ); defparam \gen_apb_byte_shim.pstrb_RNO[3] .INIT=16'hD800; // @48:6231 CFG4 \gen_apb_byte_shim.pstrb_RNO[1] ( .A(is_locked), .B(apb_resp_sel[1]), .C(apb_d_req_ready_net), .D(apb_d_req_wr_byte_en_net[1]), .Y(N_1130_i) ); defparam \gen_apb_byte_shim.pstrb_RNO[1] .INIT=16'hD800; // @48:6231 CFG2 \gen_apb_byte_shim.apb_st_ns_a4_0_a2[5] ( .A(N_1135), .B(apb_st[4]), .Y(apb_st_ns[5]) ); defparam \gen_apb_byte_shim.apb_st_ns_a4_0_a2[5] .INIT=4'h8; // @48:6219 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[24] ( .A(is_locked), .B(apb_resp_sel[1]), .C(apb_d_req_ready_net), .D(apb_d_req_wr_data_net[24]), .Y(un10_req_wr_data_mux[24]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[24] .INIT=16'hD800; // @48:6219 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[25] ( .A(is_locked), .B(apb_resp_sel[1]), .C(apb_d_req_ready_net), .D(apb_d_req_wr_data_net[25]), .Y(un10_req_wr_data_mux[25]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[25] .INIT=16'hD800; // @48:6219 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[26] ( .A(is_locked), .B(apb_resp_sel[1]), .C(apb_d_req_ready_net), .D(apb_d_req_wr_data_net[26]), .Y(un10_req_wr_data_mux[26]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[26] .INIT=16'hD800; // @48:6219 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[27] ( .A(is_locked), .B(apb_resp_sel[1]), .C(apb_d_req_ready_net), .D(apb_d_req_wr_data_net[27]), .Y(un10_req_wr_data_mux[27]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[27] .INIT=16'hD800; // @48:6219 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[29] ( .A(is_locked), .B(apb_resp_sel[1]), .C(apb_d_req_ready_net), .D(apb_d_req_wr_data_net[29]), .Y(un10_req_wr_data_mux[29]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[29] .INIT=16'hD800; // @48:6219 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[28] ( .A(is_locked), .B(apb_resp_sel[1]), .C(apb_d_req_ready_net), .D(apb_d_req_wr_data_net[28]), .Y(un10_req_wr_data_mux[28]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[28] .INIT=16'hD800; // @48:6243 CFG4 un1_trx_os_d_wr_6_i_i_a2 ( .A(apb_st[5]), .B(N_1135), .C(apb_st[0]), .D(N_1139), .Y(N_72) ); defparam un1_trx_os_d_wr_6_i_i_a2.INIT=16'h0405; // @48:6243 CFG3 un1_req_complete_reg11_3_0_0 ( .A(apb_st[2]), .B(apb_st[0]), .C(N_1135), .Y(un1_req_complete_reg11_3_0_0_Z) ); defparam un1_req_complete_reg11_3_0_0.INIT=8'hEC; // @48:6231 CFG4 \gen_apb_byte_shim.apb_st_ns_0[0] ( .A(N_1135), .B(req_valid_mux), .C(apb_st[2]), .D(apb_st[0]), .Y(apb_st_ns[0]) ); defparam \gen_apb_byte_shim.apb_st_ns_0[0] .INIT=16'hB3A0; // @48:6219 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[30] ( .A(is_locked), .B(apb_resp_sel[1]), .C(apb_d_req_ready_net), .D(apb_d_req_wr_data_net[30]), .Y(un10_req_wr_data_mux[30]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[30] .INIT=16'hD800; // @48:6231 CFG4 \gen_apb_byte_shim.apb_st_ns_i_0_o2[3] ( .A(un1_cpu_d_req_ready), .B(apb_d_req_ready_net), .C(apb_resp_sel[1]), .D(is_locked), .Y(N_1137) ); defparam \gen_apb_byte_shim.apb_st_ns_i_0_o2[3] .INIT=16'hAFBB; // @48:6231 CFG4 \gen_apb_byte_shim.pwrite_5_0_0_127_i_a2_i ( .A(apb_st[5]), .B(apb_d_req_wr_byte_en_net[1]), .C(N_73_2), .D(N_73_1), .Y(N_1134) ); defparam \gen_apb_byte_shim.pwrite_5_0_0_127_i_a2_i .INIT=16'hEAAA; // @48:6243 CFG3 \pwdata_8[17] ( .A(apb_st[5]), .B(pwdata_8_2_Z[17]), .C(un10_req_wr_data_mux[17]), .Y(pwdata_8_Z[17]) ); defparam \pwdata_8[17] .INIT=8'hDC; // @48:6243 CFG3 \pwdata_8[18] ( .A(apb_st[5]), .B(pwdata_8_2_Z[18]), .C(un10_req_wr_data_mux[18]), .Y(pwdata_8_Z[18]) ); defparam \pwdata_8[18] .INIT=8'hDC; // @48:6243 CFG4 un1_penable_0_sqmuxa_0_0 ( .A(N_1139), .B(apb_st[5]), .C(N_1135), .D(N_86), .Y(un1_penable_0_sqmuxa_0_0_Z) ); defparam un1_penable_0_sqmuxa_0_0.INIT=16'hECFF; // @48:6231 CFG3 \gen_apb_byte_shim.apb_st_RNO[4] ( .A(apb_st[4]), .B(N_1135), .C(apb_st[3]), .Y(N_1152_i) ); defparam \gen_apb_byte_shim.apb_st_RNO[4] .INIT=8'hF2; // @48:6231 CFG3 \gen_apb_byte_shim.apb_st_RNO[2] ( .A(apb_st[2]), .B(N_1135), .C(apb_st[1]), .Y(N_81_i) ); defparam \gen_apb_byte_shim.apb_st_RNO[2] .INIT=8'hF2; // @48:6243 CFG3 \pwdata_8[20] ( .A(apb_st[5]), .B(pwdata_8_2_Z[20]), .C(un10_req_wr_data_mux[20]), .Y(pwdata_8_Z[20]) ); defparam \pwdata_8[20] .INIT=8'hDC; // @48:6243 CFG3 \pwdata_8[19] ( .A(apb_st[5]), .B(pwdata_8_2_Z[19]), .C(un10_req_wr_data_mux[19]), .Y(pwdata_8_Z[19]) ); defparam \pwdata_8[19] .INIT=8'hDC; // @48:6243 CFG4 \pwdata_8_1[1] ( .A(apb_d_req_wr_data_net[1]), .B(apb_src_sel[1]), .C(apb_st[5]), .D(N_1140), .Y(pwdata_8[1]) ); defparam \pwdata_8_1[1] .INIT=16'hF808; // @48:6243 CFG3 \pwdata_8[23] ( .A(apb_st[5]), .B(pwdata_8_2_Z[23]), .C(un10_req_wr_data_mux[23]), .Y(pwdata_8_Z[23]) ); defparam \pwdata_8[23] .INIT=8'hDC; // @48:6243 CFG3 \pwdata_8[21] ( .A(apb_st[5]), .B(pwdata_8_2_Z[21]), .C(un10_req_wr_data_mux[21]), .Y(pwdata_8_Z[21]) ); defparam \pwdata_8[21] .INIT=8'hDC; // @48:6243 CFG3 \pwdata_8[22] ( .A(apb_st[5]), .B(pwdata_8_2_Z[22]), .C(un10_req_wr_data_mux[22]), .Y(pwdata_8_Z[22]) ); defparam \pwdata_8[22] .INIT=8'hDC; // @48:6243 CFG4 \pwdata_8_1[0] ( .A(apb_d_req_wr_data_net[0]), .B(apb_src_sel[1]), .C(apb_st[5]), .D(N_1141), .Y(pwdata_8[0]) ); defparam \pwdata_8_1[0] .INIT=16'hF808; // @48:6243 CFG3 \pwdata_8[13] ( .A(apb_st[5]), .B(pwdata_8_2_Z[13]), .C(un10_req_wr_data_mux[13]), .Y(pwdata_8_Z[13]) ); defparam \pwdata_8[13] .INIT=8'hDC; // @48:6243 CFG3 \pwdata_8[4] ( .A(apb_st[5]), .B(pwdata_8_2_Z[4]), .C(un10_req_wr_data_mux[4]), .Y(pwdata_8_Z[4]) ); defparam \pwdata_8[4] .INIT=8'hDC; // @48:6243 CFG3 \pwdata_8[5] ( .A(apb_st[5]), .B(pwdata_8_2_Z[5]), .C(un10_req_wr_data_mux[5]), .Y(pwdata_8_Z[5]) ); defparam \pwdata_8[5] .INIT=8'hDC; // @48:6243 CFG3 \pwdata_8[7] ( .A(apb_st[5]), .B(pwdata_8_2_Z[7]), .C(un10_req_wr_data_mux[7]), .Y(pwdata_8_Z[7]) ); defparam \pwdata_8[7] .INIT=8'hDC; // @48:6243 CFG3 \pwdata_8[12] ( .A(apb_st[5]), .B(pwdata_8_2_Z[12]), .C(un10_req_wr_data_mux[12]), .Y(pwdata_8_Z[12]) ); defparam \pwdata_8[12] .INIT=8'hDC; // @48:6243 CFG3 \pwdata_8[14] ( .A(apb_st[5]), .B(pwdata_8_2_Z[14]), .C(un10_req_wr_data_mux[14]), .Y(pwdata_8_Z[14]) ); defparam \pwdata_8[14] .INIT=8'hDC; // @48:6243 CFG3 \pwdata_8[15] ( .A(apb_st[5]), .B(pwdata_8_2_Z[15]), .C(un10_req_wr_data_mux[15]), .Y(pwdata_8_Z[15]) ); defparam \pwdata_8[15] .INIT=8'hDC; // @48:6243 CFG3 \pwdata_8[6] ( .A(apb_st[5]), .B(pwdata_8_2_Z[6]), .C(un10_req_wr_data_mux[6]), .Y(pwdata_8_Z[6]) ); defparam \pwdata_8[6] .INIT=8'hDC; // @48:6243 CFG3 \pwdata_8[2] ( .A(apb_st[5]), .B(pwdata_8_2_Z[2]), .C(un10_req_wr_data_mux[2]), .Y(pwdata_8_Z[2]) ); defparam \pwdata_8[2] .INIT=8'hDC; // @48:6243 CFG3 \pwdata_8[3] ( .A(apb_st[5]), .B(pwdata_8_2_Z[3]), .C(un10_req_wr_data_mux[3]), .Y(pwdata_8_Z[3]) ); defparam \pwdata_8[3] .INIT=8'hDC; // @48:6243 CFG3 \pwdata_8[8] ( .A(apb_st[5]), .B(pwdata_8_2_Z[8]), .C(un10_req_wr_data_mux[8]), .Y(pwdata_8_Z[8]) ); defparam \pwdata_8[8] .INIT=8'hDC; // @48:6243 CFG3 \pwdata_8[9] ( .A(apb_st[5]), .B(pwdata_8_2_Z[9]), .C(un10_req_wr_data_mux[9]), .Y(pwdata_8_Z[9]) ); defparam \pwdata_8[9] .INIT=8'hDC; // @48:6243 CFG3 \pwdata_8[11] ( .A(apb_st[5]), .B(pwdata_8_2_Z[11]), .C(un10_req_wr_data_mux[11]), .Y(pwdata_8_Z[11]) ); defparam \pwdata_8[11] .INIT=8'hDC; // @48:6243 CFG3 \pwdata_8[10] ( .A(apb_st[5]), .B(pwdata_8_2_Z[10]), .C(un10_req_wr_data_mux[10]), .Y(pwdata_8_Z[10]) ); defparam \pwdata_8[10] .INIT=8'hDC; // @48:6219 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[16] ( .A(is_locked), .B(apb_resp_sel[1]), .C(apb_d_req_ready_net), .D(apb_d_req_wr_data_net[16]), .Y(un10_req_wr_data_mux[16]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[16] .INIT=16'hD800; // @48:6231 CFG4 \gen_apb_byte_shim.apb_st_ns_i_i[1] ( .A(req_valid_mux), .B(N_1137), .C(N_1145_2), .D(apb_st[5]), .Y(apb_st_ns_i_i[1]) ); defparam \gen_apb_byte_shim.apb_st_ns_i_i[1] .INIT=16'hF080; // @48:6231 CFG4 \gen_apb_byte_shim.apb_st_RNO[3] ( .A(un1_cpu_d_req_ready), .B(apb_st[0]), .C(apb_src_sel[1]), .D(req_valid_mux), .Y(N_94_i) ); defparam \gen_apb_byte_shim.apb_st_RNO[3] .INIT=16'h4000; // @48:6243 CFG3 \pwdata_8[27] ( .A(apb_st[5]), .B(pwdata_8_2_Z[27]), .C(un10_req_wr_data_mux[27]), .Y(pwdata_8_Z[27]) ); defparam \pwdata_8[27] .INIT=8'hDC; // @48:6243 CFG3 \pwdata_8[28] ( .A(apb_st[5]), .B(pwdata_8_2_Z[28]), .C(un10_req_wr_data_mux[28]), .Y(pwdata_8_Z[28]) ); defparam \pwdata_8[28] .INIT=8'hDC; // @48:6243 CFG3 \pwdata_8[25] ( .A(apb_st[5]), .B(pwdata_8_2_Z[25]), .C(un10_req_wr_data_mux[25]), .Y(pwdata_8_Z[25]) ); defparam \pwdata_8[25] .INIT=8'hDC; // @48:6243 CFG3 \pwdata_8[24] ( .A(apb_st[5]), .B(pwdata_8_2_Z[24]), .C(un10_req_wr_data_mux[24]), .Y(pwdata_8_Z[24]) ); defparam \pwdata_8[24] .INIT=8'hDC; // @48:6243 CFG3 \pwdata_8[29] ( .A(apb_st[5]), .B(pwdata_8_2_Z[29]), .C(un10_req_wr_data_mux[29]), .Y(pwdata_8_Z[29]) ); defparam \pwdata_8[29] .INIT=8'hDC; // @48:6243 CFG3 \pwdata_8[26] ( .A(apb_st[5]), .B(pwdata_8_2_Z[26]), .C(un10_req_wr_data_mux[26]), .Y(pwdata_8_Z[26]) ); defparam \pwdata_8[26] .INIT=8'hDC; // @48:6243 CFG3 \pwdata_8[30] ( .A(apb_st[5]), .B(pwdata_8_2_Z[30]), .C(un10_req_wr_data_mux[30]), .Y(pwdata_8_Z[30]) ); defparam \pwdata_8[30] .INIT=8'hDC; // @48:6219 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[31] ( .A(is_locked), .B(apb_resp_sel[1]), .C(apb_d_req_ready_net), .D(apb_d_req_wr_data_net[31]), .Y(un10_req_wr_data_mux[31]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[31] .INIT=16'hD800; // @48:6243 CFG3 \pwdata_8[16] ( .A(apb_st[5]), .B(pwdata_8_2_Z[16]), .C(un10_req_wr_data_mux[16]), .Y(pwdata_8_Z[16]) ); defparam \pwdata_8[16] .INIT=8'hDC; // @48:6243 CFG3 \pwdata_8[31] ( .A(apb_st[5]), .B(pwdata_8_2_Z[31]), .C(un10_req_wr_data_mux[31]), .Y(pwdata_8_Z[31]) ); defparam \pwdata_8[31] .INIT=8'hDC; // @48:6193 miv_rv32_rr_pri_arb_2s_1s_1s u_apb_req_arb ( .apb_i_req_addr_net(apb_i_req_addr_net[20:19]), .req_os_d_src_0(req_os_d_src_0), .apb_src_sel(apb_src_sel[1:0]), .i_trx_resp_valid_pkd(i_trx_resp_valid_pkd[1:0]), .i_trx_resp_pkd_6(i_trx_resp_pkd_6), .i_trx_resp_pkd_0(i_trx_resp_pkd_0), .req_masked(req_masked[1:0]), .apb_resp_sel(apb_resp_sel[1:0]), .un4_cpu_i_req_is_apb(un4_cpu_i_req_is_apb), .un16_cpu_i_req_is_apb(un16_cpu_i_req_is_apb), .ifu_emi_req_valid_i_0(ifu_emi_req_valid_i_0), .ifu_N_11(ifu_N_11), .cpu_d_req_valid_mux_1(cpu_d_req_valid_mux_1), .cpu_d_req_is_apb(cpu_d_req_is_apb), .un24_cpu_i_req_is_apb_19_11(un24_cpu_i_req_is_apb_19_11), .un24_cpu_i_req_is_apb_1(un24_cpu_i_req_is_apb_1), .un24_cpu_i_req_is_apb_17(un24_cpu_i_req_is_apb_17), .gen_m3(gen_m3), .cpu_i_req_is_tcm0_5_0(cpu_i_req_is_tcm0_5_0), .req_complete_reg(req_complete_reg), .apb_d_req_valid_3_0(apb_d_req_valid_3_0), .N_1157(N_1157), .req_valid_mux(req_valid_mux), .apb_i_req_valid_net_3(apb_i_req_valid_net_3), .N_1154(N_1154), .apb_i_req_ready_net_tz(apb_i_req_ready_net_tz), .apb_i_req_ready_net(apb_i_req_ready_net), .apb_d_req_ready_net(apb_d_req_ready_net), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .subsys_resetn(subsys_resetn), .N_64(N_64), .is_locked_1z(is_locked) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_subsys_apb_initiator_32s_1s_1_0_1_2_3_4_5 */ module miv_rv32_fixed_arb_3s_2 ( un10_req_wr_data_mux, un9_req_wr_byte_en_mux_0, apb_d_req_wr_byte_en_net_0, cpu_d_req_wr_byte_en_int_0, cpu_d_req_wr_data_reg, apb_d_req_wr_data_net, cpu_d_req_wr_data_reg_9_9, cpu_d_req_wr_data_reg_9_8, cpu_d_req_wr_data_reg_9_6, cpu_d_req_wr_data_reg_9_4, cpu_d_req_wr_data_reg_9_2, cpu_d_req_wr_data_reg_9_3, cpu_d_req_wr_data_reg_9_7, cpu_d_req_wr_data_reg_9_5, cpu_d_req_wr_data_reg_9_10, cpu_d_req_wr_data_reg_9_14, cpu_d_req_wr_data_reg_9_11, cpu_d_req_wr_data_reg_9_12, cpu_d_req_wr_data_reg_9_15, cpu_d_req_wr_data_reg_9_13, cpu_d_req_wr_data_reg_9_25, cpu_d_req_wr_data_reg_9_1, cpu_d_req_wr_data_reg_9_24, cpu_d_req_wr_data_reg_9_27, cpu_d_req_wr_data_reg_9_26, cpu_d_req_wr_data_reg_9_29, cpu_d_req_wr_data_reg_9_28, cpu_d_req_wr_data_reg_9_0, cpu_d_req_wr_data_reg_9_30, cpu_d_req_wr_data_reg_9_31, tcm0_d_resp_rd_data_net_9, tcm0_d_resp_rd_data_net_8, tcm0_d_resp_rd_data_net_6, tcm0_d_resp_rd_data_net_4, tcm0_d_resp_rd_data_net_25, tcm0_d_resp_rd_data_net_1, tcm0_d_resp_rd_data_net_2, tcm0_d_resp_rd_data_net_24, tcm0_d_resp_rd_data_net_3, tcm0_d_resp_rd_data_net_7, tcm0_d_resp_rd_data_net_5, tcm0_d_resp_rd_data_net_10, tcm0_d_resp_rd_data_net_0, tcm0_d_resp_rd_data_net_27, tcm0_d_resp_rd_data_net_14, tcm0_d_resp_rd_data_net_26, tcm0_d_resp_rd_data_net_11, tcm0_d_resp_rd_data_net_12, tcm0_d_resp_rd_data_net_15, tcm0_d_resp_rd_data_net_29, tcm0_d_resp_rd_data_net_13, tcm0_d_resp_rd_data_net_28, tcm0_d_resp_rd_data_net_30, tcm0_d_resp_rd_data_net_31, cpu_d_req_wr_byte_en_reg_1, cpu_d_req_wr_byte_en_reg_0, cpu_d_req_wr_byte_en_reg_3, cpu_d_wr_rd_state_0, cpu_d_req_ready_1, N_104 ) ; output [31:0] un10_req_wr_data_mux ; output un9_req_wr_byte_en_mux_0 ; input apb_d_req_wr_byte_en_net_0 ; input cpu_d_req_wr_byte_en_int_0 ; input [31:0] cpu_d_req_wr_data_reg ; input [31:0] apb_d_req_wr_data_net ; output cpu_d_req_wr_data_reg_9_9 ; output cpu_d_req_wr_data_reg_9_8 ; output cpu_d_req_wr_data_reg_9_6 ; output cpu_d_req_wr_data_reg_9_4 ; output cpu_d_req_wr_data_reg_9_2 ; output cpu_d_req_wr_data_reg_9_3 ; output cpu_d_req_wr_data_reg_9_7 ; output cpu_d_req_wr_data_reg_9_5 ; output cpu_d_req_wr_data_reg_9_10 ; output cpu_d_req_wr_data_reg_9_14 ; output cpu_d_req_wr_data_reg_9_11 ; output cpu_d_req_wr_data_reg_9_12 ; output cpu_d_req_wr_data_reg_9_15 ; output cpu_d_req_wr_data_reg_9_13 ; output cpu_d_req_wr_data_reg_9_25 ; output cpu_d_req_wr_data_reg_9_1 ; output cpu_d_req_wr_data_reg_9_24 ; output cpu_d_req_wr_data_reg_9_27 ; output cpu_d_req_wr_data_reg_9_26 ; output cpu_d_req_wr_data_reg_9_29 ; output cpu_d_req_wr_data_reg_9_28 ; output cpu_d_req_wr_data_reg_9_0 ; output cpu_d_req_wr_data_reg_9_30 ; output cpu_d_req_wr_data_reg_9_31 ; input tcm0_d_resp_rd_data_net_9 ; input tcm0_d_resp_rd_data_net_8 ; input tcm0_d_resp_rd_data_net_6 ; input tcm0_d_resp_rd_data_net_4 ; input tcm0_d_resp_rd_data_net_25 ; input tcm0_d_resp_rd_data_net_1 ; input tcm0_d_resp_rd_data_net_2 ; input tcm0_d_resp_rd_data_net_24 ; input tcm0_d_resp_rd_data_net_3 ; input tcm0_d_resp_rd_data_net_7 ; input tcm0_d_resp_rd_data_net_5 ; input tcm0_d_resp_rd_data_net_10 ; input tcm0_d_resp_rd_data_net_0 ; input tcm0_d_resp_rd_data_net_27 ; input tcm0_d_resp_rd_data_net_14 ; input tcm0_d_resp_rd_data_net_26 ; input tcm0_d_resp_rd_data_net_11 ; input tcm0_d_resp_rd_data_net_12 ; input tcm0_d_resp_rd_data_net_15 ; input tcm0_d_resp_rd_data_net_29 ; input tcm0_d_resp_rd_data_net_13 ; input tcm0_d_resp_rd_data_net_28 ; input tcm0_d_resp_rd_data_net_30 ; input tcm0_d_resp_rd_data_net_31 ; input cpu_d_req_wr_byte_en_reg_1 ; input cpu_d_req_wr_byte_en_reg_0 ; input cpu_d_req_wr_byte_en_reg_3 ; input cpu_d_wr_rd_state_0 ; input cpu_d_req_ready_1 ; input N_104 ; wire un9_req_wr_byte_en_mux_0 ; wire apb_d_req_wr_byte_en_net_0 ; wire cpu_d_req_wr_byte_en_int_0 ; wire cpu_d_req_wr_data_reg_9_9 ; wire cpu_d_req_wr_data_reg_9_8 ; wire cpu_d_req_wr_data_reg_9_6 ; wire cpu_d_req_wr_data_reg_9_4 ; wire cpu_d_req_wr_data_reg_9_2 ; wire cpu_d_req_wr_data_reg_9_3 ; wire cpu_d_req_wr_data_reg_9_7 ; wire cpu_d_req_wr_data_reg_9_5 ; wire cpu_d_req_wr_data_reg_9_10 ; wire cpu_d_req_wr_data_reg_9_14 ; wire cpu_d_req_wr_data_reg_9_11 ; wire cpu_d_req_wr_data_reg_9_12 ; wire cpu_d_req_wr_data_reg_9_15 ; wire cpu_d_req_wr_data_reg_9_13 ; wire cpu_d_req_wr_data_reg_9_25 ; wire cpu_d_req_wr_data_reg_9_1 ; wire cpu_d_req_wr_data_reg_9_24 ; wire cpu_d_req_wr_data_reg_9_27 ; wire cpu_d_req_wr_data_reg_9_26 ; wire cpu_d_req_wr_data_reg_9_29 ; wire cpu_d_req_wr_data_reg_9_28 ; wire cpu_d_req_wr_data_reg_9_0 ; wire cpu_d_req_wr_data_reg_9_30 ; wire cpu_d_req_wr_data_reg_9_31 ; wire tcm0_d_resp_rd_data_net_9 ; wire tcm0_d_resp_rd_data_net_8 ; wire tcm0_d_resp_rd_data_net_6 ; wire tcm0_d_resp_rd_data_net_4 ; wire tcm0_d_resp_rd_data_net_25 ; wire tcm0_d_resp_rd_data_net_1 ; wire tcm0_d_resp_rd_data_net_2 ; wire tcm0_d_resp_rd_data_net_24 ; wire tcm0_d_resp_rd_data_net_3 ; wire tcm0_d_resp_rd_data_net_7 ; wire tcm0_d_resp_rd_data_net_5 ; wire tcm0_d_resp_rd_data_net_10 ; wire tcm0_d_resp_rd_data_net_0 ; wire tcm0_d_resp_rd_data_net_27 ; wire tcm0_d_resp_rd_data_net_14 ; wire tcm0_d_resp_rd_data_net_26 ; wire tcm0_d_resp_rd_data_net_11 ; wire tcm0_d_resp_rd_data_net_12 ; wire tcm0_d_resp_rd_data_net_15 ; wire tcm0_d_resp_rd_data_net_29 ; wire tcm0_d_resp_rd_data_net_13 ; wire tcm0_d_resp_rd_data_net_28 ; wire tcm0_d_resp_rd_data_net_30 ; wire tcm0_d_resp_rd_data_net_31 ; wire cpu_d_req_wr_byte_en_reg_1 ; wire cpu_d_req_wr_byte_en_reg_0 ; wire cpu_d_req_wr_byte_en_reg_3 ; wire cpu_d_wr_rd_state_0 ; wire cpu_d_req_ready_1 ; wire N_104 ; wire [31:0] cpu_d_req_wr_data_reg_9_2_Z; wire GND ; wire VCC ; // @48:11065 CFG4 \cpu_d_req_wr_data_reg_9_2[9] ( .A(cpu_d_req_wr_byte_en_reg_1), .B(cpu_d_req_wr_data_reg[9]), .C(tcm0_d_resp_rd_data_net_9), .D(cpu_d_wr_rd_state_0), .Y(cpu_d_req_wr_data_reg_9_2_Z[9]) ); defparam \cpu_d_req_wr_data_reg_9_2[9] .INIT=16'hD800; // @48:11065 CFG4 \cpu_d_req_wr_data_reg_9_2[8] ( .A(cpu_d_req_wr_byte_en_reg_1), .B(cpu_d_req_wr_data_reg[8]), .C(tcm0_d_resp_rd_data_net_8), .D(cpu_d_wr_rd_state_0), .Y(cpu_d_req_wr_data_reg_9_2_Z[8]) ); defparam \cpu_d_req_wr_data_reg_9_2[8] .INIT=16'hD800; // @48:11065 CFG4 \cpu_d_req_wr_data_reg_9_2[6] ( .A(cpu_d_req_wr_byte_en_reg_0), .B(cpu_d_req_wr_data_reg[6]), .C(tcm0_d_resp_rd_data_net_6), .D(cpu_d_wr_rd_state_0), .Y(cpu_d_req_wr_data_reg_9_2_Z[6]) ); defparam \cpu_d_req_wr_data_reg_9_2[6] .INIT=16'hD800; // @48:11065 CFG4 \cpu_d_req_wr_data_reg_9_2[4] ( .A(cpu_d_req_wr_byte_en_reg_0), .B(cpu_d_req_wr_data_reg[4]), .C(tcm0_d_resp_rd_data_net_4), .D(cpu_d_wr_rd_state_0), .Y(cpu_d_req_wr_data_reg_9_2_Z[4]) ); defparam \cpu_d_req_wr_data_reg_9_2[4] .INIT=16'hD800; // @48:11065 CFG4 \cpu_d_req_wr_data_reg_9_2[25] ( .A(cpu_d_req_wr_byte_en_reg_3), .B(cpu_d_req_wr_data_reg[25]), .C(tcm0_d_resp_rd_data_net_25), .D(cpu_d_wr_rd_state_0), .Y(cpu_d_req_wr_data_reg_9_2_Z[25]) ); defparam \cpu_d_req_wr_data_reg_9_2[25] .INIT=16'hD800; // @48:11065 CFG4 \cpu_d_req_wr_data_reg_9_2[1] ( .A(cpu_d_req_wr_byte_en_reg_0), .B(cpu_d_req_wr_data_reg[1]), .C(tcm0_d_resp_rd_data_net_1), .D(cpu_d_wr_rd_state_0), .Y(cpu_d_req_wr_data_reg_9_2_Z[1]) ); defparam \cpu_d_req_wr_data_reg_9_2[1] .INIT=16'hD800; // @48:11065 CFG4 \cpu_d_req_wr_data_reg_9_2[2] ( .A(cpu_d_req_wr_byte_en_reg_0), .B(cpu_d_req_wr_data_reg[2]), .C(tcm0_d_resp_rd_data_net_2), .D(cpu_d_wr_rd_state_0), .Y(cpu_d_req_wr_data_reg_9_2_Z[2]) ); defparam \cpu_d_req_wr_data_reg_9_2[2] .INIT=16'hD800; // @48:11065 CFG4 \cpu_d_req_wr_data_reg_9_2[24] ( .A(cpu_d_req_wr_byte_en_reg_3), .B(cpu_d_req_wr_data_reg[24]), .C(tcm0_d_resp_rd_data_net_24), .D(cpu_d_wr_rd_state_0), .Y(cpu_d_req_wr_data_reg_9_2_Z[24]) ); defparam \cpu_d_req_wr_data_reg_9_2[24] .INIT=16'hD800; // @48:11065 CFG4 \cpu_d_req_wr_data_reg_9_2[3] ( .A(cpu_d_req_wr_byte_en_reg_0), .B(cpu_d_req_wr_data_reg[3]), .C(tcm0_d_resp_rd_data_net_3), .D(cpu_d_wr_rd_state_0), .Y(cpu_d_req_wr_data_reg_9_2_Z[3]) ); defparam \cpu_d_req_wr_data_reg_9_2[3] .INIT=16'hD800; // @48:11065 CFG4 \cpu_d_req_wr_data_reg_9_2[7] ( .A(cpu_d_req_wr_byte_en_reg_0), .B(cpu_d_req_wr_data_reg[7]), .C(tcm0_d_resp_rd_data_net_7), .D(cpu_d_wr_rd_state_0), .Y(cpu_d_req_wr_data_reg_9_2_Z[7]) ); defparam \cpu_d_req_wr_data_reg_9_2[7] .INIT=16'hD800; // @48:11065 CFG4 \cpu_d_req_wr_data_reg_9_2[5] ( .A(cpu_d_req_wr_byte_en_reg_0), .B(cpu_d_req_wr_data_reg[5]), .C(tcm0_d_resp_rd_data_net_5), .D(cpu_d_wr_rd_state_0), .Y(cpu_d_req_wr_data_reg_9_2_Z[5]) ); defparam \cpu_d_req_wr_data_reg_9_2[5] .INIT=16'hD800; // @48:11065 CFG4 \cpu_d_req_wr_data_reg_9_2[10] ( .A(cpu_d_req_wr_byte_en_reg_1), .B(cpu_d_req_wr_data_reg[10]), .C(tcm0_d_resp_rd_data_net_10), .D(cpu_d_wr_rd_state_0), .Y(cpu_d_req_wr_data_reg_9_2_Z[10]) ); defparam \cpu_d_req_wr_data_reg_9_2[10] .INIT=16'hD800; // @48:11065 CFG4 \cpu_d_req_wr_data_reg_9_2[0] ( .A(cpu_d_req_wr_byte_en_reg_0), .B(cpu_d_req_wr_data_reg[0]), .C(tcm0_d_resp_rd_data_net_0), .D(cpu_d_wr_rd_state_0), .Y(cpu_d_req_wr_data_reg_9_2_Z[0]) ); defparam \cpu_d_req_wr_data_reg_9_2[0] .INIT=16'hD800; // @48:11065 CFG4 \cpu_d_req_wr_data_reg_9_2[27] ( .A(cpu_d_req_wr_byte_en_reg_3), .B(cpu_d_req_wr_data_reg[27]), .C(tcm0_d_resp_rd_data_net_27), .D(cpu_d_wr_rd_state_0), .Y(cpu_d_req_wr_data_reg_9_2_Z[27]) ); defparam \cpu_d_req_wr_data_reg_9_2[27] .INIT=16'hD800; // @48:11065 CFG4 \cpu_d_req_wr_data_reg_9_2[14] ( .A(cpu_d_req_wr_byte_en_reg_1), .B(cpu_d_req_wr_data_reg[14]), .C(tcm0_d_resp_rd_data_net_14), .D(cpu_d_wr_rd_state_0), .Y(cpu_d_req_wr_data_reg_9_2_Z[14]) ); defparam \cpu_d_req_wr_data_reg_9_2[14] .INIT=16'hD800; // @48:11065 CFG4 \cpu_d_req_wr_data_reg_9_2[26] ( .A(cpu_d_req_wr_byte_en_reg_3), .B(cpu_d_req_wr_data_reg[26]), .C(tcm0_d_resp_rd_data_net_26), .D(cpu_d_wr_rd_state_0), .Y(cpu_d_req_wr_data_reg_9_2_Z[26]) ); defparam \cpu_d_req_wr_data_reg_9_2[26] .INIT=16'hD800; // @48:11065 CFG4 \cpu_d_req_wr_data_reg_9_2[11] ( .A(cpu_d_req_wr_byte_en_reg_1), .B(cpu_d_req_wr_data_reg[11]), .C(tcm0_d_resp_rd_data_net_11), .D(cpu_d_wr_rd_state_0), .Y(cpu_d_req_wr_data_reg_9_2_Z[11]) ); defparam \cpu_d_req_wr_data_reg_9_2[11] .INIT=16'hD800; // @48:11065 CFG4 \cpu_d_req_wr_data_reg_9_2[12] ( .A(cpu_d_req_wr_byte_en_reg_1), .B(cpu_d_req_wr_data_reg[12]), .C(tcm0_d_resp_rd_data_net_12), .D(cpu_d_wr_rd_state_0), .Y(cpu_d_req_wr_data_reg_9_2_Z[12]) ); defparam \cpu_d_req_wr_data_reg_9_2[12] .INIT=16'hD800; // @48:11065 CFG4 \cpu_d_req_wr_data_reg_9_2[15] ( .A(cpu_d_req_wr_byte_en_reg_1), .B(cpu_d_req_wr_data_reg[15]), .C(tcm0_d_resp_rd_data_net_15), .D(cpu_d_wr_rd_state_0), .Y(cpu_d_req_wr_data_reg_9_2_Z[15]) ); defparam \cpu_d_req_wr_data_reg_9_2[15] .INIT=16'hD800; // @48:11065 CFG4 \cpu_d_req_wr_data_reg_9_2[29] ( .A(cpu_d_req_wr_byte_en_reg_3), .B(cpu_d_req_wr_data_reg[29]), .C(tcm0_d_resp_rd_data_net_29), .D(cpu_d_wr_rd_state_0), .Y(cpu_d_req_wr_data_reg_9_2_Z[29]) ); defparam \cpu_d_req_wr_data_reg_9_2[29] .INIT=16'hD800; // @48:11065 CFG4 \cpu_d_req_wr_data_reg_9_2[13] ( .A(cpu_d_req_wr_byte_en_reg_1), .B(cpu_d_req_wr_data_reg[13]), .C(tcm0_d_resp_rd_data_net_13), .D(cpu_d_wr_rd_state_0), .Y(cpu_d_req_wr_data_reg_9_2_Z[13]) ); defparam \cpu_d_req_wr_data_reg_9_2[13] .INIT=16'hD800; // @48:11065 CFG4 \cpu_d_req_wr_data_reg_9_2[28] ( .A(cpu_d_req_wr_byte_en_reg_3), .B(cpu_d_req_wr_data_reg[28]), .C(tcm0_d_resp_rd_data_net_28), .D(cpu_d_wr_rd_state_0), .Y(cpu_d_req_wr_data_reg_9_2_Z[28]) ); defparam \cpu_d_req_wr_data_reg_9_2[28] .INIT=16'hD800; // @48:11065 CFG4 \cpu_d_req_wr_data_reg_9_2[30] ( .A(cpu_d_req_wr_byte_en_reg_3), .B(cpu_d_req_wr_data_reg[30]), .C(tcm0_d_resp_rd_data_net_30), .D(cpu_d_wr_rd_state_0), .Y(cpu_d_req_wr_data_reg_9_2_Z[30]) ); defparam \cpu_d_req_wr_data_reg_9_2[30] .INIT=16'hD800; // @48:11065 CFG4 \cpu_d_req_wr_data_reg_9_2[31] ( .A(cpu_d_req_wr_byte_en_reg_3), .B(cpu_d_req_wr_data_reg[31]), .C(tcm0_d_resp_rd_data_net_31), .D(cpu_d_wr_rd_state_0), .Y(cpu_d_req_wr_data_reg_9_2_Z[31]) ); defparam \cpu_d_req_wr_data_reg_9_2[31] .INIT=16'hD800; // @48:11065 CFG3 \cpu_d_req_wr_data_reg_9[9] ( .A(cpu_d_req_wr_data_reg_9_2_Z[9]), .B(cpu_d_wr_rd_state_0), .C(apb_d_req_wr_data_net[9]), .Y(cpu_d_req_wr_data_reg_9_9) ); defparam \cpu_d_req_wr_data_reg_9[9] .INIT=8'hBA; // @48:11065 CFG3 \cpu_d_req_wr_data_reg_9[8] ( .A(cpu_d_req_wr_data_reg_9_2_Z[8]), .B(cpu_d_wr_rd_state_0), .C(apb_d_req_wr_data_net[8]), .Y(cpu_d_req_wr_data_reg_9_8) ); defparam \cpu_d_req_wr_data_reg_9[8] .INIT=8'hBA; // @48:11065 CFG3 \cpu_d_req_wr_data_reg_9[6] ( .A(cpu_d_req_wr_data_reg_9_2_Z[6]), .B(cpu_d_wr_rd_state_0), .C(apb_d_req_wr_data_net[6]), .Y(cpu_d_req_wr_data_reg_9_6) ); defparam \cpu_d_req_wr_data_reg_9[6] .INIT=8'hBA; // @48:11065 CFG3 \cpu_d_req_wr_data_reg_9[4] ( .A(cpu_d_req_wr_data_reg_9_2_Z[4]), .B(cpu_d_wr_rd_state_0), .C(apb_d_req_wr_data_net[4]), .Y(cpu_d_req_wr_data_reg_9_4) ); defparam \cpu_d_req_wr_data_reg_9[4] .INIT=8'hBA; // @48:11065 CFG3 \cpu_d_req_wr_data_reg_9[2] ( .A(cpu_d_req_wr_data_reg_9_2_Z[2]), .B(cpu_d_wr_rd_state_0), .C(apb_d_req_wr_data_net[2]), .Y(cpu_d_req_wr_data_reg_9_2) ); defparam \cpu_d_req_wr_data_reg_9[2] .INIT=8'hBA; // @48:11065 CFG3 \cpu_d_req_wr_data_reg_9[3] ( .A(cpu_d_req_wr_data_reg_9_2_Z[3]), .B(cpu_d_wr_rd_state_0), .C(apb_d_req_wr_data_net[3]), .Y(cpu_d_req_wr_data_reg_9_3) ); defparam \cpu_d_req_wr_data_reg_9[3] .INIT=8'hBA; // @48:11065 CFG3 \cpu_d_req_wr_data_reg_9[7] ( .A(cpu_d_req_wr_data_reg_9_2_Z[7]), .B(cpu_d_wr_rd_state_0), .C(apb_d_req_wr_data_net[7]), .Y(cpu_d_req_wr_data_reg_9_7) ); defparam \cpu_d_req_wr_data_reg_9[7] .INIT=8'hBA; // @48:11065 CFG3 \cpu_d_req_wr_data_reg_9[5] ( .A(cpu_d_req_wr_data_reg_9_2_Z[5]), .B(cpu_d_wr_rd_state_0), .C(apb_d_req_wr_data_net[5]), .Y(cpu_d_req_wr_data_reg_9_5) ); defparam \cpu_d_req_wr_data_reg_9[5] .INIT=8'hBA; // @48:11065 CFG3 \cpu_d_req_wr_data_reg_9[10] ( .A(cpu_d_req_wr_data_reg_9_2_Z[10]), .B(cpu_d_wr_rd_state_0), .C(apb_d_req_wr_data_net[10]), .Y(cpu_d_req_wr_data_reg_9_10) ); defparam \cpu_d_req_wr_data_reg_9[10] .INIT=8'hBA; // @48:11065 CFG3 \cpu_d_req_wr_data_reg_9[14] ( .A(cpu_d_req_wr_data_reg_9_2_Z[14]), .B(cpu_d_wr_rd_state_0), .C(apb_d_req_wr_data_net[14]), .Y(cpu_d_req_wr_data_reg_9_14) ); defparam \cpu_d_req_wr_data_reg_9[14] .INIT=8'hBA; // @48:11065 CFG3 \cpu_d_req_wr_data_reg_9[11] ( .A(cpu_d_req_wr_data_reg_9_2_Z[11]), .B(cpu_d_wr_rd_state_0), .C(apb_d_req_wr_data_net[11]), .Y(cpu_d_req_wr_data_reg_9_11) ); defparam \cpu_d_req_wr_data_reg_9[11] .INIT=8'hBA; // @48:11065 CFG3 \cpu_d_req_wr_data_reg_9[12] ( .A(cpu_d_req_wr_data_reg_9_2_Z[12]), .B(cpu_d_wr_rd_state_0), .C(apb_d_req_wr_data_net[12]), .Y(cpu_d_req_wr_data_reg_9_12) ); defparam \cpu_d_req_wr_data_reg_9[12] .INIT=8'hBA; // @48:11065 CFG3 \cpu_d_req_wr_data_reg_9[15] ( .A(cpu_d_req_wr_data_reg_9_2_Z[15]), .B(cpu_d_wr_rd_state_0), .C(apb_d_req_wr_data_net[15]), .Y(cpu_d_req_wr_data_reg_9_15) ); defparam \cpu_d_req_wr_data_reg_9[15] .INIT=8'hBA; // @48:11065 CFG3 \cpu_d_req_wr_data_reg_9[13] ( .A(cpu_d_req_wr_data_reg_9_2_Z[13]), .B(cpu_d_wr_rd_state_0), .C(apb_d_req_wr_data_net[13]), .Y(cpu_d_req_wr_data_reg_9_13) ); defparam \cpu_d_req_wr_data_reg_9[13] .INIT=8'hBA; // @48:11065 CFG3 \cpu_d_req_wr_data_reg_9[25] ( .A(cpu_d_req_wr_data_reg_9_2_Z[25]), .B(cpu_d_wr_rd_state_0), .C(apb_d_req_wr_data_net[25]), .Y(cpu_d_req_wr_data_reg_9_25) ); defparam \cpu_d_req_wr_data_reg_9[25] .INIT=8'hBA; // @48:11065 CFG3 \cpu_d_req_wr_data_reg_9[1] ( .A(cpu_d_req_wr_data_reg_9_2_Z[1]), .B(cpu_d_wr_rd_state_0), .C(apb_d_req_wr_data_net[1]), .Y(cpu_d_req_wr_data_reg_9_1) ); defparam \cpu_d_req_wr_data_reg_9[1] .INIT=8'hBA; // @48:11065 CFG3 \cpu_d_req_wr_data_reg_9[24] ( .A(cpu_d_req_wr_data_reg_9_2_Z[24]), .B(cpu_d_wr_rd_state_0), .C(apb_d_req_wr_data_net[24]), .Y(cpu_d_req_wr_data_reg_9_24) ); defparam \cpu_d_req_wr_data_reg_9[24] .INIT=8'hBA; // @48:11065 CFG3 \cpu_d_req_wr_data_reg_9[27] ( .A(cpu_d_req_wr_data_reg_9_2_Z[27]), .B(cpu_d_wr_rd_state_0), .C(apb_d_req_wr_data_net[27]), .Y(cpu_d_req_wr_data_reg_9_27) ); defparam \cpu_d_req_wr_data_reg_9[27] .INIT=8'hBA; // @48:11065 CFG3 \cpu_d_req_wr_data_reg_9[26] ( .A(cpu_d_req_wr_data_reg_9_2_Z[26]), .B(cpu_d_wr_rd_state_0), .C(apb_d_req_wr_data_net[26]), .Y(cpu_d_req_wr_data_reg_9_26) ); defparam \cpu_d_req_wr_data_reg_9[26] .INIT=8'hBA; // @48:11065 CFG3 \cpu_d_req_wr_data_reg_9[29] ( .A(cpu_d_req_wr_data_reg_9_2_Z[29]), .B(cpu_d_wr_rd_state_0), .C(apb_d_req_wr_data_net[29]), .Y(cpu_d_req_wr_data_reg_9_29) ); defparam \cpu_d_req_wr_data_reg_9[29] .INIT=8'hBA; // @48:11065 CFG3 \cpu_d_req_wr_data_reg_9[28] ( .A(cpu_d_req_wr_data_reg_9_2_Z[28]), .B(cpu_d_wr_rd_state_0), .C(apb_d_req_wr_data_net[28]), .Y(cpu_d_req_wr_data_reg_9_28) ); defparam \cpu_d_req_wr_data_reg_9[28] .INIT=8'hBA; // @48:11065 CFG3 \cpu_d_req_wr_data_reg_9[0] ( .A(cpu_d_req_wr_data_reg_9_2_Z[0]), .B(cpu_d_wr_rd_state_0), .C(apb_d_req_wr_data_net[0]), .Y(cpu_d_req_wr_data_reg_9_0) ); defparam \cpu_d_req_wr_data_reg_9[0] .INIT=8'hBA; // @48:11065 CFG3 \cpu_d_req_wr_data_reg_9[30] ( .A(cpu_d_req_wr_data_reg_9_2_Z[30]), .B(cpu_d_wr_rd_state_0), .C(apb_d_req_wr_data_net[30]), .Y(cpu_d_req_wr_data_reg_9_30) ); defparam \cpu_d_req_wr_data_reg_9[30] .INIT=8'hBA; // @48:11065 CFG3 \cpu_d_req_wr_data_reg_9[31] ( .A(cpu_d_req_wr_data_reg_9_2_Z[31]), .B(cpu_d_wr_rd_state_0), .C(apb_d_req_wr_data_net[31]), .Y(cpu_d_req_wr_data_reg_9_31) ); defparam \cpu_d_req_wr_data_reg_9[31] .INIT=8'hBA; // @48:11226 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[14] ( .A(apb_d_req_wr_data_net[14]), .B(cpu_d_req_wr_data_reg[14]), .C(N_104), .D(cpu_d_req_ready_1), .Y(un10_req_wr_data_mux[14]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[14] .INIT=16'h0A0C; // @48:11226 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[15] ( .A(apb_d_req_wr_data_net[15]), .B(cpu_d_req_wr_data_reg[15]), .C(N_104), .D(cpu_d_req_ready_1), .Y(un10_req_wr_data_mux[15]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[15] .INIT=16'h0A0C; // @48:11226 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[17] ( .A(apb_d_req_wr_data_net[17]), .B(cpu_d_req_wr_data_reg[17]), .C(N_104), .D(cpu_d_req_ready_1), .Y(un10_req_wr_data_mux[17]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[17] .INIT=16'h0A0C; // @48:11226 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[18] ( .A(apb_d_req_wr_data_net[18]), .B(cpu_d_req_wr_data_reg[18]), .C(N_104), .D(cpu_d_req_ready_1), .Y(un10_req_wr_data_mux[18]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[18] .INIT=16'h0A0C; // @48:11226 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[19] ( .A(apb_d_req_wr_data_net[19]), .B(cpu_d_req_wr_data_reg[19]), .C(N_104), .D(cpu_d_req_ready_1), .Y(un10_req_wr_data_mux[19]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[19] .INIT=16'h0A0C; // @48:11226 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[20] ( .A(apb_d_req_wr_data_net[20]), .B(cpu_d_req_wr_data_reg[20]), .C(N_104), .D(cpu_d_req_ready_1), .Y(un10_req_wr_data_mux[20]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[20] .INIT=16'h0A0C; // @48:11226 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[21] ( .A(apb_d_req_wr_data_net[21]), .B(cpu_d_req_wr_data_reg[21]), .C(N_104), .D(cpu_d_req_ready_1), .Y(un10_req_wr_data_mux[21]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[21] .INIT=16'h0A0C; // @48:11226 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[22] ( .A(apb_d_req_wr_data_net[22]), .B(cpu_d_req_wr_data_reg[22]), .C(N_104), .D(cpu_d_req_ready_1), .Y(un10_req_wr_data_mux[22]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[22] .INIT=16'h0A0C; // @48:11226 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[23] ( .A(apb_d_req_wr_data_net[23]), .B(cpu_d_req_wr_data_reg[23]), .C(N_104), .D(cpu_d_req_ready_1), .Y(un10_req_wr_data_mux[23]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[23] .INIT=16'h0A0C; // @48:11226 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[24] ( .A(apb_d_req_wr_data_net[24]), .B(cpu_d_req_wr_data_reg[24]), .C(N_104), .D(cpu_d_req_ready_1), .Y(un10_req_wr_data_mux[24]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[24] .INIT=16'h0A0C; // @48:11226 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[25] ( .A(apb_d_req_wr_data_net[25]), .B(cpu_d_req_wr_data_reg[25]), .C(N_104), .D(cpu_d_req_ready_1), .Y(un10_req_wr_data_mux[25]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[25] .INIT=16'h0A0C; // @48:11226 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[26] ( .A(apb_d_req_wr_data_net[26]), .B(cpu_d_req_wr_data_reg[26]), .C(N_104), .D(cpu_d_req_ready_1), .Y(un10_req_wr_data_mux[26]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[26] .INIT=16'h0A0C; // @48:11226 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[27] ( .A(apb_d_req_wr_data_net[27]), .B(cpu_d_req_wr_data_reg[27]), .C(N_104), .D(cpu_d_req_ready_1), .Y(un10_req_wr_data_mux[27]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[27] .INIT=16'h0A0C; // @48:11226 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[29] ( .A(apb_d_req_wr_data_net[29]), .B(cpu_d_req_wr_data_reg[29]), .C(N_104), .D(cpu_d_req_ready_1), .Y(un10_req_wr_data_mux[29]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[29] .INIT=16'h0A0C; // @48:11226 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[30] ( .A(apb_d_req_wr_data_net[30]), .B(cpu_d_req_wr_data_reg[30]), .C(N_104), .D(cpu_d_req_ready_1), .Y(un10_req_wr_data_mux[30]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[30] .INIT=16'h0A0C; // @48:11226 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[31] ( .A(apb_d_req_wr_data_net[31]), .B(cpu_d_req_wr_data_reg[31]), .C(N_104), .D(cpu_d_req_ready_1), .Y(un10_req_wr_data_mux[31]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[31] .INIT=16'h0A0C; // @48:11226 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[10] ( .A(apb_d_req_wr_data_net[10]), .B(cpu_d_req_wr_data_reg[10]), .C(N_104), .D(cpu_d_req_ready_1), .Y(un10_req_wr_data_mux[10]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[10] .INIT=16'h0A0C; // @48:11226 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[13] ( .A(apb_d_req_wr_data_net[13]), .B(cpu_d_req_wr_data_reg[13]), .C(N_104), .D(cpu_d_req_ready_1), .Y(un10_req_wr_data_mux[13]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[13] .INIT=16'h0A0C; // @48:11226 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[0] ( .A(apb_d_req_wr_data_net[0]), .B(cpu_d_req_wr_data_reg[0]), .C(N_104), .D(cpu_d_req_ready_1), .Y(un10_req_wr_data_mux[0]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[0] .INIT=16'h0A0C; // @48:11226 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[1] ( .A(apb_d_req_wr_data_net[1]), .B(cpu_d_req_wr_data_reg[1]), .C(N_104), .D(cpu_d_req_ready_1), .Y(un10_req_wr_data_mux[1]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[1] .INIT=16'h0A0C; // @48:11226 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[2] ( .A(apb_d_req_wr_data_net[2]), .B(cpu_d_req_wr_data_reg[2]), .C(N_104), .D(cpu_d_req_ready_1), .Y(un10_req_wr_data_mux[2]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[2] .INIT=16'h0A0C; // @48:11226 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[4] ( .A(apb_d_req_wr_data_net[4]), .B(cpu_d_req_wr_data_reg[4]), .C(N_104), .D(cpu_d_req_ready_1), .Y(un10_req_wr_data_mux[4]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[4] .INIT=16'h0A0C; // @48:11226 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[16] ( .A(apb_d_req_wr_data_net[16]), .B(cpu_d_req_wr_data_reg[16]), .C(N_104), .D(cpu_d_req_ready_1), .Y(un10_req_wr_data_mux[16]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[16] .INIT=16'h0A0C; // @48:11226 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[8] ( .A(apb_d_req_wr_data_net[8]), .B(cpu_d_req_wr_data_reg[8]), .C(N_104), .D(cpu_d_req_ready_1), .Y(un10_req_wr_data_mux[8]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[8] .INIT=16'h0A0C; // @48:11226 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[11] ( .A(apb_d_req_wr_data_net[11]), .B(cpu_d_req_wr_data_reg[11]), .C(N_104), .D(cpu_d_req_ready_1), .Y(un10_req_wr_data_mux[11]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[11] .INIT=16'h0A0C; // @48:11226 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[7] ( .A(apb_d_req_wr_data_net[7]), .B(cpu_d_req_wr_data_reg[7]), .C(N_104), .D(cpu_d_req_ready_1), .Y(un10_req_wr_data_mux[7]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[7] .INIT=16'h0A0C; // @48:11226 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[5] ( .A(apb_d_req_wr_data_net[5]), .B(cpu_d_req_wr_data_reg[5]), .C(N_104), .D(cpu_d_req_ready_1), .Y(un10_req_wr_data_mux[5]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[5] .INIT=16'h0A0C; // @48:11223 CFG4 \un9_req_wr_byte_en_mux[0] ( .A(N_104), .B(cpu_d_req_wr_byte_en_int_0), .C(cpu_d_req_ready_1), .D(apb_d_req_wr_byte_en_net_0), .Y(un9_req_wr_byte_en_mux_0) ); defparam \un9_req_wr_byte_en_mux[0] .INIT=16'h5404; // @48:11226 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[9] ( .A(apb_d_req_wr_data_net[9]), .B(cpu_d_req_wr_data_reg[9]), .C(N_104), .D(cpu_d_req_ready_1), .Y(un10_req_wr_data_mux[9]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[9] .INIT=16'h0A0C; // @48:11226 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[28] ( .A(apb_d_req_wr_data_net[28]), .B(cpu_d_req_wr_data_reg[28]), .C(N_104), .D(cpu_d_req_ready_1), .Y(un10_req_wr_data_mux[28]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[28] .INIT=16'h0A0C; // @48:11226 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[3] ( .A(apb_d_req_wr_data_net[3]), .B(cpu_d_req_wr_data_reg[3]), .C(N_104), .D(cpu_d_req_ready_1), .Y(un10_req_wr_data_mux[3]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[3] .INIT=16'h0A0C; // @48:11226 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[12] ( .A(apb_d_req_wr_data_net[12]), .B(cpu_d_req_wr_data_reg[12]), .C(N_104), .D(cpu_d_req_ready_1), .Y(un10_req_wr_data_mux[12]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[12] .INIT=16'h0A0C; // @48:11226 CFG4 \raddr_mux_loop_l1.un10_req_wr_data_mux[6] ( .A(apb_d_req_wr_data_net[6]), .B(cpu_d_req_wr_data_reg[6]), .C(N_104), .D(cpu_d_req_ready_1), .Y(un10_req_wr_data_mux[6]) ); defparam \raddr_mux_loop_l1.un10_req_wr_data_mux[6] .INIT=16'h0A0C; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_fixed_arb_3s_2 */ module miv_rv32_rr_pri_arb_3s_1s_1s ( cpu_d_req_wr_byte_en_reg, tcm0_d_resp_rd_data_net, cpu_d_req_wr_data_reg_9, apb_d_req_wr_data_net, cpu_d_req_wr_data_reg, cpu_d_req_wr_byte_en_int_0, un9_req_wr_byte_en_mux_0, un10_req_wr_data_mux, req_addr_mux_3, apb_i_req_addr_net, apb_d_req_wr_byte_en_net, cpu_d_req_addr_reg, apb_d_req_addr_net, cpu_d_wr_rd_state_ns_0, resp_dest_0, cpu_d_wr_rd_state, hipri_req_ptr_3, hipri_req_ptr_0, N_104_i, tcm0_i_req_valid_net, tcm0_i_req_ready_net, tcm0_i_req_valid_1, cpu_m8_0_a3_0_3, tcm0_i_req_ready_net_tz, tcm0_d_req_valid_net, cpu_d_req_valid_mux_1, tcm0_d_req_valid_2, cpu_d_req_is_tcm0, cpu_d_req_ready_1_1z, un1_cpu_d_req_ready_1z, un1_cpu_d_req_accepted_1_0, N_190_i, N_192_i, N_308_i_1z, cpu_d_req_wr_byte_en_int_0_sqmuxa, PF_CCC_0_0_OUT0_FABCLK_0, subsys_resetn ) ; input [3:0] cpu_d_req_wr_byte_en_reg ; input [31:0] tcm0_d_resp_rd_data_net ; output [31:0] cpu_d_req_wr_data_reg_9 ; input [31:0] apb_d_req_wr_data_net ; input [31:0] cpu_d_req_wr_data_reg ; input cpu_d_req_wr_byte_en_int_0 ; output un9_req_wr_byte_en_mux_0 ; output [31:0] un10_req_wr_data_mux ; output [15:2] req_addr_mux_3 ; input [15:2] apb_i_req_addr_net ; input [3:0] apb_d_req_wr_byte_en_net ; input [15:2] cpu_d_req_addr_reg ; input [15:2] apb_d_req_addr_net ; output cpu_d_wr_rd_state_ns_0 ; input resp_dest_0 ; input [1:0] cpu_d_wr_rd_state ; output hipri_req_ptr_3 ; output hipri_req_ptr_0 ; output N_104_i ; input tcm0_i_req_valid_net ; output tcm0_i_req_ready_net ; input tcm0_i_req_valid_1 ; input cpu_m8_0_a3_0_3 ; output tcm0_i_req_ready_net_tz ; input tcm0_d_req_valid_net ; input cpu_d_req_valid_mux_1 ; input tcm0_d_req_valid_2 ; input cpu_d_req_is_tcm0 ; output cpu_d_req_ready_1_1z ; output un1_cpu_d_req_ready_1z ; output un1_cpu_d_req_accepted_1_0 ; output N_190_i ; output N_192_i ; output N_308_i_1z ; output cpu_d_req_wr_byte_en_int_0_sqmuxa ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input subsys_resetn ; wire cpu_d_req_wr_byte_en_int_0 ; wire un9_req_wr_byte_en_mux_0 ; wire cpu_d_wr_rd_state_ns_0 ; wire resp_dest_0 ; wire hipri_req_ptr_3 ; wire hipri_req_ptr_0 ; wire N_104_i ; wire tcm0_i_req_valid_net ; wire tcm0_i_req_ready_net ; wire tcm0_i_req_valid_1 ; wire cpu_m8_0_a3_0_3 ; wire tcm0_i_req_ready_net_tz ; wire tcm0_d_req_valid_net ; wire cpu_d_req_valid_mux_1 ; wire tcm0_d_req_valid_2 ; wire cpu_d_req_is_tcm0 ; wire cpu_d_req_ready_1_1z ; wire un1_cpu_d_req_ready_1z ; wire un1_cpu_d_req_accepted_1_0 ; wire N_190_i ; wire N_192_i ; wire N_308_i_1z ; wire cpu_d_req_wr_byte_en_int_0_sqmuxa ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire subsys_resetn ; wire [23:16] cpu_d_req_wr_data_reg_9_2_Z; wire [15:2] cpu_d_req_addr_sel_Z; wire VCC ; wire N_98_i ; wire GND ; wire N_110 ; wire N_114_i ; wire N_1902_i ; wire cpu_d_wr_rd_state_168_d ; wire cpu_d_req_addr_reg4_Z ; wire N_104 ; wire N_1809 ; wire N_17 ; wire N_16 ; wire N_15 ; wire N_14 ; wire N_13 ; wire N_12 ; wire N_11 ; wire N_7 ; wire N_6 ; // @48:10391 SLE \hipri_req_ptr[3] ( .Q(hipri_req_ptr_3), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_98_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10391 SLE \hipri_req_ptr[1] ( .Q(N_110), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_114_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:10391 SLE \hipri_req_ptr[0] ( .Q(hipri_req_ptr_0), .ADn(GND), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(GND), .EN(N_1902_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 CFG2 \cpu_d_wr_rd_state_ns_0_a3_0_0[0] ( .A(cpu_d_wr_rd_state[0]), .B(cpu_d_wr_rd_state[1]), .Y(cpu_d_wr_rd_state_168_d) ); defparam \cpu_d_wr_rd_state_ns_0_a3_0_0[0] .INIT=4'h1; // @48:11056 CFG2 \cpu_d_wr_rd_state_ns_0_a3_0[0] ( .A(cpu_d_req_addr_reg4_Z), .B(cpu_d_wr_rd_state_168_d), .Y(cpu_d_req_wr_byte_en_int_0_sqmuxa) ); defparam \cpu_d_wr_rd_state_ns_0_a3_0[0] .INIT=4'h8; // @48:11056 CFG2 N_308_i ( .A(cpu_d_wr_rd_state[0]), .B(resp_dest_0), .Y(N_308_i_1z) ); defparam N_308_i.INIT=4'h8; // @48:11065 CFG4 \cpu_d_req_wr_data_reg_9_2[23] ( .A(cpu_d_req_wr_byte_en_reg[2]), .B(cpu_d_req_wr_data_reg[23]), .C(tcm0_d_resp_rd_data_net[23]), .D(cpu_d_wr_rd_state[0]), .Y(cpu_d_req_wr_data_reg_9_2_Z[23]) ); defparam \cpu_d_req_wr_data_reg_9_2[23] .INIT=16'hD800; // @48:11065 CFG4 \cpu_d_req_wr_data_reg_9_2[21] ( .A(cpu_d_req_wr_byte_en_reg[2]), .B(cpu_d_req_wr_data_reg[21]), .C(tcm0_d_resp_rd_data_net[21]), .D(cpu_d_wr_rd_state[0]), .Y(cpu_d_req_wr_data_reg_9_2_Z[21]) ); defparam \cpu_d_req_wr_data_reg_9_2[21] .INIT=16'hD800; // @48:11065 CFG4 \cpu_d_req_wr_data_reg_9_2[20] ( .A(cpu_d_req_wr_byte_en_reg[2]), .B(cpu_d_req_wr_data_reg[20]), .C(tcm0_d_resp_rd_data_net[20]), .D(cpu_d_wr_rd_state[0]), .Y(cpu_d_req_wr_data_reg_9_2_Z[20]) ); defparam \cpu_d_req_wr_data_reg_9_2[20] .INIT=16'hD800; // @48:11065 CFG4 \cpu_d_req_wr_data_reg_9_2[17] ( .A(cpu_d_req_wr_byte_en_reg[2]), .B(cpu_d_req_wr_data_reg[17]), .C(tcm0_d_resp_rd_data_net[17]), .D(cpu_d_wr_rd_state[0]), .Y(cpu_d_req_wr_data_reg_9_2_Z[17]) ); defparam \cpu_d_req_wr_data_reg_9_2[17] .INIT=16'hD800; // @48:11065 CFG4 \cpu_d_req_wr_data_reg_9_2[22] ( .A(cpu_d_req_wr_byte_en_reg[2]), .B(cpu_d_req_wr_data_reg[22]), .C(tcm0_d_resp_rd_data_net[22]), .D(cpu_d_wr_rd_state[0]), .Y(cpu_d_req_wr_data_reg_9_2_Z[22]) ); defparam \cpu_d_req_wr_data_reg_9_2[22] .INIT=16'hD800; // @48:11065 CFG4 \cpu_d_req_wr_data_reg_9_2[18] ( .A(cpu_d_req_wr_byte_en_reg[2]), .B(cpu_d_req_wr_data_reg[18]), .C(tcm0_d_resp_rd_data_net[18]), .D(cpu_d_wr_rd_state[0]), .Y(cpu_d_req_wr_data_reg_9_2_Z[18]) ); defparam \cpu_d_req_wr_data_reg_9_2[18] .INIT=16'hD800; // @48:11065 CFG4 \cpu_d_req_wr_data_reg_9_2[19] ( .A(cpu_d_req_wr_byte_en_reg[2]), .B(cpu_d_req_wr_data_reg[19]), .C(tcm0_d_resp_rd_data_net[19]), .D(cpu_d_wr_rd_state[0]), .Y(cpu_d_req_wr_data_reg_9_2_Z[19]) ); defparam \cpu_d_req_wr_data_reg_9_2[19] .INIT=16'hD800; // @48:11065 CFG4 \cpu_d_req_wr_data_reg_9_2[16] ( .A(cpu_d_req_wr_byte_en_reg[2]), .B(cpu_d_req_wr_data_reg[16]), .C(tcm0_d_resp_rd_data_net[16]), .D(cpu_d_wr_rd_state[0]), .Y(cpu_d_req_wr_data_reg_9_2_Z[16]) ); defparam \cpu_d_req_wr_data_reg_9_2[16] .INIT=16'hD800; // @48:11056 CFG4 \cpu_d_wr_rd_state_ns_0[0] ( .A(resp_dest_0), .B(cpu_d_wr_rd_state[0]), .C(cpu_d_wr_rd_state_168_d), .D(cpu_d_req_addr_reg4_Z), .Y(cpu_d_wr_rd_state_ns_0) ); defparam \cpu_d_wr_rd_state_ns_0[0] .INIT=16'hF444; // @48:11056 CFG4 cpu_d_req_addr_reg4_RNIL4ELG ( .A(resp_dest_0), .B(cpu_d_wr_rd_state[1]), .C(cpu_d_req_addr_reg4_Z), .D(cpu_d_wr_rd_state[0]), .Y(N_192_i) ); defparam cpu_d_req_addr_reg4_RNIL4ELG.INIT=16'h2230; // @48:11056 CFG4 cpu_d_req_addr_reg4_RNILISNE ( .A(resp_dest_0), .B(cpu_d_wr_rd_state[0]), .C(cpu_d_wr_rd_state_168_d), .D(cpu_d_req_addr_reg4_Z), .Y(N_190_i) ); defparam cpu_d_req_addr_reg4_RNILISNE.INIT=16'hBB0B; // @48:11042 CFG3 \cpu_d_req_addr_sel[3] ( .A(cpu_d_wr_rd_state_168_d), .B(apb_d_req_addr_net[3]), .C(cpu_d_req_addr_reg[3]), .Y(cpu_d_req_addr_sel_Z[3]) ); defparam \cpu_d_req_addr_sel[3] .INIT=8'hD8; // @48:11042 CFG3 \cpu_d_req_addr_sel[6] ( .A(cpu_d_wr_rd_state_168_d), .B(apb_d_req_addr_net[6]), .C(cpu_d_req_addr_reg[6]), .Y(cpu_d_req_addr_sel_Z[6]) ); defparam \cpu_d_req_addr_sel[6] .INIT=8'hD8; // @48:11042 CFG3 \cpu_d_req_addr_sel[7] ( .A(cpu_d_wr_rd_state_168_d), .B(apb_d_req_addr_net[7]), .C(cpu_d_req_addr_reg[7]), .Y(cpu_d_req_addr_sel_Z[7]) ); defparam \cpu_d_req_addr_sel[7] .INIT=8'hD8; // @48:11042 CFG3 \cpu_d_req_addr_sel[8] ( .A(cpu_d_wr_rd_state_168_d), .B(apb_d_req_addr_net[8]), .C(cpu_d_req_addr_reg[8]), .Y(cpu_d_req_addr_sel_Z[8]) ); defparam \cpu_d_req_addr_sel[8] .INIT=8'hD8; // @48:11042 CFG3 \cpu_d_req_addr_sel[10] ( .A(cpu_d_wr_rd_state_168_d), .B(apb_d_req_addr_net[10]), .C(cpu_d_req_addr_reg[10]), .Y(cpu_d_req_addr_sel_Z[10]) ); defparam \cpu_d_req_addr_sel[10] .INIT=8'hD8; // @48:11042 CFG3 \cpu_d_req_addr_sel[11] ( .A(cpu_d_wr_rd_state_168_d), .B(cpu_d_req_addr_reg[11]), .C(apb_d_req_addr_net[11]), .Y(cpu_d_req_addr_sel_Z[11]) ); defparam \cpu_d_req_addr_sel[11] .INIT=8'hE4; // @48:11042 CFG3 \cpu_d_req_addr_sel[2] ( .A(cpu_d_wr_rd_state_168_d), .B(apb_d_req_addr_net[2]), .C(cpu_d_req_addr_reg[2]), .Y(cpu_d_req_addr_sel_Z[2]) ); defparam \cpu_d_req_addr_sel[2] .INIT=8'hD8; // @48:11042 CFG3 \cpu_d_req_addr_sel[12] ( .A(cpu_d_wr_rd_state_168_d), .B(cpu_d_req_addr_reg[12]), .C(apb_d_req_addr_net[12]), .Y(cpu_d_req_addr_sel_Z[12]) ); defparam \cpu_d_req_addr_sel[12] .INIT=8'hE4; // @48:11042 CFG3 \cpu_d_req_addr_sel[4] ( .A(cpu_d_wr_rd_state_168_d), .B(apb_d_req_addr_net[4]), .C(cpu_d_req_addr_reg[4]), .Y(cpu_d_req_addr_sel_Z[4]) ); defparam \cpu_d_req_addr_sel[4] .INIT=8'hD8; // @48:11042 CFG3 \cpu_d_req_addr_sel[15] ( .A(cpu_d_wr_rd_state_168_d), .B(cpu_d_req_addr_reg[15]), .C(apb_d_req_addr_net[15]), .Y(cpu_d_req_addr_sel_Z[15]) ); defparam \cpu_d_req_addr_sel[15] .INIT=8'hE4; // @48:11042 CFG3 \cpu_d_req_addr_sel[14] ( .A(cpu_d_wr_rd_state_168_d), .B(cpu_d_req_addr_reg[14]), .C(apb_d_req_addr_net[14]), .Y(cpu_d_req_addr_sel_Z[14]) ); defparam \cpu_d_req_addr_sel[14] .INIT=8'hE4; // @48:11042 CFG3 \cpu_d_req_addr_sel[13] ( .A(cpu_d_wr_rd_state_168_d), .B(cpu_d_req_addr_reg[13]), .C(apb_d_req_addr_net[13]), .Y(cpu_d_req_addr_sel_Z[13]) ); defparam \cpu_d_req_addr_sel[13] .INIT=8'hE4; // @48:11042 CFG3 \cpu_d_req_addr_sel[5] ( .A(cpu_d_wr_rd_state_168_d), .B(apb_d_req_addr_net[5]), .C(cpu_d_req_addr_reg[5]), .Y(cpu_d_req_addr_sel_Z[5]) ); defparam \cpu_d_req_addr_sel[5] .INIT=8'hD8; // @48:11042 CFG3 \cpu_d_req_addr_sel[9] ( .A(cpu_d_wr_rd_state_168_d), .B(apb_d_req_addr_net[9]), .C(cpu_d_req_addr_reg[9]), .Y(cpu_d_req_addr_sel_Z[9]) ); defparam \cpu_d_req_addr_sel[9] .INIT=8'hD8; // @48:11039 CFG4 \gen_TCM_byte_shim.un7_cpu_d_req_wr_byte_en_sel ( .A(apb_d_req_wr_byte_en_net[2]), .B(apb_d_req_wr_byte_en_net[1]), .C(apb_d_req_wr_byte_en_net[0]), .D(apb_d_req_wr_byte_en_net[3]), .Y(un1_cpu_d_req_accepted_1_0) ); defparam \gen_TCM_byte_shim.un7_cpu_d_req_wr_byte_en_sel .INIT=16'hFFFE; // @48:11052 CFG4 un1_cpu_d_req_ready ( .A(apb_d_req_wr_byte_en_net[2]), .B(apb_d_req_wr_byte_en_net[1]), .C(apb_d_req_wr_byte_en_net[0]), .D(apb_d_req_wr_byte_en_net[3]), .Y(un1_cpu_d_req_ready_1z) ); defparam un1_cpu_d_req_ready.INIT=16'h8001; // @48:11065 CFG3 \cpu_d_req_wr_data_reg_9_cZ[17] ( .A(cpu_d_req_wr_data_reg_9_2_Z[17]), .B(cpu_d_wr_rd_state[0]), .C(apb_d_req_wr_data_net[17]), .Y(cpu_d_req_wr_data_reg_9[17]) ); defparam \cpu_d_req_wr_data_reg_9_cZ[17] .INIT=8'hBA; // @48:11065 CFG3 \cpu_d_req_wr_data_reg_9_cZ[18] ( .A(cpu_d_req_wr_data_reg_9_2_Z[18]), .B(cpu_d_wr_rd_state[0]), .C(apb_d_req_wr_data_net[18]), .Y(cpu_d_req_wr_data_reg_9[18]) ); defparam \cpu_d_req_wr_data_reg_9_cZ[18] .INIT=8'hBA; // @48:11065 CFG3 \cpu_d_req_wr_data_reg_9_cZ[20] ( .A(cpu_d_req_wr_data_reg_9_2_Z[20]), .B(cpu_d_wr_rd_state[0]), .C(apb_d_req_wr_data_net[20]), .Y(cpu_d_req_wr_data_reg_9[20]) ); defparam \cpu_d_req_wr_data_reg_9_cZ[20] .INIT=8'hBA; // @48:11065 CFG3 \cpu_d_req_wr_data_reg_9_cZ[19] ( .A(cpu_d_req_wr_data_reg_9_2_Z[19]), .B(cpu_d_wr_rd_state[0]), .C(apb_d_req_wr_data_net[19]), .Y(cpu_d_req_wr_data_reg_9[19]) ); defparam \cpu_d_req_wr_data_reg_9_cZ[19] .INIT=8'hBA; // @48:11052 CFG2 cpu_d_req_ready_1 ( .A(un1_cpu_d_req_ready_1z), .B(cpu_d_wr_rd_state_168_d), .Y(cpu_d_req_ready_1_1z) ); defparam cpu_d_req_ready_1.INIT=4'h8; // @48:11065 CFG3 \cpu_d_req_wr_data_reg_9_cZ[23] ( .A(cpu_d_req_wr_data_reg_9_2_Z[23]), .B(cpu_d_wr_rd_state[0]), .C(apb_d_req_wr_data_net[23]), .Y(cpu_d_req_wr_data_reg_9[23]) ); defparam \cpu_d_req_wr_data_reg_9_cZ[23] .INIT=8'hBA; // @48:11065 CFG3 \cpu_d_req_wr_data_reg_9_cZ[21] ( .A(cpu_d_req_wr_data_reg_9_2_Z[21]), .B(cpu_d_wr_rd_state[0]), .C(apb_d_req_wr_data_net[21]), .Y(cpu_d_req_wr_data_reg_9[21]) ); defparam \cpu_d_req_wr_data_reg_9_cZ[21] .INIT=8'hBA; // @48:11065 CFG3 \cpu_d_req_wr_data_reg_9_cZ[22] ( .A(cpu_d_req_wr_data_reg_9_2_Z[22]), .B(cpu_d_wr_rd_state[0]), .C(apb_d_req_wr_data_net[22]), .Y(cpu_d_req_wr_data_reg_9[22]) ); defparam \cpu_d_req_wr_data_reg_9_cZ[22] .INIT=8'hBA; // @48:11065 CFG3 \cpu_d_req_wr_data_reg_9_cZ[16] ( .A(cpu_d_req_wr_data_reg_9_2_Z[16]), .B(cpu_d_wr_rd_state[0]), .C(apb_d_req_wr_data_net[16]), .Y(cpu_d_req_wr_data_reg_9[16]) ); defparam \cpu_d_req_wr_data_reg_9_cZ[16] .INIT=8'hBA; // @48:11067 CFG4 cpu_d_req_addr_reg4 ( .A(cpu_d_req_is_tcm0), .B(tcm0_d_req_valid_2), .C(cpu_d_req_valid_mux_1), .D(un1_cpu_d_req_ready_1z), .Y(cpu_d_req_addr_reg4_Z) ); defparam cpu_d_req_addr_reg4.INIT=16'h0080; // @48:10444 CFG4 \gnt_0_tz[0] ( .A(N_110), .B(hipri_req_ptr_0), .C(hipri_req_ptr_3), .D(tcm0_d_req_valid_net), .Y(tcm0_i_req_ready_net_tz) ); defparam \gnt_0_tz[0] .INIT=16'h5557; // @48:10444 CFG3 \gnt_0[0] ( .A(cpu_m8_0_a3_0_3), .B(tcm0_i_req_ready_net_tz), .C(tcm0_i_req_valid_1), .Y(tcm0_i_req_ready_net) ); defparam \gnt_0[0] .INIT=8'h80; // @48:10444 CFG4 \gnt_i[1] ( .A(hipri_req_ptr_0), .B(hipri_req_ptr_3), .C(tcm0_d_req_valid_net), .D(tcm0_i_req_valid_net), .Y(N_104) ); defparam \gnt_i[1] .INIT=16'hEF0F; // @48:10391 CFG3 \hipri_req_ptr_RNO[0] ( .A(cpu_m8_0_a3_0_3), .B(tcm0_d_req_valid_net), .C(tcm0_i_req_valid_1), .Y(N_1902_i) ); defparam \hipri_req_ptr_RNO[0] .INIT=8'hEC; // @48:10391 CFG4 \hipri_req_ptr_RNO[1] ( .A(tcm0_d_req_valid_net), .B(N_110), .C(cpu_m8_0_a3_0_3), .D(tcm0_i_req_valid_1), .Y(N_114_i) ); defparam \hipri_req_ptr_RNO[1] .INIT=16'h7444; // @48:11226 CFG4 \hipri_req_ptr_RNI2EN6Q[0] ( .A(hipri_req_ptr_0), .B(hipri_req_ptr_3), .C(tcm0_d_req_valid_net), .D(tcm0_i_req_valid_net), .Y(N_104_i) ); defparam \hipri_req_ptr_RNI2EN6Q[0] .INIT=16'h10F0; // @48:11224 CFG4 \req_addr_mux_3_cZ[3] ( .A(cpu_d_req_addr_sel_Z[3]), .B(apb_i_req_addr_net[3]), .C(tcm0_i_req_ready_net), .D(N_104), .Y(req_addr_mux_3[3]) ); defparam \req_addr_mux_3_cZ[3] .INIT=16'hC0EA; // @48:11224 CFG4 \req_addr_mux_3_cZ[6] ( .A(cpu_d_req_addr_sel_Z[6]), .B(apb_i_req_addr_net[6]), .C(tcm0_i_req_ready_net), .D(N_104), .Y(req_addr_mux_3[6]) ); defparam \req_addr_mux_3_cZ[6] .INIT=16'hC0EA; // @48:11224 CFG4 \req_addr_mux_3_cZ[7] ( .A(cpu_d_req_addr_sel_Z[7]), .B(apb_i_req_addr_net[7]), .C(tcm0_i_req_ready_net), .D(N_104), .Y(req_addr_mux_3[7]) ); defparam \req_addr_mux_3_cZ[7] .INIT=16'hC0EA; // @48:11224 CFG4 \req_addr_mux_3_cZ[8] ( .A(cpu_d_req_addr_sel_Z[8]), .B(apb_i_req_addr_net[8]), .C(tcm0_i_req_ready_net), .D(N_104), .Y(req_addr_mux_3[8]) ); defparam \req_addr_mux_3_cZ[8] .INIT=16'hC0EA; // @48:11224 CFG4 \req_addr_mux_3_cZ[10] ( .A(cpu_d_req_addr_sel_Z[10]), .B(apb_i_req_addr_net[10]), .C(tcm0_i_req_ready_net), .D(N_104), .Y(req_addr_mux_3[10]) ); defparam \req_addr_mux_3_cZ[10] .INIT=16'hC0EA; // @48:11224 CFG4 \req_addr_mux_3_cZ[11] ( .A(tcm0_i_req_ready_net), .B(N_104), .C(cpu_d_req_addr_sel_Z[11]), .D(apb_i_req_addr_net[11]), .Y(req_addr_mux_3[11]) ); defparam \req_addr_mux_3_cZ[11] .INIT=16'hBA30; // @48:11224 CFG4 \req_addr_mux_3_cZ[2] ( .A(cpu_d_req_addr_sel_Z[2]), .B(apb_i_req_addr_net[2]), .C(tcm0_i_req_ready_net), .D(N_104), .Y(req_addr_mux_3[2]) ); defparam \req_addr_mux_3_cZ[2] .INIT=16'hC0EA; // @48:11224 CFG4 \req_addr_mux_3_cZ[12] ( .A(tcm0_i_req_ready_net), .B(N_104), .C(cpu_d_req_addr_sel_Z[12]), .D(apb_i_req_addr_net[12]), .Y(req_addr_mux_3[12]) ); defparam \req_addr_mux_3_cZ[12] .INIT=16'hBA30; // @48:11224 CFG4 \req_addr_mux_3_cZ[4] ( .A(cpu_d_req_addr_sel_Z[4]), .B(apb_i_req_addr_net[4]), .C(tcm0_i_req_ready_net), .D(N_104), .Y(req_addr_mux_3[4]) ); defparam \req_addr_mux_3_cZ[4] .INIT=16'hC0EA; // @48:11224 CFG4 \req_addr_mux_3_cZ[15] ( .A(tcm0_i_req_ready_net), .B(N_104), .C(cpu_d_req_addr_sel_Z[15]), .D(apb_i_req_addr_net[15]), .Y(req_addr_mux_3[15]) ); defparam \req_addr_mux_3_cZ[15] .INIT=16'hBA30; // @48:11224 CFG4 \req_addr_mux_3_cZ[14] ( .A(tcm0_i_req_ready_net), .B(N_104), .C(cpu_d_req_addr_sel_Z[14]), .D(apb_i_req_addr_net[14]), .Y(req_addr_mux_3[14]) ); defparam \req_addr_mux_3_cZ[14] .INIT=16'hBA30; // @48:11224 CFG4 \req_addr_mux_3_cZ[13] ( .A(tcm0_i_req_ready_net), .B(N_104), .C(cpu_d_req_addr_sel_Z[13]), .D(apb_i_req_addr_net[13]), .Y(req_addr_mux_3[13]) ); defparam \req_addr_mux_3_cZ[13] .INIT=16'hBA30; // @48:11224 CFG4 \req_addr_mux_3_cZ[5] ( .A(cpu_d_req_addr_sel_Z[5]), .B(apb_i_req_addr_net[5]), .C(tcm0_i_req_ready_net), .D(N_104), .Y(req_addr_mux_3[5]) ); defparam \req_addr_mux_3_cZ[5] .INIT=16'hC0EA; // @48:11224 CFG4 \req_addr_mux_3_cZ[9] ( .A(cpu_d_req_addr_sel_Z[9]), .B(apb_i_req_addr_net[9]), .C(tcm0_i_req_ready_net), .D(N_104), .Y(req_addr_mux_3[9]) ); defparam \req_addr_mux_3_cZ[9] .INIT=16'hC0EA; // @48:10391 CFG4 \hipri_req_ptr_RNO[3] ( .A(N_110), .B(hipri_req_ptr_3), .C(tcm0_d_req_valid_net), .D(tcm0_i_req_valid_net), .Y(N_98_i) ); defparam \hipri_req_ptr_RNO[3] .INIT=16'hA0F4; // @48:10424 miv_rv32_fixed_arb_3s_2 \gen_pri_arb[0].u_miv_rv32_fixed_arb ( .un10_req_wr_data_mux(un10_req_wr_data_mux[31:0]), .un9_req_wr_byte_en_mux_0(un9_req_wr_byte_en_mux_0), .apb_d_req_wr_byte_en_net_0(apb_d_req_wr_byte_en_net[0]), .cpu_d_req_wr_byte_en_int_0(cpu_d_req_wr_byte_en_int_0), .cpu_d_req_wr_data_reg(cpu_d_req_wr_data_reg[31:0]), .apb_d_req_wr_data_net(apb_d_req_wr_data_net[31:0]), .cpu_d_req_wr_data_reg_9_9(cpu_d_req_wr_data_reg_9[9]), .cpu_d_req_wr_data_reg_9_8(cpu_d_req_wr_data_reg_9[8]), .cpu_d_req_wr_data_reg_9_6(cpu_d_req_wr_data_reg_9[6]), .cpu_d_req_wr_data_reg_9_4(cpu_d_req_wr_data_reg_9[4]), .cpu_d_req_wr_data_reg_9_2(cpu_d_req_wr_data_reg_9[2]), .cpu_d_req_wr_data_reg_9_3(cpu_d_req_wr_data_reg_9[3]), .cpu_d_req_wr_data_reg_9_7(cpu_d_req_wr_data_reg_9[7]), .cpu_d_req_wr_data_reg_9_5(cpu_d_req_wr_data_reg_9[5]), .cpu_d_req_wr_data_reg_9_10(cpu_d_req_wr_data_reg_9[10]), .cpu_d_req_wr_data_reg_9_14(cpu_d_req_wr_data_reg_9[14]), .cpu_d_req_wr_data_reg_9_11(cpu_d_req_wr_data_reg_9[11]), .cpu_d_req_wr_data_reg_9_12(cpu_d_req_wr_data_reg_9[12]), .cpu_d_req_wr_data_reg_9_15(cpu_d_req_wr_data_reg_9[15]), .cpu_d_req_wr_data_reg_9_13(cpu_d_req_wr_data_reg_9[13]), .cpu_d_req_wr_data_reg_9_25(cpu_d_req_wr_data_reg_9[25]), .cpu_d_req_wr_data_reg_9_1(cpu_d_req_wr_data_reg_9[1]), .cpu_d_req_wr_data_reg_9_24(cpu_d_req_wr_data_reg_9[24]), .cpu_d_req_wr_data_reg_9_27(cpu_d_req_wr_data_reg_9[27]), .cpu_d_req_wr_data_reg_9_26(cpu_d_req_wr_data_reg_9[26]), .cpu_d_req_wr_data_reg_9_29(cpu_d_req_wr_data_reg_9[29]), .cpu_d_req_wr_data_reg_9_28(cpu_d_req_wr_data_reg_9[28]), .cpu_d_req_wr_data_reg_9_0(cpu_d_req_wr_data_reg_9[0]), .cpu_d_req_wr_data_reg_9_30(cpu_d_req_wr_data_reg_9[30]), .cpu_d_req_wr_data_reg_9_31(cpu_d_req_wr_data_reg_9[31]), .tcm0_d_resp_rd_data_net_9(tcm0_d_resp_rd_data_net[9]), .tcm0_d_resp_rd_data_net_8(tcm0_d_resp_rd_data_net[8]), .tcm0_d_resp_rd_data_net_6(tcm0_d_resp_rd_data_net[6]), .tcm0_d_resp_rd_data_net_4(tcm0_d_resp_rd_data_net[4]), .tcm0_d_resp_rd_data_net_25(tcm0_d_resp_rd_data_net[25]), .tcm0_d_resp_rd_data_net_1(tcm0_d_resp_rd_data_net[1]), .tcm0_d_resp_rd_data_net_2(tcm0_d_resp_rd_data_net[2]), .tcm0_d_resp_rd_data_net_24(tcm0_d_resp_rd_data_net[24]), .tcm0_d_resp_rd_data_net_3(tcm0_d_resp_rd_data_net[3]), .tcm0_d_resp_rd_data_net_7(tcm0_d_resp_rd_data_net[7]), .tcm0_d_resp_rd_data_net_5(tcm0_d_resp_rd_data_net[5]), .tcm0_d_resp_rd_data_net_10(tcm0_d_resp_rd_data_net[10]), .tcm0_d_resp_rd_data_net_0(tcm0_d_resp_rd_data_net[0]), .tcm0_d_resp_rd_data_net_27(tcm0_d_resp_rd_data_net[27]), .tcm0_d_resp_rd_data_net_14(tcm0_d_resp_rd_data_net[14]), .tcm0_d_resp_rd_data_net_26(tcm0_d_resp_rd_data_net[26]), .tcm0_d_resp_rd_data_net_11(tcm0_d_resp_rd_data_net[11]), .tcm0_d_resp_rd_data_net_12(tcm0_d_resp_rd_data_net[12]), .tcm0_d_resp_rd_data_net_15(tcm0_d_resp_rd_data_net[15]), .tcm0_d_resp_rd_data_net_29(tcm0_d_resp_rd_data_net[29]), .tcm0_d_resp_rd_data_net_13(tcm0_d_resp_rd_data_net[13]), .tcm0_d_resp_rd_data_net_28(tcm0_d_resp_rd_data_net[28]), .tcm0_d_resp_rd_data_net_30(tcm0_d_resp_rd_data_net[30]), .tcm0_d_resp_rd_data_net_31(tcm0_d_resp_rd_data_net[31]), .cpu_d_req_wr_byte_en_reg_1(cpu_d_req_wr_byte_en_reg[1]), .cpu_d_req_wr_byte_en_reg_0(cpu_d_req_wr_byte_en_reg[0]), .cpu_d_req_wr_byte_en_reg_3(cpu_d_req_wr_byte_en_reg[3]), .cpu_d_wr_rd_state_0(cpu_d_wr_rd_state[0]), .cpu_d_req_ready_1(cpu_d_req_ready_1_1z), .N_104(N_104) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_rr_pri_arb_3s_1s_1s */ module miv_rv32_ram_singleport_lp_Z21 ( tcm0_d_resp_rd_data_net, un10_req_wr_data_mux, req_addr_mux_3, un9_req_wr_byte_en_mux_0, PF_CCC_0_0_OUT0_FABCLK_0 ) ; output [31:0] tcm0_d_resp_rd_data_net ; input [31:0] un10_req_wr_data_mux ; input [15:2] req_addr_mux_3 ; input un9_req_wr_byte_en_mux_0 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; wire un9_req_wr_byte_en_mux_0 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire [19:0] miv_rv32_ram_singleport_lp_R4C0_A_DOUT; wire [19:0] miv_rv32_ram_singleport_lp_R5C0_A_DOUT; wire [19:0] miv_rv32_ram_singleport_lp_R6C0_A_DOUT; wire [19:0] miv_rv32_ram_singleport_lp_R7C0_A_DOUT; wire [19:0] miv_rv32_ram_singleport_lp_R16C0_B_DOUT; wire [19:0] miv_rv32_ram_singleport_lp_R17C0_B_DOUT; wire [19:0] miv_rv32_ram_singleport_lp_R11C0_A_DOUT; wire [19:0] miv_rv32_ram_singleport_lp_R11C0_B_DOUT; wire [19:0] miv_rv32_ram_singleport_lp_R0C0_A_DOUT; wire [19:0] miv_rv32_ram_singleport_lp_R1C0_A_DOUT; wire [19:0] miv_rv32_ram_singleport_lp_R2C0_A_DOUT; wire [19:0] miv_rv32_ram_singleport_lp_R3C0_A_DOUT; wire [19:0] miv_rv32_ram_singleport_lp_R12C0_A_DOUT; wire [19:0] miv_rv32_ram_singleport_lp_R13C0_A_DOUT; wire [19:0] miv_rv32_ram_singleport_lp_R14C0_A_DOUT; wire [19:0] miv_rv32_ram_singleport_lp_R15C0_A_DOUT; wire [19:0] miv_rv32_ram_singleport_lp_R16C0_A_DOUT; wire [19:0] miv_rv32_ram_singleport_lp_R17C0_A_DOUT; wire [19:0] miv_rv32_ram_singleport_lp_R0C0_B_DOUT; wire [19:0] miv_rv32_ram_singleport_lp_R1C0_B_DOUT; wire [19:0] miv_rv32_ram_singleport_lp_R2C0_B_DOUT; wire [19:0] miv_rv32_ram_singleport_lp_R3C0_B_DOUT; wire [19:0] miv_rv32_ram_singleport_lp_R12C0_B_DOUT; wire [19:0] miv_rv32_ram_singleport_lp_R13C0_B_DOUT; wire [19:0] miv_rv32_ram_singleport_lp_R14C0_B_DOUT; wire [19:0] miv_rv32_ram_singleport_lp_R15C0_B_DOUT; wire [19:0] miv_rv32_ram_singleport_lp_R6C0_B_DOUT; wire [19:0] miv_rv32_ram_singleport_lp_R4C0_B_DOUT; wire [19:0] miv_rv32_ram_singleport_lp_R5C0_B_DOUT; wire [19:0] miv_rv32_ram_singleport_lp_R7C0_B_DOUT; wire [19:0] miv_rv32_ram_singleport_lp_R8C0_A_DOUT; wire [19:0] miv_rv32_ram_singleport_lp_R9C0_A_DOUT; wire [19:0] miv_rv32_ram_singleport_lp_R10C0_A_DOUT; wire [19:0] miv_rv32_ram_singleport_lp_R8C0_B_DOUT; wire [19:0] miv_rv32_ram_singleport_lp_R9C0_B_DOUT; wire [19:0] miv_rv32_ram_singleport_lp_R10C0_B_DOUT; wire CFG3_2_Y ; wire CFG3_12_Y ; wire CFG3_15_Y ; wire Z_BLKY2_1_ ; wire CFG3_16_Y ; wire CFG3_6_Y ; wire Z_BLKX2_4_ ; wire CFG3_0_Y ; wire Z_BLKY2_2_ ; wire CFG3_13_Y ; wire Z_BLKX2_0_ ; wire CFG3_5_Y ; wire Z_BLKX2_3_ ; wire CFG3_8_Y ; wire Z_BLKX2_1_ ; wire CFG3_14_Y ; wire Z_BLKX2_2_ ; wire CFG3_18_Y ; wire Z_BLKY2_4_ ; wire Z_BLKY2_0_ ; wire CFG3_19_Y ; wire Z_BLKY2_3_ ; wire OR4_303_Y ; wire OR4_1044_Y ; wire OR2_9_Y ; wire GND ; wire OR4_169_Y ; wire OR4_1281_Y ; wire OR4_1036_Y ; wire OR2_25_Y ; wire OR4_130_Y ; wire OR4_337_Y ; wire OR4_685_Y ; wire OR4_615_Y ; wire OR4_561_Y ; wire OR4_356_Y ; wire OR4_117_Y ; wire OR4_934_Y ; wire OR4_1186_Y ; wire OR4_321_Y ; wire OR4_1024_Y ; wire OR4_1020_Y ; wire OR2_1_Y ; wire OR4_98_Y ; wire OR4_916_Y ; wire OR4_630_Y ; wire OR4_712_Y ; wire OR4_368_Y ; wire OR4_975_Y ; wire OR4_122_Y ; wire OR4_750_Y ; wire OR4_964_Y ; wire OR4_922_Y ; wire OR4_1145_Y ; wire OR4_958_Y ; wire OR4_544_Y ; wire OR4_1108_Y ; wire OR4_1201_Y ; wire OR4_524_Y ; wire OR4_570_Y ; wire OR4_1113_Y ; wire OR4_579_Y ; wire OR4_881_Y ; wire OR4_1089_Y ; wire OR4_691_Y ; wire OR4_490_Y ; wire OR4_1106_Y ; wire OR4_1034_Y ; wire OR4_882_Y ; wire OR4_586_Y ; wire OR4_466_Y ; wire OR4_47_Y ; wire OR4_500_Y ; wire OR4_1189_Y ; wire OR4_166_Y ; wire OR4_509_Y ; wire VCC ; wire miv_rv32_ram_singleport_lp_R11C0_SB_CORRECT ; wire miv_rv32_ram_singleport_lp_R11C0_DB_DETECT ; wire Z_ACCESS_BUSY_11__0_ ; wire OR4_40_Y ; wire OR4_469_Y ; wire OR4_315_Y ; wire OR4_398_Y ; wire OR4_809_Y ; wire OR4_1162_Y ; wire OR4_446_Y ; wire OR2_5_Y ; wire OR4_686_Y ; wire OR4_636_Y ; wire OR4_493_Y ; wire OR4_195_Y ; wire OR4_66_Y ; wire OR4_522_Y ; wire OR4_635_Y ; wire OR4_462_Y ; wire OR4_61_Y ; wire OR4_644_Y ; wire OR4_871_Y ; wire OR4_732_Y ; wire OR4_1182_Y ; wire OR4_229_Y ; wire OR4_936_Y ; wire OR4_391_Y ; wire OR4_386_Y ; wire OR2_28_Y ; wire OR4_478_Y ; wire OR4_760_Y ; wire OR4_363_Y ; wire OR4_471_Y ; wire OR4_137_Y ; wire OR2_14_Y ; wire OR4_1259_Y ; wire OR4_144_Y ; wire OR4_652_Y ; wire OR4_1091_Y ; wire OR4_605_Y ; wire OR4_1283_Y ; wire OR4_1121_Y ; wire OR4_1294_Y ; wire OR4_1278_Y ; wire OR4_1014_Y ; wire OR4_408_Y ; wire OR4_74_Y ; wire OR4_1109_Y ; wire OR4_401_Y ; wire OR4_1127_Y ; wire OR4_300_Y ; wire OR4_221_Y ; wire OR4_246_Y ; wire OR4_214_Y ; wire OR4_1040_Y ; wire OR4_1092_Y ; wire OR4_553_Y ; wire OR4_845_Y ; wire OR4_1291_Y ; wire OR4_792_Y ; wire OR4_992_Y ; wire OR4_713_Y ; wire OR4_854_Y ; wire OR4_1285_Y ; wire OR4_176_Y ; wire OR4_1095_Y ; wire OR4_877_Y ; wire OR4_171_Y ; wire OR4_594_Y ; wire OR4_649_Y ; wire OR4_79_Y ; wire OR4_1247_Y ; wire OR4_41_Y ; wire OR4_244_Y ; wire OR4_759_Y ; wire OR4_101_Y ; wire OR4_1061_Y ; wire OR4_1224_Y ; wire OR4_862_Y ; wire OR4_688_Y ; wire OR4_374_Y ; wire OR4_1225_Y ; wire OR4_335_Y ; wire OR4_828_Y ; wire OR4_547_Y ; wire OR4_1203_Y ; wire OR4_377_Y ; wire OR4_728_Y ; wire OR4_204_Y ; wire OR4_457_Y ; wire OR4_304_Y ; wire OR4_240_Y ; wire OR4_217_Y ; wire OR4_560_Y ; wire OR4_54_Y ; wire OR4_1218_Y ; wire OR4_727_Y ; wire OR4_1165_Y ; wire OR4_885_Y ; wire OR4_274_Y ; wire OR2_22_Y ; wire OR4_63_Y ; wire OR4_592_Y ; wire OR4_307_Y ; wire OR4_924_Y ; wire OR4_50_Y ; wire OR4_232_Y ; wire OR4_97_Y ; wire OR4_569_Y ; wire OR4_46_Y ; wire OR4_90_Y ; wire OR4_1062_Y ; wire OR4_234_Y ; wire OR4_291_Y ; wire OR4_733_Y ; wire OR4_820_Y ; wire OR4_1041_Y ; wire OR4_640_Y ; wire OR4_445_Y ; wire OR2_18_Y ; wire OR4_468_Y ; wire OR4_14_Y ; wire OR4_585_Y ; wire OR4_1310_Y ; wire OR4_441_Y ; wire OR4_1256_Y ; wire OR4_461_Y ; wire OR4_1183_Y ; wire OR4_765_Y ; wire OR4_803_Y ; wire OR4_693_Y ; wire OR4_359_Y ; wire OR4_1187_Y ; wire OR4_938_Y ; wire OR4_912_Y ; wire OR4_250_Y ; wire OR4_342_Y ; wire OR4_1136_Y ; wire OR4_682_Y ; wire OR4_115_Y ; wire OR2_13_Y ; wire OR4_1235_Y ; wire OR4_427_Y ; wire OR4_656_Y ; wire OR4_850_Y ; wire OR4_702_Y ; wire Z_BLKY0_0_ ; wire Z_BLKX0_0_ ; wire miv_rv32_ram_singleport_lp_R6C0_SB_CORRECT ; wire miv_rv32_ram_singleport_lp_R6C0_DB_DETECT ; wire Z_ACCESS_BUSY_6__0_ ; wire OR4_1178_Y ; wire OR4_70_Y ; wire OR4_1253_Y ; wire OR4_898_Y ; wire OR4_237_Y ; wire OR4_1289_Y ; wire OR4_676_Y ; wire OR4_716_Y ; wire OR4_855_Y ; wire OR4_1115_Y ; wire OR4_658_Y ; wire OR4_161_Y ; wire OR4_459_Y ; wire OR4_872_Y ; wire OR4_1236_Y ; wire OR4_617_Y ; wire OR4_715_Y ; wire OR4_606_Y ; wire OR4_1120_Y ; wire OR4_364_Y ; wire OR4_3_Y ; wire OR4_1271_Y ; wire OR4_679_Y ; wire OR4_436_Y ; wire OR4_756_Y ; wire OR4_622_Y ; wire OR4_988_Y ; wire OR4_1152_Y ; wire OR4_548_Y ; wire OR4_1176_Y ; wire OR4_1013_Y ; wire OR4_1060_Y ; wire OR4_574_Y ; wire OR4_1209_Y ; wire OR4_96_Y ; wire OR4_283_Y ; wire OR4_893_Y ; wire OR4_286_Y ; wire OR4_906_Y ; wire OR4_1129_Y ; wire OR4_450_Y ; wire OR4_1025_Y ; wire OR4_350_Y ; wire OR4_844_Y ; wire OR4_489_Y ; wire OR4_911_Y ; wire OR4_351_Y ; wire OR4_105_Y ; wire OR4_804_Y ; wire OR4_334_Y ; wire OR4_624_Y ; wire OR4_736_Y ; wire OR4_637_Y ; wire OR4_173_Y ; wire OR2_31_Y ; wire OR4_735_Y ; wire OR4_875_Y ; wire OR4_1130_Y ; wire OR4_429_Y ; wire OR4_603_Y ; wire OR4_72_Y ; wire OR4_1179_Y ; wire OR4_805_Y ; wire OR4_969_Y ; wire OR4_111_Y ; wire OR4_742_Y ; wire OR4_952_Y ; wire OR4_1047_Y ; wire OR4_119_Y ; wire OR4_226_Y ; wire OR4_546_Y ; wire OR4_554_Y ; wire OR4_243_Y ; wire OR4_991_Y ; wire OR4_1055_Y ; wire OR4_415_Y ; wire OR4_629_Y ; wire OR4_236_Y ; wire OR4_514_Y ; wire OR4_494_Y ; wire OR4_1124_Y ; wire OR4_666_Y ; wire OR2_17_Y ; wire OR4_674_Y ; wire OR4_572_Y ; wire OR4_670_Y ; wire OR4_1012_Y ; wire OR4_741_Y ; wire OR4_846_Y ; wire OR2_10_Y ; wire OR4_318_Y ; wire OR4_527_Y ; wire OR4_672_Y ; wire OR4_1273_Y ; wire OR4_220_Y ; wire OR4_943_Y ; wire OR4_557_Y ; wire OR4_880_Y ; wire OR4_847_Y ; wire OR4_174_Y ; wire OR4_931_Y ; wire OR4_552_Y ; wire OR4_743_Y ; wire OR4_358_Y ; wire OR4_405_Y ; wire OR4_778_Y ; wire OR4_602_Y ; wire OR4_678_Y ; wire OR4_859_Y ; wire OR4_1067_Y ; wire OR4_1220_Y ; wire OR4_1038_Y ; wire OR4_694_Y ; wire OR4_138_Y ; wire OR4_294_Y ; wire OR4_1076_Y ; wire OR4_840_Y ; wire OR4_1048_Y ; wire OR4_608_Y ; wire OR4_1018_Y ; wire OR4_410_Y ; wire OR4_1039_Y ; wire OR4_1245_Y ; wire OR4_116_Y ; wire OR4_139_Y ; wire OR4_887_Y ; wire OR4_587_Y ; wire OR4_562_Y ; wire OR4_1199_Y ; wire OR4_251_Y ; wire OR4_233_Y ; wire OR4_419_Y ; wire OR4_1056_Y ; wire OR4_296_Y ; wire OR4_1035_Y ; wire OR4_412_Y ; wire OR4_583_Y ; wire OR4_978_Y ; wire OR4_165_Y ; wire OR4_1133_Y ; wire OR4_1107_Y ; wire OR4_434_Y ; wire OR4_12_Y ; wire OR4_699_Y ; wire OR4_884_Y ; wire OR4_710_Y ; wire OR4_865_Y ; wire OR4_322_Y ; wire OR4_313_Y ; wire OR4_491_Y ; wire OR4_908_Y ; wire OR4_1198_Y ; wire OR4_273_Y ; wire OR4_858_Y ; wire OR4_1122_Y ; wire OR4_1309_Y ; wire OR4_1164_Y ; wire OR4_338_Y ; wire OR4_789_Y ; wire OR4_1102_Y ; wire OR4_597_Y ; wire OR4_290_Y ; wire OR4_1046_Y ; wire OR4_1293_Y ; wire OR4_839_Y ; wire OR4_227_Y ; wire OR4_203_Y ; wire OR4_1196_Y ; wire OR4_426_Y ; wire OR4_935_Y ; wire OR4_75_Y ; wire OR4_1177_Y ; wire OR2_27_Y ; wire OR2_16_Y ; wire Z_BLKX1_0_ ; wire OR4_136_Y ; wire OR2_20_Y ; wire OR4_346_Y ; wire OR4_439_Y ; wire OR4_662_Y ; wire OR4_1131_Y ; wire OR4_484_Y ; wire OR4_1300_Y ; wire OR4_186_Y ; wire OR4_642_Y ; wire OR4_52_Y ; wire OR4_528_Y ; wire OR4_327_Y ; wire OR4_926_Y ; wire OR4_58_Y ; wire OR4_444_Y ; wire OR4_432_Y ; wire OR4_1292_Y ; wire OR4_228_Y ; wire OR4_1096_Y ; wire OR4_480_Y ; wire OR4_1054_Y ; wire OR4_510_Y ; wire OR4_668_Y ; wire OR4_1279_Y ; wire OR4_519_Y ; wire OR4_1104_Y ; wire OR4_44_Y ; wire OR4_89_Y ; wire OR4_730_Y ; wire OR4_333_Y ; wire OR4_19_Y ; wire OR4_1168_Y ; wire OR4_1043_Y ; wire OR4_392_Y ; wire OR4_1261_Y ; wire OR4_389_Y ; wire OR4_1051_Y ; wire OR4_1297_Y ; wire OR4_1080_Y ; wire OR4_1230_Y ; wire OR4_807_Y ; wire OR4_1068_Y ; wire OR4_1166_Y ; wire OR4_385_Y ; wire OR4_811_Y ; wire OR4_968_Y ; wire OR4_15_Y ; wire OR4_448_Y ; wire OR4_42_Y ; wire OR4_944_Y ; wire OR4_1086_Y ; wire OR4_418_Y ; wire OR4_1110_Y ; wire OR2_11_Y ; wire OR4_496_Y ; wire OR4_411_Y ; wire OR4_729_Y ; wire OR4_475_Y ; wire OR4_255_Y ; wire OR4_312_Y ; wire OR4_526_Y ; wire OR4_263_Y ; wire OR4_1301_Y ; wire OR4_530_Y ; wire OR4_59_Y ; wire OR4_598_Y ; wire OR2_26_Y ; wire OR4_539_Y ; wire OR4_573_Y ; wire OR4_1169_Y ; wire OR4_43_Y ; wire OR4_404_Y ; wire OR4_187_Y ; wire OR4_1270_Y ; wire OR4_947_Y ; wire OR4_721_Y ; wire OR4_874_Y ; wire OR4_774_Y ; wire OR4_1216_Y ; wire OR4_278_Y ; wire OR4_826_Y ; wire OR4_1006_Y ; wire OR4_314_Y ; wire OR4_336_Y ; wire OR4_577_Y ; wire OR4_132_Y ; wire OR4_808_Y ; wire OR4_503_Y ; wire OR4_1139_Y ; wire OR4_801_Y ; wire OR4_1050_Y ; wire OR4_923_Y ; wire OR4_779_Y ; wire OR4_654_Y ; wire OR2_3_Y ; wire OR4_381_Y ; wire OR4_709_Y ; wire OR4_1030_Y ; wire OR4_438_Y ; wire OR4_124_Y ; wire OR4_91_Y ; wire OR4_431_Y ; wire OR4_613_Y ; wire OR4_853_Y ; wire OR4_1058_Y ; wire OR4_892_Y ; wire OR4_1227_Y ; wire OR4_1263_Y ; wire OR2_6_Y ; wire OR4_1248_Y ; wire OR4_326_Y ; wire OR4_487_Y ; wire OR4_463_Y ; wire OR4_1082_Y ; wire OR4_276_Y ; wire OR4_126_Y ; wire OR4_1084_Y ; wire OR4_320_Y ; wire OR4_529_Y ; wire OR4_673_Y ; wire OR4_1255_Y ; wire OR4_343_Y ; wire OR4_704_Y ; wire OR4_170_Y ; wire OR4_430_Y ; wire OR2_0_Y ; wire OR4_256_Y ; wire OR4_596_Y ; wire Z_BLKY1_0_ ; wire miv_rv32_ram_singleport_lp_R13C0_SB_CORRECT ; wire miv_rv32_ram_singleport_lp_R13C0_DB_DETECT ; wire Z_ACCESS_BUSY_13__0_ ; wire OR4_982_Y ; wire miv_rv32_ram_singleport_lp_R3C0_SB_CORRECT ; wire miv_rv32_ram_singleport_lp_R3C0_DB_DETECT ; wire Z_ACCESS_BUSY_3__0_ ; wire OR4_659_Y ; wire OR4_584_Y ; wire OR4_131_Y ; wire OR4_1144_Y ; wire OR4_1303_Y ; wire OR4_791_Y ; wire OR2_4_Y ; wire OR4_896_Y ; wire OR4_1172_Y ; wire OR4_556_Y ; wire OR4_118_Y ; wire OR4_99_Y ; wire OR4_725_Y ; wire OR4_841_Y ; wire OR4_1004_Y ; wire OR4_495_Y ; wire OR4_633_Y ; wire OR4_454_Y ; wire OR4_379_Y ; wire OR4_8_Y ; wire OR4_993_Y ; wire OR4_1299_Y ; wire OR4_24_Y ; wire OR4_582_Y ; wire OR4_1118_Y ; wire OR4_309_Y ; wire OR4_819_Y ; wire OR4_1272_Y ; wire OR4_1059_Y ; wire OR4_616_Y ; wire OR4_744_Y ; wire OR4_440_Y ; wire OR4_817_Y ; wire OR4_1211_Y ; wire OR4_93_Y ; wire OR4_563_Y ; wire OR4_747_Y ; wire OR4_1237_Y ; wire OR4_1275_Y ; wire OR4_71_Y ; wire OR4_27_Y ; wire OR4_194_Y ; wire OR4_864_Y ; wire OR4_1116_Y ; wire OR4_769_Y ; wire OR4_970_Y ; wire OR4_1188_Y ; wire OR4_13_Y ; wire OR4_717_Y ; wire OR4_281_Y ; wire OR4_889_Y ; wire OR4_661_Y ; wire OR4_424_Y ; wire OR4_352_Y ; wire OR4_1150_Y ; wire OR4_849_Y ; wire OR4_86_Y ; wire OR4_891_Y ; wire OR4_1098_Y ; wire OR4_257_Y ; wire OR4_470_Y ; wire OR4_888_Y ; wire OR4_1269_Y ; wire OR4_1119_Y ; wire OR4_1027_Y ; wire OR4_456_Y ; wire OR4_400_Y ; wire OR4_815_Y ; wire OR4_667_Y ; wire OR4_425_Y ; wire OR4_371_Y ; wire OR4_927_Y ; wire OR4_895_Y ; wire OR4_921_Y ; wire OR4_249_Y ; wire OR4_623_Y ; wire OR4_373_Y ; wire OR4_396_Y ; wire OR4_301_Y ; wire OR4_369_Y ; wire OR4_55_Y ; wire OR4_558_Y ; wire OR4_972_Y ; wire OR4_1213_Y ; wire OR4_209_Y ; wire OR4_197_Y ; wire OR4_627_Y ; wire OR4_140_Y ; wire miv_rv32_ram_singleport_lp_R12C0_SB_CORRECT ; wire miv_rv32_ram_singleport_lp_R12C0_DB_DETECT ; wire Z_ACCESS_BUSY_12__0_ ; wire OR4_1205_Y ; wire OR4_902_Y ; wire OR4_355_Y ; wire OR4_103_Y ; wire OR4_94_Y ; wire OR4_945_Y ; wire OR4_504_Y ; wire OR4_612_Y ; wire OR4_142_Y ; wire OR4_285_Y ; wire OR4_899_Y ; wire OR4_53_Y ; wire OR4_1037_Y ; wire OR4_645_Y ; wire OR4_980_Y ; wire OR4_618_Y ; wire OR4_675_Y ; wire OR4_1147_Y ; wire OR4_660_Y ; wire OR4_600_Y ; wire OR4_836_Y ; wire OR4_413_Y ; wire OR4_835_Y ; wire OR4_1192_Y ; wire OR4_56_Y ; wire OR4_1052_Y ; wire OR4_502_Y ; wire OR4_1028_Y ; wire OR4_1231_Y ; wire OR4_550_Y ; wire OR4_915_Y ; wire OR4_1185_Y ; wire OR4_460_Y ; wire OR4_1180_Y ; wire OR2_21_Y ; wire OR4_271_Y ; wire OR4_764_Y ; wire OR4_1015_Y ; wire OR4_576_Y ; wire OR4_1262_Y ; wire OR4_918_Y ; wire OR4_6_Y ; wire OR4_751_Y ; wire OR4_856_Y ; wire OR4_1123_Y ; wire OR4_57_Y ; wire OR4_1244_Y ; wire OR4_361_Y ; wire OR4_409_Y ; wire OR4_388_Y ; wire OR4_201_Y ; wire OR4_821_Y ; wire OR4_1057_Y ; wire OR4_1302_Y ; wire OR4_1074_Y ; wire OR4_213_Y ; wire OR4_593_Y ; wire OR4_1033_Y ; wire OR4_925_Y ; wire OR4_632_Y ; wire OR4_953_Y ; wire OR4_354_Y ; wire OR4_1296_Y ; wire OR4_349_Y ; wire OR4_143_Y ; wire OR4_1151_Y ; wire OR4_22_Y ; wire OR4_878_Y ; wire OR4_353_Y ; wire OR4_541_Y ; wire OR4_395_Y ; wire OR4_997_Y ; wire OR4_638_Y ; wire OR4_869_Y ; wire OR4_1078_Y ; wire OR4_1226_Y ; wire OR4_1221_Y ; wire OR4_724_Y ; wire OR4_962_Y ; wire OR4_940_Y ; wire OR4_949_Y ; wire OR4_1100_Y ; wire OR4_1242_Y ; wire OR4_211_Y ; wire OR4_664_Y ; wire OR4_1026_Y ; wire OR4_684_Y ; wire OR4_77_Y ; wire OR4_37_Y ; wire OR4_1260_Y ; wire OR4_154_Y ; wire OR4_564_Y ; wire OR4_92_Y ; wire OR4_651_Y ; wire OR4_798_Y ; wire OR4_492_Y ; wire OR4_976_Y ; wire OR4_1219_Y ; wire OR4_78_Y ; wire OR4_1023_Y ; wire OR4_1240_Y ; wire OR4_1311_Y ; wire OR4_1101_Y ; wire OR4_643_Y ; wire OR4_182_Y ; wire OR4_26_Y ; wire OR4_1049_Y ; wire OR4_904_Y ; wire OR4_689_Y ; wire OR4_829_Y ; wire OR4_1085_Y ; wire OR4_545_Y ; wire OR4_1021_Y ; wire OR4_316_Y ; wire OR4_280_Y ; wire OR4_1125_Y ; wire OR4_614_Y ; wire OR4_9_Y ; wire OR4_253_Y ; wire OR4_29_Y ; wire OR4_261_Y ; wire OR4_777_Y ; wire OR4_650_Y ; wire OR4_745_Y ; wire OR4_621_Y ; wire OR2_23_Y ; wire OR4_794_Y ; wire OR4_797_Y ; wire OR4_1070_Y ; wire OR4_62_Y ; wire OR4_647_Y ; wire OR4_148_Y ; wire OR4_1005_Y ; wire OR4_28_Y ; wire OR4_711_Y ; wire OR4_868_Y ; wire OR4_260_Y ; wire OR4_245_Y ; wire OR4_665_Y ; wire OR4_184_Y ; wire OR4_1287_Y ; wire OR4_1065_Y ; wire OR4_1181_Y ; wire OR4_34_Y ; wire OR4_513_Y ; wire OR4_18_Y ; wire OR4_172_Y ; wire OR4_428_Y ; wire OR4_746_Y ; wire OR4_861_Y ; wire OR4_1295_Y ; wire OR4_348_Y ; wire OR4_382_Y ; wire OR4_610_Y ; wire OR4_485_Y ; wire OR4_1134_Y ; wire OR4_814_Y ; wire OR4_701_Y ; wire OR2_8_Y ; wire OR4_843_Y ; wire OR4_447_Y ; wire OR4_145_Y ; wire OR4_11_Y ; wire OR4_2_Y ; wire OR4_1274_Y ; wire OR4_863_Y ; wire OR4_718_Y ; wire OR4_740_Y ; wire OR4_722_Y ; wire OR4_49_Y ; wire OR4_1031_Y ; wire miv_rv32_ram_singleport_lp_R10C0_SB_CORRECT ; wire miv_rv32_ram_singleport_lp_R10C0_DB_DETECT ; wire Z_ACCESS_BUSY_10__0_ ; wire OR4_1228_Y ; wire OR4_225_Y ; wire OR4_834_Y ; wire OR4_719_Y ; wire OR4_611_Y ; wire OR2_2_Y ; wire OR4_1135_Y ; wire OR4_4_Y ; wire OR4_1103_Y ; wire OR4_1308_Y ; wire OR4_1066_Y ; wire OR4_340_Y ; wire OR4_1268_Y ; wire OR4_770_Y ; wire OR4_977_Y ; wire OR4_125_Y ; wire OR4_818_Y ; wire OR4_486_Y ; wire OR4_455_Y ; wire OR4_536_Y ; wire OR4_1137_Y ; wire OR4_507_Y ; wire OR4_695_Y ; wire OR4_543_Y ; wire OR4_1094_Y ; wire OR4_299_Y ; wire OR4_604_Y ; wire OR4_242_Y ; wire OR4_1112_Y ; wire OR4_179_Y ; wire OR4_901_Y ; wire OR4_588_Y ; wire OR4_533_Y ; wire OR4_206_Y ; wire OR4_1241_Y ; wire OR4_1032_Y ; wire OR4_1257_Y ; wire OR4_123_Y ; wire OR4_181_Y ; wire OR4_995_Y ; wire OR4_609_Y ; wire OR4_1238_Y ; wire OR4_319_Y ; wire OR4_254_Y ; wire OR4_773_Y ; wire OR4_192_Y ; wire OR4_1288_Y ; wire OR4_1305_Y ; wire OR4_202_Y ; wire OR4_739_Y ; wire OR4_957_Y ; wire OR4_890_Y ; wire OR4_879_Y ; wire OR4_920_Y ; wire OR4_929_Y ; wire OR4_1170_Y ; wire OR4_270_Y ; wire OR4_567_Y ; wire OR4_506_Y ; wire OR4_1064_Y ; wire OR4_200_Y ; wire OR4_323_Y ; wire OR4_1097_Y ; wire OR4_32_Y ; wire OR4_1029_Y ; wire OR4_1019_Y ; wire OR4_937_Y ; wire OR4_1266_Y ; wire OR4_68_Y ; wire OR4_973_Y ; wire OR4_1011_Y ; wire OR4_193_Y ; wire OR4_781_Y ; wire OR4_886_Y ; wire OR4_17_Y ; wire OR4_525_Y ; wire OR4_851_Y ; wire OR4_1246_Y ; wire OR4_372_Y ; wire miv_rv32_ram_singleport_lp_R14C0_SB_CORRECT ; wire miv_rv32_ram_singleport_lp_R14C0_DB_DETECT ; wire Z_ACCESS_BUSY_14__0_ ; wire OR4_339_Y ; wire OR4_133_Y ; wire OR4_121_Y ; wire OR4_983_Y ; wire OR4_76_Y ; wire OR4_25_Y ; wire OR4_1161_Y ; wire OR4_950_Y ; wire OR4_10_Y ; wire OR4_1000_Y ; wire OR4_266_Y ; wire OR4_302_Y ; wire OR4_754_Y ; wire miv_rv32_ram_singleport_lp_R1C0_SB_CORRECT ; wire miv_rv32_ram_singleport_lp_R1C0_DB_DETECT ; wire Z_ACCESS_BUSY_1__0_ ; wire OR4_757_Y ; wire OR4_799_Y ; wire OR4_65_Y ; wire OR4_1215_Y ; wire OR4_990_Y ; wire OR4_806_Y ; wire OR4_1022_Y ; wire OR4_680_Y ; wire OR4_999_Y ; wire OR4_153_Y ; wire OR4_399_Y ; wire OR4_827_Y ; wire OR4_248_Y ; wire OR4_476_Y ; wire OR4_311_Y ; wire OR4_641_Y ; wire OR4_669_Y ; wire OR4_443_Y ; wire OR4_1075_Y ; wire OR4_451_Y ; wire OR4_634_Y ; wire OR4_1105_Y ; wire OR4_1016_Y ; wire OR4_406_Y ; wire OR4_578_Y ; wire OR4_823_Y ; wire OR4_1304_Y ; wire OR4_842_Y ; wire OR4_589_Y ; wire OR4_824_Y ; wire OR4_403_Y ; wire OR4_1083_Y ; wire OR4_508_Y ; wire OR4_595_Y ; wire OR4_776_Y ; wire OR4_107_Y ; wire OR4_1265_Y ; wire OR4_1207_Y ; wire OR4_512_Y ; wire OR4_1171_Y ; wire OR4_331_Y ; wire OR4_259_Y ; wire OR4_100_Y ; wire OR4_149_Y ; wire OR4_516_Y ; wire OR4_16_Y ; wire OR4_5_Y ; wire OR4_230_Y ; wire OR4_1143_Y ; wire OR4_258_Y ; wire OR4_109_Y ; wire OR4_222_Y ; wire OR4_1173_Y ; wire OR4_362_Y ; wire OR4_1090_Y ; wire OR4_212_Y ; wire OR4_568_Y ; wire OR4_1190_Y ; wire OR4_531_Y ; wire OR4_48_Y ; wire OR4_932_Y ; wire OR4_1156_Y ; wire OR4_534_Y ; wire OR4_157_Y ; wire OR4_39_Y ; wire OR4_955_Y ; wire OR4_156_Y ; wire OR4_1222_Y ; wire OR4_152_Y ; wire OR4_771_Y ; wire OR4_876_Y ; wire OR4_521_Y ; wire OR4_714_Y ; wire OR4_894_Y ; wire OR4_501_Y ; wire OR4_734_Y ; wire OR4_390_Y ; wire OR4_532_Y ; wire OR4_903_Y ; wire OR4_1087_Y ; wire OR4_1234_Y ; wire OR4_1233_Y ; wire OR4_1160_Y ; wire OR4_292_Y ; wire OR4_104_Y ; wire OR4_231_Y ; wire OR4_380_Y ; wire OR4_1232_Y ; wire OR4_708_Y ; wire OR4_1073_Y ; wire OR4_538_Y ; wire OR4_775_Y ; wire OR4_1007_Y ; wire OR4_965_Y ; wire OR4_275_Y ; wire OR4_1053_Y ; wire OR4_591_Y ; wire OR4_566_Y ; wire OR4_959_Y ; wire OR4_987_Y ; wire OR4_838_Y ; wire OR4_216_Y ; wire OR4_830_Y ; wire OR4_1212_Y ; wire OR4_151_Y ; wire OR4_1208_Y ; wire OR4_1072_Y ; wire OR4_535_Y ; wire OR4_199_Y ; wire OR4_84_Y ; wire OR4_423_Y ; wire OR4_761_Y ; wire OR4_866_Y ; wire OR4_376_Y ; wire OR4_1155_Y ; wire OR4_653_Y ; wire OR4_748_Y ; wire OR4_963_Y ; wire OR4_989_Y ; wire OR4_599_Y ; wire OR4_580_Y ; wire OR4_329_Y ; wire OR4_1088_Y ; wire OR4_306_Y ; wire OR4_1191_Y ; wire OR4_474_Y ; wire OR4_822_Y ; wire OR4_347_Y ; wire OR4_897_Y ; wire OR4_224_Y ; wire OR4_833_Y ; wire OR4_555_Y ; wire OR4_164_Y ; wire OR4_1277_Y ; wire OR4_784_Y ; wire OR4_168_Y ; wire OR4_785_Y ; wire OR4_1250_Y ; wire OR4_298_Y ; wire OR4_787_Y ; wire OR4_1008_Y ; wire OR4_1239_Y ; wire OR4_910_Y ; wire OR4_782_Y ; wire OR4_189_Y ; wire OR4_1258_Y ; wire OR4_35_Y ; wire OR4_619_Y ; wire OR4_215_Y ; wire OR4_1154_Y ; wire OR4_295_Y ; wire OR4_88_Y ; wire OR4_177_Y ; wire OR4_946_Y ; wire OR4_366_Y ; wire OR4_517_Y ; wire miv_rv32_ram_singleport_lp_R2C0_SB_CORRECT ; wire miv_rv32_ram_singleport_lp_R2C0_DB_DETECT ; wire Z_ACCESS_BUSY_2__0_ ; wire OR4_210_Y ; wire OR4_1081_Y ; wire OR4_464_Y ; wire OR4_1254_Y ; wire OR4_289_Y ; wire OR4_900_Y ; wire OR4_497_Y ; wire OR4_907_Y ; wire OR4_1003_Y ; wire OR4_1157_Y ; wire OR2_7_Y ; wire OR4_252_Y ; wire OR4_1159_Y ; wire OR4_1042_Y ; wire OR4_73_Y ; wire OR4_345_Y ; wire miv_rv32_ram_singleport_lp_R15C0_SB_CORRECT ; wire miv_rv32_ram_singleport_lp_R15C0_DB_DETECT ; wire Z_ACCESS_BUSY_15__0_ ; wire OR4_1001_Y ; wire OR4_639_Y ; wire OR4_985_Y ; wire OR4_163_Y ; wire OR4_1069_Y ; wire OR4_1077_Y ; wire OR4_64_Y ; wire OR4_551_Y ; wire OR4_465_Y ; wire OR4_223_Y ; wire OR4_1276_Y ; wire OR4_1249_Y ; wire OR4_205_Y ; wire OR4_655_Y ; wire OR4_1298_Y ; wire OR4_1217_Y ; wire OR4_537_Y ; wire OR4_437_Y ; wire OR4_628_Y ; wire OR4_239_Y ; wire OR4_21_Y ; wire OR4_267_Y ; wire OR4_1132_Y ; wire OR4_128_Y ; wire OR4_341_Y ; wire OR4_793_Y ; wire OR4_114_Y ; wire OR4_705_Y ; wire OR4_82_Y ; wire OR4_1146_Y ; wire OR4_269_Y ; wire OR4_416_Y ; wire OR4_1140_Y ; wire OR2_12_Y ; wire miv_rv32_ram_singleport_lp_R4C0_SB_CORRECT ; wire miv_rv32_ram_singleport_lp_R4C0_DB_DETECT ; wire Z_ACCESS_BUSY_4__0_ ; wire OR4_20_Y ; wire OR4_707_Y ; wire OR4_1184_Y ; wire OR4_542_Y ; wire OR4_967_Y ; wire OR4_51_Y ; wire OR4_120_Y ; wire OR4_147_Y ; wire OR4_518_Y ; wire OR4_247_Y ; wire OR4_332_Y ; wire OR4_1111_Y ; wire OR4_183_Y ; wire OR4_620_Y ; wire OR4_1206_Y ; wire OR4_1148_Y ; wire OR4_1175_Y ; wire OR4_758_Y ; wire OR4_984_Y ; wire OR4_994_Y ; wire OR4_198_Y ; wire OR4_696_Y ; wire OR4_453_Y ; wire OR4_1267_Y ; wire OR4_279_Y ; wire OR4_860_Y ; wire OR4_873_Y ; wire OR4_683_Y ; wire OR4_421_Y ; wire OR4_288_Y ; wire OR4_384_Y ; wire OR4_852_Y ; wire OR4_625_Y ; wire OR4_190_Y ; wire OR4_397_Y ; wire OR4_60_Y ; wire OR4_1_Y ; wire OR4_767_Y ; wire OR4_671_Y ; wire OR4_473_Y ; wire OR4_238_Y ; wire OR4_472_Y ; wire OR4_706_Y ; wire OR4_277_Y ; wire OR4_816_Y ; wire OR4_1099_Y ; wire OR4_961_Y ; wire OR4_1063_Y ; wire OR4_150_Y ; wire OR4_344_Y ; wire OR4_420_Y ; wire OR4_690_Y ; wire OR4_913_Y ; wire OR4_795_Y ; wire OR4_979_Y ; wire OR4_870_Y ; wire OR4_905_Y ; wire OR4_102_Y ; wire OR4_800_Y ; wire OR4_731_Y ; wire OR4_265_Y ; wire OR4_1252_Y ; wire OR4_155_Y ; wire OR4_681_Y ; wire OR4_698_Y ; wire OR4_1306_Y ; wire OR4_325_Y ; wire OR4_1010_Y ; wire OR4_1017_Y ; wire OR4_1071_Y ; wire OR4_394_Y ; wire OR4_1009_Y ; wire OR4_697_Y ; wire OR4_481_Y ; wire OR4_38_Y ; wire OR4_941_Y ; wire OR4_813_Y ; wire OR4_883_Y ; wire OR4_241_Y ; wire OR4_996_Y ; wire OR4_435_Y ; wire OR4_626_Y ; wire OR4_235_Y ; wire OR4_786_Y ; wire OR4_414_Y ; wire OR4_933_Y ; wire OR2_29_Y ; wire OR4_723_Y ; wire OR4_134_Y ; wire OR4_909_Y ; wire OR4_1202_Y ; wire OR4_498_Y ; wire OR4_1141_Y ; wire OR4_282_Y ; wire OR4_162_Y ; wire OR4_942_Y ; wire OR4_1284_Y ; wire OR4_127_Y ; wire OR4_1194_Y ; wire OR4_80_Y ; wire OR4_218_Y ; wire OR4_837_Y ; wire miv_rv32_ram_singleport_lp_R16C0_SB_CORRECT ; wire miv_rv32_ram_singleport_lp_R16C0_DB_DETECT ; wire Z_ACCESS_BUSY_16__0_ ; wire OR4_69_Y ; wire OR4_575_Y ; wire OR4_365_Y ; wire OR4_375_Y ; wire OR4_581_Y ; wire OR4_1282_Y ; wire OR4_954_Y ; wire OR4_939_Y ; wire OR4_720_Y ; wire OR4_158_Y ; wire OR4_146_Y ; wire OR4_857_Y ; wire OR4_85_Y ; wire OR4_1142_Y ; wire OR4_677_Y ; wire OR4_7_Y ; wire OR4_1307_Y ; wire OR4_505_Y ; wire OR4_1174_Y ; wire OR4_449_Y ; wire OR4_1204_Y ; wire OR4_1214_Y ; wire OR4_442_Y ; wire OR4_1280_Y ; wire OR4_1195_Y ; wire OR4_357_Y ; wire OR4_1158_Y ; wire OR4_1093_Y ; wire OR4_1149_Y ; wire OR4_960_Y ; wire OR4_726_Y ; wire OR4_297_Y ; wire OR4_30_Y ; wire OR4_67_Y ; wire OR4_1153_Y ; wire OR4_499_Y ; wire OR4_1200_Y ; wire OR4_783_Y ; wire OR4_287_Y ; wire OR4_917_Y ; wire OR4_370_Y ; wire OR4_663_Y ; wire OR4_83_Y ; wire OR4_1243_Y ; wire OR4_571_Y ; wire OR4_483_Y ; wire OR4_540_Y ; wire OR4_549_Y ; wire OR4_565_Y ; wire OR4_1114_Y ; wire OR4_159_Y ; wire OR4_272_Y ; wire OR4_956_Y ; wire OR4_219_Y ; wire OR4_305_Y ; wire OR4_919_Y ; wire OR4_796_Y ; wire OR4_752_Y ; wire OR4_112_Y ; wire OR4_191_Y ; wire OR4_129_Y ; wire OR4_1286_Y ; wire OR4_848_Y ; wire OR4_407_Y ; wire OR4_0_Y ; wire OR2_19_Y ; wire OR4_36_Y ; wire OR4_832_Y ; wire OR4_141_Y ; wire OR4_185_Y ; wire OR4_135_Y ; wire miv_rv32_ram_singleport_lp_R17C0_SB_CORRECT ; wire miv_rv32_ram_singleport_lp_R17C0_DB_DETECT ; wire Z_ACCESS_BUSY_17__0_ ; wire OR4_328_Y ; wire OR4_812_Y ; wire OR4_360_Y ; wire OR4_175_Y ; wire OR4_324_Y ; wire OR4_831_Y ; wire OR4_646_Y ; wire OR4_1251_Y ; wire OR4_262_Y ; wire OR4_1290_Y ; wire OR4_23_Y ; wire OR4_753_Y ; wire OR4_422_Y ; wire OR4_737_Y ; wire OR4_208_Y ; wire OR4_601_Y ; wire OR4_755_Y ; wire OR4_1138_Y ; wire OR4_188_Y ; wire OR4_1210_Y ; wire OR4_780_Y ; wire OR4_1229_Y ; wire OR4_1079_Y ; wire OR4_378_Y ; wire OR4_802_Y ; wire OR4_196_Y ; wire OR4_810_Y ; wire OR4_762_Y ; wire OR4_520_Y ; wire OR4_1193_Y ; wire OR4_110_Y ; wire OR4_559_Y ; wire OR4_763_Y ; wire OR4_477_Y ; wire OR4_790_Y ; wire OR4_393_Y ; wire OR4_108_Y ; wire OR4_788_Y ; wire OR4_488_Y ; wire OR4_1045_Y ; wire OR4_180_Y ; wire OR4_452_Y ; wire OR4_387_Y ; wire OR4_268_Y ; wire OR4_631_Y ; wire OR4_657_Y ; wire OR4_45_Y ; wire OR4_974_Y ; wire OR4_749_Y ; wire OR4_113_Y ; wire OR4_178_Y ; wire OR4_482_Y ; wire OR4_106_Y ; wire OR4_692_Y ; wire OR4_515_Y ; wire OR4_33_Y ; wire OR4_986_Y ; wire OR4_590_Y ; wire OR4_293_Y ; wire OR4_1163_Y ; wire OR4_1128_Y ; wire miv_rv32_ram_singleport_lp_R7C0_SB_CORRECT ; wire miv_rv32_ram_singleport_lp_R7C0_DB_DETECT ; wire Z_ACCESS_BUSY_7__0_ ; wire OR2_30_Y ; wire OR4_951_Y ; wire OR4_1126_Y ; wire OR4_648_Y ; wire OR4_467_Y ; wire OR4_310_Y ; wire OR4_930_Y ; wire OR4_948_Y ; wire OR4_87_Y ; wire OR4_1167_Y ; wire OR4_1264_Y ; wire OR4_308_Y ; wire OR4_31_Y ; wire OR2_24_Y ; wire OR4_1223_Y ; wire OR4_167_Y ; wire OR4_317_Y ; wire OR4_433_Y ; wire OR4_766_Y ; wire OR4_703_Y ; wire OR4_284_Y ; wire OR4_914_Y ; wire OR4_207_Y ; wire OR4_1197_Y ; wire OR4_867_Y ; wire OR4_981_Y ; wire miv_rv32_ram_singleport_lp_R5C0_SB_CORRECT ; wire miv_rv32_ram_singleport_lp_R5C0_DB_DETECT ; wire Z_ACCESS_BUSY_5__0_ ; wire OR4_825_Y ; wire OR4_966_Y ; wire OR4_511_Y ; wire OR4_768_Y ; wire OR4_772_Y ; wire OR4_330_Y ; wire OR4_687_Y ; wire OR4_264_Y ; wire OR4_160_Y ; wire OR4_367_Y ; wire OR4_458_Y ; wire OR4_971_Y ; wire OR4_383_Y ; wire OR4_1002_Y ; wire miv_rv32_ram_singleport_lp_R0C0_SB_CORRECT ; wire miv_rv32_ram_singleport_lp_R0C0_DB_DETECT ; wire Z_ACCESS_BUSY_0__0_ ; wire OR4_928_Y ; wire OR4_417_Y ; wire OR4_95_Y ; wire OR4_81_Y ; wire OR4_998_Y ; wire miv_rv32_ram_singleport_lp_R9C0_SB_CORRECT ; wire miv_rv32_ram_singleport_lp_R9C0_DB_DETECT ; wire Z_ACCESS_BUSY_9__0_ ; wire OR4_1117_Y ; wire OR4_607_Y ; wire OR4_523_Y ; wire miv_rv32_ram_singleport_lp_R8C0_SB_CORRECT ; wire miv_rv32_ram_singleport_lp_R8C0_DB_DETECT ; wire Z_ACCESS_BUSY_8__0_ ; wire OR2_15_Y ; wire OR4_402_Y ; wire OR4_479_Y ; wire OR4_738_Y ; wire OR4_700_Y ; // @49:24091 CFG1 CFG3_2 ( .A(un9_req_wr_byte_en_mux_0), .Y(CFG3_2_Y) ); defparam CFG3_2.INIT=2'h1; // @49:24545 CFG1 CFG3_12 ( .A(un9_req_wr_byte_en_mux_0), .Y(CFG3_12_Y) ); defparam CFG3_12.INIT=2'h2; // @49:17505 CFG2 \CFG2_BLKY2[1] ( .A(CFG3_15_Y), .B(CFG3_2_Y), .Y(Z_BLKY2_1_) ); defparam \CFG2_BLKY2[1] .INIT=4'h8; // @49:17576 CFG3 CFG3_16 ( .A(req_addr_mux_3[15]), .B(req_addr_mux_3[14]), .C(req_addr_mux_3[13]), .Y(CFG3_16_Y) ); defparam CFG3_16.INIT=8'h01; // @49:18589 CFG3 CFG3_6 ( .A(req_addr_mux_3[15]), .B(req_addr_mux_3[14]), .C(req_addr_mux_3[13]), .Y(CFG3_6_Y) ); defparam CFG3_6.INIT=8'h02; // @49:18688 CFG2 \CFG2_BLKX2[4] ( .A(CFG3_6_Y), .B(CFG3_12_Y), .Y(Z_BLKX2_4_) ); defparam \CFG2_BLKX2[4] .INIT=4'h8; // @49:18798 CFG2 \CFG2_BLKY2[2] ( .A(CFG3_0_Y), .B(CFG3_2_Y), .Y(Z_BLKY2_2_) ); defparam \CFG2_BLKY2[2] .INIT=4'h8; // @49:19020 CFG2 \CFG2_BLKX2[0] ( .A(CFG3_13_Y), .B(CFG3_12_Y), .Y(Z_BLKX2_0_) ); defparam \CFG2_BLKX2[0] .INIT=4'h8; // @49:19438 CFG3 CFG3_15 ( .A(req_addr_mux_3[15]), .B(req_addr_mux_3[14]), .C(req_addr_mux_3[13]), .Y(CFG3_15_Y) ); defparam CFG3_15.INIT=8'h10; // @49:20008 CFG3 CFG3_13 ( .A(req_addr_mux_3[15]), .B(req_addr_mux_3[14]), .C(req_addr_mux_3[13]), .Y(CFG3_13_Y) ); defparam CFG3_13.INIT=8'h01; // @49:20052 CFG3 CFG3_0 ( .A(req_addr_mux_3[15]), .B(req_addr_mux_3[14]), .C(req_addr_mux_3[13]), .Y(CFG3_0_Y) ); defparam CFG3_0.INIT=8'h04; // @49:21066 CFG2 \CFG2_BLKX2[3] ( .A(CFG3_5_Y), .B(CFG3_12_Y), .Y(Z_BLKX2_3_) ); defparam \CFG2_BLKX2[3] .INIT=4'h8; // @49:21548 CFG2 \CFG2_BLKX2[1] ( .A(CFG3_8_Y), .B(CFG3_12_Y), .Y(Z_BLKX2_1_) ); defparam \CFG2_BLKX2[1] .INIT=4'h8; // @49:21938 CFG3 CFG3_5 ( .A(req_addr_mux_3[15]), .B(req_addr_mux_3[14]), .C(req_addr_mux_3[13]), .Y(CFG3_5_Y) ); defparam CFG3_5.INIT=8'h40; // @49:22551 CFG3 CFG3_14 ( .A(req_addr_mux_3[15]), .B(req_addr_mux_3[14]), .C(req_addr_mux_3[13]), .Y(CFG3_14_Y) ); defparam CFG3_14.INIT=8'h04; // @49:22774 CFG2 \CFG2_BLKX2[2] ( .A(CFG3_14_Y), .B(CFG3_12_Y), .Y(Z_BLKX2_2_) ); defparam \CFG2_BLKX2[2] .INIT=4'h8; // @49:23204 CFG2 \CFG2_BLKY2[4] ( .A(CFG3_18_Y), .B(CFG3_2_Y), .Y(Z_BLKY2_4_) ); defparam \CFG2_BLKY2[4] .INIT=4'h8; // @49:23477 CFG3 CFG3_8 ( .A(req_addr_mux_3[15]), .B(req_addr_mux_3[14]), .C(req_addr_mux_3[13]), .Y(CFG3_8_Y) ); defparam CFG3_8.INIT=8'h10; // @49:23485 CFG2 \CFG2_BLKY2[0] ( .A(CFG3_16_Y), .B(CFG3_2_Y), .Y(Z_BLKY2_0_) ); defparam \CFG2_BLKY2[0] .INIT=4'h8; // @49:24401 CFG3 CFG3_18 ( .A(req_addr_mux_3[15]), .B(req_addr_mux_3[14]), .C(req_addr_mux_3[13]), .Y(CFG3_18_Y) ); defparam CFG3_18.INIT=8'h02; // @49:24609 CFG3 CFG3_19 ( .A(req_addr_mux_3[15]), .B(req_addr_mux_3[14]), .C(req_addr_mux_3[13]), .Y(CFG3_19_Y) ); defparam CFG3_19.INIT=8'h40; // @49:25251 CFG2 \CFG2_BLKY2[3] ( .A(CFG3_19_Y), .B(CFG3_2_Y), .Y(Z_BLKY2_3_) ); defparam \CFG2_BLKY2[3] .INIT=4'h8; // @49:25600 OR4 OR4_303 ( .Y(OR4_303_Y), .A(OR4_1044_Y), .B(OR2_9_Y), .C(GND), .D(GND) ); // @49:25597 OR4 OR4_169 ( .Y(OR4_169_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25594 OR4 OR4_1281 ( .Y(OR4_1281_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25591 OR4 OR4_1036 ( .Y(OR4_1036_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25589 OR2 OR2_25 ( .Y(OR2_25_Y), .A(GND), .B(GND) ); // @49:25586 OR4 OR4_130 ( .Y(OR4_130_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25584 OR4 OR4_337 ( .Y(OR4_337_Y), .A(OR4_685_Y), .B(OR2_25_Y), .C(GND), .D(GND) ); // @49:25582 OR4 OR4_615 ( .Y(OR4_615_Y), .A(OR4_561_Y), .B(OR4_356_Y), .C(OR4_117_Y), .D(OR4_934_Y) ); // @49:25579 OR4 OR4_1186 ( .Y(OR4_1186_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25578 OR4 OR4_321 ( .Y(OR4_321_Y), .A(miv_rv32_ram_singleport_lp_R4C0_A_DOUT[10]), .B(miv_rv32_ram_singleport_lp_R5C0_A_DOUT[10]), .C(miv_rv32_ram_singleport_lp_R6C0_A_DOUT[10]), .D(miv_rv32_ram_singleport_lp_R7C0_A_DOUT[10]) ); // @49:25576 OR4 OR4_1024 ( .Y(OR4_1024_Y), .A(OR4_1020_Y), .B(OR2_1_Y), .C(GND), .D(GND) ); // @49:25536 OR4 OR4_98 ( .Y(OR4_98_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25535 OR4 OR4_916 ( .Y(OR4_916_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25494 OR4 OR4_630 ( .Y(OR4_630_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25491 OR4 OR4_712 ( .Y(OR4_712_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25489 OR4 OR4_368 ( .Y(OR4_368_Y), .A(OR4_975_Y), .B(OR4_122_Y), .C(OR4_750_Y), .D(OR4_964_Y) ); // @49:25488 OR4 OR4_922 ( .Y(OR4_922_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25486 OR4 \OR4_R_DATA[28] ( .Y(tcm0_d_resp_rd_data_net[28]), .A(OR4_1145_Y), .B(OR4_958_Y), .C(OR4_368_Y), .D(OR4_544_Y) ); // @49:25485 OR4 OR4_1108 ( .Y(OR4_1108_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25484 OR4 OR4_1201 ( .Y(OR4_1201_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25481 OR4 OR4_524 ( .Y(OR4_524_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25478 OR4 OR4_570 ( .Y(OR4_570_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25475 OR4 OR4_1113 ( .Y(OR4_1113_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25473 OR4 OR4_579 ( .Y(OR4_579_Y), .A(OR4_881_Y), .B(OR4_1089_Y), .C(OR4_691_Y), .D(OR4_490_Y) ); // @49:25471 OR4 OR4_1106 ( .Y(OR4_1106_Y), .A(OR4_1034_Y), .B(OR4_882_Y), .C(OR4_586_Y), .D(OR4_466_Y) ); // @49:25470 OR4 OR4_47 ( .Y(OR4_47_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25467 OR4 OR4_500 ( .Y(OR4_500_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25462 OR4 OR4_1189 ( .Y(OR4_1189_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25461 OR4 OR4_166 ( .Y(OR4_166_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25460 OR4 OR4_509 ( .Y(OR4_509_Y), .A(miv_rv32_ram_singleport_lp_R16C0_B_DOUT[11]), .B(miv_rv32_ram_singleport_lp_R17C0_B_DOUT[11]), .C(GND), .D(GND) ); // @49:25423 RAM1K20 miv_rv32_ram_singleport_lp_R11C0 ( .A_ADDR({req_addr_mux_3[10:2], GND, GND, GND, GND, GND}), .A_BLK_EN({Z_BLKY2_2_, req_addr_mux_3[12:11]}), .A_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .A_DIN({GND, GND, un10_req_wr_data_mux[31:24], GND, GND, un10_req_wr_data_mux[23:16]}), .A_DOUT(miv_rv32_ram_singleport_lp_R11C0_A_DOUT[19:0]), .A_WEN({VCC, VCC}), .A_REN(VCC), .A_WIDTH({VCC, GND, VCC}), .A_WMODE({GND, GND}), .A_BYPASS(VCC), .A_DOUT_EN(VCC), .A_DOUT_SRST_N(VCC), .A_DOUT_ARST_N(VCC), .B_ADDR({req_addr_mux_3[10:2], GND, GND, GND, GND, GND}), .B_BLK_EN({Z_BLKX2_2_, req_addr_mux_3[12:11]}), .B_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .B_DIN({GND, GND, un10_req_wr_data_mux[15:8], GND, GND, un10_req_wr_data_mux[7:0]}), .B_DOUT(miv_rv32_ram_singleport_lp_R11C0_B_DOUT[19:0]), .B_WEN({VCC, VCC}), .B_REN(VCC), .B_WIDTH({VCC, GND, VCC}), .B_WMODE({GND, GND}), .B_BYPASS(VCC), .B_DOUT_EN(VCC), .B_DOUT_SRST_N(VCC), .B_DOUT_ARST_N(VCC), .ECC_EN(GND), .ECC_BYPASS(GND), .SB_CORRECT(miv_rv32_ram_singleport_lp_R11C0_SB_CORRECT), .DB_DETECT(miv_rv32_ram_singleport_lp_R11C0_DB_DETECT), .BUSY_FB(GND), .ACCESS_BUSY(Z_ACCESS_BUSY_11__0_) ); defparam miv_rv32_ram_singleport_lp_R11C0.RAMINDEX="PF_TPSRAM_MAX_0%9216-9216%32-32%POWER%11%0%TWO-PORT%ECC_EN-0"; // @49:25421 OR4 OR4_40 ( .Y(OR4_40_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25418 OR4 OR4_490 ( .Y(OR4_490_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25417 OR4 OR4_469 ( .Y(OR4_469_Y), .A(miv_rv32_ram_singleport_lp_R0C0_A_DOUT[0]), .B(miv_rv32_ram_singleport_lp_R1C0_A_DOUT[0]), .C(miv_rv32_ram_singleport_lp_R2C0_A_DOUT[0]), .D(miv_rv32_ram_singleport_lp_R3C0_A_DOUT[0]) ); // @49:25415 OR4 OR4_315 ( .Y(OR4_315_Y), .A(OR4_398_Y), .B(OR4_809_Y), .C(OR4_1162_Y), .D(OR4_446_Y) ); // @49:25413 OR2 OR2_5 ( .Y(OR2_5_Y), .A(GND), .B(GND) ); // @49:25373 OR4 OR4_686 ( .Y(OR4_686_Y), .A(OR4_636_Y), .B(OR4_493_Y), .C(OR4_195_Y), .D(OR4_66_Y) ); // @49:25370 OR4 OR4_522 ( .Y(OR4_522_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25367 OR4 OR4_635 ( .Y(OR4_635_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25364 OR4 OR4_1034 ( .Y(OR4_1034_Y), .A(miv_rv32_ram_singleport_lp_R16C0_B_DOUT[17]), .B(miv_rv32_ram_singleport_lp_R17C0_B_DOUT[17]), .C(GND), .D(GND) ); // @49:25361 OR4 OR4_462 ( .Y(OR4_462_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25360 OR4 OR4_61 ( .Y(OR4_61_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25358 OR4 OR4_644 ( .Y(OR4_644_Y), .A(OR4_871_Y), .B(OR4_732_Y), .C(OR4_1182_Y), .D(OR4_229_Y) ); // @49:25357 OR4 OR4_936 ( .Y(OR4_936_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25355 OR4 OR4_391 ( .Y(OR4_391_Y), .A(OR4_386_Y), .B(OR2_28_Y), .C(GND), .D(GND) ); // @49:25352 OR4 OR4_478 ( .Y(OR4_478_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25351 OR4 OR4_760 ( .Y(OR4_760_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25350 OR4 OR4_363 ( .Y(OR4_363_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25347 OR4 OR4_471 ( .Y(OR4_471_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25345 OR4 OR4_732 ( .Y(OR4_732_Y), .A(OR4_137_Y), .B(OR2_14_Y), .C(GND), .D(GND) ); // @49:25343 OR4 OR4_1259 ( .Y(OR4_1259_Y), .A(OR4_144_Y), .B(OR4_652_Y), .C(OR4_1091_Y), .D(OR4_605_Y) ); // @49:25341 OR4 OR4_1283 ( .Y(OR4_1283_Y), .A(OR4_1121_Y), .B(OR4_1294_Y), .C(OR4_1278_Y), .D(OR4_1014_Y) ); // @49:25338 OR4 OR4_408 ( .Y(OR4_408_Y), .A(miv_rv32_ram_singleport_lp_R12C0_A_DOUT[0]), .B(miv_rv32_ram_singleport_lp_R13C0_A_DOUT[0]), .C(miv_rv32_ram_singleport_lp_R14C0_A_DOUT[0]), .D(miv_rv32_ram_singleport_lp_R15C0_A_DOUT[0]) ); // @49:25337 OR4 OR4_74 ( .Y(OR4_74_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25334 OR4 OR4_1109 ( .Y(OR4_1109_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25332 OR4 OR4_401 ( .Y(OR4_401_Y), .A(OR4_1127_Y), .B(OR4_61_Y), .C(OR4_916_Y), .D(OR4_300_Y) ); // @49:25293 OR4 OR4_221 ( .Y(OR4_221_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25290 OR4 OR4_246 ( .Y(OR4_246_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25287 OR4 OR4_214 ( .Y(OR4_214_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25286 OR4 OR4_1040 ( .Y(OR4_1040_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25283 OR4 OR4_1092 ( .Y(OR4_1092_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25281 OR4 OR4_553 ( .Y(OR4_553_Y), .A(OR4_130_Y), .B(OR4_845_Y), .C(OR4_1291_Y), .D(OR4_792_Y) ); // @49:25280 OR4 OR4_992 ( .Y(OR4_992_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25277 OR4 OR4_713 ( .Y(OR4_713_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25275 OR4 OR4_854 ( .Y(OR4_854_Y), .A(OR4_1285_Y), .B(OR4_176_Y), .C(OR4_1095_Y), .D(OR4_877_Y) ); // @49:25272 OR4 OR4_171 ( .Y(OR4_171_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25269 OR4 OR4_594 ( .Y(OR4_594_Y), .A(miv_rv32_ram_singleport_lp_R16C0_A_DOUT[0]), .B(miv_rv32_ram_singleport_lp_R17C0_A_DOUT[0]), .C(GND), .D(GND) ); // @49:25267 OR4 OR4_649 ( .Y(OR4_649_Y), .A(OR4_79_Y), .B(OR4_1247_Y), .C(OR4_41_Y), .D(OR4_244_Y) ); // @49:25262 OR4 OR4_759 ( .Y(OR4_759_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25259 OR4 OR4_101 ( .Y(OR4_101_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25257 OR4 \OR4_R_DATA[1] ( .Y(tcm0_d_resp_rd_data_net[1]), .A(OR4_1061_Y), .B(OR4_1224_Y), .C(OR4_862_Y), .D(OR4_688_Y) ); // @49:25256 OR4 OR4_374 ( .Y(OR4_374_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25253 OR4 OR4_1225 ( .Y(OR4_1225_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25250 OR4 OR4_335 ( .Y(OR4_335_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25247 OR4 OR4_828 ( .Y(OR4_828_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25244 OR4 OR4_547 ( .Y(OR4_547_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25242 OR4 OR4_1203 ( .Y(OR4_1203_Y), .A(OR4_377_Y), .B(OR4_728_Y), .C(OR4_204_Y), .D(OR4_457_Y) ); // @49:25239 OR4 OR4_117 ( .Y(OR4_117_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25238 OR4 OR4_304 ( .Y(OR4_304_Y), .A(miv_rv32_ram_singleport_lp_R4C0_A_DOUT[17]), .B(miv_rv32_ram_singleport_lp_R5C0_A_DOUT[17]), .C(miv_rv32_ram_singleport_lp_R6C0_A_DOUT[17]), .D(miv_rv32_ram_singleport_lp_R7C0_A_DOUT[17]) ); // @49:25235 OR4 OR4_240 ( .Y(OR4_240_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25232 OR4 OR4_217 ( .Y(OR4_217_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25230 OR4 OR4_560 ( .Y(OR4_560_Y), .A(OR4_54_Y), .B(OR4_1218_Y), .C(OR4_727_Y), .D(OR4_1165_Y) ); // @49:25228 OR4 OR4_885 ( .Y(OR4_885_Y), .A(OR4_274_Y), .B(OR2_22_Y), .C(GND), .D(GND) ); // @49:25227 OR4 OR4_63 ( .Y(OR4_63_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25226 OR4 OR4_592 ( .Y(OR4_592_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25224 OR4 \OR4_R_DATA[6] ( .Y(tcm0_d_resp_rd_data_net[6]), .A(OR4_307_Y), .B(OR4_924_Y), .C(OR4_50_Y), .D(OR4_232_Y) ); // @49:25223 OR4 OR4_97 ( .Y(OR4_97_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25220 OR4 OR4_569 ( .Y(OR4_569_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25219 OR4 OR4_46 ( .Y(OR4_46_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25180 OR4 OR4_90 ( .Y(OR4_90_Y), .A(miv_rv32_ram_singleport_lp_R0C0_B_DOUT[6]), .B(miv_rv32_ram_singleport_lp_R1C0_B_DOUT[6]), .C(miv_rv32_ram_singleport_lp_R2C0_B_DOUT[6]), .D(miv_rv32_ram_singleport_lp_R3C0_B_DOUT[6]) ); // @49:25177 OR4 OR4_1062 ( .Y(OR4_1062_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25174 OR4 OR4_234 ( .Y(OR4_234_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25171 OR4 OR4_291 ( .Y(OR4_291_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25169 OR4 OR4_733 ( .Y(OR4_733_Y), .A(OR4_820_Y), .B(OR4_1041_Y), .C(OR4_640_Y), .D(OR4_445_Y) ); // @49:25166 OR4 OR4_1247 ( .Y(OR4_1247_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25164 OR2 OR2_18 ( .Y(OR2_18_Y), .A(GND), .B(GND) ); // @49:25163 OR4 OR4_468 ( .Y(OR4_468_Y), .A(miv_rv32_ram_singleport_lp_R12C0_B_DOUT[0]), .B(miv_rv32_ram_singleport_lp_R13C0_B_DOUT[0]), .C(miv_rv32_ram_singleport_lp_R14C0_B_DOUT[0]), .D(miv_rv32_ram_singleport_lp_R15C0_B_DOUT[0]) ); // @49:25161 OR4 OR4_14 ( .Y(OR4_14_Y), .A(OR4_585_Y), .B(OR4_1310_Y), .C(OR4_441_Y), .D(OR4_1256_Y) ); // @49:25157 OR4 OR4_461 ( .Y(OR4_461_Y), .A(OR4_1183_Y), .B(OR4_765_Y), .C(OR4_803_Y), .D(OR4_693_Y) ); // @49:25155 OR4 OR4_359 ( .Y(OR4_359_Y), .A(OR4_1187_Y), .B(OR4_938_Y), .C(OR4_912_Y), .D(OR4_250_Y) ); // @49:25153 OR4 OR4_342 ( .Y(OR4_342_Y), .A(OR4_1136_Y), .B(OR2_5_Y), .C(GND), .D(GND) ); // @49:25151 OR4 OR4_682 ( .Y(OR4_682_Y), .A(OR4_115_Y), .B(OR2_13_Y), .C(GND), .D(GND) ); // @49:25149 OR4 OR4_1235 ( .Y(OR4_1235_Y), .A(OR4_427_Y), .B(OR4_656_Y), .C(OR4_850_Y), .D(OR4_702_Y) ); // @49:25114 RAM1K20 miv_rv32_ram_singleport_lp_R6C0 ( .A_ADDR({req_addr_mux_3[10:2], GND, GND, GND, GND, GND}), .A_BLK_EN({Z_BLKY2_1_, req_addr_mux_3[12], Z_BLKY0_0_}), .A_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .A_DIN({GND, GND, un10_req_wr_data_mux[31:24], GND, GND, un10_req_wr_data_mux[23:16]}), .A_DOUT(miv_rv32_ram_singleport_lp_R6C0_A_DOUT[19:0]), .A_WEN({VCC, VCC}), .A_REN(VCC), .A_WIDTH({VCC, GND, VCC}), .A_WMODE({GND, GND}), .A_BYPASS(VCC), .A_DOUT_EN(VCC), .A_DOUT_SRST_N(VCC), .A_DOUT_ARST_N(VCC), .B_ADDR({req_addr_mux_3[10:2], GND, GND, GND, GND, GND}), .B_BLK_EN({Z_BLKX2_1_, req_addr_mux_3[12], Z_BLKX0_0_}), .B_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .B_DIN({GND, GND, un10_req_wr_data_mux[15:8], GND, GND, un10_req_wr_data_mux[7:0]}), .B_DOUT(miv_rv32_ram_singleport_lp_R6C0_B_DOUT[19:0]), .B_WEN({VCC, VCC}), .B_REN(VCC), .B_WIDTH({VCC, GND, VCC}), .B_WMODE({GND, GND}), .B_BYPASS(VCC), .B_DOUT_EN(VCC), .B_DOUT_SRST_N(VCC), .B_DOUT_ARST_N(VCC), .ECC_EN(GND), .ECC_BYPASS(GND), .SB_CORRECT(miv_rv32_ram_singleport_lp_R6C0_SB_CORRECT), .DB_DETECT(miv_rv32_ram_singleport_lp_R6C0_DB_DETECT), .BUSY_FB(GND), .ACCESS_BUSY(Z_ACCESS_BUSY_6__0_) ); defparam miv_rv32_ram_singleport_lp_R6C0.RAMINDEX="PF_TPSRAM_MAX_0%9216-9216%32-32%POWER%6%0%TWO-PORT%ECC_EN-0"; // @49:25112 OR4 OR4_137 ( .Y(OR4_137_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25110 OR4 OR4_688 ( .Y(OR4_688_Y), .A(OR4_1178_Y), .B(OR4_70_Y), .C(OR4_217_Y), .D(OR4_1253_Y) ); // @49:25109 OR4 OR4_898 ( .Y(OR4_898_Y), .A(miv_rv32_ram_singleport_lp_R0C0_B_DOUT[15]), .B(miv_rv32_ram_singleport_lp_R1C0_B_DOUT[15]), .C(miv_rv32_ram_singleport_lp_R2C0_B_DOUT[15]), .D(miv_rv32_ram_singleport_lp_R3C0_B_DOUT[15]) ); // @49:25106 OR4 OR4_237 ( .Y(OR4_237_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25101 OR4 OR4_1289 ( .Y(OR4_1289_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25100 OR4 OR4_676 ( .Y(OR4_676_Y), .A(miv_rv32_ram_singleport_lp_R4C0_B_DOUT[14]), .B(miv_rv32_ram_singleport_lp_R5C0_B_DOUT[14]), .C(miv_rv32_ram_singleport_lp_R6C0_B_DOUT[14]), .D(miv_rv32_ram_singleport_lp_R7C0_B_DOUT[14]) ); // @49:25099 OR4 OR4_716 ( .Y(OR4_716_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25097 OR4 OR4_446 ( .Y(OR4_446_Y), .A(OR4_855_Y), .B(OR4_1115_Y), .C(OR4_658_Y), .D(OR4_47_Y) ); // @49:25095 OR4 OR4_161 ( .Y(OR4_161_Y), .A(OR4_716_Y), .B(OR4_459_Y), .C(OR4_872_Y), .D(OR4_1236_Y) ); // @49:25092 OR4 OR4_617 ( .Y(OR4_617_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25089 OR4 OR4_715 ( .Y(OR4_715_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25088 OR4 OR4_606 ( .Y(OR4_606_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25087 OR4 OR4_1120 ( .Y(OR4_1120_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25086 OR4 OR4_364 ( .Y(OR4_364_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25045 OR4 OR4_1178 ( .Y(OR4_1178_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25044 OR4 OR4_3 ( .Y(OR4_3_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25042 OR4 OR4_1271 ( .Y(OR4_1271_Y), .A(OR4_679_Y), .B(OR4_436_Y), .C(OR4_756_Y), .D(OR4_622_Y) ); // @49:25039 OR4 OR4_988 ( .Y(OR4_988_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25038 OR4 OR4_54 ( .Y(OR4_54_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25035 OR4 OR4_1152 ( .Y(OR4_1152_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25032 OR4 OR4_548 ( .Y(OR4_548_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:25030 OR4 OR4_1176 ( .Y(OR4_1176_Y), .A(OR4_101_Y), .B(OR4_1013_Y), .C(OR4_1060_Y), .D(OR4_574_Y) ); // @49:24949 OR4 OR4_1209 ( .Y(OR4_1209_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24946 OR4 OR4_96 ( .Y(OR4_96_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24944 OR4 OR4_283 ( .Y(OR4_283_Y), .A(OR4_893_Y), .B(OR4_286_Y), .C(OR4_906_Y), .D(OR4_1129_Y) ); // @49:24941 OR4 OR4_450 ( .Y(OR4_450_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24939 OR4 \OR4_R_DATA[25] ( .Y(tcm0_d_resp_rd_data_net[25]), .A(OR4_1025_Y), .B(OR4_350_Y), .C(OR4_844_Y), .D(OR4_489_Y) ); // @49:24859 OR4 OR4_911 ( .Y(OR4_911_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24857 OR2 OR2_28 ( .Y(OR2_28_Y), .A(GND), .B(GND) ); // @49:24855 OR4 OR4_351 ( .Y(OR4_351_Y), .A(OR4_105_Y), .B(OR4_391_Y), .C(OR4_804_Y), .D(OR4_334_Y) ); // @49:24850 OR4 OR4_624 ( .Y(OR4_624_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24849 OR4 OR4_736 ( .Y(OR4_736_Y), .A(miv_rv32_ram_singleport_lp_R4C0_B_DOUT[0]), .B(miv_rv32_ram_singleport_lp_R5C0_B_DOUT[0]), .C(miv_rv32_ram_singleport_lp_R6C0_B_DOUT[0]), .D(miv_rv32_ram_singleport_lp_R7C0_B_DOUT[0]) ); // @49:24847 OR4 OR4_637 ( .Y(OR4_637_Y), .A(OR4_173_Y), .B(OR2_31_Y), .C(GND), .D(GND) ); // @49:24844 OR4 OR4_735 ( .Y(OR4_735_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24841 OR4 OR4_875 ( .Y(OR4_875_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24801 OR4 OR4_1130 ( .Y(OR4_1130_Y), .A(OR4_548_Y), .B(OR4_429_Y), .C(OR4_522_Y), .D(OR4_603_Y) ); // @49:24762 OR4 OR4_72 ( .Y(OR4_72_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24760 OR4 OR4_1179 ( .Y(OR4_1179_Y), .A(miv_rv32_ram_singleport_lp_R8C0_A_DOUT[15]), .B(miv_rv32_ram_singleport_lp_R9C0_A_DOUT[15]), .C(miv_rv32_ram_singleport_lp_R10C0_A_DOUT[15]), .D(miv_rv32_ram_singleport_lp_R11C0_A_DOUT[15]) ); // @49:24758 OR4 OR4_805 ( .Y(OR4_805_Y), .A(OR4_969_Y), .B(OR4_111_Y), .C(OR4_742_Y), .D(OR4_952_Y) ); // @49:24755 OR4 OR4_1047 ( .Y(OR4_1047_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24752 OR4 OR4_119 ( .Y(OR4_119_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24751 OR4 OR4_226 ( .Y(OR4_226_Y), .A(miv_rv32_ram_singleport_lp_R8C0_B_DOUT[5]), .B(miv_rv32_ram_singleport_lp_R9C0_B_DOUT[5]), .C(miv_rv32_ram_singleport_lp_R10C0_B_DOUT[5]), .D(miv_rv32_ram_singleport_lp_R11C0_B_DOUT[5]) ); // @49:24748 OR4 OR4_546 ( .Y(OR4_546_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24745 OR4 OR4_952 ( .Y(OR4_952_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24742 OR4 OR4_554 ( .Y(OR4_554_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24740 OR4 OR4_1025 ( .Y(OR4_1025_Y), .A(OR4_243_Y), .B(OR4_991_Y), .C(OR4_1055_Y), .D(OR4_415_Y) ); // @49:24738 OR4 OR4_629 ( .Y(OR4_629_Y), .A(OR4_236_Y), .B(OR4_514_Y), .C(OR4_494_Y), .D(OR4_1124_Y) ); // @49:24735 OR4 OR4_666 ( .Y(OR4_666_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24733 OR2 OR2_17 ( .Y(OR2_17_Y), .A(GND), .B(GND) ); // @49:24731 OR4 \OR4_R_DATA[3] ( .Y(tcm0_d_resp_rd_data_net[3]), .A(OR4_315_Y), .B(OR4_674_Y), .C(OR4_572_Y), .D(OR4_670_Y) ); // @49:24730 OR4 OR4_1012 ( .Y(OR4_1012_Y), .A(miv_rv32_ram_singleport_lp_R4C0_B_DOUT[13]), .B(miv_rv32_ram_singleport_lp_R5C0_B_DOUT[13]), .C(miv_rv32_ram_singleport_lp_R6C0_B_DOUT[13]), .D(miv_rv32_ram_singleport_lp_R7C0_B_DOUT[13]) ); // @49:24727 OR4 OR4_741 ( .Y(OR4_741_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24724 OR4 OR4_846 ( .Y(OR4_846_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24683 OR2 OR2_10 ( .Y(OR2_10_Y), .A(GND), .B(GND) ); // @49:24680 OR4 OR4_318 ( .Y(OR4_318_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24679 OR4 OR4_527 ( .Y(OR4_527_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24678 OR4 OR4_672 ( .Y(OR4_672_Y), .A(miv_rv32_ram_singleport_lp_R4C0_A_DOUT[1]), .B(miv_rv32_ram_singleport_lp_R5C0_A_DOUT[1]), .C(miv_rv32_ram_singleport_lp_R6C0_A_DOUT[1]), .D(miv_rv32_ram_singleport_lp_R7C0_A_DOUT[1]) ); // @49:24675 OR4 OR4_1273 ( .Y(OR4_1273_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24672 OR4 OR4_220 ( .Y(OR4_220_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24670 OR4 OR4_943 ( .Y(OR4_943_Y), .A(OR4_557_Y), .B(OR4_880_Y), .C(OR4_847_Y), .D(OR4_174_Y) ); // @49:24669 OR4 OR4_931 ( .Y(OR4_931_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24665 OR4 OR4_552 ( .Y(OR4_552_Y), .A(OR4_743_Y), .B(OR4_358_Y), .C(OR4_405_Y), .D(OR4_778_Y) ); // @49:24662 OR4 OR4_602 ( .Y(OR4_602_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24660 OR4 OR4_678 ( .Y(OR4_678_Y), .A(OR4_859_Y), .B(OR4_1067_Y), .C(OR4_1220_Y), .D(OR4_1038_Y) ); // @49:24619 OR4 OR4_694 ( .Y(OR4_694_Y), .A(OR4_171_Y), .B(OR4_40_Y), .C(OR4_138_Y), .D(OR4_294_Y) ); // @49:24617 OR4 OR4_144 ( .Y(OR4_144_Y), .A(OR4_1289_Y), .B(OR4_1076_Y), .C(OR4_840_Y), .D(OR4_1048_Y) ); // @49:24615 OR4 OR4_608 ( .Y(OR4_608_Y), .A(OR4_1018_Y), .B(OR4_410_Y), .C(OR4_1039_Y), .D(OR4_1245_Y) ); // @49:24614 OR4 OR4_1182 ( .Y(OR4_1182_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24613 OR4 OR4_116 ( .Y(OR4_116_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24611 OR4 OR4_139 ( .Y(OR4_139_Y), .A(OR4_887_Y), .B(OR4_587_Y), .C(OR4_562_Y), .D(OR4_1199_Y) ); // @49:24606 OR4 OR4_79 ( .Y(OR4_79_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24604 OR4 OR4_251 ( .Y(OR4_251_Y), .A(OR4_233_Y), .B(OR2_18_Y), .C(GND), .D(GND) ); // @49:24601 OR4 OR4_419 ( .Y(OR4_419_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24598 OR4 OR4_1056 ( .Y(OR4_1056_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24595 OR4 OR4_1121 ( .Y(OR4_1121_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24594 OR4 OR4_296 ( .Y(OR4_296_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24591 OR4 OR4_1035 ( .Y(OR4_1035_Y), .A(miv_rv32_ram_singleport_lp_R16C0_B_DOUT[15]), .B(miv_rv32_ram_singleport_lp_R17C0_B_DOUT[15]), .C(GND), .D(GND) ); // @49:24588 OR4 OR4_412 ( .Y(OR4_412_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24585 OR4 OR4_583 ( .Y(OR4_583_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24543 OR4 OR4_978 ( .Y(OR4_978_Y), .A(OR4_165_Y), .B(OR4_1133_Y), .C(OR4_1107_Y), .D(OR4_434_Y) ); // @49:24542 OR4 OR4_12 ( .Y(OR4_12_Y), .A(miv_rv32_ram_singleport_lp_R16C0_B_DOUT[0]), .B(miv_rv32_ram_singleport_lp_R17C0_B_DOUT[0]), .C(GND), .D(GND) ); // @49:24541 OR4 OR4_699 ( .Y(OR4_699_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24540 OR4 OR4_884 ( .Y(OR4_884_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24537 OR4 OR4_1048 ( .Y(OR4_1048_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24534 OR4 OR4_710 ( .Y(OR4_710_Y), .A(miv_rv32_ram_singleport_lp_R16C0_A_DOUT[3]), .B(miv_rv32_ram_singleport_lp_R17C0_A_DOUT[3]), .C(GND), .D(GND) ); // @49:24531 OR4 OR4_865 ( .Y(OR4_865_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24528 OR4 OR4_322 ( .Y(OR4_322_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24526 OR4 OR4_313 ( .Y(OR4_313_Y), .A(OR4_735_Y), .B(OR4_617_Y), .C(OR4_712_Y), .D(OR4_491_Y) ); // @49:24523 OR4 OR4_908 ( .Y(OR4_908_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24522 OR4 OR4_1198 ( .Y(OR4_1198_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24520 OR4 OR4_273 ( .Y(OR4_273_Y), .A(OR4_858_Y), .B(OR4_1122_Y), .C(OR4_1309_Y), .D(OR4_1164_Y) ); // @49:24519 OR4 OR4_338 ( .Y(OR4_338_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24516 OR4 OR4_789 ( .Y(OR4_789_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24513 OR4 OR4_858 ( .Y(OR4_858_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24510 OR4 OR4_1291 ( .Y(OR4_1291_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24509 OR4 OR4_1102 ( .Y(OR4_1102_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24506 OR4 OR4_597 ( .Y(OR4_597_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24504 OR4 OR4_290 ( .Y(OR4_290_Y), .A(OR4_1046_Y), .B(OR4_1293_Y), .C(OR4_839_Y), .D(OR4_227_Y) ); // @49:24499 OR4 OR4_203 ( .Y(OR4_203_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24498 OR4 OR4_1196 ( .Y(OR4_1196_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24496 OR4 OR4_426 ( .Y(OR4_426_Y), .A(OR4_935_Y), .B(OR4_75_Y), .C(OR4_629_Y), .D(OR4_1177_Y) ); // @49:24494 OR2 OR2_27 ( .Y(OR2_27_Y), .A(GND), .B(GND) ); // @49:24488 OR2 OR2_16 ( .Y(OR2_16_Y), .A(GND), .B(GND) ); // @49:24449 INV \INVBLKX1[0] ( .Y(Z_BLKX1_0_), .A(req_addr_mux_3[12]) ); // @49:24408 OR4 OR4_136 ( .Y(OR4_136_Y), .A(miv_rv32_ram_singleport_lp_R16C0_A_DOUT[16]), .B(miv_rv32_ram_singleport_lp_R17C0_A_DOUT[16]), .C(GND), .D(GND) ); // @49:24406 OR2 OR2_20 ( .Y(OR2_20_Y), .A(GND), .B(GND) ); // @49:24403 OR4 OR4_346 ( .Y(OR4_346_Y), .A(miv_rv32_ram_singleport_lp_R16C0_A_DOUT[2]), .B(miv_rv32_ram_singleport_lp_R17C0_A_DOUT[2]), .C(GND), .D(GND) ); // @49:24398 OR4 OR4_439 ( .Y(OR4_439_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24395 OR4 OR4_662 ( .Y(OR4_662_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24393 OR4 OR4_1131 ( .Y(OR4_1131_Y), .A(OR4_484_Y), .B(OR4_1300_Y), .C(OR4_186_Y), .D(OR4_642_Y) ); // @49:24392 OR4 OR4_52 ( .Y(OR4_52_Y), .A(miv_rv32_ram_singleport_lp_R0C0_A_DOUT[1]), .B(miv_rv32_ram_singleport_lp_R1C0_A_DOUT[1]), .C(miv_rv32_ram_singleport_lp_R2C0_A_DOUT[1]), .D(miv_rv32_ram_singleport_lp_R3C0_A_DOUT[1]) ); // @49:24390 OR4 OR4_528 ( .Y(OR4_528_Y), .A(OR4_327_Y), .B(OR4_926_Y), .C(OR4_58_Y), .D(OR4_875_Y) ); // @49:24387 OR4 OR4_444 ( .Y(OR4_444_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24385 OR4 OR4_432 ( .Y(OR4_432_Y), .A(OR4_1292_Y), .B(OR4_228_Y), .C(OR4_1096_Y), .D(OR4_480_Y) ); // @49:24383 OR4 OR4_1054 ( .Y(OR4_1054_Y), .A(miv_rv32_ram_singleport_lp_R8C0_A_DOUT[12]), .B(miv_rv32_ram_singleport_lp_R9C0_A_DOUT[12]), .C(miv_rv32_ram_singleport_lp_R10C0_A_DOUT[12]), .D(miv_rv32_ram_singleport_lp_R11C0_A_DOUT[12]) ); // @49:24382 OR4 OR4_510 ( .Y(OR4_510_Y), .A(miv_rv32_ram_singleport_lp_R0C0_B_DOUT[12]), .B(miv_rv32_ram_singleport_lp_R1C0_B_DOUT[12]), .C(miv_rv32_ram_singleport_lp_R2C0_B_DOUT[12]), .D(miv_rv32_ram_singleport_lp_R3C0_B_DOUT[12]) ); // @49:24379 OR4 OR4_668 ( .Y(OR4_668_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24376 OR4 OR4_1279 ( .Y(OR4_1279_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24374 OR4 OR4_519 ( .Y(OR4_519_Y), .A(OR4_1104_Y), .B(OR4_44_Y), .C(OR4_240_Y), .D(OR4_89_Y) ); // @49:24373 OR4 OR4_730 ( .Y(OR4_730_Y), .A(miv_rv32_ram_singleport_lp_R16C0_B_DOUT[2]), .B(miv_rv32_ram_singleport_lp_R17C0_B_DOUT[2]), .C(GND), .D(GND) ); // @49:24370 OR4 OR4_333 ( .Y(OR4_333_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24367 OR4 OR4_41 ( .Y(OR4_41_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24364 OR4 OR4_19 ( .Y(OR4_19_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24361 OR4 OR4_1199 ( .Y(OR4_1199_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24358 OR4 OR4_1168 ( .Y(OR4_1168_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24355 OR4 OR4_1043 ( .Y(OR4_1043_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24352 OR4 OR4_392 ( .Y(OR4_392_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24349 OR4 OR4_1261 ( .Y(OR4_1261_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24347 OR4 OR4_389 ( .Y(OR4_389_Y), .A(OR4_52_Y), .B(OR4_672_Y), .C(OR4_1051_Y), .D(OR4_1297_Y) ); // @49:24345 OR4 \OR4_R_DATA[0] ( .Y(tcm0_d_resp_rd_data_net[0]), .A(OR4_1080_Y), .B(OR4_1230_Y), .C(OR4_807_Y), .D(OR4_1068_Y) ); // @49:24305 OR4 OR4_1166 ( .Y(OR4_1166_Y), .A(OR4_385_Y), .B(OR4_630_Y), .C(OR4_811_Y), .D(OR4_666_Y) ); // @49:24265 OR4 OR4_968 ( .Y(OR4_968_Y), .A(OR4_15_Y), .B(OR4_448_Y), .C(OR4_42_Y), .D(OR4_944_Y) ); // @49:24264 OR4 OR4_1020 ( .Y(OR4_1020_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24261 OR4 OR4_1086 ( .Y(OR4_1086_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24259 OR4 OR4_418 ( .Y(OR4_418_Y), .A(OR4_1110_Y), .B(OR2_11_Y), .C(GND), .D(GND) ); // @49:24256 OR4 OR4_496 ( .Y(OR4_496_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24251 OR4 OR4_1041 ( .Y(OR4_1041_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24250 OR4 OR4_411 ( .Y(OR4_411_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24247 OR4 OR4_445 ( .Y(OR4_445_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24245 OR4 OR4_1145 ( .Y(OR4_1145_Y), .A(OR4_729_Y), .B(OR4_475_Y), .C(OR4_255_Y), .D(OR4_312_Y) ); // @49:24244 OR4 OR4_1293 ( .Y(OR4_1293_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24241 OR4 OR4_526 ( .Y(OR4_526_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24238 OR4 OR4_263 ( .Y(OR4_263_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24235 OR4 OR4_1301 ( .Y(OR4_1301_Y), .A(miv_rv32_ram_singleport_lp_R12C0_B_DOUT[14]), .B(miv_rv32_ram_singleport_lp_R13C0_B_DOUT[14]), .C(miv_rv32_ram_singleport_lp_R14C0_B_DOUT[14]), .D(miv_rv32_ram_singleport_lp_R15C0_B_DOUT[14]) ); // @49:24234 OR4 OR4_530 ( .Y(OR4_530_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24233 OR4 OR4_59 ( .Y(OR4_59_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24230 OR4 OR4_598 ( .Y(OR4_598_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24227 OR4 OR4_111 ( .Y(OR4_111_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24226 INV \INVBLKX0[0] ( .Y(Z_BLKX0_0_), .A(req_addr_mux_3[11]) ); // @49:24224 OR2 OR2_26 ( .Y(OR2_26_Y), .A(GND), .B(GND) ); // @49:24221 OR4 OR4_539 ( .Y(OR4_539_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24218 OR4 OR4_573 ( .Y(OR4_573_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24215 OR4 OR4_1169 ( .Y(OR4_1169_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24213 OR4 OR4_43 ( .Y(OR4_43_Y), .A(OR4_404_Y), .B(OR4_187_Y), .C(OR4_1270_Y), .D(OR4_947_Y) ); // @49:24211 OR4 OR4_721 ( .Y(OR4_721_Y), .A(OR4_874_Y), .B(OR4_774_Y), .C(OR4_1216_Y), .D(OR4_278_Y) ); // @49:24208 OR4 OR4_826 ( .Y(OR4_826_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24207 OR4 OR4_874 ( .Y(OR4_874_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24204 OR4 OR4_1006 ( .Y(OR4_1006_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24200 OR4 OR4_314 ( .Y(OR4_314_Y), .A(OR4_336_Y), .B(OR4_577_Y), .C(OR4_132_Y), .D(OR4_808_Y) ); // @49:24198 OR4 OR4_503 ( .Y(OR4_503_Y), .A(OR4_1139_Y), .B(OR4_733_Y), .C(OR4_801_Y), .D(OR4_1050_Y) ); // @49:24195 OR4 OR4_480 ( .Y(OR4_480_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24194 OR4 OR4_923 ( .Y(OR4_923_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24191 OR4 OR4_779 ( .Y(OR4_779_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24188 OR4 OR4_804 ( .Y(OR4_804_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24185 OR4 OR4_947 ( .Y(OR4_947_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24146 OR4 OR4_654 ( .Y(OR4_654_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24144 OR2 OR2_3 ( .Y(OR2_3_Y), .A(GND), .B(GND) ); // @49:24103 OR4 OR4_381 ( .Y(OR4_381_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24100 OR4 OR4_709 ( .Y(OR4_709_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24099 OR4 OR4_1030 ( .Y(OR4_1030_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24096 OR4 OR4_438 ( .Y(OR4_438_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24093 OR4 OR4_124 ( .Y(OR4_124_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24090 OR4 OR4_91 ( .Y(OR4_91_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24088 OR4 OR4_431 ( .Y(OR4_431_Y), .A(OR4_613_Y), .B(OR4_853_Y), .C(OR4_1058_Y), .D(OR4_892_Y) ); // @49:24085 OR4 OR4_1227 ( .Y(OR4_1227_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24082 OR4 OR4_1263 ( .Y(OR4_1263_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24080 OR2 OR2_6 ( .Y(OR2_6_Y), .A(GND), .B(GND) ); // @49:24078 OR4 OR4_1248 ( .Y(OR4_1248_Y), .A(OR4_326_Y), .B(OR4_487_Y), .C(OR4_463_Y), .D(OR4_1082_Y) ); // @49:24076 OR4 OR4_75 ( .Y(OR4_75_Y), .A(OR4_710_Y), .B(OR4_554_Y), .C(OR4_276_Y), .D(OR4_126_Y) ); // @49:24074 OR4 OR4_1084 ( .Y(OR4_1084_Y), .A(OR4_320_Y), .B(OR4_529_Y), .C(OR4_673_Y), .D(OR4_1281_Y) ); // @49:24072 OR4 OR4_1255 ( .Y(OR4_1255_Y), .A(OR4_343_Y), .B(OR4_704_Y), .C(OR4_170_Y), .D(OR4_430_Y) ); // @49:24070 OR2 OR2_0 ( .Y(OR2_0_Y), .A(GND), .B(GND) ); // @49:24031 OR4 OR4_256 ( .Y(OR4_256_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:24028 OR4 OR4_596 ( .Y(OR4_596_Y), .A(miv_rv32_ram_singleport_lp_R8C0_B_DOUT[15]), .B(miv_rv32_ram_singleport_lp_R9C0_B_DOUT[15]), .C(miv_rv32_ram_singleport_lp_R10C0_B_DOUT[15]), .D(miv_rv32_ram_singleport_lp_R11C0_B_DOUT[15]) ); // @49:23991 RAM1K20 miv_rv32_ram_singleport_lp_R13C0 ( .A_ADDR({req_addr_mux_3[10:2], GND, GND, GND, GND, GND}), .A_BLK_EN({Z_BLKY2_3_, Z_BLKY1_0_, req_addr_mux_3[11]}), .A_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .A_DIN({GND, GND, un10_req_wr_data_mux[31:24], GND, GND, un10_req_wr_data_mux[23:16]}), .A_DOUT(miv_rv32_ram_singleport_lp_R13C0_A_DOUT[19:0]), .A_WEN({VCC, VCC}), .A_REN(VCC), .A_WIDTH({VCC, GND, VCC}), .A_WMODE({GND, GND}), .A_BYPASS(VCC), .A_DOUT_EN(VCC), .A_DOUT_SRST_N(VCC), .A_DOUT_ARST_N(VCC), .B_ADDR({req_addr_mux_3[10:2], GND, GND, GND, GND, GND}), .B_BLK_EN({Z_BLKX2_3_, Z_BLKX1_0_, req_addr_mux_3[11]}), .B_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .B_DIN({GND, GND, un10_req_wr_data_mux[15:8], GND, GND, un10_req_wr_data_mux[7:0]}), .B_DOUT(miv_rv32_ram_singleport_lp_R13C0_B_DOUT[19:0]), .B_WEN({VCC, VCC}), .B_REN(VCC), .B_WIDTH({VCC, GND, VCC}), .B_WMODE({GND, GND}), .B_BYPASS(VCC), .B_DOUT_EN(VCC), .B_DOUT_SRST_N(VCC), .B_DOUT_ARST_N(VCC), .ECC_EN(GND), .ECC_BYPASS(GND), .SB_CORRECT(miv_rv32_ram_singleport_lp_R13C0_SB_CORRECT), .DB_DETECT(miv_rv32_ram_singleport_lp_R13C0_DB_DETECT), .BUSY_FB(GND), .ACCESS_BUSY(Z_ACCESS_BUSY_13__0_) ); defparam miv_rv32_ram_singleport_lp_R13C0.RAMINDEX="PF_TPSRAM_MAX_0%9216-9216%32-32%POWER%13%0%TWO-PORT%ECC_EN-0"; // @49:23987 OR4 OR4_982 ( .Y(OR4_982_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23952 RAM1K20 miv_rv32_ram_singleport_lp_R3C0 ( .A_ADDR({req_addr_mux_3[10:2], GND, GND, GND, GND, GND}), .A_BLK_EN({Z_BLKY2_0_, req_addr_mux_3[12:11]}), .A_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .A_DIN({GND, GND, un10_req_wr_data_mux[31:24], GND, GND, un10_req_wr_data_mux[23:16]}), .A_DOUT(miv_rv32_ram_singleport_lp_R3C0_A_DOUT[19:0]), .A_WEN({VCC, VCC}), .A_REN(VCC), .A_WIDTH({VCC, GND, VCC}), .A_WMODE({GND, GND}), .A_BYPASS(VCC), .A_DOUT_EN(VCC), .A_DOUT_SRST_N(VCC), .A_DOUT_ARST_N(VCC), .B_ADDR({req_addr_mux_3[10:2], GND, GND, GND, GND, GND}), .B_BLK_EN({Z_BLKX2_0_, req_addr_mux_3[12:11]}), .B_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .B_DIN({GND, GND, un10_req_wr_data_mux[15:8], GND, GND, un10_req_wr_data_mux[7:0]}), .B_DOUT(miv_rv32_ram_singleport_lp_R3C0_B_DOUT[19:0]), .B_WEN({VCC, VCC}), .B_REN(VCC), .B_WIDTH({VCC, GND, VCC}), .B_WMODE({GND, GND}), .B_BYPASS(VCC), .B_DOUT_EN(VCC), .B_DOUT_SRST_N(VCC), .B_DOUT_ARST_N(VCC), .ECC_EN(GND), .ECC_BYPASS(GND), .SB_CORRECT(miv_rv32_ram_singleport_lp_R3C0_SB_CORRECT), .DB_DETECT(miv_rv32_ram_singleport_lp_R3C0_DB_DETECT), .BUSY_FB(GND), .ACCESS_BUSY(Z_ACCESS_BUSY_3__0_) ); defparam miv_rv32_ram_singleport_lp_R3C0.RAMINDEX="PF_TPSRAM_MAX_0%9216-9216%32-32%POWER%3%0%TWO-PORT%ECC_EN-0"; // @49:23948 OR4 OR4_659 ( .Y(OR4_659_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23945 OR4 OR4_584 ( .Y(OR4_584_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23942 OR4 OR4_131 ( .Y(OR4_131_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23941 OR4 OR4_1144 ( .Y(OR4_1144_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23862 OR4 OR4_1303 ( .Y(OR4_1303_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23861 OR4 OR4_791 ( .Y(OR4_791_Y), .A(miv_rv32_ram_singleport_lp_R8C0_A_DOUT[14]), .B(miv_rv32_ram_singleport_lp_R9C0_A_DOUT[14]), .C(miv_rv32_ram_singleport_lp_R10C0_A_DOUT[14]), .D(miv_rv32_ram_singleport_lp_R11C0_A_DOUT[14]) ); // @49:23858 OR4 OR4_334 ( .Y(OR4_334_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23856 OR2 OR2_4 ( .Y(OR2_4_Y), .A(GND), .B(GND) ); // @49:23853 OR4 OR4_896 ( .Y(OR4_896_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23850 OR4 OR4_557 ( .Y(OR4_557_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23848 OR4 OR4_1172 ( .Y(OR4_1172_Y), .A(OR4_556_Y), .B(OR4_118_Y), .C(OR4_99_Y), .D(OR4_725_Y) ); // @49:23845 OR4 OR4_250 ( .Y(OR4_250_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23844 OR4 OR4_841 ( .Y(OR4_841_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23842 OR4 OR4_1004 ( .Y(OR4_1004_Y), .A(OR4_291_Y), .B(OR4_495_Y), .C(OR4_633_Y), .D(OR4_454_Y) ); // @49:23801 OR4 OR4_379 ( .Y(OR4_379_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23798 OR4 OR4_8 ( .Y(OR4_8_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23795 OR4 OR4_993 ( .Y(OR4_993_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23794 OR4 OR4_1299 ( .Y(OR4_1299_Y), .A(miv_rv32_ram_singleport_lp_R4C0_A_DOUT[11]), .B(miv_rv32_ram_singleport_lp_R5C0_A_DOUT[11]), .C(miv_rv32_ram_singleport_lp_R6C0_A_DOUT[11]), .D(miv_rv32_ram_singleport_lp_R7C0_A_DOUT[11]) ); // @49:23791 OR4 OR4_24 ( .Y(OR4_24_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23749 OR4 OR4_582 ( .Y(OR4_582_Y), .A(miv_rv32_ram_singleport_lp_R16C0_A_DOUT[14]), .B(miv_rv32_ram_singleport_lp_R17C0_A_DOUT[14]), .C(GND), .D(GND) ); // @49:23747 OR4 OR4_1118 ( .Y(OR4_1118_Y), .A(OR4_221_Y), .B(OR2_17_Y), .C(GND), .D(GND) ); // @49:23745 OR4 OR4_309 ( .Y(OR4_309_Y), .A(OR4_819_Y), .B(OR4_1272_Y), .C(OR4_528_Y), .D(OR4_1059_Y) ); // @49:23742 OR4 OR4_616 ( .Y(OR4_616_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23740 OR4 OR4_744 ( .Y(OR4_744_Y), .A(OR4_635_Y), .B(OR4_440_Y), .C(OR4_203_Y), .D(OR4_817_Y) ); // @49:23737 OR4 OR4_1211 ( .Y(OR4_1211_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23736 OR4 OR4_93 ( .Y(OR4_93_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23733 OR4 OR4_563 ( .Y(OR4_563_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23732 OR4 OR4_747 ( .Y(OR4_747_Y), .A(miv_rv32_ram_singleport_lp_R4C0_B_DOUT[5]), .B(miv_rv32_ram_singleport_lp_R5C0_B_DOUT[5]), .C(miv_rv32_ram_singleport_lp_R6C0_B_DOUT[5]), .D(miv_rv32_ram_singleport_lp_R7C0_B_DOUT[5]) ); // @49:23729 OR4 OR4_1237 ( .Y(OR4_1237_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23727 OR4 OR4_326 ( .Y(OR4_326_Y), .A(OR4_97_Y), .B(OR4_1275_Y), .C(OR4_71_Y), .D(OR4_27_Y) ); // @49:23724 OR4 OR4_194 ( .Y(OR4_194_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23723 OR4 OR4_864 ( .Y(OR4_864_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23722 OR4 OR4_1116 ( .Y(OR4_1116_Y), .A(miv_rv32_ram_singleport_lp_R0C0_B_DOUT[2]), .B(miv_rv32_ram_singleport_lp_R1C0_B_DOUT[2]), .C(miv_rv32_ram_singleport_lp_R2C0_B_DOUT[2]), .D(miv_rv32_ram_singleport_lp_R3C0_B_DOUT[2]) ); // @49:23682 OR4 OR4_769 ( .Y(OR4_769_Y), .A(OR4_970_Y), .B(OR4_1188_Y), .C(OR4_13_Y), .D(OR4_717_Y) ); // @49:23680 OR4 OR4_281 ( .Y(OR4_281_Y), .A(OR4_1113_Y), .B(OR4_889_Y), .C(OR4_661_Y), .D(OR4_246_Y) ); // @49:23677 OR4 OR4_424 ( .Y(OR4_424_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23676 OR4 OR4_15 ( .Y(OR4_15_Y), .A(miv_rv32_ram_singleport_lp_R16C0_A_DOUT[17]), .B(miv_rv32_ram_singleport_lp_R17C0_A_DOUT[17]), .C(GND), .D(GND) ); // @49:23673 OR4 OR4_352 ( .Y(OR4_352_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23672 OR4 OR4_1150 ( .Y(OR4_1150_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23670 OR4 OR4_849 ( .Y(OR4_849_Y), .A(OR4_86_Y), .B(OR4_891_Y), .C(OR4_1098_Y), .D(OR4_257_Y) ); // @49:23667 OR4 OR4_470 ( .Y(OR4_470_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23666 OR4 OR4_888 ( .Y(OR4_888_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23665 OR4 OR4_1269 ( .Y(OR4_1269_Y), .A(miv_rv32_ram_singleport_lp_R0C0_B_DOUT[10]), .B(miv_rv32_ram_singleport_lp_R1C0_B_DOUT[10]), .C(miv_rv32_ram_singleport_lp_R2C0_B_DOUT[10]), .D(miv_rv32_ram_singleport_lp_R3C0_B_DOUT[10]) ); // @49:23664 OR4 OR4_1119 ( .Y(OR4_1119_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23659 OR4 OR4_1285 ( .Y(OR4_1285_Y), .A(miv_rv32_ram_singleport_lp_R16C0_A_DOUT[7]), .B(miv_rv32_ram_singleport_lp_R17C0_A_DOUT[7]), .C(GND), .D(GND) ); // @49:23656 OR4 OR4_1027 ( .Y(OR4_1027_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23653 OR4 OR4_456 ( .Y(OR4_456_Y), .A(miv_rv32_ram_singleport_lp_R12C0_B_DOUT[12]), .B(miv_rv32_ram_singleport_lp_R13C0_B_DOUT[12]), .C(miv_rv32_ram_singleport_lp_R14C0_B_DOUT[12]), .D(miv_rv32_ram_singleport_lp_R15C0_B_DOUT[12]) ); // @49:23650 OR4 OR4_636 ( .Y(OR4_636_Y), .A(miv_rv32_ram_singleport_lp_R16C0_B_DOUT[12]), .B(miv_rv32_ram_singleport_lp_R17C0_B_DOUT[12]), .C(GND), .D(GND) ); // @49:23647 OR4 OR4_400 ( .Y(OR4_400_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23645 OR4 OR4_815 ( .Y(OR4_815_Y), .A(OR4_667_Y), .B(OR2_6_Y), .C(GND), .D(GND) ); // @49:23644 OR4 OR4_425 ( .Y(OR4_425_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23642 OR4 OR4_371 ( .Y(OR4_371_Y), .A(OR4_927_Y), .B(OR4_789_Y), .C(OR4_895_Y), .D(OR4_921_Y) ); // @49:23640 OR4 OR4_249 ( .Y(OR4_249_Y), .A(OR4_623_Y), .B(OR4_637_Y), .C(OR4_624_Y), .D(OR4_373_Y) ); // @49:23639 OR4 OR4_396 ( .Y(OR4_396_Y), .A(miv_rv32_ram_singleport_lp_R0C0_B_DOUT[13]), .B(miv_rv32_ram_singleport_lp_R1C0_B_DOUT[13]), .C(miv_rv32_ram_singleport_lp_R2C0_B_DOUT[13]), .D(miv_rv32_ram_singleport_lp_R3C0_B_DOUT[13]) ); // @49:23599 OR4 OR4_301 ( .Y(OR4_301_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23596 OR4 OR4_369 ( .Y(OR4_369_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23595 OR4 OR4_55 ( .Y(OR4_55_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23594 OR4 OR4_558 ( .Y(OR4_558_Y), .A(miv_rv32_ram_singleport_lp_R0C0_A_DOUT[17]), .B(miv_rv32_ram_singleport_lp_R1C0_A_DOUT[17]), .C(miv_rv32_ram_singleport_lp_R2C0_A_DOUT[17]), .D(miv_rv32_ram_singleport_lp_R3C0_A_DOUT[17]) ); // @49:23593 OR4 OR4_972 ( .Y(OR4_972_Y), .A(miv_rv32_ram_singleport_lp_R4C0_A_DOUT[15]), .B(miv_rv32_ram_singleport_lp_R5C0_A_DOUT[15]), .C(miv_rv32_ram_singleport_lp_R6C0_A_DOUT[15]), .D(miv_rv32_ram_singleport_lp_R7C0_A_DOUT[15]) ); // @49:23591 OR4 OR4_1213 ( .Y(OR4_1213_Y), .A(OR4_209_Y), .B(OR4_197_Y), .C(OR4_627_Y), .D(OR4_140_Y) ); // @49:23588 OR4 OR4_494 ( .Y(OR4_494_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23551 RAM1K20 miv_rv32_ram_singleport_lp_R12C0 ( .A_ADDR({req_addr_mux_3[10:2], GND, GND, GND, GND, GND}), .A_BLK_EN({Z_BLKY2_3_, Z_BLKY1_0_, Z_BLKY0_0_}), .A_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .A_DIN({GND, GND, un10_req_wr_data_mux[31:24], GND, GND, un10_req_wr_data_mux[23:16]}), .A_DOUT(miv_rv32_ram_singleport_lp_R12C0_A_DOUT[19:0]), .A_WEN({VCC, VCC}), .A_REN(VCC), .A_WIDTH({VCC, GND, VCC}), .A_WMODE({GND, GND}), .A_BYPASS(VCC), .A_DOUT_EN(VCC), .A_DOUT_SRST_N(VCC), .A_DOUT_ARST_N(VCC), .B_ADDR({req_addr_mux_3[10:2], GND, GND, GND, GND, GND}), .B_BLK_EN({Z_BLKX2_3_, Z_BLKX1_0_, Z_BLKX0_0_}), .B_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .B_DIN({GND, GND, un10_req_wr_data_mux[15:8], GND, GND, un10_req_wr_data_mux[7:0]}), .B_DOUT(miv_rv32_ram_singleport_lp_R12C0_B_DOUT[19:0]), .B_WEN({VCC, VCC}), .B_REN(VCC), .B_WIDTH({VCC, GND, VCC}), .B_WMODE({GND, GND}), .B_BYPASS(VCC), .B_DOUT_EN(VCC), .B_DOUT_SRST_N(VCC), .B_DOUT_ARST_N(VCC), .ECC_EN(GND), .ECC_BYPASS(GND), .SB_CORRECT(miv_rv32_ram_singleport_lp_R12C0_SB_CORRECT), .DB_DETECT(miv_rv32_ram_singleport_lp_R12C0_DB_DETECT), .BUSY_FB(GND), .ACCESS_BUSY(Z_ACCESS_BUSY_12__0_) ); defparam miv_rv32_ram_singleport_lp_R12C0.RAMINDEX="PF_TPSRAM_MAX_0%9216-9216%32-32%POWER%12%0%TWO-PORT%ECC_EN-0"; // @49:23547 OR4 OR4_1205 ( .Y(OR4_1205_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23545 OR2 OR2_11 ( .Y(OR2_11_Y), .A(GND), .B(GND) ); // @49:23542 OR4 OR4_574 ( .Y(OR4_574_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23537 OR4 OR4_1076 ( .Y(OR4_1076_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23535 OR4 OR4_902 ( .Y(OR4_902_Y), .A(OR4_355_Y), .B(OR4_103_Y), .C(OR4_94_Y), .D(OR4_713_Y) ); // @49:23532 OR4 OR4_945 ( .Y(OR4_945_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23531 OR4 OR4_504 ( .Y(OR4_504_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23528 OR4 OR4_612 ( .Y(OR4_612_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23527 OR4 OR4_142 ( .Y(OR4_142_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23487 OR4 \OR4_R_DATA[17] ( .Y(tcm0_d_resp_rd_data_net[17]), .A(OR4_285_Y), .B(OR4_899_Y), .C(OR4_1235_Y), .D(OR4_53_Y) ); // @49:23482 OR4 OR4_927 ( .Y(OR4_927_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23479 OR4 OR4_840 ( .Y(OR4_840_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23397 OR4 OR4_1037 ( .Y(OR4_1037_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23395 OR4 OR4_1055 ( .Y(OR4_1055_Y), .A(OR4_645_Y), .B(OR4_546_Y), .C(OR4_980_Y), .D(OR4_500_Y) ); // @49:23393 OR4 OR4_618 ( .Y(OR4_618_Y), .A(OR4_675_Y), .B(OR4_1147_Y), .C(OR4_471_Y), .D(OR4_660_Y) ); // @49:23391 OR4 OR4_572 ( .Y(OR4_572_Y), .A(OR4_600_Y), .B(OR4_836_Y), .C(OR4_413_Y), .D(OR4_1092_Y) ); // @49:23388 OR4 OR4_835 ( .Y(OR4_835_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23386 OR4 OR4_1192 ( .Y(OR4_1192_Y), .A(OR4_56_Y), .B(OR4_676_Y), .C(OR4_1052_Y), .D(OR4_1301_Y) ); // @49:23383 OR4 OR4_495 ( .Y(OR4_495_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23380 OR4 OR4_556 ( .Y(OR4_556_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23377 OR4 OR4_502 ( .Y(OR4_502_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23375 OR4 OR4_1028 ( .Y(OR4_1028_Y), .A(OR4_1231_Y), .B(OR4_550_Y), .C(OR4_915_Y), .D(OR4_1185_Y) ); // @49:23336 OR4 OR4_1300 ( .Y(OR4_1300_Y), .A(miv_rv32_ram_singleport_lp_R4C0_A_DOUT[7]), .B(miv_rv32_ram_singleport_lp_R5C0_A_DOUT[7]), .C(miv_rv32_ram_singleport_lp_R6C0_A_DOUT[7]), .D(miv_rv32_ram_singleport_lp_R7C0_A_DOUT[7]) ); // @49:23333 OR4 OR4_460 ( .Y(OR4_460_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23331 OR4 OR4_1180 ( .Y(OR4_1180_Y), .A(OR4_74_Y), .B(OR2_21_Y), .C(GND), .D(GND) ); // @49:23329 OR4 OR4_271 ( .Y(OR4_271_Y), .A(OR4_764_Y), .B(OR4_1015_Y), .C(OR4_576_Y), .D(OR4_1262_Y) ); // @49:23328 OR4 OR4_918 ( .Y(OR4_918_Y), .A(miv_rv32_ram_singleport_lp_R0C0_A_DOUT[6]), .B(miv_rv32_ram_singleport_lp_R1C0_A_DOUT[6]), .C(miv_rv32_ram_singleport_lp_R2C0_A_DOUT[6]), .D(miv_rv32_ram_singleport_lp_R3C0_A_DOUT[6]) ); // @49:23325 OR4 OR4_6 ( .Y(OR4_6_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23323 OR2 OR2_13 ( .Y(OR2_13_Y), .A(GND), .B(GND) ); // @49:23320 OR4 OR4_751 ( .Y(OR4_751_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23318 OR4 OR4_856 ( .Y(OR4_856_Y), .A(OR4_1123_Y), .B(OR4_923_Y), .C(OR4_57_Y), .D(OR4_425_Y) ); // @49:23315 OR4 OR4_1244 ( .Y(OR4_1244_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23313 OR4 OR4_361 ( .Y(OR4_361_Y), .A(OR4_552_Y), .B(OR4_409_Y), .C(OR4_388_Y), .D(OR4_119_Y) ); // @49:23310 OR4 OR4_201 ( .Y(OR4_201_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23308 OR4 OR4_821 ( .Y(OR4_821_Y), .A(OR4_1057_Y), .B(OR4_1302_Y), .C(OR4_846_Y), .D(OR4_237_Y) ); // @49:23305 OR4 OR4_1074 ( .Y(OR4_1074_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23303 OR4 OR4_213 ( .Y(OR4_213_Y), .A(OR4_593_Y), .B(OR4_1033_Y), .C(OR4_925_Y), .D(OR4_401_Y) ); // @49:23302 OR4 OR4_632 ( .Y(OR4_632_Y), .A(miv_rv32_ram_singleport_lp_R8C0_A_DOUT[13]), .B(miv_rv32_ram_singleport_lp_R9C0_A_DOUT[13]), .C(miv_rv32_ram_singleport_lp_R10C0_A_DOUT[13]), .D(miv_rv32_ram_singleport_lp_R11C0_A_DOUT[13]) ); // @49:23300 OR4 OR4_953 ( .Y(OR4_953_Y), .A(OR4_354_Y), .B(OR4_864_Y), .C(OR4_1296_Y), .D(OR4_349_Y) ); // @49:23297 OR4 OR4_143 ( .Y(OR4_143_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23294 OR4 OR4_1151 ( .Y(OR4_1151_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23291 OR4 OR4_22 ( .Y(OR4_22_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23289 OR4 OR4_878 ( .Y(OR4_878_Y), .A(OR4_98_Y), .B(OR4_353_Y), .C(OR4_541_Y), .D(OR4_395_Y) ); // @49:23286 OR4 OR4_997 ( .Y(OR4_997_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23284 OR4 OR4_638 ( .Y(OR4_638_Y), .A(OR4_869_Y), .B(OR4_1078_Y), .C(OR4_1226_Y), .D(OR4_1221_Y) ); // @49:23283 OR4 OR4_724 ( .Y(OR4_724_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23280 OR4 OR4_962 ( .Y(OR4_962_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23277 OR4 OR4_940 ( .Y(OR4_940_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23274 OR4 OR4_949 ( .Y(OR4_949_Y), .A(miv_rv32_ram_singleport_lp_R16C0_A_DOUT[15]), .B(miv_rv32_ram_singleport_lp_R17C0_A_DOUT[15]), .C(GND), .D(GND) ); // @49:23271 OR4 OR4_1100 ( .Y(OR4_1100_Y), .A(miv_rv32_ram_singleport_lp_R12C0_A_DOUT[13]), .B(miv_rv32_ram_singleport_lp_R13C0_A_DOUT[13]), .C(miv_rv32_ram_singleport_lp_R14C0_A_DOUT[13]), .D(miv_rv32_ram_singleport_lp_R15C0_A_DOUT[13]) ); // @49:23269 OR4 OR4_1242 ( .Y(OR4_1242_Y), .A(OR4_211_Y), .B(OR4_251_Y), .C(OR4_664_Y), .D(OR4_1026_Y) ); // @49:23267 OR4 OR4_684 ( .Y(OR4_684_Y), .A(OR4_77_Y), .B(OR4_1244_Y), .C(OR4_37_Y), .D(OR4_1260_Y) ); // @49:23264 OR4 OR4_727 ( .Y(OR4_727_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23262 OR2 OR2_21 ( .Y(OR2_21_Y), .A(GND), .B(GND) ); // @49:23259 OR4 OR4_154 ( .Y(OR4_154_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23220 OR4 OR4_564 ( .Y(OR4_564_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23218 OR4 OR4_1162 ( .Y(OR4_1162_Y), .A(OR4_1150_Y), .B(OR4_606_Y), .C(OR4_1030_Y), .D(OR4_92_Y) ); // @49:23217 OR4 OR4_808 ( .Y(OR4_808_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23215 OR4 \OR4_R_DATA[8] ( .Y(tcm0_d_resp_rd_data_net[8]), .A(OR4_651_Y), .B(OR4_798_Y), .C(OR4_492_Y), .D(OR4_976_Y) ); // @49:23214 OR4 OR4_1219 ( .Y(OR4_1219_Y), .A(miv_rv32_ram_singleport_lp_R8C0_B_DOUT[6]), .B(miv_rv32_ram_singleport_lp_R9C0_B_DOUT[6]), .C(miv_rv32_ram_singleport_lp_R10C0_B_DOUT[6]), .D(miv_rv32_ram_singleport_lp_R11C0_B_DOUT[6]) ); // @49:23213 OR4 OR4_1038 ( .Y(OR4_1038_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23210 OR4 OR4_78 ( .Y(OR4_78_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23209 OR4 OR4_286 ( .Y(OR4_286_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23208 OR4 OR4_1023 ( .Y(OR4_1023_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23206 OR4 OR4_1240 ( .Y(OR4_1240_Y), .A(OR4_1028_Y), .B(OR4_1311_Y), .C(OR4_139_Y), .D(OR4_1101_Y) ); // @49:23201 OR4 OR4_938 ( .Y(OR4_938_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23199 OR4 OR4_643 ( .Y(OR4_643_Y), .A(OR4_182_Y), .B(OR4_26_Y), .C(OR4_1049_Y), .D(OR4_904_Y) ); // @49:23198 OR4 OR4_689 ( .Y(OR4_689_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23195 OR4 OR4_562 ( .Y(OR4_562_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23192 OR4 OR4_829 ( .Y(OR4_829_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23190 OR4 OR4_1085 ( .Y(OR4_1085_Y), .A(OR4_751_Y), .B(OR2_0_Y), .C(GND), .D(GND) ); // @49:23189 OR4 OR4_233 ( .Y(OR4_233_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23186 OR4 OR4_545 ( .Y(OR4_545_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23184 OR4 OR4_1021 ( .Y(OR4_1021_Y), .A(OR4_741_Y), .B(OR4_539_Y), .C(OR4_316_Y), .D(OR4_280_Y) ); // @49:23181 OR4 OR4_587 ( .Y(OR4_587_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23180 OR4 OR4_891 ( .Y(OR4_891_Y), .A(miv_rv32_ram_singleport_lp_R4C0_A_DOUT[4]), .B(miv_rv32_ram_singleport_lp_R5C0_A_DOUT[4]), .C(miv_rv32_ram_singleport_lp_R6C0_A_DOUT[4]), .D(miv_rv32_ram_singleport_lp_R7C0_A_DOUT[4]) ); // @49:23177 OR4 OR4_280 ( .Y(OR4_280_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23174 OR4 OR4_1125 ( .Y(OR4_1125_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23172 OR4 \OR4_R_DATA[16] ( .Y(tcm0_d_resp_rd_data_net[16]), .A(OR4_614_Y), .B(OR4_9_Y), .C(OR4_253_Y), .D(OR4_313_Y) ); // @49:23171 OR4 OR4_29 ( .Y(OR4_29_Y), .A(miv_rv32_ram_singleport_lp_R0C0_A_DOUT[12]), .B(miv_rv32_ram_singleport_lp_R1C0_A_DOUT[12]), .C(miv_rv32_ram_singleport_lp_R2C0_A_DOUT[12]), .D(miv_rv32_ram_singleport_lp_R3C0_A_DOUT[12]) ); // @49:23169 OR4 OR4_261 ( .Y(OR4_261_Y), .A(OR4_777_Y), .B(OR4_650_Y), .C(OR4_745_Y), .D(OR4_621_Y) ); // @49:23167 OR2 OR2_23 ( .Y(OR2_23_Y), .A(GND), .B(GND) ); // @49:23088 OR4 OR4_1096 ( .Y(OR4_1096_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23085 OR4 OR4_794 ( .Y(OR4_794_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23082 OR4 OR4_797 ( .Y(OR4_797_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23079 OR4 OR4_356 ( .Y(OR4_356_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23078 OR4 OR4_229 ( .Y(OR4_229_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23076 OR4 \OR4_R_DATA[10] ( .Y(tcm0_d_resp_rd_data_net[10]), .A(OR4_1070_Y), .B(OR4_62_Y), .C(OR4_647_Y), .D(OR4_148_Y) ); // @49:23073 OR4 OR4_1005 ( .Y(OR4_1005_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23069 OR4 OR4_1033 ( .Y(OR4_1033_Y), .A(OR4_28_Y), .B(OR4_711_Y), .C(OR4_46_Y), .D(OR4_256_Y) ); // @49:23066 OR4 OR4_454 ( .Y(OR4_454_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23064 OR4 OR4_868 ( .Y(OR4_868_Y), .A(OR4_260_Y), .B(OR4_245_Y), .C(OR4_665_Y), .D(OR4_184_Y) ); // @49:23061 OR4 OR4_1275 ( .Y(OR4_1275_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23058 OR4 OR4_1147 ( .Y(OR4_1147_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23056 OR4 OR4_1050 ( .Y(OR4_1050_Y), .A(OR4_1287_Y), .B(OR4_444_Y), .C(OR4_1065_Y), .D(OR4_1279_Y) ); // @49:23053 OR4 OR4_1181 ( .Y(OR4_1181_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23052 OR4 OR4_34 ( .Y(OR4_34_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23049 OR4 OR4_513 ( .Y(OR4_513_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:23010 OR4 OR4_18 ( .Y(OR4_18_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22969 OR4 \OR4_R_DATA[9] ( .Y(tcm0_d_resp_rd_data_net[9]), .A(OR4_172_Y), .B(OR4_428_Y), .C(OR4_746_Y), .D(OR4_1004_Y) ); // @49:22967 OR4 OR4_925 ( .Y(OR4_925_Y), .A(OR4_411_Y), .B(OR4_861_Y), .C(OR4_1295_Y), .D(OR4_348_Y) ); // @49:22965 OR4 OR4_382 ( .Y(OR4_382_Y), .A(OR4_610_Y), .B(OR4_485_Y), .C(OR4_573_Y), .D(OR4_1134_Y) ); // @49:22963 OR4 OR4_814 ( .Y(OR4_814_Y), .A(OR4_701_Y), .B(OR2_8_Y), .C(GND), .D(GND) ); // @49:22961 OR4 OR4_843 ( .Y(OR4_843_Y), .A(OR4_594_Y), .B(OR4_447_Y), .C(OR4_145_Y), .D(OR4_11_Y) ); // @49:22958 OR4 OR4_122 ( .Y(OR4_122_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22956 OR4 \OR4_R_DATA[11] ( .Y(tcm0_d_resp_rd_data_net[11]), .A(OR4_2_Y), .B(OR4_1248_Y), .C(OR4_1274_Y), .D(OR4_863_Y) ); // @49:22954 OR4 OR4_899 ( .Y(OR4_899_Y), .A(OR4_718_Y), .B(OR4_740_Y), .C(OR4_722_Y), .D(OR4_49_Y) ); // @49:22951 OR4 OR4_1031 ( .Y(OR4_1031_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22914 RAM1K20 miv_rv32_ram_singleport_lp_R10C0 ( .A_ADDR({req_addr_mux_3[10:2], GND, GND, GND, GND, GND}), .A_BLK_EN({Z_BLKY2_2_, req_addr_mux_3[12], Z_BLKY0_0_}), .A_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .A_DIN({GND, GND, un10_req_wr_data_mux[31:24], GND, GND, un10_req_wr_data_mux[23:16]}), .A_DOUT(miv_rv32_ram_singleport_lp_R10C0_A_DOUT[19:0]), .A_WEN({VCC, VCC}), .A_REN(VCC), .A_WIDTH({VCC, GND, VCC}), .A_WMODE({GND, GND}), .A_BYPASS(VCC), .A_DOUT_EN(VCC), .A_DOUT_SRST_N(VCC), .A_DOUT_ARST_N(VCC), .B_ADDR({req_addr_mux_3[10:2], GND, GND, GND, GND, GND}), .B_BLK_EN({Z_BLKX2_2_, req_addr_mux_3[12], Z_BLKX0_0_}), .B_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .B_DIN({GND, GND, un10_req_wr_data_mux[15:8], GND, GND, un10_req_wr_data_mux[7:0]}), .B_DOUT(miv_rv32_ram_singleport_lp_R10C0_B_DOUT[19:0]), .B_WEN({VCC, VCC}), .B_REN(VCC), .B_WIDTH({VCC, GND, VCC}), .B_WMODE({GND, GND}), .B_BYPASS(VCC), .B_DOUT_EN(VCC), .B_DOUT_SRST_N(VCC), .B_DOUT_ARST_N(VCC), .ECC_EN(GND), .ECC_BYPASS(GND), .SB_CORRECT(miv_rv32_ram_singleport_lp_R10C0_SB_CORRECT), .DB_DETECT(miv_rv32_ram_singleport_lp_R10C0_DB_DETECT), .BUSY_FB(GND), .ACCESS_BUSY(Z_ACCESS_BUSY_10__0_) ); defparam miv_rv32_ram_singleport_lp_R10C0.RAMINDEX="PF_TPSRAM_MAX_0%9216-9216%32-32%POWER%10%0%TWO-PORT%ECC_EN-0"; // @49:22910 OR4 OR4_820 ( .Y(OR4_820_Y), .A(miv_rv32_ram_singleport_lp_R16C0_A_DOUT[12]), .B(miv_rv32_ram_singleport_lp_R17C0_A_DOUT[12]), .C(GND), .D(GND) ); // @49:22908 OR4 OR4_1228 ( .Y(OR4_1228_Y), .A(OR4_898_Y), .B(OR4_225_Y), .C(OR4_596_Y), .D(OR4_834_Y) ); // @49:22906 OR4 OR4_719 ( .Y(OR4_719_Y), .A(OR4_611_Y), .B(OR2_2_Y), .C(GND), .D(GND) ); // @49:22904 OR4 OR4_1135 ( .Y(OR4_1135_Y), .A(OR4_4_Y), .B(OR4_478_Y), .C(OR4_1103_Y), .D(OR4_1308_Y) ); // @49:22901 OR4 OR4_1066 ( .Y(OR4_1066_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22899 OR4 OR4_340 ( .Y(OR4_340_Y), .A(OR4_1268_Y), .B(OR4_770_Y), .C(OR4_977_Y), .D(OR4_125_Y) ); // @49:22897 OR4 \OR4_R_DATA[5] ( .Y(tcm0_d_resp_rd_data_net[5]), .A(OR4_213_Y), .B(OR4_1242_Y), .C(OR4_818_Y), .D(OR4_1084_Y) ); // @49:22894 OR4 OR4_486 ( .Y(OR4_486_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22891 OR4 OR4_455 ( .Y(OR4_455_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22889 OR4 OR4_674 ( .Y(OR4_674_Y), .A(OR4_536_Y), .B(OR4_342_Y), .C(OR4_760_Y), .D(OR4_1137_Y) ); // @49:22887 OR4 OR4_1101 ( .Y(OR4_1101_Y), .A(OR4_263_Y), .B(OR4_507_Y), .C(OR4_695_Y), .D(OR4_543_Y) ); // @49:22884 OR4 OR4_1094 ( .Y(OR4_1094_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22879 OR4 OR4_299 ( .Y(OR4_299_Y), .A(miv_rv32_ram_singleport_lp_R16C0_A_DOUT[10]), .B(miv_rv32_ram_singleport_lp_R17C0_A_DOUT[10]), .C(GND), .D(GND) ); // @49:22876 OR4 OR4_1124 ( .Y(OR4_1124_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22873 OR4 OR4_604 ( .Y(OR4_604_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22870 OR4 OR4_77 ( .Y(OR4_77_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22867 OR4 OR4_242 ( .Y(OR4_242_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22864 OR4 OR4_276 ( .Y(OR4_276_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22862 OR4 OR4_1112 ( .Y(OR4_1112_Y), .A(OR4_179_Y), .B(OR4_22_Y), .C(OR4_1043_Y), .D(OR4_901_Y) ); // @49:22861 OR4 OR4_58 ( .Y(OR4_58_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22858 OR4 OR4_588 ( .Y(OR4_588_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22819 OR4 OR4_70 ( .Y(OR4_70_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22816 OR4 OR4_533 ( .Y(OR4_533_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22776 OR4 OR4_206 ( .Y(OR4_206_Y), .A(OR4_1241_Y), .B(OR4_1032_Y), .C(OR4_797_Y), .D(OR4_896_Y) ); // @49:22771 OR4 OR4_1257 ( .Y(OR4_1257_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22770 OR4 OR4_679 ( .Y(OR4_679_Y), .A(miv_rv32_ram_singleport_lp_R0C0_A_DOUT[16]), .B(miv_rv32_ram_singleport_lp_R1C0_A_DOUT[16]), .C(miv_rv32_ram_singleport_lp_R2C0_A_DOUT[16]), .D(miv_rv32_ram_singleport_lp_R3C0_A_DOUT[16]) ); // @49:22729 OR4 OR4_834 ( .Y(OR4_834_Y), .A(miv_rv32_ram_singleport_lp_R12C0_B_DOUT[15]), .B(miv_rv32_ram_singleport_lp_R13C0_B_DOUT[15]), .C(miv_rv32_ram_singleport_lp_R14C0_B_DOUT[15]), .D(miv_rv32_ram_singleport_lp_R15C0_B_DOUT[15]) ); // @49:22727 OR4 OR4_123 ( .Y(OR4_123_Y), .A(OR4_694_Y), .B(OR4_885_Y), .C(OR4_865_Y), .D(OR4_181_Y) ); // @49:22724 OR4 OR4_995 ( .Y(OR4_995_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22683 OR4 OR4_609 ( .Y(OR4_609_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22680 OR4 OR4_1238 ( .Y(OR4_1238_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22678 OR4 OR4_319 ( .Y(OR4_319_Y), .A(OR4_379_Y), .B(OR4_254_Y), .C(OR4_352_Y), .D(OR4_773_Y) ); // @49:22676 OR4 OR4_192 ( .Y(OR4_192_Y), .A(OR4_1288_Y), .B(OR4_654_Y), .C(OR4_1305_Y), .D(OR4_202_Y) ); // @49:22673 OR4 OR4_541 ( .Y(OR4_541_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22668 OR4 OR4_739 ( .Y(OR4_739_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22667 OR4 OR4_957 ( .Y(OR4_957_Y), .A(miv_rv32_ram_singleport_lp_R8C0_B_DOUT[3]), .B(miv_rv32_ram_singleport_lp_R9C0_B_DOUT[3]), .C(miv_rv32_ram_singleport_lp_R10C0_B_DOUT[3]), .D(miv_rv32_ram_singleport_lp_R11C0_B_DOUT[3]) ); // @49:22664 OR4 OR4_577 ( .Y(OR4_577_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22662 OR4 OR4_890 ( .Y(OR4_890_Y), .A(OR4_879_Y), .B(OR2_10_Y), .C(GND), .D(GND) ); // @49:22659 OR4 OR4_920 ( .Y(OR4_920_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22656 OR4 OR4_929 ( .Y(OR4_929_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22653 OR4 OR4_1170 ( .Y(OR4_1170_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22651 OR4 OR4_270 ( .Y(OR4_270_Y), .A(OR4_709_Y), .B(OR4_567_Y), .C(OR4_96_Y), .D(OR4_506_Y) ); // @49:22648 OR4 OR4_1049 ( .Y(OR4_1049_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22645 OR4 OR4_507 ( .Y(OR4_507_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22642 OR4 OR4_1064 ( .Y(OR4_1064_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22640 OR4 OR4_200 ( .Y(OR4_200_Y), .A(OR4_1269_Y), .B(OR4_323_Y), .C(OR4_1097_Y), .D(OR4_32_Y) ); // @49:22637 OR4 OR4_1134 ( .Y(OR4_1134_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22597 OR4 OR4_1080 ( .Y(OR4_1080_Y), .A(OR4_1029_Y), .B(OR4_1019_Y), .C(OR4_937_Y), .D(OR4_1266_Y) ); // @49:22594 OR4 OR4_586 ( .Y(OR4_586_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22553 OR4 OR4_623 ( .Y(OR4_623_Y), .A(OR4_68_Y), .B(OR4_973_Y), .C(OR4_1011_Y), .D(OR4_193_Y) ); // @49:22550 OR4 OR4_664 ( .Y(OR4_664_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22547 OR4 OR4_781 ( .Y(OR4_781_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22508 OR4 OR4_886 ( .Y(OR4_886_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22507 OR4 OR4_17 ( .Y(OR4_17_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22504 OR4 OR4_525 ( .Y(OR4_525_Y), .A(miv_rv32_ram_singleport_lp_R16C0_B_DOUT[13]), .B(miv_rv32_ram_singleport_lp_R17C0_B_DOUT[13]), .C(GND), .D(GND) ); // @49:22501 OR4 OR4_851 ( .Y(OR4_851_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22498 OR4 OR4_1246 ( .Y(OR4_1246_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22495 OR4 OR4_372 ( .Y(OR4_372_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22458 RAM1K20 miv_rv32_ram_singleport_lp_R14C0 ( .A_ADDR({req_addr_mux_3[10:2], GND, GND, GND, GND, GND}), .A_BLK_EN({Z_BLKY2_3_, req_addr_mux_3[12], Z_BLKY0_0_}), .A_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .A_DIN({GND, GND, un10_req_wr_data_mux[31:24], GND, GND, un10_req_wr_data_mux[23:16]}), .A_DOUT(miv_rv32_ram_singleport_lp_R14C0_A_DOUT[19:0]), .A_WEN({VCC, VCC}), .A_REN(VCC), .A_WIDTH({VCC, GND, VCC}), .A_WMODE({GND, GND}), .A_BYPASS(VCC), .A_DOUT_EN(VCC), .A_DOUT_SRST_N(VCC), .A_DOUT_ARST_N(VCC), .B_ADDR({req_addr_mux_3[10:2], GND, GND, GND, GND, GND}), .B_BLK_EN({Z_BLKX2_3_, req_addr_mux_3[12], Z_BLKX0_0_}), .B_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .B_DIN({GND, GND, un10_req_wr_data_mux[15:8], GND, GND, un10_req_wr_data_mux[7:0]}), .B_DOUT(miv_rv32_ram_singleport_lp_R14C0_B_DOUT[19:0]), .B_WEN({VCC, VCC}), .B_REN(VCC), .B_WIDTH({VCC, GND, VCC}), .B_WMODE({GND, GND}), .B_BYPASS(VCC), .B_DOUT_EN(VCC), .B_DOUT_SRST_N(VCC), .B_DOUT_ARST_N(VCC), .ECC_EN(GND), .ECC_BYPASS(GND), .SB_CORRECT(miv_rv32_ram_singleport_lp_R14C0_SB_CORRECT), .DB_DETECT(miv_rv32_ram_singleport_lp_R14C0_DB_DETECT), .BUSY_FB(GND), .ACCESS_BUSY(Z_ACCESS_BUSY_14__0_) ); defparam miv_rv32_ram_singleport_lp_R14C0.RAMINDEX="PF_TPSRAM_MAX_0%9216-9216%32-32%POWER%14%0%TWO-PORT%ECC_EN-0"; // @49:22454 OR4 OR4_193 ( .Y(OR4_193_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22452 OR4 OR4_339 ( .Y(OR4_339_Y), .A(OR4_133_Y), .B(OR4_602_Y), .C(OR4_1227_Y), .D(OR4_121_Y) ); // @49:22449 OR4 OR4_983 ( .Y(OR4_983_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22448 OR4 OR4_410 ( .Y(OR4_410_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22447 OR4 OR4_76 ( .Y(OR4_76_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22445 OR4 OR4_25 ( .Y(OR4_25_Y), .A(OR4_1161_Y), .B(OR4_93_Y), .C(OR4_950_Y), .D(OR4_335_Y) ); // @49:22444 OR4 OR4_10 ( .Y(OR4_10_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22443 OR4 OR4_1000 ( .Y(OR4_1000_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22442 OR4 OR4_1295 ( .Y(OR4_1295_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22439 OR4 OR4_266 ( .Y(OR4_266_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22436 OR4 OR4_302 ( .Y(OR4_302_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22435 OR4 OR4_754 ( .Y(OR4_754_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22398 RAM1K20 miv_rv32_ram_singleport_lp_R1C0 ( .A_ADDR({req_addr_mux_3[10:2], GND, GND, GND, GND, GND}), .A_BLK_EN({Z_BLKY2_0_, Z_BLKY1_0_, req_addr_mux_3[11]}), .A_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .A_DIN({GND, GND, un10_req_wr_data_mux[31:24], GND, GND, un10_req_wr_data_mux[23:16]}), .A_DOUT(miv_rv32_ram_singleport_lp_R1C0_A_DOUT[19:0]), .A_WEN({VCC, VCC}), .A_REN(VCC), .A_WIDTH({VCC, GND, VCC}), .A_WMODE({GND, GND}), .A_BYPASS(VCC), .A_DOUT_EN(VCC), .A_DOUT_SRST_N(VCC), .A_DOUT_ARST_N(VCC), .B_ADDR({req_addr_mux_3[10:2], GND, GND, GND, GND, GND}), .B_BLK_EN({Z_BLKX2_0_, Z_BLKX1_0_, req_addr_mux_3[11]}), .B_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .B_DIN({GND, GND, un10_req_wr_data_mux[15:8], GND, GND, un10_req_wr_data_mux[7:0]}), .B_DOUT(miv_rv32_ram_singleport_lp_R1C0_B_DOUT[19:0]), .B_WEN({VCC, VCC}), .B_REN(VCC), .B_WIDTH({VCC, GND, VCC}), .B_WMODE({GND, GND}), .B_BYPASS(VCC), .B_DOUT_EN(VCC), .B_DOUT_SRST_N(VCC), .B_DOUT_ARST_N(VCC), .ECC_EN(GND), .ECC_BYPASS(GND), .SB_CORRECT(miv_rv32_ram_singleport_lp_R1C0_SB_CORRECT), .DB_DETECT(miv_rv32_ram_singleport_lp_R1C0_DB_DETECT), .BUSY_FB(GND), .ACCESS_BUSY(Z_ACCESS_BUSY_1__0_) ); defparam miv_rv32_ram_singleport_lp_R1C0.RAMINDEX="PF_TPSRAM_MAX_0%9216-9216%32-32%POWER%1%0%TWO-PORT%ECC_EN-0"; // @49:22394 OR4 OR4_1309 ( .Y(OR4_1309_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22392 OR4 OR4_757 ( .Y(OR4_757_Y), .A(OR4_1255_Y), .B(OR4_192_Y), .C(OR4_953_Y), .D(OR4_799_Y) ); // @49:22390 OR4 OR4_1311 ( .Y(OR4_1311_Y), .A(OR4_65_Y), .B(OR4_1215_Y), .C(OR4_911_Y), .D(OR4_779_Y) ); // @49:22388 OR4 OR4_990 ( .Y(OR4_990_Y), .A(OR4_806_Y), .B(OR4_1022_Y), .C(OR4_1189_Y), .D(OR4_680_Y) ); // @49:22386 OR4 OR4_999 ( .Y(OR4_999_Y), .A(OR4_153_Y), .B(OR4_399_Y), .C(OR4_161_Y), .D(OR4_827_Y) ); // @49:22385 OR4 OR4_248 ( .Y(OR4_248_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22382 OR4 OR4_476 ( .Y(OR4_476_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22379 OR4 OR4_311 ( .Y(OR4_311_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22376 OR4 OR4_184 ( .Y(OR4_184_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22373 OR4 OR4_641 ( .Y(OR4_641_Y), .A(miv_rv32_ram_singleport_lp_R12C0_A_DOUT[11]), .B(miv_rv32_ram_singleport_lp_R13C0_A_DOUT[11]), .C(miv_rv32_ram_singleport_lp_R14C0_A_DOUT[11]), .D(miv_rv32_ram_singleport_lp_R15C0_A_DOUT[11]) ); // @49:22372 OR4 OR4_669 ( .Y(OR4_669_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22369 OR4 OR4_443 ( .Y(OR4_443_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22367 OR4 OR4_1075 ( .Y(OR4_1075_Y), .A(OR4_918_Y), .B(OR4_451_Y), .C(OR4_634_Y), .D(OR4_1105_Y) ); // @49:22328 OR4 OR4_1016 ( .Y(OR4_1016_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22325 OR4 OR4_406 ( .Y(OR4_406_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22322 OR4 OR4_1287 ( .Y(OR4_1287_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22321 OR4 OR4_1057 ( .Y(OR4_1057_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22318 OR4 OR4_567 ( .Y(OR4_567_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22315 OR4 OR4_912 ( .Y(OR4_912_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22312 OR4 OR4_260 ( .Y(OR4_260_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22311 OR4 OR4_32 ( .Y(OR4_32_Y), .A(miv_rv32_ram_singleport_lp_R12C0_B_DOUT[10]), .B(miv_rv32_ram_singleport_lp_R13C0_B_DOUT[10]), .C(miv_rv32_ram_singleport_lp_R14C0_B_DOUT[10]), .D(miv_rv32_ram_singleport_lp_R15C0_B_DOUT[10]) ); // @49:22310 OR4 OR4_57 ( .Y(OR4_57_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22307 OR4 OR4_693 ( .Y(OR4_693_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22306 OR4 OR4_578 ( .Y(OR4_578_Y), .A(miv_rv32_ram_singleport_lp_R0C0_A_DOUT[3]), .B(miv_rv32_ram_singleport_lp_R1C0_A_DOUT[3]), .C(miv_rv32_ram_singleport_lp_R2C0_A_DOUT[3]), .D(miv_rv32_ram_singleport_lp_R3C0_A_DOUT[3]) ); // @49:22303 OR4 OR4_514 ( .Y(OR4_514_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22300 OR4 OR4_823 ( .Y(OR4_823_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22299 OR4 OR4_859 ( .Y(OR4_859_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22298 OR4 OR4_1304 ( .Y(OR4_1304_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22297 OR4 OR4_842 ( .Y(OR4_842_Y), .A(miv_rv32_ram_singleport_lp_R4C0_A_DOUT[12]), .B(miv_rv32_ram_singleport_lp_R5C0_A_DOUT[12]), .C(miv_rv32_ram_singleport_lp_R6C0_A_DOUT[12]), .D(miv_rv32_ram_singleport_lp_R7C0_A_DOUT[12]) ); // @49:22257 OR4 OR4_50 ( .Y(OR4_50_Y), .A(OR4_589_Y), .B(OR4_824_Y), .C(OR4_403_Y), .D(OR4_1083_Y) ); // @49:22254 OR4 OR4_508 ( .Y(OR4_508_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22251 OR4 OR4_245 ( .Y(OR4_245_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22250 OR4 OR4_595 ( .Y(OR4_595_Y), .A(miv_rv32_ram_singleport_lp_R8C0_B_DOUT[17]), .B(miv_rv32_ram_singleport_lp_R9C0_B_DOUT[17]), .C(miv_rv32_ram_singleport_lp_R10C0_B_DOUT[17]), .D(miv_rv32_ram_singleport_lp_R11C0_B_DOUT[17]) ); // @49:22248 OR4 \OR4_R_DATA[14] ( .Y(tcm0_d_resp_rd_data_net[14]), .A(OR4_1240_Y), .B(OR4_776_Y), .C(OR4_107_Y), .D(OR4_684_Y) ); // @49:22245 OR4 OR4_1265 ( .Y(OR4_1265_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22244 OR4 OR4_430 ( .Y(OR4_430_Y), .A(miv_rv32_ram_singleport_lp_R12C0_B_DOUT[7]), .B(miv_rv32_ram_singleport_lp_R13C0_B_DOUT[7]), .C(miv_rv32_ram_singleport_lp_R14C0_B_DOUT[7]), .D(miv_rv32_ram_singleport_lp_R15C0_B_DOUT[7]) ); // @49:22241 OR4 OR4_320 ( .Y(OR4_320_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22240 OR4 OR4_1207 ( .Y(OR4_1207_Y), .A(miv_rv32_ram_singleport_lp_R4C0_A_DOUT[3]), .B(miv_rv32_ram_singleport_lp_R5C0_A_DOUT[3]), .C(miv_rv32_ram_singleport_lp_R6C0_A_DOUT[3]), .D(miv_rv32_ram_singleport_lp_R7C0_A_DOUT[3]) ); // @49:22239 OR4 OR4_512 ( .Y(OR4_512_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22236 OR4 OR4_1171 ( .Y(OR4_1171_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22233 OR4 OR4_331 ( .Y(OR4_331_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22232 OR4 OR4_4 ( .Y(OR4_4_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22230 OR4 OR4_259 ( .Y(OR4_259_Y), .A(OR4_100_Y), .B(OR4_1024_Y), .C(OR4_149_Y), .D(OR4_516_Y) ); // @49:22189 OR4 OR4_447 ( .Y(OR4_447_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22186 OR4 OR4_386 ( .Y(OR4_386_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22184 OR4 OR4_16 ( .Y(OR4_16_Y), .A(OR4_5_Y), .B(OR4_689_Y), .C(OR4_17_Y), .D(OR4_230_Y) ); // @49:22144 OR4 OR4_1143 ( .Y(OR4_1143_Y), .A(OR4_258_Y), .B(OR4_109_Y), .C(OR4_222_Y), .D(OR4_1173_Y) ); // @49:22141 OR4 OR4_222 ( .Y(OR4_222_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22139 OR4 OR4_362 ( .Y(OR4_362_Y), .A(OR4_1196_Y), .B(OR4_116_Y), .C(OR4_992_Y), .D(OR4_374_Y) ); // @49:22136 OR4 OR4_145 ( .Y(OR4_145_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22134 OR4 OR4_1224 ( .Y(OR4_1224_Y), .A(OR4_769_Y), .B(OR4_1090_Y), .C(OR4_212_Y), .D(OR4_568_Y) ); // @49:22133 OR4 OR4_576 ( .Y(OR4_576_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22131 OR4 OR4_1190 ( .Y(OR4_1190_Y), .A(OR4_659_Y), .B(OR4_531_Y), .C(OR4_48_Y), .D(OR4_470_Y) ); // @49:22090 OR4 OR4_1014 ( .Y(OR4_1014_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22088 OR2 OR2_9 ( .Y(OR2_9_Y), .A(GND), .B(GND) ); // @49:22087 OR4 OR4_484 ( .Y(OR4_484_Y), .A(miv_rv32_ram_singleport_lp_R0C0_A_DOUT[7]), .B(miv_rv32_ram_singleport_lp_R1C0_A_DOUT[7]), .C(miv_rv32_ram_singleport_lp_R2C0_A_DOUT[7]), .D(miv_rv32_ram_singleport_lp_R3C0_A_DOUT[7]) ); // @49:22086 OR4 OR4_932 ( .Y(OR4_932_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22084 OR4 OR4_211 ( .Y(OR4_211_Y), .A(OR4_932_Y), .B(OR4_1156_Y), .C(OR4_1303_Y), .D(OR4_1119_Y) ); // @49:22081 OR4 OR4_506 ( .Y(OR4_506_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22079 OR4 OR4_534 ( .Y(OR4_534_Y), .A(OR4_157_Y), .B(OR2_23_Y), .C(GND), .D(GND) ); // @49:22076 OR4 OR4_39 ( .Y(OR4_39_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22074 OR4 OR4_955 ( .Y(OR4_955_Y), .A(OR4_849_Y), .B(OR4_579_Y), .C(OR4_868_Y), .D(OR4_156_Y) ); // @49:22071 OR4 OR4_466 ( .Y(OR4_466_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22070 OR4 OR4_1222 ( .Y(OR4_1222_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22069 OR4 OR4_893 ( .Y(OR4_893_Y), .A(miv_rv32_ram_singleport_lp_R16C0_B_DOUT[10]), .B(miv_rv32_ram_singleport_lp_R17C0_B_DOUT[10]), .C(GND), .D(GND) ); // @49:22068 OR4 OR4_152 ( .Y(OR4_152_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22067 OR4 OR4_771 ( .Y(OR4_771_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22064 OR4 OR4_1058 ( .Y(OR4_1058_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22061 OR4 OR4_876 ( .Y(OR4_876_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22058 OR4 OR4_521 ( .Y(OR4_521_Y), .A(miv_rv32_ram_singleport_lp_R12C0_A_DOUT[3]), .B(miv_rv32_ram_singleport_lp_R13C0_A_DOUT[3]), .C(miv_rv32_ram_singleport_lp_R14C0_A_DOUT[3]), .D(miv_rv32_ram_singleport_lp_R15C0_A_DOUT[3]) ); // @49:22055 OR4 OR4_850 ( .Y(OR4_850_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22053 OR4 \OR4_R_DATA[2] ( .Y(tcm0_d_resp_rd_data_net[2]), .A(OR4_714_Y), .B(OR4_644_Y), .C(OR4_894_Y), .D(OR4_990_Y) ); // @49:22050 OR4 OR4_701 ( .Y(OR4_701_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22047 OR4 OR4_806 ( .Y(OR4_806_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22044 OR4 OR4_973 ( .Y(OR4_973_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22042 OR4 OR4_818 ( .Y(OR4_818_Y), .A(OR4_501_Y), .B(OR4_734_Y), .C(OR4_302_Y), .D(OR4_982_Y) ); // @49:22041 OR4 OR4_390 ( .Y(OR4_390_Y), .A(miv_rv32_ram_singleport_lp_R0C0_B_DOUT[0]), .B(miv_rv32_ram_singleport_lp_R1C0_B_DOUT[0]), .C(miv_rv32_ram_singleport_lp_R2C0_B_DOUT[0]), .D(miv_rv32_ram_singleport_lp_R3C0_B_DOUT[0]) ); // @49:22040 OR4 OR4_56 ( .Y(OR4_56_Y), .A(miv_rv32_ram_singleport_lp_R0C0_B_DOUT[14]), .B(miv_rv32_ram_singleport_lp_R1C0_B_DOUT[14]), .C(miv_rv32_ram_singleport_lp_R2C0_B_DOUT[14]), .D(miv_rv32_ram_singleport_lp_R3C0_B_DOUT[14]) ); // @49:22037 OR4 OR4_532 ( .Y(OR4_532_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22036 OR4 OR4_1220 ( .Y(OR4_1220_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:22035 OR4 OR4_568 ( .Y(OR4_568_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21993 OR4 OR4_903 ( .Y(OR4_903_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21990 OR4 OR4_1087 ( .Y(OR4_1087_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21985 OR4 OR4_485 ( .Y(OR4_485_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21982 OR4 OR4_174 ( .Y(OR4_174_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21980 OR4 OR4_1234 ( .Y(OR4_1234_Y), .A(OR4_143_Y), .B(OR4_609_Y), .C(OR4_1233_Y), .D(OR4_131_Y) ); // @49:21940 OR4 OR4_1160 ( .Y(OR4_1160_Y), .A(OR4_509_Y), .B(OR4_1198_Y), .C(OR4_527_Y), .D(OR4_724_Y) ); // @49:21935 OR4 OR4_292 ( .Y(OR4_292_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21932 OR4 OR4_104 ( .Y(OR4_104_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21931 OR4 OR4_231 ( .Y(OR4_231_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21891 OR4 OR4_9 ( .Y(OR4_9_Y), .A(OR4_319_Y), .B(OR4_1085_Y), .C(OR4_1062_Y), .D(OR4_380_Y) ); // @49:21888 OR4 OR4_1095 ( .Y(OR4_1095_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21887 OR4 OR4_1232 ( .Y(OR4_1232_Y), .A(miv_rv32_ram_singleport_lp_R4C0_B_DOUT[11]), .B(miv_rv32_ram_singleport_lp_R5C0_B_DOUT[11]), .C(miv_rv32_ram_singleport_lp_R6C0_B_DOUT[11]), .D(miv_rv32_ram_singleport_lp_R7C0_B_DOUT[11]) ); // @49:21885 OR4 OR4_153 ( .Y(OR4_153_Y), .A(OR4_708_Y), .B(OR4_1073_Y), .C(OR4_538_Y), .D(OR4_775_Y) ); // @49:21842 OR4 OR4_1007 ( .Y(OR4_1007_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21840 OR4 OR4_1070 ( .Y(OR4_1070_Y), .A(OR4_965_Y), .B(OR4_686_Y), .C(OR4_978_Y), .D(OR4_275_Y) ); // @49:21835 OR4 OR4_1053 ( .Y(OR4_1053_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21834 OR4 OR4_591 ( .Y(OR4_591_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21831 OR4 OR4_566 ( .Y(OR4_566_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21830 OR4 OR4_950 ( .Y(OR4_950_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21829 OR4 OR4_959 ( .Y(OR4_959_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21826 OR4 OR4_987 ( .Y(OR4_987_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21824 OR4 OR4_838 ( .Y(OR4_838_Y), .A(OR4_216_Y), .B(OR4_830_Y), .C(OR4_1212_Y), .D(OR4_151_Y) ); // @49:21821 OR4 OR4_228 ( .Y(OR4_228_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21818 OR4 OR4_944 ( .Y(OR4_944_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21816 OR4 OR4_148 ( .Y(OR4_148_Y), .A(OR4_1208_Y), .B(OR4_1072_Y), .C(OR4_1186_Y), .D(OR4_535_Y) ); // @49:21811 OR4 OR4_847 ( .Y(OR4_847_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21809 OR4 OR4_1230 ( .Y(OR4_1230_Y), .A(OR4_199_Y), .B(OR4_1118_Y), .C(OR4_231_Y), .D(OR4_591_Y) ); // @49:21808 OR4 OR4_84 ( .Y(OR4_84_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21805 OR4 OR4_621 ( .Y(OR4_621_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21802 OR4 OR4_423 ( .Y(OR4_423_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21799 OR4 OR4_1215 ( .Y(OR4_1215_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21798 OR4 OR4_1127 ( .Y(OR4_1127_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21795 OR4 OR4_761 ( .Y(OR4_761_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21793 OR4 OR4_1051 ( .Y(OR4_1051_Y), .A(miv_rv32_ram_singleport_lp_R8C0_A_DOUT[1]), .B(miv_rv32_ram_singleport_lp_R9C0_A_DOUT[1]), .C(miv_rv32_ram_singleport_lp_R10C0_A_DOUT[1]), .D(miv_rv32_ram_singleport_lp_R11C0_A_DOUT[1]) ); // @49:21790 OR4 OR4_866 ( .Y(OR4_866_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21787 OR4 OR4_376 ( .Y(OR4_376_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21784 OR4 OR4_1155 ( .Y(OR4_1155_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21781 OR4 OR4_653 ( .Y(OR4_653_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21780 OR4 OR4_748 ( .Y(OR4_748_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21778 OR4 OR4_963 ( .Y(OR4_963_Y), .A(OR4_989_Y), .B(OR4_599_Y), .C(OR4_580_Y), .D(OR4_329_Y) ); // @49:21777 OR4 OR4_1088 ( .Y(OR4_1088_Y), .A(miv_rv32_ram_singleport_lp_R4C0_A_DOUT[0]), .B(miv_rv32_ram_singleport_lp_R5C0_A_DOUT[0]), .C(miv_rv32_ram_singleport_lp_R6C0_A_DOUT[0]), .D(miv_rv32_ram_singleport_lp_R7C0_A_DOUT[0]) ); // @49:21774 OR4 OR4_306 ( .Y(OR4_306_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21773 OR4 OR4_1191 ( .Y(OR4_1191_Y), .A(miv_rv32_ram_singleport_lp_R12C0_B_DOUT[2]), .B(miv_rv32_ram_singleport_lp_R13C0_B_DOUT[2]), .C(miv_rv32_ram_singleport_lp_R14C0_B_DOUT[2]), .D(miv_rv32_ram_singleport_lp_R15C0_B_DOUT[2]) ); // @49:21770 OR4 OR4_474 ( .Y(OR4_474_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21767 OR4 OR4_1065 ( .Y(OR4_1065_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21764 OR4 OR4_822 ( .Y(OR4_822_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21761 OR4 OR4_140 ( .Y(OR4_140_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21759 OR4 OR4_347 ( .Y(OR4_347_Y), .A(OR4_897_Y), .B(OR4_224_Y), .C(OR4_595_Y), .D(OR4_833_Y) ); // @49:21756 OR4 OR4_555 ( .Y(OR4_555_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21755 OR4 OR4_225 ( .Y(OR4_225_Y), .A(miv_rv32_ram_singleport_lp_R4C0_B_DOUT[15]), .B(miv_rv32_ram_singleport_lp_R5C0_B_DOUT[15]), .C(miv_rv32_ram_singleport_lp_R6C0_B_DOUT[15]), .D(miv_rv32_ram_singleport_lp_R7C0_B_DOUT[15]) ); // @49:21752 OR4 OR4_404 ( .Y(OR4_404_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21751 OR4 OR4_164 ( .Y(OR4_164_Y), .A(miv_rv32_ram_singleport_lp_R4C0_B_DOUT[2]), .B(miv_rv32_ram_singleport_lp_R5C0_B_DOUT[2]), .C(miv_rv32_ram_singleport_lp_R6C0_B_DOUT[2]), .D(miv_rv32_ram_singleport_lp_R7C0_B_DOUT[2]) ); // @49:21709 OR4 OR4_881 ( .Y(OR4_881_Y), .A(miv_rv32_ram_singleport_lp_R16C0_A_DOUT[4]), .B(miv_rv32_ram_singleport_lp_R17C0_A_DOUT[4]), .C(GND), .D(GND) ); // @49:21706 OR4 OR4_640 ( .Y(OR4_640_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21705 OR4 OR4_1277 ( .Y(OR4_1277_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21704 OR4 OR4_28 ( .Y(OR4_28_Y), .A(miv_rv32_ram_singleport_lp_R16C0_B_DOUT[5]), .B(miv_rv32_ram_singleport_lp_R17C0_B_DOUT[5]), .C(GND), .D(GND) ); // @49:21664 OR4 OR4_1310 ( .Y(OR4_1310_Y), .A(OR4_1151_Y), .B(OR2_20_Y), .C(GND), .D(GND) ); // @49:21661 OR4 OR4_784 ( .Y(OR4_784_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21659 OR4 \OR4_R_DATA[27] ( .Y(tcm0_d_resp_rd_data_net[27]), .A(OR4_168_Y), .B(OR4_785_Y), .C(OR4_1135_Y), .D(OR4_1250_Y) ); // @49:21657 OR4 OR4_298 ( .Y(OR4_298_Y), .A(OR4_533_Y), .B(OR4_988_Y), .C(OR4_318_Y), .D(OR4_524_Y) ); // @49:21656 OR4 OR4_787 ( .Y(OR4_787_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21653 OR4 OR4_1008 ( .Y(OR4_1008_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21650 OR4 OR4_427 ( .Y(OR4_427_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21648 OR4 OR4_614 ( .Y(OR4_614_Y), .A(OR4_1239_Y), .B(OR4_843_Y), .C(OR4_910_Y), .D(OR4_1166_Y) ); // @49:21645 OR4 OR4_691 ( .Y(OR4_691_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21644 OR4 OR4_1137 ( .Y(OR4_1137_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21641 OR4 OR4_493 ( .Y(OR4_493_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21638 OR4 OR4_125 ( .Y(OR4_125_Y), .A(miv_rv32_ram_singleport_lp_R12C0_A_DOUT[5]), .B(miv_rv32_ram_singleport_lp_R13C0_A_DOUT[5]), .C(miv_rv32_ram_singleport_lp_R14C0_A_DOUT[5]), .D(miv_rv32_ram_singleport_lp_R15C0_A_DOUT[5]) ); // @49:21636 OR4 OR4_475 ( .Y(OR4_475_Y), .A(OR4_582_Y), .B(OR4_782_Y), .C(OR4_406_Y), .D(OR4_189_Y) ); // @49:21633 OR4 OR4_1258 ( .Y(OR4_1258_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21632 OR4 OR4_71 ( .Y(OR4_71_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21631 OR4 OR4_216 ( .Y(OR4_216_Y), .A(miv_rv32_ram_singleport_lp_R0C0_A_DOUT[2]), .B(miv_rv32_ram_singleport_lp_R1C0_A_DOUT[2]), .C(miv_rv32_ram_singleport_lp_R2C0_A_DOUT[2]), .D(miv_rv32_ram_singleport_lp_R3C0_A_DOUT[2]) ); // @49:21628 OR4 OR4_405 ( .Y(OR4_405_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21627 OR4 OR4_1161 ( .Y(OR4_1161_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21626 OR4 OR4_35 ( .Y(OR4_35_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21583 OR4 OR4_1083 ( .Y(OR4_1083_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21580 OR4 OR4_853 ( .Y(OR4_853_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21575 OR4 OR4_1110 ( .Y(OR4_1110_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21572 OR4 OR4_619 ( .Y(OR4_619_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21569 OR4 OR4_645 ( .Y(OR4_645_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21567 OR4 OR4_1029 ( .Y(OR4_1029_Y), .A(OR4_390_Y), .B(OR4_736_Y), .C(OR4_215_Y), .D(OR4_468_Y) ); // @49:21564 OR4 OR4_892 ( .Y(OR4_892_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21559 OR4 OR4_889 ( .Y(OR4_889_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21557 OR4 OR4_1154 ( .Y(OR4_1154_Y), .A(OR4_295_Y), .B(OR4_88_Y), .C(OR4_1171_Y), .D(OR4_177_Y) ); // @49:21556 OR4 OR4_946 ( .Y(OR4_946_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21553 OR4 OR4_295 ( .Y(OR4_295_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21550 OR4 OR4_366 ( .Y(OR4_366_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21546 OR4 OR4_350 ( .Y(OR4_350_Y), .A(OR4_1154_Y), .B(OR4_719_Y), .C(OR4_1170_Y), .D(OR4_668_Y) ); // @49:21545 OR4 OR4_517 ( .Y(OR4_517_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21510 RAM1K20 miv_rv32_ram_singleport_lp_R2C0 ( .A_ADDR({req_addr_mux_3[10:2], GND, GND, GND, GND, GND}), .A_BLK_EN({Z_BLKY2_0_, req_addr_mux_3[12], Z_BLKY0_0_}), .A_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .A_DIN({GND, GND, un10_req_wr_data_mux[31:24], GND, GND, un10_req_wr_data_mux[23:16]}), .A_DOUT(miv_rv32_ram_singleport_lp_R2C0_A_DOUT[19:0]), .A_WEN({VCC, VCC}), .A_REN(VCC), .A_WIDTH({VCC, GND, VCC}), .A_WMODE({GND, GND}), .A_BYPASS(VCC), .A_DOUT_EN(VCC), .A_DOUT_SRST_N(VCC), .A_DOUT_ARST_N(VCC), .B_ADDR({req_addr_mux_3[10:2], GND, GND, GND, GND, GND}), .B_BLK_EN({Z_BLKX2_0_, req_addr_mux_3[12], Z_BLKX0_0_}), .B_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .B_DIN({GND, GND, un10_req_wr_data_mux[15:8], GND, GND, un10_req_wr_data_mux[7:0]}), .B_DOUT(miv_rv32_ram_singleport_lp_R2C0_B_DOUT[19:0]), .B_WEN({VCC, VCC}), .B_REN(VCC), .B_WIDTH({VCC, GND, VCC}), .B_WMODE({GND, GND}), .B_BYPASS(VCC), .B_DOUT_EN(VCC), .B_DOUT_SRST_N(VCC), .B_DOUT_ARST_N(VCC), .ECC_EN(GND), .ECC_BYPASS(GND), .SB_CORRECT(miv_rv32_ram_singleport_lp_R2C0_SB_CORRECT), .DB_DETECT(miv_rv32_ram_singleport_lp_R2C0_DB_DETECT), .BUSY_FB(GND), .ACCESS_BUSY(Z_ACCESS_BUSY_2__0_) ); defparam miv_rv32_ram_singleport_lp_R2C0.RAMINDEX="PF_TPSRAM_MAX_0%9216-9216%32-32%POWER%2%0%TWO-PORT%ECC_EN-0"; // @49:21506 OR4 OR4_742 ( .Y(OR4_742_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21503 OR4 OR4_210 ( .Y(OR4_210_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21500 OR4 OR4_1081 ( .Y(OR4_1081_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21499 OR4 OR4_977 ( .Y(OR4_977_Y), .A(miv_rv32_ram_singleport_lp_R8C0_A_DOUT[5]), .B(miv_rv32_ram_singleport_lp_R9C0_A_DOUT[5]), .C(miv_rv32_ram_singleport_lp_R10C0_A_DOUT[5]), .D(miv_rv32_ram_singleport_lp_R11C0_A_DOUT[5]) ); // @49:21497 OR4 OR4_464 ( .Y(OR4_464_Y), .A(OR4_1254_Y), .B(OR4_303_Y), .C(OR4_289_Y), .D(OR4_900_Y) ); // @49:21495 OR2 OR2_1 ( .Y(OR2_1_Y), .A(GND), .B(GND) ); // @49:21492 OR4 OR4_1185 ( .Y(OR4_1185_Y), .A(miv_rv32_ram_singleport_lp_R12C0_B_DOUT[16]), .B(miv_rv32_ram_singleport_lp_R13C0_B_DOUT[16]), .C(miv_rv32_ram_singleport_lp_R14C0_B_DOUT[16]), .D(miv_rv32_ram_singleport_lp_R15C0_B_DOUT[16]) ); // @49:21491 OR4 OR4_634 ( .Y(OR4_634_Y), .A(miv_rv32_ram_singleport_lp_R8C0_A_DOUT[6]), .B(miv_rv32_ram_singleport_lp_R9C0_A_DOUT[6]), .C(miv_rv32_ram_singleport_lp_R10C0_A_DOUT[6]), .D(miv_rv32_ram_singleport_lp_R11C0_A_DOUT[6]) ); // @49:21488 OR4 OR4_497 ( .Y(OR4_497_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21485 OR4 OR4_907 ( .Y(OR4_907_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21484 OR4 OR4_1003 ( .Y(OR4_1003_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21481 OR4 OR4_289 ( .Y(OR4_289_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21479 OR4 OR4_1090 ( .Y(OR4_1090_Y), .A(OR4_1157_Y), .B(OR2_7_Y), .C(GND), .D(GND) ); // @49:21477 OR4 OR4_252 ( .Y(OR4_252_Y), .A(OR4_55_Y), .B(OR4_1159_Y), .C(OR4_908_Y), .D(OR4_1027_Y) ); // @49:21436 OR4 OR4_195 ( .Y(OR4_195_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21433 OR4 OR4_1042 ( .Y(OR4_1042_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21430 OR4 OR4_73 ( .Y(OR4_73_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21428 OR2 OR2_7 ( .Y(OR2_7_Y), .A(GND), .B(GND) ); // @49:21425 OR4 OR4_1226 ( .Y(OR4_1226_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21422 OR4 OR4_236 ( .Y(OR4_236_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21383 OR4 OR4_345 ( .Y(OR4_345_Y), .A(miv_rv32_ram_singleport_lp_R16C0_B_DOUT[4]), .B(miv_rv32_ram_singleport_lp_R17C0_B_DOUT[4]), .C(GND), .D(GND) ); // @49:21346 RAM1K20 miv_rv32_ram_singleport_lp_R15C0 ( .A_ADDR({req_addr_mux_3[10:2], GND, GND, GND, GND, GND}), .A_BLK_EN({Z_BLKY2_3_, req_addr_mux_3[12:11]}), .A_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .A_DIN({GND, GND, un10_req_wr_data_mux[31:24], GND, GND, un10_req_wr_data_mux[23:16]}), .A_DOUT(miv_rv32_ram_singleport_lp_R15C0_A_DOUT[19:0]), .A_WEN({VCC, VCC}), .A_REN(VCC), .A_WIDTH({VCC, GND, VCC}), .A_WMODE({GND, GND}), .A_BYPASS(VCC), .A_DOUT_EN(VCC), .A_DOUT_SRST_N(VCC), .A_DOUT_ARST_N(VCC), .B_ADDR({req_addr_mux_3[10:2], GND, GND, GND, GND, GND}), .B_BLK_EN({Z_BLKX2_3_, req_addr_mux_3[12:11]}), .B_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .B_DIN({GND, GND, un10_req_wr_data_mux[15:8], GND, GND, un10_req_wr_data_mux[7:0]}), .B_DOUT(miv_rv32_ram_singleport_lp_R15C0_B_DOUT[19:0]), .B_WEN({VCC, VCC}), .B_REN(VCC), .B_WIDTH({VCC, GND, VCC}), .B_WMODE({GND, GND}), .B_BYPASS(VCC), .B_DOUT_EN(VCC), .B_DOUT_SRST_N(VCC), .B_DOUT_ARST_N(VCC), .ECC_EN(GND), .ECC_BYPASS(GND), .SB_CORRECT(miv_rv32_ram_singleport_lp_R15C0_SB_CORRECT), .DB_DETECT(miv_rv32_ram_singleport_lp_R15C0_DB_DETECT), .BUSY_FB(GND), .ACCESS_BUSY(Z_ACCESS_BUSY_15__0_) ); defparam miv_rv32_ram_singleport_lp_R15C0.RAMINDEX="PF_TPSRAM_MAX_0%9216-9216%32-32%POWER%15%0%TWO-PORT%ECC_EN-0"; // @49:21344 OR4 OR4_1001 ( .Y(OR4_1001_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21343 OR4 OR4_639 ( .Y(OR4_639_Y), .A(miv_rv32_ram_singleport_lp_R8C0_A_DOUT[17]), .B(miv_rv32_ram_singleport_lp_R9C0_A_DOUT[17]), .C(miv_rv32_ram_singleport_lp_R10C0_A_DOUT[17]), .D(miv_rv32_ram_singleport_lp_R11C0_A_DOUT[17]) ); // @49:21302 OR4 OR4_1039 ( .Y(OR4_1039_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21301 OR4 OR4_11 ( .Y(OR4_11_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21299 OR4 OR4_985 ( .Y(OR4_985_Y), .A(OR4_136_Y), .B(OR4_555_Y), .C(OR4_163_Y), .D(OR4_1069_Y) ); // @49:21296 OR4 OR4_1077 ( .Y(OR4_1077_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21293 OR4 OR4_1105 ( .Y(OR4_1105_Y), .A(miv_rv32_ram_singleport_lp_R12C0_A_DOUT[6]), .B(miv_rv32_ram_singleport_lp_R13C0_A_DOUT[6]), .C(miv_rv32_ram_singleport_lp_R14C0_A_DOUT[6]), .D(miv_rv32_ram_singleport_lp_R15C0_A_DOUT[6]) ); // @49:21292 OR4 OR4_64 ( .Y(OR4_64_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21289 OR4 OR4_551 ( .Y(OR4_551_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21287 OR4 OR4_465 ( .Y(OR4_465_Y), .A(OR4_223_Y), .B(OR4_1276_Y), .C(OR4_1249_Y), .D(OR4_563_Y) ); // @49:21285 OR4 OR4_312 ( .Y(OR4_312_Y), .A(OR4_205_Y), .B(OR4_655_Y), .C(OR4_1298_Y), .D(OR4_194_Y) ); // @49:21282 OR4 OR4_182 ( .Y(OR4_182_Y), .A(miv_rv32_ram_singleport_lp_R16C0_B_DOUT[14]), .B(miv_rv32_ram_singleport_lp_R17C0_B_DOUT[14]), .C(GND), .D(GND) ); // @49:21280 OR4 OR4_871 ( .Y(OR4_871_Y), .A(OR4_1003_Y), .B(OR4_1217_Y), .C(OR4_59_Y), .D(OR4_1016_Y) ); // @49:21277 OR4 OR4_880 ( .Y(OR4_880_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21275 OR4 OR4_537 ( .Y(OR4_537_Y), .A(OR4_437_Y), .B(OR4_628_Y), .C(OR4_239_Y), .D(OR4_21_Y) ); // @49:21274 OR4 OR4_1015 ( .Y(OR4_1015_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21233 OR4 OR4_924 ( .Y(OR4_924_Y), .A(OR4_267_Y), .B(OR4_337_Y), .C(OR4_754_Y), .D(OR4_1132_Y) ); // @49:21232 OR4 OR4_230 ( .Y(OR4_230_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21230 OR4 OR4_128 ( .Y(OR4_128_Y), .A(OR4_341_Y), .B(OR4_793_Y), .C(OR4_114_Y), .D(OR4_333_Y) ); // @49:21190 OR4 OR4_827 ( .Y(OR4_827_Y), .A(OR4_705_Y), .B(OR4_946_Y), .C(OR4_512_Y), .D(OR4_1201_Y) ); // @49:21187 OR4 OR4_82 ( .Y(OR4_82_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21186 OR4 OR4_27 ( .Y(OR4_27_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21185 OR4 OR4_1288 ( .Y(OR4_1288_Y), .A(miv_rv32_ram_singleport_lp_R16C0_B_DOUT[7]), .B(miv_rv32_ram_singleport_lp_R17C0_B_DOUT[7]), .C(GND), .D(GND) ); // @49:21183 OR4 OR4_801 ( .Y(OR4_801_Y), .A(OR4_210_Y), .B(OR4_1146_Y), .C(OR4_269_Y), .D(OR4_1086_Y) ); // @49:21180 OR4 OR4_244 ( .Y(OR4_244_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21179 OR4 OR4_774 ( .Y(OR4_774_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21177 OR4 \OR4_R_DATA[26] ( .Y(tcm0_d_resp_rd_data_net[26]), .A(OR4_503_Y), .B(OR4_1213_Y), .C(OR4_128_Y), .D(OR4_206_Y) ); // @49:21175 OR4 OR4_416 ( .Y(OR4_416_Y), .A(OR4_1140_Y), .B(OR2_12_Y), .C(GND), .D(GND) ); // @49:21140 RAM1K20 miv_rv32_ram_singleport_lp_R4C0 ( .A_ADDR({req_addr_mux_3[10:2], GND, GND, GND, GND, GND}), .A_BLK_EN({Z_BLKY2_1_, Z_BLKY1_0_, Z_BLKY0_0_}), .A_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .A_DIN({GND, GND, un10_req_wr_data_mux[31:24], GND, GND, un10_req_wr_data_mux[23:16]}), .A_DOUT(miv_rv32_ram_singleport_lp_R4C0_A_DOUT[19:0]), .A_WEN({VCC, VCC}), .A_REN(VCC), .A_WIDTH({VCC, GND, VCC}), .A_WMODE({GND, GND}), .A_BYPASS(VCC), .A_DOUT_EN(VCC), .A_DOUT_SRST_N(VCC), .A_DOUT_ARST_N(VCC), .B_ADDR({req_addr_mux_3[10:2], GND, GND, GND, GND, GND}), .B_BLK_EN({Z_BLKX2_1_, Z_BLKX1_0_, Z_BLKX0_0_}), .B_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .B_DIN({GND, GND, un10_req_wr_data_mux[15:8], GND, GND, un10_req_wr_data_mux[7:0]}), .B_DOUT(miv_rv32_ram_singleport_lp_R4C0_B_DOUT[19:0]), .B_WEN({VCC, VCC}), .B_REN(VCC), .B_WIDTH({VCC, GND, VCC}), .B_WMODE({GND, GND}), .B_BYPASS(VCC), .B_DOUT_EN(VCC), .B_DOUT_SRST_N(VCC), .B_DOUT_ARST_N(VCC), .ECC_EN(GND), .ECC_BYPASS(GND), .SB_CORRECT(miv_rv32_ram_singleport_lp_R4C0_SB_CORRECT), .DB_DETECT(miv_rv32_ram_singleport_lp_R4C0_DB_DETECT), .BUSY_FB(GND), .ACCESS_BUSY(Z_ACCESS_BUSY_4__0_) ); defparam miv_rv32_ram_singleport_lp_R4C0.RAMINDEX="PF_TPSRAM_MAX_0%9216-9216%32-32%POWER%4%0%TWO-PORT%ECC_EN-0"; // @49:21136 OR4 OR4_777 ( .Y(OR4_777_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21133 OR4 OR4_1060 ( .Y(OR4_1060_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21130 OR4 OR4_743 ( .Y(OR4_743_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21129 OR4 OR4_20 ( .Y(OR4_20_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21128 OR4 OR4_704 ( .Y(OR4_704_Y), .A(miv_rv32_ram_singleport_lp_R4C0_B_DOUT[7]), .B(miv_rv32_ram_singleport_lp_R5C0_B_DOUT[7]), .C(miv_rv32_ram_singleport_lp_R6C0_B_DOUT[7]), .D(miv_rv32_ram_singleport_lp_R7C0_B_DOUT[7]) ); // @49:21125 OR4 OR4_1297 ( .Y(OR4_1297_Y), .A(miv_rv32_ram_singleport_lp_R12C0_A_DOUT[1]), .B(miv_rv32_ram_singleport_lp_R13C0_A_DOUT[1]), .C(miv_rv32_ram_singleport_lp_R14C0_A_DOUT[1]), .D(miv_rv32_ram_singleport_lp_R15C0_A_DOUT[1]) ); // @49:21122 OR4 OR4_707 ( .Y(OR4_707_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21121 OR4 OR4_728 ( .Y(OR4_728_Y), .A(miv_rv32_ram_singleport_lp_R4C0_B_DOUT[1]), .B(miv_rv32_ram_singleport_lp_R5C0_B_DOUT[1]), .C(miv_rv32_ram_singleport_lp_R6C0_B_DOUT[1]), .D(miv_rv32_ram_singleport_lp_R7C0_B_DOUT[1]) ); // @49:21120 OR4 OR4_1236 ( .Y(OR4_1236_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21117 OR4 OR4_1184 ( .Y(OR4_1184_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21115 OR4 \OR4_R_DATA[20] ( .Y(tcm0_d_resp_rd_data_net[20]), .A(OR4_955_Y), .B(OR4_1259_Y), .C(OR4_542_Y), .D(OR4_43_Y) ); // @49:21113 OR2 OR2_2 ( .Y(OR2_2_Y), .A(GND), .B(GND) ); // @49:21110 OR4 OR4_967 ( .Y(OR4_967_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21109 OR4 OR4_51 ( .Y(OR4_51_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21108 INV \INVBLKY1[0] ( .Y(Z_BLKY1_0_), .A(req_addr_mux_3[12]) ); // @49:21105 OR4 OR4_120 ( .Y(OR4_120_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21102 OR4 OR4_327 ( .Y(OR4_327_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21101 OR4 OR4_147 ( .Y(OR4_147_Y), .A(miv_rv32_ram_singleport_lp_R8C0_A_DOUT[0]), .B(miv_rv32_ram_singleport_lp_R9C0_A_DOUT[0]), .C(miv_rv32_ram_singleport_lp_R10C0_A_DOUT[0]), .D(miv_rv32_ram_singleport_lp_R11C0_A_DOUT[0]) ); // @49:21100 OR4 OR4_518 ( .Y(OR4_518_Y), .A(miv_rv32_ram_singleport_lp_R8C0_A_DOUT[10]), .B(miv_rv32_ram_singleport_lp_R9C0_A_DOUT[10]), .C(miv_rv32_ram_singleport_lp_R10C0_A_DOUT[10]), .D(miv_rv32_ram_singleport_lp_R11C0_A_DOUT[10]) ); // @49:21095 OR4 OR4_1208 ( .Y(OR4_1208_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21092 OR4 OR4_247 ( .Y(OR4_247_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21091 OR4 OR4_13 ( .Y(OR4_13_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21088 OR4 OR4_332 ( .Y(OR4_332_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21085 OR4 OR4_1111 ( .Y(OR4_1111_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21082 OR4 OR4_183 ( .Y(OR4_183_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21079 OR4 OR4_879 ( .Y(OR4_879_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21074 OR4 OR4_620 ( .Y(OR4_620_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21073 OR4 OR4_1123 ( .Y(OR4_1123_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21071 OR4 \OR4_R_DATA[21] ( .Y(tcm0_d_resp_rd_data_net[21]), .A(OR4_1206_Y), .B(OR4_1148_Y), .C(OR4_1175_Y), .D(OR4_744_Y) ); // @49:21068 OR4 OR4_258 ( .Y(OR4_258_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21064 OR4 OR4_809 ( .Y(OR4_809_Y), .A(OR4_758_Y), .B(OR4_142_Y), .C(OR4_771_Y), .D(OR4_984_Y) ); // @49:21061 OR4 OR4_980 ( .Y(OR4_980_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21058 OR4 OR4_989 ( .Y(OR4_989_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21057 OR4 OR4_994 ( .Y(OR4_994_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21054 OR4 OR4_1078 ( .Y(OR4_1078_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21053 OR4 OR4_198 ( .Y(OR4_198_Y), .A(miv_rv32_ram_singleport_lp_R8C0_B_DOUT[12]), .B(miv_rv32_ram_singleport_lp_R9C0_B_DOUT[12]), .C(miv_rv32_ram_singleport_lp_R10C0_B_DOUT[12]), .D(miv_rv32_ram_singleport_lp_R11C0_B_DOUT[12]) ); // @49:21051 OR4 OR4_651 ( .Y(OR4_651_Y), .A(OR4_200_Y), .B(OR4_283_Y), .C(OR4_696_Y), .D(OR4_271_Y) ); // @49:21050 OR4 OR4_897 ( .Y(OR4_897_Y), .A(miv_rv32_ram_singleport_lp_R0C0_B_DOUT[17]), .B(miv_rv32_ram_singleport_lp_R1C0_B_DOUT[17]), .C(miv_rv32_ram_singleport_lp_R2C0_B_DOUT[17]), .D(miv_rv32_ram_singleport_lp_R3C0_B_DOUT[17]) ); // @49:21009 OR4 OR4_1104 ( .Y(OR4_1104_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21007 OR4 OR4_453 ( .Y(OR4_453_Y), .A(OR4_545_Y), .B(OR4_784_Y), .C(OR4_983_Y), .D(OR4_822_Y) ); // @49:21006 OR4 OR4_89 ( .Y(OR4_89_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:21005 OR4 OR4_436 ( .Y(OR4_436_Y), .A(miv_rv32_ram_singleport_lp_R4C0_A_DOUT[16]), .B(miv_rv32_ram_singleport_lp_R5C0_A_DOUT[16]), .C(miv_rv32_ram_singleport_lp_R6C0_A_DOUT[16]), .D(miv_rv32_ram_singleport_lp_R7C0_A_DOUT[16]) ); // @49:20964 OR4 OR4_1267 ( .Y(OR4_1267_Y), .A(miv_rv32_ram_singleport_lp_R12C0_A_DOUT[14]), .B(miv_rv32_ram_singleport_lp_R13C0_A_DOUT[14]), .C(miv_rv32_ram_singleport_lp_R14C0_A_DOUT[14]), .D(miv_rv32_ram_singleport_lp_R15C0_A_DOUT[14]) ); // @49:20963 OR4 OR4_279 ( .Y(OR4_279_Y), .A(miv_rv32_ram_singleport_lp_R8C0_A_DOUT[3]), .B(miv_rv32_ram_singleport_lp_R9C0_A_DOUT[3]), .C(miv_rv32_ram_singleport_lp_R10C0_A_DOUT[3]), .D(miv_rv32_ram_singleport_lp_R11C0_A_DOUT[3]) ); // @49:20962 OR4 OR4_516 ( .Y(OR4_516_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20883 OR4 OR4_861 ( .Y(OR4_861_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20881 OR4 OR4_798 ( .Y(OR4_798_Y), .A(OR4_860_Y), .B(OR4_682_Y), .C(OR4_1120_Y), .D(OR4_166_Y) ); // @49:20879 OR4 OR4_209 ( .Y(OR4_209_Y), .A(OR4_873_Y), .B(OR4_662_Y), .C(OR4_450_Y), .D(OR4_1205_Y) ); // @49:20876 OR4 OR4_683 ( .Y(OR4_683_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20874 OR4 OR4_53 ( .Y(OR4_53_Y), .A(OR4_421_Y), .B(OR4_288_Y), .C(OR4_384_Y), .D(OR4_78_Y) ); // @49:20873 OR4 OR4_26 ( .Y(OR4_26_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20872 OR4 OR4_538 ( .Y(OR4_538_Y), .A(miv_rv32_ram_singleport_lp_R8C0_B_DOUT[4]), .B(miv_rv32_ram_singleport_lp_R9C0_B_DOUT[4]), .C(miv_rv32_ram_singleport_lp_R10C0_B_DOUT[4]), .D(miv_rv32_ram_singleport_lp_R11C0_B_DOUT[4]) ); // @49:20869 OR4 OR4_852 ( .Y(OR4_852_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20866 OR4 OR4_625 ( .Y(OR4_625_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20865 OR4 OR4_764 ( .Y(OR4_764_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20862 OR4 OR4_190 ( .Y(OR4_190_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20861 OR4 OR4_397 ( .Y(OR4_397_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20859 OR4 OR4_255 ( .Y(OR4_255_Y), .A(OR4_1273_Y), .B(OR4_60_Y), .C(OR4_496_Y), .D(OR4_1_Y) ); // @49:20817 OR4 OR4_767 ( .Y(OR4_767_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20814 OR4 OR4_926 ( .Y(OR4_926_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20812 OR4 OR4_585 ( .Y(OR4_585_Y), .A(OR4_671_Y), .B(OR4_473_Y), .C(OR4_238_Y), .D(OR4_707_Y) ); // @49:20811 OR4 OR4_711 ( .Y(OR4_711_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20809 OR4 OR4_746 ( .Y(OR4_746_Y), .A(OR4_472_Y), .B(OR4_706_Y), .C(OR4_277_Y), .D(OR4_945_Y) ); // @49:20806 OR4 OR4_816 ( .Y(OR4_816_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20804 OR4 OR4_1254 ( .Y(OR4_1254_Y), .A(OR4_1099_Y), .B(OR4_961_Y), .C(OR4_1064_Y), .D(OR4_1063_Y) ); // @49:20801 OR4 OR4_975 ( .Y(OR4_975_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20799 OR4 OR4_647 ( .Y(OR4_647_Y), .A(OR4_1211_Y), .B(OR4_150_Y), .C(OR4_344_Y), .D(OR4_190_Y) ); // @49:20796 OR4 OR4_745 ( .Y(OR4_745_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20794 OR4 OR4_172 ( .Y(OR4_172_Y), .A(OR4_420_Y), .B(OR4_1160_Y), .C(OR4_721_Y), .D(OR4_290_Y) ); // @49:20791 OR4 OR4_722 ( .Y(OR4_722_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20788 OR4 OR4_1133 ( .Y(OR4_1133_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20785 OR4 OR4_690 ( .Y(OR4_690_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20783 OR4 OR4_913 ( .Y(OR4_913_Y), .A(OR4_795_Y), .B(OR4_321_Y), .C(OR4_518_Y), .D(OR4_979_Y) ); // @49:20744 INV \INVBLKY0[0] ( .Y(Z_BLKY0_0_), .A(req_addr_mux_3[11]) ); // @49:20743 OR4 OR4_870 ( .Y(OR4_870_Y), .A(miv_rv32_ram_singleport_lp_R0C0_B_DOUT[11]), .B(miv_rv32_ram_singleport_lp_R1C0_B_DOUT[11]), .C(miv_rv32_ram_singleport_lp_R2C0_B_DOUT[11]), .D(miv_rv32_ram_singleport_lp_R3C0_B_DOUT[11]) ); // @49:20742 OR4 OR4_905 ( .Y(OR4_905_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20737 OR4 OR4_102 ( .Y(OR4_102_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20736 OR4 OR4_457 ( .Y(OR4_457_Y), .A(miv_rv32_ram_singleport_lp_R12C0_B_DOUT[1]), .B(miv_rv32_ram_singleport_lp_R13C0_B_DOUT[1]), .C(miv_rv32_ram_singleport_lp_R14C0_B_DOUT[1]), .D(miv_rv32_ram_singleport_lp_R15C0_B_DOUT[1]) ); // @49:20657 OR4 OR4_1073 ( .Y(OR4_1073_Y), .A(miv_rv32_ram_singleport_lp_R4C0_B_DOUT[4]), .B(miv_rv32_ram_singleport_lp_R5C0_B_DOUT[4]), .C(miv_rv32_ram_singleport_lp_R6C0_B_DOUT[4]), .D(miv_rv32_ram_singleport_lp_R7C0_B_DOUT[4]) ); // @49:20656 OR4 OR4_1097 ( .Y(OR4_1097_Y), .A(miv_rv32_ram_singleport_lp_R8C0_B_DOUT[10]), .B(miv_rv32_ram_singleport_lp_R9C0_B_DOUT[10]), .C(miv_rv32_ram_singleport_lp_R10C0_B_DOUT[10]), .D(miv_rv32_ram_singleport_lp_R11C0_B_DOUT[10]) ); // @49:20616 OR4 OR4_800 ( .Y(OR4_800_Y), .A(OR4_1111_Y), .B(OR4_311_Y), .C(OR4_731_Y), .D(OR4_265_Y) ); // @49:20613 OR4 OR4_1252 ( .Y(OR4_1252_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20609 OR4 OR4_155 ( .Y(OR4_155_Y), .A(OR4_462_Y), .B(OR4_907_Y), .C(OR4_247_Y), .D(OR4_455_Y) ); // @49:20606 OR4 OR4_114 ( .Y(OR4_114_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20564 OR4 OR4_869 ( .Y(OR4_869_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20562 OR4 OR4_536 ( .Y(OR4_536_Y), .A(OR4_681_Y), .B(OR4_886_Y), .C(OR4_1040_Y), .D(OR4_698_Y) ); // @49:20559 OR4 OR4_1306 ( .Y(OR4_1306_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20556 OR4 OR4_325 ( .Y(OR4_325_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20554 OR4 OR4_1010 ( .Y(OR4_1010_Y), .A(OR4_1053_Y), .B(OR4_829_Y), .C(OR4_612_Y), .D(OR4_1017_Y) ); // @49:20552 OR4 OR4_1071 ( .Y(OR4_1071_Y), .A(OR4_382_Y), .B(OR4_418_Y), .C(OR4_394_Y), .D(OR4_1009_Y) ); // @49:20550 OR4 OR4_1250 ( .Y(OR4_1250_Y), .A(OR4_903_Y), .B(OR4_697_Y), .C(OR4_481_Y), .D(OR4_497_Y) ); // @49:20547 OR4 OR4_38 ( .Y(OR4_38_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20546 OR4 OR4_941 ( .Y(OR4_941_Y), .A(miv_rv32_ram_singleport_lp_R12C0_B_DOUT[11]), .B(miv_rv32_ram_singleport_lp_R13C0_B_DOUT[11]), .C(miv_rv32_ram_singleport_lp_R14C0_B_DOUT[11]), .D(miv_rv32_ram_singleport_lp_R15C0_B_DOUT[11]) ); // @49:20544 OR4 OR4_1175 ( .Y(OR4_1175_Y), .A(OR4_1047_Y), .B(OR4_201_Y), .C(OR4_813_Y), .D(OR4_1031_Y) ); // @49:20541 OR4 OR4_883 ( .Y(OR4_883_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20539 OR4 OR4_62 ( .Y(OR4_62_Y), .A(OR4_261_Y), .B(OR4_241_Y), .C(OR4_214_Y), .D(OR4_828_Y) ); // @49:20536 OR4 OR4_695 ( .Y(OR4_695_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20533 OR4 OR4_731 ( .Y(OR4_731_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20530 OR4 OR4_836 ( .Y(OR4_836_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20526 OR4 OR4_996 ( .Y(OR4_996_Y), .A(OR4_435_Y), .B(OR4_626_Y), .C(OR4_235_Y), .D(OR4_18_Y) ); // @49:20523 OR4 OR4_269 ( .Y(OR4_269_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20520 OR4 OR4_173 ( .Y(OR4_173_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20518 OR4 \OR4_R_DATA[13] ( .Y(tcm0_d_resp_rd_data_net[13]), .A(OR4_786_Y), .B(OR4_465_Y), .C(OR4_414_Y), .D(OR4_371_Y) ); // @49:20517 OR4 OR4_933 ( .Y(OR4_933_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20514 OR4 OR4_380 ( .Y(OR4_380_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20511 OR4 OR4_792 ( .Y(OR4_792_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20510 OR4 OR4_149 ( .Y(OR4_149_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20509 OR4 OR4_224 ( .Y(OR4_224_Y), .A(miv_rv32_ram_singleport_lp_R4C0_B_DOUT[17]), .B(miv_rv32_ram_singleport_lp_R5C0_B_DOUT[17]), .C(miv_rv32_ram_singleport_lp_R6C0_B_DOUT[17]), .D(miv_rv32_ram_singleport_lp_R7C0_B_DOUT[17]) ); // @49:20507 OR4 OR4_103 ( .Y(OR4_103_Y), .A(OR4_584_Y), .B(OR2_29_Y), .C(GND), .D(GND) ); // @49:20467 OR4 OR4_1067 ( .Y(OR4_1067_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20466 OR4 OR4_970 ( .Y(OR4_970_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20463 OR4 OR4_979 ( .Y(OR4_979_Y), .A(miv_rv32_ram_singleport_lp_R12C0_A_DOUT[10]), .B(miv_rv32_ram_singleport_lp_R13C0_A_DOUT[10]), .C(miv_rv32_ram_singleport_lp_R14C0_A_DOUT[10]), .D(miv_rv32_ram_singleport_lp_R15C0_A_DOUT[10]) ); // @49:20460 OR4 OR4_723 ( .Y(OR4_723_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20458 OR4 OR4_134 ( .Y(OR4_134_Y), .A(OR4_1081_Y), .B(OR4_940_Y), .C(OR4_1056_Y), .D(OR4_82_Y) ); // @49:20455 OR4 OR4_900 ( .Y(OR4_900_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20453 OR4 OR4_909 ( .Y(OR4_909_Y), .A(OR4_1008_Y), .B(OR4_1202_Y), .C(OR4_1184_Y), .D(OR4_498_Y) ); // @49:20450 OR4 OR4_316 ( .Y(OR4_316_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20448 OR4 OR4_965 ( .Y(OR4_965_Y), .A(OR4_510_Y), .B(OR4_1141_Y), .C(OR4_198_Y), .D(OR4_456_Y) ); // @49:20445 OR4 OR4_282 ( .Y(OR4_282_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20444 OR4 OR4_162 ( .Y(OR4_162_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20404 OR4 OR4_1098 ( .Y(OR4_1098_Y), .A(miv_rv32_ram_singleport_lp_R8C0_A_DOUT[4]), .B(miv_rv32_ram_singleport_lp_R9C0_A_DOUT[4]), .C(miv_rv32_ram_singleport_lp_R10C0_A_DOUT[4]), .D(miv_rv32_ram_singleport_lp_R11C0_A_DOUT[4]) ); // @49:20403 OR4 OR4_348 ( .Y(OR4_348_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20401 OR4 OR4_860 ( .Y(OR4_860_Y), .A(OR4_592_Y), .B(OR4_787_Y), .C(OR4_942_Y), .D(OR4_1001_Y) ); // @49:20398 OR4 OR4_1284 ( .Y(OR4_1284_Y), .A(miv_rv32_ram_singleport_lp_R16C0_A_DOUT[11]), .B(miv_rv32_ram_singleport_lp_R17C0_A_DOUT[11]), .C(GND), .D(GND) ); // @49:20395 OR4 OR4_127 ( .Y(OR4_127_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20393 OR4 OR4_414 ( .Y(OR4_414_Y), .A(OR4_929_Y), .B(OR4_1194_Y), .C(OR4_80_Y), .D(OR4_1225_Y) ); // @49:20390 OR4 OR4_395 ( .Y(OR4_395_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20387 OR4 OR4_1217 ( .Y(OR4_1217_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20384 OR4 OR4_673 ( .Y(OR4_673_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20381 OR4 OR4_1278 ( .Y(OR4_1278_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20380 OR4 OR4_227 ( .Y(OR4_227_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20379 OR4 OR4_1157 ( .Y(OR4_1157_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20377 OR4 OR4_1148 ( .Y(OR4_1148_Y), .A(OR4_218_Y), .B(OR4_890_Y), .C(OR4_20_Y), .D(OR4_837_Y) ); // @49:20340 RAM1K20 miv_rv32_ram_singleport_lp_R16C0 ( .A_ADDR({req_addr_mux_3[10:2], GND, GND, GND, GND, GND}), .A_BLK_EN({Z_BLKY2_4_, Z_BLKY1_0_, Z_BLKY0_0_}), .A_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .A_DIN({GND, GND, un10_req_wr_data_mux[31:24], GND, GND, un10_req_wr_data_mux[23:16]}), .A_DOUT(miv_rv32_ram_singleport_lp_R16C0_A_DOUT[19:0]), .A_WEN({VCC, VCC}), .A_REN(VCC), .A_WIDTH({VCC, GND, VCC}), .A_WMODE({GND, GND}), .A_BYPASS(VCC), .A_DOUT_EN(VCC), .A_DOUT_SRST_N(VCC), .A_DOUT_ARST_N(VCC), .B_ADDR({req_addr_mux_3[10:2], GND, GND, GND, GND, GND}), .B_BLK_EN({Z_BLKX2_4_, Z_BLKX1_0_, Z_BLKX0_0_}), .B_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .B_DIN({GND, GND, un10_req_wr_data_mux[15:8], GND, GND, un10_req_wr_data_mux[7:0]}), .B_DOUT(miv_rv32_ram_singleport_lp_R16C0_B_DOUT[19:0]), .B_WEN({VCC, VCC}), .B_REN(VCC), .B_WIDTH({VCC, GND, VCC}), .B_WMODE({GND, GND}), .B_BYPASS(VCC), .B_DOUT_EN(VCC), .B_DOUT_SRST_N(VCC), .B_DOUT_ARST_N(VCC), .ECC_EN(GND), .ECC_BYPASS(GND), .SB_CORRECT(miv_rv32_ram_singleport_lp_R16C0_SB_CORRECT), .DB_DETECT(miv_rv32_ram_singleport_lp_R16C0_DB_DETECT), .BUSY_FB(GND), .ACCESS_BUSY(Z_ACCESS_BUSY_16__0_) ); defparam miv_rv32_ram_singleport_lp_R16C0.RAMINDEX="PF_TPSRAM_MAX_0%9216-9216%32-32%POWER%16%0%TWO-PORT%ECC_EN-0"; // @49:20336 OR4 OR4_1241 ( .Y(OR4_1241_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20334 OR4 OR4_69 ( .Y(OR4_69_Y), .A(OR4_1271_Y), .B(OR4_985_Y), .C(OR4_1283_Y), .D(OR4_560_Y) ); // @49:20331 OR4 OR4_603 ( .Y(OR4_603_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20329 OR4 OR4_575 ( .Y(OR4_575_Y), .A(OR4_566_Y), .B(OR4_365_Y), .C(OR4_124_Y), .D(OR4_375_Y) ); // @49:20326 OR4 OR4_581 ( .Y(OR4_581_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20321 OR4 OR4_1146 ( .Y(OR4_1146_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20318 OR4 OR4_1282 ( .Y(OR4_1282_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20315 OR4 OR4_954 ( .Y(OR4_954_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20313 OR4 \OR4_R_DATA[12] ( .Y(tcm0_d_resp_rd_data_net[12]), .A(OR4_939_Y), .B(OR4_902_Y), .C(OR4_720_Y), .D(OR4_134_Y) ); // @49:20312 OR4 OR4_158 ( .Y(OR4_158_Y), .A(miv_rv32_ram_singleport_lp_R12C0_B_DOUT[6]), .B(miv_rv32_ram_singleport_lp_R13C0_B_DOUT[6]), .C(miv_rv32_ram_singleport_lp_R14C0_B_DOUT[6]), .D(miv_rv32_ram_singleport_lp_R15C0_B_DOUT[6]) ); // @49:20311 OR4 OR4_146 ( .Y(OR4_146_Y), .A(miv_rv32_ram_singleport_lp_R0C0_A_DOUT[15]), .B(miv_rv32_ram_singleport_lp_R1C0_A_DOUT[15]), .C(miv_rv32_ram_singleport_lp_R2C0_A_DOUT[15]), .D(miv_rv32_ram_singleport_lp_R3C0_A_DOUT[15]) ); // @49:20308 OR4 OR4_857 ( .Y(OR4_857_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20307 OR4 OR4_85 ( .Y(OR4_85_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20305 OR4 \OR4_R_DATA[24] ( .Y(tcm0_d_resp_rd_data_net[24]), .A(OR4_1142_Y), .B(OR4_677_Y), .C(OR4_7_Y), .D(OR4_575_Y) ); // @49:20304 OR4 OR4_1307 ( .Y(OR4_1307_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20301 OR4 OR4_505 ( .Y(OR4_505_Y), .A(miv_rv32_ram_singleport_lp_R12C0_A_DOUT[17]), .B(miv_rv32_ram_singleport_lp_R13C0_A_DOUT[17]), .C(miv_rv32_ram_singleport_lp_R14C0_A_DOUT[17]), .D(miv_rv32_ram_singleport_lp_R15C0_A_DOUT[17]) ); // @49:20298 OR4 OR4_1174 ( .Y(OR4_1174_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20297 OR4 OR4_449 ( .Y(OR4_449_Y), .A(miv_rv32_ram_singleport_lp_R4C0_A_DOUT[13]), .B(miv_rv32_ram_singleport_lp_R5C0_A_DOUT[13]), .C(miv_rv32_ram_singleport_lp_R6C0_A_DOUT[13]), .D(miv_rv32_ram_singleport_lp_R7C0_A_DOUT[13]) ); // @49:20294 OR4 OR4_294 ( .Y(OR4_294_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20292 OR4 OR4_1204 ( .Y(OR4_1204_Y), .A(OR4_299_Y), .B(OR4_508_Y), .C(OR4_104_Y), .D(OR4_1214_Y) ); // @49:20289 OR4 OR4_442 ( .Y(OR4_442_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20286 OR4 OR4_793 ( .Y(OR4_793_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20284 OR4 OR4_415 ( .Y(OR4_415_Y), .A(OR4_690_Y), .B(OR4_1168_Y), .C(OR4_486_Y), .D(OR4_683_Y) ); // @49:20281 OR4 OR4_1280 ( .Y(OR4_1280_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20242 OR4 OR4_336 ( .Y(OR4_336_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20240 OR4 OR4_740 ( .Y(OR4_740_Y), .A(OR4_502_Y), .B(OR2_26_Y), .C(GND), .D(GND) ); // @49:20239 OR4 OR4_343 ( .Y(OR4_343_Y), .A(miv_rv32_ram_singleport_lp_R0C0_B_DOUT[7]), .B(miv_rv32_ram_singleport_lp_R1C0_B_DOUT[7]), .C(miv_rv32_ram_singleport_lp_R2C0_B_DOUT[7]), .D(miv_rv32_ram_singleport_lp_R3C0_B_DOUT[7]) ); // @49:20238 OR4 OR4_758 ( .Y(OR4_758_Y), .A(miv_rv32_ram_singleport_lp_R16C0_B_DOUT[3]), .B(miv_rv32_ram_singleport_lp_R17C0_B_DOUT[3]), .C(GND), .D(GND) ); // @49:20198 OR4 OR4_1068 ( .Y(OR4_1068_Y), .A(OR4_1195_Y), .B(OR4_91_Y), .C(OR4_242_Y), .D(OR4_1263_Y) ); // @49:20195 OR4 OR4_163 ( .Y(OR4_163_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20188 OR4 OR4_1202 ( .Y(OR4_1202_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20185 OR4 OR4_434 ( .Y(OR4_434_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20182 OR4 OR4_150 ( .Y(OR4_150_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20180 OR4 OR4_357 ( .Y(OR4_357_Y), .A(OR4_933_Y), .B(OR4_1158_Y), .C(OR4_1304_Y), .D(OR4_669_Y) ); // @49:20179 OR4 OR4_1093 ( .Y(OR4_1093_Y), .A(miv_rv32_ram_singleport_lp_R0C0_A_DOUT[14]), .B(miv_rv32_ram_singleport_lp_R1C0_A_DOUT[14]), .C(miv_rv32_ram_singleport_lp_R2C0_A_DOUT[14]), .D(miv_rv32_ram_singleport_lp_R3C0_A_DOUT[14]) ); // @49:20177 OR4 OR4_1149 ( .Y(OR4_1149_Y), .A(OR4_347_Y), .B(OR4_1106_Y), .C(OR4_1172_Y), .D(OR4_519_Y) ); // @49:20174 OR4 OR4_1302 ( .Y(OR4_1302_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20172 OR4 OR4_197 ( .Y(OR4_197_Y), .A(OR4_332_Y), .B(OR2_27_Y), .C(GND), .D(GND) ); // @49:20169 OR4 OR4_960 ( .Y(OR4_960_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20166 OR4 OR4_969 ( .Y(OR4_969_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20125 OR4 OR4_37 ( .Y(OR4_37_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20124 OR4 OR4_726 ( .Y(OR4_726_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20121 OR4 OR4_297 ( .Y(OR4_297_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20118 OR4 OR4_627 ( .Y(OR4_627_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20115 OR4 OR4_725 ( .Y(OR4_725_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20112 OR4 OR4_873 ( .Y(OR4_873_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20109 OR4 OR4_650 ( .Y(OR4_650_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20107 OR4 OR4_30 ( .Y(OR4_30_Y), .A(OR4_282_Y), .B(OR4_67_Y), .C(OR4_1153_Y), .D(OR4_499_Y) ); // @49:20101 OR4 OR4_1200 ( .Y(OR4_1200_Y), .A(OR4_357_Y), .B(OR4_783_Y), .C(OR4_1222_Y), .D(OR4_287_Y) ); // @49:20060 OR4 OR4_803 ( .Y(OR4_803_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20057 OR4 OR4_1091 ( .Y(OR4_1091_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20054 OR4 OR4_1022 ( .Y(OR4_1022_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20051 OR4 OR4_917 ( .Y(OR4_917_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20048 OR4 OR4_288 ( .Y(OR4_288_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20045 OR4 OR4_370 ( .Y(OR4_370_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20042 OR4 OR4_1195 ( .Y(OR4_1195_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20038 OR4 OR4_663 ( .Y(OR4_663_Y), .A(OR4_525_Y), .B(OR4_372_Y), .C(OR4_83_Y), .D(OR4_1252_Y) ); // @49:20037 OR4 OR4_681 ( .Y(OR4_681_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20035 OR4 OR4_1059 ( .Y(OR4_1059_Y), .A(OR4_1077_Y), .B(OR4_234_Y), .C(OR4_857_Y), .D(OR4_1066_Y) ); // @49:20033 OR4 OR4_1243 ( .Y(OR4_1243_Y), .A(OR4_838_Y), .B(OR4_571_Y), .C(OR4_359_Y), .D(OR4_431_Y) ); // @49:20032 OR4 OR4_483 ( .Y(OR4_483_Y), .A(miv_rv32_ram_singleport_lp_R0C0_A_DOUT[11]), .B(miv_rv32_ram_singleport_lp_R1C0_A_DOUT[11]), .C(miv_rv32_ram_singleport_lp_R2C0_A_DOUT[11]), .D(miv_rv32_ram_singleport_lp_R3C0_A_DOUT[11]) ); // @49:20029 OR4 OR4_540 ( .Y(OR4_540_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20026 OR4 OR4_435 ( .Y(OR4_435_Y), .A(miv_rv32_ram_singleport_lp_R16C0_A_DOUT[13]), .B(miv_rv32_ram_singleport_lp_R17C0_A_DOUT[13]), .C(GND), .D(GND) ); // @49:20025 OR4 OR4_300 ( .Y(OR4_300_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20022 OR4 OR4_549 ( .Y(OR4_549_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20021 OR4 OR4_44 ( .Y(OR4_44_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20019 OR4 OR4_565 ( .Y(OR4_565_Y), .A(OR4_1114_Y), .B(OR4_3_Y), .C(OR4_159_Y), .D(OR4_292_Y) ); // @49:20016 OR4 OR4_1017 ( .Y(OR4_1017_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20013 OR4 OR4_1187 ( .Y(OR4_1187_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20010 OR4 OR4_272 ( .Y(OR4_272_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20005 OR4 OR4_1063 ( .Y(OR4_1063_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:20002 OR4 OR4_921 ( .Y(OR4_921_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19999 OR4 OR4_655 ( .Y(OR4_655_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19998 OR4 OR4_202 ( .Y(OR4_202_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19995 OR4 OR4_882 ( .Y(OR4_882_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19993 OR4 OR4_956 ( .Y(OR4_956_Y), .A(OR4_1282_Y), .B(OR4_219_Y), .C(OR4_423_Y), .D(OR4_266_Y) ); // @49:19953 OR4 OR4_285 ( .Y(OR4_285_Y), .A(OR4_389_Y), .B(OR4_1112_Y), .C(OR4_305_Y), .D(OR4_919_Y) ); // @49:19950 OR4 OR4_796 ( .Y(OR4_796_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19947 OR4 OR4_448 ( .Y(OR4_448_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19906 OR4 OR4_697 ( .Y(OR4_697_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19905 OR4 OR4_795 ( .Y(OR4_795_Y), .A(miv_rv32_ram_singleport_lp_R0C0_A_DOUT[10]), .B(miv_rv32_ram_singleport_lp_R1C0_A_DOUT[10]), .C(miv_rv32_ram_singleport_lp_R2C0_A_DOUT[10]), .D(miv_rv32_ram_singleport_lp_R3C0_A_DOUT[10]) ); // @49:19902 OR4 OR4_441 ( .Y(OR4_441_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19899 OR4 OR4_752 ( .Y(OR4_752_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19896 OR4 OR4_1256 ( .Y(OR4_1256_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19893 OR4 OR4_811 ( .Y(OR4_811_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19891 OR4 OR4_1061 ( .Y(OR4_1061_Y), .A(OR4_1203_Y), .B(OR4_16_Y), .C(OR4_112_Y), .D(OR4_25_Y) ); // @49:19889 OR4 OR4_571 ( .Y(OR4_571_Y), .A(OR4_346_Y), .B(OR4_191_Y), .C(OR4_1209_Y), .D(OR4_1074_Y) ); // @49:19886 OR4 OR4_129 ( .Y(OR4_129_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19883 OR4 OR4_1032 ( .Y(OR4_1032_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19881 OR4 OR4_937 ( .Y(OR4_937_Y), .A(OR4_397_Y), .B(OR4_841_Y), .C(OR4_1286_Y), .D(OR4_338_Y) ); // @49:19878 OR4 OR4_1107 ( .Y(OR4_1107_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19875 OR4 OR4_1165 ( .Y(OR4_1165_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19872 OR4 OR4_1298 ( .Y(OR4_1298_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19871 OR4 OR4_21 ( .Y(OR4_21_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19868 OR4 OR4_501 ( .Y(OR4_501_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19866 OR4 OR4_714 ( .Y(OR4_714_Y), .A(OR4_848_Y), .B(OR4_407_Y), .C(OR4_856_Y), .D(OR4_362_Y) ); // @49:19864 OR4 OR4_487 ( .Y(OR4_487_Y), .A(OR4_0_Y), .B(OR2_19_Y), .C(GND), .D(GND) ); // @49:19862 OR4 OR4_36 ( .Y(OR4_36_Y), .A(OR4_549_Y), .B(OR4_794_Y), .C(OR4_995_Y), .D(OR4_832_Y) ); // @49:19861 OR4 OR4_717 ( .Y(OR4_717_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19818 OR4 OR4_141 ( .Y(OR4_141_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19817 OR4 OR4_185 ( .Y(OR4_185_Y), .A(miv_rv32_ram_singleport_lp_R8C0_A_DOUT[11]), .B(miv_rv32_ram_singleport_lp_R9C0_A_DOUT[11]), .C(miv_rv32_ram_singleport_lp_R10C0_A_DOUT[11]), .D(miv_rv32_ram_singleport_lp_R11C0_A_DOUT[11]) ); // @49:19815 OR4 OR4_863 ( .Y(OR4_863_Y), .A(OR4_135_Y), .B(OR4_6_Y), .C(OR4_102_Y), .D(OR4_424_Y) ); // @49:19739 RAM1K20 miv_rv32_ram_singleport_lp_R17C0 ( .A_ADDR({req_addr_mux_3[10:2], GND, GND, GND, GND, GND}), .A_BLK_EN({Z_BLKY2_4_, Z_BLKY1_0_, req_addr_mux_3[11]}), .A_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .A_DIN({GND, GND, un10_req_wr_data_mux[31:24], GND, GND, un10_req_wr_data_mux[23:16]}), .A_DOUT(miv_rv32_ram_singleport_lp_R17C0_A_DOUT[19:0]), .A_WEN({VCC, VCC}), .A_REN(VCC), .A_WIDTH({VCC, GND, VCC}), .A_WMODE({GND, GND}), .A_BYPASS(VCC), .A_DOUT_EN(VCC), .A_DOUT_SRST_N(VCC), .A_DOUT_ARST_N(VCC), .B_ADDR({req_addr_mux_3[10:2], GND, GND, GND, GND, GND}), .B_BLK_EN({Z_BLKX2_4_, Z_BLKX1_0_, req_addr_mux_3[11]}), .B_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .B_DIN({GND, GND, un10_req_wr_data_mux[15:8], GND, GND, un10_req_wr_data_mux[7:0]}), .B_DOUT(miv_rv32_ram_singleport_lp_R17C0_B_DOUT[19:0]), .B_WEN({VCC, VCC}), .B_REN(VCC), .B_WIDTH({VCC, GND, VCC}), .B_WMODE({GND, GND}), .B_BYPASS(VCC), .B_DOUT_EN(VCC), .B_DOUT_SRST_N(VCC), .B_DOUT_ARST_N(VCC), .ECC_EN(GND), .ECC_BYPASS(GND), .SB_CORRECT(miv_rv32_ram_singleport_lp_R17C0_SB_CORRECT), .DB_DETECT(miv_rv32_ram_singleport_lp_R17C0_DB_DETECT), .BUSY_FB(GND), .ACCESS_BUSY(Z_ACCESS_BUSY_17__0_) ); defparam miv_rv32_ram_singleport_lp_R17C0.RAMINDEX="PF_TPSRAM_MAX_0%9216-9216%32-32%POWER%17%0%TWO-PORT%ECC_EN-0"; // @49:19735 OR4 OR4_344 ( .Y(OR4_344_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19732 OR4 OR4_328 ( .Y(OR4_328_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19729 OR4 OR4_1194 ( .Y(OR4_1194_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19727 OR4 OR4_355 ( .Y(OR4_355_Y), .A(OR4_851_Y), .B(OR4_723_Y), .C(OR4_812_Y), .D(OR4_616_Y) ); // @49:19724 OR4 OR4_360 ( .Y(OR4_360_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19722 OR4 OR4_991 ( .Y(OR4_991_Y), .A(OR4_1284_Y), .B(OR4_175_Y), .C(OR4_1094_Y), .D(OR4_876_Y) ); // @49:19721 OR4 OR4_65 ( .Y(OR4_65_Y), .A(miv_rv32_ram_singleport_lp_R16C0_B_DOUT[16]), .B(miv_rv32_ram_singleport_lp_R17C0_B_DOUT[16]), .C(GND), .D(GND) ); // @49:19682 OR4 OR4_1018 ( .Y(OR4_1018_Y), .A(miv_rv32_ram_singleport_lp_R16C0_B_DOUT[6]), .B(miv_rv32_ram_singleport_lp_R17C0_B_DOUT[6]), .C(GND), .D(GND) ); // @49:19681 OR4 OR4_94 ( .Y(OR4_94_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19679 OR4 OR4_819 ( .Y(OR4_819_Y), .A(OR4_146_Y), .B(OR4_972_Y), .C(OR4_1179_Y), .D(OR4_324_Y) ); // @49:19676 OR4 OR4_126 ( .Y(OR4_126_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19674 OR4 OR4_831 ( .Y(OR4_831_Y), .A(OR4_646_Y), .B(OR4_1306_Y), .C(OR4_438_Y), .D(OR4_1251_Y) ); // @49:19671 OR4 OR4_1089 ( .Y(OR4_1089_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19668 OR4 OR4_1249 ( .Y(OR4_1249_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19665 OR4 OR4_262 ( .Y(OR4_262_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19664 OR4 OR4_1268 ( .Y(OR4_1268_Y), .A(miv_rv32_ram_singleport_lp_R0C0_A_DOUT[5]), .B(miv_rv32_ram_singleport_lp_R1C0_A_DOUT[5]), .C(miv_rv32_ram_singleport_lp_R2C0_A_DOUT[5]), .D(miv_rv32_ram_singleport_lp_R3C0_A_DOUT[5]) ); // @49:19661 OR4 OR4_429 ( .Y(OR4_429_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19658 OR4 OR4_254 ( .Y(OR4_254_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19656 OR4 OR4_199 ( .Y(OR4_199_Y), .A(OR4_922_Y), .B(OR4_1144_Y), .C(OR4_1290_Y), .D(OR4_1102_Y) ); // @49:19653 OR4 OR4_23 ( .Y(OR4_23_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19651 OR4 OR4_1274 ( .Y(OR4_1274_Y), .A(OR4_141_Y), .B(OR4_400_Y), .C(OR4_583_Y), .D(OR4_442_Y) ); // @49:19648 OR4 OR4_734 ( .Y(OR4_734_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19645 OR4 OR4_753 ( .Y(OR4_753_Y), .A(miv_rv32_ram_singleport_lp_R16C0_A_DOUT[5]), .B(miv_rv32_ram_singleport_lp_R17C0_A_DOUT[5]), .C(GND), .D(GND) ); // @49:19644 OR4 OR4_278 ( .Y(OR4_278_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19641 OR4 OR4_422 ( .Y(OR4_422_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19638 OR4 OR4_737 ( .Y(OR4_737_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19635 OR4 OR4_671 ( .Y(OR4_671_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19632 OR4 OR4_473 ( .Y(OR4_473_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19630 OR4 OR4_720 ( .Y(OR4_720_Y), .A(OR4_1087_Y), .B(OR4_24_Y), .C(OR4_220_Y), .D(OR4_73_Y) ); // @49:19627 OR4 OR4_323 ( .Y(OR4_323_Y), .A(miv_rv32_ram_singleport_lp_R4C0_B_DOUT[10]), .B(miv_rv32_ram_singleport_lp_R5C0_B_DOUT[10]), .C(miv_rv32_ram_singleport_lp_R6C0_B_DOUT[10]), .D(miv_rv32_ram_singleport_lp_R7C0_B_DOUT[10]) ); // @49:19625 OR4 \OR4_R_DATA[19] ( .Y(tcm0_d_resp_rd_data_net[19]), .A(OR4_426_Y), .B(OR4_123_Y), .C(OR4_36_Y), .D(OR4_1130_Y) ); // @49:19622 OR4 OR4_219 ( .Y(OR4_219_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19620 OR4 OR4_208 ( .Y(OR4_208_Y), .A(OR4_162_Y), .B(OR2_16_Y), .C(GND), .D(GND) ); // @49:19617 OR4 OR4_1164 ( .Y(OR4_1164_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19612 OR4 OR4_601 ( .Y(OR4_601_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19609 OR4 OR4_1153 ( .Y(OR4_1153_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19606 OR4 OR4_403 ( .Y(OR4_403_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19603 OR4 OR4_561 ( .Y(OR4_561_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19601 OR4 OR4_1272 ( .Y(OR4_1272_Y), .A(OR4_949_Y), .B(OR4_1174_Y), .C(OR4_755_Y), .D(OR4_551_Y) ); // @49:19598 OR4 OR4_157 ( .Y(OR4_157_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19595 OR4 OR4_1009 ( .Y(OR4_1009_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19593 OR4 OR4_398 ( .Y(OR4_398_Y), .A(OR4_1138_Y), .B(OR4_188_Y), .C(OR4_957_Y), .D(OR4_1210_Y) ); // @49:19590 OR4 OR4_257 ( .Y(OR4_257_Y), .A(miv_rv32_ram_singleport_lp_R12C0_A_DOUT[4]), .B(miv_rv32_ram_singleport_lp_R13C0_A_DOUT[4]), .C(miv_rv32_ram_singleport_lp_R14C0_A_DOUT[4]), .D(miv_rv32_ram_singleport_lp_R15C0_A_DOUT[4]) ); // @49:19589 OR4 OR4_1286 ( .Y(OR4_1286_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19586 OR4 OR4_646 ( .Y(OR4_646_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19585 OR4 OR4_872 ( .Y(OR4_872_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19545 OR4 OR4_839 ( .Y(OR4_839_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19544 OR4 OR4_915 ( .Y(OR4_915_Y), .A(miv_rv32_ram_singleport_lp_R8C0_B_DOUT[16]), .B(miv_rv32_ram_singleport_lp_R9C0_B_DOUT[16]), .C(miv_rv32_ram_singleport_lp_R10C0_B_DOUT[16]), .D(miv_rv32_ram_singleport_lp_R11C0_B_DOUT[16]) ); // @49:19541 OR4 OR4_1013 ( .Y(OR4_1013_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19538 OR4 OR4_1270 ( .Y(OR4_1270_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19536 OR4 OR4_275 ( .Y(OR4_275_Y), .A(OR4_780_Y), .B(OR4_1042_Y), .C(OR4_1229_Y), .D(OR4_1079_Y) ); // @49:19534 OR4 OR4_112 ( .Y(OR4_112_Y), .A(OR4_381_Y), .B(OR4_888_Y), .C(OR4_10_Y), .D(OR4_378_Y) ); // @49:19531 OR4 OR4_802 ( .Y(OR4_802_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19529 OR4 OR4_196 ( .Y(OR4_196_Y), .A(OR4_1109_Y), .B(OR4_810_Y), .C(OR4_1257_Y), .D(OR4_762_Y) ); // @49:19526 OR4 OR4_810 ( .Y(OR4_810_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19525 OR4 OR4_984 ( .Y(OR4_984_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19524 OR4 OR4_188 ( .Y(OR4_188_Y), .A(miv_rv32_ram_singleport_lp_R4C0_B_DOUT[3]), .B(miv_rv32_ram_singleport_lp_R5C0_B_DOUT[3]), .C(miv_rv32_ram_singleport_lp_R6C0_B_DOUT[3]), .D(miv_rv32_ram_singleport_lp_R7C0_B_DOUT[3]) ); // @49:19521 OR4 OR4_887 ( .Y(OR4_887_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19518 OR4 OR4_205 ( .Y(OR4_205_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19515 OR4 OR4_1308 ( .Y(OR4_1308_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19512 OR4 OR4_88 ( .Y(OR4_88_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19509 OR4 OR4_499 ( .Y(OR4_499_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19506 OR4 OR4_520 ( .Y(OR4_520_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19465 OR4 OR4_492 ( .Y(OR4_492_Y), .A(OR4_931_Y), .B(OR4_1193_Y), .C(OR4_737_Y), .D(OR4_110_Y) ); // @49:19462 OR4 OR4_1011 ( .Y(OR4_1011_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19460 OR4 OR4_1206 ( .Y(OR4_1206_Y), .A(OR4_340_Y), .B(OR4_559_Y), .C(OR4_553_Y), .D(OR4_763_Y) ); // @49:19457 OR4 OR4_477 ( .Y(OR4_477_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19454 OR4 OR4_529 ( .Y(OR4_529_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19453 OR4 OR4_42 ( .Y(OR4_42_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19450 OR4 OR4_239 ( .Y(OR4_239_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19449 OR4 OR4_1115 ( .Y(OR4_1115_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19446 OR4 OR4_790 ( .Y(OR4_790_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19443 OR4 OR4_393 ( .Y(OR4_393_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19440 OR4 OR4_175 ( .Y(OR4_175_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19436 OR4 OR4_407 ( .Y(OR4_407_Y), .A(OR4_730_Y), .B(OR4_108_Y), .C(OR4_748_Y), .D(OR4_959_Y) ); // @49:19434 OR4 OR4_788 ( .Y(OR4_788_Y), .A(OR4_252_Y), .B(OR4_534_Y), .C(OR4_960_Y), .D(OR4_488_Y) ); // @49:19394 OR4 OR4_105 ( .Y(OR4_105_Y), .A(OR4_1045_Y), .B(OR4_816_Y), .C(OR4_604_Y), .D(OR4_1258_Y) ); // @49:19392 OR4 OR4_180 ( .Y(OR4_180_Y), .A(OR4_90_Y), .B(OR4_452_Y), .C(OR4_1219_Y), .D(OR4_158_Y) ); // @49:19389 OR4 OR4_387 ( .Y(OR4_387_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19350 OR4 OR4_268 ( .Y(OR4_268_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19349 OR4 OR4_756 ( .Y(OR4_756_Y), .A(miv_rv32_ram_singleport_lp_R8C0_A_DOUT[16]), .B(miv_rv32_ram_singleport_lp_R9C0_A_DOUT[16]), .C(miv_rv32_ram_singleport_lp_R10C0_A_DOUT[16]), .D(miv_rv32_ram_singleport_lp_R11C0_A_DOUT[16]) ); // @49:19309 OR4 OR4_428 ( .Y(OR4_428_Y), .A(OR4_678_Y), .B(OR4_208_Y), .C(OR4_631_Y), .D(OR4_994_Y) ); // @49:19307 OR4 OR4_657 ( .Y(OR4_657_Y), .A(OR4_45_Y), .B(OR4_443_Y), .C(OR4_419_Y), .D(OR4_1036_Y) ); // @49:19304 OR4 OR4_661 ( .Y(OR4_661_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19301 OR4 OR4_755 ( .Y(OR4_755_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19298 OR4 OR4_463 ( .Y(OR4_463_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19296 OR4 OR4_935 ( .Y(OR4_935_Y), .A(OR4_578_Y), .B(OR4_1207_Y), .C(OR4_279_Y), .D(OR4_521_Y) ); // @49:19293 OR4 OR4_421 ( .Y(OR4_421_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19290 OR4 OR4_845 ( .Y(OR4_845_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19288 OR4 OR4_7 ( .Y(OR4_7_Y), .A(OR4_974_Y), .B(OR4_120_Y), .C(OR4_749_Y), .D(OR4_962_Y) ); // @49:19287 OR4 OR4_132 ( .Y(OR4_132_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19284 OR4 OR4_113 ( .Y(OR4_113_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19281 OR4 OR4_680 ( .Y(OR4_680_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19241 OR4 OR4_1177 ( .Y(OR4_1177_Y), .A(OR4_178_Y), .B(OR4_439_Y), .C(OR4_620_Y), .D(OR4_476_Y) ); // @49:19240 OR4 OR4_830 ( .Y(OR4_830_Y), .A(miv_rv32_ram_singleport_lp_R4C0_A_DOUT[2]), .B(miv_rv32_ram_singleport_lp_R5C0_A_DOUT[2]), .C(miv_rv32_ram_singleport_lp_R6C0_A_DOUT[2]), .D(miv_rv32_ram_singleport_lp_R7C0_A_DOUT[2]) ); // @49:19238 OR4 \OR4_R_DATA[18] ( .Y(tcm0_d_resp_rd_data_net[18]), .A(OR4_1243_Y), .B(OR4_1071_Y), .C(OR4_482_Y), .D(OR4_649_Y) ); // @49:19198 OR4 OR4_910 ( .Y(OR4_910_Y), .A(OR4_106_Y), .B(OR4_715_Y), .C(OR4_692_Y), .D(OR4_8_Y) ); // @49:19196 OR4 OR4_919 ( .Y(OR4_919_Y), .A(OR4_76_Y), .B(OR4_322_Y), .C(OR4_515_Y), .D(OR4_360_Y) ); // @49:19194 OR4 OR4_1142 ( .Y(OR4_1142_Y), .A(OR4_913_Y), .B(OR4_1204_Y), .C(OR4_33_Y), .D(OR4_986_Y) ); // @49:19191 OR4 OR4_1183 ( .Y(OR4_1183_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19186 OR4 OR4_121 ( .Y(OR4_121_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19184 OR4 OR4_590 ( .Y(OR4_590_Y), .A(OR4_1280_Y), .B(OR4_1152_Y), .C(OR4_1238_Y), .D(OR4_920_Y) ); // @49:19180 OR4 OR4_862 ( .Y(OR4_862_Y), .A(OR4_35_Y), .B(OR4_293_Y), .C(OR4_1163_Y), .D(OR4_532_Y) ); // @49:19177 OR4 OR4_1218 ( .Y(OR4_1218_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19175 OR2 OR2_14 ( .Y(OR2_14_Y), .A(GND), .B(GND) ); // @49:19172 OR4 OR4_599 ( .Y(OR4_599_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19171 OR4 OR4_49 ( .Y(OR4_49_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19170 OR4 OR4_1128 ( .Y(OR4_1128_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19167 OR4 OR4_265 ( .Y(OR4_265_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19164 OR4 OR4_324 ( .Y(OR4_324_Y), .A(miv_rv32_ram_singleport_lp_R12C0_A_DOUT[15]), .B(miv_rv32_ram_singleport_lp_R13C0_A_DOUT[15]), .C(miv_rv32_ram_singleport_lp_R14C0_A_DOUT[15]), .D(miv_rv32_ram_singleport_lp_R15C0_A_DOUT[15]) ); // @49:19161 OR4 OR4_1221 ( .Y(OR4_1221_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19126 RAM1K20 miv_rv32_ram_singleport_lp_R7C0 ( .A_ADDR({req_addr_mux_3[10:2], GND, GND, GND, GND, GND}), .A_BLK_EN({Z_BLKY2_1_, req_addr_mux_3[12:11]}), .A_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .A_DIN({GND, GND, un10_req_wr_data_mux[31:24], GND, GND, un10_req_wr_data_mux[23:16]}), .A_DOUT(miv_rv32_ram_singleport_lp_R7C0_A_DOUT[19:0]), .A_WEN({VCC, VCC}), .A_REN(VCC), .A_WIDTH({VCC, GND, VCC}), .A_WMODE({GND, GND}), .A_BYPASS(VCC), .A_DOUT_EN(VCC), .A_DOUT_SRST_N(VCC), .A_DOUT_ARST_N(VCC), .B_ADDR({req_addr_mux_3[10:2], GND, GND, GND, GND, GND}), .B_BLK_EN({Z_BLKX2_1_, req_addr_mux_3[12:11]}), .B_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .B_DIN({GND, GND, un10_req_wr_data_mux[15:8], GND, GND, un10_req_wr_data_mux[7:0]}), .B_DOUT(miv_rv32_ram_singleport_lp_R7C0_B_DOUT[19:0]), .B_WEN({VCC, VCC}), .B_REN(VCC), .B_WIDTH({VCC, GND, VCC}), .B_WMODE({GND, GND}), .B_BYPASS(VCC), .B_DOUT_EN(VCC), .B_DOUT_SRST_N(VCC), .B_DOUT_ARST_N(VCC), .ECC_EN(GND), .ECC_BYPASS(GND), .SB_CORRECT(miv_rv32_ram_singleport_lp_R7C0_SB_CORRECT), .DB_DETECT(miv_rv32_ram_singleport_lp_R7C0_DB_DETECT), .BUSY_FB(GND), .ACCESS_BUSY(Z_ACCESS_BUSY_7__0_) ); defparam miv_rv32_ram_singleport_lp_R7C0.RAMINDEX="PF_TPSRAM_MAX_0%9216-9216%32-32%POWER%7%0%TWO-PORT%ECC_EN-0"; // @49:19123 OR2 OR2_30 ( .Y(OR2_30_Y), .A(GND), .B(GND) ); // @49:19120 OR4 OR4_1294 ( .Y(OR4_1294_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19117 OR4 OR4_642 ( .Y(OR4_642_Y), .A(miv_rv32_ram_singleport_lp_R12C0_A_DOUT[7]), .B(miv_rv32_ram_singleport_lp_R13C0_A_DOUT[7]), .C(miv_rv32_ram_singleport_lp_R14C0_A_DOUT[7]), .D(miv_rv32_ram_singleport_lp_R15C0_A_DOUT[7]) ); // @49:19112 OR4 OR4_951 ( .Y(OR4_951_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19109 OR4 OR4_1126 ( .Y(OR4_1126_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19106 OR4 OR4_613 ( .Y(OR4_613_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19105 OR4 OR4_685 ( .Y(OR4_685_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19102 OR4 OR4_1114 ( .Y(OR4_1114_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19099 OR4 OR4_648 ( .Y(OR4_648_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19096 OR4 OR4_1103 ( .Y(OR4_1103_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19093 OR4 OR4_467 ( .Y(OR4_467_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19092 OR4 OR4_92 ( .Y(OR4_92_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19090 OR4 OR4_986 ( .Y(OR4_986_Y), .A(OR4_1169_Y), .B(OR4_310_Y), .C(OR4_930_Y), .D(OR4_1155_Y) ); // @49:19087 OR4 OR4_498 ( .Y(OR4_498_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19084 OR4 OR4_515 ( .Y(OR4_515_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19081 OR4 OR4_133 ( .Y(OR4_133_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19080 OR4 OR4_1292 ( .Y(OR4_1292_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19039 OR4 OR4_165 ( .Y(OR4_165_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19036 OR4 OR4_491 ( .Y(OR4_491_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19033 OR4 OR4_159 ( .Y(OR4_159_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19030 OR4 OR4_782 ( .Y(OR4_782_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19027 OR4 OR4_930 ( .Y(OR4_930_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19025 OR4 OR4_939 ( .Y(OR4_939_Y), .A(OR4_1192_Y), .B(OR4_643_Y), .C(OR4_909_Y), .D(OR4_273_Y) ); // @49:19022 OR4 OR4_974 ( .Y(OR4_974_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19017 OR4 OR4_178 ( .Y(OR4_178_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19015 OR4 \OR4_R_DATA[30] ( .Y(tcm0_d_resp_rd_data_net[30]), .A(OR4_69_Y), .B(OR4_361_Y), .C(OR4_948_Y), .D(OR4_461_Y) ); // @49:19012 OR4 OR4_877 ( .Y(OR4_877_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19011 OR4 OR4_87 ( .Y(OR4_87_Y), .A(miv_rv32_ram_singleport_lp_R8C0_B_DOUT[13]), .B(miv_rv32_ram_singleport_lp_R9C0_B_DOUT[13]), .C(miv_rv32_ram_singleport_lp_R10C0_B_DOUT[13]), .D(miv_rv32_ram_singleport_lp_R11C0_B_DOUT[13]) ); // @49:19010 OR4 OR4_1 ( .Y(OR4_1_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19008 OR4 OR4_948 ( .Y(OR4_948_Y), .A(OR4_477_Y), .B(OR4_331_Y), .C(OR4_1167_Y), .D(OR4_272_Y) ); // @49:19005 OR4 OR4_904 ( .Y(OR4_904_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19004 OR4 OR4_1129 ( .Y(OR4_1129_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19003 OR4 OR4_1290 ( .Y(OR4_1290_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:19000 OR4 OR4_191 ( .Y(OR4_191_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18999 OR4 OR4_108 ( .Y(OR4_108_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18997 OR4 OR4_807 ( .Y(OR4_807_Y), .A(OR4_63_Y), .B(OR4_306_Y), .C(OR4_1181_Y), .D(OR4_547_Y) ); // @49:18994 OR4 OR4_80 ( .Y(OR4_80_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18993 OR4 OR4_1138 ( .Y(OR4_1138_Y), .A(miv_rv32_ram_singleport_lp_R0C0_B_DOUT[3]), .B(miv_rv32_ram_singleport_lp_R1C0_B_DOUT[3]), .C(miv_rv32_ram_singleport_lp_R2C0_B_DOUT[3]), .D(miv_rv32_ram_singleport_lp_R3C0_B_DOUT[3]) ); // @49:18992 OR4 OR4_1231 ( .Y(OR4_1231_Y), .A(miv_rv32_ram_singleport_lp_R0C0_B_DOUT[16]), .B(miv_rv32_ram_singleport_lp_R1C0_B_DOUT[16]), .C(miv_rv32_ram_singleport_lp_R2C0_B_DOUT[16]), .D(miv_rv32_ram_singleport_lp_R3C0_B_DOUT[16]) ); // @49:18989 OR4 OR4_358 ( .Y(OR4_358_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18986 OR4 OR4_1264 ( .Y(OR4_1264_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18983 OR4 OR4_1079 ( .Y(OR4_1079_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18980 OR4 OR4_394 ( .Y(OR4_394_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18978 OR4 OR4_243 ( .Y(OR4_243_Y), .A(OR4_483_Y), .B(OR4_1299_Y), .C(OR4_185_Y), .D(OR4_641_Y) ); // @49:18973 OR4 OR4_778 ( .Y(OR4_778_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18970 OR4 OR4_385 ( .Y(OR4_385_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18969 OR4 OR4_1136 ( .Y(OR4_1136_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18967 OR4 \OR4_R_DATA[31] ( .Y(tcm0_d_resp_rd_data_net[31]), .A(OR4_308_Y), .B(OR4_249_Y), .C(OR4_270_Y), .D(OR4_1176_Y) ); // @49:18964 OR4 OR4_633 ( .Y(OR4_633_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18963 OR4 OR4_31 ( .Y(OR4_31_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18960 OR4 OR4_626 ( .Y(OR4_626_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18959 OR4 OR4_708 ( .Y(OR4_708_Y), .A(miv_rv32_ram_singleport_lp_R0C0_B_DOUT[4]), .B(miv_rv32_ram_singleport_lp_R1C0_B_DOUT[4]), .C(miv_rv32_ram_singleport_lp_R2C0_B_DOUT[4]), .D(miv_rv32_ram_singleport_lp_R3C0_B_DOUT[4]) ); // @49:18958 OR4 OR4_170 ( .Y(OR4_170_Y), .A(miv_rv32_ram_singleport_lp_R8C0_B_DOUT[7]), .B(miv_rv32_ram_singleport_lp_R9C0_B_DOUT[7]), .C(miv_rv32_ram_singleport_lp_R10C0_B_DOUT[7]), .D(miv_rv32_ram_singleport_lp_R11C0_B_DOUT[7]) ); // @49:18957 OR4 OR4_377 ( .Y(OR4_377_Y), .A(miv_rv32_ram_singleport_lp_R0C0_B_DOUT[1]), .B(miv_rv32_ram_singleport_lp_R1C0_B_DOUT[1]), .C(miv_rv32_ram_singleport_lp_R2C0_B_DOUT[1]), .D(miv_rv32_ram_singleport_lp_R3C0_B_DOUT[1]) ); // @49:18956 OR4 OR4_68 ( .Y(OR4_68_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18952 OR2 OR2_24 ( .Y(OR2_24_Y), .A(GND), .B(GND) ); // @49:18949 OR4 OR4_813 ( .Y(OR4_813_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18948 OR4 OR4_1262 ( .Y(OR4_1262_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18945 OR4 OR4_535 ( .Y(OR4_535_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18942 OR4 OR4_1223 ( .Y(OR4_1223_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18940 OR4 OR4_156 ( .Y(OR4_156_Y), .A(OR4_387_Y), .B(OR4_835_Y), .C(OR4_167_Y), .D(OR4_376_Y) ); // @49:18901 OR4 OR4_99 ( .Y(OR4_99_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18897 OR4 OR4_100 ( .Y(OR4_100_Y), .A(OR4_530_Y), .B(OR4_726_Y), .C(OR4_884_Y), .D(OR4_598_Y) ); // @49:18895 OR4 OR4_307 ( .Y(OR4_307_Y), .A(OR4_180_Y), .B(OR4_608_Y), .C(OR4_317_Y), .D(OR4_314_Y) ); // @49:18892 OR4 OR4_459 ( .Y(OR4_459_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18890 OR4 OR4_670 ( .Y(OR4_670_Y), .A(OR4_433_Y), .B(OR4_625_Y), .C(OR4_766_Y), .D(OR4_703_Y) ); // @49:18889 OR4 OR4_1046 ( .Y(OR4_1046_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18888 OR4 OR4_5 ( .Y(OR4_5_Y), .A(miv_rv32_ram_singleport_lp_R16C0_B_DOUT[1]), .B(miv_rv32_ram_singleport_lp_R17C0_B_DOUT[1]), .C(GND), .D(GND) ); // @49:18885 OR4 OR4_310 ( .Y(OR4_310_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18883 OR4 OR4_284 ( .Y(OR4_284_Y), .A(OR4_914_Y), .B(OR4_449_Y), .C(OR4_632_Y), .D(OR4_1100_Y) ); // @49:18882 OR4 OR4_452 ( .Y(OR4_452_Y), .A(miv_rv32_ram_singleport_lp_R4C0_B_DOUT[6]), .B(miv_rv32_ram_singleport_lp_R5C0_B_DOUT[6]), .C(miv_rv32_ram_singleport_lp_R6C0_B_DOUT[6]), .D(miv_rv32_ram_singleport_lp_R7C0_B_DOUT[6]) ); // @49:18843 OR4 OR4_600 ( .Y(OR4_600_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18841 OR4 OR4_1276 ( .Y(OR4_1276_Y), .A(OR4_802_Y), .B(OR2_3_Y), .C(GND), .D(GND) ); // @49:18800 OR4 OR4_783 ( .Y(OR4_783_Y), .A(OR4_1108_Y), .B(OR2_4_Y), .C(GND), .D(GND) ); // @49:18795 OR4 OR4_1260 ( .Y(OR4_1260_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18792 OR4 OR4_750 ( .Y(OR4_750_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18790 OR4 OR4_1139 ( .Y(OR4_1139_Y), .A(OR4_29_Y), .B(OR4_842_Y), .C(OR4_1054_Y), .D(OR4_207_Y) ); // @49:18787 OR4 OR4_353 ( .Y(OR4_353_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18784 OR4 OR4_1197 ( .Y(OR4_1197_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18783 OR4 OR4_212 ( .Y(OR4_212_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18781 OR4 OR4_1052 ( .Y(OR4_1052_Y), .A(miv_rv32_ram_singleport_lp_R8C0_B_DOUT[14]), .B(miv_rv32_ram_singleport_lp_R9C0_B_DOUT[14]), .C(miv_rv32_ram_singleport_lp_R10C0_B_DOUT[14]), .D(miv_rv32_ram_singleport_lp_R11C0_B_DOUT[14]) ); // @49:18702 OR4 OR4_187 ( .Y(OR4_187_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18699 OR4 OR4_964 ( .Y(OR4_964_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18697 OR4 OR4_168 ( .Y(OR4_168_Y), .A(OR4_284_Y), .B(OR4_996_Y), .C(OR4_196_Y), .D(OR4_805_Y) ); // @49:18694 OR4 OR4_867 ( .Y(OR4_867_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18690 OR4 OR4_33 ( .Y(OR4_33_Y), .A(OR4_981_Y), .B(OR4_1006_Y), .C(OR4_129_Y), .D(OR4_951_Y) ); // @49:18653 RAM1K20 miv_rv32_ram_singleport_lp_R5C0 ( .A_ADDR({req_addr_mux_3[10:2], GND, GND, GND, GND, GND}), .A_BLK_EN({Z_BLKY2_1_, Z_BLKY1_0_, req_addr_mux_3[11]}), .A_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .A_DIN({GND, GND, un10_req_wr_data_mux[31:24], GND, GND, un10_req_wr_data_mux[23:16]}), .A_DOUT(miv_rv32_ram_singleport_lp_R5C0_A_DOUT[19:0]), .A_WEN({VCC, VCC}), .A_REN(VCC), .A_WIDTH({VCC, GND, VCC}), .A_WMODE({GND, GND}), .A_BYPASS(VCC), .A_DOUT_EN(VCC), .A_DOUT_SRST_N(VCC), .A_DOUT_ARST_N(VCC), .B_ADDR({req_addr_mux_3[10:2], GND, GND, GND, GND, GND}), .B_BLK_EN({Z_BLKX2_1_, Z_BLKX1_0_, req_addr_mux_3[11]}), .B_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .B_DIN({GND, GND, un10_req_wr_data_mux[15:8], GND, GND, un10_req_wr_data_mux[7:0]}), .B_DOUT(miv_rv32_ram_singleport_lp_R5C0_B_DOUT[19:0]), .B_WEN({VCC, VCC}), .B_REN(VCC), .B_WIDTH({VCC, GND, VCC}), .B_WMODE({GND, GND}), .B_BYPASS(VCC), .B_DOUT_EN(VCC), .B_DOUT_SRST_N(VCC), .B_DOUT_ARST_N(VCC), .ECC_EN(GND), .ECC_BYPASS(GND), .SB_CORRECT(miv_rv32_ram_singleport_lp_R5C0_SB_CORRECT), .DB_DETECT(miv_rv32_ram_singleport_lp_R5C0_DB_DETECT), .BUSY_FB(GND), .ACCESS_BUSY(Z_ACCESS_BUSY_5__0_) ); defparam miv_rv32_ram_singleport_lp_R5C0.RAMINDEX="PF_TPSRAM_MAX_0%9216-9216%32-32%POWER%5%0%TWO-PORT%ECC_EN-0"; // @49:18651 OR4 OR4_86 ( .Y(OR4_86_Y), .A(miv_rv32_ram_singleport_lp_R0C0_A_DOUT[4]), .B(miv_rv32_ram_singleport_lp_R1C0_A_DOUT[4]), .C(miv_rv32_ram_singleport_lp_R2C0_A_DOUT[4]), .D(miv_rv32_ram_singleport_lp_R3C0_A_DOUT[4]) ); // @49:18650 OR4 OR4_287 ( .Y(OR4_287_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18647 OR4 OR4_675 ( .Y(OR4_675_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18645 OR4 OR4_696 ( .Y(OR4_696_Y), .A(OR4_1277_Y), .B(OR4_517_Y), .C(OR4_936_Y), .D(OR4_1307_Y) ); // @49:18643 OR4 OR4_825 ( .Y(OR4_825_Y), .A(OR4_1075_Y), .B(OR4_537_Y), .C(OR4_800_Y), .D(OR4_155_Y) ); // @49:18640 OR4 OR4_833 ( .Y(OR4_833_Y), .A(miv_rv32_ram_singleport_lp_R12C0_B_DOUT[17]), .B(miv_rv32_ram_singleport_lp_R13C0_B_DOUT[17]), .C(miv_rv32_ram_singleport_lp_R14C0_B_DOUT[17]), .D(miv_rv32_ram_singleport_lp_R15C0_B_DOUT[17]) ); // @49:18637 OR4 OR4_1233 ( .Y(OR4_1233_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18633 OR4 OR4_976 ( .Y(OR4_976_Y), .A(OR4_752_Y), .B(OR4_966_Y), .C(OR4_1126_Y), .D(OR4_823_Y) ); // @49:18632 OR4 OR4_511 ( .Y(OR4_511_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18629 OR4 OR4_605 ( .Y(OR4_605_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18626 OR4 OR4_768 ( .Y(OR4_768_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18623 OR4 OR4_772 ( .Y(OR4_772_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18622 OR4 OR4_906 ( .Y(OR4_906_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18619 OR4 OR4_330 ( .Y(OR4_330_Y), .A(miv_rv32_ram_singleport_lp_R12C0_B_DOUT[13]), .B(miv_rv32_ram_singleport_lp_R13C0_B_DOUT[13]), .C(miv_rv32_ram_singleport_lp_R14C0_B_DOUT[13]), .D(miv_rv32_ram_singleport_lp_R15C0_B_DOUT[13]) ); // @49:18617 OR4 \OR4_R_DATA[23] ( .Y(tcm0_d_resp_rd_data_net[23]), .A(OR4_687_Y), .B(OR4_351_Y), .C(OR4_298_Y), .D(OR4_264_Y) ); // @49:18616 OR4 OR4_550 ( .Y(OR4_550_Y), .A(miv_rv32_ram_singleport_lp_R4C0_B_DOUT[16]), .B(miv_rv32_ram_singleport_lp_R5C0_B_DOUT[16]), .C(miv_rv32_ram_singleport_lp_R6C0_B_DOUT[16]), .D(miv_rv32_ram_singleport_lp_R7C0_B_DOUT[16]) ); // @49:18613 OR4 OR4_1044 ( .Y(OR4_1044_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18611 OR4 OR4_559 ( .Y(OR4_559_Y), .A(OR4_753_Y), .B(OR4_967_Y), .C(OR4_570_Y), .D(OR4_369_Y) ); // @49:18608 OR4 OR4_702 ( .Y(OR4_702_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18606 OR2 OR2_12 ( .Y(OR2_12_Y), .A(GND), .B(GND) ); // @49:18603 OR4 OR4_160 ( .Y(OR4_160_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18600 OR4 OR4_367 ( .Y(OR4_367_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18599 OR4 OR4_45 ( .Y(OR4_45_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18596 OR4 OR4_543 ( .Y(OR4_543_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18593 OR4 OR4_1167 ( .Y(OR4_1167_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18591 OR4 \OR4_R_DATA[15] ( .Y(tcm0_d_resp_rd_data_net[15]), .A(OR4_1149_Y), .B(OR4_464_Y), .C(OR4_956_Y), .D(OR4_590_Y) ); // @49:18587 OR4 OR4_844 ( .Y(OR4_844_Y), .A(OR4_867_Y), .B(OR4_19_Y), .C(OR4_648_Y), .D(OR4_852_Y) ); // @49:18585 OR4 OR4_232 ( .Y(OR4_232_Y), .A(OR4_422_Y), .B(OR4_619_Y), .C(OR4_759_Y), .D(OR4_954_Y) ); // @49:18582 OR4 OR4_622 ( .Y(OR4_622_Y), .A(miv_rv32_ram_singleport_lp_R12C0_A_DOUT[16]), .B(miv_rv32_ram_singleport_lp_R13C0_A_DOUT[16]), .C(miv_rv32_ram_singleport_lp_R14C0_A_DOUT[16]), .D(miv_rv32_ram_singleport_lp_R15C0_A_DOUT[16]) ); // @49:18541 OR4 OR4_660 ( .Y(OR4_660_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18538 OR4 OR4_1229 ( .Y(OR4_1229_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18497 OR4 OR4_749 ( .Y(OR4_749_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18494 OR4 OR4_375 ( .Y(OR4_375_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18491 OR4 OR4_628 ( .Y(OR4_628_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18488 OR4 OR4_1173 ( .Y(OR4_1173_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18486 OR4 OR4_458 ( .Y(OR4_458_Y), .A(OR4_396_Y), .B(OR4_1012_Y), .C(OR4_87_Y), .D(OR4_330_Y) ); // @49:18484 OR4 OR4_786 ( .Y(OR4_786_Y), .A(OR4_1228_Y), .B(OR4_971_Y), .C(OR4_943_Y), .D(OR4_453_Y) ); // @49:18481 OR4 OR4_1214 ( .Y(OR4_1214_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18480 OR4 OR4_451 ( .Y(OR4_451_Y), .A(miv_rv32_ram_singleport_lp_R4C0_A_DOUT[6]), .B(miv_rv32_ram_singleport_lp_R5C0_A_DOUT[6]), .C(miv_rv32_ram_singleport_lp_R6C0_A_DOUT[6]), .D(miv_rv32_ram_singleport_lp_R7C0_A_DOUT[6]) ); // @49:18478 OR4 OR4_305 ( .Y(OR4_305_Y), .A(OR4_1005_Y), .B(OR4_412_Y), .C(OR4_383_Y), .D(OR4_1002_Y) ); // @49:18476 OR4 OR4_687 ( .Y(OR4_687_Y), .A(OR4_1131_Y), .B(OR4_854_Y), .C(OR4_831_Y), .D(OR4_339_Y) ); // @49:18474 OR4 OR4_785 ( .Y(OR4_785_Y), .A(OR4_615_Y), .B(OR4_1180_Y), .C(OR4_297_Y), .D(OR4_1125_Y) ); // @49:18471 OR4 OR4_67 ( .Y(OR4_67_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18468 OR4 OR4_895 ( .Y(OR4_895_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18465 OR4 OR4_1099 ( .Y(OR4_1099_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18462 OR4 OR4_531 ( .Y(OR4_531_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18427 RAM1K20 miv_rv32_ram_singleport_lp_R0C0 ( .A_ADDR({req_addr_mux_3[10:2], GND, GND, GND, GND, GND}), .A_BLK_EN({Z_BLKY2_0_, Z_BLKY1_0_, Z_BLKY0_0_}), .A_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .A_DIN({GND, GND, un10_req_wr_data_mux[31:24], GND, GND, un10_req_wr_data_mux[23:16]}), .A_DOUT(miv_rv32_ram_singleport_lp_R0C0_A_DOUT[19:0]), .A_WEN({VCC, VCC}), .A_REN(VCC), .A_WIDTH({VCC, GND, VCC}), .A_WMODE({GND, GND}), .A_BYPASS(VCC), .A_DOUT_EN(VCC), .A_DOUT_SRST_N(VCC), .A_DOUT_ARST_N(VCC), .B_ADDR({req_addr_mux_3[10:2], GND, GND, GND, GND, GND}), .B_BLK_EN({Z_BLKX2_0_, Z_BLKX1_0_, Z_BLKX0_0_}), .B_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .B_DIN({GND, GND, un10_req_wr_data_mux[15:8], GND, GND, un10_req_wr_data_mux[7:0]}), .B_DOUT(miv_rv32_ram_singleport_lp_R0C0_B_DOUT[19:0]), .B_WEN({VCC, VCC}), .B_REN(VCC), .B_WIDTH({VCC, GND, VCC}), .B_WMODE({GND, GND}), .B_BYPASS(VCC), .B_DOUT_EN(VCC), .B_DOUT_SRST_N(VCC), .B_DOUT_ARST_N(VCC), .ECC_EN(GND), .ECC_BYPASS(GND), .SB_CORRECT(miv_rv32_ram_singleport_lp_R0C0_SB_CORRECT), .DB_DETECT(miv_rv32_ram_singleport_lp_R0C0_DB_DETECT), .BUSY_FB(GND), .ACCESS_BUSY(Z_ACCESS_BUSY_0__0_) ); defparam miv_rv32_ram_singleport_lp_R0C0.RAMINDEX="PF_TPSRAM_MAX_0%9216-9216%32-32%POWER%0%0%TWO-PORT%ECC_EN-0"; // @49:18425 OR4 OR4_60 ( .Y(OR4_60_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18423 OR4 \OR4_R_DATA[22] ( .Y(tcm0_d_resp_rd_data_net[22]), .A(OR4_825_Y), .B(OR4_788_Y), .C(OR4_618_Y), .D(OR4_30_Y) ); // @49:18421 OR4 OR4_1212 ( .Y(OR4_1212_Y), .A(miv_rv32_ram_singleport_lp_R8C0_A_DOUT[2]), .B(miv_rv32_ram_singleport_lp_R9C0_A_DOUT[2]), .C(miv_rv32_ram_singleport_lp_R10C0_A_DOUT[2]), .D(miv_rv32_ram_singleport_lp_R11C0_A_DOUT[2]) ); // @49:18419 OR4 OR4_218 ( .Y(OR4_218_Y), .A(OR4_597_Y), .B(OR4_393_Y), .C(OR4_160_Y), .D(OR4_460_Y) ); // @49:18416 OR4 OR4_274 ( .Y(OR4_274_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18413 OR4 OR4_151 ( .Y(OR4_151_Y), .A(miv_rv32_ram_singleport_lp_R12C0_A_DOUT[2]), .B(miv_rv32_ram_singleport_lp_R13C0_A_DOUT[2]), .C(miv_rv32_ram_singleport_lp_R14C0_A_DOUT[2]), .D(miv_rv32_ram_singleport_lp_R15C0_A_DOUT[2]) ); // @49:18412 OR4 OR4_928 ( .Y(OR4_928_Y), .A(miv_rv32_ram_singleport_lp_R8C0_B_DOUT[2]), .B(miv_rv32_ram_singleport_lp_R9C0_B_DOUT[2]), .C(miv_rv32_ram_singleport_lp_R10C0_B_DOUT[2]), .D(miv_rv32_ram_singleport_lp_R11C0_B_DOUT[2]) ); // @49:18409 OR4 OR4_1082 ( .Y(OR4_1082_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18406 OR4 OR4_611 ( .Y(OR4_611_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18403 OR4 OR4_413 ( .Y(OR4_413_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18400 OR4 OR4_665 ( .Y(OR4_665_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18397 OR4 OR4_773 ( .Y(OR4_773_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18395 OR2 OR2_19 ( .Y(OR2_19_Y), .A(GND), .B(GND) ); // @49:18394 OR4 OR4_354 ( .Y(OR4_354_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18393 OR4 OR4_204 ( .Y(OR4_204_Y), .A(miv_rv32_ram_singleport_lp_R8C0_B_DOUT[1]), .B(miv_rv32_ram_singleport_lp_R9C0_B_DOUT[1]), .C(miv_rv32_ram_singleport_lp_R10C0_B_DOUT[1]), .D(miv_rv32_ram_singleport_lp_R11C0_B_DOUT[1]) ); // @49:18390 OR4 OR4_966 ( .Y(OR4_966_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18388 OR4 OR4_223 ( .Y(OR4_223_Y), .A(OR4_540_Y), .B(OR4_417_Y), .C(OR4_513_Y), .D(OR4_826_Y) ); // @49:18385 OR4 OR4_703 ( .Y(OR4_703_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18382 OR4 OR4_1210 ( .Y(OR4_1210_Y), .A(miv_rv32_ram_singleport_lp_R12C0_B_DOUT[3]), .B(miv_rv32_ram_singleport_lp_R13C0_B_DOUT[3]), .C(miv_rv32_ram_singleport_lp_R14C0_B_DOUT[3]), .D(miv_rv32_ram_singleport_lp_R15C0_B_DOUT[3]) ); // @49:18379 OR4 OR4_692 ( .Y(OR4_692_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18377 OR4 OR4_1239 ( .Y(OR4_1239_Y), .A(OR4_469_Y), .B(OR4_1088_Y), .C(OR4_147_Y), .D(OR4_408_Y) ); // @49:18376 OR4 OR4_349 ( .Y(OR4_349_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18373 OR4 OR4_762 ( .Y(OR4_762_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18370 OR4 OR4_1296 ( .Y(OR4_1296_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18367 OR4 OR4_981 ( .Y(OR4_981_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18364 OR4 OR4_177 ( .Y(OR4_177_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18362 OR2 OR2_22 ( .Y(OR2_22_Y), .A(GND), .B(GND) ); // @49:18361 OR4 OR4_95 ( .Y(OR4_95_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18360 OR4 OR4_698 ( .Y(OR4_698_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18357 OR4 OR4_277 ( .Y(OR4_277_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18354 OR4 OR4_812 ( .Y(OR4_812_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18313 OR4 OR4_1069 ( .Y(OR4_1069_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18310 OR4 OR4_1002 ( .Y(OR4_1002_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18308 OR4 OR4_107 ( .Y(OR4_107_Y), .A(OR4_81_Y), .B(OR4_325_Y), .C(OR4_520_Y), .D(OR4_367_Y) ); // @49:18307 OR4 OR4_1245 ( .Y(OR4_1245_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18306 OR4 OR4_215 ( .Y(OR4_215_Y), .A(miv_rv32_ram_singleport_lp_R8C0_B_DOUT[0]), .B(miv_rv32_ram_singleport_lp_R9C0_B_DOUT[0]), .C(miv_rv32_ram_singleport_lp_R10C0_B_DOUT[0]), .D(miv_rv32_ram_singleport_lp_R11C0_B_DOUT[0]) ); // @49:18303 OR4 OR4_207 ( .Y(OR4_207_Y), .A(miv_rv32_ram_singleport_lp_R12C0_A_DOUT[12]), .B(miv_rv32_ram_singleport_lp_R13C0_A_DOUT[12]), .C(miv_rv32_ram_singleport_lp_R14C0_A_DOUT[12]), .D(miv_rv32_ram_singleport_lp_R15C0_A_DOUT[12]) ); // @49:18302 OR4 OR4_0 ( .Y(OR4_0_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18299 OR4 OR4_189 ( .Y(OR4_189_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18258 OR2 OR2_8 ( .Y(OR2_8_Y), .A(GND), .B(GND) ); // @49:18179 OR4 OR4_238 ( .Y(OR4_238_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18176 OR4 OR4_365 ( .Y(OR4_365_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18175 OR4 OR4_631 ( .Y(OR4_631_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18172 OR4 OR4_433 ( .Y(OR4_433_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18169 OR4 OR4_417 ( .Y(OR4_417_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18166 OR4 OR4_998 ( .Y(OR4_998_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18163 OR4 OR4_66 ( .Y(OR4_66_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18128 RAM1K20 miv_rv32_ram_singleport_lp_R9C0 ( .A_ADDR({req_addr_mux_3[10:2], GND, GND, GND, GND, GND}), .A_BLK_EN({Z_BLKY2_2_, Z_BLKY1_0_, req_addr_mux_3[11]}), .A_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .A_DIN({GND, GND, un10_req_wr_data_mux[31:24], GND, GND, un10_req_wr_data_mux[23:16]}), .A_DOUT(miv_rv32_ram_singleport_lp_R9C0_A_DOUT[19:0]), .A_WEN({VCC, VCC}), .A_REN(VCC), .A_WIDTH({VCC, GND, VCC}), .A_WMODE({GND, GND}), .A_BYPASS(VCC), .A_DOUT_EN(VCC), .A_DOUT_SRST_N(VCC), .A_DOUT_ARST_N(VCC), .B_ADDR({req_addr_mux_3[10:2], GND, GND, GND, GND, GND}), .B_BLK_EN({Z_BLKX2_2_, Z_BLKX1_0_, req_addr_mux_3[11]}), .B_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .B_DIN({GND, GND, un10_req_wr_data_mux[15:8], GND, GND, un10_req_wr_data_mux[7:0]}), .B_DOUT(miv_rv32_ram_singleport_lp_R9C0_B_DOUT[19:0]), .B_WEN({VCC, VCC}), .B_REN(VCC), .B_WIDTH({VCC, GND, VCC}), .B_WMODE({GND, GND}), .B_BYPASS(VCC), .B_DOUT_EN(VCC), .B_DOUT_SRST_N(VCC), .B_DOUT_ARST_N(VCC), .ECC_EN(GND), .ECC_BYPASS(GND), .SB_CORRECT(miv_rv32_ram_singleport_lp_R9C0_SB_CORRECT), .DB_DETECT(miv_rv32_ram_singleport_lp_R9C0_DB_DETECT), .BUSY_FB(GND), .ACCESS_BUSY(Z_ACCESS_BUSY_9__0_) ); defparam miv_rv32_ram_singleport_lp_R9C0.RAMINDEX="PF_TPSRAM_MAX_0%9216-9216%32-32%POWER%9%0%TWO-PORT%ECC_EN-0"; // @49:18126 OR4 OR4_115 ( .Y(OR4_115_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18085 OR4 OR4_388 ( .Y(OR4_388_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18082 OR4 OR4_293 ( .Y(OR4_293_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18080 OR4 OR4_1266 ( .Y(OR4_1266_Y), .A(OR4_1117_Y), .B(OR4_51_Y), .C(OR4_905_Y), .D(OR4_296_Y) ); // @49:18039 OR4 OR4_440 ( .Y(OR4_440_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18038 OR4 OR4_1117 ( .Y(OR4_1117_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:18035 OR4 OR4_656 ( .Y(OR4_656_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17956 OR4 OR4_264 ( .Y(OR4_264_Y), .A(OR4_113_Y), .B(OR4_1223_Y), .C(OR4_993_Y), .D(OR4_39_Y) ); // @49:17953 OR4 OR4_832 ( .Y(OR4_832_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17951 OR2 OR2_29 ( .Y(OR2_29_Y), .A(GND), .B(GND) ); // @49:17871 OR4 OR4_763 ( .Y(OR4_763_Y), .A(OR4_998_Y), .B(OR4_154_Y), .C(OR4_772_Y), .D(OR4_987_Y) ); // @49:17868 OR4 OR4_1122 ( .Y(OR4_1122_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17866 OR4 OR4_776 ( .Y(OR4_776_Y), .A(OR4_1143_Y), .B(OR4_416_Y), .C(OR4_392_Y), .D(OR4_1007_Y) ); // @49:17863 OR4 OR4_341 ( .Y(OR4_341_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17860 OR4 OR4_235 ( .Y(OR4_235_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17858 OR4 OR4_677 ( .Y(OR4_677_Y), .A(OR4_1021_Y), .B(OR4_814_Y), .C(OR4_1261_Y), .D(OR4_767_Y) ); // @49:17857 OR4 OR4_775 ( .Y(OR4_775_Y), .A(miv_rv32_ram_singleport_lp_R12C0_B_DOUT[4]), .B(miv_rv32_ram_singleport_lp_R13C0_B_DOUT[4]), .C(miv_rv32_ram_singleport_lp_R14C0_B_DOUT[4]), .D(miv_rv32_ram_singleport_lp_R15C0_B_DOUT[4]) ); // @49:17856 OR4 OR4_186 ( .Y(OR4_186_Y), .A(miv_rv32_ram_singleport_lp_R8C0_A_DOUT[7]), .B(miv_rv32_ram_singleport_lp_R9C0_A_DOUT[7]), .C(miv_rv32_ram_singleport_lp_R10C0_A_DOUT[7]), .D(miv_rv32_ram_singleport_lp_R11C0_A_DOUT[7]) ); // @49:17853 OR4 OR4_706 ( .Y(OR4_706_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17851 OR4 OR4_489 ( .Y(OR4_489_Y), .A(OR4_474_Y), .B(OR4_262_Y), .C(OR4_23_Y), .D(OR4_38_Y) ); // @49:17850 OR4 OR4_607 ( .Y(OR4_607_Y), .A(miv_rv32_ram_singleport_lp_R4C0_A_DOUT[14]), .B(miv_rv32_ram_singleport_lp_R5C0_A_DOUT[14]), .C(miv_rv32_ram_singleport_lp_R6C0_A_DOUT[14]), .D(miv_rv32_ram_singleport_lp_R7C0_A_DOUT[14]) ); // @49:17849 OR4 OR4_705 ( .Y(OR4_705_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17807 OR4 OR4_1193 ( .Y(OR4_1193_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17804 OR4 OR4_167 ( .Y(OR4_167_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17802 OR4 OR4_482 ( .Y(OR4_482_Y), .A(OR4_85_Y), .B(OR4_328_Y), .C(OR4_523_Y), .D(OR4_370_Y) ); // @49:17801 OR4 OR4_942 ( .Y(OR4_942_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17798 OR4 OR4_437 ( .Y(OR4_437_Y), .A(miv_rv32_ram_singleport_lp_R16C0_A_DOUT[6]), .B(miv_rv32_ram_singleport_lp_R17C0_A_DOUT[6]), .C(GND), .D(GND) ); // @49:17755 OR4 OR4_523 ( .Y(OR4_523_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17753 OR4 OR4_267 ( .Y(OR4_267_Y), .A(OR4_152_Y), .B(OR4_363_Y), .C(OR4_511_Y), .D(OR4_268_Y) ); // @49:17751 OR2 OR2_31 ( .Y(OR2_31_Y), .A(GND), .B(GND) ); // @49:17749 OR4 OR4_544 ( .Y(OR4_544_Y), .A(OR4_569_Y), .B(OR4_366_Y), .C(OR4_127_Y), .D(OR4_653_Y) ); // @49:17746 OR4 OR4_780 ( .Y(OR4_780_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17743 OR4 OR4_1140 ( .Y(OR4_1140_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17742 OR4 OR4_1305 ( .Y(OR4_1305_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17739 OR4 OR4_383 ( .Y(OR4_383_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17734 OR4 OR4_824 ( .Y(OR4_824_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17731 OR4 OR4_135 ( .Y(OR4_135_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17729 OR4 \OR4_R_DATA[4] ( .Y(tcm0_d_resp_rd_data_net[4]), .A(OR4_999_Y), .B(OR4_259_Y), .C(OR4_432_Y), .D(OR4_565_Y) ); // @49:17727 OR4 OR4_729 ( .Y(OR4_729_Y), .A(OR4_1093_Y), .B(OR4_607_Y), .C(OR4_791_Y), .D(OR4_1267_Y) ); // @49:17725 OR4 OR4_971 ( .Y(OR4_971_Y), .A(OR4_1035_Y), .B(OR4_883_Y), .C(OR4_588_Y), .D(OR4_467_Y) ); // @49:17724 OR4 OR4_855 ( .Y(OR4_855_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17723 OR4 OR4_1132 ( .Y(OR4_1132_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17721 OR4 OR4_542 ( .Y(OR4_542_Y), .A(OR4_790_Y), .B(OR4_1265_Y), .C(OR4_581_Y), .D(OR4_781_Y) ); // @49:17720 OR4 OR4_1158 ( .Y(OR4_1158_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17717 OR4 OR4_901 ( .Y(OR4_901_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17714 OR4 OR4_1251 ( .Y(OR4_1251_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17679 RAM1K20 miv_rv32_ram_singleport_lp_R8C0 ( .A_ADDR({req_addr_mux_3[10:2], GND, GND, GND, GND, GND}), .A_BLK_EN({Z_BLKY2_2_, Z_BLKY1_0_, Z_BLKY0_0_}), .A_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .A_DIN({GND, GND, un10_req_wr_data_mux[31:24], GND, GND, un10_req_wr_data_mux[23:16]}), .A_DOUT(miv_rv32_ram_singleport_lp_R8C0_A_DOUT[19:0]), .A_WEN({VCC, VCC}), .A_REN(VCC), .A_WIDTH({VCC, GND, VCC}), .A_WMODE({GND, GND}), .A_BYPASS(VCC), .A_DOUT_EN(VCC), .A_DOUT_SRST_N(VCC), .A_DOUT_ARST_N(VCC), .B_ADDR({req_addr_mux_3[10:2], GND, GND, GND, GND, GND}), .B_BLK_EN({Z_BLKX2_2_, Z_BLKX1_0_, Z_BLKX0_0_}), .B_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .B_DIN({GND, GND, un10_req_wr_data_mux[15:8], GND, GND, un10_req_wr_data_mux[7:0]}), .B_DOUT(miv_rv32_ram_singleport_lp_R8C0_B_DOUT[19:0]), .B_WEN({VCC, VCC}), .B_REN(VCC), .B_WIDTH({VCC, GND, VCC}), .B_WMODE({GND, GND}), .B_BYPASS(VCC), .B_DOUT_EN(VCC), .B_DOUT_SRST_N(VCC), .B_DOUT_ARST_N(VCC), .ECC_EN(GND), .ECC_BYPASS(GND), .SB_CORRECT(miv_rv32_ram_singleport_lp_R8C0_SB_CORRECT), .DB_DETECT(miv_rv32_ram_singleport_lp_R8C0_DB_DETECT), .BUSY_FB(GND), .ACCESS_BUSY(Z_ACCESS_BUSY_8__0_) ); defparam miv_rv32_ram_singleport_lp_R8C0.RAMINDEX="PF_TPSRAM_MAX_0%9216-9216%32-32%POWER%8%0%TWO-PORT%ECC_EN-0"; // @49:17677 OR4 OR4_1156 ( .Y(OR4_1156_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17674 OR4 OR4_1163 ( .Y(OR4_1163_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17671 OR4 OR4_179 ( .Y(OR4_179_Y), .A(miv_rv32_ram_singleport_lp_R16C0_A_DOUT[1]), .B(miv_rv32_ram_singleport_lp_R17C0_A_DOUT[1]), .C(GND), .D(GND) ); // @49:17669 OR4 \OR4_R_DATA[7] ( .Y(tcm0_d_resp_rd_data_net[7]), .A(OR4_757_Y), .B(OR4_1200_Y), .C(OR4_821_Y), .D(OR4_638_Y) ); // @49:17668 OR4 OR4_914 ( .Y(OR4_914_Y), .A(miv_rv32_ram_singleport_lp_R0C0_A_DOUT[13]), .B(miv_rv32_ram_singleport_lp_R1C0_A_DOUT[13]), .C(miv_rv32_ram_singleport_lp_R2C0_A_DOUT[13]), .D(miv_rv32_ram_singleport_lp_R3C0_A_DOUT[13]) ); // @49:17665 OR4 OR4_118 ( .Y(OR4_118_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17624 OR4 OR4_817 ( .Y(OR4_817_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17622 OR4 OR4_1019 ( .Y(OR4_1019_Y), .A(OR4_12_Y), .B(OR4_699_Y), .C(OR4_31_Y), .D(OR4_248_Y) ); // @49:17621 OR4 OR4_81 ( .Y(OR4_81_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17618 OR4 OR4_580 ( .Y(OR4_580_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17616 OR4 OR4_241 ( .Y(OR4_241_Y), .A(OR4_601_Y), .B(OR2_30_Y), .C(GND), .D(GND) ); // @49:17614 OR2 OR2_15 ( .Y(OR2_15_Y), .A(GND), .B(GND) ); // @49:17611 OR4 OR4_109 ( .Y(OR4_109_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17610 OR4 OR4_589 ( .Y(OR4_589_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17609 OR4 OR4_48 ( .Y(OR4_48_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17607 OR4 OR4_593 ( .Y(OR4_593_Y), .A(OR4_402_Y), .B(OR4_747_Y), .C(OR4_226_Y), .D(OR4_479_Y) ); // @49:17604 OR4 OR4_766 ( .Y(OR4_766_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17602 OR4 OR4_652 ( .Y(OR4_652_Y), .A(OR4_169_Y), .B(OR2_24_Y), .C(GND), .D(GND) ); // @49:17599 OR4 OR4_667 ( .Y(OR4_667_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17596 OR4 OR4_765 ( .Y(OR4_765_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17594 OR4 OR4_894 ( .Y(OR4_894_Y), .A(OR4_1000_Y), .B(OR4_1246_Y), .C(OR4_796_Y), .D(OR4_183_Y) ); // @49:17592 OR4 \OR4_R_DATA[29] ( .Y(tcm0_d_resp_rd_data_net[29]), .A(OR4_309_Y), .B(OR4_14_Y), .C(OR4_1234_Y), .D(OR4_1010_Y) ); // @49:17589 OR4 OR4_329 ( .Y(OR4_329_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17587 OR4 OR4_718 ( .Y(OR4_718_Y), .A(OR4_72_Y), .B(OR4_1237_Y), .C(OR4_34_Y), .D(OR4_526_Y) ); // @49:17585 OR4 OR4_2 ( .Y(OR4_2_Y), .A(OR4_458_Y), .B(OR4_663_Y), .C(OR4_657_Y), .D(OR4_878_Y) ); // @49:17584 OR4 OR4_378 ( .Y(OR4_378_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17582 OR4 OR4_799 ( .Y(OR4_799_Y), .A(OR4_1128_Y), .B(OR4_64_Y), .C(OR4_917_Y), .D(OR4_301_Y) ); // @49:17579 OR4 OR4_1045 ( .Y(OR4_1045_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17578 OR4 OR4_658 ( .Y(OR4_658_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17575 OR4 OR4_1026 ( .Y(OR4_1026_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17573 OR4 OR4_848 ( .Y(OR4_848_Y), .A(OR4_1116_Y), .B(OR4_164_Y), .C(OR4_928_Y), .D(OR4_1191_Y) ); // @49:17570 OR4 OR4_110 ( .Y(OR4_110_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17568 OR4 OR4_317 ( .Y(OR4_317_Y), .A(OR4_95_Y), .B(OR4_84_Y), .C(OR4_504_Y), .D(OR4_866_Y) ); // @49:17565 OR4 OR4_1159 ( .Y(OR4_1159_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17563 OR4 OR4_308 ( .Y(OR4_308_Y), .A(OR4_738_Y), .B(OR4_968_Y), .C(OR4_963_Y), .D(OR4_1190_Y) ); // @49:17560 OR4 OR4_1072 ( .Y(OR4_1072_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17557 OR4 OR4_488 ( .Y(OR4_488_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17556 OR4 OR4_1216 ( .Y(OR4_1216_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17553 OR4 OR4_481 ( .Y(OR4_481_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17550 OR4 OR4_610 ( .Y(OR4_610_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17547 OR4 OR4_176 ( .Y(OR4_176_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17544 OR4 OR4_934 ( .Y(OR4_934_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17541 OR4 OR4_138 ( .Y(OR4_138_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17538 OR4 OR4_837 ( .Y(OR4_837_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17535 OR4 OR4_479 ( .Y(OR4_479_Y), .A(miv_rv32_ram_singleport_lp_R12C0_B_DOUT[5]), .B(miv_rv32_ram_singleport_lp_R13C0_B_DOUT[5]), .C(miv_rv32_ram_singleport_lp_R14C0_B_DOUT[5]), .D(miv_rv32_ram_singleport_lp_R15C0_B_DOUT[5]) ); // @49:17534 OR4 OR4_83 ( .Y(OR4_83_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17532 OR4 OR4_958 ( .Y(OR4_958_Y), .A(OR4_281_Y), .B(OR4_815_Y), .C(OR4_1264_Y), .D(OR4_768_Y) ); // @49:17529 OR4 OR4_106 ( .Y(OR4_106_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17526 OR4 OR4_961 ( .Y(OR4_961_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17523 OR4 OR4_181 ( .Y(OR4_181_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17522 OR4 OR4_472 ( .Y(OR4_472_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17520 OR4 OR4_409 ( .Y(OR4_409_Y), .A(OR4_761_Y), .B(OR2_15_Y), .C(GND), .D(GND) ); // @49:17517 OR4 OR4_1253 ( .Y(OR4_1253_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17515 OR4 OR4_253 ( .Y(OR4_253_Y), .A(OR4_739_Y), .B(OR4_997_Y), .C(OR4_1197_Y), .D(OR4_1037_Y) ); // @49:17514 OR4 OR4_770 ( .Y(OR4_770_Y), .A(miv_rv32_ram_singleport_lp_R4C0_A_DOUT[5]), .B(miv_rv32_ram_singleport_lp_R5C0_A_DOUT[5]), .C(miv_rv32_ram_singleport_lp_R6C0_A_DOUT[5]), .D(miv_rv32_ram_singleport_lp_R7C0_A_DOUT[5]) ); // @49:17511 OR4 OR4_373 ( .Y(OR4_373_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17508 OR4 OR4_384 ( .Y(OR4_384_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17507 OR4 OR4_402 ( .Y(OR4_402_Y), .A(miv_rv32_ram_singleport_lp_R0C0_B_DOUT[5]), .B(miv_rv32_ram_singleport_lp_R1C0_B_DOUT[5]), .C(miv_rv32_ram_singleport_lp_R2C0_B_DOUT[5]), .D(miv_rv32_ram_singleport_lp_R3C0_B_DOUT[5]) ); // @49:17504 OR4 OR4_1141 ( .Y(OR4_1141_Y), .A(miv_rv32_ram_singleport_lp_R4C0_B_DOUT[12]), .B(miv_rv32_ram_singleport_lp_R5C0_B_DOUT[12]), .C(miv_rv32_ram_singleport_lp_R6C0_B_DOUT[12]), .D(miv_rv32_ram_singleport_lp_R7C0_B_DOUT[12]) ); // @49:17502 OR4 OR4_738 ( .Y(OR4_738_Y), .A(OR4_558_Y), .B(OR4_304_Y), .C(OR4_639_Y), .D(OR4_505_Y) ); // @49:17500 OR4 OR4_420 ( .Y(OR4_420_Y), .A(OR4_870_Y), .B(OR4_1232_Y), .C(OR4_700_Y), .D(OR4_941_Y) ); // @49:17499 OR4 OR4_1188 ( .Y(OR4_1188_Y), .A(GND), .B(GND), .C(GND), .D(GND) ); // @49:17497 OR4 OR4_399 ( .Y(OR4_399_Y), .A(OR4_345_Y), .B(OR4_1023_Y), .C(OR4_364_Y), .D(OR4_564_Y) ); // @49:17496 OR4 OR4_700 ( .Y(OR4_700_Y), .A(miv_rv32_ram_singleport_lp_R8C0_B_DOUT[11]), .B(miv_rv32_ram_singleport_lp_R9C0_B_DOUT[11]), .C(miv_rv32_ram_singleport_lp_R10C0_B_DOUT[11]), .D(miv_rv32_ram_singleport_lp_R11C0_B_DOUT[11]) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_ram_singleport_lp_Z21 */ module miv_rv32_subsys_tcm_Z20 ( hipri_req_ptr_3, hipri_req_ptr_0, apb_i_req_addr_net, apb_d_req_wr_data_net, tcm0_d_resp_rd_data_net, apb_d_req_wr_byte_en_net, resp_dest_0, apb_d_req_addr_net, cpu_d_wr_rd_state, un1_cpu_d_req_accepted_1_0, un1_cpu_d_req_ready, cpu_d_req_ready_1, cpu_d_req_is_tcm0, tcm0_d_req_valid_2, cpu_d_req_valid_mux_1, tcm0_d_req_valid_net, tcm0_i_req_ready_net_tz, cpu_m8_0_a3_0_3, tcm0_i_req_valid_1, tcm0_i_req_valid_net, tcm0_i_resp_valid_net, PF_CCC_0_0_OUT0_FABCLK_0, subsys_resetn ) ; output hipri_req_ptr_3 ; output hipri_req_ptr_0 ; input [15:2] apb_i_req_addr_net ; input [31:0] apb_d_req_wr_data_net ; output [31:0] tcm0_d_resp_rd_data_net ; input [3:0] apb_d_req_wr_byte_en_net ; output resp_dest_0 ; input [15:2] apb_d_req_addr_net ; output [1:0] cpu_d_wr_rd_state ; output un1_cpu_d_req_accepted_1_0 ; output un1_cpu_d_req_ready ; output cpu_d_req_ready_1 ; input cpu_d_req_is_tcm0 ; input tcm0_d_req_valid_2 ; input cpu_d_req_valid_mux_1 ; input tcm0_d_req_valid_net ; output tcm0_i_req_ready_net_tz ; input cpu_m8_0_a3_0_3 ; input tcm0_i_req_valid_1 ; input tcm0_i_req_valid_net ; output tcm0_i_resp_valid_net ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input subsys_resetn ; wire hipri_req_ptr_3 ; wire hipri_req_ptr_0 ; wire resp_dest_0 ; wire un1_cpu_d_req_accepted_1_0 ; wire un1_cpu_d_req_ready ; wire cpu_d_req_ready_1 ; wire cpu_d_req_is_tcm0 ; wire tcm0_d_req_valid_2 ; wire cpu_d_req_valid_mux_1 ; wire tcm0_d_req_valid_net ; wire tcm0_i_req_ready_net_tz ; wire cpu_m8_0_a3_0_3 ; wire tcm0_i_req_valid_1 ; wire tcm0_i_req_valid_net ; wire tcm0_i_resp_valid_net ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire subsys_resetn ; wire [0:0] cpu_d_wr_rd_state_ns; wire [0:0] cpu_d_req_wr_byte_en_int_Z; wire [31:0] cpu_d_req_wr_data_reg_Z; wire [31:0] cpu_d_req_wr_data_reg_9; wire [3:0] cpu_d_req_wr_byte_en_reg_Z; wire [15:2] cpu_d_req_addr_reg_Z; wire [0:0] un9_req_wr_byte_en_mux; wire [31:0] un10_req_wr_data_mux; wire [15:2] req_addr_mux_3; wire VCC ; wire N_308_i ; wire GND ; wire N_190_i ; wire N_192_i ; wire cpu_d_req_wr_byte_en_int_0_sqmuxa ; wire N_104_i ; wire tcm0_i_req_ready_net ; wire N_167 ; wire N_166 ; wire N_165 ; // @48:11056 SLE \cpu_d_wr_rd_state_Z[1] ( .Q(cpu_d_wr_rd_state[1]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_308_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_wr_rd_state_Z[0] ( .Q(cpu_d_wr_rd_state[0]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_wr_rd_state_ns[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_byte_en_int[0] ( .Q(cpu_d_req_wr_byte_en_int_Z[0]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_wr_rd_state[0]), .EN(N_190_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_data_reg[1] ( .Q(cpu_d_req_wr_data_reg_Z[1]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_wr_data_reg_9[1]), .EN(N_192_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_data_reg[0] ( .Q(cpu_d_req_wr_data_reg_Z[0]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_wr_data_reg_9[0]), .EN(N_192_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_data_reg[16] ( .Q(cpu_d_req_wr_data_reg_Z[16]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_wr_data_reg_9[16]), .EN(N_192_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_data_reg[15] ( .Q(cpu_d_req_wr_data_reg_Z[15]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_wr_data_reg_9[15]), .EN(N_192_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_data_reg[14] ( .Q(cpu_d_req_wr_data_reg_Z[14]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_wr_data_reg_9[14]), .EN(N_192_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_data_reg[13] ( .Q(cpu_d_req_wr_data_reg_Z[13]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_wr_data_reg_9[13]), .EN(N_192_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_data_reg[12] ( .Q(cpu_d_req_wr_data_reg_Z[12]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_wr_data_reg_9[12]), .EN(N_192_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_data_reg[11] ( .Q(cpu_d_req_wr_data_reg_Z[11]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_wr_data_reg_9[11]), .EN(N_192_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_data_reg[10] ( .Q(cpu_d_req_wr_data_reg_Z[10]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_wr_data_reg_9[10]), .EN(N_192_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_data_reg[9] ( .Q(cpu_d_req_wr_data_reg_Z[9]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_wr_data_reg_9[9]), .EN(N_192_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_data_reg[8] ( .Q(cpu_d_req_wr_data_reg_Z[8]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_wr_data_reg_9[8]), .EN(N_192_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_data_reg[7] ( .Q(cpu_d_req_wr_data_reg_Z[7]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_wr_data_reg_9[7]), .EN(N_192_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_data_reg[6] ( .Q(cpu_d_req_wr_data_reg_Z[6]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_wr_data_reg_9[6]), .EN(N_192_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_data_reg[5] ( .Q(cpu_d_req_wr_data_reg_Z[5]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_wr_data_reg_9[5]), .EN(N_192_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_data_reg[4] ( .Q(cpu_d_req_wr_data_reg_Z[4]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_wr_data_reg_9[4]), .EN(N_192_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_data_reg[3] ( .Q(cpu_d_req_wr_data_reg_Z[3]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_wr_data_reg_9[3]), .EN(N_192_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_data_reg[2] ( .Q(cpu_d_req_wr_data_reg_Z[2]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_wr_data_reg_9[2]), .EN(N_192_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_data_reg[31] ( .Q(cpu_d_req_wr_data_reg_Z[31]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_wr_data_reg_9[31]), .EN(N_192_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_data_reg[30] ( .Q(cpu_d_req_wr_data_reg_Z[30]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_wr_data_reg_9[30]), .EN(N_192_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_data_reg[29] ( .Q(cpu_d_req_wr_data_reg_Z[29]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_wr_data_reg_9[29]), .EN(N_192_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_data_reg[28] ( .Q(cpu_d_req_wr_data_reg_Z[28]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_wr_data_reg_9[28]), .EN(N_192_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_data_reg[27] ( .Q(cpu_d_req_wr_data_reg_Z[27]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_wr_data_reg_9[27]), .EN(N_192_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_data_reg[26] ( .Q(cpu_d_req_wr_data_reg_Z[26]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_wr_data_reg_9[26]), .EN(N_192_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_data_reg[25] ( .Q(cpu_d_req_wr_data_reg_Z[25]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_wr_data_reg_9[25]), .EN(N_192_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_data_reg[24] ( .Q(cpu_d_req_wr_data_reg_Z[24]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_wr_data_reg_9[24]), .EN(N_192_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_data_reg[23] ( .Q(cpu_d_req_wr_data_reg_Z[23]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_wr_data_reg_9[23]), .EN(N_192_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_data_reg[22] ( .Q(cpu_d_req_wr_data_reg_Z[22]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_wr_data_reg_9[22]), .EN(N_192_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_data_reg[21] ( .Q(cpu_d_req_wr_data_reg_Z[21]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_wr_data_reg_9[21]), .EN(N_192_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_data_reg[20] ( .Q(cpu_d_req_wr_data_reg_Z[20]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_wr_data_reg_9[20]), .EN(N_192_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_data_reg[19] ( .Q(cpu_d_req_wr_data_reg_Z[19]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_wr_data_reg_9[19]), .EN(N_192_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_data_reg[18] ( .Q(cpu_d_req_wr_data_reg_Z[18]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_wr_data_reg_9[18]), .EN(N_192_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_data_reg[17] ( .Q(cpu_d_req_wr_data_reg_Z[17]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(cpu_d_req_wr_data_reg_9[17]), .EN(N_192_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_byte_en_reg[0] ( .Q(cpu_d_req_wr_byte_en_reg_Z[0]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_d_req_wr_byte_en_net[0]), .EN(cpu_d_req_wr_byte_en_int_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_addr_reg[15] ( .Q(cpu_d_req_addr_reg_Z[15]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_d_req_addr_net[15]), .EN(cpu_d_req_wr_byte_en_int_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_addr_reg[14] ( .Q(cpu_d_req_addr_reg_Z[14]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_d_req_addr_net[14]), .EN(cpu_d_req_wr_byte_en_int_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_addr_reg[13] ( .Q(cpu_d_req_addr_reg_Z[13]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_d_req_addr_net[13]), .EN(cpu_d_req_wr_byte_en_int_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_addr_reg[12] ( .Q(cpu_d_req_addr_reg_Z[12]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_d_req_addr_net[12]), .EN(cpu_d_req_wr_byte_en_int_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_addr_reg[11] ( .Q(cpu_d_req_addr_reg_Z[11]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_d_req_addr_net[11]), .EN(cpu_d_req_wr_byte_en_int_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_addr_reg[10] ( .Q(cpu_d_req_addr_reg_Z[10]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_d_req_addr_net[10]), .EN(cpu_d_req_wr_byte_en_int_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_addr_reg[9] ( .Q(cpu_d_req_addr_reg_Z[9]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_d_req_addr_net[9]), .EN(cpu_d_req_wr_byte_en_int_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_addr_reg[8] ( .Q(cpu_d_req_addr_reg_Z[8]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_d_req_addr_net[8]), .EN(cpu_d_req_wr_byte_en_int_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_addr_reg[7] ( .Q(cpu_d_req_addr_reg_Z[7]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_d_req_addr_net[7]), .EN(cpu_d_req_wr_byte_en_int_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_addr_reg[6] ( .Q(cpu_d_req_addr_reg_Z[6]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_d_req_addr_net[6]), .EN(cpu_d_req_wr_byte_en_int_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_addr_reg[5] ( .Q(cpu_d_req_addr_reg_Z[5]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_d_req_addr_net[5]), .EN(cpu_d_req_wr_byte_en_int_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_addr_reg[4] ( .Q(cpu_d_req_addr_reg_Z[4]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_d_req_addr_net[4]), .EN(cpu_d_req_wr_byte_en_int_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_addr_reg[3] ( .Q(cpu_d_req_addr_reg_Z[3]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_d_req_addr_net[3]), .EN(cpu_d_req_wr_byte_en_int_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_addr_reg[2] ( .Q(cpu_d_req_addr_reg_Z[2]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_d_req_addr_net[2]), .EN(cpu_d_req_wr_byte_en_int_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11237 SLE \resp_dest[1] ( .Q(resp_dest_0), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_104_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11237 SLE \resp_dest[0] ( .Q(tcm0_i_resp_valid_net), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(tcm0_i_req_ready_net), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_byte_en_reg[3] ( .Q(cpu_d_req_wr_byte_en_reg_Z[3]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_d_req_wr_byte_en_net[3]), .EN(cpu_d_req_wr_byte_en_int_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_byte_en_reg[2] ( .Q(cpu_d_req_wr_byte_en_reg_Z[2]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_d_req_wr_byte_en_net[2]), .EN(cpu_d_req_wr_byte_en_int_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11056 SLE \cpu_d_req_wr_byte_en_reg[1] ( .Q(cpu_d_req_wr_byte_en_reg_Z[1]), .ADn(VCC), .ALn(subsys_resetn), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(apb_d_req_wr_byte_en_net[1]), .EN(cpu_d_req_wr_byte_en_int_0_sqmuxa), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:11201 miv_rv32_rr_pri_arb_3s_1s_1s u_TCM_req_arb ( .cpu_d_req_wr_byte_en_reg(cpu_d_req_wr_byte_en_reg_Z[3:0]), .tcm0_d_resp_rd_data_net(tcm0_d_resp_rd_data_net[31:0]), .cpu_d_req_wr_data_reg_9(cpu_d_req_wr_data_reg_9[31:0]), .apb_d_req_wr_data_net(apb_d_req_wr_data_net[31:0]), .cpu_d_req_wr_data_reg(cpu_d_req_wr_data_reg_Z[31:0]), .cpu_d_req_wr_byte_en_int_0(cpu_d_req_wr_byte_en_int_Z[0]), .un9_req_wr_byte_en_mux_0(un9_req_wr_byte_en_mux[0]), .un10_req_wr_data_mux(un10_req_wr_data_mux[31:0]), .req_addr_mux_3(req_addr_mux_3[15:2]), .apb_i_req_addr_net(apb_i_req_addr_net[15:2]), .apb_d_req_wr_byte_en_net(apb_d_req_wr_byte_en_net[3:0]), .cpu_d_req_addr_reg(cpu_d_req_addr_reg_Z[15:2]), .apb_d_req_addr_net(apb_d_req_addr_net[15:2]), .cpu_d_wr_rd_state_ns_0(cpu_d_wr_rd_state_ns[0]), .resp_dest_0(resp_dest_0), .cpu_d_wr_rd_state(cpu_d_wr_rd_state[1:0]), .hipri_req_ptr_3(hipri_req_ptr_3), .hipri_req_ptr_0(hipri_req_ptr_0), .N_104_i(N_104_i), .tcm0_i_req_valid_net(tcm0_i_req_valid_net), .tcm0_i_req_ready_net(tcm0_i_req_ready_net), .tcm0_i_req_valid_1(tcm0_i_req_valid_1), .cpu_m8_0_a3_0_3(cpu_m8_0_a3_0_3), .tcm0_i_req_ready_net_tz(tcm0_i_req_ready_net_tz), .tcm0_d_req_valid_net(tcm0_d_req_valid_net), .cpu_d_req_valid_mux_1(cpu_d_req_valid_mux_1), .tcm0_d_req_valid_2(tcm0_d_req_valid_2), .cpu_d_req_is_tcm0(cpu_d_req_is_tcm0), .cpu_d_req_ready_1_1z(cpu_d_req_ready_1), .un1_cpu_d_req_ready_1z(un1_cpu_d_req_ready), .un1_cpu_d_req_accepted_1_0(un1_cpu_d_req_accepted_1_0), .N_190_i(N_190_i), .N_192_i(N_192_i), .N_308_i_1z(N_308_i), .cpu_d_req_wr_byte_en_int_0_sqmuxa(cpu_d_req_wr_byte_en_int_0_sqmuxa), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .subsys_resetn(subsys_resetn) ); // @48:11416 miv_rv32_ram_singleport_lp_Z21 \tcm_ram_macro.u_ram_0 ( .tcm0_d_resp_rd_data_net(tcm0_d_resp_rd_data_net[31:0]), .un10_req_wr_data_mux(un10_req_wr_data_mux[31:0]), .req_addr_mux_3(req_addr_mux_3[15:2]), .un9_req_wr_byte_en_mux_0(un9_req_wr_byte_en_mux[0]), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_subsys_tcm_Z20 */ module miv_rv32_subsys_mtime_irq_1s_1s_100s_1s_33603580_33570820 ( apb_paddr_11, apb_paddr_31, apb_paddr_21, apb_paddr_20, apb_paddr_19, apb_paddr_26, apb_paddr_24, apb_paddr_23, apb_paddr_22, apb_paddr_30, apb_paddr_29, apb_paddr_28, apb_paddr_27, apb_paddr_25, apb_paddr_18, apb_paddr_17, apb_paddr_16, apb_paddr_10, apb_paddr_1, apb_paddr_0, CoreAPB3_0_0_APBmslave0_PADDR_0, CoreAPB3_0_0_APBmslave0_PADDR_7, CoreAPB3_0_0_APBmslave0_PADDR_24, CoreAPB3_0_0_APBmslave0_PADDR_23, CoreAPB3_0_0_APBmslave0_PADDR_5, CoreAPB3_0_0_APBmslave0_PADDR_6, CoreAPB3_0_0_APBmslave0_PADDR_25, CoreAPB3_0_0_APBmslave0_PADDR_22, apb_prdata_int, mtime_count_out, wrdata_0, CoreAPB3_0_0_APBmslave0_PWDATA, N_1153, apb_psel_net, un3_apb_int_sel, N_1214, tx_fifo_write_sig14_i_1, N_1411, un1_PADDR_2, N_1212, N_1206, CoreAPB3_0_0_APBmslave0_PWRITE, N_88, N_1225, trace_priv_i, subsys_resetn, PF_CCC_0_0_OUT0_FABCLK_0, un5_m_timer_irq_cry_63_i, un5_m_timer_irq_cry_63_1z ) ; input apb_paddr_11 ; input apb_paddr_31 ; input apb_paddr_21 ; input apb_paddr_20 ; input apb_paddr_19 ; input apb_paddr_26 ; input apb_paddr_24 ; input apb_paddr_23 ; input apb_paddr_22 ; input apb_paddr_30 ; input apb_paddr_29 ; input apb_paddr_28 ; input apb_paddr_27 ; input apb_paddr_25 ; input apb_paddr_18 ; input apb_paddr_17 ; input apb_paddr_16 ; input apb_paddr_10 ; input apb_paddr_1 ; input apb_paddr_0 ; input CoreAPB3_0_0_APBmslave0_PADDR_0 ; input CoreAPB3_0_0_APBmslave0_PADDR_7 ; input CoreAPB3_0_0_APBmslave0_PADDR_24 ; input CoreAPB3_0_0_APBmslave0_PADDR_23 ; input CoreAPB3_0_0_APBmslave0_PADDR_5 ; input CoreAPB3_0_0_APBmslave0_PADDR_6 ; input CoreAPB3_0_0_APBmslave0_PADDR_25 ; input CoreAPB3_0_0_APBmslave0_PADDR_22 ; output [31:0] apb_prdata_int ; output [63:0] mtime_count_out ; input wrdata_0 ; input [31:1] CoreAPB3_0_0_APBmslave0_PWDATA ; output N_1153 ; input apb_psel_net ; output un3_apb_int_sel ; input N_1214 ; input tx_fifo_write_sig14_i_1 ; output N_1411 ; input un1_PADDR_2 ; output N_1212 ; input N_1206 ; input CoreAPB3_0_0_APBmslave0_PWRITE ; input N_88 ; output N_1225 ; input trace_priv_i ; input subsys_resetn ; input PF_CCC_0_0_OUT0_FABCLK_0 ; output un5_m_timer_irq_cry_63_i ; output un5_m_timer_irq_cry_63_1z ; wire apb_paddr_11 ; wire apb_paddr_31 ; wire apb_paddr_21 ; wire apb_paddr_20 ; wire apb_paddr_19 ; wire apb_paddr_26 ; wire apb_paddr_24 ; wire apb_paddr_23 ; wire apb_paddr_22 ; wire apb_paddr_30 ; wire apb_paddr_29 ; wire apb_paddr_28 ; wire apb_paddr_27 ; wire apb_paddr_25 ; wire apb_paddr_18 ; wire apb_paddr_17 ; wire apb_paddr_16 ; wire apb_paddr_10 ; wire apb_paddr_1 ; wire apb_paddr_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_7 ; wire CoreAPB3_0_0_APBmslave0_PADDR_24 ; wire CoreAPB3_0_0_APBmslave0_PADDR_23 ; wire CoreAPB3_0_0_APBmslave0_PADDR_5 ; wire CoreAPB3_0_0_APBmslave0_PADDR_6 ; wire CoreAPB3_0_0_APBmslave0_PADDR_25 ; wire CoreAPB3_0_0_APBmslave0_PADDR_22 ; wire wrdata_0 ; wire N_1153 ; wire apb_psel_net ; wire un3_apb_int_sel ; wire N_1214 ; wire tx_fifo_write_sig14_i_1 ; wire N_1411 ; wire un1_PADDR_2 ; wire N_1212 ; wire N_1206 ; wire CoreAPB3_0_0_APBmslave0_PWRITE ; wire N_88 ; wire N_1225 ; wire trace_priv_i ; wire subsys_resetn ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire un5_m_timer_irq_cry_63_i ; wire un5_m_timer_irq_cry_63_1z ; wire [63:0] mtimecmp_Z; wire [63:0] mtime_count_out_lm; wire [15:0] rtc_count_Z; wire [14:14] rtc_count_RNIJ11B43_S; wire [13:13] rtc_count_RNIOMT403_S; wire [12:12] rtc_count_RNIUCQUR2_S; wire [11:11] rtc_count_RNI54NON2_S; wire [10:10] rtc_count_RNIDSJIJ2_S; wire [9:9] rtc_count_RNIMLGCF2_S; wire [8:8] rtc_count_RNI72NV72_S; wire [7:7] rtc_count_RNIPFTI02_S; wire [6:0] rtc_count_0_Z; wire [4:4] rtc_count_RNILUGCA1_S; wire [3:3] rtc_count_RNIBGNV21_S; wire [15:15] rtc_count_RNO_S; wire [0:0] rtc_count_RNIJBBPC_S; wire [0:0] rtc_count_RNIJBBPC_Y; wire [1:1] rtc_count_RNIQM46K_S; wire [1:1] rtc_count_RNIQM46K_Y; wire [2:2] rtc_count_RNI23UIR_S; wire [2:2] rtc_count_RNI23UIR_Y; wire [3:3] rtc_count_RNIBGNV21_Y; wire [4:4] rtc_count_RNILUGCA1_Y; wire [5:5] rtc_count_RNI0EAPH1_S; wire [5:5] rtc_count_RNI0EAPH1_Y; wire [6:6] rtc_count_RNICU36P1_S; wire [6:6] rtc_count_RNICU36P1_Y; wire [7:7] rtc_count_RNIPFTI02_Y; wire [8:8] rtc_count_RNI72NV72_Y; wire [9:9] rtc_count_RNIMLGCF2_Y; wire [10:10] rtc_count_RNIDSJIJ2_Y; wire [11:11] rtc_count_RNI54NON2_Y; wire [12:12] rtc_count_RNIUCQUR2_Y; wire [13:13] rtc_count_RNIOMT403_Y; wire [15:15] rtc_count_RNO_FCO; wire [15:15] rtc_count_RNO_Y; wire [14:14] rtc_count_RNIJ11B43_Y; wire [62:1] mtime_count_out_cry_Z; wire [62:1] mtime_count_out_s; wire [62:1] mtime_count_out_cry_Y; wire [63:63] mtime_count_out_s_FCO; wire [63:63] mtime_count_out_s_Z; wire [63:63] mtime_count_out_s_Y; wire [63:1] mtime_count_out_lm_2; wire VCC ; wire Tc0_h_En_0_a2_RNI88OH8_Z ; wire GND ; wire Tc0_h_En ; wire Tc0_l_En_0_a2_RNIC89L7_Z ; wire Tc0_l_En ; wire un23_rtc_tick_RNIP78KK_Z ; wire mtime_count_oute ; wire prdata_2 ; wire prdata ; wire prdata_0 ; wire prdata_1 ; wire N_184 ; wire N_1584_i ; wire N_183 ; wire N_182 ; wire N_181 ; wire N_180 ; wire N_179 ; wire N_178 ; wire N_177 ; wire N_176 ; wire N_175 ; wire N_174 ; wire N_173 ; wire N_172 ; wire N_171 ; wire N_170 ; wire N_169 ; wire N_168 ; wire N_167 ; wire N_166 ; wire N_165 ; wire N_164 ; wire N_163 ; wire N_162 ; wire N_161 ; wire N_158 ; wire N_157 ; wire N_155 ; wire N_154 ; wire un1_rtc_count_cry_0_cy_Z ; wire un1_rtc_count_cry_0_cy_S ; wire un1_rtc_count_cry_0_cy_Y ; wire un1_rtc_count_cry_0 ; wire un1_rtc_count_cry_1 ; wire un1_rtc_count_cry_2 ; wire un1_rtc_count_cry_3 ; wire un1_rtc_count_cry_4 ; wire un1_rtc_count_cry_5 ; wire un1_rtc_count_cry_6 ; wire un1_rtc_count_cry_7 ; wire un1_rtc_count_cry_8 ; wire un1_rtc_count_cry_9 ; wire un1_rtc_count_cry_10 ; wire un1_rtc_count_cry_11 ; wire un1_rtc_count_cry_12 ; wire un1_rtc_count_cry_13 ; wire un1_rtc_count_cry_14 ; wire un5_m_timer_irq_cry_0_Z ; wire un5_m_timer_irq_cry_0_S ; wire un5_m_timer_irq_cry_0_Y ; wire un5_m_timer_irq_cry_1_Z ; wire un5_m_timer_irq_cry_1_S ; wire un5_m_timer_irq_cry_1_Y ; wire un5_m_timer_irq_cry_2_Z ; wire un5_m_timer_irq_cry_2_S ; wire un5_m_timer_irq_cry_2_Y ; wire un5_m_timer_irq_cry_3_Z ; wire un5_m_timer_irq_cry_3_S ; wire un5_m_timer_irq_cry_3_Y ; wire un5_m_timer_irq_cry_4_Z ; wire un5_m_timer_irq_cry_4_S ; wire un5_m_timer_irq_cry_4_Y ; wire un5_m_timer_irq_cry_5_Z ; wire un5_m_timer_irq_cry_5_S ; wire un5_m_timer_irq_cry_5_Y ; wire un5_m_timer_irq_cry_6_Z ; wire un5_m_timer_irq_cry_6_S ; wire un5_m_timer_irq_cry_6_Y ; wire un5_m_timer_irq_cry_7_Z ; wire un5_m_timer_irq_cry_7_S ; wire un5_m_timer_irq_cry_7_Y ; wire un5_m_timer_irq_cry_8_Z ; wire un5_m_timer_irq_cry_8_S ; wire un5_m_timer_irq_cry_8_Y ; wire un5_m_timer_irq_cry_9_Z ; wire un5_m_timer_irq_cry_9_S ; wire un5_m_timer_irq_cry_9_Y ; wire un5_m_timer_irq_cry_10_Z ; wire un5_m_timer_irq_cry_10_S ; wire un5_m_timer_irq_cry_10_Y ; wire un5_m_timer_irq_cry_11_Z ; wire un5_m_timer_irq_cry_11_S ; wire un5_m_timer_irq_cry_11_Y ; wire un5_m_timer_irq_cry_12_Z ; wire un5_m_timer_irq_cry_12_S ; wire un5_m_timer_irq_cry_12_Y ; wire un5_m_timer_irq_cry_13_Z ; wire un5_m_timer_irq_cry_13_S ; wire un5_m_timer_irq_cry_13_Y ; wire un5_m_timer_irq_cry_14_Z ; wire un5_m_timer_irq_cry_14_S ; wire un5_m_timer_irq_cry_14_Y ; wire un5_m_timer_irq_cry_15_Z ; wire un5_m_timer_irq_cry_15_S ; wire un5_m_timer_irq_cry_15_Y ; wire un5_m_timer_irq_cry_16_Z ; wire un5_m_timer_irq_cry_16_S ; wire un5_m_timer_irq_cry_16_Y ; wire un5_m_timer_irq_cry_17_Z ; wire un5_m_timer_irq_cry_17_S ; wire un5_m_timer_irq_cry_17_Y ; wire un5_m_timer_irq_cry_18_Z ; wire un5_m_timer_irq_cry_18_S ; wire un5_m_timer_irq_cry_18_Y ; wire un5_m_timer_irq_cry_19_Z ; wire un5_m_timer_irq_cry_19_S ; wire un5_m_timer_irq_cry_19_Y ; wire un5_m_timer_irq_cry_20_Z ; wire un5_m_timer_irq_cry_20_S ; wire un5_m_timer_irq_cry_20_Y ; wire un5_m_timer_irq_cry_21_Z ; wire un5_m_timer_irq_cry_21_S ; wire un5_m_timer_irq_cry_21_Y ; wire un5_m_timer_irq_cry_22_Z ; wire un5_m_timer_irq_cry_22_S ; wire un5_m_timer_irq_cry_22_Y ; wire un5_m_timer_irq_cry_23_Z ; wire un5_m_timer_irq_cry_23_S ; wire un5_m_timer_irq_cry_23_Y ; wire un5_m_timer_irq_cry_24_Z ; wire un5_m_timer_irq_cry_24_S ; wire un5_m_timer_irq_cry_24_Y ; wire un5_m_timer_irq_cry_25_Z ; wire un5_m_timer_irq_cry_25_S ; wire un5_m_timer_irq_cry_25_Y ; wire un5_m_timer_irq_cry_26_Z ; wire un5_m_timer_irq_cry_26_S ; wire un5_m_timer_irq_cry_26_Y ; wire un5_m_timer_irq_cry_27_Z ; wire un5_m_timer_irq_cry_27_S ; wire un5_m_timer_irq_cry_27_Y ; wire un5_m_timer_irq_cry_28_Z ; wire un5_m_timer_irq_cry_28_S ; wire un5_m_timer_irq_cry_28_Y ; wire un5_m_timer_irq_cry_29_Z ; wire un5_m_timer_irq_cry_29_S ; wire un5_m_timer_irq_cry_29_Y ; wire un5_m_timer_irq_cry_30_Z ; wire un5_m_timer_irq_cry_30_S ; wire un5_m_timer_irq_cry_30_Y ; wire un5_m_timer_irq_cry_31_Z ; wire un5_m_timer_irq_cry_31_S ; wire un5_m_timer_irq_cry_31_Y ; wire un5_m_timer_irq_cry_32_Z ; wire un5_m_timer_irq_cry_32_S ; wire un5_m_timer_irq_cry_32_Y ; wire un5_m_timer_irq_cry_33_Z ; wire un5_m_timer_irq_cry_33_S ; wire un5_m_timer_irq_cry_33_Y ; wire un5_m_timer_irq_cry_34_Z ; wire un5_m_timer_irq_cry_34_S ; wire un5_m_timer_irq_cry_34_Y ; wire un5_m_timer_irq_cry_35_Z ; wire un5_m_timer_irq_cry_35_S ; wire un5_m_timer_irq_cry_35_Y ; wire un5_m_timer_irq_cry_36_Z ; wire un5_m_timer_irq_cry_36_S ; wire un5_m_timer_irq_cry_36_Y ; wire un5_m_timer_irq_cry_37_Z ; wire un5_m_timer_irq_cry_37_S ; wire un5_m_timer_irq_cry_37_Y ; wire un5_m_timer_irq_cry_38_Z ; wire un5_m_timer_irq_cry_38_S ; wire un5_m_timer_irq_cry_38_Y ; wire un5_m_timer_irq_cry_39_Z ; wire un5_m_timer_irq_cry_39_S ; wire un5_m_timer_irq_cry_39_Y ; wire un5_m_timer_irq_cry_40_Z ; wire un5_m_timer_irq_cry_40_S ; wire un5_m_timer_irq_cry_40_Y ; wire un5_m_timer_irq_cry_41_Z ; wire un5_m_timer_irq_cry_41_S ; wire un5_m_timer_irq_cry_41_Y ; wire un5_m_timer_irq_cry_42_Z ; wire un5_m_timer_irq_cry_42_S ; wire un5_m_timer_irq_cry_42_Y ; wire un5_m_timer_irq_cry_43_Z ; wire un5_m_timer_irq_cry_43_S ; wire un5_m_timer_irq_cry_43_Y ; wire un5_m_timer_irq_cry_44_Z ; wire un5_m_timer_irq_cry_44_S ; wire un5_m_timer_irq_cry_44_Y ; wire un5_m_timer_irq_cry_45_Z ; wire un5_m_timer_irq_cry_45_S ; wire un5_m_timer_irq_cry_45_Y ; wire un5_m_timer_irq_cry_46_Z ; wire un5_m_timer_irq_cry_46_S ; wire un5_m_timer_irq_cry_46_Y ; wire un5_m_timer_irq_cry_47_Z ; wire un5_m_timer_irq_cry_47_S ; wire un5_m_timer_irq_cry_47_Y ; wire un5_m_timer_irq_cry_48_Z ; wire un5_m_timer_irq_cry_48_S ; wire un5_m_timer_irq_cry_48_Y ; wire un5_m_timer_irq_cry_49_Z ; wire un5_m_timer_irq_cry_49_S ; wire un5_m_timer_irq_cry_49_Y ; wire un5_m_timer_irq_cry_50_Z ; wire un5_m_timer_irq_cry_50_S ; wire un5_m_timer_irq_cry_50_Y ; wire un5_m_timer_irq_cry_51_Z ; wire un5_m_timer_irq_cry_51_S ; wire un5_m_timer_irq_cry_51_Y ; wire un5_m_timer_irq_cry_52_Z ; wire un5_m_timer_irq_cry_52_S ; wire un5_m_timer_irq_cry_52_Y ; wire un5_m_timer_irq_cry_53_Z ; wire un5_m_timer_irq_cry_53_S ; wire un5_m_timer_irq_cry_53_Y ; wire un5_m_timer_irq_cry_54_Z ; wire un5_m_timer_irq_cry_54_S ; wire un5_m_timer_irq_cry_54_Y ; wire un5_m_timer_irq_cry_55_Z ; wire un5_m_timer_irq_cry_55_S ; wire un5_m_timer_irq_cry_55_Y ; wire un5_m_timer_irq_cry_56_Z ; wire un5_m_timer_irq_cry_56_S ; wire un5_m_timer_irq_cry_56_Y ; wire un5_m_timer_irq_cry_57_Z ; wire un5_m_timer_irq_cry_57_S ; wire un5_m_timer_irq_cry_57_Y ; wire un5_m_timer_irq_cry_58_Z ; wire un5_m_timer_irq_cry_58_S ; wire un5_m_timer_irq_cry_58_Y ; wire un5_m_timer_irq_cry_59_Z ; wire un5_m_timer_irq_cry_59_S ; wire un5_m_timer_irq_cry_59_Y ; wire un5_m_timer_irq_cry_60_Z ; wire un5_m_timer_irq_cry_60_S ; wire un5_m_timer_irq_cry_60_Y ; wire un5_m_timer_irq_cry_61_Z ; wire un5_m_timer_irq_cry_61_S ; wire un5_m_timer_irq_cry_61_Y ; wire un5_m_timer_irq_cry_62_Z ; wire un5_m_timer_irq_cry_62_S ; wire un5_m_timer_irq_cry_62_Y ; wire un5_m_timer_irq_cry_63_S ; wire un5_m_timer_irq_cry_63_Y ; wire mtime_count_out_s_4131_FCO ; wire mtime_count_out_s_4131_S ; wire mtime_count_out_s_4131_Y ; wire N_1201 ; wire un7_T_l_En_i ; wire un6_T_h_En_i ; wire un1_T_l_En ; wire T_l_En ; wire prdata_0_sqmuxa_0_a2_0_1_Z ; wire prdata_0_sqmuxa_0_a2_0_7_Z ; wire un7_T_l_En_0_a2_0_4_Z ; wire N_1138 ; wire un6_Tc0_h_En_i ; wire N_86 ; wire N_87 ; wire N_89 ; wire N_90 ; wire N_93 ; wire N_94 ; wire N_95 ; wire N_96 ; wire N_97 ; wire N_98 ; wire N_99 ; wire N_100 ; wire N_102 ; wire N_103 ; wire N_104 ; wire N_105 ; wire N_107 ; wire N_108 ; wire N_109 ; wire N_110 ; wire N_111 ; wire N_112 ; wire N_113 ; wire N_114 ; wire N_115 ; wire N_116 ; wire N_120 ; wire N_121 ; wire N_123 ; wire N_124 ; wire N_127 ; wire N_128 ; wire N_129 ; wire N_130 ; wire N_131 ; wire N_132 ; wire N_133 ; wire N_134 ; wire N_136 ; wire N_137 ; wire N_138 ; wire N_139 ; wire N_141 ; wire N_142 ; wire N_143 ; wire N_144 ; wire N_145 ; wire N_146 ; wire N_147 ; wire N_148 ; wire N_149 ; wire N_150 ; wire N_140 ; wire N_106 ; wire N_135 ; wire N_101 ; wire N_1183 ; wire N_88_0 ; wire N_91 ; wire N_92 ; wire N_122 ; wire N_125 ; wire N_126 ; wire N_151 ; wire un7_T_l_En_0_a2_0_5_Z ; wire un23_rtc_tick_11_Z ; wire un23_rtc_tick_10_Z ; wire un23_rtc_tick_9_Z ; wire un23_rtc_tick_8_Z ; wire un3_apb_int_sel_0_a2_1_11 ; wire un3_apb_int_sel_0_a2_1_10 ; wire un3_apb_int_sel_0_a2_1_9 ; wire un3_apb_int_sel_0_a2_1_8 ; wire un7_T_l_En_0_a2_0_6_Z ; wire un7_Tc0_l_En_i ; wire prdata18 ; wire N_1181 ; wire N_1182 ; wire N_156 ; wire N_159 ; wire N_160 ; wire un23_rtc_tick_Z ; wire N_1222 ; wire prdata_0_sqmuxa ; CFG1 un5_m_timer_irq_cry_63_RNIH51Q7 ( .A(un5_m_timer_irq_cry_63_1z), .Y(un5_m_timer_irq_cry_63_i) ); defparam un5_m_timer_irq_cry_63_RNIH51Q7.INIT=2'h1; // @48:13095 SLE \mtimecmp[63] ( .Q(mtimecmp_Z[63]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[31]), .EN(Tc0_h_En_0_a2_RNI88OH8_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[62] ( .Q(mtimecmp_Z[62]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[30]), .EN(Tc0_h_En_0_a2_RNI88OH8_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[61] ( .Q(mtimecmp_Z[61]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[29]), .EN(Tc0_h_En_0_a2_RNI88OH8_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[60] ( .Q(mtimecmp_Z[60]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[28]), .EN(Tc0_h_En_0_a2_RNI88OH8_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[59] ( .Q(mtimecmp_Z[59]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[27]), .EN(Tc0_h_En_0_a2_RNI88OH8_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[58] ( .Q(mtimecmp_Z[58]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[26]), .EN(Tc0_h_En_0_a2_RNI88OH8_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[57] ( .Q(mtimecmp_Z[57]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[25]), .EN(Tc0_h_En_0_a2_RNI88OH8_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[56] ( .Q(mtimecmp_Z[56]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[24]), .EN(Tc0_h_En_0_a2_RNI88OH8_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[55] ( .Q(mtimecmp_Z[55]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[23]), .EN(Tc0_h_En_0_a2_RNI88OH8_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[54] ( .Q(mtimecmp_Z[54]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[22]), .EN(Tc0_h_En_0_a2_RNI88OH8_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[53] ( .Q(mtimecmp_Z[53]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[21]), .EN(Tc0_h_En_0_a2_RNI88OH8_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[52] ( .Q(mtimecmp_Z[52]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[20]), .EN(Tc0_h_En_0_a2_RNI88OH8_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[51] ( .Q(mtimecmp_Z[51]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[19]), .EN(Tc0_h_En_0_a2_RNI88OH8_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[50] ( .Q(mtimecmp_Z[50]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[18]), .EN(Tc0_h_En_0_a2_RNI88OH8_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[49] ( .Q(mtimecmp_Z[49]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[17]), .EN(Tc0_h_En_0_a2_RNI88OH8_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[48] ( .Q(mtimecmp_Z[48]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[16]), .EN(Tc0_h_En_0_a2_RNI88OH8_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[47] ( .Q(mtimecmp_Z[47]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[15]), .EN(Tc0_h_En_0_a2_RNI88OH8_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[46] ( .Q(mtimecmp_Z[46]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[14]), .EN(Tc0_h_En_0_a2_RNI88OH8_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[45] ( .Q(mtimecmp_Z[45]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[13]), .EN(Tc0_h_En_0_a2_RNI88OH8_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[44] ( .Q(mtimecmp_Z[44]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .EN(Tc0_h_En_0_a2_RNI88OH8_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[43] ( .Q(mtimecmp_Z[43]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .EN(Tc0_h_En_0_a2_RNI88OH8_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[42] ( .Q(mtimecmp_Z[42]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .EN(Tc0_h_En_0_a2_RNI88OH8_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[41] ( .Q(mtimecmp_Z[41]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .EN(Tc0_h_En_0_a2_RNI88OH8_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[40] ( .Q(mtimecmp_Z[40]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .EN(Tc0_h_En_0_a2_RNI88OH8_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[39] ( .Q(mtimecmp_Z[39]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .EN(Tc0_h_En_0_a2_RNI88OH8_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[38] ( .Q(mtimecmp_Z[38]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(Tc0_h_En_0_a2_RNI88OH8_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[37] ( .Q(mtimecmp_Z[37]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(Tc0_h_En_0_a2_RNI88OH8_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[36] ( .Q(mtimecmp_Z[36]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(Tc0_h_En_0_a2_RNI88OH8_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[35] ( .Q(mtimecmp_Z[35]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(Tc0_h_En_0_a2_RNI88OH8_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[34] ( .Q(mtimecmp_Z[34]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(Tc0_h_En_0_a2_RNI88OH8_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[33] ( .Q(mtimecmp_Z[33]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(Tc0_h_En_0_a2_RNI88OH8_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[32] ( .Q(mtimecmp_Z[32]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(Tc0_h_En_0_a2_RNI88OH8_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); CFG2 Tc0_h_En_0_a2_RNI88OH8 ( .A(Tc0_h_En), .B(subsys_resetn), .Y(Tc0_h_En_0_a2_RNI88OH8_Z) ); defparam Tc0_h_En_0_a2_RNI88OH8.INIT=4'hB; // @48:13095 SLE \mtimecmp[31] ( .Q(mtimecmp_Z[31]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[31]), .EN(Tc0_l_En_0_a2_RNIC89L7_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[30] ( .Q(mtimecmp_Z[30]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[30]), .EN(Tc0_l_En_0_a2_RNIC89L7_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[29] ( .Q(mtimecmp_Z[29]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[29]), .EN(Tc0_l_En_0_a2_RNIC89L7_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[28] ( .Q(mtimecmp_Z[28]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[28]), .EN(Tc0_l_En_0_a2_RNIC89L7_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[27] ( .Q(mtimecmp_Z[27]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[27]), .EN(Tc0_l_En_0_a2_RNIC89L7_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[26] ( .Q(mtimecmp_Z[26]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[26]), .EN(Tc0_l_En_0_a2_RNIC89L7_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[25] ( .Q(mtimecmp_Z[25]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[25]), .EN(Tc0_l_En_0_a2_RNIC89L7_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[24] ( .Q(mtimecmp_Z[24]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[24]), .EN(Tc0_l_En_0_a2_RNIC89L7_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[23] ( .Q(mtimecmp_Z[23]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[23]), .EN(Tc0_l_En_0_a2_RNIC89L7_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[22] ( .Q(mtimecmp_Z[22]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[22]), .EN(Tc0_l_En_0_a2_RNIC89L7_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[21] ( .Q(mtimecmp_Z[21]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[21]), .EN(Tc0_l_En_0_a2_RNIC89L7_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[20] ( .Q(mtimecmp_Z[20]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[20]), .EN(Tc0_l_En_0_a2_RNIC89L7_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[19] ( .Q(mtimecmp_Z[19]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[19]), .EN(Tc0_l_En_0_a2_RNIC89L7_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[18] ( .Q(mtimecmp_Z[18]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[18]), .EN(Tc0_l_En_0_a2_RNIC89L7_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[17] ( .Q(mtimecmp_Z[17]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[17]), .EN(Tc0_l_En_0_a2_RNIC89L7_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[16] ( .Q(mtimecmp_Z[16]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[16]), .EN(Tc0_l_En_0_a2_RNIC89L7_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[15] ( .Q(mtimecmp_Z[15]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[15]), .EN(Tc0_l_En_0_a2_RNIC89L7_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[14] ( .Q(mtimecmp_Z[14]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[14]), .EN(Tc0_l_En_0_a2_RNIC89L7_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[13] ( .Q(mtimecmp_Z[13]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[13]), .EN(Tc0_l_En_0_a2_RNIC89L7_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[12] ( .Q(mtimecmp_Z[12]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .EN(Tc0_l_En_0_a2_RNIC89L7_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[11] ( .Q(mtimecmp_Z[11]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .EN(Tc0_l_En_0_a2_RNIC89L7_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[10] ( .Q(mtimecmp_Z[10]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .EN(Tc0_l_En_0_a2_RNIC89L7_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[9] ( .Q(mtimecmp_Z[9]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .EN(Tc0_l_En_0_a2_RNIC89L7_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[8] ( .Q(mtimecmp_Z[8]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .EN(Tc0_l_En_0_a2_RNIC89L7_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[7] ( .Q(mtimecmp_Z[7]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .EN(Tc0_l_En_0_a2_RNIC89L7_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[6] ( .Q(mtimecmp_Z[6]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .EN(Tc0_l_En_0_a2_RNIC89L7_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[5] ( .Q(mtimecmp_Z[5]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .EN(Tc0_l_En_0_a2_RNIC89L7_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[4] ( .Q(mtimecmp_Z[4]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .EN(Tc0_l_En_0_a2_RNIC89L7_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[3] ( .Q(mtimecmp_Z[3]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .EN(Tc0_l_En_0_a2_RNIC89L7_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[2] ( .Q(mtimecmp_Z[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .EN(Tc0_l_En_0_a2_RNIC89L7_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[1] ( .Q(mtimecmp_Z[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .EN(Tc0_l_En_0_a2_RNIC89L7_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); // @48:13095 SLE \mtimecmp[0] ( .Q(mtimecmp_Z[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(wrdata_0), .EN(Tc0_l_En_0_a2_RNIC89L7_Z), .LAT(GND), .SD(VCC), .SLn(subsys_resetn) ); CFG2 Tc0_l_En_0_a2_RNIC89L7 ( .A(Tc0_l_En), .B(subsys_resetn), .Y(Tc0_l_En_0_a2_RNIC89L7_Z) ); defparam Tc0_l_En_0_a2_RNIC89L7.INIT=4'hB; // @48:13076 SLE \mtime_count_out_Z[0] ( .Q(mtime_count_out[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[0]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[1] ( .Q(mtime_count_out[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[1]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[2] ( .Q(mtime_count_out[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[2]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[3] ( .Q(mtime_count_out[3]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[3]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[4] ( .Q(mtime_count_out[4]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[4]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[5] ( .Q(mtime_count_out[5]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[5]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[6] ( .Q(mtime_count_out[6]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[6]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[7] ( .Q(mtime_count_out[7]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[7]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[8] ( .Q(mtime_count_out[8]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[8]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[9] ( .Q(mtime_count_out[9]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[9]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[10] ( .Q(mtime_count_out[10]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[10]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[11] ( .Q(mtime_count_out[11]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[11]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[12] ( .Q(mtime_count_out[12]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[12]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[13] ( .Q(mtime_count_out[13]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[13]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[14] ( .Q(mtime_count_out[14]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[14]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[15] ( .Q(mtime_count_out[15]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[15]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[16] ( .Q(mtime_count_out[16]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[16]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[17] ( .Q(mtime_count_out[17]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[17]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[18] ( .Q(mtime_count_out[18]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[18]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[19] ( .Q(mtime_count_out[19]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[19]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[20] ( .Q(mtime_count_out[20]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[20]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[21] ( .Q(mtime_count_out[21]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[21]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[22] ( .Q(mtime_count_out[22]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[22]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[23] ( .Q(mtime_count_out[23]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[23]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[24] ( .Q(mtime_count_out[24]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[24]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[25] ( .Q(mtime_count_out[25]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[25]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[26] ( .Q(mtime_count_out[26]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[26]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[27] ( .Q(mtime_count_out[27]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[27]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[28] ( .Q(mtime_count_out[28]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[28]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[29] ( .Q(mtime_count_out[29]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[29]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[30] ( .Q(mtime_count_out[30]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[30]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[31] ( .Q(mtime_count_out[31]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[31]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[32] ( .Q(mtime_count_out[32]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[32]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[33] ( .Q(mtime_count_out[33]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[33]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[34] ( .Q(mtime_count_out[34]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[34]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[35] ( .Q(mtime_count_out[35]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[35]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[36] ( .Q(mtime_count_out[36]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[36]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[37] ( .Q(mtime_count_out[37]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[37]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[38] ( .Q(mtime_count_out[38]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[38]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[39] ( .Q(mtime_count_out[39]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[39]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[40] ( .Q(mtime_count_out[40]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[40]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[41] ( .Q(mtime_count_out[41]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[41]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[42] ( .Q(mtime_count_out[42]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[42]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[43] ( .Q(mtime_count_out[43]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[43]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[44] ( .Q(mtime_count_out[44]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[44]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[45] ( .Q(mtime_count_out[45]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[45]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[46] ( .Q(mtime_count_out[46]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[46]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[47] ( .Q(mtime_count_out[47]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[47]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[48] ( .Q(mtime_count_out[48]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[48]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[49] ( .Q(mtime_count_out[49]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[49]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[50] ( .Q(mtime_count_out[50]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[50]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[51] ( .Q(mtime_count_out[51]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[51]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[52] ( .Q(mtime_count_out[52]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[52]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[53] ( .Q(mtime_count_out[53]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[53]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[54] ( .Q(mtime_count_out[54]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[54]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[55] ( .Q(mtime_count_out[55]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[55]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[56] ( .Q(mtime_count_out[56]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[56]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[57] ( .Q(mtime_count_out[57]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[57]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[58] ( .Q(mtime_count_out[58]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[58]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[59] ( .Q(mtime_count_out[59]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[59]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[60] ( .Q(mtime_count_out[60]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[60]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[61] ( .Q(mtime_count_out[61]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[61]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[62] ( .Q(mtime_count_out[62]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[62]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13076 SLE \mtime_count_out_Z[63] ( .Q(mtime_count_out[63]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(mtime_count_out_lm[63]), .EN(un23_rtc_tick_RNIP78KK_Z), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); CFG2 un23_rtc_tick_RNIP78KK ( .A(mtime_count_oute), .B(subsys_resetn), .Y(un23_rtc_tick_RNIP78KK_Z) ); defparam un23_rtc_tick_RNIP78KK.INIT=4'hB; // @48:13106 SLE \prdata[31] ( .Q(apb_prdata_int[31]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(prdata_2), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:13106 SLE \prdata[6] ( .Q(apb_prdata_int[6]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(prdata), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:13106 SLE \prdata[5] ( .Q(apb_prdata_int[5]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(prdata_0), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:13106 SLE \prdata[2] ( .Q(apb_prdata_int[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(prdata_1), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @48:13062 SLE \rtc_count[14] ( .Q(rtc_count_Z[14]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rtc_count_RNIJ11B43_S[14]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13062 SLE \rtc_count[13] ( .Q(rtc_count_Z[13]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rtc_count_RNIOMT403_S[13]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13062 SLE \rtc_count[12] ( .Q(rtc_count_Z[12]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rtc_count_RNIUCQUR2_S[12]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13062 SLE \rtc_count[11] ( .Q(rtc_count_Z[11]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rtc_count_RNI54NON2_S[11]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13062 SLE \rtc_count[10] ( .Q(rtc_count_Z[10]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rtc_count_RNIDSJIJ2_S[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13062 SLE \rtc_count[9] ( .Q(rtc_count_Z[9]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rtc_count_RNIMLGCF2_S[9]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13062 SLE \rtc_count[8] ( .Q(rtc_count_Z[8]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rtc_count_RNI72NV72_S[8]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13062 SLE \rtc_count[7] ( .Q(rtc_count_Z[7]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rtc_count_RNIPFTI02_S[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13062 SLE \rtc_count[6] ( .Q(rtc_count_Z[6]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rtc_count_0_Z[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13062 SLE \rtc_count[5] ( .Q(rtc_count_Z[5]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rtc_count_0_Z[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13062 SLE \rtc_count[4] ( .Q(rtc_count_Z[4]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rtc_count_RNILUGCA1_S[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13062 SLE \rtc_count[3] ( .Q(rtc_count_Z[3]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rtc_count_RNIBGNV21_S[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13062 SLE \rtc_count[2] ( .Q(rtc_count_Z[2]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rtc_count_0_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13062 SLE \rtc_count[1] ( .Q(rtc_count_Z[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rtc_count_0_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13062 SLE \rtc_count[0] ( .Q(rtc_count_Z[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rtc_count_0_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13062 SLE \rtc_count[15] ( .Q(rtc_count_Z[15]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(rtc_count_RNO_S[15]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(subsys_resetn) ); // @48:13106 SLE \prdata[30] ( .Q(apb_prdata_int[30]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_184), .EN(VCC), .LAT(GND), .SD(GND), .SLn(N_1584_i) ); // @48:13106 SLE \prdata[29] ( .Q(apb_prdata_int[29]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_183), .EN(VCC), .LAT(GND), .SD(GND), .SLn(N_1584_i) ); // @48:13106 SLE \prdata[28] ( .Q(apb_prdata_int[28]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_182), .EN(VCC), .LAT(GND), .SD(GND), .SLn(N_1584_i) ); // @48:13106 SLE \prdata[27] ( .Q(apb_prdata_int[27]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_181), .EN(VCC), .LAT(GND), .SD(GND), .SLn(N_1584_i) ); // @48:13106 SLE \prdata[26] ( .Q(apb_prdata_int[26]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_180), .EN(VCC), .LAT(GND), .SD(GND), .SLn(N_1584_i) ); // @48:13106 SLE \prdata[25] ( .Q(apb_prdata_int[25]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_179), .EN(VCC), .LAT(GND), .SD(GND), .SLn(N_1584_i) ); // @48:13106 SLE \prdata[24] ( .Q(apb_prdata_int[24]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_178), .EN(VCC), .LAT(GND), .SD(GND), .SLn(N_1584_i) ); // @48:13106 SLE \prdata[23] ( .Q(apb_prdata_int[23]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_177), .EN(VCC), .LAT(GND), .SD(GND), .SLn(N_1584_i) ); // @48:13106 SLE \prdata[22] ( .Q(apb_prdata_int[22]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_176), .EN(VCC), .LAT(GND), .SD(GND), .SLn(N_1584_i) ); // @48:13106 SLE \prdata[21] ( .Q(apb_prdata_int[21]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_175), .EN(VCC), .LAT(GND), .SD(GND), .SLn(N_1584_i) ); // @48:13106 SLE \prdata[20] ( .Q(apb_prdata_int[20]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_174), .EN(VCC), .LAT(GND), .SD(GND), .SLn(N_1584_i) ); // @48:13106 SLE \prdata[19] ( .Q(apb_prdata_int[19]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_173), .EN(VCC), .LAT(GND), .SD(GND), .SLn(N_1584_i) ); // @48:13106 SLE \prdata[18] ( .Q(apb_prdata_int[18]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_172), .EN(VCC), .LAT(GND), .SD(GND), .SLn(N_1584_i) ); // @48:13106 SLE \prdata[17] ( .Q(apb_prdata_int[17]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_171), .EN(VCC), .LAT(GND), .SD(GND), .SLn(N_1584_i) ); // @48:13106 SLE \prdata[16] ( .Q(apb_prdata_int[16]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_170), .EN(VCC), .LAT(GND), .SD(GND), .SLn(N_1584_i) ); // @48:13106 SLE \prdata[15] ( .Q(apb_prdata_int[15]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_169), .EN(VCC), .LAT(GND), .SD(GND), .SLn(N_1584_i) ); // @48:13106 SLE \prdata[14] ( .Q(apb_prdata_int[14]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_168), .EN(VCC), .LAT(GND), .SD(GND), .SLn(N_1584_i) ); // @48:13106 SLE \prdata[13] ( .Q(apb_prdata_int[13]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_167), .EN(VCC), .LAT(GND), .SD(GND), .SLn(N_1584_i) ); // @48:13106 SLE \prdata[12] ( .Q(apb_prdata_int[12]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_166), .EN(VCC), .LAT(GND), .SD(GND), .SLn(N_1584_i) ); // @48:13106 SLE \prdata[11] ( .Q(apb_prdata_int[11]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_165), .EN(VCC), .LAT(GND), .SD(GND), .SLn(N_1584_i) ); // @48:13106 SLE \prdata[10] ( .Q(apb_prdata_int[10]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_164), .EN(VCC), .LAT(GND), .SD(GND), .SLn(N_1584_i) ); // @48:13106 SLE \prdata[9] ( .Q(apb_prdata_int[9]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_163), .EN(VCC), .LAT(GND), .SD(GND), .SLn(N_1584_i) ); // @48:13106 SLE \prdata[8] ( .Q(apb_prdata_int[8]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_162), .EN(VCC), .LAT(GND), .SD(GND), .SLn(N_1584_i) ); // @48:13106 SLE \prdata[7] ( .Q(apb_prdata_int[7]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_161), .EN(VCC), .LAT(GND), .SD(GND), .SLn(N_1584_i) ); // @48:13106 SLE \prdata[4] ( .Q(apb_prdata_int[4]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_158), .EN(VCC), .LAT(GND), .SD(GND), .SLn(N_1584_i) ); // @48:13106 SLE \prdata[3] ( .Q(apb_prdata_int[3]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_157), .EN(VCC), .LAT(GND), .SD(GND), .SLn(N_1584_i) ); // @48:13106 SLE \prdata[1] ( .Q(apb_prdata_int[1]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_155), .EN(VCC), .LAT(GND), .SD(GND), .SLn(N_1584_i) ); // @48:13106 SLE \prdata[0] ( .Q(apb_prdata_int[0]), .ADn(VCC), .ALn(VCC), .CLK(PF_CCC_0_0_OUT0_FABCLK_0), .D(N_154), .EN(VCC), .LAT(GND), .SD(GND), .SLn(N_1584_i) ); // @46:9236 ARI1 un1_rtc_count_cry_0_cy ( .FCO(un1_rtc_count_cry_0_cy_Z), .S(un1_rtc_count_cry_0_cy_S), .Y(un1_rtc_count_cry_0_cy_Y), .B(trace_priv_i), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam un1_rtc_count_cry_0_cy.INIT=20'h45500; // @46:9236 ARI1 \rtc_count_RNIJBBPC[0] ( .FCO(un1_rtc_count_cry_0), .S(rtc_count_RNIJBBPC_S[0]), .Y(rtc_count_RNIJBBPC_Y[0]), .B(rtc_count_Z[0]), .C(GND), .D(GND), .A(VCC), .FCI(un1_rtc_count_cry_0_cy_Z) ); defparam \rtc_count_RNIJBBPC[0] .INIT=20'h4AA00; // @46:9236 ARI1 \rtc_count_RNIQM46K[1] ( .FCO(un1_rtc_count_cry_1), .S(rtc_count_RNIQM46K_S[1]), .Y(rtc_count_RNIQM46K_Y[1]), .B(rtc_count_Z[1]), .C(GND), .D(GND), .A(VCC), .FCI(un1_rtc_count_cry_0) ); defparam \rtc_count_RNIQM46K[1] .INIT=20'h4AA00; // @46:9236 ARI1 \rtc_count_RNI23UIR[2] ( .FCO(un1_rtc_count_cry_2), .S(rtc_count_RNI23UIR_S[2]), .Y(rtc_count_RNI23UIR_Y[2]), .B(rtc_count_Z[2]), .C(GND), .D(GND), .A(VCC), .FCI(un1_rtc_count_cry_1) ); defparam \rtc_count_RNI23UIR[2] .INIT=20'h4AA00; // @46:9236 ARI1 \rtc_count_RNIBGNV21[3] ( .FCO(un1_rtc_count_cry_3), .S(rtc_count_RNIBGNV21_S[3]), .Y(rtc_count_RNIBGNV21_Y[3]), .B(rtc_count_Z[3]), .C(GND), .D(GND), .A(VCC), .FCI(un1_rtc_count_cry_2) ); defparam \rtc_count_RNIBGNV21[3] .INIT=20'h4AA00; // @46:9236 ARI1 \rtc_count_RNILUGCA1[4] ( .FCO(un1_rtc_count_cry_4), .S(rtc_count_RNILUGCA1_S[4]), .Y(rtc_count_RNILUGCA1_Y[4]), .B(rtc_count_Z[4]), .C(GND), .D(GND), .A(VCC), .FCI(un1_rtc_count_cry_3) ); defparam \rtc_count_RNILUGCA1[4] .INIT=20'h4AA00; // @46:9236 ARI1 \rtc_count_RNI0EAPH1[5] ( .FCO(un1_rtc_count_cry_5), .S(rtc_count_RNI0EAPH1_S[5]), .Y(rtc_count_RNI0EAPH1_Y[5]), .B(rtc_count_Z[5]), .C(GND), .D(GND), .A(VCC), .FCI(un1_rtc_count_cry_4) ); defparam \rtc_count_RNI0EAPH1[5] .INIT=20'h4AA00; // @46:9236 ARI1 \rtc_count_RNICU36P1[6] ( .FCO(un1_rtc_count_cry_6), .S(rtc_count_RNICU36P1_S[6]), .Y(rtc_count_RNICU36P1_Y[6]), .B(rtc_count_Z[6]), .C(GND), .D(GND), .A(VCC), .FCI(un1_rtc_count_cry_5) ); defparam \rtc_count_RNICU36P1[6] .INIT=20'h4AA00; // @46:9236 ARI1 \rtc_count_RNIPFTI02[7] ( .FCO(un1_rtc_count_cry_7), .S(rtc_count_RNIPFTI02_S[7]), .Y(rtc_count_RNIPFTI02_Y[7]), .B(rtc_count_Z[7]), .C(GND), .D(GND), .A(VCC), .FCI(un1_rtc_count_cry_6) ); defparam \rtc_count_RNIPFTI02[7] .INIT=20'h4AA00; // @46:9236 ARI1 \rtc_count_RNI72NV72[8] ( .FCO(un1_rtc_count_cry_8), .S(rtc_count_RNI72NV72_S[8]), .Y(rtc_count_RNI72NV72_Y[8]), .B(rtc_count_Z[8]), .C(GND), .D(GND), .A(VCC), .FCI(un1_rtc_count_cry_7) ); defparam \rtc_count_RNI72NV72[8] .INIT=20'h4AA00; // @46:9236 ARI1 \rtc_count_RNIMLGCF2[9] ( .FCO(un1_rtc_count_cry_9), .S(rtc_count_RNIMLGCF2_S[9]), .Y(rtc_count_RNIMLGCF2_Y[9]), .B(rtc_count_Z[9]), .C(GND), .D(GND), .A(VCC), .FCI(un1_rtc_count_cry_8) ); defparam \rtc_count_RNIMLGCF2[9] .INIT=20'h4AA00; // @46:9236 ARI1 \rtc_count_RNIDSJIJ2[10] ( .FCO(un1_rtc_count_cry_10), .S(rtc_count_RNIDSJIJ2_S[10]), .Y(rtc_count_RNIDSJIJ2_Y[10]), .B(rtc_count_Z[10]), .C(GND), .D(GND), .A(VCC), .FCI(un1_rtc_count_cry_9) ); defparam \rtc_count_RNIDSJIJ2[10] .INIT=20'h4AA00; // @46:9236 ARI1 \rtc_count_RNI54NON2[11] ( .FCO(un1_rtc_count_cry_11), .S(rtc_count_RNI54NON2_S[11]), .Y(rtc_count_RNI54NON2_Y[11]), .B(rtc_count_Z[11]), .C(GND), .D(GND), .A(VCC), .FCI(un1_rtc_count_cry_10) ); defparam \rtc_count_RNI54NON2[11] .INIT=20'h4AA00; // @46:9236 ARI1 \rtc_count_RNIUCQUR2[12] ( .FCO(un1_rtc_count_cry_12), .S(rtc_count_RNIUCQUR2_S[12]), .Y(rtc_count_RNIUCQUR2_Y[12]), .B(rtc_count_Z[12]), .C(GND), .D(GND), .A(VCC), .FCI(un1_rtc_count_cry_11) ); defparam \rtc_count_RNIUCQUR2[12] .INIT=20'h4AA00; // @46:9236 ARI1 \rtc_count_RNIOMT403[13] ( .FCO(un1_rtc_count_cry_13), .S(rtc_count_RNIOMT403_S[13]), .Y(rtc_count_RNIOMT403_Y[13]), .B(rtc_count_Z[13]), .C(GND), .D(GND), .A(VCC), .FCI(un1_rtc_count_cry_12) ); defparam \rtc_count_RNIOMT403[13] .INIT=20'h4AA00; // @46:9236 ARI1 \rtc_count_RNO[15] ( .FCO(rtc_count_RNO_FCO[15]), .S(rtc_count_RNO_S[15]), .Y(rtc_count_RNO_Y[15]), .B(rtc_count_Z[15]), .C(GND), .D(GND), .A(VCC), .FCI(un1_rtc_count_cry_14) ); defparam \rtc_count_RNO[15] .INIT=20'h4AA00; // @46:9236 ARI1 \rtc_count_RNIJ11B43[14] ( .FCO(un1_rtc_count_cry_14), .S(rtc_count_RNIJ11B43_S[14]), .Y(rtc_count_RNIJ11B43_Y[14]), .B(rtc_count_Z[14]), .C(GND), .D(GND), .A(VCC), .FCI(un1_rtc_count_cry_13) ); defparam \rtc_count_RNIJ11B43[14] .INIT=20'h4AA00; // @48:13049 ARI1 un5_m_timer_irq_cry_0 ( .FCO(un5_m_timer_irq_cry_0_Z), .S(un5_m_timer_irq_cry_0_S), .Y(un5_m_timer_irq_cry_0_Y), .B(mtime_count_out[0]), .C(GND), .D(GND), .A(mtimecmp_Z[0]), .FCI(GND) ); defparam un5_m_timer_irq_cry_0.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_1 ( .FCO(un5_m_timer_irq_cry_1_Z), .S(un5_m_timer_irq_cry_1_S), .Y(un5_m_timer_irq_cry_1_Y), .B(mtime_count_out[1]), .C(GND), .D(GND), .A(mtimecmp_Z[1]), .FCI(un5_m_timer_irq_cry_0_Z) ); defparam un5_m_timer_irq_cry_1.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_2 ( .FCO(un5_m_timer_irq_cry_2_Z), .S(un5_m_timer_irq_cry_2_S), .Y(un5_m_timer_irq_cry_2_Y), .B(mtime_count_out[2]), .C(GND), .D(GND), .A(mtimecmp_Z[2]), .FCI(un5_m_timer_irq_cry_1_Z) ); defparam un5_m_timer_irq_cry_2.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_3 ( .FCO(un5_m_timer_irq_cry_3_Z), .S(un5_m_timer_irq_cry_3_S), .Y(un5_m_timer_irq_cry_3_Y), .B(mtime_count_out[3]), .C(GND), .D(GND), .A(mtimecmp_Z[3]), .FCI(un5_m_timer_irq_cry_2_Z) ); defparam un5_m_timer_irq_cry_3.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_4 ( .FCO(un5_m_timer_irq_cry_4_Z), .S(un5_m_timer_irq_cry_4_S), .Y(un5_m_timer_irq_cry_4_Y), .B(mtime_count_out[4]), .C(GND), .D(GND), .A(mtimecmp_Z[4]), .FCI(un5_m_timer_irq_cry_3_Z) ); defparam un5_m_timer_irq_cry_4.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_5 ( .FCO(un5_m_timer_irq_cry_5_Z), .S(un5_m_timer_irq_cry_5_S), .Y(un5_m_timer_irq_cry_5_Y), .B(mtime_count_out[5]), .C(GND), .D(GND), .A(mtimecmp_Z[5]), .FCI(un5_m_timer_irq_cry_4_Z) ); defparam un5_m_timer_irq_cry_5.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_6 ( .FCO(un5_m_timer_irq_cry_6_Z), .S(un5_m_timer_irq_cry_6_S), .Y(un5_m_timer_irq_cry_6_Y), .B(mtime_count_out[6]), .C(GND), .D(GND), .A(mtimecmp_Z[6]), .FCI(un5_m_timer_irq_cry_5_Z) ); defparam un5_m_timer_irq_cry_6.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_7 ( .FCO(un5_m_timer_irq_cry_7_Z), .S(un5_m_timer_irq_cry_7_S), .Y(un5_m_timer_irq_cry_7_Y), .B(mtime_count_out[7]), .C(GND), .D(GND), .A(mtimecmp_Z[7]), .FCI(un5_m_timer_irq_cry_6_Z) ); defparam un5_m_timer_irq_cry_7.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_8 ( .FCO(un5_m_timer_irq_cry_8_Z), .S(un5_m_timer_irq_cry_8_S), .Y(un5_m_timer_irq_cry_8_Y), .B(mtime_count_out[8]), .C(GND), .D(GND), .A(mtimecmp_Z[8]), .FCI(un5_m_timer_irq_cry_7_Z) ); defparam un5_m_timer_irq_cry_8.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_9 ( .FCO(un5_m_timer_irq_cry_9_Z), .S(un5_m_timer_irq_cry_9_S), .Y(un5_m_timer_irq_cry_9_Y), .B(mtime_count_out[9]), .C(GND), .D(GND), .A(mtimecmp_Z[9]), .FCI(un5_m_timer_irq_cry_8_Z) ); defparam un5_m_timer_irq_cry_9.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_10 ( .FCO(un5_m_timer_irq_cry_10_Z), .S(un5_m_timer_irq_cry_10_S), .Y(un5_m_timer_irq_cry_10_Y), .B(mtime_count_out[10]), .C(GND), .D(GND), .A(mtimecmp_Z[10]), .FCI(un5_m_timer_irq_cry_9_Z) ); defparam un5_m_timer_irq_cry_10.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_11 ( .FCO(un5_m_timer_irq_cry_11_Z), .S(un5_m_timer_irq_cry_11_S), .Y(un5_m_timer_irq_cry_11_Y), .B(mtime_count_out[11]), .C(GND), .D(GND), .A(mtimecmp_Z[11]), .FCI(un5_m_timer_irq_cry_10_Z) ); defparam un5_m_timer_irq_cry_11.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_12 ( .FCO(un5_m_timer_irq_cry_12_Z), .S(un5_m_timer_irq_cry_12_S), .Y(un5_m_timer_irq_cry_12_Y), .B(mtime_count_out[12]), .C(GND), .D(GND), .A(mtimecmp_Z[12]), .FCI(un5_m_timer_irq_cry_11_Z) ); defparam un5_m_timer_irq_cry_12.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_13 ( .FCO(un5_m_timer_irq_cry_13_Z), .S(un5_m_timer_irq_cry_13_S), .Y(un5_m_timer_irq_cry_13_Y), .B(mtime_count_out[13]), .C(GND), .D(GND), .A(mtimecmp_Z[13]), .FCI(un5_m_timer_irq_cry_12_Z) ); defparam un5_m_timer_irq_cry_13.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_14 ( .FCO(un5_m_timer_irq_cry_14_Z), .S(un5_m_timer_irq_cry_14_S), .Y(un5_m_timer_irq_cry_14_Y), .B(mtime_count_out[14]), .C(GND), .D(GND), .A(mtimecmp_Z[14]), .FCI(un5_m_timer_irq_cry_13_Z) ); defparam un5_m_timer_irq_cry_14.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_15 ( .FCO(un5_m_timer_irq_cry_15_Z), .S(un5_m_timer_irq_cry_15_S), .Y(un5_m_timer_irq_cry_15_Y), .B(mtime_count_out[15]), .C(GND), .D(GND), .A(mtimecmp_Z[15]), .FCI(un5_m_timer_irq_cry_14_Z) ); defparam un5_m_timer_irq_cry_15.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_16 ( .FCO(un5_m_timer_irq_cry_16_Z), .S(un5_m_timer_irq_cry_16_S), .Y(un5_m_timer_irq_cry_16_Y), .B(mtime_count_out[16]), .C(GND), .D(GND), .A(mtimecmp_Z[16]), .FCI(un5_m_timer_irq_cry_15_Z) ); defparam un5_m_timer_irq_cry_16.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_17 ( .FCO(un5_m_timer_irq_cry_17_Z), .S(un5_m_timer_irq_cry_17_S), .Y(un5_m_timer_irq_cry_17_Y), .B(mtime_count_out[17]), .C(GND), .D(GND), .A(mtimecmp_Z[17]), .FCI(un5_m_timer_irq_cry_16_Z) ); defparam un5_m_timer_irq_cry_17.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_18 ( .FCO(un5_m_timer_irq_cry_18_Z), .S(un5_m_timer_irq_cry_18_S), .Y(un5_m_timer_irq_cry_18_Y), .B(mtime_count_out[18]), .C(GND), .D(GND), .A(mtimecmp_Z[18]), .FCI(un5_m_timer_irq_cry_17_Z) ); defparam un5_m_timer_irq_cry_18.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_19 ( .FCO(un5_m_timer_irq_cry_19_Z), .S(un5_m_timer_irq_cry_19_S), .Y(un5_m_timer_irq_cry_19_Y), .B(mtime_count_out[19]), .C(GND), .D(GND), .A(mtimecmp_Z[19]), .FCI(un5_m_timer_irq_cry_18_Z) ); defparam un5_m_timer_irq_cry_19.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_20 ( .FCO(un5_m_timer_irq_cry_20_Z), .S(un5_m_timer_irq_cry_20_S), .Y(un5_m_timer_irq_cry_20_Y), .B(mtime_count_out[20]), .C(GND), .D(GND), .A(mtimecmp_Z[20]), .FCI(un5_m_timer_irq_cry_19_Z) ); defparam un5_m_timer_irq_cry_20.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_21 ( .FCO(un5_m_timer_irq_cry_21_Z), .S(un5_m_timer_irq_cry_21_S), .Y(un5_m_timer_irq_cry_21_Y), .B(mtime_count_out[21]), .C(GND), .D(GND), .A(mtimecmp_Z[21]), .FCI(un5_m_timer_irq_cry_20_Z) ); defparam un5_m_timer_irq_cry_21.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_22 ( .FCO(un5_m_timer_irq_cry_22_Z), .S(un5_m_timer_irq_cry_22_S), .Y(un5_m_timer_irq_cry_22_Y), .B(mtime_count_out[22]), .C(GND), .D(GND), .A(mtimecmp_Z[22]), .FCI(un5_m_timer_irq_cry_21_Z) ); defparam un5_m_timer_irq_cry_22.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_23 ( .FCO(un5_m_timer_irq_cry_23_Z), .S(un5_m_timer_irq_cry_23_S), .Y(un5_m_timer_irq_cry_23_Y), .B(mtime_count_out[23]), .C(GND), .D(GND), .A(mtimecmp_Z[23]), .FCI(un5_m_timer_irq_cry_22_Z) ); defparam un5_m_timer_irq_cry_23.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_24 ( .FCO(un5_m_timer_irq_cry_24_Z), .S(un5_m_timer_irq_cry_24_S), .Y(un5_m_timer_irq_cry_24_Y), .B(mtime_count_out[24]), .C(GND), .D(GND), .A(mtimecmp_Z[24]), .FCI(un5_m_timer_irq_cry_23_Z) ); defparam un5_m_timer_irq_cry_24.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_25 ( .FCO(un5_m_timer_irq_cry_25_Z), .S(un5_m_timer_irq_cry_25_S), .Y(un5_m_timer_irq_cry_25_Y), .B(mtime_count_out[25]), .C(GND), .D(GND), .A(mtimecmp_Z[25]), .FCI(un5_m_timer_irq_cry_24_Z) ); defparam un5_m_timer_irq_cry_25.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_26 ( .FCO(un5_m_timer_irq_cry_26_Z), .S(un5_m_timer_irq_cry_26_S), .Y(un5_m_timer_irq_cry_26_Y), .B(mtime_count_out[26]), .C(GND), .D(GND), .A(mtimecmp_Z[26]), .FCI(un5_m_timer_irq_cry_25_Z) ); defparam un5_m_timer_irq_cry_26.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_27 ( .FCO(un5_m_timer_irq_cry_27_Z), .S(un5_m_timer_irq_cry_27_S), .Y(un5_m_timer_irq_cry_27_Y), .B(mtime_count_out[27]), .C(GND), .D(GND), .A(mtimecmp_Z[27]), .FCI(un5_m_timer_irq_cry_26_Z) ); defparam un5_m_timer_irq_cry_27.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_28 ( .FCO(un5_m_timer_irq_cry_28_Z), .S(un5_m_timer_irq_cry_28_S), .Y(un5_m_timer_irq_cry_28_Y), .B(mtime_count_out[28]), .C(GND), .D(GND), .A(mtimecmp_Z[28]), .FCI(un5_m_timer_irq_cry_27_Z) ); defparam un5_m_timer_irq_cry_28.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_29 ( .FCO(un5_m_timer_irq_cry_29_Z), .S(un5_m_timer_irq_cry_29_S), .Y(un5_m_timer_irq_cry_29_Y), .B(mtime_count_out[29]), .C(GND), .D(GND), .A(mtimecmp_Z[29]), .FCI(un5_m_timer_irq_cry_28_Z) ); defparam un5_m_timer_irq_cry_29.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_30 ( .FCO(un5_m_timer_irq_cry_30_Z), .S(un5_m_timer_irq_cry_30_S), .Y(un5_m_timer_irq_cry_30_Y), .B(mtime_count_out[30]), .C(GND), .D(GND), .A(mtimecmp_Z[30]), .FCI(un5_m_timer_irq_cry_29_Z) ); defparam un5_m_timer_irq_cry_30.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_31 ( .FCO(un5_m_timer_irq_cry_31_Z), .S(un5_m_timer_irq_cry_31_S), .Y(un5_m_timer_irq_cry_31_Y), .B(mtime_count_out[31]), .C(GND), .D(GND), .A(mtimecmp_Z[31]), .FCI(un5_m_timer_irq_cry_30_Z) ); defparam un5_m_timer_irq_cry_31.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_32 ( .FCO(un5_m_timer_irq_cry_32_Z), .S(un5_m_timer_irq_cry_32_S), .Y(un5_m_timer_irq_cry_32_Y), .B(mtime_count_out[32]), .C(GND), .D(GND), .A(mtimecmp_Z[32]), .FCI(un5_m_timer_irq_cry_31_Z) ); defparam un5_m_timer_irq_cry_32.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_33 ( .FCO(un5_m_timer_irq_cry_33_Z), .S(un5_m_timer_irq_cry_33_S), .Y(un5_m_timer_irq_cry_33_Y), .B(mtime_count_out[33]), .C(GND), .D(GND), .A(mtimecmp_Z[33]), .FCI(un5_m_timer_irq_cry_32_Z) ); defparam un5_m_timer_irq_cry_33.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_34 ( .FCO(un5_m_timer_irq_cry_34_Z), .S(un5_m_timer_irq_cry_34_S), .Y(un5_m_timer_irq_cry_34_Y), .B(mtime_count_out[34]), .C(GND), .D(GND), .A(mtimecmp_Z[34]), .FCI(un5_m_timer_irq_cry_33_Z) ); defparam un5_m_timer_irq_cry_34.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_35 ( .FCO(un5_m_timer_irq_cry_35_Z), .S(un5_m_timer_irq_cry_35_S), .Y(un5_m_timer_irq_cry_35_Y), .B(mtime_count_out[35]), .C(GND), .D(GND), .A(mtimecmp_Z[35]), .FCI(un5_m_timer_irq_cry_34_Z) ); defparam un5_m_timer_irq_cry_35.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_36 ( .FCO(un5_m_timer_irq_cry_36_Z), .S(un5_m_timer_irq_cry_36_S), .Y(un5_m_timer_irq_cry_36_Y), .B(mtime_count_out[36]), .C(GND), .D(GND), .A(mtimecmp_Z[36]), .FCI(un5_m_timer_irq_cry_35_Z) ); defparam un5_m_timer_irq_cry_36.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_37 ( .FCO(un5_m_timer_irq_cry_37_Z), .S(un5_m_timer_irq_cry_37_S), .Y(un5_m_timer_irq_cry_37_Y), .B(mtime_count_out[37]), .C(GND), .D(GND), .A(mtimecmp_Z[37]), .FCI(un5_m_timer_irq_cry_36_Z) ); defparam un5_m_timer_irq_cry_37.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_38 ( .FCO(un5_m_timer_irq_cry_38_Z), .S(un5_m_timer_irq_cry_38_S), .Y(un5_m_timer_irq_cry_38_Y), .B(mtime_count_out[38]), .C(GND), .D(GND), .A(mtimecmp_Z[38]), .FCI(un5_m_timer_irq_cry_37_Z) ); defparam un5_m_timer_irq_cry_38.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_39 ( .FCO(un5_m_timer_irq_cry_39_Z), .S(un5_m_timer_irq_cry_39_S), .Y(un5_m_timer_irq_cry_39_Y), .B(mtime_count_out[39]), .C(GND), .D(GND), .A(mtimecmp_Z[39]), .FCI(un5_m_timer_irq_cry_38_Z) ); defparam un5_m_timer_irq_cry_39.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_40 ( .FCO(un5_m_timer_irq_cry_40_Z), .S(un5_m_timer_irq_cry_40_S), .Y(un5_m_timer_irq_cry_40_Y), .B(mtime_count_out[40]), .C(GND), .D(GND), .A(mtimecmp_Z[40]), .FCI(un5_m_timer_irq_cry_39_Z) ); defparam un5_m_timer_irq_cry_40.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_41 ( .FCO(un5_m_timer_irq_cry_41_Z), .S(un5_m_timer_irq_cry_41_S), .Y(un5_m_timer_irq_cry_41_Y), .B(mtime_count_out[41]), .C(GND), .D(GND), .A(mtimecmp_Z[41]), .FCI(un5_m_timer_irq_cry_40_Z) ); defparam un5_m_timer_irq_cry_41.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_42 ( .FCO(un5_m_timer_irq_cry_42_Z), .S(un5_m_timer_irq_cry_42_S), .Y(un5_m_timer_irq_cry_42_Y), .B(mtime_count_out[42]), .C(GND), .D(GND), .A(mtimecmp_Z[42]), .FCI(un5_m_timer_irq_cry_41_Z) ); defparam un5_m_timer_irq_cry_42.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_43 ( .FCO(un5_m_timer_irq_cry_43_Z), .S(un5_m_timer_irq_cry_43_S), .Y(un5_m_timer_irq_cry_43_Y), .B(mtime_count_out[43]), .C(GND), .D(GND), .A(mtimecmp_Z[43]), .FCI(un5_m_timer_irq_cry_42_Z) ); defparam un5_m_timer_irq_cry_43.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_44 ( .FCO(un5_m_timer_irq_cry_44_Z), .S(un5_m_timer_irq_cry_44_S), .Y(un5_m_timer_irq_cry_44_Y), .B(mtime_count_out[44]), .C(GND), .D(GND), .A(mtimecmp_Z[44]), .FCI(un5_m_timer_irq_cry_43_Z) ); defparam un5_m_timer_irq_cry_44.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_45 ( .FCO(un5_m_timer_irq_cry_45_Z), .S(un5_m_timer_irq_cry_45_S), .Y(un5_m_timer_irq_cry_45_Y), .B(mtime_count_out[45]), .C(GND), .D(GND), .A(mtimecmp_Z[45]), .FCI(un5_m_timer_irq_cry_44_Z) ); defparam un5_m_timer_irq_cry_45.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_46 ( .FCO(un5_m_timer_irq_cry_46_Z), .S(un5_m_timer_irq_cry_46_S), .Y(un5_m_timer_irq_cry_46_Y), .B(mtime_count_out[46]), .C(GND), .D(GND), .A(mtimecmp_Z[46]), .FCI(un5_m_timer_irq_cry_45_Z) ); defparam un5_m_timer_irq_cry_46.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_47 ( .FCO(un5_m_timer_irq_cry_47_Z), .S(un5_m_timer_irq_cry_47_S), .Y(un5_m_timer_irq_cry_47_Y), .B(mtime_count_out[47]), .C(GND), .D(GND), .A(mtimecmp_Z[47]), .FCI(un5_m_timer_irq_cry_46_Z) ); defparam un5_m_timer_irq_cry_47.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_48 ( .FCO(un5_m_timer_irq_cry_48_Z), .S(un5_m_timer_irq_cry_48_S), .Y(un5_m_timer_irq_cry_48_Y), .B(mtime_count_out[48]), .C(GND), .D(GND), .A(mtimecmp_Z[48]), .FCI(un5_m_timer_irq_cry_47_Z) ); defparam un5_m_timer_irq_cry_48.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_49 ( .FCO(un5_m_timer_irq_cry_49_Z), .S(un5_m_timer_irq_cry_49_S), .Y(un5_m_timer_irq_cry_49_Y), .B(mtime_count_out[49]), .C(GND), .D(GND), .A(mtimecmp_Z[49]), .FCI(un5_m_timer_irq_cry_48_Z) ); defparam un5_m_timer_irq_cry_49.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_50 ( .FCO(un5_m_timer_irq_cry_50_Z), .S(un5_m_timer_irq_cry_50_S), .Y(un5_m_timer_irq_cry_50_Y), .B(mtime_count_out[50]), .C(GND), .D(GND), .A(mtimecmp_Z[50]), .FCI(un5_m_timer_irq_cry_49_Z) ); defparam un5_m_timer_irq_cry_50.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_51 ( .FCO(un5_m_timer_irq_cry_51_Z), .S(un5_m_timer_irq_cry_51_S), .Y(un5_m_timer_irq_cry_51_Y), .B(mtime_count_out[51]), .C(GND), .D(GND), .A(mtimecmp_Z[51]), .FCI(un5_m_timer_irq_cry_50_Z) ); defparam un5_m_timer_irq_cry_51.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_52 ( .FCO(un5_m_timer_irq_cry_52_Z), .S(un5_m_timer_irq_cry_52_S), .Y(un5_m_timer_irq_cry_52_Y), .B(mtime_count_out[52]), .C(GND), .D(GND), .A(mtimecmp_Z[52]), .FCI(un5_m_timer_irq_cry_51_Z) ); defparam un5_m_timer_irq_cry_52.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_53 ( .FCO(un5_m_timer_irq_cry_53_Z), .S(un5_m_timer_irq_cry_53_S), .Y(un5_m_timer_irq_cry_53_Y), .B(mtime_count_out[53]), .C(GND), .D(GND), .A(mtimecmp_Z[53]), .FCI(un5_m_timer_irq_cry_52_Z) ); defparam un5_m_timer_irq_cry_53.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_54 ( .FCO(un5_m_timer_irq_cry_54_Z), .S(un5_m_timer_irq_cry_54_S), .Y(un5_m_timer_irq_cry_54_Y), .B(mtime_count_out[54]), .C(GND), .D(GND), .A(mtimecmp_Z[54]), .FCI(un5_m_timer_irq_cry_53_Z) ); defparam un5_m_timer_irq_cry_54.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_55 ( .FCO(un5_m_timer_irq_cry_55_Z), .S(un5_m_timer_irq_cry_55_S), .Y(un5_m_timer_irq_cry_55_Y), .B(mtime_count_out[55]), .C(GND), .D(GND), .A(mtimecmp_Z[55]), .FCI(un5_m_timer_irq_cry_54_Z) ); defparam un5_m_timer_irq_cry_55.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_56 ( .FCO(un5_m_timer_irq_cry_56_Z), .S(un5_m_timer_irq_cry_56_S), .Y(un5_m_timer_irq_cry_56_Y), .B(mtime_count_out[56]), .C(GND), .D(GND), .A(mtimecmp_Z[56]), .FCI(un5_m_timer_irq_cry_55_Z) ); defparam un5_m_timer_irq_cry_56.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_57 ( .FCO(un5_m_timer_irq_cry_57_Z), .S(un5_m_timer_irq_cry_57_S), .Y(un5_m_timer_irq_cry_57_Y), .B(mtime_count_out[57]), .C(GND), .D(GND), .A(mtimecmp_Z[57]), .FCI(un5_m_timer_irq_cry_56_Z) ); defparam un5_m_timer_irq_cry_57.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_58 ( .FCO(un5_m_timer_irq_cry_58_Z), .S(un5_m_timer_irq_cry_58_S), .Y(un5_m_timer_irq_cry_58_Y), .B(mtime_count_out[58]), .C(GND), .D(GND), .A(mtimecmp_Z[58]), .FCI(un5_m_timer_irq_cry_57_Z) ); defparam un5_m_timer_irq_cry_58.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_59 ( .FCO(un5_m_timer_irq_cry_59_Z), .S(un5_m_timer_irq_cry_59_S), .Y(un5_m_timer_irq_cry_59_Y), .B(mtime_count_out[59]), .C(GND), .D(GND), .A(mtimecmp_Z[59]), .FCI(un5_m_timer_irq_cry_58_Z) ); defparam un5_m_timer_irq_cry_59.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_60 ( .FCO(un5_m_timer_irq_cry_60_Z), .S(un5_m_timer_irq_cry_60_S), .Y(un5_m_timer_irq_cry_60_Y), .B(mtime_count_out[60]), .C(GND), .D(GND), .A(mtimecmp_Z[60]), .FCI(un5_m_timer_irq_cry_59_Z) ); defparam un5_m_timer_irq_cry_60.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_61 ( .FCO(un5_m_timer_irq_cry_61_Z), .S(un5_m_timer_irq_cry_61_S), .Y(un5_m_timer_irq_cry_61_Y), .B(mtime_count_out[61]), .C(GND), .D(GND), .A(mtimecmp_Z[61]), .FCI(un5_m_timer_irq_cry_60_Z) ); defparam un5_m_timer_irq_cry_61.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_62 ( .FCO(un5_m_timer_irq_cry_62_Z), .S(un5_m_timer_irq_cry_62_S), .Y(un5_m_timer_irq_cry_62_Y), .B(mtime_count_out[62]), .C(GND), .D(GND), .A(mtimecmp_Z[62]), .FCI(un5_m_timer_irq_cry_61_Z) ); defparam un5_m_timer_irq_cry_62.INIT=20'h5AA55; // @48:13049 ARI1 un5_m_timer_irq_cry_63 ( .FCO(un5_m_timer_irq_cry_63_1z), .S(un5_m_timer_irq_cry_63_S), .Y(un5_m_timer_irq_cry_63_Y), .B(mtime_count_out[63]), .C(GND), .D(GND), .A(mtimecmp_Z[63]), .FCI(un5_m_timer_irq_cry_62_Z) ); defparam un5_m_timer_irq_cry_63.INIT=20'h5AA55; // @48:13076 ARI1 mtime_count_out_s_4131 ( .FCO(mtime_count_out_s_4131_FCO), .S(mtime_count_out_s_4131_S), .Y(mtime_count_out_s_4131_Y), .B(mtime_count_out[0]), .C(GND), .D(GND), .A(VCC), .FCI(VCC) ); defparam mtime_count_out_s_4131.INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[1] ( .FCO(mtime_count_out_cry_Z[1]), .S(mtime_count_out_s[1]), .Y(mtime_count_out_cry_Y[1]), .B(mtime_count_out[1]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_s_4131_FCO) ); defparam \mtime_count_out_cry[1] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[2] ( .FCO(mtime_count_out_cry_Z[2]), .S(mtime_count_out_s[2]), .Y(mtime_count_out_cry_Y[2]), .B(mtime_count_out[2]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[1]) ); defparam \mtime_count_out_cry[2] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[3] ( .FCO(mtime_count_out_cry_Z[3]), .S(mtime_count_out_s[3]), .Y(mtime_count_out_cry_Y[3]), .B(mtime_count_out[3]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[2]) ); defparam \mtime_count_out_cry[3] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[4] ( .FCO(mtime_count_out_cry_Z[4]), .S(mtime_count_out_s[4]), .Y(mtime_count_out_cry_Y[4]), .B(mtime_count_out[4]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[3]) ); defparam \mtime_count_out_cry[4] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[5] ( .FCO(mtime_count_out_cry_Z[5]), .S(mtime_count_out_s[5]), .Y(mtime_count_out_cry_Y[5]), .B(mtime_count_out[5]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[4]) ); defparam \mtime_count_out_cry[5] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[6] ( .FCO(mtime_count_out_cry_Z[6]), .S(mtime_count_out_s[6]), .Y(mtime_count_out_cry_Y[6]), .B(mtime_count_out[6]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[5]) ); defparam \mtime_count_out_cry[6] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[7] ( .FCO(mtime_count_out_cry_Z[7]), .S(mtime_count_out_s[7]), .Y(mtime_count_out_cry_Y[7]), .B(mtime_count_out[7]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[6]) ); defparam \mtime_count_out_cry[7] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[8] ( .FCO(mtime_count_out_cry_Z[8]), .S(mtime_count_out_s[8]), .Y(mtime_count_out_cry_Y[8]), .B(mtime_count_out[8]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[7]) ); defparam \mtime_count_out_cry[8] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[9] ( .FCO(mtime_count_out_cry_Z[9]), .S(mtime_count_out_s[9]), .Y(mtime_count_out_cry_Y[9]), .B(mtime_count_out[9]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[8]) ); defparam \mtime_count_out_cry[9] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[10] ( .FCO(mtime_count_out_cry_Z[10]), .S(mtime_count_out_s[10]), .Y(mtime_count_out_cry_Y[10]), .B(mtime_count_out[10]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[9]) ); defparam \mtime_count_out_cry[10] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[11] ( .FCO(mtime_count_out_cry_Z[11]), .S(mtime_count_out_s[11]), .Y(mtime_count_out_cry_Y[11]), .B(mtime_count_out[11]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[10]) ); defparam \mtime_count_out_cry[11] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[12] ( .FCO(mtime_count_out_cry_Z[12]), .S(mtime_count_out_s[12]), .Y(mtime_count_out_cry_Y[12]), .B(mtime_count_out[12]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[11]) ); defparam \mtime_count_out_cry[12] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[13] ( .FCO(mtime_count_out_cry_Z[13]), .S(mtime_count_out_s[13]), .Y(mtime_count_out_cry_Y[13]), .B(mtime_count_out[13]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[12]) ); defparam \mtime_count_out_cry[13] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[14] ( .FCO(mtime_count_out_cry_Z[14]), .S(mtime_count_out_s[14]), .Y(mtime_count_out_cry_Y[14]), .B(mtime_count_out[14]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[13]) ); defparam \mtime_count_out_cry[14] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[15] ( .FCO(mtime_count_out_cry_Z[15]), .S(mtime_count_out_s[15]), .Y(mtime_count_out_cry_Y[15]), .B(mtime_count_out[15]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[14]) ); defparam \mtime_count_out_cry[15] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[16] ( .FCO(mtime_count_out_cry_Z[16]), .S(mtime_count_out_s[16]), .Y(mtime_count_out_cry_Y[16]), .B(mtime_count_out[16]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[15]) ); defparam \mtime_count_out_cry[16] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[17] ( .FCO(mtime_count_out_cry_Z[17]), .S(mtime_count_out_s[17]), .Y(mtime_count_out_cry_Y[17]), .B(mtime_count_out[17]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[16]) ); defparam \mtime_count_out_cry[17] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[18] ( .FCO(mtime_count_out_cry_Z[18]), .S(mtime_count_out_s[18]), .Y(mtime_count_out_cry_Y[18]), .B(mtime_count_out[18]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[17]) ); defparam \mtime_count_out_cry[18] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[19] ( .FCO(mtime_count_out_cry_Z[19]), .S(mtime_count_out_s[19]), .Y(mtime_count_out_cry_Y[19]), .B(mtime_count_out[19]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[18]) ); defparam \mtime_count_out_cry[19] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[20] ( .FCO(mtime_count_out_cry_Z[20]), .S(mtime_count_out_s[20]), .Y(mtime_count_out_cry_Y[20]), .B(mtime_count_out[20]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[19]) ); defparam \mtime_count_out_cry[20] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[21] ( .FCO(mtime_count_out_cry_Z[21]), .S(mtime_count_out_s[21]), .Y(mtime_count_out_cry_Y[21]), .B(mtime_count_out[21]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[20]) ); defparam \mtime_count_out_cry[21] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[22] ( .FCO(mtime_count_out_cry_Z[22]), .S(mtime_count_out_s[22]), .Y(mtime_count_out_cry_Y[22]), .B(mtime_count_out[22]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[21]) ); defparam \mtime_count_out_cry[22] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[23] ( .FCO(mtime_count_out_cry_Z[23]), .S(mtime_count_out_s[23]), .Y(mtime_count_out_cry_Y[23]), .B(mtime_count_out[23]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[22]) ); defparam \mtime_count_out_cry[23] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[24] ( .FCO(mtime_count_out_cry_Z[24]), .S(mtime_count_out_s[24]), .Y(mtime_count_out_cry_Y[24]), .B(mtime_count_out[24]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[23]) ); defparam \mtime_count_out_cry[24] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[25] ( .FCO(mtime_count_out_cry_Z[25]), .S(mtime_count_out_s[25]), .Y(mtime_count_out_cry_Y[25]), .B(mtime_count_out[25]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[24]) ); defparam \mtime_count_out_cry[25] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[26] ( .FCO(mtime_count_out_cry_Z[26]), .S(mtime_count_out_s[26]), .Y(mtime_count_out_cry_Y[26]), .B(mtime_count_out[26]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[25]) ); defparam \mtime_count_out_cry[26] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[27] ( .FCO(mtime_count_out_cry_Z[27]), .S(mtime_count_out_s[27]), .Y(mtime_count_out_cry_Y[27]), .B(mtime_count_out[27]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[26]) ); defparam \mtime_count_out_cry[27] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[28] ( .FCO(mtime_count_out_cry_Z[28]), .S(mtime_count_out_s[28]), .Y(mtime_count_out_cry_Y[28]), .B(mtime_count_out[28]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[27]) ); defparam \mtime_count_out_cry[28] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[29] ( .FCO(mtime_count_out_cry_Z[29]), .S(mtime_count_out_s[29]), .Y(mtime_count_out_cry_Y[29]), .B(mtime_count_out[29]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[28]) ); defparam \mtime_count_out_cry[29] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[30] ( .FCO(mtime_count_out_cry_Z[30]), .S(mtime_count_out_s[30]), .Y(mtime_count_out_cry_Y[30]), .B(mtime_count_out[30]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[29]) ); defparam \mtime_count_out_cry[30] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[31] ( .FCO(mtime_count_out_cry_Z[31]), .S(mtime_count_out_s[31]), .Y(mtime_count_out_cry_Y[31]), .B(mtime_count_out[31]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[30]) ); defparam \mtime_count_out_cry[31] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[32] ( .FCO(mtime_count_out_cry_Z[32]), .S(mtime_count_out_s[32]), .Y(mtime_count_out_cry_Y[32]), .B(mtime_count_out[32]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[31]) ); defparam \mtime_count_out_cry[32] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[33] ( .FCO(mtime_count_out_cry_Z[33]), .S(mtime_count_out_s[33]), .Y(mtime_count_out_cry_Y[33]), .B(mtime_count_out[33]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[32]) ); defparam \mtime_count_out_cry[33] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[34] ( .FCO(mtime_count_out_cry_Z[34]), .S(mtime_count_out_s[34]), .Y(mtime_count_out_cry_Y[34]), .B(mtime_count_out[34]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[33]) ); defparam \mtime_count_out_cry[34] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[35] ( .FCO(mtime_count_out_cry_Z[35]), .S(mtime_count_out_s[35]), .Y(mtime_count_out_cry_Y[35]), .B(mtime_count_out[35]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[34]) ); defparam \mtime_count_out_cry[35] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[36] ( .FCO(mtime_count_out_cry_Z[36]), .S(mtime_count_out_s[36]), .Y(mtime_count_out_cry_Y[36]), .B(mtime_count_out[36]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[35]) ); defparam \mtime_count_out_cry[36] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[37] ( .FCO(mtime_count_out_cry_Z[37]), .S(mtime_count_out_s[37]), .Y(mtime_count_out_cry_Y[37]), .B(mtime_count_out[37]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[36]) ); defparam \mtime_count_out_cry[37] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[38] ( .FCO(mtime_count_out_cry_Z[38]), .S(mtime_count_out_s[38]), .Y(mtime_count_out_cry_Y[38]), .B(mtime_count_out[38]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[37]) ); defparam \mtime_count_out_cry[38] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[39] ( .FCO(mtime_count_out_cry_Z[39]), .S(mtime_count_out_s[39]), .Y(mtime_count_out_cry_Y[39]), .B(mtime_count_out[39]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[38]) ); defparam \mtime_count_out_cry[39] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[40] ( .FCO(mtime_count_out_cry_Z[40]), .S(mtime_count_out_s[40]), .Y(mtime_count_out_cry_Y[40]), .B(mtime_count_out[40]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[39]) ); defparam \mtime_count_out_cry[40] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[41] ( .FCO(mtime_count_out_cry_Z[41]), .S(mtime_count_out_s[41]), .Y(mtime_count_out_cry_Y[41]), .B(mtime_count_out[41]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[40]) ); defparam \mtime_count_out_cry[41] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[42] ( .FCO(mtime_count_out_cry_Z[42]), .S(mtime_count_out_s[42]), .Y(mtime_count_out_cry_Y[42]), .B(mtime_count_out[42]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[41]) ); defparam \mtime_count_out_cry[42] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[43] ( .FCO(mtime_count_out_cry_Z[43]), .S(mtime_count_out_s[43]), .Y(mtime_count_out_cry_Y[43]), .B(mtime_count_out[43]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[42]) ); defparam \mtime_count_out_cry[43] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[44] ( .FCO(mtime_count_out_cry_Z[44]), .S(mtime_count_out_s[44]), .Y(mtime_count_out_cry_Y[44]), .B(mtime_count_out[44]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[43]) ); defparam \mtime_count_out_cry[44] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[45] ( .FCO(mtime_count_out_cry_Z[45]), .S(mtime_count_out_s[45]), .Y(mtime_count_out_cry_Y[45]), .B(mtime_count_out[45]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[44]) ); defparam \mtime_count_out_cry[45] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[46] ( .FCO(mtime_count_out_cry_Z[46]), .S(mtime_count_out_s[46]), .Y(mtime_count_out_cry_Y[46]), .B(mtime_count_out[46]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[45]) ); defparam \mtime_count_out_cry[46] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[47] ( .FCO(mtime_count_out_cry_Z[47]), .S(mtime_count_out_s[47]), .Y(mtime_count_out_cry_Y[47]), .B(mtime_count_out[47]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[46]) ); defparam \mtime_count_out_cry[47] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[48] ( .FCO(mtime_count_out_cry_Z[48]), .S(mtime_count_out_s[48]), .Y(mtime_count_out_cry_Y[48]), .B(mtime_count_out[48]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[47]) ); defparam \mtime_count_out_cry[48] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[49] ( .FCO(mtime_count_out_cry_Z[49]), .S(mtime_count_out_s[49]), .Y(mtime_count_out_cry_Y[49]), .B(mtime_count_out[49]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[48]) ); defparam \mtime_count_out_cry[49] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[50] ( .FCO(mtime_count_out_cry_Z[50]), .S(mtime_count_out_s[50]), .Y(mtime_count_out_cry_Y[50]), .B(mtime_count_out[50]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[49]) ); defparam \mtime_count_out_cry[50] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[51] ( .FCO(mtime_count_out_cry_Z[51]), .S(mtime_count_out_s[51]), .Y(mtime_count_out_cry_Y[51]), .B(mtime_count_out[51]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[50]) ); defparam \mtime_count_out_cry[51] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[52] ( .FCO(mtime_count_out_cry_Z[52]), .S(mtime_count_out_s[52]), .Y(mtime_count_out_cry_Y[52]), .B(mtime_count_out[52]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[51]) ); defparam \mtime_count_out_cry[52] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[53] ( .FCO(mtime_count_out_cry_Z[53]), .S(mtime_count_out_s[53]), .Y(mtime_count_out_cry_Y[53]), .B(mtime_count_out[53]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[52]) ); defparam \mtime_count_out_cry[53] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[54] ( .FCO(mtime_count_out_cry_Z[54]), .S(mtime_count_out_s[54]), .Y(mtime_count_out_cry_Y[54]), .B(mtime_count_out[54]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[53]) ); defparam \mtime_count_out_cry[54] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[55] ( .FCO(mtime_count_out_cry_Z[55]), .S(mtime_count_out_s[55]), .Y(mtime_count_out_cry_Y[55]), .B(mtime_count_out[55]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[54]) ); defparam \mtime_count_out_cry[55] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[56] ( .FCO(mtime_count_out_cry_Z[56]), .S(mtime_count_out_s[56]), .Y(mtime_count_out_cry_Y[56]), .B(mtime_count_out[56]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[55]) ); defparam \mtime_count_out_cry[56] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[57] ( .FCO(mtime_count_out_cry_Z[57]), .S(mtime_count_out_s[57]), .Y(mtime_count_out_cry_Y[57]), .B(mtime_count_out[57]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[56]) ); defparam \mtime_count_out_cry[57] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[58] ( .FCO(mtime_count_out_cry_Z[58]), .S(mtime_count_out_s[58]), .Y(mtime_count_out_cry_Y[58]), .B(mtime_count_out[58]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[57]) ); defparam \mtime_count_out_cry[58] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[59] ( .FCO(mtime_count_out_cry_Z[59]), .S(mtime_count_out_s[59]), .Y(mtime_count_out_cry_Y[59]), .B(mtime_count_out[59]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[58]) ); defparam \mtime_count_out_cry[59] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[60] ( .FCO(mtime_count_out_cry_Z[60]), .S(mtime_count_out_s[60]), .Y(mtime_count_out_cry_Y[60]), .B(mtime_count_out[60]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[59]) ); defparam \mtime_count_out_cry[60] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[61] ( .FCO(mtime_count_out_cry_Z[61]), .S(mtime_count_out_s[61]), .Y(mtime_count_out_cry_Y[61]), .B(mtime_count_out[61]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[60]) ); defparam \mtime_count_out_cry[61] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_s[63] ( .FCO(mtime_count_out_s_FCO[63]), .S(mtime_count_out_s_Z[63]), .Y(mtime_count_out_s_Y[63]), .B(mtime_count_out[63]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[62]) ); defparam \mtime_count_out_s[63] .INIT=20'h4AA00; // @48:13076 ARI1 \mtime_count_out_cry[62] ( .FCO(mtime_count_out_cry_Z[62]), .S(mtime_count_out_s[62]), .Y(mtime_count_out_cry_Y[62]), .B(mtime_count_out[62]), .C(GND), .D(GND), .A(VCC), .FCI(mtime_count_out_cry_Z[61]) ); defparam \mtime_count_out_cry[62] .INIT=20'h4AA00; // @48:13042 CFG3 un7_T_l_En_0_a2 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_0), .B(N_1201), .C(N_1225), .Y(un7_T_l_En_i) ); defparam un7_T_l_En_0_a2.INIT=8'h40; // @48:13042 CFG4 \p_MTIME.un1_T_l_En_0_a2 ( .A(un6_T_h_En_i), .B(N_88), .C(CoreAPB3_0_0_APBmslave0_PWRITE), .D(un7_T_l_En_i), .Y(un1_T_l_En) ); defparam \p_MTIME.un1_T_l_En_0_a2 .INIT=16'hC080; // @48:13076 CFG4 \mtime_count_out_lm_0[0] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[0]), .D(wrdata_0), .Y(mtime_count_out_lm[0]) ); defparam \mtime_count_out_lm_0[0] .INIT=16'hCB43; // @48:13114 CFG4 prdata_0_sqmuxa_0_a2_0 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_7), .B(prdata_0_sqmuxa_0_a2_0_1_Z), .C(N_1206), .D(prdata_0_sqmuxa_0_a2_0_7_Z), .Y(N_1212) ); defparam prdata_0_sqmuxa_0_a2_0.INIT=16'h4000; // @48:13114 CFG4 prdata_0_sqmuxa_0_a2_0_1 ( .A(apb_paddr_11), .B(CoreAPB3_0_0_APBmslave0_PADDR_24), .C(CoreAPB3_0_0_APBmslave0_PADDR_23), .D(CoreAPB3_0_0_APBmslave0_PADDR_5), .Y(prdata_0_sqmuxa_0_a2_0_1_Z) ); defparam prdata_0_sqmuxa_0_a2_0_1.INIT=16'h0004; // @48:13042 CFG2 un7_T_l_En_0_a2_0_4 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_5), .B(CoreAPB3_0_0_APBmslave0_PADDR_6), .Y(un7_T_l_En_0_a2_0_4_Z) ); defparam un7_T_l_En_0_a2_0_4.INIT=4'h8; // @48:13042 CFG2 \p_MTIME.un1_T_l_En_0_o2 ( .A(un6_T_h_En_i), .B(un7_T_l_En_i), .Y(N_1138) ); defparam \p_MTIME.un1_T_l_En_0_o2 .INIT=4'hE; // @48:13108 CFG3 \prdata_7_0[0] ( .A(mtimecmp_Z[0]), .B(un6_Tc0_h_En_i), .C(mtimecmp_Z[32]), .Y(N_86) ); defparam \prdata_7_0[0] .INIT=8'hE2; // @48:13108 CFG3 \prdata_7_0[1] ( .A(mtimecmp_Z[1]), .B(un6_Tc0_h_En_i), .C(mtimecmp_Z[33]), .Y(N_87) ); defparam \prdata_7_0[1] .INIT=8'hE2; // @48:13108 CFG3 \prdata_7_0[3] ( .A(mtimecmp_Z[3]), .B(un6_Tc0_h_En_i), .C(mtimecmp_Z[35]), .Y(N_89) ); defparam \prdata_7_0[3] .INIT=8'hE2; // @48:13108 CFG3 \prdata_7_0[4] ( .A(mtimecmp_Z[4]), .B(un6_Tc0_h_En_i), .C(mtimecmp_Z[36]), .Y(N_90) ); defparam \prdata_7_0[4] .INIT=8'hE2; // @48:13108 CFG3 \prdata_7_0[7] ( .A(mtimecmp_Z[7]), .B(un6_Tc0_h_En_i), .C(mtimecmp_Z[39]), .Y(N_93) ); defparam \prdata_7_0[7] .INIT=8'hE2; // @48:13108 CFG3 \prdata_7_0[8] ( .A(mtimecmp_Z[8]), .B(un6_Tc0_h_En_i), .C(mtimecmp_Z[40]), .Y(N_94) ); defparam \prdata_7_0[8] .INIT=8'hE2; // @48:13108 CFG3 \prdata_7_0[9] ( .A(mtimecmp_Z[9]), .B(un6_Tc0_h_En_i), .C(mtimecmp_Z[41]), .Y(N_95) ); defparam \prdata_7_0[9] .INIT=8'hE2; // @48:13108 CFG3 \prdata_7_0[10] ( .A(mtimecmp_Z[10]), .B(un6_Tc0_h_En_i), .C(mtimecmp_Z[42]), .Y(N_96) ); defparam \prdata_7_0[10] .INIT=8'hE2; // @48:13108 CFG3 \prdata_7_0[11] ( .A(mtimecmp_Z[11]), .B(un6_Tc0_h_En_i), .C(mtimecmp_Z[43]), .Y(N_97) ); defparam \prdata_7_0[11] .INIT=8'hE2; // @48:13108 CFG3 \prdata_7_0[12] ( .A(mtimecmp_Z[12]), .B(un6_Tc0_h_En_i), .C(mtimecmp_Z[44]), .Y(N_98) ); defparam \prdata_7_0[12] .INIT=8'hE2; // @48:13108 CFG3 \prdata_7_0[13] ( .A(mtimecmp_Z[13]), .B(un6_Tc0_h_En_i), .C(mtimecmp_Z[45]), .Y(N_99) ); defparam \prdata_7_0[13] .INIT=8'hE2; // @48:13108 CFG3 \prdata_7_0[14] ( .A(mtimecmp_Z[14]), .B(un6_Tc0_h_En_i), .C(mtimecmp_Z[46]), .Y(N_100) ); defparam \prdata_7_0[14] .INIT=8'hE2; // @48:13108 CFG3 \prdata_7_0[16] ( .A(mtimecmp_Z[16]), .B(un6_Tc0_h_En_i), .C(mtimecmp_Z[48]), .Y(N_102) ); defparam \prdata_7_0[16] .INIT=8'hE2; // @48:13108 CFG3 \prdata_7_0[17] ( .A(mtimecmp_Z[17]), .B(un6_Tc0_h_En_i), .C(mtimecmp_Z[49]), .Y(N_103) ); defparam \prdata_7_0[17] .INIT=8'hE2; // @48:13108 CFG3 \prdata_7_0[18] ( .A(mtimecmp_Z[18]), .B(un6_Tc0_h_En_i), .C(mtimecmp_Z[50]), .Y(N_104) ); defparam \prdata_7_0[18] .INIT=8'hE2; // @48:13108 CFG3 \prdata_7_0[19] ( .A(mtimecmp_Z[19]), .B(un6_Tc0_h_En_i), .C(mtimecmp_Z[51]), .Y(N_105) ); defparam \prdata_7_0[19] .INIT=8'hE2; // @48:13108 CFG3 \prdata_7_0[21] ( .A(mtimecmp_Z[21]), .B(un6_Tc0_h_En_i), .C(mtimecmp_Z[53]), .Y(N_107) ); defparam \prdata_7_0[21] .INIT=8'hE2; // @48:13108 CFG3 \prdata_7_0[22] ( .A(mtimecmp_Z[22]), .B(un6_Tc0_h_En_i), .C(mtimecmp_Z[54]), .Y(N_108) ); defparam \prdata_7_0[22] .INIT=8'hE2; // @48:13108 CFG3 \prdata_7_0[23] ( .A(mtimecmp_Z[23]), .B(un6_Tc0_h_En_i), .C(mtimecmp_Z[55]), .Y(N_109) ); defparam \prdata_7_0[23] .INIT=8'hE2; // @48:13108 CFG3 \prdata_7_0[24] ( .A(mtimecmp_Z[24]), .B(un6_Tc0_h_En_i), .C(mtimecmp_Z[56]), .Y(N_110) ); defparam \prdata_7_0[24] .INIT=8'hE2; // @48:13108 CFG3 \prdata_7_0[25] ( .A(mtimecmp_Z[25]), .B(un6_Tc0_h_En_i), .C(mtimecmp_Z[57]), .Y(N_111) ); defparam \prdata_7_0[25] .INIT=8'hE2; // @48:13108 CFG3 \prdata_7_0[26] ( .A(mtimecmp_Z[26]), .B(un6_Tc0_h_En_i), .C(mtimecmp_Z[58]), .Y(N_112) ); defparam \prdata_7_0[26] .INIT=8'hE2; // @48:13108 CFG3 \prdata_7_0[27] ( .A(mtimecmp_Z[27]), .B(un6_Tc0_h_En_i), .C(mtimecmp_Z[59]), .Y(N_113) ); defparam \prdata_7_0[27] .INIT=8'hE2; // @48:13108 CFG3 \prdata_7_0[28] ( .A(mtimecmp_Z[28]), .B(un6_Tc0_h_En_i), .C(mtimecmp_Z[60]), .Y(N_114) ); defparam \prdata_7_0[28] .INIT=8'hE2; // @48:13108 CFG3 \prdata_7_0[29] ( .A(mtimecmp_Z[29]), .B(un6_Tc0_h_En_i), .C(mtimecmp_Z[61]), .Y(N_115) ); defparam \prdata_7_0[29] .INIT=8'hE2; // @48:13108 CFG3 \prdata_7_0[30] ( .A(mtimecmp_Z[30]), .B(un6_Tc0_h_En_i), .C(mtimecmp_Z[62]), .Y(N_116) ); defparam \prdata_7_0[30] .INIT=8'hE2; // @48:13108 CFG3 \prdata_7_1[0] ( .A(mtime_count_out[32]), .B(mtime_count_out[0]), .C(un6_T_h_En_i), .Y(N_120) ); defparam \prdata_7_1[0] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_1[1] ( .A(mtime_count_out[33]), .B(mtime_count_out[1]), .C(un6_T_h_En_i), .Y(N_121) ); defparam \prdata_7_1[1] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_1[3] ( .A(mtime_count_out[35]), .B(mtime_count_out[3]), .C(un6_T_h_En_i), .Y(N_123) ); defparam \prdata_7_1[3] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_1[4] ( .A(mtime_count_out[36]), .B(mtime_count_out[4]), .C(un6_T_h_En_i), .Y(N_124) ); defparam \prdata_7_1[4] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_1[7] ( .A(mtime_count_out[39]), .B(mtime_count_out[7]), .C(un6_T_h_En_i), .Y(N_127) ); defparam \prdata_7_1[7] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_1[8] ( .A(mtime_count_out[40]), .B(mtime_count_out[8]), .C(un6_T_h_En_i), .Y(N_128) ); defparam \prdata_7_1[8] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_1[9] ( .A(mtime_count_out[41]), .B(mtime_count_out[9]), .C(un6_T_h_En_i), .Y(N_129) ); defparam \prdata_7_1[9] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_1[10] ( .A(mtime_count_out[42]), .B(mtime_count_out[10]), .C(un6_T_h_En_i), .Y(N_130) ); defparam \prdata_7_1[10] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_1[11] ( .A(mtime_count_out[43]), .B(mtime_count_out[11]), .C(un6_T_h_En_i), .Y(N_131) ); defparam \prdata_7_1[11] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_1[12] ( .A(mtime_count_out[44]), .B(mtime_count_out[12]), .C(un6_T_h_En_i), .Y(N_132) ); defparam \prdata_7_1[12] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_1[13] ( .A(mtime_count_out[45]), .B(mtime_count_out[13]), .C(un6_T_h_En_i), .Y(N_133) ); defparam \prdata_7_1[13] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_1[14] ( .A(mtime_count_out[46]), .B(mtime_count_out[14]), .C(un6_T_h_En_i), .Y(N_134) ); defparam \prdata_7_1[14] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_1[16] ( .A(mtime_count_out[48]), .B(mtime_count_out[16]), .C(un6_T_h_En_i), .Y(N_136) ); defparam \prdata_7_1[16] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_1[17] ( .A(mtime_count_out[49]), .B(mtime_count_out[17]), .C(un6_T_h_En_i), .Y(N_137) ); defparam \prdata_7_1[17] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_1[18] ( .A(mtime_count_out[50]), .B(mtime_count_out[18]), .C(un6_T_h_En_i), .Y(N_138) ); defparam \prdata_7_1[18] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_1[19] ( .A(mtime_count_out[51]), .B(mtime_count_out[19]), .C(un6_T_h_En_i), .Y(N_139) ); defparam \prdata_7_1[19] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_1[21] ( .A(mtime_count_out[53]), .B(mtime_count_out[21]), .C(un6_T_h_En_i), .Y(N_141) ); defparam \prdata_7_1[21] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_1[22] ( .A(mtime_count_out[54]), .B(mtime_count_out[22]), .C(un6_T_h_En_i), .Y(N_142) ); defparam \prdata_7_1[22] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_1[23] ( .A(mtime_count_out[55]), .B(mtime_count_out[23]), .C(un6_T_h_En_i), .Y(N_143) ); defparam \prdata_7_1[23] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_1[24] ( .A(mtime_count_out[56]), .B(mtime_count_out[24]), .C(un6_T_h_En_i), .Y(N_144) ); defparam \prdata_7_1[24] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_1[25] ( .A(mtime_count_out[57]), .B(mtime_count_out[25]), .C(un6_T_h_En_i), .Y(N_145) ); defparam \prdata_7_1[25] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_1[26] ( .A(mtime_count_out[58]), .B(mtime_count_out[26]), .C(un6_T_h_En_i), .Y(N_146) ); defparam \prdata_7_1[26] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_1[27] ( .A(mtime_count_out[59]), .B(mtime_count_out[27]), .C(un6_T_h_En_i), .Y(N_147) ); defparam \prdata_7_1[27] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_1[28] ( .A(mtime_count_out[60]), .B(mtime_count_out[28]), .C(un6_T_h_En_i), .Y(N_148) ); defparam \prdata_7_1[28] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_1[29] ( .A(mtime_count_out[61]), .B(mtime_count_out[29]), .C(un6_T_h_En_i), .Y(N_149) ); defparam \prdata_7_1[29] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_1[30] ( .A(mtime_count_out[62]), .B(mtime_count_out[30]), .C(un6_T_h_En_i), .Y(N_150) ); defparam \prdata_7_1[30] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_1[20] ( .A(mtime_count_out[52]), .B(mtime_count_out[20]), .C(un6_T_h_En_i), .Y(N_140) ); defparam \prdata_7_1[20] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_0[20] ( .A(mtimecmp_Z[20]), .B(un6_Tc0_h_En_i), .C(mtimecmp_Z[52]), .Y(N_106) ); defparam \prdata_7_0[20] .INIT=8'hE2; // @48:13108 CFG3 \prdata_7_1[15] ( .A(mtime_count_out[47]), .B(mtime_count_out[15]), .C(un6_T_h_En_i), .Y(N_135) ); defparam \prdata_7_1[15] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_0[15] ( .A(mtimecmp_Z[15]), .B(un6_Tc0_h_En_i), .C(mtimecmp_Z[47]), .Y(N_101) ); defparam \prdata_7_0[15] .INIT=8'hE2; // @48:13108 CFG3 \prdata_7_0_i_m3[31] ( .A(mtimecmp_Z[31]), .B(un6_Tc0_h_En_i), .C(mtimecmp_Z[63]), .Y(N_1183) ); defparam \prdata_7_0_i_m3[31] .INIT=8'hE2; // @48:13108 CFG3 \prdata_7_0[2] ( .A(mtimecmp_Z[2]), .B(un6_Tc0_h_En_i), .C(mtimecmp_Z[34]), .Y(N_88_0) ); defparam \prdata_7_0[2] .INIT=8'hE2; // @48:13108 CFG3 \prdata_7_0[5] ( .A(mtimecmp_Z[5]), .B(un6_Tc0_h_En_i), .C(mtimecmp_Z[37]), .Y(N_91) ); defparam \prdata_7_0[5] .INIT=8'hE2; // @48:13108 CFG3 \prdata_7_0[6] ( .A(mtimecmp_Z[6]), .B(un6_Tc0_h_En_i), .C(mtimecmp_Z[38]), .Y(N_92) ); defparam \prdata_7_0[6] .INIT=8'hE2; // @48:13108 CFG3 \prdata_7_1[2] ( .A(mtime_count_out[34]), .B(mtime_count_out[2]), .C(un6_T_h_En_i), .Y(N_122) ); defparam \prdata_7_1[2] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_1[5] ( .A(mtime_count_out[37]), .B(mtime_count_out[5]), .C(un6_T_h_En_i), .Y(N_125) ); defparam \prdata_7_1[5] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_1[6] ( .A(mtime_count_out[38]), .B(mtime_count_out[6]), .C(un6_T_h_En_i), .Y(N_126) ); defparam \prdata_7_1[6] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_1[31] ( .A(mtime_count_out[63]), .B(mtime_count_out[31]), .C(un6_T_h_En_i), .Y(N_151) ); defparam \prdata_7_1[31] .INIT=8'hAC; // @48:13042 CFG4 un7_T_l_En_0_a2_0_5 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_25), .B(CoreAPB3_0_0_APBmslave0_PADDR_24), .C(CoreAPB3_0_0_APBmslave0_PADDR_23), .D(CoreAPB3_0_0_APBmslave0_PADDR_7), .Y(un7_T_l_En_0_a2_0_5_Z) ); defparam un7_T_l_En_0_a2_0_5.INIT=16'h2000; // @48:13056 CFG4 un23_rtc_tick_11 ( .A(rtc_count_Z[7]), .B(rtc_count_Z[4]), .C(rtc_count_Z[3]), .D(rtc_count_Z[2]), .Y(un23_rtc_tick_11_Z) ); defparam un23_rtc_tick_11.INIT=16'h0001; // @48:13056 CFG4 un23_rtc_tick_10 ( .A(rtc_count_Z[6]), .B(rtc_count_Z[5]), .C(rtc_count_Z[1]), .D(rtc_count_Z[0]), .Y(un23_rtc_tick_10_Z) ); defparam un23_rtc_tick_10.INIT=16'h8000; // @48:13056 CFG4 un23_rtc_tick_9 ( .A(rtc_count_Z[15]), .B(rtc_count_Z[14]), .C(rtc_count_Z[13]), .D(rtc_count_Z[12]), .Y(un23_rtc_tick_9_Z) ); defparam un23_rtc_tick_9.INIT=16'h0001; // @48:13056 CFG4 un23_rtc_tick_8 ( .A(rtc_count_Z[11]), .B(rtc_count_Z[10]), .C(rtc_count_Z[9]), .D(rtc_count_Z[8]), .Y(un23_rtc_tick_8_Z) ); defparam un23_rtc_tick_8.INIT=16'h0001; // @48:2172 CFG4 \gen_mtime.un3_apb_int_sel_0_a2_1_11 ( .A(apb_paddr_31), .B(apb_paddr_21), .C(apb_paddr_20), .D(apb_paddr_19), .Y(un3_apb_int_sel_0_a2_1_11) ); defparam \gen_mtime.un3_apb_int_sel_0_a2_1_11 .INIT=16'h0001; // @48:2172 CFG4 \gen_mtime.un3_apb_int_sel_0_a2_1_10 ( .A(apb_paddr_26), .B(apb_paddr_24), .C(apb_paddr_23), .D(apb_paddr_22), .Y(un3_apb_int_sel_0_a2_1_10) ); defparam \gen_mtime.un3_apb_int_sel_0_a2_1_10 .INIT=16'h0001; // @48:2172 CFG4 \gen_mtime.un3_apb_int_sel_0_a2_1_9 ( .A(apb_paddr_30), .B(apb_paddr_29), .C(apb_paddr_28), .D(apb_paddr_27), .Y(un3_apb_int_sel_0_a2_1_9) ); defparam \gen_mtime.un3_apb_int_sel_0_a2_1_9 .INIT=16'h0001; // @48:2172 CFG4 \gen_mtime.un3_apb_int_sel_0_a2_1_8 ( .A(apb_paddr_25), .B(apb_paddr_18), .C(apb_paddr_17), .D(apb_paddr_16), .Y(un3_apb_int_sel_0_a2_1_8) ); defparam \gen_mtime.un3_apb_int_sel_0_a2_1_8 .INIT=16'h0002; // @48:13042 CFG4 un7_T_l_En_0_a2_0_6 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_22), .B(un7_T_l_En_0_a2_0_4_Z), .C(apb_paddr_11), .D(apb_paddr_10), .Y(un7_T_l_En_0_a2_0_6_Z) ); defparam un7_T_l_En_0_a2_0_6.INIT=16'h8000; // @48:13114 CFG4 prdata_0_sqmuxa_0_a2_0_7 ( .A(apb_paddr_10), .B(CoreAPB3_0_0_APBmslave0_PADDR_25), .C(CoreAPB3_0_0_APBmslave0_PADDR_6), .D(un1_PADDR_2), .Y(prdata_0_sqmuxa_0_a2_0_7_Z) ); defparam prdata_0_sqmuxa_0_a2_0_7.INIT=16'h0100; // @48:13108 CFG4 prdata_7_sn_N_8_mux_i_i_o2 ( .A(un7_Tc0_l_En_i), .B(un6_Tc0_h_En_i), .C(prdata18), .D(N_1138), .Y(N_1181) ); defparam prdata_7_sn_N_8_mux_i_i_o2.INIT=16'h0F1F; // @48:13108 CFG3 \prdata_7_2[0] ( .A(N_120), .B(N_86), .C(N_1138), .Y(N_154) ); defparam \prdata_7_2[0] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_2[1] ( .A(N_121), .B(N_87), .C(N_1138), .Y(N_155) ); defparam \prdata_7_2[1] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_2[3] ( .A(N_123), .B(N_89), .C(N_1138), .Y(N_157) ); defparam \prdata_7_2[3] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_2[4] ( .A(N_124), .B(N_90), .C(N_1138), .Y(N_158) ); defparam \prdata_7_2[4] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_2[7] ( .A(N_127), .B(N_93), .C(N_1138), .Y(N_161) ); defparam \prdata_7_2[7] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_2[8] ( .A(N_128), .B(N_94), .C(N_1138), .Y(N_162) ); defparam \prdata_7_2[8] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_2[9] ( .A(N_129), .B(N_95), .C(N_1138), .Y(N_163) ); defparam \prdata_7_2[9] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_2[10] ( .A(N_130), .B(N_96), .C(N_1138), .Y(N_164) ); defparam \prdata_7_2[10] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_2[11] ( .A(N_131), .B(N_97), .C(N_1138), .Y(N_165) ); defparam \prdata_7_2[11] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_2[12] ( .A(N_132), .B(N_98), .C(N_1138), .Y(N_166) ); defparam \prdata_7_2[12] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_2[13] ( .A(N_133), .B(N_99), .C(N_1138), .Y(N_167) ); defparam \prdata_7_2[13] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_2[14] ( .A(N_134), .B(N_100), .C(N_1138), .Y(N_168) ); defparam \prdata_7_2[14] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_2[16] ( .A(N_136), .B(N_102), .C(N_1138), .Y(N_170) ); defparam \prdata_7_2[16] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_2[17] ( .A(N_137), .B(N_103), .C(N_1138), .Y(N_171) ); defparam \prdata_7_2[17] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_2[18] ( .A(N_138), .B(N_104), .C(N_1138), .Y(N_172) ); defparam \prdata_7_2[18] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_2[19] ( .A(N_139), .B(N_105), .C(N_1138), .Y(N_173) ); defparam \prdata_7_2[19] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_2[21] ( .A(N_141), .B(N_107), .C(N_1138), .Y(N_175) ); defparam \prdata_7_2[21] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_2[22] ( .A(N_142), .B(N_108), .C(N_1138), .Y(N_176) ); defparam \prdata_7_2[22] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_2[23] ( .A(N_143), .B(N_109), .C(N_1138), .Y(N_177) ); defparam \prdata_7_2[23] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_2[24] ( .A(N_144), .B(N_110), .C(N_1138), .Y(N_178) ); defparam \prdata_7_2[24] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_2[25] ( .A(N_145), .B(N_111), .C(N_1138), .Y(N_179) ); defparam \prdata_7_2[25] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_2[26] ( .A(N_146), .B(N_112), .C(N_1138), .Y(N_180) ); defparam \prdata_7_2[26] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_2[27] ( .A(N_147), .B(N_113), .C(N_1138), .Y(N_181) ); defparam \prdata_7_2[27] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_2[28] ( .A(N_148), .B(N_114), .C(N_1138), .Y(N_182) ); defparam \prdata_7_2[28] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_2[29] ( .A(N_149), .B(N_115), .C(N_1138), .Y(N_183) ); defparam \prdata_7_2[29] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_2[30] ( .A(N_150), .B(N_116), .C(N_1138), .Y(N_184) ); defparam \prdata_7_2[30] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_2[20] ( .A(N_140), .B(N_106), .C(N_1138), .Y(N_174) ); defparam \prdata_7_2[20] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_2[15] ( .A(N_135), .B(N_101), .C(N_1138), .Y(N_169) ); defparam \prdata_7_2[15] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_2_i_m3[31] ( .A(N_151), .B(N_1183), .C(N_1138), .Y(N_1182) ); defparam \prdata_7_2_i_m3[31] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_2[2] ( .A(N_122), .B(N_88_0), .C(N_1138), .Y(N_156) ); defparam \prdata_7_2[2] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_2[5] ( .A(N_125), .B(N_91), .C(N_1138), .Y(N_159) ); defparam \prdata_7_2[5] .INIT=8'hAC; // @48:13108 CFG3 \prdata_7_2[6] ( .A(N_126), .B(N_92), .C(N_1138), .Y(N_160) ); defparam \prdata_7_2[6] .INIT=8'hAC; // @48:13056 CFG4 un23_rtc_tick ( .A(un23_rtc_tick_11_Z), .B(un23_rtc_tick_10_Z), .C(un23_rtc_tick_8_Z), .D(un23_rtc_tick_9_Z), .Y(un23_rtc_tick_Z) ); defparam un23_rtc_tick.INIT=16'h8000; // @48:2172 CFG4 \gen_mtime.un3_apb_int_sel_0_a2_1 ( .A(un3_apb_int_sel_0_a2_1_11), .B(un3_apb_int_sel_0_a2_1_10), .C(un3_apb_int_sel_0_a2_1_9), .D(un3_apb_int_sel_0_a2_1_8), .Y(N_1411) ); defparam \gen_mtime.un3_apb_int_sel_0_a2_1 .INIT=16'h8000; // @48:13042 CFG4 un7_T_l_En_0_a2_0 ( .A(un7_T_l_En_0_a2_0_6_Z), .B(un7_T_l_En_0_a2_0_5_Z), .C(tx_fifo_write_sig14_i_1), .D(N_1214), .Y(N_1225) ); defparam un7_T_l_En_0_a2_0.INIT=16'h8000; // @48:13016 CFG3 un6_Tc0_h_En_0_a2_0 ( .A(apb_paddr_1), .B(apb_paddr_0), .C(N_1411), .Y(N_1201) ); defparam un6_Tc0_h_En_0_a2_0.INIT=8'h10; // @48:13062 CFG2 \rtc_count_0[0] ( .A(rtc_count_RNIJBBPC_S[0]), .B(un23_rtc_tick_Z), .Y(rtc_count_0_Z[0]) ); defparam \rtc_count_0[0] .INIT=4'h2; // @48:13062 CFG2 \rtc_count_0[1] ( .A(rtc_count_RNIQM46K_S[1]), .B(un23_rtc_tick_Z), .Y(rtc_count_0_Z[1]) ); defparam \rtc_count_0[1] .INIT=4'h2; // @48:13062 CFG2 \rtc_count_0[2] ( .A(rtc_count_RNI23UIR_S[2]), .B(un23_rtc_tick_Z), .Y(rtc_count_0_Z[2]) ); defparam \rtc_count_0[2] .INIT=4'h2; // @48:13062 CFG2 \rtc_count_0[5] ( .A(rtc_count_RNI0EAPH1_S[5]), .B(un23_rtc_tick_Z), .Y(rtc_count_0_Z[5]) ); defparam \rtc_count_0[5] .INIT=4'h2; // @48:13062 CFG2 \rtc_count_0[6] ( .A(rtc_count_RNICU36P1_S[6]), .B(un23_rtc_tick_Z), .Y(rtc_count_0_Z[6]) ); defparam \rtc_count_0[6] .INIT=4'h2; // @48:13114 CFG2 prdata_0_sqmuxa_0_a2_1 ( .A(N_1201), .B(CoreAPB3_0_0_APBmslave0_PADDR_0), .Y(N_1222) ); defparam prdata_0_sqmuxa_0_a2_1.INIT=4'h2; // @48:13016 CFG4 un6_Tc0_h_En_0_a2 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_0), .B(CoreAPB3_0_0_APBmslave0_PADDR_22), .C(N_1212), .D(N_1201), .Y(un6_Tc0_h_En_i) ); defparam un6_Tc0_h_En_0_a2.INIT=16'h2000; // @48:13015 CFG3 un6_T_h_En_0_a2 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_0), .B(N_1201), .C(N_1225), .Y(un6_T_h_En_i) ); defparam un6_T_h_En_0_a2.INIT=8'h80; // @48:2172 CFG3 \gen_mtime.un3_apb_int_sel_0 ( .A(N_1411), .B(N_1225), .C(N_1212), .Y(un3_apb_int_sel) ); defparam \gen_mtime.un3_apb_int_sel_0 .INIT=8'hA8; // @48:13044 CFG3 un7_Tc0_l_En_0_a2 ( .A(N_1212), .B(CoreAPB3_0_0_APBmslave0_PADDR_22), .C(N_1222), .Y(un7_Tc0_l_En_i) ); defparam un7_Tc0_l_En_0_a2.INIT=8'h20; // @48:13108 CFG2 \p_APB_0_Read.prdata18_0_a3 ( .A(un3_apb_int_sel), .B(apb_psel_net), .Y(N_1153) ); defparam \p_APB_0_Read.prdata18_0_a3 .INIT=4'h8; // @48:13114 CFG4 prdata_0_sqmuxa_0_a2 ( .A(CoreAPB3_0_0_APBmslave0_PADDR_22), .B(N_1222), .C(N_1212), .D(prdata18), .Y(prdata_0_sqmuxa) ); defparam prdata_0_sqmuxa_0_a2.INIT=16'h8000; // @48:13108 CFG2 \p_APB_0_Read.prdata18_0_a2 ( .A(N_1153), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .Y(prdata18) ); defparam \p_APB_0_Read.prdata18_0_a2 .INIT=4'h2; // @48:13106 CFG3 \prdata_r[31] ( .A(prdata_0_sqmuxa), .B(N_1181), .C(N_1182), .Y(prdata_2) ); defparam \prdata_r[31] .INIT=8'h10; // @48:13106 CFG3 \prdata_s[2] ( .A(prdata_0_sqmuxa), .B(N_1181), .C(N_156), .Y(prdata_1) ); defparam \prdata_s[2] .INIT=8'hBA; // @48:13106 CFG3 \prdata_s[5] ( .A(prdata_0_sqmuxa), .B(N_1181), .C(N_159), .Y(prdata_0) ); defparam \prdata_s[5] .INIT=8'hBA; // @48:13106 CFG3 \prdata_s[6] ( .A(prdata_0_sqmuxa), .B(N_1181), .C(N_160), .Y(prdata) ); defparam \prdata_s[6] .INIT=8'hBA; CFG2 prdata_7_sn_N_8_mux_i_i_o2_RNI3OI13 ( .A(N_1181), .B(prdata_0_sqmuxa), .Y(N_1584_i) ); defparam prdata_7_sn_N_8_mux_i_i_o2_RNI3OI13.INIT=4'h1; // @48:13044 CFG3 Tc0_l_En_0_a2 ( .A(N_88), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .C(un7_Tc0_l_En_i), .Y(Tc0_l_En) ); defparam Tc0_l_En_0_a2.INIT=8'h80; // @48:13045 CFG3 Tc0_h_En_0_a2 ( .A(N_88), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .C(un6_Tc0_h_En_i), .Y(Tc0_h_En) ); defparam Tc0_h_En_0_a2.INIT=8'h80; // @48:13042 CFG3 T_l_En_0_a2 ( .A(N_88), .B(CoreAPB3_0_0_APBmslave0_PWRITE), .C(un7_T_l_En_i), .Y(T_l_En) ); defparam T_l_En_0_a2.INIT=8'h80; // @48:2193 CFG3 un23_rtc_tick_RNIVF55H ( .A(trace_priv_i), .B(un1_T_l_En), .C(un23_rtc_tick_Z), .Y(mtime_count_oute) ); defparam un23_rtc_tick_RNIVF55H.INIT=8'hDC; // @48:13076 CFG4 \mtime_count_out_lm_0_2[3] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[3]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .Y(mtime_count_out_lm_2[3]) ); defparam \mtime_count_out_lm_0_2[3] .INIT=16'hC840; // @48:13076 CFG4 \mtime_count_out_lm_0_2[2] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[2]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .Y(mtime_count_out_lm_2[2]) ); defparam \mtime_count_out_lm_0_2[2] .INIT=16'hC840; // @48:13076 CFG4 \mtime_count_out_lm_0_2[24] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[24]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[24]), .Y(mtime_count_out_lm_2[24]) ); defparam \mtime_count_out_lm_0_2[24] .INIT=16'hC840; // @48:13076 CFG4 \mtime_count_out_lm_0_2[39] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[39]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .Y(mtime_count_out_lm_2[39]) ); defparam \mtime_count_out_lm_0_2[39] .INIT=16'hC480; // @48:13076 CFG4 \mtime_count_out_lm_0_2[19] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[19]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[19]), .Y(mtime_count_out_lm_2[19]) ); defparam \mtime_count_out_lm_0_2[19] .INIT=16'hC840; // @48:13076 CFG4 \mtime_count_out_lm_0_2[31] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[31]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[31]), .Y(mtime_count_out_lm_2[31]) ); defparam \mtime_count_out_lm_0_2[31] .INIT=16'hC840; // @48:13076 CFG4 \mtime_count_out_lm_0_2[7] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[7]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[7]), .Y(mtime_count_out_lm_2[7]) ); defparam \mtime_count_out_lm_0_2[7] .INIT=16'hC840; // @48:13076 CFG4 \mtime_count_out_lm_0_2[13] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[13]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[13]), .Y(mtime_count_out_lm_2[13]) ); defparam \mtime_count_out_lm_0_2[13] .INIT=16'hC840; // @48:13076 CFG4 \mtime_count_out_lm_0_2[29] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[29]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[29]), .Y(mtime_count_out_lm_2[29]) ); defparam \mtime_count_out_lm_0_2[29] .INIT=16'hC840; // @48:13076 CFG4 \mtime_count_out_lm_0_2[51] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[51]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[19]), .Y(mtime_count_out_lm_2[51]) ); defparam \mtime_count_out_lm_0_2[51] .INIT=16'hC480; // @48:13076 CFG4 \mtime_count_out_lm_0_2[50] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[50]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[18]), .Y(mtime_count_out_lm_2[50]) ); defparam \mtime_count_out_lm_0_2[50] .INIT=16'hC480; // @48:13076 CFG4 \mtime_count_out_lm_0_2[58] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[58]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[26]), .Y(mtime_count_out_lm_2[58]) ); defparam \mtime_count_out_lm_0_2[58] .INIT=16'hC480; // @48:13076 CFG4 \mtime_count_out_lm_0_2[16] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[16]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[16]), .Y(mtime_count_out_lm_2[16]) ); defparam \mtime_count_out_lm_0_2[16] .INIT=16'hC840; // @48:13076 CFG4 \mtime_count_out_lm_0_2[15] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[15]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[15]), .Y(mtime_count_out_lm_2[15]) ); defparam \mtime_count_out_lm_0_2[15] .INIT=16'hC840; // @48:13076 CFG4 \mtime_count_out_lm_0_2[18] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[18]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[18]), .Y(mtime_count_out_lm_2[18]) ); defparam \mtime_count_out_lm_0_2[18] .INIT=16'hC840; // @48:13076 CFG4 \mtime_count_out_lm_0_2[23] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[23]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[23]), .Y(mtime_count_out_lm_2[23]) ); defparam \mtime_count_out_lm_0_2[23] .INIT=16'hC840; // @48:13076 CFG4 \mtime_count_out_lm_0_2[22] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[22]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[22]), .Y(mtime_count_out_lm_2[22]) ); defparam \mtime_count_out_lm_0_2[22] .INIT=16'hC840; // @48:13076 CFG4 \mtime_count_out_lm_0_2[28] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[28]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[28]), .Y(mtime_count_out_lm_2[28]) ); defparam \mtime_count_out_lm_0_2[28] .INIT=16'hC840; // @48:13076 CFG4 \mtime_count_out_lm_0_2[27] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[27]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[27]), .Y(mtime_count_out_lm_2[27]) ); defparam \mtime_count_out_lm_0_2[27] .INIT=16'hC840; // @48:13076 CFG4 \mtime_count_out_lm_0_2[35] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[35]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[3]), .Y(mtime_count_out_lm_2[35]) ); defparam \mtime_count_out_lm_0_2[35] .INIT=16'hC480; // @48:13076 CFG4 \mtime_count_out_lm_0_2[43] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[43]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .Y(mtime_count_out_lm_2[43]) ); defparam \mtime_count_out_lm_0_2[43] .INIT=16'hC480; // @48:13076 CFG4 \mtime_count_out_lm_0_2[61] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[61]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[29]), .Y(mtime_count_out_lm_2[61]) ); defparam \mtime_count_out_lm_0_2[61] .INIT=16'hC480; // @48:13076 CFG4 \mtime_count_out_lm_0_2[54] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[54]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[22]), .Y(mtime_count_out_lm_2[54]) ); defparam \mtime_count_out_lm_0_2[54] .INIT=16'hC480; // @48:13076 CFG4 \mtime_count_out_lm_0_2[9] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[9]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .Y(mtime_count_out_lm_2[9]) ); defparam \mtime_count_out_lm_0_2[9] .INIT=16'hC840; // @48:13076 CFG4 \mtime_count_out_lm_0_2[12] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[12]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .Y(mtime_count_out_lm_2[12]) ); defparam \mtime_count_out_lm_0_2[12] .INIT=16'hC840; // @48:13076 CFG4 \mtime_count_out_lm_0_2[10] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[10]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .Y(mtime_count_out_lm_2[10]) ); defparam \mtime_count_out_lm_0_2[10] .INIT=16'hC840; // @48:13076 CFG4 \mtime_count_out_lm_0_2[20] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[20]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[20]), .Y(mtime_count_out_lm_2[20]) ); defparam \mtime_count_out_lm_0_2[20] .INIT=16'hC840; // @48:13076 CFG4 \mtime_count_out_lm_0_2[17] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[17]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[17]), .Y(mtime_count_out_lm_2[17]) ); defparam \mtime_count_out_lm_0_2[17] .INIT=16'hC840; // @48:13076 CFG4 \mtime_count_out_lm_0_2[26] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[26]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[26]), .Y(mtime_count_out_lm_2[26]) ); defparam \mtime_count_out_lm_0_2[26] .INIT=16'hC840; // @48:13076 CFG4 \mtime_count_out_lm_0_2[25] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[25]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[25]), .Y(mtime_count_out_lm_2[25]) ); defparam \mtime_count_out_lm_0_2[25] .INIT=16'hC840; // @48:13076 CFG4 \mtime_count_out_lm_0_2[21] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[21]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[21]), .Y(mtime_count_out_lm_2[21]) ); defparam \mtime_count_out_lm_0_2[21] .INIT=16'hC840; // @48:13076 CFG4 \mtime_count_out_lm_0_2[40] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[40]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .Y(mtime_count_out_lm_2[40]) ); defparam \mtime_count_out_lm_0_2[40] .INIT=16'hC480; // @48:13076 CFG4 \mtime_count_out_lm_0_2[45] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[45]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[13]), .Y(mtime_count_out_lm_2[45]) ); defparam \mtime_count_out_lm_0_2[45] .INIT=16'hC480; // @48:13076 CFG4 \mtime_count_out_lm_0_2[48] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[48]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[16]), .Y(mtime_count_out_lm_2[48]) ); defparam \mtime_count_out_lm_0_2[48] .INIT=16'hC480; // @48:13076 CFG4 \mtime_count_out_lm_0_2[49] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[49]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[17]), .Y(mtime_count_out_lm_2[49]) ); defparam \mtime_count_out_lm_0_2[49] .INIT=16'hC480; // @48:13076 CFG4 \mtime_count_out_lm_0_2[53] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[53]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[21]), .Y(mtime_count_out_lm_2[53]) ); defparam \mtime_count_out_lm_0_2[53] .INIT=16'hC480; // @48:13076 CFG4 \mtime_count_out_lm_0_2[52] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[52]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[20]), .Y(mtime_count_out_lm_2[52]) ); defparam \mtime_count_out_lm_0_2[52] .INIT=16'hC480; // @48:13076 CFG4 \mtime_count_out_lm_0_2[60] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[60]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[28]), .Y(mtime_count_out_lm_2[60]) ); defparam \mtime_count_out_lm_0_2[60] .INIT=16'hC480; // @48:13076 CFG4 \mtime_count_out_lm_0_2[57] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[57]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[25]), .Y(mtime_count_out_lm_2[57]) ); defparam \mtime_count_out_lm_0_2[57] .INIT=16'hC480; // @48:13076 CFG4 \mtime_count_out_lm_0_2[1] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[1]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .Y(mtime_count_out_lm_2[1]) ); defparam \mtime_count_out_lm_0_2[1] .INIT=16'hC840; // @48:13076 CFG4 \mtime_count_out_lm_0_2[14] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[14]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[14]), .Y(mtime_count_out_lm_2[14]) ); defparam \mtime_count_out_lm_0_2[14] .INIT=16'hC840; // @48:13076 CFG4 \mtime_count_out_lm_0_2[11] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[11]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[11]), .Y(mtime_count_out_lm_2[11]) ); defparam \mtime_count_out_lm_0_2[11] .INIT=16'hC840; // @48:13076 CFG4 \mtime_count_out_lm_0_2[55] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[55]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[23]), .Y(mtime_count_out_lm_2[55]) ); defparam \mtime_count_out_lm_0_2[55] .INIT=16'hC480; // @48:13076 CFG4 \mtime_count_out_lm_0_2[41] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[41]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[9]), .Y(mtime_count_out_lm_2[41]) ); defparam \mtime_count_out_lm_0_2[41] .INIT=16'hC480; // @48:13076 CFG4 \mtime_count_out_lm_0_2[38] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[38]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .Y(mtime_count_out_lm_2[38]) ); defparam \mtime_count_out_lm_0_2[38] .INIT=16'hC480; // @48:13076 CFG4 \mtime_count_out_lm_0_2[42] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[42]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[10]), .Y(mtime_count_out_lm_2[42]) ); defparam \mtime_count_out_lm_0_2[42] .INIT=16'hC480; // @48:13076 CFG4 \mtime_count_out_lm_0_2[63] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[63]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[31]), .Y(mtime_count_out_lm_2[63]) ); defparam \mtime_count_out_lm_0_2[63] .INIT=16'hC480; // @48:13076 CFG4 \mtime_count_out_lm_0_2[59] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[59]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[27]), .Y(mtime_count_out_lm_2[59]) ); defparam \mtime_count_out_lm_0_2[59] .INIT=16'hC480; // @48:13076 CFG4 \mtime_count_out_lm_0_2[32] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[32]), .D(wrdata_0), .Y(mtime_count_out_lm_2[32]) ); defparam \mtime_count_out_lm_0_2[32] .INIT=16'hC480; // @48:13076 CFG4 \mtime_count_out_lm_0_2[62] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[62]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[30]), .Y(mtime_count_out_lm_2[62]) ); defparam \mtime_count_out_lm_0_2[62] .INIT=16'hC480; // @48:13076 CFG4 \mtime_count_out_lm_0_2[30] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[30]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[30]), .Y(mtime_count_out_lm_2[30]) ); defparam \mtime_count_out_lm_0_2[30] .INIT=16'hC840; // @48:13076 CFG4 \mtime_count_out_lm_0_2[8] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[8]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[8]), .Y(mtime_count_out_lm_2[8]) ); defparam \mtime_count_out_lm_0_2[8] .INIT=16'hC840; // @48:13076 CFG4 \mtime_count_out_lm_0_2[6] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[6]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[6]), .Y(mtime_count_out_lm_2[6]) ); defparam \mtime_count_out_lm_0_2[6] .INIT=16'hC840; // @48:13076 CFG4 \mtime_count_out_lm_0_2[36] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[36]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .Y(mtime_count_out_lm_2[36]) ); defparam \mtime_count_out_lm_0_2[36] .INIT=16'hC480; // @48:13076 CFG4 \mtime_count_out_lm_0_2[46] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[46]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[14]), .Y(mtime_count_out_lm_2[46]) ); defparam \mtime_count_out_lm_0_2[46] .INIT=16'hC480; // @48:13076 CFG4 \mtime_count_out_lm_0_2[47] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[47]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[15]), .Y(mtime_count_out_lm_2[47]) ); defparam \mtime_count_out_lm_0_2[47] .INIT=16'hC480; // @48:13076 CFG4 \mtime_count_out_lm_0_2[4] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[4]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[4]), .Y(mtime_count_out_lm_2[4]) ); defparam \mtime_count_out_lm_0_2[4] .INIT=16'hC840; // @48:13076 CFG4 \mtime_count_out_lm_0_2[56] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[56]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[24]), .Y(mtime_count_out_lm_2[56]) ); defparam \mtime_count_out_lm_0_2[56] .INIT=16'hC480; // @48:13076 CFG4 \mtime_count_out_lm_0_2[44] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[44]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[12]), .Y(mtime_count_out_lm_2[44]) ); defparam \mtime_count_out_lm_0_2[44] .INIT=16'hC480; // @48:13076 CFG4 \mtime_count_out_lm_0_2[37] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[37]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .Y(mtime_count_out_lm_2[37]) ); defparam \mtime_count_out_lm_0_2[37] .INIT=16'hC480; // @48:13076 CFG4 \mtime_count_out_lm_0_2[33] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[33]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[1]), .Y(mtime_count_out_lm_2[33]) ); defparam \mtime_count_out_lm_0_2[33] .INIT=16'hC480; // @48:13076 CFG4 \mtime_count_out_lm_0_2[34] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[34]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[2]), .Y(mtime_count_out_lm_2[34]) ); defparam \mtime_count_out_lm_0_2[34] .INIT=16'hC480; // @48:13076 CFG4 \mtime_count_out_lm_0_2[5] ( .A(T_l_En), .B(un1_T_l_En), .C(mtime_count_out[5]), .D(CoreAPB3_0_0_APBmslave0_PWDATA[5]), .Y(mtime_count_out_lm_2[5]) ); defparam \mtime_count_out_lm_0_2[5] .INIT=16'hC840; // @48:13076 CFG3 \mtime_count_out_lm_0[3] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[3]), .C(mtime_count_out_s[3]), .Y(mtime_count_out_lm[3]) ); defparam \mtime_count_out_lm_0[3] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[2] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[2]), .C(mtime_count_out_s[2]), .Y(mtime_count_out_lm[2]) ); defparam \mtime_count_out_lm_0[2] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[24] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[24]), .C(mtime_count_out_s[24]), .Y(mtime_count_out_lm[24]) ); defparam \mtime_count_out_lm_0[24] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[39] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[39]), .C(mtime_count_out_s[39]), .Y(mtime_count_out_lm[39]) ); defparam \mtime_count_out_lm_0[39] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[19] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[19]), .C(mtime_count_out_s[19]), .Y(mtime_count_out_lm[19]) ); defparam \mtime_count_out_lm_0[19] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[31] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[31]), .C(mtime_count_out_s[31]), .Y(mtime_count_out_lm[31]) ); defparam \mtime_count_out_lm_0[31] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[7] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[7]), .C(mtime_count_out_s[7]), .Y(mtime_count_out_lm[7]) ); defparam \mtime_count_out_lm_0[7] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[13] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[13]), .C(mtime_count_out_s[13]), .Y(mtime_count_out_lm[13]) ); defparam \mtime_count_out_lm_0[13] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[29] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[29]), .C(mtime_count_out_s[29]), .Y(mtime_count_out_lm[29]) ); defparam \mtime_count_out_lm_0[29] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[51] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[51]), .C(mtime_count_out_s[51]), .Y(mtime_count_out_lm[51]) ); defparam \mtime_count_out_lm_0[51] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[50] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[50]), .C(mtime_count_out_s[50]), .Y(mtime_count_out_lm[50]) ); defparam \mtime_count_out_lm_0[50] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[58] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[58]), .C(mtime_count_out_s[58]), .Y(mtime_count_out_lm[58]) ); defparam \mtime_count_out_lm_0[58] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[16] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[16]), .C(mtime_count_out_s[16]), .Y(mtime_count_out_lm[16]) ); defparam \mtime_count_out_lm_0[16] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[15] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[15]), .C(mtime_count_out_s[15]), .Y(mtime_count_out_lm[15]) ); defparam \mtime_count_out_lm_0[15] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[18] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[18]), .C(mtime_count_out_s[18]), .Y(mtime_count_out_lm[18]) ); defparam \mtime_count_out_lm_0[18] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[23] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[23]), .C(mtime_count_out_s[23]), .Y(mtime_count_out_lm[23]) ); defparam \mtime_count_out_lm_0[23] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[22] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[22]), .C(mtime_count_out_s[22]), .Y(mtime_count_out_lm[22]) ); defparam \mtime_count_out_lm_0[22] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[28] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[28]), .C(mtime_count_out_s[28]), .Y(mtime_count_out_lm[28]) ); defparam \mtime_count_out_lm_0[28] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[27] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[27]), .C(mtime_count_out_s[27]), .Y(mtime_count_out_lm[27]) ); defparam \mtime_count_out_lm_0[27] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[35] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[35]), .C(mtime_count_out_s[35]), .Y(mtime_count_out_lm[35]) ); defparam \mtime_count_out_lm_0[35] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[43] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[43]), .C(mtime_count_out_s[43]), .Y(mtime_count_out_lm[43]) ); defparam \mtime_count_out_lm_0[43] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[61] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[61]), .C(mtime_count_out_s[61]), .Y(mtime_count_out_lm[61]) ); defparam \mtime_count_out_lm_0[61] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[54] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[54]), .C(mtime_count_out_s[54]), .Y(mtime_count_out_lm[54]) ); defparam \mtime_count_out_lm_0[54] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[9] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[9]), .C(mtime_count_out_s[9]), .Y(mtime_count_out_lm[9]) ); defparam \mtime_count_out_lm_0[9] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[12] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[12]), .C(mtime_count_out_s[12]), .Y(mtime_count_out_lm[12]) ); defparam \mtime_count_out_lm_0[12] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[10] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[10]), .C(mtime_count_out_s[10]), .Y(mtime_count_out_lm[10]) ); defparam \mtime_count_out_lm_0[10] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[20] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[20]), .C(mtime_count_out_s[20]), .Y(mtime_count_out_lm[20]) ); defparam \mtime_count_out_lm_0[20] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[17] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[17]), .C(mtime_count_out_s[17]), .Y(mtime_count_out_lm[17]) ); defparam \mtime_count_out_lm_0[17] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[26] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[26]), .C(mtime_count_out_s[26]), .Y(mtime_count_out_lm[26]) ); defparam \mtime_count_out_lm_0[26] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[25] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[25]), .C(mtime_count_out_s[25]), .Y(mtime_count_out_lm[25]) ); defparam \mtime_count_out_lm_0[25] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[21] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[21]), .C(mtime_count_out_s[21]), .Y(mtime_count_out_lm[21]) ); defparam \mtime_count_out_lm_0[21] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[40] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[40]), .C(mtime_count_out_s[40]), .Y(mtime_count_out_lm[40]) ); defparam \mtime_count_out_lm_0[40] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[45] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[45]), .C(mtime_count_out_s[45]), .Y(mtime_count_out_lm[45]) ); defparam \mtime_count_out_lm_0[45] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[48] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[48]), .C(mtime_count_out_s[48]), .Y(mtime_count_out_lm[48]) ); defparam \mtime_count_out_lm_0[48] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[49] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[49]), .C(mtime_count_out_s[49]), .Y(mtime_count_out_lm[49]) ); defparam \mtime_count_out_lm_0[49] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[53] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[53]), .C(mtime_count_out_s[53]), .Y(mtime_count_out_lm[53]) ); defparam \mtime_count_out_lm_0[53] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[52] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[52]), .C(mtime_count_out_s[52]), .Y(mtime_count_out_lm[52]) ); defparam \mtime_count_out_lm_0[52] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[60] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[60]), .C(mtime_count_out_s[60]), .Y(mtime_count_out_lm[60]) ); defparam \mtime_count_out_lm_0[60] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[57] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[57]), .C(mtime_count_out_s[57]), .Y(mtime_count_out_lm[57]) ); defparam \mtime_count_out_lm_0[57] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[1] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[1]), .C(mtime_count_out_s[1]), .Y(mtime_count_out_lm[1]) ); defparam \mtime_count_out_lm_0[1] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[14] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[14]), .C(mtime_count_out_s[14]), .Y(mtime_count_out_lm[14]) ); defparam \mtime_count_out_lm_0[14] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[11] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[11]), .C(mtime_count_out_s[11]), .Y(mtime_count_out_lm[11]) ); defparam \mtime_count_out_lm_0[11] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[55] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[55]), .C(mtime_count_out_s[55]), .Y(mtime_count_out_lm[55]) ); defparam \mtime_count_out_lm_0[55] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[41] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[41]), .C(mtime_count_out_s[41]), .Y(mtime_count_out_lm[41]) ); defparam \mtime_count_out_lm_0[41] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[38] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[38]), .C(mtime_count_out_s[38]), .Y(mtime_count_out_lm[38]) ); defparam \mtime_count_out_lm_0[38] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[42] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[42]), .C(mtime_count_out_s[42]), .Y(mtime_count_out_lm[42]) ); defparam \mtime_count_out_lm_0[42] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[63] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[63]), .C(mtime_count_out_s_Z[63]), .Y(mtime_count_out_lm[63]) ); defparam \mtime_count_out_lm_0[63] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[59] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[59]), .C(mtime_count_out_s[59]), .Y(mtime_count_out_lm[59]) ); defparam \mtime_count_out_lm_0[59] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[32] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[32]), .C(mtime_count_out_s[32]), .Y(mtime_count_out_lm[32]) ); defparam \mtime_count_out_lm_0[32] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[62] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[62]), .C(mtime_count_out_s[62]), .Y(mtime_count_out_lm[62]) ); defparam \mtime_count_out_lm_0[62] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[30] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[30]), .C(mtime_count_out_s[30]), .Y(mtime_count_out_lm[30]) ); defparam \mtime_count_out_lm_0[30] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[8] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[8]), .C(mtime_count_out_s[8]), .Y(mtime_count_out_lm[8]) ); defparam \mtime_count_out_lm_0[8] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[6] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[6]), .C(mtime_count_out_s[6]), .Y(mtime_count_out_lm[6]) ); defparam \mtime_count_out_lm_0[6] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[36] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[36]), .C(mtime_count_out_s[36]), .Y(mtime_count_out_lm[36]) ); defparam \mtime_count_out_lm_0[36] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[46] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[46]), .C(mtime_count_out_s[46]), .Y(mtime_count_out_lm[46]) ); defparam \mtime_count_out_lm_0[46] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[47] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[47]), .C(mtime_count_out_s[47]), .Y(mtime_count_out_lm[47]) ); defparam \mtime_count_out_lm_0[47] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[4] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[4]), .C(mtime_count_out_s[4]), .Y(mtime_count_out_lm[4]) ); defparam \mtime_count_out_lm_0[4] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[56] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[56]), .C(mtime_count_out_s[56]), .Y(mtime_count_out_lm[56]) ); defparam \mtime_count_out_lm_0[56] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[44] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[44]), .C(mtime_count_out_s[44]), .Y(mtime_count_out_lm[44]) ); defparam \mtime_count_out_lm_0[44] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[37] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[37]), .C(mtime_count_out_s[37]), .Y(mtime_count_out_lm[37]) ); defparam \mtime_count_out_lm_0[37] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[33] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[33]), .C(mtime_count_out_s[33]), .Y(mtime_count_out_lm[33]) ); defparam \mtime_count_out_lm_0[33] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[34] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[34]), .C(mtime_count_out_s[34]), .Y(mtime_count_out_lm[34]) ); defparam \mtime_count_out_lm_0[34] .INIT=8'hDC; // @48:13076 CFG3 \mtime_count_out_lm_0[5] ( .A(un1_T_l_En), .B(mtime_count_out_lm_2[5]), .C(mtime_count_out_s[5]), .Y(mtime_count_out_lm[5]) ); defparam \mtime_count_out_lm_0[5] .INIT=8'hDC; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_subsys_mtime_irq_1s_1s_100s_1s_33603580_33570820 */ module miv_rv32_ipcore_Z19 ( wrdata_0, PADDR_0, CoreAPB3_0_0_APBmslave0_PWDATA, CoreAPB3_0_0_APBmslave0_PADDR_3, CoreAPB3_0_0_APBmslave0_PADDR_1, CoreAPB3_0_0_APBmslave0_PADDR_0, CoreAPB3_0_0_APBmslave0_PADDR_25, CoreAPB3_0_0_APBmslave0_PADDR_24, CoreAPB3_0_0_APBmslave0_PADDR_23, CoreAPB3_0_0_APBmslave0_PADDR_22, CoreAPB3_0_0_APBmslave0_PADDR_7, CoreAPB3_0_0_APBmslave0_PADDR_6, CoreAPB3_0_0_APBmslave0_PADDR_5, paddr_1z_0, currTapState_0, currTapState_7, delay_sel_0, PRDATA_0_iv_0, io0O1_m, CoreAPB3_0_0_APBmslave2_PRDATA_m, io0O1, N_1206, un1_PADDR_2, tx_fifo_write_sig14_i_1, N_1214, apb_pslverr_net, apb_penable_net, CoreAPB3_0_0_APBmslave0_PWRITE, MIV_RV32_C0_0_APB_INITIATOR_PSELx, CoreAPB3_0_0_APBmslave0_PENABLE, iPRDATA_0_sqmuxa, Oi0O1, un1_shiftDR20, COREJTAGDEBUG_C0_0_TGT_TDI_0, COREJTAGDEBUG_C0_0_TGT_TMS_0, N_974, shiftDR21, shiftBP_ne_0, COREJTAGDEBUG_C0_0_TGT_TCK_0_i, shiftIR_ne_0, COREJTAGDEBUG_C0_0_TGT_TCK_0, PF_CCC_0_0_OUT0_FABCLK_0, d_m2_e_1_0, N_8_i, N_10_i, CoreAPB3_0_0_APBmslave0_PWRITE_s0, un3_apb_int_sel, dff ) ; output wrdata_0 ; output PADDR_0 ; output [31:1] CoreAPB3_0_0_APBmslave0_PWDATA ; output CoreAPB3_0_0_APBmslave0_PADDR_3 ; output CoreAPB3_0_0_APBmslave0_PADDR_1 ; output CoreAPB3_0_0_APBmslave0_PADDR_0 ; output CoreAPB3_0_0_APBmslave0_PADDR_25 ; output CoreAPB3_0_0_APBmslave0_PADDR_24 ; output CoreAPB3_0_0_APBmslave0_PADDR_23 ; output CoreAPB3_0_0_APBmslave0_PADDR_22 ; output CoreAPB3_0_0_APBmslave0_PADDR_7 ; output CoreAPB3_0_0_APBmslave0_PADDR_6 ; output CoreAPB3_0_0_APBmslave0_PADDR_5 ; output paddr_1z_0 ; output currTapState_0 ; output currTapState_7 ; input delay_sel_0 ; input [7:0] PRDATA_0_iv_0 ; input [15:0] io0O1_m ; input [15:8] CoreAPB3_0_0_APBmslave2_PRDATA_m ; input [31:16] io0O1 ; input N_1206 ; input un1_PADDR_2 ; input tx_fifo_write_sig14_i_1 ; input N_1214 ; input apb_pslverr_net ; output apb_penable_net ; output CoreAPB3_0_0_APBmslave0_PWRITE ; output MIV_RV32_C0_0_APB_INITIATOR_PSELx ; output CoreAPB3_0_0_APBmslave0_PENABLE ; input iPRDATA_0_sqmuxa ; input Oi0O1 ; output un1_shiftDR20 ; input COREJTAGDEBUG_C0_0_TGT_TDI_0 ; input COREJTAGDEBUG_C0_0_TGT_TMS_0 ; output N_974 ; output shiftDR21 ; output shiftBP_ne_0 ; input COREJTAGDEBUG_C0_0_TGT_TCK_0_i ; output shiftIR_ne_0 ; input COREJTAGDEBUG_C0_0_TGT_TCK_0 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input d_m2_e_1_0 ; output N_8_i ; output N_10_i ; input CoreAPB3_0_0_APBmslave0_PWRITE_s0 ; output un3_apb_int_sel ; input dff ; wire wrdata_0 ; wire PADDR_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_3 ; wire CoreAPB3_0_0_APBmslave0_PADDR_1 ; wire CoreAPB3_0_0_APBmslave0_PADDR_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_25 ; wire CoreAPB3_0_0_APBmslave0_PADDR_24 ; wire CoreAPB3_0_0_APBmslave0_PADDR_23 ; wire CoreAPB3_0_0_APBmslave0_PADDR_22 ; wire CoreAPB3_0_0_APBmslave0_PADDR_7 ; wire CoreAPB3_0_0_APBmslave0_PADDR_6 ; wire CoreAPB3_0_0_APBmslave0_PADDR_5 ; wire paddr_1z_0 ; wire currTapState_0 ; wire currTapState_7 ; wire delay_sel_0 ; wire N_1206 ; wire un1_PADDR_2 ; wire tx_fifo_write_sig14_i_1 ; wire N_1214 ; wire apb_pslverr_net ; wire apb_penable_net ; wire CoreAPB3_0_0_APBmslave0_PWRITE ; wire MIV_RV32_C0_0_APB_INITIATOR_PSELx ; wire CoreAPB3_0_0_APBmslave0_PENABLE ; wire iPRDATA_0_sqmuxa ; wire Oi0O1 ; wire un1_shiftDR20 ; wire COREJTAGDEBUG_C0_0_TGT_TDI_0 ; wire COREJTAGDEBUG_C0_0_TGT_TMS_0 ; wire N_974 ; wire shiftDR21 ; wire shiftBP_ne_0 ; wire COREJTAGDEBUG_C0_0_TGT_TCK_0_i ; wire shiftIR_ne_0 ; wire COREJTAGDEBUG_C0_0_TGT_TCK_0 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire d_m2_e_1_0 ; wire N_8_i ; wire N_10_i ; wire CoreAPB3_0_0_APBmslave0_PWRITE_s0 ; wire un3_apb_int_sel ; wire dff ; wire [31:0] apb_prdata_int; wire [31:0] apb_prdata_net_Z; wire [1:0] un3_branch_cond_ex; wire [31:0] cpu_debug_csr_op_rd_data_net; wire [5:0] cpu_debug_gpr_op_addr_net; wire [11:0] cpu_debug_csr_op_addr_net; wire [1:0] req_masked; wire [31:0] cpu_d_req_wr_data_net; wire [31:0] cpu_debug_op_wr_data_net; wire [31:0] cpu_debug_gpr_op_rd_data_net; wire [63:0] mtime_count_out; wire [0:0] buff_rd_ptr; wire [2:2] req_buff_resp_fault_0_; wire [2:2] req_buff_resp_fault_1_; wire [3:3] un19_cpu_d_resp_rd_data_sig; wire [6:6] debug_sysbus_resp_rd_data_0; wire [3:0] lsu_expipe_req_op_net; wire [0:0] un2_req_resp_str_req_buff_addr_misalign; wire [2:2] lsu_emi_req_rd_byte_en_2; wire [1:1] cpu_d_req_wr_byte_en_net_1; wire [2:2] lsu_emi_req_rd_byte_en_iv_0; wire [2:2] lsu_emi_req_rd_byte_en_3_m; wire [31:0] cpu_d_resp_rd_data_net; wire [1:1] cpu_d_req_rd_byte_en_net_1; wire [3:1] cpu_d_req_wr_byte_en_net_2; wire [22:21] next_req_fetch_ptr_yy; wire [31:0] cpu_i_resp_rd_data_sel; wire [31:1] cpu_d_req_addr_net; wire [31:2] apb_i_req_addr_net; wire [3:0] debug_sysbus_req_wr_byte_en_net; wire [3:0] debug_sysbus_req_rd_byte_en_net; wire [31:0] sba_req_wr_data_int; wire [31:0] sba_req_addr_int; wire [8:2] i_trx_resp_pkd; wire [31:0] apb_d_req_wr_data_net; wire [3:0] apb_d_req_wr_byte_en_net; wire [31:0] apb_d_req_addr_net; wire [3:0] hipri_req_ptr; wire [31:0] tcm0_d_resp_rd_data_net; wire [31:0] apb_d_resp_rd_data_net; wire [1:0] i_trx_resp_valid_pkd; wire [1:0] apb_resp_sel; wire [7:7] req_os_d_src; wire [1:0] cpu_d_wr_rd_state; wire [1:1] resp_dest; wire [31:0] apb_paddr; wire debug_sys_reset ; wire subsys_resetn_Z ; wire stage_state_ex ; wire cpu_debug_csr_op_valid_net ; wire cpu_debug_csr_wr_en_net ; wire cpu_debug_csr_rd_en_net ; wire un2_cpu_i_req_ready ; wire cpu_i_req_is_tcm0_5 ; wire cpu_m1_e_1 ; wire un8_cpu_i_req_is_tcm0lt19_12 ; wire cpu_i_req_is_tcm0_4_2 ; wire gen_m3 ; wire cmp_cond ; wire exu_result_valid_ex ; wire cpu_d_req_is_apb ; wire N_64 ; wire un8_cpu_i_req_is_tcm0lt18 ; wire cpu_debug_gpr_rd_en_net ; wire debug_exit_retr ; wire un1_instr_inhibit_ex ; wire cpu_debug_gpr_wr_en_net ; wire cpu_debug_gpr_op_valid_net ; wire apb_i_req_ready_net_tz ; wire tcm0_i_req_ready_net_tz ; wire tcm0_i_req_valid_1 ; wire un1_lsu_resp_valid_1 ; wire cpu_d_resp_valid_d ; wire un1_cpu_i_req_ready_x ; wire cpu_i_req_is_apb ; wire un2_cpu_i_req_ready_x ; wire un3_cpu_i_req_ready ; wire cpu_i_req_is_dummy_target ; wire cpu_m8_0_a3_0_3 ; wire cpu_i_req_is_tcm0_5_0 ; wire cpu_m8_0_a3_0_2 ; wire un8_cpu_i_req_is_tcm0lto18_12_1 ; wire cpu_N_6 ; wire gpr_rs2_rd_data_valid_sig ; wire cpu_debug_halt_req_net ; wire cpu_debug_resume_req_net ; wire cpu_debug_halt_ack_net ; wire cpu_debug_csr_op_rd_data_valid_net ; wire un5_m_timer_irq_cry_63 ; wire un5_m_timer_irq_cry_63_i ; wire hart_soft_irq_net ; wire init_wr_dcsr_step_en ; wire hart_soft_reset_net ; wire cpu_debug_active_net ; wire bcu_result_cry_0_Y ; wire lsu_emi_req_valid49 ; wire lsu_emi_req_valid47 ; wire un1_lsu_emi_req_valid46_1 ; wire N_90 ; wire un1_lsu_emi_req_valid46 ; wire N_84 ; wire un1_lsu_expipe_req_op_4 ; wire un5_lsu_emi_req_rd_byte_en ; wire un24_lsu_emi_req_rd_byte_en ; wire N_145 ; wire cpu_d_resp_error_sig ; wire un1_lsu_resp_valid ; wire cpu_d_req_valid_net ; wire cpu_d_req_ready_sig ; wire sticky_reset_reg ; wire un3_next_req_fetch_ptr_cry_15_S ; wire un3_next_req_fetch_ptr_cry_16_S ; wire un3_next_req_fetch_ptr_cry_18_S ; wire un3_next_req_fetch_ptr_cry_21_S ; wire un3_next_req_fetch_ptr_cry_22_S ; wire un3_next_req_fetch_ptr_cry_23_S ; wire un3_next_req_fetch_ptr_cry_25_S ; wire un3_next_req_fetch_ptr_cry_26_S ; wire un3_next_req_fetch_ptr_cry_27_S ; wire un3_next_req_fetch_ptr_s_29_S ; wire un5_N_4_0_i ; wire ifu_expipe_req_branch_excpt_req_valid_1_0 ; wire ifu_emi_req_valid_i_o2_1_0 ; wire ifu_N_11 ; wire N_764 ; wire ifu_expipe_req_branch_excpt_req_fenci_net ; wire cpu_i_resp_valid_sel ; wire trace_priv_i ; wire ifu_emi_req_valid_i_0 ; wire cpu_i_resp_error_sel ; wire un1_cpu_i_req_ready ; wire i_trx_os_buff_ready ; wire un1_cpu_d_req_ready_sig_0_0 ; wire cpu_d_resp_valid_sig ; wire debug_sysbus_resp_error_net ; wire N_807 ; wire debug_trx_os_net ; wire sba_req_addr_1 ; wire cpu_N_14_mux ; wire un1_cpu_d_req_ready_sig_d_0 ; wire un1_cpu_d_req_ready_sig_c ; wire debug_sysbus_resp_ready_net ; wire debug_sysbus_req_valid_net ; wire tcm0_i_req_valid_net ; wire cpu_d_req_valid_mux_1 ; wire un1_cpu_d_req_accepted_1_0 ; wire un24_cpu_i_req_is_apb_1 ; wire tcm0_d_req_valid_2 ; wire N_1154 ; wire tcm0_i_resp_valid_net ; wire un24_cpu_i_req_is_apb_17 ; wire N_1157 ; wire apb_i_req_valid_net_3 ; wire req_complete_reg ; wire apb_d_req_valid_3_0 ; wire cpu_d_req_ready_1 ; wire cpu_d_req_is_tcm0 ; wire tcm0_d_req_valid_net ; wire apb_d_resp_error_net ; wire un4_cpu_i_req_is_apb ; wire un16_cpu_i_req_is_apb ; wire un24_cpu_i_req_is_apb_19_11 ; wire un1_cpu_d_req_ready ; wire N_88 ; wire N_1153 ; wire N_1225 ; wire N_1212 ; wire N_1411 ; wire apb_psel_net ; wire GND ; wire VCC ; // @48:755 CFG2 subsys_resetn ( .A(dff), .B(debug_sys_reset), .Y(subsys_resetn_Z) ); defparam subsys_resetn.INIT=4'h2; // @48:2182 CFG4 \apb_prdata_net[24] ( .A(un3_apb_int_sel), .B(apb_prdata_int[24]), .C(io0O1[24]), .D(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .Y(apb_prdata_net_Z[24]) ); defparam \apb_prdata_net[24] .INIT=16'hD888; // @48:2182 CFG4 \apb_prdata_net[28] ( .A(un3_apb_int_sel), .B(apb_prdata_int[28]), .C(io0O1[28]), .D(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .Y(apb_prdata_net_Z[28]) ); defparam \apb_prdata_net[28] .INIT=16'hD888; // @48:2182 CFG4 \apb_prdata_net[29] ( .A(un3_apb_int_sel), .B(apb_prdata_int[29]), .C(io0O1[29]), .D(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .Y(apb_prdata_net_Z[29]) ); defparam \apb_prdata_net[29] .INIT=16'hD888; // @48:2182 CFG4 \apb_prdata_net[25] ( .A(un3_apb_int_sel), .B(apb_prdata_int[25]), .C(io0O1[25]), .D(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .Y(apb_prdata_net_Z[25]) ); defparam \apb_prdata_net[25] .INIT=16'hD888; // @48:2182 CFG4 \apb_prdata_net[26] ( .A(un3_apb_int_sel), .B(apb_prdata_int[26]), .C(io0O1[26]), .D(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .Y(apb_prdata_net_Z[26]) ); defparam \apb_prdata_net[26] .INIT=16'hD888; // @48:2182 CFG4 \apb_prdata_net[27] ( .A(un3_apb_int_sel), .B(apb_prdata_int[27]), .C(io0O1[27]), .D(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .Y(apb_prdata_net_Z[27]) ); defparam \apb_prdata_net[27] .INIT=16'hD888; // @48:2182 CFG4 \apb_prdata_net[21] ( .A(un3_apb_int_sel), .B(apb_prdata_int[21]), .C(io0O1[21]), .D(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .Y(apb_prdata_net_Z[21]) ); defparam \apb_prdata_net[21] .INIT=16'hD888; // @48:2182 CFG4 \apb_prdata_net[23] ( .A(un3_apb_int_sel), .B(apb_prdata_int[23]), .C(io0O1[23]), .D(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .Y(apb_prdata_net_Z[23]) ); defparam \apb_prdata_net[23] .INIT=16'hD888; // @48:2182 CFG4 \apb_prdata_net[30] ( .A(un3_apb_int_sel), .B(apb_prdata_int[30]), .C(io0O1[30]), .D(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .Y(apb_prdata_net_Z[30]) ); defparam \apb_prdata_net[30] .INIT=16'hD888; // @48:2182 CFG4 \apb_prdata_net[31] ( .A(un3_apb_int_sel), .B(apb_prdata_int[31]), .C(io0O1[31]), .D(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .Y(apb_prdata_net_Z[31]) ); defparam \apb_prdata_net[31] .INIT=16'hD888; // @48:2182 CFG4 \apb_prdata_net[22] ( .A(un3_apb_int_sel), .B(apb_prdata_int[22]), .C(io0O1[22]), .D(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .Y(apb_prdata_net_Z[22]) ); defparam \apb_prdata_net[22] .INIT=16'hD888; // @48:2182 CFG4 \apb_prdata_net[16] ( .A(un3_apb_int_sel), .B(apb_prdata_int[16]), .C(io0O1[16]), .D(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .Y(apb_prdata_net_Z[16]) ); defparam \apb_prdata_net[16] .INIT=16'hD888; // @48:2182 CFG4 \apb_prdata_net[17] ( .A(un3_apb_int_sel), .B(apb_prdata_int[17]), .C(io0O1[17]), .D(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .Y(apb_prdata_net_Z[17]) ); defparam \apb_prdata_net[17] .INIT=16'hD888; // @48:2182 CFG4 \apb_prdata_net[18] ( .A(un3_apb_int_sel), .B(apb_prdata_int[18]), .C(io0O1[18]), .D(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .Y(apb_prdata_net_Z[18]) ); defparam \apb_prdata_net[18] .INIT=16'hD888; // @48:2182 CFG4 \apb_prdata_net[19] ( .A(un3_apb_int_sel), .B(apb_prdata_int[19]), .C(io0O1[19]), .D(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .Y(apb_prdata_net_Z[19]) ); defparam \apb_prdata_net[19] .INIT=16'hD888; // @48:2182 CFG4 \apb_prdata_net[20] ( .A(un3_apb_int_sel), .B(apb_prdata_int[20]), .C(io0O1[20]), .D(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .Y(apb_prdata_net_Z[20]) ); defparam \apb_prdata_net[20] .INIT=16'hD888; // @48:2182 CFG4 \apb_prdata_net[3] ( .A(un3_apb_int_sel), .B(apb_prdata_int[3]), .C(io0O1_m[3]), .D(PRDATA_0_iv_0[3]), .Y(apb_prdata_net_Z[3]) ); defparam \apb_prdata_net[3] .INIT=16'hDDD8; // @48:2182 CFG4 \apb_prdata_net[6] ( .A(un3_apb_int_sel), .B(apb_prdata_int[6]), .C(io0O1_m[6]), .D(PRDATA_0_iv_0[6]), .Y(apb_prdata_net_Z[6]) ); defparam \apb_prdata_net[6] .INIT=16'hDDD8; // @48:2182 CFG4 \apb_prdata_net[7] ( .A(un3_apb_int_sel), .B(apb_prdata_int[7]), .C(io0O1_m[7]), .D(PRDATA_0_iv_0[7]), .Y(apb_prdata_net_Z[7]) ); defparam \apb_prdata_net[7] .INIT=16'hDDD8; // @48:2182 CFG4 \apb_prdata_net[8] ( .A(un3_apb_int_sel), .B(apb_prdata_int[8]), .C(io0O1_m[8]), .D(CoreAPB3_0_0_APBmslave2_PRDATA_m[8]), .Y(apb_prdata_net_Z[8]) ); defparam \apb_prdata_net[8] .INIT=16'hDDD8; // @48:2182 CFG4 \apb_prdata_net[12] ( .A(un3_apb_int_sel), .B(apb_prdata_int[12]), .C(io0O1_m[12]), .D(CoreAPB3_0_0_APBmslave2_PRDATA_m[12]), .Y(apb_prdata_net_Z[12]) ); defparam \apb_prdata_net[12] .INIT=16'hDDD8; // @48:2182 CFG4 \apb_prdata_net[14] ( .A(un3_apb_int_sel), .B(apb_prdata_int[14]), .C(io0O1_m[14]), .D(CoreAPB3_0_0_APBmslave2_PRDATA_m[14]), .Y(apb_prdata_net_Z[14]) ); defparam \apb_prdata_net[14] .INIT=16'hDDD8; // @48:2182 CFG4 \apb_prdata_net[15] ( .A(un3_apb_int_sel), .B(apb_prdata_int[15]), .C(io0O1_m[15]), .D(CoreAPB3_0_0_APBmslave2_PRDATA_m[15]), .Y(apb_prdata_net_Z[15]) ); defparam \apb_prdata_net[15] .INIT=16'hDDD8; // @48:2182 CFG4 \apb_prdata_net[2] ( .A(un3_apb_int_sel), .B(apb_prdata_int[2]), .C(io0O1_m[2]), .D(PRDATA_0_iv_0[2]), .Y(apb_prdata_net_Z[2]) ); defparam \apb_prdata_net[2] .INIT=16'hDDD8; // @48:2182 CFG4 \apb_prdata_net[5] ( .A(un3_apb_int_sel), .B(apb_prdata_int[5]), .C(io0O1_m[5]), .D(PRDATA_0_iv_0[5]), .Y(apb_prdata_net_Z[5]) ); defparam \apb_prdata_net[5] .INIT=16'hDDD8; // @48:2182 CFG4 \apb_prdata_net[13] ( .A(un3_apb_int_sel), .B(apb_prdata_int[13]), .C(io0O1_m[13]), .D(CoreAPB3_0_0_APBmslave2_PRDATA_m[13]), .Y(apb_prdata_net_Z[13]) ); defparam \apb_prdata_net[13] .INIT=16'hDDD8; // @48:2182 CFG4 \apb_prdata_net[4] ( .A(un3_apb_int_sel), .B(apb_prdata_int[4]), .C(io0O1_m[4]), .D(PRDATA_0_iv_0[4]), .Y(apb_prdata_net_Z[4]) ); defparam \apb_prdata_net[4] .INIT=16'hDDD8; // @48:2182 CFG4 \apb_prdata_net[9] ( .A(un3_apb_int_sel), .B(apb_prdata_int[9]), .C(io0O1_m[9]), .D(CoreAPB3_0_0_APBmslave2_PRDATA_m[9]), .Y(apb_prdata_net_Z[9]) ); defparam \apb_prdata_net[9] .INIT=16'hDDD8; // @48:2182 CFG4 \apb_prdata_net[10] ( .A(un3_apb_int_sel), .B(apb_prdata_int[10]), .C(io0O1_m[10]), .D(CoreAPB3_0_0_APBmslave2_PRDATA_m[10]), .Y(apb_prdata_net_Z[10]) ); defparam \apb_prdata_net[10] .INIT=16'hDDD8; // @48:2182 CFG4 \apb_prdata_net[11] ( .A(un3_apb_int_sel), .B(apb_prdata_int[11]), .C(io0O1_m[11]), .D(CoreAPB3_0_0_APBmslave2_PRDATA_m[11]), .Y(apb_prdata_net_Z[11]) ); defparam \apb_prdata_net[11] .INIT=16'hDDD8; // @48:2182 CFG4 \apb_prdata_net[1] ( .A(un3_apb_int_sel), .B(apb_prdata_int[1]), .C(io0O1_m[1]), .D(PRDATA_0_iv_0[1]), .Y(apb_prdata_net_Z[1]) ); defparam \apb_prdata_net[1] .INIT=16'hDDD8; // @48:2182 CFG4 \apb_prdata_net[0] ( .A(un3_apb_int_sel), .B(apb_prdata_int[0]), .C(io0O1_m[0]), .D(PRDATA_0_iv_0[0]), .Y(apb_prdata_net_Z[0]) ); defparam \apb_prdata_net[0] .INIT=16'hDDD8; // @48:797 miv_rv32_hart_Z17 u_hart_0 ( .un3_branch_cond_ex(un3_branch_cond_ex[1:0]), .cpu_debug_csr_op_rd_data_net(cpu_debug_csr_op_rd_data_net[31:0]), .cpu_debug_gpr_op_addr_net(cpu_debug_gpr_op_addr_net[5:0]), .cpu_debug_csr_op_addr_net(cpu_debug_csr_op_addr_net[11:0]), .req_masked(req_masked[1:0]), .cpu_d_req_wr_data_net(cpu_d_req_wr_data_net[31:0]), .cpu_debug_op_wr_data_net(cpu_debug_op_wr_data_net[31:0]), .cpu_debug_gpr_op_rd_data_net(cpu_debug_gpr_op_rd_data_net[31:0]), .mtime_count_out(mtime_count_out[63:0]), .buff_rd_ptr_0(buff_rd_ptr[0]), .req_buff_resp_fault_0__0(req_buff_resp_fault_0_[2]), .req_buff_resp_fault_1__0(req_buff_resp_fault_1_[2]), .un19_cpu_d_resp_rd_data_sig_0(un19_cpu_d_resp_rd_data_sig[3]), .debug_sysbus_resp_rd_data_0_0(debug_sysbus_resp_rd_data_0[6]), .lsu_expipe_req_op_net_0(lsu_expipe_req_op_net[0]), .lsu_expipe_req_op_net_3(lsu_expipe_req_op_net[3]), .un2_req_resp_str_req_buff_addr_misalign_0(un2_req_resp_str_req_buff_addr_misalign[0]), .lsu_emi_req_rd_byte_en_2_0(lsu_emi_req_rd_byte_en_2[2]), .cpu_d_req_wr_byte_en_net_1_0(cpu_d_req_wr_byte_en_net_1[1]), .lsu_emi_req_rd_byte_en_iv_0_0(lsu_emi_req_rd_byte_en_iv_0[2]), .lsu_emi_req_rd_byte_en_3_m_0(lsu_emi_req_rd_byte_en_3_m[2]), .cpu_d_resp_rd_data_net(cpu_d_resp_rd_data_net[31:0]), .cpu_d_req_rd_byte_en_net_1_0(cpu_d_req_rd_byte_en_net_1[1]), .cpu_d_req_wr_byte_en_net_2_2(cpu_d_req_wr_byte_en_net_2[3]), .cpu_d_req_wr_byte_en_net_2_0(cpu_d_req_wr_byte_en_net_2[1]), .next_req_fetch_ptr_yy(next_req_fetch_ptr_yy[22:21]), .cpu_i_resp_rd_data_sel(cpu_i_resp_rd_data_sel[31:0]), .cpu_d_req_addr_net(cpu_d_req_addr_net[31:1]), .apb_i_req_addr_net(apb_i_req_addr_net[31:2]), .stage_state_ex(stage_state_ex), .cpu_debug_csr_op_valid_net(cpu_debug_csr_op_valid_net), .cpu_debug_csr_wr_en_net(cpu_debug_csr_wr_en_net), .cpu_debug_csr_rd_en_net(cpu_debug_csr_rd_en_net), .un2_cpu_i_req_ready(un2_cpu_i_req_ready), .cpu_i_req_is_tcm0_5(cpu_i_req_is_tcm0_5), .cpu_m1_e_1(cpu_m1_e_1), .un8_cpu_i_req_is_tcm0lt19_12(un8_cpu_i_req_is_tcm0lt19_12), .cpu_i_req_is_tcm0_4_2(cpu_i_req_is_tcm0_4_2), .gen_m3(gen_m3), .cmp_cond(cmp_cond), .exu_result_valid_ex(exu_result_valid_ex), .cpu_d_req_is_apb(cpu_d_req_is_apb), .N_64(N_64), .un8_cpu_i_req_is_tcm0lt18(un8_cpu_i_req_is_tcm0lt18), .N_10_i(N_10_i), .N_8_i(N_8_i), .cpu_debug_gpr_rd_en_net(cpu_debug_gpr_rd_en_net), .debug_exit_retr(debug_exit_retr), .un1_instr_inhibit_ex(un1_instr_inhibit_ex), .cpu_debug_gpr_wr_en_net(cpu_debug_gpr_wr_en_net), .cpu_debug_gpr_op_valid_net(cpu_debug_gpr_op_valid_net), .apb_i_req_ready_net_tz(apb_i_req_ready_net_tz), .tcm0_i_req_ready_net_tz(tcm0_i_req_ready_net_tz), .tcm0_i_req_valid_1(tcm0_i_req_valid_1), .un1_lsu_resp_valid_1(un1_lsu_resp_valid_1), .cpu_d_resp_valid_d(cpu_d_resp_valid_d), .un1_cpu_i_req_ready_x(un1_cpu_i_req_ready_x), .cpu_i_req_is_apb(cpu_i_req_is_apb), .un2_cpu_i_req_ready_x(un2_cpu_i_req_ready_x), .un3_cpu_i_req_ready(un3_cpu_i_req_ready), .cpu_i_req_is_dummy_target(cpu_i_req_is_dummy_target), .cpu_m8_0_a3_0_3(cpu_m8_0_a3_0_3), .cpu_i_req_is_tcm0_5_0(cpu_i_req_is_tcm0_5_0), .cpu_m8_0_a3_0_2(cpu_m8_0_a3_0_2), .un8_cpu_i_req_is_tcm0lto18_12_1(un8_cpu_i_req_is_tcm0lto18_12_1), .cpu_N_6(cpu_N_6), .d_m2_e_1_0(d_m2_e_1_0), .gpr_rs2_rd_data_valid_sig(gpr_rs2_rd_data_valid_sig), .cpu_debug_halt_req_net(cpu_debug_halt_req_net), .cpu_debug_resume_req_net(cpu_debug_resume_req_net), .cpu_debug_halt_ack_net(cpu_debug_halt_ack_net), .cpu_debug_csr_op_rd_data_valid_net(cpu_debug_csr_op_rd_data_valid_net), .un5_m_timer_irq_cry_63(un5_m_timer_irq_cry_63), .un5_m_timer_irq_cry_63_i(un5_m_timer_irq_cry_63_i), .hart_soft_irq_net(hart_soft_irq_net), .init_wr_dcsr_step_en(init_wr_dcsr_step_en), .debug_sys_reset(debug_sys_reset), .hart_soft_reset_net(hart_soft_reset_net), .cpu_debug_active_net(cpu_debug_active_net), .bcu_result_cry_0_Y(bcu_result_cry_0_Y), .lsu_emi_req_valid49(lsu_emi_req_valid49), .lsu_emi_req_valid47(lsu_emi_req_valid47), .un1_lsu_emi_req_valid46_1(un1_lsu_emi_req_valid46_1), .N_90(N_90), .un1_lsu_emi_req_valid46(un1_lsu_emi_req_valid46), .N_84(N_84), .un1_lsu_expipe_req_op_4(un1_lsu_expipe_req_op_4), .un5_lsu_emi_req_rd_byte_en(un5_lsu_emi_req_rd_byte_en), .un24_lsu_emi_req_rd_byte_en(un24_lsu_emi_req_rd_byte_en), .N_145(N_145), .cpu_d_resp_error_sig(cpu_d_resp_error_sig), .un1_lsu_resp_valid(un1_lsu_resp_valid), .cpu_d_req_valid_net(cpu_d_req_valid_net), .cpu_d_req_ready_sig(cpu_d_req_ready_sig), .dff(dff), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .sticky_reset_reg(sticky_reset_reg), .un3_next_req_fetch_ptr_cry_15_S(un3_next_req_fetch_ptr_cry_15_S), .un3_next_req_fetch_ptr_cry_16_S(un3_next_req_fetch_ptr_cry_16_S), .un3_next_req_fetch_ptr_cry_18_S(un3_next_req_fetch_ptr_cry_18_S), .un3_next_req_fetch_ptr_cry_21_S(un3_next_req_fetch_ptr_cry_21_S), .un3_next_req_fetch_ptr_cry_22_S(un3_next_req_fetch_ptr_cry_22_S), .un3_next_req_fetch_ptr_cry_23_S(un3_next_req_fetch_ptr_cry_23_S), .un3_next_req_fetch_ptr_cry_25_S(un3_next_req_fetch_ptr_cry_25_S), .un3_next_req_fetch_ptr_cry_26_S(un3_next_req_fetch_ptr_cry_26_S), .un3_next_req_fetch_ptr_cry_27_S(un3_next_req_fetch_ptr_cry_27_S), .un3_next_req_fetch_ptr_s_29_S(un3_next_req_fetch_ptr_s_29_S), .un5_N_4_0_i(un5_N_4_0_i), .ifu_expipe_req_branch_excpt_req_valid_1_0(ifu_expipe_req_branch_excpt_req_valid_1_0), .ifu_emi_req_valid_i_o2_1_0(ifu_emi_req_valid_i_o2_1_0), .ifu_N_11(ifu_N_11), .N_764(N_764), .ifu_expipe_req_branch_excpt_req_fenci_net(ifu_expipe_req_branch_excpt_req_fenci_net), .cpu_i_resp_valid_sel(cpu_i_resp_valid_sel), .trace_priv_i(trace_priv_i), .ifu_emi_req_valid_i_0(ifu_emi_req_valid_i_0), .cpu_i_resp_error_sel(cpu_i_resp_error_sel), .un1_cpu_i_req_ready(un1_cpu_i_req_ready), .i_trx_os_buff_ready(i_trx_os_buff_ready) ); // @48:899 miv_rv32_subsys_debug_1s \gen_subsys_debug.u_subsys_debug_unit_0 ( .cpu_debug_gpr_op_rd_data_net(cpu_debug_gpr_op_rd_data_net[31:0]), .cpu_debug_csr_op_rd_data_net(cpu_debug_csr_op_rd_data_net[31:0]), .cpu_debug_gpr_op_addr_net(cpu_debug_gpr_op_addr_net[5:0]), .cpu_debug_csr_op_addr_net(cpu_debug_csr_op_addr_net[11:0]), .cpu_debug_op_wr_data_net(cpu_debug_op_wr_data_net[31:0]), .cpu_d_resp_rd_data_net(cpu_d_resp_rd_data_net[31:0]), .debug_sysbus_req_wr_byte_en_net(debug_sysbus_req_wr_byte_en_net[3:0]), .debug_sysbus_req_rd_byte_en_net(debug_sysbus_req_rd_byte_en_net[3:0]), .req_masked_0(req_masked[0]), .sba_req_wr_data_int(sba_req_wr_data_int[31:0]), .sba_req_addr_int(sba_req_addr_int[31:0]), .delay_sel_0(delay_sel_0), .currTapState_0(currTapState_0), .currTapState_7(currTapState_7), .cpu_debug_active_net(cpu_debug_active_net), .cpu_debug_resume_req_net(cpu_debug_resume_req_net), .cpu_debug_halt_req_net(cpu_debug_halt_req_net), .debug_sys_reset(debug_sys_reset), .cpu_debug_csr_op_valid_net(cpu_debug_csr_op_valid_net), .cpu_debug_csr_wr_en_net(cpu_debug_csr_wr_en_net), .cpu_debug_gpr_op_valid_net(cpu_debug_gpr_op_valid_net), .cpu_debug_gpr_wr_en_net(cpu_debug_gpr_wr_en_net), .cpu_debug_csr_rd_en_net(cpu_debug_csr_rd_en_net), .cpu_debug_gpr_rd_en_net(cpu_debug_gpr_rd_en_net), .un1_cpu_d_req_ready_sig_0_0(un1_cpu_d_req_ready_sig_0_0), .cpu_debug_csr_op_rd_data_valid_net(cpu_debug_csr_op_rd_data_valid_net), .cpu_d_resp_error_sig(cpu_d_resp_error_sig), .cpu_d_resp_valid_sig(cpu_d_resp_valid_sig), .debug_sysbus_resp_error_net(debug_sysbus_resp_error_net), .cpu_debug_halt_ack_net(cpu_debug_halt_ack_net), .debug_exit_retr(debug_exit_retr), .init_wr_dcsr_step_en(init_wr_dcsr_step_en), .N_807(N_807), .debug_trx_os_net(debug_trx_os_net), .sba_req_addr_1(sba_req_addr_1), .gpr_rs2_rd_data_valid_sig(gpr_rs2_rd_data_valid_sig), .trace_priv_i(trace_priv_i), .cpu_m8_0_a3_0_3(cpu_m8_0_a3_0_3), .cpu_i_req_is_tcm0_5(cpu_i_req_is_tcm0_5), .cpu_m8_0_a3_0_2(cpu_m8_0_a3_0_2), .cpu_N_6(cpu_N_6), .cpu_N_14_mux(cpu_N_14_mux), .un1_cpu_d_req_ready_sig_d_0(un1_cpu_d_req_ready_sig_d_0), .un1_cpu_d_req_ready_sig_c(un1_cpu_d_req_ready_sig_c), .debug_sysbus_resp_ready_net(debug_sysbus_resp_ready_net), .debug_sysbus_req_valid_net(debug_sysbus_req_valid_net), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .dff(dff), .COREJTAGDEBUG_C0_0_TGT_TCK_0(COREJTAGDEBUG_C0_0_TGT_TCK_0), .shiftIR_ne_0(shiftIR_ne_0), .COREJTAGDEBUG_C0_0_TGT_TCK_0_i(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .shiftBP_ne_0(shiftBP_ne_0), .shiftDR21(shiftDR21), .N_974(N_974), .COREJTAGDEBUG_C0_0_TGT_TMS_0(COREJTAGDEBUG_C0_0_TGT_TMS_0), .COREJTAGDEBUG_C0_0_TGT_TDI_0(COREJTAGDEBUG_C0_0_TGT_TDI_0), .un1_shiftDR20(un1_shiftDR20) ); // @48:1009 miv_rv32_subsys_interconnect_Z18 u_subsys_interconnect_0 ( .i_trx_resp_pkd_0(i_trx_resp_pkd[2]), .i_trx_resp_pkd_6(i_trx_resp_pkd[8]), .apb_d_req_wr_data_net(apb_d_req_wr_data_net[31:0]), .cpu_d_req_wr_data_net(cpu_d_req_wr_data_net[31:0]), .sba_req_wr_data_int(sba_req_wr_data_int[31:0]), .apb_d_req_wr_byte_en_net(apb_d_req_wr_byte_en_net[3:0]), .cpu_d_req_wr_byte_en_net_2_0(cpu_d_req_wr_byte_en_net_2[1]), .cpu_d_req_wr_byte_en_net_2_2(cpu_d_req_wr_byte_en_net_2[3]), .cpu_d_req_wr_byte_en_net_1_0(cpu_d_req_wr_byte_en_net_1[1]), .req_masked(req_masked[1:0]), .lsu_emi_req_rd_byte_en_3_m_0(lsu_emi_req_rd_byte_en_3_m[2]), .lsu_emi_req_rd_byte_en_iv_0_0(lsu_emi_req_rd_byte_en_iv_0[2]), .cpu_d_req_rd_byte_en_net_1_0(cpu_d_req_rd_byte_en_net_1[1]), .un3_branch_cond_ex(un3_branch_cond_ex[1:0]), .lsu_emi_req_rd_byte_en_2_0(lsu_emi_req_rd_byte_en_2[2]), .cpu_d_resp_rd_data_net(cpu_d_resp_rd_data_net[31:0]), .debug_sysbus_req_wr_byte_en_net(debug_sysbus_req_wr_byte_en_net[3:0]), .debug_sysbus_req_rd_byte_en_net(debug_sysbus_req_rd_byte_en_net[3:0]), .apb_d_req_addr_net(apb_d_req_addr_net[31:0]), .sba_req_addr_int(sba_req_addr_int[31:0]), .hipri_req_ptr_0(hipri_req_ptr[0]), .hipri_req_ptr_3(hipri_req_ptr[3]), .cpu_d_req_addr_net(cpu_d_req_addr_net[31:1]), .un19_cpu_d_resp_rd_data_sig_0(un19_cpu_d_resp_rd_data_sig[3]), .debug_sysbus_resp_rd_data_0_0(debug_sysbus_resp_rd_data_0[6]), .apb_i_req_addr_net(apb_i_req_addr_net[31:3]), .cpu_i_resp_rd_data_sel(cpu_i_resp_rd_data_sel[31:0]), .tcm0_d_resp_rd_data_net(tcm0_d_resp_rd_data_net[31:0]), .apb_d_resp_rd_data_net(apb_d_resp_rd_data_net[31:0]), .next_req_fetch_ptr_yy(next_req_fetch_ptr_yy[22:21]), .lsu_expipe_req_op_net_0(lsu_expipe_req_op_net[0]), .lsu_expipe_req_op_net_3(lsu_expipe_req_op_net[3]), .i_trx_resp_valid_pkd(i_trx_resp_valid_pkd[1:0]), .apb_resp_sel(apb_resp_sel[1:0]), .req_buff_resp_fault_0__0(req_buff_resp_fault_0_[2]), .req_buff_resp_fault_1__0(req_buff_resp_fault_1_[2]), .un2_req_resp_str_req_buff_addr_misalign_0(un2_req_resp_str_req_buff_addr_misalign[0]), .buff_rd_ptr_0_0(buff_rd_ptr[0]), .req_os_d_src_0(req_os_d_src[7]), .cpu_d_wr_rd_state(cpu_d_wr_rd_state[1:0]), .resp_dest_0(resp_dest[1]), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .subsys_resetn(subsys_resetn_Z), .tcm0_i_req_valid_net(tcm0_i_req_valid_net), .cpu_d_req_ready_sig(cpu_d_req_ready_sig), .un1_cpu_d_req_ready_sig_0_0(un1_cpu_d_req_ready_sig_0_0), .cpu_N_14_mux(cpu_N_14_mux), .ifu_N_11(ifu_N_11), .cpu_m8_0_a3_0_2(cpu_m8_0_a3_0_2), .cmp_cond(cmp_cond), .exu_result_valid_ex(exu_result_valid_ex), .cpu_d_req_valid_mux_1_1z(cpu_d_req_valid_mux_1), .cpu_d_req_valid_net(cpu_d_req_valid_net), .debug_sysbus_req_valid_net(debug_sysbus_req_valid_net), .N_764(N_764), .ifu_expipe_req_branch_excpt_req_fenci_net(ifu_expipe_req_branch_excpt_req_fenci_net), .un1_cpu_d_req_accepted_1_0(un1_cpu_d_req_accepted_1_0), .N_807(N_807), .un1_cpu_d_req_ready_sig_c_1z(un1_cpu_d_req_ready_sig_c), .N_64(N_64), .un1_cpu_d_req_ready_sig_d_0_1z(un1_cpu_d_req_ready_sig_d_0), .ifu_expipe_req_branch_excpt_req_valid_1_0(ifu_expipe_req_branch_excpt_req_valid_1_0), .ifu_emi_req_valid_i_0(ifu_emi_req_valid_i_0), .cpu_d_req_is_apb(cpu_d_req_is_apb), .stage_state_ex(stage_state_ex), .un1_instr_inhibit_ex(un1_instr_inhibit_ex), .un1_lsu_emi_req_valid46_1(un1_lsu_emi_req_valid46_1), .N_145(N_145), .debug_sysbus_resp_error_net(debug_sysbus_resp_error_net), .un1_lsu_resp_valid(un1_lsu_resp_valid), .lsu_emi_req_valid47(lsu_emi_req_valid47), .N_90(N_90), .cpu_d_resp_valid_sig_1z(cpu_d_resp_valid_sig), .un1_lsu_emi_req_valid46(un1_lsu_emi_req_valid46), .un1_lsu_expipe_req_op_4(un1_lsu_expipe_req_op_4), .un24_lsu_emi_req_rd_byte_en(un24_lsu_emi_req_rd_byte_en), .N_84(N_84), .un5_lsu_emi_req_rd_byte_en(un5_lsu_emi_req_rd_byte_en), .un1_lsu_resp_valid_1(un1_lsu_resp_valid_1), .cpu_i_req_is_tcm0_5_1z(cpu_i_req_is_tcm0_5), .hart_soft_reset_net(hart_soft_reset_net), .hart_soft_irq_net(hart_soft_irq_net), .cpu_d_resp_valid_d_1z(cpu_d_resp_valid_d), .un8_cpu_i_req_is_tcm0lt19_12(un8_cpu_i_req_is_tcm0lt19_12), .un24_cpu_i_req_is_apb_1(un24_cpu_i_req_is_apb_1), .bcu_result_cry_0_Y(bcu_result_cry_0_Y), .tcm0_d_req_valid_2_1z(tcm0_d_req_valid_2), .N_1154(N_1154), .sba_req_addr_1(sba_req_addr_1), .cpu_i_resp_valid_sel(cpu_i_resp_valid_sel), .tcm0_i_resp_valid_net(tcm0_i_resp_valid_net), .un24_cpu_i_req_is_apb_17_1z(un24_cpu_i_req_is_apb_17), .debug_sysbus_resp_ready_net(debug_sysbus_resp_ready_net), .cpu_i_resp_error_sel(cpu_i_resp_error_sel), .lsu_emi_req_valid49(lsu_emi_req_valid49), .trace_priv_i(trace_priv_i), .N_1157(N_1157), .apb_i_req_valid_net_3(apb_i_req_valid_net_3), .i_trx_os_buff_ready(i_trx_os_buff_ready), .req_complete_reg(req_complete_reg), .un3_next_req_fetch_ptr_cry_27_S(un3_next_req_fetch_ptr_cry_27_S), .un3_next_req_fetch_ptr_cry_26_S(un3_next_req_fetch_ptr_cry_26_S), .ifu_emi_req_valid_i_o2_1_0(ifu_emi_req_valid_i_o2_1_0), .debug_trx_os_net(debug_trx_os_net), .un3_next_req_fetch_ptr_cry_22_S(un3_next_req_fetch_ptr_cry_22_S), .un3_next_req_fetch_ptr_cry_21_S(un3_next_req_fetch_ptr_cry_21_S), .un3_next_req_fetch_ptr_cry_16_S(un3_next_req_fetch_ptr_cry_16_S), .un3_next_req_fetch_ptr_cry_15_S(un3_next_req_fetch_ptr_cry_15_S), .apb_d_req_valid_3_0_1z(apb_d_req_valid_3_0), .cpu_d_req_ready_1(cpu_d_req_ready_1), .cpu_d_req_is_tcm0_1z(cpu_d_req_is_tcm0), .cpu_N_6(cpu_N_6), .tcm0_d_req_valid_net(tcm0_d_req_valid_net), .cpu_d_resp_error_sig_1z(cpu_d_resp_error_sig), .apb_d_resp_error_net(apb_d_resp_error_net), .un3_next_req_fetch_ptr_cry_25_S(un3_next_req_fetch_ptr_cry_25_S), .cpu_m1_e_1(cpu_m1_e_1), .un1_cpu_i_req_ready_x_1z(un1_cpu_i_req_ready_x), .un2_cpu_i_req_ready_1z(un2_cpu_i_req_ready), .un3_cpu_i_req_ready_1z(un3_cpu_i_req_ready), .apb_i_req_ready_net_tz(apb_i_req_ready_net_tz), .cpu_i_req_is_apb_1z(cpu_i_req_is_apb), .un4_cpu_i_req_is_apb_1z(un4_cpu_i_req_is_apb), .un16_cpu_i_req_is_apb_1z(un16_cpu_i_req_is_apb), .un8_cpu_i_req_is_tcm0lt18(un8_cpu_i_req_is_tcm0lt18), .un8_cpu_i_req_is_tcm0lto18_12_1(un8_cpu_i_req_is_tcm0lto18_12_1), .cpu_i_req_is_tcm0_5_0_1z(cpu_i_req_is_tcm0_5_0), .un3_next_req_fetch_ptr_s_29_S(un3_next_req_fetch_ptr_s_29_S), .cpu_i_req_is_tcm0_4_2_1z(cpu_i_req_is_tcm0_4_2), .un3_next_req_fetch_ptr_cry_18_S(un3_next_req_fetch_ptr_cry_18_S), .gen_m3_1z(gen_m3), .un5_N_4_0_i(un5_N_4_0_i), .un3_next_req_fetch_ptr_cry_23_S(un3_next_req_fetch_ptr_cry_23_S), .sticky_reset_reg(sticky_reset_reg), .un24_cpu_i_req_is_apb_19_11_1z(un24_cpu_i_req_is_apb_19_11), .tcm0_i_req_valid_1(tcm0_i_req_valid_1), .tcm0_i_req_ready_net_tz(tcm0_i_req_ready_net_tz), .cpu_m8_0_a3_0_3(cpu_m8_0_a3_0_3), .un1_cpu_i_req_ready_1z(un1_cpu_i_req_ready), .cpu_i_req_is_dummy_target_1z(cpu_i_req_is_dummy_target), .un2_cpu_i_req_ready_x_1z(un2_cpu_i_req_ready_x) ); // @48:1260 miv_rv32_subsys_apb_initiator_32s_1s_1_0_1_2_3_4_5 \gen_apb.u_apb_initiator_0 ( .apb_resp_sel(apb_resp_sel[1:0]), .i_trx_resp_pkd_6(i_trx_resp_pkd[8]), .i_trx_resp_pkd_0(i_trx_resp_pkd[2]), .i_trx_resp_valid_pkd(i_trx_resp_valid_pkd[1:0]), .req_os_d_src_0(req_os_d_src[7]), .apb_d_req_wr_data_net(apb_d_req_wr_data_net[31:0]), .apb_d_req_wr_byte_en_net(apb_d_req_wr_byte_en_net[3:0]), .apb_i_req_addr_net(apb_i_req_addr_net[31:2]), .apb_d_req_addr_net(apb_d_req_addr_net[31:0]), .req_masked(req_masked[1:0]), .apb_prdata_net(apb_prdata_net_Z[31:0]), .apb_d_resp_rd_data_net(apb_d_resp_rd_data_net[31:0]), .apb_paddr_1(apb_paddr[1]), .apb_paddr_0(apb_paddr[0]), .apb_paddr_20(apb_paddr[20]), .apb_paddr_19(apb_paddr[19]), .apb_paddr_18(apb_paddr[18]), .apb_paddr_17(apb_paddr[17]), .apb_paddr_16(apb_paddr[16]), .apb_paddr_11(apb_paddr[11]), .apb_paddr_10(apb_paddr[10]), .apb_paddr_31(apb_paddr[31]), .apb_paddr_30(apb_paddr[30]), .apb_paddr_29(apb_paddr[29]), .apb_paddr_28(apb_paddr[28]), .apb_paddr_27(apb_paddr[27]), .apb_paddr_26(apb_paddr[26]), .apb_paddr_25(apb_paddr[25]), .apb_paddr_24(apb_paddr[24]), .apb_paddr_23(apb_paddr[23]), .apb_paddr_22(apb_paddr[22]), .apb_paddr_21(apb_paddr[21]), .paddr_0(paddr_1z_0), .CoreAPB3_0_0_APBmslave0_PADDR_3(CoreAPB3_0_0_APBmslave0_PADDR_3), .CoreAPB3_0_0_APBmslave0_PADDR_1(CoreAPB3_0_0_APBmslave0_PADDR_1), .CoreAPB3_0_0_APBmslave0_PADDR_0(CoreAPB3_0_0_APBmslave0_PADDR_0), .CoreAPB3_0_0_APBmslave0_PADDR_25(CoreAPB3_0_0_APBmslave0_PADDR_25), .CoreAPB3_0_0_APBmslave0_PADDR_24(CoreAPB3_0_0_APBmslave0_PADDR_24), .CoreAPB3_0_0_APBmslave0_PADDR_23(CoreAPB3_0_0_APBmslave0_PADDR_23), .CoreAPB3_0_0_APBmslave0_PADDR_22(CoreAPB3_0_0_APBmslave0_PADDR_22), .CoreAPB3_0_0_APBmslave0_PADDR_7(CoreAPB3_0_0_APBmslave0_PADDR_7), .CoreAPB3_0_0_APBmslave0_PADDR_6(CoreAPB3_0_0_APBmslave0_PADDR_6), .CoreAPB3_0_0_APBmslave0_PADDR_5(CoreAPB3_0_0_APBmslave0_PADDR_5), .CoreAPB3_0_0_APBmslave0_PWDATA(CoreAPB3_0_0_APBmslave0_PWDATA[31:1]), .PADDR_1z_0(PADDR_0), .wrdata_0(wrdata_0), .N_64(N_64), .apb_i_req_ready_net_tz(apb_i_req_ready_net_tz), .N_1154(N_1154), .apb_i_req_valid_net_3(apb_i_req_valid_net_3), .N_1157(N_1157), .apb_d_req_valid_3_0(apb_d_req_valid_3_0), .cpu_i_req_is_tcm0_5_0(cpu_i_req_is_tcm0_5_0), .gen_m3(gen_m3), .un24_cpu_i_req_is_apb_17(un24_cpu_i_req_is_apb_17), .un24_cpu_i_req_is_apb_1(un24_cpu_i_req_is_apb_1), .un24_cpu_i_req_is_apb_19_11(un24_cpu_i_req_is_apb_19_11), .cpu_d_req_is_apb(cpu_d_req_is_apb), .cpu_d_req_valid_mux_1(cpu_d_req_valid_mux_1), .ifu_N_11(ifu_N_11), .ifu_emi_req_valid_i_0(ifu_emi_req_valid_i_0), .un16_cpu_i_req_is_apb(un16_cpu_i_req_is_apb), .un4_cpu_i_req_is_apb(un4_cpu_i_req_is_apb), .un1_cpu_d_req_ready(un1_cpu_d_req_ready), .Oi0O1(Oi0O1), .iPRDATA_0_sqmuxa(iPRDATA_0_sqmuxa), .un3_apb_int_sel(un3_apb_int_sel), .N_88(N_88), .N_1153(N_1153), .CoreAPB3_0_0_APBmslave0_PENABLE(CoreAPB3_0_0_APBmslave0_PENABLE), .N_1225(N_1225), .MIV_RV32_C0_0_APB_INITIATOR_PSELx(MIV_RV32_C0_0_APB_INITIATOR_PSELx), .N_1212(N_1212), .N_1411(N_1411), .CoreAPB3_0_0_APBmslave0_PWRITE(CoreAPB3_0_0_APBmslave0_PWRITE), .apb_penable_net(apb_penable_net), .apb_psel_net(apb_psel_net), .req_complete_reg(req_complete_reg), .apb_pslverr_net(apb_pslverr_net), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .subsys_resetn(subsys_resetn_Z), .apb_d_resp_error_net(apb_d_resp_error_net) ); // @48:1469 miv_rv32_subsys_tcm_Z20 \gen_tcm0.u_subsys_TCM_0 ( .hipri_req_ptr_3(hipri_req_ptr[3]), .hipri_req_ptr_0(hipri_req_ptr[0]), .apb_i_req_addr_net(apb_i_req_addr_net[15:2]), .apb_d_req_wr_data_net(apb_d_req_wr_data_net[31:0]), .tcm0_d_resp_rd_data_net(tcm0_d_resp_rd_data_net[31:0]), .apb_d_req_wr_byte_en_net(apb_d_req_wr_byte_en_net[3:0]), .resp_dest_0(resp_dest[1]), .apb_d_req_addr_net(apb_d_req_addr_net[15:2]), .cpu_d_wr_rd_state(cpu_d_wr_rd_state[1:0]), .un1_cpu_d_req_accepted_1_0(un1_cpu_d_req_accepted_1_0), .un1_cpu_d_req_ready(un1_cpu_d_req_ready), .cpu_d_req_ready_1(cpu_d_req_ready_1), .cpu_d_req_is_tcm0(cpu_d_req_is_tcm0), .tcm0_d_req_valid_2(tcm0_d_req_valid_2), .cpu_d_req_valid_mux_1(cpu_d_req_valid_mux_1), .tcm0_d_req_valid_net(tcm0_d_req_valid_net), .tcm0_i_req_ready_net_tz(tcm0_i_req_ready_net_tz), .cpu_m8_0_a3_0_3(cpu_m8_0_a3_0_3), .tcm0_i_req_valid_1(tcm0_i_req_valid_1), .tcm0_i_req_valid_net(tcm0_i_req_valid_net), .tcm0_i_resp_valid_net(tcm0_i_resp_valid_net), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .subsys_resetn(subsys_resetn_Z) ); // @48:2193 miv_rv32_subsys_mtime_irq_1s_1s_100s_1s_33603580_33570820 \gen_mtime.u_mtime_irq ( .apb_paddr_11(apb_paddr[11]), .apb_paddr_31(apb_paddr[31]), .apb_paddr_21(apb_paddr[21]), .apb_paddr_20(apb_paddr[20]), .apb_paddr_19(apb_paddr[19]), .apb_paddr_26(apb_paddr[26]), .apb_paddr_24(apb_paddr[24]), .apb_paddr_23(apb_paddr[23]), .apb_paddr_22(apb_paddr[22]), .apb_paddr_30(apb_paddr[30]), .apb_paddr_29(apb_paddr[29]), .apb_paddr_28(apb_paddr[28]), .apb_paddr_27(apb_paddr[27]), .apb_paddr_25(apb_paddr[25]), .apb_paddr_18(apb_paddr[18]), .apb_paddr_17(apb_paddr[17]), .apb_paddr_16(apb_paddr[16]), .apb_paddr_10(apb_paddr[10]), .apb_paddr_1(apb_paddr[1]), .apb_paddr_0(apb_paddr[0]), .CoreAPB3_0_0_APBmslave0_PADDR_0(CoreAPB3_0_0_APBmslave0_PADDR_0), .CoreAPB3_0_0_APBmslave0_PADDR_7(CoreAPB3_0_0_APBmslave0_PADDR_7), .CoreAPB3_0_0_APBmslave0_PADDR_24(CoreAPB3_0_0_APBmslave0_PADDR_24), .CoreAPB3_0_0_APBmslave0_PADDR_23(CoreAPB3_0_0_APBmslave0_PADDR_23), .CoreAPB3_0_0_APBmslave0_PADDR_5(CoreAPB3_0_0_APBmslave0_PADDR_5), .CoreAPB3_0_0_APBmslave0_PADDR_6(CoreAPB3_0_0_APBmslave0_PADDR_6), .CoreAPB3_0_0_APBmslave0_PADDR_25(CoreAPB3_0_0_APBmslave0_PADDR_25), .CoreAPB3_0_0_APBmslave0_PADDR_22(CoreAPB3_0_0_APBmslave0_PADDR_22), .apb_prdata_int(apb_prdata_int[31:0]), .mtime_count_out(mtime_count_out[63:0]), .wrdata_0(wrdata_0), .CoreAPB3_0_0_APBmslave0_PWDATA(CoreAPB3_0_0_APBmslave0_PWDATA[31:1]), .N_1153(N_1153), .apb_psel_net(apb_psel_net), .un3_apb_int_sel(un3_apb_int_sel), .N_1214(N_1214), .tx_fifo_write_sig14_i_1(tx_fifo_write_sig14_i_1), .N_1411(N_1411), .un1_PADDR_2(un1_PADDR_2), .N_1212(N_1212), .N_1206(N_1206), .CoreAPB3_0_0_APBmslave0_PWRITE(CoreAPB3_0_0_APBmslave0_PWRITE), .N_88(N_88), .N_1225(N_1225), .trace_priv_i(trace_priv_i), .subsys_resetn(subsys_resetn_Z), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .un5_m_timer_irq_cry_63_i(un5_m_timer_irq_cry_63_i), .un5_m_timer_irq_cry_63_1z(un5_m_timer_irq_cry_63) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* miv_rv32_ipcore_Z19 */ module MIV_RV32_C0_MIV_RV32_C0_0_MIV_RV32_Z22 ( io0O1, CoreAPB3_0_0_APBmslave2_PRDATA_m, io0O1_m, PRDATA_0_iv_0, delay_sel_0, currTapState_0, currTapState_7, paddr_0, CoreAPB3_0_0_APBmslave0_PADDR_3, CoreAPB3_0_0_APBmslave0_PADDR_1, CoreAPB3_0_0_APBmslave0_PADDR_0, CoreAPB3_0_0_APBmslave0_PADDR_25, CoreAPB3_0_0_APBmslave0_PADDR_24, CoreAPB3_0_0_APBmslave0_PADDR_23, CoreAPB3_0_0_APBmslave0_PADDR_22, CoreAPB3_0_0_APBmslave0_PADDR_7, CoreAPB3_0_0_APBmslave0_PADDR_6, CoreAPB3_0_0_APBmslave0_PADDR_5, CoreAPB3_0_0_APBmslave0_PWDATA, PADDR_1z_0, wrdata_0, dff, un3_apb_int_sel, CoreAPB3_0_0_APBmslave0_PWRITE_s0, N_10_i, N_8_i, d_m2_e_1_0, PF_CCC_0_0_OUT0_FABCLK_0, COREJTAGDEBUG_C0_0_TGT_TCK_0, shiftIR_ne_0, COREJTAGDEBUG_C0_0_TGT_TCK_0_i, shiftBP_ne_0, shiftDR21, N_974, COREJTAGDEBUG_C0_0_TGT_TMS_0, COREJTAGDEBUG_C0_0_TGT_TDI_0, un1_shiftDR20, Oi0O1, iPRDATA_0_sqmuxa, CoreAPB3_0_0_APBmslave0_PENABLE, MIV_RV32_C0_0_APB_INITIATOR_PSELx, CoreAPB3_0_0_APBmslave0_PWRITE, apb_penable_net, apb_pslverr_net, N_1214, tx_fifo_write_sig14_i_1, un1_PADDR_2, N_1206 ) ; input [31:16] io0O1 ; input [15:8] CoreAPB3_0_0_APBmslave2_PRDATA_m ; input [15:0] io0O1_m ; input [7:0] PRDATA_0_iv_0 ; input delay_sel_0 ; output currTapState_0 ; output currTapState_7 ; output paddr_0 ; output CoreAPB3_0_0_APBmslave0_PADDR_3 ; output CoreAPB3_0_0_APBmslave0_PADDR_1 ; output CoreAPB3_0_0_APBmslave0_PADDR_0 ; output CoreAPB3_0_0_APBmslave0_PADDR_25 ; output CoreAPB3_0_0_APBmslave0_PADDR_24 ; output CoreAPB3_0_0_APBmslave0_PADDR_23 ; output CoreAPB3_0_0_APBmslave0_PADDR_22 ; output CoreAPB3_0_0_APBmslave0_PADDR_7 ; output CoreAPB3_0_0_APBmslave0_PADDR_6 ; output CoreAPB3_0_0_APBmslave0_PADDR_5 ; output [31:1] CoreAPB3_0_0_APBmslave0_PWDATA ; output PADDR_1z_0 ; output wrdata_0 ; input dff ; output un3_apb_int_sel ; input CoreAPB3_0_0_APBmslave0_PWRITE_s0 ; output N_10_i ; output N_8_i ; input d_m2_e_1_0 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input COREJTAGDEBUG_C0_0_TGT_TCK_0 ; output shiftIR_ne_0 ; input COREJTAGDEBUG_C0_0_TGT_TCK_0_i ; output shiftBP_ne_0 ; output shiftDR21 ; output N_974 ; input COREJTAGDEBUG_C0_0_TGT_TMS_0 ; input COREJTAGDEBUG_C0_0_TGT_TDI_0 ; output un1_shiftDR20 ; input Oi0O1 ; input iPRDATA_0_sqmuxa ; output CoreAPB3_0_0_APBmslave0_PENABLE ; output MIV_RV32_C0_0_APB_INITIATOR_PSELx ; output CoreAPB3_0_0_APBmslave0_PWRITE ; output apb_penable_net ; input apb_pslverr_net ; input N_1214 ; input tx_fifo_write_sig14_i_1 ; input un1_PADDR_2 ; input N_1206 ; wire delay_sel_0 ; wire currTapState_0 ; wire currTapState_7 ; wire paddr_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_3 ; wire CoreAPB3_0_0_APBmslave0_PADDR_1 ; wire CoreAPB3_0_0_APBmslave0_PADDR_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_25 ; wire CoreAPB3_0_0_APBmslave0_PADDR_24 ; wire CoreAPB3_0_0_APBmslave0_PADDR_23 ; wire CoreAPB3_0_0_APBmslave0_PADDR_22 ; wire CoreAPB3_0_0_APBmslave0_PADDR_7 ; wire CoreAPB3_0_0_APBmslave0_PADDR_6 ; wire CoreAPB3_0_0_APBmslave0_PADDR_5 ; wire PADDR_1z_0 ; wire wrdata_0 ; wire dff ; wire un3_apb_int_sel ; wire CoreAPB3_0_0_APBmslave0_PWRITE_s0 ; wire N_10_i ; wire N_8_i ; wire d_m2_e_1_0 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire COREJTAGDEBUG_C0_0_TGT_TCK_0 ; wire shiftIR_ne_0 ; wire COREJTAGDEBUG_C0_0_TGT_TCK_0_i ; wire shiftBP_ne_0 ; wire shiftDR21 ; wire N_974 ; wire COREJTAGDEBUG_C0_0_TGT_TMS_0 ; wire COREJTAGDEBUG_C0_0_TGT_TDI_0 ; wire un1_shiftDR20 ; wire Oi0O1 ; wire iPRDATA_0_sqmuxa ; wire CoreAPB3_0_0_APBmslave0_PENABLE ; wire MIV_RV32_C0_0_APB_INITIATOR_PSELx ; wire CoreAPB3_0_0_APBmslave0_PWRITE ; wire apb_penable_net ; wire apb_pslverr_net ; wire N_1214 ; wire tx_fifo_write_sig14_i_1 ; wire un1_PADDR_2 ; wire N_1206 ; wire GND ; wire VCC ; // @51:466 miv_rv32_ipcore_Z19 u_ipcore_0 ( .wrdata_0(wrdata_0), .PADDR_0(PADDR_1z_0), .CoreAPB3_0_0_APBmslave0_PWDATA(CoreAPB3_0_0_APBmslave0_PWDATA[31:1]), .CoreAPB3_0_0_APBmslave0_PADDR_3(CoreAPB3_0_0_APBmslave0_PADDR_3), .CoreAPB3_0_0_APBmslave0_PADDR_1(CoreAPB3_0_0_APBmslave0_PADDR_1), .CoreAPB3_0_0_APBmslave0_PADDR_0(CoreAPB3_0_0_APBmslave0_PADDR_0), .CoreAPB3_0_0_APBmslave0_PADDR_25(CoreAPB3_0_0_APBmslave0_PADDR_25), .CoreAPB3_0_0_APBmslave0_PADDR_24(CoreAPB3_0_0_APBmslave0_PADDR_24), .CoreAPB3_0_0_APBmslave0_PADDR_23(CoreAPB3_0_0_APBmslave0_PADDR_23), .CoreAPB3_0_0_APBmslave0_PADDR_22(CoreAPB3_0_0_APBmslave0_PADDR_22), .CoreAPB3_0_0_APBmslave0_PADDR_7(CoreAPB3_0_0_APBmslave0_PADDR_7), .CoreAPB3_0_0_APBmslave0_PADDR_6(CoreAPB3_0_0_APBmslave0_PADDR_6), .CoreAPB3_0_0_APBmslave0_PADDR_5(CoreAPB3_0_0_APBmslave0_PADDR_5), .paddr_1z_0(paddr_0), .currTapState_0(currTapState_0), .currTapState_7(currTapState_7), .delay_sel_0(delay_sel_0), .PRDATA_0_iv_0(PRDATA_0_iv_0[7:0]), .io0O1_m(io0O1_m[15:0]), .CoreAPB3_0_0_APBmslave2_PRDATA_m(CoreAPB3_0_0_APBmslave2_PRDATA_m[15:8]), .io0O1(io0O1[31:16]), .N_1206(N_1206), .un1_PADDR_2(un1_PADDR_2), .tx_fifo_write_sig14_i_1(tx_fifo_write_sig14_i_1), .N_1214(N_1214), .apb_pslverr_net(apb_pslverr_net), .apb_penable_net(apb_penable_net), .CoreAPB3_0_0_APBmslave0_PWRITE(CoreAPB3_0_0_APBmslave0_PWRITE), .MIV_RV32_C0_0_APB_INITIATOR_PSELx(MIV_RV32_C0_0_APB_INITIATOR_PSELx), .CoreAPB3_0_0_APBmslave0_PENABLE(CoreAPB3_0_0_APBmslave0_PENABLE), .iPRDATA_0_sqmuxa(iPRDATA_0_sqmuxa), .Oi0O1(Oi0O1), .un1_shiftDR20(un1_shiftDR20), .COREJTAGDEBUG_C0_0_TGT_TDI_0(COREJTAGDEBUG_C0_0_TGT_TDI_0), .COREJTAGDEBUG_C0_0_TGT_TMS_0(COREJTAGDEBUG_C0_0_TGT_TMS_0), .N_974(N_974), .shiftDR21(shiftDR21), .shiftBP_ne_0(shiftBP_ne_0), .COREJTAGDEBUG_C0_0_TGT_TCK_0_i(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .shiftIR_ne_0(shiftIR_ne_0), .COREJTAGDEBUG_C0_0_TGT_TCK_0(COREJTAGDEBUG_C0_0_TGT_TCK_0), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .d_m2_e_1_0(d_m2_e_1_0), .N_8_i(N_8_i), .N_10_i(N_10_i), .CoreAPB3_0_0_APBmslave0_PWRITE_s0(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .un3_apb_int_sel(un3_apb_int_sel), .dff(dff) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* MIV_RV32_C0_MIV_RV32_C0_0_MIV_RV32_Z22 */ module MIV_RV32_C0 ( wrdata_0, PADDR_0, CoreAPB3_0_0_APBmslave0_PWDATA, CoreAPB3_0_0_APBmslave0_PADDR_3, CoreAPB3_0_0_APBmslave0_PADDR_1, CoreAPB3_0_0_APBmslave0_PADDR_0, CoreAPB3_0_0_APBmslave0_PADDR_25, CoreAPB3_0_0_APBmslave0_PADDR_24, CoreAPB3_0_0_APBmslave0_PADDR_23, CoreAPB3_0_0_APBmslave0_PADDR_22, CoreAPB3_0_0_APBmslave0_PADDR_7, CoreAPB3_0_0_APBmslave0_PADDR_6, CoreAPB3_0_0_APBmslave0_PADDR_5, paddr_1z_0, currTapState_0, currTapState_7, delay_sel_0, PRDATA_0_iv_0, io0O1_m, CoreAPB3_0_0_APBmslave2_PRDATA_m, io0O1, N_1206, un1_PADDR_2, tx_fifo_write_sig14_i_1, N_1214, apb_pslverr_net, apb_penable_net, CoreAPB3_0_0_APBmslave0_PWRITE, MIV_RV32_C0_0_APB_INITIATOR_PSELx, CoreAPB3_0_0_APBmslave0_PENABLE, iPRDATA_0_sqmuxa, Oi0O1, un1_shiftDR20, COREJTAGDEBUG_C0_0_TGT_TDI_0, COREJTAGDEBUG_C0_0_TGT_TMS_0, N_974, shiftDR21, shiftBP_ne_0, COREJTAGDEBUG_C0_0_TGT_TCK_0_i, shiftIR_ne_0, COREJTAGDEBUG_C0_0_TGT_TCK_0, PF_CCC_0_0_OUT0_FABCLK_0, d_m2_e_1_0, N_8_i, N_10_i, CoreAPB3_0_0_APBmslave0_PWRITE_s0, un3_apb_int_sel, dff ) ; output wrdata_0 ; output PADDR_0 ; output [31:1] CoreAPB3_0_0_APBmslave0_PWDATA ; output CoreAPB3_0_0_APBmslave0_PADDR_3 ; output CoreAPB3_0_0_APBmslave0_PADDR_1 ; output CoreAPB3_0_0_APBmslave0_PADDR_0 ; output CoreAPB3_0_0_APBmslave0_PADDR_25 ; output CoreAPB3_0_0_APBmslave0_PADDR_24 ; output CoreAPB3_0_0_APBmslave0_PADDR_23 ; output CoreAPB3_0_0_APBmslave0_PADDR_22 ; output CoreAPB3_0_0_APBmslave0_PADDR_7 ; output CoreAPB3_0_0_APBmslave0_PADDR_6 ; output CoreAPB3_0_0_APBmslave0_PADDR_5 ; output paddr_1z_0 ; output currTapState_0 ; output currTapState_7 ; input delay_sel_0 ; input [7:0] PRDATA_0_iv_0 ; input [15:0] io0O1_m ; input [15:8] CoreAPB3_0_0_APBmslave2_PRDATA_m ; input [31:16] io0O1 ; input N_1206 ; input un1_PADDR_2 ; input tx_fifo_write_sig14_i_1 ; input N_1214 ; input apb_pslverr_net ; output apb_penable_net ; output CoreAPB3_0_0_APBmslave0_PWRITE ; output MIV_RV32_C0_0_APB_INITIATOR_PSELx ; output CoreAPB3_0_0_APBmslave0_PENABLE ; input iPRDATA_0_sqmuxa ; input Oi0O1 ; output un1_shiftDR20 ; input COREJTAGDEBUG_C0_0_TGT_TDI_0 ; input COREJTAGDEBUG_C0_0_TGT_TMS_0 ; output N_974 ; output shiftDR21 ; output shiftBP_ne_0 ; input COREJTAGDEBUG_C0_0_TGT_TCK_0_i ; output shiftIR_ne_0 ; input COREJTAGDEBUG_C0_0_TGT_TCK_0 ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input d_m2_e_1_0 ; output N_8_i ; output N_10_i ; input CoreAPB3_0_0_APBmslave0_PWRITE_s0 ; output un3_apb_int_sel ; input dff ; wire wrdata_0 ; wire PADDR_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_3 ; wire CoreAPB3_0_0_APBmslave0_PADDR_1 ; wire CoreAPB3_0_0_APBmslave0_PADDR_0 ; wire CoreAPB3_0_0_APBmslave0_PADDR_25 ; wire CoreAPB3_0_0_APBmslave0_PADDR_24 ; wire CoreAPB3_0_0_APBmslave0_PADDR_23 ; wire CoreAPB3_0_0_APBmslave0_PADDR_22 ; wire CoreAPB3_0_0_APBmslave0_PADDR_7 ; wire CoreAPB3_0_0_APBmslave0_PADDR_6 ; wire CoreAPB3_0_0_APBmslave0_PADDR_5 ; wire paddr_1z_0 ; wire currTapState_0 ; wire currTapState_7 ; wire delay_sel_0 ; wire N_1206 ; wire un1_PADDR_2 ; wire tx_fifo_write_sig14_i_1 ; wire N_1214 ; wire apb_pslverr_net ; wire apb_penable_net ; wire CoreAPB3_0_0_APBmslave0_PWRITE ; wire MIV_RV32_C0_0_APB_INITIATOR_PSELx ; wire CoreAPB3_0_0_APBmslave0_PENABLE ; wire iPRDATA_0_sqmuxa ; wire Oi0O1 ; wire un1_shiftDR20 ; wire COREJTAGDEBUG_C0_0_TGT_TDI_0 ; wire COREJTAGDEBUG_C0_0_TGT_TMS_0 ; wire N_974 ; wire shiftDR21 ; wire shiftBP_ne_0 ; wire COREJTAGDEBUG_C0_0_TGT_TCK_0_i ; wire shiftIR_ne_0 ; wire COREJTAGDEBUG_C0_0_TGT_TCK_0 ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire d_m2_e_1_0 ; wire N_8_i ; wire N_10_i ; wire CoreAPB3_0_0_APBmslave0_PWRITE_s0 ; wire un3_apb_int_sel ; wire dff ; wire GND ; wire VCC ; // @52:270 MIV_RV32_C0_MIV_RV32_C0_0_MIV_RV32_Z22 MIV_RV32_C0_0 ( .io0O1(io0O1[31:16]), .CoreAPB3_0_0_APBmslave2_PRDATA_m(CoreAPB3_0_0_APBmslave2_PRDATA_m[15:8]), .io0O1_m(io0O1_m[15:0]), .PRDATA_0_iv_0(PRDATA_0_iv_0[7:0]), .delay_sel_0(delay_sel_0), .currTapState_0(currTapState_0), .currTapState_7(currTapState_7), .paddr_0(paddr_1z_0), .CoreAPB3_0_0_APBmslave0_PADDR_3(CoreAPB3_0_0_APBmslave0_PADDR_3), .CoreAPB3_0_0_APBmslave0_PADDR_1(CoreAPB3_0_0_APBmslave0_PADDR_1), .CoreAPB3_0_0_APBmslave0_PADDR_0(CoreAPB3_0_0_APBmslave0_PADDR_0), .CoreAPB3_0_0_APBmslave0_PADDR_25(CoreAPB3_0_0_APBmslave0_PADDR_25), .CoreAPB3_0_0_APBmslave0_PADDR_24(CoreAPB3_0_0_APBmslave0_PADDR_24), .CoreAPB3_0_0_APBmslave0_PADDR_23(CoreAPB3_0_0_APBmslave0_PADDR_23), .CoreAPB3_0_0_APBmslave0_PADDR_22(CoreAPB3_0_0_APBmslave0_PADDR_22), .CoreAPB3_0_0_APBmslave0_PADDR_7(CoreAPB3_0_0_APBmslave0_PADDR_7), .CoreAPB3_0_0_APBmslave0_PADDR_6(CoreAPB3_0_0_APBmslave0_PADDR_6), .CoreAPB3_0_0_APBmslave0_PADDR_5(CoreAPB3_0_0_APBmslave0_PADDR_5), .CoreAPB3_0_0_APBmslave0_PWDATA(CoreAPB3_0_0_APBmslave0_PWDATA[31:1]), .PADDR_1z_0(PADDR_0), .wrdata_0(wrdata_0), .dff(dff), .un3_apb_int_sel(un3_apb_int_sel), .CoreAPB3_0_0_APBmslave0_PWRITE_s0(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .N_10_i(N_10_i), .N_8_i(N_8_i), .d_m2_e_1_0(d_m2_e_1_0), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .COREJTAGDEBUG_C0_0_TGT_TCK_0(COREJTAGDEBUG_C0_0_TGT_TCK_0), .shiftIR_ne_0(shiftIR_ne_0), .COREJTAGDEBUG_C0_0_TGT_TCK_0_i(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .shiftBP_ne_0(shiftBP_ne_0), .shiftDR21(shiftDR21), .N_974(N_974), .COREJTAGDEBUG_C0_0_TGT_TMS_0(COREJTAGDEBUG_C0_0_TGT_TMS_0), .COREJTAGDEBUG_C0_0_TGT_TDI_0(COREJTAGDEBUG_C0_0_TGT_TDI_0), .un1_shiftDR20(un1_shiftDR20), .Oi0O1(Oi0O1), .iPRDATA_0_sqmuxa(iPRDATA_0_sqmuxa), .CoreAPB3_0_0_APBmslave0_PENABLE(CoreAPB3_0_0_APBmslave0_PENABLE), .MIV_RV32_C0_0_APB_INITIATOR_PSELx(MIV_RV32_C0_0_APB_INITIATOR_PSELx), .CoreAPB3_0_0_APBmslave0_PWRITE(CoreAPB3_0_0_APBmslave0_PWRITE), .apb_penable_net(apb_penable_net), .apb_pslverr_net(apb_pslverr_net), .N_1214(N_1214), .tx_fifo_write_sig14_i_1(tx_fifo_write_sig14_i_1), .un1_PADDR_2(un1_PADDR_2), .N_1206(N_1206) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* MIV_RV32_C0 */ module PF_CCC_0_PF_CCC_0_0_PF_CCC ( REF_CLK_0_c, PF_CCC_0_0_PLL_LOCK_0, un1_PLL_POWERDOWN_B_i, PF_CCC_0_0_OUT0_FABCLK_0 ) ; input REF_CLK_0_c ; output PF_CCC_0_0_PLL_LOCK_0 ; input un1_PLL_POWERDOWN_B_i ; output PF_CCC_0_0_OUT0_FABCLK_0 ; wire REF_CLK_0_c ; wire PF_CCC_0_0_PLL_LOCK_0 ; wire un1_PLL_POWERDOWN_B_i ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire [7:0] SSCG_WAVE_TABLE_ADDR_0; wire [32:0] DRI_RDATA_1; wire pll_inst_0_clkint_0 ; wire VCC ; wire GND ; wire DELAY_LINE_OUT_OF_RANGE_5 ; wire OUT1 ; wire OUT2 ; wire OUT3 ; wire DRI_INTERRUPT_1 ; // @53:18 CLKINT clkint_0 ( .Y(PF_CCC_0_0_OUT0_FABCLK_0), .A(pll_inst_0_clkint_0) ); // @53:39 PLL pll_inst_0 ( .POWERDOWN_N(un1_PLL_POWERDOWN_B_i), .OUT0_EN(VCC), .OUT1_EN(GND), .OUT2_EN(GND), .OUT3_EN(GND), .REF_CLK_SEL(GND), .BYPASS_EN_N(VCC), .LOAD_PHASE_N(VCC), .SSCG_WAVE_TABLE({GND, GND, GND, GND, GND, GND, GND, GND}), .PHASE_DIRECTION(GND), .PHASE_ROTATE(GND), .PHASE_OUT0_SEL(GND), .PHASE_OUT1_SEL(GND), .PHASE_OUT2_SEL(GND), .PHASE_OUT3_SEL(GND), .DELAY_LINE_MOVE(GND), .DELAY_LINE_DIRECTION(GND), .DELAY_LINE_WIDE(GND), .DELAY_LINE_LOAD(VCC), .LOCK(PF_CCC_0_0_PLL_LOCK_0), .SSCG_WAVE_TABLE_ADDR(SSCG_WAVE_TABLE_ADDR_0[7:0]), .DELAY_LINE_OUT_OF_RANGE(DELAY_LINE_OUT_OF_RANGE_5), .REFCLK_SYNC_EN(GND), .REF_CLK_0(REF_CLK_0_c), .REF_CLK_1(GND), .FB_CLK(GND), .OUT0(pll_inst_0_clkint_0), .OUT1(OUT1), .OUT2(OUT2), .OUT3(OUT3), .DRI_CLK(GND), .DRI_CTRL({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND}), .DRI_WDATA({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND}), .DRI_ARST_N(VCC), .DRI_RDATA(DRI_RDATA_1[32:0]), .DRI_INTERRUPT(DRI_INTERRUPT_1) ); defparam pll_inst_0.VCOFREQUENCY=4800; defparam pll_inst_0.DELAY_LINE_SIMULATION_MODE=""; defparam pll_inst_0.DATA_RATE=0.0; defparam pll_inst_0.FORMAL_NAME=""; defparam pll_inst_0.INTERFACE_NAME=""; defparam pll_inst_0.INTERFACE_LEVEL=3'h0; defparam pll_inst_0.SOFTRESET=1'b0; defparam pll_inst_0.SOFT_POWERDOWN_N=1'b1; defparam pll_inst_0.RFDIV_EN=1'b1; defparam pll_inst_0.OUT0_DIV_EN=1'b1; defparam pll_inst_0.OUT1_DIV_EN=1'b0; defparam pll_inst_0.OUT2_DIV_EN=1'b0; defparam pll_inst_0.OUT3_DIV_EN=1'b0; defparam pll_inst_0.SOFT_REF_CLK_SEL=1'b0; defparam pll_inst_0.RESET_ON_LOCK=1'b1; defparam pll_inst_0.BYPASS_CLK_SEL=4'h0; defparam pll_inst_0.BYPASS_GO_EN_N=1'b1; defparam pll_inst_0.BYPASS_PLL=4'h0; defparam pll_inst_0.BYPASS_OUT_DIVIDER=4'h0; defparam pll_inst_0.FF_REQUIRES_LOCK=1'b0; defparam pll_inst_0.FSE_N=1'b0; defparam pll_inst_0.FB_CLK_SEL_0=2'h0; defparam pll_inst_0.FB_CLK_SEL_1=1'b0; defparam pll_inst_0.RFDIV=6'h01; defparam pll_inst_0.FRAC_EN=1'b0; defparam pll_inst_0.FRAC_DAC_EN=1'b0; defparam pll_inst_0.DIV0_RST_DELAY=3'h0; defparam pll_inst_0.DIV0_VAL=7'h0F; defparam pll_inst_0.DIV1_RST_DELAY=3'h0; defparam pll_inst_0.DIV1_VAL=7'h01; defparam pll_inst_0.DIV2_RST_DELAY=3'h0; defparam pll_inst_0.DIV2_VAL=7'h01; defparam pll_inst_0.DIV3_RST_DELAY=3'h0; defparam pll_inst_0.DIV3_VAL=7'h01; defparam pll_inst_0.DIV3_CLK_SEL=1'b0; defparam pll_inst_0.BW_INT_CTRL=2'h0; defparam pll_inst_0.BW_PROP_CTRL=2'h3; defparam pll_inst_0.IREF_EN=1'b1; defparam pll_inst_0.IREF_TOGGLE=1'b0; defparam pll_inst_0.LOCK_CNT=4'h8; defparam pll_inst_0.DESKEW_CAL_CNT=3'h6; defparam pll_inst_0.DESKEW_CAL_EN=1'b1; defparam pll_inst_0.DESKEW_CAL_BYPASS=1'b0; defparam pll_inst_0.SYNC_REF_DIV_EN=1'b0; defparam pll_inst_0.SYNC_REF_DIV_EN_2=1'b0; defparam pll_inst_0.OUT0_PHASE_SEL=3'h0; defparam pll_inst_0.OUT1_PHASE_SEL=3'h0; defparam pll_inst_0.OUT2_PHASE_SEL=3'h0; defparam pll_inst_0.OUT3_PHASE_SEL=3'h0; defparam pll_inst_0.SOFT_LOAD_PHASE_N=1'b1; defparam pll_inst_0.SSM_DIV_VAL=6'h01; defparam pll_inst_0.FB_FRAC_VAL=24'h000000; defparam pll_inst_0.SSM_SPREAD_MODE=1'b0; defparam pll_inst_0.SSM_MODULATION=5'h05; defparam pll_inst_0.FB_INT_VAL=12'h060; defparam pll_inst_0.SSM_EN_N=1'b1; defparam pll_inst_0.SSM_EXT_WAVE_EN=2'h0; defparam pll_inst_0.SSM_EXT_WAVE_MAX_ADDR=8'h00; defparam pll_inst_0.SSM_RANDOM_EN=1'b0; defparam pll_inst_0.SSM_RANDOM_PATTERN_SEL=2'h0; defparam pll_inst_0.CDMUX0_SEL=2'h0; defparam pll_inst_0.CDMUX1_SEL=1'b1; defparam pll_inst_0.CDMUX2_SEL=1'b0; defparam pll_inst_0.CDELAY0_SEL=8'h00; defparam pll_inst_0.CDELAY0_EN=1'b0; defparam pll_inst_0.DRI_EN=1'b1; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* PF_CCC_0_PF_CCC_0_0_PF_CCC */ module PF_CCC_0 ( PF_CCC_0_0_OUT0_FABCLK_0, un1_PLL_POWERDOWN_B_i, PF_CCC_0_0_PLL_LOCK_0, REF_CLK_0_c ) ; output PF_CCC_0_0_OUT0_FABCLK_0 ; input un1_PLL_POWERDOWN_B_i ; output PF_CCC_0_0_PLL_LOCK_0 ; input REF_CLK_0_c ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire un1_PLL_POWERDOWN_B_i ; wire PF_CCC_0_0_PLL_LOCK_0 ; wire REF_CLK_0_c ; wire GND ; wire VCC ; // @54:323 PF_CCC_0_PF_CCC_0_0_PF_CCC PF_CCC_0_0 ( .REF_CLK_0_c(REF_CLK_0_c), .PF_CCC_0_0_PLL_LOCK_0(PF_CCC_0_0_PLL_LOCK_0), .un1_PLL_POWERDOWN_B_i(un1_PLL_POWERDOWN_B_i), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* PF_CCC_0 */ module pf_init_monitor_0_pf_init_monitor_0_0_PF_INIT_MONITOR ( pf_init_monitor_0_0_DEVICE_INIT_DONE, pf_init_monitor_0_0_FABRIC_POR_N, pf_init_monitor_0_0_BANK_6_VDDI_STATUS ) ; output pf_init_monitor_0_0_DEVICE_INIT_DONE ; output pf_init_monitor_0_0_FABRIC_POR_N ; output pf_init_monitor_0_0_BANK_6_VDDI_STATUS ; wire pf_init_monitor_0_0_DEVICE_INIT_DONE ; wire pf_init_monitor_0_0_FABRIC_POR_N ; wire pf_init_monitor_0_0_BANK_6_VDDI_STATUS ; wire [10:7] RFU; wire GPIO_ACTIVE ; wire HSIO_ACTIVE ; wire PCIE_INIT_DONE ; wire XCVR_INIT_DONE ; wire USRAM_INIT_FROM_SNVM_DONE ; wire USRAM_INIT_FROM_UPROM_DONE ; wire USRAM_INIT_FROM_SPI_DONE ; wire SRAM_INIT_FROM_SNVM_DONE ; wire SRAM_INIT_FROM_UPROM_DONE ; wire SRAM_INIT_FROM_SPI_DONE ; wire AUTOCALIB_DONE ; wire SRAM_INIT_DONE ; wire USRAM_INIT_DONE ; wire GND ; wire VCC ; // @73:50 BANKEN I_BEN_6 ( .BANK_EN(pf_init_monitor_0_0_BANK_6_VDDI_STATUS) ); defparam I_BEN_6.BANK_EN_SIMULATION_DELAY=1000; defparam I_BEN_6.BANK_NUMBER="bank6"; // @73:40 INIT I_INIT ( .FABRIC_POR_N(pf_init_monitor_0_0_FABRIC_POR_N), .GPIO_ACTIVE(GPIO_ACTIVE), .HSIO_ACTIVE(HSIO_ACTIVE), .PCIE_INIT_DONE(PCIE_INIT_DONE), .RFU({AUTOCALIB_DONE, RFU[10:7], SRAM_INIT_FROM_SPI_DONE, SRAM_INIT_FROM_UPROM_DONE, SRAM_INIT_FROM_SNVM_DONE, USRAM_INIT_FROM_SPI_DONE, USRAM_INIT_FROM_UPROM_DONE, USRAM_INIT_FROM_SNVM_DONE, XCVR_INIT_DONE}), .SRAM_INIT_DONE(SRAM_INIT_DONE), .UIC_INIT_DONE(pf_init_monitor_0_0_DEVICE_INIT_DONE), .USRAM_INIT_DONE(USRAM_INIT_DONE) ); defparam I_INIT.FABRIC_POR_N_SIMULATION_DELAY=1000; defparam I_INIT.PCIE_INIT_DONE_SIMULATION_DELAY=4000; defparam I_INIT.SRAM_INIT_DONE_SIMULATION_DELAY=6000; defparam I_INIT.UIC_INIT_DONE_SIMULATION_DELAY=7000; defparam I_INIT.USRAM_INIT_DONE_SIMULATION_DELAY=5000; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* pf_init_monitor_0_pf_init_monitor_0_0_PF_INIT_MONITOR */ module pf_init_monitor_0 ( pf_init_monitor_0_0_BANK_6_VDDI_STATUS, pf_init_monitor_0_0_FABRIC_POR_N, pf_init_monitor_0_0_DEVICE_INIT_DONE ) ; output pf_init_monitor_0_0_BANK_6_VDDI_STATUS ; output pf_init_monitor_0_0_FABRIC_POR_N ; output pf_init_monitor_0_0_DEVICE_INIT_DONE ; wire pf_init_monitor_0_0_BANK_6_VDDI_STATUS ; wire pf_init_monitor_0_0_FABRIC_POR_N ; wire pf_init_monitor_0_0_DEVICE_INIT_DONE ; wire GND ; wire VCC ; // @74:196 pf_init_monitor_0_pf_init_monitor_0_0_PF_INIT_MONITOR pf_init_monitor_0_0 ( .pf_init_monitor_0_0_DEVICE_INIT_DONE(pf_init_monitor_0_0_DEVICE_INIT_DONE), .pf_init_monitor_0_0_FABRIC_POR_N(pf_init_monitor_0_0_FABRIC_POR_N), .pf_init_monitor_0_0_BANK_6_VDDI_STATUS(pf_init_monitor_0_0_BANK_6_VDDI_STATUS) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* pf_init_monitor_0 */ module CORECDR4_CNTL_TIP_0_1_2_3_3s_0s_4s_1s_1s_1 ( SELA_LANE_net_0, SELB_LANE_net_0, PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_DELAY_CODE, PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_VALID_CODE, PF_IOD_CDR_RX_P_0_EYE_MONITOR_EARLY_0, PF_IOD_CDR_RX_N_0_EYE_MONITOR_LATE_0, SSDetect_0_stream_start, PF_IOD_CDR_C0_0_RX_CLK_R, cdr_start, CDR4_CNTL_TIP_0_SWITCH_LANE, PF_IOD_CDR_C0_0_RX_CLK_R_i, CLR_FLAGS_N_1z ) ; output [10:0] SELA_LANE_net_0 ; output [10:0] SELB_LANE_net_0 ; input [6:0] PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_DELAY_CODE ; input PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_VALID_CODE ; input PF_IOD_CDR_RX_P_0_EYE_MONITOR_EARLY_0 ; input PF_IOD_CDR_RX_N_0_EYE_MONITOR_LATE_0 ; input SSDetect_0_stream_start ; input PF_IOD_CDR_C0_0_RX_CLK_R ; input cdr_start ; output CDR4_CNTL_TIP_0_SWITCH_LANE ; input PF_IOD_CDR_C0_0_RX_CLK_R_i ; output CLR_FLAGS_N_1z ; wire PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_VALID_CODE ; wire PF_IOD_CDR_RX_P_0_EYE_MONITOR_EARLY_0 ; wire PF_IOD_CDR_RX_N_0_EYE_MONITOR_LATE_0 ; wire SSDetect_0_stream_start ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire cdr_start ; wire CDR4_CNTL_TIP_0_SWITCH_LANE ; wire PF_IOD_CDR_C0_0_RX_CLK_R_i ; wire CLR_FLAGS_N_1z ; wire [6:3] un1_dll_90_code_3_3_wmux_0_Y; wire [6:3] un1_dll_90_code_3_i_0; wire [7:0] fine_sel_Z; wire [0:0] fine_sel_i_0; wire [1:0] rst_n_Z; wire [1:0] tune_st_Z; wire [0:0] tune_st_ns; wire [6:1] dll_90_code_Z; wire [1:0] valid_flag_Z; wire [3:0] cnt_Z; wire [3:0] cnt_9; wire [7:0] fine_sel_19; wire [1:0] coarse_sel_Z; wire [1:0] coarse_sel_RNO_Z; wire [3:1] cdr_ready_reg_Z; wire [10:10] SELB_LANE_9_Z; wire [0:0] un1_cdr_ready_reg_2_Z; wire [1:0] late_flag_Z; wire [1:0] early_flag_Z; wire [10:10] SELA_LANE_10_Z; wire [2:1] un1_dll_90_code_3_i; wire [1:1] un1_dll_90_code_4_3_Z; wire [6:2] un1_dll_90_code_4_3_wmux_0_Y; wire [4:4] un1_dll_90_code_4_3_2_Z; wire [6:1] un90_fine_sel_4; wire [6:3] un1_dll_90_code_3_3_0_co1; wire [6:3] un1_dll_90_code_3_3_wmux_0_S; wire [6:3] un1_dll_90_code_3_3_0_y0; wire [6:3] un1_dll_90_code_3_3_0_co0; wire [6:3] un1_dll_90_code_3_3_0_wmux_S; wire [6:2] un1_dll_90_code_4_3_0_co1; wire [6:2] un1_dll_90_code_4_3_wmux_0_S; wire [6:2] un1_dll_90_code_4_3_0_y0; wire [6:2] un1_dll_90_code_4_3_0_co0; wire [6:2] un1_dll_90_code_4_3_0_wmux_S; wire [0:0] un1_fine_sel_1_sqmuxa_1_Z; wire [4:4] un1_dll_90_code_4_3_1_Z; wire [7:0] fine_sel_19_iv_0_Z; wire [1:1] fine_sel_19_iv_3_1_Z; wire [7:0] fine_sel_19_iv_3_Z; wire [7:0] un68_fine_sel_m; wire [0:0] un1_SWITCH_LANE9_Z; wire [5:0] fine_sel_19_iv_4_Z; wire [2:2] un1_dll_90_code_3_2; wire [2:2] un1_fine_sel_2_m; wire [7:0] fine_sel_19_iv_2_Z; wire [3:3] fine_sel_19_iv_1_Z; wire CLR_FLAGS_N_arst_i ; wire clr_flag_Z ; wire VCC ; wire clr_flag_9 ; wire GND ; wire N_133_i ; wire SWITCH_LANE_RNO_Z ; wire un1_SWITCH_LANE_0_sqmuxa_2_i ; wire N_6295_i ; wire CDR4_CNTL_TIP_0_CDR_READY ; wire SELB_LANE_0_sqmuxa_Z ; wire un1_fine_sel_2_cry_0_Z ; wire un1_fine_sel_2_cry_0_S ; wire un1_fine_sel_2_cry_0_Y ; wire N_137_1_i ; wire fine_sel_2_sqmuxa_Z ; wire N_74 ; wire un1_fine_sel_2_cry_1_Z ; wire un1_fine_sel_2_cry_1_S ; wire un1_fine_sel_2_cry_1_Y ; wire un1_fine_sel_2_cry_2 ; wire un1_fine_sel_2_cry_2_0_S ; wire un1_fine_sel_2_cry_2_0_Y ; wire un1_fine_sel_2_cry_3 ; wire un1_fine_sel_2_cry_3_0_S ; wire un1_fine_sel_2_cry_3_0_Y ; wire un1_fine_sel_2_cry_4 ; wire un1_fine_sel_2_cry_4_0_S ; wire un1_fine_sel_2_cry_4_0_Y ; wire un1_fine_sel_2_cry_5 ; wire un1_fine_sel_2_cry_5_0_S ; wire un1_fine_sel_2_cry_5_0_Y ; wire un1_fine_sel_2_s_7_FCO ; wire un1_fine_sel_2_s_7_S ; wire un1_fine_sel_2_s_7_Y ; wire un1_fine_sel_2_cry_6 ; wire un1_fine_sel_2_cry_6_0_S ; wire un1_fine_sel_2_cry_6_0_Y ; wire un18_fine_sel_cry_0_Z ; wire un18_fine_sel_cry_0_S ; wire un18_fine_sel_cry_0_Y ; wire un18_fine_sel_cry_1_Z ; wire un18_fine_sel_cry_1_S ; wire un18_fine_sel_cry_1_Y ; wire un18_fine_sel_cry_2_Z ; wire un18_fine_sel_cry_2_S ; wire un18_fine_sel_cry_2_Y ; wire un18_fine_sel_cry_3_Z ; wire un18_fine_sel_cry_3_S ; wire un18_fine_sel_cry_3_Y ; wire un18_fine_sel_cry_4_Z ; wire un18_fine_sel_cry_4_S ; wire un18_fine_sel_cry_4_Y ; wire un18_fine_sel_cry_5_Z ; wire un18_fine_sel_cry_5_S ; wire un18_fine_sel_cry_5_Y ; wire un18_fine_sel_5_c3 ; wire un18_fine_sel_s_7_FCO ; wire un18_fine_sel_s_7_S ; wire un18_fine_sel_s_7_Y ; wire un18_fine_sel_cry_6_Z ; wire un18_fine_sel_cry_6_S ; wire un18_fine_sel_cry_6_Y ; wire un41_fine_sel_cry_0_Z ; wire un41_fine_sel_cry_0_S ; wire un41_fine_sel_cry_0_Y ; wire un41_fine_sel_cry_1_Z ; wire un41_fine_sel_cry_1_S ; wire un41_fine_sel_cry_1_Y ; wire un41_fine_sel_cry_2_Z ; wire un41_fine_sel_cry_2_S ; wire un41_fine_sel_cry_2_Y ; wire un41_fine_sel_cry_3_Z ; wire un41_fine_sel_cry_3_S ; wire un41_fine_sel_cry_3_Y ; wire un41_fine_sel_cry_4_Z ; wire un41_fine_sel_cry_4_S ; wire un41_fine_sel_cry_4_Y ; wire un41_fine_sel_5_c2_Z ; wire un41_fine_sel_cry_5_Z ; wire un41_fine_sel_cry_5_S ; wire un41_fine_sel_cry_5_Y ; wire un41_fine_sel_5_c4_Z ; wire un41_fine_sel_s_7_FCO ; wire un41_fine_sel_s_7_S ; wire un41_fine_sel_s_7_Y ; wire un41_fine_sel_cry_6_Z ; wire un41_fine_sel_cry_6_S ; wire un41_fine_sel_cry_6_Y ; wire un68_fine_sel_cry_0_Z ; wire un68_fine_sel_cry_0_S ; wire un68_fine_sel_cry_0_Y ; wire un68_fine_sel_cry_1_Z ; wire un68_fine_sel_cry_1_S ; wire un68_fine_sel_cry_1_Y ; wire un68_fine_sel_cry_2_Z ; wire un68_fine_sel_cry_2_S ; wire un68_fine_sel_cry_2_Y ; wire un68_fine_sel_cry_3_Z ; wire un68_fine_sel_cry_3_S ; wire un68_fine_sel_cry_3_Y ; wire un68_fine_sel_4_c3_Z ; wire un68_fine_sel_cry_4_Z ; wire un68_fine_sel_cry_4_S ; wire un68_fine_sel_cry_4_Y ; wire un68_fine_sel_cry_5_Z ; wire un68_fine_sel_cry_5_S ; wire un68_fine_sel_cry_5_Y ; wire un68_fine_sel_4_c5_Z ; wire un68_fine_sel_s_7_FCO ; wire un68_fine_sel_s_7_S ; wire un68_fine_sel_s_7_Y ; wire un68_fine_sel_cry_6_Z ; wire un68_fine_sel_cry_6_S ; wire un68_fine_sel_cry_6_Y ; wire un90_fine_sel_cry_0_Z ; wire un90_fine_sel_cry_0_S ; wire un90_fine_sel_cry_0_Y ; wire un90_fine_sel_cry_1_Z ; wire un90_fine_sel_cry_1_S ; wire un90_fine_sel_cry_1_Y ; wire un90_fine_sel_cry_2_Z ; wire un90_fine_sel_cry_2_S ; wire un90_fine_sel_cry_2_Y ; wire un90_fine_sel_cry_3_Z ; wire un90_fine_sel_cry_3_S ; wire un90_fine_sel_cry_3_Y ; wire un10_fine_sel_c3 ; wire un90_fine_sel_cry_4_Z ; wire un90_fine_sel_cry_4_S ; wire un90_fine_sel_cry_4_Y ; wire un90_fine_sel_cry_5_Z ; wire un90_fine_sel_cry_5_S ; wire un90_fine_sel_cry_5_Y ; wire un90_fine_sel_s_7_FCO ; wire un90_fine_sel_s_7_S ; wire un90_fine_sel_s_7_Y ; wire un10_fine_sel_c7 ; wire un90_fine_sel_cry_6_Z ; wire un90_fine_sel_cry_6_S ; wire un90_fine_sel_cry_6_Y ; wire un1_dll_90_code_6_cry_0_Z ; wire un1_dll_90_code_6_cry_0_S ; wire un1_dll_90_code_6_cry_0_Y ; wire un1_dll_90_code_6_cry_1_Z ; wire un1_dll_90_code_6_cry_1_S ; wire un1_dll_90_code_6_cry_1_Y ; wire un1_dll_90_code_6_cry_2_Z ; wire un1_dll_90_code_6_cry_2_S ; wire un1_dll_90_code_6_cry_2_Y ; wire un1_dll_90_code_6_cry_3_Z ; wire un1_dll_90_code_6_cry_3_S ; wire un1_dll_90_code_6_cry_3_Y ; wire un1_dll_90_code_6_cry_4_Z ; wire un1_dll_90_code_6_cry_4_S ; wire un1_dll_90_code_6_cry_4_Y ; wire un82_fine_sel_1_c3 ; wire un1_dll_90_code_6_cry_5_Z ; wire un1_dll_90_code_6_cry_5_S ; wire un1_dll_90_code_6_cry_5_Y ; wire un1_dll_90_code_6_cry_6_Z ; wire un1_dll_90_code_6_cry_6_S ; wire un1_dll_90_code_6_cry_6_Y ; wire un1_dll_90_code_6_6 ; wire un1_dll_90_code_6_cry_7_Z ; wire un1_dll_90_code_6_cry_7_S ; wire un1_dll_90_code_6_cry_7_Y ; wire un82_fine_sel_1_c4 ; wire un1_dll_90_code_6_i ; wire un1_dll_90_code_6_cry_8_S ; wire un1_dll_90_code_6_cry_8_Y ; wire un1_dll_90_code_5_cry_0_Z ; wire un1_dll_90_code_5_cry_0_S ; wire un1_dll_90_code_5_cry_0_Y ; wire un1_dll_90_code_5_cry_1_Z ; wire un1_dll_90_code_5_cry_1_S ; wire un1_dll_90_code_5_cry_1_Y ; wire un1_dll_90_code_5_cry_2_Z ; wire un1_dll_90_code_5_cry_2_S ; wire un1_dll_90_code_5_cry_2_Y ; wire un1_dll_90_code_5_cry_3_Z ; wire un1_dll_90_code_5_cry_3_S ; wire un1_dll_90_code_5_cry_3_Y ; wire un1_dll_90_code_5_cry_4_Z ; wire un1_dll_90_code_5_cry_4_S ; wire un1_dll_90_code_5_cry_4_Y ; wire un1_dll_90_code_5_cry_5_Z ; wire un1_dll_90_code_5_cry_5_S ; wire un1_dll_90_code_5_cry_5_Y ; wire un1_dll_90_code_5_cry_6_Z ; wire un1_dll_90_code_5_cry_6_S ; wire un1_dll_90_code_5_cry_6_Y ; wire un1_dll_90_code_5_cry_7_Z ; wire un1_dll_90_code_5_cry_7_S ; wire un1_dll_90_code_5_cry_7_Y ; wire un1_dll_90_code_5_i ; wire un1_dll_90_code_5_cry_8_S ; wire un1_dll_90_code_5_cry_8_Y ; wire un1_dll_90_code_1_axbxc6_Z ; wire un1_dll_90_code_2_axbxc6_Z ; wire N_195 ; wire un1_dll_90_code_1_axbxc5_Z ; wire un1_dll_90_code_2_axbxc5_Z ; wire N_194 ; wire un1_dll_90_code_1_axbxc4_Z ; wire un1_dll_90_code_2_axbxc4_Z ; wire N_193 ; wire un1_dll_90_code_1_axbxc3_Z ; wire un1_dll_90_code_2_axbxc3_Z ; wire N_192 ; wire un1_dll_90_code_1_axbxc2_Z ; wire un1_dll_90_code_2_axbxc2_Z ; wire fine_sel_1_sqmuxa_1_Z ; wire un1_coarse_sel_0_sqmuxa_0_Z ; wire coarse_sel_2_sqmuxa_Z ; wire fine_sel_1_sqmuxa_2_Z ; wire N_93_3 ; wire un1_tune_st_1_sqmuxa_i_o2_0_Z ; wire N_67 ; wire un1_dll_90_code_1_c4 ; wire N_134 ; wire fine_sel_2_sqmuxa_1_Z ; wire fine_sel_3_sqmuxa_Z ; wire un1_fine_sel_2_sqmuxa_Z ; wire N_137_1 ; wire N_133_i_1 ; wire un1_cdr_ready_reg_1_0_Z ; wire un1_dll_90_code_6_2 ; wire un1_fine_sel_i_2 ; wire un1_fine_sel_1lt7 ; wire N_91_2 ; wire clr_flag_9_0_a2_Z ; wire CO1 ; wire N_48 ; wire tune_st_11_d ; wire SWITCH_LANE9_0_Z ; wire un1_dll_90_code_2_ac0_7_a0_Z ; wire un1_fine_sel_i_2_0 ; wire N_97 ; wire un1_dll_90_code_2_c2_Z ; wire un1_dll_90_code_6_3 ; wire un1_fine_sel_i ; wire SWITCH_LANE17_Z ; wire un1_dll_90_code_6_4 ; wire fine_sel_0_sqmuxa ; wire un1_fine_sel_1_i ; wire fine_sel_0_sqmuxa_1_Z ; wire fine_sel_0_sqmuxa_2_Z ; wire clr_flag_1_sqmuxa_2 ; wire un10_fine_sel_c4 ; wire un1_dll_90_code_6_5 ; wire un1_SWITCH_LANE_0_sqmuxa_2_0_0_Z ; wire N_75 ; wire un1_coarse_sel_0_sqmuxa_Z ; wire N_92_i ; wire CO1_0 ; wire N_9 ; wire N_8 ; wire N_7 ; wire N_6 ; CFG1 un18_fine_sel_cry_6_RNO ( .A(un1_dll_90_code_3_3_wmux_0_Y[6]), .Y(un1_dll_90_code_3_i_0[6]) ); defparam un18_fine_sel_cry_6_RNO.INIT=2'h1; CFG1 \un1_dll_90_code_3_3_wmux_0_RNIVNTG1[5] ( .A(un1_dll_90_code_3_3_wmux_0_Y[5]), .Y(un1_dll_90_code_3_i_0[5]) ); defparam \un1_dll_90_code_3_3_wmux_0_RNIVNTG1[5] .INIT=2'h1; CFG1 \fine_sel_RNIBS411[0] ( .A(fine_sel_Z[0]), .Y(fine_sel_i_0[0]) ); defparam \fine_sel_RNIBS411[0] .INIT=2'h1; CFG1 \un1_dll_90_code_3_3_wmux_0_RNITLTG1[3] ( .A(un1_dll_90_code_3_3_wmux_0_Y[3]), .Y(un1_dll_90_code_3_i_0[3]) ); defparam \un1_dll_90_code_3_3_wmux_0_RNITLTG1[3] .INIT=2'h1; CFG1 \un1_dll_90_code_3_3_wmux_0_RNIUMTG1[4] ( .A(un1_dll_90_code_3_3_wmux_0_Y[4]), .Y(un1_dll_90_code_3_i_0[4]) ); defparam \un1_dll_90_code_3_3_wmux_0_RNIUMTG1[4] .INIT=2'h1; CFG1 CLR_FLAGS_N_RNIOF22 ( .A(CLR_FLAGS_N_1z), .Y(CLR_FLAGS_N_arst_i) ); defparam CLR_FLAGS_N_RNIOF22.INIT=2'h1; // @55:117 SLE clr_flag ( .Q(clr_flag_Z), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R_i), .D(clr_flag_9), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:117 SLE \tune_st[1] ( .Q(tune_st_Z[1]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R_i), .D(N_133_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:117 SLE \tune_st[0] ( .Q(tune_st_Z[0]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R_i), .D(tune_st_ns[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:117 SLE SWITCH_LANE ( .Q(CDR4_CNTL_TIP_0_SWITCH_LANE), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R_i), .D(SWITCH_LANE_RNO_Z), .EN(un1_SWITCH_LANE_0_sqmuxa_2_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:83 SLE \dll_90_code[4] ( .Q(dll_90_code_Z[4]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R_i), .D(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_DELAY_CODE[4]), .EN(valid_flag_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:83 SLE \dll_90_code[3] ( .Q(dll_90_code_Z[3]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R_i), .D(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_DELAY_CODE[3]), .EN(valid_flag_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:83 SLE \dll_90_code[2] ( .Q(dll_90_code_Z[2]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R_i), .D(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_DELAY_CODE[2]), .EN(valid_flag_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:83 SLE \dll_90_code[1] ( .Q(dll_90_code_Z[1]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R_i), .D(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_DELAY_CODE[1]), .EN(valid_flag_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:83 SLE \dll_90_code[0] ( .Q(N_6295_i), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R_i), .D(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_DELAY_CODE[0]), .EN(valid_flag_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:63 SLE \rst_n[1] ( .Q(rst_n_Z[1]), .ADn(VCC), .ALn(cdr_start), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(VCC), .EN(SSDetect_0_stream_start), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:63 SLE \rst_n[0] ( .Q(rst_n_Z[0]), .ADn(VCC), .ALn(cdr_start), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(rst_n_Z[1]), .EN(SSDetect_0_stream_start), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:117 SLE \cnt[2] ( .Q(cnt_Z[2]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R_i), .D(cnt_9[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:117 SLE \cnt[1] ( .Q(cnt_Z[1]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R_i), .D(cnt_9[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:117 SLE \cnt[0] ( .Q(cnt_Z[0]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R_i), .D(cnt_9[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:117 SLE \fine_sel[7] ( .Q(fine_sel_Z[7]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R_i), .D(fine_sel_19[7]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:117 SLE \fine_sel[6] ( .Q(fine_sel_Z[6]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R_i), .D(fine_sel_19[6]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:117 SLE \fine_sel[5] ( .Q(fine_sel_Z[5]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R_i), .D(fine_sel_19[5]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:117 SLE \fine_sel[4] ( .Q(fine_sel_Z[4]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R_i), .D(fine_sel_19[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:117 SLE \fine_sel[3] ( .Q(fine_sel_Z[3]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R_i), .D(fine_sel_19[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:117 SLE \fine_sel[2] ( .Q(fine_sel_Z[2]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R_i), .D(fine_sel_19[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:117 SLE \fine_sel[1] ( .Q(fine_sel_Z[1]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R_i), .D(fine_sel_19[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:117 SLE \fine_sel[0] ( .Q(fine_sel_Z[0]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R_i), .D(fine_sel_19[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:117 SLE \coarse_sel[1] ( .Q(coarse_sel_Z[1]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R_i), .D(coarse_sel_RNO_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:117 SLE \coarse_sel[0] ( .Q(coarse_sel_Z[0]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R_i), .D(coarse_sel_RNO_Z[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:83 SLE \dll_90_code[6] ( .Q(dll_90_code_Z[6]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R_i), .D(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_DELAY_CODE[6]), .EN(valid_flag_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:83 SLE \dll_90_code[5] ( .Q(dll_90_code_Z[5]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R_i), .D(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_DELAY_CODE[5]), .EN(valid_flag_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:83 SLE \cdr_ready_reg[3] ( .Q(cdr_ready_reg_Z[3]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R_i), .D(VCC), .EN(SELA_LANE_net_0[10]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:83 SLE \cdr_ready_reg[2] ( .Q(cdr_ready_reg_Z[2]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R_i), .D(cdr_ready_reg_Z[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:83 SLE \cdr_ready_reg[1] ( .Q(cdr_ready_reg_Z[1]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R_i), .D(cdr_ready_reg_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:83 SLE \cdr_ready_reg[0] ( .Q(CDR4_CNTL_TIP_0_CDR_READY), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R_i), .D(cdr_ready_reg_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:117 SLE \cnt[3] ( .Q(cnt_Z[3]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R_i), .D(cnt_9[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:98 SLE \SELB_LANE[10] ( .Q(SELB_LANE_net_0[10]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(SELB_LANE_9_Z[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:98 SLE \SELB_LANE[9] ( .Q(SELB_LANE_net_0[9]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(coarse_sel_Z[1]), .EN(SELB_LANE_0_sqmuxa_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:98 SLE \SELB_LANE[8] ( .Q(SELB_LANE_net_0[8]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(coarse_sel_Z[0]), .EN(SELB_LANE_0_sqmuxa_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:98 SLE \SELB_LANE[7] ( .Q(SELB_LANE_net_0[7]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(fine_sel_Z[7]), .EN(SELB_LANE_0_sqmuxa_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:98 SLE \SELB_LANE[6] ( .Q(SELB_LANE_net_0[6]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(fine_sel_Z[6]), .EN(SELB_LANE_0_sqmuxa_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:98 SLE \SELB_LANE[5] ( .Q(SELB_LANE_net_0[5]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(fine_sel_Z[5]), .EN(SELB_LANE_0_sqmuxa_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:98 SLE \SELB_LANE[4] ( .Q(SELB_LANE_net_0[4]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(fine_sel_Z[4]), .EN(SELB_LANE_0_sqmuxa_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:98 SLE \SELB_LANE[3] ( .Q(SELB_LANE_net_0[3]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(fine_sel_Z[3]), .EN(SELB_LANE_0_sqmuxa_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:98 SLE \SELB_LANE[2] ( .Q(SELB_LANE_net_0[2]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(fine_sel_Z[2]), .EN(SELB_LANE_0_sqmuxa_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:98 SLE \SELB_LANE[1] ( .Q(SELB_LANE_net_0[1]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(fine_sel_Z[1]), .EN(SELB_LANE_0_sqmuxa_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:98 SLE \SELB_LANE[0] ( .Q(SELB_LANE_net_0[0]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(fine_sel_Z[0]), .EN(SELB_LANE_0_sqmuxa_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:98 SLE \SELA_LANE[8] ( .Q(SELA_LANE_net_0[8]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(coarse_sel_Z[0]), .EN(un1_cdr_ready_reg_2_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:98 SLE \SELA_LANE[7] ( .Q(SELA_LANE_net_0[7]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(fine_sel_Z[7]), .EN(un1_cdr_ready_reg_2_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:98 SLE \SELA_LANE[6] ( .Q(SELA_LANE_net_0[6]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(fine_sel_Z[6]), .EN(un1_cdr_ready_reg_2_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:98 SLE \SELA_LANE[5] ( .Q(SELA_LANE_net_0[5]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(fine_sel_Z[5]), .EN(un1_cdr_ready_reg_2_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:98 SLE \SELA_LANE[4] ( .Q(SELA_LANE_net_0[4]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(fine_sel_Z[4]), .EN(un1_cdr_ready_reg_2_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:98 SLE \SELA_LANE[3] ( .Q(SELA_LANE_net_0[3]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(fine_sel_Z[3]), .EN(un1_cdr_ready_reg_2_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:98 SLE \SELA_LANE[2] ( .Q(SELA_LANE_net_0[2]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(fine_sel_Z[2]), .EN(un1_cdr_ready_reg_2_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:98 SLE \SELA_LANE[1] ( .Q(SELA_LANE_net_0[1]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(fine_sel_Z[1]), .EN(un1_cdr_ready_reg_2_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:98 SLE \SELA_LANE[0] ( .Q(SELA_LANE_net_0[0]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(fine_sel_Z[0]), .EN(un1_cdr_ready_reg_2_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:68 SLE \late_flag[1] ( .Q(late_flag_Z[1]), .ADn(VCC), .ALn(CLR_FLAGS_N_arst_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R_i), .D(PF_IOD_CDR_RX_N_0_EYE_MONITOR_LATE_0), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:68 SLE \late_flag[0] ( .Q(late_flag_Z[0]), .ADn(VCC), .ALn(CLR_FLAGS_N_arst_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R_i), .D(late_flag_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:68 SLE \early_flag[1] ( .Q(early_flag_Z[1]), .ADn(VCC), .ALn(CLR_FLAGS_N_arst_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R_i), .D(PF_IOD_CDR_RX_P_0_EYE_MONITOR_EARLY_0), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:68 SLE \early_flag[0] ( .Q(early_flag_Z[0]), .ADn(VCC), .ALn(CLR_FLAGS_N_arst_i), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R_i), .D(early_flag_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:83 SLE \valid_flag[1] ( .Q(valid_flag_Z[1]), .ADn(GND), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R_i), .D(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_VALID_CODE), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:83 SLE \valid_flag[0] ( .Q(valid_flag_Z[0]), .ADn(GND), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R_i), .D(valid_flag_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:98 SLE \SELA_LANE[10] ( .Q(SELA_LANE_net_0[10]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(SELA_LANE_10_Z[10]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:98 SLE \SELA_LANE[9] ( .Q(SELA_LANE_net_0[9]), .ADn(VCC), .ALn(rst_n_Z[0]), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(coarse_sel_Z[1]), .EN(un1_cdr_ready_reg_2_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @55:126 ARI1 un1_fine_sel_2_cry_0 ( .FCO(un1_fine_sel_2_cry_0_Z), .S(un1_fine_sel_2_cry_0_S), .Y(un1_fine_sel_2_cry_0_Y), .B(fine_sel_Z[0]), .C(N_137_1_i), .D(fine_sel_2_sqmuxa_Z), .A(N_74), .FCI(GND) ); defparam un1_fine_sel_2_cry_0.INIT=20'h5A6AA; // @55:126 ARI1 un1_fine_sel_2_cry_1 ( .FCO(un1_fine_sel_2_cry_1_Z), .S(un1_fine_sel_2_cry_1_S), .Y(un1_fine_sel_2_cry_1_Y), .B(fine_sel_2_sqmuxa_Z), .C(GND), .D(GND), .A(fine_sel_Z[1]), .FCI(un1_fine_sel_2_cry_0_Z) ); defparam un1_fine_sel_2_cry_1.INIT=20'h555AA; // @55:126 ARI1 un1_fine_sel_2_cry_2_0 ( .FCO(un1_fine_sel_2_cry_2), .S(un1_fine_sel_2_cry_2_0_S), .Y(un1_fine_sel_2_cry_2_0_Y), .B(early_flag_Z[0]), .C(late_flag_Z[0]), .D(fine_sel_Z[2]), .A(N_74), .FCI(un1_fine_sel_2_cry_1_Z) ); defparam un1_fine_sel_2_cry_2_0.INIT=20'h51EF0; // @55:126 ARI1 un1_fine_sel_2_cry_3_0 ( .FCO(un1_fine_sel_2_cry_3), .S(un1_fine_sel_2_cry_3_0_S), .Y(un1_fine_sel_2_cry_3_0_Y), .B(early_flag_Z[0]), .C(late_flag_Z[0]), .D(fine_sel_Z[3]), .A(N_74), .FCI(un1_fine_sel_2_cry_2) ); defparam un1_fine_sel_2_cry_3_0.INIT=20'h51EF0; // @55:126 ARI1 un1_fine_sel_2_cry_4_0 ( .FCO(un1_fine_sel_2_cry_4), .S(un1_fine_sel_2_cry_4_0_S), .Y(un1_fine_sel_2_cry_4_0_Y), .B(early_flag_Z[0]), .C(late_flag_Z[0]), .D(fine_sel_Z[4]), .A(N_74), .FCI(un1_fine_sel_2_cry_3) ); defparam un1_fine_sel_2_cry_4_0.INIT=20'h51EF0; // @55:126 ARI1 un1_fine_sel_2_cry_5_0 ( .FCO(un1_fine_sel_2_cry_5), .S(un1_fine_sel_2_cry_5_0_S), .Y(un1_fine_sel_2_cry_5_0_Y), .B(early_flag_Z[0]), .C(late_flag_Z[0]), .D(fine_sel_Z[5]), .A(N_74), .FCI(un1_fine_sel_2_cry_4) ); defparam un1_fine_sel_2_cry_5_0.INIT=20'h51EF0; // @55:126 ARI1 un1_fine_sel_2_s_7 ( .FCO(un1_fine_sel_2_s_7_FCO), .S(un1_fine_sel_2_s_7_S), .Y(un1_fine_sel_2_s_7_Y), .B(N_74), .C(N_137_1_i), .D(fine_sel_Z[7]), .A(VCC), .FCI(un1_fine_sel_2_cry_6) ); defparam un1_fine_sel_2_s_7.INIT=20'h47800; // @55:126 ARI1 un1_fine_sel_2_cry_6_0 ( .FCO(un1_fine_sel_2_cry_6), .S(un1_fine_sel_2_cry_6_0_S), .Y(un1_fine_sel_2_cry_6_0_Y), .B(early_flag_Z[0]), .C(late_flag_Z[0]), .D(fine_sel_Z[6]), .A(N_74), .FCI(un1_fine_sel_2_cry_5) ); defparam un1_fine_sel_2_cry_6_0.INIT=20'h51EF0; // @55:201 ARI1 un18_fine_sel_cry_0 ( .FCO(un18_fine_sel_cry_0_Z), .S(un18_fine_sel_cry_0_S), .Y(un18_fine_sel_cry_0_Y), .B(N_6295_i), .C(coarse_sel_Z[1]), .D(GND), .A(fine_sel_Z[0]), .FCI(GND) ); defparam un18_fine_sel_cry_0.INIT=20'h56699; // @55:201 ARI1 un18_fine_sel_cry_1 ( .FCO(un18_fine_sel_cry_1_Z), .S(un18_fine_sel_cry_1_S), .Y(un18_fine_sel_cry_1_Y), .B(un1_dll_90_code_3_i[1]), .C(GND), .D(GND), .A(fine_sel_Z[1]), .FCI(un18_fine_sel_cry_0_Z) ); defparam un18_fine_sel_cry_1.INIT=20'h555AA; // @55:201 ARI1 un18_fine_sel_cry_2 ( .FCO(un18_fine_sel_cry_2_Z), .S(un18_fine_sel_cry_2_S), .Y(un18_fine_sel_cry_2_Y), .B(fine_sel_Z[2]), .C(GND), .D(GND), .A(un1_dll_90_code_3_i[2]), .FCI(un18_fine_sel_cry_1_Z) ); defparam un18_fine_sel_cry_2.INIT=20'h5AA55; // @55:201 ARI1 un18_fine_sel_cry_3 ( .FCO(un18_fine_sel_cry_3_Z), .S(un18_fine_sel_cry_3_S), .Y(un18_fine_sel_cry_3_Y), .B(fine_sel_Z[2]), .C(fine_sel_Z[3]), .D(GND), .A(un1_dll_90_code_3_i_0[3]), .FCI(un18_fine_sel_cry_2_Z) ); defparam un18_fine_sel_cry_3.INIT=20'h59966; // @55:201 ARI1 un18_fine_sel_cry_4 ( .FCO(un18_fine_sel_cry_4_Z), .S(un18_fine_sel_cry_4_S), .Y(un18_fine_sel_cry_4_Y), .B(fine_sel_Z[2]), .C(fine_sel_Z[3]), .D(fine_sel_Z[4]), .A(un1_dll_90_code_3_i_0[4]), .FCI(un18_fine_sel_cry_3_Z) ); defparam un18_fine_sel_cry_4.INIT=20'h58778; // @55:201 ARI1 un18_fine_sel_cry_5 ( .FCO(un18_fine_sel_cry_5_Z), .S(un18_fine_sel_cry_5_S), .Y(un18_fine_sel_cry_5_Y), .B(fine_sel_Z[5]), .C(un18_fine_sel_5_c3), .D(GND), .A(un1_dll_90_code_3_i_0[5]), .FCI(un18_fine_sel_cry_4_Z) ); defparam un18_fine_sel_cry_5.INIT=20'h59966; // @55:201 ARI1 un18_fine_sel_s_7 ( .FCO(un18_fine_sel_s_7_FCO), .S(un18_fine_sel_s_7_S), .Y(un18_fine_sel_s_7_Y), .B(fine_sel_Z[5]), .C(fine_sel_Z[6]), .D(fine_sel_Z[7]), .A(un18_fine_sel_5_c3), .FCI(un18_fine_sel_cry_6_Z) ); defparam un18_fine_sel_s_7.INIT=20'h4870F; // @55:201 ARI1 un18_fine_sel_cry_6 ( .FCO(un18_fine_sel_cry_6_Z), .S(un18_fine_sel_cry_6_S), .Y(un18_fine_sel_cry_6_Y), .B(fine_sel_Z[5]), .C(fine_sel_Z[6]), .D(un18_fine_sel_5_c3), .A(un1_dll_90_code_3_i_0[6]), .FCI(un18_fine_sel_cry_5_Z) ); defparam un18_fine_sel_cry_6.INIT=20'h5936C; // @55:212 ARI1 un41_fine_sel_cry_0 ( .FCO(un41_fine_sel_cry_0_Z), .S(un41_fine_sel_cry_0_S), .Y(un41_fine_sel_cry_0_Y), .B(N_6295_i), .C(coarse_sel_Z[0]), .D(coarse_sel_Z[1]), .A(fine_sel_Z[0]), .FCI(GND) ); defparam un41_fine_sel_cry_0.INIT=20'h59669; // @55:212 ARI1 un41_fine_sel_cry_1 ( .FCO(un41_fine_sel_cry_1_Z), .S(un41_fine_sel_cry_1_S), .Y(un41_fine_sel_cry_1_Y), .B(fine_sel_Z[1]), .C(GND), .D(GND), .A(un1_dll_90_code_4_3_Z[1]), .FCI(un41_fine_sel_cry_0_Z) ); defparam un41_fine_sel_cry_1.INIT=20'h5AA55; // @55:212 ARI1 un41_fine_sel_cry_2 ( .FCO(un41_fine_sel_cry_2_Z), .S(un41_fine_sel_cry_2_S), .Y(un41_fine_sel_cry_2_Y), .B(fine_sel_Z[1]), .C(fine_sel_Z[2]), .D(GND), .A(un1_dll_90_code_4_3_wmux_0_Y[2]), .FCI(un41_fine_sel_cry_1_Z) ); defparam un41_fine_sel_cry_2.INIT=20'h56699; // @55:212 ARI1 un41_fine_sel_cry_3 ( .FCO(un41_fine_sel_cry_3_Z), .S(un41_fine_sel_cry_3_S), .Y(un41_fine_sel_cry_3_Y), .B(fine_sel_Z[3]), .C(fine_sel_Z[1]), .D(fine_sel_Z[2]), .A(un1_dll_90_code_4_3_wmux_0_Y[3]), .FCI(un41_fine_sel_cry_2_Z) ); defparam un41_fine_sel_cry_3.INIT=20'h556A9; // @55:212 ARI1 un41_fine_sel_cry_4 ( .FCO(un41_fine_sel_cry_4_Z), .S(un41_fine_sel_cry_4_S), .Y(un41_fine_sel_cry_4_Y), .B(fine_sel_Z[3]), .C(fine_sel_Z[4]), .D(un41_fine_sel_5_c2_Z), .A(un1_dll_90_code_4_3_2_Z[4]), .FCI(un41_fine_sel_cry_3_Z) ); defparam un41_fine_sel_cry_4.INIT=20'h536C9; // @55:212 ARI1 un41_fine_sel_cry_5 ( .FCO(un41_fine_sel_cry_5_Z), .S(un41_fine_sel_cry_5_S), .Y(un41_fine_sel_cry_5_Y), .B(fine_sel_Z[5]), .C(un41_fine_sel_5_c4_Z), .D(GND), .A(un1_dll_90_code_4_3_wmux_0_Y[5]), .FCI(un41_fine_sel_cry_4_Z) ); defparam un41_fine_sel_cry_5.INIT=20'h56699; // @55:212 ARI1 un41_fine_sel_s_7 ( .FCO(un41_fine_sel_s_7_FCO), .S(un41_fine_sel_s_7_S), .Y(un41_fine_sel_s_7_Y), .B(fine_sel_Z[5]), .C(fine_sel_Z[6]), .D(fine_sel_Z[7]), .A(un41_fine_sel_5_c4_Z), .FCI(un41_fine_sel_cry_6_Z) ); defparam un41_fine_sel_s_7.INIT=20'h4F0E1; // @55:212 ARI1 un41_fine_sel_cry_6 ( .FCO(un41_fine_sel_cry_6_Z), .S(un41_fine_sel_cry_6_S), .Y(un41_fine_sel_cry_6_Y), .B(fine_sel_Z[5]), .C(fine_sel_Z[6]), .D(un41_fine_sel_5_c4_Z), .A(un1_dll_90_code_4_3_wmux_0_Y[6]), .FCI(un41_fine_sel_cry_5_Z) ); defparam un41_fine_sel_cry_6.INIT=20'h536C9; // @55:226 ARI1 un68_fine_sel_cry_0 ( .FCO(un68_fine_sel_cry_0_Z), .S(un68_fine_sel_cry_0_S), .Y(un68_fine_sel_cry_0_Y), .B(N_6295_i), .C(coarse_sel_Z[0]), .D(coarse_sel_Z[1]), .A(fine_sel_i_0[0]), .FCI(GND) ); defparam un68_fine_sel_cry_0.INIT=20'h59669; // @55:226 ARI1 un68_fine_sel_cry_1 ( .FCO(un68_fine_sel_cry_1_Z), .S(un68_fine_sel_cry_1_S), .Y(un68_fine_sel_cry_1_Y), .B(fine_sel_Z[0]), .C(fine_sel_Z[1]), .D(GND), .A(un1_dll_90_code_4_3_Z[1]), .FCI(un68_fine_sel_cry_0_Z) ); defparam un68_fine_sel_cry_1.INIT=20'h59966; // @55:226 ARI1 un68_fine_sel_cry_2 ( .FCO(un68_fine_sel_cry_2_Z), .S(un68_fine_sel_cry_2_S), .Y(un68_fine_sel_cry_2_Y), .B(fine_sel_Z[0]), .C(fine_sel_Z[1]), .D(fine_sel_Z[2]), .A(un1_dll_90_code_4_3_wmux_0_Y[2]), .FCI(un68_fine_sel_cry_1_Z) ); defparam un68_fine_sel_cry_2.INIT=20'h57887; // @55:226 ARI1 un68_fine_sel_cry_3 ( .FCO(un68_fine_sel_cry_3_Z), .S(un68_fine_sel_cry_3_S), .Y(un68_fine_sel_cry_3_Y), .B(fine_sel_Z[3]), .C(un68_fine_sel_4_c3_Z), .D(GND), .A(un1_dll_90_code_4_3_wmux_0_Y[3]), .FCI(un68_fine_sel_cry_2_Z) ); defparam un68_fine_sel_cry_3.INIT=20'h56699; // @55:226 ARI1 un68_fine_sel_cry_4 ( .FCO(un68_fine_sel_cry_4_Z), .S(un68_fine_sel_cry_4_S), .Y(un68_fine_sel_cry_4_Y), .B(fine_sel_Z[3]), .C(fine_sel_Z[4]), .D(un68_fine_sel_4_c3_Z), .A(un1_dll_90_code_4_3_2_Z[4]), .FCI(un68_fine_sel_cry_3_Z) ); defparam un68_fine_sel_cry_4.INIT=20'h536C9; // @55:226 ARI1 un68_fine_sel_cry_5 ( .FCO(un68_fine_sel_cry_5_Z), .S(un68_fine_sel_cry_5_S), .Y(un68_fine_sel_cry_5_Y), .B(fine_sel_Z[5]), .C(un68_fine_sel_4_c5_Z), .D(GND), .A(un1_dll_90_code_4_3_wmux_0_Y[5]), .FCI(un68_fine_sel_cry_4_Z) ); defparam un68_fine_sel_cry_5.INIT=20'h56699; // @55:226 ARI1 un68_fine_sel_s_7 ( .FCO(un68_fine_sel_s_7_FCO), .S(un68_fine_sel_s_7_S), .Y(un68_fine_sel_s_7_Y), .B(fine_sel_Z[5]), .C(fine_sel_Z[6]), .D(fine_sel_Z[7]), .A(un68_fine_sel_4_c5_Z), .FCI(un68_fine_sel_cry_6_Z) ); defparam un68_fine_sel_s_7.INIT=20'h4F0E1; // @55:226 ARI1 un68_fine_sel_cry_6 ( .FCO(un68_fine_sel_cry_6_Z), .S(un68_fine_sel_cry_6_S), .Y(un68_fine_sel_cry_6_Y), .B(fine_sel_Z[5]), .C(fine_sel_Z[6]), .D(un68_fine_sel_4_c5_Z), .A(un1_dll_90_code_4_3_wmux_0_Y[6]), .FCI(un68_fine_sel_cry_5_Z) ); defparam un68_fine_sel_cry_6.INIT=20'h536C9; // @55:237 ARI1 un90_fine_sel_cry_0 ( .FCO(un90_fine_sel_cry_0_Z), .S(un90_fine_sel_cry_0_S), .Y(un90_fine_sel_cry_0_Y), .B(N_6295_i), .C(coarse_sel_Z[1]), .D(GND), .A(fine_sel_i_0[0]), .FCI(GND) ); defparam un90_fine_sel_cry_0.INIT=20'h56699; // @55:237 ARI1 un90_fine_sel_cry_1 ( .FCO(un90_fine_sel_cry_1_Z), .S(un90_fine_sel_cry_1_S), .Y(un90_fine_sel_cry_1_Y), .B(fine_sel_Z[0]), .C(fine_sel_Z[1]), .D(GND), .A(un1_dll_90_code_3_i[1]), .FCI(un90_fine_sel_cry_0_Z) ); defparam un90_fine_sel_cry_1.INIT=20'h56699; // @55:237 ARI1 un90_fine_sel_cry_2 ( .FCO(un90_fine_sel_cry_2_Z), .S(un90_fine_sel_cry_2_S), .Y(un90_fine_sel_cry_2_Y), .B(fine_sel_Z[0]), .C(fine_sel_Z[1]), .D(fine_sel_Z[2]), .A(un1_dll_90_code_3_i[2]), .FCI(un90_fine_sel_cry_1_Z) ); defparam un90_fine_sel_cry_2.INIT=20'h5E11E; // @55:237 ARI1 un90_fine_sel_cry_3 ( .FCO(un90_fine_sel_cry_3_Z), .S(un90_fine_sel_cry_3_S), .Y(un90_fine_sel_cry_3_Y), .B(fine_sel_Z[3]), .C(un10_fine_sel_c3), .D(GND), .A(un1_dll_90_code_3_i_0[3]), .FCI(un90_fine_sel_cry_2_Z) ); defparam un90_fine_sel_cry_3.INIT=20'h59966; // @55:237 ARI1 un90_fine_sel_cry_4 ( .FCO(un90_fine_sel_cry_4_Z), .S(un90_fine_sel_cry_4_S), .Y(un90_fine_sel_cry_4_Y), .B(fine_sel_Z[3]), .C(fine_sel_Z[4]), .D(un10_fine_sel_c3), .A(un1_dll_90_code_3_i_0[4]), .FCI(un90_fine_sel_cry_3_Z) ); defparam un90_fine_sel_cry_4.INIT=20'h5936C; // @55:237 ARI1 un90_fine_sel_cry_5 ( .FCO(un90_fine_sel_cry_5_Z), .S(un90_fine_sel_cry_5_S), .Y(un90_fine_sel_cry_5_Y), .B(un1_dll_90_code_3_3_wmux_0_Y[5]), .C(GND), .D(GND), .A(un90_fine_sel_4[5]), .FCI(un90_fine_sel_cry_4_Z) ); defparam un90_fine_sel_cry_5.INIT=20'h5AA55; // @55:237 ARI1 un90_fine_sel_s_7 ( .FCO(un90_fine_sel_s_7_FCO), .S(un90_fine_sel_s_7_S), .Y(un90_fine_sel_s_7_Y), .B(fine_sel_Z[7]), .C(un10_fine_sel_c7), .D(GND), .A(VCC), .FCI(un90_fine_sel_cry_6_Z) ); defparam un90_fine_sel_s_7.INIT=20'h49900; // @55:237 ARI1 un90_fine_sel_cry_6 ( .FCO(un90_fine_sel_cry_6_Z), .S(un90_fine_sel_cry_6_S), .Y(un90_fine_sel_cry_6_Y), .B(un1_dll_90_code_3_3_wmux_0_Y[6]), .C(GND), .D(GND), .A(un90_fine_sel_4[6]), .FCI(un90_fine_sel_cry_5_Z) ); defparam un90_fine_sel_cry_6.INIT=20'h5AA55; // @55:232 ARI1 un1_dll_90_code_6_cry_0 ( .FCO(un1_dll_90_code_6_cry_0_Z), .S(un1_dll_90_code_6_cry_0_S), .Y(un1_dll_90_code_6_cry_0_Y), .B(N_6295_i), .C(coarse_sel_Z[1]), .D(GND), .A(fine_sel_Z[0]), .FCI(GND) ); defparam un1_dll_90_code_6_cry_0.INIT=20'h56699; // @55:232 ARI1 un1_dll_90_code_6_cry_1 ( .FCO(un1_dll_90_code_6_cry_1_Z), .S(un1_dll_90_code_6_cry_1_S), .Y(un1_dll_90_code_6_cry_1_Y), .B(fine_sel_Z[1]), .C(GND), .D(GND), .A(un1_dll_90_code_3_i[1]), .FCI(un1_dll_90_code_6_cry_0_Z) ); defparam un1_dll_90_code_6_cry_1.INIT=20'h5AA55; // @55:232 ARI1 un1_dll_90_code_6_cry_2 ( .FCO(un1_dll_90_code_6_cry_2_Z), .S(un1_dll_90_code_6_cry_2_S), .Y(un1_dll_90_code_6_cry_2_Y), .B(fine_sel_Z[1]), .C(fine_sel_Z[2]), .D(GND), .A(un1_dll_90_code_3_i[2]), .FCI(un1_dll_90_code_6_cry_1_Z) ); defparam un1_dll_90_code_6_cry_2.INIT=20'h59966; // @55:232 ARI1 un1_dll_90_code_6_cry_3 ( .FCO(un1_dll_90_code_6_cry_3_Z), .S(un1_dll_90_code_6_cry_3_S), .Y(un1_dll_90_code_6_cry_3_Y), .B(fine_sel_Z[1]), .C(fine_sel_Z[2]), .D(fine_sel_Z[3]), .A(un1_dll_90_code_3_i_0[3]), .FCI(un1_dll_90_code_6_cry_2_Z) ); defparam un1_dll_90_code_6_cry_3.INIT=20'h58778; // @55:232 ARI1 un1_dll_90_code_6_cry_4 ( .FCO(un1_dll_90_code_6_cry_4_Z), .S(un1_dll_90_code_6_cry_4_S), .Y(un1_dll_90_code_6_cry_4_Y), .B(fine_sel_Z[4]), .C(un82_fine_sel_1_c3), .D(GND), .A(un1_dll_90_code_3_i_0[4]), .FCI(un1_dll_90_code_6_cry_3_Z) ); defparam un1_dll_90_code_6_cry_4.INIT=20'h59966; // @55:232 ARI1 un1_dll_90_code_6_cry_5 ( .FCO(un1_dll_90_code_6_cry_5_Z), .S(un1_dll_90_code_6_cry_5_S), .Y(un1_dll_90_code_6_cry_5_Y), .B(fine_sel_Z[4]), .C(fine_sel_Z[5]), .D(un82_fine_sel_1_c3), .A(un1_dll_90_code_3_i_0[5]), .FCI(un1_dll_90_code_6_cry_4_Z) ); defparam un1_dll_90_code_6_cry_5.INIT=20'h5936C; // @55:232 ARI1 un1_dll_90_code_6_cry_6 ( .FCO(un1_dll_90_code_6_cry_6_Z), .S(un1_dll_90_code_6_cry_6_S), .Y(un1_dll_90_code_6_cry_6_Y), .B(un1_dll_90_code_3_3_wmux_0_Y[6]), .C(GND), .D(GND), .A(un1_dll_90_code_6_6), .FCI(un1_dll_90_code_6_cry_5_Z) ); defparam un1_dll_90_code_6_cry_6.INIT=20'h5AA55; // @55:232 ARI1 un1_dll_90_code_6_cry_7 ( .FCO(un1_dll_90_code_6_cry_7_Z), .S(un1_dll_90_code_6_cry_7_S), .Y(un1_dll_90_code_6_cry_7_Y), .B(fine_sel_Z[5]), .C(fine_sel_Z[6]), .D(fine_sel_Z[7]), .A(un82_fine_sel_1_c4), .FCI(un1_dll_90_code_6_cry_6_Z) ); defparam un1_dll_90_code_6_cry_7.INIT=20'h6870F; // @55:232 ARI1 un1_dll_90_code_6_cry_8 ( .FCO(un1_dll_90_code_6_i), .S(un1_dll_90_code_6_cry_8_S), .Y(un1_dll_90_code_6_cry_8_Y), .B(fine_sel_Z[5]), .C(fine_sel_Z[6]), .D(fine_sel_Z[7]), .A(un82_fine_sel_1_c4), .FCI(un1_dll_90_code_6_cry_7_Z) ); defparam un1_dll_90_code_6_cry_8.INIT=20'h67FFF; // @55:196 ARI1 un1_dll_90_code_5_cry_0 ( .FCO(un1_dll_90_code_5_cry_0_Z), .S(un1_dll_90_code_5_cry_0_S), .Y(un1_dll_90_code_5_cry_0_Y), .B(N_6295_i), .C(coarse_sel_Z[1]), .D(GND), .A(fine_sel_i_0[0]), .FCI(GND) ); defparam un1_dll_90_code_5_cry_0.INIT=20'h56699; // @55:196 ARI1 un1_dll_90_code_5_cry_1 ( .FCO(un1_dll_90_code_5_cry_1_Z), .S(un1_dll_90_code_5_cry_1_S), .Y(un1_dll_90_code_5_cry_1_Y), .B(fine_sel_Z[0]), .C(fine_sel_Z[1]), .D(GND), .A(un1_dll_90_code_3_i[1]), .FCI(un1_dll_90_code_5_cry_0_Z) ); defparam un1_dll_90_code_5_cry_1.INIT=20'h56699; // @55:196 ARI1 un1_dll_90_code_5_cry_2 ( .FCO(un1_dll_90_code_5_cry_2_Z), .S(un1_dll_90_code_5_cry_2_S), .Y(un1_dll_90_code_5_cry_2_Y), .B(fine_sel_Z[0]), .C(fine_sel_Z[1]), .D(fine_sel_Z[2]), .A(un1_dll_90_code_3_i[2]), .FCI(un1_dll_90_code_5_cry_1_Z) ); defparam un1_dll_90_code_5_cry_2.INIT=20'h5E11E; // @55:196 ARI1 un1_dll_90_code_5_cry_3 ( .FCO(un1_dll_90_code_5_cry_3_Z), .S(un1_dll_90_code_5_cry_3_S), .Y(un1_dll_90_code_5_cry_3_Y), .B(fine_sel_Z[3]), .C(un10_fine_sel_c3), .D(GND), .A(un1_dll_90_code_3_i_0[3]), .FCI(un1_dll_90_code_5_cry_2_Z) ); defparam un1_dll_90_code_5_cry_3.INIT=20'h59966; // @55:196 ARI1 un1_dll_90_code_5_cry_4 ( .FCO(un1_dll_90_code_5_cry_4_Z), .S(un1_dll_90_code_5_cry_4_S), .Y(un1_dll_90_code_5_cry_4_Y), .B(fine_sel_Z[3]), .C(fine_sel_Z[4]), .D(un10_fine_sel_c3), .A(un1_dll_90_code_3_i_0[4]), .FCI(un1_dll_90_code_5_cry_3_Z) ); defparam un1_dll_90_code_5_cry_4.INIT=20'h5936C; // @55:196 ARI1 un1_dll_90_code_5_cry_5 ( .FCO(un1_dll_90_code_5_cry_5_Z), .S(un1_dll_90_code_5_cry_5_S), .Y(un1_dll_90_code_5_cry_5_Y), .B(un1_dll_90_code_3_3_wmux_0_Y[5]), .C(GND), .D(GND), .A(un90_fine_sel_4[5]), .FCI(un1_dll_90_code_5_cry_4_Z) ); defparam un1_dll_90_code_5_cry_5.INIT=20'h5AA55; // @55:196 ARI1 un1_dll_90_code_5_cry_6 ( .FCO(un1_dll_90_code_5_cry_6_Z), .S(un1_dll_90_code_5_cry_6_S), .Y(un1_dll_90_code_5_cry_6_Y), .B(un1_dll_90_code_3_3_wmux_0_Y[6]), .C(GND), .D(GND), .A(un90_fine_sel_4[6]), .FCI(un1_dll_90_code_5_cry_5_Z) ); defparam un1_dll_90_code_5_cry_6.INIT=20'h5AA55; // @55:196 ARI1 un1_dll_90_code_5_cry_7 ( .FCO(un1_dll_90_code_5_cry_7_Z), .S(un1_dll_90_code_5_cry_7_S), .Y(un1_dll_90_code_5_cry_7_Y), .B(fine_sel_Z[7]), .C(un10_fine_sel_c7), .D(GND), .A(VCC), .FCI(un1_dll_90_code_5_cry_6_Z) ); defparam un1_dll_90_code_5_cry_7.INIT=20'h69900; // @55:196 ARI1 un1_dll_90_code_5_cry_8 ( .FCO(un1_dll_90_code_5_i), .S(un1_dll_90_code_5_cry_8_S), .Y(un1_dll_90_code_5_cry_8_Y), .B(fine_sel_Z[7]), .C(un10_fine_sel_c7), .D(GND), .A(VCC), .FCI(un1_dll_90_code_5_cry_7_Z) ); defparam un1_dll_90_code_5_cry_8.INIT=20'h67700; // @55:47 ARI1 \un1_dll_90_code_3_3_wmux_0[6] ( .FCO(un1_dll_90_code_3_3_0_co1[6]), .S(un1_dll_90_code_3_3_wmux_0_S[6]), .Y(un1_dll_90_code_3_3_wmux_0_Y[6]), .B(coarse_sel_Z[1]), .C(un1_dll_90_code_1_axbxc6_Z), .D(un1_dll_90_code_2_axbxc6_Z), .A(un1_dll_90_code_3_3_0_y0[6]), .FCI(un1_dll_90_code_3_3_0_co0[6]) ); defparam \un1_dll_90_code_3_3_wmux_0[6] .INIT=20'h0F588; // @55:47 ARI1 \un1_dll_90_code_3_3_0_wmux[6] ( .FCO(un1_dll_90_code_3_3_0_co0[6]), .S(un1_dll_90_code_3_3_0_wmux_S[6]), .Y(un1_dll_90_code_3_3_0_y0[6]), .B(coarse_sel_Z[1]), .C(dll_90_code_Z[6]), .D(N_195), .A(coarse_sel_Z[0]), .FCI(VCC) ); defparam \un1_dll_90_code_3_3_0_wmux[6] .INIT=20'h0FA44; // @55:47 ARI1 \un1_dll_90_code_3_3_wmux_0[5] ( .FCO(un1_dll_90_code_3_3_0_co1[5]), .S(un1_dll_90_code_3_3_wmux_0_S[5]), .Y(un1_dll_90_code_3_3_wmux_0_Y[5]), .B(coarse_sel_Z[1]), .C(un1_dll_90_code_1_axbxc5_Z), .D(un1_dll_90_code_2_axbxc5_Z), .A(un1_dll_90_code_3_3_0_y0[5]), .FCI(un1_dll_90_code_3_3_0_co0[5]) ); defparam \un1_dll_90_code_3_3_wmux_0[5] .INIT=20'h0F588; // @55:47 ARI1 \un1_dll_90_code_3_3_0_wmux[5] ( .FCO(un1_dll_90_code_3_3_0_co0[5]), .S(un1_dll_90_code_3_3_0_wmux_S[5]), .Y(un1_dll_90_code_3_3_0_y0[5]), .B(coarse_sel_Z[1]), .C(dll_90_code_Z[5]), .D(N_194), .A(coarse_sel_Z[0]), .FCI(VCC) ); defparam \un1_dll_90_code_3_3_0_wmux[5] .INIT=20'h0FA44; // @55:47 ARI1 \un1_dll_90_code_3_3_wmux_0[4] ( .FCO(un1_dll_90_code_3_3_0_co1[4]), .S(un1_dll_90_code_3_3_wmux_0_S[4]), .Y(un1_dll_90_code_3_3_wmux_0_Y[4]), .B(coarse_sel_Z[1]), .C(un1_dll_90_code_1_axbxc4_Z), .D(un1_dll_90_code_2_axbxc4_Z), .A(un1_dll_90_code_3_3_0_y0[4]), .FCI(un1_dll_90_code_3_3_0_co0[4]) ); defparam \un1_dll_90_code_3_3_wmux_0[4] .INIT=20'h0F588; // @55:47 ARI1 \un1_dll_90_code_3_3_0_wmux[4] ( .FCO(un1_dll_90_code_3_3_0_co0[4]), .S(un1_dll_90_code_3_3_0_wmux_S[4]), .Y(un1_dll_90_code_3_3_0_y0[4]), .B(coarse_sel_Z[1]), .C(dll_90_code_Z[4]), .D(N_193), .A(coarse_sel_Z[0]), .FCI(VCC) ); defparam \un1_dll_90_code_3_3_0_wmux[4] .INIT=20'h0FA44; // @55:52 ARI1 \un1_dll_90_code_4_3_wmux_0[6] ( .FCO(un1_dll_90_code_4_3_0_co1[6]), .S(un1_dll_90_code_4_3_wmux_0_S[6]), .Y(un1_dll_90_code_4_3_wmux_0_Y[6]), .B(coarse_sel_Z[0]), .C(dll_90_code_Z[6]), .D(un1_dll_90_code_1_axbxc6_Z), .A(un1_dll_90_code_4_3_0_y0[6]), .FCI(un1_dll_90_code_4_3_0_co0[6]) ); defparam \un1_dll_90_code_4_3_wmux_0[6] .INIT=20'h0F588; // @55:52 ARI1 \un1_dll_90_code_4_3_0_wmux[6] ( .FCO(un1_dll_90_code_4_3_0_co0[6]), .S(un1_dll_90_code_4_3_0_wmux_S[6]), .Y(un1_dll_90_code_4_3_0_y0[6]), .B(coarse_sel_Z[0]), .C(un1_dll_90_code_2_axbxc6_Z), .D(N_195), .A(coarse_sel_Z[1]), .FCI(VCC) ); defparam \un1_dll_90_code_4_3_0_wmux[6] .INIT=20'h0FA44; // @55:47 ARI1 \un1_dll_90_code_3_3_wmux_0[3] ( .FCO(un1_dll_90_code_3_3_0_co1[3]), .S(un1_dll_90_code_3_3_wmux_0_S[3]), .Y(un1_dll_90_code_3_3_wmux_0_Y[3]), .B(coarse_sel_Z[1]), .C(un1_dll_90_code_1_axbxc3_Z), .D(un1_dll_90_code_2_axbxc3_Z), .A(un1_dll_90_code_3_3_0_y0[3]), .FCI(un1_dll_90_code_3_3_0_co0[3]) ); defparam \un1_dll_90_code_3_3_wmux_0[3] .INIT=20'h0F588; // @55:47 ARI1 \un1_dll_90_code_3_3_0_wmux[3] ( .FCO(un1_dll_90_code_3_3_0_co0[3]), .S(un1_dll_90_code_3_3_0_wmux_S[3]), .Y(un1_dll_90_code_3_3_0_y0[3]), .B(coarse_sel_Z[1]), .C(dll_90_code_Z[3]), .D(N_192), .A(coarse_sel_Z[0]), .FCI(VCC) ); defparam \un1_dll_90_code_3_3_0_wmux[3] .INIT=20'h0FA44; // @55:52 ARI1 \un1_dll_90_code_4_3_wmux_0[5] ( .FCO(un1_dll_90_code_4_3_0_co1[5]), .S(un1_dll_90_code_4_3_wmux_0_S[5]), .Y(un1_dll_90_code_4_3_wmux_0_Y[5]), .B(coarse_sel_Z[0]), .C(dll_90_code_Z[5]), .D(un1_dll_90_code_1_axbxc5_Z), .A(un1_dll_90_code_4_3_0_y0[5]), .FCI(un1_dll_90_code_4_3_0_co0[5]) ); defparam \un1_dll_90_code_4_3_wmux_0[5] .INIT=20'h0F588; // @55:52 ARI1 \un1_dll_90_code_4_3_0_wmux[5] ( .FCO(un1_dll_90_code_4_3_0_co0[5]), .S(un1_dll_90_code_4_3_0_wmux_S[5]), .Y(un1_dll_90_code_4_3_0_y0[5]), .B(coarse_sel_Z[0]), .C(un1_dll_90_code_2_axbxc5_Z), .D(N_194), .A(coarse_sel_Z[1]), .FCI(VCC) ); defparam \un1_dll_90_code_4_3_0_wmux[5] .INIT=20'h0FA44; // @55:52 ARI1 \un1_dll_90_code_4_3_wmux_0[3] ( .FCO(un1_dll_90_code_4_3_0_co1[3]), .S(un1_dll_90_code_4_3_wmux_0_S[3]), .Y(un1_dll_90_code_4_3_wmux_0_Y[3]), .B(coarse_sel_Z[0]), .C(dll_90_code_Z[3]), .D(un1_dll_90_code_1_axbxc3_Z), .A(un1_dll_90_code_4_3_0_y0[3]), .FCI(un1_dll_90_code_4_3_0_co0[3]) ); defparam \un1_dll_90_code_4_3_wmux_0[3] .INIT=20'h0F588; // @55:52 ARI1 \un1_dll_90_code_4_3_0_wmux[3] ( .FCO(un1_dll_90_code_4_3_0_co0[3]), .S(un1_dll_90_code_4_3_0_wmux_S[3]), .Y(un1_dll_90_code_4_3_0_y0[3]), .B(coarse_sel_Z[0]), .C(un1_dll_90_code_2_axbxc3_Z), .D(N_192), .A(coarse_sel_Z[1]), .FCI(VCC) ); defparam \un1_dll_90_code_4_3_0_wmux[3] .INIT=20'h0FA44; // @55:52 ARI1 \un1_dll_90_code_4_3_wmux_0[2] ( .FCO(un1_dll_90_code_4_3_0_co1[2]), .S(un1_dll_90_code_4_3_wmux_0_S[2]), .Y(un1_dll_90_code_4_3_wmux_0_Y[2]), .B(coarse_sel_Z[0]), .C(dll_90_code_Z[2]), .D(un1_dll_90_code_1_axbxc2_Z), .A(un1_dll_90_code_4_3_0_y0[2]), .FCI(un1_dll_90_code_4_3_0_co0[2]) ); defparam \un1_dll_90_code_4_3_wmux_0[2] .INIT=20'h0F588; // @55:52 ARI1 \un1_dll_90_code_4_3_0_wmux[2] ( .FCO(un1_dll_90_code_4_3_0_co0[2]), .S(un1_dll_90_code_4_3_0_wmux_S[2]), .Y(un1_dll_90_code_4_3_0_y0[2]), .B(coarse_sel_Z[0]), .C(un1_dll_90_code_2_axbxc2_Z), .D(dll_90_code_Z[2]), .A(coarse_sel_Z[1]), .FCI(VCC) ); defparam \un1_dll_90_code_4_3_0_wmux[2] .INIT=20'h0AF44; // @55:126 CFG4 \un1_fine_sel_1_sqmuxa_1[0] ( .A(fine_sel_1_sqmuxa_1_Z), .B(un1_coarse_sel_0_sqmuxa_0_Z), .C(coarse_sel_2_sqmuxa_Z), .D(fine_sel_1_sqmuxa_2_Z), .Y(un1_fine_sel_1_sqmuxa_1_Z[0]) ); defparam \un1_fine_sel_1_sqmuxa_1[0] .INIT=16'hFFFE; // @55:126 CFG4 un1_tune_st_1_sqmuxa_i ( .A(tune_st_Z[0]), .B(cnt_Z[3]), .C(N_93_3), .D(un1_tune_st_1_sqmuxa_i_o2_0_Z), .Y(N_67) ); defparam un1_tune_st_1_sqmuxa_i.INIT=16'hFFBA; // @55:52 CFG4 \un1_dll_90_code_4_3_2[4] ( .A(dll_90_code_Z[4]), .B(coarse_sel_Z[0]), .C(un1_dll_90_code_4_3_1_Z[4]), .D(un1_dll_90_code_1_c4), .Y(un1_dll_90_code_4_3_2_Z[4]) ); defparam \un1_dll_90_code_4_3_2[4] .INIT=16'h78B8; // @55:117 CFG4 \tune_st_ns_0_a4_4[0] ( .A(cnt_Z[2]), .B(cnt_Z[1]), .C(N_134), .D(cnt_Z[0]), .Y(N_93_3) ); defparam \tune_st_ns_0_a4_4[0] .INIT=16'h1000; // @55:126 CFG4 \fine_sel_19_iv_3[1] ( .A(fine_sel_19_iv_0_Z[1]), .B(fine_sel_Z[1]), .C(fine_sel_2_sqmuxa_1_Z), .D(fine_sel_19_iv_3_1_Z[1]), .Y(fine_sel_19_iv_3_Z[1]) ); defparam \fine_sel_19_iv_3[1] .INIT=16'hBAFF; // @55:126 CFG4 \fine_sel_19_iv_3_1[1] ( .A(fine_sel_3_sqmuxa_Z), .B(un41_fine_sel_cry_1_S), .C(un1_fine_sel_2_cry_1_S), .D(un1_fine_sel_2_sqmuxa_Z), .Y(fine_sel_19_iv_3_1_Z[1]) ); defparam \fine_sel_19_iv_3_1[1] .INIT=16'h0777; // @55:117 CFG4 \tune_st_RNO[1] ( .A(early_flag_Z[0]), .B(tune_st_Z[1]), .C(N_137_1), .D(N_133_i_1), .Y(N_133_i) ); defparam \tune_st_RNO[1] .INIT=16'hCF88; // @55:117 CFG4 \tune_st_RNO_0[1] ( .A(tune_st_Z[0]), .B(late_flag_Z[0]), .C(cdr_ready_reg_Z[3]), .D(tune_st_Z[1]), .Y(N_133_i_1) ); defparam \tune_st_RNO_0[1] .INIT=16'h7727; // @55:52 CFG4 \un1_dll_90_code_4_3_1[4] ( .A(N_193), .B(un1_dll_90_code_2_axbxc4_Z), .C(coarse_sel_Z[0]), .D(coarse_sel_Z[1]), .Y(un1_dll_90_code_4_3_1_Z[4]) ); defparam \un1_dll_90_code_4_3_1[4] .INIT=16'hFA0C; // @55:108 CFG2 un1_cdr_ready_reg_1_0 ( .A(cdr_ready_reg_Z[1]), .B(CDR4_CNTL_TIP_0_CDR_READY), .Y(un1_cdr_ready_reg_1_0_Z) ); defparam un1_cdr_ready_reg_1_0.INIT=4'h2; // @55:197 CFG2 un10_fine_sel_axbxc1 ( .A(fine_sel_Z[1]), .B(fine_sel_Z[0]), .Y(un90_fine_sel_4[1]) ); defparam un10_fine_sel_axbxc1.INIT=4'h9; // @55:233 CFG2 un82_fine_sel_1_axbxc1 ( .A(fine_sel_Z[1]), .B(fine_sel_Z[2]), .Y(un1_dll_90_code_6_2) ); defparam un82_fine_sel_1_axbxc1.INIT=4'h6; // @55:61 CFG2 CLR_FLAGS_N ( .A(clr_flag_Z), .B(rst_n_Z[0]), .Y(CLR_FLAGS_N_1z) ); defparam CLR_FLAGS_N.INIT=4'hB; // @55:221 CFG2 un1_fine_sel_1lto7_2 ( .A(fine_sel_Z[3]), .B(fine_sel_Z[4]), .Y(un1_fine_sel_i_2) ); defparam un1_fine_sel_1lto7_2.INIT=4'h1; // @55:221 CFG2 un1_fine_sel_1lto1 ( .A(fine_sel_Z[1]), .B(fine_sel_Z[0]), .Y(un1_fine_sel_1lt7) ); defparam un1_fine_sel_1lto1.INIT=4'h7; // @55:19 CFG2 SWITCH_LANE17_2 ( .A(cnt_Z[1]), .B(cnt_Z[2]), .Y(N_91_2) ); defparam SWITCH_LANE17_2.INIT=4'h1; // @55:126 CFG2 clr_flag_9_0_a2 ( .A(N_74), .B(N_137_1_i), .Y(clr_flag_9_0_a2_Z) ); defparam clr_flag_9_0_a2.INIT=4'h8; // @55:117 CFG2 \tune_st_ns_0_o4[0] ( .A(tune_st_Z[1]), .B(cdr_ready_reg_Z[3]), .Y(N_134) ); defparam \tune_st_ns_0_o4[0] .INIT=4'hE; // @55:53 CFG2 \un1_dll_90_code_1.CO1 ( .A(dll_90_code_Z[2]), .B(dll_90_code_Z[3]), .Y(CO1) ); defparam \un1_dll_90_code_1.CO1 .INIT=4'h8; // @55:53 CFG2 \un1_dll_90_code_1.SUM[1] ( .A(dll_90_code_Z[2]), .B(dll_90_code_Z[3]), .Y(N_192) ); defparam \un1_dll_90_code_1.SUM[1] .INIT=4'h6; // @55:111 CFG2 \SELA_LANE_10[10] ( .A(CDR4_CNTL_TIP_0_SWITCH_LANE), .B(SELA_LANE_net_0[10]), .Y(SELA_LANE_10_Z[10]) ); defparam \SELA_LANE_10[10] .INIT=4'h6; // @55:112 CFG2 \SELB_LANE_9[10] ( .A(CDR4_CNTL_TIP_0_SWITCH_LANE), .B(SELB_LANE_net_0[10]), .Y(SELB_LANE_9_Z[10]) ); defparam \SELB_LANE_9[10] .INIT=4'h6; // @55:117 CFG2 SELB_LANE_0_sqmuxa ( .A(clr_flag_Z), .B(SELB_LANE_net_0[10]), .Y(SELB_LANE_0_sqmuxa_Z) ); defparam SELB_LANE_0_sqmuxa.INIT=4'h2; // @55:117 CFG2 \tune_st_ns_0_a4_0_1[0] ( .A(early_flag_Z[0]), .B(late_flag_Z[0]), .Y(N_137_1) ); defparam \tune_st_ns_0_a4_0_1[0] .INIT=4'h1; // @55:117 CFG2 tune_st_s3_i ( .A(tune_st_Z[0]), .B(tune_st_Z[1]), .Y(N_48) ); defparam tune_st_s3_i.INIT=4'h7; // @55:117 CFG2 tune_st_s1_0_a2 ( .A(tune_st_Z[0]), .B(tune_st_Z[1]), .Y(tune_st_11_d) ); defparam tune_st_s1_0_a2.INIT=4'h2; // @55:19 CFG2 SWITCH_LANE9_0 ( .A(N_137_1), .B(CDR4_CNTL_TIP_0_SWITCH_LANE), .Y(SWITCH_LANE9_0_Z) ); defparam SWITCH_LANE9_0.INIT=4'h2; // @55:55 CFG4 un1_dll_90_code_2_ac0_7_a0 ( .A(dll_90_code_Z[3]), .B(dll_90_code_Z[1]), .C(N_6295_i), .D(dll_90_code_Z[2]), .Y(un1_dll_90_code_2_ac0_7_a0_Z) ); defparam un1_dll_90_code_2_ac0_7_a0.INIT=16'h0001; // @55:207 CFG3 un1_fine_sellto7_2_0 ( .A(fine_sel_Z[7]), .B(fine_sel_Z[6]), .C(fine_sel_Z[5]), .Y(un1_fine_sel_i_2_0) ); defparam un1_fine_sellto7_2_0.INIT=8'h01; // @55:128 CFG4 coarse_sel17_0_a2_0 ( .A(cnt_Z[0]), .B(cnt_Z[3]), .C(cnt_Z[2]), .D(cnt_Z[1]), .Y(N_97) ); defparam coarse_sel17_0_a2_0.INIT=16'h8000; // @55:126 CFG2 \late_flag_RNI1NUK5[0] ( .A(early_flag_Z[0]), .B(late_flag_Z[0]), .Y(N_137_1_i) ); defparam \late_flag_RNI1NUK5[0] .INIT=4'hE; // @55:55 CFG2 un1_dll_90_code_2_c2 ( .A(N_6295_i), .B(dll_90_code_Z[1]), .Y(un1_dll_90_code_2_c2_Z) ); defparam un1_dll_90_code_2_c2.INIT=4'hE; // @55:233 CFG3 un82_fine_sel_1_ac0_3 ( .A(fine_sel_Z[3]), .B(fine_sel_Z[2]), .C(fine_sel_Z[1]), .Y(un82_fine_sel_1_c3) ); defparam un82_fine_sel_1_ac0_3.INIT=8'h80; // @55:233 CFG3 un82_fine_sel_1_axbxc2 ( .A(fine_sel_Z[3]), .B(fine_sel_Z[2]), .C(fine_sel_Z[1]), .Y(un1_dll_90_code_6_3) ); defparam un82_fine_sel_1_axbxc2.INIT=8'h6A; // @55:54 CFG3 un1_dll_90_code_1_axbxc2 ( .A(dll_90_code_Z[2]), .B(N_6295_i), .C(dll_90_code_Z[1]), .Y(un1_dll_90_code_1_axbxc2_Z) ); defparam un1_dll_90_code_1_axbxc2.INIT=8'h6A; // @55:201 CFG3 un18_fine_sel_5_ac0_3 ( .A(fine_sel_Z[4]), .B(fine_sel_Z[3]), .C(fine_sel_Z[2]), .Y(un18_fine_sel_5_c3) ); defparam un18_fine_sel_5_ac0_3.INIT=8'h80; // @55:212 CFG2 un41_fine_sel_5_c2 ( .A(fine_sel_Z[1]), .B(fine_sel_Z[2]), .Y(un41_fine_sel_5_c2_Z) ); defparam un41_fine_sel_5_c2.INIT=4'hE; // @55:126 CFG3 clr_flag_9_0_o3_0 ( .A(tune_st_Z[0]), .B(cdr_ready_reg_Z[3]), .C(tune_st_Z[1]), .Y(N_74) ); defparam clr_flag_9_0_o3_0.INIT=8'hAB; // @55:53 CFG2 \un1_dll_90_code_1.SUM[2] ( .A(CO1), .B(dll_90_code_Z[4]), .Y(N_193) ); defparam \un1_dll_90_code_1.SUM[2] .INIT=4'h6; // @55:207 CFG4 un1_fine_sellto7 ( .A(fine_sel_Z[1]), .B(fine_sel_Z[2]), .C(un1_fine_sel_i_2_0), .D(un1_fine_sel_i_2), .Y(un1_fine_sel_i) ); defparam un1_fine_sellto7.INIT=16'h1000; // @55:19 CFG4 SWITCH_LANE17 ( .A(N_91_2), .B(CDR4_CNTL_TIP_0_SWITCH_LANE), .C(cnt_Z[0]), .D(cnt_Z[3]), .Y(SWITCH_LANE17_Z) ); defparam SWITCH_LANE17.INIT=16'h0002; // @55:197 CFG3 un10_fine_sel_ac0_3 ( .A(fine_sel_Z[1]), .B(fine_sel_Z[0]), .C(fine_sel_Z[2]), .Y(un10_fine_sel_c3) ); defparam un10_fine_sel_ac0_3.INIT=8'hE0; // @55:197 CFG3 un10_fine_sel_axbxc2 ( .A(fine_sel_Z[1]), .B(fine_sel_Z[0]), .C(fine_sel_Z[2]), .Y(un90_fine_sel_4[2]) ); defparam un10_fine_sel_axbxc2.INIT=8'h1E; // @55:55 CFG3 un1_dll_90_code_2_axbxc2 ( .A(dll_90_code_Z[2]), .B(N_6295_i), .C(dll_90_code_Z[1]), .Y(un1_dll_90_code_2_axbxc2_Z) ); defparam un1_dll_90_code_2_axbxc2.INIT=8'hA9; // @55:233 CFG4 un82_fine_sel_1_ac0_5 ( .A(fine_sel_Z[4]), .B(fine_sel_Z[3]), .C(fine_sel_Z[2]), .D(fine_sel_Z[1]), .Y(un82_fine_sel_1_c4) ); defparam un82_fine_sel_1_ac0_5.INIT=16'h8000; // @55:233 CFG2 un82_fine_sel_1_axbxc3 ( .A(un82_fine_sel_1_c3), .B(fine_sel_Z[4]), .Y(un1_dll_90_code_6_4) ); defparam un82_fine_sel_1_axbxc3.INIT=4'h6; // @55:54 CFG4 un1_dll_90_code_1_ac0_5 ( .A(dll_90_code_Z[3]), .B(dll_90_code_Z[1]), .C(N_6295_i), .D(dll_90_code_Z[2]), .Y(un1_dll_90_code_1_c4) ); defparam un1_dll_90_code_1_ac0_5.INIT=16'h8000; // @55:54 CFG4 un1_dll_90_code_1_axbxc3 ( .A(dll_90_code_Z[3]), .B(dll_90_code_Z[1]), .C(N_6295_i), .D(dll_90_code_Z[2]), .Y(un1_dll_90_code_1_axbxc3_Z) ); defparam un1_dll_90_code_1_axbxc3.INIT=16'h6AAA; // @55:226 CFG3 un68_fine_sel_4_c3 ( .A(fine_sel_Z[1]), .B(fine_sel_Z[0]), .C(fine_sel_Z[2]), .Y(un68_fine_sel_4_c3_Z) ); defparam un68_fine_sel_4_c3.INIT=8'hF8; // @55:127 CFG3 fine_sel_0_sqmuxa_0_a2 ( .A(N_137_1_i), .B(tune_st_Z[0]), .C(N_134), .Y(fine_sel_0_sqmuxa) ); defparam fine_sel_0_sqmuxa_0_a2.INIT=8'h02; // @55:53 CFG4 \un1_dll_90_code_1.SUM[3] ( .A(dll_90_code_Z[5]), .B(dll_90_code_Z[3]), .C(dll_90_code_Z[4]), .D(dll_90_code_Z[2]), .Y(N_194) ); defparam \un1_dll_90_code_1.SUM[3] .INIT=16'h6AAA; // @55:232 CFG3 fine_sel_0_sqmuxa_1 ( .A(N_48), .B(un1_fine_sel_1_i), .C(early_flag_Z[0]), .Y(fine_sel_0_sqmuxa_1_Z) ); defparam fine_sel_0_sqmuxa_1.INIT=8'h10; // @55:232 CFG4 fine_sel_2_sqmuxa_1 ( .A(N_48), .B(un1_dll_90_code_6_i), .C(late_flag_Z[0]), .D(early_flag_Z[0]), .Y(fine_sel_2_sqmuxa_1_Z) ); defparam fine_sel_2_sqmuxa_1.INIT=16'h0010; // @55:220 CFG4 coarse_sel_2_sqmuxa ( .A(N_48), .B(un1_dll_90_code_6_i), .C(late_flag_Z[0]), .D(early_flag_Z[0]), .Y(coarse_sel_2_sqmuxa_Z) ); defparam coarse_sel_2_sqmuxa.INIT=16'h0040; // @55:207 CFG3 fine_sel_1_sqmuxa_2 ( .A(late_flag_Z[0]), .B(tune_st_11_d), .C(un1_dll_90_code_5_i), .Y(fine_sel_1_sqmuxa_2_Z) ); defparam fine_sel_1_sqmuxa_2.INIT=8'h80; // @55:207 CFG4 fine_sel_3_sqmuxa ( .A(early_flag_Z[0]), .B(late_flag_Z[0]), .C(un1_fine_sel_i), .D(tune_st_11_d), .Y(fine_sel_3_sqmuxa_Z) ); defparam fine_sel_3_sqmuxa.INIT=16'h2000; // @55:232 CFG3 fine_sel_1_sqmuxa_1 ( .A(N_48), .B(un1_fine_sel_1_i), .C(early_flag_Z[0]), .Y(fine_sel_1_sqmuxa_1_Z) ); defparam fine_sel_1_sqmuxa_1.INIT=8'h40; // @55:207 CFG3 fine_sel_0_sqmuxa_2 ( .A(late_flag_Z[0]), .B(tune_st_11_d), .C(un1_dll_90_code_5_i), .Y(fine_sel_0_sqmuxa_2_Z) ); defparam fine_sel_0_sqmuxa_2.INIT=8'h08; // @55:207 CFG4 fine_sel_2_sqmuxa ( .A(early_flag_Z[0]), .B(late_flag_Z[0]), .C(un1_fine_sel_i), .D(tune_st_11_d), .Y(fine_sel_2_sqmuxa_Z) ); defparam fine_sel_2_sqmuxa.INIT=16'h0200; // @0:405 CFG4 \un1_cdr_ready_reg_2[0] ( .A(un1_cdr_ready_reg_1_0_Z), .B(clr_flag_Z), .C(SELA_LANE_net_0[10]), .D(cdr_ready_reg_Z[2]), .Y(un1_cdr_ready_reg_2_Z[0]) ); defparam \un1_cdr_ready_reg_2[0] .INIT=16'hE2C0; // @55:126 CFG4 un1_coarse_sel_0_sqmuxa_0 ( .A(early_flag_Z[0]), .B(tune_st_Z[0]), .C(fine_sel_3_sqmuxa_Z), .D(N_134), .Y(un1_coarse_sel_0_sqmuxa_0_Z) ); defparam un1_coarse_sel_0_sqmuxa_0.INIT=16'hF0F2; // @55:126 CFG3 un1_tune_st_1_sqmuxa_i_o2_0 ( .A(N_97), .B(N_137_1_i), .C(N_134), .Y(un1_tune_st_1_sqmuxa_i_o2_0_Z) ); defparam un1_tune_st_1_sqmuxa_i_o2_0.INIT=8'h0E; // @55:221 CFG4 un1_fine_sel_1lto7 ( .A(fine_sel_Z[2]), .B(un1_fine_sel_i_2), .C(un1_fine_sel_1lt7), .D(un1_fine_sel_i_2_0), .Y(un1_fine_sel_1_i) ); defparam un1_fine_sel_1lto7.INIT=16'h4000; // @55:128 CFG4 clr_flag_1_sqmuxa_2_0_a2 ( .A(N_134), .B(tune_st_Z[0]), .C(N_137_1), .D(N_97), .Y(clr_flag_1_sqmuxa_2) ); defparam clr_flag_1_sqmuxa_2_0_a2.INIT=16'h1000; // @55:197 CFG4 un10_fine_sel_ac0_5 ( .A(fine_sel_Z[2]), .B(fine_sel_Z[1]), .C(fine_sel_Z[0]), .D(fine_sel_Z[3]), .Y(un10_fine_sel_c4) ); defparam un10_fine_sel_ac0_5.INIT=16'hA800; // @55:197 CFG2 un10_fine_sel_axbxc3 ( .A(un10_fine_sel_c3), .B(fine_sel_Z[3]), .Y(un90_fine_sel_4[3]) ); defparam un10_fine_sel_axbxc3.INIT=4'h6; // @55:233 CFG3 un82_fine_sel_1_axbxc4 ( .A(fine_sel_Z[4]), .B(un82_fine_sel_1_c3), .C(fine_sel_Z[5]), .Y(un1_dll_90_code_6_5) ); defparam un82_fine_sel_1_axbxc4.INIT=8'h78; // @55:54 CFG2 un1_dll_90_code_1_axbxc4 ( .A(un1_dll_90_code_1_c4), .B(dll_90_code_Z[4]), .Y(un1_dll_90_code_1_axbxc4_Z) ); defparam un1_dll_90_code_1_axbxc4.INIT=4'h6; // @55:126 CFG2 \fine_sel_19_iv_2_RNO[5] ( .A(un68_fine_sel_cry_5_S), .B(fine_sel_1_sqmuxa_1_Z), .Y(un68_fine_sel_m[5]) ); defparam \fine_sel_19_iv_2_RNO[5] .INIT=4'h8; // @55:53 CFG4 \un1_dll_90_code_1.SUM[4] ( .A(dll_90_code_Z[4]), .B(CO1), .C(dll_90_code_Z[6]), .D(dll_90_code_Z[5]), .Y(N_195) ); defparam \un1_dll_90_code_1.SUM[4] .INIT=16'h78F0; // @55:126 CFG2 \fine_sel_19_iv_2_RNO[6] ( .A(un68_fine_sel_cry_6_S), .B(fine_sel_1_sqmuxa_1_Z), .Y(un68_fine_sel_m[6]) ); defparam \fine_sel_19_iv_2_RNO[6] .INIT=4'h8; // @55:126 CFG2 \fine_sel_19_iv_2_RNO[4] ( .A(un68_fine_sel_cry_4_S), .B(fine_sel_1_sqmuxa_1_Z), .Y(un68_fine_sel_m[4]) ); defparam \fine_sel_19_iv_2_RNO[4] .INIT=4'h8; // @55:126 CFG2 \fine_sel_19_iv_2_RNO[7] ( .A(un68_fine_sel_s_7_S), .B(fine_sel_1_sqmuxa_1_Z), .Y(un68_fine_sel_m[7]) ); defparam \fine_sel_19_iv_2_RNO[7] .INIT=4'h8; // @55:126 CFG2 \fine_sel_19_iv_2_RNO[0] ( .A(fine_sel_1_sqmuxa_1_Z), .B(un68_fine_sel_cry_0_Y), .Y(un68_fine_sel_m[0]) ); defparam \fine_sel_19_iv_2_RNO[0] .INIT=4'h8; // @0:405 CFG4 \un1_SWITCH_LANE9[0] ( .A(SWITCH_LANE9_0_Z), .B(SWITCH_LANE17_Z), .C(cdr_ready_reg_Z[3]), .D(N_97), .Y(un1_SWITCH_LANE9_Z[0]) ); defparam \un1_SWITCH_LANE9[0] .INIT=16'hCAC0; // @55:52 CFG4 \un1_dll_90_code_4_3[1] ( .A(coarse_sel_Z[0]), .B(coarse_sel_Z[1]), .C(dll_90_code_Z[1]), .D(N_6295_i), .Y(un1_dll_90_code_4_3_Z[1]) ); defparam \un1_dll_90_code_4_3[1] .INIT=16'h78E1; // @55:47 CFG4 \un1_dll_90_code_3_3[1] ( .A(coarse_sel_Z[0]), .B(coarse_sel_Z[1]), .C(dll_90_code_Z[1]), .D(N_6295_i), .Y(un1_dll_90_code_3_i[1]) ); defparam \un1_dll_90_code_3_3[1] .INIT=16'h4B87; // @55:126 CFG4 \fine_sel_19_iv_4[1] ( .A(un90_fine_sel_4[1]), .B(un90_fine_sel_cry_1_S), .C(fine_sel_0_sqmuxa_2_Z), .D(coarse_sel_2_sqmuxa_Z), .Y(fine_sel_19_iv_4_Z[1]) ); defparam \fine_sel_19_iv_4[1] .INIT=16'hECA0; // @55:126 CFG4 \fine_sel_19_iv_0[1] ( .A(fine_sel_0_sqmuxa), .B(dll_90_code_Z[2]), .C(fine_sel_1_sqmuxa_1_Z), .D(un68_fine_sel_cry_1_S), .Y(fine_sel_19_iv_0_Z[1]) ); defparam \fine_sel_19_iv_0[1] .INIT=16'hF888; // @55:126 CFG4 \fine_sel_19_iv_4[2] ( .A(un90_fine_sel_4[2]), .B(un90_fine_sel_cry_2_S), .C(fine_sel_0_sqmuxa_2_Z), .D(coarse_sel_2_sqmuxa_Z), .Y(fine_sel_19_iv_4_Z[2]) ); defparam \fine_sel_19_iv_4[2] .INIT=16'hECA0; // @55:126 CFG4 \fine_sel_19_iv_0[2] ( .A(dll_90_code_Z[3]), .B(fine_sel_0_sqmuxa), .C(fine_sel_1_sqmuxa_1_Z), .D(un68_fine_sel_cry_2_S), .Y(fine_sel_19_iv_0_Z[2]) ); defparam \fine_sel_19_iv_0[2] .INIT=16'hF888; // @55:126 CFG4 \fine_sel_19_iv_4[0] ( .A(un90_fine_sel_cry_0_Y), .B(fine_sel_Z[0]), .C(coarse_sel_2_sqmuxa_Z), .D(fine_sel_0_sqmuxa_2_Z), .Y(fine_sel_19_iv_4_Z[0]) ); defparam \fine_sel_19_iv_4[0] .INIT=16'hB3A0; // @55:126 CFG4 \fine_sel_19_iv_0[0] ( .A(fine_sel_0_sqmuxa), .B(fine_sel_3_sqmuxa_Z), .C(dll_90_code_Z[1]), .D(un41_fine_sel_cry_0_Y), .Y(fine_sel_19_iv_0_Z[0]) ); defparam \fine_sel_19_iv_0[0] .INIT=16'hECA0; // @55:126 CFG4 \fine_sel_19_iv_0[3] ( .A(fine_sel_3_sqmuxa_Z), .B(un41_fine_sel_cry_3_S), .C(dll_90_code_Z[4]), .D(fine_sel_0_sqmuxa), .Y(fine_sel_19_iv_0_Z[3]) ); defparam \fine_sel_19_iv_0[3] .INIT=16'hF888; // @55:126 CFG4 un1_SWITCH_LANE_0_sqmuxa_2_0_0 ( .A(CDR4_CNTL_TIP_0_SWITCH_LANE), .B(SWITCH_LANE17_Z), .C(tune_st_Z[1]), .D(tune_st_Z[0]), .Y(un1_SWITCH_LANE_0_sqmuxa_2_0_0_Z) ); defparam un1_SWITCH_LANE_0_sqmuxa_2_0_0.INIT=16'hFF15; // @55:126 CFG4 un1_fine_sel_2_sqmuxa ( .A(N_74), .B(N_137_1_i), .C(fine_sel_2_sqmuxa_Z), .D(fine_sel_0_sqmuxa_1_Z), .Y(un1_fine_sel_2_sqmuxa_Z) ); defparam un1_fine_sel_2_sqmuxa.INIT=16'hFFF7; // @55:126 CFG3 un1_tune_st_1_sqmuxa_i_o2 ( .A(un1_tune_st_1_sqmuxa_i_o2_0_Z), .B(N_93_3), .C(cnt_Z[3]), .Y(N_75) ); defparam un1_tune_st_1_sqmuxa_i_o2.INIT=8'hAE; // @55:126 CFG2 un1_coarse_sel_0_sqmuxa ( .A(un1_coarse_sel_0_sqmuxa_0_Z), .B(fine_sel_1_sqmuxa_1_Z), .Y(un1_coarse_sel_0_sqmuxa_Z) ); defparam un1_coarse_sel_0_sqmuxa.INIT=4'hE; // @55:197 CFG3 un10_fine_sel_axbxc4 ( .A(fine_sel_Z[3]), .B(un10_fine_sel_c3), .C(fine_sel_Z[4]), .Y(un90_fine_sel_4[4]) ); defparam un10_fine_sel_axbxc4.INIT=8'h78; // @55:55 CFG3 un1_dll_90_code_2_axbxc5 ( .A(dll_90_code_Z[5]), .B(dll_90_code_Z[4]), .C(un1_dll_90_code_2_ac0_7_a0_Z), .Y(un1_dll_90_code_2_axbxc5_Z) ); defparam un1_dll_90_code_2_axbxc5.INIT=8'h9A; // @55:55 CFG4 un1_dll_90_code_2_axbxc3 ( .A(dll_90_code_Z[3]), .B(dll_90_code_Z[1]), .C(N_6295_i), .D(dll_90_code_Z[2]), .Y(un1_dll_90_code_2_axbxc3_Z) ); defparam un1_dll_90_code_2_axbxc3.INIT=16'hAAA9; // @55:233 CFG4 un82_fine_sel_1_axbxc5 ( .A(fine_sel_Z[4]), .B(un82_fine_sel_1_c3), .C(fine_sel_Z[6]), .D(fine_sel_Z[5]), .Y(un1_dll_90_code_6_6) ); defparam un82_fine_sel_1_axbxc5.INIT=16'h78F0; // @55:54 CFG3 un1_dll_90_code_1_axbxc5 ( .A(dll_90_code_Z[4]), .B(un1_dll_90_code_1_c4), .C(dll_90_code_Z[5]), .Y(un1_dll_90_code_1_axbxc5_Z) ); defparam un1_dll_90_code_1_axbxc5.INIT=8'h78; // @55:117 CFG4 \tune_st_ns_0[0] ( .A(tune_st_Z[0]), .B(cnt_Z[3]), .C(N_93_3), .D(N_137_1), .Y(tune_st_ns[0]) ); defparam \tune_st_ns_0[0] .INIT=16'hBA10; // @55:126 CFG4 clr_flag_9_0 ( .A(clr_flag_9_0_a2_Z), .B(N_93_3), .C(cnt_Z[3]), .D(tune_st_Z[0]), .Y(clr_flag_9) ); defparam clr_flag_9_0.INIT=16'hAAAE; // @55:47 CFG4 \un1_dll_90_code_3_3_2[2] ( .A(un1_dll_90_code_2_axbxc2_Z), .B(un1_dll_90_code_1_axbxc2_Z), .C(coarse_sel_Z[0]), .D(coarse_sel_Z[1]), .Y(un1_dll_90_code_3_2[2]) ); defparam \un1_dll_90_code_3_3_2[2] .INIT=16'hAC00; // @55:126 CFG4 \fine_sel_19_iv_4[3] ( .A(un90_fine_sel_4[3]), .B(un90_fine_sel_cry_3_S), .C(fine_sel_0_sqmuxa_2_Z), .D(coarse_sel_2_sqmuxa_Z), .Y(fine_sel_19_iv_4_Z[3]) ); defparam \fine_sel_19_iv_4[3] .INIT=16'hECA0; // @55:197 CFG4 un10_fine_sel_axbxc5 ( .A(fine_sel_Z[3]), .B(un10_fine_sel_c3), .C(fine_sel_Z[5]), .D(fine_sel_Z[4]), .Y(un90_fine_sel_4[5]) ); defparam un10_fine_sel_axbxc5.INIT=16'h78F0; // @55:54 CFG4 un1_dll_90_code_1_axbxc6 ( .A(dll_90_code_Z[4]), .B(un1_dll_90_code_1_c4), .C(dll_90_code_Z[6]), .D(dll_90_code_Z[5]), .Y(un1_dll_90_code_1_axbxc6_Z) ); defparam un1_dll_90_code_1_axbxc6.INIT=16'h78F0; // @55:212 CFG4 un41_fine_sel_5_c4 ( .A(fine_sel_Z[4]), .B(fine_sel_Z[3]), .C(fine_sel_Z[2]), .D(fine_sel_Z[1]), .Y(un41_fine_sel_5_c4_Z) ); defparam un41_fine_sel_5_c4.INIT=16'hFFFE; // @55:126 CFG2 un1_tune_st_4_i_a2 ( .A(N_75), .B(tune_st_Z[0]), .Y(N_92_i) ); defparam un1_tune_st_4_i_a2.INIT=4'h2; // @55:117 CFG3 SWITCH_LANE_RNO ( .A(SWITCH_LANE17_Z), .B(un1_SWITCH_LANE9_Z[0]), .C(tune_st_Z[1]), .Y(SWITCH_LANE_RNO_Z) ); defparam SWITCH_LANE_RNO.INIT=8'hAC; // @55:126 CFG2 \fine_sel_19_iv_2_RNO[2] ( .A(un1_fine_sel_2_cry_2_0_S), .B(un1_fine_sel_2_sqmuxa_Z), .Y(un1_fine_sel_2_m[2]) ); defparam \fine_sel_19_iv_2_RNO[2] .INIT=4'h8; // @55:47 CFG4 \un1_dll_90_code_3_3[2] ( .A(coarse_sel_Z[0]), .B(dll_90_code_Z[2]), .C(un1_dll_90_code_3_2[2]), .D(coarse_sel_Z[1]), .Y(un1_dll_90_code_3_i[2]) ); defparam \un1_dll_90_code_3_3[2] .INIT=16'h0F09; // @55:126 CFG4 \fine_sel_19_iv_0[5] ( .A(fine_sel_0_sqmuxa), .B(dll_90_code_Z[6]), .C(un1_fine_sel_2_cry_5_0_S), .D(un1_fine_sel_2_sqmuxa_Z), .Y(fine_sel_19_iv_0_Z[5]) ); defparam \fine_sel_19_iv_0[5] .INIT=16'hF888; // @55:126 CFG4 \fine_sel_19_iv_0[6] ( .A(fine_sel_3_sqmuxa_Z), .B(un1_fine_sel_2_sqmuxa_Z), .C(un41_fine_sel_cry_6_S), .D(un1_fine_sel_2_cry_6_0_S), .Y(fine_sel_19_iv_0_Z[6]) ); defparam \fine_sel_19_iv_0[6] .INIT=16'hECA0; // @55:126 CFG4 \fine_sel_19_iv_0[7] ( .A(fine_sel_3_sqmuxa_Z), .B(un1_fine_sel_2_sqmuxa_Z), .C(un41_fine_sel_s_7_S), .D(un1_fine_sel_2_s_7_S), .Y(fine_sel_19_iv_0_Z[7]) ); defparam \fine_sel_19_iv_0[7] .INIT=16'hECA0; // @55:126 CFG4 \fine_sel_19_iv_2[2] ( .A(un41_fine_sel_cry_2_S), .B(fine_sel_3_sqmuxa_Z), .C(fine_sel_19_iv_0_Z[2]), .D(un1_fine_sel_2_m[2]), .Y(fine_sel_19_iv_2_Z[2]) ); defparam \fine_sel_19_iv_2[2] .INIT=16'hFFF8; // @55:126 CFG4 \fine_sel_19_iv_2[0] ( .A(un1_fine_sel_2_cry_0_Y), .B(un1_fine_sel_2_sqmuxa_Z), .C(un68_fine_sel_m[0]), .D(fine_sel_19_iv_0_Z[0]), .Y(fine_sel_19_iv_2_Z[0]) ); defparam \fine_sel_19_iv_2[0] .INIT=16'hFFF8; // @55:126 CFG4 \fine_sel_19_iv_1[3] ( .A(un1_fine_sel_2_sqmuxa_Z), .B(un1_fine_sel_2_cry_3_0_S), .C(fine_sel_1_sqmuxa_1_Z), .D(un68_fine_sel_cry_3_S), .Y(fine_sel_19_iv_1_Z[3]) ); defparam \fine_sel_19_iv_1[3] .INIT=16'hF888; // @55:126 CFG4 \fine_sel_19_iv_4[4] ( .A(un90_fine_sel_4[4]), .B(un90_fine_sel_cry_4_S), .C(fine_sel_0_sqmuxa_2_Z), .D(coarse_sel_2_sqmuxa_Z), .Y(fine_sel_19_iv_4_Z[4]) ); defparam \fine_sel_19_iv_4[4] .INIT=16'hECA0; // @55:126 CFG4 \fine_sel_19_iv_0[4] ( .A(fine_sel_0_sqmuxa), .B(dll_90_code_Z[5]), .C(un1_fine_sel_2_cry_4_0_S), .D(un1_fine_sel_2_sqmuxa_Z), .Y(fine_sel_19_iv_0_Z[4]) ); defparam \fine_sel_19_iv_0[4] .INIT=16'hF888; // @55:197 CFG4 un10_fine_sel_ac0_11 ( .A(fine_sel_Z[4]), .B(un10_fine_sel_c4), .C(fine_sel_Z[6]), .D(fine_sel_Z[5]), .Y(un10_fine_sel_c7) ); defparam un10_fine_sel_ac0_11.INIT=16'h8000; // @55:197 CFG4 un10_fine_sel_axbxc6 ( .A(fine_sel_Z[4]), .B(un10_fine_sel_c4), .C(fine_sel_Z[6]), .D(fine_sel_Z[5]), .Y(un90_fine_sel_4[6]) ); defparam un10_fine_sel_axbxc6.INIT=16'h78F0; // @55:55 CFG4 un1_dll_90_code_2_axbxc6 ( .A(dll_90_code_Z[6]), .B(dll_90_code_Z[5]), .C(dll_90_code_Z[4]), .D(un1_dll_90_code_2_ac0_7_a0_Z), .Y(un1_dll_90_code_2_axbxc6_Z) ); defparam un1_dll_90_code_2_axbxc6.INIT=16'hA9AA; // @55:55 CFG4 un1_dll_90_code_2_axbxc4 ( .A(dll_90_code_Z[2]), .B(un1_dll_90_code_2_c2_Z), .C(dll_90_code_Z[3]), .D(dll_90_code_Z[4]), .Y(un1_dll_90_code_2_axbxc4_Z) ); defparam un1_dll_90_code_2_axbxc4.INIT=16'hFE01; // @55:226 CFG3 un68_fine_sel_4_c5 ( .A(fine_sel_Z[3]), .B(un68_fine_sel_4_c3_Z), .C(fine_sel_Z[4]), .Y(un68_fine_sel_4_c5_Z) ); defparam un68_fine_sel_4_c5.INIT=8'hFE; // @55:117 CFG4 SWITCH_LANE_RNO_0 ( .A(tune_st_Z[0]), .B(tune_st_Z[1]), .C(un1_SWITCH_LANE_0_sqmuxa_2_0_0_Z), .D(un1_SWITCH_LANE9_Z[0]), .Y(un1_SWITCH_LANE_0_sqmuxa_2_i) ); defparam SWITCH_LANE_RNO_0.INIT=16'h1F0F; // @55:126 CFG4 \fine_sel_19_iv_4[5] ( .A(un90_fine_sel_4[5]), .B(un90_fine_sel_cry_5_S), .C(fine_sel_0_sqmuxa_2_Z), .D(coarse_sel_2_sqmuxa_Z), .Y(fine_sel_19_iv_4_Z[5]) ); defparam \fine_sel_19_iv_4[5] .INIT=16'hECA0; // @55:126 CFG3 \fine_sel_19_iv_3[2] ( .A(un1_dll_90_code_6_2), .B(fine_sel_19_iv_2_Z[2]), .C(fine_sel_2_sqmuxa_1_Z), .Y(fine_sel_19_iv_3_Z[2]) ); defparam \fine_sel_19_iv_3[2] .INIT=8'hEC; // @55:126 CFG3 \fine_sel_19_iv_3[0] ( .A(fine_sel_2_sqmuxa_1_Z), .B(fine_sel_Z[0]), .C(fine_sel_19_iv_2_Z[0]), .Y(fine_sel_19_iv_3_Z[0]) ); defparam \fine_sel_19_iv_3[0] .INIT=8'hF8; // @55:140 CFG3 \un1_cnt_5_1.CO1 ( .A(cnt_Z[1]), .B(cnt_Z[0]), .C(N_67), .Y(CO1_0) ); defparam \un1_cnt_5_1.CO1 .INIT=8'h08; // @55:126 CFG4 \coarse_sel_RNO[0] ( .A(coarse_sel_2_sqmuxa_Z), .B(fine_sel_1_sqmuxa_2_Z), .C(coarse_sel_Z[0]), .D(un1_coarse_sel_0_sqmuxa_Z), .Y(coarse_sel_RNO_Z[0]) ); defparam \coarse_sel_RNO[0] .INIT=16'h0F1E; // @55:126 CFG4 \fine_sel_19_iv_2[5] ( .A(fine_sel_3_sqmuxa_Z), .B(un41_fine_sel_cry_5_S), .C(un68_fine_sel_m[5]), .D(fine_sel_19_iv_0_Z[5]), .Y(fine_sel_19_iv_2_Z[5]) ); defparam \fine_sel_19_iv_2[5] .INIT=16'hFFF8; // @55:126 CFG4 \fine_sel_19_iv_3[6] ( .A(un90_fine_sel_4[6]), .B(un90_fine_sel_cry_6_S), .C(fine_sel_0_sqmuxa_2_Z), .D(coarse_sel_2_sqmuxa_Z), .Y(fine_sel_19_iv_3_Z[6]) ); defparam \fine_sel_19_iv_3[6] .INIT=16'hECA0; // @55:126 CFG4 \fine_sel_19_iv_2[6] ( .A(un68_fine_sel_m[6]), .B(un1_dll_90_code_6_6), .C(fine_sel_2_sqmuxa_1_Z), .D(fine_sel_19_iv_0_Z[6]), .Y(fine_sel_19_iv_2_Z[6]) ); defparam \fine_sel_19_iv_2[6] .INIT=16'hFFEA; // @55:126 CFG4 \fine_sel_19_iv_2[7] ( .A(un68_fine_sel_m[7]), .B(un1_dll_90_code_6_cry_7_Y), .C(fine_sel_2_sqmuxa_1_Z), .D(fine_sel_19_iv_0_Z[7]), .Y(fine_sel_19_iv_2_Z[7]) ); defparam \fine_sel_19_iv_2[7] .INIT=16'hFFBA; // @55:126 CFG4 \fine_sel_19_iv_3[3] ( .A(un1_dll_90_code_6_3), .B(fine_sel_19_iv_0_Z[3]), .C(fine_sel_19_iv_1_Z[3]), .D(fine_sel_2_sqmuxa_1_Z), .Y(fine_sel_19_iv_3_Z[3]) ); defparam \fine_sel_19_iv_3[3] .INIT=16'hFEFC; // @55:126 CFG4 \fine_sel_19_iv_2[4] ( .A(fine_sel_3_sqmuxa_Z), .B(un41_fine_sel_cry_4_S), .C(un68_fine_sel_m[4]), .D(fine_sel_19_iv_0_Z[4]), .Y(fine_sel_19_iv_2_Z[4]) ); defparam \fine_sel_19_iv_2[4] .INIT=16'hFFF8; // @55:126 CFG4 \coarse_sel_RNO[1] ( .A(coarse_sel_Z[0]), .B(coarse_sel_Z[1]), .C(un1_coarse_sel_0_sqmuxa_Z), .D(un1_fine_sel_1_sqmuxa_1_Z[0]), .Y(coarse_sel_RNO_Z[1]) ); defparam \coarse_sel_RNO[1] .INIT=16'h963C; // @55:126 CFG4 \cnt_9_iv[0] ( .A(clr_flag_1_sqmuxa_2), .B(cnt_Z[0]), .C(N_92_i), .D(N_67), .Y(cnt_9[0]) ); defparam \cnt_9_iv[0] .INIT=16'hAEAB; // @55:126 CFG4 \cnt_RNO[1] ( .A(cnt_Z[0]), .B(cnt_Z[1]), .C(N_92_i), .D(N_67), .Y(cnt_9[1]) ); defparam \cnt_RNO[1] .INIT=16'h0C06; // @55:126 CFG3 \fine_sel_19_iv_3[5] ( .A(un1_dll_90_code_6_5), .B(fine_sel_19_iv_2_Z[5]), .C(fine_sel_2_sqmuxa_1_Z), .Y(fine_sel_19_iv_3_Z[5]) ); defparam \fine_sel_19_iv_3[5] .INIT=8'hEC; // @55:126 CFG4 \fine_sel_19_iv_3[7] ( .A(un90_fine_sel_s_7_S), .B(un1_dll_90_code_5_cry_7_Y), .C(coarse_sel_2_sqmuxa_Z), .D(fine_sel_0_sqmuxa_2_Z), .Y(fine_sel_19_iv_3_Z[7]) ); defparam \fine_sel_19_iv_3[7] .INIT=16'hB3A0; // @55:126 CFG3 \fine_sel_19_iv_3[4] ( .A(un1_dll_90_code_6_4), .B(fine_sel_19_iv_2_Z[4]), .C(fine_sel_2_sqmuxa_1_Z), .Y(fine_sel_19_iv_3_Z[4]) ); defparam \fine_sel_19_iv_3[4] .INIT=8'hEC; // @55:126 CFG4 \fine_sel_19_iv[1] ( .A(fine_sel_19_iv_3_Z[1]), .B(fine_sel_19_iv_4_Z[1]), .C(un18_fine_sel_cry_1_S), .D(fine_sel_1_sqmuxa_2_Z), .Y(fine_sel_19[1]) ); defparam \fine_sel_19_iv[1] .INIT=16'hFEEE; // @55:126 CFG4 \fine_sel_19_iv[0] ( .A(fine_sel_19_iv_3_Z[0]), .B(fine_sel_19_iv_4_Z[0]), .C(un18_fine_sel_cry_0_Y), .D(fine_sel_1_sqmuxa_2_Z), .Y(fine_sel_19[0]) ); defparam \fine_sel_19_iv[0] .INIT=16'hFEEE; // @55:126 CFG4 \fine_sel_19_iv[2] ( .A(fine_sel_19_iv_3_Z[2]), .B(fine_sel_19_iv_4_Z[2]), .C(un18_fine_sel_cry_2_S), .D(fine_sel_1_sqmuxa_2_Z), .Y(fine_sel_19[2]) ); defparam \fine_sel_19_iv[2] .INIT=16'hFEEE; // @55:126 CFG3 \cnt_RNO[2] ( .A(N_92_i), .B(CO1_0), .C(cnt_Z[2]), .Y(cnt_9[2]) ); defparam \cnt_RNO[2] .INIT=8'h14; // @55:126 CFG4 \fine_sel_19_iv[3] ( .A(fine_sel_19_iv_3_Z[3]), .B(fine_sel_19_iv_4_Z[3]), .C(un18_fine_sel_cry_3_S), .D(fine_sel_1_sqmuxa_2_Z), .Y(fine_sel_19[3]) ); defparam \fine_sel_19_iv[3] .INIT=16'hFEEE; // @55:126 CFG4 \fine_sel_19_iv[6] ( .A(fine_sel_19_iv_2_Z[6]), .B(fine_sel_19_iv_3_Z[6]), .C(un18_fine_sel_cry_6_S), .D(fine_sel_1_sqmuxa_2_Z), .Y(fine_sel_19[6]) ); defparam \fine_sel_19_iv[6] .INIT=16'hFEEE; // @55:126 CFG4 \fine_sel_19_iv[7] ( .A(fine_sel_19_iv_2_Z[7]), .B(fine_sel_19_iv_3_Z[7]), .C(un18_fine_sel_s_7_S), .D(fine_sel_1_sqmuxa_2_Z), .Y(fine_sel_19[7]) ); defparam \fine_sel_19_iv[7] .INIT=16'hFEEE; // @55:126 CFG4 \cnt_RNO[3] ( .A(N_92_i), .B(CO1_0), .C(cnt_Z[2]), .D(cnt_Z[3]), .Y(cnt_9[3]) ); defparam \cnt_RNO[3] .INIT=16'h1540; // @55:126 CFG4 \fine_sel_19_iv[5] ( .A(fine_sel_19_iv_3_Z[5]), .B(fine_sel_19_iv_4_Z[5]), .C(un18_fine_sel_cry_5_S), .D(fine_sel_1_sqmuxa_2_Z), .Y(fine_sel_19[5]) ); defparam \fine_sel_19_iv[5] .INIT=16'hFEEE; // @55:126 CFG4 \fine_sel_19_iv[4] ( .A(fine_sel_19_iv_3_Z[4]), .B(fine_sel_19_iv_4_Z[4]), .C(un18_fine_sel_cry_4_S), .D(fine_sel_1_sqmuxa_2_Z), .Y(fine_sel_19[4]) ); defparam \fine_sel_19_iv[4] .INIT=16'hFEEE; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* CORECDR4_CNTL_TIP_0_1_2_3_3s_0s_4s_1s_1s_1 */ module PF_IOD_CDR_C0_PF_IOD_CDR_LANECTRL_OVERLAY_0_PF_IOD ( PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_B_SEL, SELB_LANE_net_0, SELA_LANE_net_0, PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLR_NEXT_CLK_N, PF_IOD_CDR_LANECTRL_OVERLAY_0_SWITCH, PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_10, PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_9, PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_8, CDR4_CNTL_TIP_0_SWITCH_LANE ) ; output [10:0] PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_B_SEL ; input [10:0] SELB_LANE_net_0 ; input [10:8] SELA_LANE_net_0 ; output PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLR_NEXT_CLK_N ; output PF_IOD_CDR_LANECTRL_OVERLAY_0_SWITCH ; output PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_10 ; output PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_9 ; output PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_8 ; input CDR4_CNTL_TIP_0_SWITCH_LANE ; wire PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLR_NEXT_CLK_N ; wire PF_IOD_CDR_LANECTRL_OVERLAY_0_SWITCH ; wire PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_10 ; wire PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_9 ; wire PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_8 ; wire CDR4_CNTL_TIP_0_SWITCH_LANE ; wire [9:0] RX_DATA_1; wire GND ; wire EYE_MONITOR_EARLY_1 ; wire EYE_MONITOR_LATE_1 ; wire DELAY_LINE_OUT_OF_RANGE_1 ; wire VCC ; wire TX_1 ; wire OE_0 ; wire DDR_DO_READ_1 ; wire TX_DATA_OUT_9_0 ; wire TX_DATA_OUT_8_0 ; wire AL_N_OUT_1 ; wire OUTFF_SL_OUT_1 ; wire OUTFF_EN_OUT_1 ; wire INFF_SL_OUT_1 ; wire INFF_EN_OUT_1 ; wire RX_CLK_OUT_1 ; wire TX_CLK_OUT_1 ; // @56:54 IOD I_IOD_0 ( .TX_DATA({SELB_LANE_net_0[7:1], GND}), .OE_DATA({SELA_LANE_net_0[10:8], GND}), .RX_BIT_SLIP(SELB_LANE_net_0[10]), .EYE_MONITOR_CLEAR_FLAGS(CDR4_CNTL_TIP_0_SWITCH_LANE), .DELAY_LINE_MOVE(SELB_LANE_net_0[8]), .DELAY_LINE_DIRECTION(SELB_LANE_net_0[9]), .DELAY_LINE_LOAD(SELB_LANE_net_0[0]), .RX_CLK(GND), .TX_CLK(GND), .ODT_EN(GND), .INFF_SL(GND), .INFF_EN(GND), .OUTFF_SL(GND), .OUTFF_EN(GND), .AL_N(GND), .OEFF_LAT_N(GND), .OEFF_SD_N(GND), .OEFF_AD_N(GND), .INFF_LAT_N(GND), .INFF_SD_N(GND), .INFF_AD_N(GND), .OUTFF_LAT_N(GND), .OUTFF_SD_N(GND), .OUTFF_AD_N(GND), .EYE_MONITOR_EARLY(EYE_MONITOR_EARLY_1), .EYE_MONITOR_LATE(EYE_MONITOR_LATE_1), .RX_DATA(RX_DATA_1[9:0]), .DELAY_LINE_OUT_OF_RANGE(DELAY_LINE_OUT_OF_RANGE_1), .RX_P(GND), .RX_N(GND), .TX_DATA_9(GND), .TX_DATA_8(GND), .ARST_N(VCC), .RX_SYNC_RST(VCC), .TX_SYNC_RST(VCC), .HS_IO_CLK({GND, GND, GND, GND, GND, GND}), .RX_DQS_90({GND, GND}), .TX_DQS(GND), .TX_DQS_270(GND), .FIFO_WR_PTR({GND, GND, GND}), .FIFO_RD_PTR({GND, GND, GND}), .TX(TX_1), .OE(OE_0), .CDR_CLK(GND), .CDR_NEXT_CLK(GND), .EYE_MONITOR_LANE_WIDTH({GND, GND, GND}), .DDR_DO_READ(DDR_DO_READ_1), .CDR_CLK_A_SEL_8(PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_8), .CDR_CLK_A_SEL_9(PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_9), .CDR_CLK_A_SEL_10(PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_10), .CDR_CLK_B_SEL(PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_B_SEL[10:0]), .SWITCH(PF_IOD_CDR_LANECTRL_OVERLAY_0_SWITCH), .CDR_CLR_NEXT_CLK_N(PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLR_NEXT_CLK_N), .TX_DATA_OUT_9(TX_DATA_OUT_9_0), .TX_DATA_OUT_8(TX_DATA_OUT_8_0), .AL_N_OUT(AL_N_OUT_1), .OUTFF_SL_OUT(OUTFF_SL_OUT_1), .OUTFF_EN_OUT(OUTFF_EN_OUT_1), .INFF_SL_OUT(INFF_SL_OUT_1), .INFF_EN_OUT(INFF_EN_OUT_1), .RX_CLK_OUT(RX_CLK_OUT_1), .TX_CLK_OUT(TX_CLK_OUT_1) ); defparam I_IOD_0.DATA_RATE=1250.0; defparam I_IOD_0.FORMAL_NAME="LANECTRL_OVERLAY"; defparam I_IOD_0.INTERFACE_NAME="CDR4"; defparam I_IOD_0.DELAY_LINE_SIMULATION_MODE="ENABLED"; defparam I_IOD_0.RESERVED_0=1'b0; defparam I_IOD_0.RX_CLK_EN=1'b0; defparam I_IOD_0.RX_CLK_INV=1'b0; defparam I_IOD_0.TX_CLK_EN=1'b0; defparam I_IOD_0.TX_CLK_INV=1'b0; defparam I_IOD_0.HS_IO_CLK_SEL=3'h0; defparam I_IOD_0.QDR_EN=1'b0; defparam I_IOD_0.EDGE_DETECT_EN=1'b0; defparam I_IOD_0.DELAY_LINE_MODE=2'h0; defparam I_IOD_0.RX_MODE=4'h0; defparam I_IOD_0.EYE_MONITOR_MODE=1'b0; defparam I_IOD_0.DYN_DELAY_LINE_EN=1'b0; defparam I_IOD_0.FIFO_WR_EN=1'b0; defparam I_IOD_0.EYE_MONITOR_EN=1'b0; defparam I_IOD_0.TX_MODE=7'h00; defparam I_IOD_0.TX_CLK_SEL=2'h0; defparam I_IOD_0.TX_OE_MODE=3'h7; defparam I_IOD_0.TX_OE_CLK_INV=1'b0; defparam I_IOD_0.RX_DELAY_VAL=7'h00; defparam I_IOD_0.RX_DELAY_VAL_X2=1'b0; defparam I_IOD_0.TX_DELAY_VAL=7'h00; defparam I_IOD_0.EYE_MONITOR_WIDTH=3'h2; defparam I_IOD_0.EYE_MONITOR_WIDTH_SRC=1'b0; defparam I_IOD_0.RESERVED_1=1'b0; defparam I_IOD_0.DISABLE_LANECTRL_RESET=1'b1; defparam I_IOD_0.INPUT_DELAY_SEL=2'h0; defparam I_IOD_0.OEFF_EN_INV=1'b0; defparam I_IOD_0.INFF_EN_INV=1'b0; defparam I_IOD_0.OUTFF_EN_INV=1'b0; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* PF_IOD_CDR_C0_PF_IOD_CDR_LANECTRL_OVERLAY_0_PF_IOD */ module PF_IOD_CDR_C0_PF_IOD_CDR_RX_N_0_PF_IOD ( PF_LANECTRL_0_FIFO_RD_PTR, PF_LANECTRL_0_FIFO_WR_PTR, PF_LANECTRL_0_CDR_CLK, PF_LANECTRL_0_TX_SYNC_RST, PF_LANECTRL_0_RX_SYNC_RST, PF_LANECTRL_0_ARST_N, IB_DIFF_CDR_0_Y, PF_IOD_CDR_RX_N_0_EYE_MONITOR_LATE_0, PF_IOD_CDR_C0_0_RX_CLK_R, CLR_FLAGS_N ) ; input [2:0] PF_LANECTRL_0_FIFO_RD_PTR ; input [2:0] PF_LANECTRL_0_FIFO_WR_PTR ; input PF_LANECTRL_0_CDR_CLK ; input PF_LANECTRL_0_TX_SYNC_RST ; input PF_LANECTRL_0_RX_SYNC_RST ; input PF_LANECTRL_0_ARST_N ; input IB_DIFF_CDR_0_Y ; output PF_IOD_CDR_RX_N_0_EYE_MONITOR_LATE_0 ; input PF_IOD_CDR_C0_0_RX_CLK_R ; input CLR_FLAGS_N ; wire PF_LANECTRL_0_CDR_CLK ; wire PF_LANECTRL_0_TX_SYNC_RST ; wire PF_LANECTRL_0_RX_SYNC_RST ; wire PF_LANECTRL_0_ARST_N ; wire IB_DIFF_CDR_0_Y ; wire PF_IOD_CDR_RX_N_0_EYE_MONITOR_LATE_0 ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire CLR_FLAGS_N ; wire [9:0] RX_DATA_2; wire [10:0] CDR_CLK_B_SEL_1; wire GND ; wire EYE_MONITOR_EARLY_2 ; wire DELAY_LINE_OUT_OF_RANGE_2 ; wire TX_2 ; wire OE_1 ; wire DDR_DO_READ_2 ; wire CDR_CLK_A_SEL_8_1 ; wire CDR_CLK_A_SEL_9_1 ; wire CDR_CLK_A_SEL_10_1 ; wire SWITCH_1 ; wire CDR_CLR_NEXT_CLK_N_1 ; wire TX_DATA_OUT_9_1 ; wire TX_DATA_OUT_8_1 ; wire AL_N_OUT_2 ; wire OUTFF_SL_OUT_2 ; wire OUTFF_EN_OUT_2 ; wire INFF_SL_OUT_2 ; wire INFF_EN_OUT_2 ; wire RX_CLK_OUT_2 ; wire TX_CLK_OUT_2 ; wire VCC ; // @57:48 IOD I_IOD_0 ( .TX_DATA({GND, GND, GND, GND, GND, GND, GND, GND}), .OE_DATA({GND, GND, GND, GND}), .RX_BIT_SLIP(GND), .EYE_MONITOR_CLEAR_FLAGS(CLR_FLAGS_N), .DELAY_LINE_MOVE(GND), .DELAY_LINE_DIRECTION(GND), .DELAY_LINE_LOAD(GND), .RX_CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .TX_CLK(GND), .ODT_EN(GND), .INFF_SL(GND), .INFF_EN(GND), .OUTFF_SL(GND), .OUTFF_EN(GND), .AL_N(GND), .OEFF_LAT_N(GND), .OEFF_SD_N(GND), .OEFF_AD_N(GND), .INFF_LAT_N(GND), .INFF_SD_N(GND), .INFF_AD_N(GND), .OUTFF_LAT_N(GND), .OUTFF_SD_N(GND), .OUTFF_AD_N(GND), .EYE_MONITOR_EARLY(EYE_MONITOR_EARLY_2), .EYE_MONITOR_LATE(PF_IOD_CDR_RX_N_0_EYE_MONITOR_LATE_0), .RX_DATA(RX_DATA_2[9:0]), .DELAY_LINE_OUT_OF_RANGE(DELAY_LINE_OUT_OF_RANGE_2), .RX_P(GND), .RX_N(IB_DIFF_CDR_0_Y), .TX_DATA_9(GND), .TX_DATA_8(GND), .ARST_N(PF_LANECTRL_0_ARST_N), .RX_SYNC_RST(PF_LANECTRL_0_RX_SYNC_RST), .TX_SYNC_RST(PF_LANECTRL_0_TX_SYNC_RST), .HS_IO_CLK({GND, GND, GND, GND, GND, GND}), .RX_DQS_90({GND, GND}), .TX_DQS(GND), .TX_DQS_270(GND), .FIFO_WR_PTR(PF_LANECTRL_0_FIFO_WR_PTR[2:0]), .FIFO_RD_PTR(PF_LANECTRL_0_FIFO_RD_PTR[2:0]), .TX(TX_2), .OE(OE_1), .CDR_CLK(PF_LANECTRL_0_CDR_CLK), .CDR_NEXT_CLK(GND), .EYE_MONITOR_LANE_WIDTH({GND, GND, GND}), .DDR_DO_READ(DDR_DO_READ_2), .CDR_CLK_A_SEL_8(CDR_CLK_A_SEL_8_1), .CDR_CLK_A_SEL_9(CDR_CLK_A_SEL_9_1), .CDR_CLK_A_SEL_10(CDR_CLK_A_SEL_10_1), .CDR_CLK_B_SEL(CDR_CLK_B_SEL_1[10:0]), .SWITCH(SWITCH_1), .CDR_CLR_NEXT_CLK_N(CDR_CLR_NEXT_CLK_N_1), .TX_DATA_OUT_9(TX_DATA_OUT_9_1), .TX_DATA_OUT_8(TX_DATA_OUT_8_1), .AL_N_OUT(AL_N_OUT_2), .OUTFF_SL_OUT(OUTFF_SL_OUT_2), .OUTFF_EN_OUT(OUTFF_EN_OUT_2), .INFF_SL_OUT(INFF_SL_OUT_2), .INFF_EN_OUT(INFF_EN_OUT_2), .RX_CLK_OUT(RX_CLK_OUT_2), .TX_CLK_OUT(TX_CLK_OUT_2) ); defparam I_IOD_0.DATA_RATE=1250.0; defparam I_IOD_0.FORMAL_NAME="RX_N:NO_IOD_N_SIDE"; defparam I_IOD_0.INTERFACE_NAME="CDR4"; defparam I_IOD_0.DELAY_LINE_SIMULATION_MODE="ENABLED"; defparam I_IOD_0.RESERVED_0=1'b0; defparam I_IOD_0.RX_CLK_EN=1'b1; defparam I_IOD_0.RX_CLK_INV=1'b0; defparam I_IOD_0.TX_CLK_EN=1'b0; defparam I_IOD_0.TX_CLK_INV=1'b0; defparam I_IOD_0.HS_IO_CLK_SEL=3'h6; defparam I_IOD_0.QDR_EN=1'b0; defparam I_IOD_0.EDGE_DETECT_EN=1'b0; defparam I_IOD_0.DELAY_LINE_MODE=2'h1; defparam I_IOD_0.RX_MODE=4'h5; defparam I_IOD_0.EYE_MONITOR_MODE=1'b0; defparam I_IOD_0.DYN_DELAY_LINE_EN=1'b0; defparam I_IOD_0.FIFO_WR_EN=1'b1; defparam I_IOD_0.EYE_MONITOR_EN=1'b1; defparam I_IOD_0.TX_MODE=7'h00; defparam I_IOD_0.TX_CLK_SEL=2'h0; defparam I_IOD_0.TX_OE_MODE=3'h7; defparam I_IOD_0.TX_OE_CLK_INV=1'b0; defparam I_IOD_0.RX_DELAY_VAL=7'h00; defparam I_IOD_0.RX_DELAY_VAL_X2=1'b0; defparam I_IOD_0.TX_DELAY_VAL=7'h00; defparam I_IOD_0.EYE_MONITOR_WIDTH=3'h6; defparam I_IOD_0.EYE_MONITOR_WIDTH_SRC=1'b0; defparam I_IOD_0.RESERVED_1=1'b0; defparam I_IOD_0.DISABLE_LANECTRL_RESET=1'b0; defparam I_IOD_0.INPUT_DELAY_SEL=2'h1; defparam I_IOD_0.OEFF_EN_INV=1'b0; defparam I_IOD_0.INFF_EN_INV=1'b0; defparam I_IOD_0.OUTFF_EN_INV=1'b0; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* PF_IOD_CDR_C0_PF_IOD_CDR_RX_N_0_PF_IOD */ module PF_IOD_CDR_C0_PF_IOD_CDR_RX_P_0_PF_IOD ( PF_LANECTRL_0_FIFO_RD_PTR, PF_LANECTRL_0_FIFO_WR_PTR, PF_IOD_CDR_C0_0_RX_DATA, PF_LANECTRL_0_CDR_CLK, PF_LANECTRL_0_TX_SYNC_RST, PF_LANECTRL_0_RX_SYNC_RST, PF_LANECTRL_0_ARST_N, IB_DIFF_CDR_0_Y, PF_IOD_CDR_RX_P_0_EYE_MONITOR_EARLY_0, PF_IOD_CDR_C0_0_RX_CLK_R, CLR_FLAGS_N ) ; input [2:0] PF_LANECTRL_0_FIFO_RD_PTR ; input [2:0] PF_LANECTRL_0_FIFO_WR_PTR ; output [9:0] PF_IOD_CDR_C0_0_RX_DATA ; input PF_LANECTRL_0_CDR_CLK ; input PF_LANECTRL_0_TX_SYNC_RST ; input PF_LANECTRL_0_RX_SYNC_RST ; input PF_LANECTRL_0_ARST_N ; input IB_DIFF_CDR_0_Y ; output PF_IOD_CDR_RX_P_0_EYE_MONITOR_EARLY_0 ; input PF_IOD_CDR_C0_0_RX_CLK_R ; input CLR_FLAGS_N ; wire PF_LANECTRL_0_CDR_CLK ; wire PF_LANECTRL_0_TX_SYNC_RST ; wire PF_LANECTRL_0_RX_SYNC_RST ; wire PF_LANECTRL_0_ARST_N ; wire IB_DIFF_CDR_0_Y ; wire PF_IOD_CDR_RX_P_0_EYE_MONITOR_EARLY_0 ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire CLR_FLAGS_N ; wire [10:0] CDR_CLK_B_SEL_2; wire GND ; wire EYE_MONITOR_LATE_2 ; wire DELAY_LINE_OUT_OF_RANGE_3 ; wire TX_3 ; wire OE_2 ; wire DDR_DO_READ_3 ; wire CDR_CLK_A_SEL_8_2 ; wire CDR_CLK_A_SEL_9_2 ; wire CDR_CLK_A_SEL_10_2 ; wire SWITCH_2 ; wire CDR_CLR_NEXT_CLK_N_2 ; wire TX_DATA_OUT_9_2 ; wire TX_DATA_OUT_8_2 ; wire AL_N_OUT_3 ; wire OUTFF_SL_OUT_3 ; wire OUTFF_EN_OUT_3 ; wire INFF_SL_OUT_3 ; wire INFF_EN_OUT_3 ; wire RX_CLK_OUT_3 ; wire TX_CLK_OUT_3 ; wire VCC ; // @58:50 IOD I_IOD_0 ( .TX_DATA({GND, GND, GND, GND, GND, GND, GND, GND}), .OE_DATA({GND, GND, GND, GND}), .RX_BIT_SLIP(GND), .EYE_MONITOR_CLEAR_FLAGS(CLR_FLAGS_N), .DELAY_LINE_MOVE(GND), .DELAY_LINE_DIRECTION(GND), .DELAY_LINE_LOAD(GND), .RX_CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .TX_CLK(GND), .ODT_EN(GND), .INFF_SL(GND), .INFF_EN(GND), .OUTFF_SL(GND), .OUTFF_EN(GND), .AL_N(GND), .OEFF_LAT_N(GND), .OEFF_SD_N(GND), .OEFF_AD_N(GND), .INFF_LAT_N(GND), .INFF_SD_N(GND), .INFF_AD_N(GND), .OUTFF_LAT_N(GND), .OUTFF_SD_N(GND), .OUTFF_AD_N(GND), .EYE_MONITOR_EARLY(PF_IOD_CDR_RX_P_0_EYE_MONITOR_EARLY_0), .EYE_MONITOR_LATE(EYE_MONITOR_LATE_2), .RX_DATA(PF_IOD_CDR_C0_0_RX_DATA[9:0]), .DELAY_LINE_OUT_OF_RANGE(DELAY_LINE_OUT_OF_RANGE_3), .RX_P(IB_DIFF_CDR_0_Y), .RX_N(GND), .TX_DATA_9(GND), .TX_DATA_8(GND), .ARST_N(PF_LANECTRL_0_ARST_N), .RX_SYNC_RST(PF_LANECTRL_0_RX_SYNC_RST), .TX_SYNC_RST(PF_LANECTRL_0_TX_SYNC_RST), .HS_IO_CLK({GND, GND, GND, GND, GND, GND}), .RX_DQS_90({GND, GND}), .TX_DQS(GND), .TX_DQS_270(GND), .FIFO_WR_PTR(PF_LANECTRL_0_FIFO_WR_PTR[2:0]), .FIFO_RD_PTR(PF_LANECTRL_0_FIFO_RD_PTR[2:0]), .TX(TX_3), .OE(OE_2), .CDR_CLK(PF_LANECTRL_0_CDR_CLK), .CDR_NEXT_CLK(GND), .EYE_MONITOR_LANE_WIDTH({GND, GND, GND}), .DDR_DO_READ(DDR_DO_READ_3), .CDR_CLK_A_SEL_8(CDR_CLK_A_SEL_8_2), .CDR_CLK_A_SEL_9(CDR_CLK_A_SEL_9_2), .CDR_CLK_A_SEL_10(CDR_CLK_A_SEL_10_2), .CDR_CLK_B_SEL(CDR_CLK_B_SEL_2[10:0]), .SWITCH(SWITCH_2), .CDR_CLR_NEXT_CLK_N(CDR_CLR_NEXT_CLK_N_2), .TX_DATA_OUT_9(TX_DATA_OUT_9_2), .TX_DATA_OUT_8(TX_DATA_OUT_8_2), .AL_N_OUT(AL_N_OUT_3), .OUTFF_SL_OUT(OUTFF_SL_OUT_3), .OUTFF_EN_OUT(OUTFF_EN_OUT_3), .INFF_SL_OUT(INFF_SL_OUT_3), .INFF_EN_OUT(INFF_EN_OUT_3), .RX_CLK_OUT(RX_CLK_OUT_3), .TX_CLK_OUT(TX_CLK_OUT_3) ); defparam I_IOD_0.DATA_RATE=1250.0; defparam I_IOD_0.FORMAL_NAME="RX_P:NO_IOD_N_SIDE"; defparam I_IOD_0.INTERFACE_NAME="CDR4"; defparam I_IOD_0.DELAY_LINE_SIMULATION_MODE="ENABLED"; defparam I_IOD_0.RESERVED_0=1'b0; defparam I_IOD_0.RX_CLK_EN=1'b1; defparam I_IOD_0.RX_CLK_INV=1'b0; defparam I_IOD_0.TX_CLK_EN=1'b0; defparam I_IOD_0.TX_CLK_INV=1'b0; defparam I_IOD_0.HS_IO_CLK_SEL=3'h6; defparam I_IOD_0.QDR_EN=1'b0; defparam I_IOD_0.EDGE_DETECT_EN=1'b0; defparam I_IOD_0.DELAY_LINE_MODE=2'h1; defparam I_IOD_0.RX_MODE=4'h5; defparam I_IOD_0.EYE_MONITOR_MODE=1'b0; defparam I_IOD_0.DYN_DELAY_LINE_EN=1'b0; defparam I_IOD_0.FIFO_WR_EN=1'b1; defparam I_IOD_0.EYE_MONITOR_EN=1'b1; defparam I_IOD_0.TX_MODE=7'h00; defparam I_IOD_0.TX_CLK_SEL=2'h0; defparam I_IOD_0.TX_OE_MODE=3'h7; defparam I_IOD_0.TX_OE_CLK_INV=1'b0; defparam I_IOD_0.RX_DELAY_VAL=7'h00; defparam I_IOD_0.RX_DELAY_VAL_X2=1'b0; defparam I_IOD_0.TX_DELAY_VAL=7'h00; defparam I_IOD_0.EYE_MONITOR_WIDTH=3'h5; defparam I_IOD_0.EYE_MONITOR_WIDTH_SRC=1'b0; defparam I_IOD_0.RESERVED_1=1'b0; defparam I_IOD_0.DISABLE_LANECTRL_RESET=1'b0; defparam I_IOD_0.INPUT_DELAY_SEL=2'h0; defparam I_IOD_0.OEFF_EN_INV=1'b0; defparam I_IOD_0.INFF_EN_INV=1'b0; defparam I_IOD_0.OUTFF_EN_INV=1'b0; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* PF_IOD_CDR_C0_PF_IOD_CDR_RX_P_0_PF_IOD */ module PF_IOD_CDR_C0_PF_IOD_CDR_TX_0_PF_IOD ( CORETSE_0_TCG, PF_IOD_CDR_TX_0_TX_0, PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_0, PF_LANECTRL_0_TX_SYNC_RST, PF_LANECTRL_0_RX_SYNC_RST, PF_LANECTRL_0_ARST_N, PF_IOD_CDR_CCC_C0_0_TX_CLK_G ) ; input [9:0] CORETSE_0_TCG ; output PF_IOD_CDR_TX_0_TX_0 ; input PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_0 ; input PF_LANECTRL_0_TX_SYNC_RST ; input PF_LANECTRL_0_RX_SYNC_RST ; input PF_LANECTRL_0_ARST_N ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire PF_IOD_CDR_TX_0_TX_0 ; wire PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_0 ; wire PF_LANECTRL_0_TX_SYNC_RST ; wire PF_LANECTRL_0_RX_SYNC_RST ; wire PF_LANECTRL_0_ARST_N ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire [9:0] RX_DATA; wire [10:0] CDR_CLK_B_SEL; wire [9:0] RX_DATA_0; wire [10:0] CDR_CLK_B_SEL_0; wire VCC ; wire GND ; wire EYE_MONITOR_EARLY ; wire EYE_MONITOR_LATE ; wire DELAY_LINE_OUT_OF_RANGE ; wire tx_data_0_9 ; wire tx_data_0_8 ; wire OE_3 ; wire DDR_DO_READ ; wire CDR_CLK_A_SEL_8 ; wire CDR_CLK_A_SEL_9 ; wire CDR_CLK_A_SEL_10 ; wire SWITCH ; wire CDR_CLR_NEXT_CLK_N ; wire TX_DATA_OUT_9 ; wire TX_DATA_OUT_8 ; wire AL_N_OUT ; wire OUTFF_SL_OUT ; wire OUTFF_EN_OUT ; wire INFF_SL_OUT ; wire INFF_EN_OUT ; wire RX_CLK_OUT ; wire TX_CLK_OUT ; wire EYE_MONITOR_EARLY_0 ; wire EYE_MONITOR_LATE_0 ; wire DELAY_LINE_OUT_OF_RANGE_0 ; wire TX_0 ; wire OE ; wire DDR_DO_READ_0 ; wire CDR_CLK_A_SEL_8_0 ; wire CDR_CLK_A_SEL_9_0 ; wire CDR_CLK_A_SEL_10_0 ; wire SWITCH_0 ; wire CDR_CLR_NEXT_CLK_N_0 ; wire AL_N_OUT_0 ; wire OUTFF_SL_OUT_0 ; wire OUTFF_EN_OUT_0 ; wire INFF_SL_OUT_0 ; wire INFF_EN_OUT_0 ; wire RX_CLK_OUT_0 ; wire TX_CLK_OUT_0 ; // @59:79 IOD I_IOD_0 ( .TX_DATA(CORETSE_0_TCG[7:0]), .OE_DATA({VCC, VCC, VCC, VCC}), .RX_BIT_SLIP(GND), .EYE_MONITOR_CLEAR_FLAGS(GND), .DELAY_LINE_MOVE(GND), .DELAY_LINE_DIRECTION(GND), .DELAY_LINE_LOAD(GND), .RX_CLK(GND), .TX_CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .ODT_EN(GND), .INFF_SL(GND), .INFF_EN(GND), .OUTFF_SL(GND), .OUTFF_EN(GND), .AL_N(GND), .OEFF_LAT_N(GND), .OEFF_SD_N(GND), .OEFF_AD_N(GND), .INFF_LAT_N(GND), .INFF_SD_N(GND), .INFF_AD_N(GND), .OUTFF_LAT_N(GND), .OUTFF_SD_N(GND), .OUTFF_AD_N(GND), .EYE_MONITOR_EARLY(EYE_MONITOR_EARLY), .EYE_MONITOR_LATE(EYE_MONITOR_LATE), .RX_DATA(RX_DATA[9:0]), .DELAY_LINE_OUT_OF_RANGE(DELAY_LINE_OUT_OF_RANGE), .RX_P(GND), .RX_N(GND), .TX_DATA_9(tx_data_0_9), .TX_DATA_8(tx_data_0_8), .ARST_N(PF_LANECTRL_0_ARST_N), .RX_SYNC_RST(PF_LANECTRL_0_RX_SYNC_RST), .TX_SYNC_RST(PF_LANECTRL_0_TX_SYNC_RST), .HS_IO_CLK({GND, GND, GND, GND, GND, PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_0}), .RX_DQS_90({GND, GND}), .TX_DQS(GND), .TX_DQS_270(GND), .FIFO_WR_PTR({GND, GND, GND}), .FIFO_RD_PTR({GND, GND, GND}), .TX(PF_IOD_CDR_TX_0_TX_0), .OE(OE_3), .CDR_CLK(GND), .CDR_NEXT_CLK(GND), .EYE_MONITOR_LANE_WIDTH({GND, GND, GND}), .DDR_DO_READ(DDR_DO_READ), .CDR_CLK_A_SEL_8(CDR_CLK_A_SEL_8), .CDR_CLK_A_SEL_9(CDR_CLK_A_SEL_9), .CDR_CLK_A_SEL_10(CDR_CLK_A_SEL_10), .CDR_CLK_B_SEL(CDR_CLK_B_SEL[10:0]), .SWITCH(SWITCH), .CDR_CLR_NEXT_CLK_N(CDR_CLR_NEXT_CLK_N), .TX_DATA_OUT_9(TX_DATA_OUT_9), .TX_DATA_OUT_8(TX_DATA_OUT_8), .AL_N_OUT(AL_N_OUT), .OUTFF_SL_OUT(OUTFF_SL_OUT), .OUTFF_EN_OUT(OUTFF_EN_OUT), .INFF_SL_OUT(INFF_SL_OUT), .INFF_EN_OUT(INFF_EN_OUT), .RX_CLK_OUT(RX_CLK_OUT), .TX_CLK_OUT(TX_CLK_OUT) ); defparam I_IOD_0.DATA_RATE=1250.0; defparam I_IOD_0.FORMAL_NAME="TX:NO_IOD_N_SIDE"; defparam I_IOD_0.INTERFACE_NAME="CDR4"; defparam I_IOD_0.DELAY_LINE_SIMULATION_MODE="ENABLED"; defparam I_IOD_0.RESERVED_0=1'b0; defparam I_IOD_0.RX_CLK_EN=1'b0; defparam I_IOD_0.RX_CLK_INV=1'b0; defparam I_IOD_0.TX_CLK_EN=1'b1; defparam I_IOD_0.TX_CLK_INV=1'b0; defparam I_IOD_0.HS_IO_CLK_SEL=3'h0; defparam I_IOD_0.QDR_EN=1'b0; defparam I_IOD_0.EDGE_DETECT_EN=1'b0; defparam I_IOD_0.DELAY_LINE_MODE=2'h0; defparam I_IOD_0.RX_MODE=4'h0; defparam I_IOD_0.EYE_MONITOR_MODE=1'b0; defparam I_IOD_0.DYN_DELAY_LINE_EN=1'b0; defparam I_IOD_0.FIFO_WR_EN=1'b0; defparam I_IOD_0.EYE_MONITOR_EN=1'b0; defparam I_IOD_0.TX_MODE=7'h45; defparam I_IOD_0.TX_CLK_SEL=2'h1; defparam I_IOD_0.TX_OE_MODE=3'h0; defparam I_IOD_0.TX_OE_CLK_INV=1'b0; defparam I_IOD_0.RX_DELAY_VAL=7'h00; defparam I_IOD_0.RX_DELAY_VAL_X2=1'b0; defparam I_IOD_0.TX_DELAY_VAL=7'h00; defparam I_IOD_0.EYE_MONITOR_WIDTH=3'h2; defparam I_IOD_0.EYE_MONITOR_WIDTH_SRC=1'b0; defparam I_IOD_0.RESERVED_1=1'b0; defparam I_IOD_0.DISABLE_LANECTRL_RESET=1'b0; defparam I_IOD_0.INPUT_DELAY_SEL=2'h0; defparam I_IOD_0.OEFF_EN_INV=1'b0; defparam I_IOD_0.INFF_EN_INV=1'b0; defparam I_IOD_0.OUTFF_EN_INV=1'b0; // @59:40 IOD I_IOD_98_0 ( .TX_DATA({CORETSE_0_TCG[9:8], GND, GND, GND, GND, GND, GND}), .OE_DATA({GND, GND, GND, GND}), .RX_BIT_SLIP(GND), .EYE_MONITOR_CLEAR_FLAGS(GND), .DELAY_LINE_MOVE(GND), .DELAY_LINE_DIRECTION(GND), .DELAY_LINE_LOAD(GND), .RX_CLK(GND), .TX_CLK(GND), .ODT_EN(GND), .INFF_SL(GND), .INFF_EN(GND), .OUTFF_SL(GND), .OUTFF_EN(GND), .AL_N(GND), .OEFF_LAT_N(GND), .OEFF_SD_N(GND), .OEFF_AD_N(GND), .INFF_LAT_N(GND), .INFF_SD_N(GND), .INFF_AD_N(GND), .OUTFF_LAT_N(GND), .OUTFF_SD_N(GND), .OUTFF_AD_N(GND), .EYE_MONITOR_EARLY(EYE_MONITOR_EARLY_0), .EYE_MONITOR_LATE(EYE_MONITOR_LATE_0), .RX_DATA(RX_DATA_0[9:0]), .DELAY_LINE_OUT_OF_RANGE(DELAY_LINE_OUT_OF_RANGE_0), .RX_P(GND), .RX_N(GND), .TX_DATA_9(GND), .TX_DATA_8(GND), .ARST_N(VCC), .RX_SYNC_RST(GND), .TX_SYNC_RST(GND), .HS_IO_CLK({GND, GND, GND, GND, GND, GND}), .RX_DQS_90({GND, GND}), .TX_DQS(GND), .TX_DQS_270(GND), .FIFO_WR_PTR({GND, GND, GND}), .FIFO_RD_PTR({GND, GND, GND}), .TX(TX_0), .OE(OE), .CDR_CLK(GND), .CDR_NEXT_CLK(GND), .EYE_MONITOR_LANE_WIDTH({GND, GND, GND}), .DDR_DO_READ(DDR_DO_READ_0), .CDR_CLK_A_SEL_8(CDR_CLK_A_SEL_8_0), .CDR_CLK_A_SEL_9(CDR_CLK_A_SEL_9_0), .CDR_CLK_A_SEL_10(CDR_CLK_A_SEL_10_0), .CDR_CLK_B_SEL(CDR_CLK_B_SEL_0[10:0]), .SWITCH(SWITCH_0), .CDR_CLR_NEXT_CLK_N(CDR_CLR_NEXT_CLK_N_0), .TX_DATA_OUT_9(tx_data_0_9), .TX_DATA_OUT_8(tx_data_0_8), .AL_N_OUT(AL_N_OUT_0), .OUTFF_SL_OUT(OUTFF_SL_OUT_0), .OUTFF_EN_OUT(OUTFF_EN_OUT_0), .INFF_SL_OUT(INFF_SL_OUT_0), .INFF_EN_OUT(INFF_EN_OUT_0), .RX_CLK_OUT(RX_CLK_OUT_0), .TX_CLK_OUT(TX_CLK_OUT_0) ); defparam I_IOD_98_0.DATA_RATE=1250.0; defparam I_IOD_98_0.FORMAL_NAME="TX:NO_IOD_N_SIDE"; defparam I_IOD_98_0.INTERFACE_NAME="CDR4"; defparam I_IOD_98_0.DELAY_LINE_SIMULATION_MODE="ENABLED"; defparam I_IOD_98_0.RESERVED_0=1'b0; defparam I_IOD_98_0.RX_CLK_EN=1'b0; defparam I_IOD_98_0.RX_CLK_INV=1'b0; defparam I_IOD_98_0.TX_CLK_EN=1'b1; defparam I_IOD_98_0.TX_CLK_INV=1'b0; defparam I_IOD_98_0.HS_IO_CLK_SEL=3'h0; defparam I_IOD_98_0.QDR_EN=1'b0; defparam I_IOD_98_0.EDGE_DETECT_EN=1'b0; defparam I_IOD_98_0.DELAY_LINE_MODE=2'h0; defparam I_IOD_98_0.RX_MODE=4'h0; defparam I_IOD_98_0.EYE_MONITOR_MODE=1'b0; defparam I_IOD_98_0.DYN_DELAY_LINE_EN=1'b0; defparam I_IOD_98_0.FIFO_WR_EN=1'b0; defparam I_IOD_98_0.EYE_MONITOR_EN=1'b0; defparam I_IOD_98_0.TX_MODE=7'h45; defparam I_IOD_98_0.TX_CLK_SEL=2'h1; defparam I_IOD_98_0.TX_OE_MODE=3'h0; defparam I_IOD_98_0.TX_OE_CLK_INV=1'b0; defparam I_IOD_98_0.RX_DELAY_VAL=7'h00; defparam I_IOD_98_0.RX_DELAY_VAL_X2=1'b0; defparam I_IOD_98_0.TX_DELAY_VAL=7'h00; defparam I_IOD_98_0.EYE_MONITOR_WIDTH=3'h2; defparam I_IOD_98_0.EYE_MONITOR_WIDTH_SRC=1'b0; defparam I_IOD_98_0.RESERVED_1=1'b0; defparam I_IOD_98_0.DISABLE_LANECTRL_RESET=1'b0; defparam I_IOD_98_0.INPUT_DELAY_SEL=2'h0; defparam I_IOD_98_0.OEFF_EN_INV=1'b0; defparam I_IOD_98_0.INFF_EN_INV=1'b0; defparam I_IOD_98_0.OUTFF_EN_INV=1'b0; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* PF_IOD_CDR_C0_PF_IOD_CDR_TX_0_PF_IOD */ module PF_IOD_CDR_C0_PF_LANECTRL_0_PF_LANECTRL ( PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_B_SEL, PF_LANECTRL_0_FIFO_RD_PTR, PF_LANECTRL_0_FIFO_WR_PTR, SELA_LANE_net_0, PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLR_NEXT_CLK_N, PF_IOD_CDR_LANECTRL_OVERLAY_0_SWITCH, PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_10, PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_9, PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_8, PF_LANECTRL_0_TX_SYNC_RST, PF_LANECTRL_0_RX_SYNC_RST, PF_LANECTRL_0_ARST_N, PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_270, PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_180, PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_90, PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_0, PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_PAUSE, PF_IOD_CDR_C0_0_RX_CLK_R, PF_LANECTRL_0_CLK_OUT_R, AND2_2_Y, PF_LANECTRL_0_CDR_CLK ) ; input [10:0] PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_B_SEL ; output [2:0] PF_LANECTRL_0_FIFO_RD_PTR ; output [2:0] PF_LANECTRL_0_FIFO_WR_PTR ; input [7:0] SELA_LANE_net_0 ; input PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLR_NEXT_CLK_N ; input PF_IOD_CDR_LANECTRL_OVERLAY_0_SWITCH ; input PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_10 ; input PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_9 ; input PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_8 ; output PF_LANECTRL_0_TX_SYNC_RST ; output PF_LANECTRL_0_RX_SYNC_RST ; output PF_LANECTRL_0_ARST_N ; input PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_270 ; input PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_180 ; input PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_90 ; input PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_0 ; input PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_PAUSE ; input PF_IOD_CDR_C0_0_RX_CLK_R ; output PF_LANECTRL_0_CLK_OUT_R ; input AND2_2_Y ; output PF_LANECTRL_0_CDR_CLK ; wire PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLR_NEXT_CLK_N ; wire PF_IOD_CDR_LANECTRL_OVERLAY_0_SWITCH ; wire PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_10 ; wire PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_9 ; wire PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_8 ; wire PF_LANECTRL_0_TX_SYNC_RST ; wire PF_LANECTRL_0_RX_SYNC_RST ; wire PF_LANECTRL_0_ARST_N ; wire PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_270 ; wire PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_180 ; wire PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_90 ; wire PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_0 ; wire PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_PAUSE ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire PF_LANECTRL_0_CLK_OUT_R ; wire AND2_2_Y ; wire PF_LANECTRL_0_CDR_CLK ; wire [2:0] EYE_MONITOR_WIDTH_OUT; wire [1:0] RX_DQS_90; wire CDR_CLK ; wire AND2_2_Y_data_i ; wire GND ; wire RX_DATA_VALID ; wire RX_BURST_DETECT ; wire RX_DELAY_LINE_OUT_OF_RANGE ; wire TX_DELAY_LINE_OUT_OF_RANGE ; wire PF_LANECTRL_0_A_OUT_RST_N ; wire ODT_EN_SEL ; wire TX_DQS ; wire TX_DQS_270 ; wire CDR_NEXT_CLK ; wire ODT_EN_OUT ; wire VCC ; CLKINT CDR_CLK_netprop_RNIOKAJ4 ( .Y(PF_LANECTRL_0_CDR_CLK), .A(CDR_CLK) ); CFG1 I_LANECTRL_RNO ( .A(AND2_2_Y), .Y(AND2_2_Y_data_i) ); defparam I_LANECTRL_RNO.INIT=2'h1; //@62:2433 //@62:2433 // @61:72 LANECTRL I_LANECTRL ( .FAB_CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .RESET(AND2_2_Y_data_i), .DDR_READ(GND), .READ_CLK_SEL({GND, GND, GND}), .DELAY_LINE_SEL(GND), .DELAY_LINE_LOAD(GND), .DELAY_LINE_DIRECTION(GND), .DELAY_LINE_MOVE(GND), .HS_IO_CLK_PAUSE(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_PAUSE), .DIV_CLK_EN_N(GND), .RX_BIT_SLIP(GND), .CDR_CLK_A_SEL(SELA_LANE_net_0[7:0]), .EYE_MONITOR_WIDTH_IN({GND, GND, GND}), .ODT_EN(GND), .CODE_UPDATE(GND), .RX_DATA_VALID(RX_DATA_VALID), .RX_BURST_DETECT(RX_BURST_DETECT), .RX_DELAY_LINE_OUT_OF_RANGE(RX_DELAY_LINE_OUT_OF_RANGE), .TX_DELAY_LINE_OUT_OF_RANGE(TX_DELAY_LINE_OUT_OF_RANGE), .CLK_OUT_R(PF_LANECTRL_0_CLK_OUT_R), .A_OUT_RST_N(PF_LANECTRL_0_A_OUT_RST_N), .DQS(GND), .DQS_N(GND), .HS_IO_CLK({GND, GND, PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_270, PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_180, PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_90, PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_0}), .DLL_CODE({GND, GND, GND, GND, GND, GND, GND, GND}), .EYE_MONITOR_WIDTH_OUT(EYE_MONITOR_WIDTH_OUT[2:0]), .ODT_EN_SEL(ODT_EN_SEL), .RX_DQS_90(RX_DQS_90[1:0]), .TX_DQS(TX_DQS), .TX_DQS_270(TX_DQS_270), .FIFO_WR_PTR(PF_LANECTRL_0_FIFO_WR_PTR[2:0]), .FIFO_RD_PTR(PF_LANECTRL_0_FIFO_RD_PTR[2:0]), .CDR_CLK(CDR_CLK), .CDR_NEXT_CLK(CDR_NEXT_CLK), .ARST_N(PF_LANECTRL_0_ARST_N), .RX_SYNC_RST(PF_LANECTRL_0_RX_SYNC_RST), .TX_SYNC_RST(PF_LANECTRL_0_TX_SYNC_RST), .ODT_EN_OUT(ODT_EN_OUT), .DDR_DO_READ(GND), .CDR_CLK_A_SEL_8(PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_8), .CDR_CLK_A_SEL_9(PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_9), .CDR_CLK_A_SEL_10(PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_10), .CDR_CLK_B_SEL(PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_B_SEL[10:0]), .SWITCH(PF_IOD_CDR_LANECTRL_OVERLAY_0_SWITCH), .CDR_CLR_NEXT_CLK_N(PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLR_NEXT_CLK_N) ); defparam I_LANECTRL.DATA_RATE=800.0; defparam I_LANECTRL.FORMAL_NAME="CDR4"; defparam I_LANECTRL.INTERFACE_NAME="CDR4"; defparam I_LANECTRL.DELAY_LINE_SIMULATION_MODE="ENABLED"; defparam I_LANECTRL.RESERVED_0=1'b0; defparam I_LANECTRL.RESERVED_1=1'b0; defparam I_LANECTRL.RESERVED_2=1'b0; defparam I_LANECTRL.SOFTRESET_EN=1'b0; defparam I_LANECTRL.SOFTRESET=1'b0; defparam I_LANECTRL.RX_DQS_DELAY_LINE_EN=1'b1; defparam I_LANECTRL.TX_DQS_DELAY_LINE_EN=1'b1; defparam I_LANECTRL.RX_DQS_DELAY_LINE_DIRECTION=1'b1; defparam I_LANECTRL.TX_DQS_DELAY_LINE_DIRECTION=1'b1; defparam I_LANECTRL.RX_DQS_DELAY_VAL=8'h10; defparam I_LANECTRL.TX_DQS_DELAY_VAL=8'h01; defparam I_LANECTRL.FIFO_EN=1'b1; defparam I_LANECTRL.FIFO_MODE=1'b0; defparam I_LANECTRL.FIFO_RD_PTR_MODE=3'h3; defparam I_LANECTRL.DQS_MODE=3'h3; defparam I_LANECTRL.CDR_EN=2'h2; defparam I_LANECTRL.HS_IO_CLK_SEL=9'h1FF; defparam I_LANECTRL.DLL_CODE_SEL=2'h0; defparam I_LANECTRL.CDR_CLK_SEL=12'h688; defparam I_LANECTRL.READ_MARGIN_TEST_EN=1'b1; defparam I_LANECTRL.WRITE_MARGIN_TEST_EN=1'b0; defparam I_LANECTRL.CDR_CLK_DIV=3'h5; defparam I_LANECTRL.DIV_CLK_SEL=2'h0; defparam I_LANECTRL.HS_IO_CLK_PAUSE_EN=1'b1; defparam I_LANECTRL.QDR_EN=1'b0; defparam I_LANECTRL.DYN_ODT_MODE=1'b0; defparam I_LANECTRL.DIV_CLK_EN_SRC=2'h3; defparam I_LANECTRL.RANK_2_MODE=1'b0; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* PF_IOD_CDR_C0_PF_LANECTRL_0_PF_LANECTRL */ module PF_IOD_CDR_C0 ( CORETSE_0_TCG, PF_IOD_CDR_C0_0_RX_DATA, PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_DELAY_CODE, AND2_2_Y, PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_PAUSE, PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_90, PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_180, PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_270, PF_IOD_CDR_CCC_C0_0_TX_CLK_G, PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_0, cdr_start, SSDetect_0_stream_start, PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_VALID_CODE, TX_P, TX_N, RX_P, RX_N, PF_IOD_CDR_C0_0_RX_CLK_R ) ; input [9:0] CORETSE_0_TCG ; output [9:0] PF_IOD_CDR_C0_0_RX_DATA ; input [6:0] PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_DELAY_CODE ; input AND2_2_Y ; input PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_PAUSE ; input PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_90 ; input PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_180 ; input PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_270 ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; input PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_0 ; input cdr_start ; input SSDetect_0_stream_start ; input PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_VALID_CODE ; output TX_P ; output TX_N ; input RX_P ; input RX_N ; output PF_IOD_CDR_C0_0_RX_CLK_R ; wire AND2_2_Y ; wire PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_PAUSE ; wire PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_90 ; wire PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_180 ; wire PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_270 ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_0 ; wire cdr_start ; wire SSDetect_0_stream_start ; wire PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_VALID_CODE ; wire TX_P ; wire TX_N ; wire RX_P ; wire RX_N ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire [10:0] SELA_LANE_net_0; wire [10:0] SELB_LANE_net_0; wire [10:0] PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_B_SEL; wire [2:0] PF_LANECTRL_0_FIFO_RD_PTR; wire [2:0] PF_LANECTRL_0_FIFO_WR_PTR; wire PF_IOD_CDR_C0_0_RX_CLK_R_i ; wire IB_DIFF_CDR_0_Y ; wire PF_LANECTRL_0_CLK_OUT_R ; wire PF_IOD_CDR_TX_0_TX_0 ; wire PF_IOD_CDR_RX_P_0_EYE_MONITOR_EARLY_0 ; wire PF_IOD_CDR_RX_N_0_EYE_MONITOR_LATE_0 ; wire CDR4_CNTL_TIP_0_SWITCH_LANE ; wire CLR_FLAGS_N ; wire PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLR_NEXT_CLK_N ; wire PF_IOD_CDR_LANECTRL_OVERLAY_0_SWITCH ; wire PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_10 ; wire PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_9 ; wire PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_8 ; wire PF_LANECTRL_0_CDR_CLK ; wire PF_LANECTRL_0_TX_SYNC_RST ; wire PF_LANECTRL_0_RX_SYNC_RST ; wire PF_LANECTRL_0_ARST_N ; wire GND ; wire VCC ; CFG1 RCLKINT_0_RNIUMA3 ( .A(PF_IOD_CDR_C0_0_RX_CLK_R), .Y(PF_IOD_CDR_C0_0_RX_CLK_R_i) ); defparam RCLKINT_0_RNIUMA3.INIT=2'h1; // @62:2338 INBUF_DIFF IB_DIFF_CDR_0 ( .Y(IB_DIFF_CDR_0_Y), .PADN(RX_N), .PADP(RX_P) ); // @62:2464 RCLKINT RCLKINT_0 ( .Y(PF_IOD_CDR_C0_0_RX_CLK_R), .A(PF_LANECTRL_0_CLK_OUT_R) ); // @62:2347 (* SLEW="0" *) OUTBUF_DIFF OB_DIFF_CDR_0 ( .PADN(TX_N), .PADP(TX_P), .D(PF_IOD_CDR_TX_0_TX_0) ); defparam OB_DIFF_CDR_0.SLEW=2'h0; // @62:2318 CORECDR4_CNTL_TIP_0_1_2_3_3s_0s_4s_1s_1s_1 CDR4_CNTL_TIP_0 ( .SELA_LANE_net_0(SELA_LANE_net_0[10:0]), .SELB_LANE_net_0(SELB_LANE_net_0[10:0]), .PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_DELAY_CODE(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_DELAY_CODE[6:0]), .PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_VALID_CODE(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_VALID_CODE), .PF_IOD_CDR_RX_P_0_EYE_MONITOR_EARLY_0(PF_IOD_CDR_RX_P_0_EYE_MONITOR_EARLY_0), .PF_IOD_CDR_RX_N_0_EYE_MONITOR_LATE_0(PF_IOD_CDR_RX_N_0_EYE_MONITOR_LATE_0), .SSDetect_0_stream_start(SSDetect_0_stream_start), .PF_IOD_CDR_C0_0_RX_CLK_R(PF_IOD_CDR_C0_0_RX_CLK_R), .cdr_start(cdr_start), .CDR4_CNTL_TIP_0_SWITCH_LANE(CDR4_CNTL_TIP_0_SWITCH_LANE), .PF_IOD_CDR_C0_0_RX_CLK_R_i(PF_IOD_CDR_C0_0_RX_CLK_R_i), .CLR_FLAGS_N_1z(CLR_FLAGS_N) ); // @62:2356 PF_IOD_CDR_C0_PF_IOD_CDR_LANECTRL_OVERLAY_0_PF_IOD PF_IOD_CDR_LANECTRL_OVERLAY_0 ( .PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_B_SEL(PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_B_SEL[10:0]), .SELB_LANE_net_0(SELB_LANE_net_0[10:0]), .SELA_LANE_net_0(SELA_LANE_net_0[10:8]), .PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLR_NEXT_CLK_N(PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLR_NEXT_CLK_N), .PF_IOD_CDR_LANECTRL_OVERLAY_0_SWITCH(PF_IOD_CDR_LANECTRL_OVERLAY_0_SWITCH), .PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_10(PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_10), .PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_9(PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_9), .PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_8(PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_8), .CDR4_CNTL_TIP_0_SWITCH_LANE(CDR4_CNTL_TIP_0_SWITCH_LANE) ); // @62:2378 PF_IOD_CDR_C0_PF_IOD_CDR_RX_N_0_PF_IOD PF_IOD_CDR_RX_N_0 ( .PF_LANECTRL_0_FIFO_RD_PTR(PF_LANECTRL_0_FIFO_RD_PTR[2:0]), .PF_LANECTRL_0_FIFO_WR_PTR(PF_LANECTRL_0_FIFO_WR_PTR[2:0]), .PF_LANECTRL_0_CDR_CLK(PF_LANECTRL_0_CDR_CLK), .PF_LANECTRL_0_TX_SYNC_RST(PF_LANECTRL_0_TX_SYNC_RST), .PF_LANECTRL_0_RX_SYNC_RST(PF_LANECTRL_0_RX_SYNC_RST), .PF_LANECTRL_0_ARST_N(PF_LANECTRL_0_ARST_N), .IB_DIFF_CDR_0_Y(IB_DIFF_CDR_0_Y), .PF_IOD_CDR_RX_N_0_EYE_MONITOR_LATE_0(PF_IOD_CDR_RX_N_0_EYE_MONITOR_LATE_0), .PF_IOD_CDR_C0_0_RX_CLK_R(PF_IOD_CDR_C0_0_RX_CLK_R), .CLR_FLAGS_N(CLR_FLAGS_N) ); // @62:2397 PF_IOD_CDR_C0_PF_IOD_CDR_RX_P_0_PF_IOD PF_IOD_CDR_RX_P_0 ( .PF_LANECTRL_0_FIFO_RD_PTR(PF_LANECTRL_0_FIFO_RD_PTR[2:0]), .PF_LANECTRL_0_FIFO_WR_PTR(PF_LANECTRL_0_FIFO_WR_PTR[2:0]), .PF_IOD_CDR_C0_0_RX_DATA(PF_IOD_CDR_C0_0_RX_DATA[9:0]), .PF_LANECTRL_0_CDR_CLK(PF_LANECTRL_0_CDR_CLK), .PF_LANECTRL_0_TX_SYNC_RST(PF_LANECTRL_0_TX_SYNC_RST), .PF_LANECTRL_0_RX_SYNC_RST(PF_LANECTRL_0_RX_SYNC_RST), .PF_LANECTRL_0_ARST_N(PF_LANECTRL_0_ARST_N), .IB_DIFF_CDR_0_Y(IB_DIFF_CDR_0_Y), .PF_IOD_CDR_RX_P_0_EYE_MONITOR_EARLY_0(PF_IOD_CDR_RX_P_0_EYE_MONITOR_EARLY_0), .PF_IOD_CDR_C0_0_RX_CLK_R(PF_IOD_CDR_C0_0_RX_CLK_R), .CLR_FLAGS_N(CLR_FLAGS_N) ); // @62:2417 PF_IOD_CDR_C0_PF_IOD_CDR_TX_0_PF_IOD PF_IOD_CDR_TX_0 ( .CORETSE_0_TCG(CORETSE_0_TCG[9:0]), .PF_IOD_CDR_TX_0_TX_0(PF_IOD_CDR_TX_0_TX_0), .PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_0(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_0), .PF_LANECTRL_0_TX_SYNC_RST(PF_LANECTRL_0_TX_SYNC_RST), .PF_LANECTRL_0_RX_SYNC_RST(PF_LANECTRL_0_RX_SYNC_RST), .PF_LANECTRL_0_ARST_N(PF_LANECTRL_0_ARST_N), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G) ); // @62:2433 PF_IOD_CDR_C0_PF_LANECTRL_0_PF_LANECTRL PF_LANECTRL_0 ( .PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_B_SEL(PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_B_SEL[10:0]), .PF_LANECTRL_0_FIFO_RD_PTR(PF_LANECTRL_0_FIFO_RD_PTR[2:0]), .PF_LANECTRL_0_FIFO_WR_PTR(PF_LANECTRL_0_FIFO_WR_PTR[2:0]), .SELA_LANE_net_0(SELA_LANE_net_0[7:0]), .PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLR_NEXT_CLK_N(PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLR_NEXT_CLK_N), .PF_IOD_CDR_LANECTRL_OVERLAY_0_SWITCH(PF_IOD_CDR_LANECTRL_OVERLAY_0_SWITCH), .PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_10(PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_10), .PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_9(PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_9), .PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_8(PF_IOD_CDR_LANECTRL_OVERLAY_0_CDR_CLK_A_SEL_8), .PF_LANECTRL_0_TX_SYNC_RST(PF_LANECTRL_0_TX_SYNC_RST), .PF_LANECTRL_0_RX_SYNC_RST(PF_LANECTRL_0_RX_SYNC_RST), .PF_LANECTRL_0_ARST_N(PF_LANECTRL_0_ARST_N), .PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_270(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_270), .PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_180(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_180), .PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_90(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_90), .PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_0(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_0), .PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_PAUSE(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_PAUSE), .PF_IOD_CDR_C0_0_RX_CLK_R(PF_IOD_CDR_C0_0_RX_CLK_R), .PF_LANECTRL_0_CLK_OUT_R(PF_LANECTRL_0_CLK_OUT_R), .AND2_2_Y(AND2_2_Y), .PF_LANECTRL_0_CDR_CLK(PF_LANECTRL_0_CDR_CLK) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* PF_IOD_CDR_C0 */ module PF_IOD_CDR_CCC_C0_PF_CCC_0_PF_CCC ( PF_CCC_0_DLL_CODE, PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_270, PF_CCC_0_DLL_DELAY_DIFF, DLL_LOCK, PF_COREDELAYCODE_TIP_0_dll_code_upd, INBUF_DIFF_0_Y, PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_PLL_LOCK, dff, PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_90, PF_CCC_0_OUT0_0, PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_180, PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_0 ) ; output [7:0] PF_CCC_0_DLL_CODE ; output PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_270 ; output PF_CCC_0_DLL_DELAY_DIFF ; output DLL_LOCK ; input PF_COREDELAYCODE_TIP_0_dll_code_upd ; input INBUF_DIFF_0_Y ; output PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_PLL_LOCK ; input dff ; output PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_90 ; output PF_CCC_0_OUT0_0 ; output PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_180 ; output PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_0 ; wire PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_270 ; wire PF_CCC_0_DLL_DELAY_DIFF ; wire DLL_LOCK ; wire PF_COREDELAYCODE_TIP_0_dll_code_upd ; wire INBUF_DIFF_0_Y ; wire PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_PLL_LOCK ; wire dff ; wire PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_90 ; wire PF_CCC_0_OUT0_0 ; wire PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_180 ; wire PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_0 ; wire [7:0] SSCG_WAVE_TABLE_ADDR; wire [32:0] DRI_RDATA; wire [32:0] DRI_RDATA_0; wire Y ; wire dll_inst_0_OUT2_REF_CLK ; wire pll_inst_0_hs_io_clk_7 ; wire VCC ; wire GND ; wire DELAY_LINE_OUT_OF_RANGE_4 ; wire pll_inst_0_hs_io_clk_15 ; wire DRI_INTERRUPT ; wire CLK_MOVE_DONE ; wire CODE_MOVE_DONE ; wire CLK_0 ; wire CLK_1 ; wire DRI_INTERRUPT_0 ; CLKINT hs_io_clk_3_RNIOKET2 ( .Y(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_0), .A(Y) ); // @64:120 HS_IO_CLK hs_io_clk_11 ( .A(dll_inst_0_OUT2_REF_CLK), .Y(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_180) ); // @64:118 HS_IO_CLK hs_io_clk_3 ( .A(PF_CCC_0_OUT0_0), .Y(Y) ); // @64:116 HS_IO_CLK hs_io_clk_7 ( .A(pll_inst_0_hs_io_clk_7), .Y(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_90) ); // @64:87 PLL pll_inst_0 ( .POWERDOWN_N(dff), .OUT0_EN(VCC), .OUT1_EN(VCC), .OUT2_EN(VCC), .OUT3_EN(VCC), .REF_CLK_SEL(GND), .BYPASS_EN_N(VCC), .LOAD_PHASE_N(VCC), .SSCG_WAVE_TABLE({GND, GND, GND, GND, GND, GND, GND, GND}), .PHASE_DIRECTION(GND), .PHASE_ROTATE(GND), .PHASE_OUT0_SEL(GND), .PHASE_OUT1_SEL(GND), .PHASE_OUT2_SEL(GND), .PHASE_OUT3_SEL(GND), .DELAY_LINE_MOVE(GND), .DELAY_LINE_DIRECTION(GND), .DELAY_LINE_WIDE(GND), .DELAY_LINE_LOAD(VCC), .LOCK(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_PLL_LOCK), .SSCG_WAVE_TABLE_ADDR(SSCG_WAVE_TABLE_ADDR[7:0]), .DELAY_LINE_OUT_OF_RANGE(DELAY_LINE_OUT_OF_RANGE_4), .REFCLK_SYNC_EN(GND), .REF_CLK_0(INBUF_DIFF_0_Y), .REF_CLK_1(GND), .FB_CLK(GND), .OUT0(PF_CCC_0_OUT0_0), .OUT1(pll_inst_0_hs_io_clk_7), .OUT2(dll_inst_0_OUT2_REF_CLK), .OUT3(pll_inst_0_hs_io_clk_15), .DRI_CLK(GND), .DRI_CTRL({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND}), .DRI_WDATA({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND}), .DRI_ARST_N(VCC), .DRI_RDATA(DRI_RDATA[32:0]), .DRI_INTERRUPT(DRI_INTERRUPT) ); defparam pll_inst_0.VCOFREQUENCY=5000; defparam pll_inst_0.DELAY_LINE_SIMULATION_MODE=""; defparam pll_inst_0.DATA_RATE=0.0; defparam pll_inst_0.FORMAL_NAME=""; defparam pll_inst_0.INTERFACE_NAME=""; defparam pll_inst_0.INTERFACE_LEVEL=3'h0; defparam pll_inst_0.SOFTRESET=1'b0; defparam pll_inst_0.SOFT_POWERDOWN_N=1'b1; defparam pll_inst_0.RFDIV_EN=1'b1; defparam pll_inst_0.OUT0_DIV_EN=1'b1; defparam pll_inst_0.OUT1_DIV_EN=1'b1; defparam pll_inst_0.OUT2_DIV_EN=1'b1; defparam pll_inst_0.OUT3_DIV_EN=1'b1; defparam pll_inst_0.SOFT_REF_CLK_SEL=1'b0; defparam pll_inst_0.RESET_ON_LOCK=1'b1; defparam pll_inst_0.BYPASS_CLK_SEL=4'h0; defparam pll_inst_0.BYPASS_GO_EN_N=1'b1; defparam pll_inst_0.BYPASS_PLL=4'h0; defparam pll_inst_0.BYPASS_OUT_DIVIDER=4'h0; defparam pll_inst_0.FF_REQUIRES_LOCK=1'b0; defparam pll_inst_0.FSE_N=1'b0; defparam pll_inst_0.FB_CLK_SEL_0=2'h0; defparam pll_inst_0.FB_CLK_SEL_1=1'b0; defparam pll_inst_0.RFDIV=6'h01; defparam pll_inst_0.FRAC_EN=1'b0; defparam pll_inst_0.FRAC_DAC_EN=1'b0; defparam pll_inst_0.DIV0_RST_DELAY=3'h0; defparam pll_inst_0.DIV0_VAL=7'h02; defparam pll_inst_0.DIV1_RST_DELAY=3'h0; defparam pll_inst_0.DIV1_VAL=7'h02; defparam pll_inst_0.DIV2_RST_DELAY=3'h1; defparam pll_inst_0.DIV2_VAL=7'h02; defparam pll_inst_0.DIV3_RST_DELAY=3'h1; defparam pll_inst_0.DIV3_VAL=7'h02; defparam pll_inst_0.DIV3_CLK_SEL=1'b0; defparam pll_inst_0.BW_INT_CTRL=2'h0; defparam pll_inst_0.BW_PROP_CTRL=2'h1; defparam pll_inst_0.IREF_EN=1'b1; defparam pll_inst_0.IREF_TOGGLE=1'b0; defparam pll_inst_0.LOCK_CNT=4'h8; defparam pll_inst_0.DESKEW_CAL_CNT=3'h6; defparam pll_inst_0.DESKEW_CAL_EN=1'b1; defparam pll_inst_0.DESKEW_CAL_BYPASS=1'b0; defparam pll_inst_0.SYNC_REF_DIV_EN=1'b0; defparam pll_inst_0.SYNC_REF_DIV_EN_2=1'b0; defparam pll_inst_0.OUT0_PHASE_SEL=3'h0; defparam pll_inst_0.OUT1_PHASE_SEL=3'h4; defparam pll_inst_0.OUT2_PHASE_SEL=3'h0; defparam pll_inst_0.OUT3_PHASE_SEL=3'h4; defparam pll_inst_0.SOFT_LOAD_PHASE_N=1'b1; defparam pll_inst_0.SSM_DIV_VAL=6'h01; defparam pll_inst_0.FB_FRAC_VAL=24'h000000; defparam pll_inst_0.SSM_SPREAD_MODE=1'b0; defparam pll_inst_0.SSM_MODULATION=5'h05; defparam pll_inst_0.FB_INT_VAL=12'h028; defparam pll_inst_0.SSM_EN_N=1'b1; defparam pll_inst_0.SSM_EXT_WAVE_EN=2'h0; defparam pll_inst_0.SSM_EXT_WAVE_MAX_ADDR=8'h00; defparam pll_inst_0.SSM_RANDOM_EN=1'b0; defparam pll_inst_0.SSM_RANDOM_PATTERN_SEL=2'h0; defparam pll_inst_0.CDMUX0_SEL=2'h0; defparam pll_inst_0.CDMUX1_SEL=1'b1; defparam pll_inst_0.CDMUX2_SEL=1'b0; defparam pll_inst_0.CDELAY0_SEL=8'h00; defparam pll_inst_0.CDELAY0_EN=1'b0; defparam pll_inst_0.DRI_EN=1'b1; // @64:47 DLL dll_inst_0 ( .POWERDOWN_N(VCC), .DIR(GND), .CLK_MOVE(GND), .CODE_MOVE(GND), .ALU_HOLD(GND), .CODE_UPDATE(PF_COREDELAYCODE_TIP_0_dll_code_upd), .PHASE_LOAD(GND), .CLK_MOVE_DONE(CLK_MOVE_DONE), .CODE_MOVE_DONE(CODE_MOVE_DONE), .LOCK(DLL_LOCK), .DELAY_DIFF(PF_CCC_0_DLL_DELAY_DIFF), .CODE(PF_CCC_0_DLL_CODE[7:0]), .REF_CLK(dll_inst_0_OUT2_REF_CLK), .FB_CLK(GND), .CLK_0(CLK_0), .CLK_1(CLK_1), .DRI_CLK(GND), .DRI_CTRL({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND}), .DRI_WDATA({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND}), .DRI_ARST_N(VCC), .DRI_RDATA(DRI_RDATA_0[32:0]), .DRI_INTERRUPT(DRI_INTERRUPT_0) ); defparam dll_inst_0.DATA_RATE=0.0; defparam dll_inst_0.FORMAL_NAME=""; defparam dll_inst_0.INTERFACE_LEVEL=""; defparam dll_inst_0.SOFTRESET=1'b0; defparam dll_inst_0.PRIMARY_PHASE=2'h0; defparam dll_inst_0.SECONDARY_PHASE=2'h0; defparam dll_inst_0.PRIMARY_CLK_SEL=2'h0; defparam dll_inst_0.SECONDARY_CLK_SEL=2'h0; defparam dll_inst_0.REF_SEL=1'b0; defparam dll_inst_0.FB_SEL=1'b1; defparam dll_inst_0.DIV_SEL=1'b0; defparam dll_inst_0.SECONDARY_FINE_PHASE=3'h4; defparam dll_inst_0.ALU_UPDATE=2'h0; defparam dll_inst_0.PHASE_CODE_SEL=3'h4; defparam dll_inst_0.LOCK_TOLERANCE=2'h0; defparam dll_inst_0.LOCK_HIGH=4'h0; defparam dll_inst_0.LOCK_LOW=4'h0; defparam dll_inst_0.SET_ALU=8'h00; defparam dll_inst_0.ADJ_DEL4=7'h00; defparam dll_inst_0.RESERVED_0=1'b0; defparam dll_inst_0.ADJ_CODE=7'h00; defparam dll_inst_0.INIT_CODE=6'h00; defparam dll_inst_0.FAST_RELOCK=1'b0; defparam dll_inst_0.POWERDOWN_EN=1'b0; defparam dll_inst_0.RESET=1'b0; defparam dll_inst_0.SOFT_ALU_HOLD=1'b0; defparam dll_inst_0.SOFT_CODE_UPDATE=1'b1; defparam dll_inst_0.SOFT_LOCK_DBG=2'h0; defparam dll_inst_0.SOFT_LOCK_FRC=1'b0; defparam dll_inst_0.SOFT_PHASE_DIRECTION=1'b0; defparam dll_inst_0.SOFT_PHASE_LOAD=1'b0; defparam dll_inst_0.SOFT_PHASE_MOVE_CLK=1'b0; defparam dll_inst_0.SOFT_MOVE_CODE=1'b0; defparam dll_inst_0.TEST_RING=1'b0; defparam dll_inst_0.DELAY_DIFF_RANGE=3'h0; defparam dll_inst_0.DRI_EN=1'b1; // @64:35 HS_IO_CLK hs_io_clk_15 ( .A(pll_inst_0_hs_io_clk_15), .Y(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_270) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* PF_IOD_CDR_CCC_C0_PF_CCC_0_PF_CCC */ module PF_IOD_CDR_CCC_C0_PF_CLK_DIV_0_PF_CLK_DIV ( PF_CCC_0_OUT0_0, PF_IOD_CDR_CCC_C0_0_TX_CLK_G ) ; input PF_CCC_0_OUT0_0 ; output PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire PF_CCC_0_OUT0_0 ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire Y_DIV ; wire VCC ; wire GND ; CLKINT I_CD_RNITH9N3 ( .Y(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .A(Y_DIV) ); // @65:14 ICB_CLKDIV I_CD ( .RST_N(VCC), .BIT_SLIP(GND), .A(PF_CCC_0_OUT0_0), .Y_DIV(Y_DIV) ); defparam I_CD.DIVIDER=3'h5; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* PF_IOD_CDR_CCC_C0_PF_CLK_DIV_0_PF_CLK_DIV */ module COREDELAYCODE_TIP ( PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_DELAY_CODE, PF_LANECTRL_CORE_READER_0_RX_DELAY_LINE_OUT_OF_RANGE, PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_PLL_LOCK, dff, PF_CCC_0_DLL_DELAY_DIFF, DLL_LOCK, PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_VALID_CODE, PF_COREDELAYCODE_TIP_0_move_lane, PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_PAUSE, cdr_start_1z, PF_COREDELAYCODE_TIP_0_dll_code_upd, PF_COREDELAYCODE_TIP_0_load_lane, PF_IOD_CDR_CCC_C0_0_TX_CLK_G, PF_COREDELAYCODE_TIP_0_reset_lane_i ) ; output [6:0] PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_DELAY_CODE ; input PF_LANECTRL_CORE_READER_0_RX_DELAY_LINE_OUT_OF_RANGE ; input PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_PLL_LOCK ; input dff ; input PF_CCC_0_DLL_DELAY_DIFF ; input DLL_LOCK ; output PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_VALID_CODE ; output PF_COREDELAYCODE_TIP_0_move_lane ; output PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_PAUSE ; output cdr_start_1z ; output PF_COREDELAYCODE_TIP_0_dll_code_upd ; output PF_COREDELAYCODE_TIP_0_load_lane ; input PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; output PF_COREDELAYCODE_TIP_0_reset_lane_i ; wire PF_LANECTRL_CORE_READER_0_RX_DELAY_LINE_OUT_OF_RANGE ; wire PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_PLL_LOCK ; wire dff ; wire PF_CCC_0_DLL_DELAY_DIFF ; wire DLL_LOCK ; wire PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_VALID_CODE ; wire PF_COREDELAYCODE_TIP_0_move_lane ; wire PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_PAUSE ; wire cdr_start_1z ; wire PF_COREDELAYCODE_TIP_0_dll_code_upd ; wire PF_COREDELAYCODE_TIP_0_load_lane ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire PF_COREDELAYCODE_TIP_0_reset_lane_i ; wire [6:0] move_cnt_Z; wire [1:0] rst_b_Z; wire [6:0] move_cnt_s; wire [1:0] lock_sync_Z; wire [1:0] state_Z; wire [0:0] state_ns; wire [1:1] start_cnt_Z; wire [1:0] diff_sync_Z; wire [0:0] state_RNI4M5KC_S; wire [0:0] state_RNI4M5KC_Y; wire [5:0] move_cnt_cry; wire [0:0] move_cnt_RNIS937V_Y; wire [1:1] move_cnt_RNILU0QH1_Y; wire [2:2] move_cnt_RNIFKUC42_Y; wire [3:3] move_cnt_RNIABSVM2_Y; wire [4:4] move_cnt_RNI63QI93_Y; wire [6:6] move_cnt_RNO_FCO; wire [6:6] move_cnt_RNO_Y; wire [5:5] move_cnt_RNI3SN5S3_Y; wire CO0 ; wire CO0_i ; wire PF_COREDELAYCODE_TIP_0_reset_lane ; wire VCC ; wire move_cnte ; wire GND ; wire load_lane_3 ; wire dll_code_upd_3_iv_i_Z ; wire N_34_i_i ; wire cdr_start5 ; wire pause_lane9 ; wire N_31_i ; wire N_999_i ; wire N_1000_i ; wire dll_delay_code_1_sqmuxa_i_i_a2_Z ; wire N_28_i ; wire move_cnt_cry_cy ; wire N_63_i ; wire load_lane_0_sqmuxa ; wire un1_diff_sync_i ; wire state7 ; wire N_1013_i ; wire N_29 ; wire N_27 ; wire N_1006 ; wire N_11 ; wire N_10 ; wire N_9 ; wire N_8 ; CFG1 \start_cnt_RNIBKVI3[0] ( .A(CO0), .Y(CO0_i) ); defparam \start_cnt_RNIBKVI3[0] .INIT=2'h1; CFG1 reset_lane_RNIJDIL7 ( .A(PF_COREDELAYCODE_TIP_0_reset_lane), .Y(PF_COREDELAYCODE_TIP_0_reset_lane_i) ); defparam reset_lane_RNIJDIL7.INIT=2'h1; // @63:59 SLE \move_cnt[6] ( .Q(move_cnt_Z[6]), .ADn(VCC), .ALn(rst_b_Z[0]), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(move_cnt_s[6]), .EN(move_cnte), .LAT(GND), .SD(GND), .SLn(VCC) ); // @63:59 SLE \move_cnt[5] ( .Q(move_cnt_Z[5]), .ADn(VCC), .ALn(rst_b_Z[0]), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(move_cnt_s[5]), .EN(move_cnte), .LAT(GND), .SD(GND), .SLn(VCC) ); // @63:59 SLE \move_cnt[4] ( .Q(move_cnt_Z[4]), .ADn(VCC), .ALn(rst_b_Z[0]), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(move_cnt_s[4]), .EN(move_cnte), .LAT(GND), .SD(GND), .SLn(VCC) ); // @63:59 SLE \move_cnt[3] ( .Q(move_cnt_Z[3]), .ADn(VCC), .ALn(rst_b_Z[0]), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(move_cnt_s[3]), .EN(move_cnte), .LAT(GND), .SD(GND), .SLn(VCC) ); // @63:59 SLE \move_cnt[2] ( .Q(move_cnt_Z[2]), .ADn(VCC), .ALn(rst_b_Z[0]), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(move_cnt_s[2]), .EN(move_cnte), .LAT(GND), .SD(GND), .SLn(VCC) ); // @63:59 SLE \move_cnt[1] ( .Q(move_cnt_Z[1]), .ADn(VCC), .ALn(rst_b_Z[0]), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(move_cnt_s[1]), .EN(move_cnte), .LAT(GND), .SD(GND), .SLn(VCC) ); // @63:59 SLE \move_cnt[0] ( .Q(move_cnt_Z[0]), .ADn(VCC), .ALn(rst_b_Z[0]), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(move_cnt_s[0]), .EN(move_cnte), .LAT(GND), .SD(GND), .SLn(VCC) ); // @63:59 SLE load_lane ( .Q(PF_COREDELAYCODE_TIP_0_load_lane), .ADn(VCC), .ALn(rst_b_Z[0]), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(load_lane_3), .EN(lock_sync_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @63:59 SLE dll_code_upd ( .Q(PF_COREDELAYCODE_TIP_0_dll_code_upd), .ADn(VCC), .ALn(rst_b_Z[0]), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(dll_code_upd_3_iv_i_Z), .EN(lock_sync_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @63:59 SLE \state[0] ( .Q(state_Z[0]), .ADn(VCC), .ALn(rst_b_Z[0]), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(state_ns[0]), .EN(lock_sync_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @63:59 SLE \state[1] ( .Q(state_Z[1]), .ADn(VCC), .ALn(rst_b_Z[0]), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_34_i_i), .EN(lock_sync_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @63:36 SLE cdr_start ( .Q(cdr_start_1z), .ADn(VCC), .ALn(rst_b_Z[0]), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(VCC), .EN(cdr_start5), .LAT(GND), .SD(GND), .SLn(VCC) ); // @63:36 SLE reset_lane ( .Q(PF_COREDELAYCODE_TIP_0_reset_lane), .ADn(VCC), .ALn(rst_b_Z[0]), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(VCC), .EN(pause_lane9), .LAT(GND), .SD(GND), .SLn(VCC) ); // @63:36 SLE pause_lane ( .Q(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_PAUSE), .ADn(VCC), .ALn(rst_b_Z[0]), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(CO0_i), .EN(N_31_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @63:59 SLE move_lane ( .Q(PF_COREDELAYCODE_TIP_0_move_lane), .ADn(VCC), .ALn(rst_b_Z[0]), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_999_i), .EN(lock_sync_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @63:59 SLE dll_valid_code ( .Q(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_VALID_CODE), .ADn(VCC), .ALn(rst_b_Z[0]), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_1000_i), .EN(lock_sync_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @63:59 SLE \dll_delay_code[4] ( .Q(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_DELAY_CODE[4]), .ADn(VCC), .ALn(rst_b_Z[0]), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(move_cnt_Z[4]), .EN(dll_delay_code_1_sqmuxa_i_i_a2_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @63:59 SLE \dll_delay_code[3] ( .Q(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_DELAY_CODE[3]), .ADn(VCC), .ALn(rst_b_Z[0]), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(move_cnt_Z[3]), .EN(dll_delay_code_1_sqmuxa_i_i_a2_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @63:59 SLE \dll_delay_code[2] ( .Q(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_DELAY_CODE[2]), .ADn(VCC), .ALn(rst_b_Z[0]), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(move_cnt_Z[2]), .EN(dll_delay_code_1_sqmuxa_i_i_a2_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @63:59 SLE \dll_delay_code[1] ( .Q(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_DELAY_CODE[1]), .ADn(VCC), .ALn(rst_b_Z[0]), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(move_cnt_Z[1]), .EN(dll_delay_code_1_sqmuxa_i_i_a2_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @63:59 SLE \dll_delay_code[0] ( .Q(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_DELAY_CODE[0]), .ADn(VCC), .ALn(rst_b_Z[0]), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(move_cnt_Z[0]), .EN(dll_delay_code_1_sqmuxa_i_i_a2_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @63:36 SLE \start_cnt[1] ( .Q(start_cnt_Z[1]), .ADn(VCC), .ALn(rst_b_Z[0]), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(N_28_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @63:36 SLE \start_cnt[0] ( .Q(CO0), .ADn(VCC), .ALn(rst_b_Z[0]), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(CO0_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @63:36 SLE \lock_sync[1] ( .Q(lock_sync_Z[1]), .ADn(VCC), .ALn(rst_b_Z[0]), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(DLL_LOCK), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @63:36 SLE \lock_sync[0] ( .Q(lock_sync_Z[0]), .ADn(VCC), .ALn(rst_b_Z[0]), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(lock_sync_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @63:36 SLE \diff_sync[1] ( .Q(diff_sync_Z[1]), .ADn(VCC), .ALn(rst_b_Z[0]), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(PF_CCC_0_DLL_DELAY_DIFF), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @63:36 SLE \diff_sync[0] ( .Q(diff_sync_Z[0]), .ADn(VCC), .ALn(rst_b_Z[0]), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(diff_sync_Z[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @63:31 SLE \rst_b[1] ( .Q(rst_b_Z[1]), .ADn(VCC), .ALn(dff), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(VCC), .EN(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_PLL_LOCK), .LAT(GND), .SD(GND), .SLn(VCC) ); // @63:31 SLE \rst_b[0] ( .Q(rst_b_Z[0]), .ADn(VCC), .ALn(dff), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(rst_b_Z[1]), .EN(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_PLL_LOCK), .LAT(GND), .SD(GND), .SLn(VCC) ); // @63:59 SLE \dll_delay_code[6] ( .Q(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_DELAY_CODE[6]), .ADn(VCC), .ALn(rst_b_Z[0]), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(move_cnt_Z[6]), .EN(dll_delay_code_1_sqmuxa_i_i_a2_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @63:59 SLE \dll_delay_code[5] ( .Q(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_DELAY_CODE[5]), .ADn(VCC), .ALn(rst_b_Z[0]), .CLK(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .D(move_cnt_Z[5]), .EN(dll_delay_code_1_sqmuxa_i_i_a2_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @68:198 ARI1 \state_RNI4M5KC[0] ( .FCO(move_cnt_cry_cy), .S(state_RNI4M5KC_S[0]), .Y(state_RNI4M5KC_Y[0]), .B(N_63_i), .C(state_Z[0]), .D(state_Z[1]), .A(VCC), .FCI(VCC) ); defparam \state_RNI4M5KC[0] .INIT=20'h4FB00; // @68:198 ARI1 \move_cnt_RNIS937V[0] ( .FCO(move_cnt_cry[0]), .S(move_cnt_s[0]), .Y(move_cnt_RNIS937V_Y[0]), .B(move_cnt_Z[0]), .C(state_Z[1]), .D(state_Z[0]), .A(N_63_i), .FCI(move_cnt_cry_cy) ); defparam \move_cnt_RNIS937V[0] .INIT=20'h4AA8A; // @68:198 ARI1 \move_cnt_RNILU0QH1[1] ( .FCO(move_cnt_cry[1]), .S(move_cnt_s[1]), .Y(move_cnt_RNILU0QH1_Y[1]), .B(load_lane_0_sqmuxa), .C(move_cnt_Z[1]), .D(GND), .A(VCC), .FCI(move_cnt_cry[0]) ); defparam \move_cnt_RNILU0QH1[1] .INIT=20'h44400; // @68:198 ARI1 \move_cnt_RNIFKUC42[2] ( .FCO(move_cnt_cry[2]), .S(move_cnt_s[2]), .Y(move_cnt_RNIFKUC42_Y[2]), .B(load_lane_0_sqmuxa), .C(move_cnt_Z[2]), .D(GND), .A(VCC), .FCI(move_cnt_cry[1]) ); defparam \move_cnt_RNIFKUC42[2] .INIT=20'h44400; // @68:198 ARI1 \move_cnt_RNIABSVM2[3] ( .FCO(move_cnt_cry[3]), .S(move_cnt_s[3]), .Y(move_cnt_RNIABSVM2_Y[3]), .B(load_lane_0_sqmuxa), .C(move_cnt_Z[3]), .D(GND), .A(VCC), .FCI(move_cnt_cry[2]) ); defparam \move_cnt_RNIABSVM2[3] .INIT=20'h44400; // @68:198 ARI1 \move_cnt_RNI63QI93[4] ( .FCO(move_cnt_cry[4]), .S(move_cnt_s[4]), .Y(move_cnt_RNI63QI93_Y[4]), .B(load_lane_0_sqmuxa), .C(move_cnt_Z[4]), .D(GND), .A(VCC), .FCI(move_cnt_cry[3]) ); defparam \move_cnt_RNI63QI93[4] .INIT=20'h44400; // @68:198 ARI1 \move_cnt_RNO[6] ( .FCO(move_cnt_RNO_FCO[6]), .S(move_cnt_s[6]), .Y(move_cnt_RNO_Y[6]), .B(load_lane_0_sqmuxa), .C(move_cnt_Z[6]), .D(GND), .A(VCC), .FCI(move_cnt_cry[5]) ); defparam \move_cnt_RNO[6] .INIT=20'h44400; // @68:198 ARI1 \move_cnt_RNI3SN5S3[5] ( .FCO(move_cnt_cry[5]), .S(move_cnt_s[5]), .Y(move_cnt_RNI3SN5S3_Y[5]), .B(load_lane_0_sqmuxa), .C(move_cnt_Z[5]), .D(GND), .A(VCC), .FCI(move_cnt_cry[4]) ); defparam \move_cnt_RNI3SN5S3[5] .INIT=20'h44400; // @63:70 CFG2 state7_0_a2 ( .A(N_63_i), .B(un1_diff_sync_i), .Y(state7) ); defparam state7_0_a2.INIT=4'h4; // @63:76 CFG2 state13_i_o4_0_o2 ( .A(CO0), .B(start_cnt_Z[1]), .Y(N_63_i) ); defparam state13_i_o4_0_o2.INIT=4'h7; // @63:49 CFG2 \start_cnt_RNO[1] ( .A(CO0), .B(start_cnt_Z[1]), .Y(N_28_i) ); defparam \start_cnt_RNO[1] .INIT=4'h6; // @63:69 CFG2 move_lane_4_f0_i_o2 ( .A(N_1013_i), .B(PF_LANECTRL_CORE_READER_0_RX_DELAY_LINE_OUT_OF_RANGE), .Y(N_29) ); defparam move_lane_4_f0_i_o2.INIT=4'hE; // @63:70 CFG2 un1_diff_sync ( .A(diff_sync_Z[0]), .B(cdr_start_1z), .Y(un1_diff_sync_i) ); defparam un1_diff_sync.INIT=4'hB; // @63:59 CFG3 \state_ns_0_0_m2[0] ( .A(state_Z[1]), .B(PF_LANECTRL_CORE_READER_0_RX_DELAY_LINE_OUT_OF_RANGE), .C(un1_diff_sync_i), .Y(N_27) ); defparam \state_ns_0_0_m2[0] .INIT=8'hD8; // @63:55 CFG3 cdr_start5_0_a2 ( .A(PF_COREDELAYCODE_TIP_0_reset_lane), .B(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_PAUSE), .C(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_VALID_CODE), .Y(cdr_start5) ); defparam cdr_start5_0_a2.INIT=8'h20; // @63:51 CFG3 pause_lane9_0_a2 ( .A(PF_COREDELAYCODE_TIP_0_reset_lane), .B(CO0), .C(start_cnt_Z[1]), .Y(pause_lane9) ); defparam pause_lane9_0_a2.INIT=8'h04; // @68:198 CFG3 \state_RNI4M5KC_0[0] ( .A(state_Z[1]), .B(state_Z[0]), .C(N_63_i), .Y(load_lane_0_sqmuxa) ); defparam \state_RNI4M5KC_0[0] .INIT=8'h04; // @63:69 CFG3 load_lane_3_f0 ( .A(load_lane_0_sqmuxa), .B(PF_COREDELAYCODE_TIP_0_load_lane), .C(N_1013_i), .Y(load_lane_3) ); defparam load_lane_3_f0.INIT=8'hE0; // @63:69 CFG2 \state_RNILICS8[0] ( .A(state_Z[0]), .B(state_Z[1]), .Y(N_1013_i) ); defparam \state_RNILICS8[0] .INIT=4'hB; // @63:69 CFG4 dll_delay_code_1_sqmuxa_i_i_a2 ( .A(state_Z[1]), .B(lock_sync_Z[0]), .C(N_63_i), .D(state_Z[0]), .Y(dll_delay_code_1_sqmuxa_i_i_a2_Z) ); defparam dll_delay_code_1_sqmuxa_i_i_a2.INIT=16'h0800; // @63:69 CFG4 dll_valid_code_5_f0_i_a2 ( .A(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_VALID_CODE), .B(state_Z[1]), .C(state_Z[0]), .D(N_63_i), .Y(N_1006) ); defparam dll_valid_code_5_f0_i_a2.INIT=16'h5515; // @63:36 CFG3 pause_lane_RNO ( .A(N_63_i), .B(PF_COREDELAYCODE_TIP_0_reset_lane), .C(CO0), .Y(N_31_i) ); defparam pause_lane_RNO.INIT=8'h47; // @63:59 CFG4 dll_code_upd_3_iv_i ( .A(PF_COREDELAYCODE_TIP_0_dll_code_upd), .B(state7), .C(state_Z[1]), .D(state_Z[0]), .Y(dll_code_upd_3_iv_i_Z) ); defparam dll_code_upd_3_iv_i.INIT=16'hA0AE; // @68:198 CFG4 move_lane_4_f0_i_o2_RNI4OQGP ( .A(CO0), .B(lock_sync_Z[0]), .C(load_lane_0_sqmuxa), .D(N_29), .Y(move_cnte) ); defparam move_lane_4_f0_i_o2_RNI4OQGP.INIT=16'hC0C8; // @63:59 CFG3 \state_RNO[1] ( .A(state_Z[1]), .B(state_Z[0]), .C(N_63_i), .Y(N_34_i_i) ); defparam \state_RNO[1] .INIT=8'hA6; // @63:59 CFG4 move_lane_RNO ( .A(PF_COREDELAYCODE_TIP_0_move_lane), .B(CO0), .C(N_1013_i), .D(N_29), .Y(N_999_i) ); defparam move_lane_RNO.INIT=16'hA8FC; // @63:59 CFG3 \state_ns_0_0[0] ( .A(N_63_i), .B(state_Z[0]), .C(N_27), .Y(state_ns[0]) ); defparam \state_ns_0_0[0] .INIT=8'h98; // @63:59 CFG4 dll_valid_code_RNO ( .A(PF_LANECTRL_CORE_READER_0_RX_DELAY_LINE_OUT_OF_RANGE), .B(N_1013_i), .C(N_63_i), .D(N_1006), .Y(N_1000_i) ); defparam dll_valid_code_RNO.INIT=16'h00FD; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* COREDELAYCODE_TIP */ module PF_IOD_CDR_CCC_C0_PF_LANECTRL_CORE_READER_0_PF_LANECTRL ( PF_CCC_0_DLL_CODE, PF_LANECTRL_CORE_READER_0_RX_DELAY_LINE_OUT_OF_RANGE, PF_COREDELAYCODE_TIP_0_move_lane, PF_COREDELAYCODE_TIP_0_load_lane, PF_COREDELAYCODE_TIP_0_reset_lane_i ) ; input [7:0] PF_CCC_0_DLL_CODE ; output PF_LANECTRL_CORE_READER_0_RX_DELAY_LINE_OUT_OF_RANGE ; input PF_COREDELAYCODE_TIP_0_move_lane ; input PF_COREDELAYCODE_TIP_0_load_lane ; input PF_COREDELAYCODE_TIP_0_reset_lane_i ; wire PF_LANECTRL_CORE_READER_0_RX_DELAY_LINE_OUT_OF_RANGE ; wire PF_COREDELAYCODE_TIP_0_move_lane ; wire PF_COREDELAYCODE_TIP_0_load_lane ; wire PF_COREDELAYCODE_TIP_0_reset_lane_i ; wire [2:0] EYE_MONITOR_WIDTH_OUT; wire [0:0] RX_DQS_90; wire [1:1] RX_DQS_90_0; wire [2:0] FIFO_WR_PTR; wire [2:0] FIFO_RD_PTR; wire VCC ; wire GND ; wire RX_DATA_VALID_0 ; wire RX_BURST_DETECT_0 ; wire TX_DELAY_LINE_OUT_OF_RANGE ; wire CLK_OUT_R ; wire A_OUT_RST_N ; wire ODT_EN_SEL_0 ; wire TX_DQS ; wire TX_DQS_270 ; wire CDR_CLK_0 ; wire CDR_NEXT_CLK ; wire ARST_N ; wire RX_SYNC_RST ; wire TX_SYNC_RST ; wire ODT_EN_OUT_0 ; // @67:62 LANECTRL I_LANECTRL ( .FAB_CLK(VCC), .RESET(PF_COREDELAYCODE_TIP_0_reset_lane_i), .DDR_READ(GND), .READ_CLK_SEL({GND, GND, GND}), .DELAY_LINE_SEL(VCC), .DELAY_LINE_LOAD(PF_COREDELAYCODE_TIP_0_load_lane), .DELAY_LINE_DIRECTION(GND), .DELAY_LINE_MOVE(PF_COREDELAYCODE_TIP_0_move_lane), .HS_IO_CLK_PAUSE(GND), .DIV_CLK_EN_N(VCC), .RX_BIT_SLIP(GND), .CDR_CLK_A_SEL({GND, GND, GND, GND, GND, GND, GND, GND}), .EYE_MONITOR_WIDTH_IN({GND, GND, GND}), .ODT_EN(GND), .CODE_UPDATE(GND), .RX_DATA_VALID(RX_DATA_VALID_0), .RX_BURST_DETECT(RX_BURST_DETECT_0), .RX_DELAY_LINE_OUT_OF_RANGE(PF_LANECTRL_CORE_READER_0_RX_DELAY_LINE_OUT_OF_RANGE), .TX_DELAY_LINE_OUT_OF_RANGE(TX_DELAY_LINE_OUT_OF_RANGE), .CLK_OUT_R(CLK_OUT_R), .A_OUT_RST_N(A_OUT_RST_N), .DQS(GND), .DQS_N(GND), .HS_IO_CLK({GND, GND, GND, GND, GND, VCC}), .DLL_CODE(PF_CCC_0_DLL_CODE[7:0]), .EYE_MONITOR_WIDTH_OUT(EYE_MONITOR_WIDTH_OUT[2:0]), .ODT_EN_SEL(ODT_EN_SEL_0), .RX_DQS_90({RX_DQS_90_0[1], RX_DQS_90[0]}), .TX_DQS(TX_DQS), .TX_DQS_270(TX_DQS_270), .FIFO_WR_PTR(FIFO_WR_PTR[2:0]), .FIFO_RD_PTR(FIFO_RD_PTR[2:0]), .CDR_CLK(CDR_CLK_0), .CDR_NEXT_CLK(CDR_NEXT_CLK), .ARST_N(ARST_N), .RX_SYNC_RST(RX_SYNC_RST), .TX_SYNC_RST(TX_SYNC_RST), .ODT_EN_OUT(ODT_EN_OUT_0), .DDR_DO_READ(GND), .CDR_CLK_A_SEL_8(GND), .CDR_CLK_A_SEL_9(GND), .CDR_CLK_A_SEL_10(GND), .CDR_CLK_B_SEL({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND}), .SWITCH(GND), .CDR_CLR_NEXT_CLK_N(GND) ); defparam I_LANECTRL.DATA_RATE=1250.0; defparam I_LANECTRL.FORMAL_NAME="CODE_READER"; defparam I_LANECTRL.INTERFACE_NAME="CDRCCC"; defparam I_LANECTRL.DELAY_LINE_SIMULATION_MODE="ENABLED"; defparam I_LANECTRL.RESERVED_0=1'b0; defparam I_LANECTRL.RESERVED_1=1'b0; defparam I_LANECTRL.RESERVED_2=1'b0; defparam I_LANECTRL.SOFTRESET_EN=1'b0; defparam I_LANECTRL.SOFTRESET=1'b0; defparam I_LANECTRL.RX_DQS_DELAY_LINE_EN=1'b1; defparam I_LANECTRL.TX_DQS_DELAY_LINE_EN=1'b0; defparam I_LANECTRL.RX_DQS_DELAY_LINE_DIRECTION=1'b1; defparam I_LANECTRL.TX_DQS_DELAY_LINE_DIRECTION=1'b1; defparam I_LANECTRL.RX_DQS_DELAY_VAL=8'h09; defparam I_LANECTRL.TX_DQS_DELAY_VAL=8'h01; defparam I_LANECTRL.FIFO_EN=1'b0; defparam I_LANECTRL.FIFO_MODE=1'b0; defparam I_LANECTRL.FIFO_RD_PTR_MODE=3'h0; defparam I_LANECTRL.DQS_MODE=3'h0; defparam I_LANECTRL.CDR_EN=2'h0; defparam I_LANECTRL.HS_IO_CLK_SEL=9'h1F8; defparam I_LANECTRL.DLL_CODE_SEL=2'h0; defparam I_LANECTRL.CDR_CLK_SEL=12'h007; defparam I_LANECTRL.READ_MARGIN_TEST_EN=1'b1; defparam I_LANECTRL.WRITE_MARGIN_TEST_EN=1'b0; defparam I_LANECTRL.CDR_CLK_DIV=3'h0; defparam I_LANECTRL.DIV_CLK_SEL=2'h0; defparam I_LANECTRL.HS_IO_CLK_PAUSE_EN=1'b1; defparam I_LANECTRL.QDR_EN=1'b0; defparam I_LANECTRL.DYN_ODT_MODE=1'b0; defparam I_LANECTRL.DIV_CLK_EN_SRC=2'h3; defparam I_LANECTRL.RANK_2_MODE=1'b0; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* PF_IOD_CDR_CCC_C0_PF_LANECTRL_CORE_READER_0_PF_LANECTRL */ module PF_IOD_CDR_CCC_C0 ( PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_DELAY_CODE, cdr_start, PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_PAUSE, PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_VALID_CODE, PF_IOD_CDR_CCC_C0_0_TX_CLK_G, PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_0, PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_180, PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_90, dff, PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_PLL_LOCK, INBUF_DIFF_0_Y, PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_270 ) ; output [6:0] PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_DELAY_CODE ; output cdr_start ; output PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_PAUSE ; output PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_VALID_CODE ; output PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; output PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_0 ; output PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_180 ; output PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_90 ; input dff ; output PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_PLL_LOCK ; input INBUF_DIFF_0_Y ; output PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_270 ; wire cdr_start ; wire PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_PAUSE ; wire PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_VALID_CODE ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_0 ; wire PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_180 ; wire PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_90 ; wire dff ; wire PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_PLL_LOCK ; wire INBUF_DIFF_0_Y ; wire PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_270 ; wire [7:0] PF_CCC_0_DLL_CODE; wire PF_CCC_0_DLL_DELAY_DIFF ; wire DLL_LOCK ; wire PF_COREDELAYCODE_TIP_0_dll_code_upd ; wire PF_CCC_0_OUT0_0 ; wire PF_LANECTRL_CORE_READER_0_RX_DELAY_LINE_OUT_OF_RANGE ; wire PF_COREDELAYCODE_TIP_0_move_lane ; wire PF_COREDELAYCODE_TIP_0_load_lane ; wire PF_COREDELAYCODE_TIP_0_reset_lane_i ; wire GND ; wire VCC ; // @68:172 PF_IOD_CDR_CCC_C0_PF_CCC_0_PF_CCC PF_CCC_0 ( .PF_CCC_0_DLL_CODE(PF_CCC_0_DLL_CODE[7:0]), .PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_270(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_270), .PF_CCC_0_DLL_DELAY_DIFF(PF_CCC_0_DLL_DELAY_DIFF), .DLL_LOCK(DLL_LOCK), .PF_COREDELAYCODE_TIP_0_dll_code_upd(PF_COREDELAYCODE_TIP_0_dll_code_upd), .INBUF_DIFF_0_Y(INBUF_DIFF_0_Y), .PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_PLL_LOCK(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_PLL_LOCK), .dff(dff), .PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_90(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_90), .PF_CCC_0_OUT0_0(PF_CCC_0_OUT0_0), .PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_180(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_180), .PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_0(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_0) ); // @68:190 PF_IOD_CDR_CCC_C0_PF_CLK_DIV_0_PF_CLK_DIV PF_CLK_DIV_0 ( .PF_CCC_0_OUT0_0(PF_CCC_0_OUT0_0), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G) ); // @68:198 COREDELAYCODE_TIP PF_COREDELAYCODE_TIP_0 ( .PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_DELAY_CODE(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_DELAY_CODE[6:0]), .PF_LANECTRL_CORE_READER_0_RX_DELAY_LINE_OUT_OF_RANGE(PF_LANECTRL_CORE_READER_0_RX_DELAY_LINE_OUT_OF_RANGE), .PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_PLL_LOCK(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_PLL_LOCK), .dff(dff), .PF_CCC_0_DLL_DELAY_DIFF(PF_CCC_0_DLL_DELAY_DIFF), .DLL_LOCK(DLL_LOCK), .PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_VALID_CODE(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_VALID_CODE), .PF_COREDELAYCODE_TIP_0_move_lane(PF_COREDELAYCODE_TIP_0_move_lane), .PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_PAUSE(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_PAUSE), .cdr_start_1z(cdr_start), .PF_COREDELAYCODE_TIP_0_dll_code_upd(PF_COREDELAYCODE_TIP_0_dll_code_upd), .PF_COREDELAYCODE_TIP_0_load_lane(PF_COREDELAYCODE_TIP_0_load_lane), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .PF_COREDELAYCODE_TIP_0_reset_lane_i(PF_COREDELAYCODE_TIP_0_reset_lane_i) ); // @68:220 PF_IOD_CDR_CCC_C0_PF_LANECTRL_CORE_READER_0_PF_LANECTRL PF_LANECTRL_CORE_READER_0 ( .PF_CCC_0_DLL_CODE(PF_CCC_0_DLL_CODE[7:0]), .PF_LANECTRL_CORE_READER_0_RX_DELAY_LINE_OUT_OF_RANGE(PF_LANECTRL_CORE_READER_0_RX_DELAY_LINE_OUT_OF_RANGE), .PF_COREDELAYCODE_TIP_0_move_lane(PF_COREDELAYCODE_TIP_0_move_lane), .PF_COREDELAYCODE_TIP_0_load_lane(PF_COREDELAYCODE_TIP_0_load_lane), .PF_COREDELAYCODE_TIP_0_reset_lane_i(PF_COREDELAYCODE_TIP_0_reset_lane_i) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* PF_IOD_CDR_CCC_C0 */ module PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM ( COREFIFO_C0_0_Q, R_DATA_c, fifo_to_tpsram_bridge_0_ram_w_addr_4, fifo_to_tpsram_bridge_0_ram_w_en, PF_CCC_0_0_OUT0_FABCLK_0 ) ; input [31:0] COREFIFO_C0_0_Q ; output [31:0] R_DATA_c ; input [10:0] fifo_to_tpsram_bridge_0_ram_w_addr_4 ; input fifo_to_tpsram_bridge_0_ram_w_en ; input PF_CCC_0_0_OUT0_FABCLK_0 ; wire fifo_to_tpsram_bridge_0_ram_w_en ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire [19:8] PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C3_A_DOUT; wire [19:0] PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C3_B_DOUT; wire [19:8] PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C0_A_DOUT; wire [19:0] PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C0_B_DOUT; wire [19:8] PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C1_A_DOUT; wire [19:0] PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C1_B_DOUT; wire [19:8] PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C2_A_DOUT; wire [19:0] PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C2_B_DOUT; wire GND ; wire VCC ; wire PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C3_SB_CORRECT ; wire PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C3_DB_DETECT ; wire Z_ACCESS_BUSY_0__3_ ; wire PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C0_SB_CORRECT ; wire PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C0_DB_DETECT ; wire Z_ACCESS_BUSY_0__0_ ; wire PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C1_SB_CORRECT ; wire PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C1_DB_DETECT ; wire Z_ACCESS_BUSY_0__1_ ; wire PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C2_SB_CORRECT ; wire PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C2_DB_DETECT ; wire Z_ACCESS_BUSY_0__2_ ; // @69:104 RAM1K20 PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C3 ( .A_ADDR({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND}), .A_BLK_EN({VCC, VCC, VCC}), .A_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .A_DIN({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND}), .A_DOUT({PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C3_A_DOUT[19:8], R_DATA_c[31:24]}), .A_WEN({GND, GND}), .A_REN(VCC), .A_WIDTH({GND, VCC, VCC}), .A_WMODE({GND, GND}), .A_BYPASS(VCC), .A_DOUT_EN(VCC), .A_DOUT_SRST_N(VCC), .A_DOUT_ARST_N(VCC), .B_ADDR({fifo_to_tpsram_bridge_0_ram_w_addr_4[10:0], GND, GND, GND}), .B_BLK_EN({fifo_to_tpsram_bridge_0_ram_w_en, VCC, VCC}), .B_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .B_DIN({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, COREFIFO_C0_0_Q[7:0]}), .B_DOUT(PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C3_B_DOUT[19:0]), .B_WEN({GND, VCC}), .B_REN(VCC), .B_WIDTH({GND, VCC, VCC}), .B_WMODE({GND, GND}), .B_BYPASS(VCC), .B_DOUT_EN(VCC), .B_DOUT_SRST_N(VCC), .B_DOUT_ARST_N(GND), .ECC_EN(GND), .ECC_BYPASS(GND), .SB_CORRECT(PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C3_SB_CORRECT), .DB_DETECT(PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C3_DB_DETECT), .BUSY_FB(GND), .ACCESS_BUSY(Z_ACCESS_BUSY_0__3_) ); defparam PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C3.RAMINDEX="PF_TPSRAM_C0_0%2048-2048%32-32%SPEED%0%3%TWO-PORT%ECC_EN-0"; // @69:79 RAM1K20 PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C0 ( .A_ADDR({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND}), .A_BLK_EN({VCC, VCC, VCC}), .A_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .A_DIN({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND}), .A_DOUT({PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C0_A_DOUT[19:8], R_DATA_c[7:0]}), .A_WEN({GND, GND}), .A_REN(VCC), .A_WIDTH({GND, VCC, VCC}), .A_WMODE({GND, GND}), .A_BYPASS(VCC), .A_DOUT_EN(VCC), .A_DOUT_SRST_N(VCC), .A_DOUT_ARST_N(VCC), .B_ADDR({fifo_to_tpsram_bridge_0_ram_w_addr_4[10:0], GND, GND, GND}), .B_BLK_EN({fifo_to_tpsram_bridge_0_ram_w_en, VCC, VCC}), .B_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .B_DIN({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, COREFIFO_C0_0_Q[31:24]}), .B_DOUT(PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C0_B_DOUT[19:0]), .B_WEN({GND, VCC}), .B_REN(VCC), .B_WIDTH({GND, VCC, VCC}), .B_WMODE({GND, GND}), .B_BYPASS(VCC), .B_DOUT_EN(VCC), .B_DOUT_SRST_N(VCC), .B_DOUT_ARST_N(GND), .ECC_EN(GND), .ECC_BYPASS(GND), .SB_CORRECT(PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C0_SB_CORRECT), .DB_DETECT(PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C0_DB_DETECT), .BUSY_FB(GND), .ACCESS_BUSY(Z_ACCESS_BUSY_0__0_) ); defparam PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C0.RAMINDEX="PF_TPSRAM_C0_0%2048-2048%32-32%SPEED%0%0%TWO-PORT%ECC_EN-0"; // @69:54 RAM1K20 PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C1 ( .A_ADDR({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND}), .A_BLK_EN({VCC, VCC, VCC}), .A_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .A_DIN({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND}), .A_DOUT({PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C1_A_DOUT[19:8], R_DATA_c[15:8]}), .A_WEN({GND, GND}), .A_REN(VCC), .A_WIDTH({GND, VCC, VCC}), .A_WMODE({GND, GND}), .A_BYPASS(VCC), .A_DOUT_EN(VCC), .A_DOUT_SRST_N(VCC), .A_DOUT_ARST_N(VCC), .B_ADDR({fifo_to_tpsram_bridge_0_ram_w_addr_4[10:0], GND, GND, GND}), .B_BLK_EN({fifo_to_tpsram_bridge_0_ram_w_en, VCC, VCC}), .B_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .B_DIN({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, COREFIFO_C0_0_Q[23:16]}), .B_DOUT(PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C1_B_DOUT[19:0]), .B_WEN({GND, VCC}), .B_REN(VCC), .B_WIDTH({GND, VCC, VCC}), .B_WMODE({GND, GND}), .B_BYPASS(VCC), .B_DOUT_EN(VCC), .B_DOUT_SRST_N(VCC), .B_DOUT_ARST_N(GND), .ECC_EN(GND), .ECC_BYPASS(GND), .SB_CORRECT(PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C1_SB_CORRECT), .DB_DETECT(PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C1_DB_DETECT), .BUSY_FB(GND), .ACCESS_BUSY(Z_ACCESS_BUSY_0__1_) ); defparam PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C1.RAMINDEX="PF_TPSRAM_C0_0%2048-2048%32-32%SPEED%0%1%TWO-PORT%ECC_EN-0"; // @69:29 RAM1K20 PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C2 ( .A_ADDR({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND}), .A_BLK_EN({VCC, VCC, VCC}), .A_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .A_DIN({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND}), .A_DOUT({PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C2_A_DOUT[19:8], R_DATA_c[23:16]}), .A_WEN({GND, GND}), .A_REN(VCC), .A_WIDTH({GND, VCC, VCC}), .A_WMODE({GND, GND}), .A_BYPASS(VCC), .A_DOUT_EN(VCC), .A_DOUT_SRST_N(VCC), .A_DOUT_ARST_N(VCC), .B_ADDR({fifo_to_tpsram_bridge_0_ram_w_addr_4[10:0], GND, GND, GND}), .B_BLK_EN({fifo_to_tpsram_bridge_0_ram_w_en, VCC, VCC}), .B_CLK(PF_CCC_0_0_OUT0_FABCLK_0), .B_DIN({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, COREFIFO_C0_0_Q[15:8]}), .B_DOUT(PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C2_B_DOUT[19:0]), .B_WEN({GND, VCC}), .B_REN(VCC), .B_WIDTH({GND, VCC, VCC}), .B_WMODE({GND, GND}), .B_BYPASS(VCC), .B_DOUT_EN(VCC), .B_DOUT_SRST_N(VCC), .B_DOUT_ARST_N(GND), .ECC_EN(GND), .ECC_BYPASS(GND), .SB_CORRECT(PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C2_SB_CORRECT), .DB_DETECT(PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C2_DB_DETECT), .BUSY_FB(GND), .ACCESS_BUSY(Z_ACCESS_BUSY_0__2_) ); defparam PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C2.RAMINDEX="PF_TPSRAM_C0_0%2048-2048%32-32%SPEED%0%2%TWO-PORT%ECC_EN-0"; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM */ module PF_TPSRAM_C0 ( fifo_to_tpsram_bridge_0_ram_w_addr_4, R_DATA_c, COREFIFO_C0_0_Q, PF_CCC_0_0_OUT0_FABCLK_0, fifo_to_tpsram_bridge_0_ram_w_en ) ; input [10:0] fifo_to_tpsram_bridge_0_ram_w_addr_4 ; output [31:0] R_DATA_c ; input [31:0] COREFIFO_C0_0_Q ; input PF_CCC_0_0_OUT0_FABCLK_0 ; input fifo_to_tpsram_bridge_0_ram_w_en ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire fifo_to_tpsram_bridge_0_ram_w_en ; wire GND ; wire VCC ; // @70:109 PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM PF_TPSRAM_C0_0 ( .COREFIFO_C0_0_Q(COREFIFO_C0_0_Q[31:0]), .R_DATA_c(R_DATA_c[31:0]), .fifo_to_tpsram_bridge_0_ram_w_addr_4(fifo_to_tpsram_bridge_0_ram_w_addr_4[10:0]), .fifo_to_tpsram_bridge_0_ram_w_en(fifo_to_tpsram_bridge_0_ram_w_en), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* PF_TPSRAM_C0 */ module SSDetect ( PF_IOD_CDR_C0_0_RX_DATA, PF_IOD_CDR_C0_0_RX_CLK_R, AND2_2_Y, SSDetect_0_stream_start ) ; input [6:0] PF_IOD_CDR_C0_0_RX_DATA ; input PF_IOD_CDR_C0_0_RX_CLK_R ; input AND2_2_Y ; output SSDetect_0_stream_start ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire AND2_2_Y ; wire SSDetect_0_stream_start ; wire [0:0] rx_start_2_Z; wire [1:1] rx_start_Z; wire SSDetect_0_stream_start_i ; wire VCC ; wire GND ; wire is_match_3_Z ; wire un6_is_match_2 ; wire un3_is_match_2 ; wire un6_is_match_4 ; wire un3_is_match_4 ; CFG1 \rx_start_RNO[1] ( .A(SSDetect_0_stream_start), .Y(SSDetect_0_stream_start_i) ); defparam \rx_start_RNO[1] .INIT=2'h1; // @71:37 SLE \rx_start[0] ( .Q(SSDetect_0_stream_start), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(VCC), .EN(rx_start_2_Z[0]), .LAT(GND), .SD(GND), .SLn(VCC) ); // @71:37 SLE \rx_start[1] ( .Q(rx_start_Z[1]), .ADn(VCC), .ALn(AND2_2_Y), .CLK(PF_IOD_CDR_C0_0_RX_CLK_R), .D(is_match_3_Z), .EN(SSDetect_0_stream_start_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @71:29 CFG2 \is_match_0.un6_is_match_2 ( .A(PF_IOD_CDR_C0_0_RX_DATA[3]), .B(PF_IOD_CDR_C0_0_RX_DATA[2]), .Y(un6_is_match_2) ); defparam \is_match_0.un6_is_match_2 .INIT=4'h8; // @71:42 CFG2 \is_match_0.un3_is_match_2 ( .A(PF_IOD_CDR_C0_0_RX_DATA[3]), .B(PF_IOD_CDR_C0_0_RX_DATA[2]), .Y(un3_is_match_2) ); defparam \is_match_0.un3_is_match_2 .INIT=4'h1; // @71:29 CFG4 \is_match_0.un6_is_match_4 ( .A(PF_IOD_CDR_C0_0_RX_DATA[0]), .B(PF_IOD_CDR_C0_0_RX_DATA[1]), .C(un6_is_match_2), .D(PF_IOD_CDR_C0_0_RX_DATA[4]), .Y(un6_is_match_4) ); defparam \is_match_0.un6_is_match_4 .INIT=16'h8000; // @71:42 CFG4 \is_match_0.un3_is_match_4 ( .A(PF_IOD_CDR_C0_0_RX_DATA[0]), .B(PF_IOD_CDR_C0_0_RX_DATA[1]), .C(un3_is_match_2), .D(PF_IOD_CDR_C0_0_RX_DATA[4]), .Y(un3_is_match_4) ); defparam \is_match_0.un3_is_match_4 .INIT=16'h0010; // @71:29 CFG4 is_match_3 ( .A(PF_IOD_CDR_C0_0_RX_DATA[6]), .B(PF_IOD_CDR_C0_0_RX_DATA[5]), .C(un6_is_match_4), .D(un3_is_match_4), .Y(is_match_3_Z) ); defparam is_match_3.INIT=16'h6E7F; // @71:42 CFG2 \rx_start_2[0] ( .A(is_match_3_Z), .B(rx_start_Z[1]), .Y(rx_start_2_Z[0]) ); defparam \rx_start_2[0] .INIT=4'h8; GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* SSDetect */ module corejtagdebug_bufd_34s ( dut_tms_int, COREJTAGDEBUG_C0_0_TGT_TMS_0 ) ; input dut_tms_int ; output COREJTAGDEBUG_C0_0_TGT_TMS_0 ; wire dut_tms_int ; wire COREJTAGDEBUG_C0_0_TGT_TMS_0 ; wire [33:1] delay_sel; wire GND ; wire VCC ; // @15:34 BUFD \bufd_gen[25].BUFD_BLK ( .Y(delay_sel[26]), .A(delay_sel[25]) ); // @15:34 BUFD \bufd_gen[4].BUFD_BLK ( .Y(delay_sel[5]), .A(delay_sel[4]) ); // @15:34 BUFD \bufd_gen[11].BUFD_BLK ( .Y(delay_sel[12]), .A(delay_sel[11]) ); // @15:34 BUFD \bufd_gen[5].BUFD_BLK ( .Y(delay_sel[6]), .A(delay_sel[5]) ); // @15:34 BUFD \bufd_gen[32].BUFD_BLK ( .Y(delay_sel[33]), .A(delay_sel[32]) ); // @15:34 BUFD \bufd_gen[27].BUFD_BLK ( .Y(delay_sel[28]), .A(delay_sel[27]) ); // @15:34 BUFD \bufd_gen[33].BUFD_BLK ( .Y(COREJTAGDEBUG_C0_0_TGT_TMS_0), .A(delay_sel[33]) ); // @15:34 BUFD \bufd_gen[26].BUFD_BLK ( .Y(delay_sel[27]), .A(delay_sel[26]) ); // @15:34 BUFD \bufd_gen[19].BUFD_BLK ( .Y(delay_sel[20]), .A(delay_sel[19]) ); // @15:34 BUFD \bufd_gen[12].BUFD_BLK ( .Y(delay_sel[13]), .A(delay_sel[12]) ); // @15:34 BUFD \bufd_gen[2].BUFD_BLK ( .Y(delay_sel[3]), .A(delay_sel[2]) ); // @15:34 BUFD \bufd_gen[9].BUFD_BLK ( .Y(delay_sel[10]), .A(delay_sel[9]) ); // @15:34 BUFD \bufd_gen[3].BUFD_BLK ( .Y(delay_sel[4]), .A(delay_sel[3]) ); // @15:34 BUFD \bufd_gen[23].BUFD_BLK ( .Y(delay_sel[24]), .A(delay_sel[23]) ); // @15:34 BUFD \bufd_gen[17].BUFD_BLK ( .Y(delay_sel[18]), .A(delay_sel[17]) ); // @15:34 BUFD \bufd_gen[24].BUFD_BLK ( .Y(delay_sel[25]), .A(delay_sel[24]) ); // @15:34 BUFD \bufd_gen[18].BUFD_BLK ( .Y(delay_sel[19]), .A(delay_sel[18]) ); // @15:34 BUFD \bufd_gen[28].BUFD_BLK ( .Y(delay_sel[29]), .A(delay_sel[28]) ); // @15:34 BUFD \bufd_gen[14].BUFD_BLK ( .Y(delay_sel[15]), .A(delay_sel[14]) ); // @15:34 BUFD \bufd_gen[13].BUFD_BLK ( .Y(delay_sel[14]), .A(delay_sel[13]) ); // @15:34 BUFD \bufd_gen[20].BUFD_BLK ( .Y(delay_sel[21]), .A(delay_sel[20]) ); // @15:34 BUFD \bufd_gen[6].BUFD_BLK ( .Y(delay_sel[7]), .A(delay_sel[6]) ); // @15:34 BUFD \bufd_gen[10].BUFD_BLK ( .Y(delay_sel[11]), .A(delay_sel[10]) ); // @15:34 BUFD \bufd_gen[15].BUFD_BLK ( .Y(delay_sel[16]), .A(delay_sel[15]) ); // @15:34 BUFD \bufd_gen[22].BUFD_BLK ( .Y(delay_sel[23]), .A(delay_sel[22]) ); // @15:34 BUFD \bufd_gen[16].BUFD_BLK ( .Y(delay_sel[17]), .A(delay_sel[16]) ); // @15:34 BUFD \bufd_gen[8].BUFD_BLK ( .Y(delay_sel[9]), .A(delay_sel[8]) ); // @15:34 BUFD \bufd_gen[29].BUFD_BLK ( .Y(delay_sel[30]), .A(delay_sel[29]) ); // @15:34 BUFD \bufd_gen[30].BUFD_BLK ( .Y(delay_sel[31]), .A(delay_sel[30]) ); // @15:34 BUFD \bufd_gen[31].BUFD_BLK ( .Y(delay_sel[32]), .A(delay_sel[31]) ); // @15:34 BUFD \bufd_gen[21].BUFD_BLK ( .Y(delay_sel[22]), .A(delay_sel[21]) ); // @15:34 BUFD \bufd_gen[1].BUFD_BLK ( .Y(delay_sel[2]), .A(delay_sel[1]) ); // @15:34 BUFD \bufd_gen[7].BUFD_BLK ( .Y(delay_sel[8]), .A(delay_sel[7]) ); // @15:34 BUFD \bufd_gen[0].BUFD_BLK ( .Y(delay_sel[1]), .A(dut_tms_int) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* corejtagdebug_bufd_34s */ module corejtagdebug_bufd_34s_0 ( UTDIInt, COREJTAGDEBUG_C0_0_TGT_TDI_0 ) ; input UTDIInt ; output COREJTAGDEBUG_C0_0_TGT_TDI_0 ; wire UTDIInt ; wire COREJTAGDEBUG_C0_0_TGT_TDI_0 ; wire [33:1] delay_sel; wire GND ; wire VCC ; // @15:34 BUFD \bufd_gen[25].BUFD_BLK ( .Y(delay_sel[26]), .A(delay_sel[25]) ); // @15:34 BUFD \bufd_gen[4].BUFD_BLK ( .Y(delay_sel[5]), .A(delay_sel[4]) ); // @15:34 BUFD \bufd_gen[11].BUFD_BLK ( .Y(delay_sel[12]), .A(delay_sel[11]) ); // @15:34 BUFD \bufd_gen[5].BUFD_BLK ( .Y(delay_sel[6]), .A(delay_sel[5]) ); // @15:34 BUFD \bufd_gen[32].BUFD_BLK ( .Y(delay_sel[33]), .A(delay_sel[32]) ); // @15:34 BUFD \bufd_gen[27].BUFD_BLK ( .Y(delay_sel[28]), .A(delay_sel[27]) ); // @15:34 BUFD \bufd_gen[33].BUFD_BLK ( .Y(COREJTAGDEBUG_C0_0_TGT_TDI_0), .A(delay_sel[33]) ); // @15:34 BUFD \bufd_gen[26].BUFD_BLK ( .Y(delay_sel[27]), .A(delay_sel[26]) ); // @15:34 BUFD \bufd_gen[19].BUFD_BLK ( .Y(delay_sel[20]), .A(delay_sel[19]) ); // @15:34 BUFD \bufd_gen[12].BUFD_BLK ( .Y(delay_sel[13]), .A(delay_sel[12]) ); // @15:34 BUFD \bufd_gen[2].BUFD_BLK ( .Y(delay_sel[3]), .A(delay_sel[2]) ); // @15:34 BUFD \bufd_gen[9].BUFD_BLK ( .Y(delay_sel[10]), .A(delay_sel[9]) ); // @15:34 BUFD \bufd_gen[3].BUFD_BLK ( .Y(delay_sel[4]), .A(delay_sel[3]) ); // @15:34 BUFD \bufd_gen[23].BUFD_BLK ( .Y(delay_sel[24]), .A(delay_sel[23]) ); // @15:34 BUFD \bufd_gen[17].BUFD_BLK ( .Y(delay_sel[18]), .A(delay_sel[17]) ); // @15:34 BUFD \bufd_gen[24].BUFD_BLK ( .Y(delay_sel[25]), .A(delay_sel[24]) ); // @15:34 BUFD \bufd_gen[18].BUFD_BLK ( .Y(delay_sel[19]), .A(delay_sel[18]) ); // @15:34 BUFD \bufd_gen[28].BUFD_BLK ( .Y(delay_sel[29]), .A(delay_sel[28]) ); // @15:34 BUFD \bufd_gen[14].BUFD_BLK ( .Y(delay_sel[15]), .A(delay_sel[14]) ); // @15:34 BUFD \bufd_gen[13].BUFD_BLK ( .Y(delay_sel[14]), .A(delay_sel[13]) ); // @15:34 BUFD \bufd_gen[20].BUFD_BLK ( .Y(delay_sel[21]), .A(delay_sel[20]) ); // @15:34 BUFD \bufd_gen[6].BUFD_BLK ( .Y(delay_sel[7]), .A(delay_sel[6]) ); // @15:34 BUFD \bufd_gen[10].BUFD_BLK ( .Y(delay_sel[11]), .A(delay_sel[10]) ); // @15:34 BUFD \bufd_gen[15].BUFD_BLK ( .Y(delay_sel[16]), .A(delay_sel[15]) ); // @15:34 BUFD \bufd_gen[22].BUFD_BLK ( .Y(delay_sel[23]), .A(delay_sel[22]) ); // @15:34 BUFD \bufd_gen[16].BUFD_BLK ( .Y(delay_sel[17]), .A(delay_sel[16]) ); // @15:34 BUFD \bufd_gen[8].BUFD_BLK ( .Y(delay_sel[9]), .A(delay_sel[8]) ); // @15:34 BUFD \bufd_gen[29].BUFD_BLK ( .Y(delay_sel[30]), .A(delay_sel[29]) ); // @15:34 BUFD \bufd_gen[30].BUFD_BLK ( .Y(delay_sel[31]), .A(delay_sel[30]) ); // @15:34 BUFD \bufd_gen[31].BUFD_BLK ( .Y(delay_sel[32]), .A(delay_sel[31]) ); // @15:34 BUFD \bufd_gen[21].BUFD_BLK ( .Y(delay_sel[22]), .A(delay_sel[21]) ); // @15:34 BUFD \bufd_gen[1].BUFD_BLK ( .Y(delay_sel[2]), .A(delay_sel[1]) ); // @15:34 BUFD \bufd_gen[7].BUFD_BLK ( .Y(delay_sel[8]), .A(delay_sel[7]) ); // @15:34 BUFD \bufd_gen[0].BUFD_BLK ( .Y(delay_sel[1]), .A(UTDIInt) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* corejtagdebug_bufd_34s_0 */ module COREJTAGDEBUG_UJ_JTAG_26s_0s_34s_85_0_0 ( currTapState_7, currTapState_0, UIREGInt, UTDOInt_0, UTDODRVInt_0, COREJTAGDEBUG_C0_0_TGT_TDI_0, COREJTAGDEBUG_C0_0_TGT_TMS_0, un1_DUT_TCK_1z, N_974, shiftDR21, un1_shiftDR20, UDRCAPInt, shiftBP_ne_0, shiftIR_ne_0, UTDIInt, UDRUPDInt, iUDRCK, iUDRCK_i_0, iURSTB, UDRSHInt ) ; input currTapState_7 ; input currTapState_0 ; input [7:0] UIREGInt ; output UTDOInt_0 ; output UTDODRVInt_0 ; output COREJTAGDEBUG_C0_0_TGT_TDI_0 ; output COREJTAGDEBUG_C0_0_TGT_TMS_0 ; output un1_DUT_TCK_1z ; input N_974 ; input shiftDR21 ; input un1_shiftDR20 ; input UDRCAPInt ; input shiftBP_ne_0 ; input shiftIR_ne_0 ; input UTDIInt ; input UDRUPDInt ; input iUDRCK ; input iUDRCK_i_0 ; input iURSTB ; input UDRSHInt ; wire currTapState_7 ; wire currTapState_0 ; wire UTDOInt_0 ; wire UTDODRVInt_0 ; wire COREJTAGDEBUG_C0_0_TGT_TDI_0 ; wire COREJTAGDEBUG_C0_0_TGT_TMS_0 ; wire un1_DUT_TCK_1z ; wire N_974 ; wire shiftDR21 ; wire un1_shiftDR20 ; wire UDRCAPInt ; wire shiftBP_ne_0 ; wire shiftIR_ne_0 ; wire UTDIInt ; wire UDRUPDInt ; wire iUDRCK ; wire iUDRCK_i_0 ; wire iURSTB ; wire UDRSHInt ; wire [4:0] state_Z; wire [4:0] state_24; wire [2:2] state_0_2_iv_i_Z; wire [5:0] count_Z; wire [5:2] count_19; wire [3:0] state_0_2_iv_0; wire [4:2] state_0_2_iv_1; wire [1:1] state_0_2_iv_2; wire [2:2] state_0_2_iv_i_RNO_2_Z; wire [3:2] count_19_iv_0_Z; wire [2:2] countnext_1_1_Z; wire [0:0] state_24_2; wire [2:2] countnext_1_Z; wire [5:3] countnext_1_m_0; wire [4:4] countnext_1_m; wire [2:2] state_0_2_iv_3; wire UDRSH_i ; wire endofshift_Z ; wire VCC ; wire endofshift_2_Z ; wire GND ; wire un4_UTDODRV_Z ; wire tmsenb_Z ; wire un6_countnext_i ; wire pauselow_Z ; wire un1_pauselow8_Z ; wire UTDO_2_Z ; wire tckgo_Z ; wire tckgo_10 ; wire un1_tckgo_1_sqmuxa_i ; wire state133_RNIINL0C_Z ; wire N_70_i ; wire N_92_i ; wire state93_2_Z ; wire state93_Z ; wire state137_Z ; wire un1_UDRUPD_Z ; wire state_4_sqmuxa_2_s11 ; wire state136_Z ; wire un4_UTDODRV_3_Z ; wire state135_2_fc ; wire un10_countnext_axbxc1_Z ; wire N_72 ; wire state136_1_Z ; wire un1_state141_1_s12_0 ; wire un4_UTDODRV_4_Z ; wire N_99 ; wire state142_Z ; wire state140_Z ; wire un5_endofshift_Z ; wire state135_Z ; wire countnextzerott_N_5_mux ; wire un5_UTDO_fc ; wire state7_Z ; wire state138_Z ; wire state133_Z ; wire countnext_Z ; wire countnextzero ; wire tckgo_2_sqmuxa_1_Z ; wire tckgo_0_sqmuxa_Z ; wire dut_tms_int_Z ; wire state_0_sqmuxa_Z ; wire un1_state_0_sqmuxa_5_s3 ; wire N_80 ; wire N_102 ; wire un1_tckgo_2_sqmuxa_0_tz_Z ; wire countnextzero_N_4 ; wire un10_countnext_axbxc2_Z ; wire un1_state_6_Z ; wire state_1_sqmuxa_7_Z ; wire un1_state_1_sqmuxa_Z ; wire state_1_sqmuxa_5_Z ; wire tckgo12_0 ; wire N_7045_2 ; wire N_7045_1 ; wire un1_state_1_sqmuxa_0_0 ; wire count_19_iv_63_i_2_Z ; wire count_19_iv_0_22_i_2_Z ; wire count_19_iv_0_22_i_1_Z ; wire un1_state_1_sqmuxa_3_0_Z ; wire un1_state134_2_Z ; wire state134_Z ; wire un1_state_1_sqmuxa_2_0_Z ; wire tckgo12_Z ; wire state_1_sqmuxa_3_Z ; wire un1_state_0_sqmuxa_4_s7_1 ; wire N_74 ; wire N_96 ; wire N_70_4 ; wire UTDO_2_RNO_Z ; wire countnextzero_N_5_1 ; wire count_19_iv_63_i_1_Z ; wire un1_state_1_sqmuxa_3_1_Z ; wire un1_state_1_sqmuxa_1_Z ; wire un10_countnext_axbxc3_Z ; wire countnextzero_N_5_2 ; wire un1_state134_Z ; wire un10_countnext_c4_Z ; wire un1_state_0_sqmuxa_1_0_Z ; wire CO0 ; wire N_3 ; wire un1_state_0_sqmuxa_1_Z ; wire N_4 ; wire un1_count_0_sqmuxa_Z ; wire N_42 ; wire un10_countnext_axbxc5_Z ; wire un1_tckgo_2_sqmuxa_s5 ; wire N_5 ; wire un1_state142_s13 ; wire un1_state_1_sqmuxa_RNIRMORJ1_Z ; CFG1 pauselow_RNO ( .A(UDRSHInt), .Y(UDRSH_i) ); defparam pauselow_RNO.INIT=2'h1; // @16:407 SLE endofshift ( .Q(endofshift_Z), .ADn(VCC), .ALn(iURSTB), .CLK(iUDRCK_i_0), .D(endofshift_2_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @16:443 SLE UTDODRV ( .Q(UTDODRVInt_0), .ADn(VCC), .ALn(iURSTB), .CLK(iUDRCK), .D(un4_UTDODRV_Z), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @16:407 SLE tmsenb ( .Q(tmsenb_Z), .ADn(VCC), .ALn(iURSTB), .CLK(iUDRCK_i_0), .D(un6_countnext_i), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @16:424 SLE pauselow ( .Q(pauselow_Z), .ADn(VCC), .ALn(iURSTB), .CLK(iUDRCK), .D(UDRSH_i), .EN(un1_pauselow8_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @16:443 SLE UTDO ( .Q(UTDOInt_0), .ADn(VCC), .ALn(iURSTB), .CLK(iUDRCK), .D(UTDO_2_Z), .EN(UDRSHInt), .LAT(GND), .SD(GND), .SLn(VCC) ); // @16:215 SLE tckgo ( .Q(tckgo_Z), .ADn(VCC), .ALn(iURSTB), .CLK(iUDRCK), .D(tckgo_10), .EN(un1_tckgo_1_sqmuxa_i), .LAT(GND), .SD(GND), .SLn(VCC) ); // @16:215 SLE \state[4] ( .Q(state_Z[4]), .ADn(VCC), .ALn(iURSTB), .CLK(iUDRCK), .D(state_24[4]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @16:215 SLE \state[3] ( .Q(state_Z[3]), .ADn(VCC), .ALn(iURSTB), .CLK(iUDRCK), .D(state_24[3]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @16:215 SLE \state[2] ( .Q(state_Z[2]), .ADn(VCC), .ALn(iURSTB), .CLK(iUDRCK), .D(state_0_2_iv_i_Z[2]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @16:215 SLE \state[1] ( .Q(state_Z[1]), .ADn(VCC), .ALn(iURSTB), .CLK(iUDRCK), .D(state_24[1]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @16:215 SLE \state[0] ( .Q(state_Z[0]), .ADn(VCC), .ALn(iURSTB), .CLK(iUDRCK), .D(state_24[0]), .EN(VCC), .LAT(GND), .SD(GND), .SLn(VCC) ); // @16:215 SLE \count[5] ( .Q(count_Z[5]), .ADn(VCC), .ALn(iURSTB), .CLK(iUDRCK), .D(count_19[5]), .EN(state133_RNIINL0C_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @16:215 SLE \count[4] ( .Q(count_Z[4]), .ADn(VCC), .ALn(iURSTB), .CLK(iUDRCK), .D(count_19[4]), .EN(state133_RNIINL0C_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @16:215 SLE \count[3] ( .Q(count_Z[3]), .ADn(VCC), .ALn(iURSTB), .CLK(iUDRCK), .D(count_19[3]), .EN(state133_RNIINL0C_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @16:215 SLE \count[2] ( .Q(count_Z[2]), .ADn(VCC), .ALn(iURSTB), .CLK(iUDRCK), .D(count_19[2]), .EN(state133_RNIINL0C_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @16:215 SLE \count[1] ( .Q(count_Z[1]), .ADn(VCC), .ALn(iURSTB), .CLK(iUDRCK), .D(N_70_i), .EN(state133_RNIINL0C_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @16:215 SLE \count[0] ( .Q(count_Z[0]), .ADn(VCC), .ALn(iURSTB), .CLK(iUDRCK), .D(N_92_i), .EN(state133_RNIINL0C_Z), .LAT(GND), .SD(GND), .SLn(VCC) ); // @16:200 CFG3 state93 ( .A(count_Z[4]), .B(state93_2_Z), .C(count_Z[5]), .Y(state93_Z) ); defparam state93.INIT=8'h04; // @18:502 CFG2 state137_RNI7PQT9 ( .A(state137_Z), .B(un1_UDRUPD_Z), .Y(state_4_sqmuxa_2_s11) ); defparam state137_RNI7PQT9.INIT=4'h2; // @16:221 CFG3 \state_RNO_0[3] ( .A(state_0_2_iv_0[3]), .B(un1_UDRUPD_Z), .C(state136_Z), .Y(state_0_2_iv_1[3]) ); defparam \state_RNO_0[3] .INIT=8'hBA; // @16:221 CFG3 \state_RNO_0[1] ( .A(state_0_2_iv_0[1]), .B(un1_UDRUPD_Z), .C(state136_Z), .Y(state_0_2_iv_2[1]) ); defparam \state_RNO_0[1] .INIT=8'hBA; // @19:56 CFG2 un4_UTDODRV_3 ( .A(UIREGInt[1]), .B(UIREGInt[3]), .Y(un4_UTDODRV_3_Z) ); defparam un4_UTDODRV_3.INIT=4'h1; // @16:215 CFG2 count_19_iv_0_22_i_a9_4_1 ( .A(state_Z[4]), .B(state_Z[3]), .Y(state135_2_fc) ); defparam count_19_iv_0_22_i_a9_4_1.INIT=4'h1; // @16:196 CFG2 un10_countnext_axbxc1 ( .A(count_Z[0]), .B(count_Z[1]), .Y(un10_countnext_axbxc1_Z) ); defparam un10_countnext_axbxc1.INIT=4'h9; // @16:197 CFG2 un6_countnext ( .A(state_Z[4]), .B(state_Z[3]), .Y(un6_countnext_i) ); defparam un6_countnext.INIT=4'hB; // @16:215 CFG2 count_19_iv_0_22_i_o9 ( .A(state_Z[4]), .B(state_Z[3]), .Y(N_72) ); defparam count_19_iv_0_22_i_o9.INIT=4'h7; // @16:215 CFG2 un1_pauselow8 ( .A(UDRSHInt), .B(tckgo_Z), .Y(un1_pauselow8_Z) ); defparam un1_pauselow8.INIT=4'hD; // @16:276 CFG2 state136_1 ( .A(state_Z[1]), .B(state_Z[2]), .Y(state136_1_Z) ); defparam state136_1.INIT=4'h8; // @18:502 CFG2 count_19_iv_0_22_i_o9_RNIUDLNB ( .A(N_72), .B(state_Z[0]), .Y(un1_state141_1_s12_0) ); defparam count_19_iv_0_22_i_o9_RNIUDLNB.INIT=4'h1; // @19:56 CFG4 un4_UTDODRV_4 ( .A(UIREGInt[6]), .B(UIREGInt[4]), .C(UIREGInt[2]), .D(UIREGInt[0]), .Y(un4_UTDODRV_4_Z) ); defparam un4_UTDODRV_4.INIT=16'h8000; // @16:215 CFG4 count_19_iv_63_i_a9_2 ( .A(state_Z[4]), .B(state_Z[1]), .C(state_Z[3]), .D(state_Z[2]), .Y(N_99) ); defparam count_19_iv_63_i_a9_2.INIT=16'h0001; // @16:365 CFG3 state142 ( .A(state_Z[4]), .B(state_Z[0]), .C(state_Z[3]), .Y(state142_Z) ); defparam state142.INIT=8'h80; // @16:336 CFG4 state140 ( .A(state_Z[2]), .B(state_Z[4]), .C(state_Z[0]), .D(state_Z[1]), .Y(state140_Z) ); defparam state140.INIT=16'h8000; // @16:433 CFG4 un1_DUT_TCK ( .A(iUDRCK), .B(tckgo_Z), .C(pauselow_Z), .D(UDRSHInt), .Y(un1_DUT_TCK_1z) ); defparam un1_DUT_TCK.INIT=16'hF4FF; // @16:282 CFG4 un5_endofshift ( .A(state_Z[2]), .B(state_Z[3]), .C(state_Z[1]), .D(state_Z[0]), .Y(un5_endofshift_Z) ); defparam un5_endofshift.INIT=16'h8000; // @16:254 CFG3 state135 ( .A(state_Z[1]), .B(state135_2_fc), .C(state_Z[0]), .Y(state135_Z) ); defparam state135.INIT=8'h08; // @16:276 CFG3 state136 ( .A(state_Z[3]), .B(state_Z[0]), .C(state136_1_Z), .Y(state136_Z) ); defparam state136.INIT=8'h20; // @16:291 CFG3 state137 ( .A(state_Z[4]), .B(state_Z[0]), .C(state136_1_Z), .Y(state137_Z) ); defparam state137.INIT=8'h20; // @16:200 CFG3 countnextzerott_m2_0_a2 ( .A(count_Z[4]), .B(count_Z[5]), .C(count_Z[3]), .Y(countnextzerott_N_5_mux) ); defparam countnextzerott_m2_0_a2.INIT=8'h01; // @16:449 CFG3 un5_UTDO ( .A(state_Z[2]), .B(state_Z[4]), .C(state_Z[3]), .Y(un5_UTDO_fc) ); defparam un5_UTDO.INIT=8'h04; // @16:74 CFG3 un1_UDRUPD ( .A(UDRSHInt), .B(state7_Z), .C(UDRUPDInt), .Y(un1_UDRUPD_Z) ); defparam un1_UDRUPD.INIT=8'hFE; // @16:306 CFG3 state138 ( .A(state_Z[1]), .B(state135_2_fc), .C(state_Z[0]), .Y(state138_Z) ); defparam state138.INIT=8'h80; // @16:222 CFG3 state133 ( .A(state_Z[2]), .B(state_Z[4]), .C(state_Z[3]), .Y(state133_Z) ); defparam state133.INIT=8'h01; // @16:196 CFG3 countnext ( .A(state_Z[1]), .B(state_Z[2]), .C(state_Z[0]), .Y(countnext_Z) ); defparam countnext.INIT=8'h80; // @16:221 CFG3 tckgo_10_iv ( .A(countnextzero), .B(tckgo_2_sqmuxa_1_Z), .C(tckgo_0_sqmuxa_Z), .Y(tckgo_10) ); defparam tckgo_10_iv.INIT=8'hDC; // @16:202 CFG3 dut_tms_int ( .A(endofshift_Z), .B(UTDIInt), .C(tmsenb_Z), .Y(dut_tms_int_Z) ); defparam dut_tms_int.INIT=8'hEA; // @16:449 CFG4 state_0_sqmuxa ( .A(UDRSHInt), .B(state_Z[0]), .C(state_Z[1]), .D(un5_UTDO_fc), .Y(state_0_sqmuxa_Z) ); defparam state_0_sqmuxa.INIT=16'h2A00; CFG4 count_19_iv_0_22_i_a9_4_1_RNIO0MNI ( .A(state135_2_fc), .B(countnextzero), .C(UDRSHInt), .D(state_Z[1]), .Y(un1_state_0_sqmuxa_5_s3) ); defparam count_19_iv_0_22_i_a9_4_1_RNIO0MNI.INIT=16'h8000; // @16:215 CFG4 count_19_iv_0_22_i_a9_5 ( .A(un10_countnext_axbxc1_Z), .B(N_72), .C(state_Z[2]), .D(state_Z[1]), .Y(N_80) ); defparam count_19_iv_0_22_i_a9_5.INIT=16'h0001; // @16:215 CFG4 count_19_iv_63_i_a9_5 ( .A(state_Z[2]), .B(count_Z[0]), .C(state_Z[1]), .D(N_72), .Y(N_102) ); defparam count_19_iv_63_i_a9_5.INIT=16'h0004; // @19:56 CFG4 un4_UTDODRV ( .A(UIREGInt[5]), .B(UIREGInt[7]), .C(un4_UTDODRV_4_Z), .D(un4_UTDODRV_3_Z), .Y(un4_UTDODRV_Z) ); defparam un4_UTDODRV.INIT=16'h1000; // @16:221 CFG3 un1_tckgo_2_sqmuxa_0_tz ( .A(countnextzero), .B(UDRSHInt), .C(un1_UDRUPD_Z), .Y(un1_tckgo_2_sqmuxa_0_tz_Z) ); defparam un1_tckgo_2_sqmuxa_0_tz.INIT=8'h4F; // @16:200 CFG4 countnextzero_m3 ( .A(count_Z[5]), .B(count_Z[3]), .C(count_Z[4]), .D(count_Z[0]), .Y(countnextzero_N_4) ); defparam countnextzero_m3.INIT=16'h0100; // @16:196 CFG3 un10_countnext_axbxc2 ( .A(count_Z[2]), .B(count_Z[1]), .C(count_Z[0]), .Y(un10_countnext_axbxc2_Z) ); defparam un10_countnext_axbxc2.INIT=8'hA9; CFG2 state133_RNIINL0C ( .A(state133_Z), .B(UDRSHInt), .Y(state133_RNIINL0C_Z) ); defparam state133_RNIINL0C.INIT=4'hE; // @16:221 CFG4 un1_state_6 ( .A(state136_1_Z), .B(un6_countnext_i), .C(state_Z[4]), .D(state_Z[0]), .Y(un1_state_6_Z) ); defparam un1_state_6.INIT=16'hAAA2; // @16:291 CFG3 state_1_sqmuxa_7 ( .A(countnextzero), .B(UDRSHInt), .C(state137_Z), .Y(state_1_sqmuxa_7_Z) ); defparam state_1_sqmuxa_7.INIT=8'h40; // @16:221 CFG3 un1_state_1_sqmuxa ( .A(state93_Z), .B(UDRSHInt), .C(un1_UDRUPD_Z), .Y(un1_state_1_sqmuxa_Z) ); defparam un1_state_1_sqmuxa.INIT=8'h4F; // @16:279 CFG3 state_1_sqmuxa_5 ( .A(countnextzero), .B(UDRSHInt), .C(state136_Z), .Y(state_1_sqmuxa_5_Z) ); defparam state_1_sqmuxa_5.INIT=8'h40; // @16:413 CFG2 endofshift_2 ( .A(countnextzero), .B(un5_endofshift_Z), .Y(endofshift_2_Z) ); defparam endofshift_2.INIT=4'h8; // @16:142 CFG4 tckgo12_0_0 ( .A(count_Z[0]), .B(countnext_Z), .C(count_Z[2]), .D(count_Z[1]), .Y(tckgo12_0) ); defparam tckgo12_0_0.INIT=16'h3044; // @16:449 CFG2 UTDO_2_d_2_0 ( .A(un5_UTDO_fc), .B(count_Z[0]), .Y(N_7045_2) ); defparam UTDO_2_d_2_0.INIT=4'h8; // @16:449 CFG4 UTDO_2_d_1_0 ( .A(currTapState_7), .B(un5_UTDO_fc), .C(shiftIR_ne_0), .D(shiftBP_ne_0), .Y(N_7045_1) ); defparam UTDO_2_d_1_0.INIT=16'h3120; // @18:502 CFG3 state142_RNIR1FRF ( .A(UDRSHInt), .B(un1_UDRUPD_Z), .C(state142_Z), .Y(un1_state_1_sqmuxa_0_0) ); defparam state142_RNIR1FRF.INIT=8'hB0; // @16:215 CFG4 count_19_iv_63_i_2 ( .A(count_Z[1]), .B(N_72), .C(un5_UTDO_fc), .D(countnext_Z), .Y(count_19_iv_63_i_2_Z) ); defparam count_19_iv_63_i_2.INIT=16'h5054; // @16:215 CFG4 count_19_iv_0_22_i_2 ( .A(count_Z[2]), .B(N_72), .C(un5_UTDO_fc), .D(countnext_Z), .Y(count_19_iv_0_22_i_2_Z) ); defparam count_19_iv_0_22_i_2.INIT=16'h5054; // @16:215 CFG4 count_19_iv_0_22_i_1 ( .A(un10_countnext_axbxc1_Z), .B(N_80), .C(count_Z[2]), .D(N_99), .Y(count_19_iv_0_22_i_1_Z) ); defparam count_19_iv_0_22_i_1.INIT=16'hFFCD; // @16:221 CFG4 un1_state_1_sqmuxa_3_0 ( .A(UDRUPDInt), .B(UDRSHInt), .C(state142_Z), .D(state7_Z), .Y(un1_state_1_sqmuxa_3_0_Z) ); defparam un1_state_1_sqmuxa_3_0.INIT=16'hC0E2; // @16:221 CFG4 un1_state134_2 ( .A(un5_endofshift_Z), .B(state138_Z), .C(state137_Z), .D(state136_Z), .Y(un1_state134_2_Z) ); defparam un1_state134_2.INIT=16'hFFFE; // @16:221 CFG4 state134 ( .A(state_Z[4]), .B(state_Z[1]), .C(state_Z[3]), .D(state_Z[2]), .Y(state134_Z) ); defparam state134.INIT=16'h33D0; // @16:221 CFG4 un1_state_1_sqmuxa_2_0 ( .A(un1_UDRUPD_Z), .B(UDRSHInt), .C(countnextzero), .D(un5_endofshift_Z), .Y(un1_state_1_sqmuxa_2_0_Z) ); defparam un1_state_1_sqmuxa_2_0.INIT=16'h5D00; CFG4 \state_0_2_iv_i_RNO_2[2] ( .A(state137_Z), .B(countnextzero), .C(UDRSHInt), .D(state140_Z), .Y(state_0_2_iv_i_RNO_2_Z[2]) ); defparam \state_0_2_iv_i_RNO_2[2] .INIT=16'hC080; // @16:278 CFG2 tckgo_0_sqmuxa ( .A(un1_state_6_Z), .B(UDRSHInt), .Y(tckgo_0_sqmuxa_Z) ); defparam tckgo_0_sqmuxa.INIT=4'h8; // @16:254 CFG3 state_1_sqmuxa_3 ( .A(UDRSHInt), .B(state135_Z), .C(tckgo12_Z), .Y(state_1_sqmuxa_3_Z) ); defparam state_1_sqmuxa_3.INIT=8'h80; // @18:502 CFG4 \state_RNO_1[4] ( .A(state136_Z), .B(countnextzero), .C(UDRSHInt), .D(un5_endofshift_Z), .Y(un1_state_0_sqmuxa_4_s7_1) ); defparam \state_RNO_1[4] .INIT=16'hC080; // @16:215 CFG3 count_19_iv_0_22_i_a9 ( .A(un10_countnext_axbxc1_Z), .B(un5_UTDO_fc), .C(countnext_Z), .Y(N_74) ); defparam count_19_iv_0_22_i_a9.INIT=8'h10; // @16:215 CFG3 count_19_iv_63_i_a9 ( .A(countnext_Z), .B(count_Z[0]), .C(un5_UTDO_fc), .Y(N_96) ); defparam count_19_iv_63_i_a9.INIT=8'h08; // @16:215 CFG3 count_19_iv_0_22_i_4 ( .A(UDRSHInt), .B(state135_Z), .C(tckgo12_Z), .Y(N_70_4) ); defparam count_19_iv_0_22_i_4.INIT=8'hD5; // @16:226 CFG2 state7 ( .A(un4_UTDODRV_Z), .B(UDRCAPInt), .Y(state7_Z) ); defparam state7.INIT=4'h8; CFG4 UTDO_2_RNO ( .A(currTapState_0), .B(un5_UTDO_fc), .C(un1_shiftDR20), .D(shiftDR21), .Y(UTDO_2_RNO_Z) ); defparam UTDO_2_RNO.INIT=16'h2220; // @16:200 CFG4 countnextzero_m4_1_0 ( .A(countnextzerott_N_5_mux), .B(UTDIInt), .C(countnext_Z), .D(un6_countnext_i), .Y(countnextzero_N_5_1) ); defparam countnextzero_m4_1_0.INIT=16'h0C0D; // @16:221 CFG4 \count_19_iv_0[2] ( .A(count_Z[3]), .B(un10_countnext_axbxc2_Z), .C(N_72), .D(un5_UTDO_fc), .Y(count_19_iv_0_Z[2]) ); defparam \count_19_iv_0[2] .INIT=16'hAE0C; // @16:215 CFG4 count_19_iv_63_i_1 ( .A(count_Z[0]), .B(count_Z[1]), .C(N_102), .D(N_99), .Y(count_19_iv_63_i_1_Z) ); defparam count_19_iv_63_i_1.INIT=16'hFFF2; // @16:221 CFG3 un1_state_1_sqmuxa_3_1 ( .A(state7_Z), .B(un1_state_1_sqmuxa_3_0_Z), .C(state133_Z), .Y(un1_state_1_sqmuxa_3_1_Z) ); defparam un1_state_1_sqmuxa_3_1.INIT=8'hDC; // @16:254 CFG4 tckgo_2_sqmuxa_1 ( .A(state135_Z), .B(UDRSHInt), .C(countnextzero), .D(tckgo12_Z), .Y(tckgo_2_sqmuxa_1_Z) ); defparam tckgo_2_sqmuxa_1.INIT=16'h0008; // @16:221 CFG3 un1_state_1_sqmuxa_1 ( .A(state140_Z), .B(state_1_sqmuxa_7_Z), .C(un1_tckgo_2_sqmuxa_0_tz_Z), .Y(un1_state_1_sqmuxa_1_Z) ); defparam un1_state_1_sqmuxa_1.INIT=8'hEC; // @16:196 CFG4 un10_countnext_axbxc3 ( .A(count_Z[3]), .B(count_Z[2]), .C(count_Z[1]), .D(count_Z[0]), .Y(un10_countnext_axbxc3_Z) ); defparam un10_countnext_axbxc3.INIT=16'hAAA9; // @16:200 CFG2 countnextzero_m4_2_0 ( .A(countnext_Z), .B(countnextzero_N_4), .Y(countnextzero_N_5_2) ); defparam countnextzero_m4_2_0.INIT=4'h2; // @16:196 CFG4 \countnext_1_1[2] ( .A(un6_countnext_i), .B(countnext_Z), .C(count_Z[3]), .D(un10_countnext_axbxc2_Z), .Y(countnext_1_1_Z[2]) ); defparam \countnext_1_1[2] .INIT=16'hDC10; // @16:200 CFG4 state93_2 ( .A(count_Z[0]), .B(un10_countnext_axbxc1_Z), .C(un10_countnext_axbxc2_Z), .D(un10_countnext_axbxc3_Z), .Y(state93_2_Z) ); defparam state93_2.INIT=16'h0002; // @16:221 CFG3 un1_state134 ( .A(state134_Z), .B(un1_state134_2_Z), .C(state140_Z), .Y(un1_state134_Z) ); defparam un1_state134.INIT=8'hFE; // @16:196 CFG4 un10_countnext_c4 ( .A(count_Z[3]), .B(count_Z[2]), .C(count_Z[1]), .D(count_Z[0]), .Y(un10_countnext_c4_Z) ); defparam un10_countnext_c4.INIT=16'hFFFE; // @16:221 CFG3 un1_state_1_sqmuxa_1_RNIT9DEA ( .A(un1_state_1_sqmuxa_1_Z), .B(state_1_sqmuxa_5_Z), .C(un1_state_1_sqmuxa_2_0_Z), .Y(state_24_2[0]) ); defparam un1_state_1_sqmuxa_1_RNIT9DEA.INIT=8'hFE; // @16:215 CFG4 tckgo_RNO ( .A(un1_UDRUPD_Z), .B(state135_Z), .C(UDRSHInt), .D(un1_state_6_Z), .Y(un1_tckgo_1_sqmuxa_i) ); defparam tckgo_RNO.INIT=16'hA2F3; // @16:449 CFG4 UTDO_2 ( .A(N_7045_1), .B(N_7045_2), .C(UTDO_2_RNO_Z), .D(N_974), .Y(UTDO_2_Z) ); defparam UTDO_2.INIT=16'hFE0E; // @16:196 CFG4 \countnext_1[2] ( .A(countnext_Z), .B(countnext_1_1_Z[2]), .C(UTDIInt), .D(un6_countnext_i), .Y(countnext_1_Z[2]) ); defparam \countnext_1[2] .INIT=16'hDCCC; // @16:221 CFG4 \count_19_iv_0[3] ( .A(N_72), .B(UTDIInt), .C(un5_UTDO_fc), .D(un10_countnext_axbxc3_Z), .Y(count_19_iv_0_Z[3]) ); defparam \count_19_iv_0[3] .INIT=16'hD5C0; // @16:221 CFG4 un1_state_0_sqmuxa_1_0 ( .A(state134_Z), .B(UDRSHInt), .C(state_0_sqmuxa_Z), .D(un1_UDRUPD_Z), .Y(un1_state_0_sqmuxa_1_0_Z) ); defparam un1_state_0_sqmuxa_1_0.INIT=16'hF8FA; // @16:247 CFG4 state_0_sqmuxa_RNIEDGGK ( .A(UDRSHInt), .B(state_Z[0]), .C(state134_Z), .D(state_0_sqmuxa_Z), .Y(CO0) ); defparam state_0_sqmuxa_RNIEDGGK.INIT=16'hCC80; // @16:247 CFG4 \state_RNO_1[0] ( .A(UDRSHInt), .B(state_Z[0]), .C(state134_Z), .D(state_0_sqmuxa_Z), .Y(N_3) ); defparam \state_RNO_1[0] .INIT=16'h336C; // @16:221 CFG4 \count_19_iv_RNO[3] ( .A(un6_countnext_i), .B(count_Z[4]), .C(countnext_Z), .D(un10_countnext_axbxc3_Z), .Y(countnext_1_m_0[3]) ); defparam \count_19_iv_RNO[3] .INIT=16'hF404; // @16:221 CFG4 un1_state_0_sqmuxa_1 ( .A(un1_UDRUPD_Z), .B(un1_state_0_sqmuxa_1_0_Z), .C(UDRSHInt), .D(un5_UTDO_fc), .Y(un1_state_0_sqmuxa_1_Z) ); defparam un1_state_0_sqmuxa_1.INIT=16'hFDCC; // @16:142 CFG2 tckgo12 ( .A(countnext_1_Z[2]), .B(tckgo12_0), .Y(tckgo12_Z) ); defparam tckgo12.INIT=4'h8; // @16:200 CFG4 countnextzero_m6 ( .A(count_Z[2]), .B(count_Z[1]), .C(countnextzero_N_5_2), .D(countnextzero_N_5_1), .Y(countnextzero) ); defparam countnextzero_m6.INIT=16'h0001; // @16:247 CFG2 \state_RNO_2[1] ( .A(CO0), .B(state_Z[1]), .Y(N_4) ); defparam \state_RNO_2[1] .INIT=4'h6; // @16:221 CFG4 un1_count_0_sqmuxa ( .A(state135_Z), .B(UDRSHInt), .C(tckgo12_Z), .D(un1_state134_Z), .Y(un1_count_0_sqmuxa_Z) ); defparam un1_count_0_sqmuxa.INIT=16'hCC08; // @16:215 CFG4 \count_RNO[1] ( .A(count_19_iv_0_22_i_2_Z), .B(N_70_4), .C(N_74), .D(count_19_iv_0_22_i_1_Z), .Y(N_70_i) ); defparam \count_RNO[1] .INIT=16'h0001; // @16:196 CFG4 \countnext_1_0[4] ( .A(count_Z[5]), .B(count_Z[4]), .C(un10_countnext_c4_Z), .D(countnext_Z), .Y(N_42) ); defparam \countnext_1_0[4] .INIT=16'hC3AA; // @16:196 CFG3 un10_countnext_axbxc5 ( .A(count_Z[4]), .B(un10_countnext_c4_Z), .C(count_Z[5]), .Y(un10_countnext_axbxc5_Z) ); defparam un10_countnext_axbxc5.INIT=8'hE1; // @18:502 CFG4 tckgo_2_sqmuxa_1_RNI3SFHG ( .A(tckgo_2_sqmuxa_1_Z), .B(un1_state_0_sqmuxa_1_Z), .C(state138_Z), .D(un1_tckgo_2_sqmuxa_0_tz_Z), .Y(un1_tckgo_2_sqmuxa_s5) ); defparam tckgo_2_sqmuxa_1_RNI3SFHG.INIT=16'h3222; // @16:247 CFG3 \state_0_2_iv_i_RNO_1[2] ( .A(state_Z[2]), .B(state_Z[1]), .C(CO0), .Y(N_5) ); defparam \state_0_2_iv_i_RNO_1[2] .INIT=8'h6A; // @16:215 CFG4 \count_RNO[0] ( .A(count_19_iv_63_i_2_Z), .B(N_96), .C(N_70_4), .D(count_19_iv_63_i_1_Z), .Y(N_92_i) ); defparam \count_RNO[0] .INIT=16'h0001; // @16:221 CFG3 \state_RNO_1[3] ( .A(state_Z[3]), .B(un1_state_0_sqmuxa_1_Z), .C(un1_state_0_sqmuxa_5_s3), .Y(state_0_2_iv_0[3]) ); defparam \state_RNO_1[3] .INIT=8'hF8; // @16:221 CFG3 \state_RNO_0[0] ( .A(N_3), .B(un1_state_0_sqmuxa_1_Z), .C(un1_state_0_sqmuxa_5_s3), .Y(state_0_2_iv_0[0]) ); defparam \state_RNO_0[0] .INIT=8'hF8; // @18:502 CFG4 state93_RNI606C01 ( .A(un1_UDRUPD_Z), .B(un1_state_1_sqmuxa_0_0), .C(state93_Z), .D(un1_state_0_sqmuxa_1_Z), .Y(un1_state142_s13) ); defparam state93_RNI606C01.INIT=16'h004C; // @16:221 CFG3 \count_19_iv[3] ( .A(count_19_iv_0_Z[3]), .B(countnext_1_m_0[3]), .C(un1_count_0_sqmuxa_Z), .Y(count_19[3]) ); defparam \count_19_iv[3] .INIT=8'hEA; // @16:221 CFG3 \count_19_iv[2] ( .A(count_19_iv_0_Z[2]), .B(countnext_1_Z[2]), .C(un1_count_0_sqmuxa_Z), .Y(count_19[2]) ); defparam \count_19_iv[2] .INIT=8'hEA; // @16:221 CFG4 \count_19_0_iv_RNO[4] ( .A(countnext_Z), .B(un6_countnext_i), .C(un1_count_0_sqmuxa_Z), .D(N_42), .Y(countnext_1_m[4]) ); defparam \count_19_0_iv_RNO[4] .INIT=16'hB000; // @16:221 CFG4 \state_RNO_0[4] ( .A(state_1_sqmuxa_3_Z), .B(state_Z[4]), .C(un1_state_0_sqmuxa_1_Z), .D(un1_state_0_sqmuxa_4_s7_1), .Y(state_0_2_iv_1[4]) ); defparam \state_RNO_0[4] .INIT=16'hFFEA; // @16:221 CFG4 \state_0_2_iv_i_RNO_0[2] ( .A(un1_state_1_sqmuxa_3_1_Z), .B(N_5), .C(state_0_2_iv_i_RNO_2_Z[2]), .D(un1_state_0_sqmuxa_1_Z), .Y(state_0_2_iv_1[2]) ); defparam \state_0_2_iv_i_RNO_0[2] .INIT=16'h33FA; // @16:221 CFG4 \state_RNO_1[1] ( .A(N_4), .B(un1_state_0_sqmuxa_1_Z), .C(un1_UDRUPD_Z), .D(state135_Z), .Y(state_0_2_iv_0[1]) ); defparam \state_RNO_1[1] .INIT=16'h8B88; CFG4 un1_state_1_sqmuxa_RNIRMORJ1 ( .A(un1_state_0_sqmuxa_1_Z), .B(un1_state142_s13), .C(un1_state141_1_s12_0), .D(un1_state_1_sqmuxa_Z), .Y(un1_state_1_sqmuxa_RNIRMORJ1_Z) ); defparam un1_state_1_sqmuxa_RNIRMORJ1.INIT=16'hDCCC; // @16:221 CFG4 \count_19_0_iv_RNO[5] ( .A(UTDIInt), .B(un6_countnext_i), .C(countnext_Z), .D(un10_countnext_axbxc5_Z), .Y(countnext_1_m_0[5]) ); defparam \count_19_0_iv_RNO[5] .INIT=16'hF202; // @16:221 CFG4 \count_19_0_iv[4] ( .A(count_Z[4]), .B(un10_countnext_c4_Z), .C(N_72), .D(countnext_1_m[4]), .Y(count_19[4]) ); defparam \count_19_0_iv[4] .INIT=16'hFF09; // @16:221 CFG4 \state_0_2_iv_i_RNO[2] ( .A(state_1_sqmuxa_3_Z), .B(un1_state_0_sqmuxa_5_s3), .C(state_0_2_iv_1[2]), .D(un1_state142_s13), .Y(state_0_2_iv_3[2]) ); defparam \state_0_2_iv_i_RNO[2] .INIT=16'hFFFE; // @16:221 CFG4 \state_RNO[3] ( .A(state_0_2_iv_1[3]), .B(un1_state_1_sqmuxa_RNIRMORJ1_Z), .C(state_1_sqmuxa_5_Z), .D(un1_state_1_sqmuxa_2_0_Z), .Y(state_24[3]) ); defparam \state_RNO[3] .INIT=16'hFFFE; // @16:221 CFG4 \state_RNO[0] ( .A(state_24_2[0]), .B(un1_tckgo_2_sqmuxa_s5), .C(state_0_2_iv_0[0]), .D(un1_state142_s13), .Y(state_24[0]) ); defparam \state_RNO[0] .INIT=16'hFFFE; // @16:221 CFG4 \state_RNO[1] ( .A(un1_tckgo_2_sqmuxa_s5), .B(state_0_2_iv_2[1]), .C(state_4_sqmuxa_2_s11), .D(state_24_2[0]), .Y(state_24[1]) ); defparam \state_RNO[1] .INIT=16'hFFFE; // @16:221 CFG4 \count_19_0_iv[5] ( .A(countnext_1_m_0[5]), .B(un1_count_0_sqmuxa_Z), .C(N_72), .D(un10_countnext_axbxc5_Z), .Y(count_19[5]) ); defparam \count_19_0_iv[5] .INIT=16'h8F88; // @16:221 CFG4 \state_RNO[4] ( .A(state_0_2_iv_1[4]), .B(un1_state_1_sqmuxa_RNIRMORJ1_Z), .C(state_4_sqmuxa_2_s11), .D(un1_state_1_sqmuxa_1_Z), .Y(state_24[4]) ); defparam \state_RNO[4] .INIT=16'hFFFE; // @16:215 CFG4 \state_0_2_iv_i[2] ( .A(un1_state_1_sqmuxa_Z), .B(un1_state141_1_s12_0), .C(state_0_2_iv_3[2]), .D(un1_state_0_sqmuxa_1_Z), .Y(state_0_2_iv_i_Z[2]) ); defparam \state_0_2_iv_i[2] .INIT=16'h0F07; //@18:502 // @16:211 corejtagdebug_bufd_34s BUFD_TMS ( .dut_tms_int(dut_tms_int_Z), .COREJTAGDEBUG_C0_0_TGT_TMS_0(COREJTAGDEBUG_C0_0_TGT_TMS_0) ); // @16:212 corejtagdebug_bufd_34s_0 BUFD_TDI ( .UTDIInt(UTDIInt), .COREJTAGDEBUG_C0_0_TGT_TDI_0(COREJTAGDEBUG_C0_0_TGT_TDI_0) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* COREJTAGDEBUG_UJ_JTAG_26s_0s_34s_85_0_0 */ module corejtagdebug_bufd_34s_2 ( delay_sel_0, iURSTB ) ; output delay_sel_0 ; input iURSTB ; wire delay_sel_0 ; wire iURSTB ; wire [33:1] delay_sel; wire GND ; wire VCC ; // @15:34 BUFD \bufd_gen[25].BUFD_BLK ( .Y(delay_sel[26]), .A(delay_sel[25]) ); // @15:34 BUFD \bufd_gen[4].BUFD_BLK ( .Y(delay_sel[5]), .A(delay_sel[4]) ); // @15:34 BUFD \bufd_gen[11].BUFD_BLK ( .Y(delay_sel[12]), .A(delay_sel[11]) ); // @15:34 BUFD \bufd_gen[5].BUFD_BLK ( .Y(delay_sel[6]), .A(delay_sel[5]) ); // @15:34 BUFD \bufd_gen[32].BUFD_BLK ( .Y(delay_sel[33]), .A(delay_sel[32]) ); // @15:34 BUFD \bufd_gen[27].BUFD_BLK ( .Y(delay_sel[28]), .A(delay_sel[27]) ); // @15:34 BUFD \bufd_gen[33].BUFD_BLK ( .Y(delay_sel_0), .A(delay_sel[33]) ); // @15:34 BUFD \bufd_gen[26].BUFD_BLK ( .Y(delay_sel[27]), .A(delay_sel[26]) ); // @15:34 BUFD \bufd_gen[19].BUFD_BLK ( .Y(delay_sel[20]), .A(delay_sel[19]) ); // @15:34 BUFD \bufd_gen[12].BUFD_BLK ( .Y(delay_sel[13]), .A(delay_sel[12]) ); // @15:34 BUFD \bufd_gen[2].BUFD_BLK ( .Y(delay_sel[3]), .A(delay_sel[2]) ); // @15:34 BUFD \bufd_gen[9].BUFD_BLK ( .Y(delay_sel[10]), .A(delay_sel[9]) ); // @15:34 BUFD \bufd_gen[3].BUFD_BLK ( .Y(delay_sel[4]), .A(delay_sel[3]) ); // @15:34 BUFD \bufd_gen[23].BUFD_BLK ( .Y(delay_sel[24]), .A(delay_sel[23]) ); // @15:34 BUFD \bufd_gen[17].BUFD_BLK ( .Y(delay_sel[18]), .A(delay_sel[17]) ); // @15:34 BUFD \bufd_gen[24].BUFD_BLK ( .Y(delay_sel[25]), .A(delay_sel[24]) ); // @15:34 BUFD \bufd_gen[18].BUFD_BLK ( .Y(delay_sel[19]), .A(delay_sel[18]) ); // @15:34 BUFD \bufd_gen[28].BUFD_BLK ( .Y(delay_sel[29]), .A(delay_sel[28]) ); // @15:34 BUFD \bufd_gen[14].BUFD_BLK ( .Y(delay_sel[15]), .A(delay_sel[14]) ); // @15:34 BUFD \bufd_gen[13].BUFD_BLK ( .Y(delay_sel[14]), .A(delay_sel[13]) ); // @15:34 BUFD \bufd_gen[20].BUFD_BLK ( .Y(delay_sel[21]), .A(delay_sel[20]) ); // @15:34 BUFD \bufd_gen[6].BUFD_BLK ( .Y(delay_sel[7]), .A(delay_sel[6]) ); // @15:34 BUFD \bufd_gen[10].BUFD_BLK ( .Y(delay_sel[11]), .A(delay_sel[10]) ); // @15:34 BUFD \bufd_gen[15].BUFD_BLK ( .Y(delay_sel[16]), .A(delay_sel[15]) ); // @15:34 BUFD \bufd_gen[22].BUFD_BLK ( .Y(delay_sel[23]), .A(delay_sel[22]) ); // @15:34 BUFD \bufd_gen[16].BUFD_BLK ( .Y(delay_sel[17]), .A(delay_sel[16]) ); // @15:34 BUFD \bufd_gen[8].BUFD_BLK ( .Y(delay_sel[9]), .A(delay_sel[8]) ); // @15:34 BUFD \bufd_gen[29].BUFD_BLK ( .Y(delay_sel[30]), .A(delay_sel[29]) ); // @15:34 BUFD \bufd_gen[30].BUFD_BLK ( .Y(delay_sel[31]), .A(delay_sel[30]) ); // @15:34 BUFD \bufd_gen[31].BUFD_BLK ( .Y(delay_sel[32]), .A(delay_sel[31]) ); // @15:34 BUFD \bufd_gen[21].BUFD_BLK ( .Y(delay_sel[22]), .A(delay_sel[21]) ); // @15:34 BUFD \bufd_gen[1].BUFD_BLK ( .Y(delay_sel[2]), .A(delay_sel[1]) ); // @15:34 BUFD \bufd_gen[7].BUFD_BLK ( .Y(delay_sel[8]), .A(delay_sel[7]) ); // @15:34 BUFD \bufd_gen[0].BUFD_BLK ( .Y(delay_sel[1]), .A(iURSTB) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* corejtagdebug_bufd_34s_2 */ module COREJTAGDEBUG_Z5 ( delay_sel_0, currTapState_7, currTapState_0, shiftIR_ne_0, shiftBP_ne_0, un1_shiftDR20, shiftDR21, N_974, COREJTAGDEBUG_C0_0_TGT_TMS_0, COREJTAGDEBUG_C0_0_TGT_TDI_0, TCK, TMS, TDI, TDO, TRSTB, COREJTAGDEBUG_C0_0_TGT_TCK_0, COREJTAGDEBUG_C0_0_TGT_TCK_0_i ) ; output delay_sel_0 ; input currTapState_7 ; input currTapState_0 ; input shiftIR_ne_0 ; input shiftBP_ne_0 ; input un1_shiftDR20 ; input shiftDR21 ; input N_974 ; output COREJTAGDEBUG_C0_0_TGT_TMS_0 ; output COREJTAGDEBUG_C0_0_TGT_TDI_0 ; input TCK ; input TMS ; input TDI ; output TDO ; input TRSTB ; output COREJTAGDEBUG_C0_0_TGT_TCK_0 ; output COREJTAGDEBUG_C0_0_TGT_TCK_0_i ; wire delay_sel_0 ; wire currTapState_7 ; wire currTapState_0 ; wire shiftIR_ne_0 ; wire shiftBP_ne_0 ; wire un1_shiftDR20 ; wire shiftDR21 ; wire N_974 ; wire COREJTAGDEBUG_C0_0_TGT_TMS_0 ; wire COREJTAGDEBUG_C0_0_TGT_TDI_0 ; wire TCK ; wire TMS ; wire TDI ; wire TDO ; wire TRSTB ; wire COREJTAGDEBUG_C0_0_TGT_TCK_0 ; wire COREJTAGDEBUG_C0_0_TGT_TCK_0_i ; wire [0:0] UTDODRVInt; wire [0:0] UTDOInt; wire [7:0] UIREGInt; wire iUDRCK ; wire iUDRCK_0 ; wire iUDRCK_i_0 ; wire un1_DUT_TCK ; wire UTDO ; wire GND ; wire iURSTB ; wire UTDIInt ; wire UDRCAPInt ; wire UDRSHInt ; wire UDRUPDInt ; wire VCC ; CLKINT iUDRCK_inferred_clock_RNI5J864 ( .Y(iUDRCK), .A(iUDRCK_0) ); CFG1 iUDRCK_inferred_clock_RNI5J864_0 ( .A(iUDRCK), .Y(iUDRCK_i_0) ); defparam iUDRCK_inferred_clock_RNI5J864_0.INIT=2'h1; CFG1 \genblk3.genblk1.TGT_TCK_GLB_RNIKVH ( .A(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .Y(COREJTAGDEBUG_C0_0_TGT_TCK_0) ); defparam \genblk3.genblk1.TGT_TCK_GLB_RNIKVH .INIT=2'h1; // @18:531 CLKINT \genblk3.genblk1.TGT_TCK_GLB ( .Y(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .A(un1_DUT_TCK) ); // @18:544 CFG2 \UTDODriven[0] ( .A(UTDODRVInt[0]), .B(UTDOInt[0]), .Y(UTDO) ); defparam \UTDODriven[0] .INIT=4'h8; //@19:169 //@18:190 //@18:183 //@18:176 //@18:169 // @18:354 UJTAG \genblk1.genblk1.genblk1.UJTAG_inst ( .UIREG(UIREGInt[7:0]), .URSTB(iURSTB), .UDRCK(iUDRCK_0), .UTDI(UTDIInt), .UDRCAP(UDRCAPInt), .UDRSH(UDRSHInt), .UDRUPD(UDRUPDInt), .UTDO(UTDO), .TRSTB(TRSTB), .TDO(TDO), .TDI(TDI), .TMS(TMS), .TCK(TCK) ); // @18:502 COREJTAGDEBUG_UJ_JTAG_26s_0s_34s_85_0_0 \genblk3.genblk1.UJ_JTAG ( .currTapState_7(currTapState_7), .currTapState_0(currTapState_0), .UIREGInt(UIREGInt[7:0]), .UTDOInt_0(UTDOInt[0]), .UTDODRVInt_0(UTDODRVInt[0]), .COREJTAGDEBUG_C0_0_TGT_TDI_0(COREJTAGDEBUG_C0_0_TGT_TDI_0), .COREJTAGDEBUG_C0_0_TGT_TMS_0(COREJTAGDEBUG_C0_0_TGT_TMS_0), .un1_DUT_TCK_1z(un1_DUT_TCK), .N_974(N_974), .shiftDR21(shiftDR21), .un1_shiftDR20(un1_shiftDR20), .UDRCAPInt(UDRCAPInt), .shiftBP_ne_0(shiftBP_ne_0), .shiftIR_ne_0(shiftIR_ne_0), .UTDIInt(UTDIInt), .UDRUPDInt(UDRUPDInt), .iUDRCK(iUDRCK), .iUDRCK_i_0(iUDRCK_i_0), .iURSTB(iURSTB), .UDRSHInt(UDRSHInt) ); corejtagdebug_bufd_34s_2 \genblk2.genblk2[0].BUFD_TRST ( .delay_sel_0(delay_sel_0), .iURSTB(iURSTB) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* COREJTAGDEBUG_Z5 */ module COREJTAGDEBUG_C0 ( currTapState_7, currTapState_0, delay_sel_0, COREJTAGDEBUG_C0_0_TGT_TCK_0_i, COREJTAGDEBUG_C0_0_TGT_TCK_0, TRSTB, TDO, TDI, TMS, TCK, COREJTAGDEBUG_C0_0_TGT_TDI_0, COREJTAGDEBUG_C0_0_TGT_TMS_0, N_974, shiftDR21, un1_shiftDR20, shiftBP_ne_0, shiftIR_ne_0 ) ; input currTapState_7 ; input currTapState_0 ; output delay_sel_0 ; output COREJTAGDEBUG_C0_0_TGT_TCK_0_i ; output COREJTAGDEBUG_C0_0_TGT_TCK_0 ; input TRSTB ; output TDO ; input TDI ; input TMS ; input TCK ; output COREJTAGDEBUG_C0_0_TGT_TDI_0 ; output COREJTAGDEBUG_C0_0_TGT_TMS_0 ; input N_974 ; input shiftDR21 ; input un1_shiftDR20 ; input shiftBP_ne_0 ; input shiftIR_ne_0 ; wire currTapState_7 ; wire currTapState_0 ; wire delay_sel_0 ; wire COREJTAGDEBUG_C0_0_TGT_TCK_0_i ; wire COREJTAGDEBUG_C0_0_TGT_TCK_0 ; wire TRSTB ; wire TDO ; wire TDI ; wire TMS ; wire TCK ; wire COREJTAGDEBUG_C0_0_TGT_TDI_0 ; wire COREJTAGDEBUG_C0_0_TGT_TMS_0 ; wire N_974 ; wire shiftDR21 ; wire un1_shiftDR20 ; wire shiftBP_ne_0 ; wire shiftIR_ne_0 ; wire GND ; wire VCC ; // @19:169 COREJTAGDEBUG_Z5 COREJTAGDEBUG_C0_0 ( .delay_sel_0(delay_sel_0), .currTapState_7(currTapState_7), .currTapState_0(currTapState_0), .shiftIR_ne_0(shiftIR_ne_0), .shiftBP_ne_0(shiftBP_ne_0), .un1_shiftDR20(un1_shiftDR20), .shiftDR21(shiftDR21), .N_974(N_974), .COREJTAGDEBUG_C0_0_TGT_TMS_0(COREJTAGDEBUG_C0_0_TGT_TMS_0), .COREJTAGDEBUG_C0_0_TGT_TDI_0(COREJTAGDEBUG_C0_0_TGT_TDI_0), .TCK(TCK), .TMS(TMS), .TDI(TDI), .TDO(TDO), .TRSTB(TRSTB), .COREJTAGDEBUG_C0_0_TGT_TCK_0(COREJTAGDEBUG_C0_0_TGT_TCK_0), .COREJTAGDEBUG_C0_0_TGT_TCK_0_i(COREJTAGDEBUG_C0_0_TGT_TCK_0_i) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* COREJTAGDEBUG_C0 */ module top ( REFCLK_N, REFCLK_P, REF_CLK_0, RESET_N, RX, RX_N, RX_P, SPISDI, TCK, TDI, TMS, TRSTB, LINK_OK, PHY_MDC, PHY_RST, RD_BC_ERROR, REF_CLK_SEL, R_DATA, SPISCLKO, SPISDO, SPISS, TDO, TX, TX_N, TX_P, coma_mode, PHY_MDIO ) ; input REFCLK_N ; input REFCLK_P ; input REF_CLK_0 ; input RESET_N ; input RX ; input RX_N ; input RX_P ; input SPISDI ; input TCK ; input TDI ; input TMS ; input TRSTB ; output LINK_OK ; output PHY_MDC ; output PHY_RST ; output RD_BC_ERROR ; output REF_CLK_SEL ; output [31:0] R_DATA ; output SPISCLKO ; output SPISDO ; output SPISS ; output TDO ; output TX ; output TX_N ; output TX_P ; output coma_mode ; inout PHY_MDIO /* synthesis syn_tristate = 1 */ ; wire REFCLK_N ; wire REFCLK_P ; wire REF_CLK_0 ; wire RESET_N ; wire RX ; wire RX_N ; wire RX_P ; wire SPISDI ; wire TCK ; wire TDI ; wire TMS ; wire TRSTB ; wire LINK_OK ; wire PHY_MDC ; wire PHY_RST ; wire RD_BC_ERROR ; wire REF_CLK_SEL ; wire SPISCLKO ; wire SPISDO ; wire SPISS ; wire TDO ; wire TX ; wire TX_N ; wire TX_P ; wire coma_mode ; wire PHY_MDIO ; wire [27:2] CoreAPB3_0_0_APBmslave0_PADDR; wire [4:4] CoreUARTapb_0_inst_0_CoreUARTapb_0_0_PADDR; wire [6:6] CORESPI_0_0_CORESPI_0_0_USPI_URF_paddr; wire [7:0] CoreAPB3_0_0_APBmslave1_PRDATA; wire [0:0] CORESPI_0_0_CORESPI_0_0_USPI_URF_wrdata; wire [31:1] CoreAPB3_0_0_APBmslave0_PWDATA; wire [31:0] CORETSE_0_MRXDAT; wire [31:0] COREFIFO_C0_0_Q; wire [9:0] PF_IOD_CDR_C0_0_RX_DATA; wire [9:0] CORETSE_0_TCG; wire [6:0] PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_DELAY_CODE; wire [34:34] COREJTAGDEBUG_C0_0_COREJTAGDEBUG_C0_0_genblk2_genblk2_0__BUFD_TRST_delay_sel; wire [0:0] CORETSE_0_inst_0_CORETSE_0_0_CoreTSE_TOP_INST_tsmac_top_U0_amcxfif_U0_CTSE_AMCXRFIF_FAB_1_genblk1_O0Il1; wire [11:4] MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_gen_subsys_debug_u_subsys_debug_unit_0_MIV_subsys_debug_transport_module_jtag_0_gen_current_state_register_active_high_gen_current_state_register_active_low_currTapState; wire [15:8] CORESPI_0_0_CORESPI_0_0_USPI_rx_fifo_data_out; wire [31:0] R_DATA_c; wire [31:16] CORETSE_0_inst_0_CORETSE_0_0_CoreTSE_TOP_INST_tsmac_top_U0_apb_hst_cnv_io0O1; wire [7:0] CoreAPB3_0_0_APBmslave2_PRDATA; wire [15:0] CORETSE_0_inst_0_CORETSE_0_0_CoreTSE_TOP_INST_tsmac_top_U0_apb_hst_cnv_io0O1_m; wire [15:8] CoreAPB3_0_0_APBmslave2_PRDATA_m; wire [7:0] CoreAPB3_0_0_CoreAPB3_0_0_u_mux_p_to_b3_PRDATA_0_iv_0; wire [10:0] fifo_to_tpsram_bridge_0_ram_w_addr_4; wire PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_PLL_LOCK ; wire BIBUF_0_Y ; wire CORETSE_0_MDO ; wire pf_init_monitor_0_0_BANK_6_VDDI_STATUS ; wire PF_CCC_0_0_OUT0_FABCLK_0 ; wire pf_init_monitor_0_0_FABRIC_POR_N ; wire pf_init_monitor_0_0_DEVICE_INIT_DONE ; wire PF_CCC_0_0_PLL_LOCK_0 ; wire GND ; wire COREFIFO_C0_0_EMPTY ; wire COREJTAGDEBUG_C0_0_TGT_TCK_0 ; wire COREJTAGDEBUG_C0_0_TGT_TDI_0 ; wire COREJTAGDEBUG_C0_0_TGT_TMS_0 ; wire PF_IOD_CDR_C0_0_RX_CLK_R ; wire PF_IOD_CDR_CCC_C0_0_TX_CLK_G ; wire fifo_to_tpsram_bridge_0_ram_w_en ; wire INBUF_DIFF_0_Y ; wire PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_VALID_CODE ; wire PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_0 ; wire PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_180 ; wire PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_270 ; wire PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_90 ; wire PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_PAUSE ; wire SSDetect_0_stream_start ; wire VCC ; wire AND2_2_Y ; wire Core_reset_pf_0_Core_reset_pf_0_dff ; wire CoreAPB3_0_0_APBmslave0_PWRITE ; wire CoreAPB3_0_0_APBmslave0_PSELx ; wire CoreAPB3_0_0_APBmslave1_PSELx ; wire CoreAPB3_0_0_APBmslave2_PSELx ; wire PF_IOD_CDR_CCC_C0_0_PF_COREDELAYCODE_TIP_0_cdr_start ; wire N_976_i ; wire MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_apb_penable_net ; wire MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_apb_pslverr_net ; wire MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_gen_subsys_debug_u_subsys_debug_unit_0_MIV_subsys_debug_transport_module_jtag_0_genblk3_shift_active_high_shift_active_low_shiftBP_ne_0 ; wire MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_gen_subsys_debug_u_subsys_debug_unit_0_MIV_subsys_debug_transport_module_jtag_0_genblk3_shift_active_high_shift_active_low_shiftIR_ne_0 ; wire MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_gen_subsys_debug_u_subsys_debug_unit_0_MIV_subsys_debug_transport_module_jtag_0_gen_shift_register_active_high_gen_shift_register_active_low_shiftDR21 ; wire MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_gen_subsys_debug_u_subsys_debug_unit_0_MIV_subsys_debug_transport_module_jtag_0_gen_shift_register_active_high_gen_shift_register_active_low_un1_shiftDR20 ; wire REF_CLK_0_c ; wire RESET_N_c ; wire RX_c ; wire SPISDI_c ; wire LINK_OK_c ; wire PHY_MDC_c ; wire RD_BC_ERROR_c ; wire SPISCLKO_c ; wire SPISDO_c ; wire SPISS_c ; wire TX_c ; wire MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_gen_mtime_un3_apb_int_sel ; wire CoreAPB3_0_0_APBmslave0_PWRITE_s0 ; wire CORESPI_0_0_CORESPI_0_0_USPI_UCON_tx_fifo_write_sig_0_sqmuxa_i_1 ; wire MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_N_1214 ; wire CORESPI_0_0_CORESPI_0_0_USPI_un1_PADDR ; wire CoreAPB3_0_0_CoreAPB3_0_0_u_mux_p_to_b3_iPRDATA28 ; wire CORESPI_0_0_CORESPI_0_0_USPI_UCON_tx_fifo_write_sig14_i_2 ; wire CORESPI_0_0_CORESPI_0_0_USPI_UCON_tx_fifo_write_sig14_i_1 ; wire MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_N_1206 ; wire CORETSE_0_inst_0_CORETSE_0_0_CoreTSE_TOP_INST_tsmac_top_U0_apb_hst_cnv_Oi0O1 ; wire MIV_RV32_C0_0_APB_INITIATOR_PSELx ; wire CORESPI_0_0_CORESPI_0_0_USPI_un1_PADDR_2 ; wire CORETSE_0_inst_0_CORETSE_0_0_CoreTSE_TOP_INST_tsmac_top_U0_apb_hst_cnv_I01O1_un1_Ii0O1 ; wire CoreAPB3_0_0_APBmslave0_PENABLE ; wire CoreAPB3_0_0_CoreAPB3_0_0_u_mux_p_to_b3_iPRDATA_0_sqmuxa ; wire CORESPI_0_0_CORESPI_0_0_USPI_un1_PADDR_3 ; wire MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_N_974 ; wire CORESPI_0_0_CORESPI_0_0_USPI_UCON_rx_fifo_read_0 ; wire CORESPI_0_0_CORESPI_0_0_USPI_UCON_rx_fifo_read_1 ; wire d_m2_e_1_0_Z ; wire RESET_N_c_i ; wire Core_reset_pf_0_Core_reset_pf_0_un1_PLL_POWERDOWN_B_i ; wire MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_u_hart_0_u_expipe_0_N_8_i ; wire MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_u_hart_0_u_expipe_0_N_10_i ; wire CORETSE_0_MDOEN ; wire COREJTAGDEBUG_C0_0_TGT_TCK_0_i ; CFG1 coma_mode_obuf_RNO ( .A(RESET_N_c), .Y(RESET_N_c_i) ); defparam coma_mode_obuf_RNO.INIT=2'h1; // @75:319 BIBUF BIBUF_0 ( .Y(BIBUF_0_Y), .PAD(PHY_MDIO), .D(CORETSE_0_MDO), .E(CORETSE_0_MDOEN) ); // @75:47 INBUF REF_CLK_0_ibuf ( .Y(REF_CLK_0_c), .PAD(REF_CLK_0) ); // @75:48 INBUF RESET_N_ibuf ( .Y(RESET_N_c), .PAD(RESET_N) ); // @75:49 INBUF RX_ibuf ( .Y(RX_c), .PAD(RX) ); // @75:52 INBUF SPISDI_ibuf ( .Y(SPISDI_c), .PAD(SPISDI) ); // @75:60 OUTBUF LINK_OK_obuf ( .PAD(LINK_OK), .D(LINK_OK_c) ); // @75:61 OUTBUF PHY_MDC_obuf ( .PAD(PHY_MDC), .D(PHY_MDC_c) ); // @75:62 OUTBUF PHY_RST_obuf ( .PAD(PHY_RST), .D(Core_reset_pf_0_Core_reset_pf_0_dff) ); // @75:63 OUTBUF RD_BC_ERROR_obuf ( .PAD(RD_BC_ERROR), .D(RD_BC_ERROR_c) ); // @75:64 OUTBUF REF_CLK_SEL_obuf ( .PAD(REF_CLK_SEL), .D(RESET_N_c) ); // @75:65 OUTBUF \R_DATA_obuf[0] ( .PAD(R_DATA[0]), .D(R_DATA_c[0]) ); // @75:65 OUTBUF \R_DATA_obuf[1] ( .PAD(R_DATA[1]), .D(R_DATA_c[1]) ); // @75:65 OUTBUF \R_DATA_obuf[2] ( .PAD(R_DATA[2]), .D(R_DATA_c[2]) ); // @75:65 OUTBUF \R_DATA_obuf[3] ( .PAD(R_DATA[3]), .D(R_DATA_c[3]) ); // @75:65 OUTBUF \R_DATA_obuf[4] ( .PAD(R_DATA[4]), .D(R_DATA_c[4]) ); // @75:65 OUTBUF \R_DATA_obuf[5] ( .PAD(R_DATA[5]), .D(R_DATA_c[5]) ); // @75:65 OUTBUF \R_DATA_obuf[6] ( .PAD(R_DATA[6]), .D(R_DATA_c[6]) ); // @75:65 OUTBUF \R_DATA_obuf[7] ( .PAD(R_DATA[7]), .D(R_DATA_c[7]) ); // @75:65 OUTBUF \R_DATA_obuf[8] ( .PAD(R_DATA[8]), .D(R_DATA_c[8]) ); // @75:65 OUTBUF \R_DATA_obuf[9] ( .PAD(R_DATA[9]), .D(R_DATA_c[9]) ); // @75:65 OUTBUF \R_DATA_obuf[10] ( .PAD(R_DATA[10]), .D(R_DATA_c[10]) ); // @75:65 OUTBUF \R_DATA_obuf[11] ( .PAD(R_DATA[11]), .D(R_DATA_c[11]) ); // @75:65 OUTBUF \R_DATA_obuf[12] ( .PAD(R_DATA[12]), .D(R_DATA_c[12]) ); // @75:65 OUTBUF \R_DATA_obuf[13] ( .PAD(R_DATA[13]), .D(R_DATA_c[13]) ); // @75:65 OUTBUF \R_DATA_obuf[14] ( .PAD(R_DATA[14]), .D(R_DATA_c[14]) ); // @75:65 OUTBUF \R_DATA_obuf[15] ( .PAD(R_DATA[15]), .D(R_DATA_c[15]) ); // @75:65 OUTBUF \R_DATA_obuf[16] ( .PAD(R_DATA[16]), .D(R_DATA_c[16]) ); // @75:65 OUTBUF \R_DATA_obuf[17] ( .PAD(R_DATA[17]), .D(R_DATA_c[17]) ); // @75:65 OUTBUF \R_DATA_obuf[18] ( .PAD(R_DATA[18]), .D(R_DATA_c[18]) ); // @75:65 OUTBUF \R_DATA_obuf[19] ( .PAD(R_DATA[19]), .D(R_DATA_c[19]) ); // @75:65 OUTBUF \R_DATA_obuf[20] ( .PAD(R_DATA[20]), .D(R_DATA_c[20]) ); // @75:65 OUTBUF \R_DATA_obuf[21] ( .PAD(R_DATA[21]), .D(R_DATA_c[21]) ); // @75:65 OUTBUF \R_DATA_obuf[22] ( .PAD(R_DATA[22]), .D(R_DATA_c[22]) ); // @75:65 OUTBUF \R_DATA_obuf[23] ( .PAD(R_DATA[23]), .D(R_DATA_c[23]) ); // @75:65 OUTBUF \R_DATA_obuf[24] ( .PAD(R_DATA[24]), .D(R_DATA_c[24]) ); // @75:65 OUTBUF \R_DATA_obuf[25] ( .PAD(R_DATA[25]), .D(R_DATA_c[25]) ); // @75:65 OUTBUF \R_DATA_obuf[26] ( .PAD(R_DATA[26]), .D(R_DATA_c[26]) ); // @75:65 OUTBUF \R_DATA_obuf[27] ( .PAD(R_DATA[27]), .D(R_DATA_c[27]) ); // @75:65 OUTBUF \R_DATA_obuf[28] ( .PAD(R_DATA[28]), .D(R_DATA_c[28]) ); // @75:65 OUTBUF \R_DATA_obuf[29] ( .PAD(R_DATA[29]), .D(R_DATA_c[29]) ); // @75:65 OUTBUF \R_DATA_obuf[30] ( .PAD(R_DATA[30]), .D(R_DATA_c[30]) ); // @75:65 OUTBUF \R_DATA_obuf[31] ( .PAD(R_DATA[31]), .D(R_DATA_c[31]) ); // @75:66 OUTBUF SPISCLKO_obuf ( .PAD(SPISCLKO), .D(SPISCLKO_c) ); // @75:67 OUTBUF SPISDO_obuf ( .PAD(SPISDO), .D(SPISDO_c) ); // @75:68 OUTBUF SPISS_obuf ( .PAD(SPISS), .D(SPISS_c) ); // @75:70 OUTBUF TX_obuf ( .PAD(TX), .D(TX_c) ); // @75:73 OUTBUF coma_mode_obuf ( .PAD(coma_mode), .D(RESET_N_c_i) ); // @46:11028 CFG2 d_m2_e_1_0 ( .A(MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_u_hart_0_u_expipe_0_N_8_i), .B(MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_u_hart_0_u_expipe_0_N_10_i), .Y(d_m2_e_1_0_Z) ); defparam d_m2_e_1_0.INIT=4'h2; // @75:522 INBUF_DIFF INBUF_DIFF_0 ( .Y(INBUF_DIFF_0_Y), .PADN(REFCLK_N), .PADP(REFCLK_P) ); // @75:310 AND2 AND2_2 ( .Y(AND2_2_Y), .A(Core_reset_pf_0_Core_reset_pf_0_dff), .B(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_PLL_LOCK) ); // @75:330 Core_reset_pf Core_reset_pf_0 ( .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .dff(Core_reset_pf_0_Core_reset_pf_0_dff), .pf_init_monitor_0_0_DEVICE_INIT_DONE(pf_init_monitor_0_0_DEVICE_INIT_DONE), .pf_init_monitor_0_0_BANK_6_VDDI_STATUS(pf_init_monitor_0_0_BANK_6_VDDI_STATUS), .RESET_N_c(RESET_N_c), .PF_CCC_0_0_PLL_LOCK_0(PF_CCC_0_0_PLL_LOCK_0), .pf_init_monitor_0_0_FABRIC_POR_N(pf_init_monitor_0_0_FABRIC_POR_N), .un1_PLL_POWERDOWN_B_i(Core_reset_pf_0_Core_reset_pf_0_un1_PLL_POWERDOWN_B_i) ); // @75:347 CoreAPB3_0 CoreAPB3_0_0 ( .CoreAPB3_0_0_APBmslave0_PADDR(CoreAPB3_0_0_APBmslave0_PADDR[27:24]), .PRDATA_0_iv_0(CoreAPB3_0_0_CoreAPB3_0_0_u_mux_p_to_b3_PRDATA_0_iv_0[7:0]), .CoreAPB3_0_0_APBmslave2_PRDATA(CoreAPB3_0_0_APBmslave2_PRDATA[7:0]), .CoreAPB3_0_0_APBmslave1_PRDATA(CoreAPB3_0_0_APBmslave1_PRDATA[7:0]), .MIV_RV32_C0_0_APB_INITIATOR_PSELx(MIV_RV32_C0_0_APB_INITIATOR_PSELx), .CoreAPB3_0_0_APBmslave2_PSELx(CoreAPB3_0_0_APBmslave2_PSELx), .CoreAPB3_0_0_APBmslave1_PSELx(CoreAPB3_0_0_APBmslave1_PSELx), .CoreAPB3_0_0_APBmslave0_PSELx(CoreAPB3_0_0_APBmslave0_PSELx), .apb_pslverr_net(MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_apb_pslverr_net), .un1_Ii0O1(CORETSE_0_inst_0_CORETSE_0_0_CoreTSE_TOP_INST_tsmac_top_U0_apb_hst_cnv_I01O1_un1_Ii0O1), .Oi0O1(CORETSE_0_inst_0_CORETSE_0_0_CoreTSE_TOP_INST_tsmac_top_U0_apb_hst_cnv_Oi0O1), .CoreAPB3_0_0_APBmslave0_PWRITE(CoreAPB3_0_0_APBmslave0_PWRITE), .iPRDATA_0_sqmuxa(CoreAPB3_0_0_CoreAPB3_0_0_u_mux_p_to_b3_iPRDATA_0_sqmuxa), .iPRDATA28(CoreAPB3_0_0_CoreAPB3_0_0_u_mux_p_to_b3_iPRDATA28) ); // @75:377 COREFIFO_C0 COREFIFO_C0_0 ( .O0Il1_0(CORETSE_0_inst_0_CORETSE_0_0_CoreTSE_TOP_INST_tsmac_top_U0_amcxfif_U0_CTSE_AMCXRFIF_FAB_1_genblk1_O0Il1[0]), .COREFIFO_C0_0_Q(COREFIFO_C0_0_Q[31:0]), .CORETSE_0_MRXDAT(CORETSE_0_MRXDAT[31:0]), .AND2_2_Y(AND2_2_Y), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .N_976_i(N_976_i), .COREFIFO_C0_0_EMPTY(COREFIFO_C0_0_EMPTY) ); // @75:407 CORESPI_0 CORESPI_0_0 ( .CoreAPB3_0_0_APBmslave2_PRDATA(CoreAPB3_0_0_APBmslave2_PRDATA[7:0]), .rx_fifo_data_out(CORESPI_0_0_CORESPI_0_0_USPI_rx_fifo_data_out[15:8]), .CoreAPB3_0_0_APBmslave0_PWDATA(CoreAPB3_0_0_APBmslave0_PWDATA[15:1]), .wrdata_0(CORESPI_0_0_CORESPI_0_0_USPI_URF_wrdata[0]), .PADDR_0(CoreUARTapb_0_inst_0_CoreUARTapb_0_0_PADDR[4]), .CoreAPB3_0_0_APBmslave0_PADDR_1(CoreAPB3_0_0_APBmslave0_PADDR[3]), .CoreAPB3_0_0_APBmslave0_PADDR_3(CoreAPB3_0_0_APBmslave0_PADDR[5]), .CoreAPB3_0_0_APBmslave0_PADDR_0(CoreAPB3_0_0_APBmslave0_PADDR[2]), .paddr_1z_0(CORESPI_0_0_CORESPI_0_0_USPI_URF_paddr[6]), .SPISDI_c(SPISDI_c), .SPISCLKO_c(SPISCLKO_c), .SPISDO_c(SPISDO_c), .rx_fifo_read_1(CORESPI_0_0_CORESPI_0_0_USPI_UCON_rx_fifo_read_1), .rx_fifo_read_0(CORESPI_0_0_CORESPI_0_0_USPI_UCON_rx_fifo_read_0), .tx_fifo_write_sig14_i_1(CORESPI_0_0_CORESPI_0_0_USPI_UCON_tx_fifo_write_sig14_i_1), .tx_fifo_write_sig14_i_2(CORESPI_0_0_CORESPI_0_0_USPI_UCON_tx_fifo_write_sig14_i_2), .tx_fifo_write_sig_0_sqmuxa_i_1(CORESPI_0_0_CORESPI_0_0_USPI_UCON_tx_fifo_write_sig_0_sqmuxa_i_1), .un1_PADDR_3(CORESPI_0_0_CORESPI_0_0_USPI_un1_PADDR_3), .un3_apb_int_sel(MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_gen_mtime_un3_apb_int_sel), .CoreAPB3_0_0_APBmslave2_PSELx(CoreAPB3_0_0_APBmslave2_PSELx), .apb_penable_net(MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_apb_penable_net), .dff(Core_reset_pf_0_Core_reset_pf_0_dff), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .un1_PADDR_2(CORESPI_0_0_CORESPI_0_0_USPI_un1_PADDR_2), .CoreAPB3_0_0_APBmslave0_PWRITE(CoreAPB3_0_0_APBmslave0_PWRITE), .SPISS_c(SPISS_c), .un1_PADDR(CORESPI_0_0_CORESPI_0_0_USPI_un1_PADDR) ); // @75:434 CORETSE_0 CORETSE_0_inst_0 ( .wrdata_0(CORESPI_0_0_CORESPI_0_0_USPI_URF_wrdata[0]), .CoreAPB3_0_0_APBmslave0_PWDATA(CoreAPB3_0_0_APBmslave0_PWDATA[31:1]), .CoreAPB3_0_0_APBmslave0_PADDR_5(CoreAPB3_0_0_APBmslave0_PADDR[7]), .CoreAPB3_0_0_APBmslave0_PADDR_3(CoreAPB3_0_0_APBmslave0_PADDR[5]), .CoreAPB3_0_0_APBmslave0_PADDR_7(CoreAPB3_0_0_APBmslave0_PADDR[9]), .CoreAPB3_0_0_APBmslave0_PADDR_6(CoreAPB3_0_0_APBmslave0_PADDR[8]), .CoreAPB3_0_0_APBmslave0_PADDR_0(CoreAPB3_0_0_APBmslave0_PADDR[2]), .CoreAPB3_0_0_APBmslave0_PADDR_1(CoreAPB3_0_0_APBmslave0_PADDR[3]), .io0O1_m(CORETSE_0_inst_0_CORETSE_0_0_CoreTSE_TOP_INST_tsmac_top_U0_apb_hst_cnv_io0O1_m[15:0]), .io0O1(CORETSE_0_inst_0_CORETSE_0_0_CoreTSE_TOP_INST_tsmac_top_U0_apb_hst_cnv_io0O1[31:16]), .paddr_0(CORESPI_0_0_CORESPI_0_0_USPI_URF_paddr[6]), .PADDR_1z_0(CoreUARTapb_0_inst_0_CoreUARTapb_0_0_PADDR[4]), .rx_fifo_data_out(CORESPI_0_0_CORESPI_0_0_USPI_rx_fifo_data_out[15:8]), .CoreAPB3_0_0_APBmslave2_PRDATA_m(CoreAPB3_0_0_APBmslave2_PRDATA_m[15:8]), .O0Il1_0(CORETSE_0_inst_0_CORETSE_0_0_CoreTSE_TOP_INST_tsmac_top_U0_amcxfif_U0_CTSE_AMCXRFIF_FAB_1_genblk1_O0Il1[0]), .CORETSE_0_MRXDAT(CORETSE_0_MRXDAT[31:0]), .PF_IOD_CDR_C0_0_RX_DATA(PF_IOD_CDR_C0_0_RX_DATA[9:0]), .CORETSE_0_TCG(CORETSE_0_TCG[9:0]), .AND2_2_Y(AND2_2_Y), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .LINK_OK_c(LINK_OK_c), .BIBUF_0_Y(BIBUF_0_Y), .RD_BC_ERROR_c(RD_BC_ERROR_c), .N_1214(MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_N_1214), .tx_fifo_write_sig14_i_2(CORESPI_0_0_CORESPI_0_0_USPI_UCON_tx_fifo_write_sig14_i_2), .Oi0O1(CORETSE_0_inst_0_CORETSE_0_0_CoreTSE_TOP_INST_tsmac_top_U0_apb_hst_cnv_Oi0O1), .iPRDATA_0_sqmuxa(CoreAPB3_0_0_CoreAPB3_0_0_u_mux_p_to_b3_iPRDATA_0_sqmuxa), .CoreAPB3_0_0_APBmslave0_PWRITE_s0(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .un1_Ii0O1(CORETSE_0_inst_0_CORETSE_0_0_CoreTSE_TOP_INST_tsmac_top_U0_apb_hst_cnv_I01O1_un1_Ii0O1), .CoreAPB3_0_0_APBmslave0_PSELx(CoreAPB3_0_0_APBmslave0_PSELx), .CoreAPB3_0_0_APBmslave0_PENABLE(CoreAPB3_0_0_APBmslave0_PENABLE), .CoreAPB3_0_0_APBmslave0_PWRITE(CoreAPB3_0_0_APBmslave0_PWRITE), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .tx_fifo_write_sig_0_sqmuxa_i_1(CORESPI_0_0_CORESPI_0_0_USPI_UCON_tx_fifo_write_sig_0_sqmuxa_i_1), .un1_PADDR(CORESPI_0_0_CORESPI_0_0_USPI_un1_PADDR), .iPRDATA28(CoreAPB3_0_0_CoreAPB3_0_0_u_mux_p_to_b3_iPRDATA28), .tx_fifo_write_sig14_i_1(CORESPI_0_0_CORESPI_0_0_USPI_UCON_tx_fifo_write_sig14_i_1), .rx_fifo_read_1(CORESPI_0_0_CORESPI_0_0_USPI_UCON_rx_fifo_read_1), .N_1206(MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_N_1206), .un1_PADDR_2(CORESPI_0_0_CORESPI_0_0_USPI_un1_PADDR_2), .un1_PADDR_3(CORESPI_0_0_CORESPI_0_0_USPI_un1_PADDR_3), .PHY_MDC_c(PHY_MDC_c), .CORETSE_0_MDOEN(CORETSE_0_MDOEN), .CORETSE_0_MDO(CORETSE_0_MDO), .rx_fifo_read_0(CORESPI_0_0_CORESPI_0_0_USPI_UCON_rx_fifo_read_0), .PF_IOD_CDR_C0_0_RX_CLK_R(PF_IOD_CDR_C0_0_RX_CLK_R) ); // @75:483 CoreUARTapb_0 CoreUARTapb_0_inst_0 ( .wrdata_0(CORESPI_0_0_CORESPI_0_0_USPI_URF_wrdata[0]), .CoreAPB3_0_0_APBmslave0_PWDATA(CoreAPB3_0_0_APBmslave0_PWDATA[7:1]), .CoreAPB3_0_0_APBmslave1_PRDATA(CoreAPB3_0_0_APBmslave1_PRDATA[7:0]), .CoreAPB3_0_0_APBmslave0_PADDR(CoreAPB3_0_0_APBmslave0_PADDR[3:2]), .PADDR_0(CoreUARTapb_0_inst_0_CoreUARTapb_0_0_PADDR[4]), .dff(Core_reset_pf_0_Core_reset_pf_0_dff), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .CoreAPB3_0_0_APBmslave0_PWRITE(CoreAPB3_0_0_APBmslave0_PWRITE), .CoreAPB3_0_0_APBmslave1_PSELx(CoreAPB3_0_0_APBmslave1_PSELx), .CoreAPB3_0_0_APBmslave0_PENABLE(CoreAPB3_0_0_APBmslave0_PENABLE), .RX_c(RX_c), .TX_c(TX_c) ); // @75:506 fifo_to_tpsram_bridge fifo_to_tpsram_bridge_0 ( .COREFIFO_C0_0_Q(COREFIFO_C0_0_Q[31:0]), .fifo_to_tpsram_bridge_0_ram_w_addr_4(fifo_to_tpsram_bridge_0_ram_w_addr_4[10:0]), .fifo_to_tpsram_bridge_0_ram_w_en(fifo_to_tpsram_bridge_0_ram_w_en), .N_976_i(N_976_i), .COREFIFO_C0_0_EMPTY(COREFIFO_C0_0_EMPTY), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .AND2_2_Y(AND2_2_Y) ); // @75:531 MIV_RV32_C0 MIV_RV32_C0_0 ( .wrdata_0(CORESPI_0_0_CORESPI_0_0_USPI_URF_wrdata[0]), .PADDR_0(CoreUARTapb_0_inst_0_CoreUARTapb_0_0_PADDR[4]), .CoreAPB3_0_0_APBmslave0_PWDATA(CoreAPB3_0_0_APBmslave0_PWDATA[31:1]), .CoreAPB3_0_0_APBmslave0_PADDR_3(CoreAPB3_0_0_APBmslave0_PADDR[5]), .CoreAPB3_0_0_APBmslave0_PADDR_1(CoreAPB3_0_0_APBmslave0_PADDR[3]), .CoreAPB3_0_0_APBmslave0_PADDR_0(CoreAPB3_0_0_APBmslave0_PADDR[2]), .CoreAPB3_0_0_APBmslave0_PADDR_25(CoreAPB3_0_0_APBmslave0_PADDR[27]), .CoreAPB3_0_0_APBmslave0_PADDR_24(CoreAPB3_0_0_APBmslave0_PADDR[26]), .CoreAPB3_0_0_APBmslave0_PADDR_23(CoreAPB3_0_0_APBmslave0_PADDR[25]), .CoreAPB3_0_0_APBmslave0_PADDR_22(CoreAPB3_0_0_APBmslave0_PADDR[24]), .CoreAPB3_0_0_APBmslave0_PADDR_7(CoreAPB3_0_0_APBmslave0_PADDR[9]), .CoreAPB3_0_0_APBmslave0_PADDR_6(CoreAPB3_0_0_APBmslave0_PADDR[8]), .CoreAPB3_0_0_APBmslave0_PADDR_5(CoreAPB3_0_0_APBmslave0_PADDR[7]), .paddr_1z_0(CORESPI_0_0_CORESPI_0_0_USPI_URF_paddr[6]), .currTapState_0(MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_gen_subsys_debug_u_subsys_debug_unit_0_MIV_subsys_debug_transport_module_jtag_0_gen_current_state_register_active_high_gen_current_state_register_active_low_currTapState[4]), .currTapState_7(MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_gen_subsys_debug_u_subsys_debug_unit_0_MIV_subsys_debug_transport_module_jtag_0_gen_current_state_register_active_high_gen_current_state_register_active_low_currTapState[11]), .delay_sel_0(COREJTAGDEBUG_C0_0_COREJTAGDEBUG_C0_0_genblk2_genblk2_0__BUFD_TRST_delay_sel[34]), .PRDATA_0_iv_0(CoreAPB3_0_0_CoreAPB3_0_0_u_mux_p_to_b3_PRDATA_0_iv_0[7:0]), .io0O1_m(CORETSE_0_inst_0_CORETSE_0_0_CoreTSE_TOP_INST_tsmac_top_U0_apb_hst_cnv_io0O1_m[15:0]), .CoreAPB3_0_0_APBmslave2_PRDATA_m(CoreAPB3_0_0_APBmslave2_PRDATA_m[15:8]), .io0O1(CORETSE_0_inst_0_CORETSE_0_0_CoreTSE_TOP_INST_tsmac_top_U0_apb_hst_cnv_io0O1[31:16]), .N_1206(MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_N_1206), .un1_PADDR_2(CORESPI_0_0_CORESPI_0_0_USPI_un1_PADDR_2), .tx_fifo_write_sig14_i_1(CORESPI_0_0_CORESPI_0_0_USPI_UCON_tx_fifo_write_sig14_i_1), .N_1214(MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_N_1214), .apb_pslverr_net(MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_apb_pslverr_net), .apb_penable_net(MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_apb_penable_net), .CoreAPB3_0_0_APBmslave0_PWRITE(CoreAPB3_0_0_APBmslave0_PWRITE), .MIV_RV32_C0_0_APB_INITIATOR_PSELx(MIV_RV32_C0_0_APB_INITIATOR_PSELx), .CoreAPB3_0_0_APBmslave0_PENABLE(CoreAPB3_0_0_APBmslave0_PENABLE), .iPRDATA_0_sqmuxa(CoreAPB3_0_0_CoreAPB3_0_0_u_mux_p_to_b3_iPRDATA_0_sqmuxa), .Oi0O1(CORETSE_0_inst_0_CORETSE_0_0_CoreTSE_TOP_INST_tsmac_top_U0_apb_hst_cnv_Oi0O1), .un1_shiftDR20(MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_gen_subsys_debug_u_subsys_debug_unit_0_MIV_subsys_debug_transport_module_jtag_0_gen_shift_register_active_high_gen_shift_register_active_low_un1_shiftDR20), .COREJTAGDEBUG_C0_0_TGT_TDI_0(COREJTAGDEBUG_C0_0_TGT_TDI_0), .COREJTAGDEBUG_C0_0_TGT_TMS_0(COREJTAGDEBUG_C0_0_TGT_TMS_0), .N_974(MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_N_974), .shiftDR21(MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_gen_subsys_debug_u_subsys_debug_unit_0_MIV_subsys_debug_transport_module_jtag_0_gen_shift_register_active_high_gen_shift_register_active_low_shiftDR21), .shiftBP_ne_0(MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_gen_subsys_debug_u_subsys_debug_unit_0_MIV_subsys_debug_transport_module_jtag_0_genblk3_shift_active_high_shift_active_low_shiftBP_ne_0), .COREJTAGDEBUG_C0_0_TGT_TCK_0_i(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .shiftIR_ne_0(MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_gen_subsys_debug_u_subsys_debug_unit_0_MIV_subsys_debug_transport_module_jtag_0_genblk3_shift_active_high_shift_active_low_shiftIR_ne_0), .COREJTAGDEBUG_C0_0_TGT_TCK_0(COREJTAGDEBUG_C0_0_TGT_TCK_0), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .d_m2_e_1_0(d_m2_e_1_0_Z), .N_8_i(MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_u_hart_0_u_expipe_0_N_8_i), .N_10_i(MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_u_hart_0_u_expipe_0_N_10_i), .CoreAPB3_0_0_APBmslave0_PWRITE_s0(CoreAPB3_0_0_APBmslave0_PWRITE_s0), .un3_apb_int_sel(MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_gen_mtime_un3_apb_int_sel), .dff(Core_reset_pf_0_Core_reset_pf_0_dff) ); // @75:556 PF_CCC_0 PF_CCC_0_0 ( .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .un1_PLL_POWERDOWN_B_i(Core_reset_pf_0_Core_reset_pf_0_un1_PLL_POWERDOWN_B_i), .PF_CCC_0_0_PLL_LOCK_0(PF_CCC_0_0_PLL_LOCK_0), .REF_CLK_0_c(REF_CLK_0_c) ); // @75:566 pf_init_monitor_0 pf_init_monitor_0_0 ( .pf_init_monitor_0_0_BANK_6_VDDI_STATUS(pf_init_monitor_0_0_BANK_6_VDDI_STATUS), .pf_init_monitor_0_0_FABRIC_POR_N(pf_init_monitor_0_0_FABRIC_POR_N), .pf_init_monitor_0_0_DEVICE_INIT_DONE(pf_init_monitor_0_0_DEVICE_INIT_DONE) ); // @75:585 PF_IOD_CDR_C0 PF_IOD_CDR_C0_0 ( .CORETSE_0_TCG(CORETSE_0_TCG[9:0]), .PF_IOD_CDR_C0_0_RX_DATA(PF_IOD_CDR_C0_0_RX_DATA[9:0]), .PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_DELAY_CODE(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_DELAY_CODE[6:0]), .AND2_2_Y(AND2_2_Y), .PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_PAUSE(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_PAUSE), .PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_90(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_90), .PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_180(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_180), .PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_270(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_270), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_0(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_0), .cdr_start(PF_IOD_CDR_CCC_C0_0_PF_COREDELAYCODE_TIP_0_cdr_start), .SSDetect_0_stream_start(SSDetect_0_stream_start), .PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_VALID_CODE(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_VALID_CODE), .TX_P(TX_P), .TX_N(TX_N), .RX_P(RX_P), .RX_N(RX_N), .PF_IOD_CDR_C0_0_RX_CLK_R(PF_IOD_CDR_C0_0_RX_CLK_R) ); // @75:612 PF_IOD_CDR_CCC_C0 PF_IOD_CDR_CCC_C0_0 ( .PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_DELAY_CODE(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_DELAY_CODE[6:0]), .cdr_start(PF_IOD_CDR_CCC_C0_0_PF_COREDELAYCODE_TIP_0_cdr_start), .PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_PAUSE(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_PAUSE), .PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_VALID_CODE(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_DLL_VALID_CODE), .PF_IOD_CDR_CCC_C0_0_TX_CLK_G(PF_IOD_CDR_CCC_C0_0_TX_CLK_G), .PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_0(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_0), .PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_180(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_180), .PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_90(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_90), .dff(Core_reset_pf_0_Core_reset_pf_0_dff), .PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_PLL_LOCK(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_PLL_LOCK), .INBUF_DIFF_0_Y(INBUF_DIFF_0_Y), .PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_270(PF_IOD_CDR_CCC_C0_0_CDR_CLOCKS_HS_IO_CLK_270) ); // @75:632 PF_TPSRAM_C0 PF_TPSRAM_C0_0 ( .fifo_to_tpsram_bridge_0_ram_w_addr_4(fifo_to_tpsram_bridge_0_ram_w_addr_4[10:0]), .R_DATA_c(R_DATA_c[31:0]), .COREFIFO_C0_0_Q(COREFIFO_C0_0_Q[31:0]), .PF_CCC_0_0_OUT0_FABCLK_0(PF_CCC_0_0_OUT0_FABCLK_0), .fifo_to_tpsram_bridge_0_ram_w_en(fifo_to_tpsram_bridge_0_ram_w_en) ); // @75:644 SSDetect SSDetect_0 ( .PF_IOD_CDR_C0_0_RX_DATA(PF_IOD_CDR_C0_0_RX_DATA[6:0]), .PF_IOD_CDR_C0_0_RX_CLK_R(PF_IOD_CDR_C0_0_RX_CLK_R), .AND2_2_Y(AND2_2_Y), .SSDetect_0_stream_start(SSDetect_0_stream_start) ); COREJTAGDEBUG_C0 COREJTAGDEBUG_C0_0 ( .currTapState_7(MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_gen_subsys_debug_u_subsys_debug_unit_0_MIV_subsys_debug_transport_module_jtag_0_gen_current_state_register_active_high_gen_current_state_register_active_low_currTapState[11]), .currTapState_0(MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_gen_subsys_debug_u_subsys_debug_unit_0_MIV_subsys_debug_transport_module_jtag_0_gen_current_state_register_active_high_gen_current_state_register_active_low_currTapState[4]), .delay_sel_0(COREJTAGDEBUG_C0_0_COREJTAGDEBUG_C0_0_genblk2_genblk2_0__BUFD_TRST_delay_sel[34]), .COREJTAGDEBUG_C0_0_TGT_TCK_0_i(COREJTAGDEBUG_C0_0_TGT_TCK_0_i), .COREJTAGDEBUG_C0_0_TGT_TCK_0(COREJTAGDEBUG_C0_0_TGT_TCK_0), .TRSTB(TRSTB), .TDO(TDO), .TDI(TDI), .TMS(TMS), .TCK(TCK), .COREJTAGDEBUG_C0_0_TGT_TDI_0(COREJTAGDEBUG_C0_0_TGT_TDI_0), .COREJTAGDEBUG_C0_0_TGT_TMS_0(COREJTAGDEBUG_C0_0_TGT_TMS_0), .N_974(MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_N_974), .shiftDR21(MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_gen_subsys_debug_u_subsys_debug_unit_0_MIV_subsys_debug_transport_module_jtag_0_gen_shift_register_active_high_gen_shift_register_active_low_shiftDR21), .un1_shiftDR20(MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_gen_subsys_debug_u_subsys_debug_unit_0_MIV_subsys_debug_transport_module_jtag_0_gen_shift_register_active_high_gen_shift_register_active_low_un1_shiftDR20), .shiftBP_ne_0(MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_gen_subsys_debug_u_subsys_debug_unit_0_MIV_subsys_debug_transport_module_jtag_0_genblk3_shift_active_high_shift_active_low_shiftBP_ne_0), .shiftIR_ne_0(MIV_RV32_C0_0_MIV_RV32_C0_0_u_ipcore_0_gen_subsys_debug_u_subsys_debug_unit_0_MIV_subsys_debug_transport_module_jtag_0_genblk3_shift_active_high_shift_active_low_shiftIR_ne_0) ); GND GND_Z ( .Y(GND) ); VCC VCC_Z ( .Y(VCC) ); endmodule /* top */